@justin371
justin371 暂无简介
:dragon_face:Jude's vimrc for DV work(fine tuning for SV/UVM)
yet another AXI testbench repo. ;) This is for my UVM practice. https://marcoz001.github.io/axi-uvm/
UVM Testbench For SystemVerilog Combinator Implementation
UVM interactive debug library
基于 FPGA 的 RISC-V CPU + SoC
Source code repo for UVM Tutorial for Candy Lovers
training labs and examples
Reference examples and short projects using UVM Methodology
use vim as IDE