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0015-x86-Simplify-check-for-distinct-TMM-register-operand.patch 1.75 KB
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dingguangya 提交于 2022-08-11 09:54 . Enable Intel AVX512_FP16 instructions
From fc141319027485a7cfcbae2451b048ddc6c33b48 Mon Sep 17 00:00:00 2001
From: "H.J. Lu" <hjl.tools@gmail.com>
Date: Wed, 28 Jul 2021 10:42:47 -0700
Subject: [PATCH] x86: Simplify check for distinct TMM register operands
If any pair of operands in AMX instructions with 3 TMM register operands
are the same, the instruction will UD. Don't call register_number to
check for distinct TMM register operands since all TMM register operands
have the same size.
* config/tc-i386.c (check_VecOperands): Remove register_number
call when checking for distinct TMM register operands.
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index d98c6c4e949..1235c3e7733 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -6076,21 +6076,16 @@ check_VecOperands (const insn_template *t)
}
}
- /* For AMX instructions with three tmmword operands, all tmmword operand must be
- distinct */
- if (t->operand_types[0].bitfield.tmmword
- && i.reg_operands == 3)
- {
- if (register_number (i.op[0].regs)
- == register_number (i.op[1].regs)
- || register_number (i.op[0].regs)
- == register_number (i.op[2].regs)
- || register_number (i.op[1].regs)
- == register_number (i.op[2].regs))
- {
- i.error = invalid_tmm_register_set;
- return 1;
- }
+ /* For AMX instructions with 3 TMM register operands, all operands
+ must be distinct. */
+ if (i.reg_operands == 3
+ && t->operand_types[0].bitfield.tmmword
+ && (i.op[0].regs == i.op[1].regs
+ || i.op[0].regs == i.op[2].regs
+ || i.op[1].regs == i.op[2].regs))
+ {
+ i.error = invalid_tmm_register_set;
+ return 1;
}
/* Check if broadcast is supported by the instruction and is applied
--
2.33.0
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