/*
 * Copyright 2024 Hangzhou Yingyi Technology Co., Ltd
 * 
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 *    http://www.apache.org/licenses/LICENSE-2.0

 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 */

#include <stdint.h>
#include <uk/plat/lcpu.h>
#include <arm/irq.h>
#include <arm/cpu.h>

void ukplat_lcpu_enable_irq(void)
{
	local_irq_enable();
}

void ukplat_lcpu_disable_irq(void)
{
	local_irq_disable();
}

void ukplat_lcpu_halt_irq(void)
{
	UK_ASSERT(ukplat_lcpu_irqs_disabled());

	/* Note: If priority masking is enabled
	 * interrupts need to be unmasked in the GIC.
	 *
	 * See Linux `cpu_do_idle(void)` implementation
	 */
	halt();
}

unsigned long ukplat_lcpu_save_irqf(void)
{
	unsigned long flags;

	local_irq_save(flags);

	return flags;
}

void ukplat_lcpu_restore_irqf(unsigned long flags)
{
	local_irq_restore(flags);
}

int ukplat_lcpu_irqs_disabled(void)
{
	return irqs_disabled();
}

void ukplat_lcpu_irqs_handle_pending(void)
{
	// TODO
}

unsigned int tnplat_lcpu_physical_index(__lcpuid_p cpuid)
{
	return cpuid & MPIDR_AFF0_MASK;
}