/*
 * Versal header file
 *
 * Copyright (c) 2016, Xilinx Inc
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above copyright
 *       notice, this list of conditions and the following disclaimer in the
 *       documentation and/or other materials provided with the distribution.
 *     * Neither the name of the <organization> nor the
 *       names of its contributors may be used to endorse or promote products
 *       derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 * DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#include "loader.dtsh"
#include "versal-irqs.dtsh"
#include "versal-memmap.dtsh"
#include "versal-resetmap.dtsh"
#include "versal-powermap.dtsh"
#include "versal-wiremap.dtsh"
#include "versal-smid.dtsh"


/* CPU CORE ID's */
#define CPU_NR_APU0 0
#define CPU_NR_APU1 1
#define CPU_NR_RPU0 2
#define CPU_NR_RPU1 3

#define PLATFORM_SILICON     0x0
#define PLATFORM_QEMU        0x3
#define PLATFORM_QEMU_COSIM  0x7

/* QEMU RAM Settings */
#if defined(MULTI_ARCH)
	#define IS_MULTI_ARCH(a) a
	#define QEMU_RAM_PROPERTY 2
#else
	#define IS_MULTI_ARCH(a)
	#define QEMU_RAM_PROPERTY 1
#endif

#define xglue(a, b) a ## b
#define glue(a, b) xglue(a, b)