/*
 * ZynqMP EP108 board device tree
 *
 * Copyright (c) 2016, Xilinx Inc
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above copyright
 *       notice, this list of conditions and the following disclaimer in the
 *       documentation and/or other materials provided with the distribution.
 *     * Neither the name of the <organization> nor the
 *       names of its contributors may be used to endorse or promote products
 *       derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 * DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#include "zynqmp.dtsh"

/dts-v1/;

#include "zynqmp-arm.dtsi"
#include "zynqmp-memory-regions.dtsi"

/ {
	model = "ZynqMP EP108";

	aliases {
		ethernet0 = &gem0;
	};

	mdio0: mdio {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible="mdio";
		phy0: phy@0 {
			compatible = "88e1118r";
			device_type = "ethernet-phy";
			reg = <0>;
		};
	};
};

&amba {
	I2C_NODES(ps7_i2c_0, I2C0, I2C0_IRQ_0, 0x54)
	I2C_NODES(ps7_i2c_1, I2C1, I2C1_IRQ_0, 0x55)
};

&ps7_qspi_0 {
	SPI_FLASH(qspi_flash_lcs_lb, "n25q512a11", 0x02000000, 0x0 0x0)
	SPI_FLASH(qspi_flash_lcs_ub, "n25q512a11", 0x02000000, 0x0 0x1)
};

&ps7_spi_0 {
	SPI_FLASH(spi0_flash1, "sst25wf080", 0x00100000, 0x1 0x0)
	SPI_FLASH(spi0_flash2, "sst25wf080", 0x00100000, 0x2 0x0)
	SPI_FLASH(spi0_flash3, "sst25wf080", 0x00100000, 0x3 0x0)
};

&gem0 {
	mdio = <&mdio0>;
};