# ignore ModelSim generated files and directories (temp files and so on)
[_@]*

# ignore compilation output of ModelSim
*.mti
*.dat
*.dbs
*.psm
*.bak
*.cmp
*.jpg
#*.html
*.bsf

# ignore simulation output of ModelSim
wlf*
*.wlf
*.vstf
*.ucdb
cov*/
transcript*
vsim.dbg
/Full-Design/MiaoBiao/db
/Full-Design/MiaoBiao/*.qws
/Full-Design/MiaoBiao/*.cdf
/Full-Design/MiaoBiao/*.dpf
/Experiments/adder/*.qsf
/Experiments/adder/*.vwf
*.rpt
*.done
*.smsg
*.summary
*.jdi
*.pin
*.qws
*.sld
*.kpt
*.cdb
*.hdb
*.sof
*.qmsg
*.rdb
*.ddb
*.bpm
*.idb
*.logdb
*.hsd
*.db_info
*.hier_info
*.hif
*.ammdb
*.sci
*.tdb
*.tmw_info
*.json
*.dfp
*.rcfdb
*.dpi
*.hb_info
*.sig
Experiments/adder/incremental_db/README
Experiments/adder/db/adder.smart_action.txt
Experiments/adder/db/adder.lpc.txt
*.tdf
Full-Designs/MiaoBiao/db/MiaoBiao.lpc.txt
Full-Designs/MiaoBiao/db/MiaoBiao.smart_action.txt
Full-Designs/MiaoBiao/incremental_db/README
*.nvd
*.flock
Examples/L3-1/db/adder1bit.cbx.xml
Examples/L3-1/db/adder1bit.lpc.txt
Examples/L3-1/db/adder1bit.smart_action.txt
Examples/L3-1/incremental_db/README
Examples/L3-1/output_files/adder1bit.pof
*.sft
*.vo
*.xrf
*.do
*.ini
Examples/L3-1/simulation/modelsim/msim_transcript
*.xml
Examples/L3-2/db/adder1bit.lpc.txt
Examples/L3-2/db/adder1bit.smart_action.txt
Examples/L3-2/incremental_db/README
Examples/L3-2/output_files/adder1bit.pof
Examples/L3-2/simulation/modelsim/adder1bit_run_msim_rtl_verilog.do.bak1
Examples/L3-2/simulation/modelsim/adder1bit_run_msim_rtl_verilog.do.bak2
Examples/L3-2/simulation/modelsim/msim_transcript
Examples/L3-3/adder.pof
Examples/L3-3/adder_description.txt
Examples/L3-3/db/adder.lpc.txt
Examples/L3-3/db/adder.smart_action.txt
Examples/L3-3/incremental_db/README
Examples/L3-4/db/adder4bits.lpc.txt
Examples/L3-4/db/adder4bits.smart_action.txt
Examples/L3-4/incremental_db/README
Examples/L3-4/output_files/adder4bits.pof
*.qarlog
*.sdo
*.csd
*.bak1
*.bak2
*.bak3
*.bak4
*.bak5
*.bak6
Homeworks/L5Homework/method1/db/FullAdder.lpc.txt
Homeworks/L5Homework/method1/db/FullAdder.smart_action.txt
Homeworks/L5Homework/method1/incremental_db/README
Homeworks/L5Homework/method1/simulation/modelsim/msim_transcript
Homeworks/L5Homework/method2/db/FullAdder.lpc.txt
Homeworks/L5Homework/method2/db/FullAdder.smart_action.txt
Homeworks/L5Homework/method2/incremental_db/README
Homeworks/L5Homework/method2/simulation/modelsim/msim_transcript
Homeworks/L6Homework/vote3Prj/db/vote3.lpc.txt
Homeworks/L6Homework/vote3Prj/db/vote3.smart_action.txt
Homeworks/L6Homework/vote3Prj/incremental_db/README
Homeworks/L7Homework/mult_8BitsPrj1/db/mult_8Bits.lpc.txt
Homeworks/L7Homework/mult_8BitsPrj1/db/mult_8Bits.smart_action.txt
Homeworks/L7Homework/mult_8BitsPrj1/incremental_db/README
Examples/L7-3/schTopPrj/db/acc.lpc.txt
Examples/L7-3/schTopPrj/db/acc.smart_action.txt
Examples/L7-3/schTopPrj/incremental_db/README
Examples/L7-3/schTopPrj/simulation/modelsim/msim_transcript
Examples/L7-3/txtTopPrj/db/acc.lpc.txt
Examples/L7-3/txtTopPrj/db/acc.smart_action.txt
Examples/L7-3/txtTopPrj/incremental_db/README
Examples/L7-3/txtTopPrj/simulation/modelsim/acc.vt
Examples/L7-3/txtTopPrj/simulation/modelsim/msim_transcript
Examples/L7-5/ttl74138Prj/db/ttl74138.lpc.txt
Examples/L7-5/ttl74138Prj/db/ttl74138.smart_action.txt
Examples/L7-5/ttl74138Prj/incremental_db/README
Examples/L7-5/ttl74138Prj/simulation/modelsim/msim_transcript
Examples/L7-5/ttl74148Prj/db/ttl74148.lpc.txt
Examples/L7-5/ttl74148Prj/db/ttl74148.smart_action.txt
Examples/L7-5/ttl74148Prj/incremental_db/README
Examples/L7-3/txtTopPrj/quartus_nativelink_synthesis.log
Homeworks/L9Homework/multiplier/db/multiplier8Bits.lpc.txt
Homeworks/L9Homework/multiplier/db/multiplier8Bits.smart_action.txt
Homeworks/L9Homework/multiplier/db/multiplier8Bits.smp_dump.txt
Homeworks/L9Homework/multiplier/incremental_db/README
Homeworks/L9Homework/multiplier/simulation/modelsim/msim_transcript
*.bak10
*.bak11
*.bak7
*.bak8
*.bak9
Examples/L9-5/multiplier/multiplier_Fsm_Prj/db/multiplier8Bits.lpc.txt
Examples/L9-5/multiplier/multiplier_Fsm_Prj/db/multiplier8Bits.smart_action.txt
Examples/L9-5/multiplier/multiplier_Fsm_Prj/db/multiplier8Bits.smp_dump.txt
Examples/L9-5/multiplier/multiplier_Fsm_Prj/incremental_db/README
Examples/L9-5/multiplier/multiplier_Fsm_Prj/simulation/modelsim/msim_transcript
Examples/L9-5/multiplier/multiplier_ShiftAdd_Prj/db/multiplier8Bits.lpc.txt
Examples/L9-5/multiplier/multiplier_ShiftAdd_Prj/db/multiplier8Bits.smart_action.txt
Examples/L9-5/multiplier/multiplier_ShiftAdd_Prj/incremental_db/README
Examples/L9-5/multiplier/multiplier_ShiftAdd_Prj/simulation/modelsim/msim_transcript
Examples/L9-6/mod5Cnt_FsmPrj/db/mod5Cnt_Fsm.lpc.txt
Examples/L9-6/mod5Cnt_FsmPrj/db/mod5Cnt_Fsm.smart_action.txt
Examples/L9-6/mod5Cnt_FsmPrj/incremental_db/README
Examples/L9-6/mod5CntPrj/db/mod5Cnt.lpc.txt
Examples/L9-6/mod5CntPrj/db/mod5Cnt.smart_action.txt
Examples/L9-6/mod5CntPrj/incremental_db/README
Examples/L9-6/mod5Cnt_FsmPrj/db/mod5Cnt_Fsm.smp_dump.txt
Experiments/adder/simulation/modelsim/adder.vt
Experiments/adder/simulation/modelsim/msim_transcript
Experiments/DDisplay/db/ddisplay8.lpc.txt
Experiments/DDisplay/db/ddisplay8.smart_action.txt
*.pof
Experiments/DDisplay/incremental_db/README
Full-Designs/MiaoBiao/switch.v
vivado.jou
vivado.log
*.str
.xil
Lab1_flashLED.cache
Lab1_flashLED.hw
Lab1_flashLED.runs
Lab1_flashLED.sim
Lab2_Smart_responder.cache
Lab2_Smart_responder.hw
Lab2_Smart_responder.runs
Lab2_Smart_responder.sim
Lab3_div_clk.cache
Lab3_div_clk.hw
Lab3_div_clk.runs
Lab3_div_clk.sim
Lab4_filter.cache
Lab4_filter.hw
Lab4_filter.runs
Lab4_filter.sim
Lab4_filter.ip_user_files
Lab4_filter.srcs
lab5_uart.cache
lab5_uart.hw
lab5_uart.runs
lab5_uart.sim
lab5_uart.ip_user_files
lab5_uart.srcs
Lab6_display_vga.cache
Lab6_display_vga.hw
Lab6_display_vga.runs
Lab6_display_vga.sim
Lab6_display_vga.ip_user_files
Lab6_display_vga.srcs
Lab7_bt_uart.cache
Lab7_bt_uart.hw
Lab7_bt_uart.runs
Lab7_bt_uart.sim
Lab7_bt_uart.ip_user_files
Lab7_bt_uart.srcs
Lab8_Microblaze_lab.cache
Lab8_Microblaze_lab.hw
Lab8_Microblaze_lab.runs
Lab8_Microblaze_lab.sim
Lab8_Microblaze_lab.ip_user_files
Lab8_Microblaze_lab.srcs
Lab8_Microblaze_lab.ioplanning
Lab8_Microblaze_lab.sdk
expHW
FullAdder_1bit.cache
FullAdder_1bit.hw
FullAdder_1bit.runs
FullAdder_1bit.sim
FullAdder_1bit.ip_user_files
FullAdder_1bit.srcs
FullAdder_1bit.ioplanning
FullAdder_1bit.sdk


CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/behav/xsim/add4_bin_tb_behav.wdb
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/behav/xsim/add4_bin_tb_vlog.prj
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/behav/xsim/glbl.v
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/behav/xsim/xsim.dir/add4_bin_tb_behav/obj/xsim_0.win64.obj
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/behav/xsim/xsim.dir/add4_bin_tb_behav/obj/xsim_1.c
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/behav/xsim/xsim.dir/add4_bin_tb_behav/obj/xsim_1.win64.obj
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/behav/xsim/xsim.dir/add4_bin_tb_behav/webtalk/.xsim_webtallk.info
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/behav/xsim/xsim.dir/add4_bin_tb_behav/xsim.dbg
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/behav/xsim/xsim.dir/add4_bin_tb_behav/xsim.mem
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/behav/xsim/xsim.dir/add4_bin_tb_behav/xsim.reloc
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/behav/xsim/xsim.dir/add4_bin_tb_behav/xsim.rlx
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/behav/xsim/xsim.dir/add4_bin_tb_behav/xsim.rtti
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/behav/xsim/xsim.dir/add4_bin_tb_behav/xsim.svtype
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/behav/xsim/xsim.dir/add4_bin_tb_behav/xsim.type
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/behav/xsim/xsim.dir/add4_bin_tb_behav/xsim.xdbg
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/behav/xsim/xsim.dir/add4_bin_tb_behav/xsimk.exe
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/add4_bin.sdb
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/add4_bin_tb.sdb
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/glbl.sdb
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/xil_defaultlib.rlx
2020-Spring/Course-notes/exp2/db/testAdder8Bits.lpc.html
2020-Spring/Examples/L3-1/db/adder1bit.lpc.html
2020-Spring/Examples/L3-2/db/adder1bit.lpc.html
2020-Spring/Examples/L3-3/db/adder.lpc.html
2020-Spring/Examples/L3-4/db/adder4bits.lpc.html
2020-Spring/Examples/L7-3/schTopPrj/db/acc.lpc.html
2020-Spring/Examples/L7-3/txtTopPrj/db/acc.lpc.html
2020-Spring/Examples/L7-5/ttl74138Prj/db/ttl74138.lpc.html
2020-Spring/Examples/L7-5/ttl74148Prj/db/ttl74148.lpc.html
2020-Spring/Examples/L9-5/multiplier/multiplier_Fsm_Prj/db/multiplier8Bits.lpc.html
2020-Spring/Examples/L9-5/multiplier/multiplier_ShiftAdd_Prj/db/multiplier8Bits.lpc.html
2020-Spring/Examples/L9-6/mod5Cnt_FsmPrj/db/mod5Cnt_Fsm.lpc.html
2020-Spring/Examples/L9-6/mod5CntPrj/db/mod5Cnt.lpc.html
2020-Spring/Experiments/adder/db/adder.lpc.html
2020-Spring/Full-Designs/MiaoBiao/db/MiaoBiao_Top.lpc.html
2020-Spring/Homeworks/L5Homework/method1/db/FullAdder.lpc.html
2020-Spring/Homeworks/L5Homework/method2/db/FullAdder.lpc.html
2020-Spring/Homeworks/L6Homework/vote3Prj/db/vote3.lpc.html
2020-Spring/Homeworks/L7Homework/mult_8BitsPrj1/db/mult_8Bits.lpc.html
2020-Spring/Homeworks/L9Homework/multiplier/db/multiplier8Bits.lpc.html
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/behav/xsim/xsim.dir/add4_bin_tb_behav/webtalk/usage_statistics_ext_xsim.html
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/func/xsim/add4_bin_tb_func_impl.v
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/func/xsim/add4_bin_tb_func_impl.wdb
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/func/xsim/add4_bin_tb_vlog.prj
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/func/xsim/xsim.dir/add4_bin_tb_func_impl/obj/xsim_0.win64.obj
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/func/xsim/xsim.dir/add4_bin_tb_func_impl/obj/xsim_1.c
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/func/xsim/xsim.dir/add4_bin_tb_func_impl/obj/xsim_1.win64.obj
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/func/xsim/xsim.dir/add4_bin_tb_func_impl/webtalk/.xsim_webtallk.info
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/func/xsim/xsim.dir/add4_bin_tb_func_impl/webtalk/usage_statistics_ext_xsim.html
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/func/xsim/xsim.dir/add4_bin_tb_func_impl/xsim.dbg
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/func/xsim/xsim.dir/add4_bin_tb_func_impl/xsim.mem
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/func/xsim/xsim.dir/add4_bin_tb_func_impl/xsim.reloc
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/func/xsim/xsim.dir/add4_bin_tb_func_impl/xsim.rlx
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/func/xsim/xsim.dir/add4_bin_tb_func_impl/xsim.rtti
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/func/xsim/xsim.dir/add4_bin_tb_func_impl/xsim.svtype
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/func/xsim/xsim.dir/add4_bin_tb_func_impl/xsim.type
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/func/xsim/xsim.dir/add4_bin_tb_func_impl/xsim.xdbg
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/func/xsim/xsim.dir/add4_bin_tb_func_impl/xsimk.exe
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/func/xsim/xsim.dir/xil_defaultlib/add4_bin.sdb
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/func/xsim/xsim.dir/xil_defaultlib/add4_bin_tb.sdb
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/func/xsim/xsim.dir/xil_defaultlib/glbl.sdb
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/func/xsim/xsim.dir/xil_defaultlib/xil_defaultlib.rlx
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/timing/xsim/add4_bin_tb_time_impl.sdf
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/timing/xsim/add4_bin_tb_time_impl.v
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/timing/xsim/add4_bin_tb_time_impl.wdb
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/timing/xsim/add4_bin_tb_vlog.prj
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/timing/xsim/xsim.dir/add4_bin_tb_time_impl/obj/xsim_0.win64.obj
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/timing/xsim/xsim.dir/add4_bin_tb_time_impl/obj/xsim_1.c
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/timing/xsim/xsim.dir/add4_bin_tb_time_impl/obj/xsim_1.win64.obj
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/timing/xsim/xsim.dir/add4_bin_tb_time_impl/webtalk/.xsim_webtallk.info
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/timing/xsim/xsim.dir/add4_bin_tb_time_impl/webtalk/usage_statistics_ext_xsim.html
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/timing/xsim/xsim.dir/add4_bin_tb_time_impl/xsim.dbg
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/timing/xsim/xsim.dir/add4_bin_tb_time_impl/xsim.mem
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/timing/xsim/xsim.dir/add4_bin_tb_time_impl/xsim.reloc
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/timing/xsim/xsim.dir/add4_bin_tb_time_impl/xsim.rlx
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/timing/xsim/xsim.dir/add4_bin_tb_time_impl/xsim.rtti
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/timing/xsim/xsim.dir/add4_bin_tb_time_impl/xsim.svtype
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/timing/xsim/xsim.dir/add4_bin_tb_time_impl/xsim.type
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/timing/xsim/xsim.dir/add4_bin_tb_time_impl/xsim.xdbg
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/timing/xsim/xsim.dir/add4_bin_tb_time_impl/xsimk.exe
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/timing/xsim/xsim.dir/xil_defaultlib/add4_bin.sdb
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/timing/xsim/xsim.dir/xil_defaultlib/add4_bin_tb.sdb
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/timing/xsim/xsim.dir/xil_defaultlib/glbl.sdb
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/timing/xsim/xsim.dir/xil_defaultlib/xil_defaultlib.rlx
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/func/xsim/add4_bin_tb_func_synth.v
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/func/xsim/add4_bin_tb_func_synth.wdb
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/func/xsim/add4_bin_tb_vlog.prj
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/func/xsim/xsim.dir/add4_bin_tb_func_synth/obj/xsim_0.win64.obj
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/func/xsim/xsim.dir/add4_bin_tb_func_synth/obj/xsim_1.c
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/func/xsim/xsim.dir/add4_bin_tb_func_synth/obj/xsim_1.win64.obj
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/func/xsim/xsim.dir/add4_bin_tb_func_synth/webtalk/.xsim_webtallk.info
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/func/xsim/xsim.dir/add4_bin_tb_func_synth/webtalk/usage_statistics_ext_xsim.html
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/func/xsim/xsim.dir/add4_bin_tb_func_synth/xsim.dbg
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/func/xsim/xsim.dir/add4_bin_tb_func_synth/xsim.mem
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/func/xsim/xsim.dir/add4_bin_tb_func_synth/xsim.reloc
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/func/xsim/xsim.dir/add4_bin_tb_func_synth/xsim.rlx
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CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/func/xsim/xsim.dir/add4_bin_tb_func_synth/xsim.svtype
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CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/func/xsim/xsim.dir/xil_defaultlib/add4_bin.sdb
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/func/xsim/xsim.dir/xil_defaultlib/add4_bin_tb.sdb
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/func/xsim/xsim.dir/xil_defaultlib/glbl.sdb
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/func/xsim/xsim.dir/xil_defaultlib/xil_defaultlib.rlx
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/timing/xsim/add4_bin_tb_time_synth.sdf
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/timing/xsim/add4_bin_tb_time_synth.v
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/timing/xsim/add4_bin_tb_time_synth.wdb
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/timing/xsim/add4_bin_tb_vlog.prj
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/timing/xsim/xsim.dir/add4_bin_tb_time_synth/obj/xsim_0.win64.obj
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/timing/xsim/xsim.dir/add4_bin_tb_time_synth/obj/xsim_1.c
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CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/timing/xsim/xsim.dir/add4_bin_tb_time_synth/webtalk/.xsim_webtallk.info
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/timing/xsim/xsim.dir/add4_bin_tb_time_synth/webtalk/usage_statistics_ext_xsim.html
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/timing/xsim/xsim.dir/add4_bin_tb_time_synth/xsim.dbg
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CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/timing/xsim/xsim.dir/add4_bin_tb_time_synth/xsimk.exe
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/timing/xsim/xsim.dir/xil_defaultlib/add4_bin.sdb
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/timing/xsim/xsim.dir/xil_defaultlib/add4_bin_tb.sdb
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CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/timing/xsim/xsim.dir/xil_defaultlib/xil_defaultlib.rlx
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.xpr
Experiments/exp2/coder4_2/coder4_2.hw/webtalk/.xsim_webtallk.info
Experiments/exp2/coder4_2/coder4_2.hw/webtalk/usage_statistics_ext_labtool.html
Experiments/exp2/coder4_2/coder4_2.runs/impl_1/coder4_2.bit
Experiments/exp2/coder4_2/coder4_2.runs/impl_1/usage_statistics_webtalk.html
Experiments/exp3/Diff.sim/sim_1/behav/xsim/dff_tb_behav.wdb
Experiments/exp3/Diff.sim/sim_1/behav/xsim/dff_tb_vlog.prj
Experiments/exp3/Diff.sim/sim_1/behav/xsim/glbl.v
Experiments/exp3/Diff.sim/sim_1/behav/xsim/xsim.dir/dff_tb_behav/obj/xsim_0.win64.obj
Experiments/exp3/Diff.sim/sim_1/behav/xsim/xsim.dir/dff_tb_behav/obj/xsim_1.c
Experiments/exp3/Diff.sim/sim_1/behav/xsim/xsim.dir/dff_tb_behav/obj/xsim_1.win64.obj
Experiments/exp3/Diff.sim/sim_1/behav/xsim/xsim.dir/dff_tb_behav/webtalk/.xsim_webtallk.info
Experiments/exp3/Diff.sim/sim_1/behav/xsim/xsim.dir/dff_tb_behav/webtalk/usage_statistics_ext_xsim.html
Experiments/exp3/Diff.sim/sim_1/behav/xsim/xsim.dir/dff_tb_behav/xsim.dbg
Experiments/exp3/Diff.sim/sim_1/behav/xsim/xsim.dir/dff_tb_behav/xsim.mem
Experiments/exp3/Diff.sim/sim_1/behav/xsim/xsim.dir/dff_tb_behav/xsim.reloc
Experiments/exp3/Diff.sim/sim_1/behav/xsim/xsim.dir/dff_tb_behav/xsim.rlx
Experiments/exp3/Diff.sim/sim_1/behav/xsim/xsim.dir/dff_tb_behav/xsim.rtti
Experiments/exp3/Diff.sim/sim_1/behav/xsim/xsim.dir/dff_tb_behav/xsim.svtype
Experiments/exp3/Diff.sim/sim_1/behav/xsim/xsim.dir/dff_tb_behav/xsim.type
Experiments/exp3/Diff.sim/sim_1/behav/xsim/xsim.dir/dff_tb_behav/xsim.xdbg
Experiments/exp3/Diff.sim/sim_1/behav/xsim/xsim.dir/dff_tb_behav/xsimk.exe
Experiments/exp3/Diff.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/dff_tb.sdb
Experiments/exp3/Diff.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/glbl.sdb
Experiments/exp3/Diff.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/sync_dff.sdb
Experiments/exp3/Diff.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/xil_defaultlib.rlx
Experiments/exp3/Diff.sim/sim_1/synth/timing/xsim/dff_tb_time_synth.sdf
Experiments/exp3/Diff.sim/sim_1/synth/timing/xsim/dff_tb_time_synth.v
Experiments/exp3/Diff.sim/sim_1/synth/timing/xsim/dff_tb_time_synth.wdb
Experiments/exp3/Diff.sim/sim_1/synth/timing/xsim/dff_tb_vlog.prj
Experiments/exp3/Diff.sim/sim_1/synth/timing/xsim/xsim.dir/dff_tb_time_synth/obj/xsim_0.win64.obj
Experiments/exp3/Diff.sim/sim_1/synth/timing/xsim/xsim.dir/dff_tb_time_synth/obj/xsim_1.c
Experiments/exp3/Diff.sim/sim_1/synth/timing/xsim/xsim.dir/dff_tb_time_synth/obj/xsim_1.win64.obj
Experiments/exp3/Diff.sim/sim_1/synth/timing/xsim/xsim.dir/dff_tb_time_synth/webtalk/.xsim_webtallk.info
Experiments/exp3/Diff.sim/sim_1/synth/timing/xsim/xsim.dir/dff_tb_time_synth/webtalk/usage_statistics_ext_xsim.html
Experiments/exp3/Diff.sim/sim_1/synth/timing/xsim/xsim.dir/dff_tb_time_synth/webtalk/usage_statistics_ext_xsim.wdm
Experiments/exp3/Diff.sim/sim_1/synth/timing/xsim/xsim.dir/dff_tb_time_synth/xsim.dbg
Experiments/exp3/Diff.sim/sim_1/synth/timing/xsim/xsim.dir/dff_tb_time_synth/xsim.mem
Experiments/exp3/Diff.sim/sim_1/synth/timing/xsim/xsim.dir/dff_tb_time_synth/xsim.reloc
Experiments/exp3/Diff.sim/sim_1/synth/timing/xsim/xsim.dir/dff_tb_time_synth/xsim.rlx
Experiments/exp3/Diff.sim/sim_1/synth/timing/xsim/xsim.dir/dff_tb_time_synth/xsim.rtti
Experiments/exp3/Diff.sim/sim_1/synth/timing/xsim/xsim.dir/dff_tb_time_synth/xsim.svtype
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Experiments/exp3/Diff.sim/sim_1/synth/timing/xsim/xsim.dir/dff_tb_time_synth/xsim.xdbg
Experiments/exp3/Diff.sim/sim_1/synth/timing/xsim/xsim.dir/dff_tb_time_synth/xsimk.exe
Experiments/exp3/Diff.sim/sim_1/synth/timing/xsim/xsim.dir/xil_defaultlib/dff_tb.sdb
Experiments/exp3/Diff.sim/sim_1/synth/timing/xsim/xsim.dir/xil_defaultlib/glbl.sdb
Experiments/exp3/Diff.sim/sim_1/synth/timing/xsim/xsim.dir/xil_defaultlib/sync_dff.sdb
Experiments/exp3/Diff.sim/sim_1/synth/timing/xsim/xsim.dir/xil_defaultlib/xil_defaultlib.rlx
Experiments/exp4/ComplexLed.runs/impl_1/usage_statistics_webtalk.html
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/behav/xsim/Bin2BCD_tb_behav.wdb
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CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/func/xsim/xsim.dir/Bin2BCD_tb_func_synth/webtalk/.xsim_webtallk.info
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/func/xsim/xsim.dir/Bin2BCD_tb_func_synth/webtalk/usage_statistics_ext_xsim.html
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/func/xsim/xsim.dir/Bin2BCD_tb_func_synth/xsim.dbg
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/func/xsim/xsim.dir/Bin2BCD_tb_func_synth/xsim.mem
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/func/xsim/xsim.dir/Bin2BCD_tb_func_synth/xsim.reloc
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/func/xsim/xsim.dir/Bin2BCD_tb_func_synth/xsim.rlx
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/func/xsim/xsim.dir/Bin2BCD_tb_func_synth/xsim.rtti
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/func/xsim/xsim.dir/Bin2BCD_tb_func_synth/xsim.svtype
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/func/xsim/xsim.dir/Bin2BCD_tb_func_synth/xsim.type
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/func/xsim/xsim.dir/Bin2BCD_tb_func_synth/xsim.xdbg
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/func/xsim/xsim.dir/Bin2BCD_tb_func_synth/xsimk.exe
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/func/xsim/xsim.dir/xil_defaultlib/glbl.sdb
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/func/xsim/xsim.dir/xil_defaultlib/xil_defaultlib.rlx
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/timing/xsim/Bin2BCD_tb_time_synth.sdf
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/timing/xsim/Bin2BCD_tb_time_synth.v
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/timing/xsim/Bin2BCD_tb_time_synth.wdb
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/timing/xsim/Bin2BCD_tb_vlog.prj
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/timing/xsim/xsim.dir/Bin2BCD_tb_time_synth/obj/xsim_0.win64.obj
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/timing/xsim/xsim.dir/Bin2BCD_tb_time_synth/obj/xsim_1.c
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/timing/xsim/xsim.dir/Bin2BCD_tb_time_synth/obj/xsim_1.win64.obj
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/timing/xsim/xsim.dir/Bin2BCD_tb_time_synth/webtalk/.xsim_webtallk.info
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/timing/xsim/xsim.dir/Bin2BCD_tb_time_synth/webtalk/usage_statistics_ext_xsim.html
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/timing/xsim/xsim.dir/Bin2BCD_tb_time_synth/webtalk/usage_statistics_ext_xsim.wdm
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/timing/xsim/xsim.dir/Bin2BCD_tb_time_synth/xsim.dbg
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/timing/xsim/xsim.dir/Bin2BCD_tb_time_synth/xsim.mem
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/timing/xsim/xsim.dir/Bin2BCD_tb_time_synth/xsim.reloc
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/timing/xsim/xsim.dir/Bin2BCD_tb_time_synth/xsim.rlx
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/timing/xsim/xsim.dir/Bin2BCD_tb_time_synth/xsim.rtti
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/timing/xsim/xsim.dir/Bin2BCD_tb_time_synth/xsim.svtype
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/timing/xsim/xsim.dir/Bin2BCD_tb_time_synth/xsim.type
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/timing/xsim/xsim.dir/Bin2BCD_tb_time_synth/xsim.xdbg
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/timing/xsim/xsim.dir/Bin2BCD_tb_time_synth/xsimk.exe
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/timing/xsim/xsim.dir/xil_defaultlib/glbl.sdb
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/timing/xsim/xsim.dir/xil_defaultlib/xil_defaultlib.rlx
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.srcs/sources_1/new/test.sv
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/impl_1/BCD2SegDispCtl.bin
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/impl_1/BCD2SegDispCtl.bit
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/impl_1/usage_statistics_webtalk.html
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/impl_1/TrafficLight_GreenFlash_top.bit
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/impl_1/usage_statistics_webtalk.html
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.sim/sim_1/behav/xsim/glbl.v
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.sim/sim_1/behav/xsim/TrafficLights_top_tb_behav.wdb
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.sim/sim_1/behav/xsim/TrafficLights_top_tb_vlog.prj
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Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.sim/sim_1/behav/xsim/xsim.dir/TrafficLights_top_tb_behav/obj/xsim_1.c
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.sim/sim_1/behav/xsim/xsim.dir/TrafficLights_top_tb_behav/obj/xsim_1.win64.obj
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.sim/sim_1/behav/xsim/xsim.dir/TrafficLights_top_tb_behav/webtalk/.xsim_webtallk.info
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.sim/sim_1/behav/xsim/xsim.dir/TrafficLights_top_tb_behav/webtalk/usage_statistics_ext_xsim.html
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.sim/sim_1/behav/xsim/xsim.dir/TrafficLights_top_tb_behav/xsim.dbg
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.sim/sim_1/behav/xsim/xsim.dir/TrafficLights_top_tb_behav/xsim.mem
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.sim/sim_1/behav/xsim/xsim.dir/TrafficLights_top_tb_behav/xsim.reloc
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Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/glbl.sdb
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/xil_defaultlib.rlx
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.xpr
Experiments/exp7-perfect/TrafficLight_GreenFlash_VerilogSRC.rar
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/impl_1/TrafficLight_GreenFlash_top.bin
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/impl_1/TrafficLight_GreenFlash_top.bit
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/impl_1/usage_statistics_webtalk.html
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.sim/sim_1/behav/xsim/glbl.v
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.sim/sim_1/behav/xsim/TrafficLights_top_tb_behav.wdb
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.sim/sim_1/behav/xsim/TrafficLights_top_tb_vlog.prj
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.sim/sim_1/behav/xsim/xsim.dir/TrafficLights_top_tb_behav/obj/xsim_0.win64.obj
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.sim/sim_1/behav/xsim/xsim.dir/TrafficLights_top_tb_behav/obj/xsim_1.c
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.sim/sim_1/behav/xsim/xsim.dir/TrafficLights_top_tb_behav/obj/xsim_1.win64.obj
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.sim/sim_1/behav/xsim/xsim.dir/TrafficLights_top_tb_behav/webtalk/.xsim_webtallk.info
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.sim/sim_1/behav/xsim/xsim.dir/TrafficLights_top_tb_behav/webtalk/usage_statistics_ext_xsim.html
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.sim/sim_1/behav/xsim/xsim.dir/TrafficLights_top_tb_behav/webtalk/usage_statistics_ext_xsim.wdm
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.sim/sim_1/behav/xsim/xsim.dir/TrafficLights_top_tb_behav/xsim.dbg
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Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/xil_defaultlib.rlx
Experiments/exp7/TrafficLights.zip
Experiments/exp7/TrafficLights/TrafficLights.sim/sim_1/behav/xsim/glbl.v
Experiments/exp7/TrafficLights/TrafficLights.sim/sim_1/behav/xsim/tafficlights_top_behav.wdb
Experiments/exp7/TrafficLights/TrafficLights.sim/sim_1/behav/xsim/tafficlights_top_vlog.prj
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Experiments/exp7/TrafficLights/TrafficLights.sim/sim_1/behav/xsim/xsim.dir/tafficlights_top_behav/obj/xsim_1.c
Experiments/exp7/TrafficLights/TrafficLights.sim/sim_1/behav/xsim/xsim.dir/tafficlights_top_behav/obj/xsim_1.win64.obj
Experiments/exp7/TrafficLights/TrafficLights.sim/sim_1/behav/xsim/xsim.dir/tafficlights_top_behav/webtalk/.xsim_webtallk.info
Experiments/exp7/TrafficLights/TrafficLights.sim/sim_1/behav/xsim/xsim.dir/tafficlights_top_behav/webtalk/usage_statistics_ext_xsim.html
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Experiments/exp7/TrafficLights/TrafficLights.sim/sim_1/behav/xsim/xsim.dir/TrafficLights_tb_behav/obj/xsim_1.c
Experiments/exp7/TrafficLights/TrafficLights.sim/sim_1/behav/xsim/xsim.dir/TrafficLights_tb_behav/obj/xsim_1.win64.obj
Experiments/exp7/TrafficLights/TrafficLights.sim/sim_1/behav/xsim/xsim.dir/TrafficLights_tb_behav/webtalk/.xsim_webtallk.info
Experiments/exp7/TrafficLights/TrafficLights.sim/sim_1/behav/xsim/xsim.dir/TrafficLights_tb_behav/webtalk/usage_statistics_ext_xsim.html
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Experiments/exp7/TrafficLights/TrafficLights.sim/sim_1/behav/xsim/xsim.dir/TrafficLights_tb_behav/xsim.dbg
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Experiments/exp7/TrafficLights/TrafficLights.sim/sim_1/behav/xsim/xsim.dir/TrafficLights_tb_behav/xsim.rlx
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Experiments/exp7/TrafficLights/TrafficLights.sim/sim_1/behav/xsim/xsim.dir/TrafficLights_tb_behav/xsimk.exe
Experiments/exp7/TrafficLights/TrafficLights.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/fsm_traffic.sdb
Experiments/exp7/TrafficLights/TrafficLights.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/glbl.sdb
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Experiments/exp7/TrafficLights/TrafficLights.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/tafficlights_top.sdb
Experiments/exp7/TrafficLights/TrafficLights.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/xil_defaultlib.rlx
Experiments/exp7/TrafficLights/TrafficLights_tb_behav.wcfg
Experiments/exp8/SRC/SRC_Exp8.zip
Experiments/exp8/SRC有问题待检查.zip
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/impl_1/StopWatch_top.bin
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/impl_1/StopWatch_top.bit
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/impl_1/usage_statistics_webtalk.html
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/behav/xsim/glbl.v
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/behav/xsim/StopWatch_top_behav.wdb
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/behav/xsim/StopWatch_top_tb_behav.wdb
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/behav/xsim/StopWatch_top_tb_vlog.prj
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/behav/xsim/StopWatch_top_vlog.prj
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/behav/xsim/xsim.dir/StopWatch_top_behav/obj/xsim_0.win64.obj
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/behav/xsim/xsim.dir/StopWatch_top_behav/obj/xsim_1.c
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/behav/xsim/xsim.dir/StopWatch_top_behav/obj/xsim_1.win64.obj
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/behav/xsim/xsim.dir/StopWatch_top_behav/webtalk/.xsim_webtallk.info
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/behav/xsim/xsim.dir/StopWatch_top_behav/webtalk/usage_statistics_ext_xsim.html
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/behav/xsim/xsim.dir/StopWatch_top_behav/xsim.dbg
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/behav/xsim/xsim.dir/StopWatch_top_behav/xsim.mem
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/behav/xsim/xsim.dir/StopWatch_top_behav/xsim.reloc
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/behav/xsim/xsim.dir/StopWatch_top_behav/xsim.rlx
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/behav/xsim/xsim.dir/StopWatch_top_behav/xsim.rtti
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/behav/xsim/xsim.dir/StopWatch_top_behav/xsim.svtype
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Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/behav/xsim/xsim.dir/StopWatch_top_behav/xsimk.exe
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/behav/xsim/xsim.dir/StopWatch_top_tb_behav/obj/xsim_0.win64.obj
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/behav/xsim/xsim.dir/StopWatch_top_tb_behav/obj/xsim_1.c
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/behav/xsim/xsim.dir/StopWatch_top_tb_behav/obj/xsim_1.win64.obj
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/behav/xsim/xsim.dir/StopWatch_top_tb_behav/webtalk/.xsim_webtallk.info
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/behav/xsim/xsim.dir/StopWatch_top_tb_behav/webtalk/usage_statistics_ext_xsim.html
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/behav/xsim/xsim.dir/StopWatch_top_tb_behav/xsim.dbg
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/behav/xsim/xsim.dir/StopWatch_top_tb_behav/xsim.mem
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Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/xil_defaultlib.rlx
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/synth/timing/xsim/StopWatch_top_tb_time_synth.sdf
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/synth/timing/xsim/StopWatch_top_tb_time_synth.v
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/synth/timing/xsim/StopWatch_top_tb_time_synth.wdb
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/synth/timing/xsim/StopWatch_top_tb_vlog.prj
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/synth/timing/xsim/xsim.dir/StopWatch_top_tb_time_synth/obj/xsim_0.win64.obj
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/synth/timing/xsim/xsim.dir/StopWatch_top_tb_time_synth/obj/xsim_1.c
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/synth/timing/xsim/xsim.dir/StopWatch_top_tb_time_synth/obj/xsim_1.win64.obj
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/synth/timing/xsim/xsim.dir/StopWatch_top_tb_time_synth/webtalk/.xsim_webtallk.info
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/synth/timing/xsim/xsim.dir/StopWatch_top_tb_time_synth/webtalk/usage_statistics_ext_xsim.html
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/synth/timing/xsim/xsim.dir/StopWatch_top_tb_time_synth/xsim.dbg
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/synth/timing/xsim/xsim.dir/StopWatch_top_tb_time_synth/xsim.mem
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/synth/timing/xsim/xsim.dir/StopWatch_top_tb_time_synth/xsim.reloc
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/synth/timing/xsim/xsim.dir/StopWatch_top_tb_time_synth/xsim.rlx
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/synth/timing/xsim/xsim.dir/StopWatch_top_tb_time_synth/xsim.rtti
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/synth/timing/xsim/xsim.dir/StopWatch_top_tb_time_synth/xsim.svtype
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/synth/timing/xsim/xsim.dir/StopWatch_top_tb_time_synth/xsim.type
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/synth/timing/xsim/xsim.dir/StopWatch_top_tb_time_synth/xsim.xdbg
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EGO1_Lab/Lab9_Soundout/SoundOut/MatLab/hdlsrc/filter.v
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EGO1_Lab/Lab9_Soundout/SoundOut/SoundOut.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/filter.sdb
EGO1_Lab/Lab9_Soundout/SoundOut/SoundOut.sim/sim_1/behav/xsim/xsim.dir/SoundOut_TB_behav/xsimk.exe
EGO1_Lab/Lab9_Soundout/SoundOut/SoundOut.sim/sim_1/behav/xsim/xsim.dir/SoundOut_TB_behav/xsim.xdbg
EGO1_Lab/Lab9_Soundout/SoundOut/SoundOut.sim/sim_1/behav/xsim/xsim.dir/SoundOut_TB_behav/xsim.type
EGO1_Lab/Lab9_Soundout/SoundOut/SoundOut.sim/sim_1/behav/xsim/xsim.dir/SoundOut_TB_behav/xsim.svtype
EGO1_Lab/Lab9_Soundout/SoundOut/SoundOut.sim/sim_1/behav/xsim/xsim.dir/SoundOut_TB_behav/xsim.rtti
EGO1_Lab/Lab9_Soundout/SoundOut/SoundOut.sim/sim_1/behav/xsim/xsim.dir/SoundOut_TB_behav/xsim.rlx
EGO1_Lab/Lab9_Soundout/SoundOut/SoundOut.sim/sim_1/behav/xsim/xsim.dir/SoundOut_TB_behav/xsim.reloc
EGO1_Lab/Lab9_Soundout/SoundOut/SoundOut.sim/sim_1/behav/xsim/xsim.dir/SoundOut_TB_behav/xsim.mem
EGO1_Lab/Lab9_Soundout/SoundOut/SoundOut.sim/sim_1/behav/xsim/xsim.dir/SoundOut_TB_behav/xsim.dbg
EGO1_Lab/Lab9_Soundout/SoundOut/SoundOut.sim/sim_1/behav/xsim/xsim.dir/SoundOut_TB_behav/webtalk/usage_statistics_ext_xsim.html
EGO1_Lab/Lab9_Soundout/SoundOut/SoundOut.sim/sim_1/behav/xsim/xsim.dir/SoundOut_TB_behav/webtalk/.xsim_webtallk.info
EGO1_Lab/Lab9_Soundout/SoundOut/SoundOut.sim/sim_1/behav/xsim/xsim.dir/SoundOut_TB_behav/obj/xsim_1.win64.obj
EGO1_Lab/Lab9_Soundout/SoundOut/SoundOut.sim/sim_1/behav/xsim/xsim.dir/SoundOut_TB_behav/obj/xsim_1.c
EGO1_Lab/Lab9_Soundout/SoundOut/SoundOut.sim/sim_1/behav/xsim/xsim.dir/SoundOut_TB_behav/obj/xsim_0.win64.obj
EGO1_Lab/Lab9_Soundout/SoundOut/SoundOut.sim/sim_1/behav/xsim/SoundOut_TB_behav.wdb
EGO1_Lab/Lab9_Soundout/SoundOut/MatLab/hdlsrc/filter_tb.v
EGO1_Lab/Lab9_Soundout/SoundOut/hdlsrc/filter-2kHz.v
EGO1_Lab/Lab9_Soundout/SoundOut/MatLab/InterpolatorSrc/filter_tb.v
EGO1_Lab/Lab9_Soundout/SoundOut/MatLab/InterpolatorSrc/Interpolator.v
EGO1_Lab/Lab9_Soundout/SoundOut/SoundOut.cache/ip/2019.1/d85fc95bcdd237a2/d85fc95bcdd237a2.xci
EGO1_Lab/Lab9_Soundout/SoundOut/SoundOut.cache/ip/2019.1/d85fc95bcdd237a2/dds_Cosine_sim_netlist.v
EGO1_Lab/Lab9_Soundout/SoundOut/SoundOut.cache/ip/2019.1/d85fc95bcdd237a2/dds_Cosine_sim_netlist.vhdl
EGO1_Lab/Lab9_Soundout/SoundOut/SoundOut.cache/ip/2019.1/d85fc95bcdd237a2/dds_Cosine_stub.v
EGO1_Lab/Lab9_Soundout/SoundOut/SoundOut.cache/ip/2019.1/d85fc95bcdd237a2/dds_Cosine_stub.vhdl
EGO1_Lab/Lab9_Soundout/SoundOut/SoundOut.cache/ip/2019.1/e90c207acb3d4e37/dds_Cosine_sim_netlist.v
EGO1_Lab/Lab9_Soundout/SoundOut/SoundOut.cache/ip/2019.1/e90c207acb3d4e37/dds_Cosine_sim_netlist.vhdl
EGO1_Lab/Lab9_Soundout/SoundOut/SoundOut.cache/ip/2019.1/e90c207acb3d4e37/dds_Cosine_stub.v
EGO1_Lab/Lab9_Soundout/SoundOut/SoundOut.cache/ip/2019.1/e90c207acb3d4e37/dds_Cosine_stub.vhdl
EGO1_Lab/Lab9_Soundout/SoundOut/SoundOut.cache/ip/2019.1/e90c207acb3d4e37/e90c207acb3d4e37.xci
EGO1_Lab/Lab9_Soundout/SoundOut/SoundOut.runs/impl_1/SoundOut.bin
EGO1_Lab/Lab9_Soundout/SoundOut/SoundOut.runs/impl_1/SoundOut.bit
EGO1_Lab/Lab9_Soundout/SoundOut/SoundOut.runs/impl_1/usage_statistics_webtalk.html
EGO1_Lab/Lab9_Soundout/SoundOut/SoundOut.sim/sim_1/behav/xsim/xsim.dir/SoundOut_TB_behav/obj/xsim_2.c
EGO1_Lab/Lab9_Soundout/SoundOut/SoundOut.sim/sim_1/behav/xsim/xsim.dir/SoundOut_TB_behav/obj/xsim_2.win64.obj
*.zip
CourseExample/L2_FullAdder_1Bit/Vivado_Prj/vivado_13276.backup.jou
CourseExample/L2_FullAdder_1Bit/Vivado_Prj/vivado_13276.backup.log
CourseExample/L4-10_dff_syn/vivado_prj/dff_syn.cache/wt/gui_handlers.wdf
CourseExample/L4-10_dff_syn/vivado_prj/dff_syn.cache/wt/java_command_handlers.wdf
CourseExample/L4-10_dff_syn/vivado_prj/dff_syn.cache/wt/project.wpc
CourseExample/L4-10_dff_syn/vivado_prj/dff_syn.cache/wt/synthesis.wdf
CourseExample/L4-10_dff_syn/vivado_prj/dff_syn.hw/dff_syn.lpr
CourseExample/L4-11_dff_asyn/vivado_prj/dff_asyn.cache/wt/gui_handlers.wdf
CourseExample/L4-11_dff_asyn/vivado_prj/dff_asyn.cache/wt/java_command_handlers.wdf
CourseExample/L4-11_dff_asyn/vivado_prj/dff_asyn.cache/wt/project.wpc
CourseExample/L4-11_dff_asyn/vivado_prj/dff_asyn.cache/wt/synthesis.wdf
CourseExample/L4-11_dff_asyn/vivado_prj/dff_asyn.hw/dff_asyn.lpr
CourseExample/L4-12_count4/vivado_prj/count4.cache/wt/gui_handlers.wdf
CourseExample/L4-12_count4/vivado_prj/count4.cache/wt/java_command_handlers.wdf
CourseExample/L4-12_count4/vivado_prj/count4.cache/wt/project.wpc
CourseExample/L4-12_count4/vivado_prj/count4.cache/wt/synthesis.wdf
CourseExample/L4-12_count4/vivado_prj/count4.hw/count4.lpr
CourseExample/L4-14_count10/vivado_prj/count10.cache/wt/gui_handlers.wdf
CourseExample/L4-14_count10/vivado_prj/count10.cache/wt/java_command_handlers.wdf
CourseExample/L4-14_count10/vivado_prj/count10.cache/wt/project.wpc
CourseExample/L4-14_count10/vivado_prj/count10.cache/wt/synthesis.wdf
CourseExample/L4-14_count10/vivado_prj/count10.hw/count10.lpr
CourseExample/L4-1_aoi/vivado_prj/aoi.cache/wt/gui_handlers.wdf
CourseExample/L4-1_aoi/vivado_prj/aoi.cache/wt/java_command_handlers.wdf
CourseExample/L4-1_aoi/vivado_prj/aoi.cache/wt/project.wpc
CourseExample/L4-1_aoi/vivado_prj/aoi.cache/wt/synthesis.wdf
CourseExample/L4-1_aoi/vivado_prj/aoi.cache/wt/synthesis_details.wdf
CourseExample/L4-1_aoi/vivado_prj/aoi.hw/aoi.lpr
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/impl_1/.init_design.begin.rst
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/impl_1/.init_design.end.rst
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/impl_1/.opt_design.begin.rst
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/impl_1/.opt_design.end.rst
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/impl_1/.place_design.begin.rst
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/impl_1/.place_design.end.rst
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/impl_1/.route_design.begin.rst
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/impl_1/.route_design.end.rst
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/impl_1/.vivado.begin.rst
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/impl_1/.vivado.end.rst
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/impl_1/.Vivado_Implementation.queue.rst
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/impl_1/aoi.tcl
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/impl_1/aoi.vdi
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/impl_1/aoi_bus_skew_routed.pb
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/impl_1/aoi_bus_skew_routed.rpx
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/impl_1/aoi_drc_opted.pb
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/impl_1/aoi_drc_opted.rpx
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/impl_1/aoi_drc_routed.pb
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/impl_1/aoi_drc_routed.rpx
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/impl_1/aoi_methodology_drc_routed.pb
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/impl_1/aoi_methodology_drc_routed.rpx
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/impl_1/aoi_opt.dcp
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/impl_1/aoi_placed.dcp
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/impl_1/aoi_power_routed.rpx
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/impl_1/aoi_power_summary_routed.pb
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/impl_1/aoi_route_status.pb
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/impl_1/aoi_routed.dcp
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/impl_1/aoi_timing_summary_routed.pb
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/impl_1/aoi_timing_summary_routed.rpx
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/impl_1/aoi_utilization_placed.pb
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/impl_1/htr.txt
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/impl_1/init_design.pb
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/impl_1/ISEWrap.js
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/impl_1/ISEWrap.sh
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/impl_1/opt_design.pb
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/impl_1/place_design.pb
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/impl_1/project.wdf
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/impl_1/route_design.pb
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/impl_1/rundef.js
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/impl_1/runme.bat
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/impl_1/runme.log
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/impl_1/runme.sh
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/impl_1/vivado.pb
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/synth_1/.vivado.begin.rst
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/synth_1/.vivado.end.rst
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/synth_1/.Vivado_Synthesis.queue.rst
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/synth_1/aoi.dcp
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/synth_1/aoi.tcl
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/synth_1/aoi.vds
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/synth_1/aoi_utilization_synth.pb
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/synth_1/htr.txt
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/synth_1/ISEWrap.js
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/synth_1/ISEWrap.sh
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/synth_1/project.wdf
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/synth_1/rundef.js
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/synth_1/runme.bat
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/synth_1/runme.log
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/synth_1/runme.sh
CourseExample/L4-1_aoi/vivado_prj/aoi.runs/synth_1/vivado.pb
CourseExample/L4-5_vote/vivado_prj/vote.cache/wt/gui_handlers.wdf
CourseExample/L4-5_vote/vivado_prj/vote.cache/wt/java_command_handlers.wdf
CourseExample/L4-5_vote/vivado_prj/vote.cache/wt/project.wpc
CourseExample/L4-5_vote/vivado_prj/vote.cache/wt/synthesis.wdf
CourseExample/L4-5_vote/vivado_prj/vote.hw/vote.lpr
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.cache/wt/gui_handlers.wdf
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.cache/wt/java_command_handlers.wdf
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.cache/wt/project.wpc
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.cache/wt/synthesis.wdf
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.cache/wt/synthesis_details.wdf
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.cache/wt/xsim.wdf
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.hw/add4_bin.lpr
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.ip_user_files/README.txt
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/impl_1/.init_design.begin.rst
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/impl_1/.init_design.end.rst
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/impl_1/.opt_design.begin.rst
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/impl_1/.opt_design.end.rst
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/impl_1/.place_design.begin.rst
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/impl_1/.place_design.end.rst
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/impl_1/.route_design.begin.rst
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/impl_1/.route_design.end.rst
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/impl_1/.vivado.begin.rst
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/impl_1/.vivado.end.rst
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/impl_1/.vivado.error.rst
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/impl_1/.Vivado_Implementation.queue.rst
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/impl_1/.write_bitstream.begin.rst
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/impl_1/.write_bitstream.error.rst
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/impl_1/add4_bin.dcp
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/impl_1/add4_bin.tcl
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/impl_1/add4_bin.vdi
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/impl_1/add4_bin_17588.backup.vdi
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/impl_1/add4_bin_bus_skew_routed.pb
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/impl_1/add4_bin_bus_skew_routed.rpx
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/impl_1/add4_bin_drc_opted.pb
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/impl_1/add4_bin_drc_opted.rpx
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/impl_1/add4_bin_drc_routed.pb
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/impl_1/add4_bin_drc_routed.rpx
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/impl_1/add4_bin_methodology_drc_routed.pb
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/impl_1/add4_bin_methodology_drc_routed.rpx
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/impl_1/add4_bin_opt.dcp
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/impl_1/add4_bin_placed.dcp
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/impl_1/add4_bin_power_routed.rpx
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/impl_1/add4_bin_power_summary_routed.pb
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/impl_1/add4_bin_route_status.pb
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/impl_1/add4_bin_routed.dcp
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/impl_1/add4_bin_timing_summary_routed.pb
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/impl_1/add4_bin_timing_summary_routed.rpx
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/impl_1/add4_bin_utilization_placed.pb
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/impl_1/htr.txt
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/impl_1/init_design.pb
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/impl_1/ISEWrap.js
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/impl_1/ISEWrap.sh
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/impl_1/opt_design.pb
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/impl_1/place_design.pb
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/impl_1/project.wdf
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/impl_1/route_design.pb
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/impl_1/rundef.js
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/impl_1/runme.bat
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/impl_1/runme.log
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/impl_1/runme.sh
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/impl_1/vivado.pb
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/impl_1/vivado_17588.backup.jou
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/impl_1/write_bitstream.pb
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/synth_1/.vivado.begin.rst
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/synth_1/.vivado.end.rst
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/synth_1/.Vivado_Synthesis.queue.rst
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/synth_1/add4_bin.dcp
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/synth_1/add4_bin.tcl
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/synth_1/add4_bin.vds
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/synth_1/add4_bin_utilization_synth.pb
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/synth_1/htr.txt
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/synth_1/ISEWrap.js
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/synth_1/ISEWrap.sh
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/synth_1/project.wdf
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/synth_1/rundef.js
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/synth_1/runme.bat
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/synth_1/runme.log
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/synth_1/runme.sh
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.runs/synth_1/vivado.pb
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/behav/xsim/add4_bin_tb.tcl
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/behav/xsim/compile.bat
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/behav/xsim/compile.log
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/behav/xsim/elaborate.bat
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/behav/xsim/elaborate.log
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/behav/xsim/simulate.bat
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/behav/xsim/simulate.log
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/behav/xsim/webtalk.jou
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CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/behav/xsim/webtalk_16200.backup.jou
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/behav/xsim/webtalk_16200.backup.log
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/behav/xsim/xelab.pb
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/behav/xsim/xsim.dir/add4_bin_tb_behav/Compile_Options.txt
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/behav/xsim/xsim.dir/add4_bin_tb_behav/TempBreakPointFile.txt
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/behav/xsim/xsim.dir/add4_bin_tb_behav/xsimcrash.log
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/behav/xsim/xsim.dir/add4_bin_tb_behav/xsimkernel.log
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/behav/xsim/xvlog.log
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/behav/xsim/xvlog.pb
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/func/xsim/add4_bin_tb.tcl
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/func/xsim/compile.bat
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/func/xsim/compile.log
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/func/xsim/elaborate.bat
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/func/xsim/elaborate.log
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/func/xsim/simulate.bat
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/func/xsim/simulate.log
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/func/xsim/webtalk.jou
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/func/xsim/webtalk.log
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/func/xsim/webtalk_16408.backup.jou
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/func/xsim/webtalk_16408.backup.log
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/func/xsim/xelab.pb
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/func/xsim/xsim.dir/add4_bin_tb_func_impl/Compile_Options.txt
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/func/xsim/xsim.dir/add4_bin_tb_func_impl/TempBreakPointFile.txt
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/func/xsim/xsim.dir/add4_bin_tb_func_impl/xsimcrash.log
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/func/xsim/xsim.dir/add4_bin_tb_func_impl/xsimkernel.log
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/func/xsim/xvlog.log
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/func/xsim/xvlog.pb
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/timing/xsim/add4_bin_tb.tcl
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/timing/xsim/compile.bat
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/timing/xsim/compile.log
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/timing/xsim/elaborate.bat
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/timing/xsim/elaborate.log
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/timing/xsim/simulate.bat
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/timing/xsim/simulate.log
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/timing/xsim/webtalk.jou
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/timing/xsim/webtalk.log
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/timing/xsim/webtalk_3704.backup.jou
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/timing/xsim/webtalk_3704.backup.log
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/timing/xsim/xelab.pb
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/timing/xsim/xsim.dir/add4_bin_tb_time_impl/Compile_Options.txt
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/timing/xsim/xsim.dir/add4_bin_tb_time_impl/TempBreakPointFile.txt
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/timing/xsim/xsim.dir/add4_bin_tb_time_impl/xsimcrash.log
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/timing/xsim/xsim.dir/add4_bin_tb_time_impl/xsimkernel.log
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/timing/xsim/xvlog.log
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/impl/timing/xsim/xvlog.pb
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/func/xsim/add4_bin_tb.tcl
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/func/xsim/compile.bat
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/func/xsim/compile.log
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/func/xsim/elaborate.bat
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/func/xsim/elaborate.log
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/func/xsim/simulate.bat
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/func/xsim/simulate.log
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/func/xsim/webtalk.jou
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/func/xsim/webtalk.log
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/func/xsim/webtalk_19072.backup.jou
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/func/xsim/webtalk_19072.backup.log
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/func/xsim/xelab.pb
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/func/xsim/xsim.dir/add4_bin_tb_func_synth/Compile_Options.txt
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/func/xsim/xsim.dir/add4_bin_tb_func_synth/TempBreakPointFile.txt
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/func/xsim/xsim.dir/add4_bin_tb_func_synth/xsimcrash.log
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/func/xsim/xsim.dir/add4_bin_tb_func_synth/xsimkernel.log
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/func/xsim/xvlog.log
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/func/xsim/xvlog.pb
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/timing/xsim/add4_bin_tb.tcl
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/timing/xsim/compile.bat
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/timing/xsim/compile.log
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/timing/xsim/elaborate.bat
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/timing/xsim/elaborate.log
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/timing/xsim/simulate.bat
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/timing/xsim/simulate.log
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CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/timing/xsim/webtalk.log
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CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/timing/xsim/webtalk_14372.backup.log
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/timing/xsim/webtalk_16784.backup.jou
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/timing/xsim/webtalk_16784.backup.log
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/timing/xsim/webtalk_19448.backup.jou
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/timing/xsim/webtalk_19448.backup.log
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/timing/xsim/xelab.pb
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/timing/xsim/xsim.dir/add4_bin_tb_time_synth/Compile_Options.txt
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/timing/xsim/xsim.dir/add4_bin_tb_time_synth/TempBreakPointFile.txt
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/timing/xsim/xsim.dir/add4_bin_tb_time_synth/xsimcrash.log
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/timing/xsim/xsim.dir/add4_bin_tb_time_synth/xsimkernel.log
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/timing/xsim/xvlog.log
CourseExample/L4-6_add4_bin/vivado_prj/add4_bin.sim/sim_1/synth/timing/xsim/xvlog.pb
CourseExample/L4-8_add4_bcd/vivado_prj/add4_bcd.cache/wt/gui_handlers.wdf
CourseExample/L4-8_add4_bcd/vivado_prj/add4_bcd.cache/wt/java_command_handlers.wdf
CourseExample/L4-8_add4_bcd/vivado_prj/add4_bcd.cache/wt/project.wpc
CourseExample/L4-8_add4_bcd/vivado_prj/add4_bcd.cache/wt/synthesis.wdf
CourseExample/L4-8_add4_bcd/vivado_prj/add4_bcd.hw/add4_bcd.lpr
CourseExample/L4-9_diff1/vivado_prj/diff1.cache/wt/gui_handlers.wdf
CourseExample/L4-9_diff1/vivado_prj/diff1.cache/wt/java_command_handlers.wdf
CourseExample/L4-9_diff1/vivado_prj/diff1.cache/wt/project.wpc
CourseExample/L4-9_diff1/vivado_prj/diff1.cache/wt/synthesis.wdf
CourseExample/L4-9_diff1/vivado_prj/diff1.hw/diff1.lpr
CourseExample/L5_Mux4_1/Mux4_1.cache/wt/gui_handlers.wdf
CourseExample/L5_Mux4_1/Mux4_1.cache/wt/java_command_handlers.wdf
CourseExample/L5_Mux4_1/Mux4_1.cache/wt/project.wpc
CourseExample/L5_Mux4_1/Mux4_1.cache/wt/synthesis.wdf
CourseExample/L5_Mux4_1/Mux4_1.hw/Mux4_1.lpr
CourseExample/L5_Mux4_1/Mux4_1.ip_user_files/README.txt
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.cache/wt/gui_handlers.wdf
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.cache/wt/java_command_handlers.wdf
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.cache/wt/project.wpc
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.cache/wt/synthesis.wdf
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.cache/wt/synthesis_details.wdf
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.cache/wt/xsim.wdf
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.hw/Bin2BCD.lpr
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.ip_user_files/README.txt
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/impl_2/.init_design.begin.rst
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/impl_2/.init_design.end.rst
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/impl_2/.opt_design.begin.rst
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/impl_2/.opt_design.end.rst
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/impl_2/.place_design.begin.rst
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/impl_2/.place_design.end.rst
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/impl_2/.route_design.begin.rst
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/impl_2/.route_design.end.rst
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/impl_2/.vivado.begin.rst
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/impl_2/.vivado.end.rst
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/impl_2/.Vivado_Implementation.queue.rst
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/impl_2/Bin2BCD.tcl
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/impl_2/Bin2BCD.vdi
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/impl_2/Bin2BCD_bus_skew_routed.pb
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/impl_2/Bin2BCD_bus_skew_routed.rpx
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/impl_2/Bin2BCD_drc_opted.pb
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/impl_2/Bin2BCD_drc_opted.rpx
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/impl_2/Bin2BCD_drc_routed.pb
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/impl_2/Bin2BCD_drc_routed.rpx
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/impl_2/Bin2BCD_methodology_drc_routed.pb
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/impl_2/Bin2BCD_methodology_drc_routed.rpx
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/impl_2/Bin2BCD_opt.dcp
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/impl_2/Bin2BCD_placed.dcp
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/impl_2/Bin2BCD_power_routed.rpx
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/impl_2/Bin2BCD_power_summary_routed.pb
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/impl_2/Bin2BCD_route_status.pb
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/impl_2/Bin2BCD_routed.dcp
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/impl_2/Bin2BCD_timing_summary_routed.pb
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/impl_2/Bin2BCD_timing_summary_routed.rpx
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/impl_2/Bin2BCD_utilization_placed.pb
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/impl_2/htr.txt
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/impl_2/init_design.pb
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/impl_2/ISEWrap.js
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/impl_2/ISEWrap.sh
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/impl_2/opt_design.pb
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/impl_2/place_design.pb
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/impl_2/project.wdf
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/impl_2/route_design.pb
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/impl_2/rundef.js
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/impl_2/runme.bat
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/impl_2/runme.log
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/impl_2/runme.sh
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/impl_2/vivado.pb
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/synth_1/.vivado.begin.rst
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/synth_1/.vivado.end.rst
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/synth_1/.Vivado_Synthesis.queue.rst
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/synth_1/Bin2BCD.dcp
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/synth_1/Bin2BCD.tcl
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/synth_1/Bin2BCD.vds
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/synth_1/Bin2BCD_utilization_synth.pb
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/synth_1/htr.txt
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/synth_1/ISEWrap.js
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/synth_1/ISEWrap.sh
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/synth_1/project.wdf
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/synth_1/rundef.js
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/synth_1/runme.bat
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/synth_1/runme.log
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/synth_1/runme.sh
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/synth_1/vivado.pb
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/synth_2/.vivado.begin.rst
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/synth_2/.vivado.end.rst
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/synth_2/.Vivado_Synthesis.queue.rst
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/synth_2/Bin2BCD.dcp
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/synth_2/Bin2BCD.tcl
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/synth_2/Bin2BCD.vds
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/synth_2/Bin2BCD_utilization_synth.pb
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/synth_2/htr.txt
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/synth_2/ISEWrap.js
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/synth_2/ISEWrap.sh
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/synth_2/project.wdf
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/synth_2/rundef.js
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/synth_2/runme.bat
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/synth_2/runme.log
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/synth_2/runme.sh
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.runs/synth_2/vivado.pb
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/behav/xsim/Bin2BCD_tb.tcl
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/behav/xsim/compile.bat
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/behav/xsim/elaborate.bat
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/behav/xsim/elaborate.log
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/behav/xsim/simulate.bat
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/behav/xsim/simulate.log
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/behav/xsim/webtalk.jou
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/behav/xsim/webtalk.log
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/behav/xsim/webtalk_2832.backup.jou
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/behav/xsim/webtalk_2832.backup.log
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/behav/xsim/xelab.pb
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/behav/xsim/xsim.dir/Bin2BCD_tb_behav/Compile_Options.txt
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/behav/xsim/xsim.dir/Bin2BCD_tb_behav/TempBreakPointFile.txt
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/behav/xsim/xsim.dir/Bin2BCD_tb_behav/webtalk/xsim_webtalk.tcl
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/behav/xsim/xsim.dir/Bin2BCD_tb_behav/xsimcrash.log
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/behav/xsim/xsim.dir/Bin2BCD_tb_behav/xsimkernel.log
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/behav/xsim/xvlog.log
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/behav/xsim/xvlog.pb
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/func/xsim/Bin2BCD_tb.tcl
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/func/xsim/compile.bat
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/func/xsim/compile.log
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/func/xsim/elaborate.bat
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/func/xsim/elaborate.log
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/func/xsim/simulate.bat
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/func/xsim/simulate.log
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/func/xsim/webtalk.jou
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/func/xsim/webtalk.log
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/func/xsim/webtalk_2532.backup.jou
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/func/xsim/webtalk_2532.backup.log
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/func/xsim/xelab.pb
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/func/xsim/xsim.dir/Bin2BCD_tb_func_synth/Compile_Options.txt
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/func/xsim/xsim.dir/Bin2BCD_tb_func_synth/TempBreakPointFile.txt
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/func/xsim/xsim.dir/Bin2BCD_tb_func_synth/xsimcrash.log
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/func/xsim/xsim.dir/Bin2BCD_tb_func_synth/xsimkernel.log
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/func/xsim/xvlog.log
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/func/xsim/xvlog.pb
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/timing/xsim/Bin2BCD_tb.tcl
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/timing/xsim/compile.bat
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/timing/xsim/compile.log
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/timing/xsim/elaborate.bat
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/timing/xsim/elaborate.log
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/timing/xsim/simulate.bat
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/timing/xsim/simulate.log
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/timing/xsim/webtalk.jou
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/timing/xsim/webtalk.log
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/timing/xsim/webtalk_1272.backup.jou
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/timing/xsim/webtalk_1272.backup.log
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/timing/xsim/xelab.pb
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/timing/xsim/xsim.dir/Bin2BCD_tb_time_synth/Compile_Options.txt
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/timing/xsim/xsim.dir/Bin2BCD_tb_time_synth/TempBreakPointFile.txt
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/timing/xsim/xsim.dir/Bin2BCD_tb_time_synth/webtalk/xsim_webtalk.tcl
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/timing/xsim/xsim.dir/Bin2BCD_tb_time_synth/xsimcrash.log
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/timing/xsim/xsim.dir/Bin2BCD_tb_time_synth/xsimkernel.log
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/timing/xsim/xvlog.log
CourseExample/L8-2_Bin2BCD/Bin2BCD/Bin2BCD.sim/sim_1/synth/timing/xsim/xvlog.pb
EGO1_Lab/Lab1_flashLED/vivado_17440.backup.jou
EGO1_Lab/Lab1_flashLED/vivado_17440.backup.log
Experiments/exp2/coder4_2/coder4_2.cache/wt/gui_handlers.wdf
Experiments/exp2/coder4_2/coder4_2.cache/wt/java_command_handlers.wdf
Experiments/exp2/coder4_2/coder4_2.cache/wt/project.wpc
Experiments/exp2/coder4_2/coder4_2.cache/wt/synthesis.wdf
Experiments/exp2/coder4_2/coder4_2.cache/wt/synthesis_details.wdf
Experiments/exp2/coder4_2/coder4_2.hw/coder4_2.lpr
Experiments/exp2/coder4_2/coder4_2.hw/webtalk/labtool_webtalk.log
Experiments/exp2/coder4_2/coder4_2.runs/impl_1/.init_design.begin.rst
Experiments/exp2/coder4_2/coder4_2.runs/impl_1/.init_design.end.rst
Experiments/exp2/coder4_2/coder4_2.runs/impl_1/.opt_design.begin.rst
Experiments/exp2/coder4_2/coder4_2.runs/impl_1/.opt_design.end.rst
Experiments/exp2/coder4_2/coder4_2.runs/impl_1/.place_design.begin.rst
Experiments/exp2/coder4_2/coder4_2.runs/impl_1/.place_design.end.rst
Experiments/exp2/coder4_2/coder4_2.runs/impl_1/.route_design.begin.rst
Experiments/exp2/coder4_2/coder4_2.runs/impl_1/.route_design.end.rst
Experiments/exp2/coder4_2/coder4_2.runs/impl_1/.vivado.begin.rst
Experiments/exp2/coder4_2/coder4_2.runs/impl_1/.vivado.end.rst
Experiments/exp2/coder4_2/coder4_2.runs/impl_1/.Vivado_Implementation.queue.rst
Experiments/exp2/coder4_2/coder4_2.runs/impl_1/.write_bitstream.begin.rst
Experiments/exp2/coder4_2/coder4_2.runs/impl_1/.write_bitstream.end.rst
Experiments/exp2/coder4_2/coder4_2.runs/impl_1/coder4_2.tcl
Experiments/exp2/coder4_2/coder4_2.runs/impl_1/coder4_2.vdi
Experiments/exp2/coder4_2/coder4_2.runs/impl_1/coder4_2_12984.backup.vdi
Experiments/exp2/coder4_2/coder4_2.runs/impl_1/coder4_2_bus_skew_routed.pb
Experiments/exp2/coder4_2/coder4_2.runs/impl_1/coder4_2_bus_skew_routed.rpx
Experiments/exp2/coder4_2/coder4_2.runs/impl_1/coder4_2_drc_opted.pb
Experiments/exp2/coder4_2/coder4_2.runs/impl_1/coder4_2_drc_opted.rpx
Experiments/exp2/coder4_2/coder4_2.runs/impl_1/coder4_2_drc_routed.pb
Experiments/exp2/coder4_2/coder4_2.runs/impl_1/coder4_2_drc_routed.rpx
Experiments/exp2/coder4_2/coder4_2.runs/impl_1/coder4_2_methodology_drc_routed.pb
Experiments/exp2/coder4_2/coder4_2.runs/impl_1/coder4_2_methodology_drc_routed.rpx
Experiments/exp2/coder4_2/coder4_2.runs/impl_1/coder4_2_opt.dcp
Experiments/exp2/coder4_2/coder4_2.runs/impl_1/coder4_2_placed.dcp
Experiments/exp2/coder4_2/coder4_2.runs/impl_1/coder4_2_power_routed.rpx
Experiments/exp2/coder4_2/coder4_2.runs/impl_1/coder4_2_power_summary_routed.pb
Experiments/exp2/coder4_2/coder4_2.runs/impl_1/coder4_2_route_status.pb
Experiments/exp2/coder4_2/coder4_2.runs/impl_1/coder4_2_routed.dcp
Experiments/exp2/coder4_2/coder4_2.runs/impl_1/coder4_2_timing_summary_routed.pb
Experiments/exp2/coder4_2/coder4_2.runs/impl_1/coder4_2_timing_summary_routed.rpx
Experiments/exp2/coder4_2/coder4_2.runs/impl_1/coder4_2_utilization_placed.pb
Experiments/exp2/coder4_2/coder4_2.runs/impl_1/htr.txt
Experiments/exp2/coder4_2/coder4_2.runs/impl_1/init_design.pb
Experiments/exp2/coder4_2/coder4_2.runs/impl_1/ISEWrap.js
Experiments/exp2/coder4_2/coder4_2.runs/impl_1/ISEWrap.sh
Experiments/exp2/coder4_2/coder4_2.runs/impl_1/opt_design.pb
Experiments/exp2/coder4_2/coder4_2.runs/impl_1/place_design.pb
Experiments/exp2/coder4_2/coder4_2.runs/impl_1/project.wdf
Experiments/exp2/coder4_2/coder4_2.runs/impl_1/route_design.pb
Experiments/exp2/coder4_2/coder4_2.runs/impl_1/rundef.js
Experiments/exp2/coder4_2/coder4_2.runs/impl_1/runme.bat
Experiments/exp2/coder4_2/coder4_2.runs/impl_1/runme.log
Experiments/exp2/coder4_2/coder4_2.runs/impl_1/runme.sh
Experiments/exp2/coder4_2/coder4_2.runs/impl_1/vivado.pb
Experiments/exp2/coder4_2/coder4_2.runs/impl_1/vivado_12984.backup.jou
Experiments/exp2/coder4_2/coder4_2.runs/impl_1/write_bitstream.pb
Experiments/exp2/coder4_2/coder4_2.runs/synth_1/.vivado.begin.rst
Experiments/exp2/coder4_2/coder4_2.runs/synth_1/.vivado.end.rst
Experiments/exp2/coder4_2/coder4_2.runs/synth_1/.Vivado_Synthesis.queue.rst
Experiments/exp2/coder4_2/coder4_2.runs/synth_1/coder4_2.dcp
Experiments/exp2/coder4_2/coder4_2.runs/synth_1/coder4_2.tcl
Experiments/exp2/coder4_2/coder4_2.runs/synth_1/coder4_2.vds
Experiments/exp2/coder4_2/coder4_2.runs/synth_1/coder4_2_utilization_synth.pb
Experiments/exp2/coder4_2/coder4_2.runs/synth_1/htr.txt
Experiments/exp2/coder4_2/coder4_2.runs/synth_1/ISEWrap.js
Experiments/exp2/coder4_2/coder4_2.runs/synth_1/ISEWrap.sh
Experiments/exp2/coder4_2/coder4_2.runs/synth_1/project.wdf
Experiments/exp2/coder4_2/coder4_2.runs/synth_1/rundef.js
Experiments/exp2/coder4_2/coder4_2.runs/synth_1/runme.bat
Experiments/exp2/coder4_2/coder4_2.runs/synth_1/runme.log
Experiments/exp2/coder4_2/coder4_2.runs/synth_1/runme.sh
Experiments/exp2/coder4_2/coder4_2.runs/synth_1/vivado.pb
Experiments/exp3/Diff.cache/wt/gui_handlers.wdf
Experiments/exp3/Diff.cache/wt/java_command_handlers.wdf
Experiments/exp3/Diff.cache/wt/project.wpc
Experiments/exp3/Diff.cache/wt/synthesis.wdf
Experiments/exp3/Diff.cache/wt/synthesis_details.wdf
Experiments/exp3/Diff.cache/wt/xsim.wdf
Experiments/exp3/Diff.hw/Diff.lpr
Experiments/exp3/Diff.ip_user_files/README.txt
Experiments/exp3/Diff.runs/impl_1/.init_design.begin.rst
Experiments/exp3/Diff.runs/impl_1/.init_design.end.rst
Experiments/exp3/Diff.runs/impl_1/.opt_design.begin.rst
Experiments/exp3/Diff.runs/impl_1/.opt_design.end.rst
Experiments/exp3/Diff.runs/impl_1/.place_design.begin.rst
Experiments/exp3/Diff.runs/impl_1/.place_design.end.rst
Experiments/exp3/Diff.runs/impl_1/.route_design.begin.rst
Experiments/exp3/Diff.runs/impl_1/.route_design.end.rst
Experiments/exp3/Diff.runs/impl_1/.vivado.begin.rst
Experiments/exp3/Diff.runs/impl_1/.vivado.end.rst
Experiments/exp3/Diff.runs/impl_1/.Vivado_Implementation.queue.rst
Experiments/exp3/Diff.runs/impl_1/htr.txt
Experiments/exp3/Diff.runs/impl_1/init_design.pb
Experiments/exp3/Diff.runs/impl_1/ISEWrap.js
Experiments/exp3/Diff.runs/impl_1/ISEWrap.sh
Experiments/exp3/Diff.runs/impl_1/opt_design.pb
Experiments/exp3/Diff.runs/impl_1/place_design.pb
Experiments/exp3/Diff.runs/impl_1/project.wdf
Experiments/exp3/Diff.runs/impl_1/route_design.pb
Experiments/exp3/Diff.runs/impl_1/rundef.js
Experiments/exp3/Diff.runs/impl_1/runme.bat
Experiments/exp3/Diff.runs/impl_1/runme.log
Experiments/exp3/Diff.runs/impl_1/runme.sh
Experiments/exp3/Diff.runs/impl_1/sync_dff.tcl
Experiments/exp3/Diff.runs/impl_1/sync_dff.vdi
Experiments/exp3/Diff.runs/impl_1/sync_dff_bus_skew_routed.pb
Experiments/exp3/Diff.runs/impl_1/sync_dff_bus_skew_routed.rpx
Experiments/exp3/Diff.runs/impl_1/sync_dff_drc_opted.pb
Experiments/exp3/Diff.runs/impl_1/sync_dff_drc_opted.rpx
Experiments/exp3/Diff.runs/impl_1/sync_dff_drc_routed.pb
Experiments/exp3/Diff.runs/impl_1/sync_dff_drc_routed.rpx
Experiments/exp3/Diff.runs/impl_1/sync_dff_methodology_drc_routed.pb
Experiments/exp3/Diff.runs/impl_1/sync_dff_methodology_drc_routed.rpx
Experiments/exp3/Diff.runs/impl_1/sync_dff_opt.dcp
Experiments/exp3/Diff.runs/impl_1/sync_dff_placed.dcp
Experiments/exp3/Diff.runs/impl_1/sync_dff_power_routed.rpx
Experiments/exp3/Diff.runs/impl_1/sync_dff_power_summary_routed.pb
Experiments/exp3/Diff.runs/impl_1/sync_dff_route_status.pb
Experiments/exp3/Diff.runs/impl_1/sync_dff_routed.dcp
Experiments/exp3/Diff.runs/impl_1/sync_dff_timing_summary_routed.pb
Experiments/exp3/Diff.runs/impl_1/sync_dff_timing_summary_routed.rpx
Experiments/exp3/Diff.runs/impl_1/sync_dff_utilization_placed.pb
Experiments/exp3/Diff.runs/impl_1/vivado.pb
Experiments/exp3/Diff.runs/synth_1/.vivado.begin.rst
Experiments/exp3/Diff.runs/synth_1/.vivado.end.rst
Experiments/exp3/Diff.runs/synth_1/.Vivado_Synthesis.queue.rst
Experiments/exp3/Diff.runs/synth_1/htr.txt
Experiments/exp3/Diff.runs/synth_1/ISEWrap.js
Experiments/exp3/Diff.runs/synth_1/ISEWrap.sh
Experiments/exp3/Diff.runs/synth_1/project.wdf
Experiments/exp3/Diff.runs/synth_1/rundef.js
Experiments/exp3/Diff.runs/synth_1/runme.bat
Experiments/exp3/Diff.runs/synth_1/runme.log
Experiments/exp3/Diff.runs/synth_1/runme.sh
Experiments/exp3/Diff.runs/synth_1/sync_dff.dcp
Experiments/exp3/Diff.runs/synth_1/sync_dff.tcl
Experiments/exp3/Diff.runs/synth_1/sync_dff.vds
Experiments/exp3/Diff.runs/synth_1/sync_dff_utilization_synth.pb
Experiments/exp3/Diff.runs/synth_1/vivado.pb
Experiments/exp3/Diff.sim/sim_1/behav/xsim/compile.bat
Experiments/exp3/Diff.sim/sim_1/behav/xsim/dff_tb.tcl
Experiments/exp3/Diff.sim/sim_1/behav/xsim/elaborate.bat
Experiments/exp3/Diff.sim/sim_1/behav/xsim/elaborate.log
Experiments/exp3/Diff.sim/sim_1/behav/xsim/simulate.bat
Experiments/exp3/Diff.sim/sim_1/behav/xsim/simulate.log
Experiments/exp3/Diff.sim/sim_1/behav/xsim/webtalk.jou
Experiments/exp3/Diff.sim/sim_1/behav/xsim/webtalk.log
Experiments/exp3/Diff.sim/sim_1/behav/xsim/webtalk_5068.backup.jou
Experiments/exp3/Diff.sim/sim_1/behav/xsim/webtalk_5068.backup.log
Experiments/exp3/Diff.sim/sim_1/behav/xsim/xelab.pb
Experiments/exp3/Diff.sim/sim_1/behav/xsim/xsim.dir/dff_tb_behav/Compile_Options.txt
Experiments/exp3/Diff.sim/sim_1/behav/xsim/xsim.dir/dff_tb_behav/TempBreakPointFile.txt
Experiments/exp3/Diff.sim/sim_1/behav/xsim/xsim.dir/dff_tb_behav/webtalk/xsim_webtalk.tcl
Experiments/exp3/Diff.sim/sim_1/behav/xsim/xsim.dir/dff_tb_behav/xsimcrash.log
Experiments/exp3/Diff.sim/sim_1/behav/xsim/xsim.dir/dff_tb_behav/xsimkernel.log
Experiments/exp3/Diff.sim/sim_1/behav/xsim/xvlog.log
Experiments/exp3/Diff.sim/sim_1/behav/xsim/xvlog.pb
Experiments/exp3/Diff.sim/sim_1/synth/timing/xsim/compile.bat
Experiments/exp3/Diff.sim/sim_1/synth/timing/xsim/compile.log
Experiments/exp3/Diff.sim/sim_1/synth/timing/xsim/dff_tb.tcl
Experiments/exp3/Diff.sim/sim_1/synth/timing/xsim/elaborate.bat
Experiments/exp3/Diff.sim/sim_1/synth/timing/xsim/elaborate.log
Experiments/exp3/Diff.sim/sim_1/synth/timing/xsim/simulate.bat
Experiments/exp3/Diff.sim/sim_1/synth/timing/xsim/simulate.log
Experiments/exp3/Diff.sim/sim_1/synth/timing/xsim/webtalk.jou
Experiments/exp3/Diff.sim/sim_1/synth/timing/xsim/webtalk.log
Experiments/exp3/Diff.sim/sim_1/synth/timing/xsim/webtalk_9876.backup.jou
Experiments/exp3/Diff.sim/sim_1/synth/timing/xsim/webtalk_9876.backup.log
Experiments/exp3/Diff.sim/sim_1/synth/timing/xsim/xelab.pb
Experiments/exp3/Diff.sim/sim_1/synth/timing/xsim/xsim.dir/dff_tb_time_synth/Compile_Options.txt
Experiments/exp3/Diff.sim/sim_1/synth/timing/xsim/xsim.dir/dff_tb_time_synth/TempBreakPointFile.txt
Experiments/exp3/Diff.sim/sim_1/synth/timing/xsim/xsim.dir/dff_tb_time_synth/webtalk/xsim_webtalk.tcl
Experiments/exp3/Diff.sim/sim_1/synth/timing/xsim/xsim.dir/dff_tb_time_synth/xsimcrash.log
Experiments/exp3/Diff.sim/sim_1/synth/timing/xsim/xsim.dir/dff_tb_time_synth/xsimkernel.log
Experiments/exp3/Diff.sim/sim_1/synth/timing/xsim/xvlog.log
Experiments/exp3/Diff.sim/sim_1/synth/timing/xsim/xvlog.pb
Experiments/exp4/ComplexLed.cache/wt/gui_handlers.wdf
Experiments/exp4/ComplexLed.cache/wt/java_command_handlers.wdf
Experiments/exp4/ComplexLed.cache/wt/project.wpc
Experiments/exp4/ComplexLed.cache/wt/synthesis.wdf
Experiments/exp4/ComplexLed.cache/wt/synthesis_details.wdf
Experiments/exp4/ComplexLed.cache/wt/xsim.wdf
Experiments/exp4/ComplexLed.hw/ComplexLed.lpr
Experiments/exp4/ComplexLed.hw/webtalk/labtool_webtalk.log
Experiments/exp4/ComplexLed.ip_user_files/README.txt
Experiments/exp4/ComplexLed.runs/impl_1/.init_design.begin.rst
Experiments/exp4/ComplexLed.runs/impl_1/.init_design.end.rst
Experiments/exp4/ComplexLed.runs/impl_1/.opt_design.begin.rst
Experiments/exp4/ComplexLed.runs/impl_1/.opt_design.end.rst
Experiments/exp4/ComplexLed.runs/impl_1/.place_design.begin.rst
Experiments/exp4/ComplexLed.runs/impl_1/.place_design.end.rst
Experiments/exp4/ComplexLed.runs/impl_1/.route_design.begin.rst
Experiments/exp4/ComplexLed.runs/impl_1/.route_design.end.rst
Experiments/exp4/ComplexLed.runs/impl_1/.vivado.begin.rst
Experiments/exp4/ComplexLed.runs/impl_1/.vivado.end.rst
Experiments/exp4/ComplexLed.runs/impl_1/.Vivado_Implementation.queue.rst
Experiments/exp4/ComplexLed.runs/impl_1/.write_bitstream.begin.rst
Experiments/exp4/ComplexLed.runs/impl_1/.write_bitstream.end.rst
Experiments/exp4/ComplexLed.runs/impl_1/ComplexLedFlow.tcl
Experiments/exp4/ComplexLed.runs/impl_1/ComplexLedFlow.vdi
Experiments/exp4/ComplexLed.runs/impl_1/ComplexLedFlow_12400.backup.vdi
Experiments/exp4/ComplexLed.runs/impl_1/ComplexLedFlow_bus_skew_routed.pb
Experiments/exp4/ComplexLed.runs/impl_1/ComplexLedFlow_bus_skew_routed.rpx
Experiments/exp4/ComplexLed.runs/impl_1/ComplexLedFlow_drc_opted.pb
Experiments/exp4/ComplexLed.runs/impl_1/ComplexLedFlow_drc_opted.rpx
Experiments/exp4/ComplexLed.runs/impl_1/ComplexLedFlow_drc_routed.pb
Experiments/exp4/ComplexLed.runs/impl_1/ComplexLedFlow_drc_routed.rpx
Experiments/exp4/ComplexLed.runs/impl_1/ComplexLedFlow_methodology_drc_routed.pb
Experiments/exp4/ComplexLed.runs/impl_1/ComplexLedFlow_methodology_drc_routed.rpx
Experiments/exp4/ComplexLed.runs/impl_1/ComplexLedFlow_opt.dcp
Experiments/exp4/ComplexLed.runs/impl_1/ComplexLedFlow_placed.dcp
Experiments/exp4/ComplexLed.runs/impl_1/ComplexLedFlow_power_routed.rpx
Experiments/exp4/ComplexLed.runs/impl_1/ComplexLedFlow_power_summary_routed.pb
Experiments/exp4/ComplexLed.runs/impl_1/ComplexLedFlow_route_status.pb
Experiments/exp4/ComplexLed.runs/impl_1/ComplexLedFlow_routed.dcp
Experiments/exp4/ComplexLed.runs/impl_1/ComplexLedFlow_timing_summary_routed.pb
Experiments/exp4/ComplexLed.runs/impl_1/ComplexLedFlow_timing_summary_routed.rpx
Experiments/exp4/ComplexLed.runs/impl_1/ComplexLedFlow_utilization_placed.pb
Experiments/exp4/ComplexLed.runs/impl_1/htr.txt
Experiments/exp4/ComplexLed.runs/impl_1/init_design.pb
Experiments/exp4/ComplexLed.runs/impl_1/ISEWrap.js
Experiments/exp4/ComplexLed.runs/impl_1/ISEWrap.sh
Experiments/exp4/ComplexLed.runs/impl_1/opt_design.pb
Experiments/exp4/ComplexLed.runs/impl_1/place_design.pb
Experiments/exp4/ComplexLed.runs/impl_1/project.wdf
Experiments/exp4/ComplexLed.runs/impl_1/route_design.pb
Experiments/exp4/ComplexLed.runs/impl_1/rundef.js
Experiments/exp4/ComplexLed.runs/impl_1/runme.bat
Experiments/exp4/ComplexLed.runs/impl_1/runme.log
Experiments/exp4/ComplexLed.runs/impl_1/runme.sh
Experiments/exp4/ComplexLed.runs/impl_1/vivado.pb
Experiments/exp4/ComplexLed.runs/impl_1/vivado_12400.backup.jou
Experiments/exp4/ComplexLed.runs/impl_1/write_bitstream.pb
Experiments/exp4/ComplexLed.runs/synth_1/.vivado.begin.rst
Experiments/exp4/ComplexLed.runs/synth_1/.vivado.end.rst
Experiments/exp4/ComplexLed.runs/synth_1/.Vivado_Synthesis.queue.rst
Experiments/exp4/ComplexLed.runs/synth_1/ComplexLedFlow.dcp
Experiments/exp4/ComplexLed.runs/synth_1/ComplexLedFlow.tcl
Experiments/exp4/ComplexLed.runs/synth_1/ComplexLedFlow.vds
Experiments/exp4/ComplexLed.runs/synth_1/ComplexLedFlow_utilization_synth.pb
Experiments/exp4/ComplexLed.runs/synth_1/htr.txt
Experiments/exp4/ComplexLed.runs/synth_1/ISEWrap.js
Experiments/exp4/ComplexLed.runs/synth_1/ISEWrap.sh
Experiments/exp4/ComplexLed.runs/synth_1/rundef.js
Experiments/exp4/ComplexLed.runs/synth_1/runme.bat
Experiments/exp4/ComplexLed.runs/synth_1/runme.log
Experiments/exp4/ComplexLed.runs/synth_1/runme.sh
Experiments/exp4/ComplexLed.runs/synth_1/vivado.pb
Experiments/exp4/ComplexLed.sim/sim_1/behav/xsim/compile.bat
Experiments/exp4/ComplexLed.sim/sim_1/behav/xsim/compile.log
Experiments/exp4/ComplexLed.sim/sim_1/behav/xsim/ComplexLedFlow_tb.tcl
Experiments/exp4/ComplexLed.sim/sim_1/behav/xsim/elaborate.bat
Experiments/exp4/ComplexLed.sim/sim_1/behav/xsim/elaborate.log
Experiments/exp4/ComplexLed.sim/sim_1/behav/xsim/simulate.bat
Experiments/exp4/ComplexLed.sim/sim_1/behav/xsim/simulate.log
Experiments/exp4/ComplexLed.sim/sim_1/behav/xsim/webtalk.jou
Experiments/exp4/ComplexLed.sim/sim_1/behav/xsim/webtalk.log
Experiments/exp4/ComplexLed.sim/sim_1/behav/xsim/webtalk_9424.backup.jou
Experiments/exp4/ComplexLed.sim/sim_1/behav/xsim/webtalk_9424.backup.log
Experiments/exp4/ComplexLed.sim/sim_1/behav/xsim/xelab.pb
Experiments/exp4/ComplexLed.sim/sim_1/behav/xsim/xsim.dir/ComplexLedFlow_tb_behav/Compile_Options.txt
Experiments/exp4/ComplexLed.sim/sim_1/behav/xsim/xsim.dir/ComplexLedFlow_tb_behav/TempBreakPointFile.txt
Experiments/exp4/ComplexLed.sim/sim_1/behav/xsim/xsim.dir/ComplexLedFlow_tb_behav/webtalk/xsim_webtalk.tcl
Experiments/exp4/ComplexLed.sim/sim_1/behav/xsim/xsim.dir/ComplexLedFlow_tb_behav/xsimcrash.log
Experiments/exp4/ComplexLed.sim/sim_1/behav/xsim/xsim.dir/ComplexLedFlow_tb_behav/xsimkernel.log
Experiments/exp4/ComplexLed.sim/sim_1/behav/xsim/xvlog.log
Experiments/exp4/ComplexLed.sim/sim_1/behav/xsim/xvlog.pb
Experiments/exp4/webtalk.jou
Experiments/exp4/webtalk.log
Experiments/exp5/fullAdder4Bin.cache/wt/gui_handlers.wdf
Experiments/exp5/fullAdder4Bin.cache/wt/java_command_handlers.wdf
Experiments/exp5/fullAdder4Bin.cache/wt/project.wpc
Experiments/exp5/fullAdder4Bin.cache/wt/synthesis.wdf
Experiments/exp5/fullAdder4Bin.cache/wt/synthesis_details.wdf
Experiments/exp5/fullAdder4Bin.cache/wt/xsim.wdf
Experiments/exp5/fullAdder4Bin.hw/fullAdder4Bin.lpr
Experiments/exp5/fullAdder4Bin.ip_user_files/README.txt
Experiments/exp5/fullAdder4Bin.runs/impl_1/.init_design.begin.rst
Experiments/exp5/fullAdder4Bin.runs/impl_1/.init_design.end.rst
Experiments/exp5/fullAdder4Bin.runs/impl_1/.opt_design.begin.rst
Experiments/exp5/fullAdder4Bin.runs/impl_1/.opt_design.end.rst
Experiments/exp5/fullAdder4Bin.runs/impl_1/.place_design.begin.rst
Experiments/exp5/fullAdder4Bin.runs/impl_1/.place_design.end.rst
Experiments/exp5/fullAdder4Bin.runs/impl_1/.route_design.begin.rst
Experiments/exp5/fullAdder4Bin.runs/impl_1/.route_design.end.rst
Experiments/exp5/fullAdder4Bin.runs/impl_1/.vivado.begin.rst
Experiments/exp5/fullAdder4Bin.runs/impl_1/.vivado.end.rst
Experiments/exp5/fullAdder4Bin.runs/impl_1/.Vivado_Implementation.queue.rst
Experiments/exp5/fullAdder4Bin.runs/impl_1/.write_bitstream.begin.rst
Experiments/exp5/fullAdder4Bin.runs/impl_1/.write_bitstream.end.rst
Experiments/exp5/fullAdder4Bin.runs/impl_1/fullAdder4Bin_Top.tcl
Experiments/exp5/fullAdder4Bin.runs/impl_1/fullAdder4Bin_Top.vdi
Experiments/exp5/fullAdder4Bin.runs/impl_1/fullAdder4Bin_Top_7036.backup.vdi
Experiments/exp5/fullAdder4Bin.runs/impl_1/fullAdder4Bin_Top_bus_skew_routed.pb
Experiments/exp5/fullAdder4Bin.runs/impl_1/fullAdder4Bin_Top_bus_skew_routed.rpx
Experiments/exp5/fullAdder4Bin.runs/impl_1/fullAdder4Bin_Top_drc_opted.pb
Experiments/exp5/fullAdder4Bin.runs/impl_1/fullAdder4Bin_Top_drc_opted.rpx
Experiments/exp5/fullAdder4Bin.runs/impl_1/fullAdder4Bin_Top_drc_routed.pb
Experiments/exp5/fullAdder4Bin.runs/impl_1/fullAdder4Bin_Top_drc_routed.rpx
Experiments/exp5/fullAdder4Bin.runs/impl_1/fullAdder4Bin_Top_methodology_drc_routed.pb
Experiments/exp5/fullAdder4Bin.runs/impl_1/fullAdder4Bin_Top_methodology_drc_routed.rpx
Experiments/exp5/fullAdder4Bin.runs/impl_1/fullAdder4Bin_Top_opt.dcp
Experiments/exp5/fullAdder4Bin.runs/impl_1/fullAdder4Bin_Top_placed.dcp
Experiments/exp5/fullAdder4Bin.runs/impl_1/fullAdder4Bin_Top_power_routed.rpx
Experiments/exp5/fullAdder4Bin.runs/impl_1/fullAdder4Bin_Top_power_summary_routed.pb
Experiments/exp5/fullAdder4Bin.runs/impl_1/fullAdder4Bin_Top_route_status.pb
Experiments/exp5/fullAdder4Bin.runs/impl_1/fullAdder4Bin_Top_routed.dcp
Experiments/exp5/fullAdder4Bin.runs/impl_1/fullAdder4Bin_Top_timing_summary_routed.pb
Experiments/exp5/fullAdder4Bin.runs/impl_1/fullAdder4Bin_Top_timing_summary_routed.rpx
Experiments/exp5/fullAdder4Bin.runs/impl_1/fullAdder4Bin_Top_utilization_placed.pb
Experiments/exp5/fullAdder4Bin.runs/impl_1/htr.txt
Experiments/exp5/fullAdder4Bin.runs/impl_1/init_design.pb
Experiments/exp5/fullAdder4Bin.runs/impl_1/ISEWrap.js
Experiments/exp5/fullAdder4Bin.runs/impl_1/ISEWrap.sh
Experiments/exp5/fullAdder4Bin.runs/impl_1/opt_design.pb
Experiments/exp5/fullAdder4Bin.runs/impl_1/place_design.pb
Experiments/exp5/fullAdder4Bin.runs/impl_1/project.wdf
Experiments/exp5/fullAdder4Bin.runs/impl_1/route_design.pb
Experiments/exp5/fullAdder4Bin.runs/impl_1/rundef.js
Experiments/exp5/fullAdder4Bin.runs/impl_1/runme.bat
Experiments/exp5/fullAdder4Bin.runs/impl_1/runme.log
Experiments/exp5/fullAdder4Bin.runs/impl_1/runme.sh
Experiments/exp5/fullAdder4Bin.runs/impl_1/vivado.pb
Experiments/exp5/fullAdder4Bin.runs/impl_1/vivado_7036.backup.jou
Experiments/exp5/fullAdder4Bin.runs/impl_1/write_bitstream.pb
Experiments/exp5/fullAdder4Bin.runs/synth_1/.vivado.begin.rst
Experiments/exp5/fullAdder4Bin.runs/synth_1/.vivado.end.rst
Experiments/exp5/fullAdder4Bin.runs/synth_1/.Vivado_Synthesis.queue.rst
Experiments/exp5/fullAdder4Bin.runs/synth_1/fullAdder4Bin_Top.dcp
Experiments/exp5/fullAdder4Bin.runs/synth_1/fullAdder4Bin_Top.tcl
Experiments/exp5/fullAdder4Bin.runs/synth_1/fullAdder4Bin_Top.vds
Experiments/exp5/fullAdder4Bin.runs/synth_1/fullAdder4Bin_Top_utilization_synth.pb
Experiments/exp5/fullAdder4Bin.runs/synth_1/htr.txt
Experiments/exp5/fullAdder4Bin.runs/synth_1/ISEWrap.js
Experiments/exp5/fullAdder4Bin.runs/synth_1/ISEWrap.sh
Experiments/exp5/fullAdder4Bin.runs/synth_1/rundef.js
Experiments/exp5/fullAdder4Bin.runs/synth_1/runme.bat
Experiments/exp5/fullAdder4Bin.runs/synth_1/runme.log
Experiments/exp5/fullAdder4Bin.runs/synth_1/runme.sh
Experiments/exp5/fullAdder4Bin.runs/synth_1/vivado.pb
Experiments/exp5/fullAdder4Bin.sim/sim_1/behav/xsim/compile.bat
Experiments/exp5/fullAdder4Bin.sim/sim_1/behav/xsim/compile.log
Experiments/exp5/fullAdder4Bin.sim/sim_1/behav/xsim/elaborate.bat
Experiments/exp5/fullAdder4Bin.sim/sim_1/behav/xsim/elaborate.log
Experiments/exp5/fullAdder4Bin.sim/sim_1/behav/xsim/fullAdderBin_tb.tcl
Experiments/exp5/fullAdder4Bin.sim/sim_1/behav/xsim/simulate.bat
Experiments/exp5/fullAdder4Bin.sim/sim_1/behav/xsim/simulate.log
Experiments/exp5/fullAdder4Bin.sim/sim_1/behav/xsim/webtalk.jou
Experiments/exp5/fullAdder4Bin.sim/sim_1/behav/xsim/webtalk.log
Experiments/exp5/fullAdder4Bin.sim/sim_1/behav/xsim/webtalk_16128.backup.jou
Experiments/exp5/fullAdder4Bin.sim/sim_1/behav/xsim/webtalk_16128.backup.log
Experiments/exp5/fullAdder4Bin.sim/sim_1/behav/xsim/xelab.pb
Experiments/exp5/fullAdder4Bin.sim/sim_1/behav/xsim/xsim.dir/fullAdderBin_tb_behav/Compile_Options.txt
Experiments/exp5/fullAdder4Bin.sim/sim_1/behav/xsim/xsim.dir/fullAdderBin_tb_behav/TempBreakPointFile.txt
Experiments/exp5/fullAdder4Bin.sim/sim_1/behav/xsim/xsim.dir/fullAdderBin_tb_behav/webtalk/xsim_webtalk.tcl
Experiments/exp5/fullAdder4Bin.sim/sim_1/behav/xsim/xsim.dir/fullAdderBin_tb_behav/xsimcrash.log
Experiments/exp5/fullAdder4Bin.sim/sim_1/behav/xsim/xsim.dir/fullAdderBin_tb_behav/xsimkernel.log
Experiments/exp5/fullAdder4Bin.sim/sim_1/behav/xsim/xvlog.log
Experiments/exp5/fullAdder4Bin.sim/sim_1/behav/xsim/xvlog.pb
Experiments/exp5/fullAdder4Bin.sim/sim_1/synth/timing/xsim/compile.bat
Experiments/exp5/fullAdder4Bin.sim/sim_1/synth/timing/xsim/compile.log
Experiments/exp5/fullAdder4Bin.sim/sim_1/synth/timing/xsim/elaborate.bat
Experiments/exp5/fullAdder4Bin.sim/sim_1/synth/timing/xsim/elaborate.log
Experiments/exp5/fullAdder4Bin.sim/sim_1/synth/timing/xsim/fullAdderBin_tb.tcl
Experiments/exp5/fullAdder4Bin.sim/sim_1/synth/timing/xsim/simulate.bat
Experiments/exp5/fullAdder4Bin.sim/sim_1/synth/timing/xsim/simulate.log
Experiments/exp5/fullAdder4Bin.sim/sim_1/synth/timing/xsim/webtalk.jou
Experiments/exp5/fullAdder4Bin.sim/sim_1/synth/timing/xsim/webtalk.log
Experiments/exp5/fullAdder4Bin.sim/sim_1/synth/timing/xsim/webtalk_13388.backup.jou
Experiments/exp5/fullAdder4Bin.sim/sim_1/synth/timing/xsim/webtalk_13388.backup.log
Experiments/exp5/fullAdder4Bin.sim/sim_1/synth/timing/xsim/xelab.pb
Experiments/exp5/fullAdder4Bin.sim/sim_1/synth/timing/xsim/xsim.dir/fullAdderBin_tb_time_synth/Compile_Options.txt
Experiments/exp5/fullAdder4Bin.sim/sim_1/synth/timing/xsim/xsim.dir/fullAdderBin_tb_time_synth/TempBreakPointFile.txt
Experiments/exp5/fullAdder4Bin.sim/sim_1/synth/timing/xsim/xsim.dir/fullAdderBin_tb_time_synth/xsimcrash.log
Experiments/exp5/fullAdder4Bin.sim/sim_1/synth/timing/xsim/xsim.dir/fullAdderBin_tb_time_synth/xsimkernel.log
Experiments/exp5/fullAdder4Bin.sim/sim_1/synth/timing/xsim/xvlog.log
Experiments/exp5/fullAdder4Bin.sim/sim_1/synth/timing/xsim/xvlog.pb
Experiments/exp5/prj_gen.tcl
Experiments/exp5/vivado_9684.backup.jou
Experiments/exp5/vivado_9684.backup.log
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.cache/wt/gui_handlers.wdf
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.cache/wt/java_command_handlers.wdf
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.cache/wt/project.wpc
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.cache/wt/synthesis.wdf
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.cache/wt/synthesis_details.wdf
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.hw/BCD2SegDispCtl.lpr
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/impl_1/.init_design.begin.rst
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/impl_1/.init_design.end.rst
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/impl_1/.opt_design.begin.rst
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/impl_1/.opt_design.end.rst
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/impl_1/.place_design.begin.rst
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/impl_1/.place_design.end.rst
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/impl_1/.route_design.begin.rst
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/impl_1/.route_design.end.rst
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/impl_1/.vivado.begin.rst
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/impl_1/.vivado.end.rst
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/impl_1/.Vivado_Implementation.queue.rst
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/impl_1/.write_bitstream.begin.rst
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/impl_1/.write_bitstream.end.rst
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/impl_1/BCD2SegDispCtl.tcl
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/impl_1/BCD2SegDispCtl.vdi
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/impl_1/BCD2SegDispCtl_bus_skew_routed.pb
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/impl_1/BCD2SegDispCtl_bus_skew_routed.rpx
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/impl_1/BCD2SegDispCtl_drc_opted.pb
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/impl_1/BCD2SegDispCtl_drc_opted.rpx
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/impl_1/BCD2SegDispCtl_drc_routed.pb
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/impl_1/BCD2SegDispCtl_drc_routed.rpx
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/impl_1/BCD2SegDispCtl_methodology_drc_routed.pb
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/impl_1/BCD2SegDispCtl_methodology_drc_routed.rpx
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/impl_1/BCD2SegDispCtl_opt.dcp
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/impl_1/BCD2SegDispCtl_placed.dcp
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/impl_1/BCD2SegDispCtl_power_routed.rpx
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/impl_1/BCD2SegDispCtl_power_summary_routed.pb
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/impl_1/BCD2SegDispCtl_route_status.pb
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/impl_1/BCD2SegDispCtl_routed.dcp
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/impl_1/BCD2SegDispCtl_timing_summary_routed.pb
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/impl_1/BCD2SegDispCtl_timing_summary_routed.rpx
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/impl_1/BCD2SegDispCtl_utilization_placed.pb
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/impl_1/htr.txt
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/impl_1/init_design.pb
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/impl_1/ISEWrap.js
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/impl_1/ISEWrap.sh
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/impl_1/opt_design.pb
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/impl_1/place_design.pb
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/impl_1/project.wdf
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/impl_1/route_design.pb
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/impl_1/rundef.js
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/impl_1/runme.bat
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/impl_1/runme.log
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/impl_1/runme.sh
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/impl_1/vivado.pb
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/impl_1/write_bitstream.pb
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/synth_1/.vivado.begin.rst
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/synth_1/.vivado.end.rst
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/synth_1/.Vivado_Synthesis.queue.rst
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/synth_1/BCD2SegDispCtl.dcp
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/synth_1/BCD2SegDispCtl.tcl
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/synth_1/BCD2SegDispCtl.vds
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/synth_1/BCD2SegDispCtl_utilization_synth.pb
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/synth_1/htr.txt
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/synth_1/ISEWrap.js
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/synth_1/ISEWrap.sh
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/synth_1/rundef.js
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/synth_1/runme.bat
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/synth_1/runme.log
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/synth_1/runme.sh
Experiments/exp6/BCD2SegDispCtl/BCD2SegDispCtl.runs/synth_1/vivado.pb
Experiments/exp7-advance/SRC/readme.txt
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.cache/wt/gui_handlers.wdf
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.cache/wt/java_command_handlers.wdf
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.cache/wt/project.wpc
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.cache/wt/synthesis.wdf
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.cache/wt/synthesis_details.wdf
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.cache/wt/xsim.wdf
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.hw/TrafficLight_GreenFlash_BcdCnt.lpr
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.ip_user_files/README.txt
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/impl_1/.init_design.begin.rst
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/impl_1/.init_design.end.rst
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/impl_1/.opt_design.begin.rst
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/impl_1/.opt_design.end.rst
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/impl_1/.place_design.begin.rst
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/impl_1/.place_design.end.rst
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/impl_1/.route_design.begin.rst
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/impl_1/.route_design.end.rst
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/impl_1/.vivado.begin.rst
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/impl_1/.vivado.end.rst
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/impl_1/.Vivado_Implementation.queue.rst
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/impl_1/.write_bitstream.begin.rst
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/impl_1/.write_bitstream.end.rst
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/impl_1/htr.txt
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/impl_1/init_design.pb
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/impl_1/ISEWrap.js
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/impl_1/ISEWrap.sh
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/impl_1/opt_design.pb
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/impl_1/place_design.pb
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/impl_1/project.wdf
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/impl_1/route_design.pb
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/impl_1/rundef.js
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/impl_1/runme.bat
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/impl_1/runme.log
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/impl_1/runme.sh
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/impl_1/TrafficLight_GreenFlash_top.tcl
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/impl_1/TrafficLight_GreenFlash_top.vdi
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/impl_1/TrafficLight_GreenFlash_top_2200.backup.vdi
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/impl_1/TrafficLight_GreenFlash_top_bus_skew_routed.pb
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/impl_1/TrafficLight_GreenFlash_top_bus_skew_routed.rpx
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/impl_1/TrafficLight_GreenFlash_top_drc_opted.pb
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/impl_1/TrafficLight_GreenFlash_top_drc_opted.rpx
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/impl_1/TrafficLight_GreenFlash_top_drc_routed.pb
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/impl_1/TrafficLight_GreenFlash_top_drc_routed.rpx
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/impl_1/TrafficLight_GreenFlash_top_methodology_drc_routed.pb
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/impl_1/TrafficLight_GreenFlash_top_methodology_drc_routed.rpx
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/impl_1/TrafficLight_GreenFlash_top_opt.dcp
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/impl_1/TrafficLight_GreenFlash_top_placed.dcp
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/impl_1/TrafficLight_GreenFlash_top_power_routed.rpx
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/impl_1/TrafficLight_GreenFlash_top_power_summary_routed.pb
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/impl_1/TrafficLight_GreenFlash_top_route_status.pb
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/impl_1/TrafficLight_GreenFlash_top_routed.dcp
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/impl_1/TrafficLight_GreenFlash_top_timing_summary_routed.pb
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/impl_1/TrafficLight_GreenFlash_top_timing_summary_routed.rpx
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/impl_1/TrafficLight_GreenFlash_top_utilization_placed.pb
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/impl_1/vivado.pb
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/impl_1/vivado_2200.backup.jou
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/impl_1/write_bitstream.pb
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/synth_1/.vivado.begin.rst
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/synth_1/.vivado.end.rst
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/synth_1/.Vivado_Synthesis.queue.rst
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/synth_1/htr.txt
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/synth_1/ISEWrap.js
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/synth_1/ISEWrap.sh
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/synth_1/rundef.js
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/synth_1/runme.bat
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/synth_1/runme.log
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/synth_1/runme.sh
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/synth_1/TrafficLight_GreenFlash_top.dcp
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/synth_1/TrafficLight_GreenFlash_top.tcl
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/synth_1/TrafficLight_GreenFlash_top.vds
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/synth_1/TrafficLight_GreenFlash_top_utilization_synth.pb
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.runs/synth_1/vivado.pb
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.sim/sim_1/behav/xsim/compile.bat
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.sim/sim_1/behav/xsim/compile.log
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.sim/sim_1/behav/xsim/elaborate.bat
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.sim/sim_1/behav/xsim/elaborate.log
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.sim/sim_1/behav/xsim/simulate.bat
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.sim/sim_1/behav/xsim/simulate.log
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.sim/sim_1/behav/xsim/TrafficLights_top_tb.tcl
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.sim/sim_1/behav/xsim/webtalk.jou
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.sim/sim_1/behav/xsim/webtalk.log
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.sim/sim_1/behav/xsim/webtalk_5744.backup.jou
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.sim/sim_1/behav/xsim/webtalk_5744.backup.log
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.sim/sim_1/behav/xsim/xelab.pb
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.sim/sim_1/behav/xsim/xsim.dir/TrafficLights_top_tb_behav/Compile_Options.txt
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.sim/sim_1/behav/xsim/xsim.dir/TrafficLights_top_tb_behav/TempBreakPointFile.txt
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.sim/sim_1/behav/xsim/xsim.dir/TrafficLights_top_tb_behav/xsimcrash.log
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.sim/sim_1/behav/xsim/xsim.dir/TrafficLights_top_tb_behav/xsimkernel.log
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.sim/sim_1/behav/xsim/xvlog.log
Experiments/exp7-advance/TrafficLight_GreenFlash_BcdCnt/TrafficLight_GreenFlash_BcdCnt.sim/sim_1/behav/xsim/xvlog.pb
Experiments/exp7-perfect/SRC/readme.txt
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.cache/wt/gui_handlers.wdf
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.cache/wt/java_command_handlers.wdf
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.cache/wt/project.wpc
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.cache/wt/synthesis.wdf
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.cache/wt/synthesis_details.wdf
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.cache/wt/xsim.wdf
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.hw/TrafficLights_top.lpr
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.ip_user_files/README.txt
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/impl_1/.init_design.begin.rst
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/impl_1/.init_design.end.rst
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/impl_1/.opt_design.begin.rst
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/impl_1/.opt_design.end.rst
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/impl_1/.place_design.begin.rst
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/impl_1/.place_design.end.rst
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/impl_1/.route_design.begin.rst
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/impl_1/.route_design.end.rst
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/impl_1/.vivado.begin.rst
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/impl_1/.vivado.end.rst
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/impl_1/.Vivado_Implementation.queue.rst
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/impl_1/.write_bitstream.begin.rst
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/impl_1/.write_bitstream.end.rst
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/impl_1/htr.txt
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/impl_1/init_design.pb
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/impl_1/ISEWrap.js
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/impl_1/ISEWrap.sh
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/impl_1/opt_design.pb
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/impl_1/place_design.pb
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/impl_1/project.wdf
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/impl_1/route_design.pb
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/impl_1/rundef.js
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/impl_1/runme.bat
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/impl_1/runme.log
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/impl_1/runme.sh
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/impl_1/TrafficLight_GreenFlash_top.tcl
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/impl_1/TrafficLight_GreenFlash_top.vdi
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/impl_1/TrafficLight_GreenFlash_top_bus_skew_routed.pb
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/impl_1/TrafficLight_GreenFlash_top_bus_skew_routed.rpx
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/impl_1/TrafficLight_GreenFlash_top_drc_opted.pb
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/impl_1/TrafficLight_GreenFlash_top_drc_opted.rpx
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/impl_1/TrafficLight_GreenFlash_top_drc_routed.pb
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/impl_1/TrafficLight_GreenFlash_top_drc_routed.rpx
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/impl_1/TrafficLight_GreenFlash_top_methodology_drc_routed.pb
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/impl_1/TrafficLight_GreenFlash_top_methodology_drc_routed.rpx
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/impl_1/TrafficLight_GreenFlash_top_opt.dcp
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/impl_1/TrafficLight_GreenFlash_top_placed.dcp
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/impl_1/TrafficLight_GreenFlash_top_power_routed.rpx
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/impl_1/TrafficLight_GreenFlash_top_power_summary_routed.pb
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/impl_1/TrafficLight_GreenFlash_top_route_status.pb
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/impl_1/TrafficLight_GreenFlash_top_routed.dcp
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/impl_1/TrafficLight_GreenFlash_top_timing_summary_routed.pb
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/impl_1/TrafficLight_GreenFlash_top_timing_summary_routed.rpx
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/impl_1/TrafficLight_GreenFlash_top_utilization_placed.pb
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/impl_1/vivado.pb
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/impl_1/write_bitstream.pb
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/synth_1/.vivado.begin.rst
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/synth_1/.vivado.end.rst
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/synth_1/.Vivado_Synthesis.queue.rst
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/synth_1/htr.txt
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/synth_1/ISEWrap.js
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/synth_1/ISEWrap.sh
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/synth_1/rundef.js
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/synth_1/runme.bat
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/synth_1/runme.log
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/synth_1/runme.sh
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/synth_1/TrafficLight_GreenFlash_top.dcp
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/synth_1/TrafficLight_GreenFlash_top.tcl
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/synth_1/TrafficLight_GreenFlash_top.vds
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/synth_1/TrafficLight_GreenFlash_top_utilization_synth.pb
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.runs/synth_1/vivado.pb
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.sim/sim_1/behav/xsim/compile.bat
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.sim/sim_1/behav/xsim/compile.log
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.sim/sim_1/behav/xsim/elaborate.bat
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.sim/sim_1/behav/xsim/elaborate.log
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.sim/sim_1/behav/xsim/simulate.bat
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.sim/sim_1/behav/xsim/simulate.log
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.sim/sim_1/behav/xsim/TrafficLights_top_tb.tcl
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.sim/sim_1/behav/xsim/webtalk.jou
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.sim/sim_1/behav/xsim/webtalk.log
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.sim/sim_1/behav/xsim/webtalk_2520.backup.jou
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.sim/sim_1/behav/xsim/webtalk_2520.backup.log
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.sim/sim_1/behav/xsim/xelab.pb
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.sim/sim_1/behav/xsim/xsim.dir/TrafficLights_top_tb_behav/Compile_Options.txt
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.sim/sim_1/behav/xsim/xsim.dir/TrafficLights_top_tb_behav/TempBreakPointFile.txt
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.sim/sim_1/behav/xsim/xsim.dir/TrafficLights_top_tb_behav/webtalk/xsim_webtalk.tcl
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.sim/sim_1/behav/xsim/xsim.dir/TrafficLights_top_tb_behav/xsimcrash.log
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.sim/sim_1/behav/xsim/xsim.dir/TrafficLights_top_tb_behav/xsimkernel.log
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.sim/sim_1/behav/xsim/xvlog.log
Experiments/exp7-perfect/TrafficLights_top/TrafficLights_top.sim/sim_1/behav/xsim/xvlog.pb
Experiments/exp7/TrafficLights/TrafficLights.cache/wt/gui_handlers.wdf
Experiments/exp7/TrafficLights/TrafficLights.cache/wt/java_command_handlers.wdf
Experiments/exp7/TrafficLights/TrafficLights.cache/wt/project.wpc
Experiments/exp7/TrafficLights/TrafficLights.cache/wt/synthesis.wdf
Experiments/exp7/TrafficLights/TrafficLights.cache/wt/synthesis_details.wdf
Experiments/exp7/TrafficLights/TrafficLights.cache/wt/xsim.wdf
Experiments/exp7/TrafficLights/TrafficLights.hw/TrafficLights.lpr
Experiments/exp7/TrafficLights/TrafficLights.ip_user_files/README.txt
Experiments/exp7/TrafficLights/TrafficLights.runs/impl_1/.init_design.begin.rst
Experiments/exp7/TrafficLights/TrafficLights.runs/impl_1/.init_design.end.rst
Experiments/exp7/TrafficLights/TrafficLights.runs/impl_1/.opt_design.begin.rst
Experiments/exp7/TrafficLights/TrafficLights.runs/impl_1/.opt_design.end.rst
Experiments/exp7/TrafficLights/TrafficLights.runs/impl_1/.place_design.begin.rst
Experiments/exp7/TrafficLights/TrafficLights.runs/impl_1/.place_design.end.rst
Experiments/exp7/TrafficLights/TrafficLights.runs/impl_1/.route_design.begin.rst
Experiments/exp7/TrafficLights/TrafficLights.runs/impl_1/.route_design.end.rst
Experiments/exp7/TrafficLights/TrafficLights.runs/impl_1/.vivado.begin.rst
Experiments/exp7/TrafficLights/TrafficLights.runs/impl_1/.vivado.end.rst
Experiments/exp7/TrafficLights/TrafficLights.runs/impl_1/.Vivado_Implementation.queue.rst
Experiments/exp7/TrafficLights/TrafficLights.runs/impl_1/htr.txt
Experiments/exp7/TrafficLights/TrafficLights.runs/impl_1/init_design.pb
Experiments/exp7/TrafficLights/TrafficLights.runs/impl_1/ISEWrap.js
Experiments/exp7/TrafficLights/TrafficLights.runs/impl_1/ISEWrap.sh
Experiments/exp7/TrafficLights/TrafficLights.runs/impl_1/opt_design.pb
Experiments/exp7/TrafficLights/TrafficLights.runs/impl_1/place_design.pb
Experiments/exp7/TrafficLights/TrafficLights.runs/impl_1/project.wdf
Experiments/exp7/TrafficLights/TrafficLights.runs/impl_1/route_design.pb
Experiments/exp7/TrafficLights/TrafficLights.runs/impl_1/rundef.js
Experiments/exp7/TrafficLights/TrafficLights.runs/impl_1/runme.bat
Experiments/exp7/TrafficLights/TrafficLights.runs/impl_1/runme.log
Experiments/exp7/TrafficLights/TrafficLights.runs/impl_1/runme.sh
Experiments/exp7/TrafficLights/TrafficLights.runs/impl_1/TrafficLights_top.tcl
Experiments/exp7/TrafficLights/TrafficLights.runs/impl_1/TrafficLights_top.vdi
Experiments/exp7/TrafficLights/TrafficLights.runs/impl_1/TrafficLights_top_bus_skew_routed.pb
Experiments/exp7/TrafficLights/TrafficLights.runs/impl_1/TrafficLights_top_bus_skew_routed.rpx
Experiments/exp7/TrafficLights/TrafficLights.runs/impl_1/TrafficLights_top_drc_opted.pb
Experiments/exp7/TrafficLights/TrafficLights.runs/impl_1/TrafficLights_top_drc_opted.rpx
Experiments/exp7/TrafficLights/TrafficLights.runs/impl_1/TrafficLights_top_drc_routed.pb
Experiments/exp7/TrafficLights/TrafficLights.runs/impl_1/TrafficLights_top_drc_routed.rpx
Experiments/exp7/TrafficLights/TrafficLights.runs/impl_1/TrafficLights_top_methodology_drc_routed.pb
Experiments/exp7/TrafficLights/TrafficLights.runs/impl_1/TrafficLights_top_methodology_drc_routed.rpx
Experiments/exp7/TrafficLights/TrafficLights.runs/impl_1/TrafficLights_top_opt.dcp
Experiments/exp7/TrafficLights/TrafficLights.runs/impl_1/TrafficLights_top_placed.dcp
Experiments/exp7/TrafficLights/TrafficLights.runs/impl_1/TrafficLights_top_power_routed.rpx
Experiments/exp7/TrafficLights/TrafficLights.runs/impl_1/TrafficLights_top_power_summary_routed.pb
Experiments/exp7/TrafficLights/TrafficLights.runs/impl_1/TrafficLights_top_route_status.pb
Experiments/exp7/TrafficLights/TrafficLights.runs/impl_1/TrafficLights_top_routed.dcp
Experiments/exp7/TrafficLights/TrafficLights.runs/impl_1/TrafficLights_top_timing_summary_routed.pb
Experiments/exp7/TrafficLights/TrafficLights.runs/impl_1/TrafficLights_top_timing_summary_routed.rpx
Experiments/exp7/TrafficLights/TrafficLights.runs/impl_1/TrafficLights_top_utilization_placed.pb
Experiments/exp7/TrafficLights/TrafficLights.runs/impl_1/vivado.pb
Experiments/exp7/TrafficLights/TrafficLights.runs/synth_1/.vivado.begin.rst
Experiments/exp7/TrafficLights/TrafficLights.runs/synth_1/.vivado.end.rst
Experiments/exp7/TrafficLights/TrafficLights.runs/synth_1/.Vivado_Synthesis.queue.rst
Experiments/exp7/TrafficLights/TrafficLights.runs/synth_1/htr.txt
Experiments/exp7/TrafficLights/TrafficLights.runs/synth_1/ISEWrap.js
Experiments/exp7/TrafficLights/TrafficLights.runs/synth_1/ISEWrap.sh
Experiments/exp7/TrafficLights/TrafficLights.runs/synth_1/project.wdf
Experiments/exp7/TrafficLights/TrafficLights.runs/synth_1/rundef.js
Experiments/exp7/TrafficLights/TrafficLights.runs/synth_1/runme.bat
Experiments/exp7/TrafficLights/TrafficLights.runs/synth_1/runme.log
Experiments/exp7/TrafficLights/TrafficLights.runs/synth_1/runme.sh
Experiments/exp7/TrafficLights/TrafficLights.runs/synth_1/TrafficLights_top.dcp
Experiments/exp7/TrafficLights/TrafficLights.runs/synth_1/TrafficLights_top.tcl
Experiments/exp7/TrafficLights/TrafficLights.runs/synth_1/TrafficLights_top.vds
Experiments/exp7/TrafficLights/TrafficLights.runs/synth_1/TrafficLights_top_utilization_synth.pb
Experiments/exp7/TrafficLights/TrafficLights.runs/synth_1/vivado.pb
Experiments/exp7/TrafficLights/TrafficLights.sim/sim_1/behav/xsim/compile.bat
Experiments/exp7/TrafficLights/TrafficLights.sim/sim_1/behav/xsim/compile.log
Experiments/exp7/TrafficLights/TrafficLights.sim/sim_1/behav/xsim/elaborate.bat
Experiments/exp7/TrafficLights/TrafficLights.sim/sim_1/behav/xsim/elaborate.log
Experiments/exp7/TrafficLights/TrafficLights.sim/sim_1/behav/xsim/simulate.bat
Experiments/exp7/TrafficLights/TrafficLights.sim/sim_1/behav/xsim/simulate.log
Experiments/exp7/TrafficLights/TrafficLights.sim/sim_1/behav/xsim/tafficlights_top.tcl
Experiments/exp7/TrafficLights/TrafficLights.sim/sim_1/behav/xsim/TrafficLights_tb.tcl
Experiments/exp7/TrafficLights/TrafficLights.sim/sim_1/behav/xsim/webtalk.jou
Experiments/exp7/TrafficLights/TrafficLights.sim/sim_1/behav/xsim/webtalk.log
Experiments/exp7/TrafficLights/TrafficLights.sim/sim_1/behav/xsim/webtalk_13032.backup.jou
Experiments/exp7/TrafficLights/TrafficLights.sim/sim_1/behav/xsim/webtalk_13032.backup.log
Experiments/exp7/TrafficLights/TrafficLights.sim/sim_1/behav/xsim/webtalk_15788.backup.jou
Experiments/exp7/TrafficLights/TrafficLights.sim/sim_1/behav/xsim/webtalk_15788.backup.log
Experiments/exp7/TrafficLights/TrafficLights.sim/sim_1/behav/xsim/webtalk_16344.backup.jou
Experiments/exp7/TrafficLights/TrafficLights.sim/sim_1/behav/xsim/webtalk_16344.backup.log
Experiments/exp7/TrafficLights/TrafficLights.sim/sim_1/behav/xsim/webtalk_17312.backup.jou
Experiments/exp7/TrafficLights/TrafficLights.sim/sim_1/behav/xsim/webtalk_17312.backup.log
Experiments/exp7/TrafficLights/TrafficLights.sim/sim_1/behav/xsim/webtalk_17840.backup.jou
Experiments/exp7/TrafficLights/TrafficLights.sim/sim_1/behav/xsim/webtalk_17840.backup.log
Experiments/exp7/TrafficLights/TrafficLights.sim/sim_1/behav/xsim/xelab.pb
Experiments/exp7/TrafficLights/TrafficLights.sim/sim_1/behav/xsim/xsim.dir/tafficlights_top_behav/Compile_Options.txt
Experiments/exp7/TrafficLights/TrafficLights.sim/sim_1/behav/xsim/xsim.dir/tafficlights_top_behav/TempBreakPointFile.txt
Experiments/exp7/TrafficLights/TrafficLights.sim/sim_1/behav/xsim/xsim.dir/tafficlights_top_behav/webtalk/xsim_webtalk.tcl
Experiments/exp7/TrafficLights/TrafficLights.sim/sim_1/behav/xsim/xsim.dir/tafficlights_top_behav/xsimcrash.log
Experiments/exp7/TrafficLights/TrafficLights.sim/sim_1/behav/xsim/xsim.dir/tafficlights_top_behav/xsimkernel.log
Experiments/exp7/TrafficLights/TrafficLights.sim/sim_1/behav/xsim/xsim.dir/TrafficLights_tb_behav/Compile_Options.txt
Experiments/exp7/TrafficLights/TrafficLights.sim/sim_1/behav/xsim/xsim.dir/TrafficLights_tb_behav/TempBreakPointFile.txt
Experiments/exp7/TrafficLights/TrafficLights.sim/sim_1/behav/xsim/xsim.dir/TrafficLights_tb_behav/webtalk/xsim_webtalk.tcl
Experiments/exp7/TrafficLights/TrafficLights.sim/sim_1/behav/xsim/xsim.dir/TrafficLights_tb_behav/xsimcrash.log
Experiments/exp7/TrafficLights/TrafficLights.sim/sim_1/behav/xsim/xsim.dir/TrafficLights_tb_behav/xsimkernel.log
Experiments/exp7/TrafficLights/TrafficLights.sim/sim_1/behav/xsim/xvlog.log
Experiments/exp7/TrafficLights/TrafficLights.sim/sim_1/behav/xsim/xvlog.pb
Experiments/exp7/TrafficLights/vivado_15536.backup.jou
Experiments/exp7/TrafficLights/vivado_15536.backup.log
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.cache/wt/gui_handlers.wdf
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.cache/wt/java_command_handlers.wdf
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.cache/wt/project.wpc
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.cache/wt/synthesis.wdf
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.cache/wt/synthesis_details.wdf
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.cache/wt/xsim.wdf
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.hw/HMS_Clock.lpr
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.ip_user_files/README.txt
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/impl_1/.init_design.begin.rst
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/impl_1/.init_design.end.rst
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/impl_1/.opt_design.begin.rst
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/impl_1/.opt_design.end.rst
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/impl_1/.place_design.begin.rst
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/impl_1/.place_design.end.rst
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/impl_1/.route_design.begin.rst
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/impl_1/.route_design.end.rst
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/impl_1/.vivado.begin.rst
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/impl_1/.vivado.end.rst
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/impl_1/.Vivado_Implementation.queue.rst
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/impl_1/.write_bitstream.begin.rst
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/impl_1/.write_bitstream.end.rst
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/impl_1/htr.txt
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/impl_1/init_design.pb
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/impl_1/ISEWrap.js
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/impl_1/ISEWrap.sh
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/impl_1/opt_design.pb
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/impl_1/place_design.pb
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/impl_1/project.wdf
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/impl_1/route_design.pb
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/impl_1/rundef.js
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/impl_1/runme.bat
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/impl_1/runme.log
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/impl_1/runme.sh
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/impl_1/StopWatch_top.tcl
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/impl_1/StopWatch_top.vdi
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/impl_1/StopWatch_top_bus_skew_routed.pb
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/impl_1/StopWatch_top_bus_skew_routed.rpx
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/impl_1/StopWatch_top_drc_opted.pb
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/impl_1/StopWatch_top_drc_opted.rpx
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/impl_1/StopWatch_top_drc_routed.pb
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/impl_1/StopWatch_top_drc_routed.rpx
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/impl_1/StopWatch_top_methodology_drc_routed.pb
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/impl_1/StopWatch_top_methodology_drc_routed.rpx
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/impl_1/StopWatch_top_opt.dcp
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/impl_1/StopWatch_top_placed.dcp
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/impl_1/StopWatch_top_power_routed.rpx
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/impl_1/StopWatch_top_power_summary_routed.pb
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/impl_1/StopWatch_top_route_status.pb
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/impl_1/StopWatch_top_routed.dcp
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/impl_1/StopWatch_top_timing_summary_routed.pb
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/impl_1/StopWatch_top_timing_summary_routed.rpx
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/impl_1/StopWatch_top_utilization_placed.pb
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/impl_1/vivado.pb
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/impl_1/vivado_2080.backup.jou
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/impl_1/write_bitstream.pb
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/synth_1/.vivado.begin.rst
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/synth_1/.vivado.end.rst
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/synth_1/.Vivado_Synthesis.queue.rst
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/synth_1/htr.txt
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/synth_1/ISEWrap.js
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/synth_1/ISEWrap.sh
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/synth_1/rundef.js
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/synth_1/runme.bat
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/synth_1/runme.log
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/synth_1/runme.sh
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/synth_1/StopWatch_top.dcp
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/synth_1/StopWatch_top.tcl
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/synth_1/StopWatch_top.vds
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/synth_1/StopWatch_top_utilization_synth.pb
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.runs/synth_1/vivado.pb
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/behav/xsim/compile.bat
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/behav/xsim/compile.log
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/behav/xsim/elaborate.bat
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/behav/xsim/elaborate.log
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/behav/xsim/simulate.bat
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/behav/xsim/simulate.log
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/behav/xsim/StopWatch_top.tcl
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/behav/xsim/StopWatch_top_tb.tcl
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/behav/xsim/webtalk.jou
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/behav/xsim/webtalk.log
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/behav/xsim/webtalk_11820.backup.jou
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/behav/xsim/webtalk_11820.backup.log
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/behav/xsim/webtalk_12208.backup.jou
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/behav/xsim/webtalk_12208.backup.log
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/behav/xsim/webtalk_15380.backup.jou
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/behav/xsim/webtalk_15380.backup.log
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/behav/xsim/xelab.pb
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/behav/xsim/xsim.dir/StopWatch_top_behav/Compile_Options.txt
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/behav/xsim/xsim.dir/StopWatch_top_behav/TempBreakPointFile.txt
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/behav/xsim/xsim.dir/StopWatch_top_behav/xsimcrash.log
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/behav/xsim/xsim.dir/StopWatch_top_behav/xsimkernel.log
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/behav/xsim/xsim.dir/StopWatch_top_tb_behav/Compile_Options.txt
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/behav/xsim/xsim.dir/StopWatch_top_tb_behav/TempBreakPointFile.txt
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/behav/xsim/xsim.dir/StopWatch_top_tb_behav/xsimcrash.log
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/behav/xsim/xsim.dir/StopWatch_top_tb_behav/xsimkernel.log
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/behav/xsim/xvlog.log
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/behav/xsim/xvlog.pb
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/synth/timing/xsim/compile.bat
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/synth/timing/xsim/compile.log
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/synth/timing/xsim/elaborate.bat
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/synth/timing/xsim/elaborate.log
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/synth/timing/xsim/simulate.bat
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/synth/timing/xsim/simulate.log
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/synth/timing/xsim/StopWatch_top_tb.tcl
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/synth/timing/xsim/webtalk.jou
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/synth/timing/xsim/webtalk.log
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/synth/timing/xsim/webtalk_16204.backup.jou
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/synth/timing/xsim/webtalk_16204.backup.log
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/synth/timing/xsim/xelab.pb
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/synth/timing/xsim/xsim.dir/StopWatch_top_tb_time_synth/Compile_Options.txt
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/synth/timing/xsim/xsim.dir/StopWatch_top_tb_time_synth/TempBreakPointFile.txt
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/synth/timing/xsim/xsim.dir/StopWatch_top_tb_time_synth/xsimcrash.log
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/synth/timing/xsim/xsim.dir/StopWatch_top_tb_time_synth/xsimkernel.log
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/synth/timing/xsim/xvlog.log
Experiments/StopWatch_VerilogSource/HMS_Clock/HMS_Clock.sim/sim_1/synth/timing/xsim/xvlog.pb
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/IP/dds_Cosine/dds_Cosine.dcp
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/IP/dds_Cosine/dds_Cosine.veo
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/IP/dds_Cosine/dds_Cosine.vho
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/IP/dds_Cosine/dds_Cosine_ooc.xdc
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/IP/dds_Cosine/dds_Cosine_sim_netlist.v
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/IP/dds_Cosine/dds_Cosine_sim_netlist.vhdl
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/IP/dds_Cosine/dds_Cosine_stub.v
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/IP/dds_Cosine/dds_Cosine_stub.vhdl
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/IP/dds_Cosine/demo_tb/tb_dds_Cosine.vhd
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/IP/dds_Cosine/doc/dds_compiler_v6_0_changelog.txt
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/IP/dds_Cosine/hdl/axi_utils_v2_0_vh_rfs.vhd
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/IP/dds_Cosine/hdl/dds_compiler_v6_0_vh_rfs.vhd
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/IP/dds_Cosine/hdl/mult_gen_v12_0_vh_rfs.vhd
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/IP/dds_Cosine/hdl/xbip_bram18k_v3_0_vh_rfs.vhd
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/IP/dds_Cosine/hdl/xbip_dsp48_addsub_v3_0_vh_rfs.vhd
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/IP/dds_Cosine/hdl/xbip_dsp48_multadd_v3_0_vh_rfs.vhd
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/IP/dds_Cosine/hdl/xbip_dsp48_wrapper_v3_0_vh_rfs.vhd
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/IP/dds_Cosine/hdl/xbip_pipe_v3_0_vh_rfs.vhd
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/IP/dds_Cosine/hdl/xbip_utils_v3_0_vh_rfs.vhd
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/IP/dds_Cosine/sim/dds_Cosine.vhd
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/IP/dds_Cosine/synth/dds_Cosine.vhd
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.cache/ip/2019.1/93d4bdea559c43fc/93d4bdea559c43fc.xci
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.cache/ip/2019.1/93d4bdea559c43fc/dds_Cosine.dcp
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.cache/ip/2019.1/93d4bdea559c43fc/dds_Cosine_sim_netlist.v
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.cache/ip/2019.1/93d4bdea559c43fc/dds_Cosine_sim_netlist.vhdl
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.cache/ip/2019.1/93d4bdea559c43fc/dds_Cosine_stub.v
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.cache/ip/2019.1/93d4bdea559c43fc/dds_Cosine_stub.vhdl
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.cache/wt/gui_handlers.wdf
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.cache/wt/java_command_handlers.wdf
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.cache/wt/project.wpc
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.cache/wt/synthesis.wdf
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.cache/wt/synthesis_details.wdf
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.hw/SoundOut.lpr
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.ip_user_files/ip/dds_Cosine/dds_Cosine.veo
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.ip_user_files/ip/dds_Cosine/dds_Cosine.vho
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.ip_user_files/ip/dds_Cosine/dds_Cosine_stub.v
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.ip_user_files/ip/dds_Cosine/dds_Cosine_stub.vhdl
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.ip_user_files/ipstatic/hdl/axi_utils_v2_0_vh_rfs.vhd
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.ip_user_files/ipstatic/hdl/dds_compiler_v6_0_vh_rfs.vhd
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.ip_user_files/ipstatic/hdl/mult_gen_v12_0_vh_rfs.vhd
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.ip_user_files/ipstatic/hdl/xbip_bram18k_v3_0_vh_rfs.vhd
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.ip_user_files/ipstatic/hdl/xbip_dsp48_addsub_v3_0_vh_rfs.vhd
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.ip_user_files/ipstatic/hdl/xbip_dsp48_multadd_v3_0_vh_rfs.vhd
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.ip_user_files/ipstatic/hdl/xbip_dsp48_wrapper_v3_0_vh_rfs.vhd
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.ip_user_files/ipstatic/hdl/xbip_pipe_v3_0_vh_rfs.vhd
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.ip_user_files/ipstatic/hdl/xbip_utils_v3_0_vh_rfs.vhd
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.ip_user_files/README.txt
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.ip_user_files/sim_scripts/dds_Cosine/activehdl/dds_Cosine.sh
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.ip_user_files/sim_scripts/dds_Cosine/activehdl/dds_Cosine.udo
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.ip_user_files/sim_scripts/dds_Cosine/activehdl/file_info.txt
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.ip_user_files/sim_scripts/dds_Cosine/activehdl/README.txt
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.ip_user_files/sim_scripts/dds_Cosine/ies/dds_Cosine.sh
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.ip_user_files/sim_scripts/dds_Cosine/ies/file_info.txt
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.ip_user_files/sim_scripts/dds_Cosine/ies/README.txt
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.ip_user_files/sim_scripts/dds_Cosine/ies/run.f
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.ip_user_files/sim_scripts/dds_Cosine/modelsim/dds_Cosine.sh
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.ip_user_files/sim_scripts/dds_Cosine/modelsim/dds_Cosine.udo
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.ip_user_files/sim_scripts/dds_Cosine/modelsim/file_info.txt
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.ip_user_files/sim_scripts/dds_Cosine/modelsim/README.txt
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.ip_user_files/sim_scripts/dds_Cosine/questa/dds_Cosine.sh
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.ip_user_files/sim_scripts/dds_Cosine/questa/dds_Cosine.udo
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.ip_user_files/sim_scripts/dds_Cosine/questa/file_info.txt
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.ip_user_files/sim_scripts/dds_Cosine/questa/README.txt
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.ip_user_files/sim_scripts/dds_Cosine/README.txt
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.ip_user_files/sim_scripts/dds_Cosine/riviera/dds_Cosine.sh
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.ip_user_files/sim_scripts/dds_Cosine/riviera/dds_Cosine.udo
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.ip_user_files/sim_scripts/dds_Cosine/riviera/file_info.txt
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.ip_user_files/sim_scripts/dds_Cosine/riviera/README.txt
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.ip_user_files/sim_scripts/dds_Cosine/vcs/dds_Cosine.sh
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.ip_user_files/sim_scripts/dds_Cosine/vcs/file_info.txt
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.ip_user_files/sim_scripts/dds_Cosine/vcs/README.txt
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.ip_user_files/sim_scripts/dds_Cosine/xcelium/dds_Cosine.sh
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.ip_user_files/sim_scripts/dds_Cosine/xcelium/file_info.txt
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.ip_user_files/sim_scripts/dds_Cosine/xcelium/README.txt
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.ip_user_files/sim_scripts/dds_Cosine/xcelium/run.f
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.ip_user_files/sim_scripts/dds_Cosine/xsim/cmd.tcl
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.ip_user_files/sim_scripts/dds_Cosine/xsim/dds_Cosine.sh
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.ip_user_files/sim_scripts/dds_Cosine/xsim/elab.opt
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.ip_user_files/sim_scripts/dds_Cosine/xsim/file_info.txt
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.ip_user_files/sim_scripts/dds_Cosine/xsim/README.txt
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.ip_user_files/sim_scripts/dds_Cosine/xsim/vhdl.prj
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/dds_Cosine_synth_1/.vivado.begin.rst
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/dds_Cosine_synth_1/.vivado.end.rst
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/dds_Cosine_synth_1/.Vivado_Synthesis.queue.rst
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/dds_Cosine_synth_1/dds_Cosine.dcp
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/dds_Cosine_synth_1/dds_Cosine.tcl
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/dds_Cosine_synth_1/dds_Cosine.vds
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/dds_Cosine_synth_1/dds_Cosine_utilization_synth.pb
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/dds_Cosine_synth_1/dont_touch.xdc
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/dds_Cosine_synth_1/htr.txt
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/dds_Cosine_synth_1/ISEWrap.js
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/dds_Cosine_synth_1/ISEWrap.sh
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/dds_Cosine_synth_1/project.wdf
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/dds_Cosine_synth_1/rundef.js
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/dds_Cosine_synth_1/runme.bat
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/dds_Cosine_synth_1/runme.log
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/dds_Cosine_synth_1/runme.sh
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/dds_Cosine_synth_1/vivado.pb
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/impl_1/.init_design.begin.rst
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/impl_1/.init_design.end.rst
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/impl_1/.opt_design.begin.rst
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/impl_1/.opt_design.end.rst
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/impl_1/.place_design.begin.rst
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/impl_1/.place_design.end.rst
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/impl_1/.route_design.begin.rst
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/impl_1/.route_design.end.rst
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/impl_1/.vivado.begin.rst
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/impl_1/.vivado.end.rst
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/impl_1/.Vivado_Implementation.queue.rst
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/impl_1/.write_bitstream.begin.rst
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/impl_1/.write_bitstream.end.rst
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/impl_1/htr.txt
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/impl_1/init_design.pb
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/impl_1/ISEWrap.js
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/impl_1/ISEWrap.sh
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/impl_1/opt_design.pb
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/impl_1/place_design.pb
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/impl_1/project.wdf
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/impl_1/route_design.pb
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/impl_1/rundef.js
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/impl_1/runme.bat
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/impl_1/runme.log
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/impl_1/runme.sh
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/impl_1/SoundOut.bit
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/impl_1/SoundOut.tcl
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/impl_1/SoundOut.vdi
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/impl_1/SoundOut_bus_skew_routed.pb
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/impl_1/SoundOut_bus_skew_routed.rpx
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/impl_1/SoundOut_drc_opted.pb
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/impl_1/SoundOut_drc_opted.rpx
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/impl_1/SoundOut_drc_routed.pb
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EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/impl_1/SoundOut_methodology_drc_routed.pb
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/impl_1/SoundOut_methodology_drc_routed.rpx
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/impl_1/SoundOut_opt.dcp
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/impl_1/SoundOut_placed.dcp
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/impl_1/SoundOut_power_routed.rpx
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/impl_1/SoundOut_power_summary_routed.pb
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/impl_1/SoundOut_route_status.pb
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/impl_1/SoundOut_routed.dcp
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/impl_1/SoundOut_timing_summary_routed.pb
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/impl_1/SoundOut_timing_summary_routed.rpx
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/impl_1/SoundOut_utilization_placed.pb
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/impl_1/usage_statistics_webtalk.html
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/impl_1/vivado.pb
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/impl_1/write_bitstream.pb
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/synth_1/.vivado.begin.rst
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/synth_1/.vivado.end.rst
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/synth_1/.Vivado_Synthesis.queue.rst
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/synth_1/htr.txt
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/synth_1/ISEWrap.js
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/synth_1/ISEWrap.sh
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/synth_1/rundef.js
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/synth_1/runme.bat
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/synth_1/runme.log
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/synth_1/runme.sh
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/synth_1/SoundOut.dcp
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/synth_1/SoundOut.tcl
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/synth_1/SoundOut.vds
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/synth_1/SoundOut_utilization_synth.pb
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/synth_1/vivado.pb
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.xpr
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/MatLab/Interpolator.v
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.cache/wt/xsim.wdf
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.runs/impl_1/SoundOut.bin
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.sim/sim_1/behav/xsim/compile.bat
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.sim/sim_1/behav/xsim/compile.log
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.sim/sim_1/behav/xsim/elaborate.bat
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.sim/sim_1/behav/xsim/elaborate.log
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.sim/sim_1/behav/xsim/glbl.v
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.sim/sim_1/behav/xsim/simulate.bat
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.sim/sim_1/behav/xsim/simulate.log
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.sim/sim_1/behav/xsim/SoundOut_TB.tcl
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.sim/sim_1/behav/xsim/SoundOut_TB_behav.wdb
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.sim/sim_1/behav/xsim/SoundOut_TB_vhdl.prj
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.sim/sim_1/behav/xsim/SoundOut_TB_vlog.prj
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.sim/sim_1/behav/xsim/webtalk.jou
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.sim/sim_1/behav/xsim/webtalk.log
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.sim/sim_1/behav/xsim/webtalk_17336.backup.jou
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.sim/sim_1/behav/xsim/webtalk_17336.backup.log
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.sim/sim_1/behav/xsim/xelab.pb
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.sim/sim_1/behav/xsim/xsim.dir/SoundOut_TB_behav/Compile_Options.txt
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.sim/sim_1/behav/xsim/xsim.dir/SoundOut_TB_behav/obj/xsim_0.win64.obj
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.sim/sim_1/behav/xsim/xsim.dir/SoundOut_TB_behav/obj/xsim_1.win64.obj
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.sim/sim_1/behav/xsim/xsim.dir/SoundOut_TB_behav/obj/xsim_2.c
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.sim/sim_1/behav/xsim/xsim.dir/SoundOut_TB_behav/obj/xsim_2.win64.obj
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.sim/sim_1/behav/xsim/xsim.dir/SoundOut_TB_behav/TempBreakPointFile.txt
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.sim/sim_1/behav/xsim/xsim.dir/SoundOut_TB_behav/webtalk/.xsim_webtallk.info
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.sim/sim_1/behav/xsim/xsim.dir/SoundOut_TB_behav/webtalk/usage_statistics_ext_xsim.html
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.sim/sim_1/behav/xsim/xsim.dir/SoundOut_TB_behav/webtalk/usage_statistics_ext_xsim.wdm
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.sim/sim_1/behav/xsim/xsim.dir/SoundOut_TB_behav/webtalk/xsim_webtalk.tcl
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.sim/sim_1/behav/xsim/xsim.dir/SoundOut_TB_behav/xsim.dbg
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.sim/sim_1/behav/xsim/xsim.dir/SoundOut_TB_behav/xsim.mem
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.sim/sim_1/behav/xsim/xsim.dir/SoundOut_TB_behav/xsim.reloc
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.sim/sim_1/behav/xsim/xsim.dir/SoundOut_TB_behav/xsim.rlx
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.sim/sim_1/behav/xsim/xsim.dir/SoundOut_TB_behav/xsim.rtti
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.sim/sim_1/behav/xsim/xsim.dir/SoundOut_TB_behav/xsim.svtype
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.sim/sim_1/behav/xsim/xsim.dir/SoundOut_TB_behav/xsim.type
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.sim/sim_1/behav/xsim/xsim.dir/SoundOut_TB_behav/xsim.xdbg
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.sim/sim_1/behav/xsim/xsim.dir/SoundOut_TB_behav/xsimcrash.log
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.sim/sim_1/behav/xsim/xsim.dir/SoundOut_TB_behav/xsimk.exe
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.sim/sim_1/behav/xsim/xsim.dir/SoundOut_TB_behav/xsimkernel.log
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/data@split.sdb
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/dds_cosine.vdb
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/div@clk.sdb
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/filter.sdb
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/glbl.sdb
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/xil_defaultlib.rlx
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.sim/sim_1/behav/xsim/xvhdl.log
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.sim/sim_1/behav/xsim/xvhdl.pb
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.sim/sim_1/behav/xsim/xvlog.log
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.sim/sim_1/behav/xsim/xvlog.pb

EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.cache/wt/gui_handlers.wdf
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.cache/wt/java_command_handlers.wdf
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.cache/wt/project.wpc
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.cache/wt/synthesis.wdf
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.cache/wt/synthesis_details.wdf
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.hw/BacklightDimmer.lpr
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.hw/webtalk/.xsim_webtallk.info
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.hw/webtalk/labtool_webtalk.log
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.hw/webtalk/usage_statistics_ext_labtool.html
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/impl_1/.init_design.begin.rst
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/impl_1/.init_design.end.rst
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/impl_1/.opt_design.begin.rst
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/impl_1/.opt_design.end.rst
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/impl_1/.place_design.begin.rst
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/impl_1/.place_design.end.rst
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/impl_1/.route_design.begin.rst
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/impl_1/.route_design.end.rst
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/impl_1/.vivado.begin.rst
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/impl_1/.vivado.end.rst
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/impl_1/.Vivado_Implementation.queue.rst
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/impl_1/.write_bitstream.begin.rst
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/impl_1/.write_bitstream.end.rst
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/impl_1/BacklightDimmer.bit
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/impl_1/BacklightDimmer.tcl
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/impl_1/BacklightDimmer.vdi
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/impl_1/BacklightDimmer_3136.backup.vdi
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/impl_1/BacklightDimmer_bus_skew_routed.pb
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/impl_1/BacklightDimmer_bus_skew_routed.rpx
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/impl_1/BacklightDimmer_drc_opted.pb
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/impl_1/BacklightDimmer_drc_opted.rpx
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/impl_1/BacklightDimmer_drc_routed.pb
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/impl_1/BacklightDimmer_drc_routed.rpx
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/impl_1/BacklightDimmer_methodology_drc_routed.pb
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/impl_1/BacklightDimmer_methodology_drc_routed.rpx
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/impl_1/BacklightDimmer_opt.dcp
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/impl_1/BacklightDimmer_placed.dcp
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/impl_1/BacklightDimmer_power_routed.rpx
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/impl_1/BacklightDimmer_power_summary_routed.pb
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/impl_1/BacklightDimmer_route_status.pb
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/impl_1/BacklightDimmer_routed.dcp
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/impl_1/BacklightDimmer_timing_summary_routed.pb
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/impl_1/BacklightDimmer_timing_summary_routed.rpx
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/impl_1/BacklightDimmer_utilization_placed.pb
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/impl_1/htr.txt
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/impl_1/init_design.pb
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/impl_1/ISEWrap.js
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/impl_1/ISEWrap.sh
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/impl_1/opt_design.pb
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/impl_1/place_design.pb
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/impl_1/project.wdf
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/impl_1/route_design.pb
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/impl_1/rundef.js
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/impl_1/runme.bat
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/impl_1/runme.log
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/impl_1/runme.sh
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/impl_1/usage_statistics_webtalk.html
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/impl_1/vivado.pb
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/impl_1/vivado_14660.backup.jou
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/impl_1/vivado_3136.backup.jou
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/impl_1/write_bitstream.pb
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/synth_1/.vivado.begin.rst
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/synth_1/.vivado.end.rst
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/synth_1/.Vivado_Synthesis.queue.rst
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/synth_1/BacklightDimmer.dcp
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/synth_1/BacklightDimmer.tcl
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/synth_1/BacklightDimmer.vds
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/synth_1/BacklightDimmer_utilization_synth.pb
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/synth_1/htr.txt
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/synth_1/ISEWrap.js
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/synth_1/ISEWrap.sh
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/synth_1/rundef.js
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/synth_1/runme.bat
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/synth_1/runme.log
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/synth_1/runme.sh
EGO1_Lab/Lab10_BacklightDimmer/BacklightDimmer.runs/synth_1/vivado.pb
EGO1_Lab/Lab11_LedBreathing/LedBreathing.cache/wt/gui_handlers.wdf
EGO1_Lab/Lab11_LedBreathing/LedBreathing.cache/wt/java_command_handlers.wdf
EGO1_Lab/Lab11_LedBreathing/LedBreathing.cache/wt/project.wpc
EGO1_Lab/Lab11_LedBreathing/LedBreathing.cache/wt/synthesis.wdf
EGO1_Lab/Lab11_LedBreathing/LedBreathing.cache/wt/synthesis_details.wdf
EGO1_Lab/Lab11_LedBreathing/LedBreathing.hw/LedBreathing.lpr
EGO1_Lab/Lab11_LedBreathing/LedBreathing.hw/webtalk/.xsim_webtallk.info
EGO1_Lab/Lab11_LedBreathing/LedBreathing.hw/webtalk/labtool_webtalk.log
EGO1_Lab/Lab11_LedBreathing/LedBreathing.hw/webtalk/usage_statistics_ext_labtool.html
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/impl_1/.init_design.begin.rst
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/impl_1/.init_design.end.rst
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/impl_1/.opt_design.begin.rst
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/impl_1/.opt_design.end.rst
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/impl_1/.place_design.begin.rst
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/impl_1/.place_design.end.rst
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/impl_1/.route_design.begin.rst
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/impl_1/.route_design.end.rst
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/impl_1/.vivado.begin.rst
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/impl_1/.vivado.end.rst
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/impl_1/.Vivado_Implementation.queue.rst
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/impl_1/.write_bitstream.begin.rst
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/impl_1/.write_bitstream.end.rst
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/impl_1/htr.txt
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/impl_1/init_design.pb
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/impl_1/ISEWrap.js
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/impl_1/ISEWrap.sh
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/impl_1/LedBreathing.bit
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/impl_1/LedBreathing.tcl
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/impl_1/LedBreathing.vdi
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/impl_1/LedBreathing_bus_skew_routed.pb
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/impl_1/LedBreathing_bus_skew_routed.rpx
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/impl_1/LedBreathing_drc_opted.pb
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/impl_1/LedBreathing_drc_opted.rpx
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/impl_1/LedBreathing_drc_routed.pb
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/impl_1/LedBreathing_drc_routed.rpx
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/impl_1/LedBreathing_methodology_drc_routed.pb
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/impl_1/LedBreathing_methodology_drc_routed.rpx
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/impl_1/LedBreathing_opt.dcp
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/impl_1/LedBreathing_placed.dcp
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/impl_1/LedBreathing_power_routed.rpx
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/impl_1/LedBreathing_power_summary_routed.pb
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/impl_1/LedBreathing_route_status.pb
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/impl_1/LedBreathing_routed.dcp
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/impl_1/LedBreathing_timing_summary_routed.pb
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/impl_1/LedBreathing_timing_summary_routed.rpx
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/impl_1/LedBreathing_utilization_placed.pb
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/impl_1/opt_design.pb
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/impl_1/place_design.pb
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/impl_1/project.wdf
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/impl_1/route_design.pb
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/impl_1/rundef.js
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/impl_1/runme.bat
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/impl_1/runme.log
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/impl_1/runme.sh
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/impl_1/usage_statistics_webtalk.html
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/impl_1/vivado.pb
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/impl_1/write_bitstream.pb
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/synth_1/.vivado.begin.rst
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/synth_1/.vivado.end.rst
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/synth_1/.Vivado_Synthesis.queue.rst
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/synth_1/htr.txt
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/synth_1/ISEWrap.js
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/synth_1/ISEWrap.sh
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/synth_1/LedBreathing.dcp
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/synth_1/LedBreathing.tcl
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/synth_1/LedBreathing.vds
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/synth_1/LedBreathing_utilization_synth.pb
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/synth_1/rundef.js
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/synth_1/runme.bat
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/synth_1/runme.log
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/synth_1/runme.sh
EGO1_Lab/Lab11_LedBreathing/LedBreathing.runs/synth_1/vivado.pb
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.sim/sim_1/behav/xsim/webtalk_18628.backup.jou
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.sim/sim_1/behav/xsim/webtalk_18628.backup.log
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.sim/sim_1/behav/xsim/webtalk_3356.backup.jou
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.sim/sim_1/behav/xsim/webtalk_3356.backup.log
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.srcs/sources_1/bd/design_1/design_1.bd
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/work_Prj/SoundOut/SoundOut.srcs/sources_1/bd/design_1/design_1.bxml
CourseExample/PWM_Ctrl/PwmCtrl.cache/wt/gui_handlers.wdf
CourseExample/PWM_Ctrl/PwmCtrl.cache/wt/java_command_handlers.wdf
CourseExample/PWM_Ctrl/PwmCtrl.cache/wt/project.wpc
CourseExample/PWM_Ctrl/PwmCtrl.cache/wt/synthesis.wdf
CourseExample/PWM_Ctrl/PwmCtrl.cache/wt/xsim.wdf
CourseExample/PWM_Ctrl/PwmCtrl.hw/PwmCtrl.lpr
CourseExample/PWM_Ctrl/PwmCtrl.ip_user_files/README.txt
CourseExample/PWM_Ctrl/PwmCtrl.sim/sim_1/behav/xsim/compile.bat
CourseExample/PWM_Ctrl/PwmCtrl.sim/sim_1/behav/xsim/elaborate.bat
CourseExample/PWM_Ctrl/PwmCtrl.sim/sim_1/behav/xsim/elaborate.log
CourseExample/PWM_Ctrl/PwmCtrl.sim/sim_1/behav/xsim/glbl.v
CourseExample/PWM_Ctrl/PwmCtrl.sim/sim_1/behav/xsim/PWM_CTRL_tb.tcl
CourseExample/PWM_Ctrl/PwmCtrl.sim/sim_1/behav/xsim/PWM_CTRL_tb_behav.wdb
CourseExample/PWM_Ctrl/PwmCtrl.sim/sim_1/behav/xsim/PWM_CTRL_tb_vlog.prj
CourseExample/PWM_Ctrl/PwmCtrl.sim/sim_1/behav/xsim/simulate.bat
CourseExample/PWM_Ctrl/PwmCtrl.sim/sim_1/behav/xsim/simulate.log
CourseExample/PWM_Ctrl/PwmCtrl.sim/sim_1/behav/xsim/webtalk.jou
CourseExample/PWM_Ctrl/PwmCtrl.sim/sim_1/behav/xsim/webtalk.log
CourseExample/PWM_Ctrl/PwmCtrl.sim/sim_1/behav/xsim/webtalk_16908.backup.jou
CourseExample/PWM_Ctrl/PwmCtrl.sim/sim_1/behav/xsim/webtalk_16908.backup.log
CourseExample/PWM_Ctrl/PwmCtrl.sim/sim_1/behav/xsim/xelab.pb
CourseExample/PWM_Ctrl/PwmCtrl.sim/sim_1/behav/xsim/xsim.dir/PWM_CTRL_tb_behav/Compile_Options.txt
CourseExample/PWM_Ctrl/PwmCtrl.sim/sim_1/behav/xsim/xsim.dir/PWM_CTRL_tb_behav/obj/xsim_0.win64.obj
CourseExample/PWM_Ctrl/PwmCtrl.sim/sim_1/behav/xsim/xsim.dir/PWM_CTRL_tb_behav/obj/xsim_1.c
CourseExample/PWM_Ctrl/PwmCtrl.sim/sim_1/behav/xsim/xsim.dir/PWM_CTRL_tb_behav/obj/xsim_1.win64.obj
CourseExample/PWM_Ctrl/PwmCtrl.sim/sim_1/behav/xsim/xsim.dir/PWM_CTRL_tb_behav/TempBreakPointFile.txt
CourseExample/PWM_Ctrl/PwmCtrl.sim/sim_1/behav/xsim/xsim.dir/PWM_CTRL_tb_behav/webtalk/.xsim_webtallk.info
CourseExample/PWM_Ctrl/PwmCtrl.sim/sim_1/behav/xsim/xsim.dir/PWM_CTRL_tb_behav/webtalk/usage_statistics_ext_xsim.html
CourseExample/PWM_Ctrl/PwmCtrl.sim/sim_1/behav/xsim/xsim.dir/PWM_CTRL_tb_behav/webtalk/usage_statistics_ext_xsim.wdm
CourseExample/PWM_Ctrl/PwmCtrl.sim/sim_1/behav/xsim/xsim.dir/PWM_CTRL_tb_behav/webtalk/xsim_webtalk.tcl
CourseExample/PWM_Ctrl/PwmCtrl.sim/sim_1/behav/xsim/xsim.dir/PWM_CTRL_tb_behav/xsim.dbg
CourseExample/PWM_Ctrl/PwmCtrl.sim/sim_1/behav/xsim/xsim.dir/PWM_CTRL_tb_behav/xsim.mem
CourseExample/PWM_Ctrl/PwmCtrl.sim/sim_1/behav/xsim/xsim.dir/PWM_CTRL_tb_behav/xsim.reloc
CourseExample/PWM_Ctrl/PwmCtrl.sim/sim_1/behav/xsim/xsim.dir/PWM_CTRL_tb_behav/xsim.rlx
CourseExample/PWM_Ctrl/PwmCtrl.sim/sim_1/behav/xsim/xsim.dir/PWM_CTRL_tb_behav/xsim.rtti
CourseExample/PWM_Ctrl/PwmCtrl.sim/sim_1/behav/xsim/xsim.dir/PWM_CTRL_tb_behav/xsim.svtype
CourseExample/PWM_Ctrl/PwmCtrl.sim/sim_1/behav/xsim/xsim.dir/PWM_CTRL_tb_behav/xsim.type
CourseExample/PWM_Ctrl/PwmCtrl.sim/sim_1/behav/xsim/xsim.dir/PWM_CTRL_tb_behav/xsim.xdbg
CourseExample/PWM_Ctrl/PwmCtrl.sim/sim_1/behav/xsim/xsim.dir/PWM_CTRL_tb_behav/xsimcrash.log
CourseExample/PWM_Ctrl/PwmCtrl.sim/sim_1/behav/xsim/xsim.dir/PWM_CTRL_tb_behav/xsimk.exe
CourseExample/PWM_Ctrl/PwmCtrl.sim/sim_1/behav/xsim/xsim.dir/PWM_CTRL_tb_behav/xsimkernel.log
CourseExample/PWM_Ctrl/PwmCtrl.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/glbl.sdb
CourseExample/PWM_Ctrl/PwmCtrl.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/xil_defaultlib.rlx
CourseExample/PWM_Ctrl/PwmCtrl.sim/sim_1/behav/xsim/xvlog.log
CourseExample/PWM_Ctrl/PwmCtrl.sim/sim_1/behav/xsim/xvlog.pb
CourseExample/PWM_Ctrl/PwmCtrl.srcs/sources_1/bd/design_1/design_1.bd
CourseExample/PWM_Ctrl/PwmCtrl.srcs/sources_1/bd/design_1/design_1.bxml
CourseExample/PWM_Ctrl/PwmCtrl.sim/sim_1/behav/xsim/compile.log
CourseExample/PWM_Ctrl/PwmCtrl.sim/sim_1/behav/xsim/webtalk_16564.backup.jou
CourseExample/PWM_Ctrl/PwmCtrl.sim/sim_1/behav/xsim/webtalk_16564.backup.log
CourseExample/PWM_Ctrl/PwmCtrl.sim/sim_1/behav/xsim/webtalk_17064.backup.jou
CourseExample/PWM_Ctrl/PwmCtrl.sim/sim_1/behav/xsim/webtalk_17064.backup.log
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.cache/wt/gui_handlers.wdf
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.cache/wt/java_command_handlers.wdf
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.cache/wt/project.wpc
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.cache/wt/synthesis.wdf
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.cache/wt/synthesis_details.wdf
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.hw/KeyCounter_top.lpr
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.hw/webtalk/.xsim_webtallk.info
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.hw/webtalk/labtool_webtalk.log
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.hw/webtalk/usage_statistics_ext_labtool.html
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/impl_1/.init_design.begin.rst
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/impl_1/.init_design.end.rst
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/impl_1/.opt_design.begin.rst
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/impl_1/.opt_design.end.rst
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/impl_1/.place_design.begin.rst
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/impl_1/.place_design.end.rst
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/impl_1/.route_design.begin.rst
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/impl_1/.route_design.end.rst
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/impl_1/.vivado.begin.rst
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/impl_1/.vivado.end.rst
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/impl_1/.Vivado_Implementation.queue.rst
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/impl_1/.write_bitstream.begin.rst
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/impl_1/.write_bitstream.end.rst
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/impl_1/htr.txt
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/impl_1/init_design.pb
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/impl_1/ISEWrap.js
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/impl_1/ISEWrap.sh
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/impl_1/KeyCounter_top.bit
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/impl_1/KeyCounter_top.tcl
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/impl_1/KeyCounter_top.vdi
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/impl_1/KeyCounter_top_bus_skew_routed.pb
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/impl_1/KeyCounter_top_bus_skew_routed.rpx
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/impl_1/KeyCounter_top_drc_opted.pb
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/impl_1/KeyCounter_top_drc_opted.rpx
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/impl_1/KeyCounter_top_drc_routed.pb
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/impl_1/KeyCounter_top_drc_routed.rpx
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/impl_1/KeyCounter_top_methodology_drc_routed.pb
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/impl_1/KeyCounter_top_methodology_drc_routed.rpx
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/impl_1/KeyCounter_top_opt.dcp
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/impl_1/KeyCounter_top_placed.dcp
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/impl_1/KeyCounter_top_power_routed.rpx
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/impl_1/KeyCounter_top_power_summary_routed.pb
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/impl_1/KeyCounter_top_route_status.pb
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/impl_1/KeyCounter_top_routed.dcp
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/impl_1/KeyCounter_top_timing_summary_routed.pb
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/impl_1/KeyCounter_top_timing_summary_routed.rpx
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/impl_1/KeyCounter_top_utilization_placed.pb
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/impl_1/opt_design.pb
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/impl_1/place_design.pb
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/impl_1/project.wdf
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/impl_1/route_design.pb
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/impl_1/rundef.js
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/impl_1/runme.bat
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/impl_1/runme.log
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/impl_1/runme.sh
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/impl_1/usage_statistics_webtalk.html
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/impl_1/vivado.pb
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/impl_1/write_bitstream.pb
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/synth_1/.vivado.begin.rst
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/synth_1/.vivado.end.rst
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/synth_1/.Vivado_Synthesis.queue.rst
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/synth_1/htr.txt
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/synth_1/ISEWrap.js
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/synth_1/ISEWrap.sh
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/synth_1/KeyCounter_top.dcp
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/synth_1/KeyCounter_top.tcl
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/synth_1/KeyCounter_top.vds
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/synth_1/KeyCounter_top_utilization_synth.pb
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/synth_1/rundef.js
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/synth_1/runme.bat
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/synth_1/runme.log
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/synth_1/runme.sh
EGO1_Lab/KeyCounter.VerilogSrc/prj/KeyCounter_top.runs/synth_1/vivado.pb
CourseExample/PWM_Ctrl/SRC/PWM_CTRL_tb~.v
EGO1_Lab/KeyCounter.VerilogSrc.rar
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/MatLab/power_brushlessDCmotor.slxc
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/MatLab/slprj/sim/varcache/power_brushlessDCmotor/checksumOfCache.mat
EGO1_Lab/Lab9_Soundout/SoundOut_Tcl/MatLab/slprj/sim/varcache/power_brushlessDCmotor/varInfo.mat
Experiments/exp1/WaterFlowLed/WaterFlowLed.cache/wt/gui_handlers.wdf
Experiments/exp1/WaterFlowLed/WaterFlowLed.cache/wt/java_command_handlers.wdf
Experiments/exp1/WaterFlowLed/WaterFlowLed.cache/wt/project.wpc
Experiments/exp1/WaterFlowLed/WaterFlowLed.cache/wt/synthesis.wdf
Experiments/exp1/WaterFlowLed/WaterFlowLed.cache/wt/synthesis_details.wdf
Experiments/exp1/WaterFlowLed/WaterFlowLed.hw/WaterFlowLed.lpr
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/impl_1/.init_design.begin.rst
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/impl_1/.init_design.end.rst
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/impl_1/.opt_design.begin.rst
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/impl_1/.opt_design.end.rst
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/impl_1/.place_design.begin.rst
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/impl_1/.place_design.end.rst
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/impl_1/.route_design.begin.rst
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/impl_1/.route_design.end.rst
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/impl_1/.vivado.begin.rst
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/impl_1/.vivado.end.rst
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/impl_1/.Vivado_Implementation.queue.rst
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/impl_1/.write_bitstream.begin.rst
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/impl_1/.write_bitstream.end.rst
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/impl_1/htr.txt
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/impl_1/init_design.pb
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/impl_1/ISEWrap.js
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/impl_1/ISEWrap.sh
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/impl_1/opt_design.pb
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/impl_1/place_design.pb
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/impl_1/project.wdf
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/impl_1/route_design.pb
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/impl_1/rundef.js
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/impl_1/runme.bat
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/impl_1/runme.log
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/impl_1/runme.sh
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/impl_1/testLed_top.bit
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/impl_1/testLed_top.tcl
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/impl_1/testLed_top.vdi
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/impl_1/testLed_top_bus_skew_routed.pb
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/impl_1/testLed_top_bus_skew_routed.rpx
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/impl_1/testLed_top_drc_opted.pb
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/impl_1/testLed_top_drc_opted.rpx
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/impl_1/testLed_top_drc_routed.pb
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/impl_1/testLed_top_drc_routed.rpx
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/impl_1/testLed_top_methodology_drc_routed.pb
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/impl_1/testLed_top_methodology_drc_routed.rpx
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/impl_1/testLed_top_opt.dcp
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/impl_1/testLed_top_placed.dcp
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/impl_1/testLed_top_power_routed.rpx
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/impl_1/testLed_top_power_summary_routed.pb
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/impl_1/testLed_top_route_status.pb
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/impl_1/testLed_top_routed.dcp
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/impl_1/testLed_top_timing_summary_routed.pb
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/impl_1/testLed_top_timing_summary_routed.rpx
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/impl_1/testLed_top_utilization_placed.pb
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/impl_1/usage_statistics_webtalk.html
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/impl_1/vivado.pb
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/impl_1/write_bitstream.pb
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/synth_1/.vivado.begin.rst
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/synth_1/.vivado.end.rst
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/synth_1/.Vivado_Synthesis.queue.rst
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/synth_1/htr.txt
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/synth_1/ISEWrap.js
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/synth_1/ISEWrap.sh
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/synth_1/rundef.js
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/synth_1/runme.bat
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/synth_1/runme.log
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/synth_1/runme.sh
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/synth_1/testLed_top.dcp
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/synth_1/testLed_top.tcl
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/synth_1/testLed_top.vds
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/synth_1/testLed_top_utilization_synth.pb
Experiments/exp1/WaterFlowLed/WaterFlowLed.runs/synth_1/vivado.pb