RV与芯片评论.20201219.第21期.md · 浪潮RISC-V研究小组/RVWeekly

# RV与芯片评论.20201219.第21期

本期概要

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# 重点聚焦

"[2020 RISC-V峰会：队伍壮大，前景光明 ](http://news.eeworld.com.cn/qrs/ic519865.html
)(From news.eeworld.com.cn 2020.12.19)"

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### 相关周报

- ![image.png](https://cdn.nlark.com/yuque/0/2020/png/1541992/1599307696075-3f44fb1b-f362-4130-a254-b3e4fb6cebac.png#align=left&display=inline&height=24&margin=%5Bobject%20Object%5D&name=image.png&originHeight=84&originWidth=89&size=7408&status=done&style=none&width=25)[semi engineering](https://semiengineering.com/) Week In Review: ：
   - [Blog Review](https://semiengineering.com/blog-review-dec-16-2/) DEC16：
   - [Design, Low Power](https://semiengineering.com/week-in-review-design-low-power-125/) DEC18：
   - [Manufacturing, Test](https://semiengineering.com/week-in-review-manufacturing-test-127/) DEC18：SMIC shakeup; auto IC shortages; 3D NAND metrology; wafer cleaning.
   - [Auto, Security, Pervasive Computing](https://semiengineering.com/week-in-review-auto-security-pervasive-computing-46/) DEC18：Zoox robotaxi; Telechips automotive SoCs with ARM; hackers’ global attacks; blacklists.
- [IoT News](https://staceyoniot.com/): 
- [OSDT Weekly](https://github.com/hellogcc/osdt-weekly/tree/master/weekly)：[https://github.com/hellogcc/osdt-weekly/blob/master/weekly/2020-12-23.md](https://github.com/hellogcc/osdt-weekly/blob/master/weekly/2020-12-23.md)
- [泰晓咨询](http://tinylab.org/)：[http://tinylab.org/tinylab-weekly-12-3rd-2020/](http://tinylab.org/tinylab-weekly-12-3rd-2020/)
- [PLCT开源进展](https://www.zhihu.com/column/plct-lab)：[Github](https://github.com/isrc-cas/PLCT-Weekly):"[第15期·2020年12月16日 ](https://github.com/isrc-cas/PLCT-Weekly/blob/master/2020-12-16.md
)(From github.com 2020.12.19)"
- [RT-Thread](https://my.oschina.net/u/4428324)：
- ："[失业难以避免，重构人生规划 ](https://www.yuque.com/ruanyf/weekly/issue-138
)(From www.yuque.com 2020.12.19)"

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# 技术动态

- "[俄罗斯Milandr公司利用RISC-V开发第二代控制器 ](https://jishu.chaic.com/show-9607.html
)(From jishu.chaic.com 2020.12.19)"
- "[系统级芯片(SoC)的复杂设计选择：RISC-V处理器内核 ](https://www.eet-china.com/news/10393.html
)(From www.eet-china.com 2020.12.19)"
- "[AOSP-RISCV 的开源仓库在 Gitee 上新建了镜像 ](https://zhuanlan.zhihu.com/p/337032693
)(From zhuanlan.zhihu.com 2020.12.19)"
- "[赛昉科技亮相2020 ICCAD，发布全球性能最高的基于RISC-V的处理器内核–天枢系列处理器... ](https://www.china-riscv.com/read.php?tid=607&fid=45
)(From www.china-riscv.com 2020.12.19)"
- "[希捷发布RISC-V处理器 已在机械硬盘中进行测试 ](http://smart.kjw.cc/znpd/2020/1217/24565.html
)(From smart.kjw.cc 2020.12.19)"
- "[第十届吴文俊人工智能专项奖芯片项目出炉：云天励飞、地平线获一等奖 ](https://www.sohu.com/a/438378890_166680
)(From www.sohu.com 2020.12.19)"
- "[RT-Thread Studio v2.0 大版本发布，支持 RISC-V 的国产集成开发环境 ](https://www.oschina.net/news/123571/rt-thread-studio-2-0-released
)(From www.oschina.net 2020.12.19)"
- "[RISC-V 研讨会上再现两名 12 岁小男孩 ](https://www.oschina.net/news/123583/risc-v-microarchitecture-for-kids
)(From www.oschina.net 2020.12.19)"
- "[芯来助力CMSemicon发布首款集成RISC-V内核的32位微控制器 ](https://www.riscv-mcu.com/article-show-id-533.html
)(From www.riscv-mcu.com 2020.12.19)"
- "[晶心RISC-V向量处理器核心NX27V荣获竹科创新产品奖 ](https://www.21ic.com/article/882939.html
)(From www.21ic.com 2020.12.19)"
 - "[晶心科RISC-V产品 获颁“新竹科学园区优良厂商创新产品奖” ](https://6do.news/article/3494655-41
)(From 6do.news 2020.12.19)"
- "[上海赛昉科技发布高性能处理器　“中国芯”研发迈出关键一步 ](https://www.dwnews.com/%E4%B8%AD%E5%9B%BD/60222271/%E4%B8%8A%E6%B5%B7%E8%B5%9B%E6%98%89%E7%A7%91%E6%8A%80%E5%8F%91%E5%B8%83%E9%AB%98%E6%80%A7%E8%83%BD%E5%A4%84%E7%90%86%E5%99%A8%E4%B8%AD%E5%9B%BD%E8%8A%AF%E7%A0%94%E5%8F%91%E8%BF%88%E5%87%BA%E5%85%B3%E9%94%AE%E4%B8%80%E6%AD%A5
)(From www.dwnews.com 2020.12.19)"
- "[openEuler暴走,开源走出“现实主义”道路? ](https://www.ofweek.com/ai/2020-12/ART-201721-8460-30474385.html
)(From www.ofweek.com 2020.12.19)"
- "[Maxim Integrated新型神经网络加速器MAX78000 SoC在贸泽开售 ](https://finance.sina.com.cn/tech/2020-12-11/doc-iiznezxs6318206.shtml
)(From finance.sina.com.cn 2020.12.19)"
- "[瑞萨电子推出IP Utilities，强化IP授权业务，助力芯片开发 ](https://finance.sina.com.cn/tech/2020-12-11/doc-iiznctke5983314.shtml
)(From finance.sina.com.cn 2020.12.19)"
- "[中科蓝讯将首度面向通用市场发布其自主RISC-V内核MCU芯片 ](https://www.reddit.com/r/RISCV/comments/kalyv3/%E4%B8%AD%E7%A7%91%E8%93%9D%E8%AE%AF%E5%B0%86%E9%A6%96%E5%BA%A6%E9%9D%A2%E5%90%91%E9%80%9A%E7%94%A8%E5%B8%82%E5%9C%BA%E5%8F%91%E5%B8%83%E5%85%B6%E8%87%AA%E4%B8%BBriscv%E5%86%85%E6%A0%B8mcu%E8%8A%AF%E7%89%87/
)(From www.reddit.com 2020.12.19)"
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### Linux动态

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### QEMU动态
"[QEMU 5.2 稳定版发布：改进对 RISC-V 的支持 ](https://www.oschina.net/news/123465/qemu-5-2-released
)(From www.oschina.net 2020.12.19)"
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### 一周问答

- "[从技术的角度来看，RISC-V 能对芯片发展、科技自主起到哪些作用？ ](https://www.zhihu.com/question/425542531/answer/1622734286
)(From www.zhihu.com 2020.12.19)"
- "[Apple为何选择ARM架构，而不是RISC-V？ ](https://www.zhihu.com/question/434679397/answer/1629074985
)(From www.zhihu.com 2020.12.19)"
- "[[RISC-V MCU 应用开发] 请问MounRiver Studio仿真下载速度慢如何解决 ](https://bbs.21ic.com/icview-3057154-1-1.html
)(From bbs.21ic.com 2020.12.19)"
- "[RISC-V问答 ](http://www.takungpao.com/news/232108/2020/1212/530967.html
)(From www.takungpao.com 2020.12.19)"
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### 社区动态
"[讲座预告 | 处理器芯片发展新趋势：开源芯片 ](https://sse.cuhk.edu.cn/event/800
)(From sse.cuhk.edu.cn 2020.12.19)"

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# 产业风云

- "[ Qzone 微博 微信 中国联通唐雄燕：运营商第二次转型已开启 业务创新与生态共建将成为关键 ](https://news.tom.com/202012/1319205462.html
)(From news.tom.com 2020.12.19)"
- "[ARM授权费用太贵，科技巨头欲转向开源架构RISC-V_大发体育 ](http://tragwag.com/lieqiguaishi/1317.html
)(From tragwag.com 2020.12.19)"
- "[物联网2020十大关键词：脚踏实地，开创2021新篇章 ](https://mp.ofweek.com/iot/a256714347087
)(From mp.ofweek.com 2020.12.19)"
- "[主频达5GHz的64位RISC-V处理器是如何炼成的？ ](http://m.chinaaet.com/article/3000126608
)(From m.chinaaet.com 2020.12.19)"
- "[芯片产能不足消费需求疲软 智能家居市场第三季度出货量下滑 ](http://finance.eastmoney.com/a/202012151738200425.html
)(From finance.eastmoney.com 2020.12.19)"
- "[“顺德芯”进国家电网内测，世界级开源芯片基地迎新进展 ](http://pc.nfapp.southcn.com/2329/4443713.html
)(From pc.nfapp.southcn.com 2020.12.19)"
- "[2021年电子行业策略报告：电子产业创新与格局重构 ](https://stock.stockstar.com/SS2020121500000901.shtml
)(From stock.stockstar.com 2020.12.19)"
- "[Arm助力客户自研芯片 英特尔霸主地位难保？ ](http://www.52rd.com/S_TXT/2020_12/TXT123708.HTM
)(From www.52rd.com 2020.12.19)"
- "[【中国IC风云榜最具成长潜力公司候选6】芯来科技：全自主研发领跑RISC-V赛道 ](https://xueqiu.com/9983210953/165650325
)(From xueqiu.com 2020.12.19)"
- "[国内家电行业芯片市场约500亿元 本土化配套率仅5% ](https://www.yicai.com/news/100873677.html
)(From www.yicai.com 2020.12.19)"
- "[格兰仕顺德总部计划再追加招聘5000人 ](http://it.people.com.cn/n1/2020/1210/c1009-31962144.html
)(From it.people.com.cn 2020.12.19)"
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### 评论文集

- "[ARM能在RISC-V挑战下生还吗？RISC-V高管：活不过5年了 ](https://blog.51cto.com/15057820/2566498
)(From blog.51cto.com 2020.12.19)"
- "[嘉楠科技张楠赓：止步于销售吃不到太多行业红利，挖矿业务也是计划内的事儿丨超级观点 ](https://36kr.com/p/1014240856470657
)(From 36kr.com 2020.12.19)"
- "[张先轶博士：为什么RISC-V需要共建软件生态? ](https://blog.csdn.net/weixin_45571628/article/details/111242925
)(From blog.csdn.net 2020.12.19)"
- "[RISC-V国际基金会董事谭章熹：中国发展半导体最缺的是人才 ](https://news.caijingmobile.com/article/detail/427155?source_id=40
)(From news.caijingmobile.com 2020.12.19)"
- "[前有ARM，后有RISC-V，intel腹背受敌  ](https://www.sohu.com/a/437574578_436214
)(From www.sohu.com 2020.12.19)"

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# 其他动态

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### 项目推荐

- [lingscale](https://github.com/lingscale)/[cc01](https://github.com/lingscale/cc01) 用Chisel写的开源处理器，实现RV32I指令
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### 博文推荐

- "[计算机组成与设计(硬件/软件接口)RISC-V版笔记 ](https://blog.csdn.net/weixin_43233994/article/details/111353953
)(From blog.csdn.net 2020.12.19)"
- "[verilog和chisel描述D触发器比较 ](http://www.riscv.cn/d/15-verilogchiseld
)(From www.riscv.cn 2020.12.19)"
- "[ 在K210上使用wifi联网  ](https://whycan.com/t_5709.html
)(From whycan.com 2020.12.19)"
- "[RISC-V 嵌入式 Rust 快速入门，基于 Renode 模拟器和 HiFive1 开发板 ](https://blog.csdn.net/zoomdy/article/details/106669569
)(From blog.csdn.net 2020.12.19)"
- "[[RISC-V MCU 应用开发] 【RISC-V MCU CH32V103测评】05：硬件IIC读写EEPROM测试 ](https://bbs.21ic.com/icview-3056112-1-1.html
)(From bbs.21ic.com 2020.12.19)"
- "[[RISC-V MCU 应用开发] [RISC-V MCU 应用开发] 【RISC-V MCU CH32V103测评】+墨水屏前奏 ](https://bbs.21ic.com/icview-3055952-1-1.html
)(From bbs.21ic.com 2020.12.19)"
- "[科普文章：到底什么是RISC-V ](http://news.eeworld.com.cn/manufacture/ic519343_2.html
)(From news.eeworld.com.cn 2020.12.19)"

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# 一周论文 
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### **[PDF]** [Mutation-based Compliance Testing for **RISC**-**V**](http://www.informatik.uni-bremen.de/agra/doc/konf/ASP-DAC-2021_Mutation_based_Compliance_Testing.pdf)
V Herdt, S Tempel, D Große, R Drechsler Compliance testing for **RISC**-**V **is very important. Essentially, it ensures that compatibility is maintained between **RISC**-**V **implementations and the ever growing **RISC**-**V **ecosystem. Therefore, an official Compliance Test-suite (CT) is being …
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### [Sémantique formelle d'une infrastructure de compilation matériel](https://www.theses.fr/s259971)
SA Bensaid … Le développement du jeu d'instruction **RISC**-**V** est supporté par la conception et l'utilisation de nouvelles méthodes et outils dédiés à l'augmentation du niveau de productivité de la conception d'architectures matérielles (ie …
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### **[PDF]** [Modeling, implementation, and analysis of XRCE-DDS applications in distributed multi-processor real-time embedded systems](https://www.researchgate.net/profile/Saeid_Dehnavi/publication/346917568_Modeling_implementation_and_analysis_of_XRCE-DDS_applications_in_distributed_multi-processor_real-time_embedded_systems/links/5fd207d492851c00f86301cd/Modeling-implementation-and-analysis-of-XRCE-DDS-applications-in-distributed-multi-processor-real-time-embedded-systems.pdf)
S Dehnavi, D Goswami, M Koedam, A Nelson… … board. The Client is implemented on a hard real-time **RISC**-**V** pro- cessor, while the Agent runs on a soft real-time ARM processor. Multiple **RISC**-**V** processors run in parallel and each processor runs multiple Clients. (Section …
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### **[PDF]** [DiAG: A Dataflow-inspired Architecture for General-purpose Processors](https://asplos-conference.org/abstracts/asplos21-paper101-extended_abstract.pdf)
DK Wang, NS Kim … DiAG processors are plug-and-play: they can support existing ISAs (we use **RISC**-**V**) without requir- ing special extensions, compilers, or libraries … 4. Main Artifacts We implement a DiAG processor prototype that supports …
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### **[PDF]** [Source Code Classification for Energy Efficiency in Parallel Ultra Low-Power Microcontrollers](https://arxiv.org/pdf/2012.06836)
E Parisi, F Barchi, A Bartolini, G Tagliavini, A Acquaviva - arXiv preprint arXiv …, 2020 … OpenCL kernel on multicore CPU or GPU), in this work we focus on static compile-time features to assess if they can be successfully used to predict the minimum energy configuration on PULP, an ultra-low-power architecture …
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### **[PDF]** [CrypTag: Thwarting Physical and Logical Memory Vulnerabilities using Cryptographically Colored Memory](https://arxiv.org/pdf/2012.06761)
P Nasahl, R Schilling, M Werner, J Hoogerbrugge… - arXiv preprint arXiv …, 2020 … compatible. For evaluating the design, we extended a **RISC**-**V** processor with memory encryption with CrypTag. Furthermore … safety. To evaluate our concept, we implemented an FPGA pro- totype based on the **RISC**-**V** CVA6 core. Furthermore …
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### **[PDF]** [4. Essay from the Thinker:'Societal Values in Digital Innova-tion–A Technologist's Perspective'](https://kvab.be/sites/default/rest/blobs/2813/tw_digitalinnovation.pdf%23page=51)
JAN RABAEY - SOCIETAL VALUES IN DIGITAL INNOVATION: WHO … … Hardware modules (often called IP for Intellectual Property) such as processors have almost always come in the form of a black box. This model is under severe strain with the introduction of the public-domain **RISC**-**V** …
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### **[PDF]** [Dynamic performance enhancement for block i/o devices](https://patentimages.storage.googleapis.com/d4/d1/29/7464744468c0b4/US20200364163A1.pdf)
S Schauer, E Yeo - US Patent App. 16/412,257, 2020 … Processor 400 typically comprises one or more microprocessor, microcontrollers, custom ASICs, and/or custom **RISC**-**V** processors, such as a dual core 32-bit **RISC**-**V** CPU that may be customized by a designer of processor 400 …
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### [Optimal bounded-skew steiner trees to minimize maximum k-active dynamic power](https://dl.acm.org/doi/abs/10.1145/3414622.3431908)
H Fatemi, AB Kahng, M Kim, JP de Gyvez - Proceedings of the Workshop on System …, 2020 … Removal of unusable edges in the grid can make the problem sparser and improve ILP runtimes. Figure 3 shows uniform and non-uniform grids on an example floorplan from a **RISC**-**V** based design.4 Figure 3(a) shows uniform grids with locations of terminals …
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### **[PDF]** [Strategic Review on Different Materials for FinFET Structure Performance Optimization](https://iopscience.iop.org/article/10.1088/1757-899X/988/1/012054/pdf)
KB Madhavi, SL Tripathi - IOP Conference Series: Materials Science and …, 2020 … Sci. 2019, 9, 2388; doi:10.3390/app9112388. [10] S. Bailey et al., &quot;A Mixed-Signal **RISC**-**V** Signal Analysis SoC Generator With a 16- nm FinFET Instance,&quot; in IEEE Journal of Solid-State Circuits, vol. 54, no. 10, pp. 2786-2801, Oct …

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### **[PDF]** [Securing the EDK II Image Loader](https://arxiv.org/pdf/2012.05471)
M Häuser, V Cheptsov - arXiv preprint arXiv:2012.05471, 2020 … The Unified Extensible Firmware Interface (UEFI) is a standardised interface between the firmware and the op- erating system used in all x86-based platforms over the past ten years, which continues to spread to other …
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### **[PDF]** [Reconfigurable Domain-specific Architectures in the post-Moore's Law World: Implications for Software Engineering](https://www.researchgate.net/profile/Harshal_Hayatnagarkar/publication/346673143_Reconfigurable_Domain-specific_Architectures_in_the_post-Moore%27s_Law_World_Implications_for_Software_Engineering/links/5fce425692851c00f858ef6e/Reconfigurable-Domain-specific-Architectures-in-the-post-Moores-Law-World-Implications-for-Software-Engineering.pdf)
HG Hayatnagarkar, MV Arunkumar, B Padalkar … (5) Open source movement extending into hardware develop- ment, such as **RISC** **V** microprocessor and NVIDIA Deep Learning Accelerator for machine learning (6) FPGAs themselves being general-purpose enough …
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### [Ultra-low energy pest detection for smart agriculture](https://ieeexplore.ieee.org/abstract/document/9278587/)
D Brunelli, T Polonelli, L Benini - 2020 IEEE Sensors, 2020 … GAP82 [5] SoC is a **RISC**-**V** ISA multi-core processor and integrates a state-of-the-art microcontroller, with a powerful programmable parallel processing engine for flexible multi- sensor (image, audio, inertial) data analysis, and a rich set of peripherals …
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### [Towards the Use of Artificial Intelligence on the Edge in Space Systems: Challenges and Opportunities](https://ieeexplore.ieee.org/abstract/document/9288809/)
G Furano, G Meoni, A Dunne, D Moloney… - IEEE Aerospace and …, 2020 … late 1990s [10]. For this reason, products such as NOEL-V, which is based on **RISC**-**V** ISA, were conceived, fact that arises a broad interest in several industrial applications. SPACE-QUALIFIED FPGA Space data processing …
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### **[HTML]** [Lightweight Software-Defined Error Correction for Memories](https://link.springer.com/chapter/10.1007/978-3-030-52017-5_9)
I Alam, L Dolecek, P Gupta - Dependable Embedded Systems … 1.4.1 Methodology. The SPEC CPU2006 benchmarks are compiled against GNU/Linux for the open-source 64-bit **RISC**-**V** (RV64G) instruction set v2.0 [34] using the official tools [25]. Each benchmark is executed on top of the …
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### **[PDF]** [An introduction and review on innovative silicon implementa-tions of implantable/scalp EEG chips for data acquisition, seizure/behavior detection, and brain …](http://bsa.tsinghuajournals.com/EN/article/downloadArticleFile.do?attachType=PDF&id=155603)
W Shi, J Zhang, Z Zhang, L Hu, Y Su - Brain Science Advances, 2020 … Mr. Wolf is a high-count core configurable platform fabricated in TSMC 40-nm CMOS technology, cooperating with a 12 K gates **RISC**-**V** processor communicating with peripherals and optimal power management, with a parallel combination …
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### [Cryptology and Network Security](https://link.springer.com/content/pdf/10.1007/978-3-030-65411-5.pdf)
S Krenn, H Shulman, S Vaudenay … 505 Heiko Mantel, Lukas Scheidel, Thomas Schneider, Alexandra Weber, Christian Weinert, and Tim Weißmantel Assembly or Optimized C for Lightweight Cryptography on **RISC**-**V**?.... 526 Fabio Campos, Lars Jellema …
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### **[PDF]** [Low‐Power Computing with Neuromorphic Engineering](https://onlinelibrary.wiley.com/doi/pdf/10.1002/aisy.202000150)
D Liu, H Yu, Y Chai - Advanced Intelligent Systems The increasing power consumption in the existing computation architecture presents grand challenges for the performance and reliability of very‐large‐scale integrated circuits. Inspired by the char...
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### [Fast and Accurate Inference on Microcontrollers With Boosted Cooperative Convolutional Neural Networks (BC-Net)](https://ieeexplore.ieee.org/abstract/document/9275360/)
L Mocerino, A Calimera - IEEE Transactions on Circuits and Systems I: Regular …, 2020 Page 1. This article has been accepted for inclusion in a future issue of this journal. Content is final as presented, with the exception of pagination. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: REGULAR PAPERS …

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