//2024-2-20 姜青羊
//日常练习

`timescale 1ns/10ps
module fn_sw (
                        A,
                        B,
                        sel,
                        Y
                    );

input                   A,B;
input[1:0]              sel;
output                  Y;
reg                     Y;

always @(A or B or sel) begin
    case(sel)
    00: Y = A&B;
    00: Y = A|B;
    00: Y = A^B;
    00: Y = ~(A^B);
    endcase
end
    
endmodule

//----testbench------

module tb_fn_sw ();

reg[3:0]                sab;
wire                    y;

fn_sw u_fn_sw (
                        .A(sab[0]),
                        .B(sab[1]),
                        .sel(sab[3:2]),
                        .Y(y)
                    );

initial begin
                        sab<=0000;
            #2000       $stop;
end

always      #10        sab<=sab+1;
    
endmodule