//2023-8-24 Jiang Qingyang(姜青羊) 
//many-way selection logic(四选一逻辑)
`timescale 1ns/10ps
module fn_sw_4(
                    a,
                    b,
                    sel,
                    y
                    );
input               a;
input               b;
input[1:0]          sel;
output              y; 

reg                 y;
always @( a or b or sel) begin
    case(sel)
    
    2'b00: begin y<=a&b;    end
    2'b01: begin y<=a|b;    end
    2'b10: begin y<=a^b;    end
    2'b11: begin y<=~(a^b); end
        
    endcase
end

endmodule

//-----testbench of fn_sw_4-----

module tb_fn_sw_4 ();

reg[3:0]             absel;
wire                 y;


initial begin
                    absel<=0;
            #200    $stop;
end

always #10 absel<=absel+1;



fn_sw_4 u_fn_sw_4(                       //异名例化适用于绝大多数情况
                    .a(absel[0]),      //同名例化在很多时候并不适用，并不推荐使用
                    .b(absel[1]),
                    .sel(absel[3:2]),//高两位给sel
                    .y(y)
                    );

endmodule