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同步操作将从 westlor/imx6_sja1000 强制同步,此操作会覆盖自 Fork 仓库以来所做的任何修改,且无法恢复!!!
确定后同步将在后台操作,完成时将刷新页面,请耐心等待。
/dts-v1/;
#include "imx6q.dtsi"
#include <dt-bindings/input/input.h>
/*---------------------------------------------------------------------------------------------------------------------
core
-----------------------------------------------------------------------------------------------------------------------*/
/ {
model = "Freescale i.MX6 Quad Sbc";
compatible = "fsl,imx6q-sbc", "fsl,imx6q";
};
/*---------------------------------------------------------------------------------------------------------------------
memory
-----------------------------------------------------------------------------------------------------------------------*/
/ {
memory {
reg = <0x10000000 0x40000000>;
};
};
/*---------------------------------------------------------------------------------------------------------------------
sja1000
-----------------------------------------------------------------------------------------------------------------------*/
/ {
sja1000@08001C00 {
compatible = "weim,sja1000";
reg = <0x08001C00 0x1FF>;
nxp,external-clock-frequency = <16000000>;
nxp,tx-output-config = <0x16>;
nxp,no-comparator-bypass;
interrupt-parent = <&gpio4>;
interrupts = <16 0>;
int-gpios = <&gpio4 16 0>;
rst-gpios = <&gpio2 28 0>;
led-gpios = <&gpio4 26 0>;
};
sja1000@08001A00 {
compatible = "weim,sja1000";
reg = <0x08001A00 0x1FF>;
nxp,external-clock-frequency = <16000000>;
nxp,tx-output-config = <0x16>;
nxp,no-comparator-bypass;
interrupt-parent = <&gpio4>;
interrupts = <17 0>;
int-gpios = <&gpio4 17 0>;
led-gpios = <&gpio4 27 0>;
};
sja1000@08001600 {
compatible = "weim,sja1000";
reg = <0x08001600 0x1FF>;
nxp,external-clock-frequency = <16000000>;
nxp,tx-output-config = <0x16>;
nxp,no-comparator-bypass;
interrupt-parent = <&gpio4>;
interrupts = <18 0>;
int-gpios = <&gpio4 18 0>;
led-gpios = <&gpio4 28 0>;
};
sja1000@08000E00 {
compatible = "weim,sja1000";
reg = <0x08000E00 0x1FF>;
nxp,external-clock-frequency = <16000000>;
nxp,tx-output-config = <0x16>;
nxp,no-comparator-bypass;
interrupt-parent = <&gpio4>;
interrupts = <19 0>;
int-gpios = <&gpio4 19 0>;
led-gpios = <&gpio4 29 0>;
};
};
/*---------------------------------------------------------------------------------------------------------------------
iomuxc
-----------------------------------------------------------------------------------------------------------------------*/
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog>;
pin: imx6qdl-sabreauto {
pinctrl_hog: hotgrp {
fsl,pins = <
/* CLKOUT[1:2] */
MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x1b030
MX6QDL_PAD_GPIO_3__CCM_CLKO2 0x1b030
>;
};
pinctrl_flexcan1: flexcan1grp {
fsl,pins = <
MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x80000000
MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x80000000
>;
};
pinctrl_flexcan2: flexcan2grp {
fsl,pins = <
MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x80000000
MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x80000000
>;
};
pinctrl_weim: weim1grp {
fsl,pins = <
MX6QDL_PAD_EIM_OE__EIM_OE_B 0x9091
MX6QDL_PAD_EIM_RW__EIM_RW 0x9091
MX6QDL_PAD_EIM_CS0__EIM_CS0_B 0x9091
MX6QDL_PAD_EIM_LBA__EIM_LBA_B 0x9091
/* SJA1000_RST */
MX6QDL_PAD_EIM_EB0__GPIO2_IO28 0x9091
/* SJA1000 INT */
MX6QDL_PAD_DI0_DISP_CLK__GPIO4_IO16 0x9091
MX6QDL_PAD_DI0_PIN15__GPIO4_IO17 0x9091
MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 0x9091
MX6QDL_PAD_DI0_PIN3__GPIO4_IO19 0x9091
/* SJA1000 LED */
MX6QDL_PAD_DISP0_DAT5__GPIO4_IO26 0x80000000
MX6QDL_PAD_DISP0_DAT6__GPIO4_IO27 0x80000000
MX6QDL_PAD_DISP0_DAT7__GPIO4_IO28 0x80000000
MX6QDL_PAD_DISP0_DAT8__GPIO4_IO29 0x80000000
/* SJA1000_ADDA */
MX6QDL_PAD_EIM_DA0__EIM_AD00 0x9091
MX6QDL_PAD_EIM_DA1__EIM_AD01 0x9091
MX6QDL_PAD_EIM_DA2__EIM_AD02 0x9091
MX6QDL_PAD_EIM_DA3__EIM_AD03 0x9091
MX6QDL_PAD_EIM_DA4__EIM_AD04 0x9091
MX6QDL_PAD_EIM_DA5__EIM_AD05 0x9091
MX6QDL_PAD_EIM_DA6__EIM_AD06 0x9091
MX6QDL_PAD_EIM_DA7__EIM_AD07 0x9091
MX6QDL_PAD_EIM_DA8__EIM_AD08 0x9091
MX6QDL_PAD_EIM_DA9__EIM_AD09 0x9091
MX6QDL_PAD_EIM_DA10__EIM_AD10 0x9091
MX6QDL_PAD_EIM_DA11__EIM_AD11 0x9091
MX6QDL_PAD_EIM_DA12__EIM_AD12 0x9091
MX6QDL_PAD_EIM_DA13__EIM_AD13 0x9091
MX6QDL_PAD_EIM_DA14__EIM_AD14 0x9091
MX6QDL_PAD_EIM_DA15__EIM_AD15 0x9091
>;
};
};
};
/*---------------------------------------------------------------------------------------------------------------------
regulators
-----------------------------------------------------------------------------------------------------------------------*/
/ {
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
vdd_5v: regulator@0 {
compatible = "regulator-fixed";
reg = <0>;
regulator-name = "vdd_5v";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
vdd_2p8v: regulator@1 {
compatible = "regulator-fixed";
reg = <1>;
regulator-name = "vdd_2p8v";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vdd_3p3v_delay: regulator@2 {
compatible = "regulator-fixed";
reg = <2>;
regulator-name = "vdd_3p3v_delay";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
usbotg_vbus: regulator@3 {
compatible = "regulator-fixed";
reg = <3>;
regulator-name = "usbotg_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
audio_avdd_3p3v: regulator@4 {
compatible = "regulator-fixed";
reg = <4>;
regulator-name = "audio_avdd_3p3v";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
avdd_2p8v: regulator@5 {
compatible = "regulator-fixed";
reg = <5>;
regulator-name = "avdd_2p8v";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-always-on;
};
vdd_1p5v: regulator@6 {
compatible = "regulator-fixed";
reg = <6>;
regulator-name = "vdd_1p5v";
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
regulator-always-on;
};
};
};
/*---------------------------------------------------------------------------------------------------------------------
uart
-----------------------------------------------------------------------------------------------------------------------*/
&pin {
pinctrl_uart1: uart1grp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
>;
};
pinctrl_uart4: uart4grp {
fsl,pins = <
MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
>;
};
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
status = "okay";
};
&uart4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart4>;
status = "okay";
};
/*---------------------------------------------------------------------------------------------------------------------
ethnet
-----------------------------------------------------------------------------------------------------------------------*/
&pin {
pinctrl_enet: enetgrp {
fsl,pins = <
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
>;
};
};
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rgmii";
fsl,magic-packet;
status = "okay";
};
/ {
aliases {
mxcfb0 = &mxcfb0;
};
mxcfb0: fb@0 {
compatible = "fsl,mxc_sdc_fb";
disp_dev = "ldb";
interface_pix_fmt = "RGB666";
default_bpp = <16>;
int_clk = <0>;
late_init = <0>;
status = "okay";
};
};
&ldb {
status = "okay";
lvds-channel@0 {
fsl,data-mapping = "spwg";
fsl,data-width = <18>;
primary;
crtc = "ipu2-di0";
status = "okay";
display-timings {
native-mode = <&timing0>;
timing0: hsd100pxn1 {
clock-frequency = <65000000>;
hactive = <1024>;
vactive = <768>;
hback-porch = <220>;
hfront-porch = <40>;
vback-porch = <21>;
vfront-porch = <7>;
hsync-len = <60>;
vsync-len = <10>;
};
};
};
lvds-channel@1 {
fsl,data-mapping = "spwg";
fsl,data-width = <18>;
status = "disable";
display-timings {
native-mode = <&timing1>;
timing1: hsd100pxn1 {
clock-frequency = <65000000>;
hactive = <1024>;
vactive = <768>;
hback-porch = <220>;
hfront-porch = <40>;
vback-porch = <21>;
vfront-porch = <7>;
hsync-len = <60>;
vsync-len = <10>;
};
};
};
};
/*---------------------------------------------------------------------------------------------------------------------
usb
-----------------------------------------------------------------------------------------------------------------------*/
&pin {
pinctrl_usbotg: usbotggrp {
fsl,pins = <
MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
>;
};
};
&usbh1 {
vbus-supply = <&vdd_5v>;
status = "okay";
};
&usbotg {
vbus-supply = <&usbotg_vbus>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbotg>;
status = "okay";
};
/*-----------------------------------------------------------------------------------------------------------------------------------------
mmc
------------------------------------------------------------------------------------------------------------------------------------------*/
&pin {
pinctrl_sd1: sd1grp {
fsl,pins = <
MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071
MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
>;
};
pinctrl_sd2: sd2grp {
fsl,pins = <
MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17071
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17071
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17071
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17071
MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10071
MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17071
>;
};
pinctrl_sd3: sd3grp {
fsl,pins = <
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17071
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17071
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17071
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17071
MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17071
MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17071
MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17071
MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17071
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10071
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17071
MX6QDL_PAD_SD3_RST__SD3_RESET 0x17071
>;
};
};
&usdhc1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sd1>;
bus-width = <4>;
no-1-8-v;
non-removable;
keep-power-in-suspend;
status = "okay";
};
&usdhc2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sd2>;
bus-width = <4>;
non-removable;
keep-power-in-suspend;
status = "okay";
};
&usdhc3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sd3>;
bus-width = <8>;
keep-power-in-suspend;
status = "okay";
};
/*-----------------------------------------------------------------------------------------------------------------------------------------
i2c
------------------------------------------------------------------------------------------------------------------------------------------*/
&pin {
pinctrl_i2c1: i2c1grp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x40000039
MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x40000039
>;
};
pinctrl_i2c3: i2c3grp {
fsl,pins = <
MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
>;
};
};
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>;
clock-frequency = <100000>;
status = "okay";
};
&i2c3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3>;
status = "okay";
};
/*-----------------------------------------------------------------------------------------------------------------------------------------
spi
------------------------------------------------------------------------------------------------------------------------------------------*/
&pin {
pinctrl_ecspi1: ecspi1grp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT4__ECSPI1_SCLK 0x100b1
MX6QDL_PAD_CSI0_DAT5__ECSPI1_MOSI 0x100b1
MX6QDL_PAD_CSI0_DAT6__ECSPI1_MISO 0x100b1
/* cs */
MX6QDL_PAD_CSI0_DAT7__GPIO5_IO25 0x80000000
>;
};
pinctrl_ltc2452: ltc2452grp {
fsl,pins = <
/* cs1-6 */
MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x80000000
MX6QDL_PAD_DISP0_DAT0__GPIO4_IO21 0x80000000
MX6QDL_PAD_DISP0_DAT1__GPIO4_IO22 0x80000000
MX6QDL_PAD_DISP0_DAT2__GPIO4_IO23 0x80000000
MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x80000000
MX6QDL_PAD_DISP0_DAT4__GPIO4_IO25 0x80000000
>;
};
};
&ecspi1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi1>;
fsl,spi-num-chipselects = <1>;
cs-gpios = <&gpio5 25 0>;
status = "okay";
};
/*-----------------------------------------------------------------------------------------------------------------------------------------
AD Collection
------------------------------------------------------------------------------------------------------------------------------------------*/
&ecspi1 {
ltc2452@0 {
compatible = "lt,ltc2452";
spi-max-frequency = <1500000>;
reg = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ltc2452>;
cs1-gpios = <&gpio4 20 0>;
cs2-gpios = <&gpio4 21 0>;
cs3-gpios = <&gpio4 22 0>;
cs4-gpios = <&gpio4 23 0>;
cs5-gpios = <&gpio4 24 0>;
cs6-gpios = <&gpio4 25 0>;
};
};
/*-----------------------------------------------------------------------------------------------------------------------------------------
can
------------------------------------------------------------------------------------------------------------------------------------------*/
&flexcan1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flexcan1>;
status = "okay";
};
&flexcan2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flexcan2>;
status = "okay";
};
/*---------------------------------------------------------------------------------------------
sja1000
-------------------------------------------------------------------------------------------*/
&weim {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_weim>;
status = "okay";
};
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