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This backport contains 1 patch from gcc main stream tree.
The commit id of these patchs list as following in the order of time.
0001-re-PR-middle-end-92046-Command-line-options-that-are.patch
e622a32db78300821fc1327637ec6413febc2c66
diff -uprN a/gcc/common.opt b/gcc/common.opt
--- a/gcc/common.opt 2020-05-28 16:12:58.815511599 +0800
+++ b/gcc/common.opt 2020-05-28 15:54:33.797511589 +0800
@@ -993,6 +993,10 @@ Align the start of loops.
falign-loops=
Common RejectNegative Joined Var(str_align_loops) Optimization
+fallow-store-data-races
+Common Report Var(flag_store_data_races) Optimization
+Allow the compiler to introduce new data races on stores.
+
fargument-alias
Common Ignore
Does nothing. Preserved for backward compatibility.
diff -uprN a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
--- a/gcc/doc/invoke.texi 2020-05-28 16:12:56.875511599 +0800
+++ b/gcc/doc/invoke.texi 2020-05-28 15:54:33.757511589 +0800
@@ -400,6 +400,7 @@ Objective-C and Objective-C++ Dialects}.
-falign-jumps[=@var{n}[:@var{m}:[@var{n2}[:@var{m2}]]]] @gol
-falign-labels[=@var{n}[:@var{m}:[@var{n2}[:@var{m2}]]]] @gol
-falign-loops[=@var{n}[:@var{m}:[@var{n2}[:@var{m2}]]]] @gol
+-fallow-store-data-races @gol
-fassociative-math -fauto-profile -fauto-profile[=@var{path}] @gol
-fauto-inc-dec -fbranch-probabilities @gol
-fbranch-target-load-optimize -fbranch-target-load-optimize2 @gol
@@ -8365,9 +8366,9 @@ designed to reduce code size.
Disregard strict standards compliance. @option{-Ofast} enables all
@option{-O3} optimizations. It also enables optimizations that are not
valid for all standard-compliant programs.
-It turns on @option{-ffast-math} and the Fortran-specific
-@option{-fstack-arrays}, unless @option{-fmax-stack-var-size} is
-specified, and @option{-fno-protect-parens}.
+It turns on @option{-ffast-math}, @option{-fallow-store-data-races}
+and the Fortran-specific @option{-fstack-arrays}, unless
+@option{-fmax-stack-var-size} is specified, and @option{-fno-protect-parens}.
@item -Og
@opindex Og
@@ -10120,6 +10121,12 @@ The maximum allowed @var{n} option value
Enabled at levels @option{-O2}, @option{-O3}.
+@item -fallow-store-data-races
+@opindex fallow-store-data-races
+Allow the compiler to introduce new data races on stores.
+
+Enabled at level @option{-Ofast}.
+
@item -funit-at-a-time
@opindex funit-at-a-time
This option is left for compatibility reasons. @option{-funit-at-a-time}
@@ -11902,10 +11909,6 @@ The maximum number of conditional store
if either vectorization (@option{-ftree-vectorize}) or if-conversion
(@option{-ftree-loop-if-convert}) is disabled.
-@item allow-store-data-races
-Allow optimizers to introduce new data races on stores.
-Set to 1 to allow, otherwise to 0.
-
@item case-values-threshold
The smallest number of different values for which it is best to use a
jump-table instead of a tree of conditional branches. If the value is
diff -uprN a/gcc/opts.c b/gcc/opts.c
--- a/gcc/opts.c 2020-05-28 16:12:58.847511599 +0800
+++ b/gcc/opts.c 2020-05-28 15:54:35.713511589 +0800
@@ -560,6 +560,7 @@ static const struct default_options defa
/* -Ofast adds optimizations to -O3. */
{ OPT_LEVELS_FAST, OPT_ffast_math, NULL, 1 },
+ { OPT_LEVELS_FAST, OPT_fallow_store_data_races, NULL, 1 },
{ OPT_LEVELS_NONE, 0, NULL, 0 }
};
@@ -682,13 +683,6 @@ default_options_optimization (struct gcc
: default_param_value (PARAM_MAX_DSE_ACTIVE_LOCAL_STORES) / 10,
opts->x_param_values, opts_set->x_param_values);
- /* At -Ofast, allow store motion to introduce potential race conditions. */
- maybe_set_param_value
- (PARAM_ALLOW_STORE_DATA_RACES,
- opts->x_optimize_fast ? 1
- : default_param_value (PARAM_ALLOW_STORE_DATA_RACES),
- opts->x_param_values, opts_set->x_param_values);
-
if (opts->x_optimize_size)
/* We want to crossjump as much as possible. */
maybe_set_param_value (PARAM_MIN_CROSSJUMP_INSNS, 1,
diff -uprN a/gcc/params.def b/gcc/params.def
--- a/gcc/params.def 2020-05-28 16:12:58.831511599 +0800
+++ b/gcc/params.def 2020-05-28 15:54:35.725511589 +0800
@@ -1199,12 +1199,6 @@ DEFPARAM (PARAM_CASE_VALUES_THRESHOLD,
"if 0, use the default for the machine.",
0, 0, 0)
-/* Data race flags for C++0x memory model compliance. */
-DEFPARAM (PARAM_ALLOW_STORE_DATA_RACES,
- "allow-store-data-races",
- "Allow new data races on stores to be introduced.",
- 0, 0, 1)
-
/* Reassociation width to be used by tree reassoc optimization. */
DEFPARAM (PARAM_TREE_REASSOC_WIDTH,
"tree-reassoc-width",
diff -uprN a/gcc/params.h b/gcc/params.h
--- a/gcc/params.h 2020-05-28 16:12:58.843511599 +0800
+++ b/gcc/params.h 2020-05-28 15:54:35.725511589 +0800
@@ -228,8 +228,6 @@ extern void init_param_values (int *para
PARAM_VALUE (PARAM_MAX_STORES_TO_SINK)
#define ALLOW_LOAD_DATA_RACES \
PARAM_VALUE (PARAM_ALLOW_LOAD_DATA_RACES)
-#define ALLOW_STORE_DATA_RACES \
- PARAM_VALUE (PARAM_ALLOW_STORE_DATA_RACES)
#define ALLOW_PACKED_LOAD_DATA_RACES \
PARAM_VALUE (PARAM_ALLOW_PACKED_LOAD_DATA_RACES)
#define ALLOW_PACKED_STORE_DATA_RACES \
diff -uprN a/gcc/testsuite/c-c++-common/cxxbitfields-3.c b/gcc/testsuite/c-c++-common/cxxbitfields-3.c
--- a/gcc/testsuite/c-c++-common/cxxbitfields-3.c 2020-05-28 16:12:56.959511599 +0800
+++ b/gcc/testsuite/c-c++-common/cxxbitfields-3.c 2020-05-28 15:54:33.853511589 +0800
@@ -1,5 +1,5 @@
/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
-/* { dg-options "-O2 --param allow-store-data-races=0" } */
+/* { dg-options "-O2 -fno-allow-store-data-races" } */
/* Make sure we don't narrow down to a QI or HI to store into VAR.J,
but instead use an SI. */
diff -uprN a/gcc/testsuite/c-c++-common/cxxbitfields-6.c b/gcc/testsuite/c-c++-common/cxxbitfields-6.c
--- a/gcc/testsuite/c-c++-common/cxxbitfields-6.c 2020-05-28 16:12:56.935511599 +0800
+++ b/gcc/testsuite/c-c++-common/cxxbitfields-6.c 2020-05-28 15:54:33.845511589 +0800
@@ -1,6 +1,6 @@
/* PR middle-end/50141 */
/* { dg-do compile } */
-/* { dg-options "-O2 --param allow-store-data-races=0" } */
+/* { dg-options "-O2 -fno-allow-store-data-races" } */
struct S
{
diff -uprN a/gcc/testsuite/c-c++-common/simulate-thread/bitfields-1.c b/gcc/testsuite/c-c++-common/simulate-thread/bitfields-1.c
--- a/gcc/testsuite/c-c++-common/simulate-thread/bitfields-1.c 2020-05-28 16:12:56.939511599 +0800
+++ b/gcc/testsuite/c-c++-common/simulate-thread/bitfields-1.c 2020-05-28 15:54:33.821511589 +0800
@@ -1,5 +1,5 @@
/* { dg-do link } */
-/* { dg-options "--param allow-store-data-races=0" } */
+/* { dg-options "-fno-allow-store-data-races" } */
/* { dg-final { simulate-thread } } */
#include <stdio.h>
diff -uprN a/gcc/testsuite/c-c++-common/simulate-thread/bitfields-2.c b/gcc/testsuite/c-c++-common/simulate-thread/bitfields-2.c
--- a/gcc/testsuite/c-c++-common/simulate-thread/bitfields-2.c 2020-05-28 16:12:56.939511599 +0800
+++ b/gcc/testsuite/c-c++-common/simulate-thread/bitfields-2.c 2020-05-28 15:54:33.821511589 +0800
@@ -1,5 +1,5 @@
/* { dg-do link { target { ! int16 } } } */
-/* { dg-options "--param allow-store-data-races=0" } */
+/* { dg-options "-fno-allow-store-data-races" } */
/* { dg-final { simulate-thread } } */
#include <stdio.h>
diff -uprN a/gcc/testsuite/c-c++-common/simulate-thread/bitfields-3.c b/gcc/testsuite/c-c++-common/simulate-thread/bitfields-3.c
--- a/gcc/testsuite/c-c++-common/simulate-thread/bitfields-3.c 2020-05-28 16:12:56.939511599 +0800
+++ b/gcc/testsuite/c-c++-common/simulate-thread/bitfields-3.c 2020-05-28 15:54:33.821511589 +0800
@@ -1,5 +1,5 @@
/* { dg-do link } */
-/* { dg-options "--param allow-store-data-races=0" } */
+/* { dg-options "-fno-allow-store-data-races" } */
/* { dg-final { simulate-thread } } */
#include <stdio.h>
diff -uprN a/gcc/testsuite/c-c++-common/simulate-thread/bitfields-4.c b/gcc/testsuite/c-c++-common/simulate-thread/bitfields-4.c
--- a/gcc/testsuite/c-c++-common/simulate-thread/bitfields-4.c 2020-05-28 16:12:56.939511599 +0800
+++ b/gcc/testsuite/c-c++-common/simulate-thread/bitfields-4.c 2020-05-28 15:54:33.821511589 +0800
@@ -1,5 +1,5 @@
/* { dg-do link } */
-/* { dg-options "--param allow-store-data-races=0" } */
+/* { dg-options "-fno-allow-store-data-races" } */
/* { dg-final { simulate-thread } } */
#include <stdio.h>
diff -uprN a/gcc/testsuite/gcc.dg/lto/pr52097_0.c b/gcc/testsuite/gcc.dg/lto/pr52097_0.c
--- a/gcc/testsuite/gcc.dg/lto/pr52097_0.c 2020-05-28 16:12:57.803511599 +0800
+++ b/gcc/testsuite/gcc.dg/lto/pr52097_0.c 2020-05-28 15:54:34.777511589 +0800
@@ -1,5 +1,5 @@
/* { dg-lto-do link } */
-/* { dg-lto-options { { -O -flto -fexceptions -fnon-call-exceptions --param allow-store-data-races=0 } } } */
+/* { dg-lto-options { { -O -flto -fexceptions -fnon-call-exceptions -fno-allow-store-data-races } } } */
/* { dg-require-effective-target exceptions } */
typedef struct { unsigned int e0 : 16; } s1;
diff -uprN a/gcc/testsuite/gcc.dg/simulate-thread/speculative-store-2.c b/gcc/testsuite/gcc.dg/simulate-thread/speculative-store-2.c
--- a/gcc/testsuite/gcc.dg/simulate-thread/speculative-store-2.c 2020-05-28 16:12:57.815511599 +0800
+++ b/gcc/testsuite/gcc.dg/simulate-thread/speculative-store-2.c 2020-05-28 15:54:34.781511589 +0800
@@ -1,5 +1,5 @@
/* { dg-do link } */
-/* { dg-options "--param allow-store-data-races=0 -O2" } */
+/* { dg-options "-fno-allow-store-data-races -O2" } */
/* { dg-final { simulate-thread } } */
#include <stdio.h>
diff -uprN a/gcc/testsuite/gcc.dg/simulate-thread/speculative-store-3.c b/gcc/testsuite/gcc.dg/simulate-thread/speculative-store-3.c
--- a/gcc/testsuite/gcc.dg/simulate-thread/speculative-store-3.c 2020-05-28 16:12:57.815511599 +0800
+++ b/gcc/testsuite/gcc.dg/simulate-thread/speculative-store-3.c 2020-05-28 15:54:34.781511589 +0800
@@ -1,5 +1,5 @@
/* { dg-do link } */
-/* { dg-options "--param allow-store-data-races=0 -O2" } */
+/* { dg-options "-fno-allow-store-data-races -O2" } */
/* { dg-final { simulate-thread } } */
#include <stdio.h>
diff -uprN a/gcc/testsuite/gcc.dg/simulate-thread/speculative-store-4.c b/gcc/testsuite/gcc.dg/simulate-thread/speculative-store-4.c
--- a/gcc/testsuite/gcc.dg/simulate-thread/speculative-store-4.c 2020-05-28 16:12:57.815511599 +0800
+++ b/gcc/testsuite/gcc.dg/simulate-thread/speculative-store-4.c 2020-05-28 15:54:34.781511589 +0800
@@ -1,5 +1,5 @@
/* { dg-do link } */
-/* { dg-options "--param allow-store-data-races=0" } */
+/* { dg-options "-fno-allow-store-data-races" } */
/* { dg-final { simulate-thread } } */
#include <stdio.h>
diff -uprN a/gcc/testsuite/gcc.dg/simulate-thread/speculative-store.c b/gcc/testsuite/gcc.dg/simulate-thread/speculative-store.c
--- a/gcc/testsuite/gcc.dg/simulate-thread/speculative-store.c 2020-05-28 16:12:57.815511599 +0800
+++ b/gcc/testsuite/gcc.dg/simulate-thread/speculative-store.c 2020-05-28 15:54:34.781511589 +0800
@@ -1,12 +1,12 @@
/* { dg-do link } */
-/* { dg-options "--param allow-store-data-races=0" } */
+/* { dg-options "-fno-allow-store-data-races" } */
/* { dg-final { simulate-thread } } */
#include <stdio.h>
#include "simulate-thread.h"
/* This file tests that speculative store movement out of a loop doesn't
- happen. This is disallowed when --param allow-store-data-races is 0. */
+ happen. This is disallowed when -fno-allow-store-data-races. */
int global = 100;
diff -uprN a/gcc/testsuite/gcc.dg/tree-ssa/20050314-1.c b/gcc/testsuite/gcc.dg/tree-ssa/20050314-1.c
--- a/gcc/testsuite/gcc.dg/tree-ssa/20050314-1.c 2020-05-28 16:12:58.027511599 +0800
+++ b/gcc/testsuite/gcc.dg/tree-ssa/20050314-1.c 2020-05-28 15:54:34.997511589 +0800
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O1 -fdump-tree-lim2-details --param allow-store-data-races=1" } */
+/* { dg-options "-O1 -fdump-tree-lim2-details -fallow-store-data-races" } */
float a[100];
diff -uprN a/gcc/testsuite/g++.dg/simulate-thread/bitfields-2.C b/gcc/testsuite/g++.dg/simulate-thread/bitfields-2.C
--- a/gcc/testsuite/g++.dg/simulate-thread/bitfields-2.C 2020-05-28 16:12:57.015511599 +0800
+++ b/gcc/testsuite/g++.dg/simulate-thread/bitfields-2.C 2020-05-28 15:54:33.885511589 +0800
@@ -1,5 +1,5 @@
/* { dg-do link } */
-/* { dg-options "--param allow-store-data-races=0" } */
+/* { dg-options "-fno-allow-store-data-races" } */
/* { dg-final { simulate-thread } } */
/* Test that setting <var.a> does not touch either <var.b> or <var.c>.
diff -uprN a/gcc/testsuite/g++.dg/simulate-thread/bitfields.C b/gcc/testsuite/g++.dg/simulate-thread/bitfields.C
--- a/gcc/testsuite/g++.dg/simulate-thread/bitfields.C 2020-05-28 16:12:57.015511599 +0800
+++ b/gcc/testsuite/g++.dg/simulate-thread/bitfields.C 2020-05-28 15:54:33.885511589 +0800
@@ -1,5 +1,5 @@
/* { dg-do link } */
-/* { dg-options "--param allow-store-data-races=0" } */
+/* { dg-options "-fno-allow-store-data-races" } */
/* { dg-final { simulate-thread } } */
/* Test that setting <var.a> does not touch either <var.b> or <var.c>.
diff -uprN a/gcc/tree-if-conv.c b/gcc/tree-if-conv.c
--- a/gcc/tree-if-conv.c 2020-05-28 16:12:58.831511599 +0800
+++ b/gcc/tree-if-conv.c 2020-05-28 15:54:35.641511589 +0800
@@ -913,10 +913,10 @@ ifcvt_memrefs_wont_trap (gimple *stmt, v
to unconditionally. */
if (base_master_dr
&& DR_BASE_W_UNCONDITIONALLY (*base_master_dr))
- return PARAM_VALUE (PARAM_ALLOW_STORE_DATA_RACES);
+ return flag_store_data_races;
/* or the base is known to be not readonly. */
else if (base_object_writable (DR_REF (a)))
- return PARAM_VALUE (PARAM_ALLOW_STORE_DATA_RACES);
+ return flag_store_data_races;
}
return false;
diff -uprN a/gcc/tree-ssa-loop-im.c b/gcc/tree-ssa-loop-im.c
--- a/gcc/tree-ssa-loop-im.c 2020-05-28 16:12:58.779511599 +0800
+++ b/gcc/tree-ssa-loop-im.c 2020-05-28 15:54:35.729511589 +0800
@@ -2088,7 +2088,7 @@ execute_sm (struct loop *loop, vec<edge>
for_each_index (&ref->mem.ref, force_move_till, &fmt_data);
if (bb_in_transaction (loop_preheader_edge (loop)->src)
- || (! PARAM_VALUE (PARAM_ALLOW_STORE_DATA_RACES)
+ || (! flag_store_data_races
&& ! ref_always_accessed_p (loop, ref, true)))
multi_threaded_model_p = true;
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