代码拉取完成,页面将自动刷新
同步操作将从 dengly/tinycore-redpill 强制同步,此操作会覆盖自 Fork 仓库以来所做的任何修改,且无法恢复!!!
确定后同步将在后台操作,完成时将刷新页面,请耐心等待。
/dts-v1/;
/ {
compatible = "Synology";
model = "synology_v1000_1621+";
version = <0x1>;
syno_spinup_group = <0x6>;
syno_spinup_group_delay = <0x0>;
syno_hdd_powerup_seq = "true";
syno_smbus_hdd_type = "tca9555";
syno_smbus_hdd_adapter = <0x1>;
syno_smbus_hdd_address = <0x20>;
syno_cmos_reg_secure_flash = <0xe0>;
syno_cmos_reg_secure_boot = <0xe2>;
DX517 {
compatible = "Synology";
model = "synology_dx517";
pmp_slot@1 {
libata {
EMID = <0x0>;
pmp_link = <0x0>;
};
};
pmp_slot@2 {
libata {
EMID = <0x0>;
pmp_link = <0x1>;
};
};
pmp_slot@3 {
libata {
EMID = <0x0>;
pmp_link = <0x2>;
};
};
pmp_slot@4 {
libata {
EMID = <0x0>;
pmp_link = <0x3>;
};
};
pmp_slot@5 {
libata {
EMID = <0x0>;
pmp_link = <0x4>;
};
};
};
internal_slot@1 {
protocol_type = "sata";
led_type = "lp3943";
ahci {
pcie_root = "00:1e.0,01.0,07.0";
ata_port = <0x0>;
};
led_green {
led_name = "syno_led0";
};
led_orange {
led_name = "syno_led1";
};
};
internal_slot@2 {
protocol_type = "sata";
led_type = "lp3943";
ahci {
pcie_root = "00:1e.0,01.0,07.0";
ata_port = <0x1>;
};
led_green {
led_name = "syno_led2";
};
led_orange {
led_name = "syno_led3";
};
};
internal_slot@3 {
protocol_type = "sata";
led_type = "lp3943";
ahci {
pcie_root = "00:1e.0,01.0,07.0";
ata_port = <0x2>;
};
led_green {
led_name = "syno_led4";
};
led_orange {
led_name = "syno_led5";
};
};
internal_slot@4 {
protocol_type = "sata";
led_type = "lp3943";
ahci {
pcie_root = "00:1e.0,01.0,07.0";
ata_port = <0x3>;
};
led_green {
led_name = "syno_led6";
};
led_orange {
led_name = "syno_led7";
};
};
internal_slot@5 {
protocol_type = "sata";
led_type = "lp3943";
ahci {
pcie_root = "00:01.6,00.0";
ata_port = <0x2>;
};
led_green {
led_name = "syno_led8";
};
led_orange {
led_name = "syno_led9";
};
};
internal_slot@6 {
protocol_type = "sata";
led_type = "lp3943";
ahci {
pcie_root = "00:01.6,00.0";
ata_port = <0x3>;
};
led_green {
led_name = "syno_led10";
};
led_orange {
led_name = "syno_led11";
};
};
esata_port@1 {
ahci {
pcie_root = "00:01.5,00.0";
ata_port = <0x0>;
};
};
esata_port@2 {
ahci {
pcie_root = "00:01.6,00.0";
ata_port = <0x0>;
};
};
nvme_slot@1 {
pcie_root = "00:01.3";
port_type = "ssdcache";
};
nvme_slot@2 {
pcie_root = "00:01.4";
port_type = "ssdcache";
};
pcie_slot@1 {
pcie_root = "00:01.2";
};
usb_slot@1 {
vbus {
syno_gpio = <0x2a 0x1>;
};
usb2 {
usb_port = "1-2";
};
usb3 {
usb_port = "2-2";
};
};
usb_slot@2 {
vbus {
syno_gpio = <0xb 0x1>;
};
usb2 {
usb_port = "3-1";
};
usb3 {
usb_port = "4-1";
};
};
usb_slot@3 {
vbus {
syno_gpio = <0xc 0x1>;
};
usb2 {
usb_port = "1-3";
};
usb3 {
usb_port = "2-3";
};
};
};
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