#-----------------------------------------------------------
# Vivado v2017.4 (64-bit)
# SW Build 2086221 on Fri Dec 15 20:55:39 MST 2017
# IP Build 2085800 on Fri Dec 15 22:25:07 MST 2017
# Start of session at: Mon Jan 25 23:09:51 2021
# Process ID: 12256
# Current directory: D:/workspace/FPGA/Zynq7020/VivadoPro/Zynq7020_PL
# Command line: vivado.exe -gui_launcher_event rodinguilauncherevent11476 D:\workspace\FPGA\Zynq7020\VivadoPro\Zynq7020_PL\Zynq7020.xpr
# Log file: D:/workspace/FPGA/Zynq7020/VivadoPro/Zynq7020_PL/vivado.log
# Journal file: D:/workspace/FPGA/Zynq7020/VivadoPro/Zynq7020_PL\vivado.jou
#-----------------------------------------------------------
start_gui
open_project D:/workspace/FPGA/Zynq7020/VivadoPro/Zynq7020_PL/Zynq7020.xpr
Scanning sources...
Finished scanning sources
INFO: [IP_Flow 19-234] Refreshing IP repositories
INFO: [IP_Flow 19-1700] Loaded user IP repository 'd:/workspace/FPGA/Zynq7020/VivadoPro/Zynq7020_PL/repo'.
INFO: [IP_Flow 19-2313] Loaded Vivado IP repository 'C:/Xilinx/Vivado/2017.4/data/ip'.
open_project: Time (s): cpu = 00:00:09 ; elapsed = 00:00:06 . Memory (MB): peak = 798.102 ; gain = 113.176
update_compile_order -fileset sources_1
exit
INFO: [Common 17-206] Exiting Vivado at Mon Jan 25 23:13:40 2021...