代码拉取完成，页面将自动刷新
if [ "$MT7621_FPGA_BOARD" = "y" -o "$MT7621_ASIC_BOARD" = "y" ]; then
string 'Cross Compiler Path' CONFIG_CROSS_COMPILER_PATH /opt/mips-2012.03/bin/
elif [ "$RT2880_FPGA_BOARD" = "y" -o "$RT2880_ASIC_BOARD" = "y" -o
"$RT3052_FPGA_BOARD" = "y" -o "$RT3052_ASIC_BOARD" = "y" -o
"$RT3352_FPGA_BOARD" = "y" -o "$RT3352_ASIC_BOARD" = "y" -o
"$RT3883_FPGA_BOARD" = "y" -o "$RT3883_ASIC_BOARD" = "y" -o
"$RT5350_FPGA_BOARD" = "y" -o "$RT5350_ASIC_BOARD" = "y" -o
"$RT6855A_FPGA_BOARD" = "y" -o "$RT6855A_ASIC_BOARD" = "y" -o
"$MT7620_FPGA_BOARD" = "y" -o "$MT7620_ASIC_BOARD" = "y" -o
"$MT7628_FPGA_BOARD" = "y" -o "$MT7628_ASIC_BOARD" = "y" ]; then
string 'Cross Compiler Path' CONFIG_CROSS_COMPILER_PATH /opt/buildroot-gcc342/bin
fi
comment ""
mainmenu_name 'Uboot Configuration'
define_bool ASIC_BOARD y
if [ "$FPGA_BOARD" = "y" ]; then
choice 'Chip ID' "RT2880 RT2880_FPGA_BOARD \
RT3052 RT3052_FPGA_BOARD \
RT3352 RT3352_FPGA_BOARD \
RT3883 RT3883_FPGA_BOARD \
RT5350 RT5350_FPGA_BOARD \
RT6855A RT6855A_FPGA_BOARD \
MT7620 MT7620_FPGA_BOARD \
MT7621 MT7621_FPGA_BOARD \
MT7628 MT7628_FPGA_BOARD
"
else
choice 'Chip ID' " RT2880 RT2880_ASIC_BOARD \
RT3350 RT3350_ASIC_BOARD \
RT3052 RT3052_ASIC_BOARD \
RT3352 RT3352_ASIC_BOARD \
RT3883 RT3883_ASIC_BOARD \
RT5350 RT5350_ASIC_BOARD \
RT6855A RT6855A_ASIC_BOARD \
MT7620 MT7620_ASIC_BOARD \
MT7621 MT7621_ASIC_BOARD \
MT7628 MT7628_ASIC_BOARD
"
fi
#########################################################################################3
# RT2880
#########################################################################################3
if [ "$RT2880_FPGA_BOARD" = "y" -o "$RT2880_ASIC_BOARD" = "y" ]; then
define_bool RT2880_MP y
#-----------------------
# RT2880 GMAC
#-----------------------
choice 'GMAC connected to ' "100Switch MAC_TO_100SW_MODE \
100Phy MAC_TO_100PHY_MODE \
GigaSW MAC_TO_VITESSE_MODE \
GigaPhy MAC_TO_GIGAPHY_MODE
" 100Switch
if [ "$MAC_TO_VITESSE_MODE" = "y" ]; then
define_bool GPIOx_RESET_MODE y
fi
if [ "$MAC_TO_100PHY_MODE" = "y" ]; then
hex "10/100 PHY address for Auto Polling" MAC_TO_GIGAPHY_MODE_ADDR 0x1f
fi
if [ "$MAC_TO_GIGAPHY_MODE" = "y" ]; then
hex "GigaPHY address for Auto Polling" MAC_TO_GIGAPHY_MODE_ADDR 0x1f
fi
#-----------------------
# RT2880 FLASH
#-----------------------
define_bool ON_BOARD_NOR_FLASH_COMPONENT y
choice 'Flash Size' "4M ON_BOARD_4M_FLASH_COMPONENT \
8M ON_BOARD_8M_FLASH_COMPONENT \
16M ON_BOARD_16M_FLASH_COMPONENT
" 4M
#-----------------------
# RT2880 DRAM
#-----------------------
define_bool ON_BOARD_SDR y
choice 'DRAM Component' "64Mb ON_BOARD_64M_DRAM_COMPONENT \
128Mb ON_BOARD_128M_DRAM_COMPONENT \
256Mb ON_BOARD_256M_DRAM_COMPONENT \
512Mb ON_BOARD_512M_DRAM_COMPONENT
" 128Mb
choice 'DRAM Bus' "16bits ON_BOARD_16BIT_DRAM_BUS \
32bits ON_BOARD_32BIT_DRAM_BUS
" 32bits
#-----------------------
# RT2880 Option
#-----------------------
comment ""
choice 'Ram/Rom version' "RAM UBOOT_RAM \
ROM UBOOT_ROM
" ROM
bool "Dual Image" DUAL_IMAGE_SUPPORT
bool "Partition LAN/WAN" LAN_WAN_PARTITION
if [ "$LAN_WAN_PARTITION" = "y" ]; then
choice 'LAN/WAN Board Layout' "W/LLLL RALINK_DEMO_BOARD_PVLAN \
LLLL/W RALINK_EV_BOARD_PVLAN
" W/LLLL
fi
if [ "$UBOOT_RAM" = "y" ]; then
define_hex TEXT_BASE 0x8A200000
else
define_hex TEXT_BASE 0xBFC00000
fi
fi
#########################################################################################3
# RT3052
#########################################################################################3
if [ "$RT3052_FPGA_BOARD" = "y" -o "$RT3052_ASIC_BOARD" = "y" ]; then
define_bool RT3052_MP2 y
#-----------------------
# RT3052 GMAC
#-----------------------
choice 'Port 5 Connect to' "None P5_MAC_TO_NONE_MODE \
Giga_Phy(RGMII) P5_MAC_TO_PHY_MODE \
Giga_SW/iNIC(RGMII) P5_RGMII_TO_MAC_MODE \
External_CPU(MII_RvMII) P5_MII_TO_MAC_MODE \
External_CPU(RvMII_MII) P5_RMII_TO_MAC_MODE
" None
if [ "$P5_MAC_TO_PHY_MODE" = "y" ]; then
hex "GigaPHY address for Auto Polling" MAC_TO_GIGAPHY_MODE_ADDR 0x1f
fi
if [ "$P5_RGMII_TO_MAC_MODE" = "y" ]; then
define_bool GPIOx_RESET_MODE y
fi
#-----------------------
# RT3052 FLASH
#-----------------------
choice 'Flash Type' "NOR ON_BOARD_NOR_FLASH_COMPONENT \
NAND ON_BOARD_NAND_FLASH_COMPONENT \
SPI ON_BOARD_SPI_FLASH_COMPONENT
"NOR
if [ "$DUAL_IMAGE_SUPPORT" = "y" ]; then
choice 'Flash Size' "4M ON_BOARD_4M_FLASH_COMPONENT \
8M ON_BOARD_8M_FLASH_COMPONENT \
16M ON_BOARD_16M_FLASH_COMPONENT
" 4M
fi
#-----------------------
# RT3052 DRAM
#-----------------------
define_bool ON_BOARD_SDR y
choice 'DRAM Component' "64Mb ON_BOARD_64M_DRAM_COMPONENT \
128Mb ON_BOARD_128M_DRAM_COMPONENT \
256Mb ON_BOARD_256M_DRAM_COMPONENT \
512Mb ON_BOARD_512M_DRAM_COMPONENT
" 128Mb
choice 'DRAM Bus' "16bits ON_BOARD_16BIT_DRAM_BUS \
32bits ON_BOARD_32BIT_DRAM_BUS
" 32bits
#-----------------------
# RT3052 Option
#-----------------------
comment ""
if [ "$ON_BOARD_NOR_FLASH_COMPONENT" == "y" ]; then
choice 'Ram/Rom version' "RAM UBOOT_RAM \
ROM UBOOT_ROM
" ROM
else
define_bool UBOOT_RAM y
fi
bool "Dual Image" DUAL_IMAGE_SUPPORT
bool "Partition LAN/WAN" LAN_WAN_PARTITION
if [ "$LAN_WAN_PARTITION" = "y" ]; then
choice 'LAN/WAN Board Layout' "W/LLLL RALINK_DEMO_BOARD_PVLAN \
LLLL/W RALINK_EV_BOARD_PVLAN
" W/LLLL
fi
if [ "$UBOOT_RAM" = "y" ]; then
define_hex TEXT_BASE 0x80200000
else
define_hex TEXT_BASE 0xBF000000
fi
fi
#########################################################################################5
# RT3350
#########################################################################################3
if [ "$RT3350_ASIC_BOARD" = "y" ]; then
define_bool RT3052_ASIC_BOARD y
define_bool RT3052_MP2 y
#-----------------------
# RT3350 GMAC
#-----------------------
define_bool P5_MAC_TO_NONE_MODE y
#-----------------------
# RT3350 FLASH
#-----------------------
choice 'Flash Type' "NOR ON_BOARD_NOR_FLASH_COMPONENT \
NAND ON_BOARD_NAND_FLASH_COMPONENT \
SPI ON_BOARD_SPI_FLASH_COMPONENT
"NOR
if [ "$DUAL_IMAGE_SUPPORT" = "y" ]; then
choice 'Flash Size' "4M ON_BOARD_4M_FLASH_COMPONENT \
8M ON_BOARD_8M_FLASH_COMPONENT \
16M ON_BOARD_16M_FLASH_COMPONENT
" 4M
fi
#-----------------------
# RT3350 DRAM
#-----------------------
define_bool ON_BOARD_SDR y
choice 'DRAM Component' "64Mb ON_BOARD_64M_DRAM_COMPONENT \
128Mb ON_BOARD_128M_DRAM_COMPONENT \
256Mb ON_BOARD_256M_DRAM_COMPONENT \
512Mb ON_BOARD_512M_DRAM_COMPONENT
" 128Mb
define_bool ON_BOARD_16BIT_DRAM_BUS y
#-----------------------
# RT3350 Option
#-----------------------
comment ""
if [ "$ON_BOARD_NOR_FLASH_COMPONENT" == "y" ]; then
choice 'Ram/Rom version' "RAM UBOOT_RAM \
ROM UBOOT_ROM
" ROM
else
define_bool UBOOT_RAM y
fi
bool "Dual Image" DUAL_IMAGE_SUPPORT
bool "Partition LAN/WAN" LAN_WAN_PARTITION
if [ "$LAN_WAN_PARTITION" = "y" ]; then
choice 'LAN/WAN Board Layout' "W/LLLL RALINK_DEMO_BOARD_PVLAN \
LLLL/W RALINK_EV_BOARD_PVLAN
"
fi
if [ "$UBOOT_RAM" = "y" ]; then
define_hex TEXT_BASE 0x80200000
else
define_hex TEXT_BASE 0xBF000000
fi
fi
#########################################################################################3
# RT3883
#########################################################################################3
if [ "$RT3883_FPGA_BOARD" = "y" -o "$RT3883_ASIC_BOARD" = "y" ]; then
define_bool RT3883_MP y
#-----------------------
# RT3883 GMAC
#-----------------------
choice 'Use GE1 or GE2' "GMAC1 RT3883_USE_GE1 \
GMAC2 RT3883_USE_GE2
"
if [ "$RT3883_USE_GE1" = "y" ]; then
choice 'GE1 connected to' "GE_MII_FORCE_100 GE_MII_FORCE_100 \
GE_RVMII_FORCE_100 GE_RVMII_FORCE_100 \
GE_MII_AN GE_MII_AN \
GE_RGMII_FORCE_1000(MT7530) GE_RGMII_FORCE_1000 \
GE_RGMII_FORCE_VITESSE GE_RGMII_FORCE_VITESSE \
GE_RGMII_AN GE_RGMII_AN
"
else
choice 'GE2 connected to' "GE_MII_FORCE_100 GE_MII_FORCE_100 \
GE_RVMII_FORCE_100 GE_RVMII_FORCE_100 \
GE_MII_AN GE_MII_AN \
GE_RGMII_FORCE_1000 GE_RGMII_FORCE_1000 \
GE_RGMII_AN GE_RGMII_AN
"
fi
if [ "$GE_MII_FORCE_100" = "y" -o \
"$GE_RVMII_FORCE_100" = "y" ]; then
define_bool MAC_TO_100SW_MODE y
fi
if [ "$GE_MII_AN" = "y" ]; then
define_bool MAC_TO_100PHY_MODE y
hex "10/100 PHY address for Auto Polling" MAC_TO_GIGAPHY_MODE_ADDR 0x1f
fi
if [ "$GE_RGMII_FORCE_VITESSE" = "y" ]; then
define_bool MAC_TO_VITESSE_MODE y
define_bool GPIOx_RESET_MODE y
fi
if [ "$GE_RGMII_FORCE_1000" = "y" ]; then
define_bool MAC_TO_MT7530_MODE y
define_bool GPIOx_RESET_MODE y
fi
if [ "$GE_RGMII_AN" = "y" ]; then
define_bool MAC_TO_GIGAPHY_MODE y
hex "GigaPHY address for Auto Polling" MAC_TO_GIGAPHY_MODE_ADDR 0x1f
fi
#-----------------------
# RT3883 FLASH
#-----------------------
choice 'Flash Type' "NOR ON_BOARD_NOR_FLASH_COMPONENT \
NAND ON_BOARD_NAND_FLASH_COMPONENT \
SPI ON_BOARD_SPI_FLASH_COMPONENT
" NOR
if [ "$DUAL_IMAGE_SUPPORT" = "y" ]; then
choice 'Flash Size' "4M ON_BOARD_4M_FLASH_COMPONENT \
8M ON_BOARD_8M_FLASH_COMPONENT \
16M ON_BOARD_16M_FLASH_COMPONENT
" 4M
fi
#-----------------------
# RT3883 DRAM
#-----------------------
choice 'DRAM Type' "SDR ON_BOARD_SDR \
DDR2 ON_BOARD_DDR2
"DDR2
if [ "$ON_BOARD_SDR" = "y" ]; then
choice 'DRAM Component' "64Mb ON_BOARD_64M_DRAM_COMPONENT \
128Mb ON_BOARD_128M_DRAM_COMPONENT \
256Mb ON_BOARD_256M_DRAM_COMPONENT \
512Mb ON_BOARD_512M_DRAM_COMPONENT
" 128Mb
choice 'DRAM Bus' "16bits ON_BOARD_16BIT_DRAM_BUS \
32bits ON_BOARD_32BIT_DRAM_BUS
" 32bits
else
choice 'DDR Component' "256Mb ON_BOARD_256M_DRAM_COMPONENT \
512Mb ON_BOARD_512M_DRAM_COMPONENT \
1024Mb ON_BOARD_1024M_DRAM_COMPONENT
" 512Mb
choice 'DDR Width' "8bits ON_BOARD_DDR_WIDTH_8 \
16bits ON_BOARD_DDR_WIDTH_16
" 16bits
choice 'DRAM Bus' "16bits ON_BOARD_16BIT_DRAM_BUS \
32bits ON_BOARD_32BIT_DRAM_BUS
" 16bits
fi
#-----------------------
# RT3883 Option
#-----------------------
comment ""
if [ "$ON_BOARD_NOR_FLASH_COMPONENT" == "y" ]; then
choice 'Ram/Rom version' "RAM UBOOT_RAM \
ROM UBOOT_ROM
" ROM
else
define_bool UBOOT_RAM y
fi
bool "Dual Image" DUAL_IMAGE_SUPPORT
bool "Partition LAN/WAN" LAN_WAN_PARTITION
if [ "$LAN_WAN_PARTITION" = "y" ]; then
choice 'LAN/WAN Board Layout' "W/LLLL RALINK_DEMO_BOARD_PVLAN \
LLLL/W RALINK_EV_BOARD_PVLAN
"W/LLLL
fi
bool "Static DRAM Parameter" DRAM_PARAMETERS
if [ "$DRAM_PARAMETERS" = "y" ]; then
if [ "$ON_BOARD_SDR" = "y" ]; then
hex " SDRAM_CFG0" DRAM_CFG0 0
hex " SDRAM_CFG1" DRAM_CFG1 0
else
hex " SYSCFG1(hex)" DRAM_CFG0 26
hex " DDR_CFG3_ODT(hex)" DRAM_CFG1 2
fi
fi
if [ "$UBOOT_RAM" = "y" ]; then
define_hex TEXT_BASE 0x80200000
else
define_hex TEXT_BASE 0xBC000000
fi
fi
#########################################################################################3
# RT3352
#########################################################################################3
if [ "$RT3352_FPGA_BOARD" = "y" -o "$RT3352_ASIC_BOARD" = "y" ]; then
define_bool RT3352_MP y
#-----------------------
# RT3352 GMAC
#-----------------------
choice 'Port 5 Connect to' "None P5_MAC_TO_NONE_MODE \
Giga_Phy(RGMII) P5_MAC_TO_PHY_MODE \
Giga_SW/iNIC(RGMII) P5_RGMII_TO_MAC_MODE \
External_CPU(MII_RvMII) P5_MII_TO_MAC_MODE \
External_CPU(RvMII_MII) P5_RMII_TO_MAC_MODE
" None
if [ "$P5_MAC_TO_PHY_MODE" = "y" ]; then
hex "GigaPHY address for Auto Polling" MAC_TO_GIGAPHY_MODE_ADDR 0x1f
fi
if [ "$P5_RGMII_TO_MAC_MODE" = "y" ]; then
define_bool GPIOx_RESET_MODE y
fi
#-----------------------
# RT3352 FLASH
#-----------------------
define_bool ON_BOARD_SPI_FLASH_COMPONENT y
define_bool UBOOT_RAM y
if [ "$DUAL_IMAGE_SUPPORT" = "y" ]; then
choice 'Flash Size' "4M ON_BOARD_4M_FLASH_COMPONENT \
8M ON_BOARD_8M_FLASH_COMPONENT \
16M ON_BOARD_16M_FLASH_COMPONENT
" 4M
fi
#-----------------------
# RT3352 DRAM
#-----------------------
choice 'DRAM Type' "SDR ON_BOARD_SDR \
DDR2 ON_BOARD_DDR2
"SDR
if [ "$ON_BOARD_SDR" = "y" ]; then
choice 'DRAM Component' "64Mb ON_BOARD_64M_DRAM_COMPONENT \
128Mb ON_BOARD_128M_DRAM_COMPONENT \
256Mb ON_BOARD_256M_DRAM_COMPONENT \
512Mb ON_BOARD_512M_DRAM_COMPONENT
" 128Mb
choice 'DRAM Bus' "16bits ON_BOARD_16BIT_DRAM_BUS \
32bits ON_BOARD_32BIT_DRAM_BUS
" 16bits
else
choice 'DDR Component' "256Mb ON_BOARD_256M_DRAM_COMPONENT \
512Mb ON_BOARD_512M_DRAM_COMPONENT \
1024Mb ON_BOARD_1024M_DRAM_COMPONENT
" 512Mb
choice 'DDR Width' "8bits ON_BOARD_DDR_WIDTH_8 \
16bits ON_BOARD_DDR_WIDTH_16
" 16bits
choice 'DRAM Bus' "16bits ON_BOARD_16BIT_DRAM_BUS \
32bits ON_BOARD_32BIT_DRAM_BUS
" 16bits
fi
#-----------------------
# RT3352 Option
#-----------------------
comment ""
bool "Dual Image" DUAL_IMAGE_SUPPORT
bool "Partition LAN/WAN" LAN_WAN_PARTITION
if [ "$LAN_WAN_PARTITION" = "y" ]; then
choice 'LAN/WAN Board Layout' "W/LLLL RALINK_DEMO_BOARD_PVLAN \
LLLL/W RALINK_EV_BOARD_PVLAN
"
fi
bool "Static DRAM Parameter" DRAM_PARAMETERS
if [ "$DRAM_PARAMETERS" = "y" ]; then
if [ "$ON_BOARD_SDR" = "y" ]; then
hex " SDRAM_CFG0" DRAM_CFG0 0
hex " SDRAM_CFG1" DRAM_CFG1 0
else
hex " SYSCFG1(hex)" DRAM_CFG0 26
hex " DDR_CFG3_ODT(hex)" DRAM_CFG1 2
fi
fi
define_hex TEXT_BASE 0x80200000
fi
#########################################################################################3
# RT5350
#########################################################################################3
if [ "$RT5350_FPGA_BOARD" = "y" -o "$RT5350_ASIC_BOARD" = "y" ]; then
define_bool RT5350_MP y
#-----------------------
# RT5350 GMAC
#-----------------------
define_bool P5_MAC_TO_NONE_MODE y
#-----------------------
# RT5350 FLASH
#-----------------------
define_bool ON_BOARD_SPI_FLASH_COMPONENT y
define_bool UBOOT_RAM y
if [ "$DUAL_IMAGE_SUPPORT" = "y" ]; then
choice 'Flash Size' "4M ON_BOARD_4M_FLASH_COMPONENT \
8M ON_BOARD_8M_FLASH_COMPONENT \
16M ON_BOARD_16M_FLASH_COMPONENT
" 4M
fi
#-----------------------
# RT5350 DRAM
#-----------------------
define_bool ON_BOARD_SDR y
choice 'DRAM Component' "64Mb ON_BOARD_64M_DRAM_COMPONENT \
128Mb ON_BOARD_128M_DRAM_COMPONENT \
256Mb ON_BOARD_256M_DRAM_COMPONENT \
512Mb ON_BOARD_512M_DRAM_COMPONENT
" 128Mb
define_bool ON_BOARD_16BIT_DRAM_BUS y
#-----------------------
# RT5350 Option
#-----------------------
comment ""
bool "Dual Image" DUAL_IMAGE_SUPPORT
bool "Partition LAN/WAN" LAN_WAN_PARTITION
if [ "$LAN_WAN_PARTITION" = "y" ]; then
choice 'LAN/WAN Board Layout' "W/LLLL RALINK_DEMO_BOARD_PVLAN \
LLLL/W RALINK_EV_BOARD_PVLAN
"
fi
bool "Static DRAM Parameter" DRAM_PARAMETERS
if [ "$DRAM_PARAMETERS" = "y" ]; then
if [ "$ON_BOARD_SDR" = "y" ]; then
hex " SDRAM_CFG0" DRAM_CFG0 0
hex " SDRAM_CFG1" DRAM_CFG1 0
else
hex " SYSCFG1(hex)" DRAM_CFG0 26
hex " DDR_CFG3_ODT(hex)" DRAM_CFG1 2
fi
fi
bool "CPU PLL adjustment" CPU_PLL_PARAMETERS
if [ "$CPU_PLL_PARAMETERS" = "y" ]; then
hex " CPU PLL ADJUSTMENT " CPUPLLCFG 0
fi
define_hex TEXT_BASE 0x80200000
fi
#########################################################################################3
# RT6855
#########################################################################################3
if [ "$RT6855_FPGA_BOARD" = "y" -o "$RT6855_ASIC_BOARD" = "y" ]; then
define_bool RT6855_MP y
#-----------------------
# RT6855 GMAC
#-----------------------
choice 'Port 5 Connect to' "None P5_MAC_TO_NONE_MODE \
Giga_Phy(RGMII) P5_MAC_TO_PHY_MODE \
Giga_SW/iNIC(RGMII) P5_RGMII_TO_MAC_MODE \
External_CPU(MII_RvMII) P5_MII_TO_MAC_MODE \
External_CPU(RvMII_MII) P5_RMII_TO_MAC_MODE
" None
if [ "$P5_MAC_TO_PHY_MODE" = "y" ]; then
hex "GigaPHY address for Auto Polling" MAC_TO_GIGAPHY_MODE_ADDR 0x1f
fi
if [ "$P5_RGMII_TO_MAC_MODE" = "y" ]; then
define_bool GPIOx_RESET_MODE y
fi
#-----------------------
# RT6855 FLASH
#-----------------------
choice 'Flash Type' "NAND ON_BOARD_NAND_FLASH_COMPONENT \
SPI ON_BOARD_SPI_FLASH_COMPONENT
"SPI
if [ "$DUAL_IMAGE_SUPPORT" = "y" ]; then
choice 'Flash Size' "4M ON_BOARD_4M_FLASH_COMPONENT \
8M ON_BOARD_8M_FLASH_COMPONENT \
16M ON_BOARD_16M_FLASH_COMPONENT
" 4M
fi
#-----------------------
# RT6855 DRAM
#-----------------------
choice 'DRAM Type' "SDR ON_BOARD_SDR \
DDR1 ON_BOARD_DDR1 \
DDR2 ON_BOARD_DDR2
"SDR
if [ "$ON_BOARD_SDR" = "y" ]; then
choice 'DRAM Component' "64Mb ON_BOARD_64M_DRAM_COMPONENT \
128Mb ON_BOARD_128M_DRAM_COMPONENT \
256Mb ON_BOARD_256M_DRAM_COMPONENT \
512Mb ON_BOARD_512M_DRAM_COMPONENT
" 128Mb
else
choice 'DDR Component' "256Mb ON_BOARD_256M_DRAM_COMPONENT \
512Mb ON_BOARD_512M_DRAM_COMPONENT \
1024Mb ON_BOARD_1024M_DRAM_COMPONENT
" 512Mb
choice 'DDR Width' "8bits ON_BOARD_DDR_WIDTH_8 \
16bits ON_BOARD_DDR_WIDTH_16
" 16bits
fi
define_bool ON_BOARD_16BIT_DRAM_BUS y
#-----------------------
# RT6855 Option
#-----------------------
comment ""
if [ "$ON_BOARD_SPI_FLASH_COMPONENT" == "y" ]; then
choice 'Ram/Rom version' "RAM UBOOT_RAM \
ROM UBOOT_ROM
" ROM
#choice 'Small Uboot/Config partition' "Normal_Partition_5_sectors NORMAL_UBOOT_PARTITION \
# Small_Partition_3_sectors SMALL_UBOOT_PARTITION
# " Normal_Partition_5_sectors
else
define_bool UBOOT_RAM y
fi
bool "Dual Image" DUAL_IMAGE_SUPPORT
bool "Partition LAN/WAN" LAN_WAN_PARTITION
if [ "$LAN_WAN_PARTITION" = "y" ]; then
choice 'LAN/WAN Board Layout' "W/LLLL RALINK_DEMO_BOARD_PVLAN \
LLLL/W RALINK_EV_BOARD_PVLAN
"
fi
bool "Static DRAM Parameter" DRAM_PARAMETERS
if [ "$DRAM_PARAMETERS" = "y" ]; then
if [ "$ON_BOARD_SDR" = "y" ]; then
hex " SDRAM_CFG0" DRAM_CFG0 0
hex " SDRAM_CFG1" DRAM_CFG1 0
else
hex " SYSCFG1(hex)" DRAM_CFG0 26
hex " DDR_CFG3_ODT(hex)" DRAM_CFG1 2
fi
fi
bool "CPU PLL adjustment" CPU_PLL_PARAMETERS
if [ "$CPU_PLL_PARAMETERS" = "y" ]; then
hex " CPU PLL ADJUSTMENT " CPUPLLCFG 0
fi
if [ "$UBOOT_RAM" = "y" ]; then
define_hex TEXT_BASE 0x80200000
else
define_hex TEXT_BASE 0xBC000000
fi
fi
#########################################################################################3
# RT6855A
#########################################################################################3
if [ "$RT6855A_FPGA_BOARD" = "y" -o "$RT6855A_ASIC_BOARD" = "y" ]; then
define_bool RT6855A_MP y
#-----------------------
# RT6855A GMAC
#-----------------------
choice 'Port 5 Connect to' "None P5_MAC_TO_NONE_MODE \
Giga_Phy(RGMII) P5_MAC_TO_PHY_MODE \
Giga_SW/iNIC(RGMII) P5_RGMII_TO_MAC_MODE \
External_CPU(MII_RvMII) P5_MII_TO_MAC_MODE \
External_CPU(RvMII_MII) P5_RMII_TO_MAC_MODE
" None
if [ "$P5_MAC_TO_PHY_MODE" = "y" ]; then
hex "GigaPHY address for Auto Polling" MAC_TO_GIGAPHY_MODE_ADDR 0x5
fi
if [ "$P5_RGMII_TO_MAC_MODE" = "y" ]; then
define_bool GPIOx_RESET_MODE y
fi
#-----------------------
# RT6855A FLASH
#-----------------------
choice 'Flash Type' "NAND ON_BOARD_NAND_FLASH_COMPONENT \
SPI ON_BOARD_SPI_FLASH_COMPONENT
"SPI
#-----------------------
# RT6855A DRAM
#-----------------------
choice 'DRAM Type' "SDR ON_BOARD_SDR \
DDR1 ON_BOARD_DDR1 \
DDR2 ON_BOARD_DDR2
"SDR
if [ "$ON_BOARD_SDR" = "y" ]; then
choice 'DRAM Component' "16Mb ON_BOARD_16M_DRAM_COMPONENT \
64Mb ON_BOARD_64M_DRAM_COMPONENT \
128Mb ON_BOARD_128M_DRAM_COMPONENT \
256Mb ON_BOARD_256M_DRAM_COMPONENT
"128Mb
else
if [ "$ON_BOARD_DDR1" = "y" ]; then
choice 'DDR Component' "64Mb ON_BOARD_64M_DRAM_COMPONENT \
128Mb ON_BOARD_128M_DRAM_COMPONENT \
256Mb ON_BOARD_256M_DRAM_COMPONENT \
512Mb ON_BOARD_512M_DRAM_COMPONENT
"256Mb
else
if [ "$ON_BOARD_DDR2" = "y" ]; then
choice 'DDR Component' "256Mb ON_BOARD_256M_DRAM_COMPONENT \
512Mb ON_BOARD_512M_DRAM_COMPONENT \
1024Mb ON_BOARD_1024M_DRAM_COMPONENT \
2048Mb ON_BOARD_2048M_DRAM_COMPONENT
"512Mb
fi
fi
define_bool ON_BOARD_DDR_WIDTH_16 y
fi
define_bool ON_BOARD_16BIT_DRAM_BUS y
#-----------------------
# RT6855A Option
#-----------------------
comment ""
if [ "$ON_BOARD_SPI_FLASH_COMPONENT" == "y" ]; then
#choice 'Ram/Rom version' "RAM UBOOT_RAM \
# ROM UBOOT_ROM
# " ROM
#choice 'Small Uboot/Config partition' "Normal_Partition_5_sectors NORMAL_UBOOT_PARTITION \
# Small_Partition_3_sectors SMALL_UBOOT_PARTITION
# " Normal_Partition_5_sectors
define_bool UBOOT_ROM y
define_bool UBOOT_RAM n
else
define_bool UBOOT_ROM n
define_bool UBOOT_RAM y
fi
bool "Partition LAN/WAN" LAN_WAN_PARTITION
if [ "$LAN_WAN_PARTITION" = "y" ]; then
choice 'LAN/WAN Board Layout' "W/LLLL RALINK_DEMO_BOARD_PVLAN \
LLLL/W RALINK_EV_BOARD_PVLAN
"
fi
bool "Dual Image" DUAL_IMAGE_SUPPORT
if [ "$ON_BOARD_NAND_FLASH_COMPONENT" = "y" ]; then
bool "Static DRAM Parameter" DRAM_PARAMETERS
if [ "$DRAM_PARAMETERS" = "y" ]; then
if [ "$ON_BOARD_SDR" = "y" ]; then
hex " SDRAM_CFG0" DRAM_CFG0 11925282
hex " SDRAM_CFG1" DRAM_CFG1 8011088B
else
if [ "$ON_BOARD_DDR1" = "y" ]; then
hex " DDR_CFG0" DRAM_CFG0 352A2E34
hex " DDR_CFG1" DRAM_CFG1 202A2424
hex " DDR_CFG2" DDR_CFG2_SETTING 33
hex " DDR_CFG3" DDR_CFG3_SETTING 0
hex " DDR_CFG4" DDR_CFG4_SETTING 0
hex " DRAM_PAD_SETTING" DRAM_PAD_SETTING 00094054
else
if [ "$ON_BOARD_DDR2" = "y" ]; then
hex " DDR_CFG0" DRAM_CFG0 35A3238D
hex " DDR_CFG1" DRAM_CFG1 22322424
hex " DDR_CFG2" DDR_CFG2_SETTING 40000E43
hex " DDR_CFG3" DDR_CFG3_SETTING 10000400
hex " DDR_CFG4" DDR_CFG4_SETTING 0010080C
hex " DRAM_PAD_SETTING" DRAM_PAD_SETTING 00094054
fi
fi
fi
fi
fi
if [ "$UBOOT_RAM" = "y" ]; then
define_hex TEXT_BASE 0xa0200000
else
define_hex TEXT_BASE 0xBFC00000
fi
fi
#########################################################################################3
# MT7620
#########################################################################################3
if [ "$MT7620_FPGA_BOARD" = "y" -o "$MT7620_ASIC_BOARD" = "y" ]; then
define_bool MT7620_MP y
#-----------------------
# MT7620 GMAC
#-----------------------
choice 'Port 5 Connect to' "None P5_MAC_TO_NONE_MODE \
Giga_Phy(RGMII) P5_MAC_TO_PHY_MODE \
Giga_SW/iNIC(RGMII) P5_RGMII_TO_MAC_MODE \
External_CPU(MII_RvMII) P5_MII_TO_MAC_MODE \
External_CPU(RvMII_MII) P5_RMII_TO_MAC_MODE
" None
if [ "$P5_MAC_TO_PHY_MODE" = "y" ]; then
hex "GigaPHY address for Auto Polling" MAC_TO_GIGAPHY_MODE_ADDR 0x5
fi
if [ "$P5_RGMII_TO_MAC_MODE" = "y" ]; then
define_bool GPIOx_RESET_MODE y
fi
choice 'Port 4 Connect to' "None P4_MAC_TO_NONE_MODE \
Giga_Phy(RGMII) P4_MAC_TO_PHY_MODE \
Giga_SW/iNIC(RGMII) P4_RGMII_TO_MAC_MODE \
External_CPU(MII_RvMII) P4_MII_TO_MAC_MODE \
External_CPU(RvMII_MII) P4_RMII_TO_MAC_MODE
" None
if [ "$P4_MAC_TO_PHY_MODE" = "y" ]; then
hex "GigaPHY address for Auto Polling" MAC_TO_GIGAPHY_MODE_ADDR2 0x4
fi
#-----------------------
# MT7620 FLASH
#-----------------------
choice 'Flash Type' "NAND ON_BOARD_NAND_FLASH_COMPONENT \
SPI ON_BOARD_SPI_FLASH_COMPONENT
"SPI
if [ "$DUAL_IMAGE_SUPPORT" = "y" ]; then
choice 'Flash Size' "4M ON_BOARD_4M_FLASH_COMPONENT \
8M ON_BOARD_8M_FLASH_COMPONENT \
16M ON_BOARD_16M_FLASH_COMPONENT
" 4M
fi
#-----------------------
# MT7620 DRAM
#-----------------------
choice 'DRAM Type' "SDR ON_BOARD_SDR \
DDR1 ON_BOARD_DDR1 \
DDR2 ON_BOARD_DDR2
"SDR
if [ "$ON_BOARD_SDR" = "y" ]; then
choice 'DRAM Component' "64Mb ON_BOARD_64M_DRAM_COMPONENT \
128Mb ON_BOARD_128M_DRAM_COMPONENT \
256Mb ON_BOARD_256M_DRAM_COMPONENT \
512Mb ON_BOARD_512M_DRAM_COMPONENT
" 128Mb
else
if [ "$ON_BOARD_DDR1" = "y" ]; then
choice 'DDR Component' "128Mb ON_BOARD_128M_DRAM_COMPONENT \
256Mb ON_BOARD_256M_DRAM_COMPONENT \
512Mb ON_BOARD_512M_DRAM_COMPONENT \
1024Mb ON_BOARD_1024M_DRAM_COMPONENT
" 256Mb
else
if [ "$ON_BOARD_DDR2" = "y" ]; then
choice 'DDR Component' "256Mb ON_BOARD_256M_DRAM_COMPONENT \
512Mb ON_BOARD_512M_DRAM_COMPONENT \
1024Mb ON_BOARD_1024M_DRAM_COMPONENT \
2048Mb ON_BOARD_2048M_DRAM_COMPONENT
" 512Mb
fi
fi
fi
if [ "$ON_BOARD_DDR1" = "y" -o "$ON_BOARD_DDR2" = "y" ]; then
choice 'DDR Width' "8bits ON_BOARD_DDR_WIDTH_8 \
16bits ON_BOARD_DDR_WIDTH_16
" 16bits
fi
define_bool ON_BOARD_16BIT_DRAM_BUS y
#-----------------------
# MT7620 Option
#-----------------------
comment ""
define_bool PDMA_NEW y
define_bool RX_SCATTER_GATTER_DMA y
if [ "$ON_BOARD_SPI_FLASH_COMPONENT" == "y" ]; then
choice 'Ram/Rom version' "RAM UBOOT_RAM \
ROM UBOOT_ROM
" ROM
#choice 'Small Uboot/Config partition' "Normal_Partition_5_sectors NORMAL_UBOOT_PARTITION \
# Small_Partition_3_sectors SMALL_UBOOT_PARTITION
# " Normal_Partition_5_sectors
else
define_bool UBOOT_RAM y
fi
#
# Enable(uncomment) following line to enable the adjustment for CPU PLL settings in menuconfig,
# and then input: make mrproper;make menuconfig
#define_bool MT7620_CPU_PLL_PARAMETERS y
if [ "$MT7620_CPU_PLL_PARAMETERS" = "y" ]; then
if [ "$ON_BOARD_SDR" = "y" ]; then
choice 'CPU PLL source' "None CPLL_NONE \
AUX0 CPLL_FROM_480MHZ \
AUX1 CPLL_FROM_XTAL \
CONF CPLL_FROM_CONF
" None
else
choice 'CPU PLL source' "None CPLL_NONE \
AUX0 CPLL_FROM_480MHZ \
AUX1 CPLL_FROM_XTAL \
CONF CPLL_FROM_CONF
" CONF
fi
if [ "$CPLL_NONE" = "n" ]; then
define_hex CPU_PLL_PARAMETERS 1
fi
if [ "$CPLL_FROM_CONF" = "y" ]; then
choice ' PLL_MULTI_RATIO conf' "24 MT7620_PLL_MULTI_RATIO_24 \
25 MT7620_PLL_MULTI_RATIO_25 \
26 MT7620_PLL_MULTI_RATIO_26 \
27 MT7620_PLL_MULTI_RATIO_27 \
28 MT7620_PLL_MULTI_RATIO_28 \
29 MT7620_PLL_MULTI_RATIO_29 \
30 MT7620_PLL_MULTI_RATIO_30 \
" 29
if [ "$MT7620_PLL_MULTI_RATIO_24" = "y" ]; then
define_hex CPLL_MULTI_RATIO_CFG 0
fi
if [ "$MT7620_PLL_MULTI_RATIO_25" = "y" ]; then
define_hex CPLL_MULTI_RATIO_CFG 1
fi
if [ "$MT7620_PLL_MULTI_RATIO_26" = "y" ]; then
define_hex CPLL_MULTI_RATIO_CFG 2
fi
if [ "$MT7620_PLL_MULTI_RATIO_27" = "y" ]; then
define_hex CPLL_MULTI_RATIO_CFG 3
fi
if [ "$MT7620_PLL_MULTI_RATIO_28" = "y" ]; then
define_hex CPLL_MULTI_RATIO_CFG 4
fi
if [ "$MT7620_PLL_MULTI_RATIO_29" = "y" ]; then
define_hex CPLL_MULTI_RATIO_CFG 5
fi
if [ "$MT7620_PLL_MULTI_RATIO_30" = "y" ]; then
define_hex CPLL_MULTI_RATIO_CFG 6
fi
choice ' PLL_DIV_RATIO conf' "2 MT7620_PLL_DIV_RATIO_2 \
3 MT7620_PLL_DIV_RATIO_3 \
4 MT7620_PLL_DIV_RATIO_4 \
" 2
if [ "$MT7620_PLL_DIV_RATIO_2" = "y" ]; then
define_hex CPLL_DIV_RATIO_CFG 0
fi
if [ "$MT7620_PLL_DIV_RATIO_3" = "y" ]; then
define_hex CPLL_DIV_RATIO_CFG 1
fi
if [ "$MT7620_PLL_DIV_RATIO_4" = "y" ]; then
define_hex CPLL_DIV_RATIO_CFG 2
fi
#hex " SSC conf (CPLL_CFG0[4:9])" CPLL_SSC_CFG 0x7
define_hex CPLL_SSC_CFG 0x7
fi
else
#
# Force MT7620 CPU PLL : SDR: 600MHZ, DDR1/2: 580Mhz
#
if [ "$ON_BOARD_SDR" = "y" ]; then
define_bool CPLL_NONE y
else
define_bool CPLL_FROM_CONF y
define_bool CPLL_NONE n
define_hex CPU_PLL_PARAMETERS 1
define_hex CPLL_MULTI_RATIO_CFG 5
define_hex CPLL_DIV_RATIO_CFG 0
define_hex CPLL_SSC_CFG 0x7
fi
fi
bool "Dual Image" DUAL_IMAGE_SUPPORT
bool "Partition LAN/WAN" LAN_WAN_PARTITION
if [ "$LAN_WAN_PARTITION" = "y" ]; then
choice 'LAN/WAN Board Layout' "W/LLLL RALINK_DEMO_BOARD_PVLAN \
LLLL/W RALINK_EV_BOARD_PVLAN
"
fi
if [ "$ON_BOARD_NAND_FLASH_COMPONENT" = "y" ]; then
bool "Static DRAM Parameter" DRAM_PARAMETERS
if [ "$DRAM_PARAMETERS" = "y" ]; then
if [ "$ON_BOARD_SDR" = "y" ]; then
hex " SDRAM_CFG0" DRAM_CFG0 12A263A3
hex " SDRAM_CFG1" DRAM_CFG1 F80108E8
else
hex " SYSCFG1 SoC ODT(hex)" SYSCFG1_ODT 260
if [ "$ON_BOARD_DDR1" = "y" ]; then
hex " DDR_CFG0" DRAM_CFG0 34A1EB94
hex " DDR_CFG1" DRAM_CFG1 202A2324
else
hex " DDR_CFG0" DRAM_CFG0 249AA2E5
hex " DDR_CFG1" DRAM_CFG1 22322323
fi
hex " DDR_CFG2 CAS Latency" DDR_CFG2_CAS 4
hex " DDR_CFG3 DRAM ODT" DDRCFG3_ODT 0
hex " DDR_CFG3 Drive Strength" DDR_CFG3_DS 1
hex " DDR_CFG10 " DDR_CFG10_SETTING 48484848
bool " DDR_CFG11 DLL Enable Fixed Fine-grain Delay" DDR_CFG11_FFD_ENABLE n
if [ "$DDR_CFG11_FFD_ENABLE" = "y" ]; then
define_hex DDR_CFG11_FFD_EN 1
else
define_hex DDR_CFG11_FFD_EN 0
fi
bool " DDR_CFG11 DLL Enable Fixed Coarse-grain Delay" DDR_CFG11_FCD_ENABLE n
if [ "$DDR_CFG11_FCD_ENABLE" = "y" ]; then
define_hex DDR_CFG11_FCD_EN 1
else
define_hex DDR_CFG11_FCD_EN 0
fi
hex " DDR_CFG11 DLL Fixed Fine-grain Delay" DDR_CFG11_FFD 0
hex " DDR_CFG11 DLL Fixed Coarse-grain Delay" DDR_CFG11_FCD 0
hex " DDR ODT Source" DDR_ODT_SRC d
hex " DDR ODT Off Delay" DDR_ODT_OFF_DLY 2
hex " DDR ODT On Delay" DDR_ODT_ON_DLY 2
fi
fi
fi
if [ "$UBOOT_RAM" = "y" ]; then
define_hex TEXT_BASE 0x80200000
else
define_hex TEXT_BASE 0xBC000000
fi
fi
#########################################################################################3
# MT7621
#########################################################################################3
if [ "$MT7621_FPGA_BOARD" = "y" -o "$MT7621_ASIC_BOARD" = "y" ]; then
define_bool MT7621_MP y
# bypass ddr calibration in FPGA mode
if [ "$MT7621_FPGA_BOARD" = "y" ]; then
define_bool BYPASS_MTK_DDR_CAL y
fi
#-----------------------
# MT7621 GMAC
#-----------------------
choice 'Use GE1 or GE2' "GMAC1 MT7621_USE_GE1 \
GMAC2 MT7621_USE_GE2
"
if [ "$MT7621_USE_GE1" = "y" ]; then
choice 'GE1 connected to' "GE_MII_FORCE_100 GE_MII_FORCE_100 \
GE_RVMII_FORCE_100 GE_RVMII_FORCE_100 \
GE_MII_AN GE_MII_AN \
GE_RGMII_FORCE_1000 GE_RGMII_FORCE_1000 \
GE_RGMII_AN GE_RGMII_AN
"
else
choice 'GE2 connected to' " GE_MII_FORCE_100 GE_MII_FORCE_100 \
GE_RVMII_FORCE_100 GE_RVMII_FORCE_100 \
GE_MII_AN GE_MII_AN \
GE_RGMII_FORCE_1000 GE_RGMII_FORCE_1000 \
GE_RGMII_AN GE_RGMII_AN \
GE_RGMII_INTERNAL_P0_AN GE_RGMII_INTERNAL_P0_AN \
GE_RGMII_INTERNAL_P4_AN GE_RGMII_INTERNAL_P4_AN
"
fi
if [ "$GE_MII_FORCE_100" = "y" -o \
"$GE_RVMII_FORCE_100" = "y" ]; then
define_bool MAC_TO_100SW_MODE y
fi
if [ "$GE_MII_AN" = "y" -a "$MT7621_USE_GE1" = "y" ]; then
define_bool MAC_TO_100PHY_MODE y
hex "10/100 PHY address for Auto Polling" MAC_TO_GIGAPHY_MODE_ADDR 0x1e
fi
if [ "$GE_MII_AN" = "y" -a "$MT7621_USE_GE2" = "y" ]; then
define_bool MAC_TO_100PHY_MODE y
hex "10/100 PHY address for Auto Polling" MAC_TO_GIGAPHY_MODE_ADDR 0x1f
fi
if [ "$GE_RGMII_FORCE_1000" = "y" ]; then
define_bool MAC_TO_MT7530_MODE y
define_bool GPIOx_RESET_MODE y
fi
if [ "$GE_RGMII_AN" = "y" -a "$MT7621_USE_GE1" = "y" ]; then
define_bool MAC_TO_GIGAPHY_MODE y
hex "GigaPHY address for Auto Polling" MAC_TO_GIGAPHY_MODE_ADDR 0x1e
fi
if [ "$GE_RGMII_AN" = "y" -a "$MT7621_USE_GE2" = "y" ]; then
define_bool MAC_TO_GIGAPHY_MODE y
hex "GigaPHY address for Auto Polling" MAC_TO_GIGAPHY_MODE_ADDR 0x1f
fi
if [ "$GE_RGMII_INTERNAL_P0_AN" = "y" -a "$MT7621_USE_GE2" = "y" ]; then
define_bool MAC_TO_GIGAPHY_MODE y
define_hex MAC_TO_GIGAPHY_MODE_ADDR 0x0
fi
if [ "$GE_RGMII_INTERNAL_P4_AN" = "y" -a "$MT7621_USE_GE2" = "y" ]; then
define_bool MAC_TO_GIGAPHY_MODE y
define_hex MAC_TO_GIGAPHY_MODE_ADDR 0x4
fi
#-----------------------
# MT7621 FLASH
#-----------------------
choice 'Flash Type' "NAND ON_BOARD_NAND_FLASH_COMPONENT \
SPI ON_BOARD_SPI_FLASH_COMPONENT
"SPI
if [ "$ON_BOARD_NAND_FLASH_COMPONENT" = "y" ]; then
define_bool ON_BOARD_NAND_BOOTSTRAP y
#choice 'NAND parameters' "BootStrap ON_BOARD_NAND_BOOTSTRAP \
# Header ON_BOARD_NAND_HEADER
# "BootStrap
fi
if [ "$ON_BOARD_NAND_HEADER" = "y" ]; then
define_bool NAND_INFO_HEADER y
choice 'NAND page size' "2KB NAND_PAGESIZE_2048 \
4KB NAND_PAGESIZE_4096 \
" 2
if [ "$NAND_PAGESIZE_2048" = "y" ]; then
define_hex NAND_PAGESIZE_INDEX 1
fi
if [ "$NAND_PAGESIZE_4096" = "y" ]; then
define_hex NAND_PAGESIZE_INDEX 2
fi
choice 'NAND address length' "4 NAND_ADDRLEN_4 \
5 NAND_ADDRLEN_5 \
6 NAND_ADDRLEN_6 \
" 4
if [ "$NAND_ADDRLEN_4" = "y" ]; then
define_hex NAND_ADDRLEN_INDEX 0
fi
if [ "$NAND_ADDRLEN_5" = "y" ]; then
define_hex NAND_ADDRLEN_INDEX 1
fi
if [ "$NAND_ADDRLEN_6" = "y" ]; then
define_hex NAND_ADDRLEN_INDEX 2
fi
choice 'NAND spare size' "64B NAND_SPARESIZE_64 \
128B NAND_SPARESIZE_128 \
224B NAND_SPARESIZE_224 \
" 128B
if [ "$NAND_SPARESIZE_64" = "y" ]; then
define_hex NAND_SPARESIZE_INDEX 0
fi
if [ "$NAND_SPARESIZE_128" = "y" ]; then
define_hex NAND_SPARESIZE_INDEX 1
fi
if [ "$NAND_SPARESIZE_224" = "y" ]; then
define_hex NAND_SPARESIZE_INDEX 2
fi
choice 'NAND total size' "64MB NAND_TOTALSIZE_64MB \
128MB NAND_TOTALSIZE_128MB \
256MB NAND_TOTALSIZE_256MB \
512MB NAND_TOTALSIZE_512MB \
1GB NAND_TOTALSIZE_1GB \
2GB NAND_TOTALSIZE_2GB \
4GB NAND_TOTALSIZE_4GB \
" 1GB
if [ "$NAND_TOTALSIZE_64MB" = "y" ]; then
define_hex NAND_TOTALSIZE_INDEX 0
fi
if [ "$NAND_TOTALSIZE_128MB" = "y" ]; then
define_hex NAND_TOTALSIZE_INDEX 1
fi
if [ "$NAND_TOTALSIZE_256MB" = "y" ]; then
define_hex NAND_TOTALSIZE_INDEX 2
fi
if [ "$NAND_TOTALSIZE_256MB" = "y" ]; then
define_hex NAND_TOTALSIZE_INDEX 3
fi
if [ "$NAND_TOTALSIZE_512MB" = "y" ]; then
define_hex NAND_TOTALSIZE_INDEX 4
fi
if [ "$NAND_TOTALSIZE_1GB" = "y" ]; then
define_hex NAND_TOTALSIZE_INDEX 5
fi
if [ "$NAND_TOTALSIZE_2GB" = "y" ]; then
define_hex NAND_TOTALSIZE_INDEX 6
fi
choice 'NAND block size' "64KB NAND_BLOCKSIZE_64KB \
128KB NAND_BLOCKSIZE_128KB \
256KB NAND_BLOCKSIZE_256KB \
512KB NAND_BLOCKSIZE_512KB \
" 128KB
if [ "$NAND_BLOCKSIZE_64KB" = "y" ]; then
define_hex NAND_BLOCKSIZE_INDEX 0
fi
if [ "$NAND_BLOCKSIZE_128KB" = "y" ]; then
define_hex NAND_BLOCKSIZE_INDEX 1
fi
if [ "$NAND_BLOCKSIZE_256KB" = "y" ]; then
define_hex NAND_BLOCKSIZE_INDEX 2
fi
if [ "$NAND_BLOCKSIZE_512KB" = "y" ]; then
define_hex NAND_BLOCKSIZE_INDEX 3
fi
hex "NAND Access timing (Hex)" NAND_ACCTIME 0x44433
fi
if [ "$DUAL_IMAGE_SUPPORT" = "y" ]; then
choice 'Flash Size' "4M ON_BOARD_4M_FLASH_COMPONENT \
8M ON_BOARD_8M_FLASH_COMPONENT \
16M ON_BOARD_16M_FLASH_COMPONENT
" 4M
fi
define_bool ON_BOARD_DDR3 y
define_bool ON_BOARD_DDR_WIDTH_16 y
define_bool ON_BOARD_16BIT_DRAM_BUS y
choice 'DDR Component' "512Mb ON_BOARD_512M_DRAM_COMPONENT \
1024Mb ON_BOARD_1024M_DRAM_COMPONENT \
2048Mb ON_BOARD_2048M_DRAM_COMPONENT \
4096Mb ON_BOARD_4096M_DRAM_COMPONENT
" 1024Mb
choice 'DRAM Speed' "1200Mhz MT7621_DDR_1200MHZ \
1066Mhz MT7621_DDR_1066MHZ \
800Mhz MT7621_DDR_800MHZ \
400Mhz MT7621_DDR_400MHZ
"800Mhz
#================
#1PLL=10, 20, 30
#3PLL=11, 21, 31
#================
if [ "$MT7621_DDR_1200MHZ" = "y" ]; then
define_hex MT7621_DDR_SPEED 11
fi
if [ "$MT7621_DDR_1066MHZ" = "y" ]; then
define_hex MT7621_DDR_SPEED 21
fi
if [ "$MT7621_DDR_800MHZ" = "y" ]; then
define_hex MT7621_DDR_SPEED 31
fi
if [ "$MT7621_DDR_400MHZ" = "y" ]; then
define_hex MT7621_DDR_SPEED 41
fi
choice 'CPU Frequency' "900Mhz MT7621_CPU_900MHZ \
880Mhz MT7621_CPU_880MHZ \
875Mhz MT7621_CPU_875MHZ \
800Mhz MT7621_CPU_800MHZ \
500Mhz MT7621_CPU_500MHZ \
50Mhz MT7621_CPU_50MHZ"
800Mhz
if [ "$MT7621_CPU_900MHZ" = "y" ]; then
define_hex MT7621_CPU_FREQUENCY 384
fi
if [ "$MT7621_CPU_880MHZ" = "y" ]; then
define_hex MT7621_CPU_FREQUENCY 370
fi
if [ "$MT7621_CPU_875MHZ" = "y" ]; then
define_hex MT7621_CPU_FREQUENCY 36B
fi
if [ "$MT7621_CPU_800MHZ" = "y" ]; then
define_hex MT7621_CPU_FREQUENCY 320
fi
if [ "$MT7621_CPU_500MHZ" = "y" ]; then
define_hex MT7621_CPU_FREQUENCY 1F4
fi
if [ "$MT7621_CPU_50MHZ" = "y" ]; then
define_hex MT7621_CPU_FREQUENCY 32
fi
choice 'UART baud rate' "57600bps MT7621_UART_57600 \
115200bps MT7621_UART_115200"
115200bps
if [ "$MT7621_UART_57600" = "y" ]; then
define_int MT7621_UART_BAUD 57600
define_int MT7621_UCLK_20M 1
fi
if [ "$MT7621_UART_115200" = "y" ]; then
define_int MT7621_UART_BAUD 115200
define_int MT7621_UCLK_20M 0
fi
#-----------------------
# MT7621 Option
#-----------------------
comment ""
define_bool PDMA_NEW y
define_bool RX_SCATTER_GATTER_DMA y
if [ "$ON_BOARD_SPI_FLASH_COMPONENT" == "y" ]; then
choice 'Ram/Rom version' "RAM UBOOT_RAM \
ROM UBOOT_ROM
" ROM
else
define_bool UBOOT_RAM y
fi
bool "Dual Image" DUAL_IMAGE_SUPPORT
bool "Dual Core Support" RALINK_DUAL_CORE_FUN
define_bool RALINK_DUAL_VPE_FUN y
bool "Partition LAN/WAN" LAN_WAN_PARTITION
if [ "$LAN_WAN_PARTITION" = "y" ]; then
choice 'LAN/WAN Board Layout' "W/LL RALINK_DEMO_BOARD_PVLAN"
fi
bool "DDR ACTiming Setting" DDR_ACT_SETTING
if [ "$DDR_ACT_SETTING" = "y" ]; then
choice 'DDR Chip' "\
DDR3_Default(1Gb) DEFAULT_DDR3_1024M \
DDR3_Default(2Gb) DEFAULT_DDR3_2048M \
DDR3_Default(4Gb) DEFAULT_DDR3_4096M \
DDR2_Default(512Mb) DEFAULT_DDR2_512M \
DDR2_1066_W9751G6KB(512Mb) W9751G6KB_A02_DDR2_1066_512M \
DDR2_Default(1Gb) DEFAULT_DDR2_1024M \
DDR2_W971GG6KB25(1Gb) W971GG6KB25_DDR2_800_1024M \
DDR2_1066_W971GG6KB18(1Gb) W971GG6KB18_DDR2_1066_1024M"
if [ "$DEFAULT_DDR3_1024M" = "y" ]; then
define_string DDR_CHIP DEFAULT_DDR3_1024M
fi
if [ "$DEFAULT_DDR3_2048M" = "y" ]; then
define_string DDR_CHIP DEFAULT_DDR3_2048M
fi
if [ "$DEFAULT_DDR3_4096M" = "y" ]; then
define_string DDR_CHIP DEFAULT_DDR3_4096M
fi
if [ "$DEFAULT_DDR2_512M" = "y" ]; then
define_string DDR_CHIP DEFAULT_DDR2_512M
fi
if [ "$W9751G6KB_A02_DDR2_1066_512M" = "y" ]; then
define_string DDR_CHIP W9751G6KB_A02_DDR2_1066_512M
fi
if [ "$W971GG6KB25_DDR2_800_1024M" = "y" ]; then
define_string DDR_CHIP W971GG6KB25_DDR2_800_1024M
fi
if [ "$W971GG6KB18_DDR2_1066_1024M" = "y" ]; then
define_string DDR_CHIP W971GG6KB18_DDR2_1066_1024M
fi
if [ "$DEFAULT_DDR2_1024M" = "y" ]; then
define_string DDR_CHIP DEFAULT_DDR2_1024M
fi
fi
if [ "$UBOOT_RAM" = "y" ]; then
define_hex TEXT_BASE 0xA0200000
else
define_hex TEXT_BASE 0xBFC00000
fi
fi
#########################################################################################3
# MT7628
#########################################################################################3
if [ "$MT7628_FPGA_BOARD" = "y" -o "$MT7628_ASIC_BOARD" = "y" ]; then
define_bool MT7628_MP y
#-----------------------
# MT7628 GMAC
#-----------------------
define_bool P5_MAC_TO_NONE_MODE y
define_bool P4_MAC_TO_NONE_MODE y
#-----------------------
# MT7628 FLASH
#-----------------------
define_bool ON_BOARD_SPI_FLASH_COMPONENT y
if [ "$DUAL_IMAGE_SUPPORT" = "y" ]; then
choice 'Flash Size' "4M ON_BOARD_4M_FLASH_COMPONENT \
8M ON_BOARD_8M_FLASH_COMPONENT \
16M ON_BOARD_16M_FLASH_COMPONENT
" 4M
fi
#-----------------------
# MT7628 DRAM
#-----------------------
choice 'Is Print' "No No_Print\
Yes Has_Print
"No
choice 'HLK_TYPE' "7688A HLK_7688A\
7628N HLK_7628N\
7688AS HLK_7688AS\
7628NS HLK_7628NS\
7688AL HLK_7688AL\
7628NL HLK_7628NL\
7688AF HLK_7688AF\
7628NF HLK_7628NF\
GD01 HLK_GD01\
RM04N HLK_RM04N
" 7688A
choice 'DRAM Type' "DDR2 ON_BOARD_DDR2
" DDR2
if [ "$HLK_7688A" = "y" -o "$HLK_7628N" = "y" -o "$HLK_7688AL" = "y" -o "$HLK_7628NL" = "y" ]; then
choice 'DDR Component' "1024Mb ON_BOARD_1024M_DRAM_COMPONENT
" 1024Mb
fi
if [ "$HLK_7688AS" = "y" -o "$HLK_7628NS" = "y" ]; then
choice 'DDR Component' "512Mb ON_BOARD_512M_DRAM_COMPONENT
" 512Mb
fi
if [ "$HLK_7688AF" = "y" -o "$HLK_7628NF" = "y" ]; then
choice 'DDR Component' "2048Mb ON_BOARD_2048M_DRAM_COMPONENT
" 2048Mb
fi
choice 'DDR Width' "16bits ON_BOARD_DDR_WIDTH_16
" 16bits
choice 'FlashMode Select' "3Byte USE_3BYTE\
4Byte USE_4BYTE
"3Byte
define_bool ON_BOARD_16BIT_DRAM_BUS y
#-----------------------
# MT7628 Option
#-----------------------
comment ""
#define_bool PDMA_NEW y
#define_bool RX_SCATTER_GATTER_DMA y
#if [ "$ON_BOARD_SPI_FLASH_COMPONENT" == "y" ]; then
choice 'Ram/Rom version' "RAM UBOOT_RAM \
ROM UBOOT_ROM
" ROM
#choice 'Small Uboot/Config partition' "Normal_Partition_5_sectors NORMAL_UBOOT_PARTITION \
# Small_Partition_3_sectors SMALL_UBOOT_PARTITION
# " Normal_Partition_5_sectors
#else
#define_bool UBOOT_RAM y
#fi
#
# Enable(uncomment) following line to enable the adjustment for CPU PLL settings in menuconfig,
# and then input: make mrproper;make menuconfig
define_bool MT7628_CPU_PLL_PARAMETERS y
if [ "$MT7628_CPU_PLL_PARAMETERS" = "y" ]; then
choice 'CPU clock source' "CPLL CPUCLK_FROM_CPLL \
BPLL CPUCLK_FROM_BPLL \
XTAL CPUCLK_FROM_XTAL
" CPLL
hex "Fractional divider for clock source (0x1~0xA)" CPU_FRAC_DIV 0x1
else
define_bool CPUCLK_FROM_CPLL y
define_hex CPU_FRAC_DIV 0x1
fi
bool "Dual Image" DUAL_IMAGE_SUPPORT
bool "Partition LAN/WAN" LAN_WAN_PARTITION
if [ "$LAN_WAN_PARTITION" = "y" ]; then
choice 'LAN/WAN Board Layout' "W/LLLL RALINK_DEMO_BOARD_PVLAN \
LLLL/W RALINK_EV_BOARD_PVLAN
"
fi
if [ "$UBOOT_RAM" = "y" ]; then
define_hex TEXT_BASE 0x80200000
else
define_hex TEXT_BASE 0xBC000000
fi
fi
##################################################################################################
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