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RustSBI/010 Editor 模板

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BL602Image.bt 9.60 KB
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//------------------------------------------------
//--- 010 Editor v12.0.1 Binary Template
//
// File: BL602Image
// Authors: Xiao Ren
// Version: 0.0.0
// Purpose:
// Category:
// File Mask:
// ID Bytes:
// History:
//------------------------------------------------
RequiresVersion( 12 );
/**** STRUCTURES ****/
struct HAL_BOOTHEADER;
struct HAL_FLASH_CONFIG;
struct SPI_FLASH_CFG_TYPE;
struct HAL_PLL_CONFIG;
struct HAL_SYS_CLK_CONFIG;
struct HAL_BASIC_CONFIG;
typedef struct {
local int64 start = FTell();
uint32 magic <format=hex,fgcolor=cLtRed,bgcolor=cNone>;
uint32 revision;
HAL_FLASH_CONFIG flashCfg;
HAL_PLL_CONFIG clkCfg;
HAL_BASIC_CONFIG basicCfg;
uint32 reserved[2] <fgcolor=cGray>;
local int64 end = FTell();
local uint32 checksum = Checksum(CHECKSUM_CRC32,start,end - start);
uint32 crc32 <format=hex,fgcolor=cLtBlue,bgcolor=cNone>;
if(checksum != crc32) {
Warning("invalid crc32 for HAL_BOOTHEADER!");
}
} HAL_BOOTHEADER;
typedef struct {
uint32 magic <format=hex,fgcolor=cLtRed,bgcolor=cNone>;
SPI_FLASH_CFG_TYPE cfg;
local uint32 checksum = Checksum(CHECKSUM_CRC32,startof(cfg),sizeof(cfg));
uint32 crc32 <format=hex,fgcolor=cLtBlue,bgcolor=cNone>;
if(checksum != crc32) {
Warning("invalid crc32 for HAL_FLASH_CONFIG!");
}
} HAL_FLASH_CONFIG;
// source: bouffalo boot2 project
typedef struct {
ubyte ioMode <comment="Serail flash uint32erface mode,bit0-3:IF mode,bit4:unwrap,bit5:32-bits addr mode support">;
ubyte cReadSupport <comment="Support continuous read mode,bit0:continuous read mode support,bit1:read mode cfg">;
ubyte clkDelay <comment="SPI clock delay,bit0-3:delay,bit4-6:pad delay">;
ubyte clkInvert <comment="SPI clock phase invert,bit0:clck invert,bit1:rx invert,bit2-4:pad delay,bit5-7:pad delay">;
ubyte resetEnCmd <comment="Flash enable reset command">;
ubyte resetCmd <comment="Flash reset command">;
ubyte resetCreadCmd <comment="Flash reset continuous read command">;
ubyte resetCreadCmdSize <comment="Flash reset continuous read command size">;
ubyte jedecIdCmd <comment="JEDEC ID command">;
ubyte jedecIdCmdDmyClk <comment="JEDEC ID command dummy clock">;
ubyte enter32BitsAddrCmd <comment="Enter 32-bits addr command">;
ubyte exit32BitsAddrCmd <comment="Exit 32-bits addr command">;
ubyte sectorSize <comment="*1024bytes">;
ubyte mid <comment="Manufacturer ID">;
uint16 pageSize <comment="Page size">;
ubyte chipEraseCmd <comment="Chip erase cmd">;
ubyte sectorEraseCmd <comment="Sector erase command">;
ubyte blk32EraseCmd <comment="Block 32K erase command,some Micron not support">;
ubyte blk64EraseCmd <comment="Block 64K erase command">;
ubyte writeEnableCmd <comment="Need before every erase or program">;
ubyte pageProgramCmd <comment="Page program cmd">;
ubyte qpageProgramCmd <comment="QIO page program cmd">;
ubyte qppAddrMode <comment="QIO page program address mode">;
ubyte fastReadCmd <comment="Fast read command">;
ubyte frDmyClk <comment="Fast read command dummy clock">;
ubyte qpiFastReadCmd <comment="QPI fast read command">;
ubyte qpiFrDmyClk <comment="QPI fast read command dummy clock">;
ubyte fastReadDoCmd <comment="Fast read dual output command">;
ubyte frDoDmyClk <comment="Fast read dual output command dummy clock">;
ubyte fastReadDioCmd <comment="Fast read dual io comamnd">;
ubyte frDioDmyClk <comment="Fast read dual io command dummy clock">;
ubyte fastReadQoCmd <comment="Fast read quad output comamnd">;
ubyte frQoDmyClk <comment="Fast read quad output comamnd dummy clock">;
ubyte fastReadQioCmd <comment="Fast read quad io comamnd">;
ubyte frQioDmyClk <comment="Fast read quad io comamnd dummy clock">;
ubyte qpiFastReadQioCmd <comment="QPI fast read quad io comamnd">;
ubyte qpiFrQioDmyClk <comment="QPI fast read QIO dummy clock">;
ubyte qpiPageProgramCmd <comment="QPI program command">;
ubyte writeVregEnableCmd <comment="Enable write reg">;
ubyte wrEnableIndex <comment="Write enable register index">;
ubyte qeIndex <comment="Quad mode enable register index">;
ubyte busyIndex <comment="Busy status register index">;
ubyte wrEnableBit <comment="Write enable bit pos">;
ubyte qeBit <comment="Quad enable bit pos">;
ubyte busyBit <comment="Busy status bit pos">;
ubyte wrEnableWriteRegLen <comment="Register length of write enable">;
ubyte wrEnableReadRegLen <comment="Register length of write enable status">;
ubyte qeWriteRegLen <comment="Register length of contain quad enable">;
ubyte qeReadRegLen <comment="Register length of contain quad enable status">;
ubyte releasePowerDown <comment="Release power down command">;
ubyte busyReadRegLen <comment="Register length of contain busy status">;
ubyte readRegCmd[4] <comment="Read register command buffer">;
ubyte writeRegCmd[4] <comment="Write register command buffer">;
ubyte enterQpi <comment="Enter qpi command">;
ubyte exitQpi <comment="Exit qpi command">;
ubyte cReadMode <comment="Config data for continuous read mode">;
ubyte cRExit <comment="Config data for exit continuous read mode">;
ubyte burstWrapCmd <comment="Enable burst wrap command">;
ubyte burstWrapCmdDmyClk <comment="Enable burst wrap command dummy clock">;
ubyte burstWrapDataMode <comment="Data and address mode for this command">;
ubyte burstWrapData <comment="Data to enable burst wrap">;
ubyte deBurstWrapCmd <comment="Disable burst wrap command">;
ubyte deBurstWrapCmdDmyClk <comment="Disable burst wrap command dummy clock">;
ubyte deBurstWrapDataMode <comment="Data and address mode for this command">;
ubyte deBurstWrapData <comment="Data to disable burst wrap">;
uint16 timeEsector <comment="4K erase time">;
uint16 timeE32k <comment="32K erase time">;
uint16 timeE64k <comment="64K erase time">;
uint16 timePagePgm <comment="Page program time">;
uint16 timeCe <comment="Chip erase time in ms">;
ubyte pdDelay <comment="Release power down command delay time for wake up">;
ubyte qeData <comment="QE set data">;
} SPI_FLASH_CFG_TYPE;
typedef struct {
uint32 magic <format=hex,fgcolor=cLtRed,bgcolor=cNone>;
HAL_SYS_CLK_CONFIG cfg;
local uint32 checksum = Checksum(CHECKSUM_CRC32,startof(cfg),sizeof(cfg));
uint32 crc32 <format=hex,fgcolor=cLtBlue,bgcolor=cNone>;
if(checksum != crc32) {
Warning("invalid crc32 for HAL_PLL_CONFIG");
};
} HAL_PLL_CONFIG;
typedef struct {
ubyte xtal_type;
ubyte pll_clk;
ubyte hclk_div;
ubyte bclk_div;
ubyte flash_clk_type;
ubyte flash_clk_div;
ubyte rsvd[2];
} HAL_SYS_CLK_CONFIG;
typedef struct {
uint32 sign : 2 <comment="for sign">;
uint32 encrypt_type : 2 <comment="for encrypt">;
uint32 key_sel : 2 <comment="for key sel in boot interface">;
uint32 rsvd6_7 : 2 <comment="rsvd6_7">;
uint32 no_segment : 1 <comment="no segment info">;
uint32 cache_select : 1 <comment="cache enable">;
uint32 notload_in_bootrom : 1 <comment="notload in bootrom">;
uint32 aes_region_lock : 1 <comment="aes region lock">;
uint32 cache_way_disable : 4 <comment="cache way disable info">;
uint32 crc_ignore : 1 <comment="ignore crc">;
uint32 hash_ignore : 1 <comment="hash ignore">;
uint32 halt_ap : 1 <comment="halt ap">;
uint32 rsvd19_31 : 13 <comment="rsvd">;
uint32 img_len <comment="image length or segment count">;
uint32 rsvd0 <comment="rsvd">;
uint32 img_start <format=hex, comment="image address on flash">;
uint32 hash[8] <comment="hash of the image">;
} HAL_BASIC_CONFIG;
/**** PARSING CODE ****/
LittleEndian();
HAL_BOOTHEADER BootHeader <bgcolor=cLtPurple>;
if (BootHeader.magic != 0x504e4642)
{
Warning("Invalid Magic.\n");
return 1;
}
if(BootHeader.basicCfg.img_len < FileSize()) {
FSeek(BootHeader.basicCfg.img_start);
ubyte image[BootHeader.basicCfg.img_len] <comment="Image data",fgcolor=cDkAqua>;
local char s[64 + 1];
local int ret = ChecksumAlgStr(CHECKSUM_SHA256, s, startof(image),sizeof(image));
if(ret) {
local char ChecksumAlgStrResult[64 + 1];
local quad k;
for (k = 0; k < 8; k++) {
ChecksumAlgStrResult[k * 8 + 1] = (char)(BootHeader.basicCfg.hash[k] & 0xF);
ChecksumAlgStrResult[k * 8 + 0] = (char)((BootHeader.basicCfg.hash[k] >> 4) & 0xF);
ChecksumAlgStrResult[k * 8 + 3] = (char)((BootHeader.basicCfg.hash[k] >> 8) & 0xF);
ChecksumAlgStrResult[k * 8 + 2] = (char)((BootHeader.basicCfg.hash[k] >> 12) & 0xF);
ChecksumAlgStrResult[k * 8 + 5] = (char)((BootHeader.basicCfg.hash[k] >> 16) & 0xF);
ChecksumAlgStrResult[k * 8 + 4] = (char)((BootHeader.basicCfg.hash[k] >> 20) & 0xF);
ChecksumAlgStrResult[k * 8 + 7] = (char)((BootHeader.basicCfg.hash[k] >> 24) & 0xF);
ChecksumAlgStrResult[k * 8 + 6] = (char)((BootHeader.basicCfg.hash[k] >> 28) & 0xF);
}
for (k = 0; k < 64; k++) {
if (ChecksumAlgStrResult[k] >= 10) {
ChecksumAlgStrResult[k] = ChecksumAlgStrResult[k] + 'A' - 10;
} else {
ChecksumAlgStrResult[k] += '0';
}
}
ChecksumAlgStrResult[64] = '\0';
if(Strcmp(s, ChecksumAlgStrResult)) {
Warning("invalid sha256 for the image!");
}
} else {
Warning("hash check for the image failure");
}
} else {
Warning("Segment data appears to either overlap with header, exist after the end of the file or overlap with the end of the file!");
}
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