diff --git a/CMakeLists.txt b/CMakeLists.txt index b359967c3dffaa184a5f1510ce5b0d205054739e..838c55e6b863d63dc8a031664b1962b6b5124946 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -96,12 +96,14 @@ endif() # -----------------------CMAKE FLAGS--------------------------------- set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -std=c++17 -fno-common") if(${CMAKE_BUILD_TYPE} STREQUAL "RELEASE") + add_definitions("-DLLVM_BISHENGCLANGUAGE=1") set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -O2 -fno-strict-aliasing -D_FORTIFY_SOURCE=2") set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -O2 -fno-strict-aliasing -D_FORTIFY_SOURCE=2") elseif(${CMAKE_BUILD_TYPE} STREQUAL "DEBUG") add_definitions("-DDEBUG") + add_definitions("-DLLVM_BISHENGCLANGUAGE=1") set(CMAKE_CXX_FLAGS_DEBUG "-g3 -gdwarf-4") set(CMAKE_C_FLAGS_DEBUG "-g3 -gdwarf-4") set(CMAKE_CXX_FLAGS @@ -126,6 +128,11 @@ set(CMAKE_C_FLAGS set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -Wall -fstack-protector-strong -fPIC -fPIE -pipe -Wno-c99-designator -Wno-range-loop-construct -Werror -Wdate-time -Wfloat-equal ${DESIGNATOR} -DMIR_FEATURE_FULL=1") +if($ENV{BISHENGC_GET_OS_VERSION} STREQUAL "SUSE") + set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} --gcc-toolchain=/opt/buildtools/gcc-7.3.0/") + set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} --gcc-toolchain=/opt/buildtools/gcc-7.3.0/") +endif() + if(HOST_ARCH STREQUAL 64) set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -m64") set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -m64") diff --git a/build/envsetup.sh b/build/envsetup.sh index 529f3388edeaa99142e6a425692ad7fb6608d2b2..a18bf493e4e2aaf7e3d31096c758b044d490c708 100644 --- a/build/envsetup.sh +++ b/build/envsetup.sh @@ -118,7 +118,7 @@ export MAPLE_BUILD_OUTPUT=${MAPLE_ROOT}/output/${MAPLE_BUILD_TYPE} export MAPLE_EXECUTE_BIN=${MAPLE_ROOT}/output/${MAPLE_BUILD_TYPE}/bin export TEST_BIN=${CASE_ROOT}/driver/script export PATH=$PATH:${MAPLE_EXECUTE_BIN}:${TEST_BIN} - +export BISHENGC_GET_OS_VERSION="$(lsb_release -i | awk '{print $3}')" # Enable Autocompletion for maple driver if [ -f $MAPLE_ROOT/tools/maple_autocompletion.sh ]; then source ${MAPLE_ROOT}/tools/maple_autocompletion.sh diff --git a/src/hir2mpl/ast_input/clang/include/ast_builtin_func.def b/src/hir2mpl/ast_input/clang/include/ast_builtin_func.def index dfcbd861df21868d30a5e445cacc721072186782..b7ecf9e87735e23f873411f5d649362dcafd2f6e 100644 --- a/src/hir2mpl/ast_input/clang/include/ast_builtin_func.def +++ b/src/hir2mpl/ast_input/clang/include/ast_builtin_func.def @@ -18,6 +18,7 @@ BUILTIN_FUNC(__memcpy_chk) BUILTIN_FUNC(__memset_chk) BUILTIN_FUNC(__strncpy_chk) BUILTIN_FUNC(__strcpy_chk) +BUILTIN_FUNC(__stpncpy_chk) BUILTIN_FUNC(__stpcpy_chk) BUILTIN_FUNC(__vsprintf_chk) BUILTIN_FUNC(__vsnprintf_chk) diff --git a/src/hir2mpl/ast_input/clang/include/ast_expr.h b/src/hir2mpl/ast_input/clang/include/ast_expr.h index c67407780b68ef0004464d40ea66b6b5d7aecd57..b0af1ec3903581089ac522df20673ba612542b0e 100644 --- a/src/hir2mpl/ast_input/clang/include/ast_expr.h +++ b/src/hir2mpl/ast_input/clang/include/ast_expr.h @@ -17,11 +17,20 @@ #include #include "ast_op.h" #include "feir_stmt.h" +#include "pragma_status.h" namespace maple { class ASTDecl; class ASTFunc; class ASTStmt; +class ASTCallExpr; + +using FuncPtrClibFunc = UniqueFEIRExpr (ASTCallExpr::*)(std::list &stmts) const; +struct ClibFuncProtoTypeStruct { + FuncPtrClibFunc funcPtrClibFunc; + MIRType *retInfo; + std::vector argInfo; +}; struct ASTValue { union Value { @@ -1207,6 +1216,14 @@ class ASTDesignatedInitUpdateExpr : public ASTExpr { initListType = nullptr; } + void SetConstArraySize(int64_t size) { + constArraySize = size; + } + + int64_t GetConstArraySize() const { + return constArraySize; + } + void SetBaseExpr(ASTExpr *astExpr) { baseExpr = astExpr; } @@ -1246,6 +1263,7 @@ class ASTDesignatedInitUpdateExpr : public ASTExpr { ASTExpr *updaterExpr = nullptr; MIRType *initListType = nullptr; std::string initListVarName; + int64_t constArraySize = 0; }; class ASTAssignExpr : public ASTBinaryOperatorExpr { @@ -1356,6 +1374,10 @@ class ASTCallExpr : public ASTExpr { funcDecl = decl; } + const ASTFunc &GetFuncDecl() const { + return *funcDecl; + } + void SetReturnVarAttrs(const MapleGenericAttrs &attrs) { returnVarAttrs = attrs; } @@ -1364,8 +1386,17 @@ class ASTCallExpr : public ASTExpr { return returnVarAttrs; } + void SetPreferInlinePI(PreferInlinePI state) { + preferInlinePI = state; + } + + PreferInlinePI GetPreferInlinePI() const { + return preferInlinePI; + } + std::string CvtBuiltInFuncName(std::string builtInName) const; UniqueFEIRExpr ProcessBuiltinFunc(std::list &stmts, bool &isFinish) const; + UniqueFEIRExpr ProcessLibcFunc(std::list &stmts, bool &isFinish) const; std::unique_ptr GenCallStmt() const; void AddArgsExpr(const std::unique_ptr &callStmt, std::list &stmts) const; UniqueFEIRExpr AddRetExpr(const std::unique_ptr &callStmt) const; @@ -1377,7 +1408,8 @@ class ASTCallExpr : public ASTExpr { private: using FuncPtrBuiltinFunc = UniqueFEIRExpr (ASTCallExpr::*)(std::list &stmts) const; - static std::unordered_map InitBuiltinFuncPtrMap(); + static std::unordered_map &GetOrCreateBuiltinFuncPtrMap(); + static std::unordered_map &GetOrCreateClibFuncProtoTypeMap(); static UniqueFEIRExpr EmitBuiltinVectorLoad(std::list &stmts, bool &isFinish, const MapleVector &callArgs, MIRType &mirType, const std::pair &funcMessage); @@ -1400,13 +1432,13 @@ class ASTCallExpr : public ASTExpr { bool genTempVar = true) const; UniqueFEIRExpr CreateIntrinsicCallAssignedForC(std::list &stmts, MIRIntrinsicID argIntrinsicID) const; UniqueFEIRExpr CreateBinaryExpr(std::list &stmts, Opcode op) const; - UniqueFEIRExpr EmitBuiltinFunc(std::list &stmts) const; UniqueFEIRExpr EmitBuiltinRotate(std::list &stmts, PrimType rotType, bool isLeft) const; #define EMIT_BUILTIIN_FUNC(FUNC) EmitBuiltin##FUNC(std::list &stmts) const UniqueFEIRExpr EMIT_BUILTIIN_FUNC(Ctz); UniqueFEIRExpr EMIT_BUILTIIN_FUNC(Ctzl); UniqueFEIRExpr EMIT_BUILTIIN_FUNC(Clz); UniqueFEIRExpr EMIT_BUILTIIN_FUNC(Clzl); + UniqueFEIRExpr EMIT_BUILTIIN_FUNC(ConstantP); UniqueFEIRExpr EMIT_BUILTIIN_FUNC(Popcount); UniqueFEIRExpr EMIT_BUILTIIN_FUNC(Popcountl); @@ -1429,11 +1461,13 @@ class ASTCallExpr : public ASTExpr { UniqueFEIRExpr EMIT_BUILTIIN_FUNC(AlignDown); UniqueFEIRExpr EMIT_BUILTIIN_FUNC(Alloca); + UniqueFEIRExpr EMIT_BUILTIIN_FUNC(AllocaWithAlign); UniqueFEIRExpr EMIT_BUILTIIN_FUNC(Expect); UniqueFEIRExpr EMIT_BUILTIIN_FUNC(VaStart); UniqueFEIRExpr EMIT_BUILTIIN_FUNC(VaEnd); UniqueFEIRExpr EMIT_BUILTIIN_FUNC(VaCopy); UniqueFEIRExpr EMIT_BUILTIIN_FUNC(Prefetch); + UniqueFEIRExpr EMIT_BUILTIIN_FUNC(ClearCache); UniqueFEIRExpr EMIT_BUILTIIN_FUNC(Abs); UniqueFEIRExpr EMIT_BUILTIIN_FUNC(ACos); UniqueFEIRExpr EMIT_BUILTIIN_FUNC(ACosf); @@ -1565,7 +1599,9 @@ UniqueFEIRExpr EmitBuiltin##STR(std::list &stmts) const; UniqueFEIRExpr Emit2FEExprImpl(std::list &stmts) const override; - static std::unordered_map builtingFuncPtrMap; + static std::unordered_map builtinFuncPtrMap; + + static std::unordered_map clibFuncProtoTypeMap; MapleVector args; ASTExpr *calleeExpr = nullptr; MapleString funcName; @@ -1574,6 +1610,7 @@ UniqueFEIRExpr EmitBuiltin##STR(std::list &stmts) const; MapleString varName; ASTFunc *funcDecl = nullptr; MapleGenericAttrs returnVarAttrs; + PreferInlinePI preferInlinePI = PreferInlinePI::kNonePI; }; class ASTParenExpr : public ASTExpr { diff --git a/src/hir2mpl/ast_input/clang/include/ast_parser.h b/src/hir2mpl/ast_input/clang/include/ast_parser.h index afd45b67548cbad8964d5eadd35c097d4506c624..7b7e71278b9e90e362f342e3e883344ca69ce2fa 100644 --- a/src/hir2mpl/ast_input/clang/include/ast_parser.h +++ b/src/hir2mpl/ast_input/clang/include/ast_parser.h @@ -41,7 +41,8 @@ class ASTParser { astFileScopeAsms(astFileScopeAsmsIn), astEnums(astEnumsIn), vlaSizeMap(allocatorIn.Adapter()), - structFileNameMap(allocatorIn.Adapter()) {} + structFileNameMap(allocatorIn.Adapter()), + constantPMap(allocatorIn.Adapter()) {} virtual ~ASTParser() = default; bool OpenFile(MapleAllocator &allocator); bool Release(MapleAllocator &allocator) const; @@ -56,6 +57,7 @@ class ASTParser { bool RetrieveGlobalTypeDef(MapleAllocator &allocator); bool RetrieveEnums(MapleAllocator &allocator); + bool HandleRecordAndTypedef(ASTStruct *structOrUnion); const std::string GetSourceFileName() const; const uint32 GetFileIdx() const; @@ -111,6 +113,7 @@ class ASTParser { ASTValue *TranslateExprEval(MapleAllocator &allocator, const clang::Expr *expr) const; ASTExpr *EvaluateExprAsConst(MapleAllocator &allocator, const clang::Expr *expr); bool HasLabelStmt(const clang::Stmt *expr); + bool HasCallConstantP(const clang::Stmt &expr); ASTExpr *ProcessExpr(MapleAllocator &allocator, const clang::Expr *expr); void SaveVLASizeExpr(MapleAllocator &allocator, const clang::Type &type, MapleList &vlaSizeExprs) { if (!type.isVariableArrayType()) { @@ -199,7 +202,9 @@ class ASTParser { MapleVector &typeDescIn, std::list &stmts, bool needBody); MapleGenericAttrs SolveFunctionAttributes(MapleAllocator &allocator, const clang::FunctionDecl &funcDecl, - std::string &funcName) const; + std::string &funcName) const; + bool HandleFieldToRecordType(MapleAllocator &allocator, ASTStruct &curASTStruct, + const clang::DeclContext &declContext); ASTDecl *ProcessDecl(MapleAllocator &allocator, const clang::Decl &decl); ASTStmt *SolveFunctionBody(MapleAllocator &allocator, const clang::FunctionDecl &funcDecl, ASTFunc &astFunc, const std::list &stmts); @@ -290,6 +295,9 @@ class ASTParser { void CheckAtomicClearArg(const clang::CallExpr &expr) const; std::string GetFuncNameFromFuncDecl(const clang::FunctionDecl &funcDecl) const; bool IsMemberTypeHasMulAlignAttr(const clang::Expr &expr) const; + ASTExpr *ProcessBuiltinConstantP(const clang::Expr &expr, ASTIntegerLiteral *intExpr, + const llvm::APSInt intVal) const; + ASTExpr *ProcessFloatInEvaluateExpr(MapleAllocator &allocator, const clang::APValue constVal) const; ASTFunc *BuildAstFunc(MapleAllocator &allocator, const clang::FunctionDecl &funcDecl, std::list &implicitStmts, bool needDefDeMangledVer, bool needBody); using FuncPtrBuiltinFunc = ASTExpr *(ASTParser::*)(MapleAllocator &allocator, const clang::CallExpr &expr, @@ -313,9 +321,7 @@ ASTExpr *ParseBuiltinFunc(MapleAllocator &allocator, const clang::CallExpr &expr ASTExpr *PARSE_BUILTIIN_FUNC(Nan); ASTExpr *PARSE_BUILTIIN_FUNC(Nanl); ASTExpr *PARSE_BUILTIIN_FUNC(Nanf); - ASTExpr *PARSE_BUILTIIN_FUNC(Signbit); - ASTExpr *PARSE_BUILTIIN_FUNC(SignBitf); - ASTExpr *PARSE_BUILTIIN_FUNC(SignBitl); + ASTExpr *PARSE_BUILTIIN_FUNC(SignBit); ASTExpr *PARSE_BUILTIIN_FUNC(Trap); ASTExpr *PARSE_BUILTIIN_FUNC(IsUnordered); ASTExpr *PARSE_BUILTIIN_FUNC(Copysignf); @@ -345,6 +351,7 @@ ASTExpr *ParseBuiltinFunc(MapleAllocator &allocator, const clang::CallExpr &expr MapleMap vlaSizeMap; MapleUnorderedMap, MapleString::MapleStringHash> structFileNameMap; + MapleMap constantPMap; }; } // namespace maple #endif // HIR2MPL_AST_INPUT_INCLUDE_AST_PARSER_H diff --git a/src/hir2mpl/ast_input/clang/include/ast_stmt.h b/src/hir2mpl/ast_input/clang/include/ast_stmt.h index 7fdd536407a07127b23bdea889269539be46de25..6d325a91371c39e5674e36dd309c01789713fd19 100644 --- a/src/hir2mpl/ast_input/clang/include/ast_stmt.h +++ b/src/hir2mpl/ast_input/clang/include/ast_stmt.h @@ -21,12 +21,6 @@ namespace maple { class ASTDecl; -enum class SafeSS { - kNoneSS, - kSafeSS, - kUnsafeSS, -}; - class ASTStmt { public: explicit ASTStmt(MapleAllocator &allocatorIn, ASTStmtOp o = kASTStmtNone) : exprs(allocatorIn.Adapter()), op(o), @@ -132,6 +126,14 @@ class ASTCompoundStmt : public ASTStmt { return endLoc; } + bool GetHasEmitted2MIRScope() const { + return hasEmitted2MIRScope; + } + + void SetHasEmitted2MIRScope(bool val) const { + hasEmitted2MIRScope = val; + } + private: SafeSS safeSS = SafeSS::kNoneSS; MapleList astStmts; // stmts diff --git a/src/hir2mpl/ast_input/clang/include/builtin_func_emit.def b/src/hir2mpl/ast_input/clang/include/builtin_func_emit.def index 30177980784a58e9854b673040175c14c2fd7181..996357ba9f42a4796d6011e4b2705c91531f0709 100644 --- a/src/hir2mpl/ast_input/clang/include/builtin_func_emit.def +++ b/src/hir2mpl/ast_input/clang/include/builtin_func_emit.def @@ -1,193 +1,187 @@ -BUILTIN_FUNC_EMIT("alloca", &ASTCallExpr::EmitBuiltinAlloca) -BUILTIN_FUNC_EMIT("__builtin_ctz", &ASTCallExpr::EmitBuiltinCtz) -BUILTIN_FUNC_EMIT("__builtin_ctzl", &ASTCallExpr::EmitBuiltinCtzl) -BUILTIN_FUNC_EMIT("__builtin_ctzll", &ASTCallExpr::EmitBuiltinCtzl) -BUILTIN_FUNC_EMIT("__builtin_clz", &ASTCallExpr::EmitBuiltinClz) -BUILTIN_FUNC_EMIT("__builtin_clzl", &ASTCallExpr::EmitBuiltinClzl) -BUILTIN_FUNC_EMIT("__builtin_clzll", &ASTCallExpr::EmitBuiltinClzl) -BUILTIN_FUNC_EMIT("__builtin_popcount", &ASTCallExpr::EmitBuiltinPopcount) -BUILTIN_FUNC_EMIT("__builtin_popcountl", &ASTCallExpr::EmitBuiltinPopcountl) -BUILTIN_FUNC_EMIT("__builtin_popcountll", &ASTCallExpr::EmitBuiltinPopcountll) -BUILTIN_FUNC_EMIT("__builtin_parity", &ASTCallExpr::EmitBuiltinParity) -BUILTIN_FUNC_EMIT("__builtin_parityl", &ASTCallExpr::EmitBuiltinParityl) -BUILTIN_FUNC_EMIT("__builtin_parityll", &ASTCallExpr::EmitBuiltinParityll) -BUILTIN_FUNC_EMIT("__builtin_clrsb", &ASTCallExpr::EmitBuiltinClrsb) -BUILTIN_FUNC_EMIT("__builtin_clrsbl", &ASTCallExpr::EmitBuiltinClrsbl) -BUILTIN_FUNC_EMIT("__builtin_clrsbll", &ASTCallExpr::EmitBuiltinClrsbll) -BUILTIN_FUNC_EMIT("__builtin_ffs", &ASTCallExpr::EmitBuiltinFfs) -BUILTIN_FUNC_EMIT("__builtin_ffsl", &ASTCallExpr::EmitBuiltinFfsl) -BUILTIN_FUNC_EMIT("__builtin_ffsll", &ASTCallExpr::EmitBuiltinFfsll) -BUILTIN_FUNC_EMIT("__builtin_is_aligned", &ASTCallExpr::EmitBuiltinIsAligned) -BUILTIN_FUNC_EMIT("__builtin_align_up", &ASTCallExpr::EmitBuiltinAlignUp) -BUILTIN_FUNC_EMIT("__builtin_align_down", &ASTCallExpr::EmitBuiltinAlignDown) -BUILTIN_FUNC_EMIT("__builtin_alloca", &ASTCallExpr::EmitBuiltinAlloca) -BUILTIN_FUNC_EMIT("__builtin_expect", &ASTCallExpr::EmitBuiltinExpect) -BUILTIN_FUNC_EMIT("__builtin_va_start", &ASTCallExpr::EmitBuiltinVaStart) -BUILTIN_FUNC_EMIT("__builtin_va_end", &ASTCallExpr::EmitBuiltinVaEnd) -BUILTIN_FUNC_EMIT("__builtin_va_copy", &ASTCallExpr::EmitBuiltinVaCopy) -BUILTIN_FUNC_EMIT("__builtin_prefetch", &ASTCallExpr::EmitBuiltinPrefetch) -BUILTIN_FUNC_EMIT("__builtin_abs", &ASTCallExpr::EmitBuiltinAbs) -BUILTIN_FUNC_EMIT("__builtin_fabs", &ASTCallExpr::EmitBuiltinAbs) -BUILTIN_FUNC_EMIT("__builtin_fabsf", &ASTCallExpr::EmitBuiltinAbs) -BUILTIN_FUNC_EMIT("__builtin_fabsl", &ASTCallExpr::EmitBuiltinAbs) -BUILTIN_FUNC_EMIT("__builtin_fabsf16", &ASTCallExpr::EmitBuiltinAbs) -BUILTIN_FUNC_EMIT("__builtin_fabsf128", &ASTCallExpr::EmitBuiltinAbs) -BUILTIN_FUNC_EMIT("__builtin_labs", &ASTCallExpr::EmitBuiltinAbs) -BUILTIN_FUNC_EMIT("__builtin_llabs", &ASTCallExpr::EmitBuiltinAbs) -BUILTIN_FUNC_EMIT("abs", &ASTCallExpr::EmitBuiltinAbs) -BUILTIN_FUNC_EMIT("labs", &ASTCallExpr::EmitBuiltinAbs) -BUILTIN_FUNC_EMIT("llabs", &ASTCallExpr::EmitBuiltinAbs) -BUILTIN_FUNC_EMIT("fabs", &ASTCallExpr::EmitBuiltinAbs) -BUILTIN_FUNC_EMIT("fabsf", &ASTCallExpr::EmitBuiltinAbs) -BUILTIN_FUNC_EMIT("fabsl", &ASTCallExpr::EmitBuiltinAbs) -BUILTIN_FUNC_EMIT("__builtin_acos", &ASTCallExpr::EmitBuiltinACos) -BUILTIN_FUNC_EMIT("acos", &ASTCallExpr::EmitBuiltinACos) -BUILTIN_FUNC_EMIT("__builtin_acosf", &ASTCallExpr::EmitBuiltinACosf) -BUILTIN_FUNC_EMIT("acosf", &ASTCallExpr::EmitBuiltinACosf) -BUILTIN_FUNC_EMIT("__builtin_asin", &ASTCallExpr::EmitBuiltinASin) -BUILTIN_FUNC_EMIT("asin", &ASTCallExpr::EmitBuiltinASin) -BUILTIN_FUNC_EMIT("__builtin_asinf", &ASTCallExpr::EmitBuiltinASinf) -BUILTIN_FUNC_EMIT("asinf", &ASTCallExpr::EmitBuiltinASinf) -BUILTIN_FUNC_EMIT("__builtin_atan", &ASTCallExpr::EmitBuiltinATan) -BUILTIN_FUNC_EMIT("atan", &ASTCallExpr::EmitBuiltinATan) -BUILTIN_FUNC_EMIT("__builtin_atanf", &ASTCallExpr::EmitBuiltinATanf) -BUILTIN_FUNC_EMIT("atanf", &ASTCallExpr::EmitBuiltinATanf) -BUILTIN_FUNC_EMIT("__builtin_cos", &ASTCallExpr::EmitBuiltinCos) -BUILTIN_FUNC_EMIT("cos", &ASTCallExpr::EmitBuiltinCos) -BUILTIN_FUNC_EMIT("__builtin_cosf", &ASTCallExpr::EmitBuiltinCosf) -BUILTIN_FUNC_EMIT("cosf", &ASTCallExpr::EmitBuiltinCosf) -BUILTIN_FUNC_EMIT("__builtin_cosh", &ASTCallExpr::EmitBuiltinCosh) -BUILTIN_FUNC_EMIT("cosh", &ASTCallExpr::EmitBuiltinCosh) -BUILTIN_FUNC_EMIT("__builtin_coshf", &ASTCallExpr::EmitBuiltinCoshf) -BUILTIN_FUNC_EMIT("coshf", &ASTCallExpr::EmitBuiltinCoshf) -BUILTIN_FUNC_EMIT("__builtin_sin", &ASTCallExpr::EmitBuiltinSin) -BUILTIN_FUNC_EMIT("sin", &ASTCallExpr::EmitBuiltinSin) -BUILTIN_FUNC_EMIT("__builtin_sinf", &ASTCallExpr::EmitBuiltinSinf) -BUILTIN_FUNC_EMIT("sinf", &ASTCallExpr::EmitBuiltinSinf) -BUILTIN_FUNC_EMIT("__builtin_sinh", &ASTCallExpr::EmitBuiltinSinh) -BUILTIN_FUNC_EMIT("sinh", &ASTCallExpr::EmitBuiltinSinh) -BUILTIN_FUNC_EMIT("__builtin_sinhf", &ASTCallExpr::EmitBuiltinSinhf) -BUILTIN_FUNC_EMIT("sinhf", &ASTCallExpr::EmitBuiltinSinhf) -BUILTIN_FUNC_EMIT("__builtin_exp", &ASTCallExpr::EmitBuiltinExp) -BUILTIN_FUNC_EMIT("exp", &ASTCallExpr::EmitBuiltinExp) -BUILTIN_FUNC_EMIT("__builtin_expf", &ASTCallExpr::EmitBuiltinExpf) -BUILTIN_FUNC_EMIT("expf", &ASTCallExpr::EmitBuiltinExpf) -BUILTIN_FUNC_EMIT("__builtin_fmax", &ASTCallExpr::EmitBuiltinFmax) -BUILTIN_FUNC_EMIT("__builtin_fmaxf", &ASTCallExpr::EmitBuiltinFmax) -BUILTIN_FUNC_EMIT("__builtin_fmaxf16", &ASTCallExpr::EmitBuiltinFmax) -BUILTIN_FUNC_EMIT("__builtin_fmaxl", &ASTCallExpr::EmitBuiltinFmax) -BUILTIN_FUNC_EMIT("fmax", &ASTCallExpr::EmitBuiltinFmax) -BUILTIN_FUNC_EMIT("fmaxf", &ASTCallExpr::EmitBuiltinFmax) -BUILTIN_FUNC_EMIT("fmaxl", &ASTCallExpr::EmitBuiltinFmax) -BUILTIN_FUNC_EMIT("__builtin_fmin", &ASTCallExpr::EmitBuiltinFmin) -BUILTIN_FUNC_EMIT("__builtin_fminf", &ASTCallExpr::EmitBuiltinFmin) -BUILTIN_FUNC_EMIT("__builtin_fmin16", &ASTCallExpr::EmitBuiltinFmin) -BUILTIN_FUNC_EMIT("__builtin_fminl", &ASTCallExpr::EmitBuiltinFmin) -BUILTIN_FUNC_EMIT("fmin", &ASTCallExpr::EmitBuiltinFmin) -BUILTIN_FUNC_EMIT("fminf", &ASTCallExpr::EmitBuiltinFmin) -BUILTIN_FUNC_EMIT("fminl", &ASTCallExpr::EmitBuiltinFmin) -BUILTIN_FUNC_EMIT("__builtin_log", &ASTCallExpr::EmitBuiltinLog) -BUILTIN_FUNC_EMIT("__builtin_logf", &ASTCallExpr::EmitBuiltinLogf) -BUILTIN_FUNC_EMIT("__builtin_log10", &ASTCallExpr::EmitBuiltinLog10) -BUILTIN_FUNC_EMIT("__builtin_log10f", &ASTCallExpr::EmitBuiltinLog10f) -BUILTIN_FUNC_EMIT("__builtin_isunordered", &ASTCallExpr::EmitBuiltinIsunordered) -BUILTIN_FUNC_EMIT("__builtin_isless", &ASTCallExpr::EmitBuiltinIsless) -BUILTIN_FUNC_EMIT("__builtin_islessequal", &ASTCallExpr::EmitBuiltinIslessequal) -BUILTIN_FUNC_EMIT("__builtin_isgreater", &ASTCallExpr::EmitBuiltinIsgreater) -BUILTIN_FUNC_EMIT("__builtin_isgreaterequal", &ASTCallExpr::EmitBuiltinIsgreaterequal) -BUILTIN_FUNC_EMIT("__builtin_islessgreater", &ASTCallExpr::EmitBuiltinIslessgreater) -BUILTIN_FUNC_EMIT("__warn_memset_zero_len", &ASTCallExpr::EmitBuiltinWarnMemsetZeroLen) -BUILTIN_FUNC_EMIT("__builtin_rotateleft8", &ASTCallExpr::EmitBuiltinRotateLeft8) -BUILTIN_FUNC_EMIT("__builtin_rotateleft16", &ASTCallExpr::EmitBuiltinRotateLeft16) -BUILTIN_FUNC_EMIT("__builtin_rotateleft32", &ASTCallExpr::EmitBuiltinRotateLeft32) -BUILTIN_FUNC_EMIT("__builtin_rotateleft64", &ASTCallExpr::EmitBuiltinRotateLeft64) -BUILTIN_FUNC_EMIT("__builtin_rotateright8", &ASTCallExpr::EmitBuiltinRotateRight8) -BUILTIN_FUNC_EMIT("__builtin_rotateright16", &ASTCallExpr::EmitBuiltinRotateRight16) -BUILTIN_FUNC_EMIT("__builtin_rotateright32", &ASTCallExpr::EmitBuiltinRotateRight32) -BUILTIN_FUNC_EMIT("__builtin_rotateright64", &ASTCallExpr::EmitBuiltinRotateRight64) - -BUILTIN_FUNC_EMIT("__sync_add_and_fetch_8", &ASTCallExpr::EmitBuiltinSyncAddAndFetch8) -BUILTIN_FUNC_EMIT("__sync_add_and_fetch_4", &ASTCallExpr::EmitBuiltinSyncAddAndFetch4) -BUILTIN_FUNC_EMIT("__sync_add_and_fetch_2", &ASTCallExpr::EmitBuiltinSyncAddAndFetch2) -BUILTIN_FUNC_EMIT("__sync_add_and_fetch_1", &ASTCallExpr::EmitBuiltinSyncAddAndFetch1) -BUILTIN_FUNC_EMIT("__sync_sub_and_fetch_8", &ASTCallExpr::EmitBuiltinSyncSubAndFetch8) -BUILTIN_FUNC_EMIT("__sync_sub_and_fetch_4", &ASTCallExpr::EmitBuiltinSyncSubAndFetch4) -BUILTIN_FUNC_EMIT("__sync_sub_and_fetch_2", &ASTCallExpr::EmitBuiltinSyncSubAndFetch2) -BUILTIN_FUNC_EMIT("__sync_sub_and_fetch_1", &ASTCallExpr::EmitBuiltinSyncSubAndFetch1) -BUILTIN_FUNC_EMIT("__sync_fetch_and_sub_8", &ASTCallExpr::EmitBuiltinSyncFetchAndSub8) -BUILTIN_FUNC_EMIT("__sync_fetch_and_sub_4", &ASTCallExpr::EmitBuiltinSyncFetchAndSub4) -BUILTIN_FUNC_EMIT("__sync_fetch_and_sub_2", &ASTCallExpr::EmitBuiltinSyncFetchAndSub2) -BUILTIN_FUNC_EMIT("__sync_fetch_and_sub_1", &ASTCallExpr::EmitBuiltinSyncFetchAndSub1) -BUILTIN_FUNC_EMIT("__sync_fetch_and_add_8", &ASTCallExpr::EmitBuiltinSyncFetchAndAdd8) -BUILTIN_FUNC_EMIT("__sync_fetch_and_add_4", &ASTCallExpr::EmitBuiltinSyncFetchAndAdd4) -BUILTIN_FUNC_EMIT("__sync_fetch_and_add_2", &ASTCallExpr::EmitBuiltinSyncFetchAndAdd2) -BUILTIN_FUNC_EMIT("__sync_fetch_and_add_1", &ASTCallExpr::EmitBuiltinSyncFetchAndAdd1) -BUILTIN_FUNC_EMIT("__sync_bool_compare_and_swap_8", &ASTCallExpr::EmitBuiltinSyncBoolCompareAndSwap8) -BUILTIN_FUNC_EMIT("__sync_bool_compare_and_swap_4", &ASTCallExpr::EmitBuiltinSyncBoolCompareAndSwap4) -BUILTIN_FUNC_EMIT("__sync_bool_compare_and_swap_2", &ASTCallExpr::EmitBuiltinSyncBoolCompareAndSwap2) -BUILTIN_FUNC_EMIT("__sync_bool_compare_and_swap_1", &ASTCallExpr::EmitBuiltinSyncBoolCompareAndSwap1) -BUILTIN_FUNC_EMIT("__sync_val_compare_and_swap_8", &ASTCallExpr::EmitBuiltinSyncValCompareAndSwap8) -BUILTIN_FUNC_EMIT("__sync_val_compare_and_swap_4", &ASTCallExpr::EmitBuiltinSyncValCompareAndSwap4) -BUILTIN_FUNC_EMIT("__sync_val_compare_and_swap_2", &ASTCallExpr::EmitBuiltinSyncValCompareAndSwap2) -BUILTIN_FUNC_EMIT("__sync_val_compare_and_swap_1", &ASTCallExpr::EmitBuiltinSyncValCompareAndSwap1) -BUILTIN_FUNC_EMIT("__sync_lock_test_and_set_8", &ASTCallExpr::EmitBuiltinSyncLockTestAndSet8) -BUILTIN_FUNC_EMIT("__sync_lock_test_and_set_4", &ASTCallExpr::EmitBuiltinSyncLockTestAndSet4) -BUILTIN_FUNC_EMIT("__sync_lock_test_and_set_2", &ASTCallExpr::EmitBuiltinSyncLockTestAndSet2) -BUILTIN_FUNC_EMIT("__sync_lock_test_and_set_1", &ASTCallExpr::EmitBuiltinSyncLockTestAndSet1) -BUILTIN_FUNC_EMIT("__sync_lock_release_8", &ASTCallExpr::EmitBuiltinSyncLockRelease8) -BUILTIN_FUNC_EMIT("__sync_lock_release_4", &ASTCallExpr::EmitBuiltinSyncLockRelease4) -BUILTIN_FUNC_EMIT("__sync_lock_release_2", &ASTCallExpr::EmitBuiltinSyncLockRelease2) -BUILTIN_FUNC_EMIT("__sync_lock_release_1", &ASTCallExpr::EmitBuiltinSyncLockRelease1) -BUILTIN_FUNC_EMIT("__sync_fetch_and_and_1", &ASTCallExpr::EmitBuiltinSyncFetchAndAnd1) -BUILTIN_FUNC_EMIT("__sync_fetch_and_and_2", &ASTCallExpr::EmitBuiltinSyncFetchAndAnd2) -BUILTIN_FUNC_EMIT("__sync_fetch_and_and_4", &ASTCallExpr::EmitBuiltinSyncFetchAndAnd4) -BUILTIN_FUNC_EMIT("__sync_fetch_and_and_8", &ASTCallExpr::EmitBuiltinSyncFetchAndAnd8) -BUILTIN_FUNC_EMIT("__sync_fetch_and_or_1", &ASTCallExpr::EmitBuiltinSyncFetchAndOr1) -BUILTIN_FUNC_EMIT("__sync_fetch_and_or_2", &ASTCallExpr::EmitBuiltinSyncFetchAndOr2) -BUILTIN_FUNC_EMIT("__sync_fetch_and_or_4", &ASTCallExpr::EmitBuiltinSyncFetchAndOr4) -BUILTIN_FUNC_EMIT("__sync_fetch_and_or_8", &ASTCallExpr::EmitBuiltinSyncFetchAndOr8) -BUILTIN_FUNC_EMIT("__sync_fetch_and_xor_1", &ASTCallExpr::EmitBuiltinSyncFetchAndXor1) -BUILTIN_FUNC_EMIT("__sync_fetch_and_xor_2", &ASTCallExpr::EmitBuiltinSyncFetchAndXor2) -BUILTIN_FUNC_EMIT("__sync_fetch_and_xor_4", &ASTCallExpr::EmitBuiltinSyncFetchAndXor4) -BUILTIN_FUNC_EMIT("__sync_fetch_and_xor_8", &ASTCallExpr::EmitBuiltinSyncFetchAndXor8) -BUILTIN_FUNC_EMIT("__sync_fetch_and_nand_1", &ASTCallExpr::EmitBuiltinSyncFetchAndNand1) -BUILTIN_FUNC_EMIT("__sync_fetch_and_nand_2", &ASTCallExpr::EmitBuiltinSyncFetchAndNand2) -BUILTIN_FUNC_EMIT("__sync_fetch_and_nand_4", &ASTCallExpr::EmitBuiltinSyncFetchAndNand4) -BUILTIN_FUNC_EMIT("__sync_fetch_and_nand_8", &ASTCallExpr::EmitBuiltinSyncFetchAndNand8) -BUILTIN_FUNC_EMIT("__sync_and_and_fetch_1", &ASTCallExpr::EmitBuiltinSyncAndAndFetch1) -BUILTIN_FUNC_EMIT("__sync_and_and_fetch_2", &ASTCallExpr::EmitBuiltinSyncAndAndFetch2) -BUILTIN_FUNC_EMIT("__sync_and_and_fetch_4", &ASTCallExpr::EmitBuiltinSyncAndAndFetch4) -BUILTIN_FUNC_EMIT("__sync_and_and_fetch_8", &ASTCallExpr::EmitBuiltinSyncAndAndFetch8) -BUILTIN_FUNC_EMIT("__sync_or_and_fetch_1", &ASTCallExpr::EmitBuiltinSyncOrAndFetch1) -BUILTIN_FUNC_EMIT("__sync_or_and_fetch_2", &ASTCallExpr::EmitBuiltinSyncOrAndFetch2) -BUILTIN_FUNC_EMIT("__sync_or_and_fetch_4", &ASTCallExpr::EmitBuiltinSyncOrAndFetch4) -BUILTIN_FUNC_EMIT("__sync_or_and_fetch_8", &ASTCallExpr::EmitBuiltinSyncOrAndFetch8) -BUILTIN_FUNC_EMIT("__sync_xor_and_fetch_1", &ASTCallExpr::EmitBuiltinSyncXorAndFetch1) -BUILTIN_FUNC_EMIT("__sync_xor_and_fetch_2", &ASTCallExpr::EmitBuiltinSyncXorAndFetch2) -BUILTIN_FUNC_EMIT("__sync_xor_and_fetch_4", &ASTCallExpr::EmitBuiltinSyncXorAndFetch4) -BUILTIN_FUNC_EMIT("__sync_xor_and_fetch_8", &ASTCallExpr::EmitBuiltinSyncXorAndFetch8) -BUILTIN_FUNC_EMIT("__sync_nand_and_fetch_1", &ASTCallExpr::EmitBuiltinSyncNandAndFetch1) -BUILTIN_FUNC_EMIT("__sync_nand_and_fetch_2", &ASTCallExpr::EmitBuiltinSyncNandAndFetch2) -BUILTIN_FUNC_EMIT("__sync_nand_and_fetch_4", &ASTCallExpr::EmitBuiltinSyncNandAndFetch4) -BUILTIN_FUNC_EMIT("__sync_nand_and_fetch_8", &ASTCallExpr::EmitBuiltinSyncNandAndFetch8) -BUILTIN_FUNC_EMIT("__sync_synchronize", &ASTCallExpr::EmitBuiltinSyncSynchronize) - -BUILTIN_FUNC_EMIT("__atomic_exchange_1", &ASTCallExpr::EmitBuiltinAtomicExchangeN) -BUILTIN_FUNC_EMIT("__atomic_exchange_2", &ASTCallExpr::EmitBuiltinAtomicExchangeN) -BUILTIN_FUNC_EMIT("__atomic_exchange_4", &ASTCallExpr::EmitBuiltinAtomicExchangeN) -BUILTIN_FUNC_EMIT("__atomic_exchange_8", &ASTCallExpr::EmitBuiltinAtomicExchangeN) - -BUILTIN_FUNC_EMIT("__builtin_return_address", &ASTCallExpr::EmitBuiltinReturnAddress) -BUILTIN_FUNC_EMIT("__builtin_extract_return_addr", &ASTCallExpr::EmitBuiltinExtractReturnAddr) -BUILTIN_FUNC_EMIT("__builtin_object_size", &ASTCallExpr::EmitBuiltinObjectSize) - -BUILTIN_FUNC_EMIT("__builtin_bswap64", &ASTCallExpr::EmitBuiltinBswap64) -BUILTIN_FUNC_EMIT("__builtin_bswap32", &ASTCallExpr::EmitBuiltinBswap32) -BUILTIN_FUNC_EMIT("__builtin_bswap16", &ASTCallExpr::EmitBuiltinBswap16) - -BUILTIN_FUNC_EMIT("__atomic_test_and_set", &ASTCallExpr::EmitBuiltinAtomicTestAndSet) -BUILTIN_FUNC_EMIT("__atomic_clear", &ASTCallExpr::EmitBuiltinAtomicClear) -BUILTIN_FUNC_EMIT("__atomic_thread_fence", &ASTCallExpr::EmitBuiltinAtomicThreadFence) -BUILTIN_FUNC_EMIT("__atomic_signal_fence", &ASTCallExpr::EmitBuiltinAtomicSignalFence) -BUILTIN_FUNC_EMIT("__atomic_always_lock_free", &ASTCallExpr::EmitBuiltinAtomicAlwaysLockFree) -BUILTIN_FUNC_EMIT("__atomic_is_lock_free", &ASTCallExpr::EmitBuiltinAtomicLockFree) \ No newline at end of file +BUILTIN_FUNC_EMIT("alloca", &ASTCallExpr::EmitBuiltinAlloca); +BUILTIN_FUNC_EMIT("__builtin_ctz", &ASTCallExpr::EmitBuiltinCtz); +BUILTIN_FUNC_EMIT("__builtin_ctzl", &ASTCallExpr::EmitBuiltinCtzl); +BUILTIN_FUNC_EMIT("__builtin_ctzll", &ASTCallExpr::EmitBuiltinCtzl); +BUILTIN_FUNC_EMIT("__builtin_clz", &ASTCallExpr::EmitBuiltinClz); +BUILTIN_FUNC_EMIT("__builtin_clzl", &ASTCallExpr::EmitBuiltinClzl); +BUILTIN_FUNC_EMIT("__builtin_clzll", &ASTCallExpr::EmitBuiltinClzl); +BUILTIN_FUNC_EMIT("__builtin_popcount", &ASTCallExpr::EmitBuiltinPopcount); +BUILTIN_FUNC_EMIT("__builtin_popcountl", &ASTCallExpr::EmitBuiltinPopcountl); +BUILTIN_FUNC_EMIT("__builtin_popcountll", &ASTCallExpr::EmitBuiltinPopcountll); +BUILTIN_FUNC_EMIT("__builtin_parity", &ASTCallExpr::EmitBuiltinParity); +BUILTIN_FUNC_EMIT("__builtin_parityl", &ASTCallExpr::EmitBuiltinParityl); +BUILTIN_FUNC_EMIT("__builtin_parityll", &ASTCallExpr::EmitBuiltinParityll); +BUILTIN_FUNC_EMIT("__builtin_clrsb", &ASTCallExpr::EmitBuiltinClrsb); +BUILTIN_FUNC_EMIT("__builtin_clrsbl", &ASTCallExpr::EmitBuiltinClrsbl); +BUILTIN_FUNC_EMIT("__builtin_clrsbll", &ASTCallExpr::EmitBuiltinClrsbll); +BUILTIN_FUNC_EMIT("__builtin_ffs", &ASTCallExpr::EmitBuiltinFfs); +BUILTIN_FUNC_EMIT("__builtin_ffsl", &ASTCallExpr::EmitBuiltinFfsl); +BUILTIN_FUNC_EMIT("__builtin_ffsll", &ASTCallExpr::EmitBuiltinFfsll); +BUILTIN_FUNC_EMIT("__builtin_is_aligned", &ASTCallExpr::EmitBuiltinIsAligned); +BUILTIN_FUNC_EMIT("__builtin_align_up", &ASTCallExpr::EmitBuiltinAlignUp); +BUILTIN_FUNC_EMIT("__builtin_align_down", &ASTCallExpr::EmitBuiltinAlignDown); +BUILTIN_FUNC_EMIT("__builtin_alloca", &ASTCallExpr::EmitBuiltinAlloca); +BUILTIN_FUNC_EMIT("__builtin_alloca_with_align", &ASTCallExpr::EmitBuiltinAllocaWithAlign); +BUILTIN_FUNC_EMIT("__builtin_expect", &ASTCallExpr::EmitBuiltinExpect); +BUILTIN_FUNC_EMIT("__builtin_va_start", &ASTCallExpr::EmitBuiltinVaStart); +BUILTIN_FUNC_EMIT("__builtin_va_end", &ASTCallExpr::EmitBuiltinVaEnd); +BUILTIN_FUNC_EMIT("__builtin_va_copy", &ASTCallExpr::EmitBuiltinVaCopy); +BUILTIN_FUNC_EMIT("__builtin_prefetch", &ASTCallExpr::EmitBuiltinPrefetch); +BUILTIN_FUNC_EMIT("__builtin___clear_cache", &ASTCallExpr::EmitBuiltinClearCache); +BUILTIN_FUNC_EMIT("__builtin_abs", &ASTCallExpr::EmitBuiltinAbs); +BUILTIN_FUNC_EMIT("__builtin_fabs", &ASTCallExpr::EmitBuiltinAbs); +BUILTIN_FUNC_EMIT("__builtin_fabsf", &ASTCallExpr::EmitBuiltinAbs); +BUILTIN_FUNC_EMIT("__builtin_fabsl", &ASTCallExpr::EmitBuiltinAbs); +BUILTIN_FUNC_EMIT("__builtin_fabsf16", &ASTCallExpr::EmitBuiltinAbs); +BUILTIN_FUNC_EMIT("__builtin_fabsf128", &ASTCallExpr::EmitBuiltinAbs); +BUILTIN_FUNC_EMIT("__builtin_labs", &ASTCallExpr::EmitBuiltinAbs); +BUILTIN_FUNC_EMIT("__builtin_llabs", &ASTCallExpr::EmitBuiltinAbs); +BUILTIN_FUNC_EMIT("__builtin_constant_p", &ASTCallExpr::EmitBuiltinConstantP); + +BUILTIN_FUNC_EMIT("__builtin_acos", &ASTCallExpr::EmitBuiltinACos); + +BUILTIN_FUNC_EMIT("__builtin_acosf", &ASTCallExpr::EmitBuiltinACosf); + +BUILTIN_FUNC_EMIT("__builtin_asin", &ASTCallExpr::EmitBuiltinASin); + +BUILTIN_FUNC_EMIT("__builtin_asinf", &ASTCallExpr::EmitBuiltinASinf); + +BUILTIN_FUNC_EMIT("__builtin_atan", &ASTCallExpr::EmitBuiltinATan); + +BUILTIN_FUNC_EMIT("__builtin_atanf", &ASTCallExpr::EmitBuiltinATanf); + +BUILTIN_FUNC_EMIT("__builtin_cos", &ASTCallExpr::EmitBuiltinCos); + +BUILTIN_FUNC_EMIT("__builtin_cosf", &ASTCallExpr::EmitBuiltinCosf); + +BUILTIN_FUNC_EMIT("__builtin_cosh", &ASTCallExpr::EmitBuiltinCosh); + +BUILTIN_FUNC_EMIT("__builtin_coshf", &ASTCallExpr::EmitBuiltinCoshf); + +BUILTIN_FUNC_EMIT("__builtin_sin", &ASTCallExpr::EmitBuiltinSin); + +BUILTIN_FUNC_EMIT("__builtin_sinf", &ASTCallExpr::EmitBuiltinSinf); + +BUILTIN_FUNC_EMIT("__builtin_sinh", &ASTCallExpr::EmitBuiltinSinh); + +BUILTIN_FUNC_EMIT("__builtin_sinhf", &ASTCallExpr::EmitBuiltinSinhf); + +BUILTIN_FUNC_EMIT("__builtin_exp", &ASTCallExpr::EmitBuiltinExp); + +BUILTIN_FUNC_EMIT("__builtin_expf", &ASTCallExpr::EmitBuiltinExpf); + +BUILTIN_FUNC_EMIT("__builtin_fmax", &ASTCallExpr::EmitBuiltinFmax); +BUILTIN_FUNC_EMIT("__builtin_fmaxf", &ASTCallExpr::EmitBuiltinFmax); +BUILTIN_FUNC_EMIT("__builtin_fmaxf16", &ASTCallExpr::EmitBuiltinFmax); +BUILTIN_FUNC_EMIT("__builtin_fmaxl", &ASTCallExpr::EmitBuiltinFmax); + +BUILTIN_FUNC_EMIT("__builtin_fmin", &ASTCallExpr::EmitBuiltinFmin); +BUILTIN_FUNC_EMIT("__builtin_fminf", &ASTCallExpr::EmitBuiltinFmin); +BUILTIN_FUNC_EMIT("__builtin_fmin16", &ASTCallExpr::EmitBuiltinFmin); +BUILTIN_FUNC_EMIT("__builtin_fminl", &ASTCallExpr::EmitBuiltinFmin); + +BUILTIN_FUNC_EMIT("__builtin_log", &ASTCallExpr::EmitBuiltinLog); +BUILTIN_FUNC_EMIT("__builtin_logf", &ASTCallExpr::EmitBuiltinLogf); +BUILTIN_FUNC_EMIT("__builtin_log10", &ASTCallExpr::EmitBuiltinLog10); +BUILTIN_FUNC_EMIT("__builtin_log10f", &ASTCallExpr::EmitBuiltinLog10f); +BUILTIN_FUNC_EMIT("__builtin_isunordered", &ASTCallExpr::EmitBuiltinIsunordered); +BUILTIN_FUNC_EMIT("__builtin_isless", &ASTCallExpr::EmitBuiltinIsless); +BUILTIN_FUNC_EMIT("__builtin_islessequal", &ASTCallExpr::EmitBuiltinIslessequal); +BUILTIN_FUNC_EMIT("__builtin_isgreater", &ASTCallExpr::EmitBuiltinIsgreater); +BUILTIN_FUNC_EMIT("__builtin_isgreaterequal", &ASTCallExpr::EmitBuiltinIsgreaterequal); +BUILTIN_FUNC_EMIT("__builtin_islessgreater", &ASTCallExpr::EmitBuiltinIslessgreater); +BUILTIN_FUNC_EMIT("__warn_memset_zero_len", &ASTCallExpr::EmitBuiltinWarnMemsetZeroLen); +BUILTIN_FUNC_EMIT("__builtin_rotateleft8", &ASTCallExpr::EmitBuiltinRotateLeft8); +BUILTIN_FUNC_EMIT("__builtin_rotateleft16", &ASTCallExpr::EmitBuiltinRotateLeft16); +BUILTIN_FUNC_EMIT("__builtin_rotateleft32", &ASTCallExpr::EmitBuiltinRotateLeft32); +BUILTIN_FUNC_EMIT("__builtin_rotateleft64", &ASTCallExpr::EmitBuiltinRotateLeft64); +BUILTIN_FUNC_EMIT("__builtin_rotateright8", &ASTCallExpr::EmitBuiltinRotateRight8); +BUILTIN_FUNC_EMIT("__builtin_rotateright16", &ASTCallExpr::EmitBuiltinRotateRight16); +BUILTIN_FUNC_EMIT("__builtin_rotateright32", &ASTCallExpr::EmitBuiltinRotateRight32); +BUILTIN_FUNC_EMIT("__builtin_rotateright64", &ASTCallExpr::EmitBuiltinRotateRight64); + +BUILTIN_FUNC_EMIT("__sync_add_and_fetch_8", &ASTCallExpr::EmitBuiltinSyncAddAndFetch8); +BUILTIN_FUNC_EMIT("__sync_add_and_fetch_4", &ASTCallExpr::EmitBuiltinSyncAddAndFetch4); +BUILTIN_FUNC_EMIT("__sync_add_and_fetch_2", &ASTCallExpr::EmitBuiltinSyncAddAndFetch2); +BUILTIN_FUNC_EMIT("__sync_add_and_fetch_1", &ASTCallExpr::EmitBuiltinSyncAddAndFetch1); +BUILTIN_FUNC_EMIT("__sync_sub_and_fetch_8", &ASTCallExpr::EmitBuiltinSyncSubAndFetch8); +BUILTIN_FUNC_EMIT("__sync_sub_and_fetch_4", &ASTCallExpr::EmitBuiltinSyncSubAndFetch4); +BUILTIN_FUNC_EMIT("__sync_sub_and_fetch_2", &ASTCallExpr::EmitBuiltinSyncSubAndFetch2); +BUILTIN_FUNC_EMIT("__sync_sub_and_fetch_1", &ASTCallExpr::EmitBuiltinSyncSubAndFetch1); +BUILTIN_FUNC_EMIT("__sync_fetch_and_sub_8", &ASTCallExpr::EmitBuiltinSyncFetchAndSub8); +BUILTIN_FUNC_EMIT("__sync_fetch_and_sub_4", &ASTCallExpr::EmitBuiltinSyncFetchAndSub4); +BUILTIN_FUNC_EMIT("__sync_fetch_and_sub_2", &ASTCallExpr::EmitBuiltinSyncFetchAndSub2); +BUILTIN_FUNC_EMIT("__sync_fetch_and_sub_1", &ASTCallExpr::EmitBuiltinSyncFetchAndSub1); +BUILTIN_FUNC_EMIT("__sync_fetch_and_add_8", &ASTCallExpr::EmitBuiltinSyncFetchAndAdd8); +BUILTIN_FUNC_EMIT("__sync_fetch_and_add_4", &ASTCallExpr::EmitBuiltinSyncFetchAndAdd4); +BUILTIN_FUNC_EMIT("__sync_fetch_and_add_2", &ASTCallExpr::EmitBuiltinSyncFetchAndAdd2); +BUILTIN_FUNC_EMIT("__sync_fetch_and_add_1", &ASTCallExpr::EmitBuiltinSyncFetchAndAdd1); +BUILTIN_FUNC_EMIT("__sync_bool_compare_and_swap_8", &ASTCallExpr::EmitBuiltinSyncBoolCompareAndSwap8); +BUILTIN_FUNC_EMIT("__sync_bool_compare_and_swap_4", &ASTCallExpr::EmitBuiltinSyncBoolCompareAndSwap4); +BUILTIN_FUNC_EMIT("__sync_bool_compare_and_swap_2", &ASTCallExpr::EmitBuiltinSyncBoolCompareAndSwap2); +BUILTIN_FUNC_EMIT("__sync_bool_compare_and_swap_1", &ASTCallExpr::EmitBuiltinSyncBoolCompareAndSwap1); +BUILTIN_FUNC_EMIT("__sync_val_compare_and_swap_8", &ASTCallExpr::EmitBuiltinSyncValCompareAndSwap8); +BUILTIN_FUNC_EMIT("__sync_val_compare_and_swap_4", &ASTCallExpr::EmitBuiltinSyncValCompareAndSwap4); +BUILTIN_FUNC_EMIT("__sync_val_compare_and_swap_2", &ASTCallExpr::EmitBuiltinSyncValCompareAndSwap2); +BUILTIN_FUNC_EMIT("__sync_val_compare_and_swap_1", &ASTCallExpr::EmitBuiltinSyncValCompareAndSwap1); +BUILTIN_FUNC_EMIT("__sync_lock_test_and_set_8", &ASTCallExpr::EmitBuiltinSyncLockTestAndSet8); +BUILTIN_FUNC_EMIT("__sync_lock_test_and_set_4", &ASTCallExpr::EmitBuiltinSyncLockTestAndSet4); +BUILTIN_FUNC_EMIT("__sync_lock_test_and_set_2", &ASTCallExpr::EmitBuiltinSyncLockTestAndSet2); +BUILTIN_FUNC_EMIT("__sync_lock_test_and_set_1", &ASTCallExpr::EmitBuiltinSyncLockTestAndSet1); +BUILTIN_FUNC_EMIT("__sync_lock_release_8", &ASTCallExpr::EmitBuiltinSyncLockRelease8); +BUILTIN_FUNC_EMIT("__sync_lock_release_4", &ASTCallExpr::EmitBuiltinSyncLockRelease4); +BUILTIN_FUNC_EMIT("__sync_lock_release_2", &ASTCallExpr::EmitBuiltinSyncLockRelease2); +BUILTIN_FUNC_EMIT("__sync_lock_release_1", &ASTCallExpr::EmitBuiltinSyncLockRelease1); +BUILTIN_FUNC_EMIT("__sync_fetch_and_and_1", &ASTCallExpr::EmitBuiltinSyncFetchAndAnd1); +BUILTIN_FUNC_EMIT("__sync_fetch_and_and_2", &ASTCallExpr::EmitBuiltinSyncFetchAndAnd2); +BUILTIN_FUNC_EMIT("__sync_fetch_and_and_4", &ASTCallExpr::EmitBuiltinSyncFetchAndAnd4); +BUILTIN_FUNC_EMIT("__sync_fetch_and_and_8", &ASTCallExpr::EmitBuiltinSyncFetchAndAnd8); +BUILTIN_FUNC_EMIT("__sync_fetch_and_or_1", &ASTCallExpr::EmitBuiltinSyncFetchAndOr1); +BUILTIN_FUNC_EMIT("__sync_fetch_and_or_2", &ASTCallExpr::EmitBuiltinSyncFetchAndOr2); +BUILTIN_FUNC_EMIT("__sync_fetch_and_or_4", &ASTCallExpr::EmitBuiltinSyncFetchAndOr4); +BUILTIN_FUNC_EMIT("__sync_fetch_and_or_8", &ASTCallExpr::EmitBuiltinSyncFetchAndOr8); +BUILTIN_FUNC_EMIT("__sync_fetch_and_xor_1", &ASTCallExpr::EmitBuiltinSyncFetchAndXor1); +BUILTIN_FUNC_EMIT("__sync_fetch_and_xor_2", &ASTCallExpr::EmitBuiltinSyncFetchAndXor2); +BUILTIN_FUNC_EMIT("__sync_fetch_and_xor_4", &ASTCallExpr::EmitBuiltinSyncFetchAndXor4); +BUILTIN_FUNC_EMIT("__sync_fetch_and_xor_8", &ASTCallExpr::EmitBuiltinSyncFetchAndXor8); +BUILTIN_FUNC_EMIT("__sync_fetch_and_nand_1", &ASTCallExpr::EmitBuiltinSyncFetchAndNand1); +BUILTIN_FUNC_EMIT("__sync_fetch_and_nand_2", &ASTCallExpr::EmitBuiltinSyncFetchAndNand2); +BUILTIN_FUNC_EMIT("__sync_fetch_and_nand_4", &ASTCallExpr::EmitBuiltinSyncFetchAndNand4); +BUILTIN_FUNC_EMIT("__sync_fetch_and_nand_8", &ASTCallExpr::EmitBuiltinSyncFetchAndNand8); +BUILTIN_FUNC_EMIT("__sync_and_and_fetch_1", &ASTCallExpr::EmitBuiltinSyncAndAndFetch1); +BUILTIN_FUNC_EMIT("__sync_and_and_fetch_2", &ASTCallExpr::EmitBuiltinSyncAndAndFetch2); +BUILTIN_FUNC_EMIT("__sync_and_and_fetch_4", &ASTCallExpr::EmitBuiltinSyncAndAndFetch4); +BUILTIN_FUNC_EMIT("__sync_and_and_fetch_8", &ASTCallExpr::EmitBuiltinSyncAndAndFetch8); +BUILTIN_FUNC_EMIT("__sync_or_and_fetch_1", &ASTCallExpr::EmitBuiltinSyncOrAndFetch1); +BUILTIN_FUNC_EMIT("__sync_or_and_fetch_2", &ASTCallExpr::EmitBuiltinSyncOrAndFetch2); +BUILTIN_FUNC_EMIT("__sync_or_and_fetch_4", &ASTCallExpr::EmitBuiltinSyncOrAndFetch4); +BUILTIN_FUNC_EMIT("__sync_or_and_fetch_8", &ASTCallExpr::EmitBuiltinSyncOrAndFetch8); +BUILTIN_FUNC_EMIT("__sync_xor_and_fetch_1", &ASTCallExpr::EmitBuiltinSyncXorAndFetch1); +BUILTIN_FUNC_EMIT("__sync_xor_and_fetch_2", &ASTCallExpr::EmitBuiltinSyncXorAndFetch2); +BUILTIN_FUNC_EMIT("__sync_xor_and_fetch_4", &ASTCallExpr::EmitBuiltinSyncXorAndFetch4); +BUILTIN_FUNC_EMIT("__sync_xor_and_fetch_8", &ASTCallExpr::EmitBuiltinSyncXorAndFetch8); +BUILTIN_FUNC_EMIT("__sync_nand_and_fetch_1", &ASTCallExpr::EmitBuiltinSyncNandAndFetch1); +BUILTIN_FUNC_EMIT("__sync_nand_and_fetch_2", &ASTCallExpr::EmitBuiltinSyncNandAndFetch2); +BUILTIN_FUNC_EMIT("__sync_nand_and_fetch_4", &ASTCallExpr::EmitBuiltinSyncNandAndFetch4); +BUILTIN_FUNC_EMIT("__sync_nand_and_fetch_8", &ASTCallExpr::EmitBuiltinSyncNandAndFetch8); +BUILTIN_FUNC_EMIT("__sync_synchronize", &ASTCallExpr::EmitBuiltinSyncSynchronize); + +BUILTIN_FUNC_EMIT("__atomic_exchange_1", &ASTCallExpr::EmitBuiltinAtomicExchangeN); +BUILTIN_FUNC_EMIT("__atomic_exchange_2", &ASTCallExpr::EmitBuiltinAtomicExchangeN); +BUILTIN_FUNC_EMIT("__atomic_exchange_4", &ASTCallExpr::EmitBuiltinAtomicExchangeN); +BUILTIN_FUNC_EMIT("__atomic_exchange_8", &ASTCallExpr::EmitBuiltinAtomicExchangeN); + +BUILTIN_FUNC_EMIT("__builtin_return_address", &ASTCallExpr::EmitBuiltinReturnAddress); +BUILTIN_FUNC_EMIT("__builtin_extract_return_addr", &ASTCallExpr::EmitBuiltinExtractReturnAddr); +BUILTIN_FUNC_EMIT("__builtin_object_size", &ASTCallExpr::EmitBuiltinObjectSize); + +BUILTIN_FUNC_EMIT("__builtin_bswap64", &ASTCallExpr::EmitBuiltinBswap64); +BUILTIN_FUNC_EMIT("__builtin_bswap32", &ASTCallExpr::EmitBuiltinBswap32); +BUILTIN_FUNC_EMIT("__builtin_bswap16", &ASTCallExpr::EmitBuiltinBswap16); + +BUILTIN_FUNC_EMIT("__atomic_test_and_set", &ASTCallExpr::EmitBuiltinAtomicTestAndSet); +BUILTIN_FUNC_EMIT("__atomic_clear", &ASTCallExpr::EmitBuiltinAtomicClear); +BUILTIN_FUNC_EMIT("__atomic_thread_fence", &ASTCallExpr::EmitBuiltinAtomicThreadFence); +BUILTIN_FUNC_EMIT("__atomic_signal_fence", &ASTCallExpr::EmitBuiltinAtomicSignalFence); +BUILTIN_FUNC_EMIT("__atomic_always_lock_free", &ASTCallExpr::EmitBuiltinAtomicAlwaysLockFree); +BUILTIN_FUNC_EMIT("__atomic_is_lock_free", &ASTCallExpr::EmitBuiltinAtomicLockFree); diff --git a/src/hir2mpl/ast_input/clang/include/builtin_func_parse.def b/src/hir2mpl/ast_input/clang/include/builtin_func_parse.def index 907b64e0676dc78a8718de5ecd6905dba8aa25e6..a85ef3f10697b06036350137d03928d468edeacf 100644 --- a/src/hir2mpl/ast_input/clang/include/builtin_func_parse.def +++ b/src/hir2mpl/ast_input/clang/include/builtin_func_parse.def @@ -10,9 +10,9 @@ BUILTIN_FUNC_PARSE("__builtin_infl", &ASTParser::ParseBuiltinInfl) BUILTIN_FUNC_PARSE("__builtin_nan", &ASTParser::ParseBuiltinNan) BUILTIN_FUNC_PARSE("__builtin_nanf", &ASTParser::ParseBuiltinNanf) BUILTIN_FUNC_PARSE("__builtin_nanl", &ASTParser::ParseBuiltinNanl) -BUILTIN_FUNC_PARSE("__builtin_signbit", &ASTParser::ParseBuiltinSignBitl) -BUILTIN_FUNC_PARSE("__builtin_signbitf", &ASTParser::ParseBuiltinSignBitf) -BUILTIN_FUNC_PARSE("__builtin_signbitl", &ASTParser::ParseBuiltinSignBitl) +BUILTIN_FUNC_PARSE("__builtin_signbit", &ASTParser::ParseBuiltinSignBit) +BUILTIN_FUNC_PARSE("__builtin_signbitf", &ASTParser::ParseBuiltinSignBit) +BUILTIN_FUNC_PARSE("__builtin_signbitl", &ASTParser::ParseBuiltinSignBit) BUILTIN_FUNC_PARSE("__builtin_trap", &ASTParser::ParseBuiltinTrap) BUILTIN_FUNC_PARSE("__builtin_copysignf", &ASTParser::ParseBuiltinCopysignf) BUILTIN_FUNC_PARSE("__builtin_copysign", &ASTParser::ParseBuiltinCopysign) diff --git a/src/hir2mpl/ast_input/clang/include/clib_func_emit.def b/src/hir2mpl/ast_input/clang/include/clib_func_emit.def new file mode 100644 index 0000000000000000000000000000000000000000..ea5e1bbce2f91f458ffa8b5620ebd3e282d9c64a --- /dev/null +++ b/src/hir2mpl/ast_input/clang/include/clib_func_emit.def @@ -0,0 +1,28 @@ +BUILTIN_FUNC_EMIT("abs", &ASTCallExpr::EmitBuiltinAbs, tab.GetInt32(), { tab.GetInt32() }); +BUILTIN_FUNC_EMIT("labs", &ASTCallExpr::EmitBuiltinAbs, tab.GetInt32(), { tab.GetInt32() }); +BUILTIN_FUNC_EMIT("llabs", &ASTCallExpr::EmitBuiltinAbs, tab.GetInt64(), { tab.GetInt64() }); +BUILTIN_FUNC_EMIT("fabs", &ASTCallExpr::EmitBuiltinAbs, tab.GetDouble(), { tab.GetDouble() }); +BUILTIN_FUNC_EMIT("fabsf", &ASTCallExpr::EmitBuiltinAbs, tab.GetFloat(), { tab.GetFloat() }); +BUILTIN_FUNC_EMIT("fabsl", &ASTCallExpr::EmitBuiltinAbs, tab.GetDouble(), { tab.GetDouble() }); +BUILTIN_FUNC_EMIT("acos", &ASTCallExpr::EmitBuiltinACos, tab.GetDouble(), { tab.GetDouble() }); +BUILTIN_FUNC_EMIT("acosf", &ASTCallExpr::EmitBuiltinACosf, tab.GetFloat(), { tab.GetFloat() }); +BUILTIN_FUNC_EMIT("asin", &ASTCallExpr::EmitBuiltinASin, tab.GetDouble(), { tab.GetDouble() }); +BUILTIN_FUNC_EMIT("asinf", &ASTCallExpr::EmitBuiltinASinf, tab.GetFloat(), { tab.GetFloat() }); +BUILTIN_FUNC_EMIT("atan", &ASTCallExpr::EmitBuiltinATan, tab.GetDouble(), { tab.GetDouble() }); +BUILTIN_FUNC_EMIT("atanf", &ASTCallExpr::EmitBuiltinATanf, tab.GetFloat(), { tab.GetFloat() }); +BUILTIN_FUNC_EMIT("cos", &ASTCallExpr::EmitBuiltinCos, tab.GetDouble(), { tab.GetDouble() }); +BUILTIN_FUNC_EMIT("cosf", &ASTCallExpr::EmitBuiltinCosf, tab.GetFloat(), { tab.GetFloat() }); +BUILTIN_FUNC_EMIT("cosh", &ASTCallExpr::EmitBuiltinCosh, tab.GetDouble(), { tab.GetDouble() }); +BUILTIN_FUNC_EMIT("coshf", &ASTCallExpr::EmitBuiltinCoshf, tab.GetFloat(), { tab.GetFloat() }); +BUILTIN_FUNC_EMIT("sin", &ASTCallExpr::EmitBuiltinSin, tab.GetDouble(), { tab.GetDouble() }); +BUILTIN_FUNC_EMIT("sinf", &ASTCallExpr::EmitBuiltinSinf, tab.GetFloat(), { tab.GetFloat() }); +BUILTIN_FUNC_EMIT("sinh", &ASTCallExpr::EmitBuiltinSinh, tab.GetDouble(), { tab.GetDouble() }); +BUILTIN_FUNC_EMIT("sinhf", &ASTCallExpr::EmitBuiltinSinhf, tab.GetFloat(), { tab.GetFloat() }); +BUILTIN_FUNC_EMIT("exp", &ASTCallExpr::EmitBuiltinExp, tab.GetDouble(), { tab.GetDouble() }); +BUILTIN_FUNC_EMIT("expf", &ASTCallExpr::EmitBuiltinExpf, tab.GetFloat(), { tab.GetFloat() }); +BUILTIN_FUNC_EMIT("fmax", &ASTCallExpr::EmitBuiltinFmax, tab.GetDouble(), { tab.GetDouble(), tab.GetDouble() }); +BUILTIN_FUNC_EMIT("fmaxf", &ASTCallExpr::EmitBuiltinFmax, tab.GetFloat(), { tab.GetFloat(), tab.GetFloat() }); +BUILTIN_FUNC_EMIT("fmaxl", &ASTCallExpr::EmitBuiltinFmax, tab.GetDouble(), { tab.GetDouble(), tab.GetDouble() }); +BUILTIN_FUNC_EMIT("fmin", &ASTCallExpr::EmitBuiltinFmin, tab.GetDouble(), { tab.GetDouble(), tab.GetDouble() }); +BUILTIN_FUNC_EMIT("fminf", &ASTCallExpr::EmitBuiltinFmin, tab.GetFloat(), { tab.GetFloat(), tab.GetFloat() }); +BUILTIN_FUNC_EMIT("fminl", &ASTCallExpr::EmitBuiltinFmin, tab.GetDouble(), { tab.GetDouble(), tab.GetDouble() }); \ No newline at end of file diff --git a/src/hir2mpl/ast_input/clang/lib/ast_interface.cpp b/src/hir2mpl/ast_input/clang/lib/ast_interface.cpp index 22db296c1c54da276dc383257f22692c2d71320b..4ca0465b76f2f5b23b86a7b1fe5a41f39906f022 100644 --- a/src/hir2mpl/ast_input/clang/lib/ast_interface.cpp +++ b/src/hir2mpl/ast_input/clang/lib/ast_interface.cpp @@ -372,6 +372,12 @@ void LibAstFile::CollectFuncAttrs(const clang::FunctionDecl &decl, MapleGenericA if (decl.hasAttr()) { genAttrs.SetAttr(GENATTR_gnu_inline); } + if (decl.hasAttr()) { + genAttrs.SetAttr(GENATTR_hot); + } + if (decl.hasAttr()) { + genAttrs.SetAttr(GENATTR_cold); + } if (decl.isDefaulted()) { genAttrs.SetAttr(GENATTR_default); } @@ -447,10 +453,10 @@ void LibAstFile::CollectFuncAttrs(const clang::FunctionDecl &decl, MapleGenericA } } SetAttrVisibility(decl, genAttrs); - CheckUnsupportedFuncAttrs(decl); + VisitAllOfFuncAttrs(decl, genAttrs); } -void LibAstFile::CheckUnsupportedFuncAttrs(const clang::FunctionDecl &decl) const { +void LibAstFile::VisitAllOfFuncAttrs(const clang::FunctionDecl &decl, GenericAttrs &genAttrs) const { if (!decl.hasAttrs()) { return; } @@ -458,6 +464,9 @@ void LibAstFile::CheckUnsupportedFuncAttrs(const clang::FunctionDecl &decl) cons const clang::AttrVec &funcAttrs = decl.getAttrs(); for (const auto *attr : funcAttrs) { clang::attr::Kind attrKind = attr->getKind(); + if (attrKind == clang::attr::FunctionLikeMacro) { + genAttrs.SetAttr(GENATTR_like_macro); + } auto iterator = kUnsupportedFuncAttrsMap.find(attrKind); if (iterator != kUnsupportedFuncAttrsMap.end()) { unsupportedFuncAttrs += iterator->second + " "; @@ -639,7 +648,7 @@ const std::string LibAstFile::GetOrCreateMappedUnnamedName(const clang::Decl &de } uint32 uid; - if (FEOptions::GetInstance().GetFuncInlineSize() != 0 && !decl.getLocation().isMacroID()) { + if (FEOptions::GetInstance().NeedMangling() && !decl.getLocation().isMacroID()) { // use loc as key for wpaa mode Loc l = GetLOC(decl.getLocation()); CHECK_FATAL(l.fileIdx != 0, "loc is invaild"); @@ -715,7 +724,7 @@ void LibAstFile::EmitTypeName(const clang::RecordType &recordType, std::stringst } else { ss << GetOrCreateMappedUnnamedName(*recordDecl); } - if (FEOptions::GetInstance().GetFuncInlineSize() != 0 || FEOptions::GetInstance().GetWPAA()) { + if (FEOptions::GetInstance().NeedMangling()) { std::string layout = recordDecl->getDefinition() == nullptr ? "" : GetRecordLayoutString(*recordDecl); ss << FEUtils::GetFileNameHashStr(layout); } diff --git a/src/hir2mpl/ast_input/clang/lib/ast_interface.h b/src/hir2mpl/ast_input/clang/lib/ast_interface.h index 91933131a55a8afa944191437b6e630da0c2689d..e1d9d7ac60783a5e8316b1c84b3849ec6c58673d 100644 --- a/src/hir2mpl/ast_input/clang/lib/ast_interface.h +++ b/src/hir2mpl/ast_input/clang/lib/ast_interface.h @@ -83,6 +83,7 @@ class LibAstFile { void GetQualAttrs(const clang::QualType &qualType, MapleGenericAttrs &genAttrs, bool isSourceType) const; void CollectAttrs(const clang::NamedDecl &decl, MapleGenericAttrs &genAttrs, AccessKind access) const; void CollectFuncAttrs(const clang::FunctionDecl &decl, MapleGenericAttrs &genAttrs, AccessKind access) const; + void VisitAllOfFuncAttrs(const clang::FunctionDecl &decl, GenericAttrs &genAttrs) const; void CollectFuncReturnVarAttrs(const clang::CallExpr &expr, GenericAttrs &genAttrs) const; void SetAttrVisibility(const clang::DeclaratorDecl &decl, GenericAttrs &genAttrs) const; void SetAttrTLSModel(const clang::VarDecl &decl, GenericAttrs &genAttrs) const; diff --git a/src/hir2mpl/ast_input/clang/lib/ast_type.cpp b/src/hir2mpl/ast_input/clang/lib/ast_type.cpp index a83b7837a3f856b2b3931525ce235a2f8d24c29b..2934f715b5e6792fec5c920a7c6ca1b61103b4f0 100644 --- a/src/hir2mpl/ast_input/clang/lib/ast_type.cpp +++ b/src/hir2mpl/ast_input/clang/lib/ast_type.cpp @@ -153,22 +153,36 @@ bool LibAstFile::TypeHasMayAlias(const clang::QualType srcType) const { } MIRType *LibAstFile::CvtTypedef(MapleAllocator &allocator, const clang::QualType &qualType) { - const clang::TypedefType *typedefType = llvm::dyn_cast(qualType); - if (typedefType == nullptr) { + const clang::TypedefType *typeQualType = llvm::dyn_cast(qualType); + if (typeQualType == nullptr) { return nullptr; + } else { + return CvtTypedefDecl(allocator, *typeQualType->getDecl()); } - return CvtTypedefDecl(allocator, *typedefType->getDecl()); } MIRType *LibAstFile::CvtTypedefDecl(MapleAllocator &allocator, const clang::TypedefNameDecl &typedefDecl) { std::string typedefName = GetDeclName(typedefDecl, true); - MIRTypeByName *typdefType = nullptr; - clang::QualType underlyTy = typedefDecl.getCanonicalDecl()->getUnderlyingType(); - MIRType *type = CvtType(allocator, underlyTy, true); - if (type != nullptr) { - typdefType = FEManager::GetTypeManager().CreateTypedef(typedefName, *type); + if (FEOptions::GetInstance().IsDbgFriendly()) { + MIRTypeByName *typdefType = nullptr; + clang::QualType underlyTy = typedefDecl.getCanonicalDecl()->getUnderlyingType(); + MIRType *type = CvtType(allocator, underlyTy, true); + if (type != nullptr) { + typdefType = FEManager::GetTypeManager().CreateTypedef(typedefName, *type); + return typdefType; + } + } else { + MIRStructType *typdefType = nullptr; + clang::QualType underlyCanTy = typedefDecl.getCanonicalDecl()->getUnderlyingType().getCanonicalType(); + std::stringstream ss; + EmitTypeName(allocator, underlyCanTy, ss); + std::string name(ss.str()); + if (!llvm::isa(underlyCanTy) && typedefDecl.getMaxAlignment() != 0) { + typdefType = FEManager::GetTypeManager().GetOrCreateStructType(name); + return typdefType; + } } - return typdefType; + return nullptr; } MIRType *LibAstFile::CvtSourceType(MapleAllocator &allocator, const clang::QualType qualType) { @@ -177,13 +191,24 @@ MIRType *LibAstFile::CvtSourceType(MapleAllocator &allocator, const clang::QualT MIRType *LibAstFile::CvtType(MapleAllocator &allocator, const clang::QualType qualType, bool isSourceType, const clang::Type **vlaType) { - clang::QualType srcType = qualType.getCanonicalType(); - if (isSourceType) { + clang::QualType srcType = qualType; + if (!isSourceType) { + srcType = qualType.getCanonicalType(); + } + const clang::QualType srcPteType = srcType->getPointeeType(); + if (FEOptions::GetInstance().IsDbgFriendly()) { + if (isSourceType) { + MIRType *nameType = CvtTypedef(allocator, qualType); + if (nameType != nullptr) { + return nameType; + } + srcType = qualType; + } + } else { MIRType *nameType = CvtTypedef(allocator, qualType); - if (nameType != nullptr) { + if (srcPteType.isNull() && nameType != nullptr) { return nameType; } - srcType = qualType; } if (srcType.isNull()) { return nullptr; @@ -195,7 +220,6 @@ MIRType *LibAstFile::CvtType(MapleAllocator &allocator, const clang::QualType qu } // handle pointer types - const clang::QualType srcPteType = srcType->getPointeeType(); if (!srcPteType.isNull()) { MIRType *mirPointeeType = CvtType(allocator, srcPteType, isSourceType, vlaType); if (mirPointeeType == nullptr) { @@ -502,7 +526,8 @@ void LibAstFile::CollectBaseEltTypeFromArrayDecl(MapleAllocator &allocator, cons // Get alignment from the element type uint32 alignmentBits = astContext->getTypeAlignIfKnown(currQualType); if (alignmentBits != 0) { - if (llvm::isa(currQualType) && currQualType.getCanonicalType()->isBuiltinType()) { + if (llvm::isa(currQualType) && currQualType.getCanonicalType()->isBuiltinType() && + elemAttr.GetAttr(ATTR_aligned)) { elemAttr.SetAlign(alignmentBits / 8); // bits to byte } } diff --git a/src/hir2mpl/ast_input/clang/lib/sys/arm_neon.h b/src/hir2mpl/ast_input/clang/lib/sys/arm_neon.h index 304744346e331ab76c2d837d7885001d7772e9a1..b705d59f69b8b4b3d2462144e0cd9e67d9119a42 100644 --- a/src/hir2mpl/ast_input/clang/lib/sys/arm_neon.h +++ b/src/hir2mpl/ast_input/clang/lib/sys/arm_neon.h @@ -251,7 +251,7 @@ typedef struct float32x2x2_t { } float32x2x2_t; // vecTy vector_abs(vecTy src) -// Create a vector by getting the absolute value of the elements in src. +// Create a vector by getting the absolute value of the elements in src. int8x8_t __builtin_mpl_vector_abs_v8i8(int8x8_t); int16x4_t __builtin_mpl_vector_abs_v4i16(int16x4_t); int32x2_t __builtin_mpl_vector_abs_v2i32(int32x2_t); @@ -264,11 +264,30 @@ int32x4_t __builtin_mpl_vector_abs_v4i32(int32x4_t); int64x2_t __builtin_mpl_vector_abs_v2i64(int64x2_t); float32x4_t __builtin_mpl_vector_abs_v4f32(float32x4_t); float64x2_t __builtin_mpl_vector_abs_v2f64(float64x2_t); +int8x16_t __builtin_mpl_vector_absq_v16i8(int8x16_t); +int16x8_t __builtin_mpl_vector_absq_v8i16(int16x8_t); +int32x4_t __builtin_mpl_vector_absq_v4i32(int32x4_t); +int64x2_t __builtin_mpl_vector_absq_v2i64(int64x2_t); + +// vecTy vector_abd +int8x8_t __builtin_mpl_vector_abd_v8i8(int8x8_t, int8x8_t); +int8x16_t __builtin_mpl_vector_abdq_v16i8(int8x16_t, int8x16_t); +int16x4_t __builtin_mpl_vector_abd_v4i16(int16x4_t, int16x4_t); +int16x8_t __builtin_mpl_vector_abdq_v8i16(int16x8_t, int16x8_t); +int32x2_t __builtin_mpl_vector_abd_v2i32(int32x2_t, int32x2_t); +int32x4_t __builtin_mpl_vector_abdq_v4i32(int32x4_t, int32x4_t); +uint8x8_t __builtin_mpl_vector_abd_v8u8(uint8x8_t, uint8x8_t); +uint8x16_t __builtin_mpl_vector_abdq_v16u8(uint8x16_t, uint8x16_t); +uint16x4_t __builtin_mpl_vector_abd_v4u16(uint16x4_t, uint16x4_t); +uint16x8_t __builtin_mpl_vector_abdq_v8u16(uint16x8_t, uint16x8_t); +uint32x2_t __builtin_mpl_vector_abd_v2u32(uint32x2_t, uint32x2_t); +uint32x4_t __builtin_mpl_vector_abdq_v4u32(uint32x4_t, uint32x4_t); // vecTy vector_mov_narrow(vecTy src) -// copies each element of the operand vector to the corresponding element of the destination vector. -// The result element is half the width of the operand element, and values are saturated to the result width. -// The results are the same type as the operands. +// Copies each element of the operand vector to the corresponding element of the destination vector. +// The result element is half the width of the operand element, and values are saturated to the result width. +// The results are the same type as the operands. + uint8x8_t __builtin_mpl_vector_mov_narrow_v8u16(uint16x8_t); uint16x4_t __builtin_mpl_vector_mov_narrow_v4u32(uint32x4_t); uint32x2_t __builtin_mpl_vector_mov_narrow_v2u64(uint64x2_t); @@ -276,9 +295,424 @@ int8x8_t __builtin_mpl_vector_mov_narrow_v8i16(int16x8_t); int16x4_t __builtin_mpl_vector_mov_narrow_v4i32(int32x4_t); int32x2_t __builtin_mpl_vector_mov_narrow_v2i64(int64x2_t); +// vecTy vector_mvn +int8x8_t __builtin_mpl_vector_mvn_v8i8(int8x8_t); +int8x16_t __builtin_mpl_vector_mvnq_v16i8(int8x16_t); +uint8x8_t __builtin_mpl_vector_mvn_v8u8(uint8x8_t); +uint8x16_t __builtin_mpl_vector_mvnq_v16u8(uint8x16_t); + +// vecTy vector_orn +int8x8_t __builtin_mpl_vector_orn_v8i8(int8x8_t, int8x8_t); +int8x16_t __builtin_mpl_vector_ornq_v16i8(int8x16_t, int8x16_t); +uint8x8_t __builtin_mpl_vector_orn_v8u8(uint8x8_t, uint8x8_t); +uint8x16_t __builtin_mpl_vector_ornq_v16u8(uint8x16_t, uint8x16_t); + +// vecTy vector_cls +int8x8_t __builtin_mpl_vector_cls_v8i8(int8x8_t); +int8x16_t __builtin_mpl_vector_clsq_v16i8(int8x16_t); +int16x4_t __builtin_mpl_vector_cls_v4i16(int16x4_t); +int16x8_t __builtin_mpl_vector_clsq_v8i16(int16x8_t); +int32x2_t __builtin_mpl_vector_cls_v2i32(int32x2_t); +int32x4_t __builtin_mpl_vector_clsq_v4i32(int32x4_t); +int8x8_t __builtin_mpl_vector_cls_v8u8(uint8x8_t); +int8x16_t __builtin_mpl_vector_clsq_v16u8(uint8x16_t); +int16x4_t __builtin_mpl_vector_cls_v4u16(uint16x4_t); +int16x8_t __builtin_mpl_vector_clsq_v8u16(uint16x8_t); +int32x2_t __builtin_mpl_vector_cls_v2u32(uint32x2_t); +int32x4_t __builtin_mpl_vector_clsq_v4u32(uint32x4_t); + +// vecTy vector_clz +int8x8_t __builtin_mpl_vector_clz_v8i8(int8x8_t); +int8x16_t __builtin_mpl_vector_clzq_v16i8(int8x16_t); +int16x4_t __builtin_mpl_vector_clz_v4i16(int16x4_t); +int16x8_t __builtin_mpl_vector_clzq_v8i16(int16x8_t); +int32x2_t __builtin_mpl_vector_clz_v2i32(int32x2_t); +int32x4_t __builtin_mpl_vector_clzq_v4i32(int32x4_t); +uint8x8_t __builtin_mpl_vector_clz_v8u8(uint8x8_t); +uint8x16_t __builtin_mpl_vector_clzq_v16u8(uint8x16_t); +uint16x4_t __builtin_mpl_vector_clz_v4u16(uint16x4_t); +uint16x8_t __builtin_mpl_vector_clzq_v8u16(uint16x8_t); +uint32x2_t __builtin_mpl_vector_clz_v2u32(uint32x2_t); +uint32x4_t __builtin_mpl_vector_clzq_v4u32(uint32x4_t); + +// vecTy vector_cnt +int8x8_t __builtin_mpl_vector_cnt_v8i8(int8x8_t); +int8x16_t __builtin_mpl_vector_cntq_v16i8(int8x16_t); +uint8x8_t __builtin_mpl_vector_cnt_v8u8(uint8x8_t); +uint8x16_t __builtin_mpl_vector_cntq_v16u8(uint8x16_t); + +// vecTy vector_bic +int8x8_t __builtin_mpl_vector_bic_v8i8(int8x8_t, int8x8_t); +int8x16_t __builtin_mpl_vector_bicq_v16i8(int8x16_t, int8x16_t); +int16x4_t __builtin_mpl_vector_bic_v4i16(int16x4_t, int16x4_t); +int16x8_t __builtin_mpl_vector_bicq_v8i16(int16x8_t, int16x8_t); +int32x2_t __builtin_mpl_vector_bic_v2i32(int32x2_t, int32x2_t); +int32x4_t __builtin_mpl_vector_bicq_v4i32(int32x4_t, int32x4_t); +int64x1_t __builtin_mpl_vector_bic_v1i64(int64x1_t, int64x1_t); +int64x2_t __builtin_mpl_vector_bicq_v2i64(int64x2_t, int64x2_t); +uint8x8_t __builtin_mpl_vector_bic_v8u8(uint8x8_t, uint8x8_t); +uint8x16_t __builtin_mpl_vector_bicq_v16u8(uint8x16_t, uint8x16_t); +uint16x4_t __builtin_mpl_vector_bic_v4u16(uint16x4_t, uint16x4_t); +uint16x8_t __builtin_mpl_vector_bicq_v8u16(uint16x8_t, uint16x8_t); +uint32x2_t __builtin_mpl_vector_bic_v2u32(uint32x2_t, uint32x2_t); +uint32x4_t __builtin_mpl_vector_bicq_v4u32(uint32x4_t, uint32x4_t); +uint64x1_t __builtin_mpl_vector_bic_v1u64(uint64x1_t, uint64x1_t); +uint64x2_t __builtin_mpl_vector_bicq_v2u64(uint64x2_t, uint64x2_t); + +// vecTy vector_bsl +int8x8_t __builtin_mpl_vector_bsl_v8i8(uint8x8_t, int8x8_t, int8x8_t); +int8x16_t __builtin_mpl_vector_bslq_v16i8(uint8x16_t, int8x16_t, int8x16_t); +uint8x8_t __builtin_mpl_vector_bsl_v8u8(uint8x8_t, uint8x8_t, uint8x8_t); +uint8x16_t __builtin_mpl_vector_bslq_v16u8(uint8x16_t, uint8x16_t, uint8x16_t); + +// vecTy2 vector_copy_lane +int8x8_t __builtin_mpl_vector_copy_lane_v8i8(int8x8_t, const int, int8x8_t, const int); +int8x16_t __builtin_mpl_vector_copyq_lane_v16i8(int8x16_t, const int, int8x8_t, const int); +int16x4_t __builtin_mpl_vector_copy_lane_v4i16(int16x4_t, const int, int16x4_t, const int); +int16x8_t __builtin_mpl_vector_copyq_lane_v8i16(int16x8_t, const int, int16x4_t, const int); +int32x2_t __builtin_mpl_vector_copy_lane_v2i32(int32x2_t, const int, int32x2_t, const int); +int32x4_t __builtin_mpl_vector_copyq_lane_v4i32(int32x4_t, const int, int32x2_t, const int); +int64x1_t __builtin_mpl_vector_copy_lane_v1i64(int64x1_t, const int, int64x1_t, const int); +int64x2_t __builtin_mpl_vector_copyq_lane_v2i64(int64x2_t, const int, int64x1_t, const int); +uint8x8_t __builtin_mpl_vector_copy_lane_v8u8(uint8x8_t, const int, uint8x8_t, const int); +uint8x16_t __builtin_mpl_vector_copyq_lane_v16u8(uint8x16_t, const int, uint8x8_t, const int); +uint16x4_t __builtin_mpl_vector_copy_lane_v4u16(uint16x4_t, const int, uint16x4_t, const int); +uint16x8_t __builtin_mpl_vector_copyq_lane_v8u16(uint16x8_t, const int, uint16x4_t, const int); +uint32x2_t __builtin_mpl_vector_copy_lane_v2u32(uint32x2_t, const int, uint32x2_t, const int); +uint32x4_t __builtin_mpl_vector_copyq_lane_v4u32(uint32x4_t, const int, uint32x2_t, const int); +uint64x1_t __builtin_mpl_vector_copy_lane_v1u64(uint64x1_t, const int, uint64x1_t, const int); +uint64x2_t __builtin_mpl_vector_copyq_lane_v2u64(uint64x2_t, const int, uint64x1_t, const int); +int8x8_t __builtin_mpl_vector_copy_laneq_v8i8(int8x8_t, const int, int8x16_t, const int); +int8x16_t __builtin_mpl_vector_copyq_laneq_v16i8(int8x16_t, const int, int8x16_t, const int); +int16x4_t __builtin_mpl_vector_copy_laneq_v4i16(int16x4_t, const int, int16x8_t, const int); +int16x8_t __builtin_mpl_vector_copyq_laneq_v8i16(int16x8_t, const int, int16x8_t, const int); +int32x2_t __builtin_mpl_vector_copy_laneq_v2i32(int32x2_t, const int, int32x4_t, const int); +int32x4_t __builtin_mpl_vector_copyq_laneq_v4i32(int32x4_t, const int, int32x4_t, const int); +int64x1_t __builtin_mpl_vector_copy_laneq_v1i64(int64x1_t, const int, int64x2_t, const int); +int64x2_t __builtin_mpl_vector_copyq_laneq_v2i64(int64x2_t, const int, int64x2_t, const int); +uint8x8_t __builtin_mpl_vector_copy_laneq_v8u8(uint8x8_t, const int, uint8x16_t, const int); +uint8x16_t __builtin_mpl_vector_copyq_laneq_v16u8(uint8x16_t, const int, uint8x16_t, const int); +uint16x4_t __builtin_mpl_vector_copy_laneq_v4u16(uint16x4_t, const int, uint16x8_t, const int); +uint16x8_t __builtin_mpl_vector_copyq_laneq_v8u16(uint16x8_t, const int, uint16x8_t, const int); +uint32x2_t __builtin_mpl_vector_copy_laneq_v2u32(uint32x2_t, const int, uint32x4_t, const int); +uint32x4_t __builtin_mpl_vector_copyq_laneq_v4u32(uint32x4_t, const int, uint32x4_t, const int); +uint64x1_t __builtin_mpl_vector_copy_laneq_v1u64(uint64x1_t, const int, uint64x2_t, const int); +uint64x2_t __builtin_mpl_vector_copyq_laneq_v2u64(uint64x2_t, const int, uint64x2_t, const int); + +// vecTy vector_rbit +int8x8_t __builtin_mpl_vector_rbit_v8i8(int8x8_t); +int8x16_t __builtin_mpl_vector_rbitq_v16i8(int8x16_t); +uint8x8_t __builtin_mpl_vector_rbit_v8u8(uint8x8_t); +uint8x16_t __builtin_mpl_vector_rbitq_v16u8(uint8x16_t); + +// vecTy vector_create +int8x8_t __builtin_mpl_vector_create_v8i8(uint64_t); +int16x4_t __builtin_mpl_vector_create_v4i16(uint64_t); +int32x2_t __builtin_mpl_vector_create_v2i32(uint64_t); +int64x1_t __builtin_mpl_vector_create_v1i64(uint64_t); +uint8x8_t __builtin_mpl_vector_create_v8u8(uint64_t); +uint16x4_t __builtin_mpl_vector_create_v4u16(uint64_t); +uint32x2_t __builtin_mpl_vector_create_v2u32(uint64_t); +uint64x1_t __builtin_mpl_vector_create_v1u64(uint64_t); + +// vecTy vector_mov_n +int8x8_t __builtin_mpl_vector_mov_n_v8i8(int8_t); +int8x16_t __builtin_mpl_vector_movq_n_v16i8(int8_t); +int16x4_t __builtin_mpl_vector_mov_n_v4i16(int16_t); +int16x8_t __builtin_mpl_vector_movq_n_v8i16(int16_t); +int32x2_t __builtin_mpl_vector_mov_n_v2i32(int32_t); +int32x4_t __builtin_mpl_vector_movq_n_v4i32(int32_t); +int64x1_t __builtin_mpl_vector_mov_n_v1i64(int64_t); +int64x2_t __builtin_mpl_vector_movq_n_v2i64(int64_t); +uint8x8_t __builtin_mpl_vector_mov_n_v8u8(uint8_t); +uint8x16_t __builtin_mpl_vector_movq_n_v16u8(uint8_t); +uint16x4_t __builtin_mpl_vector_mov_n_v4u16(uint16_t); +uint16x8_t __builtin_mpl_vector_movq_n_v8u16(uint16_t); +uint32x4_t __builtin_mpl_vector_movq_n_v4u32(uint32_t); +uint32x2_t __builtin_mpl_vector_mov_n_v2u32(uint32_t); +uint64x1_t __builtin_mpl_vector_mov_n_v1u64(uint64_t); +uint64x2_t __builtin_mpl_vector_movq_n_v2u64(uint64_t); + +// vecTy vector_dup_lane +int8x8_t __builtin_mpl_vector_dup_lane_v8i8(int8x8_t, const int); +int8x16_t __builtin_mpl_vector_dupq_lane_v16i8(int8x8_t, const int); +int16x4_t __builtin_mpl_vector_dup_lane_v4i16(int16x4_t, const int); +int16x8_t __builtin_mpl_vector_dupq_lane_v8i16(int16x4_t, const int); +int32x2_t __builtin_mpl_vector_dup_lane_v2i32(int32x2_t, const int); +int32x4_t __builtin_mpl_vector_dupq_lane_v4i32(int32x2_t, const int); +int64x1_t __builtin_mpl_vector_dup_lane_v1i64(int64x1_t, const int); +int64x2_t __builtin_mpl_vector_dupq_lane_v2i64(int64x1_t, const int); +uint8x8_t __builtin_mpl_vector_dup_lane_v8u8(uint8x8_t, const int); +uint8x16_t __builtin_mpl_vector_dupq_lane_v16u8(uint8x8_t, const int); +uint16x4_t __builtin_mpl_vector_dup_lane_v4u16(uint16x4_t, const int); +uint16x8_t __builtin_mpl_vector_dupq_lane_v8u16(uint16x4_t, const int); +uint32x4_t __builtin_mpl_vector_dupq_lane_v4u32(uint32x2_t, const int); +uint64x1_t __builtin_mpl_vector_dup_lane_v1u64(uint64x1_t, const int); +uint64x2_t __builtin_mpl_vector_dupq_lane_v2u64(uint64x1_t, const int); +int8x8_t __builtin_mpl_vector_dup_laneq_v8i8(int8x16_t, const int); +int8x16_t __builtin_mpl_vector_dupq_laneq_v16i8(int8x16_t, const int); +int16x4_t __builtin_mpl_vector_dup_laneq_v4i16(int16x8_t, const int); +int16x8_t __builtin_mpl_vector_dupq_laneq_v8i16(int16x8_t, const int); +int32x2_t __builtin_mpl_vector_dup_laneq_v2i32(int32x4_t, const int); +int32x4_t __builtin_mpl_vector_dupq_laneq_v4i32(int32x4_t, const int); +int64x1_t __builtin_mpl_vector_dup_laneq_v1i64(int64x2_t, const int); +int64x2_t __builtin_mpl_vector_dupq_laneq_v2i64(int64x2_t, const int); +uint8x8_t __builtin_mpl_vector_dup_laneq_v8u8(uint8x16_t, const int); +uint8x16_t __builtin_mpl_vector_dupq_laneq_v16u8(uint8x16_t, const int); +uint16x4_t __builtin_mpl_vector_dup_laneq_v4u16(uint16x8_t, const int); +uint16x8_t __builtin_mpl_vector_dupq_laneq_v8u16(uint16x8_t, const int); +uint32x2_t __builtin_mpl_vector_dup_laneq_v2u32(uint32x4_t, const int); +uint32x4_t __builtin_mpl_vector_dupq_laneq_v4u32(uint32x4_t, const int); +uint64x1_t __builtin_mpl_vector_dup_laneq_v1u64(uint64x2_t, const int); +uint64x2_t __builtin_mpl_vector_dupq_laneq_v2u64(uint64x2_t, const int); + +// vecTy vector_combine +int64x2_t __builtin_mpl_vector_combine_v2i64(int64x1_t, int64x1_t); +uint64x2_t __builtin_mpl_vector_combine_v2u64(uint64x1_t, uint64x1_t); + +// vecTy vector_dup_lane +int8_t __builtin_mpl_vector_dupb_lane_v8i8(int8x8_t, const int); +int16_t __builtin_mpl_vector_duph_lane_v4i16(int16x4_t, const int); +int32_t __builtin_mpl_vector_dups_lane_v2i32(int32x2_t, const int); +int64_t __builtin_mpl_vector_dupd_lane_v1i64(int64x1_t, const int); +uint8_t __builtin_mpl_vector_dupb_lane_v8u8(uint8x8_t, const int); +uint16_t __builtin_mpl_vector_duph_lane_v4u16(uint16x4_t, const int); +uint32_t __builtin_mpl_vector_dups_lane_v2u32(uint32x2_t, const int); +uint64_t __builtin_mpl_vector_dupd_lane_v1u64(uint64x1_t, const int); +int8_t __builtin_mpl_vector_dupb_laneq_v16i8(int8x16_t, const int); +int16_t __builtin_mpl_vector_duph_laneq_v8i16(int16x8_t, const int); +int32_t __builtin_mpl_vector_dups_laneq_v4i32(int32x4_t, const int); +int64_t __builtin_mpl_vector_dupd_laneq_v2i64(int64x2_t, const int); +uint8_t __builtin_mpl_vector_dupb_laneq_v16u8(uint8x16_t, const int); +uint16_t __builtin_mpl_vector_duph_laneq_v8u16(uint16x8_t, const int); +uint32_t __builtin_mpl_vector_dups_laneq_v4u32(uint32x4_t, const int); +uint64_t __builtin_mpl_vector_dupd_laneq_v2u64(uint64x2_t, const int); + +// vecTy vector_rev +int8x8_t __builtin_mpl_vector_rev64_v8i8(int8x8_t); +int8x16_t __builtin_mpl_vector_rev64q_v16i8(int8x16_t); +int16x4_t __builtin_mpl_vector_rev64_v4i16(int16x4_t); +int16x8_t __builtin_mpl_vector_rev64q_v8i16(int16x8_t); +int32x2_t __builtin_mpl_vector_rev64_v2i32(int32x2_t); +int32x4_t __builtin_mpl_vector_rev64q_v4i32(int32x4_t); +uint8x8_t __builtin_mpl_vector_rev64_v8u8(uint8x8_t); +uint8x16_t __builtin_mpl_vector_rev64q_v16u8(uint8x16_t); +uint16x4_t __builtin_mpl_vector_rev64_v4u16(uint16x4_t); +uint16x8_t __builtin_mpl_vector_rev64q_v8u16(uint16x8_t); +uint32x2_t __builtin_mpl_vector_rev64_v2u32(uint32x2_t); +uint32x4_t __builtin_mpl_vector_rev64q_v4u32(uint32x4_t); +int8x8_t __builtin_mpl_vector_rev16_v8i8(int8x8_t); +int8x16_t __builtin_mpl_vector_rev16q_v16i8(int8x16_t); +uint8x8_t __builtin_mpl_vector_rev16_v8u8(uint8x8_t); +uint8x16_t __builtin_mpl_vector_rev16q_v16u8(uint8x16_t); + +// vecTy vector_zip1 +int8x8_t __builtin_mpl_vector_zip1_v8i8(int8x8_t, int8x8_t); +int8x16_t __builtin_mpl_vector_zip1q_v16i8(int8x16_t, int8x16_t); +int16x4_t __builtin_mpl_vector_zip1_v4i16(int16x4_t, int16x4_t); +int16x8_t __builtin_mpl_vector_zip1q_v8i16(int16x8_t, int16x8_t); +int32x2_t __builtin_mpl_vector_zip1_v2i32(int32x2_t, int32x2_t); +int32x4_t __builtin_mpl_vector_zip1q_v4i32(int32x4_t, int32x4_t); +int64x2_t __builtin_mpl_vector_zip1q_v2i64(int64x2_t, int64x2_t); +uint8x8_t __builtin_mpl_vector_zip1_v8u8(uint8x8_t, uint8x8_t); +uint8x16_t __builtin_mpl_vector_zip1q_v16u8(uint8x16_t, uint8x16_t); +uint16x4_t __builtin_mpl_vector_zip1_v4u16(uint16x4_t, uint16x4_t); +uint16x8_t __builtin_mpl_vector_zip1q_v8u16(uint16x8_t, uint16x8_t); +uint32x2_t __builtin_mpl_vector_zip1_v2u32(uint32x2_t, uint32x2_t); +uint32x4_t __builtin_mpl_vector_zip1q_v4u32(uint32x4_t, uint32x4_t); +uint64x2_t __builtin_mpl_vector_zip1q_v2u64(uint64x2_t, uint64x2_t); + +// vecTy vector_zip2 +int8x8_t __builtin_mpl_vector_zip2_v8i8(int8x8_t, int8x8_t); +int8x16_t __builtin_mpl_vector_zip2q_v16i8(int8x16_t, int8x16_t); +int16x4_t __builtin_mpl_vector_zip2_v4i16(int16x4_t, int16x4_t); +int16x8_t __builtin_mpl_vector_zip2q_v8i16(int16x8_t, int16x8_t); +int32x2_t __builtin_mpl_vector_zip2_v2i32(int32x2_t, int32x2_t); +int32x4_t __builtin_mpl_vector_zip2q_v4i32(int32x4_t, int32x4_t); +int64x2_t __builtin_mpl_vector_zip2q_v2i64(int64x2_t, int64x2_t); +uint8x8_t __builtin_mpl_vector_zip2_v8u8(uint8x8_t, uint8x8_t); +uint8x16_t __builtin_mpl_vector_zip2q_v16u8(uint8x16_t, uint8x16_t); +uint16x4_t __builtin_mpl_vector_zip2_v4u16(uint16x4_t, uint16x4_t); +uint16x8_t __builtin_mpl_vector_zip2q_v8u16(uint16x8_t, uint16x8_t); +uint32x2_t __builtin_mpl_vector_zip2_v2u32(uint32x2_t, uint32x2_t); +uint32x4_t __builtin_mpl_vector_zip2q_v4u32(uint32x4_t, uint32x4_t); +uint64x2_t __builtin_mpl_vector_zip2q_v2u64(uint64x2_t, uint64x2_t); + +// vecTy vector_uzp1 +int8x8_t __builtin_mpl_vector_uzp1_v8i8(int8x8_t, int8x8_t); +int8x16_t __builtin_mpl_vector_uzp1q_v16i8(int8x16_t, int8x16_t); +int16x4_t __builtin_mpl_vector_uzp1_v4i16(int16x4_t, int16x4_t); +int16x8_t __builtin_mpl_vector_uzp1q_v8i16(int16x8_t, int16x8_t); +int32x2_t __builtin_mpl_vector_uzp1_v2i32(int32x2_t, int32x2_t); +int32x4_t __builtin_mpl_vector_uzp1q_v4i32(int32x4_t, int32x4_t); +int64x2_t __builtin_mpl_vector_uzp1q_v2i64(int64x2_t, int64x2_t); +uint8x8_t __builtin_mpl_vector_uzp1_v8u8(uint8x8_t, uint8x8_t); +uint8x16_t __builtin_mpl_vector_uzp1q_v16u8(uint8x16_t, uint8x16_t); +uint16x4_t __builtin_mpl_vector_uzp1_v4u16(uint16x4_t, uint16x4_t); +uint16x8_t __builtin_mpl_vector_uzp1q_v8u16(uint16x8_t, uint16x8_t); +uint32x2_t __builtin_mpl_vector_uzp1_v2u32(uint32x2_t, uint32x2_t); +uint32x4_t __builtin_mpl_vector_uzp1q_v4u32(uint32x4_t, uint32x4_t); +uint64x2_t __builtin_mpl_vector_uzp1q_v2u64(uint64x2_t, uint64x2_t); + +// vecTy vector_uzp2 +int8x8_t __builtin_mpl_vector_uzp2_v8i8(int8x8_t, int8x8_t); +int8x16_t __builtin_mpl_vector_uzp2q_v16i8(int8x16_t, int8x16_t); +int16x4_t __builtin_mpl_vector_uzp2_v4i16(int16x4_t, int16x4_t); +int16x8_t __builtin_mpl_vector_uzp2q_v8i16(int16x8_t, int16x8_t); +int32x2_t __builtin_mpl_vector_uzp2_v2i32(int32x2_t, int32x2_t); +int32x4_t __builtin_mpl_vector_uzp2q_v4i32(int32x4_t, int32x4_t); +int64x2_t __builtin_mpl_vector_uzp2q_v2i64(int64x2_t, int64x2_t); +uint8x16_t __builtin_mpl_vector_uzp2q_v16u8(uint8x16_t, uint8x16_t); +uint8x8_t __builtin_mpl_vector_uzp2_v8u8(uint8x8_t, uint8x8_t); +uint16x4_t __builtin_mpl_vector_uzp2_v4u16(uint16x4_t, uint16x4_t); +uint16x8_t __builtin_mpl_vector_uzp2q_v8u16(uint16x8_t, uint16x8_t); +uint32x2_t __builtin_mpl_vector_uzp2_v2u32(uint32x2_t, uint32x2_t); +uint32x4_t __builtin_mpl_vector_uzp2q_v4u32(uint32x4_t, uint32x4_t); +uint64x2_t __builtin_mpl_vector_uzp2q_v2u64(uint64x2_t, uint64x2_t); + +// vecTy vector_trn1 +int8x8_t __builtin_mpl_vector_trn1_v8i8(int8x8_t, int8x8_t); +int8x16_t __builtin_mpl_vector_trn1q_v16i8(int8x16_t, int8x16_t); +int16x4_t __builtin_mpl_vector_trn1_v4i16(int16x4_t, int16x4_t); +int16x8_t __builtin_mpl_vector_trn1q_v8i16(int16x8_t, int16x8_t); +int32x2_t __builtin_mpl_vector_trn1_v2i32(int32x2_t, int32x2_t); +int32x4_t __builtin_mpl_vector_trn1q_v4i32(int32x4_t, int32x4_t); +int64x2_t __builtin_mpl_vector_trn1q_v2i64(int64x2_t, int64x2_t); +uint8x8_t __builtin_mpl_vector_trn1_v8u8(uint8x8_t, uint8x8_t); +uint8x16_t __builtin_mpl_vector_trn1q_v16u8(uint8x16_t, uint8x16_t); +uint16x4_t __builtin_mpl_vector_trn1_v4u16(uint16x4_t, uint16x4_t); +uint16x8_t __builtin_mpl_vector_trn1q_v8u16(uint16x8_t, uint16x8_t); +uint32x2_t __builtin_mpl_vector_trn1_v2u32(uint32x2_t, uint32x2_t); +uint32x4_t __builtin_mpl_vector_trn1q_v4u32(uint32x4_t, uint32x4_t); +uint64x2_t __builtin_mpl_vector_trn1q_v2u64(uint64x2_t, uint64x2_t); + +// vecTy vector_trn2 +int8x8_t __builtin_mpl_vector_trn2_v8i8(int8x8_t, int8x8_t); +int8x16_t __builtin_mpl_vector_trn2q_v16i8(int8x16_t, int8x16_t); +int16x4_t __builtin_mpl_vector_trn2_v4i16(int16x4_t, int16x4_t); +int16x8_t __builtin_mpl_vector_trn2q_v8i16(int16x8_t, int16x8_t); +int32x2_t __builtin_mpl_vector_trn2_v2i32(int32x2_t, int32x2_t); +int32x4_t __builtin_mpl_vector_trn2q_v4i32(int32x4_t, int32x4_t); +int64x2_t __builtin_mpl_vector_trn2q_v2i64(int64x2_t, int64x2_t); +uint8x8_t __builtin_mpl_vector_trn2_v8u8(uint8x8_t, uint8x8_t); +uint8x16_t __builtin_mpl_vector_trn2q_v16u8(uint8x16_t, uint8x16_t); +uint16x4_t __builtin_mpl_vector_trn2_v4u16(uint16x4_t, uint16x4_t); +uint16x8_t __builtin_mpl_vector_trn2q_v8u16(uint16x8_t, uint16x8_t); +uint32x2_t __builtin_mpl_vector_trn2_v2u32(uint32x2_t, uint32x2_t); +uint32x4_t __builtin_mpl_vector_trn2q_v4u32(uint32x4_t, uint32x4_t); +uint64x2_t __builtin_mpl_vector_trn2q_v2u64(uint64x2_t, uint64x2_t); + +// vecTy vector_ld1 +int8x8_t __builtin_mpl_vector_ld1_v8i8(int8_t const *); +int8x16_t __builtin_mpl_vector_ld1q_v16i8(int8_t const *); +int16x4_t __builtin_mpl_vector_ld1_v4i16(int16_t const *); +int16x8_t __builtin_mpl_vector_ld1q_v8i16(int16_t const *); +int32x2_t __builtin_mpl_vector_ld1_v2i32(int32_t const *); +int32x4_t __builtin_mpl_vector_ld1q_v4i32(int32_t const *); +int64x1_t __builtin_mpl_vector_ld1_v1i64(int64_t const *); +int64x2_t __builtin_mpl_vector_ld1q_v2i64(int64_t const *); +uint8x8_t __builtin_mpl_vector_ld1_v8u8(uint8_t const *); +uint8x16_t __builtin_mpl_vector_ld1q_v16u8(uint8_t const *); +uint16x4_t __builtin_mpl_vector_ld1_v4u16(uint16_t const *); +uint16x8_t __builtin_mpl_vector_ld1q_v8u16(uint16_t const *); +uint32x2_t __builtin_mpl_vector_ld1_v2u32(uint32_t const *); +uint32x4_t __builtin_mpl_vector_ld1q_v4u32(uint32_t const *); +uint64x1_t __builtin_mpl_vector_ld1_v1u64(uint64_t const *); +uint64x2_t __builtin_mpl_vector_ld1q_v2u64(uint64_t const *); + +// vecTy vector_ld1_lane +int8x8_t __builtin_mpl_vector_ld1_lane_v8i8(int8_t const *, int8x8_t, const int); +int8x16_t __builtin_mpl_vector_ld1q_lane_v16i8(int8_t const *, int8x16_t, const int); +int16x4_t __builtin_mpl_vector_ld1_lane_v4i16(int16_t const *, int16x4_t, const int); +int16x8_t __builtin_mpl_vector_ld1q_lane_v8i16(int16_t const *, int16x8_t, const int); +int32x2_t __builtin_mpl_vector_ld1_lane_v2i32(int32_t const *, int32x2_t, const int); +int32x4_t __builtin_mpl_vector_ld1q_lane_v4i32(int32_t const *, int32x4_t, const int); +int64x1_t __builtin_mpl_vector_ld1_lane_v1i64(int64_t const *, int64x1_t, const int); +int64x2_t __builtin_mpl_vector_ld1q_lane_v2i64(int64_t const *, int64x2_t, const int); +uint8x8_t __builtin_mpl_vector_ld1_lane_v8u8(uint8_t const *, uint8x8_t, const int); +uint8x16_t __builtin_mpl_vector_ld1q_lane_v16u8(uint8_t const *, uint8x16_t, const int); +uint16x4_t __builtin_mpl_vector_ld1_lane_v4u16(uint16_t const *, uint16x4_t, const int); +uint16x8_t __builtin_mpl_vector_ld1q_lane_v8u16(uint16_t const *, uint16x8_t, const int); +uint32x2_t __builtin_mpl_vector_ld1_lane_v2u32(uint32_t const *, uint32x2_t, const int); +uint32x4_t __builtin_mpl_vector_ld1q_lane_v4u32(uint32_t const *, uint32x4_t, const int); +uint64x1_t __builtin_mpl_vector_ld1_lane_v1u64(uint64_t const *, uint64x1_t, const int); +uint64x2_t __builtin_mpl_vector_ld1q_lane_v2u64(uint64_t const *, uint64x2_t, const int); + +// vecTy vector_ld1_dup +int8x8_t __builtin_mpl_vector_ld1_dup_v8i8(int8_t const *); +int8x16_t __builtin_mpl_vector_ld1q_dup_v16i8(int8_t const *); +int16x4_t __builtin_mpl_vector_ld1_dup_v4i16(int16_t const *); +int16x8_t __builtin_mpl_vector_ld1q_dup_v8i16(int16_t const *); +int32x2_t __builtin_mpl_vector_ld1_dup_v2i32(int32_t const *); +int32x4_t __builtin_mpl_vector_ld1q_dup_v4i32(int32_t const *); +int64x1_t __builtin_mpl_vector_ld1_dup_v1i64(int64_t const *); +int64x2_t __builtin_mpl_vector_ld1q_dup_v2i64(int64_t const *); +uint8x8_t __builtin_mpl_vector_ld1_dup_v8u8(uint8_t const *); +uint8x16_t __builtin_mpl_vector_ld1q_dup_v16u8(uint8_t const *); +uint16x4_t __builtin_mpl_vector_ld1_dup_v4u16(uint16_t const *); +uint16x8_t __builtin_mpl_vector_ld1q_dup_v8u16(uint16_t const *); +uint32x2_t __builtin_mpl_vector_ld1_dup_v2u32(uint32_t const *); +uint32x4_t __builtin_mpl_vector_ld1q_dup_v4u32(uint32_t const *); +uint64x1_t __builtin_mpl_vector_ld1_dup_v1u64(uint64_t const *); +uint64x2_t __builtin_mpl_vector_ld1q_dup_v2u64(uint64_t const *); + +// vecTy vector_ld2 +int8x8x2_t __builtin_mpl_vector_ld2_v8i8(int8_t const *); +int8x16x2_t __builtin_mpl_vector_ld2q_v16i8(int8_t const *); +int16x4x2_t __builtin_mpl_vector_ld2_v4i16(int16_t const *); +int16x8x2_t __builtin_mpl_vector_ld2q_v8i16(int16_t const *); +int32x2x2_t __builtin_mpl_vector_ld2_v2i32(int32_t const *); +int32x4x2_t __builtin_mpl_vector_ld2q_v4i32(int32_t const *); +uint8x8x2_t __builtin_mpl_vector_ld2_v8u8(uint8_t const *); +uint8x16x2_t __builtin_mpl_vector_ld2q_v16u8(uint8_t const *); +uint16x4x2_t __builtin_mpl_vector_ld2_v4u16(uint16_t const *); +uint16x8x2_t __builtin_mpl_vector_ld2q_v8u16(uint16_t const *); +uint32x2x2_t __builtin_mpl_vector_ld2_v2u32(uint32_t const *); +uint32x4x2_t __builtin_mpl_vector_ld2q_v4u32(uint32_t const *); +int64x1x2_t __builtin_mpl_vector_ld2_v1i64(int64_t const *); +uint64x1x2_t __builtin_mpl_vector_ld2_v1u64(uint64_t const *); +int64x2x2_t __builtin_mpl_vector_ld2q_v2i64(int64_t const *); +uint64x2x2_t __builtin_mpl_vector_ld2q_v2u64(uint64_t const *); + +// vecTy vector_ld3 +int8x8x3_t __builtin_mpl_vector_ld3_v8i8(int8_t const *); +int8x16x3_t __builtin_mpl_vector_ld3q_v16i8(int8_t const *); +int16x4x3_t __builtin_mpl_vector_ld3_v4i16(int16_t const *); +int16x8x3_t __builtin_mpl_vector_ld3q_v8i16(int16_t const *); +int32x2x3_t __builtin_mpl_vector_ld3_v2i32(int32_t const *); +int32x4x3_t __builtin_mpl_vector_ld3q_v4i32(int32_t const *); +uint8x8x3_t __builtin_mpl_vector_ld3_v8u8(uint8_t const *); +uint8x16x3_t __builtin_mpl_vector_ld3q_v16u8(uint8_t const *); +uint16x4x3_t __builtin_mpl_vector_ld3_v4u16(uint16_t const *); +uint16x8x3_t __builtin_mpl_vector_ld3q_v8u16(uint16_t const *); +uint32x2x3_t __builtin_mpl_vector_ld3_v2u32(uint32_t const *); +uint32x4x3_t __builtin_mpl_vector_ld3q_v4u32(uint32_t const *); +int64x1x3_t __builtin_mpl_vector_ld3_v1i64(int64_t const *); +uint64x1x3_t __builtin_mpl_vector_ld3_v1u64(uint64_t const *); +int64x2x3_t __builtin_mpl_vector_ld3q_v2i64(int64_t const *); +uint64x2x3_t __builtin_mpl_vector_ld3q_v2u64(uint64_t const *); + +// vecTy vector_ld4 +int8x8x4_t __builtin_mpl_vector_ld4_v8i8(int8_t const *); +int8x16x4_t __builtin_mpl_vector_ld4q_v16i8(int8_t const *); +int16x4x4_t __builtin_mpl_vector_ld4_v4i16(int16_t const *); +int16x8x4_t __builtin_mpl_vector_ld4q_v8i16(int16_t const *); +int32x2x4_t __builtin_mpl_vector_ld4_v2i32(int32_t const *); +int32x4x4_t __builtin_mpl_vector_ld4q_v4i32(int32_t const *); +uint8x8x4_t __builtin_mpl_vector_ld4_v8u8(uint8_t const *); +uint8x16x4_t __builtin_mpl_vector_ld4q_v16u8(uint8_t const *); +uint16x4x4_t __builtin_mpl_vector_ld4_v4u16(uint16_t const *); +uint16x8x4_t __builtin_mpl_vector_ld4q_v8u16(uint16_t const *); +uint32x2x4_t __builtin_mpl_vector_ld4_v2u32(uint32_t const *); +uint32x4x4_t __builtin_mpl_vector_ld4q_v4u32(uint32_t const *); +int64x1x4_t __builtin_mpl_vector_ld4_v1i64(int64_t const *); +uint64x1x4_t __builtin_mpl_vector_ld4_v1u64(uint64_t const *); +int64x2x4_t __builtin_mpl_vector_ld4q_v2i64(int64_t const *); +uint64x2x4_t __builtin_mpl_vector_ld4q_v2u64(uint64_t const *); + // vecTy vector_addl_low(vecTy src1, vecTy src2) -// Add each element of the source vector to second source -// widen the result into the destination vector. +// Add each element of the source vector to second source widen the result into the destination vector. + int16x8_t __builtin_mpl_vector_addl_low_v8i8(int8x8_t, int8x8_t); int32x4_t __builtin_mpl_vector_addl_low_v4i16(int16x4_t, int16x4_t); int64x2_t __builtin_mpl_vector_addl_low_v2i32(int32x2_t, int32x2_t); @@ -287,8 +721,8 @@ uint32x4_t __builtin_mpl_vector_addl_low_v4u16(uint16x4_t, uint16x4_t); uint64x2_t __builtin_mpl_vector_addl_low_v2u32(uint32x2_t, uint32x2_t); // vecTy vector_addl_high(vecTy src1, vecTy src2) -// Add each element of the source vector to upper half of second source -// widen the result into the destination vector. +// Add each element of the source vector to upper half of second source widen the result into the destination vector. + int16x8_t __builtin_mpl_vector_addl_high_v8i8(int8x16_t, int8x16_t); int32x4_t __builtin_mpl_vector_addl_high_v4i16(int16x8_t, int16x8_t); int64x2_t __builtin_mpl_vector_addl_high_v2i32(int32x4_t, int32x4_t); @@ -297,8 +731,8 @@ uint32x4_t __builtin_mpl_vector_addl_high_v4u16(uint16x8_t, uint16x8_t); uint64x2_t __builtin_mpl_vector_addl_high_v2u32(uint32x4_t, uint32x4_t); // vecTy vector_addw_low(vecTy src1, vecTy src2) -// Add each element of the source vector to second source -// widen the result into the destination vector. +// Add each element of the source vector to second source widen the result into the destination vector. + int16x8_t __builtin_mpl_vector_addw_low_v8i8(int16x8_t, int8x8_t); int32x4_t __builtin_mpl_vector_addw_low_v4i16(int32x4_t, int16x4_t); int64x2_t __builtin_mpl_vector_addw_low_v2i32(int64x2_t, int32x2_t); @@ -307,8 +741,8 @@ uint32x4_t __builtin_mpl_vector_addw_low_v4u16(uint32x4_t, uint16x4_t); uint64x2_t __builtin_mpl_vector_addw_low_v2u32(uint64x2_t, uint32x2_t); // vecTy vector_addw_high(vecTy src1, vecTy src2) -// Add each element of the source vector to upper half of second source -// widen the result into the destination vector. +// Add each element of the source vector to upper half of second source widen the result into the destination vector. + int16x8_t __builtin_mpl_vector_addw_high_v8i8(int16x8_t, int8x16_t); int32x4_t __builtin_mpl_vector_addw_high_v4i16(int32x4_t, int16x8_t); int64x2_t __builtin_mpl_vector_addw_high_v2i32(int64x2_t, int32x4_t); @@ -316,9 +750,31 @@ uint16x8_t __builtin_mpl_vector_addw_high_v8u8(uint16x8_t, uint8x16_t); uint32x4_t __builtin_mpl_vector_addw_high_v4u16(uint32x4_t, uint16x8_t); uint64x2_t __builtin_mpl_vector_addw_high_v2u32(uint64x2_t, uint32x4_t); +// vectTy vector_recpe +uint32x2_t __builtin_mpl_vector_recpe_v2u32(uint32x2_t); +uint32x4_t __builtin_mpl_vector_recpeq_v4u32(uint32x4_t); + +// vectTy vector_pdd +int32x2_t __builtin_mpl_vector_padd_v2i32(int32x2_t, int32x2_t); +uint32x2_t __builtin_mpl_vector_padd_v2u32(uint32x2_t, uint32x2_t); +int8x8_t __builtin_mpl_vector_padd_v8i8(int8x8_t, int8x8_t); +int16x4_t __builtin_mpl_vector_padd_v4i16(int16x4_t, int16x4_t); +uint8x8_t __builtin_mpl_vector_padd_v8u8(uint8x8_t, uint8x8_t); +uint16x4_t __builtin_mpl_vector_padd_v4u16(uint16x4_t, uint16x4_t); +int8x16_t __builtin_mpl_vector_paddq_v16i8(int8x16_t, int8x16_t); +int16x8_t __builtin_mpl_vector_paddq_v8i16(int16x8_t, int16x8_t); +int32x4_t __builtin_mpl_vector_paddq_v4i32(int32x4_t, int32x4_t); +int64x2_t __builtin_mpl_vector_paddq_v2i64(int64x2_t, int64x2_t); +uint8x16_t __builtin_mpl_vector_paddq_v16u8(uint8x16_t, uint8x16_t); +uint16x8_t __builtin_mpl_vector_paddq_v8u16(uint16x8_t, uint16x8_t); +uint32x4_t __builtin_mpl_vector_paddq_v4u32(uint32x4_t, uint32x4_t); +uint64x2_t __builtin_mpl_vector_paddq_v2u64(uint64x2_t, uint64x2_t); +int64x1_t __builtin_mpl_vector_paddd_v2i64(int64x2_t); +uint64x1_t __builtin_mpl_vector_paddd_v2u64(uint64x2_t); + // vectTy vector_from_scalar(scalarTy val) -// Create a vector by replicating the scalar value to all elements of the -// vector. +// Create a vector by replicating the scalar value to all elements of the vector. + int64x2_t __builtin_mpl_vector_from_scalar_v2i64(int64_t); int32x4_t __builtin_mpl_vector_from_scalar_v4i32(int32_t); int16x8_t __builtin_mpl_vector_from_scalar_v8i16(int16_t); @@ -341,8 +797,9 @@ float64x1_t __builtin_mpl_vector_from_scalar_v1f64(float64_t); float32x2_t __builtin_mpl_vector_from_scalar_v2f32(float32_t); // vecTy2 vector_madd(vecTy2 accum, vecTy1 src1, vecTy1 src2) -// Multiply the elements of src1 and src2, then accumulate into accum. -// Elements of vecTy2 are twice as long as elements of vecTy1. +// Multiply the elements of src1 and src2, then accumulate into accum. +// Elements of vecTy2 are twice as long as elements of vecTy1. + int64x2_t __builtin_mpl_vector_madd_v2i32(int64x2_t, int32x2_t, int32x2_t); int32x4_t __builtin_mpl_vector_madd_v4i16(int32x4_t, int16x4_t, int16x4_t); int16x8_t __builtin_mpl_vector_madd_v8i8(int16x8_t, int8x8_t, int8x8_t); @@ -351,8 +808,8 @@ uint32x4_t __builtin_mpl_vector_madd_v4u16(uint32x4_t, uint16x4_t, uint16x4_t); uint16x8_t __builtin_mpl_vector_madd_v8u8(uint16x8_t, uint8x8_t, uint8x8_t); // vecTy2 vector_mull_low(vecTy1 src1, vecTy1 src2) -// Multiply the elements of src1 and src2. Elements of vecTy2 are twice as -// long as elements of vecTy1. +// Multiply the elements of src1 and src2. Elements of vecTy2 are twice as long as elements of vecTy1. + int64x2_t __builtin_mpl_vector_mull_low_v2i32(int32x2_t, int32x2_t); int32x4_t __builtin_mpl_vector_mull_low_v4i16(int16x4_t, int16x4_t); int16x8_t __builtin_mpl_vector_mull_low_v8i8(int8x8_t, int8x8_t); @@ -361,8 +818,8 @@ uint32x4_t __builtin_mpl_vector_mull_low_v4u16(uint16x4_t, uint16x4_t); uint16x8_t __builtin_mpl_vector_mull_low_v8u8(uint8x8_t, uint8x8_t); // vecTy2 vector_mull_high(vecTy1 src1, vecTy1 src2) -// Multiply the upper elements of src1 and src2. Elements of vecTy2 are twice -// as long as elements of vecTy1. +// Multiply the upper elements of src1 and src2. Elements of vecTy2 are twice as long as elements of vecTy1. + int64x2_t __builtin_mpl_vector_mull_high_v2i32(int32x4_t, int32x4_t); int32x4_t __builtin_mpl_vector_mull_high_v4i16(int16x8_t, int16x8_t); int16x8_t __builtin_mpl_vector_mull_high_v8i8(int8x16_t, int8x16_t); @@ -371,8 +828,9 @@ uint32x4_t __builtin_mpl_vector_mull_high_v4u16(uint16x8_t, uint16x8_t); uint16x8_t __builtin_mpl_vector_mull_high_v8u8(uint8x16_t, uint8x16_t); // vecTy vector_merge(vecTy src1, vecTy src2, int n) -// Create a vector by concatenating the high elements of src1, starting -// with the nth element, followed by the low elements of src2. +// Create a vector by concatenating the high elements of src1, starting with the nth element, followed by the low +// elements of src2. + int64x2_t __builtin_mpl_vector_merge_v2i64(int64x2_t, int64x2_t, int32_t); int32x4_t __builtin_mpl_vector_merge_v4i32(int32x4_t, int32x4_t, int32_t); int16x8_t __builtin_mpl_vector_merge_v8i16(int16x8_t, int16x8_t, int32_t); @@ -395,7 +853,8 @@ float64x1_t __builtin_mpl_vector_merge_v1f64(float64x1_t, float64x1_t, int32_t); float32x2_t __builtin_mpl_vector_merge_v2f32(float32x2_t, float32x2_t, int32_t); // vecTy2 vector_get_low(vecTy1 src) -// Create a vector from the low part of the source vector. +// Create a vector from the low part of the source vector. + int64x1_t __builtin_mpl_vector_get_low_v2i64(int64x2_t); int32x2_t __builtin_mpl_vector_get_low_v4i32(int32x4_t); int16x4_t __builtin_mpl_vector_get_low_v8i16(int16x8_t); @@ -404,11 +863,14 @@ uint64x1_t __builtin_mpl_vector_get_low_v2u64(uint64x2_t); uint32x2_t __builtin_mpl_vector_get_low_v4u32(uint32x4_t); uint16x4_t __builtin_mpl_vector_get_low_v8u16(uint16x8_t); uint8x8_t __builtin_mpl_vector_get_low_v16u8(uint8x16_t); +float32x2_t __builtin_mpl_vector_get_low_v2f32(float32x4_t); +float64x1_t __builtin_mpl_vector_get_low_v1f64(float64x2_t); float64x1_t __builtin_mpl_vector_get_low_v2f64(float64x2_t); float32x2_t __builtin_mpl_vector_get_low_v4f32(float32x4_t); // vecTy2 vector_get_high(vecTy1 src) -// Create a vector from the high part of the source vector. +// Create a vector from the high part of the source vector. + int64x1_t __builtin_mpl_vector_get_high_v2i64(int64x2_t); int32x2_t __builtin_mpl_vector_get_high_v4i32(int32x4_t); int16x4_t __builtin_mpl_vector_get_high_v8i16(int16x8_t); @@ -419,49 +881,62 @@ uint16x4_t __builtin_mpl_vector_get_high_v8u16(uint16x8_t); uint8x8_t __builtin_mpl_vector_get_high_v16u8(uint8x16_t); float64x1_t __builtin_mpl_vector_get_high_v2f64(float64x2_t); float32x2_t __builtin_mpl_vector_get_high_v4f32(float32x4_t); +float32x2_t __builtin_mpl_vector_get_high_v2f32(float32x4_t); +float64x1_t __builtin_mpl_vector_get_high_v1f64(float64x1_t); // scalarTy vector_get_element(vecTy src, int n) -// Get the nth element of the source vector. -float64_t __builtin_mpl_vector_get_element_v2f64(float64x2_t, int32_t); -float32_t __builtin_mpl_vector_get_element_v4f32(float32x4_t, int32_t); -float64_t __builtin_mpl_vector_get_element_v1f64(float64x1_t, int32_t); -float32_t __builtin_mpl_vector_get_element_v2f32(float32x2_t, int32_t); +// Get the nth element of the source vector. + +float32_t __builtin_mpl_vector_get_element_v2f32(float32x2_t, const int); +float64_t __builtin_mpl_vector_get_element_v1f64(float64x1_t, const int); +float32_t __builtin_mpl_vector_get_element_v4f32(float32x4_t, const int); +float64_t __builtin_mpl_vector_get_element_v2f64(float64x2_t, const int); + +// scalarTy vector_get_lane +uint8_t __builtin_mpl_vector_get_lane_v8u8(uint8x8_t, const int); +uint16_t __builtin_mpl_vector_get_lane_v4u16(uint16x4_t, const int); +uint32_t __builtin_mpl_vector_get_lane_v2u32(uint32x2_t, const int); +uint64_t __builtin_mpl_vector_get_lane_v1u64(uint64x1_t, const int); +int8_t __builtin_mpl_vector_get_lane_v8i8(int8x8_t, const int); +int16_t __builtin_mpl_vector_get_lane_v4i16(int16x4_t, const int); +int32_t __builtin_mpl_vector_get_lane_v2i32(int32x2_t, const int); +int64_t __builtin_mpl_vector_get_lane_v1i64(int64x1_t, const int); +uint8_t __builtin_mpl_vector_getq_lane_v16u8(uint8x16_t, const int); +uint16_t __builtin_mpl_vector_getq_lane_v8u16(uint16x8_t, const int); +uint32_t __builtin_mpl_vector_getq_lane_v4u32(uint32x4_t, const int); +uint64_t __builtin_mpl_vector_getq_lane_v2u64(uint64x2_t, const int); +int8_t __builtin_mpl_vector_getq_lane_v16i8(int8x16_t, const int); +int16_t __builtin_mpl_vector_getq_lane_v8i16(int16x8_t, const int); +int32_t __builtin_mpl_vector_getq_lane_v4i32(int32x4_t, const int); +int64_t __builtin_mpl_vector_getq_lane_v2i64(int64x2_t, const int); // vecTy vector_set_element(ScalarTy value, VecTy vec, int n) -// Set the nth element of the source vector to value. -int64x2_t __builtin_mpl_vector_set_element_v2i64(int64_t, int64x2_t, int32_t); -int32x4_t __builtin_mpl_vector_set_element_v4i32(int32_t, int32x4_t, int32_t); -int16x8_t __builtin_mpl_vector_set_element_v8i16(int16_t, int16x8_t, int32_t); -int8x16_t __builtin_mpl_vector_set_element_v16i8(int8_t, int8x16_t, int32_t); -uint64x2_t __builtin_mpl_vector_set_element_v2u64(uint64_t, uint64x2_t, - int32_t); -uint32x4_t __builtin_mpl_vector_set_element_v4u32(uint32_t, uint32x4_t, - int32_t); -uint16x8_t __builtin_mpl_vector_set_element_v8u16(uint16_t, uint16x8_t, - int32_t); -uint8x16_t __builtin_mpl_vector_set_element_v16u8(uint8_t, uint8x16_t, int32_t); -float64x2_t __builtin_mpl_vector_set_element_v2f64(float64_t, float64x2_t, - int32_t); -float32x4_t __builtin_mpl_vector_set_element_v4f32(float32_t, float32x4_t, - int32_t); -int64x1_t __builtin_mpl_vector_set_element_v1i64(int64_t, int64x1_t, int32_t); -int32x2_t __builtin_mpl_vector_set_element_v2i32(int32_t, int32x2_t, int32_t); -int16x4_t __builtin_mpl_vector_set_element_v4i16(int16_t, int16x4_t, int32_t); -int8x8_t __builtin_mpl_vector_set_element_v8i8(int8_t, int8x8_t, int32_t); -uint64x1_t __builtin_mpl_vector_set_element_v1u64(uint64_t, uint64x1_t, - int32_t); -uint32x2_t __builtin_mpl_vector_set_element_v2u32(uint32_t, uint32x2_t, - int32_t); -uint16x4_t __builtin_mpl_vector_set_element_v4u16(uint16_t, uint16x4_t, - int32_t); -uint8x8_t __builtin_mpl_vector_set_element_v8u8(uint8_t, uint8x8_t, int32_t); -float64x1_t __builtin_mpl_vector_set_element_v1f64(float64_t, float64x1_t, - int32_t); -float32x2_t __builtin_mpl_vector_set_element_v2f32(float32_t, float32x2_t, - int32_t); +// Set the nth element of the source vector to value. + +int64x2_t __builtin_mpl_vector_set_element_v2i64(int64_t, int64x2_t, const int); +int32x4_t __builtin_mpl_vector_set_element_v4i32(int32_t, int32x4_t, const int); +int16x8_t __builtin_mpl_vector_set_element_v8i16(int16_t, int16x8_t, const int); +int8x16_t __builtin_mpl_vector_set_element_v16i8(int8_t, int8x16_t, const int); +uint64x2_t __builtin_mpl_vector_set_element_v2u64(uint64_t, uint64x2_t, const int); +uint32x4_t __builtin_mpl_vector_set_element_v4u32(uint32_t, uint32x4_t, const int); +uint16x8_t __builtin_mpl_vector_set_element_v8u16(uint16_t, uint16x8_t, const int); +uint8x16_t __builtin_mpl_vector_set_element_v16u8(uint8_t, uint8x16_t, const int); +float64x2_t __builtin_mpl_vector_set_element_v2f64(float64_t, float64x2_t, const int); +float32x4_t __builtin_mpl_vector_set_element_v4f32(float32_t, float32x4_t, const int); +int64x1_t __builtin_mpl_vector_set_element_v1i64(int64_t, int64x1_t, const int); +int32x2_t __builtin_mpl_vector_set_element_v2i32(int32_t, int32x2_t, const int); +int16x4_t __builtin_mpl_vector_set_element_v4i16(int16_t, int16x4_t, const int); +int8x8_t __builtin_mpl_vector_set_element_v8i8(int8_t, int8x8_t, const int); +uint64x1_t __builtin_mpl_vector_set_element_v1u64(uint64_t, uint64x1_t, const int); +uint32x2_t __builtin_mpl_vector_set_element_v2u32(uint32_t, uint32x2_t, const int); +uint16x4_t __builtin_mpl_vector_set_element_v4u16(uint16_t, uint16x4_t, const int); +uint8x8_t __builtin_mpl_vector_set_element_v8u8(uint8_t, uint8x8_t, const int); +float64x1_t __builtin_mpl_vector_set_element_v1f64(float64_t, float64x1_t, const int); +float32x2_t __builtin_mpl_vector_set_element_v2f32(float32_t, float32x2_t, const int); // vecTy2 vector_abdl(vectTy1 src2, vectTy2 src2) -// Create a widened vector by getting the abs value of subtracted arguments. +// Create a widened vector by getting the abs value of subtracted arguments. + int16x8_t __builtin_mpl_vector_labssub_low_v8i8(int8x8_t, int8x8_t); int32x4_t __builtin_mpl_vector_labssub_low_v4i16(int16x4_t, int16x4_t); int64x2_t __builtin_mpl_vector_labssub_low_v2i32(int32x2_t, int32x2_t); @@ -470,7 +945,8 @@ uint32x4_t __builtin_mpl_vector_labssub_low_v4u16(uint16x4_t, uint16x4_t); uint64x2_t __builtin_mpl_vector_labssub_low_v2u32(uint32x2_t, uint32x2_t); // vecTy2 vector_abdl_high(vectTy1 src2, vectTy2 src2) -// Create a widened vector by getting the abs value of subtracted high arguments. +// Create a widened vector by getting the abs value of subtracted high arguments. + int16x8_t __builtin_mpl_vector_labssub_high_v8i8(int8x16_t, int8x16_t); int32x4_t __builtin_mpl_vector_labssub_high_v4i16(int16x8_t, int16x8_t); int64x2_t __builtin_mpl_vector_labssub_high_v2i32(int32x4_t, int32x4_t); @@ -479,8 +955,9 @@ uint32x4_t __builtin_mpl_vector_labssub_high_v4u16(uint16x8_t, uint16x8_t); uint64x2_t __builtin_mpl_vector_labssub_high_v2u32(uint32x4_t, uint32x4_t); // vecTy2 vector_narrow_low(vecTy1 src) -// Narrow each element of the source vector to half of the original width, -// writing the lower half into the destination vector. +// Narrow each element of the source vector to half of the original width, writing the lower half into the destination +// vector. + int32x2_t __builtin_mpl_vector_narrow_low_v2i64(int64x2_t); int16x4_t __builtin_mpl_vector_narrow_low_v4i32(int32x4_t); int8x8_t __builtin_mpl_vector_narrow_low_v8i16(int16x8_t); @@ -489,8 +966,9 @@ uint16x4_t __builtin_mpl_vector_narrow_low_v4u32(uint32x4_t); uint8x8_t __builtin_mpl_vector_narrow_low_v8u16(uint16x8_t); // vecTy2 vector_narrow_high(vecTy1 src1, vecTy2 src2) -// Narrow each element of the source vector to half of the original width, -// concatenate the upper half into the destination vector. +// Narrow each element of the source vector to half of the original width, concatenate the upper half into the +// destination vector. + int32x4_t __builtin_mpl_vector_narrow_high_v2i64(int32x2_t, int64x2_t); int16x8_t __builtin_mpl_vector_narrow_high_v4i32(int16x4_t, int32x4_t); int8x16_t __builtin_mpl_vector_narrow_high_v8i16(int8x8_t, int16x8_t); @@ -499,7 +977,8 @@ uint16x8_t __builtin_mpl_vector_narrow_high_v4u32(uint16x4_t, uint32x4_t); uint8x16_t __builtin_mpl_vector_narrow_high_v8u16(uint8x8_t, uint16x8_t); // vecTy1 vector_adapl(vecTy1 src1, vecTy2 src2) -// Vector pairwise addition and accumulate +// Vector pairwise addition and accumulate + int16x4_t __builtin_mpl_vector_pairwise_adalp_v8i8(int16x4_t, int8x8_t); int32x2_t __builtin_mpl_vector_pairwise_adalp_v4i16(int32x2_t, int16x4_t); int64x1_t __builtin_mpl_vector_pairwise_adalp_v2i32(int64x1_t, int32x2_t); @@ -514,9 +993,9 @@ uint32x4_t __builtin_mpl_vector_pairwise_adalp_v8u16(uint32x4_t, uint16x8_t); uint64x2_t __builtin_mpl_vector_pairwise_adalp_v4u32(uint64x2_t, uint32x4_t); // vecTy2 vector_pairwise_add(vecTy1 src) -// Add pairs of elements from the source vector and put the result into the -// destination vector, whose element size is twice and the number of -// elements is half of the source vector type. +// Add pairs of elements from the source vector and put the result into the destination vector, whose element size is +// twice and the number of elements is half of the source vector type. + int64x2_t __builtin_mpl_vector_pairwise_add_v4i32(int32x4_t); int32x4_t __builtin_mpl_vector_pairwise_add_v8i16(int16x8_t); int16x8_t __builtin_mpl_vector_pairwise_add_v16i8(int8x16_t); @@ -531,7 +1010,8 @@ uint32x2_t __builtin_mpl_vector_pairwise_add_v4u16(uint16x4_t); uint16x4_t __builtin_mpl_vector_pairwise_add_v8u8(uint8x8_t); // vecTy vector_reverse(vecTy src) -// Create a vector by reversing the order of the elements in src. +// Create a vector by reversing the order of the elements in src. + int64x2_t __builtin_mpl_vector_reverse_v2i64(int64x2_t); int32x4_t __builtin_mpl_vector_reverse_v4i32(int32x4_t); int16x8_t __builtin_mpl_vector_reverse_v8i16(int16x8_t); @@ -554,7 +1034,8 @@ float64x1_t __builtin_mpl_vector_reverse_v1f64(float64x1_t); float32x2_t __builtin_mpl_vector_reverse_v2f32(float32x2_t); // vecTy vector_shli(vecTy src, const int n) -// Shift each element in the vector left by n. +// Shift each element in the vector left by n. + int64x2_t __builtin_mpl_vector_shli_v2i64(int64x2_t, const int); int32x4_t __builtin_mpl_vector_shli_v4i32(int32x4_t, const int); int16x8_t __builtin_mpl_vector_shli_v8i16(int16x8_t, const int); @@ -572,8 +1053,27 @@ uint32x2_t __builtin_mpl_vector_shli_v2u32(uint32x2_t, const int); uint16x4_t __builtin_mpl_vector_shli_v4u16(uint16x4_t, const int); uint8x8_t __builtin_mpl_vector_shli_v8u8(uint8x8_t, const int); +// vecTy vector_shln +int8x8_t __builtin_mpl_vector_shl_n_v8i8(int8x8_t, const int); +int8x16_t __builtin_mpl_vector_shlq_n_v16i8(int8x16_t, const int); +int16x4_t __builtin_mpl_vector_shl_n_v4i16(int16x4_t, const int); +int16x8_t __builtin_mpl_vector_shlq_n_v8i16(int16x8_t, const int); +int32x2_t __builtin_mpl_vector_shl_n_v2i32(int32x2_t, const int); +int32x4_t __builtin_mpl_vector_shlq_n_v4i32(int32x4_t, const int); +int64x1_t __builtin_mpl_vector_shl_n_v1i64(int64x1_t, const int); +int64x2_t __builtin_mpl_vector_shlq_n_v2i64(int64x2_t, const int); +uint8x8_t __builtin_mpl_vector_shl_n_v8u8(uint8x8_t, const int); +uint8x16_t __builtin_mpl_vector_shlq_n_v16u8(uint8x16_t, const int); +uint16x4_t __builtin_mpl_vector_shl_n_v4u16(uint16x4_t, const int); +uint16x8_t __builtin_mpl_vector_shlq_n_v8u16(uint16x8_t, const int); +uint32x2_t __builtin_mpl_vector_shl_n_v2u32(uint32x2_t, const int); +uint32x4_t__builtin_mpl_vector_shlq_n_v4u32(uint32x4_t, const int); +uint64x1_t __builtin_mpl_vector_shl_n_v1u64(uint64x1_t, const int); +uint64x2_t __builtin_mpl_vector_shlq_n_v2u64(uint64x2_t, const int); + // vecTy vector_shri(vecTy src, const int n) -// Shift each element in the vector right by n. +// Shift each element in the vector right by n. + int64x2_t __builtin_mpl_vector_shri_v2i64(int64x2_t, const int); int32x4_t __builtin_mpl_vector_shri_v4i32(int32x4_t, const int); int16x8_t __builtin_mpl_vector_shri_v8i16(int16x8_t, const int); @@ -591,10 +1091,205 @@ uint32x2_t __builtin_mpl_vector_shru_v2u32(uint32x2_t, const int); uint16x4_t __builtin_mpl_vector_shru_v4u16(uint16x4_t, const int); uint8x8_t __builtin_mpl_vector_shru_v8u8(uint8x8_t, const int); +// vecTy vector_shrn +int8x8_t __builtin_mpl_vector_shr_n_v8i8(int8x8_t, const int); +int8x16_t __builtin_mpl_vector_shrq_n_v16i8(int8x16_t, const int); +int16x4_t __builtin_mpl_vector_shr_n_v4i16(int16x4_t, const int); +int16x8_t __builtin_mpl_vector_shrq_n_v8i16(int16x8_t, const int); +int32x2_t __builtin_mpl_vector_shr_n_v2i32(int32x2_t, const int); +int32x4_t __builtin_mpl_vector_shrq_n_v4i32(int32x4_t, const int); +int64x1_t __builtin_mpl_vector_shr_n_v1i64(int64x1_t, const int); +int64x2_t __builtin_mpl_vector_shrq_n_v2i64(int64x2_t, const int); +uint8x8_t __builtin_mpl_vector_shr_n_v8u8(uint8x8_t, const int); +uint8x16_t __builtin_mpl_vector_shrq_n_v16u8(uint8x16_t, const int); +uint16x4_t __builtin_mpl_vector_shr_n_v4u16(uint16x4_t, const int); +uint16x8_t __builtin_mpl_vector_shrq_n_v8u16(uint16x8_t, const int); +uint32x2_t __builtin_mpl_vector_shr_n_v2u32(uint32x2_t, const int); +uint32x4_t __builtin_mpl_vector_shrq_n_v4u32(uint32x4_t, const int); +uint64x1_t __builtin_mpl_vector_shr_n_v1u64(uint64x1_t, const int); +uint64x2_t __builtin_mpl_vector_shrq_n_v2u64(uint64x2_t, const int); + +// vecTy2 vector_max +int8x8_t __builtin_mpl_vector_max_v8i8(int8x8_t, int8x8_t); +int8x16_t __builtin_mpl_vector_maxq_v16i8(int8x16_t, int8x16_t); +int16x4_t __builtin_mpl_vector_max_v4i16(int16x4_t, int16x4_t); +int16x8_t __builtin_mpl_vector_maxq_v8i16(int16x8_t, int16x8_t); +int32x2_t __builtin_mpl_vector_max_v2i32(int32x2_t, int32x2_t); +int32x4_t __builtin_mpl_vector_maxq_v4i32(int32x4_t, int32x4_t); +uint8x8_t __builtin_mpl_vector_max_v8u8(uint8x8_t, uint8x8_t); +uint8x16_t __builtin_mpl_vector_maxq_v16u8(uint8x16_t, uint8x16_t); +uint16x4_t __builtin_mpl_vector_max_v4u16(uint16x4_t, uint16x4_t); +uint16x8_t __builtin_mpl_vector_maxq_v8u16(uint16x8_t, uint16x8_t); +uint32x2_t __builtin_mpl_vector_max_v2u32(uint32x2_t, uint32x2_t); +uint32x4_t __builtin_mpl_vector_maxq_v4u32(uint32x4_t, uint32x4_t); + +// vecTy2 vector_min +int8x8_t __builtin_mpl_vector_min_v8i8(int8x8_t, int8x8_t); +int8x16_t __builtin_mpl_vector_minq_v16i8(int8x16_t, int8x16_t); +int16x4_t __builtin_mpl_vector_min_v4i16(int16x4_t, int16x4_t); +int16x8_t __builtin_mpl_vector_minq_v8i16(int16x8_t, int16x8_t); +int32x2_t __builtin_mpl_vector_min_v2i32(int32x2_t, int32x2_t); +int32x4_t __builtin_mpl_vector_minq_v4i32(int32x4_t, int32x4_t); +uint8x8_t __builtin_mpl_vector_min_v8u8(uint8x8_t, uint8x8_t); +uint8x16_t __builtin_mpl_vector_minq_v16u8(uint8x16_t, uint8x16_t); +uint16x4_t __builtin_mpl_vector_min_v4u16(uint16x4_t, uint16x4_t); +uint16x8_t __builtin_mpl_vector_minq_v8u16(uint16x8_t, uint16x8_t); +uint32x2_t __builtin_mpl_vector_min_v2u32(uint32x2_t, uint32x2_t); +uint32x4_t __builtin_mpl_vector_minq_v4u32(uint32x4_t, uint32x4_t); + +// vecTy2 vector_pmax +int8x8_t __builtin_mpl_vector_pmax_v8i8(int8x8_t, int8x8_t); +int16x4_t __builtin_mpl_vector_pmax_v4i16(int16x4_t, int16x4_t); +int32x2_t __builtin_mpl_vector_pmax_v2i32(int32x2_t, int32x2_t); +uint8x8_t __builtin_mpl_vector_pmax_v8u8(uint8x8_t, uint8x8_t); +uint16x4_t __builtin_mpl_vector_pmax_v4u16(uint16x4_t, uint16x4_t); +uint32x2_t __builtin_mpl_vector_pmax_v2u32(uint32x2_t, uint32x2_t); +int8x16_t __builtin_mpl_vector_pmaxq_v16i8(int8x16_t, int8x16_t); +int16x8_t __builtin_mpl_vector_pmaxq_v8i16(int16x8_t, int16x8_t); +int32x4_t __builtin_mpl_vector_pmaxq_v4i32(int32x4_t, int32x4_t); +uint8x16_t __builtin_mpl_vector_pmaxq_v16u8(uint8x16_t, uint8x16_t); +uint16x8_t __builtin_mpl_vector_pmaxq_v8u16(uint16x8_t, uint16x8_t); +uint32x4_t __builtin_mpl_vector_pmaxq_v4u32(uint32x4_t, uint32x4_t); + +// vecTy2 vector_pmin +int8x8_t __builtin_mpl_vector_pmin_v8i8(int8x8_t, int8x8_t); +int16x4_t __builtin_mpl_vector_pmin_v4i16(int16x4_t, int16x4_t); +uint8x8_t __builtin_mpl_vector_pmin_v8u8(uint8x8_t, uint8x8_t); +uint32x2_t __builtin_mpl_vector_pmin_v2u32(uint32x2_t, uint32x2_t); +int8x16_t __builtin_mpl_vector_pminq_v16i8(int8x16_t, int8x16_t); +int16x8_t __builtin_mpl_vector_pminq_v8i16(int16x8_t, int16x8_t); +int32x4_t __builtin_mpl_vector_pminq_v4i32(int32x4_t, int32x4_t); +uint8x16_t __builtin_mpl_vector_pminq_v16u8(uint8x16_t, uint8x16_t); +uint16x8_t __builtin_mpl_vector_pminq_v8u16(uint16x8_t, uint16x8_t); +uint32x4_t __builtin_mpl_vector_pminq_v4u32(uint32x4_t, uint32x4_t); + +// vecTy2 vector_maxv +int8x8_t __builtin_mpl_vector_maxv_v8i8(int8x8_t); +int8x16_t __builtin_mpl_vector_maxvq_v16i8(int8x16_t); +int16x4_t __builtin_mpl_vector_maxv_v4i16(int16x4_t); +int16x8_t __builtin_mpl_vector_maxvq_v8i16(int16x8_t); +int32x2_t __builtin_mpl_vector_maxv_v2i32(int32x2_t); +int32x4_t __builtin_mpl_vector_maxvq_v4i32(int32x4_t); +uint8x8_t __builtin_mpl_vector_maxv_v8u8(uint8x8_t); +uint8x16_t __builtin_mpl_vector_maxvq_v16u8(uint8x16_t); +uint16x4_t __builtin_mpl_vector_maxv_v4u16(uint16x4_t); +uint16x8_t __builtin_mpl_vector_maxvq_v8u16(uint16x8_t); +uint32x2_t __builtin_mpl_vector_maxv_v2u32(uint32x2_t); +uint32x4_t __builtin_mpl_vector_maxvq_v4u32(uint32x4_t); + +// vecTy2 vector_minv +int8x8_t __builtin_mpl_vector_minv_v8i8(int8x8_t); +int8x16_t __builtin_mpl_vector_minvq_v16i8(int8x16_t); +int16x4_t __builtin_mpl_vector_minv_v4i16(int16x4_t); +int16x8_t __builtin_mpl_vector_minvq_v8i16(int16x8_t); +int32x2_t __builtin_mpl_vector_minv_v2i32(int32x2_t); +int32x4_t __builtin_mpl_vector_minvq_v4i32(int32x4_t); +uint8x8_t __builtin_mpl_vector_minv_v8u8(uint8x8_t); +uint8x16_t __builtin_mpl_vector_minvq_v16u8(uint8x16_t); +uint16x4_t __builtin_mpl_vector_minv_v4u16(uint16x4_t); +uint16x8_t __builtin_mpl_vector_minvq_v8u16(uint16x8_t); +uint32x2_t __builtin_mpl_vector_minv_v2u32(uint32x2_t); +uint32x4_t __builtin_mpl_vector_minvq_v4u32(uint32x4_t); + +// vecTy2 vector_tst +uint8x8_t __builtin_mpl_vector_tst_v8i8(int8x8_t, int8x8_t); +uint8x16_t __builtin_mpl_vector_tstq_v16i8(int8x16_t, int8x16_t); +uint16x4_t __builtin_mpl_vector_tst_v4i16(int16x4_t, int16x4_t); +uint16x8_t __builtin_mpl_vector_tstq_v8i16(int16x8_t, int16x8_t); +uint32x2_t __builtin_mpl_vector_tst_v2i32(int32x2_t, int32x2_t); +uint32x4_t __builtin_mpl_vector_tstq_v4i32(int32x4_t, int32x4_t); +uint8x8_t __builtin_mpl_vector_tst_v8u8(uint8x8_t, uint8x8_t); +uint8x16_t __builtin_mpl_vector_tstq_v16u8(uint8x16_t, uint8x16_t); +uint16x4_t __builtin_mpl_vector_tst_v4u16(uint16x4_t, uint16x4_t); +uint16x8_t __builtin_mpl_vector_tstq_v8u16(uint16x8_t, uint16x8_t); +uint32x2_t __builtin_mpl_vector_tst_v2u32(uint32x2_t, uint32x2_t); +uint32x4_t __builtin_mpl_vector_tstq_v4u32(uint32x4_t, uint32x4_t); +uint64x1_t __builtin_mpl_vector_tst_v1i64(int64x1_t, int64x1_t); +uint64x2_t __builtin_mpl_vector_tstq_v2i64(int64x2_t, int64x2_t); +uint64x1_t __builtin_mpl_vector_tst_v1u64(uint64x1_t, uint64x1_t); +uint64x2_t __builtin_mpl_vector_tstq_v2u64(uint64x2_t, uint64x2_t); + +// vecTy2 vector_qmovn +int8x8_t __builtin_mpl_vector_qmovnh_i16(int16x4_t); +int16x4_t __builtin_mpl_vector_qmovns_i32(int32x2_t); +int32x2_t __builtin_mpl_vector_qmovnd_i64(int64x1_t); +uint8x8_t __builtin_mpl_vector_qmovnh_u16(uint16x4_t); +uint16x4_t __builtin_mpl_vector_qmovns_u32(uint32x2_t); +uint32x2_t __builtin_mpl_vector_qmovnd_u64(uint64x1_t); + +// vecTy2 vector_qmovun +uint8x8_t __builtin_mpl_vector_qmovun_v8u8(int16x8_t); +uint16x4_t __builtin_mpl_vector_qmovun_v4u16(int32x4_t); +uint32x2_t __builtin_mpl_vector_qmovun_v2u32(int64x2_t); +uint8x8_t __builtin_mpl_vector_qmovunh_i16(int16x4_t); +uint16x4_t __builtin_mpl_vector_qmovuns_i32(int32x2_t); +uint32x2_t __builtin_mpl_vector_qmovund_i64(int64x1_t); + +// vecTy2 vector_qmovn_high +int8x16_t __builtin_mpl_vector_qmovn_high_v16i8(int8x8_t, int16x8_t); +int16x8_t __builtin_mpl_vector_qmovn_high_v8i16(int16x4_t, int32x4_t); +int32x4_t __builtin_mpl_vector_qmovn_high_v4i32(int32x2_t, int64x2_t); +uint8x16_t __builtin_mpl_vector_qmovn_high_v16u8(uint8x8_t, uint16x8_t); +uint16x8_t __builtin_mpl_vector_qmovn_high_v8u16(uint16x4_t, uint32x4_t); +uint32x4_t __builtin_mpl_vector_qmovn_high_v4u32(uint32x2_t, uint64x2_t); + +// vecTy2 vector_qmovun_high +uint8x16_t __builtin_mpl_vector_qmovun_high_v16u8(uint8x8_t, int16x8_t); +uint16x8_t __builtin_mpl_vector_qmovun_high_v8u16(uint16x4_t, int32x4_t); +uint32x4_t __builtin_mpl_vector_qmovun_high_v4u32(uint32x2_t, int64x2_t); + +// vecTy2 vector_mul_lane +int16x4_t __builtin_mpl_vector_mul_lane_v4i16(int16x4_t, int16x4_t, const int); +int16x8_t __builtin_mpl_vector_mulq_lane_v8i16(int16x8_t, int16x4_t, const int); +int32x2_t __builtin_mpl_vector_mul_lane_v2i32(int32x2_t, int32x2_t, const int); +int32x4_t __builtin_mpl_vector_mulq_lane_v4i32(int32x4_t, int32x2_t, const int); +uint16x4_t __builtin_mpl_vector_mul_lane_v4u16(uint16x4_t, uint16x4_t, const int); +uint16x8_t __builtin_mpl_vector_mulq_lane_v8u16(uint16x8_t, uint16x4_t, const int); +uint32x2_t __builtin_mpl_vector_mul_lane_v2u32(uint32x2_t, uint32x2_t, const int); +uint32x4_t __builtin_mpl_vector_mulq_lane_v4u32(uint32x4_t, uint32x2_t, const int); +int16x4_t __builtin_mpl_vector_mul_laneq_v4i16(int16x4_t, int16x8_t, const int); +int16x8_t __builtin_mpl_vector_mulq_laneq_v8i16(int16x8_t, int16x8_t, const int); +int32x2_t __builtin_mpl_vector_mul_laneq_v2i32(int32x2_t, int32x4_t, const int); +int32x4_t __builtin_mpl_vector_mulq_laneq_v4i32(int32x4_t, int32x4_t, const int); +uint16x4_t __builtin_mpl_vector_mul_laneq_v4u16(uint16x4_t, uint16x8_t, const int); +uint16x8_t __builtin_mpl_vector_mulq_laneq_v8u16(uint16x8_t, uint16x8_t, const int); +uint32x2_t __builtin_mpl_vector_mul_laneq_v2u32(uint32x2_t, uint32x4_t, const int); +uint32x4_t __builtin_mpl_vector_mulq_laneq_v4u32(uint32x4_t, uint32x4_t, const int); + +// vecTy2 vector_mull_lane +int32x4_t __builtin_mpl_vector_mull_lane_v4i32(int16x4_t, int16x4_t, const int); +int64x2_t __builtin_mpl_vector_mull_lane_v2i64(int32x2_t, int32x2_t, const int); +uint32x4_t __builtin_mpl_vector_mull_lane_v4u32(uint16x4_t, uint16x4_t, const int); +uint64x2_t __builtin_mpl_vector_mull_lane_v2u64(uint32x2_t, uint32x2_t, const int); +int32x4_t __builtin_mpl_vector_mull_laneq_v4i32(int16x4_t, int16x8_t, const int); +int64x2_t __builtin_mpl_vector_mull_laneq_v2i64(int32x2_t, int32x4_t, const int); +uint32x4_t __builtin_mpl_vector_mull_laneq_v4u32(uint16x4_t, uint16x8_t, const int); +uint64x2_t __builtin_mpl_vector_mull_laneq_v2u64(uint32x2_t, uint32x4_t, const int); + +// vecTy2 vector_mull_high_lane +int32x4_t __builtin_mpl_vector_mull_high_lane_v4i32(int16x8_t, int16x4_t, const int); +int64x2_t __builtin_mpl_vector_mull_high_lane_v2i64(int32x4_t, int32x2_t, const int); +uint32x4_t __builtin_mpl_vector_mull_high_lane_v4u32(uint16x8_t, uint16x4_t, const int); +uint64x2_t __builtin_mpl_vector_mull_high_lane_v2u64(uint32x4_t, uint32x2_t, const int); +int32x4_t __builtin_mpl_vector_mull_high_laneq_v4i32(int16x8_t, int16x8_t, const int); +int64x2_t __builtin_mpl_vector_mull_high_laneq_v2i64(int32x4_t, int32x4_t, const int); +uint32x4_t __builtin_mpl_vector_mull_high_laneq_v4u32(uint16x8_t, uint16x8_t, const int); +uint64x2_t __builtin_mpl_vector_mull_high_laneq_v2u64(uint32x4_t, uint32x4_t, const int); + +// vecTy2 vector_neg +int8x8_t __builtin_mpl_vector_neg_v8i8(int8x8_t); +int8x16_t __builtin_mpl_vector_negq_v16i8(int8x16_t); +int16x4_t __builtin_mpl_vector_neg_v4i16(int16x4_t); +int16x8_t __builtin_mpl_vector_negq_v8i16(int16x8_t); +int32x2_t __builtin_mpl_vector_neg_v2i32(int32x2_t); +int32x4_t __builtin_mpl_vector_negq_v4i32(int32x4_t); +int64x1_t __builtin_mpl_vector_neg_v1i64(int64x1_t); +int64x2_t __builtin_mpl_vector_negq_v2i64(int64x2_t); + // vecTy2 vector_shift_narrow_low(vecTy1 src, const int n) -// Shift each element in the vector right by n, narrow each element to half -// of the original width (truncating), then write the result to the lower -// half of the destination vector. +// Shift each element in the vector right by n, narrow each element to half of the original width (truncating), then +// write the result to the lower half of the destination vector. + int32x2_t __builtin_mpl_vector_shr_narrow_low_v2i64(int64x2_t, const int); int16x4_t __builtin_mpl_vector_shr_narrow_low_v4i32(int32x4_t, const int); int8x8_t __builtin_mpl_vector_shr_narrow_low_v8i16(int16x8_t, const int); @@ -603,7 +1298,8 @@ uint16x4_t __builtin_mpl_vector_shr_narrow_low_v4u32(uint32x4_t, const int); uint8x8_t __builtin_mpl_vector_shr_narrow_low_v8u16(uint16x8_t, const int); // scalarTy vector_sum(vecTy src) -// Sum all of the elements in the vector into a scalar. +// Sum all of the elements in the vector into a scalar. + int64_t __builtin_mpl_vector_sum_v2i64(int64x2_t); int32_t __builtin_mpl_vector_sum_v4i32(int32x4_t); int16_t __builtin_mpl_vector_sum_v8i16(int16x8_t); @@ -623,15 +1319,17 @@ uint8_t __builtin_mpl_vector_sum_v8u8(uint8x8_t); float32_t __builtin_mpl_vector_sum_v2f32(float32x2_t); // vecTy table_lookup(vecTy tbl, vecTy idx) -// Performs a table vector lookup. +// Performs a table vector lookup. + float64x2_t __builtin_mpl_vector_table_lookup_v2f64(float64x2_t, float64x2_t); float32x4_t __builtin_mpl_vector_table_lookup_v4f32(float32x4_t, float32x4_t); float64x1_t __builtin_mpl_vector_table_lookup_v1f64(float64x1_t, float64x1_t); float32x2_t __builtin_mpl_vector_table_lookup_v2f32(float32x2_t, float32x2_t); // vecTy2 vector_widen_low(vecTy1 src) -// Widen each element of the source vector to half of the original width, -// writing the lower half into the destination vector. +// Widen each element of the source vector to half of the original width, writing the lower half into the destination +// vector. + int64x2_t __builtin_mpl_vector_widen_low_v2i32(int32x2_t); int32x4_t __builtin_mpl_vector_widen_low_v4i16(int16x4_t); int16x8_t __builtin_mpl_vector_widen_low_v8i8(int8x8_t); @@ -640,8 +1338,9 @@ uint32x4_t __builtin_mpl_vector_widen_low_v4u16(uint16x4_t); uint16x8_t __builtin_mpl_vector_widen_low_v8u8(uint8x8_t); // vecTy2 vector_widen_high(vecTy1 src) -// Widen each element of the source vector to half of the original width, -// writing the higher half into the destination vector. +// Widen each element of the source vector to half of the original width, writing the higher half into the destination +// vector. + int64x2_t __builtin_mpl_vector_widen_high_v2i32(int32x4_t); int32x4_t __builtin_mpl_vector_widen_high_v4i16(int16x8_t); int16x8_t __builtin_mpl_vector_widen_high_v8i8(int8x16_t); @@ -650,14 +1349,16 @@ uint32x4_t __builtin_mpl_vector_widen_high_v4u16(uint16x8_t); uint16x8_t __builtin_mpl_vector_widen_high_v8u8(uint8x16_t); // vecTy vector_load(scalarTy *ptr) -// Load the elements pointed to by ptr into a vector. -float64x2_t __builtin_mpl_vector_load_v2f64(float64_t *); -float32x4_t __builtin_mpl_vector_load_v4f32(float32_t *); -float64x1_t __builtin_mpl_vector_load_v1f64(float64_t *); -float32x2_t __builtin_mpl_vector_load_v2f32(float32_t *); +// Load the elements pointed to by ptr into a vector. + +float64x2_t __builtin_mpl_vector_load_v2f64(float64_t const *); +float32x4_t __builtin_mpl_vector_load_v4f32(float32_t const *); +float64x1_t __builtin_mpl_vector_load_v1f64(float64_t const *); +float32x2_t __builtin_mpl_vector_load_v2f32(float32_t const *); // void vector_store(scalarTy *ptr, vecTy src) -// Store the elements from src into the memory pointed to by ptr. +// Store the elements from src into the memory pointed to by ptr. + void __builtin_mpl_vector_store_v2i64(int64_t *, int64x2_t); void __builtin_mpl_vector_store_v4i32(int32_t *, int32x4_t); void __builtin_mpl_vector_store_v8i16(int16_t *, int16x8_t); @@ -680,8 +1381,8 @@ void __builtin_mpl_vector_store_v1f64(float64_t *, float64x1_t); void __builtin_mpl_vector_store_v2f32(float32_t *, float32x2_t); // vecTy vector_subl_low(vecTy src1, vecTy src2) -// Subtract each element of the source vector to second source -// widen the result into the destination vector. +// Subtract each element of the source vector to second source widen the result into the destination vector. + int16x8_t __builtin_mpl_vector_subl_low_v8i8(int8x8_t, int8x8_t); int32x4_t __builtin_mpl_vector_subl_low_v4i16(int16x4_t, int16x4_t); int64x2_t __builtin_mpl_vector_subl_low_v2i32(int32x2_t, int32x2_t); @@ -690,8 +1391,9 @@ uint32x4_t __builtin_mpl_vector_subl_low_v4u16(uint16x4_t, uint16x4_t); uint64x2_t __builtin_mpl_vector_subl_low_v2u32(uint32x2_t, uint32x2_t); // vecTy vector_subl_high(vecTy src1, vecTy src2) -// Subtract each element of the source vector to upper half of second source -// widen the result into the destination vector. +// Subtract each element of the source vector to upper half of second source widen the result into the destination +// vector. + int16x8_t __builtin_mpl_vector_subl_high_v8i8(int8x16_t, int8x16_t); int32x4_t __builtin_mpl_vector_subl_high_v4i16(int16x8_t, int16x8_t); int64x2_t __builtin_mpl_vector_subl_high_v2i32(int32x4_t, int32x4_t); @@ -700,8 +1402,8 @@ uint32x4_t __builtin_mpl_vector_subl_high_v4u16(uint16x8_t, uint16x8_t); uint64x2_t __builtin_mpl_vector_subl_high_v2u32(uint32x4_t, uint32x4_t); // vecTy vector_subw_low(vecTy src1, vecTy src2) -// Subtract each element of the source vector to second source -// widen the result into the destination vector. +// Subtract each element of the source vector to second source widen the result into the destination vector. + int16x8_t __builtin_mpl_vector_subw_low_v8i8(int16x8_t, int8x8_t); int32x4_t __builtin_mpl_vector_subw_low_v4i16(int32x4_t, int16x4_t); int64x2_t __builtin_mpl_vector_subw_low_v2i32(int64x2_t, int32x2_t); @@ -710,8 +1412,9 @@ uint32x4_t __builtin_mpl_vector_subw_low_v4u16(uint32x4_t, uint16x4_t); uint64x2_t __builtin_mpl_vector_subw_low_v2u32(uint64x2_t, uint32x2_t); // vecTy vector_subw_high(vecTy src1, vecTy src2) -// Subtract each element of the source vector to upper half of second source -// widen the result into the destination vector. +// Subtract each element of the source vector to upper half of second source widen the result into the destination +// vector. + int16x8_t __builtin_mpl_vector_subw_high_v8i8(int16x8_t, int8x16_t); int32x4_t __builtin_mpl_vector_subw_high_v4i16(int32x4_t, int16x8_t); int64x2_t __builtin_mpl_vector_subw_high_v2i32(int64x2_t, int32x4_t); @@ -719,6315 +1422,12675 @@ uint16x8_t __builtin_mpl_vector_subw_high_v8u8(uint16x8_t, uint8x16_t); uint32x4_t __builtin_mpl_vector_subw_high_v4u16(uint32x4_t, uint16x8_t); uint64x2_t __builtin_mpl_vector_subw_high_v2u32(uint64x2_t, uint32x4_t); -// ************************* // Supported Neon Intrinsics -// ************************* +extern inline uint8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vget_lane_u8( + uint8x8_t v, const int lane) { + return __builtin_mpl_vector_get_lane_v8u8(v, lane); +} -// vabdl -#define vabdl_s8(a, b) __builtin_mpl_vector_labssub_low_v8i8(a, b) -#define vabdl_s16(a, b) __builtin_mpl_vector_labssub_low_v4i16(a, b) -#define vabdl_s32(a, b) __builtin_mpl_vector_labssub_low_v2i32(a, b) -#define vabdl_u8(a, b) __builtin_mpl_vector_labssub_low_v8u8(a, b) -#define vabdl_u16(a, b) __builtin_mpl_vector_labssub_low_v4u16(a, b) -#define vabdl_u32(a, b) __builtin_mpl_vector_labssub_low_v2u32(a, b) +extern inline uint16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vget_lane_u16( + uint16x4_t v, const int lane) { + return __builtin_mpl_vector_get_lane_v4u16(v, lane); +} -// vabdl_high -#define vabdl_high_s8(a, b) __builtin_mpl_vector_labssub_high_v8i8(a, b) -#define vabdl_high_s16(a, b) __builtin_mpl_vector_labssub_high_v4i16(a, b) -#define vabdl_high_s32(a, b) __builtin_mpl_vector_labssub_high_v2i32(a, b) -#define vabdl_high_u8(a, b) __builtin_mpl_vector_labssub_high_v8u8(a, b) -#define vabdl_high_u16(a, b) __builtin_mpl_vector_labssub_high_v4u16(a, b) -#define vabdl_high_u32(a, b) __builtin_mpl_vector_labssub_high_v2u32(a, b) +extern inline uint32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vget_lane_u32( + uint32x2_t v, const int lane) { + return __builtin_mpl_vector_get_lane_v2u32(v, lane); +} -// vabs -#define vabs_s8(a) __builtin_mpl_vector_abs_v8i8(a) -#define vabs_s16(a) __builtin_mpl_vector_abs_v4i16(a) -#define vabs_s32(a) __builtin_mpl_vector_abs_v2i32(a) -#define vabs_s64(a) __builtin_mpl_vector_abs_v1i64(a) -#define vabs_f32(a) __builtin_mpl_vector_abs_v2f32(a) -#define vabs_f64(a) __builtin_mpl_vector_abs_v1f64(a) -#define vabsq_s8(a) __builtin_mpl_vector_abs_v16i8(a) -#define vabsq_s16(a) __builtin_mpl_vector_abs_v8i16(a) -#define vabsq_s32(a) __builtin_mpl_vector_abs_v4i32(a) -#define vabsq_s64(a) __builtin_mpl_vector_abs_v2i64(a) -#define vabsq_f32(a) __builtin_mpl_vector_abs_v4f32(a) -#define vabsq_f64(a) __builtin_mpl_vector_abs_v2f64(a) +extern inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vget_lane_u64( + uint64x1_t v, const int lane) { + return __builtin_mpl_vector_get_lane_v1u64(v, lane); +} -// vaddv -#define vaddv_s8(a) __builtin_mpl_vector_sum_v8i8(a) -#define vaddv_s16(a) __builtin_mpl_vector_sum_v4i16(a) -#define vaddv_s32(a) (vget_lane_s32(__builtin_mpl_vector_padd_v2i32(a, a), 0)) -#define vaddv_u8(a) __builtin_mpl_vector_sum_v8u8(a) -#define vaddv_u16(a) __builtin_mpl_vector_sum_v4u16(a) -#define vaddv_u32(a) (vget_lane_u32(__builtin_mpl_vector_padd_v2u32(a, a), 0)) -#define vaddv_f32(a) __builtin_mpl_vector_sum_v2f32(a) -#define vaddvq_s8(a) __builtin_mpl_vector_sum_v16i8(a) -#define vaddvq_s16(a) __builtin_mpl_vector_sum_v8i16(a) -#define vaddvq_s32(a) __builtin_mpl_vector_sum_v4i32(a) -#define vaddvq_s64(a) __builtin_mpl_vector_sum_v2i64(a) -#define vaddvq_u8(a) __builtin_mpl_vector_sum_v16u8(a) -#define vaddvq_u16(a) __builtin_mpl_vector_sum_v8u16(a) -#define vaddvq_u32(a) __builtin_mpl_vector_sum_v4u32(a) -#define vaddvq_u64(a) __builtin_mpl_vector_sum_v2u64(a) -#define vaddvq_f32(a) __builtin_mpl_vector_sum_v4f32(a) -#define vaddvq_f64(a) __builtin_mpl_vector_sum_v2f64(a) +extern inline int8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vget_lane_s8( + int8x8_t v, const int lane) { + return __builtin_mpl_vector_get_lane_v8i8(v, lane); +} -// vqmovn -#define vqmovn_u16(a) __builtin_mpl_vector_mov_narrow_v8u16(a) -#define vqmovn_u32(a) __builtin_mpl_vector_mov_narrow_v4u32(a) -#define vqmovn_u64(a) __builtin_mpl_vector_mov_narrow_v2u64(a) -#define vqmovn_s16(a) __builtin_mpl_vector_mov_narrow_v8i16(a) -#define vqmovn_s32(a) __builtin_mpl_vector_mov_narrow_v4i32(a) -#define vqmovn_s64(a) __builtin_mpl_vector_mov_narrow_v2i64(a) +extern inline int16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vget_lane_s16( + int16x4_t v, const int lane) { + return __builtin_mpl_vector_get_lane_v4i16(v, lane); +} -// vaddl -#define vaddl_s8(a, b) __builtin_mpl_vector_addl_low_v8i8(a, b) -#define vaddl_s16(a, b) __builtin_mpl_vector_addl_low_v4i16(a, b) -#define vaddl_s32(a, b) __builtin_mpl_vector_addl_low_v2i32(a, b) -#define vaddl_u8(a, b) __builtin_mpl_vector_addl_low_v8u8(a, b) -#define vaddl_u16(a, b) __builtin_mpl_vector_addl_low_v4u16(a, b) -#define vaddl_u32(a, b) __builtin_mpl_vector_addl_low_v2u32(a, b) +extern inline int32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vget_lane_s32( + int32x2_t v, const int lane) { + return __builtin_mpl_vector_get_lane_v2i32(v, lane); +} -// vaddl_high -#define vaddl_high_s8(a, b) __builtin_mpl_vector_addl_high_v8i8(a, b) -#define vaddl_high_s16(a, b) __builtin_mpl_vector_addl_high_v4i16(a, b) -#define vaddl_high_s32(a, b) __builtin_mpl_vector_addl_high_v2i32(a, b) -#define vaddl_high_u8(a, b) __builtin_mpl_vector_addl_high_v8u8(a, b) -#define vaddl_high_u16(a, b) __builtin_mpl_vector_addl_high_v4u16(a, b) -#define vaddl_high_u32(a, b) __builtin_mpl_vector_addl_high_v2u32(a, b) +extern inline int64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vget_lane_s64( + int64x1_t v, const int lane) { + return __builtin_mpl_vector_get_lane_v1i64(v, lane); +} -// vaddw -#define vaddw_s8(a, b) __builtin_mpl_vector_addw_low_v8i8(a, b) -#define vaddw_s16(a, b) __builtin_mpl_vector_addw_low_v4i16(a, b) -#define vaddw_s32(a, b) __builtin_mpl_vector_addw_low_v2i32(a, b) -#define vaddw_u8(a, b) __builtin_mpl_vector_addw_low_v8u8(a, b) -#define vaddw_u16(a, b) __builtin_mpl_vector_addw_low_v4u16(a, b) -#define vaddw_u32(a, b) __builtin_mpl_vector_addw_low_v2u32(a, b) +extern inline uint8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vgetq_lane_u8( + uint8x16_t v, const int lane) { + return __builtin_mpl_vector_getq_lane_v16u8(v, lane); +} -// vaddw_high -#define vaddw_high_s8(a, b) __builtin_mpl_vector_addw_high_v8i8(a, b) -#define vaddw_high_s16(a, b) __builtin_mpl_vector_addw_high_v4i16(a, b) -#define vaddw_high_s32(a, b) __builtin_mpl_vector_addw_high_v2i32(a, b) -#define vaddw_high_u8(a, b) __builtin_mpl_vector_addw_high_v8u8(a, b) -#define vaddw_high_u16(a, b) __builtin_mpl_vector_addw_high_v4u16(a, b) -#define vaddw_high_u32(a, b) __builtin_mpl_vector_addw_high_v2u32(a, b) +extern inline uint16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vgetq_lane_u16( + uint16x8_t v, const int lane) { + return __builtin_mpl_vector_getq_lane_v8u16(v, lane); +} -// vadd -#define vadd_s8(a, b) (a + b) -#define vadd_s16(a, b) (a + b) -#define vadd_s32(a, b) (a + b) -#define vadd_s64(a, b) (a + b) -#define vadd_u8(a, b) (a + b) -#define vadd_u16(a, b) (a + b) -#define vadd_u32(a, b) (a + b) -#define vadd_u64(a, b) (a + b) -#define vadd_f16(a, b) (a + b) -#define vadd_f32(a, b) (a + b) -#define vadd_f64(a, b) (a + b) -#define vaddq_s8(a, b) (a + b) -#define vaddq_s16(a, b) (a + b) -#define vaddq_s32(a, b) (a + b) -#define vaddq_s64(a, b) (a + b) -#define vaddq_u8(a, b) (a + b) -#define vaddq_u16(a, b) (a + b) -#define vaddq_u32(a, b) (a + b) -#define vaddq_u64(a, b) (a + b) -#define vaddq_f16(a, b) (a + b) -#define vaddq_f32(a, b) (a + b) -#define vaddq_f64(a, b) (a + b) -#define vaddd_s64(a, b) (a + b) -#define vaddd_u64(a, b) (a + b) +extern inline uint32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vgetq_lane_u32( + uint32x4_t v, const int lane) { + return __builtin_mpl_vector_getq_lane_v4u32(v, lane); +} -// vand -#define vand_s8(a, b) (a & b) -#define vand_s16(a, b) (a & b) -#define vand_s32(a, b) (a & b) -#define vand_s64(a, b) (a & b) -#define vand_u8(a, b) (a & b) -#define vand_u16(a, b) (a & b) -#define vand_u32(a, b) (a & b) -#define vand_u64(a, b) (a & b) -#define vandq_s8(a, b) (a & b) -#define vandq_s16(a, b) (a & b) -#define vandq_s32(a, b) (a & b) -#define vandq_s64(a, b) (a & b) -#define vandq_u8(a, b) (a & b) -#define vandq_u16(a, b) (a & b) -#define vandq_u32(a, b) (a & b) -#define vandq_u64(a, b) (a & b) +extern inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vgetq_lane_u64( + uint64x2_t v, const int lane) { + return __builtin_mpl_vector_getq_lane_v2u64(v, lane); +} -// vand -#define vorr_s8(a, b) (a | b) -#define vorr_s16(a, b) (a | b) -#define vorr_s32(a, b) (a | b) -#define vorr_s64(a, b) (a | b) -#define vorr_u8(a, b) (a | b) -#define vorr_u16(a, b) (a | b) -#define vorr_u32(a, b) (a | b) -#define vorr_u64(a, b) (a | b) -#define vorrq_s8(a, b) (a | b) -#define vorrq_s16(a, b) (a | b) -#define vorrq_s32(a, b) (a | b) -#define vorrq_s64(a, b) (a | b) -#define vorrq_u8(a, b) (a | b) -#define vorrq_u16(a, b) (a | b) -#define vorrq_u32(a, b) (a | b) -#define vorrq_u64(a, b) (a | b) +extern inline int8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vgetq_lane_s8( + int8x16_t v, const int lane) { + return __builtin_mpl_vector_getq_lane_v16i8(v, lane); +} -// vdup -#define vdup_n_s8(a) __builtin_mpl_vector_from_scalar_v8i8(a) -#define vdup_n_s16(a) __builtin_mpl_vector_from_scalar_v4i16(a) -#define vdup_n_s32(a) __builtin_mpl_vector_from_scalar_v2i32(a) -#define vdup_n_s64(a) __builtin_mpl_vector_from_scalar_v1i64(a) -#define vdup_n_u8(a) __builtin_mpl_vector_from_scalar_v8u8(a) -#define vdup_n_u16(a) __builtin_mpl_vector_from_scalar_v4u16(a) -#define vdup_n_u32(a) __builtin_mpl_vector_from_scalar_v2u32(a) -#define vdup_n_u64(a) __builtin_mpl_vector_from_scalar_v1u64(a) -#define vdup_n_f16(a) __builtin_mpl_vector_from_scalar_v4f16(a) -#define vdup_n_f32(a) __builtin_mpl_vector_from_scalar_v2f32(a) -#define vdup_n_f64(a) __builtin_mpl_vector_from_scalar_v1f64(a) -#define vdupq_n_s8(a) __builtin_mpl_vector_from_scalar_v16i8(a) -#define vdupq_n_s16(a) __builtin_mpl_vector_from_scalar_v8i16(a) -#define vdupq_n_s32(a) __builtin_mpl_vector_from_scalar_v4i32(a) -#define vdupq_n_s64(a) __builtin_mpl_vector_from_scalar_v2i64(a) -#define vdupq_n_u8(a) __builtin_mpl_vector_from_scalar_v16u8(a) -#define vdupq_n_u16(a) __builtin_mpl_vector_from_scalar_v8u16(a) -#define vdupq_n_u32(a) __builtin_mpl_vector_from_scalar_v4u32(a) -#define vdupq_n_u64(a) __builtin_mpl_vector_from_scalar_v2u64(a) -#define vdupq_n_f16(a) __builtin_mpl_vector_from_scalar_v8f16(a) -#define vdupq_n_f32(a) __builtin_mpl_vector_from_scalar_v4f32(a) -#define vdupq_n_f64(a) __builtin_mpl_vector_from_scalar_v2f64(a) +extern inline int16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vgetq_lane_s16( + int16x8_t v, const int lane) { + return __builtin_mpl_vector_getq_lane_v8i16(v, lane); +} -// vceq -#define vceq_s8(a, b) (a == b) -#define vceq_s16(a, b) (a == b) -#define vceq_s32(a, b) (a == b) -#define vceq_s64(a, b) (a == b) -#define vceq_u8(a, b) (a == b) -#define vceq_u16(a, b) (a == b) -#define vceq_u32(a, b) (a == b) -#define vceq_u64(a, b) (a == b) -#define vceq_f16(a, b) (a == b) -#define vceq_f32(a, b) (a == b) -#define vceq_f64(a, b) (a == b) -#define vceqq_s8(a, b) (a == b) -#define vceqq_s16(a, b) (a == b) -#define vceqq_s32(a, b) (a == b) -#define vceqq_s64(a, b) (a == b) -#define vceqq_u8(a, b) (a == b) -#define vceqq_u16(a, b) (a == b) -#define vceqq_u32(a, b) (a == b) -#define vceqq_u64(a, b) (a == b) -#define vceqq_f16(a, b) (a == b) -#define vceqq_f32(a, b) (a == b) -#define vceqq_f64(a, b) (a == b) -#define vceqd_s64(a, b) ((a == b) ? -1LL : 0LL) -#define vceqd_u64(a, b) ((a == b) ? -1LL : 0LL) +extern inline int32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vgetq_lane_s32( + int32x4_t v, const int lane) { + return __builtin_mpl_vector_getq_lane_v4i32(v, lane); +} -// vceqz -#define vceqz_s8(a) (a == 0) -#define vceqzq_s8(a) (a == 0) -#define vceqz_s16(a) (a == 0) -#define vceqzq_s16(a) (a == 0) -#define vceqz_s32(a) (a == 0) -#define vceqzq_s32(a) (a == 0) -#define vceqz_u8(a) (a == 0) -#define vceqzq_u8(a) (a == 0) -#define vceqz_u16(a) (a == 0) -#define vceqzq_u16(a) (a == 0) -#define vceqz_u32(a) (a == 0) -#define vceqzq_u32(a) (a == 0) -#define vceqz_p8(a) (a == 0) -#define vceqzq_p8(a) (a == 0) -#define vceqz_s64(a) (a == 0) -#define vceqzq_s64(a) (a == 0) -#define vceqz_u64(a) (a == 0) -#define vceqzq_u64(a) (a == 0) -#define vceqz_p64(a) (a == 0) -#define vceqzq_p64(a) (a == 0) -#define vceqzd_s64(a) ((a == 0) ? -1LL : 0LL) -#define vceqzd_u64(a) ((a == 0) ? -1LL : 0LL) +extern inline int64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vgetq_lane_s64( + int64x2_t v, const int lane) { + return __builtin_mpl_vector_getq_lane_v2i64(v, lane); +} -// vcgt -#define vcgt_s8(a, b) (a > b) -#define vcgt_s16(a, b) (a > b) -#define vcgt_s32(a, b) (a > b) -#define vcgt_s64(a, b) (a > b) -#define vcgt_u8(a, b) (a > b) -#define vcgt_u16(a, b) (a > b) -#define vcgt_u32(a, b) (a > b) -#define vcgt_u64(a, b) (a > b) -#define vcgt_f16(a, b) (a > b) -#define vcgt_f32(a, b) (a > b) -#define vcgt_f64(a, b) (a > b) -#define vcgtq_s8(a, b) (a > b) -#define vcgtq_s16(a, b) (a > b) -#define vcgtq_s32(a, b) (a > b) -#define vcgtq_s64(a, b) (a > b) -#define vcgtq_u8(a, b) (a > b) -#define vcgtq_u16(a, b) (a > b) -#define vcgtq_u32(a, b) (a > b) -#define vcgtq_u64(a, b) (a > b) -#define vcgtq_f16(a, b) (a > b) -#define vcgtq_f32(a, b) (a > b) -#define vcgtq_f64(a, b) (a > b) -#define vcgtd_s64(a, b) ((a > b) ? -1LL : 0LL) -#define vcgtd_u64(a, b) ((a > b) ? -1LL : 0LL) +// vabdl +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vabdl_s8( + int8x8_t a, int8x8_t b) { + return __builtin_mpl_vector_labssub_low_v8i8(a, b); +} -// vcgtz -#define vcgtz_s8(a) (a > 0) -#define vcgtzq_s8(a) (a > 0) -#define vcgtz_s16(a) (a > 0) -#define vcgtzq_s16(a) (a > 0) -#define vcgtz_s32(a) (a > 0) -#define vcgtzq_s32(a) (a > 0) -#define vcgtz_s64(a) (a > 0) -#define vcgtzq_s64(a) (a > 0) -#define vcgtzd_s64(a) ((a > 0) ? -1LL : 0LL) +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vabdl_s16( + int16x4_t a, int16x4_t b) { + return __builtin_mpl_vector_labssub_low_v4i16(a, b); +} -// vcge -#define vcge_s8(a, b) (a >= b) -#define vcge_s16(a, b) (a >= b) -#define vcge_s32(a, b) (a >= b) -#define vcge_s64(a, b) (a >= b) -#define vcge_u8(a, b) (a >= b) -#define vcge_u16(a, b) (a >= b) -#define vcge_u32(a, b) (a >= b) -#define vcge_u64(a, b) (a >= b) -#define vcge_f16(a, b) (a >= b) -#define vcge_f32(a, b) (a >= b) -#define vcge_f64(a, b) (a >= b) -#define vcgeq_s8(a, b) (a >= b) -#define vcgeq_s16(a, b) (a >= b) -#define vcgeq_s32(a, b) (a >= b) -#define vcgeq_s64(a, b) (a >= b) -#define vcgeq_u8(a, b) (a >= b) -#define vcgeq_u16(a, b) (a >= b) -#define vcgeq_u32(a, b) (a >= b) -#define vcgeq_u64(a, b) (a >= b) -#define vcgeq_f16(a, b) (a >= b) -#define vcgeq_f32(a, b) (a >= b) -#define vcgeq_f64(a, b) (a >= b) -#define vcged_s64(a, b) ((a >= b) ? -1LL : 0LL) -#define vcged_u64(a, b) ((a >= b) ? -1LL : 0LL) +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vabdl_s32( + int32x2_t a, int32x2_t b) { + return __builtin_mpl_vector_labssub_low_v2i32(a, b); +} -// vcgez -#define vcgez_s8(a) (a >= 0) -#define vcgezq_s8(a) (a >= 0) -#define vcgez_s16(a) (a >= 0) -#define vcgezq_s16(a) (a >= 0) -#define vcgez_s32(a) (a >= 0) -#define vcgezq_s32(a) (a >= 0) -#define vcgez_s64(a) (a >= 0) -#define vcgezq_s64(a) (a >= 0) -#define vcgezd_s64(a) ((a >= 0) ? -1LL : 0LL) +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vabdl_u8( + uint8x8_t a, uint8x8_t b) { + return __builtin_mpl_vector_labssub_low_v8u8(a, b); +} -// vclt -#define vclt_s8(a, b) (a < b) -#define vclt_s16(a, b) (a < b) -#define vclt_s32(a, b) (a < b) -#define vclt_s64(a, b) (a < b) -#define vclt_u8(a, b) (a < b) -#define vclt_u16(a, b) (a < b) -#define vclt_u32(a, b) (a < b) -#define vclt_u64(a, b) (a < b) -#define vclt_f16(a, b) (a < b) -#define vclt_f32(a, b) (a < b) -#define vclt_f64(a, b) (a < b) -#define vcltq_s8(a, b) (a < b) -#define vcltq_s16(a, b) (a < b) -#define vcltq_s32(a, b) (a < b) -#define vcltq_s64(a, b) (a < b) -#define vcltq_u8(a, b) (a < b) -#define vcltq_u16(a, b) (a < b) -#define vcltq_u32(a, b) (a < b) -#define vcltq_u64(a, b) (a < b) -#define vcltq_f16(a, b) (a < b) -#define vcltq_f32(a, b) (a < b) -#define vcltq_f64(a, b) (a < b) -#define vcltd_s64(a, b) ((a < b) ? -1LL : 0LL) -#define vcltd_u64(a, b) ((a < b) ? -1LL : 0LL) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vabdl_u16( + uint16x4_t a, uint16x4_t b) { + return __builtin_mpl_vector_labssub_low_v4u16(a, b); +} -// vcltz -#define vcltz_s8(a) (a < 0) -#define vcltzq_s8(a) (a < 0) -#define vcltz_s16(a) (a < 0) -#define vcltzq_s16(a) (a < 0) -#define vcltz_s32(a) (a < 0) -#define vcltzq_s32(a) (a < 0) -#define vcltz_s64(a) (a < 0) -#define vcltzq_s64(a) (a < 0) -#define vcltzd_s64(a) ((a < 0) ? -1LL : 0LL) +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vabdl_u32( + uint32x2_t a, uint32x2_t b) { + return __builtin_mpl_vector_labssub_low_v2u32(a, b); +} -// vcle -#define vcle_s8(a, b) (a <= b) -#define vcle_s16(a, b) (a <= b) -#define vcle_s32(a, b) (a <= b) -#define vcle_s64(a, b) (a <= b) -#define vcle_u8(a, b) (a <= b) -#define vcle_u16(a, b) (a <= b) -#define vcle_u32(a, b) (a <= b) -#define vcle_u64(a, b) (a <= b) -#define vcle_f16(a, b) (a <= b) -#define vcle_f32(a, b) (a <= b) -#define vcle_f64(a, b) (a <= b) -#define vcleq_s8(a, b) (a <= b) -#define vcleq_s16(a, b) (a <= b) -#define vcleq_s32(a, b) (a <= b) -#define vcleq_s64(a, b) (a <= b) -#define vcleq_u8(a, b) (a <= b) -#define vcleq_u16(a, b) (a <= b) -#define vcleq_u32(a, b) (a <= b) -#define vcleq_u64(a, b) (a <= b) -#define vcleq_f16(a, b) (a <= b) -#define vcleq_f32(a, b) (a <= b) -#define vcleq_f64(a, b) (a <= b) -#define vcled_s64(a, b) ((a <= b) ? -1LL : 0LL) -#define vcled_u64(a, b) ((a <= b) ? -1LL : 0LL) +// vabdl_high +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vabdl_high_s8( + int8x16_t a, int8x16_t b) { + return __builtin_mpl_vector_labssub_high_v8i8(a, b); +} -// vclez -#define vclez_s8(a) (a <= 0) -#define vclezq_s8(a) (a <= 0) -#define vclez_s16(a) (a <= 0) -#define vclezq_s16(a) (a <= 0) -#define vclez_s32(a) (a <= 0) -#define vclezq_s32(a) (a <= 0) -#define vclez_s64(a) (a <= 0) -#define vclezq_s64(a) (a <= 0) -#define vclezd_s64(a) ((a <= 0) ? -1LL : 0LL) +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vabdl_high_s16( + int16x8_t a, int16x8_t b) { + return __builtin_mpl_vector_labssub_high_v4i16(a, b); +} -// veor -#define veor_s8(a, b) (a ^ b) -#define veor_s16(a, b) (a ^ b) -#define veor_s32(a, b) (a ^ b) -#define veor_s64(a, b) (a ^ b) -#define veor_u8(a, b) (a ^ b) -#define veor_u16(a, b) (a ^ b) -#define veor_u32(a, b) (a ^ b) -#define veor_u64(a, b) (a ^ b) -#define veorq_s8(a, b) (a ^ b) -#define veorq_s16(a, b) (a ^ b) -#define veorq_s32(a, b) (a ^ b) -#define veorq_s64(a, b) (a ^ b) -#define veorq_u8(a, b) (a ^ b) -#define veorq_u16(a, b) (a ^ b) -#define veorq_u32(a, b) (a ^ b) -#define veorq_u64(a, b) (a ^ b) +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vabdl_high_s32( + int32x4_t a, int32x4_t b) { + return __builtin_mpl_vector_labssub_high_v2i32(a, b); +} -// vext -#define vext_s8(a, b, n) __builtin_mpl_vector_merge_v8i8(a, b, n) -#define vext_s16(a, b, n) __builtin_mpl_vector_merge_v4i16(a, b, n) -#define vext_s32(a, b, n) __builtin_mpl_vector_merge_v2i32(a, b, n) -#define vext_s64(a, b, n) __builtin_mpl_vector_merge_v1i64(a, b, n) -#define vext_u8(a, b, n) __builtin_mpl_vector_merge_v8u8(a, b, n) -#define vext_u16(a, b, n) __builtin_mpl_vector_merge_v4u16(a, b, n) -#define vext_u32(a, b, n) __builtin_mpl_vector_merge_v2u32(a, b, n) -#define vext_u64(a, b, n) __builtin_mpl_vector_merge_v1u64(a, b, n) -#define vext_f16(a, b, n) __builtin_mpl_vector_merge_v4f16(a, b, n) -#define vext_f32(a, b, n) __builtin_mpl_vector_merge_v2f32(a, b, n) -#define vext_f64(a, b, n) __builtin_mpl_vector_merge_v1f64(a, b, n) -#define vextq_s8(a, b, n) __builtin_mpl_vector_merge_v16i8(a, b, n) -#define vextq_s16(a, b, n) __builtin_mpl_vector_merge_v8i16(a, b, n) -#define vextq_s32(a, b, n) __builtin_mpl_vector_merge_v4i32(a, b, n) -#define vextq_s64(a, b, n) __builtin_mpl_vector_merge_v2i64(a, b, n) -#define vextq_u8(a, b, n) __builtin_mpl_vector_merge_v16u8(a, b, n) -#define vextq_u16(a, b, n) __builtin_mpl_vector_merge_v8u16(a, b, n) -#define vextq_u32(a, b, n) __builtin_mpl_vector_merge_v4u32(a, b, n) -#define vextq_u64(a, b, n) __builtin_mpl_vector_merge_v2u64(a, b, n) -#define vextq_f16(a, b, n) __builtin_mpl_vector_merge_v8f16(a, b, n) -#define vextq_f32(a, b, n) __builtin_mpl_vector_merge_v4f32(a, b, n) -#define vextq_f64(a, b, n) __builtin_mpl_vector_merge_v2f64(a, b, n) +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vabdl_high_u8( + uint8x16_t a, uint8x16_t b) { + return __builtin_mpl_vector_labssub_high_v8u8(a, b); +} -// vget_high -#define vget_high_s8(a) __builtin_mpl_vector_get_high_v16i8(a) -#define vget_high_s16(a) __builtin_mpl_vector_get_high_v8i16(a) -#define vget_high_s32(a) __builtin_mpl_vector_get_high_v4i32(a) -#define vget_high_s64(a) __builtin_mpl_vector_get_high_v2i64(a) -#define vget_high_u8(a) __builtin_mpl_vector_get_high_v16u8(a) -#define vget_high_u16(a) __builtin_mpl_vector_get_high_v8u16(a) -#define vget_high_u32(a) __builtin_mpl_vector_get_high_v4u32(a) -#define vget_high_u64(a) __builtin_mpl_vector_get_high_v2u64(a) -#define vget_high_f16(a) __builtin_mpl_vector_get_high_v4f16(a) -#define vget_high_f32(a) __builtin_mpl_vector_get_high_v2f32(a) -#define vget_high_f64(a) __builtin_mpl_vector_get_high_v1f64(a) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vabdl_high_u16( + uint16x8_t a, uint16x8_t b) { + return __builtin_mpl_vector_labssub_high_v4u16(a, b); +} -// vget_lane -#define vget_lane_f16(a, n) __builtin_mpl_vector_get_element_v4f16(a, n) -#define vget_lane_f32(a, n) __builtin_mpl_vector_get_element_v2f32(a, n) -#define vget_lane_f64(a, n) __builtin_mpl_vector_get_element_v1f64(a, n) -#define vgetq_lane_f16(a, n) __builtin_mpl_vector_get_element_v8f16(a, n) -#define vgetq_lane_f32(a, n) __builtin_mpl_vector_get_element_v4f32(a, n) -#define vgetq_lane_f64(a, n) __builtin_mpl_vector_get_element_v2f64(a, n) +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vabdl_high_u32( + uint32x4_t a, uint32x4_t b) { + return __builtin_mpl_vector_labssub_high_v2u32(a, b); +} -// vget_low -#define vget_low_s8(a) __builtin_mpl_vector_get_low_v16i8(a) -#define vget_low_s16(a) __builtin_mpl_vector_get_low_v8i16(a) -#define vget_low_s32(a) __builtin_mpl_vector_get_low_v4i32(a) -#define vget_low_s64(a) __builtin_mpl_vector_get_low_v2i64(a) -#define vget_low_u8(a) __builtin_mpl_vector_get_low_v16u8(a) -#define vget_low_u16(a) __builtin_mpl_vector_get_low_v8u16(a) -#define vget_low_u32(a) __builtin_mpl_vector_get_low_v4u32(a) -#define vget_low_u64(a) __builtin_mpl_vector_get_low_v2u64(a) -#define vget_low_f16(a) __builtin_mpl_vector_get_low_v4f16(a) -#define vget_low_f32(a) __builtin_mpl_vector_get_low_v2f32(a) -#define vget_low_f64(a) __builtin_mpl_vector_get_low_v1f64(a) +// vabs +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vabs_s8(int8x8_t a) { + return __builtin_mpl_vector_abs_v8i8(a); +} -// vld1 -#define vld1_f16(a) __builtin_mpl_vector_load_v4f16(a) -#define vld1_f32(a) __builtin_mpl_vector_load_v2f32(a) -#define vld1_f64(a) __builtin_mpl_vector_load_v1f64(a) -#define vld1q_f16(a) __builtin_mpl_vector_load_v8f16(a) -#define vld1q_f32(a) __builtin_mpl_vector_load_v4f32(a) -#define vld1q_f64(a) __builtin_mpl_vector_load_v2f64(a) +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vabsq_s8(int8x16_t a) { + return __builtin_mpl_vector_abs_v16i8(a); +} -// vmlal -#define vmlal_s8(acc, a, b) __builtin_mpl_vector_madd_v8i8(acc, a, b) -#define vmlal_s16(acc, a, b) __builtin_mpl_vector_madd_v4i16(acc, a, b) -#define vmlal_s32(acc, a, b) __builtin_mpl_vector_madd_v2i32(acc, a, b) -#define vmlal_u8(acc, a, b) __builtin_mpl_vector_madd_v8u8(acc, a, b) -#define vmlal_u16(acc, a, b) __builtin_mpl_vector_madd_v4u16(acc, a, b) -#define vmlal_u32(acc, a, b) __builtin_mpl_vector_madd_v2u32(acc, a, b) +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vabs_s16(int16x4_t a) { + return __builtin_mpl_vector_abs_v4i16(a); +} -// vmovl -#define vmovl_s32(a) __builtin_mpl_vector_widen_low_v2i32(a) -#define vmovl_s16(a) __builtin_mpl_vector_widen_low_v4i16(a) -#define vmovl_s8(a) __builtin_mpl_vector_widen_low_v8i8(a) -#define vmovl_u32(a) __builtin_mpl_vector_widen_low_v2u32(a) -#define vmovl_u16(a) __builtin_mpl_vector_widen_low_v4u16(a) -#define vmovl_u8(a) __builtin_mpl_vector_widen_low_v8u8(a) +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vabsq_s16( + int16x8_t a) { + return __builtin_mpl_vector_abs_v8i16(a); +} -// vmovl_high -#define vmovl_high_s32(a) __builtin_mpl_vector_widen_high_v2i32(a) -#define vmovl_high_s16(a) __builtin_mpl_vector_widen_high_v4i16(a) -#define vmovl_high_s8(a) __builtin_mpl_vector_widen_high_v8i8(a) -#define vmovl_high_u32(a) __builtin_mpl_vector_widen_high_v2u32(a) -#define vmovl_high_u16(a) __builtin_mpl_vector_widen_high_v4u16(a) -#define vmovl_high_u8(a) __builtin_mpl_vector_widen_high_v8u8(a) +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vabs_s32(int32x2_t a) { + return __builtin_mpl_vector_abs_v2i32(a); +} -// vmovn -#define vmovn_s64(a) __builtin_mpl_vector_narrow_low_v2i64(a) -#define vmovn_s32(a) __builtin_mpl_vector_narrow_low_v4i32(a) -#define vmovn_s16(a) __builtin_mpl_vector_narrow_low_v8i16(a) -#define vmovn_u64(a) __builtin_mpl_vector_narrow_low_v2u64(a) -#define vmovn_u32(a) __builtin_mpl_vector_narrow_low_v4u32(a) -#define vmovn_u16(a) __builtin_mpl_vector_narrow_low_v8u16(a) +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vabsq_s32( + int32x4_t a) { + return __builtin_mpl_vector_abs_v4i32(a); +} -// vmovn_high -#define vmovn_high_s64(a, b) __builtin_mpl_vector_narrow_high_v2i64(a, b) -#define vmovn_high_s32(a, b) __builtin_mpl_vector_narrow_high_v4i32(a, b) -#define vmovn_high_s16(a, b) __builtin_mpl_vector_narrow_high_v8i16(a, b) -#define vmovn_high_u64(a, b) __builtin_mpl_vector_narrow_high_v2u64(a, b) -#define vmovn_high_u32(a, b) __builtin_mpl_vector_narrow_high_v4u32(a, b) -#define vmovn_high_u16(a, b) __builtin_mpl_vector_narrow_high_v8u16(a, b) +extern inline int64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vabs_s64(int64x1_t a) { + return __builtin_mpl_vector_abs_v1i64(a); +} -// vmul -#define vmul_s8(a, b) (a * b) -#define vmulq_s8(a, b) (a * b) -#define vmul_s16(a, b) (a * b) -#define vmulq_s16(a, b) (a * b) -#define vmul_s32(a, b) (a * b) -#define vmulq_s32(a, b) (a * b) -#define vmul_u8(a, b) (a * b) -#define vmulq_u8(a, b) (a * b) -#define vmul_u16(a, b) (a * b) -#define vmulq_u16(a, b) (a * b) -#define vmul_u32(a, b) (a * b) -#define vmulq_u32(a, b) (a * b) +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vabsq_s64( + int64x2_t a) { + return __builtin_mpl_vector_abs_v2i64(a); +} -// vmull -#define vmull_s8(a, b) __builtin_mpl_vector_mull_low_v8i8(a, b) -#define vmull_s16(a, b) __builtin_mpl_vector_mull_low_v4i16(a, b) -#define vmull_s32(a, b) __builtin_mpl_vector_mull_low_v2i32(a, b) -#define vmull_u8(a, b) __builtin_mpl_vector_mull_low_v8u8(a, b) -#define vmull_u16(a, b) __builtin_mpl_vector_mull_low_v4u16(a, b) -#define vmull_u32(a, b) __builtin_mpl_vector_mull_low_v2u32(a, b) -// vmull_high -#define vmull_high_s8(a, b) __builtin_mpl_vector_mull_high_v8i8(a, b) -#define vmull_high_s16(a, b) __builtin_mpl_vector_mull_high_v4i16(a, b) -#define vmull_high_s32(a, b) __builtin_mpl_vector_mull_high_v2i32(a, b) -#define vmull_high_u8(a, b) __builtin_mpl_vector_mull_high_v8u8(a, b) -#define vmull_high_u16(a, b) __builtin_mpl_vector_mull_high_v4u16(a, b) -#define vmull_high_u32(a, b) __builtin_mpl_vector_mull_high_v2u32(a, b) +// vaddv +extern inline int8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddv_s8(int8x8_t a) { + return __builtin_mpl_vector_sum_v8i8(a); +} -// vor -#define vor_s8(a, b) (a | b) -#define vor_s16(a, b) (a | b) -#define vor_s32(a, b) (a | b) -#define vor_s64(a, b) (a | b) -#define vor_u8(a, b) (a | b) -#define vor_u16(a, b) (a | b) -#define vor_u32(a, b) (a | b) -#define vor_u64(a, b) (a | b) -#define vorq_s8(a, b) (a | b) -#define vorq_s16(a, b) (a | b) -#define vorq_s32(a, b) (a | b) -#define vorq_s64(a, b) (a | b) -#define vorq_u8(a, b) (a | b) -#define vorq_u16(a, b) (a | b) -#define vorq_u32(a, b) (a | b) -#define vorq_u64(a, b) (a | b) +extern inline int16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddv_s16(int16x4_t a) { + return __builtin_mpl_vector_sum_v4i16(a); +} -// vpadal (add and accumulate long pairwise) -#define vpadal_s8(a, b) __builtin_mpl_vector_pairwise_adalp_v8i8(a, b) -#define vpadal_s16(a, b) __builtin_mpl_vector_pairwise_adalp_v4i16(a, b) -#define vpadal_s32(a, b) __builtin_mpl_vector_pairwise_adalp_v2i32(a, b) -#define vpadal_u8(a, b) __builtin_mpl_vector_pairwise_adalp_v8u8(a, b) -#define vpadal_u16(a, b) __builtin_mpl_vector_pairwise_adalp_v4u16(a, b) -#define vpadal_u32(a, b) __builtin_mpl_vector_pairwise_adalp_v2u32(a, b) -#define vpadalq_s8(a, b) __builtin_mpl_vector_pairwise_adalp_v16i8(a, b) -#define vpadalq_s16(a, b) __builtin_mpl_vector_pairwise_adalp_v8i16(a, b) -#define vpadalq_s32(a, b) __builtin_mpl_vector_pairwise_adalp_v4i32(a, b) -#define vpadalq_u8(a, b) __builtin_mpl_vector_pairwise_adalp_v16u8(a, b) -#define vpadalq_u16(a, b) __builtin_mpl_vector_pairwise_adalp_v8u16(a, b) -#define vpadalq_u32(a, b) __builtin_mpl_vector_pairwise_adalp_v4u32(a, b) +extern inline int32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddv_s32(int32x2_t a) { + return vget_lane_s32(__builtin_mpl_vector_padd_v2i32(a, a), 0); +} -// vpaddl -#define vpaddl_s8(a) __builtin_mpl_vector_pairwise_add_v8i8(a) -#define vpaddl_s16(a) __builtin_mpl_vector_pairwise_add_v4i16(a) -#define vpaddl_s32(a) __builtin_mpl_vector_pairwise_add_v2i32(a) -#define vpaddl_u8(a) __builtin_mpl_vector_pairwise_add_v8u8(a) -#define vpaddl_u16(a) __builtin_mpl_vector_pairwise_add_v4u16(a) -#define vpaddl_u32(a) __builtin_mpl_vector_pairwise_add_v2u32(a) -#define vpaddlq_s8(a) __builtin_mpl_vector_pairwise_add_v16i8(a) -#define vpaddlq_s16(a) __builtin_mpl_vector_pairwise_add_v8i16(a) -#define vpaddlq_s32(a) __builtin_mpl_vector_pairwise_add_v4i32(a) -#define vpaddlq_u8(a) __builtin_mpl_vector_pairwise_add_v16u8(a) -#define vpaddlq_u16(a) __builtin_mpl_vector_pairwise_add_v8u16(a) -#define vpaddlq_u32(a) __builtin_mpl_vector_pairwise_add_v4u32(a) +extern inline uint8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddv_u8(uint8x8_t a) { + return __builtin_mpl_vector_sum_v8u8(a); +} -// vreinterpret 8 -#define vreinterpret_s16_s8(a) ((int16x4_t)a) -#define vreinterpret_s32_s8(a) ((int32x2_t)a) -#define vreinterpret_u8_s8(a) ((uint8x8_t)a) -#define vreinterpret_u16_s8(a) ((uint16x4_t)a) -#define vreinterpret_u32_s8(a) ((uint32x2_t)a) -#define vreinterpret_u64_s8(a) ((uint64x1_t)a) -#define vreinterpret_s64_s8(a) ((int64x1_t)a) -#define vreinterpret_s8_u8(a) ((int8x8_t)a) -#define vreinterpret_s16_u8(a) ((int16x4_t)a) -#define vreinterpret_s32_u8(a) ((int32x2_t)a) -#define vreinterpret_u16_u8(a) ((uint16x4_t)a) -#define vreinterpret_u32_u8(a) ((uint32x2_t)a) -#define vreinterpret_u64_u8(a) ((uint64x1_t)a) -#define vreinterpret_s64_u8(a) ((int64x1_t)a) -#define vreinterpret_f16_s8(a) ((float16x4_t)a) -#define vreinterpret_f32_s8(a) ((float32x2_t)a) -#define vreinterpret_f64_s8(a) ((float64x1_t)a) -#define vreinterpret_f16_u8(a) ((float16x4_t)a) -#define vreinterpret_f32_u8(a) ((float32x2_t)a) -#define vreinterpret_f64_u8(a) ((float64x1_t)a) -#define vreinterpretq_s16_s8(a) ((int16x8_t)a) -#define vreinterpretq_s32_s8(a) ((int32x4_t)a) -#define vreinterpretq_u8_s8(a) ((uint8x16_t)a) -#define vreinterpretq_u16_s8(a) ((uint16x8_t)a) -#define vreinterpretq_u32_s8(a) ((uint32x4_t)a) -#define vreinterpretq_u64_s8(a) ((uint64x2_t)a) -#define vreinterpretq_s64_s8(a) ((int64x2_t)a) -#define vreinterpretq_s8_u8(a) ((int8x16_t)a) -#define vreinterpretq_s16_u8(a) ((int16x8_t)a) -#define vreinterpretq_s32_u8(a) ((int32x4_t)a) -#define vreinterpretq_u16_u8(a) ((uint16x8_t)a) -#define vreinterpretq_u32_u8(a) ((uint32x4_t)a) -#define vreinterpretq_u64_u8(a) ((uint64x2_t)a) -#define vreinterpretq_s64_u8(a) ((int64x2_t)a) -#define vreinterpretq_f16_s8(a) ((float16x8_t)a) -#define vreinterpretq_f32_s8(a) ((float32x4_t)a) -#define vreinterpretq_f64_s8(a) ((float64x2_t)a) -#define vreinterpretq_f16_u8(a) ((float16x8_t)a) -#define vreinterpretq_f32_u8(a) ((float32x4_t)a) -#define vreinterpretq_f64_u8(a) ((float64x2_t)a) +extern inline uint16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddv_u16( + uint16x4_t a) { + return __builtin_mpl_vector_sum_v4u16(a); +} -// vreinterpret 16 -#define vreinterpret_s8_s16(a) ((int8x8_t)a) -#define vreinterpret_s32_s16(a) ((int32x2_t)a) -#define vreinterpret_u8_s16(a) ((uint8x8_t)a) -#define vreinterpret_u16_s16(a) ((uint16x4_t)a) -#define vreinterpret_u32_s16(a) ((uint32x2_t)a) -#define vreinterpret_u64_s16(a) ((uint64x1_t)a) -#define vreinterpret_s64_s16(a) ((int64x1_t)a) -#define vreinterpret_s8_u16(a) ((int8x8_t)a) -#define vreinterpret_s16_u16(a) ((int16x4_t)a) -#define vreinterpret_s32_u16(a) ((int32x2_t)a) -#define vreinterpret_u8_u16(a) ((uint8x8_t)a) -#define vreinterpret_u32_u16(a) ((uint32x2_t)a) -#define vreinterpret_u64_u16(a) ((uint64x1_t)a) -#define vreinterpret_s64_u16(a) ((int64x1_t)a) -#define vreinterpret_f16_s16(a) ((float16x4_t)a) -#define vreinterpret_f32_s16(a) ((float32x2_t)a) -#define vreinterpret_f64_s16(a) ((float64x1_t)a) -#define vreinterpret_f16_u16(a) ((float16x4_t)a) -#define vreinterpret_f32_u16(a) ((float32x2_t)a) -#define vreinterpret_f64_u16(a) ((float64x1_t)a) -#define vreinterpretq_s8_s16(a) ((int8x16_t)a) -#define vreinterpretq_s32_s16(a) ((int32x4_t)a) -#define vreinterpretq_u8_s16(a) ((uint8x16_t)a) -#define vreinterpretq_u16_s16(a) ((uint16x8_t)a) -#define vreinterpretq_u32_s16(a) ((uint32x4_t)a) -#define vreinterpretq_u64_s16(a) ((uint64x2_t)a) -#define vreinterpretq_s64_s16(a) ((int64x2_t)a) -#define vreinterpretq_s8_u16(a) ((int8x16_t)a) -#define vreinterpretq_s16_u16(a) ((int16x8_t)a) -#define vreinterpretq_s32_u16(a) ((int32x4_t)a) -#define vreinterpretq_u8_u16(a) ((uint8x16_t)a) -#define vreinterpretq_u32_u16(a) ((uint32x4_t)a) -#define vreinterpretq_u64_u16(a) ((uint64x2_t)a) -#define vreinterpretq_s64_u16(a) ((int64x2_t)a) -#define vreinterpretq_f16_s16(a) ((float16x8_t)a) -#define vreinterpretq_f32_s16(a) ((float32x4_t)a) -#define vreinterpretq_f64_s16(a) ((float64x2_t)a) -#define vreinterpretq_f16_u16(a) ((float16x8_t)a) -#define vreinterpretq_f32_u16(a) ((float32x4_t)a) -#define vreinterpretq_f64_u16(a) ((float64x2_t)a) +extern inline uint32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddv_u32( + uint32x2_t a) { + return vget_lane_u32(__builtin_mpl_vector_padd_v2u32(a, a), 0); +} -// vreinterpret 32 +extern inline float32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddv_f32( + float32x2_t a) { + return __builtin_mpl_vector_sum_v2f32(a); +} -#define vreinterpret_s8_s32(a) ((int8x8_t)a) -#define vreinterpret_s16_s32(a) ((int16x4_t)a) -#define vreinterpret_u8_s32(a) ((uint8x8_t)a) -#define vreinterpret_u16_s32(a) ((uint16x4_t)a) -#define vreinterpret_u32_s32(a) ((uint32x2_t)a) -#define vreinterpret_u64_s32(a) ((uint64x1_t)a) -#define vreinterpret_s64_s32(a) ((int64x1_t)a) -#define vreinterpret_s8_u32(a) ((int8x8_t)a) -#define vreinterpret_s16_u32(a) ((int16x4_t)a) -#define vreinterpret_s32_u32(a) ((int32x2_t)a) -#define vreinterpret_u8_u32(a) ((uint8x8_t)a) -#define vreinterpret_u16_u32(a) ((uint16x4_t)a) -#define vreinterpret_u64_u32(a) ((uint64x1_t)a) -#define vreinterpret_s64_u32(a) ((int64x1_t)a) -#define vreinterpret_f16_s32(a) ((float16x4_t)a) -#define vreinterpret_f32_s32(a) ((float32x2_t)a) -#define vreinterpret_f64_s32(a) ((float64x1_t)a) -#define vreinterpret_f16_u32(a) ((float16x4_t)a) -#define vreinterpret_f32_u32(a) ((float32x2_t)a) -#define vreinterpret_f64_u32(a) ((float64x1_t)a) -#define vreinterpretq_s8_s32(a) ((int8x16_t)a) -#define vreinterpretq_s16_s32(a) ((int16x8_t)a) -#define vreinterpretq_u8_s32(a) ((uint8x16_t)a) -#define vreinterpretq_u16_s32(a) ((uint16x8_t)a) -#define vreinterpretq_u32_s32(a) ((uint32x4_t)a) -#define vreinterpretq_u64_s32(a) ((uint64x2_t)a) -#define vreinterpretq_s64_s32(a) ((int64x2_t)a) -#define vreinterpretq_s8_u32(a) ((int8x16_t)a) -#define vreinterpretq_s16_u32(a) ((int16x8_t)a) -#define vreinterpretq_s32_u32(a) ((int32x4_t)a) -#define vreinterpretq_u8_u32(a) ((uint8x16_t)a) -#define vreinterpretq_u16_u32(a) ((uint16x8_t)a) -#define vreinterpretq_u64_u32(a) ((uint64x2_t)a) -#define vreinterpretq_s64_u32(a) ((int64x2_t)a) -#define vreinterpretq_f16_s32(a) ((float16x8_t)a) -#define vreinterpretq_f32_s32(a) ((float32x4_t)a) -#define vreinterpretq_f64_s32(a) ((float64x2_t)a) -#define vreinterpretq_f16_u32(a) ((float16x8_t)a) -#define vreinterpretq_f32_u32(a) ((float32x4_t)a) -#define vreinterpretq_f64_u32(a) ((float64x2_t)a) +extern inline int8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddvq_s8(int8x16_t a) { + return __builtin_mpl_vector_sum_v16i8(a); +} -// vreinterpret 64 -#define vreinterpret_s8_s64(a) ((int8x8_t)a) -#define vreinterpret_s16_s64(a) ((int16x4_t)a) -#define vreinterpret_s32_s64(a) ((int32x2_t)a) -#define vreinterpret_u8_s64(a) ((uint8x8_t)a) -#define vreinterpret_u16_s64(a) ((uint16x4_t)a) -#define vreinterpret_u32_s64(a) ((uint32x2_t)a) -#define vreinterpret_u64_s64(a) ((uint64x1_t)a) -#define vreinterpret_s8_u64(a) ((int8x8_t)a) -#define vreinterpret_s16_u64(a) ((int16x4_t)a) -#define vreinterpret_s32_u64(a) ((int32x2_t)a) -#define vreinterpret_u8_u64(a) ((uint8x8_t)a) -#define vreinterpret_u16_u64(a) ((uint16x4_t)a) -#define vreinterpret_u32_u64(a) ((uint32x2_t)a) -#define vreinterpret_s64_u64(a) ((int64x1_t)a) -#define vreinterpret_f16_s64(a) ((float16x4_t)a) -#define vreinterpret_f32_s64(a) ((float32x2_t)a) -#define vreinterpret_f64_s64(a) ((float64x1_t)a) -#define vreinterpret_f16_u64(a) ((float16x4_t)a) -#define vreinterpret_f32_u64(a) ((float32x2_t)a) -#define vreinterpret_f64_u64(a) ((float64x1_t)a) -#define vreinterpretq_s8_s64(a) ((int8x16_t)a) -#define vreinterpretq_s16_s64(a) ((int16x8_t)a) -#define vreinterpretq_s32_s64(a) ((int32x4_t)a) -#define vreinterpretq_u8_s64(a) ((uint8x16_t)a) -#define vreinterpretq_u16_s64(a) ((uint16x8_t)a) -#define vreinterpretq_u32_s64(a) ((uint32x4_t)a) -#define vreinterpretq_u64_s64(a) ((uint64x2_t)a) -#define vreinterpretq_s8_u64(a) ((int8x16_t)a) -#define vreinterpretq_s16_u64(a) ((int16x8_t)a) -#define vreinterpretq_s32_u64(a) ((int32x4_t)a) -#define vreinterpretq_u8_u64(a) ((uint8x16_t)a) -#define vreinterpretq_u16_u64(a) ((uint16x8_t)a) -#define vreinterpretq_u32_u64(a) ((uint32x4_t)a) -#define vreinterpretq_s64_u64(a) ((int64x2_t)a) -#define vreinterpretq_f16_s64(a) ((float16x8_t)a) -#define vreinterpretq_f32_s64(a) ((float32x4_t)a) -#define vreinterpretq_f64_s64(a) ((float64x2_t)a) -#define vreinterpretq_f16_u64(a) ((float16x8_t)a) -#define vreinterpretq_f32_u64(a) ((float32x4_t)a) -#define vreinterpretq_f64_u64(a) ((float64x2_t)a) +extern inline int16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddvq_s16(int16x8_t a) { + return __builtin_mpl_vector_sum_v8i16(a); +} -// vrev32 -#define vrev32_s8(a) __builtin_mpl_vector_reverse_v8i8(a) -#define vrev32_s16(a) __builtin_mpl_vector_reverse_v4i16(a) -#define vrev32_u8(a) __builtin_mpl_vector_reverse_v8u8(a) -#define vrev32_u16(a) __builtin_mpl_vector_reverse_v4u16(a) -#define vrev32q_s8(a) __builtin_mpl_vector_reverse_v16i8(a) -#define vrev32q_s16(a) __builtin_mpl_vector_reverse_v8i16(a) -#define vrev32q_u8(a) __builtin_mpl_vector_reverse_v16u8(a) -#define vrev32q_u16(a) __builtin_mpl_vector_reverse_v8u16(a) +extern inline int32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddvq_s32(int32x4_t a) { + return __builtin_mpl_vector_sum_v4i32(a); +} -// vset_lane -#define vset_lane_s8(v, a, n) __builtin_mpl_vector_set_element_v8i8(v, a, n) -#define vset_lane_s16(v, a, n) __builtin_mpl_vector_set_element_v4i16(v, a, n) -#define vset_lane_s32(v, a, n) __builtin_mpl_vector_set_element_v2i32(v, a, n) -#define vset_lane_s64(v, a, n) __builtin_mpl_vector_set_element_v1i64(v, a, n) -#define vset_lane_u8(v, a, n) __builtin_mpl_vector_set_element_v8u8(v, a, n) -#define vset_lane_u16(v, a, n) __builtin_mpl_vector_set_element_v4u16(v, a, n) -#define vset_lane_u32(v, a, n) __builtin_mpl_vector_set_element_v2u32(v, a, n) -#define vset_lane_u64(v, a, n) __builtin_mpl_vector_set_element_v1u64(v, a, n) -#define vset_lane_f16(v, a, n) __builtin_mpl_vector_set_element_v4f16(v, a, n) -#define vset_lane_f32(v, a, n) __builtin_mpl_vector_set_element_v2f32(v, a, n) -#define vset_lane_f64(v, a, n) __builtin_mpl_vector_set_element_v1f64(v, a, n) -#define vsetq_lane_s8(v, a, n) __builtin_mpl_vector_set_element_v16i8(v, a, n) -#define vsetq_lane_s16(v, a, n) __builtin_mpl_vector_set_element_v8i16(v, a, n) -#define vsetq_lane_s32(v, a, n) __builtin_mpl_vector_set_element_v4i32(v, a, n) -#define vsetq_lane_s64(v, a, n) __builtin_mpl_vector_set_element_v2i64(v, a, n) -#define vsetq_lane_u8(v, a, n) __builtin_mpl_vector_set_element_v16u8(v, a, n) -#define vsetq_lane_u16(v, a, n) __builtin_mpl_vector_set_element_v8u16(v, a, n) -#define vsetq_lane_u32(v, a, n) __builtin_mpl_vector_set_element_v4u32(v, a, n) -#define vsetq_lane_u64(v, a, n) __builtin_mpl_vector_set_element_v2u64(v, a, n) -#define vsetq_lane_f16(v, a, n) __builtin_mpl_vector_set_element_v8f16(v, a, n) -#define vsetq_lane_f32(v, a, n) __builtin_mpl_vector_set_element_v4f32(v, a, n) -#define vsetq_lane_f64(v, a, n) __builtin_mpl_vector_set_element_v2f64(v, a, n) +extern inline int64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddvq_s64(int64x2_t a) { + return __builtin_mpl_vector_sum_v2i64(a); +} -// vshl -#define vshl_s8(a, b) (a << b) -#define vshl_s16(a, b) (a << b) -#define vshl_s32(a, b) (a << b) -#define vshl_s64(a, b) (a << b) -#define vshl_u8(a, b) (a << b) -#define vshl_u16(a, b) (a << b) -#define vshl_u32(a, b) (a << b) -#define vshl_u64(a, b) (a << b) -#define vshlq_s8(a, b) (a << b) -#define vshlq_s16(a, b) (a << b) -#define vshlq_s32(a, b) (a << b) -#define vshlq_s64(a, b) (a << b) -#define vshlq_u8(a, b) (a << b) -#define vshlq_u16(a, b) (a << b) -#define vshlq_u32(a, b) (a << b) -#define vshlq_u64(a, b) (a << b) -#define vshld_s64(a, b) (a << b) -#define vshld_u64(a, b) (a << b) +extern inline uint8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddvq_u8(uint8x16_t a) { + return __builtin_mpl_vector_sum_v16u8(a); +} -// vshl_n -#define vshlq_n_s64(a, n) __builtin_mpl_vector_shli_v2i64(a, n) -#define vshlq_n_s32(a, n) __builtin_mpl_vector_shli_v4i32(a, n) -#define vshlq_n_s16(a, n) __builtin_mpl_vector_shli_v8i16(a, n) -#define vshlq_n_s8(a, n) __builtin_mpl_vector_shli_v16i8(a, n) -#define vshlq_n_u64(a, n) __builtin_mpl_vector_shli_v2u64(a, n) -#define vshlq_n_u32(a, n) __builtin_mpl_vector_shli_v4u32(a, n) -#define vshlq_n_u16(a, n) __builtin_mpl_vector_shli_v8u16(a, n) -#define vshlq_n_u8(a, n) __builtin_mpl_vector_shli_v16u8(a, n) -#define vshl_n_s64(a, n) __builtin_mpl_vector_shli_v1i64(a, n) -#define vshl_n_s32(a, n) __builtin_mpl_vector_shli_v2i32(a, n) -#define vshl_n_s16(a, n) __builtin_mpl_vector_shli_v4i16(a, n) -#define vshl_n_s8(a, n) __builtin_mpl_vector_shli_v8i8(a, n) -#define vshl_n_u64(a, n) __builtin_mpl_vector_shli_v1u64(a, n) -#define vshl_n_u32(a, n) __builtin_mpl_vector_shli_v2u32(a, n) -#define vshl_n_u16(a, n) __builtin_mpl_vector_shli_v4u16(a, n) -#define vshl_n_u8(a, n) __builtin_mpl_vector_shli_v8u8(a, n) -#define vshld_n_s64(a, n) (vget_lane_s64(vshl_n_s64(vdup_n_s64(a), n), 0)) -#define vshld_n_u64(a, n) (vget_lane_u64(vshl_n_u64(vdup_n_u64(a), n), 0)) +extern inline uint16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddvq_u16( + uint16x8_t a) { + return __builtin_mpl_vector_sum_v8u16(a); +} -// vshr -#define vshr_s8(a, b) (a >> b) -#define vshr_s16(a, b) (a >> b) -#define vshr_s32(a, b) (a >> b) -#define vshr_s64(a, b) (a >> b) -#define vshr_u8(a, b) (a >> b) -#define vshr_u16(a, b) (a >> b) -#define vshr_u32(a, b) (a >> b) -#define vshr_u64(a, b) (a >> b) -#define vshrq_s8(a, b) (a >> b) -#define vshrq_s16(a, b) (a >> b) -#define vshrq_s32(a, b) (a >> b) -#define vshrq_s64(a, b) (a >> b) -#define vshrq_u8(a, b) (a >> b) -#define vshrq_u16(a, b) (a >> b) -#define vshrq_u32(a, b) (a >> b) -#define vshrq_u64(a, b) (a >> b) -#define vshrd_s64(a, b) (vget_lane_s64((vdup_n_s64(a) >> vdup_n_s64(b)), 0)) -#define vshrd_u64(a, b) (vget_lane_u64((vdup_n_u64(a) >> vdup_n_u64(b)), 0)) +extern inline uint32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddvq_u32( + uint32x4_t a) { + return __builtin_mpl_vector_sum_v4u32(a); +} -// vshr_n -#define vshrq_n_s64(a, n) __builtin_mpl_vector_shri_v2i64(a, n) -#define vshrq_n_s32(a, n) __builtin_mpl_vector_shri_v4i32(a, n) -#define vshrq_n_s16(a, n) __builtin_mpl_vector_shri_v8i16(a, n) -#define vshrq_n_s8(a, n) __builtin_mpl_vector_shri_v16i8(a, n) -#define vshrq_n_u64(a, n) __builtin_mpl_vector_shru_v2u64(a, n) -#define vshrq_n_u32(a, n) __builtin_mpl_vector_shru_v4u32(a, n) -#define vshrq_n_u16(a, n) __builtin_mpl_vector_shru_v8u16(a, n) -#define vshrq_n_u8(a, n) __builtin_mpl_vector_shru_v16u8(a, n) -#define vshr_n_s64(a, n) __builtin_mpl_vector_shri_v1i64(a, n) -#define vshr_n_s32(a, n) __builtin_mpl_vector_shri_v2i32(a, n) -#define vshr_n_s16(a, n) __builtin_mpl_vector_shri_v4i16(a, n) -#define vshr_n_s8(a, n) __builtin_mpl_vector_shri_v8i8(a, n) -#define vshr_n_u64(a, n) __builtin_mpl_vector_shru_v1u64(a, n) -#define vshr_n_u32(a, n) __builtin_mpl_vector_shru_v2u32(a, n) -#define vshr_n_u16(a, n) __builtin_mpl_vector_shru_v4u16(a, n) -#define vshr_n_u8(a, n) __builtin_mpl_vector_shru_v8u8(a, n) -#define vshrd_n_s64(a, n) (vget_lane_s64(vshr_n_s64(vdup_n_s64(a), n), 0)) -#define vshrd_n_u64(a, n) (vget_lane_u64(vshr_n_u64(vdup_n_u64(a), n), 0)) +extern inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddvq_u64( + uint64x2_t a) { + return __builtin_mpl_vector_sum_v2u64(a); +} -// vshrn_n -#define vshrn_n_s16(a, n) __builtin_mpl_vector_shr_narrow_low_v8i16(a, n) -#define vshrn_n_s32(a, n) __builtin_mpl_vector_shr_narrow_low_v4i32(a, n) -#define vshrn_n_s64(a, n) __builtin_mpl_vector_shr_narrow_low_v2i64(a, n) -#define vshrn_n_u16(a, n) __builtin_mpl_vector_shr_narrow_low_v8u16(a, n) -#define vshrn_n_u32(a, n) __builtin_mpl_vector_shr_narrow_low_v4u32(a, n) -#define vshrn_n_u64(a, n) __builtin_mpl_vector_shr_narrow_low_v2u64(a, n) +extern inline float32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddvq_f32( + float32x4_t a) { + return __builtin_mpl_vector_sum_v4f32(a); +} -// vst1 -#define vst1_s8(p, v) __builtin_mpl_vector_store_v8i8(p, v) -#define vst1_s16(p, v) __builtin_mpl_vector_store_v4i16(p, v) -#define vst1_s32(p, v) __builtin_mpl_vector_store_v2i32(p, v) -#define vst1_s64(p, v) __builtin_mpl_vector_store_v1i64(p, v) -#define vst1_u8(p, v) __builtin_mpl_vector_store_v8u8(p, v) -#define vst1_u16(p, v) __builtin_mpl_vector_store_v4u16(p, v) -#define vst1_u32(p, v) __builtin_mpl_vector_store_v2u32(p, v) -#define vst1_u64(p, v) __builtin_mpl_vector_store_v1u64(p, v) -#define vst1_f16(p, v) __builtin_mpl_vector_store_v4f16(p, v) -#define vst1_f32(p, v) __builtin_mpl_vector_store_v2f32(p, v) -#define vst1_f64(p, v) __builtin_mpl_vector_store_v1f64(p, v) -#define vst1q_s8(p, v) __builtin_mpl_vector_store_v16i8(p, v) -#define vst1q_s16(p, v) __builtin_mpl_vector_store_v8i16(p, v) -#define vst1q_s32(p, v) __builtin_mpl_vector_store_v4i32(p, v) -#define vst1q_s64(p, v) __builtin_mpl_vector_store_v2i64(p, v) -#define vst1q_u8(p, v) __builtin_mpl_vector_store_v16u8(p, v) -#define vst1q_u16(p, v) __builtin_mpl_vector_store_v8u16(p, v) -#define vst1q_u32(p, v) __builtin_mpl_vector_store_v4u32(p, v) -#define vst1q_u64(p, v) __builtin_mpl_vector_store_v2u64(p, v) -#define vst1q_f16(p, v) __builtin_mpl_vector_store_v8f16(p, v) -#define vst1q_f32(p, v) __builtin_mpl_vector_store_v4f32(p, v) -#define vst1q_f64(p, v) __builtin_mpl_vector_store_v2f64(p, v) +extern inline float64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddvq_f64( + float64x2_t a) { + return __builtin_mpl_vector_sum_v2f64(a); +} -// vsub -#define vsub_s8(a, b) (a - b) -#define vsub_s16(a, b) (a - b) -#define vsub_s32(a, b) (a - b) -#define vsub_s64(a, b) (a - b) -#define vsub_u8(a, b) (a - b) -#define vsub_u16(a, b) (a - b) -#define vsub_u32(a, b) (a - b) -#define vsub_u64(a, b) (a - b) -#define vsub_f16(a, b) (a - b) -#define vsub_f32(a, b) (a - b) -#define vsub_f64(a, b) (a - b) -#define vsubq_s8(a, b) (a - b) -#define vsubq_s16(a, b) (a - b) -#define vsubq_s32(a, b) (a - b) -#define vsubq_s64(a, b) (a - b) -#define vsubq_u8(a, b) (a - b) -#define vsubq_u16(a, b) (a - b) -#define vsubq_u32(a, b) (a - b) -#define vsubq_u64(a, b) (a - b) -#define vsubq_f16(a, b) (a - b) -#define vsubq_f32(a, b) (a - b) -#define vsubq_f64(a, b) (a - b) -#define vsubd_s64(a, b) (a - b) -#define vsubd_u64(a, b) (a - b) +// vqmovn +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqmovn_u16( + uint16x8_t a) { + return __builtin_mpl_vector_mov_narrow_v8u16(a); +} -// vsub[lw] -#define vsubl_s8(a, b) __builtin_mpl_vector_subl_low_v8i8(a, b) -#define vsubl_s16(a, b) __builtin_mpl_vector_subl_low_v4i16(a, b) -#define vsubl_s32(a, b) __builtin_mpl_vector_subl_low_v2i32(a, b) -#define vsubl_u8(a, b) __builtin_mpl_vector_subl_low_v8u8(a, b) -#define vsubl_u16(a, b) __builtin_mpl_vector_subl_low_v4u16(a, b) -#define vsubl_u32(a, b) __builtin_mpl_vector_subl_low_v2u32(a, b) -#define vsubl_high_s8(a, b) __builtin_mpl_vector_subl_high_v8i8(a, b) -#define vsubl_high_s16(a, b) __builtin_mpl_vector_subl_high_v4i16(a, b) -#define vsubl_high_s32(a, b) __builtin_mpl_vector_subl_high_v2i32(a, b) -#define vsubl_high_u8(a, b) __builtin_mpl_vector_subl_high_v8u8(a, b) -#define vsubl_high_u16(a, b) __builtin_mpl_vector_subl_high_v4u16(a, b) -#define vsubl_high_u32(a, b) __builtin_mpl_vector_subl_high_v2u32(a, b) -#define vsubw_s8(a, b) __builtin_mpl_vector_subw_low_v8i8(a, b) -#define vsubw_s16(a, b) __builtin_mpl_vector_subw_low_v4i16(a, b) -#define vsubw_s32(a, b) __builtin_mpl_vector_subw_low_v2i32(a, b) -#define vsubw_u8(a, b) __builtin_mpl_vector_subw_low_v8u8(a, b) -#define vsubw_u16(a, b) __builtin_mpl_vector_subw_low_v4u16(a, b) -#define vsubw_u32(a, b) __builtin_mpl_vector_subw_low_v2u32(a, b) -#define vsubw_high_s8(a, b) __builtin_mpl_vector_subw_high_v8i8(a, b) -#define vsubw_high_s16(a, b) __builtin_mpl_vector_subw_high_v4i16(a, b) -#define vsubw_high_s32(a, b) __builtin_mpl_vector_subw_high_v2i32(a, b) -#define vsubw_high_u8(a, b) __builtin_mpl_vector_subw_high_v8u8(a, b) -#define vsubw_high_u16(a, b) __builtin_mpl_vector_subw_high_v4u16(a, b) -#define vsubw_high_u32(a, b) __builtin_mpl_vector_subw_high_v2u32(a, b) +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqmovn_u32( + uint32x4_t a) { + return __builtin_mpl_vector_mov_narrow_v4u32(a); +} -uint8_t __builtin_mpl_vector_get_lane_v8u8(uint8x8_t a, const int lane); -#define vget_lane_u8(a, lane) __builtin_mpl_vector_get_lane_v8u8(a, lane) +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqmovn_u64( + uint64x2_t a) { + return __builtin_mpl_vector_mov_narrow_v2u64(a); +} -uint16_t __builtin_mpl_vector_get_lane_v4u16(uint16x4_t a, const int lane); -#define vget_lane_u16(a, lane) __builtin_mpl_vector_get_lane_v4u16(a, lane) +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqmovn_s16( + int16x8_t a) { + return __builtin_mpl_vector_mov_narrow_v8i16(a); +} -uint32_t __builtin_mpl_vector_get_lane_v2u32(uint32x2_t a, const int lane); -#define vget_lane_u32(a, lane) __builtin_mpl_vector_get_lane_v2u32(a, lane) +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqmovn_s32( + int32x4_t a) { + return __builtin_mpl_vector_mov_narrow_v4i32(a); +} -uint64_t __builtin_mpl_vector_get_lane_v1u64(uint64x1_t a, const int lane); -#define vget_lane_u64(a, lane) __builtin_mpl_vector_get_lane_v1u64(a, lane) +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqmovn_s64( + int64x2_t a) { + return __builtin_mpl_vector_mov_narrow_v2i64(a); +} -int8_t __builtin_mpl_vector_get_lane_v8i8(int8x8_t a, const int lane); -#define vget_lane_s8(a, lane) __builtin_mpl_vector_get_lane_v8i8(a, lane) +// vaddl +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddl_s8( + int8x8_t a, int8x8_t b) { + return __builtin_mpl_vector_addl_low_v8i8(a, b); +} -int16_t __builtin_mpl_vector_get_lane_v4i16(int16x4_t a, const int lane); -#define vget_lane_s16(a, lane) __builtin_mpl_vector_get_lane_v4i16(a, lane) +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddl_s16( + int16x4_t a, int16x4_t b) { + return __builtin_mpl_vector_addl_low_v4i16(a, b); +} -int32_t __builtin_mpl_vector_get_lane_v2i32(int32x2_t a, const int lane); -#define vget_lane_s32(a, lane) __builtin_mpl_vector_get_lane_v2i32(a, lane) +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddl_s32( + int32x2_t a, int32x2_t b) { + return __builtin_mpl_vector_addl_low_v2i32(a, b); +} -int64_t __builtin_mpl_vector_get_lane_v1i64(int64x1_t a, const int lane); -#define vget_lane_s64(a, lane) __builtin_mpl_vector_get_lane_v1i64(a, lane) +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddl_u8( + uint8x8_t a, uint8x8_t b) { + return __builtin_mpl_vector_addl_low_v8u8(a, b); +} -uint8_t __builtin_mpl_vector_getq_lane_v16u8(uint8x16_t a, const int lane); -#define vgetq_lane_u8(a, lane) __builtin_mpl_vector_getq_lane_v16u8(a, lane) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddl_u16( + uint16x4_t a, uint16x4_t b) { + return __builtin_mpl_vector_addl_low_v4u16(a, b); +} -uint16_t __builtin_mpl_vector_getq_lane_v8u16(uint16x8_t a, const int lane); -#define vgetq_lane_u16(a, lane) __builtin_mpl_vector_getq_lane_v8u16(a, lane) +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddl_u32( + uint32x2_t a, uint32x2_t b) { + return __builtin_mpl_vector_addl_low_v2u32(a, b); +} -uint32_t __builtin_mpl_vector_getq_lane_v4u32(uint32x4_t a, const int lane); -#define vgetq_lane_u32(a, lane) __builtin_mpl_vector_getq_lane_v4u32(a, lane) +// vaddl_high +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddl_high_s8( + int8x16_t a, int8x16_t b) { + return __builtin_mpl_vector_addl_high_v8i8(a, b); +} -uint64_t __builtin_mpl_vector_getq_lane_v2u64(uint64x2_t a, const int lane); -#define vgetq_lane_u64(a, lane) __builtin_mpl_vector_getq_lane_v2u64(a, lane) +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddl_high_s16( + int16x8_t a, int16x8_t b) { + return __builtin_mpl_vector_addl_high_v4i16(a, b); +} -int8_t __builtin_mpl_vector_getq_lane_v16i8(int8x16_t a, const int lane); -#define vgetq_lane_s8(a, lane) __builtin_mpl_vector_getq_lane_v16i8(a, lane) +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddl_high_s32( + int32x4_t a, int32x4_t b) { + return __builtin_mpl_vector_addl_high_v2i32(a, b); +} -int16_t __builtin_mpl_vector_getq_lane_v8i16(int16x8_t a, const int lane); -#define vgetq_lane_s16(a, lane) __builtin_mpl_vector_getq_lane_v8i16(a, lane) +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddl_high_u8( + uint8x16_t a, uint8x16_t b) { + return __builtin_mpl_vector_addl_high_v8u8(a, b); +} -int32_t __builtin_mpl_vector_getq_lane_v4i32(int32x4_t a, const int lane); -#define vgetq_lane_s32(a, lane) __builtin_mpl_vector_getq_lane_v4i32(a, lane) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddl_high_u16( + uint16x8_t a, uint16x8_t b) { + return __builtin_mpl_vector_addl_high_v4u16(a, b); +} -int64_t __builtin_mpl_vector_getq_lane_v2i64(int64x2_t a, const int lane); -#define vgetq_lane_s64(a, lane) __builtin_mpl_vector_getq_lane_v2i64(a, lane) +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddl_high_u32( + uint32x4_t a, uint32x4_t b) { + return __builtin_mpl_vector_addl_high_v2u32(a, b); +} -int8x8_t __builtin_mpl_vector_abd_v8i8(int8x8_t a, int8x8_t b); -#define vabd_s8(a, b) __builtin_mpl_vector_abd_v8i8(a, b) +// vaddw +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddw_s8( + int16x8_t a, int8x8_t b) { + return __builtin_mpl_vector_addw_low_v8i8(a, b); +} -int8x16_t __builtin_mpl_vector_abdq_v16i8(int8x16_t a, int8x16_t b); -#define vabdq_s8(a, b) __builtin_mpl_vector_abdq_v16i8(a, b) +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddw_s16( + int32x4_t a, int16x4_t b) { + return __builtin_mpl_vector_addw_low_v4i16(a, b); +} -int16x4_t __builtin_mpl_vector_abd_v4i16(int16x4_t a, int16x4_t b); -#define vabd_s16(a, b) __builtin_mpl_vector_abd_v4i16(a, b) +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddw_s32( + int64x2_t a, int32x2_t b) { + return __builtin_mpl_vector_addw_low_v2i32(a, b); +} -int16x8_t __builtin_mpl_vector_abdq_v8i16(int16x8_t a, int16x8_t b); -#define vabdq_s16(a, b) __builtin_mpl_vector_abdq_v8i16(a, b) +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddw_u8( + uint16x8_t a, uint8x8_t b) { + return __builtin_mpl_vector_addw_low_v8u8(a, b); +} -int32x2_t __builtin_mpl_vector_abd_v2i32(int32x2_t a, int32x2_t b); -#define vabd_s32(a, b) __builtin_mpl_vector_abd_v2i32(a, b) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddw_u16( + uint32x4_t a, uint16x4_t b) { + return __builtin_mpl_vector_addw_low_v4u16(a, b); +} -int32x4_t __builtin_mpl_vector_abdq_v4i32(int32x4_t a, int32x4_t b); -#define vabdq_s32(a, b) __builtin_mpl_vector_abdq_v4i32(a, b) +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddw_u32( + uint64x2_t a, uint32x2_t b) { + return __builtin_mpl_vector_addw_low_v2u32(a, b); +} -uint8x8_t __builtin_mpl_vector_abd_v8u8(uint8x8_t a, uint8x8_t b); -#define vabd_u8(a, b) __builtin_mpl_vector_abd_v8u8(a, b) +// vaddw_high +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddw_high_s8( + int16x8_t a, int8x16_t b) { + return __builtin_mpl_vector_addw_high_v8i8(a, b); +} -uint8x16_t __builtin_mpl_vector_abdq_v16u8(uint8x16_t a, uint8x16_t b); -#define vabdq_u8(a, b) __builtin_mpl_vector_abdq_v16u8(a, b) +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddw_high_s16( + int32x4_t a, int16x8_t b) { + return __builtin_mpl_vector_addw_high_v4i16(a, b); +} -uint16x4_t __builtin_mpl_vector_abd_v4u16(uint16x4_t a, uint16x4_t b); -#define vabd_u16(a, b) __builtin_mpl_vector_abd_v4u16(a, b) +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddw_high_s32( + int64x2_t a, int32x4_t b) { + return __builtin_mpl_vector_addw_high_v2i32(a, b); +} -uint16x8_t __builtin_mpl_vector_abdq_v8u16(uint16x8_t a, uint16x8_t b); -#define vabdq_u16(a, b) __builtin_mpl_vector_abdq_v8u16(a, b) +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddw_high_u8( + uint16x8_t a, uint8x16_t b) { + return __builtin_mpl_vector_addw_high_v8u8(a, b); +} -uint32x2_t __builtin_mpl_vector_abd_v2u32(uint32x2_t a, uint32x2_t b); -#define vabd_u32(a, b) __builtin_mpl_vector_abd_v2u32(a, b) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddw_high_u16( + uint32x4_t a, uint16x8_t b) { + return __builtin_mpl_vector_addw_high_v4u16(a, b); +} -uint32x4_t __builtin_mpl_vector_abdq_v4u32(uint32x4_t a, uint32x4_t b); -#define vabdq_u32(a, b) __builtin_mpl_vector_abdq_v4u32(a, b) +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddw_high_u32( + uint64x2_t a, uint32x4_t b) { + return __builtin_mpl_vector_addw_high_v2u32(a, b); +} -int8x8_t __builtin_mpl_vector_max_v8i8(int8x8_t a, int8x8_t b); -#define vmax_s8(a, b) __builtin_mpl_vector_max_v8i8(a, b) +// vadd +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vadd_s8( + int8x8_t a, int8x8_t b) { + return a + b; +} -int8x16_t __builtin_mpl_vector_maxq_v16i8(int8x16_t a, int8x16_t b); -#define vmaxq_s8(a, b) __builtin_mpl_vector_maxq_v16i8(a, b) +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vadd_s16( + int16x4_t a, int16x4_t b) { + return a + b; +} -int16x4_t __builtin_mpl_vector_max_v4i16(int16x4_t a, int16x4_t b); -#define vmax_s16(a, b) __builtin_mpl_vector_max_v4i16(a, b) +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vadd_s32( + int32x2_t a, int32x2_t b) { + return a + b; +} -int16x8_t __builtin_mpl_vector_maxq_v8i16(int16x8_t a, int16x8_t b); -#define vmaxq_s16(a, b) __builtin_mpl_vector_maxq_v8i16(a, b) +extern inline int64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vadd_s64( + int64x1_t a, int64x1_t b) { + return a + b; +} -int32x2_t __builtin_mpl_vector_max_v2i32(int32x2_t a, int32x2_t b); -#define vmax_s32(a, b) __builtin_mpl_vector_max_v2i32(a, b) -int32x4_t __builtin_mpl_vector_maxq_v4i32(int32x4_t a, int32x4_t b); -#define vmaxq_s32(a, b) __builtin_mpl_vector_maxq_v4i32(a, b) +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vadd_u8( + uint8x8_t a, uint8x8_t b) { + return a + b; +} -uint8x8_t __builtin_mpl_vector_max_v8u8(uint8x8_t a, uint8x8_t b); -#define vmax_u8(a, b) __builtin_mpl_vector_max_v8u8(a, b) +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vadd_u16( + uint16x4_t a, uint16x4_t b) { + return a + b; +} -uint8x16_t __builtin_mpl_vector_maxq_v16u8(uint8x16_t a, uint8x16_t b); -#define vmaxq_u8(a, b) __builtin_mpl_vector_maxq_v16u8(a, b) +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vadd_u32( + uint32x2_t a, uint32x2_t b) { + return a + b; +} -uint16x4_t __builtin_mpl_vector_max_v4u16(uint16x4_t a, uint16x4_t b); -#define vmax_u16(a, b) __builtin_mpl_vector_max_v4u16(a, b) +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vadd_u64( + uint64x1_t a, uint64x1_t b) { + return a + b; +} -uint16x8_t __builtin_mpl_vector_maxq_v8u16(uint16x8_t a, uint16x8_t b); -#define vmaxq_u16(a, b) __builtin_mpl_vector_maxq_v8u16(a, b) +extern inline float32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vadd_f32( + float32x2_t a, float32x2_t b) { + return a + b; +} -uint32x2_t __builtin_mpl_vector_max_v2u32(uint32x2_t a, uint32x2_t b); -#define vmax_u32(a, b) __builtin_mpl_vector_max_v2u32(a, b) +extern inline float64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vadd_f64( + float64x1_t a, float64x1_t b) { + return a + b; +} -uint32x4_t __builtin_mpl_vector_maxq_v4u32(uint32x4_t a, uint32x4_t b); -#define vmaxq_u32(a, b) __builtin_mpl_vector_maxq_v4u32(a, b) +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddq_s8( + int8x16_t a, int8x16_t b) { + return a + b; +} -int8x8_t __builtin_mpl_vector_min_v8i8(int8x8_t a, int8x8_t b); -#define vmin_s8(a, b) __builtin_mpl_vector_min_v8i8(a, b) +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddq_s16( + int16x8_t a, int16x8_t b) { + return a + b; +} -int8x16_t __builtin_mpl_vector_minq_v16i8(int8x16_t a, int8x16_t b); -#define vminq_s8(a, b) __builtin_mpl_vector_minq_v16i8(a, b) +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddq_s32( + int32x4_t a, int32x4_t b) { + return a + b; +} -int16x4_t __builtin_mpl_vector_min_v4i16(int16x4_t a, int16x4_t b); -#define vmin_s16(a, b) __builtin_mpl_vector_min_v4i16(a, b) +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddq_s64( + int64x2_t a, int64x2_t b) { + return a + b; +} -int16x8_t __builtin_mpl_vector_minq_v8i16(int16x8_t a, int16x8_t b); -#define vminq_s16(a, b) __builtin_mpl_vector_minq_v8i16(a, b) +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddq_u8( + uint8x16_t a, uint8x16_t b) { + return a + b; +} -int32x2_t __builtin_mpl_vector_min_v2i32(int32x2_t a, int32x2_t b); -#define vmin_s32(a, b) __builtin_mpl_vector_min_v2i32(a, b) +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddq_u16( + uint16x8_t a, uint16x8_t b) { + return a + b; +} -int32x4_t __builtin_mpl_vector_minq_v4i32(int32x4_t a, int32x4_t b); -#define vminq_s32(a, b) __builtin_mpl_vector_minq_v4i32(a, b) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddq_u32( + uint32x4_t a, uint32x4_t b) { + return a + b; +} -uint8x8_t __builtin_mpl_vector_min_v8u8(uint8x8_t a, uint8x8_t b); -#define vmin_u8(a, b) __builtin_mpl_vector_min_v8u8(a, b) +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddq_u64( + uint64x2_t a, uint64x2_t b) { + return a + b; +} -uint8x16_t __builtin_mpl_vector_minq_v16u8(uint8x16_t a, uint8x16_t b); -#define vminq_u8(a, b) __builtin_mpl_vector_minq_v16u8(a, b) +extern inline float32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddq_f32( + float32x4_t a, float32x4_t b) { + return a + b; +} -uint16x4_t __builtin_mpl_vector_min_v4u16(uint16x4_t a, uint16x4_t b); -#define vmin_u16(a, b) __builtin_mpl_vector_min_v4u16(a, b) +extern inline float64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddq_f64( + float64x2_t a, float64x2_t b) { + return a + b; +} -uint16x8_t __builtin_mpl_vector_minq_v8u16(uint16x8_t a, uint16x8_t b); -#define vminq_u16(a, b) __builtin_mpl_vector_minq_v8u16(a, b) +extern inline int64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddd_s64( + int64_t a, int64_t b) { + return a + b; +} -uint32x2_t __builtin_mpl_vector_min_v2u32(uint32x2_t a, uint32x2_t b); -#define vmin_u32(a, b) __builtin_mpl_vector_min_v2u32(a, b) +extern inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddd_u64( + uint64_t a, uint64_t b) { + return a + b; +} -uint32x4_t __builtin_mpl_vector_minq_v4u32(uint32x4_t a, uint32x4_t b); -#define vminq_u32(a, b) __builtin_mpl_vector_minq_v4u32(a, b) +// vand +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vand_s8( + int8x8_t a, int8x8_t b) { + return a & b; +} -uint32x2_t __builtin_mpl_vector_recpe_v2u32(uint32x2_t a); -#define vrecpe_u32(a) __builtin_mpl_vector_recpe_v2u32(a) +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vandq_s8( + int8x16_t a, int8x16_t b) { + return a & b; +} -uint32x4_t __builtin_mpl_vector_recpeq_v4u32(uint32x4_t a); -#define vrecpeq_u32(a) __builtin_mpl_vector_recpeq_v4u32(a) +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vand_s16( + int16x4_t a, int16x4_t b) { + return a & b; +} -int8x8_t __builtin_mpl_vector_padd_v8i8(int8x8_t a, int8x8_t b); -#define vpadd_s8(a, b) __builtin_mpl_vector_padd_v8i8(a, b) +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vandq_s16( + int16x8_t a, int16x8_t b) { + return a & b; +} -int16x4_t __builtin_mpl_vector_padd_v4i16(int16x4_t a, int16x4_t b); -#define vpadd_s16(a, b) __builtin_mpl_vector_padd_v4i16(a, b) +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vand_s32( + int32x2_t a, int32x2_t b) { + return a & b; +} -int32x2_t __builtin_mpl_vector_padd_v2i32(int32x2_t a, int32x2_t b); -#define vpadd_s32(a, b) __builtin_mpl_vector_padd_v2i32(a, b) +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vandq_s32( + int32x4_t a, int32x4_t b) { + return a & b; +} -uint8x8_t __builtin_mpl_vector_padd_v8u8(uint8x8_t a, uint8x8_t b); -#define vpadd_u8(a, b) __builtin_mpl_vector_padd_v8u8(a, b) +extern inline int64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vand_s64( + int64x1_t a, int64x1_t b) { + return a & b; +} -uint16x4_t __builtin_mpl_vector_padd_v4u16(uint16x4_t a, uint16x4_t b); -#define vpadd_u16(a, b) __builtin_mpl_vector_padd_v4u16(a, b) +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vandq_s64( + int64x2_t a, int64x2_t b) { + return a & b; +} -uint32x2_t __builtin_mpl_vector_padd_v2u32(uint32x2_t a, uint32x2_t b); -#define vpadd_u32(a, b) __builtin_mpl_vector_padd_v2u32(a, b) +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vand_u8( + uint8x8_t a, uint8x8_t b) { + return a & b; +} -int8x16_t __builtin_mpl_vector_paddq_v16i8(int8x16_t a, int8x16_t b); -#define vpaddq_s8(a, b) __builtin_mpl_vector_paddq_v16i8(a, b) +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vandq_u8( + uint8x16_t a, uint8x16_t b) { + return a & b; +} -int16x8_t __builtin_mpl_vector_paddq_v8i16(int16x8_t a, int16x8_t b); -#define vpaddq_s16(a, b) __builtin_mpl_vector_paddq_v8i16(a, b) +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vand_u16( + uint16x4_t a, uint16x4_t b) { + return a & b; +} -int32x4_t __builtin_mpl_vector_paddq_v4i32(int32x4_t a, int32x4_t b); -#define vpaddq_s32(a, b) __builtin_mpl_vector_paddq_v4i32(a, b) +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vandq_u16( + uint16x8_t a, uint16x8_t b) { + return a & b; +} -int64x2_t __builtin_mpl_vector_paddq_v2i64(int64x2_t a, int64x2_t b); -#define vpaddq_s64(a, b) __builtin_mpl_vector_paddq_v2i64(a, b) +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vand_u32( + uint32x2_t a, uint32x2_t b) { + return a & b; +} -uint8x16_t __builtin_mpl_vector_paddq_v16u8(uint8x16_t a, uint8x16_t b); -#define vpaddq_u8(a, b) __builtin_mpl_vector_paddq_v16u8(a, b) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vandq_u32( + uint32x4_t a, uint32x4_t b) { + return a & b; +} -uint16x8_t __builtin_mpl_vector_paddq_v8u16(uint16x8_t a, uint16x8_t b); -#define vpaddq_u16(a, b) __builtin_mpl_vector_paddq_v8u16(a, b) +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vand_u64( + uint64x1_t a, uint64x1_t b) { + return a & b; +} -uint32x4_t __builtin_mpl_vector_paddq_v4u32(uint32x4_t a, uint32x4_t b); -#define vpaddq_u32(a, b) __builtin_mpl_vector_paddq_v4u32(a, b) +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vandq_u64( + uint64x2_t a, uint64x2_t b) { + return a & b; +} -uint64x2_t __builtin_mpl_vector_paddq_v2u64(uint64x2_t a, uint64x2_t b); -#define vpaddq_u64(a, b) __builtin_mpl_vector_paddq_v2u64(a, b) +// vand +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vorr_s8( + int8x8_t a, int8x8_t b) { + return a | b; +} -int64x1_t __builtin_mpl_vector_paddd_v2i64(int64x2_t a); -#define vpaddd_s64(a) (vget_lane_s64(__builtin_mpl_vector_paddd_v2i64(a), 0)) +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vorrq_s8( + int8x16_t a, int8x16_t b) { + return a | b; +} -uint64x1_t __builtin_mpl_vector_paddd_v2u64(uint64x2_t a); -#define vpaddd_u64(a) (vget_lane_u64(__builtin_mpl_vector_paddd_v2u64(a), 0)) +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vorr_s16( + int16x4_t a, int16x4_t b) { + return a | b; +} -int8x8_t __builtin_mpl_vector_pmax_v8i8(int8x8_t a, int8x8_t b); -#define vpmax_s8(a, b) __builtin_mpl_vector_pmax_v8i8(a, b) +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vorrq_s16( + int16x8_t a, int16x8_t b) { + return a | b; +} -int16x4_t __builtin_mpl_vector_pmax_v4i16(int16x4_t a, int16x4_t b); -#define vpmax_s16(a, b) __builtin_mpl_vector_pmax_v4i16(a, b) +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vorr_s32( + int32x2_t a, int32x2_t b) { + return a | b; +} -int32x2_t __builtin_mpl_vector_pmax_v2i32(int32x2_t a, int32x2_t b); -#define vpmax_s32(a, b) __builtin_mpl_vector_pmax_v2i32(a, b) +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vorrq_s32( + int32x4_t a, int32x4_t b) { + return a | b; +} -uint8x8_t __builtin_mpl_vector_pmax_v8u8(uint8x8_t a, uint8x8_t b); -#define vpmax_u8(a, b) __builtin_mpl_vector_pmax_v8u8(a, b) +extern inline int64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vorr_s64( + int64x1_t a, int64x1_t b) { + return a | b; +} -uint16x4_t __builtin_mpl_vector_pmax_v4u16(uint16x4_t a, uint16x4_t b); -#define vpmax_u16(a, b) __builtin_mpl_vector_pmax_v4u16(a, b) +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vorrq_s64( + int64x2_t a, int64x2_t b) { + return a | b; +} -uint32x2_t __builtin_mpl_vector_pmax_v2u32(uint32x2_t a, uint32x2_t b); -#define vpmax_u32(a, b) __builtin_mpl_vector_pmax_v2u32(a, b) +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vorr_u8( + uint8x8_t a, uint8x8_t b) { + return a | b; +} -int8x16_t __builtin_mpl_vector_pmaxq_v16i8(int8x16_t a, int8x16_t b); -#define vpmaxq_s8(a, b) __builtin_mpl_vector_pmaxq_v16i8(a, b) +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vorrq_u8( + uint8x16_t a, uint8x16_t b) { + return a | b; +} -int16x8_t __builtin_mpl_vector_pmaxq_v8i16(int16x8_t a, int16x8_t b); -#define vpmaxq_s16(a, b) __builtin_mpl_vector_pmaxq_v8i16(a, b) +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vorr_u16( + uint16x4_t a, uint16x4_t b) { + return a | b; +} -int32x4_t __builtin_mpl_vector_pmaxq_v4i32(int32x4_t a, int32x4_t b); -#define vpmaxq_s32(a, b) __builtin_mpl_vector_pmaxq_v4i32(a, b) +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vorrq_u16( + uint16x8_t a, uint16x8_t b) { + return a | b; +} -uint8x16_t __builtin_mpl_vector_pmaxq_v16u8(uint8x16_t a, uint8x16_t b); -#define vpmaxq_u8(a, b) __builtin_mpl_vector_pmaxq_v16u8(a, b) +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vorr_u32( + uint32x2_t a, uint32x2_t b) { + return a | b; +} -uint16x8_t __builtin_mpl_vector_pmaxq_v8u16(uint16x8_t a, uint16x8_t b); -#define vpmaxq_u16(a, b) __builtin_mpl_vector_pmaxq_v8u16(a, b) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vorrq_u32( + uint32x4_t a, uint32x4_t b) { + return a | b; +} -uint32x4_t __builtin_mpl_vector_pmaxq_v4u32(uint32x4_t a, uint32x4_t b); -#define vpmaxq_u32(a, b) __builtin_mpl_vector_pmaxq_v4u32(a, b) +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vorr_u64( + uint64x1_t a, uint64x1_t b) { + return a | b; +} -int8x8_t __builtin_mpl_vector_pmin_v8i8(int8x8_t a, int8x8_t b); -#define vpmin_s8(a, b) __builtin_mpl_vector_pmin_v8i8(a, b) +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vorrq_u64( + uint64x2_t a, uint64x2_t b) { + return a | b; +} -int16x4_t __builtin_mpl_vector_pmin_v4i16(int16x4_t a, int16x4_t b); -#define vpmin_s16(a, b) __builtin_mpl_vector_pmin_v4i16(a, b) +// vdup +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdup_n_s8( + int8_t value) { + return __builtin_mpl_vector_from_scalar_v8i8(value); +} -int32x2_t __builtin_mpl_vector_pmin_v2i32(int32x2_t a, int32x2_t b); -#define vpmin_s32(a, b) __builtin_mpl_vector_pmin_v2i32(a, b) +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdupq_n_s8( + int8_t value) { + return __builtin_mpl_vector_from_scalar_v16i8(value); +} -uint8x8_t __builtin_mpl_vector_pmin_v8u8(uint8x8_t a, uint8x8_t b); -#define vpmin_u8(a, b) __builtin_mpl_vector_pmin_v8u8(a, b) +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdup_n_s16( + int16_t value) { + return __builtin_mpl_vector_from_scalar_v4i16(value); +} -uint16x4_t __builtin_mpl_vector_pmin_v4u16(uint16x4_t a, uint16x4_t b); -#define vpmin_u16(a, b) __builtin_mpl_vector_pmin_v4u16(a, b) +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdupq_n_s16( + int16_t value) { + return __builtin_mpl_vector_from_scalar_v8i16(value); +} -uint32x2_t __builtin_mpl_vector_pmin_v2u32(uint32x2_t a, uint32x2_t b); -#define vpmin_u32(a, b) __builtin_mpl_vector_pmin_v2u32(a, b) +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdup_n_s32( + int32_t value) { + return __builtin_mpl_vector_from_scalar_v2i32(value); +} -int8x16_t __builtin_mpl_vector_pminq_v16i8(int8x16_t a, int8x16_t b); -#define vpminq_s8(a, b) __builtin_mpl_vector_pminq_v16i8(a, b) +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdupq_n_s32( + int32_t value) { + return __builtin_mpl_vector_from_scalar_v4i32(value); +} -int16x8_t __builtin_mpl_vector_pminq_v8i16(int16x8_t a, int16x8_t b); -#define vpminq_s16(a, b) __builtin_mpl_vector_pminq_v8i16(a, b) +extern inline int64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdup_n_s64( + int64_t value) { + return __builtin_mpl_vector_from_scalar_v1i64(value); +} -int32x4_t __builtin_mpl_vector_pminq_v4i32(int32x4_t a, int32x4_t b); -#define vpminq_s32(a, b) __builtin_mpl_vector_pminq_v4i32(a, b) +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdupq_n_s64( + int64_t value) { + return __builtin_mpl_vector_from_scalar_v2i64(value); +} -uint8x16_t __builtin_mpl_vector_pminq_v16u8(uint8x16_t a, uint8x16_t b); -#define vpminq_u8(a, b) __builtin_mpl_vector_pminq_v16u8(a, b) +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdup_n_u8( + uint8_t value) { + return __builtin_mpl_vector_from_scalar_v8u8(value); +} -uint16x8_t __builtin_mpl_vector_pminq_v8u16(uint16x8_t a, uint16x8_t b); -#define vpminq_u16(a, b) __builtin_mpl_vector_pminq_v8u16(a, b) +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdupq_n_u8( + uint8_t value) { + return __builtin_mpl_vector_from_scalar_v16u8(value); +} -uint32x4_t __builtin_mpl_vector_pminq_v4u32(uint32x4_t a, uint32x4_t b); -#define vpminq_u32(a, b) __builtin_mpl_vector_pminq_v4u32(a, b) +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdup_n_u16( + uint16_t value) { + return __builtin_mpl_vector_from_scalar_v4u16(value); +} -int8x8_t __builtin_mpl_vector_maxv_v8i8(int8x8_t a); -#define vmaxv_s8(a) vget_lane_s8(__builtin_mpl_vector_maxv_v8i8(a), 0) +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdupq_n_u16( + uint16_t value) { + return __builtin_mpl_vector_from_scalar_v8u16(value); +} -int8x16_t __builtin_mpl_vector_maxvq_v16i8(int8x16_t a); -#define vmaxvq_s8(a) vgetq_lane_s8(__builtin_mpl_vector_maxvq_v16i8(a), 0) +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdup_n_u32( + uint32_t value) { + return __builtin_mpl_vector_from_scalar_v2u32(value); +} -int16x4_t __builtin_mpl_vector_maxv_v4i16(int16x4_t a); -#define vmaxv_s16(a) vget_lane_s16(__builtin_mpl_vector_maxv_v4i16(a), 0) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdupq_n_u32( + uint32_t value) { + return __builtin_mpl_vector_from_scalar_v4u32(value); +} -int16x8_t __builtin_mpl_vector_maxvq_v8i16(int16x8_t a); -#define vmaxvq_s16(a) vgetq_lane_s16(__builtin_mpl_vector_maxvq_v8i16(a), 0) +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdup_n_u64( + uint64_t value) { + return __builtin_mpl_vector_from_scalar_v1u64(value); +} -int32x2_t __builtin_mpl_vector_maxv_v2i32(int32x2_t a); -#define vmaxv_s32(a) vget_lane_s32(__builtin_mpl_vector_maxv_v2i32(a), 0) +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdupq_n_u64( + uint64_t value) { + return __builtin_mpl_vector_from_scalar_v2u64(value); +} -int32x4_t __builtin_mpl_vector_maxvq_v4i32(int32x4_t a); -#define vmaxvq_s32(a) vgetq_lane_s32(__builtin_mpl_vector_maxvq_v4i32(a), 0) +extern inline float32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdup_n_f32( + float32_t value) { + return __builtin_mpl_vector_from_scalar_v2f32(value); +} -uint8x8_t __builtin_mpl_vector_maxv_v8u8(uint8x8_t a); -#define vmaxv_u8(a) vget_lane_u8(__builtin_mpl_vector_maxv_v8u8(a), 0) +extern inline float64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdup_n_f64( + float64_t value) { + return __builtin_mpl_vector_from_scalar_v1f64(value); +} -uint8x16_t __builtin_mpl_vector_maxvq_v16u8(uint8x16_t a); -#define vmaxvq_u8(a) vgetq_lane_u8(__builtin_mpl_vector_maxvq_v16u8(a), 0) +extern inline float32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdupq_n_f32( + float32_t value) { + return __builtin_mpl_vector_from_scalar_v4f32(value); +} -uint16x4_t __builtin_mpl_vector_maxv_v4u16(uint16x4_t a); -#define vmaxv_u16(a) vget_lane_u16(__builtin_mpl_vector_maxv_v4u16(a), 0) +extern inline float64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdupq_n_f64( + float64_t value) { + return __builtin_mpl_vector_from_scalar_v2f64(value); +} -uint16x8_t __builtin_mpl_vector_maxvq_v8u16(uint16x8_t a); -#define vmaxvq_u16(a) vgetq_lane_u16(__builtin_mpl_vector_maxvq_v8u16(a), 0) +// vceq +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vceq_s8( + int8x8_t a, int8x8_t b) { + return a == b; +} -uint32x2_t __builtin_mpl_vector_maxv_v2u32(uint32x2_t a); -#define vmaxv_u32(a) vget_lane_u32(__builtin_mpl_vector_maxv_v2u32(a), 0) +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vceqq_s8( + int8x16_t a, int8x16_t b) { + return a == b; +} -uint32x4_t __builtin_mpl_vector_maxvq_v4u32(uint32x4_t a); -#define vmaxvq_u32(a) vgetq_lane_u32(__builtin_mpl_vector_maxvq_v4u32(a), 0) +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vceq_s16( + int16x4_t a, int16x4_t b) { + return a == b; +} -int8x8_t __builtin_mpl_vector_minv_v8i8(int8x8_t a); -#define vminv_s8(a) vget_lane_s8(__builtin_mpl_vector_minv_v8i8(a), 0) +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vceqq_s16( + int16x8_t a, int16x8_t b) { + return a == b; +} -int8x16_t __builtin_mpl_vector_minvq_v16i8(int8x16_t a); -#define vminvq_s8(a) vgetq_lane_s8(__builtin_mpl_vector_minvq_v16i8(a), 0) +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vceq_s32( + int32x2_t a, int32x2_t b) { + return a == b; +} -int16x4_t __builtin_mpl_vector_minv_v4i16(int16x4_t a); -#define vminv_s16(a) vget_lane_s16(__builtin_mpl_vector_minv_v4i16(a), 0) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vceqq_s32( + int32x4_t a, int32x4_t b) { + return a == b; +} -int16x8_t __builtin_mpl_vector_minvq_v8i16(int16x8_t a); -#define vminvq_s16(a) vgetq_lane_s16(__builtin_mpl_vector_minvq_v8i16(a), 0) +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vceq_u8( + uint8x8_t a, uint8x8_t b) { + return a == b; +} -int32x2_t __builtin_mpl_vector_minv_v2i32(int32x2_t a); -#define vminv_s32(a) vget_lane_s32(__builtin_mpl_vector_minv_v2i32(a), 0) +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vceqq_u8( + uint8x16_t a, uint8x16_t b) { + return a == b; +} -int32x4_t __builtin_mpl_vector_minvq_v4i32(int32x4_t a); -#define vminvq_s32(a) vgetq_lane_s32(__builtin_mpl_vector_minvq_v4i32(a), 0) +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vceq_u16( + uint16x4_t a, uint16x4_t b) { + return a == b; +} -uint8x8_t __builtin_mpl_vector_minv_v8u8(uint8x8_t a); -#define vminv_u8(a) vget_lane_u8(__builtin_mpl_vector_minv_v8u8(a), 0) +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vceqq_u16( + uint16x8_t a, uint16x8_t b) { + return a == b; +} -uint8x16_t __builtin_mpl_vector_minvq_v16u8(uint8x16_t a); -#define vminvq_u8(a) vgetq_lane_u8(__builtin_mpl_vector_minvq_v16u8(a), 0) +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vceq_u32( + uint32x2_t a, uint32x2_t b) { + return a == b; +} -uint16x4_t __builtin_mpl_vector_minv_v4u16(uint16x4_t a); -#define vminv_u16(a) vget_lane_u16(__builtin_mpl_vector_minv_v4u16(a), 0) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vceqq_u32( + uint32x4_t a, uint32x4_t b) { + return a == b; +} -uint16x8_t __builtin_mpl_vector_minvq_v8u16(uint16x8_t a); -#define vminvq_u16(a) vgetq_lane_u16(__builtin_mpl_vector_minvq_v8u16(a), 0) +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vceq_s64( + int64x1_t a, int64x1_t b) { + return a == b; +} -uint32x2_t __builtin_mpl_vector_minv_v2u32(uint32x2_t a); -#define vminv_u32(a) vget_lane_u32(__builtin_mpl_vector_minv_v2u32(a), 0) +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vceqq_s64( + int64x2_t a, int64x2_t b) { + return a == b; +} -uint32x4_t __builtin_mpl_vector_minvq_v4u32(uint32x4_t a); -#define vminvq_u32(a) vgetq_lane_u32(__builtin_mpl_vector_minvq_v4u32(a), 0) +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vceq_u64( + uint64x1_t a, uint64x1_t b) { + return a == b; +} -uint8x8_t __builtin_mpl_vector_tst_v8i8(int8x8_t a, int8x8_t b); -#define vtst_s8(a, b) __builtin_mpl_vector_tst_v8i8(a, b) +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vceqq_u64( + uint64x2_t a, uint64x2_t b) { + return a == b; +} -uint8x16_t __builtin_mpl_vector_tstq_v16i8(int8x16_t a, int8x16_t b); -#define vtstq_s8(a, b) __builtin_mpl_vector_tstq_v16i8(a, b) +extern inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vceqd_s64( + int64_t a, int64_t b) { + return (a == b) ? -1LL : 0LL; +} -uint16x4_t __builtin_mpl_vector_tst_v4i16(int16x4_t a, int16x4_t b); -#define vtst_s16(a, b) __builtin_mpl_vector_tst_v4i16(a, b) +extern inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vceqd_u64( + uint64_t a, uint64_t b) { + return (a == b) ? -1LL : 0LL; +} -uint16x8_t __builtin_mpl_vector_tstq_v8i16(int16x8_t a, int16x8_t b); -#define vtstq_s16(a, b) __builtin_mpl_vector_tstq_v8i16(a, b) +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vceq_f32( + float32x2_t a, float32x2_t b) { + return a == b; +} -uint32x2_t __builtin_mpl_vector_tst_v2i32(int32x2_t a, int32x2_t b); -#define vtst_s32(a, b) __builtin_mpl_vector_tst_v2i32(a, b) +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vceq_f64( + float64x1_t a, float64x1_t b) { + return a == b; +} -uint32x4_t __builtin_mpl_vector_tstq_v4i32(int32x4_t a, int32x4_t b); -#define vtstq_s32(a, b) __builtin_mpl_vector_tstq_v4i32(a, b) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vceqq_f32( + float32x4_t a, float32x4_t b) { + return a == b; +} -uint8x8_t __builtin_mpl_vector_tst_v8u8(uint8x8_t a, uint8x8_t b); -#define vtst_u8(a, b) __builtin_mpl_vector_tst_v8u8(a, b) +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vceqq_f64( + float64x2_t a, float64x2_t b) { + return a == b; +} -uint8x16_t __builtin_mpl_vector_tstq_v16u8(uint8x16_t a, uint8x16_t b); -#define vtstq_u8(a, b) __builtin_mpl_vector_tstq_v16u8(a, b) +// vceqz +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vceqz_s8(int8x8_t a) { + return a == 0; +} -uint16x4_t __builtin_mpl_vector_tst_v4u16(uint16x4_t a, uint16x4_t b); -#define vtst_u16(a, b) __builtin_mpl_vector_tst_v4u16(a, b) +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vceqzq_s8( + int8x16_t a) { + return a == 0; +} -uint16x8_t __builtin_mpl_vector_tstq_v8u16(uint16x8_t a, uint16x8_t b); -#define vtstq_u16(a, b) __builtin_mpl_vector_tstq_v8u16(a, b) +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vceqz_s16( + int16x4_t a) { + return a == 0; +} -uint32x2_t __builtin_mpl_vector_tst_v2u32(uint32x2_t a, uint32x2_t b); -#define vtst_u32(a, b) __builtin_mpl_vector_tst_v2u32(a, b) +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vceqzq_s16( + int16x8_t a) { + return a == 0; +} -uint32x4_t __builtin_mpl_vector_tstq_v4u32(uint32x4_t a, uint32x4_t b); -#define vtstq_u32(a, b) __builtin_mpl_vector_tstq_v4u32(a, b) +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vceqz_s32( + int32x2_t a) { + return a == 0; +} -uint64x1_t __builtin_mpl_vector_tst_v1i64(int64x1_t a, int64x1_t b); -#define vtst_s64(a, b) __builtin_mpl_vector_tst_v1i64(a, b) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vceqzq_s32( + int32x4_t a) { + return a == 0; +} -uint64x2_t __builtin_mpl_vector_tstq_v2i64(int64x2_t a, int64x2_t b); -#define vtstq_s64(a, b) __builtin_mpl_vector_tstq_v2i64(a, b) +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vceqz_u8(uint8x8_t a) { + return a == 0; +} -uint64x1_t __builtin_mpl_vector_tst_v1u64(uint64x1_t a, uint64x1_t b); -#define vtst_u64(a, b) __builtin_mpl_vector_tst_v1u64(a, b) +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vceqzq_u8( + uint8x16_t a) { + return a == 0; +} -uint64x2_t __builtin_mpl_vector_tstq_v2u64(uint64x2_t a, uint64x2_t b); -#define vtstq_u64(a, b) __builtin_mpl_vector_tstq_v2u64(a, b) +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vceqz_u16( + uint16x4_t a) { + return a == 0; +} -#define vtstd_s64(a, b) ((a & b) ? -1ll : 0ll) +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vceqzq_u16( + uint16x8_t a) { + return a == 0; +} -#define vtstd_u64(a, b) ((a & b) ? -1ll : 0ll) +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vceqz_u32( + uint32x2_t a) { + return a == 0; +} -int8x8_t __builtin_mpl_vector_qmovnh_i16(int16x4_t a); -#define vqmovnh_s16(a) vget_lane_s8( \ - __builtin_mpl_vector_qmovnh_i16(__builtin_mpl_vector_from_scalar_v4i16(a)), 0) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vceqzq_u32( + uint32x4_t a) { + return a == 0; +} -int16x4_t __builtin_mpl_vector_qmovns_i32(int32x2_t a); -#define vqmovns_s32(a) vget_lane_s16( \ - __builtin_mpl_vector_qmovns_i32(__builtin_mpl_vector_from_scalar_v2i32(a)), 0) +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vceqz_s64( + int64x1_t a) { + return a == 0; +} -int32x2_t __builtin_mpl_vector_qmovnd_i64(int64x1_t a); -#define vqmovnd_s64(a) vget_lane_s32( \ - __builtin_mpl_vector_qmovnd_i64(__builtin_mpl_vector_from_scalar_v1i64(a)), 0) +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vceqzq_s64( + int64x2_t a) { + return a == 0; +} -uint8x8_t __builtin_mpl_vector_qmovnh_u16(uint16x4_t a); -#define vqmovnh_u16(a) vget_lane_u8( \ - __builtin_mpl_vector_qmovnh_u16(__builtin_mpl_vector_from_scalar_v4u16(a)), 0) +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vceqz_u64( + uint64x1_t a) { + return a == 0; +} -uint16x4_t __builtin_mpl_vector_qmovns_u32(uint32x2_t a); -#define vqmovns_u32(a) vget_lane_u16( \ - __builtin_mpl_vector_qmovns_u32(__builtin_mpl_vector_from_scalar_v2u32(a)), 0) +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vceqzq_u64( + uint64x2_t a) { + return a == 0; +} -uint32x2_t __builtin_mpl_vector_qmovnd_u64(uint64x1_t a); -#define vqmovnd_u64(a) vget_lane_u32( \ - __builtin_mpl_vector_qmovnd_u64(__builtin_mpl_vector_from_scalar_v1u64(a)), 0) +extern inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vceqzd_s64(int64_t a) { + return (a == 0) ? -1LL : 0LL; +} -int8x16_t __builtin_mpl_vector_qmovn_high_v16i8(int8x8_t a, int16x8_t b); -#define vqmovn_high_s16(a, b) __builtin_mpl_vector_qmovn_high_v16i8(a, b) +extern inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vceqzd_u64(uint64_t a) { + return (a == 0) ? -1LL : 0LL; +} -int16x8_t __builtin_mpl_vector_qmovn_high_v8i16(int16x4_t a, int32x4_t b); -#define vqmovn_high_s32(a, b) __builtin_mpl_vector_qmovn_high_v8i16(a, b) +// vcgt +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcgt_s8( + int8x8_t a, int8x8_t b) { + return a > b; +} -int32x4_t __builtin_mpl_vector_qmovn_high_v4i32(int32x2_t a, int64x2_t b); -#define vqmovn_high_s64(a, b) __builtin_mpl_vector_qmovn_high_v4i32(a, b) +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcgtq_s8( + int8x16_t a, int8x16_t b) { + return a > b; +} -uint8x16_t __builtin_mpl_vector_qmovn_high_v16u8(uint8x8_t a, uint16x8_t b); -#define vqmovn_high_u16(a, b) __builtin_mpl_vector_qmovn_high_v16u8(a, b) +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcgt_s16( + int16x4_t a, int16x4_t b) { + return a > b; +} -uint16x8_t __builtin_mpl_vector_qmovn_high_v8u16(uint16x4_t a, uint32x4_t b); -#define vqmovn_high_u32(a, b) __builtin_mpl_vector_qmovn_high_v8u16(a, b) +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcgtq_s16( + int16x8_t a, int16x8_t b) { + return a > b; +} -uint32x4_t __builtin_mpl_vector_qmovn_high_v4u32(uint32x2_t a, uint64x2_t b); -#define vqmovn_high_u64(a, b) __builtin_mpl_vector_qmovn_high_v4u32(a, b) +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcgt_s32( + int32x2_t a, int32x2_t b) { + return a > b; +} -uint8x8_t __builtin_mpl_vector_qmovun_v8u8(int16x8_t a); -#define vqmovun_s16(a) __builtin_mpl_vector_qmovun_v8u8(a) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcgtq_s32( + int32x4_t a, int32x4_t b) { + return a > b; +} -uint16x4_t __builtin_mpl_vector_qmovun_v4u16(int32x4_t a); -#define vqmovun_s32(a) __builtin_mpl_vector_qmovun_v4u16(a) +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcgt_u8( + uint8x8_t a, uint8x8_t b) { + return a > b; +} -uint32x2_t __builtin_mpl_vector_qmovun_v2u32(int64x2_t a); -#define vqmovun_s64(a) __builtin_mpl_vector_qmovun_v2u32(a) +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcgtq_u8( + uint8x16_t a, uint8x16_t b) { + return a > b; +} -uint8x8_t __builtin_mpl_vector_qmovunh_i16(int16x4_t a); -#define vqmovunh_s16(a) vget_lane_s8( \ - __builtin_mpl_vector_qmovunh_i16(__builtin_mpl_vector_from_scalar_v4i16(a)), 0) +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcgt_u16( + uint16x4_t a, uint16x4_t b) { + return a > b; +} -uint16x4_t __builtin_mpl_vector_qmovuns_i32(int32x2_t a); -#define vqmovuns_s32(a) vget_lane_s16( \ - __builtin_mpl_vector_qmovuns_i32(__builtin_mpl_vector_from_scalar_v2i32(a)), 0) +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcgtq_u16( + uint16x8_t a, uint16x8_t b) { + return a > b; +} -uint32x2_t __builtin_mpl_vector_qmovund_i64(int64x1_t a); -#define vqmovund_s64(a) vget_lane_s32( \ - __builtin_mpl_vector_qmovund_i64(__builtin_mpl_vector_from_scalar_v1i64(a)), 0) +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcgt_u32( + uint32x2_t a, uint32x2_t b) { + return a > b; +} -uint8x16_t __builtin_mpl_vector_qmovun_high_v16u8(uint8x8_t a, int16x8_t b); -#define vqmovun_high_s16(a, b) __builtin_mpl_vector_qmovun_high_v16u8(a, b) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcgtq_u32( + uint32x4_t a, uint32x4_t b) { + return a > b; +} -uint16x8_t __builtin_mpl_vector_qmovun_high_v8u16(uint16x4_t a, int32x4_t b); -#define vqmovun_high_s32(a, b) __builtin_mpl_vector_qmovun_high_v8u16(a, b) +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcgt_s64( + int64x1_t a, int64x1_t b) { + return a > b; +} -uint32x4_t __builtin_mpl_vector_qmovun_high_v4u32(uint32x2_t a, int64x2_t b); -#define vqmovun_high_s64(a, b) __builtin_mpl_vector_qmovun_high_v4u32(a, b) +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcgtq_s64( + int64x2_t a, int64x2_t b) { + return a > b; +} -int16x4_t __builtin_mpl_vector_mul_n_v4i16(int16x4_t a, int16_t b); -#define vmul_n_s16(a, b) (a * (int16x4_t){b, b, b, b}) +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcgt_u64( + uint64x1_t a, uint64x1_t b) { + return a > b; +} -int16x8_t __builtin_mpl_vector_mulq_n_v8i16(int16x8_t a, int16_t b); -#define vmulq_n_s16(a, b) (a * (int16x8_t){b, b, b, b, b, b, b, b}) +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcgtq_u64( + uint64x2_t a, uint64x2_t b) { + return a > b; +} -int32x2_t __builtin_mpl_vector_mul_n_v2i32(int32x2_t a, int32_t b); -#define vmul_n_s32(a, b) (a * (int32x2_t){b, b}) +extern inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcgtd_s64( + int64_t a, int64_t b) { + return (a > b) ? -1LL : 0LL; +} -int32x4_t __builtin_mpl_vector_mulq_n_v4i32(int32x4_t a, int32_t b); -#define vmulq_n_s32(a, b) (a * (int32x4_t){b, b, b, b}) +extern inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcgtd_u64( + uint64_t a, uint64_t b) { + return (a > b) ? -1LL : 0LL; +} -uint16x4_t __builtin_mpl_vector_mul_n_v4u16(uint16x4_t a, uint16_t b); -#define vmul_n_u16(a, b) (a * (uint16x4_t){b, b, b, b}) +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcgt_f32( + float32x2_t a, float32x2_t b) { + return a > b; +} -uint16x8_t __builtin_mpl_vector_mulq_n_v8u16(uint16x8_t a, uint16_t b); -#define vmulq_n_u16(a, b) (a * (uint16x8_t){b, b, b, b, b, b, b, b}) +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcgt_f64( + float64x1_t a, float64x1_t b) { + return a > b; +} -uint32x2_t __builtin_mpl_vector_mul_n_v2u32(uint32x2_t a, uint32_t b); -#define vmul_n_u32(a, b) (a * (uint32x2_t){b, b}) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcgtq_f32( + float32x4_t a, float32x4_t b) { + return a > b; +} -uint32x4_t __builtin_mpl_vector_mulq_n_v4u32(uint32x4_t a, uint32_t b); -#define vmulq_n_u32(a, b) (a * (uint32x4_t){b, b, b, b}) +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcgtq_f64( + float64x2_t a, float64x2_t b) { + return a > b; +} -int16x4_t __builtin_mpl_vector_mul_lane_v4i16(int16x4_t a, int16x4_t b, const int c); -#define vmul_lane_s16(a, b, c) __builtin_mpl_vector_mul_lane_v4i16(a, b, c) +// vcgtz +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcgtz_s8(int8x8_t a) { + return a > 0; +} -int16x8_t __builtin_mpl_vector_mulq_lane_v8i16(int16x8_t a, int16x4_t b, const int c); -#define vmulq_lane_s16(a, b, c) __builtin_mpl_vector_mulq_lane_v8i16(a, b, c) +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcgtzq_s8( + int8x16_t a) { + return a > 0; +} -int32x2_t __builtin_mpl_vector_mul_lane_v2i32(int32x2_t a, int32x2_t b, const int c); -#define vmul_lane_s32(a, b, c) __builtin_mpl_vector_mul_lane_v2i32(a, b, c) +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcgtz_s16( + int16x4_t a) { + return a > 0; +} -int32x4_t __builtin_mpl_vector_mulq_lane_v4i32(int32x4_t a, int32x2_t b, const int c); -#define vmulq_lane_s32(a, b, c) __builtin_mpl_vector_mulq_lane_v4i32(a, b, c) +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcgtzq_s16( + int16x8_t a) { + return a > 0; +} -uint16x4_t __builtin_mpl_vector_mul_lane_v4u16(uint16x4_t a, uint16x4_t b, const int c); -#define vmul_lane_u16(a, b, c) __builtin_mpl_vector_mul_lane_v4u16(a, b, c) +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcgtz_s32( + int32x2_t a) { + return a > 0; +} -uint16x8_t __builtin_mpl_vector_mulq_lane_v8u16(uint16x8_t a, uint16x4_t b, const int c); -#define vmulq_lane_u16(a, b, c) __builtin_mpl_vector_mulq_lane_v8u16(a, b, c) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcgtzq_s32( + int32x4_t a) { + return a > 0; +} -uint32x2_t __builtin_mpl_vector_mul_lane_v2u32(uint32x2_t a, uint32x2_t b, const int c); -#define vmul_lane_u32(a, b, c) __builtin_mpl_vector_mul_lane_v2u32(a, b, c) +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcgtz_s64( + int64x1_t a) { + return a > 0; +} -uint32x4_t __builtin_mpl_vector_mulq_lane_v4u32(uint32x4_t a, uint32x2_t b, const int c); -#define vmulq_lane_u32(a, b, c) __builtin_mpl_vector_mulq_lane_v4u32(a, b, c) +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcgtzq_s64( + int64x2_t a) { + return a > 0; +} -int16x4_t __builtin_mpl_vector_mul_laneq_v4i16(int16x4_t a, int16x8_t b, const int c); -#define vmul_laneq_s16(a, b, c) __builtin_mpl_vector_mul_laneq_v4i16(a, b, c) +extern inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcgtzd_s64(int64_t a) { + return (a > 0) ? -1LL : 0LL; +} -int16x8_t __builtin_mpl_vector_mulq_laneq_v8i16(int16x8_t a, int16x8_t b, const int c); -#define vmulq_laneq_s16(a, b, c) __builtin_mpl_vector_mulq_laneq_v8i16(a, b, c) +// vcge +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcge_s8( + int8x8_t a, int8x8_t b) { + return a >= b; +} -int32x2_t __builtin_mpl_vector_mul_laneq_v2i32(int32x2_t a, int32x4_t b, const int c); -#define vmul_laneq_s32(a, b, c) __builtin_mpl_vector_mul_laneq_v2i32(a, b, c) +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcgeq_s8( + int8x16_t a, int8x16_t b) { + return a >= b; +} -int32x4_t __builtin_mpl_vector_mulq_laneq_v4i32(int32x4_t a, int32x4_t b, const int c); -#define vmulq_laneq_s32(a, b, c) __builtin_mpl_vector_mulq_laneq_v4i32(a, b, c) +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcge_s16( + int16x4_t a, int16x4_t b) { + return a >= b; +} -uint16x4_t __builtin_mpl_vector_mul_laneq_v4u16(uint16x4_t a, uint16x8_t b, const int c); -#define vmul_laneq_u16(a, b, c) __builtin_mpl_vector_mul_laneq_v4u16(a, b, c) +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcgeq_s16( + int16x8_t a, int16x8_t b) { + return a >= b; +} -uint16x8_t __builtin_mpl_vector_mulq_laneq_v8u16(uint16x8_t a, uint16x8_t b, const int c); -#define vmulq_laneq_u16(a, b, c) __builtin_mpl_vector_mulq_laneq_v8u16(a, b, c) +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcge_s32( + int32x2_t a, int32x2_t b) { + return a >= b; +} -uint32x2_t __builtin_mpl_vector_mul_laneq_v2u32(uint32x2_t a, uint32x4_t b, const int c); -#define vmul_laneq_u32(a, b, c) __builtin_mpl_vector_mul_laneq_v2u32(a, b, c) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcgeq_s32( + int32x4_t a, int32x4_t b) { + return a >= b; +} -uint32x4_t __builtin_mpl_vector_mulq_laneq_v4u32(uint32x4_t a, uint32x4_t b, const int c); -#define vmulq_laneq_u32(a, b, c) __builtin_mpl_vector_mulq_laneq_v4u32(a, b, c) +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcge_u8( + uint8x8_t a, uint8x8_t b) { + return a >= b; +} -int32x4_t __builtin_mpl_vector_mull_n_v4i32(int16x4_t a, int16_t b); -#define vmull_n_s16(a, b) (vmull_s16(a, ((int16x4_t){b, b, b, b}))) +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcgeq_u8( + uint8x16_t a, uint8x16_t b) { + return a >= b; +} -int64x2_t __builtin_mpl_vector_mull_n_v2i64(int32x2_t a, int32_t b); -#define vmull_n_s32(a, b) (vmull_s32(a, ((int32x2_t){b, b}))) +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcge_u16( + uint16x4_t a, uint16x4_t b) { + return a >= b; +} -uint32x4_t __builtin_mpl_vector_mull_n_v4u32(uint16x4_t a, uint16_t b); -#define vmull_n_u16(a, b) (vmull_u16(a, ((uint16x4_t){b, b, b, b}))) +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcgeq_u16( + uint16x8_t a, uint16x8_t b) { + return a >= b; +} -uint64x2_t __builtin_mpl_vector_mull_n_v2u64(uint32x2_t a, uint32_t b); -#define vmull_n_u32(a, b) (vmull_u32(a, ((uint32x2_t){b, b}))) +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcge_u32( + uint32x2_t a, uint32x2_t b) { + return a >= b; +} -int32x4_t __builtin_mpl_vector_mull_high_n_v4i32(int16x8_t a, int16_t b); -#define vmull_high_n_s16(a, b) vmull_n_s16((vget_high_s16(a)), b) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcgeq_u32( + uint32x4_t a, uint32x4_t b) { + return a >= b; +} -int64x2_t __builtin_mpl_vector_mull_high_n_v2i64(int32x4_t a, int32_t b); -#define vmull_high_n_s32(a, b) vmull_n_s32((vget_high_s32(a)), b) +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcge_s64( + int64x1_t a, int64x1_t b) { + return a >= b; +} -uint32x4_t __builtin_mpl_vector_mull_high_n_v4u32(uint16x8_t a, uint16_t b); -#define vmull_high_n_u16(a, b) vmull_n_u16((vget_high_u16(a)), b) +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcgeq_s64( + int64x2_t a, int64x2_t b) { + return a >= b; +} -uint64x2_t __builtin_mpl_vector_mull_high_n_v2u64(uint32x4_t a, uint32_t b); -#define vmull_high_n_u32(a, b) vmull_n_u32((vget_high_u32(a)), b) +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcge_u64( + uint64x1_t a, uint64x1_t b) { + return a >= b; +} -int32x4_t __builtin_mpl_vector_mull_lane_v4i32(int16x4_t a, int16x4_t b, const int c); -#define vmull_lane_s16(a, b, c) __builtin_mpl_vector_mull_lane_v4i32(a, b, c) +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcgeq_u64( + uint64x2_t a, uint64x2_t b) { + return a >= b; +} -int64x2_t __builtin_mpl_vector_mull_lane_v2i64(int32x2_t a, int32x2_t b, const int c); -#define vmull_lane_s32(a, b, c) __builtin_mpl_vector_mull_lane_v2i64(a, b, c) +extern inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcged_s64( + int64_t a, int64_t b) { + return (a >= b) ? -1LL : 0LL; +} -uint32x4_t __builtin_mpl_vector_mull_lane_v4u32(uint16x4_t a, uint16x4_t b, const int c); -#define vmull_lane_u16(a, b, c) __builtin_mpl_vector_mull_lane_v4u32(a, b, c) +extern inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcged_u64( + uint64_t a, uint64_t b) { + return (a >= b) ? -1LL : 0LL; +} -uint64x2_t __builtin_mpl_vector_mull_lane_v2u64(uint32x2_t a, uint32x2_t b, const int c); -#define vmull_lane_u32(a, b, c) __builtin_mpl_vector_mull_lane_v2u64(a, b, c) +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcge_f32( + float32x2_t a, float32x2_t b) { + return a >= b; +} -int32x4_t __builtin_mpl_vector_mull_high_lane_v4i32(int16x8_t a, int16x4_t b, const int c); -#define vmull_high_lane_s16(a, b, c) __builtin_mpl_vector_mull_high_lane_v4i32(a, b, c) +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcge_f64( + float64x1_t a, float64x1_t b) { + return a >= b; +} -int64x2_t __builtin_mpl_vector_mull_high_lane_v2i64(int32x4_t a, int32x2_t b, const int c); -#define vmull_high_lane_s32(a, b, c) __builtin_mpl_vector_mull_high_lane_v2i64(a, b, c) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcgeq_f32( + float32x4_t a, float32x4_t b) { + return a >= b; +} -uint32x4_t __builtin_mpl_vector_mull_high_lane_v4u32(uint16x8_t a, uint16x4_t b, const int c); -#define vmull_high_lane_u16(a, b, c) __builtin_mpl_vector_mull_high_lane_v4u32(a, b, c) +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcgeq_f64( + float64x2_t a, float64x2_t b) { + return a >= b; +} -uint64x2_t __builtin_mpl_vector_mull_high_lane_v2u64(uint32x4_t a, uint32x2_t b, const int c); -#define vmull_high_lane_u32(a, b, c) __builtin_mpl_vector_mull_high_lane_v2u64(a, b, c) +// vcgez +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcgez_s8(int8x8_t a) { + return a >= 0; +} -int32x4_t __builtin_mpl_vector_mull_laneq_v4i32(int16x4_t a, int16x8_t b, const int c); -#define vmull_laneq_s16(a, b, c) __builtin_mpl_vector_mull_laneq_v4i32(a, b, c) +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcgezq_s8( + int8x16_t a) { + return a >= 0; +} -int64x2_t __builtin_mpl_vector_mull_laneq_v2i64(int32x2_t a, int32x4_t b, const int c); -#define vmull_laneq_s32(a, b, c) __builtin_mpl_vector_mull_laneq_v2i64(a, b, c) +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcgez_s16( + int16x4_t a) { + return a >= 0; +} -uint32x4_t __builtin_mpl_vector_mull_laneq_v4u32(uint16x4_t a, uint16x8_t b, const int c); -#define vmull_laneq_u16(a, b, c) __builtin_mpl_vector_mull_laneq_v4u32(a, b, c) +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcgezq_s16( + int16x8_t a) { + return a >= 0; +} -uint64x2_t __builtin_mpl_vector_mull_laneq_v2u64(uint32x2_t a, uint32x4_t b, const int c); -#define vmull_laneq_u32(a, b, c) __builtin_mpl_vector_mull_laneq_v2u64(a, b, c) +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcgez_s32( + int32x2_t a) { + return a >= 0; +} -int32x4_t __builtin_mpl_vector_mull_high_laneq_v4i32(int16x8_t a, int16x8_t b, const int c); -#define vmull_high_laneq_s16(a, b, c) __builtin_mpl_vector_mull_high_laneq_v4i32(a, b, c) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcgezq_s32( + int32x4_t a) { + return a >= 0; +} -int64x2_t __builtin_mpl_vector_mull_high_laneq_v2i64(int32x4_t a, int32x4_t b, const int c); -#define vmull_high_laneq_s32(a, b, c) __builtin_mpl_vector_mull_high_laneq_v2i64(a, b, c) +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcgez_s64( + int64x1_t a) { + return a >= 0; +} -uint32x4_t __builtin_mpl_vector_mull_high_laneq_v4u32(uint16x8_t a, uint16x8_t b, const int c); -#define vmull_high_laneq_u16(a, b, c) __builtin_mpl_vector_mull_high_laneq_v4u32(a, b, c) +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcgezq_s64( + int64x2_t a) { + return a >= 0; +} -uint64x2_t __builtin_mpl_vector_mull_high_laneq_v2u64(uint32x4_t a, uint32x4_t b, const int c); -#define vmull_high_laneq_u32(a, b, c) __builtin_mpl_vector_mull_high_laneq_v2u64(a, b, c) +extern inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcgezd_s64(int64_t a) { + return (a >= 0) ? -1LL : 0LL; +} -int8x8_t __builtin_mpl_vector_neg_v8i8(int8x8_t a); -#define vneg_s8(a) __builtin_mpl_vector_neg_v8i8(a) +// vclt +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vclt_s8( + int8x8_t a, int8x8_t b) { + return a < b; +} -int8x16_t __builtin_mpl_vector_negq_v16i8(int8x16_t a); -#define vnegq_s8(a) __builtin_mpl_vector_negq_v16i8(a) +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcltq_s8( + int8x16_t a, int8x16_t b) { + return a < b; +} -int16x4_t __builtin_mpl_vector_neg_v4i16(int16x4_t a); -#define vneg_s16(a) __builtin_mpl_vector_neg_v4i16(a) +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vclt_s16( + int16x4_t a, int16x4_t b) { + return a < b; +} -int16x8_t __builtin_mpl_vector_negq_v8i16(int16x8_t a); -#define vnegq_s16(a) __builtin_mpl_vector_negq_v8i16(a) +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcltq_s16( + int16x8_t a, int16x8_t b) { + return a < b; +} -int32x2_t __builtin_mpl_vector_neg_v2i32(int32x2_t a); -#define vneg_s32(a) __builtin_mpl_vector_neg_v2i32(a) +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vclt_s32( + int32x2_t a, int32x2_t b) { + return a < b; +} -int32x4_t __builtin_mpl_vector_negq_v4i32(int32x4_t a); -#define vnegq_s32(a) __builtin_mpl_vector_negq_v4i32(a) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcltq_s32( + int32x4_t a, int32x4_t b) { + return a < b; +} -int64x1_t __builtin_mpl_vector_neg_v1i64(int64x1_t a); -#define vneg_s64(a) __builtin_mpl_vector_neg_v1i64(a) +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vclt_u8( + uint8x8_t a, uint8x8_t b) { + return a < b; +} -int64_t __builtin_mpl_vector_negd_v1i64(int64_t a); -#define vnegd_s64(a) __builtin_mpl_vector_negd_v1i64(a) +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcltq_u8( + uint8x16_t a, uint8x16_t b) { + return a < b; +} -int64x2_t __builtin_mpl_vector_negq_v2i64(int64x2_t a); -#define vnegq_s64(a) __builtin_mpl_vector_negq_v2i64(a) +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vclt_u16( + uint16x4_t a, uint16x4_t b) { + return a < b; +} -int8x8_t __builtin_mpl_vector_mvn_v8i8(int8x8_t a); -#define vmvn_s8(a) __builtin_mpl_vector_mvn_v8i8(a) +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcltq_u16( + uint16x8_t a, uint16x8_t b) { + return a < b; +} -int8x16_t __builtin_mpl_vector_mvnq_v16i8(int8x16_t a); -#define vmvnq_s8(a) __builtin_mpl_vector_mvnq_v16i8(a) +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vclt_u32( + uint32x2_t a, uint32x2_t b) { + return a < b; +} -int16x4_t __builtin_mpl_vector_mvn_v4i16(int16x4_t a); -#define vmvn_s16(a) ((int8x8_t)__builtin_mpl_vector_mvn_v8i8((int8x8_t)a)) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcltq_u32( + uint32x4_t a, uint32x4_t b) { + return a < b; +} -int16x8_t __builtin_mpl_vector_mvnq_v8i16(int16x8_t a); -#define vmvnq_s16(a) ((int8x16_t)__builtin_mpl_vector_mvnq_v16i8((int8x16_t)a)) +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vclt_s64( + int64x1_t a, int64x1_t b) { + return a < b; +} -int32x2_t __builtin_mpl_vector_mvn_v2i32(int32x2_t a); -#define vmvn_s32(a) ((int8x8_t)__builtin_mpl_vector_mvn_v8i8((int8x8_t)a)) +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcltq_s64( + int64x2_t a, int64x2_t b) { + return a < b; +} -int32x4_t __builtin_mpl_vector_mvnq_v4i32(int32x4_t a); -#define vmvnq_s32(a) ((int8x16_t)__builtin_mpl_vector_mvnq_v16i8((int8x16_t)a)) +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vclt_u64( + uint64x1_t a, uint64x1_t b) { + return a < b; +} -uint8x8_t __builtin_mpl_vector_mvn_v8u8(uint8x8_t a); -#define vmvn_u8(a) __builtin_mpl_vector_mvn_v8u8(a) +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcltq_u64( + uint64x2_t a, uint64x2_t b) { + return a < b; +} -uint8x16_t __builtin_mpl_vector_mvnq_v16u8(uint8x16_t a); -#define vmvnq_u8(a) __builtin_mpl_vector_mvnq_v16u8(a) +extern inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcltd_s64( + int64_t a, int64_t b) { + return (a < b) ? -1LL : 0LL; +} -uint16x4_t __builtin_mpl_vector_mvn_v4u16(uint16x4_t a); -#define vmvn_u16(a) ((uint8x8_t)__builtin_mpl_vector_mvn_v8u8((uint8x8_t)a)) +extern inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcltd_u64( + uint64_t a, uint64_t b) { + return (a < b) ? -1LL : 0LL; +} -uint16x8_t __builtin_mpl_vector_mvnq_v8u16(uint16x8_t a); -#define vmvnq_u16(a) ((uint8x16_t)__builtin_mpl_vector_mvnq_v16u8((uint8x16_t)a)) +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vclt_f32( + float32x2_t a, float32x2_t b) { + return a < b; +} -uint32x2_t __builtin_mpl_vector_mvn_v2u32(uint32x2_t a); -#define vmvn_u32(a) ((uint8x8_t)__builtin_mpl_vector_mvn_v8u8((uint8x8_t)a)) +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vclt_f64( + float64x1_t a, float64x1_t b) { + return a < b; +} -uint32x4_t __builtin_mpl_vector_mvnq_v4u32(uint32x4_t a); -#define vmvnq_u32(a) ((uint8x16_t)__builtin_mpl_vector_mvnq_v16u8((uint8x16_t)a)) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcltq_f32( + float32x4_t a, float32x4_t b) { + return a < b; +} -int8x8_t __builtin_mpl_vector_orn_v8i8(int8x8_t a, int8x8_t b); -#define vorn_s8(a, b) ((int8x8_t)__builtin_mpl_vector_orn_v8i8((int8x8_t)a, (int8x8_t)b)) +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcltq_f64( + float64x2_t a, float64x2_t b) { + return a < b; +} -int8x16_t __builtin_mpl_vector_ornq_v16i8(int8x16_t a, int8x16_t b); -#define vornq_s8(a, b) ((int8x16_t)__builtin_mpl_vector_ornq_v16i8((int8x16_t)a, (int8x16_t)b)) +// vcltz +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcltz_s8(int8x8_t a) { + return a < 0; +} -int16x4_t __builtin_mpl_vector_orn_v4i16(int16x4_t a, int16x4_t b); -#define vorn_s16(a, b) ((int8x8_t)__builtin_mpl_vector_orn_v8i8((int8x8_t)a, (int8x8_t)b)) +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcltzq_s8( + int8x16_t a) { + return a < 0; +} -int16x8_t __builtin_mpl_vector_ornq_v8i16(int16x8_t a, int16x8_t b); -#define vornq_s16(a, b) ((int8x16_t)__builtin_mpl_vector_ornq_v16i8((int8x16_t)a, (int8x16_t)b)) +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcltz_s16( + int16x4_t a) { + return a < 0; +} -int32x2_t __builtin_mpl_vector_orn_v2i32(int32x2_t a, int32x2_t b); -#define vorn_s32(a, b) ((int8x8_t)__builtin_mpl_vector_orn_v8i8((int8x8_t)a, (int8x8_t)b)) +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcltzq_s16( + int16x8_t a) { + return a < 0; +} -int32x4_t __builtin_mpl_vector_ornq_v4i32(int32x4_t a, int32x4_t b); -#define vornq_s32(a, b) ((int8x16_t)__builtin_mpl_vector_ornq_v16i8((int8x16_t)a, (int8x16_t)b)) +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcltz_s32( + int32x2_t a) { + return a < 0; +} -int64x1_t __builtin_mpl_vector_orn_v1i64(int64x1_t a, int64x1_t b); -#define vorn_s64(a, b) ((int8x8_t)__builtin_mpl_vector_orn_v8i8((int8x8_t)a, (int8x8_t)b)) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcltzq_s32( + int32x4_t a) { + return a < 0; +} -int64x2_t __builtin_mpl_vector_ornq_v2i64(int64x2_t a, int64x2_t b); -#define vornq_s64(a, b) ((int8x16_t)__builtin_mpl_vector_ornq_v16i8((int8x16_t)a, (int8x16_t)b)) +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcltz_s64( + int64x1_t a) { + return a < 0; +} -uint8x8_t __builtin_mpl_vector_orn_v8u8(uint8x8_t a, uint8x8_t b); -#define vorn_u8(a, b) ((uint8x8_t)__builtin_mpl_vector_orn_v8u8((uint8x8_t)a, (uint8x8_t)b)) +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcltzq_s64( + int64x2_t a) { + return a < 0; +} -uint8x16_t __builtin_mpl_vector_ornq_v16u8(uint8x16_t a, uint8x16_t b); -#define vornq_u8(a, b) ((uint8x16_t)__builtin_mpl_vector_ornq_v16u8((uint8x16_t)a, (uint8x16_t)b)) +extern inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcltzd_s64(int64_t a) { + return (a < 0) ? -1LL : 0LL; +} -uint16x4_t __builtin_mpl_vector_orn_v4u16(uint16x4_t a, uint16x4_t b); -#define vorn_u16(a, b) ((uint8x8_t)__builtin_mpl_vector_orn_v8u8((uint8x8_t)a, (uint8x8_t)b)) +// vcle +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcle_s8( + int8x8_t a, int8x8_t b) { + return a <= b; +} -uint16x8_t __builtin_mpl_vector_ornq_v8u16(uint16x8_t a, uint16x8_t b); -#define vornq_u16(a, b) ((uint8x16_t)__builtin_mpl_vector_ornq_v16u8((uint8x16_t)a, (uint8x16_t)b)) +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcleq_s8( + int8x16_t a, int8x16_t b) { + return a <= b; +} -uint32x2_t __builtin_mpl_vector_orn_v2u32(uint32x2_t a, uint32x2_t b); -#define vorn_u32(a, b) ((uint8x8_t)__builtin_mpl_vector_orn_v8u8((uint8x8_t)a, (uint8x8_t)b)) +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcle_s16( + int16x4_t a, int16x4_t b) { + return a <= b; +} -uint32x4_t __builtin_mpl_vector_ornq_v4u32(uint32x4_t a, uint32x4_t b); -#define vornq_u32(a, b) ((uint8x16_t)__builtin_mpl_vector_ornq_v16u8((uint8x16_t)a, (uint8x16_t)b)) +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcleq_s16( + int16x8_t a, int16x8_t b) { + return a <= b; +} -uint64x1_t __builtin_mpl_vector_orn_v1u64(uint64x1_t a, uint64x1_t b); -#define vorn_u64(a, b) ((uint8x8_t)__builtin_mpl_vector_orn_v8u8((uint8x8_t)a, (uint8x8_t)b)) +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcle_s32( + int32x2_t a, int32x2_t b) { + return a <= b; +} -uint64x2_t __builtin_mpl_vector_ornq_v2u64(uint64x2_t a, uint64x2_t b); -#define vornq_u64(a, b) ((uint8x16_t)__builtin_mpl_vector_ornq_v16u8((uint8x16_t)a, (uint8x16_t)b)) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcleq_s32( + int32x4_t a, int32x4_t b) { + return a <= b; +} -int8x8_t __builtin_mpl_vector_cls_v8i8(int8x8_t a); -#define vcls_s8(a) __builtin_mpl_vector_cls_v8i8(a) +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcle_u8( + uint8x8_t a, uint8x8_t b) { + return a <= b; +} -int8x16_t __builtin_mpl_vector_clsq_v16i8(int8x16_t a); -#define vclsq_s8(a) __builtin_mpl_vector_clsq_v16i8(a) +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcleq_u8( + uint8x16_t a, uint8x16_t b) { + return a <= b; +} -int16x4_t __builtin_mpl_vector_cls_v4i16(int16x4_t a); -#define vcls_s16(a) __builtin_mpl_vector_cls_v4i16(a) +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcle_u16( + uint16x4_t a, uint16x4_t b) { + return a <= b; +} -int16x8_t __builtin_mpl_vector_clsq_v8i16(int16x8_t a); -#define vclsq_s16(a) __builtin_mpl_vector_clsq_v8i16(a) +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcleq_u16( + uint16x8_t a, uint16x8_t b) { + return a <= b; +} -int32x2_t __builtin_mpl_vector_cls_v2i32(int32x2_t a); -#define vcls_s32(a) __builtin_mpl_vector_cls_v2i32(a) +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcle_u32( + uint32x2_t a, uint32x2_t b) { + return a <= b; +} -int32x4_t __builtin_mpl_vector_clsq_v4i32(int32x4_t a); -#define vclsq_s32(a) __builtin_mpl_vector_clsq_v4i32(a) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcleq_u32( + uint32x4_t a, uint32x4_t b) { + return a <= b; +} -int8x8_t __builtin_mpl_vector_cls_v8u8(uint8x8_t a); -#define vcls_u8(a) __builtin_mpl_vector_cls_v8u8(a) +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcle_s64( + int64x1_t a, int64x1_t b) { + return a <= b; +} -int8x16_t __builtin_mpl_vector_clsq_v16u8(uint8x16_t a); -#define vclsq_u8(a) __builtin_mpl_vector_clsq_v16u8(a) +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcleq_s64( + int64x2_t a, int64x2_t b) { + return a <= b; +} -int16x4_t __builtin_mpl_vector_cls_v4u16(uint16x4_t a); -#define vcls_u16(a) __builtin_mpl_vector_cls_v4u16(a) +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcle_u64( + uint64x1_t a, uint64x1_t b) { + return a <= b; +} -int16x8_t __builtin_mpl_vector_clsq_v8u16(uint16x8_t a); -#define vclsq_u16(a) __builtin_mpl_vector_clsq_v8u16(a) +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcleq_u64( + uint64x2_t a, uint64x2_t b) { + return a <= b; +} -int32x2_t __builtin_mpl_vector_cls_v2u32(uint32x2_t a); -#define vcls_u32(a) __builtin_mpl_vector_cls_v2u32(a) +extern inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcled_s64( + int64_t a, int64_t b) { + return (a <= b) ? -1LL : 0LL; +} -int32x4_t __builtin_mpl_vector_clsq_v4u32(uint32x4_t a); -#define vclsq_u32(a) __builtin_mpl_vector_clsq_v4u32(a) +extern inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcled_u64( + uint64_t a, uint64_t b) { + return (a <= b) ? -1LL : 0LL; +} -int8x8_t __builtin_mpl_vector_clz_v8i8(int8x8_t a); -#define vclz_s8(a) __builtin_mpl_vector_clz_v8i8(a) +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcle_f32( + float32x2_t a, float32x2_t b) { + return a <= b; +} -int8x16_t __builtin_mpl_vector_clzq_v16i8(int8x16_t a); -#define vclzq_s8(a) __builtin_mpl_vector_clzq_v16i8(a) +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcle_f64( + float64x1_t a, float64x1_t b) { + return a <= b; +} -int16x4_t __builtin_mpl_vector_clz_v4i16(int16x4_t a); -#define vclz_s16(a) __builtin_mpl_vector_clz_v4i16(a) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcleq_f32( + float32x4_t a, float32x4_t b) { + return a <= b; +} -int16x8_t __builtin_mpl_vector_clzq_v8i16(int16x8_t a); -#define vclzq_s16(a) __builtin_mpl_vector_clzq_v8i16(a) +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcleq_f64( + float64x2_t a, float64x2_t b) { + return a <= b; +} -int32x2_t __builtin_mpl_vector_clz_v2i32(int32x2_t a); -#define vclz_s32(a) __builtin_mpl_vector_clz_v2i32(a) +// vclez +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vclez_s8(int8x8_t a) { + return a <= 0; +} -int32x4_t __builtin_mpl_vector_clzq_v4i32(int32x4_t a); -#define vclzq_s32(a) __builtin_mpl_vector_clzq_v4i32(a) +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vclezq_s8( + int8x16_t a) { + return a <= 0; +} -uint8x8_t __builtin_mpl_vector_clz_v8u8(uint8x8_t a); -#define vclz_u8(a) __builtin_mpl_vector_clz_v8u8(a) +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vclez_s16( + int16x4_t a) { + return a <= 0; +} -uint8x16_t __builtin_mpl_vector_clzq_v16u8(uint8x16_t a); -#define vclzq_u8(a) __builtin_mpl_vector_clzq_v16u8(a) +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vclezq_s16( + int16x8_t a) { + return a <= 0; +} -uint16x4_t __builtin_mpl_vector_clz_v4u16(uint16x4_t a); -#define vclz_u16(a) __builtin_mpl_vector_clz_v4u16(a) +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vclez_s32( + int32x2_t a) { + return a <= 0; +} -uint16x8_t __builtin_mpl_vector_clzq_v8u16(uint16x8_t a); -#define vclzq_u16(a) __builtin_mpl_vector_clzq_v8u16(a) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vclezq_s32( + int32x4_t a) { + return a <= 0; +} -uint32x2_t __builtin_mpl_vector_clz_v2u32(uint32x2_t a); -#define vclz_u32(a) __builtin_mpl_vector_clz_v2u32(a) +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vclez_s64( + int64x1_t a) { + return a <= 0; +} -uint32x4_t __builtin_mpl_vector_clzq_v4u32(uint32x4_t a); -#define vclzq_u32(a) __builtin_mpl_vector_clzq_v4u32(a) +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vclezq_s64( + int64x2_t a) { + return a <= 0; +} -int8x8_t __builtin_mpl_vector_cnt_v8i8(int8x8_t a); -#define vcnt_s8(a) __builtin_mpl_vector_cnt_v8i8(a) +extern inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vclezd_s64(int64_t a) { + return (a <= 0) ? -1LL : 0LL; +} -int8x16_t __builtin_mpl_vector_cntq_v16i8(int8x16_t a); -#define vcntq_s8(a) __builtin_mpl_vector_cntq_v16i8(a) +// veor +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) veor_s8( + int8x8_t a, int8x8_t b) { + return a ^ b; +} -uint8x8_t __builtin_mpl_vector_cnt_v8u8(uint8x8_t a); -#define vcnt_u8(a) __builtin_mpl_vector_cnt_v8u8(a) +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) veorq_s8( + int8x16_t a, int8x16_t b) { + return a ^ b; +} -uint8x16_t __builtin_mpl_vector_cntq_v16u8(uint8x16_t a); -#define vcntq_u8(a) __builtin_mpl_vector_cntq_v16u8(a) +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) veor_s16( + int16x4_t a, int16x4_t b) { + return a ^ b; +} -int8x8_t __builtin_mpl_vector_bic_v8i8(int8x8_t a, int8x8_t b); -#define vbic_s8(a, b) __builtin_mpl_vector_bic_v8i8(a, b) +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) veorq_s16( + int16x8_t a, int16x8_t b) { + return a ^ b; +} -int8x16_t __builtin_mpl_vector_bicq_v16i8(int8x16_t a, int8x16_t b); -#define vbicq_s8(a, b) __builtin_mpl_vector_bicq_v16i8(a, b) +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) veor_s32( + int32x2_t a, int32x2_t b) { + return a ^ b; +} -int16x4_t __builtin_mpl_vector_bic_v4i16(int16x4_t a, int16x4_t b); -#define vbic_s16(a, b) __builtin_mpl_vector_bic_v4i16(a, b) +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) veorq_s32( + int32x4_t a, int32x4_t b) { + return a ^ b; +} -int16x8_t __builtin_mpl_vector_bicq_v8i16(int16x8_t a, int16x8_t b); -#define vbicq_s16(a, b) __builtin_mpl_vector_bicq_v8i16(a, b) +extern inline int64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) veor_s64( + int64x1_t a, int64x1_t b) { + return a ^ b; +} -int32x2_t __builtin_mpl_vector_bic_v2i32(int32x2_t a, int32x2_t b); -#define vbic_s32(a, b) __builtin_mpl_vector_bic_v2i32(a, b) +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) veorq_s64( + int64x2_t a, int64x2_t b) { + return a ^ b; +} -int32x4_t __builtin_mpl_vector_bicq_v4i32(int32x4_t a, int32x4_t b); -#define vbicq_s32(a, b) __builtin_mpl_vector_bicq_v4i32(a, b) +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) veor_u8( + uint8x8_t a, uint8x8_t b) { + return a ^ b; +} -int64x1_t __builtin_mpl_vector_bic_v1i64(int64x1_t a, int64x1_t b); -#define vbic_s64(a, b) __builtin_mpl_vector_bic_v1i64(a, b) +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) veorq_u8( + uint8x16_t a, uint8x16_t b) { + return a ^ b; +} -int64x2_t __builtin_mpl_vector_bicq_v2i64(int64x2_t a, int64x2_t b); -#define vbicq_s64(a, b) __builtin_mpl_vector_bicq_v2i64(a, b) +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) veor_u16( + uint16x4_t a, uint16x4_t b) { + return a ^ b; +} -uint8x8_t __builtin_mpl_vector_bic_v8u8(uint8x8_t a, uint8x8_t b); -#define vbic_u8(a, b) __builtin_mpl_vector_bic_v8u8(a, b) +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) veorq_u16( + uint16x8_t a, uint16x8_t b) { + return a ^ b; +} -uint8x16_t __builtin_mpl_vector_bicq_v16u8(uint8x16_t a, uint8x16_t b); -#define vbicq_u8(a, b) __builtin_mpl_vector_bicq_v16u8(a, b) +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) veor_u32( + uint32x2_t a, uint32x2_t b) { + return a ^ b; +} -uint16x4_t __builtin_mpl_vector_bic_v4u16(uint16x4_t a, uint16x4_t b); -#define vbic_u16(a, b) __builtin_mpl_vector_bic_v4u16(a, b) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) veorq_u32( + uint32x4_t a, uint32x4_t b) { + return a ^ b; +} -uint16x8_t __builtin_mpl_vector_bicq_v8u16(uint16x8_t a, uint16x8_t b); -#define vbicq_u16(a, b) __builtin_mpl_vector_bicq_v8u16(a, b) +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) veor_u64( + uint64x1_t a, uint64x1_t b) { + return a ^ b; +} -uint32x2_t __builtin_mpl_vector_bic_v2u32(uint32x2_t a, uint32x2_t b); -#define vbic_u32(a, b) __builtin_mpl_vector_bic_v2u32(a, b) +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) veorq_u64( + uint64x2_t a, uint64x2_t b) { + return a ^ b; +} -uint32x4_t __builtin_mpl_vector_bicq_v4u32(uint32x4_t a, uint32x4_t b); -#define vbicq_u32(a, b) __builtin_mpl_vector_bicq_v4u32(a, b) +// vext +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vext_s8( + int8x8_t a, int8x8_t b, const int n) { + return __builtin_mpl_vector_merge_v8i8(a, b, n); +} -uint64x1_t __builtin_mpl_vector_bic_v1u64(uint64x1_t a, uint64x1_t b); -#define vbic_u64(a, b) __builtin_mpl_vector_bic_v1u64(a, b) +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vextq_s8( + int8x16_t a, int8x16_t b, const int n) { + return __builtin_mpl_vector_merge_v16i8(a, b, n); +} -uint64x2_t __builtin_mpl_vector_bicq_v2u64(uint64x2_t a, uint64x2_t b); -#define vbicq_u64(a, b) __builtin_mpl_vector_bicq_v2u64(a, b) +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vext_s16( + int16x4_t a, int16x4_t b, const int n) { + return __builtin_mpl_vector_merge_v4i16(a, b, n); +} -int8x8_t __builtin_mpl_vector_bsl_v8i8(uint8x8_t a, int8x8_t b, int8x8_t c); -#define vbsl_s8(a, b, c) ((int8x8_t)__builtin_mpl_vector_bsl_v8i8((int8x8_t)a, (int8x8_t)b, (int8x8_t)c)) +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vextq_s16( + int16x8_t a, int16x8_t b, const int n) { + return __builtin_mpl_vector_merge_v8i16(a, b, n); +} -int8x16_t __builtin_mpl_vector_bslq_v16i8(uint8x16_t a, int8x16_t b, int8x16_t c); -#define vbslq_s8(a, b, c) ((int8x16_t)__builtin_mpl_vector_bslq_v16i8((int8x16_t)a, (int8x16_t)b, (int8x16_t)c)) +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vext_s32( + int32x2_t a, int32x2_t b, const int n) { + return __builtin_mpl_vector_merge_v2i32(a, b, n); +} -int16x4_t __builtin_mpl_vector_bsl_v4i16(uint16x4_t a, int16x4_t b, int16x4_t c); -#define vbsl_s16(a, b, c) ((int8x8_t)__builtin_mpl_vector_bsl_v8i8((int8x8_t)a, (int8x8_t)b, (int8x8_t)c)) +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vextq_s32( + int32x4_t a, int32x4_t b, const int n) { + return __builtin_mpl_vector_merge_v4i32(a, b, n); +} -int16x8_t __builtin_mpl_vector_bslq_v8i16(uint16x8_t a, int16x8_t b, int16x8_t c); -#define vbslq_s16(a, b, c) ((int8x16_t)__builtin_mpl_vector_bslq_v16i8((int8x16_t)a, (int8x16_t)b, (int8x16_t)c)) +extern inline int64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vext_s64( + int64x1_t a, int64x1_t b, const int n) { + return __builtin_mpl_vector_merge_v1i64(a, b, n); +} -int32x2_t __builtin_mpl_vector_bsl_v2i32(uint32x2_t a, int32x2_t b, int32x2_t c); -#define vbsl_s32(a, b, c) ((int8x8_t)__builtin_mpl_vector_bsl_v8i8((int8x8_t)a, (int8x8_t)b, (int8x8_t)c)) +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vextq_s64( + int64x2_t a, int64x2_t b, const int n) { + return __builtin_mpl_vector_merge_v2i64(a, b, n); +} -int32x4_t __builtin_mpl_vector_bslq_v4i32(uint32x4_t a, int32x4_t b, int32x4_t c); -#define vbslq_s32(a, b, c) ((int8x16_t)__builtin_mpl_vector_bslq_v16i8((int8x16_t)a, (int8x16_t)b, (int8x16_t)c)) +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vext_u8( + uint8x8_t a, uint8x8_t b, const int n) { + return __builtin_mpl_vector_merge_v8u8(a, b, n); +} -int64x1_t __builtin_mpl_vector_bsl_v1i64(uint64x1_t a, int64x1_t b, int64x1_t c); -#define vbsl_s64(a, b, c) ((int8x8_t)__builtin_mpl_vector_bsl_v8i8((int8x8_t)a, (int8x8_t)b, (int8x8_t)c)) +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vextq_u8( + uint8x16_t a, uint8x16_t b, const int n) { + return __builtin_mpl_vector_merge_v16u8(a, b, n); +} -int64x2_t __builtin_mpl_vector_bslq_v2i64(uint64x2_t a, int64x2_t b, int64x2_t c); -#define vbslq_s64(a, b, c) ((int8x16_t)__builtin_mpl_vector_bslq_v16i8((int8x16_t)a, (int8x16_t)b, (int8x16_t)c)) +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vext_u16( + uint16x4_t a, uint16x4_t b, const int n) { + return __builtin_mpl_vector_merge_v4u16(a, b, n); +} -uint8x8_t __builtin_mpl_vector_bsl_v8u8(uint8x8_t a, uint8x8_t b, uint8x8_t c); -#define vbsl_u8(a, b, c) ((uint8x8_t)__builtin_mpl_vector_bsl_v8u8((uint8x8_t)a, (uint8x8_t)b, (uint8x8_t)c)) +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vextq_u16( + uint16x8_t a, uint16x8_t b, const int n) { + return __builtin_mpl_vector_merge_v8u16(a, b, n); +} -uint8x16_t __builtin_mpl_vector_bslq_v16u8(uint8x16_t a, uint8x16_t b, uint8x16_t c); -#define vbslq_u8(a, b, c) ((uint8x16_t)__builtin_mpl_vector_bslq_v16u8((uint8x16_t)a, (uint8x16_t)b, (uint8x16_t)c)) +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vext_u32( + uint32x2_t a, uint32x2_t b, const int n) { + return __builtin_mpl_vector_merge_v2u32(a, b, n); +} -uint16x4_t __builtin_mpl_vector_bsl_v4u16(uint16x4_t a, uint16x4_t b, uint16x4_t c); -#define vbsl_u16(a, b, c) ((uint8x8_t)__builtin_mpl_vector_bsl_v8u8((uint8x8_t)a, (uint8x8_t)b, (uint8x8_t)c)) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vextq_u32( + uint32x4_t a, uint32x4_t b, const int n) { + return __builtin_mpl_vector_merge_v4u32(a, b, n); +} -uint16x8_t __builtin_mpl_vector_bslq_v8u16(uint16x8_t a, uint16x8_t b, uint16x8_t c); -#define vbslq_u16(a, b, c) ((uint8x16_t)__builtin_mpl_vector_bslq_v16u8((uint8x16_t)a, (uint8x16_t)b, (uint8x16_t)c)) +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vext_u64( + uint64x1_t a, uint64x1_t b, const int n) { + return __builtin_mpl_vector_merge_v1u64(a, b, n); +} -uint32x2_t __builtin_mpl_vector_bsl_v2u32(uint32x2_t a, uint32x2_t b, uint32x2_t c); -#define vbsl_u32(a, b, c) ((uint8x8_t)__builtin_mpl_vector_bsl_v8u8((uint8x8_t)a, (uint8x8_t)b, (uint8x8_t)c)) +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vextq_u64( + uint64x2_t a, uint64x2_t b, const int n) { + return __builtin_mpl_vector_merge_v2u64(a, b, n); +} -uint32x4_t __builtin_mpl_vector_bslq_v4u32(uint32x4_t a, uint32x4_t b, uint32x4_t c); -#define vbslq_u32(a, b, c) ((uint8x16_t)__builtin_mpl_vector_bslq_v16u8((uint8x16_t)a, (uint8x16_t)b, (uint8x16_t)c)) +extern inline float32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vext_f32( + float32x2_t a, float32x2_t b, const int n) { + return __builtin_mpl_vector_merge_v2f32(a, b, n); +} -uint64x1_t __builtin_mpl_vector_bsl_v1u64(uint64x1_t a, uint64x1_t b, uint64x1_t c); -#define vbsl_u64(a, b, c) ((uint8x8_t)__builtin_mpl_vector_bsl_v8u8((uint8x8_t)a, (uint8x8_t)b, (uint8x8_t)c)) +extern inline float64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vext_f64( + float64x1_t a, float64x1_t b, const int n) { + return __builtin_mpl_vector_merge_v1f64(a, b, n); +} -uint64x2_t __builtin_mpl_vector_bslq_v2u64(uint64x2_t a, uint64x2_t b, uint64x2_t c); -#define vbslq_u64(a, b, c) ((uint8x16_t)__builtin_mpl_vector_bslq_v16u8((uint8x16_t)a, (uint8x16_t)b, (uint8x16_t)c)) +extern inline float32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vextq_f32( + float32x4_t a, float32x4_t b, const int n) { + return __builtin_mpl_vector_merge_v4f32(a, b, n); +} -int8x8_t __builtin_mpl_vector_copy_lane_v8i8(int8x8_t a, const int lane1, int8x8_t b, const int lane2); -#define vcopy_lane_s8(a, lane1, b, lane2) __builtin_mpl_vector_copy_lane_v8i8(a, lane1, b, lane2) +extern inline float64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vextq_f64( + float64x2_t a, float64x2_t b, const int n) { + return __builtin_mpl_vector_merge_v2f64(a, b, n); +} -int8x16_t __builtin_mpl_vector_copyq_lane_v16i8(int8x16_t a, const int lane1, int8x8_t b, const int lane2); -#define vcopyq_lane_s8(a, lane1, b, lane2) __builtin_mpl_vector_copyq_lane_v16i8(a, lane1, b, lane2) +// vget_high +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vget_high_s8( + int8x16_t a) { + return __builtin_mpl_vector_get_high_v16i8(a); +} -int16x4_t __builtin_mpl_vector_copy_lane_v4i16(int16x4_t a, const int lane1, int16x4_t b, const int lane2); -#define vcopy_lane_s16(a, lane1, b, lane2) __builtin_mpl_vector_copy_lane_v4i16(a, lane1, b, lane2) +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vget_high_s16( + int16x8_t a) { + return __builtin_mpl_vector_get_high_v8i16(a); +} -int16x8_t __builtin_mpl_vector_copyq_lane_v8i16(int16x8_t a, const int lane1, int16x4_t b, const int lane2); -#define vcopyq_lane_s16(a, lane1, b, lane2) __builtin_mpl_vector_copyq_lane_v8i16(a, lane1, b, lane2) +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vget_high_s32( + int32x4_t a) { + return __builtin_mpl_vector_get_high_v4i32(a); +} -int32x2_t __builtin_mpl_vector_copy_lane_v2i32(int32x2_t a, const int lane1, int32x2_t b, const int lane2); -#define vcopy_lane_s32(a, lane1, b, lane2) __builtin_mpl_vector_copy_lane_v2i32(a, lane1, b, lane2) +extern inline int64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vget_high_s64( + int64x2_t a) { + return __builtin_mpl_vector_get_high_v2i64(a); +} -int32x4_t __builtin_mpl_vector_copyq_lane_v4i32(int32x4_t a, const int lane1, int32x2_t b, const int lane2); -#define vcopyq_lane_s32(a, lane1, b, lane2) __builtin_mpl_vector_copyq_lane_v4i32(a, lane1, b, lane2) +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vget_high_u8( + uint8x16_t a) { + return __builtin_mpl_vector_get_high_v16u8(a); +} -int64x1_t __builtin_mpl_vector_copy_lane_v1i64(int64x1_t a, const int lane1, int64x1_t b, const int lane2); -#define vcopy_lane_s64(a, lane1, b, lane2) __builtin_mpl_vector_copy_lane_v1i64(a, lane1, b, lane2) +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vget_high_u16( + uint16x8_t a) { + return __builtin_mpl_vector_get_high_v8u16(a); +} -int64x2_t __builtin_mpl_vector_copyq_lane_v2i64(int64x2_t a, const int lane1, int64x1_t b, const int lane2); -#define vcopyq_lane_s64(a, lane1, b, lane2) __builtin_mpl_vector_copyq_lane_v2i64(a, lane1, b, lane2) +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vget_high_u32( + uint32x4_t a) { + return __builtin_mpl_vector_get_high_v4u32(a); +} -uint8x8_t __builtin_mpl_vector_copy_lane_v8u8(uint8x8_t a, const int lane1, uint8x8_t b, const int lane2); -#define vcopy_lane_u8(a, lane1, b, lane2) __builtin_mpl_vector_copy_lane_v8u8(a, lane1, b, lane2) +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vget_high_u64( + uint64x2_t a) { + return __builtin_mpl_vector_get_high_v2u64(a); +} -uint8x16_t __builtin_mpl_vector_copyq_lane_v16u8(uint8x16_t a, const int lane1, uint8x8_t b, const int lane2); -#define vcopyq_lane_u8(a, lane1, b, lane2) __builtin_mpl_vector_copyq_lane_v16u8(a, lane1, b, lane2) +extern inline float32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vget_high_f32( + float32x4_t a) { + return __builtin_mpl_vector_get_high_v2f32(a); +} -uint16x4_t __builtin_mpl_vector_copy_lane_v4u16(uint16x4_t a, const int lane1, uint16x4_t b, const int lane2); -#define vcopy_lane_u16(a, lane1, b, lane2) __builtin_mpl_vector_copy_lane_v4u16(a, lane1, b, lane2) +extern inline float64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vget_high_f64( + float64x1_t a) { + return __builtin_mpl_vector_get_high_v1f64(a); +} -uint16x8_t __builtin_mpl_vector_copyq_lane_v8u16(uint16x8_t a, const int lane1, uint16x4_t b, const int lane2); -#define vcopyq_lane_u16(a, lane1, b, lane2) __builtin_mpl_vector_copyq_lane_v8u16(a, lane1, b, lane2) +// vget_lane +extern inline float32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vget_lane_f32( + float32x2_t v, const int lane) { + return __builtin_mpl_vector_get_element_v2f32(v, lane); +} -uint32x2_t __builtin_mpl_vector_copy_lane_v2u32(uint32x2_t a, const int lane1, uint32x2_t b, const int lane2); -#define vcopy_lane_u32(a, lane1, b, lane2) __builtin_mpl_vector_copy_lane_v2u32(a, lane1, b, lane2) +extern inline float64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vget_lane_f64( + float64x1_t v, const int lane) { + return __builtin_mpl_vector_get_element_v1f64(v, lane); +} -uint32x4_t __builtin_mpl_vector_copyq_lane_v4u32(uint32x4_t a, const int lane1, uint32x2_t b, const int lane2); -#define vcopyq_lane_u32(a, lane1, b, lane2) __builtin_mpl_vector_copyq_lane_v4u32(a, lane1, b, lane2) +extern inline float32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vgetq_lane_f32( + float32x4_t v, const int lane) { + return __builtin_mpl_vector_get_element_v4f32(v, lane); +} -uint64x1_t __builtin_mpl_vector_copy_lane_v1u64(uint64x1_t a, const int lane1, uint64x1_t b, const int lane2); -#define vcopy_lane_u64(a, lane1, b, lane2) __builtin_mpl_vector_copy_lane_v1u64(a, lane1, b, lane2) +extern inline float64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vgetq_lane_f64( + float64x2_t v, const int lane) { + return __builtin_mpl_vector_get_element_v2f64(v, lane); +} -uint64x2_t __builtin_mpl_vector_copyq_lane_v2u64(uint64x2_t a, const int lane1, uint64x1_t b, const int lane2); -#define vcopyq_lane_u64(a, lane1, b, lane2) __builtin_mpl_vector_copyq_lane_v2u64(a, lane1, b, lane2) +// vget_low +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vget_low_s8( + int8x16_t a) { + return __builtin_mpl_vector_get_low_v16i8(a); +} -int8x8_t __builtin_mpl_vector_copy_laneq_v8i8(int8x8_t a, const int lane1, int8x16_t b, const int lane2); -#define vcopy_laneq_s8(a, lane1, b, lane2) __builtin_mpl_vector_copy_laneq_v8i8(a, lane1, b, lane2) +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vget_low_s16( + int16x8_t a) { + return __builtin_mpl_vector_get_low_v8i16(a); +} -int8x16_t __builtin_mpl_vector_copyq_laneq_v16i8(int8x16_t a, const int lane1, int8x16_t b, const int lane2); -#define vcopyq_laneq_s8(a, lane1, b, lane2) __builtin_mpl_vector_copyq_laneq_v16i8(a, lane1, b, lane2) +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vget_low_s32( + int32x4_t a) { + return __builtin_mpl_vector_get_low_v4i32(a); +} -int16x4_t __builtin_mpl_vector_copy_laneq_v4i16(int16x4_t a, const int lane1, int16x8_t b, const int lane2); -#define vcopy_laneq_s16(a, lane1, b, lane2) __builtin_mpl_vector_copy_laneq_v4i16(a, lane1, b, lane2) +extern inline int64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vget_low_s64( + int64x2_t a) { + return __builtin_mpl_vector_get_low_v2i64(a); +} -int16x8_t __builtin_mpl_vector_copyq_laneq_v8i16(int16x8_t a, const int lane1, int16x8_t b, const int lane2); -#define vcopyq_laneq_s16(a, lane1, b, lane2) __builtin_mpl_vector_copyq_laneq_v8i16(a, lane1, b, lane2) +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vget_low_u8( + uint8x16_t a) { + return __builtin_mpl_vector_get_low_v16u8(a); +} -int32x2_t __builtin_mpl_vector_copy_laneq_v2i32(int32x2_t a, const int lane1, int32x4_t b, const int lane2); -#define vcopy_laneq_s32(a, lane1, b, lane2) __builtin_mpl_vector_copy_laneq_v2i32(a, lane1, b, lane2) +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vget_low_u16( + uint16x8_t a) { + return __builtin_mpl_vector_get_low_v8u16(a); +} -int32x4_t __builtin_mpl_vector_copyq_laneq_v4i32(int32x4_t a, const int lane1, int32x4_t b, const int lane2); -#define vcopyq_laneq_s32(a, lane1, b, lane2) __builtin_mpl_vector_copyq_laneq_v4i32(a, lane1, b, lane2) +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vget_low_u32( + uint32x4_t a) { + return __builtin_mpl_vector_get_low_v4u32(a); +} -int64x1_t __builtin_mpl_vector_copy_laneq_v1i64(int64x1_t a, const int lane1, int64x2_t b, const int lane2); -#define vcopy_laneq_s64(a, lane1, b, lane2) __builtin_mpl_vector_copy_laneq_v1i64(a, lane1, b, lane2) +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vget_low_u64( + uint64x2_t a) { + return __builtin_mpl_vector_get_low_v2u64(a); +} -int64x2_t __builtin_mpl_vector_copyq_laneq_v2i64(int64x2_t a, const int lane1, int64x2_t b, const int lane2); -#define vcopyq_laneq_s64(a, lane1, b, lane2) __builtin_mpl_vector_copyq_laneq_v2i64(a, lane1, b, lane2) +extern inline float32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vget_low_f32( + float32x4_t a) { + return __builtin_mpl_vector_get_low_v2f32(a); +} -uint8x8_t __builtin_mpl_vector_copy_laneq_v8u8(uint8x8_t a, const int lane1, uint8x16_t b, const int lane2); -#define vcopy_laneq_u8(a, lane1, b, lane2) __builtin_mpl_vector_copy_laneq_v8u8(a, lane1, b, lane2) +extern inline float64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vget_low_f64( + float64x2_t a) { + return __builtin_mpl_vector_get_low_v1f64(a); +} -uint8x16_t __builtin_mpl_vector_copyq_laneq_v16u8(uint8x16_t a, const int lane1, uint8x16_t b, const int lane2); -#define vcopyq_laneq_u8(a, lane1, b, lane2) __builtin_mpl_vector_copyq_laneq_v16u8(a, lane1, b, lane2) +// vld1 -uint16x4_t __builtin_mpl_vector_copy_laneq_v4u16(uint16x4_t a, const int lane1, uint16x8_t b, const int lane2); -#define vcopy_laneq_u16(a, lane1, b, lane2) __builtin_mpl_vector_copy_laneq_v4u16(a, lane1, b, lane2) +extern inline float32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld1_f32( + float32_t const *ptr) { + return __builtin_mpl_vector_load_v2f32(ptr); +} -uint16x8_t __builtin_mpl_vector_copyq_laneq_v8u16(uint16x8_t a, const int lane1, uint16x8_t b, const int lane2); -#define vcopyq_laneq_u16(a, lane1, b, lane2) __builtin_mpl_vector_copyq_laneq_v8u16(a, lane1, b, lane2) +extern inline float64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld1_f64( + float64_t const *ptr) { + return __builtin_mpl_vector_load_v1f64(ptr); +} -uint32x2_t __builtin_mpl_vector_copy_laneq_v2u32(uint32x2_t a, const int lane1, uint32x4_t b, const int lane2); -#define vcopy_laneq_u32(a, lane1, b, lane2) __builtin_mpl_vector_copy_laneq_v2u32(a, lane1, b, lane2) +extern inline float32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld1q_f32( + float32_t const *ptr) { + return __builtin_mpl_vector_load_v4f32(ptr); +} -uint32x4_t __builtin_mpl_vector_copyq_laneq_v4u32(uint32x4_t a, const int lane1, uint32x4_t b, const int lane2); -#define vcopyq_laneq_u32(a, lane1, b, lane2) __builtin_mpl_vector_copyq_laneq_v4u32(a, lane1, b, lane2) +extern inline float64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld1q_f64( + float64_t const *ptr) { + return __builtin_mpl_vector_load_v2f64(ptr); +} -uint64x1_t __builtin_mpl_vector_copy_laneq_v1u64(uint64x1_t a, const int lane1, uint64x2_t b, const int lane2); -#define vcopy_laneq_u64(a, lane1, b, lane2) __builtin_mpl_vector_copy_laneq_v1u64(a, lane1, b, lane2) +// vmlal +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlal_s8( + int16x8_t a, int8x8_t b, int8x8_t c) { + return __builtin_mpl_vector_madd_v8i8(a, b, c); +} -uint64x2_t __builtin_mpl_vector_copyq_laneq_v2u64(uint64x2_t a, const int lane1, uint64x2_t b, const int lane2); -#define vcopyq_laneq_u64(a, lane1, b, lane2) __builtin_mpl_vector_copyq_laneq_v2u64(a, lane1, b, lane2) +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlal_s16( + int32x4_t a, int16x4_t b, int16x4_t c) { + return __builtin_mpl_vector_madd_v4i16(a, b, c); +} -int8x8_t __builtin_mpl_vector_rbit_v8i8(int8x8_t a); -#define vrbit_s8(a) __builtin_mpl_vector_rbit_v8i8(a) +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlal_s32( + int64x2_t a, int32x2_t b, int32x2_t c) { + return __builtin_mpl_vector_madd_v2i32(a, b, c); +} -int8x16_t __builtin_mpl_vector_rbitq_v16i8(int8x16_t a); -#define vrbitq_s8(a) __builtin_mpl_vector_rbitq_v16i8(a) +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlal_u8( + uint16x8_t a, uint8x8_t b, uint8x8_t c) { + return __builtin_mpl_vector_madd_v8u8(a, b, c); +} -uint8x8_t __builtin_mpl_vector_rbit_v8u8(uint8x8_t a); -#define vrbit_u8(a) __builtin_mpl_vector_rbit_v8u8(a) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlal_u16( + uint32x4_t a, uint16x4_t b, uint16x4_t c) { + return __builtin_mpl_vector_madd_v4u16(a, b, c); +} -uint8x16_t __builtin_mpl_vector_rbitq_v16u8(uint8x16_t a); -#define vrbitq_u8(a) __builtin_mpl_vector_rbitq_v16u8(a) +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlal_u32( + uint64x2_t a, uint32x2_t b, uint32x2_t c) { + return __builtin_mpl_vector_madd_v2u32(a, b, c); +} -int8x8_t __builtin_mpl_vector_create_v8i8(uint64_t a); -#define vcreate_s8(a) __builtin_mpl_vector_create_v8i8(a) +// vmovl +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmovl_s8(int8x8_t a) { + return __builtin_mpl_vector_widen_low_v8i8(a); +} -int16x4_t __builtin_mpl_vector_create_v4i16(uint64_t a); -#define vcreate_s16(a) __builtin_mpl_vector_create_v4i16(a) +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmovl_s16( + int16x4_t a) { + return __builtin_mpl_vector_widen_low_v4i16(a); +} -int32x2_t __builtin_mpl_vector_create_v2i32(uint64_t a); -#define vcreate_s32(a) __builtin_mpl_vector_create_v2i32(a) +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmovl_s32( + int32x2_t a) { + return __builtin_mpl_vector_widen_low_v2i32(a); +} -int64x1_t __builtin_mpl_vector_create_v1i64(uint64_t a); -#define vcreate_s64(a) __builtin_mpl_vector_create_v1i64(a) +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmovl_u8( + uint8x8_t a) { + return __builtin_mpl_vector_widen_low_v8u8(a); +} -uint8x8_t __builtin_mpl_vector_create_v8u8(uint64_t a); -#define vcreate_u8(a) __builtin_mpl_vector_create_v8u8(a) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmovl_u16( + uint16x4_t a) { + return __builtin_mpl_vector_widen_low_v4u16(a); +} -uint16x4_t __builtin_mpl_vector_create_v4u16(uint64_t a); -#define vcreate_u16(a) __builtin_mpl_vector_create_v4u16(a) +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmovl_u32( + uint32x2_t a) { + return __builtin_mpl_vector_widen_low_v2u32(a); +} -uint32x2_t __builtin_mpl_vector_create_v2u32(uint64_t a); -#define vcreate_u32(a) __builtin_mpl_vector_create_v2u32(a) +// vmovl_high +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmovl_high_s8( + int8x16_t a) { + return __builtin_mpl_vector_widen_high_v8i8(a); +} -uint64x1_t __builtin_mpl_vector_create_v1u64(uint64_t a); -#define vcreate_u64(a) __builtin_mpl_vector_create_v1u64(a) +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmovl_high_s16( + int16x8_t a) { + return __builtin_mpl_vector_widen_high_v4i16(a); +} -int8x8_t __builtin_mpl_vector_mov_n_v8i8(int8_t a); -#define vmov_n_s8(a) __builtin_mpl_vector_mov_n_v8i8(a) +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmovl_high_s32( + int32x4_t a) { + return __builtin_mpl_vector_widen_high_v2i32(a); +} -int8x16_t __builtin_mpl_vector_movq_n_v16i8(int8_t a); -#define vmovq_n_s8(a) __builtin_mpl_vector_movq_n_v16i8(a) +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmovl_high_u8( + uint8x16_t a) { + return __builtin_mpl_vector_widen_high_v8u8(a); +} -int16x4_t __builtin_mpl_vector_mov_n_v4i16(int16_t a); -#define vmov_n_s16(a) __builtin_mpl_vector_mov_n_v4i16(a) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmovl_high_u16( + uint16x8_t a) { + return __builtin_mpl_vector_widen_high_v4u16(a); +} -int16x8_t __builtin_mpl_vector_movq_n_v8i16(int16_t a); -#define vmovq_n_s16(a) __builtin_mpl_vector_movq_n_v8i16(a) +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmovl_high_u32( + uint32x4_t a) { + return __builtin_mpl_vector_widen_high_v2u32(a); +} -int32x2_t __builtin_mpl_vector_mov_n_v2i32(int32_t a); -#define vmov_n_s32(a) __builtin_mpl_vector_mov_n_v2i32(a) +// vmovn +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmovn_s16(int16x8_t a) { + return __builtin_mpl_vector_narrow_low_v8i16(a); +} -int32x4_t __builtin_mpl_vector_movq_n_v4i32(int32_t a); -#define vmovq_n_s32(a) __builtin_mpl_vector_movq_n_v4i32(a) +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmovn_s32( + int32x4_t a) { + return __builtin_mpl_vector_narrow_low_v4i32(a); +} -int64x1_t __builtin_mpl_vector_mov_n_v1i64(int64_t a); -#define vmov_n_s64(a) __builtin_mpl_vector_mov_n_v1i64(a) +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmovn_s64( + int64x2_t a) { + return __builtin_mpl_vector_narrow_low_v2i64(a); +} -int64x2_t __builtin_mpl_vector_movq_n_v2i64(int64_t a); -#define vmovq_n_s64(a) __builtin_mpl_vector_movq_n_v2i64(a) +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmovn_u16( + uint16x8_t a) { + return __builtin_mpl_vector_narrow_low_v8u16(a); +} -uint8x8_t __builtin_mpl_vector_mov_n_v8u8(uint8_t a); -#define vmov_n_u8(a) __builtin_mpl_vector_mov_n_v8u8(a) +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmovn_u32( + uint32x4_t a) { + return __builtin_mpl_vector_narrow_low_v4u32(a); +} -uint8x16_t __builtin_mpl_vector_movq_n_v16u8(uint8_t a); -#define vmovq_n_u8(a) __builtin_mpl_vector_movq_n_v16u8(a) +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmovn_u64( + uint64x2_t a) { + return __builtin_mpl_vector_narrow_low_v2u64(a); +} -uint16x4_t __builtin_mpl_vector_mov_n_v4u16(uint16_t a); -#define vmov_n_u16(a) __builtin_mpl_vector_mov_n_v4u16(a) +// vmovn_high +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmovn_high_s16( + int8x8_t r, int16x8_t a) { + return __builtin_mpl_vector_narrow_high_v8i16(r, a); +} -uint16x8_t __builtin_mpl_vector_movq_n_v8u16(uint16_t a); -#define vmovq_n_u16(a) __builtin_mpl_vector_movq_n_v8u16(a) +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmovn_high_s32( + int16x4_t r, int32x4_t a) { + return __builtin_mpl_vector_narrow_high_v4i32(r, a); +} -uint32x2_t __builtin_mpl_vector_mov_n_v2u32(uint32_t a); -#define vmov_n_u32(a) __builtin_mpl_vector_mov_n_v2u32(a) +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmovn_high_s64( + int32x2_t r, int64x2_t a) { + return __builtin_mpl_vector_narrow_high_v2i64(r, a); +} -uint32x4_t __builtin_mpl_vector_movq_n_v4u32(uint32_t a); -#define vmovq_n_u32(a) __builtin_mpl_vector_movq_n_v4u32(a) +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmovn_high_u16( + uint8x8_t r, uint16x8_t a) { + return __builtin_mpl_vector_narrow_high_v8u16(r, a); +} -uint64x1_t __builtin_mpl_vector_mov_n_v1u64(uint64_t a); -#define vmov_n_u64(a) __builtin_mpl_vector_mov_n_v1u64(a) +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmovn_high_u32( + uint16x4_t r, uint32x4_t a) { + return __builtin_mpl_vector_narrow_high_v4u32(r, a); +} -uint64x2_t __builtin_mpl_vector_movq_n_v2u64(uint64_t a); -#define vmovq_n_u64(a) __builtin_mpl_vector_movq_n_v2u64(a) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmovn_high_u64( + uint32x2_t r, uint64x2_t a) { + return __builtin_mpl_vector_narrow_high_v2u64(r, a); +} -int8x8_t __builtin_mpl_vector_dup_lane_v8i8(int8x8_t a, const int lane); -#define vdup_lane_s8(a, lane) __builtin_mpl_vector_dup_lane_v8i8(a, lane) +// vmul +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmul_s8( + int8x8_t a, int8x8_t b) { + return a * b; +} -int8x16_t __builtin_mpl_vector_dupq_lane_v16i8(int8x8_t a, const int lane); -#define vdupq_lane_s8(a, lane) __builtin_mpl_vector_dupq_lane_v16i8(a, lane) +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmulq_s8( + int8x16_t a, int8x16_t b) { + return a * b; +} -int16x4_t __builtin_mpl_vector_dup_lane_v4i16(int16x4_t a, const int lane); -#define vdup_lane_s16(a, lane) __builtin_mpl_vector_dup_lane_v4i16(a, lane) +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmul_s16( + int16x4_t a, int16x4_t b) { + return a * b; +} -int16x8_t __builtin_mpl_vector_dupq_lane_v8i16(int16x4_t a, const int lane); -#define vdupq_lane_s16(a, lane) __builtin_mpl_vector_dupq_lane_v8i16(a, lane) +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmulq_s16( + int16x8_t a, int16x8_t b) { + return a * b; +} -int32x2_t __builtin_mpl_vector_dup_lane_v2i32(int32x2_t a, const int lane); -#define vdup_lane_s32(a, lane) __builtin_mpl_vector_dup_lane_v2i32(a, lane) +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmul_s32( + int32x2_t a, int32x2_t b) { + return a * b; +} -int32x4_t __builtin_mpl_vector_dupq_lane_v4i32(int32x2_t a, const int lane); -#define vdupq_lane_s32(a, lane) __builtin_mpl_vector_dupq_lane_v4i32(a, lane) +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmulq_s32( + int32x4_t a, int32x4_t b) { + return a * b; +} -int64x1_t __builtin_mpl_vector_dup_lane_v1i64(int64x1_t a, const int lane); -#define vdup_lane_s64(a, lane) __builtin_mpl_vector_dup_lane_v1i64(a, lane) +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmul_u8( + uint8x8_t a, uint8x8_t b) { + return a * b; +} -int64x2_t __builtin_mpl_vector_dupq_lane_v2i64(int64x1_t a, const int lane); -#define vdupq_lane_s64(a, lane) __builtin_mpl_vector_dupq_lane_v2i64(a, lane) +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmulq_u8( + uint8x16_t a, uint8x16_t b) { + return a * b; +} -uint8x8_t __builtin_mpl_vector_dup_lane_v8u8(uint8x8_t a, const int lane); -#define vdup_lane_u8(a, lane) __builtin_mpl_vector_dup_lane_v8u8(a, lane) +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmul_u16( + uint16x4_t a, uint16x4_t b) { + return a * b; +} -uint8x16_t __builtin_mpl_vector_dupq_lane_v16u8(uint8x8_t a, const int lane); -#define vdupq_lane_u8(a, lane) __builtin_mpl_vector_dupq_lane_v16u8(a, lane) +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmulq_u16( + uint16x8_t a, uint16x8_t b) { + return a * b; +} -uint16x4_t __builtin_mpl_vector_dup_lane_v4u16(uint16x4_t a, const int lane); -#define vdup_lane_u16(a, lane) __builtin_mpl_vector_dup_lane_v4u16(a, lane) +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmul_u32( + uint32x2_t a, uint32x2_t b) { + return a * b; +} -uint16x8_t __builtin_mpl_vector_dupq_lane_v8u16(uint16x4_t a, const int lane); -#define vdupq_lane_u16(a, lane) __builtin_mpl_vector_dupq_lane_v8u16(a, lane) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmulq_u32( + uint32x4_t a, uint32x4_t b) { + return a * b; +} -uint32x2_t __builtin_mpl_vector_dup_lane_v2u32(uint32x2_t a, const int lane); -#define vdup_lane_u32(a, lane) __builtin_mpl_vector_dup_lane_v2u32(a, lane) +// vmull +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmull_s8( + int8x8_t a, int8x8_t b) { + return __builtin_mpl_vector_mull_low_v8i8(a, b); +} -uint32x4_t __builtin_mpl_vector_dupq_lane_v4u32(uint32x2_t a, const int lane); -#define vdupq_lane_u32(a, lane) __builtin_mpl_vector_dupq_lane_v4u32(a, lane) +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmull_s16( + int16x4_t a, int16x4_t b) { + return __builtin_mpl_vector_mull_low_v4i16(a, b); +} -uint64x1_t __builtin_mpl_vector_dup_lane_v1u64(uint64x1_t a, const int lane); -#define vdup_lane_u64(a, lane) __builtin_mpl_vector_dup_lane_v1u64(a, lane) +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmull_s32( + int32x2_t a, int32x2_t b) { + return __builtin_mpl_vector_mull_low_v2i32(a, b); +} -uint64x2_t __builtin_mpl_vector_dupq_lane_v2u64(uint64x1_t a, const int lane); -#define vdupq_lane_u64(a, lane) __builtin_mpl_vector_dupq_lane_v2u64(a, lane) +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmull_u8( + uint8x8_t a, uint8x8_t b) { + return __builtin_mpl_vector_mull_low_v8u8(a, b); +} -int8x8_t __builtin_mpl_vector_dup_laneq_v8i8(int8x16_t a, const int lane); -#define vdup_laneq_s8(a, lane) __builtin_mpl_vector_dup_laneq_v8i8(a, lane) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmull_u16( + uint16x4_t a, uint16x4_t b) { + return __builtin_mpl_vector_mull_low_v4u16(a, b); +} -int8x16_t __builtin_mpl_vector_dupq_laneq_v16i8(int8x16_t a, const int lane); -#define vdupq_laneq_s8(a, lane) __builtin_mpl_vector_dupq_laneq_v16i8(a, lane) +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmull_u32( + uint32x2_t a, uint32x2_t b) { + return __builtin_mpl_vector_mull_low_v2u32(a, b); +} -int16x4_t __builtin_mpl_vector_dup_laneq_v4i16(int16x8_t a, const int lane); -#define vdup_laneq_s16(a, lane) __builtin_mpl_vector_dup_laneq_v4i16(a, lane) +// vmull_high +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmull_high_s8( + int8x16_t a, int8x16_t b) { + return __builtin_mpl_vector_mull_high_v8i8(a, b); +} -int16x8_t __builtin_mpl_vector_dupq_laneq_v8i16(int16x8_t a, const int lane); -#define vdupq_laneq_s16(a, lane) __builtin_mpl_vector_dupq_laneq_v8i16(a, lane) +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmull_high_s16( + int16x8_t a, int16x8_t b) { + return __builtin_mpl_vector_mull_high_v4i16(a, b); +} -int32x2_t __builtin_mpl_vector_dup_laneq_v2i32(int32x4_t a, const int lane); -#define vdup_laneq_s32(a, lane) __builtin_mpl_vector_dup_laneq_v2i32(a, lane) +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmull_high_s32( + int32x4_t a, int32x4_t b) { + return __builtin_mpl_vector_mull_high_v2i32(a, b); +} -int32x4_t __builtin_mpl_vector_dupq_laneq_v4i32(int32x4_t a, const int lane); -#define vdupq_laneq_s32(a, lane) __builtin_mpl_vector_dupq_laneq_v4i32(a, lane) +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmull_high_u8( + uint8x16_t a, uint8x16_t b) { + return __builtin_mpl_vector_mull_high_v8u8(a, b); +} -int64x1_t __builtin_mpl_vector_dup_laneq_v1i64(int64x2_t a, const int lane); -#define vdup_laneq_s64(a, lane) __builtin_mpl_vector_dup_laneq_v1i64(a, lane) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmull_high_u16( + uint16x8_t a, uint16x8_t b) { + return __builtin_mpl_vector_mull_high_v4u16(a, b); +} -int64x2_t __builtin_mpl_vector_dupq_laneq_v2i64(int64x2_t a, const int lane); -#define vdupq_laneq_s64(a, lane) __builtin_mpl_vector_dupq_laneq_v2i64(a, lane) +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmull_high_u32( + uint32x4_t a, uint32x4_t b) { + return __builtin_mpl_vector_mull_high_v2u32(a, b); +} -uint8x8_t __builtin_mpl_vector_dup_laneq_v8u8(uint8x16_t a, const int lane); -#define vdup_laneq_u8(a, lane) __builtin_mpl_vector_dup_laneq_v8u8(a, lane) +// vor +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vor_s8( + int8x8_t a, int8x8_t b) { + return a | b; +} -uint8x16_t __builtin_mpl_vector_dupq_laneq_v16u8(uint8x16_t a, const int lane); -#define vdupq_laneq_u8(a, lane) __builtin_mpl_vector_dupq_laneq_v16u8(a, lane) +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vorq_s8( + int8x16_t a, int8x16_t b) { + return a | b; +} -uint16x4_t __builtin_mpl_vector_dup_laneq_v4u16(uint16x8_t a, const int lane); -#define vdup_laneq_u16(a, lane) __builtin_mpl_vector_dup_laneq_v4u16(a, lane) +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vor_s16( + int16x4_t a, int16x4_t b) { + return a | b; +} -uint16x8_t __builtin_mpl_vector_dupq_laneq_v8u16(uint16x8_t a, const int lane); -#define vdupq_laneq_u16(a, lane) __builtin_mpl_vector_dupq_laneq_v8u16(a, lane) +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vorq_s16( + int16x8_t a, int16x8_t b) { + return a | b; +} -uint32x2_t __builtin_mpl_vector_dup_laneq_v2u32(uint32x4_t a, const int lane); -#define vdup_laneq_u32(a, lane) __builtin_mpl_vector_dup_laneq_v2u32(a, lane) +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vor_s32( + int32x2_t a, int32x2_t b) { + return a | b; +} -uint32x4_t __builtin_mpl_vector_dupq_laneq_v4u32(uint32x4_t a, const int lane); -#define vdupq_laneq_u32(a, lane) __builtin_mpl_vector_dupq_laneq_v4u32(a, lane) +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vorq_s32( + int32x4_t a, int32x4_t b) { + return a | b; +} -uint64x1_t __builtin_mpl_vector_dup_laneq_v1u64(uint64x2_t a, const int lane); -#define vdup_laneq_u64(a, lane) __builtin_mpl_vector_dup_laneq_v1u64(a, lane) +extern inline int64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vor_s64( + int64x1_t a, int64x1_t b) { + return a | b; +} -uint64x2_t __builtin_mpl_vector_dupq_laneq_v2u64(uint64x2_t a, const int lane); -#define vdupq_laneq_u64(a, lane) __builtin_mpl_vector_dupq_laneq_v2u64(a, lane) +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vorq_s64( + int64x2_t a, int64x2_t b) { + return a | b; +} -int8x16_t __builtin_mpl_vector_combine_v16i8(int8x8_t a, int8x8_t high); -#define vcombine_s8(a, high) (int8x16_t)__builtin_mpl_vector_combine_v2i64((int64x1_t)a, high) +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vor_u8( + uint8x8_t a, uint8x8_t b) { + return a | b; +} -int16x8_t __builtin_mpl_vector_combine_v8i16(int16x4_t a, int16x4_t high); -#define vcombine_s16(a, high) (int16x8_t)__builtin_mpl_vector_combine_v2i64((int64x1_t)a, high) +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vorq_u8( + uint8x16_t a, uint8x16_t b) { + return a | b; +} -int32x4_t __builtin_mpl_vector_combine_v4i32(int32x2_t a, int32x2_t high); -#define vcombine_s32(a, high) (int32x4_t)__builtin_mpl_vector_combine_v2i64((int64x1_t)a, high) +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vor_u16( + uint16x4_t a, uint16x4_t b) { + return a | b; +} -int64x2_t __builtin_mpl_vector_combine_v2i64(int64x1_t a, int64x1_t high); -#define vcombine_s64(a, high) __builtin_mpl_vector_combine_v2i64(a, high) +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vorq_u16( + uint16x8_t a, uint16x8_t b) { + return a | b; +} -uint8x16_t __builtin_mpl_vector_combine_v16u8(uint8x8_t a, uint8x8_t high); -#define vcombine_u8(a, high) (uint8x16_t)__builtin_mpl_vector_combine_v2u64((uint64x1_t)a, high) +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vor_u32( + uint32x2_t a, uint32x2_t b) { + return a | b; +} -uint16x8_t __builtin_mpl_vector_combine_v8u16(uint16x4_t a, uint16x4_t high); -#define vcombine_u16(a, high) (uint16x8_t)__builtin_mpl_vector_combine_v2u64((uint64x1_t)a, high) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vorq_u32( + uint32x4_t a, uint32x4_t b) { + return a | b; +} -uint32x4_t __builtin_mpl_vector_combine_v4u32(uint32x2_t a, uint32x2_t high); -#define vcombine_u32(a, high) (uint32x4_t)__builtin_mpl_vector_combine_v2u64((uint64x1_t)a, high) +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vor_u64( + uint64x1_t a, uint64x1_t b) { + return a | b; +} -uint64x2_t __builtin_mpl_vector_combine_v2u64(uint64x1_t a, uint64x1_t high); -#define vcombine_u64(a, high) __builtin_mpl_vector_combine_v2u64(a, high) +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vorq_u64( + uint64x2_t a, uint64x2_t b) { + return a | b; +} -int8_t __builtin_mpl_vector_dupb_lane_v8i8(int8x8_t a, const int lane); -#define vdupb_lane_s8(a, lane) __builtin_mpl_vector_dupb_lane_v8i8(a, lane) +// vpadal (add and accumulate long pairwise) +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpadal_s8( + int16x4_t a, int8x8_t b) { + return __builtin_mpl_vector_pairwise_adalp_v8i8(a, b); +} -int16_t __builtin_mpl_vector_duph_lane_v4i16(int16x4_t a, const int lane); -#define vduph_lane_s16(a, lane) __builtin_mpl_vector_duph_lane_v4i16(a, lane) +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpadalq_s8( + int16x8_t a, int8x16_t b) { + return __builtin_mpl_vector_pairwise_adalp_v16i8(a, b); +} -int32_t __builtin_mpl_vector_dups_lane_v2i32(int32x2_t a, const int lane); -#define vdups_lane_s32(a, lane) __builtin_mpl_vector_dups_lane_v2i32(a, lane) +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpadal_s16( + int32x2_t a, int16x4_t b) { + return __builtin_mpl_vector_pairwise_adalp_v4i16(a, b); +} -int64_t __builtin_mpl_vector_dupd_lane_v1i64(int64x1_t a, const int lane); -#define vdupd_lane_s64(a, lane) __builtin_mpl_vector_dupd_lane_v1i64(a, lane) +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpadalq_s16( + int32x4_t a, int16x8_t b) { + return __builtin_mpl_vector_pairwise_adalp_v8i16(a, b); +} -uint8_t __builtin_mpl_vector_dupb_lane_v8u8(uint8x8_t a, const int lane); -#define vdupb_lane_u8(a, lane) __builtin_mpl_vector_dupb_lane_v8u8(a, lane) +extern inline int64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpadal_s32( + int64x1_t a, int32x2_t b) { + return __builtin_mpl_vector_pairwise_adalp_v2i32(a, b); +} -uint16_t __builtin_mpl_vector_duph_lane_v4u16(uint16x4_t a, const int lane); -#define vduph_lane_u16(a, lane) __builtin_mpl_vector_duph_lane_v4u16(a, lane) +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpadalq_s32( + int64x2_t a, int32x4_t b) { + return __builtin_mpl_vector_pairwise_adalp_v4i32(a, b); +} -uint32_t __builtin_mpl_vector_dups_lane_v2u32(uint32x2_t a, const int lane); -#define vdups_lane_u32(a, lane) __builtin_mpl_vector_dups_lane_v2u32(a, lane) +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpadal_u8( + uint16x4_t a, uint8x8_t b) { + return __builtin_mpl_vector_pairwise_adalp_v8u8(a, b); +} -uint64_t __builtin_mpl_vector_dupd_lane_v1u64(uint64x1_t a, const int lane); -#define vdupd_lane_u64(a, lane) __builtin_mpl_vector_dupd_lane_v1u64(a, lane) +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpadalq_u8( + uint16x8_t a, uint8x16_t b) { + return __builtin_mpl_vector_pairwise_adalp_v16u8(a, b); +} -int8_t __builtin_mpl_vector_dupb_laneq_v16i8(int8x16_t a, const int lane); -#define vdupb_laneq_s8(a, lane) __builtin_mpl_vector_dupb_laneq_v16i8(a, lane) +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpadal_u16( + uint32x2_t a, uint16x4_t b) { + return __builtin_mpl_vector_pairwise_adalp_v4u16(a, b); +} -int16_t __builtin_mpl_vector_duph_laneq_v8i16(int16x8_t a, const int lane); -#define vduph_laneq_s16(a, lane) __builtin_mpl_vector_duph_laneq_v8i16(a, lane) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpadalq_u16( + uint32x4_t a, uint16x8_t b) { + return __builtin_mpl_vector_pairwise_adalp_v8u16(a, b); +} -int32_t __builtin_mpl_vector_dups_laneq_v4i32(int32x4_t a, const int lane); -#define vdups_laneq_s32(a, lane) __builtin_mpl_vector_dups_laneq_v4i32(a, lane) +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpadal_u32( + uint64x1_t a, uint32x2_t b) { + return __builtin_mpl_vector_pairwise_adalp_v2u32(a, b); +} -int64_t __builtin_mpl_vector_dupd_laneq_v2i64(int64x2_t a, const int lane); -#define vdupd_laneq_s64(a, lane) __builtin_mpl_vector_dupd_laneq_v2i64(a, lane) +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpadalq_u32( + uint64x2_t a, uint32x4_t b) { + return __builtin_mpl_vector_pairwise_adalp_v4u32(a, b); +} -uint8_t __builtin_mpl_vector_dupb_laneq_v16u8(uint8x16_t a, const int lane); -#define vdupb_laneq_u8(a, lane) __builtin_mpl_vector_dupb_laneq_v16u8(a, lane) +// vpaddl +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpaddl_s8( + int8x8_t a) { + return __builtin_mpl_vector_pairwise_add_v8i8(a); +} -uint16_t __builtin_mpl_vector_duph_laneq_v8u16(uint16x8_t a, const int lane); -#define vduph_laneq_u16(a, lane) __builtin_mpl_vector_duph_laneq_v8u16(a, lane) +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpaddlq_s8( + int8x16_t a) { + return __builtin_mpl_vector_pairwise_add_v16i8(a); +} -uint32_t __builtin_mpl_vector_dups_laneq_v4u32(uint32x4_t a, const int lane); -#define vdups_laneq_u32(a, lane) __builtin_mpl_vector_dups_laneq_v4u32(a, lane) +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpaddl_s16( + int16x4_t a) { + return __builtin_mpl_vector_pairwise_add_v4i16(a); +} -uint64_t __builtin_mpl_vector_dupd_laneq_v2u64(uint64x2_t a, const int lane); -#define vdupd_laneq_u64(a, lane) __builtin_mpl_vector_dupd_laneq_v2u64(a, lane) +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpaddlq_s16( + int16x8_t a) { + return __builtin_mpl_vector_pairwise_add_v8i16(a); +} -int8x8_t __builtin_mpl_vector_rev64_v8i8(int8x8_t a); -#define vrev64_s8(a) __builtin_mpl_vector_rev64_v8i8(a) +extern inline int64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpaddl_s32( + int32x2_t a) { + return __builtin_mpl_vector_pairwise_add_v2i32(a); +} -int8x16_t __builtin_mpl_vector_rev64q_v16i8(int8x16_t a); -#define vrev64q_s8(a) __builtin_mpl_vector_rev64q_v16i8(a) +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpaddlq_s32( + int32x4_t a) { + return __builtin_mpl_vector_pairwise_add_v4i32(a); +} -int16x4_t __builtin_mpl_vector_rev64_v4i16(int16x4_t a); -#define vrev64_s16(a) __builtin_mpl_vector_rev64_v4i16(a) +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpaddl_u8( + uint8x8_t a) { + return __builtin_mpl_vector_pairwise_add_v8u8(a); +} -int16x8_t __builtin_mpl_vector_rev64q_v8i16(int16x8_t a); -#define vrev64q_s16(a) __builtin_mpl_vector_rev64q_v8i16(a) +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpaddlq_u8( + uint8x16_t a) { + return __builtin_mpl_vector_pairwise_add_v16u8(a); +} -int32x2_t __builtin_mpl_vector_rev64_v2i32(int32x2_t a); -#define vrev64_s32(a) __builtin_mpl_vector_rev64_v2i32(a) +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpaddl_u16( + uint16x4_t a) { + return __builtin_mpl_vector_pairwise_add_v4u16(a); +} -int32x4_t __builtin_mpl_vector_rev64q_v4i32(int32x4_t a); -#define vrev64q_s32(a) __builtin_mpl_vector_rev64q_v4i32(a) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpaddlq_u16( + uint16x8_t a) { + return __builtin_mpl_vector_pairwise_add_v8u16(a); +} -uint8x8_t __builtin_mpl_vector_rev64_v8u8(uint8x8_t a); -#define vrev64_u8(a) __builtin_mpl_vector_rev64_v8u8(a) +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpaddl_u32( + uint32x2_t a) { + return __builtin_mpl_vector_pairwise_add_v2u32(a); +} -uint8x16_t __builtin_mpl_vector_rev64q_v16u8(uint8x16_t a); -#define vrev64q_u8(a) __builtin_mpl_vector_rev64q_v16u8(a) +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpaddlq_u32( + uint32x4_t a) { + return __builtin_mpl_vector_pairwise_add_v4u32(a); +} -uint16x4_t __builtin_mpl_vector_rev64_v4u16(uint16x4_t a); -#define vrev64_u16(a) __builtin_mpl_vector_rev64_v4u16(a) +// vreinterpret 8 +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_s16_s8( + int8x8_t a) { + return (int16x4_t)a; +} -uint16x8_t __builtin_mpl_vector_rev64q_v8u16(uint16x8_t a); -#define vrev64q_u16(a) __builtin_mpl_vector_rev64q_v8u16(a) +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_s32_s8( + int8x8_t a) { + return (int32x2_t)a; +} -uint32x2_t __builtin_mpl_vector_rev64_v2u32(uint32x2_t a); -#define vrev64_u32(a) __builtin_mpl_vector_rev64_v2u32(a) +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_u8_s8( + int8x8_t a) { + return (uint8x8_t)a; +} -uint32x4_t __builtin_mpl_vector_rev64q_v4u32(uint32x4_t a); -#define vrev64q_u32(a) __builtin_mpl_vector_rev64q_v4u32(a) +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_u16_s8( + int8x8_t a) { + return (uint16x4_t)a; +} -int8x8_t __builtin_mpl_vector_rev16_v8i8(int8x8_t a); -#define vrev16_s8(a) __builtin_mpl_vector_rev16_v8i8(a) +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_u32_s8( + int8x8_t a) { + return (uint32x2_t)a; +} -int8x16_t __builtin_mpl_vector_rev16q_v16i8(int8x16_t a); -#define vrev16q_s8(a) __builtin_mpl_vector_rev16q_v16i8(a) +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_u64_s8( + int8x8_t a) { + return (uint64x1_t)a; +} -uint8x8_t __builtin_mpl_vector_rev16_v8u8(uint8x8_t a); -#define vrev16_u8(a) __builtin_mpl_vector_rev16_v8u8(a) +extern inline int64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_s64_s8( + int8x8_t a) { + return (int64x1_t)a; +} -uint8x16_t __builtin_mpl_vector_rev16q_v16u8(uint8x16_t a); -#define vrev16q_u8(a) __builtin_mpl_vector_rev16q_v16u8(a) +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_s8_u8( + uint8x8_t a) { + return (int8x8_t)a; +} -int8x8_t __builtin_mpl_vector_zip1_v8i8(int8x8_t a, int8x8_t b); -#define vzip1_s8(a, b) __builtin_mpl_vector_zip1_v8i8(a, b) +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_s16_u8( + uint8x8_t a) { + return (int16x4_t)a; +} -int8x16_t __builtin_mpl_vector_zip1q_v16i8(int8x16_t a, int8x16_t b); -#define vzip1q_s8(a, b) __builtin_mpl_vector_zip1q_v16i8(a, b) +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_s32_u8( + uint8x8_t a) { + return (int32x2_t)a; +} -int16x4_t __builtin_mpl_vector_zip1_v4i16(int16x4_t a, int16x4_t b); -#define vzip1_s16(a, b) __builtin_mpl_vector_zip1_v4i16(a, b) +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_u16_u8( + uint8x8_t a) { + return (uint16x4_t)a; +} -int16x8_t __builtin_mpl_vector_zip1q_v8i16(int16x8_t a, int16x8_t b); -#define vzip1q_s16(a, b) __builtin_mpl_vector_zip1q_v8i16(a, b) +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_u32_u8( + uint8x8_t a) { + return (uint32x2_t)a; +} -int32x2_t __builtin_mpl_vector_zip1_v2i32(int32x2_t a, int32x2_t b); -#define vzip1_s32(a, b) __builtin_mpl_vector_zip1_v2i32(a, b) +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_u64_u8( + uint8x8_t a) { + return (uint64x1_t)a; +} -int32x4_t __builtin_mpl_vector_zip1q_v4i32(int32x4_t a, int32x4_t b); -#define vzip1q_s32(a, b) __builtin_mpl_vector_zip1q_v4i32(a, b) +extern inline int64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_s64_u8( + uint8x8_t a) { + return (int64x1_t)a; +} -int64x2_t __builtin_mpl_vector_zip1q_v2i64(int64x2_t a, int64x2_t b); -#define vzip1q_s64(a, b) __builtin_mpl_vector_zip1q_v2i64(a, b) +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_s16_s8( + int8x16_t a) { + return (int16x8_t)a; +} -uint8x8_t __builtin_mpl_vector_zip1_v8u8(uint8x8_t a, uint8x8_t b); -#define vzip1_u8(a, b) __builtin_mpl_vector_zip1_v8u8(a, b) +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_s32_s8( + int8x16_t a) { + return (int32x4_t)a; +} -uint8x16_t __builtin_mpl_vector_zip1q_v16u8(uint8x16_t a, uint8x16_t b); -#define vzip1q_u8(a, b) __builtin_mpl_vector_zip1q_v16u8(a, b) +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_u8_s8( + int8x16_t a) { + return (uint8x16_t)a; +} -uint16x4_t __builtin_mpl_vector_zip1_v4u16(uint16x4_t a, uint16x4_t b); -#define vzip1_u16(a, b) __builtin_mpl_vector_zip1_v4u16(a, b) +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_u16_s8( + int8x16_t a) { + return (uint16x8_t)a; +} -uint16x8_t __builtin_mpl_vector_zip1q_v8u16(uint16x8_t a, uint16x8_t b); -#define vzip1q_u16(a, b) __builtin_mpl_vector_zip1q_v8u16(a, b) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_u32_s8( + int8x16_t a) { + return (uint32x4_t)a; +} -uint32x2_t __builtin_mpl_vector_zip1_v2u32(uint32x2_t a, uint32x2_t b); -#define vzip1_u32(a, b) __builtin_mpl_vector_zip1_v2u32(a, b) +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_u64_s8( + int8x16_t a) { + return (uint64x2_t)a; +} -uint32x4_t __builtin_mpl_vector_zip1q_v4u32(uint32x4_t a, uint32x4_t b); -#define vzip1q_u32(a, b) __builtin_mpl_vector_zip1q_v4u32(a, b) +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_s64_s8( + int8x16_t a) { + return (int64x2_t)a; +} -uint64x2_t __builtin_mpl_vector_zip1q_v2u64(uint64x2_t a, uint64x2_t b); -#define vzip1q_u64(a, b) __builtin_mpl_vector_zip1q_v2u64(a, b) +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_s8_u8( + uint8x16_t a) { + return (int8x16_t)a; +} -int8x8_t __builtin_mpl_vector_zip2_v8i8(int8x8_t a, int8x8_t b); -#define vzip2_s8(a, b) __builtin_mpl_vector_zip2_v8i8(a, b) +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_s16_u8( + uint8x16_t a) { + return (int16x8_t)a; +} -int8x16_t __builtin_mpl_vector_zip2q_v16i8(int8x16_t a, int8x16_t b); -#define vzip2q_s8(a, b) __builtin_mpl_vector_zip2q_v16i8(a, b) +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_s32_u8( + uint8x16_t a) { + return (int32x4_t)a; +} -int16x4_t __builtin_mpl_vector_zip2_v4i16(int16x4_t a, int16x4_t b); -#define vzip2_s16(a, b) __builtin_mpl_vector_zip2_v4i16(a, b) +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_u16_u8( + uint8x16_t a) { + return (uint16x8_t)a; +} -int16x8_t __builtin_mpl_vector_zip2q_v8i16(int16x8_t a, int16x8_t b); -#define vzip2q_s16(a, b) __builtin_mpl_vector_zip2q_v8i16(a, b) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_u32_u8( + uint8x16_t a) { + return (uint32x4_t)a; +} -int32x2_t __builtin_mpl_vector_zip2_v2i32(int32x2_t a, int32x2_t b); -#define vzip2_s32(a, b) __builtin_mpl_vector_zip2_v2i32(a, b) +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_u64_u8( + uint8x16_t a) { + return (uint64x2_t)a; +} -int32x4_t __builtin_mpl_vector_zip2q_v4i32(int32x4_t a, int32x4_t b); -#define vzip2q_s32(a, b) __builtin_mpl_vector_zip2q_v4i32(a, b) +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_s64_u8( + uint8x16_t a) { + return (int64x2_t)a; +} -int64x2_t __builtin_mpl_vector_zip2q_v2i64(int64x2_t a, int64x2_t b); -#define vzip2q_s64(a, b) __builtin_mpl_vector_zip2q_v2i64(a, b) +extern inline float32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_f32_s8( + int8x8_t a) { + return (float32x2_t)a; +} -uint8x8_t __builtin_mpl_vector_zip2_v8u8(uint8x8_t a, uint8x8_t b); -#define vzip2_u8(a, b) __builtin_mpl_vector_zip2_v8u8(a, b) +extern inline float64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_f64_s8( + int8x8_t a) { + return (float64x1_t)a; +} -uint8x16_t __builtin_mpl_vector_zip2q_v16u8(uint8x16_t a, uint8x16_t b); -#define vzip2q_u8(a, b) __builtin_mpl_vector_zip2q_v16u8(a, b) +extern inline float32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_f32_u8( + uint8x8_t a) { + return (float32x2_t)a; +} -uint16x4_t __builtin_mpl_vector_zip2_v4u16(uint16x4_t a, uint16x4_t b); -#define vzip2_u16(a, b) __builtin_mpl_vector_zip2_v4u16(a, b) +extern inline float64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_f64_u8( + uint8x8_t a) { + return (float64x1_t)a; +} -uint16x8_t __builtin_mpl_vector_zip2q_v8u16(uint16x8_t a, uint16x8_t b); -#define vzip2q_u16(a, b) __builtin_mpl_vector_zip2q_v8u16(a, b) +extern inline float32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_f32_s8( + int8x16_t a) { + return (float32x4_t)a; +} -uint32x2_t __builtin_mpl_vector_zip2_v2u32(uint32x2_t a, uint32x2_t b); -#define vzip2_u32(a, b) __builtin_mpl_vector_zip2_v2u32(a, b) +extern inline float64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_f64_s8( + int8x16_t a) { + return (float64x2_t)a; +} -uint32x4_t __builtin_mpl_vector_zip2q_v4u32(uint32x4_t a, uint32x4_t b); -#define vzip2q_u32(a, b) __builtin_mpl_vector_zip2q_v4u32(a, b) +extern inline float32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_f32_u8( + uint8x16_t a) { + return (float32x4_t)a; +} -uint64x2_t __builtin_mpl_vector_zip2q_v2u64(uint64x2_t a, uint64x2_t b); -#define vzip2q_u64(a, b) __builtin_mpl_vector_zip2q_v2u64(a, b) +extern inline float64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_f64_u8( + uint8x16_t a) { + return (float64x2_t)a; +} -#define vzip_s8(a, b) (int8x8x2_t){vzip1_s8((a), (b)), vzip2_s8((a), (b))} -#define vzip_s16(a, b) (int16x4x2_t){vzip1_s16((a), (b)), vzip2_s16((a), (b))} -#define vzip_u8(a, b) (uint8x8x2_t){vzip1_u8((a), (b)), vzip2_u8((a), (b))} -#define vzip_u16(a, b) (uint16x4x2_t){vzip1_u16((a), (b)), vzip2_u16((a), (b))} -#define vzip_s32(a, b) (int32x2x2_t){vzip1_s32((a), (b)), vzip2_s32((a), (b))} -#define vzip_u32(a, b) (uint32x2x2_t){vzip1_u32((a), (b)), vzip2_u32((a), (b))} -#define vzipq_s8(a, b) (int8x16x2_t){vzip1q_s8((a), (b)), vzip2q_s8((a), (b))} -#define vzipq_s16(a, b) (int16x8x2_t){vzip1q_s16((a), (b)), vzip2q_s16((a), (b))} -#define vzipq_s32(a, b) (int32x4x2_t){vzip1q_s32((a), (b)), vzip2q_s32((a), (b))} -#define vzipq_u8(a, b) (uint8x16x2_t){vzip1q_u8((a), (b)), vzip2q_u8((a), (b))} -#define vzipq_u16(a, b) (uint16x8x2_t){vzip1q_u16((a), (b)), vzip2q_u16((a), (b))} -#define vzipq_u32(a, b) (uint32x4x2_t){vzip1q_u32((a), (b)), vzip2q_u32((a), (b))} +// vreinterpret 16 +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_s8_s16( + int16x4_t a) { + return (int8x8_t)a; +} -int8x8_t __builtin_mpl_vector_uzp1_v8i8(int8x8_t a, int8x8_t b); -#define vuzp1_s8(a, b) __builtin_mpl_vector_uzp1_v8i8(a, b) +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_s32_s16( + int16x4_t a) { + return (int32x2_t)a; +} -int8x16_t __builtin_mpl_vector_uzp1q_v16i8(int8x16_t a, int8x16_t b); -#define vuzp1q_s8(a, b) __builtin_mpl_vector_uzp1q_v16i8(a, b) +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_u8_s16( + int16x4_t a) { + return (uint8x8_t)a; +} -int16x4_t __builtin_mpl_vector_uzp1_v4i16(int16x4_t a, int16x4_t b); -#define vuzp1_s16(a, b) __builtin_mpl_vector_uzp1_v4i16(a, b) +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_u16_s16( + int16x4_t a) { + return (uint16x4_t)a; +} -int16x8_t __builtin_mpl_vector_uzp1q_v8i16(int16x8_t a, int16x8_t b); -#define vuzp1q_s16(a, b) __builtin_mpl_vector_uzp1q_v8i16(a, b) +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_u32_s16( + int16x4_t a) { + return (uint32x2_t)a; +} -int32x2_t __builtin_mpl_vector_uzp1_v2i32(int32x2_t a, int32x2_t b); -#define vuzp1_s32(a, b) __builtin_mpl_vector_uzp1_v2i32(a, b) +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_u64_s16( + int16x4_t a) { + return (uint64x1_t)a; +} -int32x4_t __builtin_mpl_vector_uzp1q_v4i32(int32x4_t a, int32x4_t b); -#define vuzp1q_s32(a, b) __builtin_mpl_vector_uzp1q_v4i32(a, b) +extern inline int64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_s64_s16( + int16x4_t a) { + return (int64x1_t)a; +} -int64x2_t __builtin_mpl_vector_uzp1q_v2i64(int64x2_t a, int64x2_t b); -#define vuzp1q_s64(a, b) __builtin_mpl_vector_uzp1q_v2i64(a, b) +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_s8_u16( + uint16x4_t a) { + return (int8x8_t)a; +} -uint8x8_t __builtin_mpl_vector_uzp1_v8u8(uint8x8_t a, uint8x8_t b); -#define vuzp1_u8(a, b) __builtin_mpl_vector_uzp1_v8u8(a, b) +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_s16_u16( + uint16x4_t a) { + return (int16x4_t)a; +} -uint8x16_t __builtin_mpl_vector_uzp1q_v16u8(uint8x16_t a, uint8x16_t b); -#define vuzp1q_u8(a, b) __builtin_mpl_vector_uzp1q_v16u8(a, b) +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_s32_u16( + uint16x4_t a) { + return (int32x2_t)a; +} -uint16x4_t __builtin_mpl_vector_uzp1_v4u16(uint16x4_t a, uint16x4_t b); -#define vuzp1_u16(a, b) __builtin_mpl_vector_uzp1_v4u16(a, b) +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_u8_u16( + uint16x4_t a) { + return (uint8x8_t)a; +} -uint16x8_t __builtin_mpl_vector_uzp1q_v8u16(uint16x8_t a, uint16x8_t b); -#define vuzp1q_u16(a, b) __builtin_mpl_vector_uzp1q_v8u16(a, b) +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_u32_u16( + uint16x4_t a) { + return (uint32x2_t)a; +} -uint32x2_t __builtin_mpl_vector_uzp1_v2u32(uint32x2_t a, uint32x2_t b); -#define vuzp1_u32(a, b) __builtin_mpl_vector_uzp1_v2u32(a, b) +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_u64_u16( + uint16x4_t a) { + return (uint64x1_t)a; +} -uint32x4_t __builtin_mpl_vector_uzp1q_v4u32(uint32x4_t a, uint32x4_t b); -#define vuzp1q_u32(a, b) __builtin_mpl_vector_uzp1q_v4u32(a, b) +extern inline int64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_s64_u16( + uint16x4_t a) { + return (int64x1_t)a; +} -uint64x2_t __builtin_mpl_vector_uzp1q_v2u64(uint64x2_t a, uint64x2_t b); -#define vuzp1q_u64(a, b) __builtin_mpl_vector_uzp1q_v2u64(a, b) +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_s8_u16( + uint16x8_t a) { + return (int8x16_t)a; +} -int8x8_t __builtin_mpl_vector_uzp2_v8i8(int8x8_t a, int8x8_t b); -#define vuzp2_s8(a, b) __builtin_mpl_vector_uzp2_v8i8(a, b) +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_s16_u16( + uint16x8_t a) { + return (int16x8_t)a; +} -int8x16_t __builtin_mpl_vector_uzp2q_v16i8(int8x16_t a, int8x16_t b); -#define vuzp2q_s8(a, b) __builtin_mpl_vector_uzp2q_v16i8(a, b) +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_s32_u16( + uint16x8_t a) { + return (int32x4_t)a; +} -int16x4_t __builtin_mpl_vector_uzp2_v4i16(int16x4_t a, int16x4_t b); -#define vuzp2_s16(a, b) __builtin_mpl_vector_uzp2_v4i16(a, b) +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_u8_u16( + uint16x8_t a) { + return (uint8x16_t)a; +} -int16x8_t __builtin_mpl_vector_uzp2q_v8i16(int16x8_t a, int16x8_t b); -#define vuzp2q_s16(a, b) __builtin_mpl_vector_uzp2q_v8i16(a, b) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_u32_u16( + uint16x8_t a) { + return (uint32x4_t)a; +} -int32x2_t __builtin_mpl_vector_uzp2_v2i32(int32x2_t a, int32x2_t b); -#define vuzp2_s32(a, b) __builtin_mpl_vector_uzp2_v2i32(a, b) +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_u64_u16( + uint16x8_t a) { + return (uint64x2_t)a; +} -int32x4_t __builtin_mpl_vector_uzp2q_v4i32(int32x4_t a, int32x4_t b); -#define vuzp2q_s32(a, b) __builtin_mpl_vector_uzp2q_v4i32(a, b) +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_s64_u16( + uint16x8_t a) { + return (int64x2_t)a; +} -int64x2_t __builtin_mpl_vector_uzp2q_v2i64(int64x2_t a, int64x2_t b); -#define vuzp2q_s64(a, b) __builtin_mpl_vector_uzp2q_v2i64(a, b) +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_s8_s16( + int16x8_t a) { + return (int8x16_t)a; +} -uint8x8_t __builtin_mpl_vector_uzp2_v8u8(uint8x8_t a, uint8x8_t b); -#define vuzp2_u8(a, b) __builtin_mpl_vector_uzp2_v8u8(a, b) +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_s32_s16( + int16x8_t a) { + return (int32x4_t)a; +} -uint8x16_t __builtin_mpl_vector_uzp2q_v16u8(uint8x16_t a, uint8x16_t b); -#define vuzp2q_u8(a, b) __builtin_mpl_vector_uzp2q_v16u8(a, b) +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_u8_s16( + int16x8_t a) { + return (uint8x16_t)a; +} -uint16x4_t __builtin_mpl_vector_uzp2_v4u16(uint16x4_t a, uint16x4_t b); -#define vuzp2_u16(a, b) __builtin_mpl_vector_uzp2_v4u16(a, b) +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_u16_s16( + int16x8_t a) { + return (uint16x8_t)a; +} -uint16x8_t __builtin_mpl_vector_uzp2q_v8u16(uint16x8_t a, uint16x8_t b); -#define vuzp2q_u16(a, b) __builtin_mpl_vector_uzp2q_v8u16(a, b) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_u32_s16( + int16x8_t a) { + return (uint32x4_t)a; +} -uint32x2_t __builtin_mpl_vector_uzp2_v2u32(uint32x2_t a, uint32x2_t b); -#define vuzp2_u32(a, b) __builtin_mpl_vector_uzp2_v2u32(a, b) +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_u64_s16( + int16x8_t a) { + return (uint64x2_t)a; +} -uint32x4_t __builtin_mpl_vector_uzp2q_v4u32(uint32x4_t a, uint32x4_t b); -#define vuzp2q_u32(a, b) __builtin_mpl_vector_uzp2q_v4u32(a, b) +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_s64_s16( + int16x8_t a) { + return (int64x2_t)a; +} -uint64x2_t __builtin_mpl_vector_uzp2q_v2u64(uint64x2_t a, uint64x2_t b); -#define vuzp2q_u64(a, b) __builtin_mpl_vector_uzp2q_v2u64(a, b) +extern inline float32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_f32_s16( + int16x4_t a) { + return (float32x2_t)a; +} -#define vuzp_s8(a, b) (int8x8x2_t){vuzp1_s8((a), (b)), vuzp2_s8((a), (b))} -#define vuzp_s16(a, b) (int16x4x2_t){vuzp1_s16((a), (b)), vuzp2_s16((a), (b))} -#define vuzp_s32(a, b) (int32x2x2_t){vuzp1_s32((a), (b)), vuzp2_s32((a), (b))} -#define vuzp_u8(a, b) (uint8x8x2_t){vuzp1_u8((a), (b)), vuzp2_u8((a), (b))} -#define vuzp_u16(a, b) (uint16x4x2_t){vuzp1_u16((a), (b)), vuzp2_u16((a), (b))} -#define vuzp_u32(a, b) (uint32x2x2_t){vuzp1_u32((a), (b)), vuzp2_u32((a), (b))} -#define vuzpq_s8(a, b) (int8x16x2_t){vuzp1q_s8((a), (b)), vuzp2q_s8((a), (b))} -#define vuzpq_s16(a, b) (int16x8x2_t){vuzp1q_s16((a), (b)), vuzp2q_s16((a), (b))} -#define vuzpq_s32(a, b) (int32x4x2_t){vuzp1q_s32((a), (b)), vuzp2q_s32((a), (b))} -#define vuzpq_u8(a, b) (uint8x16x2_t){vuzp1q_u8((a), (b)), vuzp2q_u8((a), (b))} -#define vuzpq_u16(a, b) (uint16x8x2_t){vuzp1q_u16((a), (b)), vuzp2q_u16((a), (b))} -#define vuzpq_u32(a, b) (uint32x4x2_t){vuzp1q_u32((a), (b)), vuzp2q_u32((a), (b))} +extern inline float64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_f64_s16( + int16x4_t a) { + return (float64x1_t)a; +} -int8x8_t __builtin_mpl_vector_trn1_v8i8(int8x8_t a, int8x8_t b); -#define vtrn1_s8(a, b) __builtin_mpl_vector_trn1_v8i8(a, b) +extern inline float32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_f32_u16( + uint16x4_t a) { + return (float32x2_t)a; +} -int8x16_t __builtin_mpl_vector_trn1q_v16i8(int8x16_t a, int8x16_t b); -#define vtrn1q_s8(a, b) __builtin_mpl_vector_trn1q_v16i8(a, b) +extern inline float64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_f64_u16( + uint16x4_t a) { + return (float64x1_t)a; +} -int16x4_t __builtin_mpl_vector_trn1_v4i16(int16x4_t a, int16x4_t b); -#define vtrn1_s16(a, b) __builtin_mpl_vector_trn1_v4i16(a, b) +extern inline float32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) +vreinterpretq_f32_s16(int16x8_t a) { + return (float32x4_t)a; +} -int16x8_t __builtin_mpl_vector_trn1q_v8i16(int16x8_t a, int16x8_t b); -#define vtrn1q_s16(a, b) __builtin_mpl_vector_trn1q_v8i16(a, b) +extern inline float64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) +vreinterpretq_f64_s16(int16x8_t a) { + return (float64x2_t)a; +} -int32x2_t __builtin_mpl_vector_trn1_v2i32(int32x2_t a, int32x2_t b); -#define vtrn1_s32(a, b) __builtin_mpl_vector_trn1_v2i32(a, b) +extern inline float32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) +vreinterpretq_f32_u16(uint16x8_t a) { + return (float32x4_t)a; +} -int32x4_t __builtin_mpl_vector_trn1q_v4i32(int32x4_t a, int32x4_t b); -#define vtrn1q_s32(a, b) __builtin_mpl_vector_trn1q_v4i32(a, b) +extern inline float64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) +vreinterpretq_f64_u16(uint16x8_t a) { + return (float64x2_t)a; +} -int64x2_t __builtin_mpl_vector_trn1q_v2i64(int64x2_t a, int64x2_t b); -#define vtrn1q_s64(a, b) __builtin_mpl_vector_trn1q_v2i64(a, b) +// vreinterpret 32 +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_s8_s32( + int32x2_t a) { + return (int8x8_t)a; +} -uint8x8_t __builtin_mpl_vector_trn1_v8u8(uint8x8_t a, uint8x8_t b); -#define vtrn1_u8(a, b) __builtin_mpl_vector_trn1_v8u8(a, b) +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_s16_s32( + int32x2_t a) { + return (int16x4_t)a; +} -uint8x16_t __builtin_mpl_vector_trn1q_v16u8(uint8x16_t a, uint8x16_t b); -#define vtrn1q_u8(a, b) __builtin_mpl_vector_trn1q_v16u8(a, b) +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_u8_s32( + int32x2_t a) { + return (uint8x8_t)a; +} -uint16x4_t __builtin_mpl_vector_trn1_v4u16(uint16x4_t a, uint16x4_t b); -#define vtrn1_u16(a, b) __builtin_mpl_vector_trn1_v4u16(a, b) +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_u16_s32( + int32x2_t a) { + return (uint16x4_t)a; +} -uint16x8_t __builtin_mpl_vector_trn1q_v8u16(uint16x8_t a, uint16x8_t b); -#define vtrn1q_u16(a, b) __builtin_mpl_vector_trn1q_v8u16(a, b) +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_u32_s32( + int32x2_t a) { + return (uint32x2_t)a; +} -uint32x2_t __builtin_mpl_vector_trn1_v2u32(uint32x2_t a, uint32x2_t b); -#define vtrn1_u32(a, b) __builtin_mpl_vector_trn1_v2u32(a, b) +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_u64_s32( + int32x2_t a) { + return (uint64x1_t)a; +} -uint32x4_t __builtin_mpl_vector_trn1q_v4u32(uint32x4_t a, uint32x4_t b); -#define vtrn1q_u32(a, b) __builtin_mpl_vector_trn1q_v4u32(a, b) +extern inline int64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_s64_s32( + int32x2_t a) { + return (int64x1_t)a; +} -uint64x2_t __builtin_mpl_vector_trn1q_v2u64(uint64x2_t a, uint64x2_t b); -#define vtrn1q_u64(a, b) __builtin_mpl_vector_trn1q_v2u64(a, b) +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_s8_u32( + uint32x2_t a) { + return (int8x8_t)a; +} -int8x8_t __builtin_mpl_vector_trn2_v8i8(int8x8_t a, int8x8_t b); -#define vtrn2_s8(a, b) __builtin_mpl_vector_trn2_v8i8(a, b) +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_s16_u32( + uint32x2_t a) { + return (int16x4_t)a; +} -int8x16_t __builtin_mpl_vector_trn2q_v16i8(int8x16_t a, int8x16_t b); -#define vtrn2q_s8(a, b) __builtin_mpl_vector_trn2q_v16i8(a, b) +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_s32_u32( + uint32x2_t a) { + return (int32x2_t)a; +} -int16x4_t __builtin_mpl_vector_trn2_v4i16(int16x4_t a, int16x4_t b); -#define vtrn2_s16(a, b) __builtin_mpl_vector_trn2_v4i16(a, b) +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_u8_u32( + uint32x2_t a) { + return (uint8x8_t)a; +} -int16x8_t __builtin_mpl_vector_trn2q_v8i16(int16x8_t a, int16x8_t b); -#define vtrn2q_s16(a, b) __builtin_mpl_vector_trn2q_v8i16(a, b) +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_u16_u32( + uint32x2_t a) { + return (uint16x4_t)a; +} -int32x2_t __builtin_mpl_vector_trn2_v2i32(int32x2_t a, int32x2_t b); -#define vtrn2_s32(a, b) __builtin_mpl_vector_trn2_v2i32(a, b) +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_u64_u32( + uint32x2_t a) { + return (uint64x1_t)a; +} -int32x4_t __builtin_mpl_vector_trn2q_v4i32(int32x4_t a, int32x4_t b); -#define vtrn2q_s32(a, b) __builtin_mpl_vector_trn2q_v4i32(a, b) +extern inline int64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_s64_u32( + uint32x2_t a) { + return (int64x1_t)a; +} -int64x2_t __builtin_mpl_vector_trn2q_v2i64(int64x2_t a, int64x2_t b); -#define vtrn2q_s64(a, b) __builtin_mpl_vector_trn2q_v2i64(a, b) +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_s8_s32( + int32x4_t a) { + return (int8x16_t)a; +} -uint8x8_t __builtin_mpl_vector_trn2_v8u8(uint8x8_t a, uint8x8_t b); -#define vtrn2_u8(a, b) __builtin_mpl_vector_trn2_v8u8(a, b) +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_s16_s32( + int32x4_t a) { + return (int16x8_t)a; +} -uint8x16_t __builtin_mpl_vector_trn2q_v16u8(uint8x16_t a, uint8x16_t b); -#define vtrn2q_u8(a, b) __builtin_mpl_vector_trn2q_v16u8(a, b) +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_u8_s32( + int32x4_t a) { + return (uint8x16_t)a; +} -uint16x4_t __builtin_mpl_vector_trn2_v4u16(uint16x4_t a, uint16x4_t b); -#define vtrn2_u16(a, b) __builtin_mpl_vector_trn2_v4u16(a, b) +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_u16_s32( + int32x4_t a) { + return (uint16x8_t)a; +} -uint16x8_t __builtin_mpl_vector_trn2q_v8u16(uint16x8_t a, uint16x8_t b); -#define vtrn2q_u16(a, b) __builtin_mpl_vector_trn2q_v8u16(a, b) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_u32_s32( + int32x4_t a) { + return (uint32x4_t)a; +} -uint32x2_t __builtin_mpl_vector_trn2_v2u32(uint32x2_t a, uint32x2_t b); -#define vtrn2_u32(a, b) __builtin_mpl_vector_trn2_v2u32(a, b) +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_u64_s32( + int32x4_t a) { + return (uint64x2_t)a; +} -uint32x4_t __builtin_mpl_vector_trn2q_v4u32(uint32x4_t a, uint32x4_t b); -#define vtrn2q_u32(a, b) __builtin_mpl_vector_trn2q_v4u32(a, b) +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_s64_s32( + int32x4_t a) { + return (int64x2_t)a; +} -uint64x2_t __builtin_mpl_vector_trn2q_v2u64(uint64x2_t a, uint64x2_t b); -#define vtrn2q_u64(a, b) __builtin_mpl_vector_trn2q_v2u64(a, b) +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_s8_u32( + uint32x4_t a) { + return (int8x16_t)a; +} -#define vtrn_s8(a, b) (int8x8x2_t){vtrn1_s8((a), (b)), vtrn2_s8((a), (b))} -#define vtrn_s16(a, b) (int16x4x2_t){vtrn1_s16((a), (b)), vtrn2_s16((a), (b))} -#define vtrn_s32(a, b) (int32x2x2_t){vtrn1_s32((a), (b)), vtrn2_s32((a), (b))} -#define vtrn_u8(a, b) (uint8x8x2_t){vtrn1_u8((a), (b)), vtrn2_u8((a), (b))} -#define vtrn_u16(a, b) (uint16x4x2_t){vtrn1_u16((a), (b)), vtrn2_u16((a), (b))} -#define vtrn_u32(a, b) (uint32x2x2_t){vtrn1_u32((a), (b)), vtrn2_u32((a), (b))} -#define vtrnq_s8(a, b) (int8x16x2_t){vtrn1q_s8((a), (b)), vtrn2q_s8((a), (b))} -#define vtrnq_s16(a, b) (int16x8x2_t){vtrn1q_s16((a), (b)), vtrn2q_s16((a), (b))} -#define vtrnq_s32(a, b) (int32x4x2_t){vtrn1q_s32((a), (b)), vtrn2q_s32((a), (b))} -#define vtrnq_u8(a, b) (uint8x16x2_t){vtrn1q_u8((a), (b)), vtrn2q_u8((a), (b))} -#define vtrnq_u16(a, b) (uint16x8x2_t){vtrn1q_u16((a), (b)), vtrn2q_u16((a), (b))} -#define vtrnq_u32(a, b) (uint32x4x2_t){vtrn1q_u32((a), (b)), vtrn2q_u32((a), (b))} +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_s16_u32( + uint32x4_t a) { + return (int16x8_t)a; +} -int8x8_t __builtin_mpl_vector_ld1_i8v8(int8_t const *ptr); -#define vld1_s8(ptr) __builtin_mpl_vector_ld1_i8v8(ptr) +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_s32_u32( + uint32x4_t a) { + return (int32x4_t)a; +} -int8x16_t __builtin_mpl_vector_ld1q_i8v16(int8_t const *ptr); -#define vld1q_s8(ptr) __builtin_mpl_vector_ld1q_i8v16(ptr) +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_u8_u32( + uint32x4_t a) { + return (uint8x16_t)a; +} -int16x4_t __builtin_mpl_vector_ld1_i16v4(int16_t const *ptr); -#define vld1_s16(ptr) __builtin_mpl_vector_ld1_i16v4(ptr) +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_u16_u32( + uint32x4_t a) { + return (uint16x8_t)a; +} -int16x8_t __builtin_mpl_vector_ld1q_i16v8(int16_t const *ptr); -#define vld1q_s16(ptr) __builtin_mpl_vector_ld1q_i16v8(ptr) +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_u64_u32( + uint32x4_t a) { + return (uint64x2_t)a; +} -int32x2_t __builtin_mpl_vector_ld1_i32v2(int32_t const *ptr); -#define vld1_s32(ptr) __builtin_mpl_vector_ld1_i32v2(ptr) +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_s64_u32( + uint32x4_t a) { + return (int64x2_t)a; +} -int32x4_t __builtin_mpl_vector_ld1q_i32v4(int32_t const *ptr); -#define vld1q_s32(ptr) __builtin_mpl_vector_ld1q_i32v4(ptr) +extern inline float32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_f32_s32( + int32x2_t a) { + return (float32x2_t)a; +} -int64x1_t __builtin_mpl_vector_ld1_i64v1(int64_t const *ptr); -#define vld1_s64(ptr) __builtin_mpl_vector_ld1_i64v1(ptr) +extern inline float64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_f64_s32( + int32x2_t a) { + return (float64x1_t)a; +} -int64x2_t __builtin_mpl_vector_ld1q_i64v2(int64_t const *ptr); -#define vld1q_s64(ptr) __builtin_mpl_vector_ld1q_i64v2(ptr) +extern inline float32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_f32_u32( + uint32x2_t a) { + return (float32x2_t)a; +} -uint8x8_t __builtin_mpl_vector_ld1_u8v8(uint8_t const *ptr); -#define vld1_u8(ptr) __builtin_mpl_vector_ld1_u8v8(ptr) +extern inline float64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_f64_u32( + uint32x2_t a) { + return (float64x1_t)a; +} -uint8x16_t __builtin_mpl_vector_ld1q_u8v16(uint8_t const *ptr); -#define vld1q_u8(ptr) __builtin_mpl_vector_ld1q_u8v16(ptr) +extern inline float32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) +vreinterpretq_f32_s32(int32x4_t a) { + return (float32x4_t)a; +} -uint16x4_t __builtin_mpl_vector_ld1_u16v4(uint16_t const *ptr); -#define vld1_u16(ptr) __builtin_mpl_vector_ld1_u16v4(ptr) +extern inline float64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) +vreinterpretq_f64_s32(int32x4_t a) { + return (float64x2_t)a; +} -uint16x8_t __builtin_mpl_vector_ld1q_u16v8(uint16_t const *ptr); -#define vld1q_u16(ptr) __builtin_mpl_vector_ld1q_u16v8(ptr) +extern inline float32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) +vreinterpretq_f32_u32(uint32x4_t a) { + return (float32x4_t)a; +} -uint32x2_t __builtin_mpl_vector_ld1_u32v2(uint32_t const *ptr); -#define vld1_u32(ptr) __builtin_mpl_vector_ld1_u32v2(ptr) +extern inline float64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) +vreinterpretq_f64_u32(uint32x4_t a) { + return (float64x2_t)a; +} -uint32x4_t __builtin_mpl_vector_ld1q_u32v4(uint32_t const *ptr); -#define vld1q_u32(ptr) __builtin_mpl_vector_ld1q_u32v4(ptr) +// vreinterpret 64 +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_s8_s64( + int64x1_t a) { + return (int8x8_t)a; +} -uint64x1_t __builtin_mpl_vector_ld1_u64v1(uint64_t const *ptr); -#define vld1_u64(ptr) __builtin_mpl_vector_ld1_u64v1(ptr) +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_s16_s64( + int64x1_t a) { + return (int16x4_t)a; +} -uint64x2_t __builtin_mpl_vector_ld1q_u64v2(uint64_t const *ptr); -#define vld1q_u64(ptr) __builtin_mpl_vector_ld1q_u64v2(ptr) +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_s32_s64( + int64x1_t a) { + return (int32x2_t)a; +} -int8x8_t __builtin_mpl_vector_ld1_lane_i8v8(int8_t const *ptr, int8x8_t src, const int lane); -#define vld1_lane_s8(ptr, src, lane) __builtin_mpl_vector_ld1_lane_i8v8(ptr, src, lane) +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_u8_s64( + int64x1_t a) { + return (uint8x8_t)a; +} -int8x16_t __builtin_mpl_vector_ld1q_lane_i8v16(int8_t const *ptr, int8x16_t src, const int lane); -#define vld1q_lane_s8(ptr, src, lane) __builtin_mpl_vector_ld1q_lane_i8v16(ptr, src, lane) +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_u16_s64( + int64x1_t a) { + return (uint16x4_t)a; +} -int16x4_t __builtin_mpl_vector_ld1_lane_i16v4(int16_t const *ptr, int16x4_t src, const int lane); -#define vld1_lane_s16(ptr, src, lane) __builtin_mpl_vector_ld1_lane_i16v4(ptr, src, lane) +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_u32_s64( + int64x1_t a) { + return (uint32x2_t)a; +} -int16x8_t __builtin_mpl_vector_ld1q_lane_i16v8(int16_t const *ptr, int16x8_t src, const int lane); -#define vld1q_lane_s16(ptr, src, lane) __builtin_mpl_vector_ld1q_lane_i16v8(ptr, src, lane) +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_u64_s64( + int64x1_t a) { + return (uint64x1_t)a; +} -int32x2_t __builtin_mpl_vector_ld1_lane_i32v2(int32_t const *ptr, int32x2_t src, const int lane); -#define vld1_lane_s32(ptr, src, lane) __builtin_mpl_vector_ld1_lane_i32v2(ptr, src, lane) +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_s8_u64( + uint64x1_t a) { + return (int8x8_t)a; +} -int32x4_t __builtin_mpl_vector_ld1q_lane_i32v4(int32_t const *ptr, int32x4_t src, const int lane); -#define vld1q_lane_s32(ptr, src, lane) __builtin_mpl_vector_ld1q_lane_i32v4(ptr, src, lane) +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_s16_u64( + uint64x1_t a) { + return (int16x4_t)a; +} -int64x1_t __builtin_mpl_vector_ld1_lane_i64v1(int64_t const *ptr, int64x1_t src, const int lane); -#define vld1_lane_s64(ptr, src, lane) __builtin_mpl_vector_ld1_lane_i64v1(ptr, src, lane) +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_s32_u64( + uint64x1_t a) { + return (int32x2_t)a; +} -int64x2_t __builtin_mpl_vector_ld1q_lane_i64v2(int64_t const *ptr, int64x2_t src, const int lane); -#define vld1q_lane_s64(ptr, src, lane) __builtin_mpl_vector_ld1q_lane_i64v2(ptr, src, lane) +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_u8_u64( + uint64x1_t a) { + return (uint8x8_t)a; +} -uint8x8_t __builtin_mpl_vector_ld1_lane_u8v8(uint8_t const *ptr, uint8x8_t src, const int lane); -#define vld1_lane_u8(ptr, src, lane) __builtin_mpl_vector_ld1_lane_u8v8(ptr, src, lane) +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_u16_u64( + uint64x1_t a) { + return (uint16x4_t)a; +} +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_u32_u64( + uint64x1_t a) { + return (uint32x2_t)a; +} -uint8x16_t __builtin_mpl_vector_ld1q_lane_u8v16(uint8_t const *ptr, uint8x16_t src, const int lane); -#define vld1q_lane_u8(ptr, src, lane) __builtin_mpl_vector_ld1q_lane_u8v16(ptr, src, lane) +extern inline int64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_s64_u64( + uint64x1_t a) { + return (int64x1_t)a; +} -uint16x4_t __builtin_mpl_vector_ld1_lane_u16v4(uint16_t const *ptr, uint16x4_t src, const int lane); -#define vld1_lane_u16(ptr, src, lane) __builtin_mpl_vector_ld1_lane_u16v4(ptr, src, lane) +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_s8_s64( + int64x2_t a) { + return (int8x16_t)a; +} -uint16x8_t __builtin_mpl_vector_ld1q_lane_u16v8(uint16_t const *ptr, uint16x8_t src, const int lane); -#define vld1q_lane_u16(ptr, src, lane) __builtin_mpl_vector_ld1q_lane_u16v8(ptr, src, lane) +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_s16_s64( + int64x2_t a) { + return (int16x8_t)a; +} -uint32x2_t __builtin_mpl_vector_ld1_lane_u32v2(uint32_t const *ptr, uint32x2_t src, const int lane); -#define vld1_lane_u32(ptr, src, lane) __builtin_mpl_vector_ld1_lane_u32v2(ptr, src, lane) +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_s32_s64( + int64x2_t a) { + return (int32x4_t)a; +} -uint32x4_t __builtin_mpl_vector_ld1q_lane_u32v4(uint32_t const *ptr, uint32x4_t src, const int lane); -#define vld1q_lane_u32(ptr, src, lane) __builtin_mpl_vector_ld1q_lane_u32v4(ptr, src, lane) +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_u8_s64( + int64x2_t a) { + return (uint8x16_t)a; +} -uint64x1_t __builtin_mpl_vector_ld1_lane_u64v1(uint64_t const *ptr, uint64x1_t src, const int lane); -#define vld1_lane_u64(ptr, src, lane) __builtin_mpl_vector_ld1_lane_u64v1(ptr, src, lane) +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_u16_s64( + int64x2_t a) { + return (uint16x8_t)a; +} -uint64x2_t __builtin_mpl_vector_ld1q_lane_u64v2(uint64_t const *ptr, uint64x2_t src, const int lane); -#define vld1q_lane_u64(ptr, src, lane) __builtin_mpl_vector_ld1q_lane_u64v2(ptr, src, lane) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_u32_s64( + int64x2_t a) { + return (uint32x4_t)a; +} -int8x8_t __builtin_mpl_vector_ld1_dup_i8v8(int8_t const *ptr); -#define vld1_dup_s8(ptr) __builtin_mpl_vector_ld1_dup_i8v8(ptr) +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_u64_s64( + int64x2_t a) { + return (uint64x2_t)a; +} -int8x16_t __builtin_mpl_vector_ld1q_dup_i8v16(int8_t const *ptr); -#define vld1q_dup_s8(ptr) __builtin_mpl_vector_ld1q_dup_i8v16(ptr) +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_s8_u64( + uint64x2_t a) { + return (int8x16_t)a; +} -int16x4_t __builtin_mpl_vector_ld1_dup_i16v4(int16_t const *ptr); -#define vld1_dup_s16(ptr) __builtin_mpl_vector_ld1_dup_i16v4(ptr) +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_s16_u64( + uint64x2_t a) { + return (int16x8_t)a; +} -int16x8_t __builtin_mpl_vector_ld1q_dup_i16v8(int16_t const *ptr); -#define vld1q_dup_s16(ptr) __builtin_mpl_vector_ld1q_dup_i16v8(ptr) +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_s32_u64( + uint64x2_t a) { + return (int32x4_t)a; +} -int32x2_t __builtin_mpl_vector_ld1_dup_i32v2(int32_t const *ptr); -#define vld1_dup_s32(ptr) __builtin_mpl_vector_ld1_dup_i32v2(ptr) +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_u8_u64( + uint64x2_t a) { + return (uint8x16_t)a; +} -int32x4_t __builtin_mpl_vector_ld1q_dup_i32v4(int32_t const *ptr); -#define vld1q_dup_s32(ptr) __builtin_mpl_vector_ld1q_dup_i32v4(ptr) +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_u16_u64( + uint64x2_t a) { + return (uint16x8_t)a; +} -int64x1_t __builtin_mpl_vector_ld1_dup_i64v1(int64_t const *ptr); -#define vld1_dup_s64(ptr) __builtin_mpl_vector_ld1_dup_i64v1(ptr) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_u32_u64( + uint64x2_t a) { + return (uint32x4_t)a; +} -int64x2_t __builtin_mpl_vector_ld1q_dup_i64v2(int64_t const *ptr); -#define vld1q_dup_s64(ptr) __builtin_mpl_vector_ld1q_dup_i64v2(ptr) +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpretq_s64_u64( + uint64x2_t a) { + return (int64x2_t)a; +} -uint8x8_t __builtin_mpl_vector_ld1_dup_u8v8(uint8_t const *ptr); -#define vld1_dup_u8(ptr) __builtin_mpl_vector_ld1_dup_u8v8(ptr) +extern inline float32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_f32_s64( + int64x1_t a) { + return (float32x2_t)a; +} -uint8x16_t __builtin_mpl_vector_ld1q_dup_u8v16(uint8_t const *ptr); -#define vld1q_dup_u8(ptr) __builtin_mpl_vector_ld1q_dup_u8v16(ptr) +extern inline float64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_f64_s64( + int64x1_t a) { + return (float64x1_t)a; +} -uint16x4_t __builtin_mpl_vector_ld1_dup_u16v4(uint16_t const *ptr); -#define vld1_dup_u16(ptr) __builtin_mpl_vector_ld1_dup_u16v4(ptr) +extern inline float32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_f32_u64( + uint64x1_t a) { + return (float32x2_t)a; +} -uint16x8_t __builtin_mpl_vector_ld1q_dup_u16v8(uint16_t const *ptr); -#define vld1q_dup_u16(ptr) __builtin_mpl_vector_ld1q_dup_u16v8(ptr) +extern inline float64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vreinterpret_f64_u64( + uint64x1_t a) { + return (float64x1_t)a; +} -uint32x2_t __builtin_mpl_vector_ld1_dup_u32v2(uint32_t const *ptr); -#define vld1_dup_u32(ptr) __builtin_mpl_vector_ld1_dup_u32v2(ptr) +extern inline float32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) +vreinterpretq_f32_s64(int64x2_t a) { + return (float32x4_t)a; +} -uint32x4_t __builtin_mpl_vector_ld1q_dup_u32v4(uint32_t const *ptr); -#define vld1q_dup_u32(ptr) __builtin_mpl_vector_ld1q_dup_u32v4(ptr) +extern inline float64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) +vreinterpretq_f64_s64(int64x2_t a) { + return (float64x2_t)a; +} -uint64x1_t __builtin_mpl_vector_ld1_dup_u64v1(uint64_t const *ptr); -#define vld1_dup_u64(ptr) __builtin_mpl_vector_ld1_dup_u64v1(ptr) +extern inline float32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) +vreinterpretq_f32_u64(uint64x2_t a) { + return (float32x4_t)a; +} -uint64x2_t __builtin_mpl_vector_ld1q_dup_u64v2(uint64_t const *ptr); -#define vld1q_dup_u64(ptr) __builtin_mpl_vector_ld1q_dup_u64v2(ptr) +extern inline float64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) +vreinterpretq_f64_u64(uint64x2_t a) { + return (float64x2_t)a; +} -int8x8x2_t __builtin_mpl_vector_ld2_i8v8(int8_t const *ptr); -#define vld2_s8(ptr) __builtin_mpl_vector_ld2_i8v8(ptr) +// vrev32 +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrev32_s8( + int8x8_t vec) { + return __builtin_mpl_vector_reverse_v8i8(vec); +} -int8x16x2_t __builtin_mpl_vector_ld2q_i8v16(int8_t const *ptr); -#define vld2q_s8(ptr) __builtin_mpl_vector_ld2q_i8v16(ptr) +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrev32q_s8( + int8x16_t vec) { + return __builtin_mpl_vector_reverse_v16i8(vec); +} -int16x4x2_t __builtin_mpl_vector_ld2_i16v4(int16_t const *ptr); -#define vld2_s16(ptr) __builtin_mpl_vector_ld2_i16v4(ptr) +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrev32_s16( + int16x4_t vec) { + return __builtin_mpl_vector_reverse_v4i16(vec); +} -int16x8x2_t __builtin_mpl_vector_ld2q_i16v8(int16_t const *ptr); -#define vld2q_s16(ptr) __builtin_mpl_vector_ld2q_i16v8(ptr) +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrev32q_s16( + int16x8_t vec) { + return __builtin_mpl_vector_reverse_v8i16(vec); +} -int32x2x2_t __builtin_mpl_vector_ld2_i32v2(int32_t const *ptr); -#define vld2_s32(ptr) __builtin_mpl_vector_ld2_i32v2(ptr) +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrev32_u8( + uint8x8_t vec) { + return __builtin_mpl_vector_reverse_v8u8(vec); +} -int32x4x2_t __builtin_mpl_vector_ld2q_i32v4(int32_t const *ptr); -#define vld2q_s32(ptr) __builtin_mpl_vector_ld2q_i32v4(ptr) +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrev32q_u8( + uint8x16_t vec) { + return __builtin_mpl_vector_reverse_v16u8(vec); +} -uint8x8x2_t __builtin_mpl_vector_ld2_u8v8(uint8_t const *ptr); -#define vld2_u8(ptr) __builtin_mpl_vector_ld2_u8v8(ptr) +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrev32_u16( + uint16x4_t vec) { + return __builtin_mpl_vector_reverse_v4u16(vec); +} -uint8x16x2_t __builtin_mpl_vector_ld2q_u8v16(uint8_t const *ptr); -#define vld2q_u8(ptr) __builtin_mpl_vector_ld2q_u8v16(ptr) +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrev32q_u16( + uint16x8_t vec) { + return __builtin_mpl_vector_reverse_v8u16(vec); +} -uint16x4x2_t __builtin_mpl_vector_ld2_u16v4(uint16_t const *ptr); -#define vld2_u16(ptr) __builtin_mpl_vector_ld2_u16v4(ptr) +// vset_lane +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vset_lane_u8( + uint8_t a, uint8x8_t v, const int lane) { + return __builtin_mpl_vector_set_element_v8u8(a, v, lane); +} -uint16x8x2_t __builtin_mpl_vector_ld2q_u16v8(uint16_t const *ptr); -#define vld2q_u16(ptr) __builtin_mpl_vector_ld2q_u16v8(ptr) +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vset_lane_u16( + uint16_t a, uint16x4_t v, const int lane) { + return __builtin_mpl_vector_set_element_v4u16(a, v, lane); +} -uint32x2x2_t __builtin_mpl_vector_ld2_u32v2(uint32_t const *ptr); -#define vld2_u32(ptr) __builtin_mpl_vector_ld2_u32v2(ptr) +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vset_lane_u32( + uint32_t a, uint32x2_t v, const int lane) { + return __builtin_mpl_vector_set_element_v2u32(a, v, lane); +} -uint32x4x2_t __builtin_mpl_vector_ld2q_u32v4(uint32_t const *ptr); -#define vld2q_u32(ptr) __builtin_mpl_vector_ld2q_u32v4(ptr) +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vset_lane_u64( + uint64_t a, uint64x1_t v, const int lane) { + return __builtin_mpl_vector_set_element_v1u64(a, v, lane); +} -int64x1x2_t __builtin_mpl_vector_ld2_i64v1(int64_t const *ptr); -#define vld2_s64(ptr) __builtin_mpl_vector_ld2_i64v1(ptr) +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vset_lane_s8( + int8_t a, int8x8_t v, const int lane) { + return __builtin_mpl_vector_set_element_v8i8(a, v, lane); +} -uint64x1x2_t __builtin_mpl_vector_ld2_u64v1(uint64_t const *ptr); -#define vld2_u64(ptr) __builtin_mpl_vector_ld2_u64v1(ptr) +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vset_lane_s16( + int16_t a, int16x4_t v, const int lane) { + return __builtin_mpl_vector_set_element_v4i16(a, v, lane); +} -int64x2x2_t __builtin_mpl_vector_ld2q_i64v2(int64_t const *ptr); -#define vld2q_s64(ptr) __builtin_mpl_vector_ld2q_i64v2(ptr) +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vset_lane_s32( + int32_t a, int32x2_t v, const int lane) { + return __builtin_mpl_vector_set_element_v2i32(a, v, lane); +} -uint64x2x2_t __builtin_mpl_vector_ld2q_u64v2(uint64_t const *ptr); -#define vld2q_u64(ptr) __builtin_mpl_vector_ld2q_u64v2(ptr) +extern inline int64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vset_lane_s64( + int64_t a, int64x1_t v, const int lane) { + return __builtin_mpl_vector_set_element_v1i64(a, v, lane); +} -int8x8x3_t __builtin_mpl_vector_ld3_i8v8(int8_t const *ptr); -#define vld3_s8(ptr) __builtin_mpl_vector_ld3_i8v8(ptr) +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsetq_lane_u8( + uint8_t a, uint8x16_t v, const int lane) { + return __builtin_mpl_vector_set_element_v16u8(a, v, lane); +} -int8x16x3_t __builtin_mpl_vector_ld3q_i8v16(int8_t const *ptr); -#define vld3q_s8(ptr) __builtin_mpl_vector_ld3q_i8v16(ptr) +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsetq_lane_u16( + uint16_t a, uint16x8_t v, const int lane) { + return __builtin_mpl_vector_set_element_v8u16(a, v, lane); +} -int16x4x3_t __builtin_mpl_vector_ld3_i16v4(int16_t const *ptr); -#define vld3_s16(ptr) __builtin_mpl_vector_ld3_i16v4(ptr) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsetq_lane_u32( + uint32_t a, uint32x4_t v, const int lane) { + return __builtin_mpl_vector_set_element_v4u32(a, v, lane); +} -int16x8x3_t __builtin_mpl_vector_ld3q_i16v8(int16_t const *ptr); -#define vld3q_s16(ptr) __builtin_mpl_vector_ld3q_i16v8(ptr) +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsetq_lane_u64( + uint64_t a, uint64x2_t v, const int lane) { + return __builtin_mpl_vector_set_element_v2u64(a, v, lane); +} -int32x2x3_t __builtin_mpl_vector_ld3_i32v2(int32_t const *ptr); -#define vld3_s32(ptr) __builtin_mpl_vector_ld3_i32v2(ptr) +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsetq_lane_s8( + int8_t a, int8x16_t v, const int lane) { + return __builtin_mpl_vector_set_element_v16i8(a, v, lane); +} -int32x4x3_t __builtin_mpl_vector_ld3q_i32v4(int32_t const *ptr); -#define vld3q_s32(ptr) __builtin_mpl_vector_ld3q_i32v4(ptr) +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsetq_lane_s16( + int16_t a, int16x8_t v, const int lane) { + return __builtin_mpl_vector_set_element_v8i16(a, v, lane); +} -uint8x8x3_t __builtin_mpl_vector_ld3_u8v8(uint8_t const *ptr); -#define vld3_u8(ptr) __builtin_mpl_vector_ld3_u8v8(ptr) +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsetq_lane_s32( + int32_t a, int32x4_t v, const int lane) { + return __builtin_mpl_vector_set_element_v4i32(a, v, lane); +} -uint8x16x3_t __builtin_mpl_vector_ld3q_u8v16(uint8_t const *ptr); -#define vld3q_u8(ptr) __builtin_mpl_vector_ld3q_u8v16(ptr) +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsetq_lane_s64( + int64_t a, int64x2_t v, const int lane) { + return __builtin_mpl_vector_set_element_v2i64(a, v, lane); +} -uint16x4x3_t __builtin_mpl_vector_ld3_u16v4(uint16_t const *ptr); -#define vld3_u16(ptr) __builtin_mpl_vector_ld3_u16v4(ptr) +extern inline float32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vset_lane_f32( + float32_t a, float32x2_t v, const int lane) { + return __builtin_mpl_vector_set_element_v2f32(a, v, lane); +} -uint16x8x3_t __builtin_mpl_vector_ld3q_u16v8(uint16_t const *ptr); -#define vld3q_u16(ptr) __builtin_mpl_vector_ld3q_u16v8(ptr) +extern inline float64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vset_lane_f64( + float64_t a, float64x1_t v, const int lane) { + return __builtin_mpl_vector_set_element_v1f64(a, v, lane); +} +extern inline float32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsetq_lane_f32( + float32_t a, float32x4_t v, const int lane) { + return __builtin_mpl_vector_set_element_v4f32(a, v, lane); +} -uint32x2x3_t __builtin_mpl_vector_ld3_u32v2(uint32_t const *ptr); -#define vld3_u32(ptr) __builtin_mpl_vector_ld3_u32v2(ptr) +extern inline float64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsetq_lane_f64( + float64_t a, float64x2_t v, const int lane) { + return __builtin_mpl_vector_set_element_v2f64(a, v, lane); +} -uint32x4x3_t __builtin_mpl_vector_ld3q_u32v4(uint32_t const *ptr); -#define vld3q_u32(ptr) __builtin_mpl_vector_ld3q_u32v4(ptr) +// vshl +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshl_s8( + int8x8_t a, int8x8_t b) { + return a << b; +} -int64x1x3_t __builtin_mpl_vector_ld3_i64v1(int64_t const *ptr); -#define vld3_s64(ptr) __builtin_mpl_vector_ld3_i64v1(ptr) +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshlq_s8( + int8x16_t a, int8x16_t b) { + return a << b; +} -uint64x1x3_t __builtin_mpl_vector_ld3_u64v1(uint64_t const *ptr); -#define vld3_u64(ptr) __builtin_mpl_vector_ld3_u64v1(ptr) +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshl_s16( + int16x4_t a, int16x4_t b) { + return a << b; +} -int64x2x3_t __builtin_mpl_vector_ld3q_i64v2(int64_t const *ptr); -#define vld3q_s64(ptr) __builtin_mpl_vector_ld3q_i64v2(ptr) +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshlq_s16( + int16x8_t a, int16x8_t b) { + return a << b; +} -uint64x2x3_t __builtin_mpl_vector_ld3q_u64v2(uint64_t const *ptr); -#define vld3q_u64(ptr) __builtin_mpl_vector_ld3q_u64v2(ptr) +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshl_s32( + int32x2_t a, int32x2_t b) { + return a << b; +} -int8x8x4_t __builtin_mpl_vector_ld4_i8v8(int8_t const *ptr); -#define vld4_s8(ptr) __builtin_mpl_vector_ld4_i8v8(ptr) +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshlq_s32( + int32x4_t a, int32x4_t b) { + return a << b; +} -int8x16x4_t __builtin_mpl_vector_ld4q_i8v16(int8_t const *ptr); -#define vld4q_s8(ptr) __builtin_mpl_vector_ld4q_i8v16(ptr) +extern inline int64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshl_s64( + int64x1_t a, int64x1_t b) { + return a << b; +} -int16x4x4_t __builtin_mpl_vector_ld4_i16v4(int16_t const *ptr); -#define vld4_s16(ptr) __builtin_mpl_vector_ld4_i16v4(ptr) +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshlq_s64( + int64x2_t a, int64x2_t b) { + return a << b; +} -int16x8x4_t __builtin_mpl_vector_ld4q_i16v8(int16_t const *ptr); -#define vld4q_s16(ptr) __builtin_mpl_vector_ld4q_i16v8(ptr) +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshl_u8( + uint8x8_t a, int8x8_t b) { + return a << b; +} -int32x2x4_t __builtin_mpl_vector_ld4_i32v2(int32_t const *ptr); -#define vld4_s32(ptr) __builtin_mpl_vector_ld4_i32v2(ptr) +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshlq_u8( + uint8x16_t a, int8x16_t b) { + return a << b; +} -int32x4x4_t __builtin_mpl_vector_ld4q_i32v4(int32_t const *ptr); -#define vld4q_s32(ptr) __builtin_mpl_vector_ld4q_i32v4(ptr) +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshl_u16( + uint16x4_t a, int16x4_t b) { + return a << b; +} -uint8x8x4_t __builtin_mpl_vector_ld4_u8v8(uint8_t const *ptr); -#define vld4_u8(ptr) __builtin_mpl_vector_ld4_u8v8(ptr) +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshlq_u16( + uint16x8_t a, int16x8_t b) { + return a << b; +} -uint8x16x4_t __builtin_mpl_vector_ld4q_u8v16(uint8_t const *ptr); -#define vld4q_u8(ptr) __builtin_mpl_vector_ld4q_u8v16(ptr) +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshl_u32( + uint32x2_t a, int32x2_t b) { + return a << b; +} -uint16x4x4_t __builtin_mpl_vector_ld4_u16v4(uint16_t const *ptr); -#define vld4_u16(ptr) __builtin_mpl_vector_ld4_u16v4(ptr) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshlq_u32( + uint32x4_t a, int32x4_t b) { + return a << b; +} -uint16x8x4_t __builtin_mpl_vector_ld4q_u16v8(uint16_t const *ptr); -#define vld4q_u16(ptr) __builtin_mpl_vector_ld4q_u16v8(ptr) +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshl_u64( + uint64x1_t a, int64x1_t b) { + return a << b; +} -uint32x2x4_t __builtin_mpl_vector_ld4_u32v2(uint32_t const *ptr); -#define vld4_u32(ptr) __builtin_mpl_vector_ld4_u32v2(ptr) +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshlq_u64( + uint64x2_t a, int64x2_t b) { + return a << b; +} -uint32x4x4_t __builtin_mpl_vector_ld4q_u32v4(uint32_t const *ptr); -#define vld4q_u32(ptr) __builtin_mpl_vector_ld4q_u32v4(ptr) +extern inline int64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshld_s64( + int64_t a, int64_t b) { + return a << b; +} -int64x1x4_t __builtin_mpl_vector_ld4_i64v1(int64_t const *ptr); -#define vld4_s64(ptr) __builtin_mpl_vector_ld4_i64v1(ptr) +extern inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshld_u64( + uint64_t a, int64_t b) { + return a << b; +} -uint64x1x4_t __builtin_mpl_vector_ld4_u64v1(uint64_t const *ptr); -#define vld4_u64(ptr) __builtin_mpl_vector_ld4_u64v1(ptr) +// vshl_n +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshl_n_s8( + int8x8_t a, const int n) { + return __builtin_mpl_vector_shli_v8i8(a, n); +} -int64x2x4_t __builtin_mpl_vector_ld4q_i64v2(int64_t const *ptr); -#define vld4q_s64(ptr) __builtin_mpl_vector_ld4q_i64v2(ptr) +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshlq_n_s8( + int8x16_t a, const int n) { + return __builtin_mpl_vector_shli_v16i8(a, n); +} -uint64x2x4_t __builtin_mpl_vector_ld4q_u64v2(uint64_t const *ptr); -#define vld4q_u64(ptr) __builtin_mpl_vector_ld4q_u64v2(ptr) +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshl_n_s16( + int16x4_t a, const int n) { + return __builtin_mpl_vector_shli_v4i16(a, n); +} -int8x8x2_t __builtin_mpl_vector_ld2_dup_i8v8(int8_t const *ptr); -#define vld2_dup_s8(ptr) __builtin_mpl_vector_ld2_dup_i8v8(ptr) +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshlq_n_s16( + int16x8_t a, const int n) { + return __builtin_mpl_vector_shli_v8i16(a, n); +} -int8x16x2_t __builtin_mpl_vector_ld2q_dup_i8v16(int8_t const *ptr); -#define vld2q_dup_s8(ptr) __builtin_mpl_vector_ld2q_dup_i8v16(ptr) +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshl_n_s32( + int32x2_t a, const int n) { + return __builtin_mpl_vector_shli_v2i32(a, n); +} -int16x4x2_t __builtin_mpl_vector_ld2_dup_i16v4(int16_t const *ptr); -#define vld2_dup_s16(ptr) __builtin_mpl_vector_ld2_dup_i16v4(ptr) +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshlq_n_s32( + int32x4_t a, const int n) { + return __builtin_mpl_vector_shli_v4i32(a, n); +} -int16x8x2_t __builtin_mpl_vector_ld2q_dup_i16v8(int16_t const *ptr); -#define vld2q_dup_s16(ptr) __builtin_mpl_vector_ld2q_dup_i16v8(ptr) +extern inline int64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshl_n_s64( + int64x1_t a, const int n) { + return __builtin_mpl_vector_shli_v1i64(a, n); +} -int32x2x2_t __builtin_mpl_vector_ld2_dup_i32v2(int32_t const *ptr); -#define vld2_dup_s32(ptr) __builtin_mpl_vector_ld2_dup_i32v2(ptr) +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshlq_n_s64( + int64x2_t a, const int n) { + return __builtin_mpl_vector_shli_v2i64(a, n); +} -int32x4x2_t __builtin_mpl_vector_ld2q_dup_i32v4(int32_t const *ptr); -#define vld2q_dup_s32(ptr) __builtin_mpl_vector_ld2q_dup_i32v4(ptr) +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshl_n_u8( + uint8x8_t a, const int n) { + return __builtin_mpl_vector_shli_v8u8(a, n); +} -uint8x8x2_t __builtin_mpl_vector_ld2_dup_u8v8(uint8_t const *ptr); -#define vld2_dup_u8(ptr) __builtin_mpl_vector_ld2_dup_u8v8(ptr) +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshlq_n_u8( + uint8x16_t a, const int n) { + return __builtin_mpl_vector_shli_v16u8(a, n); +} -uint8x16x2_t __builtin_mpl_vector_ld2q_dup_u8v16(uint8_t const *ptr); -#define vld2q_dup_u8(ptr) __builtin_mpl_vector_ld2q_dup_u8v16(ptr) +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshl_n_u16( + uint16x4_t a, const int n) { + return __builtin_mpl_vector_shli_v4u16(a, n); +} -uint16x4x2_t __builtin_mpl_vector_ld2_dup_u16v4(uint16_t const *ptr); -#define vld2_dup_u16(ptr) __builtin_mpl_vector_ld2_dup_u16v4(ptr) +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshlq_n_u16( + uint16x8_t a, const int n) { + return __builtin_mpl_vector_shli_v8u16(a, n); +} -uint16x8x2_t __builtin_mpl_vector_ld2q_dup_u16v8(uint16_t const *ptr); -#define vld2q_dup_u16(ptr) __builtin_mpl_vector_ld2q_dup_u16v8(ptr) +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshl_n_u32( + uint32x2_t a, const int n) { + return __builtin_mpl_vector_shli_v2u32(a, n); +} -uint32x2x2_t __builtin_mpl_vector_ld2_dup_u32v2(uint32_t const *ptr); -#define vld2_dup_u32(ptr) __builtin_mpl_vector_ld2_dup_u32v2(ptr) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshlq_n_u32( + uint32x4_t a, const int n) { + return __builtin_mpl_vector_shli_v4u32(a, n); +} -uint32x4x2_t __builtin_mpl_vector_ld2q_dup_u32v4(uint32_t const *ptr); -#define vld2q_dup_u32(ptr) __builtin_mpl_vector_ld2q_dup_u32v4(ptr) +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshl_n_u64( + uint64x1_t a, const int n) { + return __builtin_mpl_vector_shli_v1u64(a, n); +} -int64x1x2_t __builtin_mpl_vector_ld2_dup_i64v1(int64_t const *ptr); -#define vld2_dup_s64(ptr) __builtin_mpl_vector_ld2_dup_i64v1(ptr) +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshlq_n_u64( + uint64x2_t a, const int n) { + return __builtin_mpl_vector_shli_v2u64(a, n); +} -uint64x1x2_t __builtin_mpl_vector_ld2_dup_u64v1(uint64_t const *ptr); -#define vld2_dup_u64(ptr) __builtin_mpl_vector_ld2_dup_u64v1(ptr) +extern inline int64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshld_n_s64( + int64_t a, const int n) { + return vget_lane_s64(vshl_n_s64(vdup_n_s64(a), n), 0); +} -int64x2x2_t __builtin_mpl_vector_ld2q_dup_i64v2(int64_t const *ptr); -#define vld2q_dup_s64(ptr) __builtin_mpl_vector_ld2q_dup_i64v2(ptr) +extern inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshld_n_u64( + uint64_t a, const int n) { + return vget_lane_u64(vshl_n_u64(vdup_n_u64(a), n), 0); +} -uint64x2x2_t __builtin_mpl_vector_ld2q_dup_u64v2(uint64_t const *ptr); -#define vld2q_dup_u64(ptr) __builtin_mpl_vector_ld2q_dup_u64v2(ptr) +// vshr +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshr_s8( + int8x8_t a, int8x8_t b) { + return a >> b; +} -int8x8x3_t __builtin_mpl_vector_ld3_dup_i8v8(int8_t const *ptr); -#define vld3_dup_s8(ptr) __builtin_mpl_vector_ld3_dup_i8v8(ptr) +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshrq_s8( + int8x16_t a, int8x16_t b) { + return a >> b; +} -int8x16x3_t __builtin_mpl_vector_ld3q_dup_i8v16(int8_t const *ptr); -#define vld3q_dup_s8(ptr) __builtin_mpl_vector_ld3q_dup_i8v16(ptr) +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshr_s16( + int16x4_t a, int16x4_t b) { + return a >> b; +} -int16x4x3_t __builtin_mpl_vector_ld3_dup_i16v4(int16_t const *ptr); -#define vld3_dup_s16(ptr) __builtin_mpl_vector_ld3_dup_i16v4(ptr) +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshrq_s16( + int16x8_t a, int16x8_t b) { + return a >> b; +} -int16x8x3_t __builtin_mpl_vector_ld3q_dup_i16v8(int16_t const *ptr); -#define vld3q_dup_s16(ptr) __builtin_mpl_vector_ld3q_dup_i16v8(ptr) +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshr_s32( + int32x2_t a, int32x2_t b) { + return a >> b; +} -int32x2x3_t __builtin_mpl_vector_ld3_dup_i32v2(int32_t const *ptr); -#define vld3_dup_s32(ptr) __builtin_mpl_vector_ld3_dup_i32v2(ptr) +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshrq_s32( + int32x4_t a, int32x4_t b) { + return a >> b; +} -int32x4x3_t __builtin_mpl_vector_ld3q_dup_i32v4(int32_t const *ptr); -#define vld3q_dup_s32(ptr) __builtin_mpl_vector_ld3q_dup_i32v4(ptr) +extern inline int64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshr_s64( + int64x1_t a, int64x1_t b) { + return a >> b; +} -uint8x8x3_t __builtin_mpl_vector_ld3_dup_u8v8(uint8_t const *ptr); -#define vld3_dup_u8(ptr) __builtin_mpl_vector_ld3_dup_u8v8(ptr) +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshrq_s64( + int64x2_t a, int64x2_t b) { + return a >> b; +} -uint8x16x3_t __builtin_mpl_vector_ld3q_dup_u8v16(uint8_t const *ptr); -#define vld3q_dup_u8(ptr) __builtin_mpl_vector_ld3q_dup_u8v16(ptr) +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshr_u8( + uint8x8_t a, uint8x8_t b) { + return a >> b; +} -uint16x4x3_t __builtin_mpl_vector_ld3_dup_u16v4(uint16_t const *ptr); -#define vld3_dup_u16(ptr) __builtin_mpl_vector_ld3_dup_u16v4(ptr) +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshrq_u8( + uint8x16_t a, uint8x16_t b) { + return a >> b; +} -uint16x8x3_t __builtin_mpl_vector_ld3q_dup_u16v8(uint16_t const *ptr); -#define vld3q_dup_u16(ptr) __builtin_mpl_vector_ld3q_dup_u16v8(ptr) +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshr_u16( + uint16x4_t a, uint16x4_t b) { + return a >> b; +} -uint32x2x3_t __builtin_mpl_vector_ld3_dup_u32v2(uint32_t const *ptr); -#define vld3_dup_u32(ptr) __builtin_mpl_vector_ld3_dup_u32v2(ptr) +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshrq_u16( + uint16x8_t a, uint16x8_t b) { + return a >> b; +} -uint32x4x3_t __builtin_mpl_vector_ld3q_dup_u32v4(uint32_t const *ptr); -#define vld3q_dup_u32(ptr) __builtin_mpl_vector_ld3q_dup_u32v4(ptr) +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshr_u32( + uint32x2_t a, uint32x2_t b) { + return a >> b; +} -int64x1x3_t __builtin_mpl_vector_ld3_dup_i64v1(int64_t const *ptr); -#define vld3_dup_s64(ptr) __builtin_mpl_vector_ld3_dup_i64v1(ptr) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshrq_u32( + uint32x4_t a, uint32x4_t b) { + return a >> b; +} -uint64x1x3_t __builtin_mpl_vector_ld3_dup_u64v1(uint64_t const *ptr); -#define vld3_dup_u64(ptr) __builtin_mpl_vector_ld3_dup_u64v1(ptr) +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshr_u64( + uint64x1_t a, uint64x1_t b) { + return a >> b; +} -int64x2x3_t __builtin_mpl_vector_ld3q_dup_i64v2(int64_t const *ptr); -#define vld3q_dup_s64(ptr) __builtin_mpl_vector_ld3q_dup_i64v2(ptr) +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshrq_u64( + uint64x2_t a, uint64x2_t b) { + return a >> b; +} -uint64x2x3_t __builtin_mpl_vector_ld3q_dup_u64v2(uint64_t const *ptr); -#define vld3q_dup_u64(ptr) __builtin_mpl_vector_ld3q_dup_u64v2(ptr) +extern inline int64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshrd_s64( + int64_t a, int64_t b) { + return vget_lane_s64((vdup_n_s64(a) >> vdup_n_s64(b)), 0); +} -int8x8x4_t __builtin_mpl_vector_ld4_dup_i8v8(int8_t const *ptr); -#define vld4_dup_s8(ptr) __builtin_mpl_vector_ld4_dup_i8v8(ptr) +extern inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshrd_u64( + uint64_t a, uint64_t b) { + return vget_lane_u64((vdup_n_u64(a) >> vdup_n_u64(b)), 0); +} -int8x16x4_t __builtin_mpl_vector_ld4q_dup_i8v16(int8_t const *ptr); -#define vld4q_dup_s8(ptr) __builtin_mpl_vector_ld4q_dup_i8v16(ptr) +// vshr_n +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshr_n_s8( + int8x8_t a, const int n) { + return __builtin_mpl_vector_shri_v8i8(a, n); +} -int16x4x4_t __builtin_mpl_vector_ld4_dup_i16v4(int16_t const *ptr); -#define vld4_dup_s16(ptr) __builtin_mpl_vector_ld4_dup_i16v4(ptr) +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshrq_n_s8( + int8x16_t a, const int n) { + return __builtin_mpl_vector_shri_v16i8(a, n); +} -int16x8x4_t __builtin_mpl_vector_ld4q_dup_i16v8(int16_t const *ptr); -#define vld4q_dup_s16(ptr) __builtin_mpl_vector_ld4q_dup_i16v8(ptr) +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshr_n_s16( + int16x4_t a, const int n) { + return __builtin_mpl_vector_shri_v4i16(a, n); +} -int32x2x4_t __builtin_mpl_vector_ld4_dup_i32v2(int32_t const *ptr); -#define vld4_dup_s32(ptr) __builtin_mpl_vector_ld4_dup_i32v2(ptr) +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshrq_n_s16( + int16x8_t a, const int n) { + return __builtin_mpl_vector_shri_v8i16(a, n); +} -int32x4x4_t __builtin_mpl_vector_ld4q_dup_i32v4(int32_t const *ptr); -#define vld4q_dup_s32(ptr) __builtin_mpl_vector_ld4q_dup_i32v4(ptr) +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshr_n_s32( + int32x2_t a, const int n) { + return __builtin_mpl_vector_shri_v2i32(a, n); +} -uint8x8x4_t __builtin_mpl_vector_ld4_dup_u8v8(uint8_t const *ptr); -#define vld4_dup_u8(ptr) __builtin_mpl_vector_ld4_dup_u8v8(ptr) +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshrq_n_s32( + int32x4_t a, const int n) { + return __builtin_mpl_vector_shri_v4i32(a, n); +} -uint8x16x4_t __builtin_mpl_vector_ld4q_dup_u8v16(uint8_t const *ptr); -#define vld4q_dup_u8(ptr) __builtin_mpl_vector_ld4q_dup_u8v16(ptr) +extern inline int64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshr_n_s64( + int64x1_t a, const int n) { + return __builtin_mpl_vector_shri_v1i64(a, n); +} -uint16x4x4_t __builtin_mpl_vector_ld4_dup_u16v4(uint16_t const *ptr); -#define vld4_dup_u16(ptr) __builtin_mpl_vector_ld4_dup_u16v4(ptr) +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshrq_n_s64( + int64x2_t a, const int n) { + return __builtin_mpl_vector_shri_v2i64(a, n); +} -uint16x8x4_t __builtin_mpl_vector_ld4q_dup_u16v8(uint16_t const *ptr); -#define vld4q_dup_u16(ptr) __builtin_mpl_vector_ld4q_dup_u16v8(ptr) +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshr_n_u8( + uint8x8_t a, const int n) { + return __builtin_mpl_vector_shru_v8u8(a, n); +} -uint32x2x4_t __builtin_mpl_vector_ld4_dup_u32v2(uint32_t const *ptr); -#define vld4_dup_u32(ptr) __builtin_mpl_vector_ld4_dup_u32v2(ptr) +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshrq_n_u8( + uint8x16_t a, const int n) { + return __builtin_mpl_vector_shru_v16u8(a, n); +} -uint32x4x4_t __builtin_mpl_vector_ld4q_dup_u32v4(uint32_t const *ptr); -#define vld4q_dup_u32(ptr) __builtin_mpl_vector_ld4q_dup_u32v4(ptr) +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshr_n_u16( + uint16x4_t a, const int n) { + return __builtin_mpl_vector_shru_v4u16(a, n); +} -int64x1x4_t __builtin_mpl_vector_ld4_dup_i64v1(int64_t const *ptr); -#define vld4_dup_s64(ptr) __builtin_mpl_vector_ld4_dup_i64v1(ptr) +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshrq_n_u16( + uint16x8_t a, const int n) { + return __builtin_mpl_vector_shru_v8u16(a, n); +} -uint64x1x4_t __builtin_mpl_vector_ld4_dup_u64v1(uint64_t const *ptr); -#define vld4_dup_u64(ptr) __builtin_mpl_vector_ld4_dup_u64v1(ptr) +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshr_n_u32( + uint32x2_t a, const int n) { + return __builtin_mpl_vector_shru_v2u32(a, n); +} -int64x2x4_t __builtin_mpl_vector_ld4q_dup_i64v2(int64_t const *ptr); -#define vld4q_dup_s64(ptr) __builtin_mpl_vector_ld4q_dup_i64v2(ptr) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshrq_n_u32( + uint32x4_t a, const int n) { + return __builtin_mpl_vector_shru_v4u32(a, n); +} -uint64x2x4_t __builtin_mpl_vector_ld4q_dup_u64v2(uint64_t const *ptr); -#define vld4q_dup_u64(ptr) __builtin_mpl_vector_ld4q_dup_u64v2(ptr) +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshr_n_u64( + uint64x1_t a, const int n) { + return __builtin_mpl_vector_shru_v1u64(a, n); +} -int16x4x2_t __builtin_mpl_vector_ld2_lane_i16v4(int16_t const *ptr, int16x4x2_t src, const int lane); -#define vld2_lane_s16(ptr, src, lane) __builtin_mpl_vector_ld2_lane_i16v4(ptr, src, lane) +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshrq_n_u64( + uint64x2_t a, const int n) { + return __builtin_mpl_vector_shru_v2u64(a, n); +} -int16x8x2_t __builtin_mpl_vector_ld2q_lane_i16v8(int16_t const *ptr, int16x8x2_t src, const int lane); -#define vld2q_lane_s16(ptr, src, lane) __builtin_mpl_vector_ld2q_lane_i16v8(ptr, src, lane) +extern inline int64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshrd_n_s64( + int64_t a, const int n) { + return vget_lane_s64(vshr_n_s64(vdup_n_s64(a), n), 0); +} -int32x2x2_t __builtin_mpl_vector_ld2_lane_i32v2(int32_t const *ptr, int32x2x2_t src, const int lane); -#define vld2_lane_s32(ptr, src, lane) __builtin_mpl_vector_ld2_lane_i32v2(ptr, src, lane) +extern inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshrd_n_u64( + uint64_t a, const int n) { + return vget_lane_u64(vshr_n_u64(vdup_n_u64(a), n), 0); +} -int32x4x2_t __builtin_mpl_vector_ld2q_lane_i32v4(int32_t const *ptr, int32x4x2_t src, const int lane); -#define vld2q_lane_s32(ptr, src, lane) __builtin_mpl_vector_ld2q_lane_i32v4(ptr, src, lane) +// vshrn_n +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshrn_n_s16( + int16x8_t a, const int n) { + return __builtin_mpl_vector_shr_narrow_low_v8i16(a, n); +} -uint16x4x2_t __builtin_mpl_vector_ld2_lane_u16v4(uint16_t const *ptr, uint16x4x2_t src, const int lane); -#define vld2_lane_u16(ptr, src, lane) __builtin_mpl_vector_ld2_lane_u16v4(ptr, src, lane) +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshrn_n_s32( + int32x4_t a, const int n) { + return __builtin_mpl_vector_shr_narrow_low_v4i32(a, n); +} -uint16x8x2_t __builtin_mpl_vector_ld2q_lane_u16v8(uint16_t const *ptr, uint16x8x2_t src, const int lane); -#define vld2q_lane_u16(ptr, src, lane) __builtin_mpl_vector_ld2q_lane_u16v8(ptr, src, lane) +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshrn_n_s64( + int64x2_t a, const int n) { + return __builtin_mpl_vector_shr_narrow_low_v2i64(a, n); +} -uint32x2x2_t __builtin_mpl_vector_ld2_lane_u32v2(uint32_t const *ptr, uint32x2x2_t src, const int lane); -#define vld2_lane_u32(ptr, src, lane) __builtin_mpl_vector_ld2_lane_u32v2(ptr, src, lane) +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshrn_n_u16( + uint16x8_t a, const int n) { + return __builtin_mpl_vector_shr_narrow_low_v8u16(a, n); +} -uint32x4x2_t __builtin_mpl_vector_ld2q_lane_u32v4(uint32_t const *ptr, uint32x4x2_t src, const int lane); -#define vld2q_lane_u32(ptr, src, lane) __builtin_mpl_vector_ld2q_lane_u32v4(ptr, src, lane) +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshrn_n_u32( + uint32x4_t a, const int n) { + return __builtin_mpl_vector_shr_narrow_low_v4u32(a, n); +} -int8x8x2_t __builtin_mpl_vector_ld2_lane_i8v8(int8_t const *ptr, int8x8x2_t src, const int lane); -#define vld2_lane_s8(ptr, src, lane) __builtin_mpl_vector_ld2_lane_i8v8(ptr, src, lane) +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshrn_n_u64( + uint64x2_t a, const int n) { + return __builtin_mpl_vector_shr_narrow_low_v2u64(a, n); +} -uint8x8x2_t __builtin_mpl_vector_ld2_lane_u8v8(uint8_t const *ptr, uint8x8x2_t src, const int lane); -#define vld2_lane_u8(ptr, src, lane) __builtin_mpl_vector_ld2_lane_u8v8(ptr, src, lane) +// vst1 +extern inline void __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vst1_s8( + int8_t *ptr, int8x8_t val) { + return __builtin_mpl_vector_store_v8i8(ptr, val); +} -int8x16x2_t __builtin_mpl_vector_ld2q_lane_i8v16(int8_t const *ptr, int8x16x2_t src, const int lane); -#define vld2q_lane_s8(ptr, src, lane) __builtin_mpl_vector_ld2q_lane_i8v16(ptr, src, lane) +extern inline void __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vst1q_s8( + int8_t *ptr, int8x16_t val) { + return __builtin_mpl_vector_store_v16i8(ptr, val); +} -uint8x16x2_t __builtin_mpl_vector_ld2q_lane_u8v16(uint8_t const *ptr, uint8x16x2_t src, const int lane); -#define vld2q_lane_u8(ptr, src, lane) __builtin_mpl_vector_ld2q_lane_u8v16(ptr, src, lane) +extern inline void __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vst1_s16( + int16_t *ptr, int16x4_t val) { + return __builtin_mpl_vector_store_v4i16(ptr, val); +} -int64x1x2_t __builtin_mpl_vector_ld2_lane_i64v1(int64_t const *ptr, int64x1x2_t src, const int lane); -#define vld2_lane_s64(ptr, src, lane) __builtin_mpl_vector_ld2_lane_i64v1(ptr, src, lane) +extern inline void __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vst1q_s16( + int16_t *ptr, int16x8_t val) { + return __builtin_mpl_vector_store_v8i16(ptr, val); +} -int64x2x2_t __builtin_mpl_vector_ld2q_lane_i64v2(int64_t const *ptr, int64x2x2_t src, const int lane); -#define vld2q_lane_s64(ptr, src, lane) __builtin_mpl_vector_ld2q_lane_i64v2(ptr, src, lane) +extern inline void __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vst1_s32( + int32_t *ptr, int32x2_t val) { + return __builtin_mpl_vector_store_v2i32(ptr, val); +} -uint64x1x2_t __builtin_mpl_vector_ld2_lane_u64v1(uint64_t const *ptr, uint64x1x2_t src, const int lane); -#define vld2_lane_u64(ptr, src, lane) __builtin_mpl_vector_ld2_lane_u64v1(ptr, src, lane) +extern inline void __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vst1q_s32( + int32_t *ptr, int32x4_t val) { + return __builtin_mpl_vector_store_v4i32(ptr, val); +} -uint64x2x2_t __builtin_mpl_vector_ld2q_lane_u64v2(uint64_t const *ptr, uint64x2x2_t src, const int lane); -#define vld2q_lane_u64(ptr, src, lane) __builtin_mpl_vector_ld2q_lane_u64v2(ptr, src, lane) +extern inline void __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vst1_s64( + int64_t *ptr, int64x1_t val) { + return __builtin_mpl_vector_store_v1i64(ptr, val); +} -int16x4x3_t __builtin_mpl_vector_ld3_lane_i16v4(int16_t const *ptr, int16x4x3_t src, const int lane); -#define vld3_lane_s16(ptr, src, lane) __builtin_mpl_vector_ld3_lane_i16v4(ptr, src, lane) +extern inline void __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vst1q_s64( + int64_t *ptr, int64x2_t val) { + return __builtin_mpl_vector_store_v2i64(ptr, val); +} -int16x8x3_t __builtin_mpl_vector_ld3q_lane_i16v8(int16_t const *ptr, int16x8x3_t src, const int lane); -#define vld3q_lane_s16(ptr, src, lane) __builtin_mpl_vector_ld3q_lane_i16v8(ptr, src, lane) +extern inline void __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vst1_u8( + uint8_t *ptr, uint8x8_t val) { + return __builtin_mpl_vector_store_v8u8(ptr, val); +} -int32x2x3_t __builtin_mpl_vector_ld3_lane_i32v2(int32_t const *ptr, int32x2x3_t src, const int lane); -#define vld3_lane_s32(ptr, src, lane) __builtin_mpl_vector_ld3_lane_i32v2(ptr, src, lane) +extern inline void __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vst1q_u8( + uint8_t *ptr, uint8x16_t val) { + return __builtin_mpl_vector_store_v16u8(ptr, val); +} -int32x4x3_t __builtin_mpl_vector_ld3q_lane_i32v4(int32_t const *ptr, int32x4x3_t src, const int lane); -#define vld3q_lane_s32(ptr, src, lane) __builtin_mpl_vector_ld3q_lane_i32v4(ptr, src, lane) +extern inline void __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vst1_u16( + uint16_t *ptr, uint16x4_t val) { + return __builtin_mpl_vector_store_v4u16(ptr, val); +} -uint16x4x3_t __builtin_mpl_vector_ld3_lane_u16v4(uint16_t const *ptr, uint16x4x3_t src, const int lane); -#define vld3_lane_u16(ptr, src, lane) __builtin_mpl_vector_ld3_lane_u16v4(ptr, src, lane) +extern inline void __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vst1q_u16( + uint16_t *ptr, uint16x8_t val) { + return __builtin_mpl_vector_store_v8u16(ptr, val); +} -uint16x8x3_t __builtin_mpl_vector_ld3q_lane_u16v8(uint16_t const *ptr, uint16x8x3_t src, const int lane); -#define vld3q_lane_u16(ptr, src, lane) __builtin_mpl_vector_ld3q_lane_u16v8(ptr, src, lane) +extern inline void __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vst1_u32( + uint32_t *ptr, uint32x2_t val) { + return __builtin_mpl_vector_store_v2u32(ptr, val); +} -uint32x2x3_t __builtin_mpl_vector_ld3_lane_u32v2(uint32_t const *ptr, uint32x2x3_t src, const int lane); -#define vld3_lane_u32(ptr, src, lane) __builtin_mpl_vector_ld3_lane_u32v2(ptr, src, lane) +extern inline void __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vst1q_u32( + uint32_t *ptr, uint32x4_t val) { + return __builtin_mpl_vector_store_v4u32(ptr, val); +} -uint32x4x3_t __builtin_mpl_vector_ld3q_lane_u32v4(uint32_t const *ptr, uint32x4x3_t src, const int lane); -#define vld3q_lane_u32(ptr, src, lane) __builtin_mpl_vector_ld3q_lane_u32v4(ptr, src, lane) +extern inline void __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vst1_u64( + uint64_t *ptr, uint64x1_t val) { + return __builtin_mpl_vector_store_v1u64(ptr, val); +} -int8x8x3_t __builtin_mpl_vector_ld3_lane_i8v8(int8_t const *ptr, int8x8x3_t src, const int lane); -#define vld3_lane_s8(ptr, src, lane) __builtin_mpl_vector_ld3_lane_i8v8(ptr, src, lane) +extern inline void __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vst1q_u64( + uint64_t *ptr, uint64x2_t val) { + return __builtin_mpl_vector_store_v2u64(ptr, val); +} -uint8x8x3_t __builtin_mpl_vector_ld3_lane_u8v8(uint8_t const *ptr, uint8x8x3_t src, const int lane); -#define vld3_lane_u8(ptr, src, lane) __builtin_mpl_vector_ld3_lane_u8v8(ptr, src, lane) +extern inline void __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vst1_f32( + float32_t *ptr, float32x2_t val) { + return __builtin_mpl_vector_store_v2f32(ptr, val); +} -int8x16x3_t __builtin_mpl_vector_ld3q_lane_i8v16(int8_t const *ptr, int8x16x3_t src, const int lane); -#define vld3q_lane_s8(ptr, src, lane) __builtin_mpl_vector_ld3q_lane_i8v16(ptr, src, lane) +extern inline void __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vst1_f64( + float64_t *ptr, float64x1_t val) { + return __builtin_mpl_vector_store_v1f64(ptr, val); +} -uint8x16x3_t __builtin_mpl_vector_ld3q_lane_u8v16(uint8_t const *ptr, uint8x16x3_t src, const int lane); -#define vld3q_lane_u8(ptr, src, lane) __builtin_mpl_vector_ld3q_lane_u8v16(ptr, src, lane) +extern inline void __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vst1q_f32( + float32_t *ptr, float32x4_t val) { + return __builtin_mpl_vector_store_v4f32(ptr, val); +} -int64x1x3_t __builtin_mpl_vector_ld3_lane_i64v1(int64_t const *ptr, int64x1x3_t src, const int lane); -#define vld3_lane_s64(ptr, src, lane) __builtin_mpl_vector_ld3_lane_i64v1(ptr, src, lane) +extern inline void __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vst1q_f64( + float64_t *ptr, float64x2_t val) { + return __builtin_mpl_vector_store_v2f64(ptr, val); +} -int64x2x3_t __builtin_mpl_vector_ld3q_lane_i64v2(int64_t const *ptr, int64x2x3_t src, const int lane); -#define vld3q_lane_s64(ptr, src, lane) __builtin_mpl_vector_ld3q_lane_i64v2(ptr, src, lane) +// vsub +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsub_s8( + int8x8_t a, int8x8_t b) { + return a - b; +} -uint64x1x3_t __builtin_mpl_vector_ld3_lane_u64v1(uint64_t const *ptr, uint64x1x3_t src, const int lane); -#define vld3_lane_u64(ptr, src, lane) __builtin_mpl_vector_ld3_lane_u64v1(ptr, src, lane) +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsubq_s8( + int8x16_t a, int8x16_t b) { + return a - b; +} -uint64x2x3_t __builtin_mpl_vector_ld3q_lane_u64v2(uint64_t const *ptr, uint64x2x3_t src, const int lane); -#define vld3q_lane_u64(ptr, src, lane) __builtin_mpl_vector_ld3q_lane_u64v2(ptr, src, lane) +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsub_s16( + int16x4_t a, int16x4_t b) { + return a - b; +} -int16x4x4_t __builtin_mpl_vector_ld4_lane_i16v4(int16_t const *ptr, int16x4x4_t src, const int lane); -#define vld4_lane_s16(ptr, src, lane) __builtin_mpl_vector_ld4_lane_i16v4(ptr, src, lane) +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsubq_s16( + int16x8_t a, int16x8_t b) { + return a - b; +} -int16x8x4_t __builtin_mpl_vector_ld4q_lane_i16v8(int16_t const *ptr, int16x8x4_t src, const int lane); -#define vld4q_lane_s16(ptr, src, lane) __builtin_mpl_vector_ld4q_lane_i16v8(ptr, src, lane) +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsub_s32( + int32x2_t a, int32x2_t b) { + return a - b; +} -int32x2x4_t __builtin_mpl_vector_ld4_lane_i32v2(int32_t const *ptr, int32x2x4_t src, const int lane); -#define vld4_lane_s32(ptr, src, lane) __builtin_mpl_vector_ld4_lane_i32v2(ptr, src, lane) +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsubq_s32( + int32x4_t a, int32x4_t b) { + return a - b; +} -int32x4x4_t __builtin_mpl_vector_ld4q_lane_i32v4(int32_t const *ptr, int32x4x4_t src, const int lane); -#define vld4q_lane_s32(ptr, src, lane) __builtin_mpl_vector_ld4q_lane_i32v4(ptr, src, lane) +extern inline int64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsub_s64( + int64x1_t a, int64x1_t b) { + return a - b; +} -uint16x4x4_t __builtin_mpl_vector_ld4_lane_u16v4(uint16_t const *ptr, uint16x4x4_t src, const int lane); -#define vld4_lane_u16(ptr, src, lane) __builtin_mpl_vector_ld4_lane_u16v4(ptr, src, lane) +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsubq_s64( + int64x2_t a, int64x2_t b) { + return a - b; +} -uint16x8x4_t __builtin_mpl_vector_ld4q_lane_u16v8(uint16_t const *ptr, uint16x8x4_t src, const int lane); -#define vld4q_lane_u16(ptr, src, lane) __builtin_mpl_vector_ld4q_lane_u16v8(ptr, src, lane) +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsub_u8( + uint8x8_t a, uint8x8_t b) { + return a - b; +} -uint32x2x4_t __builtin_mpl_vector_ld4_lane_u32v2(uint32_t const *ptr, uint32x2x4_t src, const int lane); -#define vld4_lane_u32(ptr, src, lane) __builtin_mpl_vector_ld4_lane_u32v2(ptr, src, lane) +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsubq_u8( + uint8x16_t a, uint8x16_t b) { + return a - b; +} -uint32x4x4_t __builtin_mpl_vector_ld4q_lane_u32v4(uint32_t const *ptr, uint32x4x4_t src, const int lane); -#define vld4q_lane_u32(ptr, src, lane) __builtin_mpl_vector_ld4q_lane_u32v4(ptr, src, lane) +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsub_u16( + uint16x4_t a, uint16x4_t b) { + return a - b; +} -int8x8x4_t __builtin_mpl_vector_ld4_lane_i8v8(int8_t const *ptr, int8x8x4_t src, const int lane); -#define vld4_lane_s8(ptr, src, lane) __builtin_mpl_vector_ld4_lane_i8v8(ptr, src, lane) +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsubq_u16( + uint16x8_t a, uint16x8_t b) { + return a - b; +} -uint8x8x4_t __builtin_mpl_vector_ld4_lane_u8v8(uint8_t const *ptr, uint8x8x4_t src, const int lane); -#define vld4_lane_u8(ptr, src, lane) __builtin_mpl_vector_ld4_lane_u8v8(ptr, src, lane) +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsub_u32( + uint32x2_t a, uint32x2_t b) { + return a - b; +} -int8x16x4_t __builtin_mpl_vector_ld4q_lane_i8v16(int8_t const *ptr, int8x16x4_t src, const int lane); -#define vld4q_lane_s8(ptr, src, lane) __builtin_mpl_vector_ld4q_lane_i8v16(ptr, src, lane) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsubq_u32( + uint32x4_t a, uint32x4_t b) { + return a - b; +} -uint8x16x4_t __builtin_mpl_vector_ld4q_lane_u8v16(uint8_t const *ptr, uint8x16x4_t src, const int lane); -#define vld4q_lane_u8(ptr, src, lane) __builtin_mpl_vector_ld4q_lane_u8v16(ptr, src, lane) +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsub_u64( + uint64x1_t a, uint64x1_t b) { + return a - b; +} -int64x1x4_t __builtin_mpl_vector_ld4_lane_i64v1(int64_t const *ptr, int64x1x4_t src, const int lane); -#define vld4_lane_s64(ptr, src, lane) __builtin_mpl_vector_ld4_lane_i64v1(ptr, src, lane) +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsubq_u64( + uint64x2_t a, uint64x2_t b) { + return a - b; +} -int64x2x4_t __builtin_mpl_vector_ld4q_lane_i64v2(int64_t const *ptr, int64x2x4_t src, const int lane); -#define vld4q_lane_s64(ptr, src, lane) __builtin_mpl_vector_ld4q_lane_i64v2(ptr, src, lane) +extern inline int64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsubd_s64( + int64_t a, int64_t b) { + return a - b; +} -uint64x1x4_t __builtin_mpl_vector_ld4_lane_u64v1(uint64_t const *ptr, uint64x1x4_t src, const int lane); -#define vld4_lane_u64(ptr, src, lane) __builtin_mpl_vector_ld4_lane_u64v1(ptr, src, lane) +extern inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsubd_u64( + uint64_t a, uint64_t b) { + return a - b; +} -uint64x2x4_t __builtin_mpl_vector_ld4q_lane_u64v2(uint64_t const *ptr, uint64x2x4_t src, const int lane); -#define vld4q_lane_u64(ptr, src, lane) __builtin_mpl_vector_ld4q_lane_u64v2(ptr, src, lane) +extern inline float32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsub_f32( + float32x2_t a, float32x2_t b) { + return a - b; +} -void __builtin_mpl_vector_st1_lane_i8v8(int8_t *ptr, int8x8_t val, const int lane); -#define vst1_lane_s8(ptr, val, lane) __builtin_mpl_vector_st1_lane_i8v8(ptr, val, lane) +extern inline float64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsub_f64( + float64x1_t a, float64x1_t b) { + return a - b; +} -void __builtin_mpl_vector_st1q_lane_i8v16(int8_t *ptr, int8x16_t val, const int lane); -#define vst1q_lane_s8(ptr, val, lane) __builtin_mpl_vector_st1q_lane_i8v16(ptr, val, lane) +extern inline float32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsubq_f32( + float32x4_t a, float32x4_t b) { + return a - b; +} -void __builtin_mpl_vector_st1_lane_i16v4(int16_t *ptr, int16x4_t val, const int lane); -#define vst1_lane_s16(ptr, val, lane) __builtin_mpl_vector_st1_lane_i16v4(ptr, val, lane) +extern inline float64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsubq_f64( + float64x2_t a, float64x2_t b) { + return a - b; +} -void __builtin_mpl_vector_st1q_lane_i16v8(int16_t *ptr, int16x8_t val, const int lane); -#define vst1q_lane_s16(ptr, val, lane) __builtin_mpl_vector_st1q_lane_i16v8(ptr, val, lane) +// vsub[lw] +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsubl_s8( + int8x8_t a, int8x8_t b) { + return __builtin_mpl_vector_subl_low_v8i8(a, b); +} -void __builtin_mpl_vector_st1_lane_i32v2(int32_t *ptr, int32x2_t val, const int lane); -#define vst1_lane_s32(ptr, val, lane) __builtin_mpl_vector_st1_lane_i32v2(ptr, val, lane) +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsubl_s16( + int16x4_t a, int16x4_t b) { + return __builtin_mpl_vector_subl_low_v4i16(a, b); +} -void __builtin_mpl_vector_st1q_lane_i32v4(int32_t *ptr, int32x4_t val, const int lane); -#define vst1q_lane_s32(ptr, val, lane) __builtin_mpl_vector_st1q_lane_i32v4(ptr, val, lane) +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsubl_s32( + int32x2_t a, int32x2_t b) { + return __builtin_mpl_vector_subl_low_v2i32(a, b); +} -void __builtin_mpl_vector_st1_lane_i64v1(int64_t *ptr, int64x1_t val, const int lane); -#define vst1_lane_s64(ptr, val, lane) __builtin_mpl_vector_st1_lane_i64v1(ptr, val, lane) +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsubl_u8( + uint8x8_t a, uint8x8_t b) { + return __builtin_mpl_vector_subl_low_v8u8(a, b); +} -void __builtin_mpl_vector_st1q_lane_i64v2(int64_t *ptr, int64x2_t val, const int lane); -#define vst1q_lane_s64(ptr, val, lane) __builtin_mpl_vector_st1q_lane_i64v2(ptr, val, lane) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsubl_u16( + uint16x4_t a, uint16x4_t b) { + return __builtin_mpl_vector_subl_low_v4u16(a, b); +} -void __builtin_mpl_vector_st1_lane_u8v8(uint8_t *ptr, uint8x8_t val, const int lane); -#define vst1_lane_u8(ptr, val, lane) __builtin_mpl_vector_st1_lane_u8v8(ptr, val, lane) +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsubl_u32( + uint32x2_t a, uint32x2_t b) { + return __builtin_mpl_vector_subl_low_v2u32(a, b); +} -void __builtin_mpl_vector_st1q_lane_u8v16(uint8_t *ptr, uint8x16_t val, const int lane); -#define vst1q_lane_u8(ptr, val, lane) __builtin_mpl_vector_st1q_lane_u8v16(ptr, val, lane) +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsubl_high_s8( + int8x16_t a, int8x16_t b) { + return __builtin_mpl_vector_subl_high_v8i8(a, b); +} -void __builtin_mpl_vector_st1_lane_u16v4(uint16_t *ptr, uint16x4_t val, const int lane); -#define vst1_lane_u16(ptr, val, lane) __builtin_mpl_vector_st1_lane_u16v4(ptr, val, lane) +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsubl_high_s16( + int16x8_t a, int16x8_t b) { + return __builtin_mpl_vector_subl_high_v4i16(a, b); +} -void __builtin_mpl_vector_st1q_lane_u16v8(uint16_t *ptr, uint16x8_t val, const int lane); -#define vst1q_lane_u16(ptr, val, lane) __builtin_mpl_vector_st1q_lane_u16v8(ptr, val, lane) +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsubl_high_s32( + int32x4_t a, int32x4_t b) { + return __builtin_mpl_vector_subl_high_v2i32(a, b); +} -void __builtin_mpl_vector_st1_lane_u32v2(uint32_t *ptr, uint32x2_t val, const int lane); -#define vst1_lane_u32(ptr, val, lane) __builtin_mpl_vector_st1_lane_u32v2(ptr, val, lane) +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsubl_high_u8( + uint8x16_t a, uint8x16_t b) { + return __builtin_mpl_vector_subl_high_v8u8(a, b); +} -void __builtin_mpl_vector_st1q_lane_u32v4(uint32_t *ptr, uint32x4_t val, const int lane); -#define vst1q_lane_u32(ptr, val, lane) __builtin_mpl_vector_st1q_lane_u32v4(ptr, val, lane) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsubl_high_u16( + uint16x8_t a, uint16x8_t b) { + return __builtin_mpl_vector_subl_high_v4u16(a, b); +} -void __builtin_mpl_vector_st1_lane_u64v1(uint64_t *ptr, uint64x1_t val, const int lane); -#define vst1_lane_u64(ptr, val, lane) __builtin_mpl_vector_st1_lane_u64v1(ptr, val, lane) +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsubl_high_u32( + uint32x4_t a, uint32x4_t b) { + return __builtin_mpl_vector_subl_high_v2u32(a, b); +} -void __builtin_mpl_vector_st1q_lane_u64v2(uint64_t *ptr, uint64x2_t val, const int lane); -#define vst1q_lane_u64(ptr, val, lane) __builtin_mpl_vector_st1q_lane_u64v2(ptr, val, lane) +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsubw_s8( + int16x8_t a, int8x8_t b) { + return __builtin_mpl_vector_subw_low_v8i8(a, b); +} -void __builtin_mpl_vector_st2_i8v8(int8_t *ptr, int8x8x2_t val); -#define vst2_s8(ptr, val) __builtin_mpl_vector_st2_i8v8(ptr, val) +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsubw_s16( + int32x4_t a, int16x4_t b) { + return __builtin_mpl_vector_subw_low_v4i16(a, b); +} -void __builtin_mpl_vector_st2q_i8v16(int8_t *ptr, int8x16x2_t val); -#define vst2q_s8(ptr, val) __builtin_mpl_vector_st2q_i8v16(ptr, val) +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsubw_s32( + int64x2_t a, int32x2_t b) { + return __builtin_mpl_vector_subw_low_v2i32(a, b); +} -void __builtin_mpl_vector_st2_i16v4(int16_t *ptr, int16x4x2_t val); -#define vst2_s16(ptr, val) __builtin_mpl_vector_st2_i16v4(ptr, val) +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsubw_u8( + uint16x8_t a, uint8x8_t b) { + return __builtin_mpl_vector_subw_low_v8u8(a, b); +} -void __builtin_mpl_vector_st2q_i16v8(int16_t *ptr, int16x8x2_t val); -#define vst2q_s16(ptr, val) __builtin_mpl_vector_st2q_i16v8(ptr, val) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsubw_u16( + uint32x4_t a, uint16x4_t b) { + return __builtin_mpl_vector_subw_low_v4u16(a, b); +} -void __builtin_mpl_vector_st2_i32v2(int32_t *ptr, int32x2x2_t val); -#define vst2_s32(ptr, val) __builtin_mpl_vector_st2_i32v2(ptr, val) +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsubw_u32( + uint64x2_t a, uint32x2_t b) { + return __builtin_mpl_vector_subw_low_v2u32(a, b); +} -void __builtin_mpl_vector_st2q_i32v4(int32_t *ptr, int32x4x2_t val); -#define vst2q_s32(ptr, val) __builtin_mpl_vector_st2q_i32v4(ptr, val) +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsubw_high_s8( + int16x8_t a, int8x16_t b) { + return __builtin_mpl_vector_subw_high_v8i8(a, b); +} -void __builtin_mpl_vector_st2_u8v8(uint8_t *ptr, uint8x8x2_t val); -#define vst2_u8(ptr, val) __builtin_mpl_vector_st2_u8v8(ptr, val) +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsubw_high_s16( + int32x4_t a, int16x8_t b) { + return __builtin_mpl_vector_subw_high_v4i16(a, b); +} -void __builtin_mpl_vector_st2q_u8v16(uint8_t *ptr, uint8x16x2_t val); -#define vst2q_u8(ptr, val) __builtin_mpl_vector_st2q_u8v16(ptr, val) +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsubw_high_s32( + int64x2_t a, int32x4_t b) { + return __builtin_mpl_vector_subw_high_v2i32(a, b); +} -void __builtin_mpl_vector_st2_u16v4(uint16_t *ptr, uint16x4x2_t val); -#define vst2_u16(ptr, val) __builtin_mpl_vector_st2_u16v4(ptr, val) +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsubw_high_u8( + uint16x8_t a, uint8x16_t b) { + return __builtin_mpl_vector_subw_high_v8u8(a, b); +} -void __builtin_mpl_vector_st2q_u16v8(uint16_t *ptr, uint16x8x2_t val); -#define vst2q_u16(ptr, val) __builtin_mpl_vector_st2q_u16v8(ptr, val) +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsubw_high_u16( + uint32x4_t a, uint16x8_t b) { + return __builtin_mpl_vector_subw_high_v4u16(a, b); +} -void __builtin_mpl_vector_st2_u32v2(uint32_t *ptr, uint32x2x2_t val); -#define vst2_u32(ptr, val) __builtin_mpl_vector_st2_u32v2(ptr, val) +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsubw_high_u32( + uint64x2_t a, uint32x4_t b) { + return __builtin_mpl_vector_subw_high_v2u32(a, b); +} -void __builtin_mpl_vector_st2q_u32v4(uint32_t *ptr, uint32x4x2_t val); -#define vst2q_u32(ptr, val) __builtin_mpl_vector_st2q_u32v4(ptr, val) +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vabd_s8( + int8x8_t a, int8x8_t b) { + return __builtin_mpl_vector_abd_v8i8(a, b); +} -void __builtin_mpl_vector_st2_i64v1(int64_t *ptr, int64x1x2_t val); -#define vst2_s64(ptr, val) __builtin_mpl_vector_st2_i64v1(ptr, val) +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vabdq_s8( + int8x16_t a, int8x16_t b) { + return __builtin_mpl_vector_abdq_v16i8(a, b); +} -void __builtin_mpl_vector_st2_u64v1(uint64_t *ptr, uint64x1x2_t val); -#define vst2_u64(ptr, val) __builtin_mpl_vector_st2_u64v1(ptr, val) +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vabd_s16( + int16x4_t a, int16x4_t b) { + return __builtin_mpl_vector_abd_v4i16(a, b); +} -void __builtin_mpl_vector_st2q_i64v2(int64_t *ptr, int64x2x2_t val); -#define vst2q_s64(ptr, val) __builtin_mpl_vector_st2q_i64v2(ptr, val) +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vabdq_s16( + int16x8_t a, int16x8_t b) { + return __builtin_mpl_vector_abdq_v8i16(a, b); +} + +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vabd_s32( + int32x2_t a, int32x2_t b) { + return __builtin_mpl_vector_abd_v2i32(a, b); +} + +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vabdq_s32( + int32x4_t a, int32x4_t b) { + return __builtin_mpl_vector_abdq_v4i32(a, b); +} + +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vabd_u8( + uint8x8_t a, uint8x8_t b) { + return __builtin_mpl_vector_abd_v8u8(a, b); +} + +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vabdq_u8( + uint8x16_t a, uint8x16_t b) { + return __builtin_mpl_vector_abdq_v16u8(a, b); +} + +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vabd_u16( + uint16x4_t a, uint16x4_t b) { + return __builtin_mpl_vector_abd_v4u16(a, b); +} + +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vabdq_u16( + uint16x8_t a, uint16x8_t b) { + return __builtin_mpl_vector_abdq_v8u16(a, b); +} + +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vabd_u32( + uint32x2_t a, uint32x2_t b) { + return __builtin_mpl_vector_abd_v2u32(a, b); +} + +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vabdq_u32( + uint32x4_t a, uint32x4_t b) { + return __builtin_mpl_vector_abdq_v4u32(a, b); +} + +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmax_s8( + int8x8_t a, int8x8_t b) { + return __builtin_mpl_vector_max_v8i8(a, b); +} + +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmaxq_s8( + int8x16_t a, int8x16_t b) { + return __builtin_mpl_vector_maxq_v16i8(a, b); +} + +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmax_s16( + int16x4_t a, int16x4_t b) { + return __builtin_mpl_vector_max_v4i16(a, b); +} + +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmaxq_s16( + int16x8_t a, int16x8_t b) { + return __builtin_mpl_vector_maxq_v8i16(a, b); +} + +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmax_s32( + int32x2_t a, int32x2_t b) { + return __builtin_mpl_vector_max_v2i32(a, b); +} + +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmaxq_s32( + int32x4_t a, int32x4_t b) { + return __builtin_mpl_vector_maxq_v4i32(a, b); +} + +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmax_u8( + uint8x8_t a, uint8x8_t b) { + return __builtin_mpl_vector_max_v8u8(a, b); +} + +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmaxq_u8( + uint8x16_t a, uint8x16_t b) { + return __builtin_mpl_vector_maxq_v16u8(a, b); +} + +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmax_u16( + uint16x4_t a, uint16x4_t b) { + return __builtin_mpl_vector_max_v4u16(a, b); +} + +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmaxq_u16( + uint16x8_t a, uint16x8_t b) { + return __builtin_mpl_vector_maxq_v8u16(a, b); +} + +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmax_u32( + uint32x2_t a, uint32x2_t b) { + return __builtin_mpl_vector_max_v2u32(a, b); +} + +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmaxq_u32( + uint32x4_t a, uint32x4_t b) { + return __builtin_mpl_vector_maxq_v4u32(a, b); +} + +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmin_s8( + int8x8_t a, int8x8_t b) { + return __builtin_mpl_vector_min_v8i8(a, b); +} + +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vminq_s8( + int8x16_t a, int8x16_t b) { + return __builtin_mpl_vector_minq_v16i8(a, b); +} + +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmin_s16( + int16x4_t a, int16x4_t b) { + return __builtin_mpl_vector_min_v4i16(a, b); +} + +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vminq_s16( + int16x8_t a, int16x8_t b) { + return __builtin_mpl_vector_minq_v8i16(a, b); +} + +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmin_s32( + int32x2_t a, int32x2_t b) { + return __builtin_mpl_vector_min_v2i32(a, b); +} + +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vminq_s32( + int32x4_t a, int32x4_t b) { + return __builtin_mpl_vector_minq_v4i32(a, b); +} + +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmin_u8( + uint8x8_t a, uint8x8_t b) { + return __builtin_mpl_vector_min_v8u8(a, b); +} + +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vminq_u8( + uint8x16_t a, uint8x16_t b) { + return __builtin_mpl_vector_minq_v16u8(a, b); +} + +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmin_u16( + uint16x4_t a, uint16x4_t b) { + return __builtin_mpl_vector_min_v4u16(a, b); +} + +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vminq_u16( + uint16x8_t a, uint16x8_t b) { + return __builtin_mpl_vector_minq_v8u16(a, b); +} + +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmin_u32( + uint32x2_t a, uint32x2_t b) { + return __builtin_mpl_vector_min_v2u32(a, b); +} + +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vminq_u32( + uint32x4_t a, uint32x4_t b) { + return __builtin_mpl_vector_minq_v4u32(a, b); +} + +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrecpe_u32( + uint32x2_t a) { + return __builtin_mpl_vector_recpe_v2u32(a); +} + +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrecpeq_u32( + uint32x4_t a) { + return __builtin_mpl_vector_recpeq_v4u32(a); +} + +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpadd_s8( + int8x8_t a, int8x8_t b) { + return __builtin_mpl_vector_padd_v8i8(a, b); +} + +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpadd_s16( + int16x4_t a, int16x4_t b) { + return __builtin_mpl_vector_padd_v4i16(a, b); +} + +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpadd_s32( + int32x2_t a, int32x2_t b) { + return __builtin_mpl_vector_padd_v2i32(a, b); +} + +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpadd_u8( + uint8x8_t a, uint8x8_t b) { + return __builtin_mpl_vector_padd_v8u8(a, b); +} + +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpadd_u16( + uint16x4_t a, uint16x4_t b) { + return __builtin_mpl_vector_padd_v4u16(a, b); +} + +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpadd_u32( + uint32x2_t a, uint32x2_t b) { + return __builtin_mpl_vector_padd_v2u32(a, b); +} + +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpaddq_s8( + int8x16_t a, int8x16_t b) { + return __builtin_mpl_vector_paddq_v16i8(a, b); +} + +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpaddq_s16( + int16x8_t a, int16x8_t b) { + return __builtin_mpl_vector_paddq_v8i16(a, b); +} + +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpaddq_s32( + int32x4_t a, int32x4_t b) { + return __builtin_mpl_vector_paddq_v4i32(a, b); +} + +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpaddq_s64( + int64x2_t a, int64x2_t b) { + return __builtin_mpl_vector_paddq_v2i64(a, b); +} + +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpaddq_u8( + uint8x16_t a, uint8x16_t b) { + return __builtin_mpl_vector_paddq_v16u8(a, b); +} + +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpaddq_u16( + uint16x8_t a, uint16x8_t b) { + return __builtin_mpl_vector_paddq_v8u16(a, b); +} + +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpaddq_u32( + uint32x4_t a, uint32x4_t b) { + return __builtin_mpl_vector_paddq_v4u32(a, b); +} + +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpaddq_u64( + uint64x2_t a, uint64x2_t b) { + return __builtin_mpl_vector_paddq_v2u64(a, b); +} + +extern inline int64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpaddd_s64(int64x2_t a) { + return vget_lane_s64(__builtin_mpl_vector_paddd_v2i64(a), 0); +} + +extern inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpaddd_u64( + uint64x2_t a) { + return vget_lane_u64(__builtin_mpl_vector_paddd_v2u64(a), 0); +} + +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpmax_s8( + int8x8_t a, int8x8_t b) { + return __builtin_mpl_vector_pmax_v8i8(a, b); +} + +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpmax_s16( + int16x4_t a, int16x4_t b) { + return __builtin_mpl_vector_pmax_v4i16(a, b); +} + +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpmax_s32( + int32x2_t a, int32x2_t b) { + return __builtin_mpl_vector_pmax_v2i32(a, b); +} + +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpmax_u8( + uint8x8_t a, uint8x8_t b) { + return __builtin_mpl_vector_pmax_v8u8(a, b); +} + +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpmax_u16( + uint16x4_t a, uint16x4_t b) { + return __builtin_mpl_vector_pmax_v4u16(a, b); +} + +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpmax_u32( + uint32x2_t a, uint32x2_t b) { + return __builtin_mpl_vector_pmax_v2u32(a, b); +} + +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpmaxq_s8( + int8x16_t a, int8x16_t b) { + return __builtin_mpl_vector_pmaxq_v16i8(a, b); +} + +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpmaxq_s16( + int16x8_t a, int16x8_t b) { + return __builtin_mpl_vector_pmaxq_v8i16(a, b); +} + +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpmaxq_s32( + int32x4_t a, int32x4_t b) { + return __builtin_mpl_vector_pmaxq_v4i32(a, b); +} + +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpmaxq_u8( + uint8x16_t a, uint8x16_t b) { + return __builtin_mpl_vector_pmaxq_v16u8(a, b); +} + +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpmaxq_u16( + uint16x8_t a, uint16x8_t b) { + return __builtin_mpl_vector_pmaxq_v8u16(a, b); +} + +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpmaxq_u32( + uint32x4_t a, uint32x4_t b) { + return __builtin_mpl_vector_pmaxq_v4u32(a, b); +} + +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpmin_s8( + int8x8_t a, int8x8_t b) { + return __builtin_mpl_vector_pmin_v8i8(a, b); +} + +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpmin_s16( + int16x4_t a, int16x4_t b) { + return __builtin_mpl_vector_pmin_v4i16(a, b); +} + +int32x2_t __builtin_mpl_vector_pmin_v2i32(int32x2_t a, int32x2_t b); +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpmin_s32( + int32x2_t a, int32x2_t b) { + return __builtin_mpl_vector_pmin_v2i32(a, b); +} + +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpmin_u8( + uint8x8_t a, uint8x8_t b) { + return __builtin_mpl_vector_pmin_v8u8(a, b); +} + +uint16x4_t __builtin_mpl_vector_pmin_v4u16(uint16x4_t a, uint16x4_t b); +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpmin_u16( + uint16x4_t a, uint16x4_t b) { + return __builtin_mpl_vector_pmin_v4u16(a, b); +} + +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpmin_u32( + uint32x2_t a, uint32x2_t b) { + return __builtin_mpl_vector_pmin_v2u32(a, b); +} + +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpminq_s8( + int8x16_t a, int8x16_t b) { + return __builtin_mpl_vector_pminq_v16i8(a, b); +} + +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpminq_s16( + int16x8_t a, int16x8_t b) { + return __builtin_mpl_vector_pminq_v8i16(a, b); +} + +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpminq_s32( + int32x4_t a, int32x4_t b) { + return __builtin_mpl_vector_pminq_v4i32(a, b); +} + +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpminq_u8( + uint8x16_t a, uint8x16_t b) { + return __builtin_mpl_vector_pminq_v16u8(a, b); +} + +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpminq_u16( + uint16x8_t a, uint16x8_t b) { + return __builtin_mpl_vector_pminq_v8u16(a, b); +} + +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vpminq_u32( + uint32x4_t a, uint32x4_t b) { + return __builtin_mpl_vector_pminq_v4u32(a, b); +} + +extern inline int8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmaxv_s8(int8x8_t a) { + return vget_lane_s8(__builtin_mpl_vector_maxv_v8i8(a), 0); +} + +extern inline int8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmaxvq_s8(int8x16_t a) { + return vgetq_lane_s8(__builtin_mpl_vector_maxvq_v16i8(a), 0); +} + +extern inline int16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmaxv_s16(int16x4_t a) { + return vget_lane_s16(__builtin_mpl_vector_maxv_v4i16(a), 0); +} + +extern inline int16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmaxvq_s16(int16x8_t a) { + return vgetq_lane_s16(__builtin_mpl_vector_maxvq_v8i16(a), 0); +} + +extern inline int32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmaxv_s32(int32x2_t a) { + return vget_lane_s32(__builtin_mpl_vector_maxv_v2i32(a), 0); +} + +extern inline int32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmaxvq_s32(int32x4_t a) { + return vgetq_lane_s32(__builtin_mpl_vector_maxvq_v4i32(a), 0); +} + +extern inline uint8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmaxv_u8(uint8x8_t a) { + return vget_lane_u8(__builtin_mpl_vector_maxv_v8u8(a), 0); +} + +extern inline uint8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmaxvq_u8(uint8x16_t a) { + return vgetq_lane_u8(__builtin_mpl_vector_maxvq_v16u8(a), 0); +} + +extern inline uint16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmaxv_u16( + uint16x4_t a) { + return vget_lane_u16(__builtin_mpl_vector_maxv_v4u16(a), 0); +} + +extern inline uint16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmaxvq_u16( + uint16x8_t a) { + return vgetq_lane_u16(__builtin_mpl_vector_maxvq_v8u16(a), 0); +} + +extern inline uint32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmaxv_u32( + uint32x2_t a) { + return vget_lane_u32(__builtin_mpl_vector_maxv_v2u32(a), 0); +} + +extern inline uint32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmaxvq_u32( + uint32x4_t a) { + return vgetq_lane_u32(__builtin_mpl_vector_maxvq_v4u32(a), 0); +} + +extern inline int8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vminv_s8(int8x8_t a) { + return vget_lane_s8(__builtin_mpl_vector_minv_v8i8(a), 0); +} + +extern inline int8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vminvq_s8(int8x16_t a) { + return vgetq_lane_s8(__builtin_mpl_vector_minvq_v16i8(a), 0); +} + +extern inline int16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vminv_s16(int16x4_t a) { + return vget_lane_s16(__builtin_mpl_vector_minv_v4i16(a), 0); +} + +extern inline int16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vminvq_s16(int16x8_t a) { + return vgetq_lane_s16(__builtin_mpl_vector_minvq_v8i16(a), 0); +} + +extern inline int32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vminv_s32(int32x2_t a) { + return vget_lane_s32(__builtin_mpl_vector_minv_v2i32(a), 0); +} + +extern inline int32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vminvq_s32(int32x4_t a) { + return vgetq_lane_s32(__builtin_mpl_vector_minvq_v4i32(a), 0); +} + +extern inline uint8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vminv_u8(uint8x8_t a) { + return vget_lane_u8(__builtin_mpl_vector_minv_v8u8(a), 0); +} + +extern inline uint8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vminvq_u8(uint8x16_t a) { + return vgetq_lane_u8(__builtin_mpl_vector_minvq_v16u8(a), 0); +} + +extern inline uint16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vminv_u16( + uint16x4_t a) { + return vget_lane_u16(__builtin_mpl_vector_minv_v4u16(a), 0); +} + +extern inline uint16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vminvq_u16( + uint16x8_t a) { + return vgetq_lane_u16(__builtin_mpl_vector_minvq_v8u16(a), 0); +} + +extern inline uint32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vminv_u32( + uint32x2_t a) { + return vget_lane_u32(__builtin_mpl_vector_minv_v2u32(a), 0); +} + +extern inline uint32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vminvq_u32( + uint32x4_t a) { + return vgetq_lane_u32(__builtin_mpl_vector_minvq_v4u32(a), 0); +} + +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtst_s8( + int8x8_t a, int8x8_t b) { + return __builtin_mpl_vector_tst_v8i8(a, b); +} + +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtstq_s8( + int8x16_t a, int8x16_t b) { + return __builtin_mpl_vector_tstq_v16i8(a, b); +} + +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtst_s16( + int16x4_t a, int16x4_t b) { + return __builtin_mpl_vector_tst_v4i16(a, b); +} + +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtstq_s16( + int16x8_t a, int16x8_t b) { + return __builtin_mpl_vector_tstq_v8i16(a, b); +} + +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtst_s32( + int32x2_t a, int32x2_t b) { + return __builtin_mpl_vector_tst_v2i32(a, b); +} + +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtstq_s32( + int32x4_t a, int32x4_t b) { + return __builtin_mpl_vector_tstq_v4i32(a, b); +} + +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtst_u8( + uint8x8_t a, uint8x8_t b) { + return __builtin_mpl_vector_tst_v8u8(a, b); +} + +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtstq_u8( + uint8x16_t a, uint8x16_t b) { + return __builtin_mpl_vector_tstq_v16u8(a, b); +} + +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtst_u16( + uint16x4_t a, uint16x4_t b) { + return __builtin_mpl_vector_tst_v4u16(a, b); +} + +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtstq_u16( + uint16x8_t a, uint16x8_t b) { + return __builtin_mpl_vector_tstq_v8u16(a, b); +} + +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtst_u32( + uint32x2_t a, uint32x2_t b) { + return __builtin_mpl_vector_tst_v2u32(a, b); +} + +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtstq_u32( + uint32x4_t a, uint32x4_t b) { + return __builtin_mpl_vector_tstq_v4u32(a, b); +} + +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtst_s64( + int64x1_t a, int64x1_t b) { + return __builtin_mpl_vector_tst_v1i64(a, b); +} + +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtstq_s64( + int64x2_t a, int64x2_t b) { + return __builtin_mpl_vector_tstq_v2i64(a, b); +} + +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtst_u64( + uint64x1_t a, uint64x1_t b) { + return __builtin_mpl_vector_tst_v1u64(a, b); +} + +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtstq_u64( + uint64x2_t a, uint64x2_t b) { + return __builtin_mpl_vector_tstq_v2u64(a, b); +} + +extern inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtstd_s64( + int64_t a, int64_t b) { + return (a & b) ? -1ll : 0ll; +} + +extern inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtstd_u64( + uint64_t a, uint64_t b) { + return (a & b) ? -1ll : 0ll; +} + +extern inline int8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqmovnh_s16(int16_t a) { + return vget_lane_s8(__builtin_mpl_vector_qmovnh_i16(__builtin_mpl_vector_from_scalar_v4i16(a)), 0); +} + +extern inline int16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqmovns_s32(int32_t a) { + return vget_lane_s16(__builtin_mpl_vector_qmovns_i32(__builtin_mpl_vector_from_scalar_v2i32(a)), 0); +} + +extern inline int32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqmovnd_s64(int64_t a) { + return vget_lane_s32(__builtin_mpl_vector_qmovnd_i64(__builtin_mpl_vector_from_scalar_v1i64(a)), 0); +} + +extern inline uint8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqmovnh_u16(uint16_t a) { + return vget_lane_u8(__builtin_mpl_vector_qmovnh_u16(__builtin_mpl_vector_from_scalar_v4u16(a)), 0); +} + +extern inline uint16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqmovns_u32( + uint32_t a) { + return vget_lane_u16(__builtin_mpl_vector_qmovns_u32(__builtin_mpl_vector_from_scalar_v2u32(a)), 0); +} + +extern inline uint32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqmovnd_u64( + uint64_t a) { + return vget_lane_u32(__builtin_mpl_vector_qmovnd_u64(__builtin_mpl_vector_from_scalar_v1u64(a)), 0); +} + +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqmovn_high_s16( + int8x8_t r, int16x8_t a) { + return __builtin_mpl_vector_qmovn_high_v16i8(r, a); +} + +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqmovn_high_s32( + int16x4_t r, int32x4_t a) { + return __builtin_mpl_vector_qmovn_high_v8i16(r, a); +} + +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqmovn_high_s64( + int32x2_t r, int64x2_t a) { + return __builtin_mpl_vector_qmovn_high_v4i32(r, a); +} + +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqmovn_high_u16( + uint8x8_t r, uint16x8_t a) { + return __builtin_mpl_vector_qmovn_high_v16u8(r, a); +} + +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqmovn_high_u32( + uint16x4_t r, uint32x4_t a) { + return __builtin_mpl_vector_qmovn_high_v8u16(r, a); +} + +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqmovn_high_u64( + uint32x2_t r, uint64x2_t a) { + return __builtin_mpl_vector_qmovn_high_v4u32(r, a); +} + +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqmovun_s16( + int16x8_t a) { + return __builtin_mpl_vector_qmovun_v8u8(a); +} + +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqmovun_s32( + int32x4_t a) { + return __builtin_mpl_vector_qmovun_v4u16(a); +} + +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqmovun_s64( + int64x2_t a) { + return __builtin_mpl_vector_qmovun_v2u32(a); +} + +extern inline uint8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqmovunh_s16( + int16_t a) { + return vget_lane_s8(__builtin_mpl_vector_qmovunh_i16(__builtin_mpl_vector_from_scalar_v4i16(a)), 0); +} + +extern inline uint16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqmovuns_s32( + int32_t a) { + return vget_lane_s16(__builtin_mpl_vector_qmovuns_i32(__builtin_mpl_vector_from_scalar_v2i32(a)), 0); +} + +extern inline uint32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqmovund_s64( + int64_t a) { + return vget_lane_s32(__builtin_mpl_vector_qmovund_i64(__builtin_mpl_vector_from_scalar_v1i64(a)), 0); +} + +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqmovun_high_s16( + uint8x8_t r, int16x8_t a) { + return __builtin_mpl_vector_qmovun_high_v16u8(r, a); +} + +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqmovun_high_s32( + uint16x4_t r, int32x4_t a) { + return __builtin_mpl_vector_qmovun_high_v8u16(r, a); +} + +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqmovun_high_s64( + uint32x2_t r, int64x2_t a) { + return __builtin_mpl_vector_qmovun_high_v4u32(r, a); +} + +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmul_n_s16( + int16x4_t a, int16_t b) { + return a * (int16x4_t){b, b, b, b}; +} + +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmulq_n_s16( + int16x8_t a, int16_t b) { + return a * (int16x8_t){b, b, b, b, b, b, b, b}; +} + +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmul_n_s32( + int32x2_t a, int32_t b) { + return a * (int32x2_t){b, b}; +} + +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmulq_n_s32( + int32x4_t a, int32_t b) { + return a * (int32x4_t){b, b, b, b}; +} + +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmul_n_u16( + uint16x4_t a, uint16_t b) { + return a * (uint16x4_t){b, b, b, b}; +} + +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmulq_n_u16( + uint16x8_t a, uint16_t b) { + return a * (uint16x8_t){b, b, b, b, b, b, b, b}; +} + +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmul_n_u32( + uint32x2_t a, uint32_t b) { + return a * (uint32x2_t){b, b}; +} + +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmulq_n_u32( + uint32x4_t a, uint32_t b) { + return a * (uint32x4_t){b, b, b, b}; +} + +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmul_lane_s16( + int16x4_t a, int16x4_t v, const int lane) { + return __builtin_mpl_vector_mul_lane_v4i16(a, v, lane); +} + +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmulq_lane_s16( + int16x8_t a, int16x4_t v, const int lane) { + return __builtin_mpl_vector_mulq_lane_v8i16(a, v, lane); +} + +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmul_lane_s32( + int32x2_t a, int32x2_t v, const int lane) { + return __builtin_mpl_vector_mul_lane_v2i32(a, v, lane); +} + +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmulq_lane_s32( + int32x4_t a, int32x2_t v, const int lane) { + return __builtin_mpl_vector_mulq_lane_v4i32(a, v, lane); +} + +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmul_lane_u16( + uint16x4_t a, uint16x4_t v, const int lane) { + return __builtin_mpl_vector_mul_lane_v4u16(a, v, lane); +} + +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmulq_lane_u16( + uint16x8_t a, uint16x4_t v, const int lane) { + return __builtin_mpl_vector_mulq_lane_v8u16(a, v, lane); +} + +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmul_lane_u32( + uint32x2_t a, uint32x2_t v, const int lane) { + return __builtin_mpl_vector_mul_lane_v2u32(a, v, lane); +} + +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmulq_lane_u32( + uint32x4_t a, uint32x2_t v, const int lane) { + return __builtin_mpl_vector_mulq_lane_v4u32(a, v, lane); +} + +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmul_laneq_s16( + int16x4_t a, int16x8_t v, const int lane) { + return __builtin_mpl_vector_mul_laneq_v4i16(a, v, lane); +} + +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmulq_laneq_s16( + int16x8_t a, int16x8_t v, const int lane) { + return __builtin_mpl_vector_mulq_laneq_v8i16(a, v, lane); +} + +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmul_laneq_s32( + int32x2_t a, int32x4_t v, const int lane) { + return __builtin_mpl_vector_mul_laneq_v2i32(a, v, lane); +} + +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmulq_laneq_s32( + int32x4_t a, int32x4_t v, const int lane) { + return __builtin_mpl_vector_mulq_laneq_v4i32(a, v, lane); +} + +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmul_laneq_u16( + uint16x4_t a, uint16x8_t v, const int lane) { + return __builtin_mpl_vector_mul_laneq_v4u16(a, v, lane); +} + +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmulq_laneq_u16( + uint16x8_t a, uint16x8_t v, const int lane) { + return __builtin_mpl_vector_mulq_laneq_v8u16(a, v, lane); +} + +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmul_laneq_u32( + uint32x2_t a, uint32x4_t v, const int lane) { + return __builtin_mpl_vector_mul_laneq_v2u32(a, v, lane); +} + +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmulq_laneq_u32( + uint32x4_t a, uint32x4_t v, const int lane) { + return __builtin_mpl_vector_mulq_laneq_v4u32(a, v, lane); +} + +int32x4_t __builtin_mpl_vector_mull_n_v4i32(int16x4_t a, int16_t b); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmull_n_s16( + int16x4_t a, int16_t b) { + return vmull_s16(a, ((int16x4_t){b, b, b, b})); +} + +int64x2_t __builtin_mpl_vector_mull_n_v2i64(int32x2_t a, int32_t b); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmull_n_s32( + int32x2_t a, int32_t b) { + return vmull_s32(a, ((int32x2_t){b, b})); +} + +uint32x4_t __builtin_mpl_vector_mull_n_v4u32(uint16x4_t a, uint16_t b); +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmull_n_u16( + uint16x4_t a, uint16_t b) { + return vmull_u16(a, ((uint16x4_t){b, b, b, b})); +} + +uint64x2_t __builtin_mpl_vector_mull_n_v2u64(uint32x2_t a, uint32_t b); +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmull_n_u32( + uint32x2_t a, uint32_t b) { + return vmull_u32(a, ((uint32x2_t){b, b})); +} + +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmull_high_n_s16( + int16x8_t a, int16_t b) { + return vmull_n_s16((vget_high_s16(a)), b); +} + +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmull_high_n_s32( + int32x4_t a, int32_t b) { + return vmull_n_s32((vget_high_s32(a)), b); +} + +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmull_high_n_u16( + uint16x8_t a, uint16_t b) { + return vmull_n_u16((vget_high_u16(a)), b); +} + +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmull_high_n_u32( + uint32x4_t a, uint32_t b) { + return vmull_n_u32((vget_high_u32(a)), b); +} + +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmull_lane_s16( + int16x4_t a, int16x4_t v, const int lane) { + return __builtin_mpl_vector_mull_lane_v4i32(a, v, lane); +} + +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmull_lane_s32( + int32x2_t a, int32x2_t v, const int lane) { + return __builtin_mpl_vector_mull_lane_v2i64(a, v, lane); +} + +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmull_lane_u16( + uint16x4_t a, uint16x4_t v, const int lane) { + return __builtin_mpl_vector_mull_lane_v4u32(a, v, lane); +} + +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmull_lane_u32( + uint32x2_t a, uint32x2_t v, const int lane) { + return __builtin_mpl_vector_mull_lane_v2u64(a, v, lane); +} + +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmull_high_lane_s16( + int16x8_t a, int16x4_t v, const int lane) { + return __builtin_mpl_vector_mull_high_lane_v4i32(a, v, lane); +} + +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmull_high_lane_s32( + int32x4_t a, int32x2_t v, const int lane) { + return __builtin_mpl_vector_mull_high_lane_v2i64(a, v, lane); +} + +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmull_high_lane_u16( + uint16x8_t a, uint16x4_t v, const int lane) { + return __builtin_mpl_vector_mull_high_lane_v4u32(a, v, lane); +} + +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmull_high_lane_u32( + uint32x4_t a, uint32x2_t v, const int lane) { + return __builtin_mpl_vector_mull_high_lane_v2u64(a, v, lane); +} + +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmull_laneq_s16( + int16x4_t a, int16x8_t v, const int lane) { + return __builtin_mpl_vector_mull_laneq_v4i32(a, v, lane); +} + +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmull_laneq_s32( + int32x2_t a, int32x4_t v, const int lane) { + return __builtin_mpl_vector_mull_laneq_v2i64(a, v, lane); +} + +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmull_laneq_u16( + uint16x4_t a, uint16x8_t v, const int lane) { + return __builtin_mpl_vector_mull_laneq_v4u32(a, v, lane); +} + +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmull_laneq_u32( + uint32x2_t a, uint32x4_t v, const int lane) { + return __builtin_mpl_vector_mull_laneq_v2u64(a, v, lane); +} + +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmull_high_laneq_s16( + int16x8_t a, int16x8_t v, const int lane) { + return __builtin_mpl_vector_mull_high_laneq_v4i32(a, v, lane); +} + +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmull_high_laneq_s32( + int32x4_t a, int32x4_t v, const int lane) { + return __builtin_mpl_vector_mull_high_laneq_v2i64(a, v, lane); +} + +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmull_high_laneq_u16( + uint16x8_t a, uint16x8_t v, const int lane) { + return __builtin_mpl_vector_mull_high_laneq_v4u32(a, v, lane); +} + +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmull_high_laneq_u32( + uint32x4_t a, uint32x4_t v, const int lane) { + return __builtin_mpl_vector_mull_high_laneq_v2u64(a, v, lane); +} + +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vneg_s8(int8x8_t a) { + return __builtin_mpl_vector_neg_v8i8(a); +} + +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vnegq_s8(int8x16_t a) { + return __builtin_mpl_vector_negq_v16i8(a); +} + +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vneg_s16(int16x4_t a) { + return __builtin_mpl_vector_neg_v4i16(a); +} + +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vnegq_s16( + int16x8_t a) { + return __builtin_mpl_vector_negq_v8i16(a); +} + +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vneg_s32(int32x2_t a) { + return __builtin_mpl_vector_neg_v2i32(a); +} + +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vnegq_s32( + int32x4_t a) { + return __builtin_mpl_vector_negq_v4i32(a); +} + +extern inline int64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vneg_s64(int64x1_t a) { + return __builtin_mpl_vector_neg_v1i64(a); +} + +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vnegq_s64( + int64x2_t a) { + return __builtin_mpl_vector_negq_v2i64(a); +} + +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmvn_s8(int8x8_t a) { + return __builtin_mpl_vector_mvn_v8i8(a); +} + +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmvnq_s8(int8x16_t a) { + return __builtin_mpl_vector_mvnq_v16i8(a); +} + +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmvn_s16(int16x4_t a) { + return (int8x8_t)__builtin_mpl_vector_mvn_v8i8((int8x8_t)a); +} + +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmvnq_s16( + int16x8_t a) { + return (int8x16_t)__builtin_mpl_vector_mvnq_v16i8((int8x16_t)a); +} + +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmvn_s32(int32x2_t a) { + return (int8x8_t)__builtin_mpl_vector_mvn_v8i8((int8x8_t)a); +} + +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmvnq_s32( + int32x4_t a) { + return (int8x16_t)__builtin_mpl_vector_mvnq_v16i8((int8x16_t)a); +} + +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmvn_u8(uint8x8_t a) { + return __builtin_mpl_vector_mvn_v8u8(a); +} + +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmvnq_u8( + uint8x16_t a) { + return __builtin_mpl_vector_mvnq_v16u8(a); +} + +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmvn_u16( + uint16x4_t a) { + return (uint8x8_t)__builtin_mpl_vector_mvn_v8u8((uint8x8_t)a); +} + +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmvnq_u16( + uint16x8_t a) { + return (uint8x16_t)__builtin_mpl_vector_mvnq_v16u8((uint8x16_t)a); +} + +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmvn_u32( + uint32x2_t a) { + return (uint8x8_t)__builtin_mpl_vector_mvn_v8u8((uint8x8_t)a); +} + +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmvnq_u32( + uint32x4_t a) { + return (uint8x16_t)__builtin_mpl_vector_mvnq_v16u8((uint8x16_t)a); +} + +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vorn_s8( + int8x8_t a, int8x8_t b) { + return __builtin_mpl_vector_orn_v8i8(a, b); +} + +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vornq_s8( + int8x16_t a, int8x16_t b) { + return __builtin_mpl_vector_ornq_v16i8(a, b); +} + +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vorn_s16( + int16x4_t a, int16x4_t b) { + return (int8x8_t)__builtin_mpl_vector_orn_v8i8((int8x8_t)a, (int8x8_t)b); +} + +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vornq_s16( + int16x8_t a, int16x8_t b) { + return (int8x16_t)__builtin_mpl_vector_ornq_v16i8((int8x16_t)a, (int8x16_t)b); +} + +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vorn_s32( + int32x2_t a, int32x2_t b) { + return (int8x8_t)__builtin_mpl_vector_orn_v8i8((int8x8_t)a, (int8x8_t)b); +} + +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vornq_s32( + int32x4_t a, int32x4_t b) { + return (int8x16_t)__builtin_mpl_vector_ornq_v16i8((int8x16_t)a, (int8x16_t)b); +} + +extern inline int64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vorn_s64( + int64x1_t a, int64x1_t b) { + return (int8x8_t)__builtin_mpl_vector_orn_v8i8((int8x8_t)a, (int8x8_t)b); +} + +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vornq_s64( + int64x2_t a, int64x2_t b) { + return (int8x16_t)__builtin_mpl_vector_ornq_v16i8((int8x16_t)a, (int8x16_t)b); +} + +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vorn_u8( + uint8x8_t a, uint8x8_t b) { + return __builtin_mpl_vector_orn_v8u8(a, b); +} + +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vornq_u8( + uint8x16_t a, uint8x16_t b) { + return __builtin_mpl_vector_ornq_v16u8(a, b); +} + +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vorn_u16( + uint16x4_t a, uint16x4_t b) { + return (uint8x8_t)__builtin_mpl_vector_orn_v8u8((uint8x8_t)a, (uint8x8_t)b); +} + +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vornq_u16( + uint16x8_t a, uint16x8_t b) { + return (uint8x16_t)__builtin_mpl_vector_ornq_v16u8((uint8x16_t)a, (uint8x16_t)b); +} + +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vorn_u32( + uint32x2_t a, uint32x2_t b) { + return (uint8x8_t)__builtin_mpl_vector_orn_v8u8((uint8x8_t)a, (uint8x8_t)b); +} + +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vornq_u32( + uint32x4_t a, uint32x4_t b) { + return (uint8x16_t)__builtin_mpl_vector_ornq_v16u8((uint8x16_t)a, (uint8x16_t)b); +} + +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vorn_u64( + uint64x1_t a, uint64x1_t b) { + return (uint8x8_t)__builtin_mpl_vector_orn_v8u8((uint8x8_t)a, (uint8x8_t)b); +} + +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vornq_u64( + uint64x2_t a, uint64x2_t b) { + return (uint8x16_t)__builtin_mpl_vector_ornq_v16u8((uint8x16_t)a, (uint8x16_t)b); +} + +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcls_s8(int8x8_t a) { + return __builtin_mpl_vector_cls_v8i8(a); +} + +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vclsq_s8(int8x16_t a) { + return __builtin_mpl_vector_clsq_v16i8(a); +} + +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcls_s16(int16x4_t a) { + return __builtin_mpl_vector_cls_v4i16(a); +} + +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vclsq_s16( + int16x8_t a) { + return __builtin_mpl_vector_clsq_v8i16(a); +} + +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcls_s32(int32x2_t a) { + return __builtin_mpl_vector_cls_v2i32(a); +} + +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vclsq_s32( + int32x4_t a) { + return __builtin_mpl_vector_clsq_v4i32(a); +} + +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcls_u8(uint8x8_t a) { + return __builtin_mpl_vector_cls_v8u8(a); +} + +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vclsq_u8( + uint8x16_t a) { + return __builtin_mpl_vector_clsq_v16u8(a); +} + +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcls_u16(int16x4_t a) { + return __builtin_mpl_vector_cls_v4u16(a); +} + +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vclsq_u16( + uint16x8_t a) { + return __builtin_mpl_vector_clsq_v8u16(a); +} + +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcls_u32( + uint32x2_t a) { + return __builtin_mpl_vector_cls_v2u32(a); +} + +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vclsq_u32( + uint32x4_t a) { + return __builtin_mpl_vector_clsq_v4u32(a); +} + +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vclz_s8(int8x8_t a) { + return __builtin_mpl_vector_clz_v8i8(a); +} + +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vclzq_s8(int8x16_t a) { + return __builtin_mpl_vector_clzq_v16i8(a); +} + +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vclz_s16(int16x4_t a) { + return __builtin_mpl_vector_clz_v4i16(a); +} + +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vclzq_s16( + int16x8_t a) { + return __builtin_mpl_vector_clzq_v8i16(a); +} + +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vclz_s32(int32x2_t a) { + return __builtin_mpl_vector_clz_v2i32(a); +} + +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vclzq_s32( + int32x4_t a) { + return __builtin_mpl_vector_clzq_v4i32(a); +} + +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vclz_u8(uint8x8_t a) { + return __builtin_mpl_vector_clz_v8u8(a); +} + +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vclzq_u8( + uint8x16_t a) { + return __builtin_mpl_vector_clzq_v16u8(a); +} + +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vclz_u16( + uint16x4_t a) { + return __builtin_mpl_vector_clz_v4u16(a); +} + +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vclzq_u16( + uint16x8_t a) { + return __builtin_mpl_vector_clzq_v8u16(a); +} + +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vclz_u32( + uint32x2_t a) { + return __builtin_mpl_vector_clz_v2u32(a); +} + +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vclzq_u32( + uint32x4_t a) { + return __builtin_mpl_vector_clzq_v4u32(a); +} + +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcnt_s8(int8x8_t a) { + return __builtin_mpl_vector_cnt_v8i8(a); +} + +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcntq_s8(int8x16_t a) { + return __builtin_mpl_vector_cntq_v16i8(a); +} + +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcnt_u8(uint8x8_t a) { + return __builtin_mpl_vector_cnt_v8u8(a); +} + +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcntq_u8( + uint8x16_t a) { + return __builtin_mpl_vector_cntq_v16u8(a); +} + +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vbic_s8( + int8x8_t a, int8x8_t b) { + return __builtin_mpl_vector_bic_v8i8(a, b); +} + +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vbicq_s8( + int8x16_t a, int8x16_t b) { + return __builtin_mpl_vector_bicq_v16i8(a, b); +} + +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vbic_s16( + int16x4_t a, int16x4_t b) { + return __builtin_mpl_vector_bic_v4i16(a, b); +} + +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vbicq_s16( + int16x8_t a, int16x8_t b) { + return __builtin_mpl_vector_bicq_v8i16(a, b); +} + +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vbic_s32( + int32x2_t a, int32x2_t b) { + return __builtin_mpl_vector_bic_v2i32(a, b); +} + +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vbicq_s32( + int32x4_t a, int32x4_t b) { + return __builtin_mpl_vector_bicq_v4i32(a, b); +} + +extern inline int64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vbic_s64( + int64x1_t a, int64x1_t b) { + return __builtin_mpl_vector_bic_v1i64(a, b); +} + +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vbicq_s64( + int64x2_t a, int64x2_t b) { + return __builtin_mpl_vector_bicq_v2i64(a, b); +} + +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vbic_u8( + uint8x8_t a, uint8x8_t b) { + return __builtin_mpl_vector_bic_v8u8(a, b); +} + +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vbicq_u8( + uint8x16_t a, uint8x16_t b) { + return __builtin_mpl_vector_bicq_v16u8(a, b); +} + +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vbic_u16( + uint16x4_t a, uint16x4_t b) { + return __builtin_mpl_vector_bic_v4u16(a, b); +} + +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vbicq_u16( + uint16x8_t a, uint16x8_t b) { + return __builtin_mpl_vector_bicq_v8u16(a, b); +} + +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vbic_u32( + uint32x2_t a, uint32x2_t b) { + return __builtin_mpl_vector_bic_v2u32(a, b); +} + +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vbicq_u32( + uint32x4_t a, uint32x4_t b) { + return __builtin_mpl_vector_bicq_v4u32(a, b); +} + +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vbic_u64( + uint64x1_t a, uint64x1_t b) { + return __builtin_mpl_vector_bic_v1u64(a, b); +} + +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vbicq_u64( + uint64x2_t a, uint64x2_t b) { + return __builtin_mpl_vector_bicq_v2u64(a, b); +} + +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vbsl_s8( + uint8x8_t a, int8x8_t b, int8x8_t c) { + return __builtin_mpl_vector_bsl_v8i8(a, b, c); +} + +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vbslq_s8( + uint8x16_t a, int8x16_t b, int8x16_t c) { + return __builtin_mpl_vector_bslq_v16i8(a, b, c); +} + +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vbsl_s16( + uint16x4_t a, int16x4_t b, int16x4_t c) { + return (int8x8_t)__builtin_mpl_vector_bsl_v8i8((int8x8_t)a, (int8x8_t)b, (int8x8_t)c); +} + +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vbslq_s16( + uint16x8_t a, int16x8_t b, int16x8_t c) { + return (int8x16_t)__builtin_mpl_vector_bslq_v16i8((int8x16_t)a, (int8x16_t)b, (int8x16_t)c); +} + +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vbsl_s32( + uint32x2_t a, int32x2_t b, int32x2_t c) { + return (int8x8_t)__builtin_mpl_vector_bsl_v8i8((int8x8_t)a, (int8x8_t)b, (int8x8_t)c); +} + +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vbslq_s32( + uint32x4_t a, int32x4_t b, int32x4_t c) { + return (int8x16_t)__builtin_mpl_vector_bslq_v16i8((int8x16_t)a, (int8x16_t)b, (int8x16_t)c); +} + +extern inline int64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vbsl_s64( + uint64x1_t a, int64x1_t b, int64x1_t c) { + return (int8x8_t)__builtin_mpl_vector_bsl_v8i8((int8x8_t)a, (int8x8_t)b, (int8x8_t)c); +} + +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vbslq_s64( + uint64x2_t a, int64x2_t b, int64x2_t c) { + return (int8x16_t)__builtin_mpl_vector_bslq_v16i8((int8x16_t)a, (int8x16_t)b, (int8x16_t)c); +} + +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vbsl_u8( + uint8x8_t a, uint8x8_t b, uint8x8_t c) { + return __builtin_mpl_vector_bsl_v8u8(a, b, c); +} + +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vbslq_u8( + uint8x16_t a, uint8x16_t b, uint8x16_t c) { + return __builtin_mpl_vector_bslq_v16u8(a, b, c); +} + +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vbsl_u16( + uint16x4_t a, uint16x4_t b, uint16x4_t c) { + return (uint8x8_t)__builtin_mpl_vector_bsl_v8u8((uint8x8_t)a, (uint8x8_t)b, (uint8x8_t)c); +} + +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vbslq_u16( + uint16x8_t a, uint16x8_t b, uint16x8_t c) { + return (uint8x16_t)__builtin_mpl_vector_bslq_v16u8((uint8x16_t)a, (uint8x16_t)b, (uint8x16_t)c); +} + +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vbsl_u32( + uint32x2_t a, uint32x2_t b, uint32x2_t c) { + return (uint8x8_t)__builtin_mpl_vector_bsl_v8u8((uint8x8_t)a, (uint8x8_t)b, (uint8x8_t)c); +} + +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vbslq_u32( + uint32x4_t a, uint32x4_t b, uint32x4_t c) { + return (uint8x16_t)__builtin_mpl_vector_bslq_v16u8((uint8x16_t)a, (uint8x16_t)b, (uint8x16_t)c); +} + +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vbsl_u64( + uint64x1_t a, uint64x1_t b, uint64x1_t c) { + return (uint8x8_t)__builtin_mpl_vector_bsl_v8u8((uint8x8_t)a, (uint8x8_t)b, (uint8x8_t)c); +} + +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vbslq_u64( + uint64x2_t a, uint64x2_t b, uint64x2_t c) { + return (uint8x16_t)__builtin_mpl_vector_bslq_v16u8((uint8x16_t)a, (uint8x16_t)b, (uint8x16_t)c); +} + +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcopy_lane_s8( + int8x8_t a, const int lane1, int8x8_t b, const int lane2) { + return __builtin_mpl_vector_copy_lane_v8i8(a, lane1, b, lane2); +} + +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcopyq_lane_s8( + int8x16_t a, const int lane1, int8x8_t b, const int lane2) { + return __builtin_mpl_vector_copyq_lane_v16i8(a, lane1, b, lane2); +} + +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcopy_lane_s16( + int16x4_t a, const int lane1, int16x4_t b, const int lane2) { + return __builtin_mpl_vector_copy_lane_v4i16(a, lane1, b, lane2); +} + +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcopyq_lane_s16( + int16x8_t a, const int lane1, int16x4_t b, const int lane2) { + return __builtin_mpl_vector_copyq_lane_v8i16(a, lane1, b, lane2); +} + +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcopy_lane_s32( + int32x2_t a, const int lane1, int32x2_t b, const int lane2) { + return __builtin_mpl_vector_copy_lane_v2i32(a, lane1, b, lane2); +} + +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcopyq_lane_s32( + int32x4_t a, const int lane1, int32x2_t b, const int lane2) { + return __builtin_mpl_vector_copyq_lane_v4i32(a, lane1, b, lane2); +} + +extern inline int64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcopy_lane_s64( + int64x1_t a, const int lane1, int64x1_t b, const int lane2) { + return __builtin_mpl_vector_copy_lane_v1i64(a, lane1, b, lane2); +} + +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcopyq_lane_s64( + int64x2_t a, const int lane1, int64x1_t b, const int lane2) { + return __builtin_mpl_vector_copyq_lane_v2i64(a, lane1, b, lane2); +} + +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcopy_lane_u8( + uint8x8_t a, const int lane1, uint8x8_t b, const int lane2) { + return __builtin_mpl_vector_copy_lane_v8u8(a, lane1, b, lane2); +} + +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcopyq_lane_u8( + uint8x16_t a, const int lane1, uint8x8_t b, const int lane2) { + return __builtin_mpl_vector_copyq_lane_v16u8(a, lane1, b, lane2); +} + +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcopy_lane_u16( + uint16x4_t a, const int lane1, uint16x4_t b, const int lane2) { + return __builtin_mpl_vector_copy_lane_v4u16(a, lane1, b, lane2); +} + +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcopyq_lane_u16( + uint16x8_t a, const int lane1, uint16x4_t b, const int lane2) { + return __builtin_mpl_vector_copyq_lane_v8u16(a, lane1, b, lane2); +} + +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcopy_lane_u32( + uint32x2_t a, const int lane1, uint32x2_t b, const int lane2) { + return __builtin_mpl_vector_copy_lane_v2u32(a, lane1, b, lane2); +} + +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcopyq_lane_u32( + uint32x4_t a, const int lane1, uint32x2_t b, const int lane2) { + return __builtin_mpl_vector_copyq_lane_v4u32(a, lane1, b, lane2); +} + +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcopy_lane_u64( + uint64x1_t a, const int lane1, uint64x1_t b, const int lane2) { + return __builtin_mpl_vector_copy_lane_v1u64(a, lane1, b, lane2); +} + +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcopyq_lane_u64( + uint64x2_t a, const int lane1, uint64x1_t b, const int lane2) { + return __builtin_mpl_vector_copyq_lane_v2u64(a, lane1, b, lane2); +} + +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcopy_laneq_s8( + int8x8_t a, const int lane1, int8x16_t b, const int lane2) { + return __builtin_mpl_vector_copy_laneq_v8i8(a, lane1, b, lane2); +} + +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcopyq_laneq_s8( + int8x16_t a, const int lane1, int8x16_t b, const int lane2) { + return __builtin_mpl_vector_copyq_laneq_v16i8(a, lane1, b, lane2); +} + +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcopy_laneq_s16( + int16x4_t a, const int lane1, int16x8_t b, const int lane2) { + return __builtin_mpl_vector_copy_laneq_v4i16(a, lane1, b, lane2); +} + +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcopyq_laneq_s16( + int16x8_t a, const int lane1, int16x8_t b, const int lane2) { + return __builtin_mpl_vector_copyq_laneq_v8i16(a, lane1, b, lane2); +} + +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcopy_laneq_s32( + int32x2_t a, const int lane1, int32x4_t b, const int lane2) { + return __builtin_mpl_vector_copy_laneq_v2i32(a, lane1, b, lane2); +} + +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcopyq_laneq_s32( + int32x4_t a, const int lane1, int32x4_t b, const int lane2) { + return __builtin_mpl_vector_copyq_laneq_v4i32(a, lane1, b, lane2); +} + +extern inline int64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcopy_laneq_s64( + int64x1_t a, const int lane1, int64x2_t b, const int lane2) { + return __builtin_mpl_vector_copy_laneq_v1i64(a, lane1, b, lane2); +} + +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcopyq_laneq_s64( + int64x2_t a, const int lane1, int64x2_t b, const int lane2) { + return __builtin_mpl_vector_copyq_laneq_v2i64(a, lane1, b, lane2); +} + +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcopy_laneq_u8( + uint8x8_t a, const int lane1, uint8x16_t b, const int lane2) { + return __builtin_mpl_vector_copy_laneq_v8u8(a, lane1, b, lane2); +} + +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcopyq_laneq_u8( + uint8x16_t a, const int lane1, uint8x16_t b, const int lane2) { + return __builtin_mpl_vector_copyq_laneq_v16u8(a, lane1, b, lane2); +} + +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcopy_laneq_u16( + uint16x4_t a, const int lane1, uint16x8_t b, const int lane2) { + return __builtin_mpl_vector_copy_laneq_v4u16(a, lane1, b, lane2); +} + +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcopyq_laneq_u16( + uint16x8_t a, const int lane1, uint16x8_t b, const int lane2) { + return __builtin_mpl_vector_copyq_laneq_v8u16(a, lane1, b, lane2); +} + +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcopy_laneq_u32( + uint32x2_t a, const int lane1, uint32x4_t b, const int lane2) { + return __builtin_mpl_vector_copy_laneq_v2u32(a, lane1, b, lane2); +} + +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcopyq_laneq_u32( + uint32x4_t a, const int lane1, uint32x4_t b, const int lane2) { + return __builtin_mpl_vector_copyq_laneq_v4u32(a, lane1, b, lane2); +} + +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcopy_laneq_u64( + uint64x1_t a, const int lane1, uint64x2_t b, const int lane2) { + return __builtin_mpl_vector_copy_laneq_v1u64(a, lane1, b, lane2); +} + +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcopyq_laneq_u64( + uint64x2_t a, const int lane1, uint64x2_t b, const int lane2) { + return __builtin_mpl_vector_copyq_laneq_v2u64(a, lane1, b, lane2); +} + +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrbit_s8(int8x8_t a) { + return __builtin_mpl_vector_rbit_v8i8(a); +} + +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrbitq_s8( + int8x16_t a) { + return __builtin_mpl_vector_rbitq_v16i8(a); +} + +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrbit_u8(uint8x8_t a) { + return __builtin_mpl_vector_rbit_v8u8(a); +} + +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrbitq_u8( + uint8x16_t a) { + return __builtin_mpl_vector_rbitq_v16u8(a); +} + +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcreate_s8(uint64_t a) { + return __builtin_mpl_vector_create_v8i8(a); +} + +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcreate_s16( + uint64_t a) { + return __builtin_mpl_vector_create_v4i16(a); +} + +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcreate_s32( + uint64_t a) { + return __builtin_mpl_vector_create_v2i32(a); +} + +extern inline int64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcreate_s64( + uint64_t a) { + return __builtin_mpl_vector_create_v1i64(a); +} + +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcreate_u8( + uint64_t a) { + return __builtin_mpl_vector_create_v8u8(a); +} + +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcreate_u16( + uint64_t a) { + return __builtin_mpl_vector_create_v4u16(a); +} + +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcreate_u32( + uint64_t a) { + return __builtin_mpl_vector_create_v2u32(a); +} + +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcreate_u64( + uint64_t a) { + return __builtin_mpl_vector_create_v1u64(a); +} + +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmov_n_s8( + int8_t value) { + return __builtin_mpl_vector_mov_n_v8i8(value); +} + +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmovq_n_s8( + int8_t value) { + return __builtin_mpl_vector_movq_n_v16i8(value); +} + +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmov_n_s16( + int16_t value) { + return __builtin_mpl_vector_mov_n_v4i16(value); +} + +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmovq_n_s16( + int16_t value) { + return __builtin_mpl_vector_movq_n_v8i16(value); +} + +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmov_n_s32( + int32_t value) { + return __builtin_mpl_vector_mov_n_v2i32(value); +} + +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmovq_n_s32( + int32_t value) { + return __builtin_mpl_vector_movq_n_v4i32(value); +} + +extern inline int64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmov_n_s64( + int64_t value) { + return __builtin_mpl_vector_mov_n_v1i64(value); +} + +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmovq_n_s64( + int64_t value) { + return __builtin_mpl_vector_movq_n_v2i64(value); +} + +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmov_n_u8( + uint8_t value) { + return __builtin_mpl_vector_mov_n_v8u8(value); +} + +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmovq_n_u8( + uint8_t value) { + return __builtin_mpl_vector_movq_n_v16u8(value); +} + +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmov_n_u16( + uint16_t value) { + return __builtin_mpl_vector_mov_n_v4u16(value); +} + +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmovq_n_u16( + uint16_t value) { + return __builtin_mpl_vector_movq_n_v8u16(value); +} + +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmov_n_u32( + uint32_t value) { + return __builtin_mpl_vector_mov_n_v2u32(value); +} + +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmovq_n_u32( + uint32_t value) { + return __builtin_mpl_vector_movq_n_v4u32(value); +} + +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmov_n_u64( + uint64_t value) { + return __builtin_mpl_vector_mov_n_v1u64(value); +} + +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmovq_n_u64( + uint64_t value) { + return __builtin_mpl_vector_movq_n_v2u64(value); +} + +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdup_lane_s8( + int8x8_t vec, const int lane) { + return __builtin_mpl_vector_dup_lane_v8i8(vec, lane); +} + +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdupq_lane_s8( + int8x8_t vec, const int lane) { + return __builtin_mpl_vector_dupq_lane_v16i8(vec, lane); +} + +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdup_lane_s16( + int16x4_t vec, const int lane) { + return __builtin_mpl_vector_dup_lane_v4i16(vec, lane); +} + +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdupq_lane_s16( + int16x4_t vec, const int lane) { + return __builtin_mpl_vector_dupq_lane_v8i16(vec, lane); +} + +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdup_lane_s32( + int32x2_t vec, const int lane) { + return __builtin_mpl_vector_dup_lane_v2i32(vec, lane); +} + +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdupq_lane_s32( + int32x2_t vec, const int lane) { + return __builtin_mpl_vector_dupq_lane_v4i32(vec, lane); +} + +extern inline int64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdup_lane_s64( + int64x1_t vec, const int lane) { + return __builtin_mpl_vector_dup_lane_v1i64(vec, lane); +} + +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdupq_lane_s64( + int64x1_t vec, const int lane) { + return __builtin_mpl_vector_dupq_lane_v2i64(vec, lane); +} + +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdup_lane_u8( + uint8x8_t vec, const int lane) { + return __builtin_mpl_vector_dup_lane_v8u8(vec, lane); +} + +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdupq_lane_u8( + uint8x8_t vec, const int lane) { + return __builtin_mpl_vector_dupq_lane_v16u8(vec, lane); +} + +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdup_lane_u16( + uint16x4_t vec, const int lane) { + return __builtin_mpl_vector_dup_lane_v4u16(vec, lane); +} + +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdupq_lane_u16( + uint16x4_t vec, const int lane) { + return __builtin_mpl_vector_dupq_lane_v8u16(vec, lane); +} + +uint32x2_t __builtin_mpl_vector_dup_lane_v2u32(uint32x2_t vec, const int lane); +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdup_lane_u32( + uint32x2_t vec, const int lane) { + return __builtin_mpl_vector_dup_lane_v2u32(vec, lane); +} + +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdupq_lane_u32( + uint32x2_t vec, const int lane) { + return __builtin_mpl_vector_dupq_lane_v4u32(vec, lane); +} + +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdup_lane_u64( + uint64x1_t vec, const int lane) { + return __builtin_mpl_vector_dup_lane_v1u64(vec, lane); +} + +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdupq_lane_u64( + uint64x1_t vec, const int lane) { + return __builtin_mpl_vector_dupq_lane_v2u64(vec, lane); +} + +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdup_laneq_s8( + int8x16_t vec, const int lane) { + return __builtin_mpl_vector_dup_laneq_v8i8(vec, lane); +} + +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdupq_laneq_s8( + int8x16_t vec, const int lane) { + return __builtin_mpl_vector_dupq_laneq_v16i8(vec, lane); +} + +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdup_laneq_s16( + int16x8_t vec, const int lane) { + return __builtin_mpl_vector_dup_laneq_v4i16(vec, lane); +} + +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdupq_laneq_s16( + int16x8_t vec, const int lane) { + return __builtin_mpl_vector_dupq_laneq_v8i16(vec, lane); +} + +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdup_laneq_s32( + int32x4_t vec, const int lane) { + return __builtin_mpl_vector_dup_laneq_v2i32(vec, lane); +} + +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdupq_laneq_s32( + int32x4_t vec, const int lane) { + return __builtin_mpl_vector_dupq_laneq_v4i32(vec, lane); +} + +extern inline int64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdup_laneq_s64( + int64x2_t vec, const int lane) { + return __builtin_mpl_vector_dup_laneq_v1i64(vec, lane); +} + +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdupq_laneq_s64( + int64x2_t vec, const int lane) { + return __builtin_mpl_vector_dupq_laneq_v2i64(vec, lane); +} + +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdup_laneq_u8( + uint8x16_t vec, const int lane) { + return __builtin_mpl_vector_dup_laneq_v8u8(vec, lane); +} + +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdupq_laneq_u8( + uint8x16_t vec, const int lane) { + return __builtin_mpl_vector_dupq_laneq_v16u8(vec, lane); +} + +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdup_laneq_u16( + uint16x8_t vec, const int lane) { + return __builtin_mpl_vector_dup_laneq_v4u16(vec, lane); +} + +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdupq_laneq_u16( + uint16x8_t vec, const int lane) { + return __builtin_mpl_vector_dupq_laneq_v8u16(vec, lane); +} + +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdup_laneq_u32( + uint32x4_t vec, const int lane) { + return __builtin_mpl_vector_dup_laneq_v2u32(vec, lane); +} + +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdupq_laneq_u32( + uint32x4_t vec, const int lane) { + return __builtin_mpl_vector_dupq_laneq_v4u32(vec, lane); +} + +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdup_laneq_u64( + uint64x2_t vec, const int lane) { + return __builtin_mpl_vector_dup_laneq_v1u64(vec, lane); +} + +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdupq_laneq_u64( + uint64x2_t vec, const int lane) { + return __builtin_mpl_vector_dupq_laneq_v2u64(vec, lane); +} + +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcombine_s8( + int8x8_t low, int8x8_t high) { + return (int8x16_t)__builtin_mpl_vector_combine_v2i64((int64x1_t)low, high); +} + +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcombine_s16( + int16x4_t low, int16x4_t high) { + return (int16x8_t)__builtin_mpl_vector_combine_v2i64((int64x1_t)low, high); +} + +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcombine_s32( + int32x2_t low, int32x2_t high) { + return (int32x4_t)__builtin_mpl_vector_combine_v2i64((int64x1_t)low, high); +} + +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcombine_s64( + int64x1_t low, int64x1_t high) { + return __builtin_mpl_vector_combine_v2i64(low, high); +} + +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcombine_u8( + uint8x8_t low, uint8x8_t high) { + return (uint8x16_t)__builtin_mpl_vector_combine_v2u64((uint64x1_t)low, high); +} + +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcombine_u16( + uint16x4_t low, uint16x4_t high) { + return (uint16x8_t)__builtin_mpl_vector_combine_v2u64((uint64x1_t)low, high); +} + +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcombine_u32( + uint32x2_t low, uint32x2_t high) { + return (uint32x4_t)__builtin_mpl_vector_combine_v2u64((uint64x1_t)low, high); +} + +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vcombine_u64( + uint64x1_t low, uint64x1_t high) { + return __builtin_mpl_vector_combine_v2u64(low, high); +} + +extern inline int8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdupb_lane_s8( + int8x8_t vec, const int lane) { + return __builtin_mpl_vector_dupb_lane_v8i8(vec, lane); +} + +extern inline int16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vduph_lane_s16( + int16x4_t vec, const int lane) { + return __builtin_mpl_vector_duph_lane_v4i16(vec, lane); +} + +extern inline int32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdups_lane_s32( + int32x2_t vec, const int lane) { + return __builtin_mpl_vector_dups_lane_v2i32(vec, lane); +} + +extern inline int64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdupd_lane_s64( + int64x1_t vec, const int lane) { + return __builtin_mpl_vector_dupd_lane_v1i64(vec, lane); +} + +extern inline uint8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdupb_lane_u8( + uint8x8_t vec, const int lane) { + return __builtin_mpl_vector_dupb_lane_v8u8(vec, lane); +} + +extern inline uint16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vduph_lane_u16( + uint16x4_t vec, const int lane) { + return __builtin_mpl_vector_duph_lane_v4u16(vec, lane); +} + +extern inline uint32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdups_lane_u32( + uint32x2_t vec, const int lane) { + return __builtin_mpl_vector_dups_lane_v2u32(vec, lane); +} + +extern inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdupd_lane_u64( + uint64x1_t vec, const int lane) { + return __builtin_mpl_vector_dupd_lane_v1u64(vec, lane); +} + +extern inline int8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdupb_laneq_s8( + int8x16_t vec, const int lane) { + return __builtin_mpl_vector_dupb_laneq_v16i8(vec, lane); +} + +extern inline int16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vduph_laneq_s16( + int16x8_t vec, const int lane) { + return __builtin_mpl_vector_duph_laneq_v8i16(vec, lane); +} + +extern inline int32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdups_laneq_s32( + int32x4_t vec, const int lane) { + return __builtin_mpl_vector_dups_laneq_v4i32(vec, lane); +} + +extern inline int64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdupd_laneq_s64( + int64x2_t vec, const int lane) { + return __builtin_mpl_vector_dupd_laneq_v2i64(vec, lane); +} + +extern inline uint8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdupb_laneq_u8( + uint8x16_t vec, const int lane) { + return __builtin_mpl_vector_dupb_laneq_v16u8(vec, lane); +} + +extern inline uint16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vduph_laneq_u16( + uint16x8_t vec, const int lane) { + return __builtin_mpl_vector_duph_laneq_v8u16(vec, lane); +} + +extern inline uint32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdups_laneq_u32( + uint32x4_t vec, const int lane) { + return __builtin_mpl_vector_dups_laneq_v4u32(vec, lane); +} + +extern inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vdupd_laneq_u64( + uint64x2_t vec, const int lane) { + return __builtin_mpl_vector_dupd_laneq_v2u64(vec, lane); +} + +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrev64_s8( + int8x8_t vec) { + return __builtin_mpl_vector_rev64_v8i8(vec); +} + +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrev64q_s8( + int8x16_t vec) { + return __builtin_mpl_vector_rev64q_v16i8(vec); +} + +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrev64_s16( + int16x4_t vec) { + return __builtin_mpl_vector_rev64_v4i16(vec); +} + +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrev64q_s16( + int16x8_t vec) { + return __builtin_mpl_vector_rev64q_v8i16(vec); +} + +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrev64_s32( + int32x2_t vec) { + return __builtin_mpl_vector_rev64_v2i32(vec); +} + +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrev64q_s32( + int32x4_t vec) { + return __builtin_mpl_vector_rev64q_v4i32(vec); +} + +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrev64_u8( + uint8x8_t vec) { + return __builtin_mpl_vector_rev64_v8u8(vec); +} + +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrev64q_u8( + uint8x16_t vec) { + return __builtin_mpl_vector_rev64q_v16u8(vec); +} + +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrev64_u16( + uint16x4_t vec) { + return __builtin_mpl_vector_rev64_v4u16(vec); +} + +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrev64q_u16( + uint16x8_t vec) { + return __builtin_mpl_vector_rev64q_v8u16(vec); +} + +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrev64_u32( + uint32x2_t vec) { + return __builtin_mpl_vector_rev64_v2u32(vec); +} + +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrev64q_u32( + uint32x4_t vec) { + return __builtin_mpl_vector_rev64q_v4u32(vec); +} + +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrev16_s8( + int8x8_t vec) { + return __builtin_mpl_vector_rev16_v8i8(vec); +} + +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrev16q_s8( + int8x16_t vec) { + return __builtin_mpl_vector_rev16q_v16i8(vec); +} + +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrev16_u8( + uint8x8_t vec) { + return __builtin_mpl_vector_rev16_v8u8(vec); +} + +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrev16q_u8( + uint8x16_t vec) { + return __builtin_mpl_vector_rev16q_v16u8(vec); +} + +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vzip1_s8( + int8x8_t a, int8x8_t b) { + return __builtin_mpl_vector_zip1_v8i8(a, b); +} + +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vzip1q_s8( + int8x16_t a, int8x16_t b) { + return __builtin_mpl_vector_zip1q_v16i8(a, b); +} + +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vzip1_s16( + int16x4_t a, int16x4_t b) { + return __builtin_mpl_vector_zip1_v4i16(a, b); +} + +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vzip1q_s16( + int16x8_t a, int16x8_t b) { + return __builtin_mpl_vector_zip1q_v8i16(a, b); +} + +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vzip1_s32( + int32x2_t a, int32x2_t b) { + return __builtin_mpl_vector_zip1_v2i32(a, b); +} + +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vzip1q_s32( + int32x4_t a, int32x4_t b) { + return __builtin_mpl_vector_zip1q_v4i32(a, b); +} + +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vzip1q_s64( + int64x2_t a, int64x2_t b) { + return __builtin_mpl_vector_zip1q_v2i64(a, b); +} + +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vzip1_u8( + uint8x8_t a, uint8x8_t b) { + return __builtin_mpl_vector_zip1_v8u8(a, b); +} + +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vzip1q_u8( + uint8x16_t a, uint8x16_t b) { + return __builtin_mpl_vector_zip1q_v16u8(a, b); +} + +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vzip1_u16( + uint16x4_t a, uint16x4_t b) { + return __builtin_mpl_vector_zip1_v4u16(a, b); +} + +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vzip1q_u16( + uint16x8_t a, uint16x8_t b) { + return __builtin_mpl_vector_zip1q_v8u16(a, b); +} + +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vzip1_u32( + uint32x2_t a, uint32x2_t b) { + return __builtin_mpl_vector_zip1_v2u32(a, b); +} + +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vzip1q_u32( + uint32x4_t a, uint32x4_t b) { + return __builtin_mpl_vector_zip1q_v4u32(a, b); +} + +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vzip1q_u64( + uint64x2_t a, uint64x2_t b) { + return __builtin_mpl_vector_zip1q_v2u64(a, b); +} + +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vzip2_s8( + int8x8_t a, int8x8_t b) { + return __builtin_mpl_vector_zip2_v8i8(a, b); +} + +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vzip2q_s8( + int8x16_t a, int8x16_t b) { + return __builtin_mpl_vector_zip2q_v16i8(a, b); +} + +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vzip2_s16( + int16x4_t a, int16x4_t b) { + return __builtin_mpl_vector_zip2_v4i16(a, b); +} + +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vzip2q_s16( + int16x8_t a, int16x8_t b) { + return __builtin_mpl_vector_zip2q_v8i16(a, b); +} + +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vzip2_s32( + int32x2_t a, int32x2_t b) { + return __builtin_mpl_vector_zip2_v2i32(a, b); +} + +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vzip2q_s32( + int32x4_t a, int32x4_t b) { + return __builtin_mpl_vector_zip2q_v4i32(a, b); +} + +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vzip2q_s64( + int64x2_t a, int64x2_t b) { + return __builtin_mpl_vector_zip2q_v2i64(a, b); +} + +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vzip2_u8( + uint8x8_t a, uint8x8_t b) { + return __builtin_mpl_vector_zip2_v8u8(a, b); +} + +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vzip2q_u8( + uint8x16_t a, uint8x16_t b) { + return __builtin_mpl_vector_zip2q_v16u8(a, b); +} + +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vzip2_u16( + uint16x4_t a, uint16x4_t b) { + return __builtin_mpl_vector_zip2_v4u16(a, b); +} + +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vzip2q_u16( + uint16x8_t a, uint16x8_t b) { + return __builtin_mpl_vector_zip2q_v8u16(a, b); +} + +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vzip2_u32( + uint32x2_t a, uint32x2_t b) { + return __builtin_mpl_vector_zip2_v2u32(a, b); +} + +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vzip2q_u32( + uint32x4_t a, uint32x4_t b) { + return __builtin_mpl_vector_zip2q_v4u32(a, b); +} + +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vzip2q_u64( + uint64x2_t a, uint64x2_t b) { + return __builtin_mpl_vector_zip2q_v2u64(a, b); +} + +extern inline int8x8x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vzip_s8( + int8x8_t a, int8x8_t b) { + return (int8x8x2_t){vzip1_s8((a), (b)), vzip2_s8((a), (b))}; +} + +extern inline int16x4x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vzip_s16( + int16x4_t a, int16x4_t b) { + return (int16x4x2_t){vzip1_s16((a), (b)), vzip2_s16((a), (b))}; +} + +extern inline uint8x8x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vzip_u8( + uint8x8_t a, uint8x8_t b) { + return (uint8x8x2_t){vzip1_u8((a), (b)), vzip2_u8((a), (b))}; +} + +extern inline uint16x4x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vzip_u16( + uint16x4_t a, uint16x4_t b) { + return (uint16x4x2_t){vzip1_u16((a), (b)), vzip2_u16((a), (b))}; +} + +extern inline int32x2x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vzip_s32( + int32x2_t a, int32x2_t b) { + return (int32x2x2_t){vzip1_s32((a), (b)), vzip2_s32((a), (b))}; +} + +extern inline uint32x2x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vzip_u32( + uint32x2_t a, uint32x2_t b) { + return (uint32x2x2_t){vzip1_u32((a), (b)), vzip2_u32((a), (b))}; +} + +extern inline int8x16x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vzipq_s8( + int8x16_t a, int8x16_t b) { + return (int8x16x2_t){vzip1q_s8((a), (b)), vzip2q_s8((a), (b))}; +} + +extern inline int16x8x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vzipq_s16( + int16x8_t a, int16x8_t b) { + return (int16x8x2_t){vzip1q_s16((a), (b)), vzip2q_s16((a), (b))}; +} + +extern inline int32x4x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vzipq_s32( + int32x4_t a, int32x4_t b) { + return (int32x4x2_t){vzip1q_s32((a), (b)), vzip2q_s32((a), (b))}; +} + +extern inline uint8x16x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vzipq_u8( + uint8x16_t a, uint8x16_t b) { + return (uint8x16x2_t){vzip1q_u8((a), (b)), vzip2q_u8((a), (b))}; +} + +extern inline uint16x8x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vzipq_u16( + uint16x8_t a, uint16x8_t b) { + return (uint16x8x2_t){vzip1q_u16((a), (b)), vzip2q_u16((a), (b))}; +} + +extern inline uint32x4x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vzipq_u32( + uint32x4_t a, uint32x4_t b) { + return (uint32x4x2_t){vzip1q_u32((a), (b)), vzip2q_u32((a), (b))}; +} + +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vuzp1_s8( + int8x8_t a, int8x8_t b) { + return __builtin_mpl_vector_uzp1_v8i8(a, b); +} + +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vuzp1q_s8( + int8x16_t a, int8x16_t b) { + return __builtin_mpl_vector_uzp1q_v16i8(a, b); +} + +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vuzp1_s16( + int16x4_t a, int16x4_t b) { + return __builtin_mpl_vector_uzp1_v4i16(a, b); +} + +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vuzp1q_s16( + int16x8_t a, int16x8_t b) { + return __builtin_mpl_vector_uzp1q_v8i16(a, b); +} + +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vuzp1_s32( + int32x2_t a, int32x2_t b) { + return __builtin_mpl_vector_uzp1_v2i32(a, b); +} + +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vuzp1q_s32( + int32x4_t a, int32x4_t b) { + return __builtin_mpl_vector_uzp1q_v4i32(a, b); +} + +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vuzp1q_s64( + int64x2_t a, int64x2_t b) { + return __builtin_mpl_vector_uzp1q_v2i64(a, b); +} + +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vuzp1_u8( + uint8x8_t a, uint8x8_t b) { + return __builtin_mpl_vector_uzp1_v8u8(a, b); +} + +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vuzp1q_u8( + uint8x16_t a, uint8x16_t b) { + return __builtin_mpl_vector_uzp1q_v16u8(a, b); +} + +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vuzp1_u16( + uint16x4_t a, uint16x4_t b) { + return __builtin_mpl_vector_uzp1_v4u16(a, b); +} + +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vuzp1q_u16( + uint16x8_t a, uint16x8_t b) { + return __builtin_mpl_vector_uzp1q_v8u16(a, b); +} + +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vuzp1_u32( + uint32x2_t a, uint32x2_t b) { + return __builtin_mpl_vector_uzp1_v2u32(a, b); +} + +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vuzp1q_u32( + uint32x4_t a, uint32x4_t b) { + return __builtin_mpl_vector_uzp1q_v4u32(a, b); +} + +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vuzp1q_u64( + uint64x2_t a, uint64x2_t b) { + return __builtin_mpl_vector_uzp1q_v2u64(a, b); +} + +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vuzp2_s8( + int8x8_t a, int8x8_t b) { + return __builtin_mpl_vector_uzp2_v8i8(a, b); +} + +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vuzp2q_s8( + int8x16_t a, int8x16_t b) { + return __builtin_mpl_vector_uzp2q_v16i8(a, b); +} + +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vuzp2_s16( + int16x4_t a, int16x4_t b) { + return __builtin_mpl_vector_uzp2_v4i16(a, b); +} + +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vuzp2q_s16( + int16x8_t a, int16x8_t b) { + return __builtin_mpl_vector_uzp2q_v8i16(a, b); +} + +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vuzp2_s32( + int32x2_t a, int32x2_t b) { + return __builtin_mpl_vector_uzp2_v2i32(a, b); +} + +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vuzp2q_s32( + int32x4_t a, int32x4_t b) { + return __builtin_mpl_vector_uzp2q_v4i32(a, b); +} + +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vuzp2q_s64( + int64x2_t a, int64x2_t b) { + return __builtin_mpl_vector_uzp2q_v2i64(a, b); +} + +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vuzp2_u8( + uint8x8_t a, uint8x8_t b) { + return __builtin_mpl_vector_uzp2_v8u8(a, b); +} + +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vuzp2q_u8( + uint8x16_t a, uint8x16_t b) { + return __builtin_mpl_vector_uzp2q_v16u8(a, b); +} + +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vuzp2_u16( + uint16x4_t a, uint16x4_t b) { + return __builtin_mpl_vector_uzp2_v4u16(a, b); +} + +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vuzp2q_u16( + uint16x8_t a, uint16x8_t b) { + return __builtin_mpl_vector_uzp2q_v8u16(a, b); +} + +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vuzp2_u32( + uint32x2_t a, uint32x2_t b) { + return __builtin_mpl_vector_uzp2_v2u32(a, b); +} + +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vuzp2q_u32( + uint32x4_t a, uint32x4_t b) { + return __builtin_mpl_vector_uzp2q_v4u32(a, b); +} + +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vuzp2q_u64( + uint64x2_t a, uint64x2_t b) { + return __builtin_mpl_vector_uzp2q_v2u64(a, b); +} + +extern inline int8x8x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vuzp_s8( + int8x8_t a, int8x8_t b) { + return (int8x8x2_t){vuzp1_s8((a), (b)), vuzp2_s8((a), (b))}; +} + +extern inline int16x4x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vuzp_s16( + int16x4_t a, int16x4_t b) { + return (int16x4x2_t){vuzp1_s16((a), (b)), vuzp2_s16((a), (b))}; +} + +extern inline int32x2x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vuzp_s32( + int32x2_t a, int32x2_t b) { + return (int32x2x2_t){vuzp1_s32((a), (b)), vuzp2_s32((a), (b))}; +} + +extern inline uint8x8x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vuzp_u8( + uint8x8_t a, uint8x8_t b) { + return (uint8x8x2_t){vuzp1_u8((a), (b)), vuzp2_u8((a), (b))}; +} + +extern inline uint16x4x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vuzp_u16( + uint16x4_t a, uint16x4_t b) { + return (uint16x4x2_t){vuzp1_u16((a), (b)), vuzp2_u16((a), (b))}; +} + +extern inline uint32x2x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vuzp_u32( + uint32x2_t a, uint32x2_t b) { + return (uint32x2x2_t){vuzp1_u32((a), (b)), vuzp2_u32((a), (b))}; +} + +extern inline int8x16x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vuzpq_s8( + int8x16_t a, int8x16_t b) { + return (int8x16x2_t){vuzp1q_s8((a), (b)), vuzp2q_s8((a), (b))}; +} + +extern inline int16x8x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vuzpq_s16( + int16x8_t a, int16x8_t b) { + return (int16x8x2_t){vuzp1q_s16((a), (b)), vuzp2q_s16((a), (b))}; +} + +extern inline int32x4x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vuzpq_s32( + int32x4_t a, int32x4_t b) { + return (int32x4x2_t){vuzp1q_s32((a), (b)), vuzp2q_s32((a), (b))}; +} + +extern inline uint8x16x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vuzpq_u8( + uint8x16_t a, uint8x16_t b) { + return (uint8x16x2_t){vuzp1q_u8((a), (b)), vuzp2q_u8((a), (b))}; +} + +extern inline uint16x8x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vuzpq_u16( + uint16x8_t a, uint16x8_t b) { + return (uint16x8x2_t){vuzp1q_u16((a), (b)), vuzp2q_u16((a), (b))}; +} + +extern inline uint32x4x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vuzpq_u32( + uint32x4_t a, uint32x4_t b) { + return (uint32x4x2_t){vuzp1q_u32((a), (b)), vuzp2q_u32((a), (b))}; +} + +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtrn1_s8( + int8x8_t a, int8x8_t b) { + return __builtin_mpl_vector_trn1_v8i8(a, b); +} + +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtrn1q_s8( + int8x16_t a, int8x16_t b) { + return __builtin_mpl_vector_trn1q_v16i8(a, b); +} + +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtrn1_s16( + int16x4_t a, int16x4_t b) { + return __builtin_mpl_vector_trn1_v4i16(a, b); +} + +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtrn1q_s16( + int16x8_t a, int16x8_t b) { + return __builtin_mpl_vector_trn1q_v8i16(a, b); +} + +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtrn1_s32( + int32x2_t a, int32x2_t b) { + return __builtin_mpl_vector_trn1_v2i32(a, b); +} + +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtrn1q_s32( + int32x4_t a, int32x4_t b) { + return __builtin_mpl_vector_trn1q_v4i32(a, b); +} + +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtrn1q_s64( + int64x2_t a, int64x2_t b) { + return __builtin_mpl_vector_trn1q_v2i64(a, b); +} + +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtrn1_u8( + uint8x8_t a, uint8x8_t b) { + return __builtin_mpl_vector_trn1_v8u8(a, b); +} + +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtrn1q_u8( + uint8x16_t a, uint8x16_t b) { + return __builtin_mpl_vector_trn1q_v16u8(a, b); +} + +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtrn1_u16( + uint16x4_t a, uint16x4_t b) { + return __builtin_mpl_vector_trn1_v4u16(a, b); +} + +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtrn1q_u16( + uint16x8_t a, uint16x8_t b) { + return __builtin_mpl_vector_trn1q_v8u16(a, b); +} + +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtrn1_u32( + uint32x2_t a, uint32x2_t b) { + return __builtin_mpl_vector_trn1_v2u32(a, b); +} + +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtrn1q_u32( + uint32x4_t a, uint32x4_t b) { + return __builtin_mpl_vector_trn1q_v4u32(a, b); +} + +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtrn1q_u64( + uint64x2_t a, uint64x2_t b) { + return __builtin_mpl_vector_trn1q_v2u64(a, b); +} + +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtrn2_s8( + int8x8_t a, int8x8_t b) { + return __builtin_mpl_vector_trn2_v8i8(a, b); +} + +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtrn2q_s8( + int8x16_t a, int8x16_t b) { + return __builtin_mpl_vector_trn2q_v16i8(a, b); +} + +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtrn2_s16( + int16x4_t a, int16x4_t b) { + return __builtin_mpl_vector_trn2_v4i16(a, b); +} + +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtrn2q_s16( + int16x8_t a, int16x8_t b) { + return __builtin_mpl_vector_trn2q_v8i16(a, b); +} + +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtrn2_s32( + int32x2_t a, int32x2_t b) { + return __builtin_mpl_vector_trn2_v2i32(a, b); +} + +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtrn2q_s32( + int32x4_t a, int32x4_t b) { + return __builtin_mpl_vector_trn2q_v4i32(a, b); +} + +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtrn2q_s64( + int64x2_t a, int64x2_t b) { + return __builtin_mpl_vector_trn2q_v2i64(a, b); +} + +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtrn2_u8( + uint8x8_t a, uint8x8_t b) { + return __builtin_mpl_vector_trn2_v8u8(a, b); +} + +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtrn2q_u8( + uint8x16_t a, uint8x16_t b) { + return __builtin_mpl_vector_trn2q_v16u8(a, b); +} + +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtrn2_u16( + uint16x4_t a, uint16x4_t b) { + return __builtin_mpl_vector_trn2_v4u16(a, b); +} + +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtrn2q_u16( + uint16x8_t a, uint16x8_t b) { + return __builtin_mpl_vector_trn2q_v8u16(a, b); +} + +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtrn2_u32( + uint32x2_t a, uint32x2_t b) { + return __builtin_mpl_vector_trn2_v2u32(a, b); +} + +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtrn2q_u32( + uint32x4_t a, uint32x4_t b) { + return __builtin_mpl_vector_trn2q_v4u32(a, b); +} + +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtrn2q_u64( + uint64x2_t a, uint64x2_t b) { + return __builtin_mpl_vector_trn2q_v2u64(a, b); +} + +extern inline int8x8x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtrn_s8( + int8x8_t a, int8x8_t b) { + return (int8x8x2_t){vtrn1_s8((a), (b)), vtrn2_s8((a), (b))}; +} + +extern inline int16x4x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtrn_s16( + int16x4_t a, int16x4_t b) { + return (int16x4x2_t){vtrn1_s16((a), (b)), vtrn2_s16((a), (b))}; +} + +extern inline uint8x8x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtrn_u8( + uint8x8_t a, uint8x8_t b) { + return (uint8x8x2_t){vtrn1_u8((a), (b)), vtrn2_u8((a), (b))}; +} + +extern inline uint16x4x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtrn_u16( + uint16x4_t a, uint16x4_t b) { + return (uint16x4x2_t){vtrn1_u16((a), (b)), vtrn2_u16((a), (b))}; +} + +extern inline int32x2x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtrn_s32( + int32x2_t a, int32x2_t b) { + return (int32x2x2_t){vtrn1_s32((a), (b)), vtrn2_s32((a), (b))}; +} + +extern inline uint32x2x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtrn_u32( + uint32x2_t a, uint32x2_t b) { + return (uint32x2x2_t){vtrn1_u32((a), (b)), vtrn2_u32((a), (b))}; +} + +extern inline int8x16x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtrnq_s8( + int8x16_t a, int8x16_t b) { + return (int8x16x2_t){vtrn1q_s8((a), (b)), vtrn2q_s8((a), (b))}; +} + +extern inline int16x8x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtrnq_s16( + int16x8_t a, int16x8_t b) { + return (int16x8x2_t){vtrn1q_s16((a), (b)), vtrn2q_s16((a), (b))}; +} + +extern inline int32x4x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtrnq_s32( + int32x4_t a, int32x4_t b) { + return (int32x4x2_t){vtrn1q_s32((a), (b)), vtrn2q_s32((a), (b))}; +} + +extern inline uint8x16x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtrnq_u8( + uint8x16_t a, uint8x16_t b) { + return (uint8x16x2_t){vtrn1q_u8((a), (b)), vtrn2q_u8((a), (b))}; +} + +extern inline uint16x8x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtrnq_u16( + uint16x8_t a, uint16x8_t b) { + return (uint16x8x2_t){vtrn1q_u16((a), (b)), vtrn2q_u16((a), (b))}; +} + +extern inline uint32x4x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtrnq_u32( + uint32x4_t a, uint32x4_t b) { + return (uint32x4x2_t){vtrn1q_u32((a), (b)), vtrn2q_u32((a), (b))}; +} + +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld1_s8( + int8_t const *ptr) { + return __builtin_mpl_vector_ld1_v8i8(ptr); +} + +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld1q_s8( + int8_t const *ptr) { + return __builtin_mpl_vector_ld1q_v16i8(ptr); +} + +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld1_s16( + int16_t const *ptr) { + return __builtin_mpl_vector_ld1_v4i16(ptr); +} + +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld1q_s16( + int16_t const *ptr) { + return __builtin_mpl_vector_ld1q_v8i16(ptr); +} + +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld1_s32( + int32_t const *ptr) { + return __builtin_mpl_vector_ld1_v2i32(ptr); +} + +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld1q_s32( + int32_t const *ptr) { + return __builtin_mpl_vector_ld1q_v4i32(ptr); +} + +extern inline int64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld1_s64( + int64_t const *ptr) { + return __builtin_mpl_vector_ld1_v1i64(ptr); +} + +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld1q_s64( + int64_t const *ptr) { + return __builtin_mpl_vector_ld1q_v2i64(ptr); +} + +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld1_u8( + uint8_t const *ptr) { + return __builtin_mpl_vector_ld1_v8u8(ptr); +} + +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld1q_u8( + uint8_t const *ptr) { + return __builtin_mpl_vector_ld1q_v16u8(ptr); +} + +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld1_u16( + uint16_t const *ptr) { + return __builtin_mpl_vector_ld1_v4u16(ptr); +} + +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld1q_u16( + uint16_t const *ptr) { + return __builtin_mpl_vector_ld1q_v8u16(ptr); +} + +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld1_u32( + uint32_t const *ptr) { + return __builtin_mpl_vector_ld1_v2u32(ptr); +} + +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld1q_u32( + uint32_t const *ptr) { + return __builtin_mpl_vector_ld1q_v4u32(ptr); +} + +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld1_u64( + uint64_t const *ptr) { + return __builtin_mpl_vector_ld1_v1u64(ptr); +} + +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld1q_u64( + uint64_t const *ptr) { + return __builtin_mpl_vector_ld1q_v2u64(ptr); +} +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld1_lane_s8( + int8_t const *ptr, int8x8_t src, const int lane) { + return __builtin_mpl_vector_ld1_lane_v8i8(ptr, src, lane); +} + +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld1q_lane_s8( + int8_t const *ptr, int8x16_t src, const int lane) { + return __builtin_mpl_vector_ld1q_lane_v16i8(ptr, src, lane); +} + +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld1_lane_s16( + int16_t const *ptr, int16x4_t src, const int lane) { + return __builtin_mpl_vector_ld1_lane_v4i16(ptr, src, lane); +} + +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld1q_lane_s16( + int16_t const *ptr, int16x8_t src, const int lane) { + return __builtin_mpl_vector_ld1q_lane_v8i16(ptr, src, lane); +} + +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld1_lane_s32( + int32_t const *ptr, int32x2_t src, const int lane) { + return __builtin_mpl_vector_ld1_lane_v2i32(ptr, src, lane); +} + +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld1q_lane_s32( + int32_t const *ptr, int32x4_t src, const int lane) { + return __builtin_mpl_vector_ld1q_lane_v4i32(ptr, src, lane); +} + +extern inline int64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld1_lane_s64( + int64_t const *ptr, int64x1_t src, const int lane) { + return __builtin_mpl_vector_ld1_lane_v1i64(ptr, src, lane); +} + +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld1q_lane_s64( + int64_t const *ptr, int64x2_t src, const int lane) { + return __builtin_mpl_vector_ld1q_lane_v2i64(ptr, src, lane); +} + +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld1_lane_u8( + uint8_t const *ptr, uint8x8_t src, const int lane) { + return __builtin_mpl_vector_ld1_lane_v8u8(ptr, src, lane); +} + +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld1q_lane_u8( + uint8_t const *ptr, uint8x16_t src, const int lane) { + return __builtin_mpl_vector_ld1q_lane_v16u8(ptr, src, lane); +} + +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld1_lane_u16( + uint16_t const *ptr, uint16x4_t src, const int lane) { + return __builtin_mpl_vector_ld1_lane_v4u16(ptr, src, lane); +} + +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld1q_lane_u16( + uint16_t const *ptr, uint16x8_t src, const int lane) { + return __builtin_mpl_vector_ld1q_lane_v8u16(ptr, src, lane); +} + +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld1_lane_u32( + uint32_t const *ptr, uint32x2_t src, const int lane) { + return __builtin_mpl_vector_ld1_lane_v2u32(ptr, src, lane); +} + +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld1q_lane_u32( + uint32_t const *ptr, uint32x4_t src, const int lane) { + return __builtin_mpl_vector_ld1q_lane_v4u32(ptr, src, lane); +} + +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld1_lane_u64( + uint64_t const *ptr, uint64x1_t src, const int lane) { + return __builtin_mpl_vector_ld1_lane_v1u64(ptr, src, lane); +} + +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld1q_lane_u64( + uint64_t const *ptr, uint64x2_t src, const int lane) { + return __builtin_mpl_vector_ld1q_lane_v2u64(ptr, src, lane); +} + +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld1_dup_s8( + int8_t const *ptr) { + return __builtin_mpl_vector_ld1_dup_v8i8(ptr); +} + +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld1q_dup_s8( + int8_t const *ptr) { + return __builtin_mpl_vector_ld1q_dup_v16i8(ptr); +} + +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld1_dup_s16( + int16_t const *ptr) { + return __builtin_mpl_vector_ld1_dup_v4i16(ptr); +} + +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld1q_dup_s16( + int16_t const *ptr) { + return __builtin_mpl_vector_ld1q_dup_v8i16(ptr); +} + +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld1_dup_s32( + int32_t const *ptr) { + return __builtin_mpl_vector_ld1_dup_v2i32(ptr); +} + +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld1q_dup_s32( + int32_t const *ptr) { + return __builtin_mpl_vector_ld1q_dup_v4i32(ptr); +} + +extern inline int64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld1_dup_s64( + int64_t const *ptr) { + return __builtin_mpl_vector_ld1_dup_v1i64(ptr); +} + +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld1q_dup_s64( + int64_t const *ptr) { + return __builtin_mpl_vector_ld1q_dup_v2i64(ptr); +} + +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld1_dup_u8( + uint8_t const *ptr) { + return __builtin_mpl_vector_ld1_dup_v8u8(ptr); +} + +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld1q_dup_u8( + uint8_t const *ptr) { + return __builtin_mpl_vector_ld1q_dup_v16u8(ptr); +} + +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld1_dup_u16( + uint16_t const *ptr) { + return __builtin_mpl_vector_ld1_dup_v4u16(ptr); +} + +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld1q_dup_u16( + uint16_t const *ptr) { + return __builtin_mpl_vector_ld1q_dup_v8u16(ptr); +} + +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld1_dup_u32( + uint32_t const *ptr) { + return __builtin_mpl_vector_ld1_dup_v2u32(ptr); +} + +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld1q_dup_u32( + uint32_t const *ptr) { + return __builtin_mpl_vector_ld1q_dup_v4u32(ptr); +} + +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld1_dup_u64( + uint64_t const *ptr) { + return __builtin_mpl_vector_ld1_dup_v1u64(ptr); +} + +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld1q_dup_u64( + uint64_t const *ptr) { + return __builtin_mpl_vector_ld1q_dup_v2u64(ptr); +} +extern inline int8x8x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld2_s8( + int8_t const *ptr) { + return __builtin_mpl_vector_ld2_v8i8(ptr); +} + +extern inline int8x16x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld2q_s8( + int8_t const *ptr) { + return __builtin_mpl_vector_ld2q_v16i8(ptr); +} + +extern inline int16x4x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld2_s16( + int16_t const *ptr) { + return __builtin_mpl_vector_ld2_v4i16(ptr); +} + +extern inline int16x8x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld2q_s16( + int16_t const *ptr) { + return __builtin_mpl_vector_ld2q_v8i16(ptr); +} + +extern inline int32x2x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld2_s32( + int32_t const *ptr) { + return __builtin_mpl_vector_ld2_v2i32(ptr); +} + +extern inline int32x4x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld2q_s32( + int32_t const *ptr) { + return __builtin_mpl_vector_ld2q_v4i32(ptr); +} + +extern inline uint8x8x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld2_u8( + uint8_t const *ptr) { + return __builtin_mpl_vector_ld2_v8u8(ptr); +} + +extern inline uint8x16x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld2q_u8( + uint8_t const *ptr) { + return __builtin_mpl_vector_ld2q_v16u8(ptr); +} + +extern inline uint16x4x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld2_u16( + uint16_t const *ptr) { + return __builtin_mpl_vector_ld2_v4u16(ptr); +} + +extern inline uint16x8x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld2q_u16( + uint16_t const *ptr) { + return __builtin_mpl_vector_ld2q_v8u16(ptr); +} + +extern inline uint32x2x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld2_u32( + uint32_t const *ptr) { + return __builtin_mpl_vector_ld2_v2u32(ptr); +} + +extern inline uint32x4x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld2q_u32( + uint32_t const *ptr) { + return __builtin_mpl_vector_ld2q_v4u32(ptr); +} + +extern inline int64x1x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld2_s64( + int64_t const *ptr) { + return __builtin_mpl_vector_ld2_v1i64(ptr); +} + +extern inline uint64x1x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld2_u64( + uint64_t const *ptr) { + return __builtin_mpl_vector_ld2_v1u64(ptr); +} + +extern inline int64x2x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld2q_s64( + int64_t const *ptr) { + return __builtin_mpl_vector_ld2q_v2i64(ptr); +} + +extern inline uint64x2x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld2q_u64( + uint64_t const *ptr) { + return __builtin_mpl_vector_ld2q_v2u64(ptr); +} + +extern inline int8x8x3_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld3_s8( + int8_t const *ptr) { + return __builtin_mpl_vector_ld3_v8i8(ptr); +} + +extern inline int8x16x3_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld3q_s8( + int8_t const *ptr) { + return __builtin_mpl_vector_ld3q_v16i8(ptr); +} + +extern inline int16x4x3_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld3_s16( + int16_t const *ptr) { + return __builtin_mpl_vector_ld3_v4i16(ptr); +} + +extern inline int16x8x3_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld3q_s16( + int16_t const *ptr) { + return __builtin_mpl_vector_ld3q_v8i16(ptr); +} + +extern inline int32x2x3_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld3_s32( + int32_t const *ptr) { + return __builtin_mpl_vector_ld3_v2i32(ptr); +} + +extern inline int32x4x3_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld3q_s32( + int32_t const *ptr) { + return __builtin_mpl_vector_ld3q_v4i32(ptr); +} + +extern inline uint8x8x3_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld3_u8( + uint8_t const *ptr) { + return __builtin_mpl_vector_ld3_v8u8(ptr); +} + +extern inline uint8x16x3_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld3q_u8( + uint8_t const *ptr) { + return __builtin_mpl_vector_ld3q_v16u8(ptr); +} + +extern inline uint16x4x3_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld3_u16( + uint16_t const *ptr) { + return __builtin_mpl_vector_ld3_v4u16(ptr); +} + +extern inline uint16x8x3_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld3q_u16( + uint16_t const *ptr) { + return __builtin_mpl_vector_ld3q_v8u16(ptr); +} + +extern inline uint32x2x3_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld3_u32( + uint32_t const *ptr) { + return __builtin_mpl_vector_ld3_v2u32(ptr); +} + +extern inline uint32x4x3_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld3q_u32( + uint32_t const *ptr) { + return __builtin_mpl_vector_ld3q_v4u32(ptr); +} + +extern inline int64x1x3_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld3_s64( + int64_t const *ptr) { + return __builtin_mpl_vector_ld3_v1i64(ptr); +} + +extern inline uint64x1x3_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld3_u64( + uint64_t const *ptr) { + return __builtin_mpl_vector_ld3_v1u64(ptr); +} + +extern inline int64x2x3_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld3q_s64( + int64_t const *ptr) { + return __builtin_mpl_vector_ld3q_v2i64(ptr); +} + +extern inline uint64x2x3_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld3q_u64( + uint64_t const *ptr) { + return __builtin_mpl_vector_ld3q_v2u64(ptr); +} + +extern inline int8x8x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld4_s8( + int8_t const *ptr) { + return __builtin_mpl_vector_ld4_v8i8(ptr); +} + +extern inline int8x16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld4q_s8( + int8_t const *ptr) { + return __builtin_mpl_vector_ld4q_v16i8(ptr); +} + +extern inline int16x4x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld4_s16( + int16_t const *ptr) { + return __builtin_mpl_vector_ld4_v4i16(ptr); +} + +extern inline int16x8x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld4q_s16( + int16_t const *ptr) { + return __builtin_mpl_vector_ld4q_v8i16(ptr); +} + +extern inline int32x2x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld4_s32( + int32_t const *ptr) { + return __builtin_mpl_vector_ld4_v2i32(ptr); +} + +extern inline int32x4x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld4q_s32( + int32_t const *ptr) { + return __builtin_mpl_vector_ld4q_v4i32(ptr); +} + +extern inline uint8x8x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld4_u8( + uint8_t const *ptr) { + return __builtin_mpl_vector_ld4_v8u8(ptr); +} + +extern inline uint8x16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld4q_u8( + uint8_t const *ptr) { + return __builtin_mpl_vector_ld4q_v16u8(ptr); +} + +extern inline uint16x4x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld4_u16( + uint16_t const *ptr) { + return __builtin_mpl_vector_ld4_v4u16(ptr); +} + +extern inline uint16x8x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld4q_u16( + uint16_t const *ptr) { + return __builtin_mpl_vector_ld4q_v8u16(ptr); +} + +extern inline uint32x2x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld4_u32( + uint32_t const *ptr) { + return __builtin_mpl_vector_ld4_v2u32(ptr); +} + +extern inline uint32x4x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld4q_u32( + uint32_t const *ptr) { + return __builtin_mpl_vector_ld4q_v4u32(ptr); +} + +extern inline int64x1x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld4_s64( + int64_t const *ptr) { + return __builtin_mpl_vector_ld4_v1i64(ptr); +} + +extern inline uint64x1x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld4_u64( + uint64_t const *ptr) { + return __builtin_mpl_vector_ld4_v1u64(ptr); +} + +extern inline int64x2x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld4q_s64( + int64_t const *ptr) { + return __builtin_mpl_vector_ld4q_v2i64(ptr); +} + +extern inline uint64x2x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld4q_u64( + uint64_t const *ptr) { + return __builtin_mpl_vector_ld4q_v2u64(ptr); +} + +int8x8x2_t __builtin_mpl_vector_ld2_dup_v8i8(int8_t const *ptr); +extern inline int8x8x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld2_dup_s8( + int8_t const *ptr) { + return __builtin_mpl_vector_ld2_dup_v8i8(ptr); +} + +int8x16x2_t __builtin_mpl_vector_ld2q_dup_v16i8(int8_t const *ptr); +extern inline int8x16x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld2q_dup_s8( + int8_t const *ptr) { + return __builtin_mpl_vector_ld2q_dup_v16i8(ptr); +} + +int16x4x2_t __builtin_mpl_vector_ld2_dup_v4i16(int16_t const *ptr); +extern inline int16x4x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld2_dup_s16( + int16_t const *ptr) { + return __builtin_mpl_vector_ld2_dup_v4i16(ptr); +} + +int16x8x2_t __builtin_mpl_vector_ld2q_dup_v8i16(int16_t const *ptr); +extern inline int16x8x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld2q_dup_s16( + int16_t const *ptr) { + return __builtin_mpl_vector_ld2q_dup_v8i16(ptr); +} + +int32x2x2_t __builtin_mpl_vector_ld2_dup_v2i32(int32_t const *ptr); +extern inline int32x2x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld2_dup_s32( + int32_t const *ptr) { + return __builtin_mpl_vector_ld2_dup_v2i32(ptr); +} + +int32x4x2_t __builtin_mpl_vector_ld2q_dup_v4i32(int32_t const *ptr); +extern inline int32x4x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld2q_dup_s32( + int32_t const *ptr) { + return __builtin_mpl_vector_ld2q_dup_v4i32(ptr); +} + +uint8x8x2_t __builtin_mpl_vector_ld2_dup_v8u8(uint8_t const *ptr); +extern inline uint8x8x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld2_dup_u8( + uint8_t const *ptr) { + return __builtin_mpl_vector_ld2_dup_v8u8(ptr); +} + +uint8x16x2_t __builtin_mpl_vector_ld2q_dup_v16u8(uint8_t const *ptr); +extern inline uint8x16x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld2q_dup_u8( + uint8_t const *ptr) { + return __builtin_mpl_vector_ld2q_dup_v16u8(ptr); +} + +uint16x4x2_t __builtin_mpl_vector_ld2_dup_v4u16(uint16_t const *ptr); +extern inline uint16x4x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld2_dup_u16( + uint16_t const *ptr) { + return __builtin_mpl_vector_ld2_dup_v4u16(ptr); +} -void __builtin_mpl_vector_st2q_u64v2(uint64_t *ptr, uint64x2x2_t val); -#define vst2q_u64(ptr, val) __builtin_mpl_vector_st2q_u64v2(ptr, val) +uint16x8x2_t __builtin_mpl_vector_ld2q_dup_v8u16(uint16_t const *ptr); +extern inline uint16x8x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld2q_dup_u16( + uint16_t const *ptr) { + return __builtin_mpl_vector_ld2q_dup_v8u16(ptr); +} -void __builtin_mpl_vector_st3_i8v8(int8_t *ptr, int8x8x3_t val); -#define vst3_s8(ptr, val) __builtin_mpl_vector_st3_i8v8(ptr, val) +uint32x2x2_t __builtin_mpl_vector_ld2_dup_v2u32(uint32_t const *ptr); +extern inline uint32x2x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld2_dup_u32( + uint32_t const *ptr) { + return __builtin_mpl_vector_ld2_dup_v2u32(ptr); +} -void __builtin_mpl_vector_st3q_i8v16(int8_t *ptr, int8x16x3_t val); -#define vst3q_s8(ptr, val) __builtin_mpl_vector_st3q_i8v16(ptr, val) +uint32x4x2_t __builtin_mpl_vector_ld2q_dup_v4u32(uint32_t const *ptr); +extern inline uint32x4x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld2q_dup_u32( + uint32_t const *ptr) { + return __builtin_mpl_vector_ld2q_dup_v4u32(ptr); +} -void __builtin_mpl_vector_st3_i16v4(int16_t *ptr, int16x4x3_t val); -#define vst3_s16(ptr, val) __builtin_mpl_vector_st3_i16v4(ptr, val) +int64x1x2_t __builtin_mpl_vector_ld2_dup_v1i64(int64_t const *ptr); +extern inline int64x1x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld2_dup_s64( + int64_t const *ptr) { + return __builtin_mpl_vector_ld2_dup_v1i64(ptr); +} -void __builtin_mpl_vector_st3q_i16v8(int16_t *ptr, int16x8x3_t val); -#define vst3q_s16(ptr, val) __builtin_mpl_vector_st3q_i16v8(ptr, val) +uint64x1x2_t __builtin_mpl_vector_ld2_dup_v1u64(uint64_t const *ptr); +extern inline uint64x1x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld2_dup_u64( + uint64_t const *ptr) { + return __builtin_mpl_vector_ld2_dup_v1u64(ptr); +} -void __builtin_mpl_vector_st3_i32v2(int32_t *ptr, int32x2x3_t val); -#define vst3_s32(ptr, val) __builtin_mpl_vector_st3_i32v2(ptr, val) +int64x2x2_t __builtin_mpl_vector_ld2q_dup_v2i64(int64_t const *ptr); +extern inline int64x2x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld2q_dup_s64( + int64_t const *ptr) { + return __builtin_mpl_vector_ld2q_dup_v2i64(ptr); +} -void __builtin_mpl_vector_st3q_i32v4(int32_t *ptr, int32x4x3_t val); -#define vst3q_s32(ptr, val) __builtin_mpl_vector_st3q_i32v4(ptr, val) +uint64x2x2_t __builtin_mpl_vector_ld2q_dup_v2u64(uint64_t const *ptr); +extern inline uint64x2x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld2q_dup_u64( + uint64_t const *ptr) { + return __builtin_mpl_vector_ld2q_dup_v2u64(ptr); +} -void __builtin_mpl_vector_st3_u8v8(uint8_t *ptr, uint8x8x3_t val); -#define vst3_u8(ptr, val) __builtin_mpl_vector_st3_u8v8(ptr, val) +int8x8x3_t __builtin_mpl_vector_ld3_dup_v8i8(int8_t const *ptr); +extern inline int8x8x3_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld3_dup_s8( + int8_t const *ptr) { + return __builtin_mpl_vector_ld3_dup_v8i8(ptr); +} -void __builtin_mpl_vector_st3q_u8v16(uint8_t *ptr, uint8x16x3_t val); -#define vst3q_u8(ptr, val) __builtin_mpl_vector_st3q_u8v16(ptr, val) +int8x16x3_t __builtin_mpl_vector_ld3q_dup_v16i8(int8_t const *ptr); +extern inline int8x16x3_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld3q_dup_s8( + int8_t const *ptr) { + return __builtin_mpl_vector_ld3q_dup_v16i8(ptr); +} -void __builtin_mpl_vector_st3_u16v4(uint16_t *ptr, uint16x4x3_t val); -#define vst3_u16(ptr, val) __builtin_mpl_vector_st3_u16v4(ptr, val) +int16x4x3_t __builtin_mpl_vector_ld3_dup_v4i16(int16_t const *ptr); +extern inline int16x4x3_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld3_dup_s16( + int16_t const *ptr) { + return __builtin_mpl_vector_ld3_dup_v4i16(ptr); +} -void __builtin_mpl_vector_st3q_u16v8(uint16_t *ptr, uint16x8x3_t val); -#define vst3q_u16(ptr, val) __builtin_mpl_vector_st3q_u16v8(ptr, val) +int16x8x3_t __builtin_mpl_vector_ld3q_dup_v8i16(int16_t const *ptr); +extern inline int16x8x3_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld3q_dup_s16( + int16_t const *ptr) { + return __builtin_mpl_vector_ld3q_dup_v8i16(ptr); +} -void __builtin_mpl_vector_st3_u32v2(uint32_t *ptr, uint32x2x3_t val); -#define vst3_u32(ptr, val) __builtin_mpl_vector_st3_u32v2(ptr, val) +int32x2x3_t __builtin_mpl_vector_ld3_dup_v2i32(int32_t const *ptr); +extern inline int32x2x3_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld3_dup_s32( + int32_t const *ptr) { + return __builtin_mpl_vector_ld3_dup_v2i32(ptr); +} -void __builtin_mpl_vector_st3q_u32v4(uint32_t *ptr, uint32x4x3_t val); -#define vst3q_u32(ptr, val) __builtin_mpl_vector_st3q_u32v4(ptr, val) +int32x4x3_t __builtin_mpl_vector_ld3q_dup_v4i32(int32_t const *ptr); +extern inline int32x4x3_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld3q_dup_s32( + int32_t const *ptr) { + return __builtin_mpl_vector_ld3q_dup_v4i32(ptr); +} -void __builtin_mpl_vector_st3_i64v1(int64_t *ptr, int64x1x3_t val); -#define vst3_s64(ptr, val) __builtin_mpl_vector_st3_i64v1(ptr, val) +uint8x8x3_t __builtin_mpl_vector_ld3_dup_v8u8(uint8_t const *ptr); +extern inline uint8x8x3_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld3_dup_u8( + uint8_t const *ptr) { + return __builtin_mpl_vector_ld3_dup_v8u8(ptr); +} -void __builtin_mpl_vector_st3_u64v1(uint64_t *ptr, uint64x1x3_t val); -#define vst3_u64(ptr, val) __builtin_mpl_vector_st3_u64v1(ptr, val) +uint8x16x3_t __builtin_mpl_vector_ld3q_dup_v16u8(uint8_t const *ptr); +extern inline uint8x16x3_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld3q_dup_u8( + uint8_t const *ptr) { + return __builtin_mpl_vector_ld3q_dup_v16u8(ptr); +} -void __builtin_mpl_vector_st3q_i64v2(int64_t *ptr, int64x2x3_t val); -#define vst3q_s64(ptr, val) __builtin_mpl_vector_st3q_i64v2(ptr, val) +uint16x4x3_t __builtin_mpl_vector_ld3_dup_v4u16(uint16_t const *ptr); +extern inline uint16x4x3_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld3_dup_u16( + uint16_t const *ptr) { + return __builtin_mpl_vector_ld3_dup_v4u16(ptr); +} -void __builtin_mpl_vector_st3q_u64v2(uint64_t *ptr, uint64x2x3_t val); -#define vst3q_u64(ptr, val) __builtin_mpl_vector_st3q_u64v2(ptr, val) +uint16x8x3_t __builtin_mpl_vector_ld3q_dup_v8u16(uint16_t const *ptr); +extern inline uint16x8x3_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld3q_dup_u16( + uint16_t const *ptr) { + return __builtin_mpl_vector_ld3q_dup_v8u16(ptr); +} -void __builtin_mpl_vector_st4_i8v8(int8_t *ptr, int8x8x4_t val); -#define vst4_s8(ptr, val) __builtin_mpl_vector_st4_i8v8(ptr, val) +uint32x2x3_t __builtin_mpl_vector_ld3_dup_v2u32(uint32_t const *ptr); +extern inline uint32x2x3_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld3_dup_u32( + uint32_t const *ptr) { + return __builtin_mpl_vector_ld3_dup_v2u32(ptr); +} -void __builtin_mpl_vector_st4q_i8v16(int8_t *ptr, int8x16x4_t val); -#define vst4q_s8(ptr, val) __builtin_mpl_vector_st4q_i8v16(ptr, val) +uint32x4x3_t __builtin_mpl_vector_ld3q_dup_v4u32(uint32_t const *ptr); +extern inline uint32x4x3_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld3q_dup_u32( + uint32_t const *ptr) { + return __builtin_mpl_vector_ld3q_dup_v4u32(ptr); +} -void __builtin_mpl_vector_st4_i16v4(int16_t *ptr, int16x4x4_t val); -#define vst4_s16(ptr, val) __builtin_mpl_vector_st4_i16v4(ptr, val) +int64x1x3_t __builtin_mpl_vector_ld3_dup_v1i64(int64_t const *ptr); +extern inline int64x1x3_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld3_dup_s64( + int64_t const *ptr) { + return __builtin_mpl_vector_ld3_dup_v1i64(ptr); +} -void __builtin_mpl_vector_st4q_i16v8(int16_t *ptr, int16x8x4_t val); -#define vst4q_s16(ptr, val) __builtin_mpl_vector_st4q_i16v8(ptr, val) +uint64x1x3_t __builtin_mpl_vector_ld3_dup_v1u64(uint64_t const *ptr); +extern inline uint64x1x3_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld3_dup_u64( + uint64_t const *ptr) { + return __builtin_mpl_vector_ld3_dup_v1u64(ptr); +} + +int64x2x3_t __builtin_mpl_vector_ld3q_dup_v2i64(int64_t const *ptr); +extern inline int64x2x3_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld3q_dup_s64( + int64_t const *ptr) { + return __builtin_mpl_vector_ld3q_dup_v2i64(ptr); +} + +uint64x2x3_t __builtin_mpl_vector_ld3q_dup_v2u64(uint64_t const *ptr); +extern inline uint64x2x3_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld3q_dup_u64( + uint64_t const *ptr) { + return __builtin_mpl_vector_ld3q_dup_v2u64(ptr); +} + +int8x8x4_t __builtin_mpl_vector_ld4_dup_v8i8(int8_t const *ptr); +extern inline int8x8x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld4_dup_s8( + int8_t const *ptr) { + return __builtin_mpl_vector_ld4_dup_v8i8(ptr); +} + +int8x16x4_t __builtin_mpl_vector_ld4q_dup_v16i8(int8_t const *ptr); +extern inline int8x16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld4q_dup_s8( + int8_t const *ptr) { + return __builtin_mpl_vector_ld4q_dup_v16i8(ptr); +} + +int16x4x4_t __builtin_mpl_vector_ld4_dup_v4i16(int16_t const *ptr); +extern inline int16x4x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld4_dup_s16( + int16_t const *ptr) { + return __builtin_mpl_vector_ld4_dup_v4i16(ptr); +} + +int16x8x4_t __builtin_mpl_vector_ld4q_dup_v8i16(int16_t const *ptr); +extern inline int16x8x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld4q_dup_s16( + int16_t const *ptr) { + return __builtin_mpl_vector_ld4q_dup_v8i16(ptr); +} + +int32x2x4_t __builtin_mpl_vector_ld4_dup_v2i32(int32_t const *ptr); +extern inline int32x2x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld4_dup_s32( + int32_t const *ptr) { + return __builtin_mpl_vector_ld4_dup_v2i32(ptr); +} + +int32x4x4_t __builtin_mpl_vector_ld4q_dup_v4i32(int32_t const *ptr); +extern inline int32x4x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld4q_dup_s32( + int32_t const *ptr) { + return __builtin_mpl_vector_ld4q_dup_v4i32(ptr); +} + +uint8x8x4_t __builtin_mpl_vector_ld4_dup_v8u8(uint8_t const *ptr); +extern inline uint8x8x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld4_dup_u8( + uint8_t const *ptr) { + return __builtin_mpl_vector_ld4_dup_v8u8(ptr); +} + +uint8x16x4_t __builtin_mpl_vector_ld4q_dup_v16u8(uint8_t const *ptr); +extern inline uint8x16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld4q_dup_u8( + uint8_t const *ptr) { + return __builtin_mpl_vector_ld4q_dup_v16u8(ptr); +} + +uint16x4x4_t __builtin_mpl_vector_ld4_dup_v4u16(uint16_t const *ptr); +extern inline uint16x4x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld4_dup_u16( + uint16_t const *ptr) { + return __builtin_mpl_vector_ld4_dup_v4u16(ptr); +} + +uint16x8x4_t __builtin_mpl_vector_ld4q_dup_v8u16(uint16_t const *ptr); +extern inline uint16x8x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld4q_dup_u16( + uint16_t const *ptr) { + return __builtin_mpl_vector_ld4q_dup_v8u16(ptr); +} + +uint32x2x4_t __builtin_mpl_vector_ld4_dup_v2u32(uint32_t const *ptr); +extern inline uint32x2x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld4_dup_u32( + uint32_t const *ptr) { + return __builtin_mpl_vector_ld4_dup_v2u32(ptr); +} + +uint32x4x4_t __builtin_mpl_vector_ld4q_dup_v4u32(uint32_t const *ptr); +extern inline uint32x4x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld4q_dup_u32( + uint32_t const *ptr) { + return __builtin_mpl_vector_ld4q_dup_v4u32(ptr); +} + +int64x1x4_t __builtin_mpl_vector_ld4_dup_v1i64(int64_t const *ptr); +extern inline int64x1x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld4_dup_s64( + int64_t const *ptr) { + return __builtin_mpl_vector_ld4_dup_v1i64(ptr); +} + +uint64x1x4_t __builtin_mpl_vector_ld4_dup_v1u64(uint64_t const *ptr); +extern inline uint64x1x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld4_dup_u64( + uint64_t const *ptr) { + return __builtin_mpl_vector_ld4_dup_v1u64(ptr); +} + +int64x2x4_t __builtin_mpl_vector_ld4q_dup_v2i64(int64_t const *ptr); +extern inline int64x2x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld4q_dup_s64( + int64_t const *ptr) { + return __builtin_mpl_vector_ld4q_dup_v2i64(ptr); +} + +uint64x2x4_t __builtin_mpl_vector_ld4q_dup_v2u64(uint64_t const *ptr); +extern inline uint64x2x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld4q_dup_u64( + uint64_t const *ptr) { + return __builtin_mpl_vector_ld4q_dup_v2u64(ptr); +} + +int16x4x2_t __builtin_mpl_vector_ld2_lane_v4i16(int16_t const *ptr, int16x4x2_t src, const int lane); +extern inline int16x4x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld2_lane_s16( + int16_t const *ptr, int16x4x2_t src, const int lane) { + return __builtin_mpl_vector_ld2_lane_v4i16(ptr, src, lane); +} + +int16x8x2_t __builtin_mpl_vector_ld2q_lane_v8i16(int16_t const *ptr, int16x8x2_t src, const int lane); +extern inline int16x8x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld2q_lane_s16( + int16_t const *ptr, int16x8x2_t src, const int lane) { + return __builtin_mpl_vector_ld2q_lane_v8i16(ptr, src, lane); +} + +int32x2x2_t __builtin_mpl_vector_ld2_lane_v2i32(int32_t const *ptr, int32x2x2_t src, const int lane); +extern inline int32x2x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld2_lane_s32( + int32_t const *ptr, int32x2x2_t src, const int lane) { + return __builtin_mpl_vector_ld2_lane_v2i32(ptr, src, lane); +} + +int32x4x2_t __builtin_mpl_vector_ld2q_lane_v4i32(int32_t const *ptr, int32x4x2_t src, const int lane); +extern inline int32x4x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld2q_lane_s32( + int32_t const *ptr, int32x4x2_t src, const int lane) { + return __builtin_mpl_vector_ld2q_lane_v4i32(ptr, src, lane); +} + +uint16x4x2_t __builtin_mpl_vector_ld2_lane_v4u16(uint16_t const *ptr, uint16x4x2_t src, const int lane); +extern inline uint16x4x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld2_lane_u16( + uint16_t const *ptr, uint16x4x2_t src, const int lane) { + return __builtin_mpl_vector_ld2_lane_v4u16(ptr, src, lane); +} + +uint16x8x2_t __builtin_mpl_vector_ld2q_lane_v8u16(uint16_t const *ptr, uint16x8x2_t src, const int lane); +extern inline uint16x8x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld2q_lane_u16( + uint16_t const *ptr, uint16x8x2_t src, const int lane) { + return __builtin_mpl_vector_ld2q_lane_v8u16(ptr, src, lane); +} + +uint32x2x2_t __builtin_mpl_vector_ld2_lane_v2u32(uint32_t const *ptr, uint32x2x2_t src, const int lane); +extern inline uint32x2x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld2_lane_u32( + uint32_t const *ptr, uint32x2x2_t src, const int lane) { + return __builtin_mpl_vector_ld2_lane_v2u32(ptr, src, lane); +} + +uint32x4x2_t __builtin_mpl_vector_ld2q_lane_v4u32(uint32_t const *ptr, uint32x4x2_t src, const int lane); +extern inline uint32x4x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld2q_lane_u32( + uint32_t const *ptr, uint32x4x2_t src, const int lane) { + return __builtin_mpl_vector_ld2q_lane_v4u32(ptr, src, lane); +} + +int8x8x2_t __builtin_mpl_vector_ld2_lane_v8i8(int8_t const *ptr, int8x8x2_t src, const int lane); +extern inline int8x8x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld2_lane_s8( + int8_t const *ptr, int8x8x2_t src, const int lane) { + return __builtin_mpl_vector_ld2_lane_v8i8(ptr, src, lane); +} + +uint8x8x2_t __builtin_mpl_vector_ld2_lane_v8u8(uint8_t const *ptr, uint8x8x2_t src, const int lane); +extern inline uint8x8x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld2_lane_u8( + uint8_t const *ptr, uint8x8x2_t src, const int lane) { + return __builtin_mpl_vector_ld2_lane_v8u8(ptr, src, lane); +} + +int8x16x2_t __builtin_mpl_vector_ld2q_lane_v16i8(int8_t const *ptr, int8x16x2_t src, const int lane); +extern inline int8x16x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld2q_lane_s8( + int8_t const *ptr, int8x16x2_t src, const int lane) { + return __builtin_mpl_vector_ld2q_lane_v16i8(ptr, src, lane); +} + +uint8x16x2_t __builtin_mpl_vector_ld2q_lane_v16u8(uint8_t const *ptr, uint8x16x2_t src, const int lane); +extern inline uint8x16x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld2q_lane_u8( + uint8_t const *ptr, uint8x16x2_t src, const int lane) { + return __builtin_mpl_vector_ld2q_lane_v16u8(ptr, src, lane); +} + +int64x1x2_t __builtin_mpl_vector_ld2_lane_v1i64(int64_t const *ptr, int64x1x2_t src, const int lane); +extern inline int64x1x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld2_lane_s64( + int64_t const *ptr, int64x1x2_t src, const int lane) { + return __builtin_mpl_vector_ld2_lane_v1i64(ptr, src, lane); +} + +int64x2x2_t __builtin_mpl_vector_ld2q_lane_v2i64(int64_t const *ptr, int64x2x2_t src, const int lane); +extern inline int64x2x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld2q_lane_s64( + int64_t const *ptr, int64x2x2_t src, const int lane) { + return __builtin_mpl_vector_ld2q_lane_v2i64(ptr, src, lane); +} + +uint64x1x2_t __builtin_mpl_vector_ld2_lane_v1u64(uint64_t const *ptr, uint64x1x2_t src, const int lane); +extern inline uint64x1x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld2_lane_u64( + uint64_t const *ptr, uint64x1x2_t src, const int lane) { + return __builtin_mpl_vector_ld2_lane_v1u64(ptr, src, lane); +} + +uint64x2x2_t __builtin_mpl_vector_ld2q_lane_v2u64(uint64_t const *ptr, uint64x2x2_t src, const int lane); +extern inline uint64x2x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld2q_lane_u64( + uint64_t const *ptr, uint64x2x2_t src, const int lane) { + return __builtin_mpl_vector_ld2q_lane_v2u64(ptr, src, lane); +} + +int16x4x3_t __builtin_mpl_vector_ld3_lane_v4i16(int16_t const *ptr, int16x4x3_t src, const int lane); +extern inline int16x4x3_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld3_lane_s16( + int16_t const *ptr, int16x4x3_t src, const int lane) { + return __builtin_mpl_vector_ld3_lane_v4i16(ptr, src, lane); +} + +int16x8x3_t __builtin_mpl_vector_ld3q_lane_v8i16(int16_t const *ptr, int16x8x3_t src, const int lane); +extern inline int16x8x3_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld3q_lane_s16( + int16_t const *ptr, int16x8x3_t src, const int lane) { + return __builtin_mpl_vector_ld3q_lane_v8i16(ptr, src, lane); +} + +int32x2x3_t __builtin_mpl_vector_ld3_lane_v2i32(int32_t const *ptr, int32x2x3_t src, const int lane); +extern inline int32x2x3_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld3_lane_s32( + int32_t const *ptr, int32x2x3_t src, const int lane) { + return __builtin_mpl_vector_ld3_lane_v2i32(ptr, src, lane); +} + +int32x4x3_t __builtin_mpl_vector_ld3q_lane_v4i32(int32_t const *ptr, int32x4x3_t src, const int lane); +extern inline int32x4x3_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld3q_lane_s32( + int32_t const *ptr, int32x4x3_t src, const int lane) { + return __builtin_mpl_vector_ld3q_lane_v4i32(ptr, src, lane); +} + +uint16x4x3_t __builtin_mpl_vector_ld3_lane_v4u16(uint16_t const *ptr, uint16x4x3_t src, const int lane); +extern inline uint16x4x3_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld3_lane_u16( + uint16_t const *ptr, uint16x4x3_t src, const int lane) { + return __builtin_mpl_vector_ld3_lane_v4u16(ptr, src, lane); +} + +uint16x8x3_t __builtin_mpl_vector_ld3q_lane_v8u16(uint16_t const *ptr, uint16x8x3_t src, const int lane); +extern inline uint16x8x3_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld3q_lane_u16( + uint16_t const *ptr, uint16x8x3_t src, const int lane) { + return __builtin_mpl_vector_ld3q_lane_v8u16(ptr, src, lane); +} + +uint32x2x3_t __builtin_mpl_vector_ld3_lane_v2u32(uint32_t const *ptr, uint32x2x3_t src, const int lane); +extern inline uint32x2x3_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld3_lane_u32( + uint32_t const *ptr, uint32x2x3_t src, const int lane) { + return __builtin_mpl_vector_ld3_lane_v2u32(ptr, src, lane); +} + +uint32x4x3_t __builtin_mpl_vector_ld3q_lane_v4u32(uint32_t const *ptr, uint32x4x3_t src, const int lane); +extern inline uint32x4x3_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld3q_lane_u32( + uint32_t const *ptr, uint32x4x3_t src, const int lane) { + return __builtin_mpl_vector_ld3q_lane_v4u32(ptr, src, lane); +} + +int8x8x3_t __builtin_mpl_vector_ld3_lane_v8i8(int8_t const *ptr, int8x8x3_t src, const int lane); +extern inline int8x8x3_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld3_lane_s8( + int8_t const *ptr, int8x8x3_t src, const int lane) { + return __builtin_mpl_vector_ld3_lane_v8i8(ptr, src, lane); +} + +uint8x8x3_t __builtin_mpl_vector_ld3_lane_v8u8(uint8_t const *ptr, uint8x8x3_t src, const int lane); +extern inline uint8x8x3_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld3_lane_u8( + uint8_t const *ptr, uint8x8x3_t src, const int lane) { + return __builtin_mpl_vector_ld3_lane_v8u8(ptr, src, lane); +} + +int8x16x3_t __builtin_mpl_vector_ld3q_lane_v16i8(int8_t const *ptr, int8x16x3_t src, const int lane); +extern inline int8x16x3_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld3q_lane_s8( + int8_t const *ptr, int8x16x3_t src, const int lane) { + return __builtin_mpl_vector_ld3q_lane_v16i8(ptr, src, lane); +} + +uint8x16x3_t __builtin_mpl_vector_ld3q_lane_v16u8(uint8_t const *ptr, uint8x16x3_t src, const int lane); +extern inline uint8x16x3_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld3q_lane_u8( + uint8_t const *ptr, uint8x16x3_t src, const int lane) { + return __builtin_mpl_vector_ld3q_lane_v16u8(ptr, src, lane); +} + +int64x1x3_t __builtin_mpl_vector_ld3_lane_v1i64(int64_t const *ptr, int64x1x3_t src, const int lane); +extern inline int64x1x3_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld3_lane_s64( + int64_t const *ptr, int64x1x3_t src, const int lane) { + return __builtin_mpl_vector_ld3_lane_v1i64(ptr, src, lane); +} + +int64x2x3_t __builtin_mpl_vector_ld3q_lane_v2i64(int64_t const *ptr, int64x2x3_t src, const int lane); +extern inline int64x2x3_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld3q_lane_s64( + int64_t const *ptr, int64x2x3_t src, const int lane) { + return __builtin_mpl_vector_ld3q_lane_v2i64(ptr, src, lane); +} + +uint64x1x3_t __builtin_mpl_vector_ld3_lane_v1u64(uint64_t const *ptr, uint64x1x3_t src, const int lane); +extern inline uint64x1x3_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld3_lane_u64( + uint64_t const *ptr, uint64x1x3_t src, const int lane) { + return __builtin_mpl_vector_ld3_lane_v1u64(ptr, src, lane); +} + +uint64x2x3_t __builtin_mpl_vector_ld3q_lane_v2u64(uint64_t const *ptr, uint64x2x3_t src, const int lane); +extern inline uint64x2x3_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld3q_lane_u64( + uint64_t const *ptr, uint64x2x3_t src, const int lane) { + return __builtin_mpl_vector_ld3q_lane_v2u64(ptr, src, lane); +} + +int16x4x4_t __builtin_mpl_vector_ld4_lane_v4i16(int16_t const *ptr, int16x4x4_t src, const int lane); +extern inline int16x4x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld4_lane_s16( + int16_t const *ptr, int16x4x4_t src, const int lane) { + return __builtin_mpl_vector_ld4_lane_v4i16(ptr, src, lane); +} + +int16x8x4_t __builtin_mpl_vector_ld4q_lane_v8i16(int16_t const *ptr, int16x8x4_t src, const int lane); +extern inline int16x8x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld4q_lane_s16( + int16_t const *ptr, int16x8x4_t src, const int lane) { + return __builtin_mpl_vector_ld4q_lane_v8i16(ptr, src, lane); +} + +int32x2x4_t __builtin_mpl_vector_ld4_lane_v2i32(int32_t const *ptr, int32x2x4_t src, const int lane); +extern inline int32x2x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld4_lane_s32( + int32_t const *ptr, int32x2x4_t src, const int lane) { + return __builtin_mpl_vector_ld4_lane_v2i32(ptr, src, lane); +} + +int32x4x4_t __builtin_mpl_vector_ld4q_lane_v4i32(int32_t const *ptr, int32x4x4_t src, const int lane); +extern inline int32x4x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld4q_lane_s32( + int32_t const *ptr, int32x4x4_t src, const int lane) { + return __builtin_mpl_vector_ld4q_lane_v4i32(ptr, src, lane); +} + +uint16x4x4_t __builtin_mpl_vector_ld4_lane_v4u16(uint16_t const *ptr, uint16x4x4_t src, const int lane); +extern inline uint16x4x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld4_lane_u16( + uint16_t const *ptr, uint16x4x4_t src, const int lane) { + return __builtin_mpl_vector_ld4_lane_v4u16(ptr, src, lane); +} + +uint16x8x4_t __builtin_mpl_vector_ld4q_lane_v8u16(uint16_t const *ptr, uint16x8x4_t src, const int lane); +extern inline uint16x8x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld4q_lane_u16( + uint16_t const *ptr, uint16x8x4_t src, const int lane) { + return __builtin_mpl_vector_ld4q_lane_v8u16(ptr, src, lane); +} + +uint32x2x4_t __builtin_mpl_vector_ld4_lane_v2u32(uint32_t const *ptr, uint32x2x4_t src, const int lane); +extern inline uint32x2x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld4_lane_u32( + uint32_t const *ptr, uint32x2x4_t src, const int lane) { + return __builtin_mpl_vector_ld4_lane_v2u32(ptr, src, lane); +} + +uint32x4x4_t __builtin_mpl_vector_ld4q_lane_v4u32(uint32_t const *ptr, uint32x4x4_t src, const int lane); +extern inline uint32x4x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld4q_lane_u32( + uint32_t const *ptr, uint32x4x4_t src, const int lane) { + return __builtin_mpl_vector_ld4q_lane_v4u32(ptr, src, lane); +} + +int8x8x4_t __builtin_mpl_vector_ld4_lane_v8i8(int8_t const *ptr, int8x8x4_t src, const int lane); +extern inline int8x8x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld4_lane_s8( + int8_t const *ptr, int8x8x4_t src, const int lane) { + return __builtin_mpl_vector_ld4_lane_v8i8(ptr, src, lane); +} + +uint8x8x4_t __builtin_mpl_vector_ld4_lane_v8u8(uint8_t const *ptr, uint8x8x4_t src, const int lane); +extern inline uint8x8x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld4_lane_u8( + uint8_t const *ptr, uint8x8x4_t src, const int lane) { + return __builtin_mpl_vector_ld4_lane_v8u8(ptr, src, lane); +} + +int8x16x4_t __builtin_mpl_vector_ld4q_lane_v16i8(int8_t const *ptr, int8x16x4_t src, const int lane); +extern inline int8x16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld4q_lane_s8( + int8_t const *ptr, int8x16x4_t src, const int lane) { + return __builtin_mpl_vector_ld4q_lane_v16i8(ptr, src, lane); +} + +uint8x16x4_t __builtin_mpl_vector_ld4q_lane_v16u8(uint8_t const *ptr, uint8x16x4_t src, const int lane); +extern inline uint8x16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld4q_lane_u8( + uint8_t const *ptr, uint8x16x4_t src, const int lane) { + return __builtin_mpl_vector_ld4q_lane_v16u8(ptr, src, lane); +} + +int64x1x4_t __builtin_mpl_vector_ld4_lane_v1i64(int64_t const *ptr, int64x1x4_t src, const int lane); +extern inline int64x1x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld4_lane_s64( + int64_t const *ptr, int64x1x4_t src, const int lane) { + return __builtin_mpl_vector_ld4_lane_v1i64(ptr, src, lane); +} + +int64x2x4_t __builtin_mpl_vector_ld4q_lane_v2i64(int64_t const *ptr, int64x2x4_t src, const int lane); +extern inline int64x2x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld4q_lane_s64( + int64_t const *ptr, int64x2x4_t src, const int lane) { + return __builtin_mpl_vector_ld4q_lane_v2i64(ptr, src, lane); +} + +uint64x1x4_t __builtin_mpl_vector_ld4_lane_v1u64(uint64_t const *ptr, uint64x1x4_t src, const int lane); +extern inline uint64x1x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld4_lane_u64( + uint64_t const *ptr, uint64x1x4_t src, const int lane) { + return __builtin_mpl_vector_ld4_lane_v1u64(ptr, src, lane); +} + +uint64x2x4_t __builtin_mpl_vector_ld4q_lane_v2u64(uint64_t const *ptr, uint64x2x4_t src, const int lane); +extern inline uint64x2x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vld4q_lane_u64( + uint64_t const *ptr, uint64x2x4_t src, const int lane) { + return __builtin_mpl_vector_ld4q_lane_v2u64(ptr, src, lane); +} + +int8x8_t __builtin_mpl_vector_tbl1_v8i8(int8x16_t, int8x8_t); +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtbl1_s8( + int8x8_t a, int8x8_t idx) { + return __builtin_mpl_vector_tbl1_v8i8(vcombine_s8(a, (int8x8_t){0}), idx); +} + +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtbl1_u8( + uint8x8_t a, uint8x8_t idx) { + return __builtin_mpl_vector_tbl1_v8i8(vcombine_s8(a, (uint8x8_t){0}), idx); +} + +int8x8_t __builtin_mpl_vector_qtbl1_v8i8(int8x16_t t, uint8x8_t idx); +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqtbl1_s8( + int8x16_t t, uint8x8_t idx) { + return __builtin_mpl_vector_qtbl1_v8i8(t, idx); +} + +int8x16_t __builtin_mpl_vector_qtbl1q_v16i8(int8x16_t t, uint8x16_t idx); +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqtbl1q_s8( + int8x16_t t, uint8x16_t idx) { + return __builtin_mpl_vector_qtbl1q_v16i8(t, idx); +} + +uint8x8_t __builtin_mpl_vector_qtbl1_v8u8(uint8x16_t t, uint8x8_t idx); +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqtbl1_u8( + uint8x16_t t, uint8x8_t idx) { + return __builtin_mpl_vector_qtbl1_v8u8(t, idx); +} + +uint8x16_t __builtin_mpl_vector_qtbl1q_v16u8(uint8x16_t t, uint8x16_t idx); +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqtbl1q_u8( + uint8x16_t t, uint8x16_t idx) { + return __builtin_mpl_vector_qtbl1q_v16u8(t, idx); +} + +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtbl2_s8( + int8x8x2_t a, int8x8_t idx) { + return vqtbl1_s8(vcombine_s8(a.val[0], a.val[1]), idx); +} + +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtbl2_u8( + uint8x8x2_t a, uint8x8_t idx) { + return vqtbl1_u8(vcombine_u8(a.val[0], a.val[1]), idx); +} + +int8x8_t __builtin_mpl_vector_tbl3_v8i8(int8x8x3_t a, int8x8_t idx); +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtbl3_s8( + int8x8x3_t a, int8x8_t idx) { + return __builtin_mpl_vector_tbl3_v8i8(a, idx); +} + +uint8x8_t __builtin_mpl_vector_tbl3_v8u8(uint8x8x3_t a, uint8x8_t idx); +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtbl3_u8( + uint8x8x3_t a, uint8x8_t idx) { + return __builtin_mpl_vector_tbl3_v8u8(a, idx); +} + +int8x8_t __builtin_mpl_vector_tbl4_v8i8(int8x8x4_t a, int8x8_t idx); +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtbl4_s8( + int8x8x4_t a, int8x8_t idx) { + return __builtin_mpl_vector_tbl4_v8i8(a, idx); +} + +uint8x8_t __builtin_mpl_vector_tbl4_v8u8(uint8x8x4_t a, uint8x8_t idx); +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtbl4_u8( + uint8x8x4_t a, uint8x8_t idx) { + return __builtin_mpl_vector_tbl4_v8u8(a, idx); +} + +int8x8_t __builtin_mpl_vector_qtbl2_v8i8(int8x16x2_t t, uint8x8_t idx); +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqtbl2_s8( + int8x16x2_t t, uint8x8_t idx) { + return __builtin_mpl_vector_qtbl2_v8i8(t, idx); +} + +int8x16_t __builtin_mpl_vector_qtbl2q_v16i8(int8x16x2_t t, uint8x16_t idx); +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqtbl2q_s8( + int8x16x2_t t, uint8x16_t idx) { + return __builtin_mpl_vector_qtbl2q_v16i8(t, idx); +} + +uint8x8_t __builtin_mpl_vector_qtbl2_v8u8(uint8x16x2_t t, uint8x8_t idx); +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqtbl2_u8( + uint8x16x2_t t, uint8x8_t idx) { + return __builtin_mpl_vector_qtbl2_v8u8(t, idx); +} + +uint8x16_t __builtin_mpl_vector_qtbl2q_v16u8(uint8x16x2_t t, uint8x16_t idx); +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqtbl2q_u8( + uint8x16x2_t t, uint8x16_t idx) { + return __builtin_mpl_vector_qtbl2q_v16u8(t, idx); +} + +int8x8_t __builtin_mpl_vector_qtbl3_v8i8(int8x16x3_t t, uint8x8_t idx); +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqtbl3_s8( + int8x16x3_t t, uint8x8_t idx) { + return __builtin_mpl_vector_qtbl3_v8i8(t, idx); +} + +int8x16_t __builtin_mpl_vector_qtbl3q_v16i8(int8x16x3_t t, uint8x16_t idx); +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqtbl3q_s8( + int8x16x3_t t, uint8x16_t idx) { + return __builtin_mpl_vector_qtbl3q_v16i8(t, idx); +} + +uint8x8_t __builtin_mpl_vector_qtbl3_v8u8(uint8x16x3_t t, uint8x8_t idx); +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqtbl3_u8( + uint8x16x3_t t, uint8x8_t idx) { + return __builtin_mpl_vector_qtbl3_v8u8(t, idx); +} + +uint8x16_t __builtin_mpl_vector_qtbl3q_v16u8(uint8x16x3_t t, uint8x16_t idx); +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqtbl3q_u8( + uint8x16x3_t t, uint8x16_t idx) { + return __builtin_mpl_vector_qtbl3q_v16u8(t, idx); +} + +int8x8_t __builtin_mpl_vector_qtbl4_v8i8(int8x16x4_t t, uint8x8_t idx); +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqtbl4_s8( + int8x16x4_t t, uint8x8_t idx) { + return __builtin_mpl_vector_qtbl4_v8i8(t, idx); +} + +int8x16_t __builtin_mpl_vector_qtbl4q_v16i8(int8x16x4_t t, uint8x16_t idx); +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqtbl4q_s8( + int8x16x4_t t, uint8x16_t idx) { + return __builtin_mpl_vector_qtbl4q_v16i8(t, idx); +} + +uint8x8_t __builtin_mpl_vector_qtbl4_v8u8(uint8x16x4_t t, uint8x8_t idx); +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqtbl4_u8( + uint8x16x4_t t, uint8x8_t idx) { + return __builtin_mpl_vector_qtbl4_v8u8(t, idx); +} + +uint8x16_t __builtin_mpl_vector_qtbl4q_v16u8(uint8x16x4_t t, uint8x16_t idx); +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqtbl4q_u8( + uint8x16x4_t t, uint8x16_t idx) { + return __builtin_mpl_vector_qtbl4q_v16u8(t, idx); +} + +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtbx1_s8( + int8x8_t a, int8x8_t b, int8x8_t idx) { + uint8x8_t mask = vclt_u8((uint8x8_t)(idx), vmov_n_u8(8)); + int8x8_t tbl = vtbl1_s8(b, idx); + return vbsl_s8(mask, tbl, a); +} + +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtbx1_u8( + uint8x8_t a, uint8x8_t b, uint8x8_t idx) { + uint8x8_t mask = vclt_u8(idx, vmov_n_u8(8)); + uint8x8_t tbl = vtbl1_u8(b, idx); + return vbsl_u8(mask, tbl, a); +} -void __builtin_mpl_vector_st4_i32v2(int32_t *ptr, int32x2x4_t val); -#define vst4_s32(ptr, val) __builtin_mpl_vector_st4_i32v2(ptr, val) +int8x8_t __builtin_mpl_vector_qtbx1_v8i8(int8x8_t a, int8x16_t t, uint8x8_t idx); +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqtbx1_s8( + int8x8_t a, int8x16_t t, uint8x8_t idx) { + return __builtin_mpl_vector_qtbx1_v8i8(a, t, idx); +} -void __builtin_mpl_vector_st4q_i32v4(int32_t *ptr, int32x4x4_t val); -#define vst4q_s32(ptr, val) __builtin_mpl_vector_st4q_i32v4(ptr, val) +int8x16_t __builtin_mpl_vector_qtbx1q_v16i8(int8x16_t a, int8x16_t t, uint8x16_t idx); +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqtbx1q_s8( + int8x16_t a, int8x16_t t, uint8x16_t idx) { + return __builtin_mpl_vector_qtbx1q_v16i8(a, t, idx); +} -void __builtin_mpl_vector_st4_u8v8(uint8_t *ptr, uint8x8x4_t val); -#define vst4_u8(ptr, val) __builtin_mpl_vector_st4_u8v8(ptr, val) +uint8x8_t __builtin_mpl_vector_qtbx1_v8u8(uint8x8_t a, uint8x16_t t, uint8x8_t idx); +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqtbx1_u8( + uint8x8_t a, uint8x16_t t, uint8x8_t idx) { + return __builtin_mpl_vector_qtbx1_v8u8(a, t, idx); +} -void __builtin_mpl_vector_st4q_u8v16(uint8_t *ptr, uint8x16x4_t val); -#define vst4q_u8(ptr, val) __builtin_mpl_vector_st4q_u8v16(ptr, val) +uint8x16_t __builtin_mpl_vector_qtbx1q_v16u8(uint8x16_t a, uint8x16_t t, uint8x16_t idx); +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqtbx1q_u8( + uint8x16_t a, uint8x16_t t, uint8x16_t idx) { + return __builtin_mpl_vector_qtbx1q_v16u8(a, t, idx); +} -void __builtin_mpl_vector_st4_u16v4(uint16_t *ptr, uint16x4x4_t val); -#define vst4_u16(ptr, val) __builtin_mpl_vector_st4_u16v4(ptr, val) +int8x8_t __builtin_mpl_vector_qtbx2_v8i8(int8x8_t a, int8x16x2_t t, uint8x8_t idx); +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqtbx2_s8( + int8x8_t a, int8x16x2_t t, uint8x8_t idx) { + return __builtin_mpl_vector_qtbx2_v8i8(a, t, idx); +} -void __builtin_mpl_vector_st4q_u16v8(uint16_t *ptr, uint16x8x4_t val); -#define vst4q_u16(ptr, val) __builtin_mpl_vector_st4q_u16v8(ptr, val) +int8x16_t __builtin_mpl_vector_qtbx2q_v16i8(int8x16_t a, int8x16x2_t t, uint8x16_t idx); +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqtbx2q_s8( + int8x16_t a, int8x16x2_t t, uint8x16_t idx) { + return __builtin_mpl_vector_qtbx2q_v16i8(a, t, idx); +} -void __builtin_mpl_vector_st4_u32v2(uint32_t *ptr, uint32x2x4_t val); -#define vst4_u32(ptr, val) __builtin_mpl_vector_st4_u32v2(ptr, val) +uint8x8_t __builtin_mpl_vector_qtbx2_v8u8(uint8x8_t a, uint8x16x2_t t, uint8x8_t idx); +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqtbx2_u8( + uint8x8_t a, uint8x16x2_t t, uint8x8_t idx) { + return __builtin_mpl_vector_qtbx2_v8u8(a, t, idx); +} -void __builtin_mpl_vector_st4q_u32v4(uint32_t *ptr, uint32x4x4_t val); -#define vst4q_u32(ptr, val) __builtin_mpl_vector_st4q_u32v4(ptr, val) +uint8x16_t __builtin_mpl_vector_qtbx2q_v16u8(uint8x16_t a, uint8x16x2_t t, uint8x16_t idx); +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqtbx2q_u8( + uint8x16_t a, uint8x16x2_t t, uint8x16_t idx) { + return __builtin_mpl_vector_qtbx2q_v16u8(a, t, idx); +} -void __builtin_mpl_vector_st4_i64v1(int64_t *ptr, int64x1x4_t val); -#define vst4_s64(ptr, val) __builtin_mpl_vector_st4_i64v1(ptr, val) +int8x8_t __builtin_mpl_vector_qtbx3_v8i8(int8x8_t a, int8x16x3_t t, uint8x8_t idx); +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqtbx3_s8( + int8x8_t a, int8x16x3_t t, uint8x8_t idx) { + return __builtin_mpl_vector_qtbx3_v8i8(a, t, idx); +} -void __builtin_mpl_vector_st4_u64v1(uint64_t *ptr, uint64x1x4_t val); -#define vst4_u64(ptr, val) __builtin_mpl_vector_st4_u64v1(ptr, val) +int8x16_t __builtin_mpl_vector_qtbx3q_v16i8(int8x16_t a, int8x16x3_t t, uint8x16_t idx); +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqtbx3q_s8( + int8x16_t a, int8x16x3_t t, uint8x16_t idx) { + return __builtin_mpl_vector_qtbx3q_v16i8(a, t, idx); +} -void __builtin_mpl_vector_st4q_i64v2(int64_t *ptr, int64x2x4_t val); -#define vst4q_s64(ptr, val) __builtin_mpl_vector_st4q_i64v2(ptr, val) +uint8x8_t __builtin_mpl_vector_qtbx3_v8u8(uint8x8_t a, uint8x16x3_t t, uint8x8_t idx); +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqtbx3_u8( + uint8x8_t a, uint8x16x3_t t, uint8x8_t idx) { + return __builtin_mpl_vector_qtbx3_v8u8(a, t, idx); +} -void __builtin_mpl_vector_st4q_u64v2(uint64_t *ptr, uint64x2x4_t val); -#define vst4q_u64(ptr, val) __builtin_mpl_vector_st4q_u64v2(ptr, val) +uint8x16_t __builtin_mpl_vector_qtbx3q_v16u8(uint8x16_t a, uint8x16x3_t t, uint8x16_t idx); +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqtbx3q_u8( + uint8x16_t a, uint8x16x3_t t, uint8x16_t idx) { + return __builtin_mpl_vector_qtbx3q_v16u8(a, t, idx); +} -void __builtin_mpl_vector_st2_lane_i8v8(int8_t *ptr, int8x8x2_t val, const int lane); -#define vst2_lane_s8(ptr, val, lane) __builtin_mpl_vector_st2_lane_i8v8(ptr, val, lane) +int8x8_t __builtin_mpl_vector_qtbx4_v8i8(int8x8_t a, int8x16x4_t t, uint8x8_t idx); +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqtbx4_s8( + int8x8_t a, int8x16x4_t t, uint8x8_t idx) { + return __builtin_mpl_vector_qtbx4_v8i8(a, t, idx); +} -void __builtin_mpl_vector_st2_lane_u8v8(uint8_t *ptr, uint8x8x2_t val, const int lane); -#define vst2_lane_u8(ptr, val, lane) __builtin_mpl_vector_st2_lane_u8v8(ptr, val, lane) +int8x16_t __builtin_mpl_vector_qtbx4q_v16i8(int8x16_t a, int8x16x4_t t, uint8x16_t idx); +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqtbx4q_s8( + int8x16_t a, int8x16x4_t t, uint8x16_t idx) { + return __builtin_mpl_vector_qtbx4q_v16i8(a, t, idx); +} -void __builtin_mpl_vector_st3_lane_i8v8(int8_t *ptr, int8x8x3_t val, const int lane); -#define vst3_lane_s8(ptr, val, lane) __builtin_mpl_vector_st3_lane_i8v8(ptr, val, lane) +uint8x8_t __builtin_mpl_vector_qtbx4_v8u8(uint8x8_t a, uint8x16x4_t t, uint8x8_t idx); +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqtbx4_u8( + uint8x8_t a, uint8x16x4_t t, uint8x8_t idx) { + return __builtin_mpl_vector_qtbx4_v8u8(a, t, idx); +} -void __builtin_mpl_vector_st3_lane_u8v8(uint8_t *ptr, uint8x8x3_t val, const int lane); -#define vst3_lane_u8(ptr, val, lane) __builtin_mpl_vector_st3_lane_u8v8(ptr, val, lane) +uint8x16_t __builtin_mpl_vector_qtbx4q_v16u8(uint8x16_t a, uint8x16x4_t t, uint8x16_t idx); +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqtbx4q_u8( + uint8x16_t a, uint8x16x4_t t, uint8x16_t idx) { + return __builtin_mpl_vector_qtbx4q_v16u8(a, t, idx); +} -void __builtin_mpl_vector_st4_lane_i8v8(int8_t *ptr, int8x8x4_t val, const int lane); -#define vst4_lane_s8(ptr, val, lane) __builtin_mpl_vector_st4_lane_i8v8(ptr, val, lane) +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtbx2_s8( + int8x8_t a, int8x8x2_t b, int8x8_t idx) { + return vqtbx1_s8(a, vcombine_s8(b.val[0], b.val[1]), idx); +} -void __builtin_mpl_vector_st4_lane_u8v8(uint8_t *ptr, uint8x8x4_t val, const int lane); -#define vst4_lane_u8(ptr, val, lane) __builtin_mpl_vector_st4_lane_u8v8(ptr, val, lane) +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtbx2_u8( + uint8x8_t a, uint8x8x2_t b, uint8x8_t idx) { + return vqtbx1_u8(a, vcombine_u8(b.val[0], b.val[1]), idx); +} -void __builtin_mpl_vector_st2_lane_i16v4(int16_t *ptr, int16x4x2_t val, const int lane); -#define vst2_lane_s16(ptr, val, lane) __builtin_mpl_vector_st2_lane_i16v4(ptr, val, lane) +int8x8_t __builtin_mpl_vector_tbx3_v8i8(int8x8_t a, int8x8x3_t b, int8x8_t idx); +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtbx3_s8( + int8x8_t a, int8x8x3_t b, int8x8_t idx) { + return __builtin_mpl_vector_tbx3_v8i8(a, b, idx); +} -void __builtin_mpl_vector_st2q_lane_i16v8(int16_t *ptr, int16x8x2_t val, const int lane); -#define vst2q_lane_s16(ptr, val, lane) __builtin_mpl_vector_st2q_lane_i16v8(ptr, val, lane) +uint8x8_t __builtin_mpl_vector_tbx3_v8u8(uint8x8_t a, uint8x8x3_t b, uint8x8_t idx); +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtbx3_u8( + uint8x8_t a, uint8x8x3_t b, uint8x8_t idx) { + return __builtin_mpl_vector_tbx3_v8u8(a, b, idx); +} -void __builtin_mpl_vector_st2_lane_i32v2(int32_t *ptr, int32x2x2_t val, const int lane); -#define vst2_lane_s32(ptr, val, lane) __builtin_mpl_vector_st2_lane_i32v2(ptr, val, lane) +int8x8_t __builtin_mpl_vector_tbx4_v8i8(int8x8_t a, int8x8x4_t b, int8x8_t idx); +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtbx4_s8( + int8x8_t a, int8x8x4_t b, int8x8_t idx) { + return __builtin_mpl_vector_tbx4_v8i8(a, b, idx); +} -void __builtin_mpl_vector_st2q_lane_i32v4(int32_t *ptr, int32x4x2_t val, const int lane); -#define vst2q_lane_s32(ptr, val, lane) __builtin_mpl_vector_st2q_lane_i32v4(ptr, val, lane) +uint8x8_t __builtin_mpl_vector_tbx4_v8u8(uint8x8_t a, uint8x8x4_t b, uint8x8_t idx); +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vtbx4_u8( + uint8x8_t a, uint8x8x4_t b, uint8x8_t idx) { + return __builtin_mpl_vector_tbx4_v8u8(a, b, idx); +} -void __builtin_mpl_vector_st2_lane_u16v4(uint16_t *ptr, uint16x4x2_t val, const int lane); -#define vst2_lane_u16(ptr, val, lane) __builtin_mpl_vector_st2_lane_u16v4(ptr, val, lane) +int8x8_t __builtin_mpl_vector_hadd_v8i8(int8x8_t a, int8x8_t b); +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vhadd_s8( + int8x8_t a, int8x8_t b) { + return __builtin_mpl_vector_hadd_v8i8(a, b); +} -void __builtin_mpl_vector_st2q_lane_u16v8(uint16_t *ptr, uint16x8x2_t val, const int lane); -#define vst2q_lane_u16(ptr, val, lane) __builtin_mpl_vector_st2q_lane_u16v8(ptr, val, lane) +int8x16_t __builtin_mpl_vector_haddq_v16i8(int8x16_t a, int8x16_t b); +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vhaddq_s8( + int8x16_t a, int8x16_t b) { + return __builtin_mpl_vector_haddq_v16i8(a, b); +} -void __builtin_mpl_vector_st2_lane_u32v2(uint32_t *ptr, uint32x2x2_t val, const int lane); -#define vst2_lane_u32(ptr, val, lane) __builtin_mpl_vector_st2_lane_u32v2(ptr, val, lane) +int16x4_t __builtin_mpl_vector_hadd_v4i16(int16x4_t a, int16x4_t b); +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vhadd_s16( + int16x4_t a, int16x4_t b) { + return __builtin_mpl_vector_hadd_v4i16(a, b); +} -void __builtin_mpl_vector_st2q_lane_u32v4(uint32_t *ptr, uint32x4x2_t val, const int lane); -#define vst2q_lane_u32(ptr, val, lane) __builtin_mpl_vector_st2q_lane_u32v4(ptr, val, lane) +int16x8_t __builtin_mpl_vector_haddq_v8i16(int16x8_t a, int16x8_t b); +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vhaddq_s16( + int16x8_t a, int16x8_t b) { + return __builtin_mpl_vector_haddq_v8i16(a, b); +} -void __builtin_mpl_vector_st2q_lane_i8v16(int8_t *ptr, int8x16x2_t val, const int lane); -#define vst2q_lane_s8(ptr, val, lane) __builtin_mpl_vector_st2q_lane_i8v16(ptr, val, lane) +int32x2_t __builtin_mpl_vector_hadd_v2i32(int32x2_t a, int32x2_t b); +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vhadd_s32( + int32x2_t a, int32x2_t b) { + return __builtin_mpl_vector_hadd_v2i32(a, b); +} -void __builtin_mpl_vector_st2q_lane_u8v16(uint8_t *ptr, uint8x16x2_t val, const int lane); -#define vst2q_lane_u8(ptr, val, lane) __builtin_mpl_vector_st2q_lane_u8v16(ptr, val, lane) +int32x4_t __builtin_mpl_vector_haddq_v4i32(int32x4_t a, int32x4_t b); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vhaddq_s32( + int32x4_t a, int32x4_t b) { + return __builtin_mpl_vector_haddq_v4i32(a, b); +} -void __builtin_mpl_vector_st2_lane_i64v1(int64_t *ptr, int64x1x2_t val, const int lane); -#define vst2_lane_s64(ptr, val, lane) __builtin_mpl_vector_st2_lane_i64v1(ptr, val, lane) +uint8x8_t __builtin_mpl_vector_hadd_v8u8(uint8x8_t a, uint8x8_t b); +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vhadd_u8( + uint8x8_t a, uint8x8_t b) { + return __builtin_mpl_vector_hadd_v8u8(a, b); +} -void __builtin_mpl_vector_st2q_lane_i64v2(int64_t *ptr, int64x2x2_t val, const int lane); -#define vst2q_lane_s64(ptr, val, lane) __builtin_mpl_vector_st2q_lane_i64v2(ptr, val, lane) +uint8x16_t __builtin_mpl_vector_haddq_v16u8(uint8x16_t a, uint8x16_t b); +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vhaddq_u8( + uint8x16_t a, uint8x16_t b) { + return __builtin_mpl_vector_haddq_v16u8(a, b); +} -void __builtin_mpl_vector_st2_lane_u64v1(uint64_t *ptr, uint64x1x2_t val, const int lane); -#define vst2_lane_u64(ptr, val, lane) __builtin_mpl_vector_st2_lane_u64v1(ptr, val, lane) +uint16x4_t __builtin_mpl_vector_hadd_v4u16(uint16x4_t a, uint16x4_t b); +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vhadd_u16( + uint16x4_t a, uint16x4_t b) { + return __builtin_mpl_vector_hadd_v4u16(a, b); +} -void __builtin_mpl_vector_st2q_lane_u64v2(uint64_t *ptr, uint64x2x2_t val, const int lane); -#define vst2q_lane_u64(ptr, val, lane) __builtin_mpl_vector_st2q_lane_u64v2(ptr, val, lane) +uint16x8_t __builtin_mpl_vector_haddq_v8u16(uint16x8_t a, uint16x8_t b); +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vhaddq_u16( + uint16x8_t a, uint16x8_t b) { + return __builtin_mpl_vector_haddq_v8u16(a, b); +} -void __builtin_mpl_vector_st3_lane_i16v4(int16_t *ptr, int16x4x3_t val, const int lane); -#define vst3_lane_s16(ptr, val, lane) __builtin_mpl_vector_st3_lane_i16v4(ptr, val, lane) +uint32x2_t __builtin_mpl_vector_hadd_v2u32(uint32x2_t a, uint32x2_t b); +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vhadd_u32( + uint32x2_t a, uint32x2_t b) { + return __builtin_mpl_vector_hadd_v2u32(a, b); +} -void __builtin_mpl_vector_st3q_lane_i16v8(int16_t *ptr, int16x8x3_t val, const int lane); -#define vst3q_lane_s16(ptr, val, lane) __builtin_mpl_vector_st3q_lane_i16v8(ptr, val, lane) +uint32x4_t __builtin_mpl_vector_haddq_v4u32(uint32x4_t a, uint32x4_t b); +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vhaddq_u32( + uint32x4_t a, uint32x4_t b) { + return __builtin_mpl_vector_haddq_v4u32(a, b); +} -void __builtin_mpl_vector_st3_lane_i32v2(int32_t *ptr, int32x2x3_t val, const int lane); -#define vst3_lane_s32(ptr, val, lane) __builtin_mpl_vector_st3_lane_i32v2(ptr, val, lane) +int8x8_t __builtin_mpl_vector_rhadd_v8i8(int8x8_t a, int8x8_t b); +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrhadd_s8( + int8x8_t a, int8x8_t b) { + return __builtin_mpl_vector_rhadd_v8i8(a, b); +} -void __builtin_mpl_vector_st3q_lane_i32v4(int32_t *ptr, int32x4x3_t val, const int lane); -#define vst3q_lane_s32(ptr, val, lane) __builtin_mpl_vector_st3q_lane_i32v4(ptr, val, lane) +int8x16_t __builtin_mpl_vector_rhaddq_v16i8(int8x16_t a, int8x16_t b); +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrhaddq_s8( + int8x16_t a, int8x16_t b) { + return __builtin_mpl_vector_rhaddq_v16i8(a, b); +} -void __builtin_mpl_vector_st3_lane_u16v4(uint16_t *ptr, uint16x4x3_t val, const int lane); -#define vst3_lane_u16(ptr, val, lane) __builtin_mpl_vector_st3_lane_u16v4(ptr, val, lane) +int16x4_t __builtin_mpl_vector_rhadd_v4i16(int16x4_t a, int16x4_t b); +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrhadd_s16( + int16x4_t a, int16x4_t b) { + return __builtin_mpl_vector_rhadd_v4i16(a, b); +} -void __builtin_mpl_vector_st3q_lane_u16v8(uint16_t *ptr, uint16x8x3_t val, const int lane); -#define vst3q_lane_u16(ptr, val, lane) __builtin_mpl_vector_st3q_lane_u16v8(ptr, val, lane) +int16x8_t __builtin_mpl_vector_rhaddq_v8i16(int16x8_t a, int16x8_t b); +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrhaddq_s16( + int16x8_t a, int16x8_t b) { + return __builtin_mpl_vector_rhaddq_v8i16(a, b); +} -void __builtin_mpl_vector_st3_lane_u32v2(uint32_t *ptr, uint32x2x3_t val, const int lane); -#define vst3_lane_u32(ptr, val, lane) __builtin_mpl_vector_st3_lane_u32v2(ptr, val, lane) +int32x2_t __builtin_mpl_vector_rhadd_v2i32(int32x2_t a, int32x2_t b); +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrhadd_s32( + int32x2_t a, int32x2_t b) { + return __builtin_mpl_vector_rhadd_v2i32(a, b); +} -void __builtin_mpl_vector_st3q_lane_u32v4(uint32_t *ptr, uint32x4x3_t val, const int lane); -#define vst3q_lane_u32(ptr, val, lane) __builtin_mpl_vector_st3q_lane_u32v4(ptr, val, lane) +int32x4_t __builtin_mpl_vector_rhaddq_v4i32(int32x4_t a, int32x4_t b); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrhaddq_s32( + int32x4_t a, int32x4_t b) { + return __builtin_mpl_vector_rhaddq_v4i32(a, b); +} -void __builtin_mpl_vector_st3q_lane_i8v16(int8_t *ptr, int8x16x3_t val, const int lane); -#define vst3q_lane_s8(ptr, val, lane) __builtin_mpl_vector_st3q_lane_i8v16(ptr, val, lane) +uint8x8_t __builtin_mpl_vector_rhadd_v8u8(uint8x8_t a, uint8x8_t b); +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrhadd_u8( + uint8x8_t a, uint8x8_t b) { + return __builtin_mpl_vector_rhadd_v8u8(a, b); +} -void __builtin_mpl_vector_st3q_lane_u8v16(uint8_t *ptr, uint8x16x3_t val, const int lane); -#define vst3q_lane_u8(ptr, val, lane) __builtin_mpl_vector_st3q_lane_u8v16(ptr, val, lane) +uint8x16_t __builtin_mpl_vector_rhaddq_v16u8(uint8x16_t a, uint8x16_t b); +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrhaddq_u8( + uint8x16_t a, uint8x16_t b) { + return __builtin_mpl_vector_rhaddq_v16u8(a, b); +} -void __builtin_mpl_vector_st3_lane_i64v1(int64_t *ptr, int64x1x3_t val, const int lane); -#define vst3_lane_s64(ptr, val, lane) __builtin_mpl_vector_st3_lane_i64v1(ptr, val, lane) +uint16x4_t __builtin_mpl_vector_rhadd_v4u16(uint16x4_t a, uint16x4_t b); +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrhadd_u16( + uint16x4_t a, uint16x4_t b) { + return __builtin_mpl_vector_rhadd_v4u16(a, b); +} -void __builtin_mpl_vector_st3q_lane_i64v2(int64_t *ptr, int64x2x3_t val, const int lane); -#define vst3q_lane_s64(ptr, val, lane) __builtin_mpl_vector_st3q_lane_i64v2(ptr, val, lane) +uint16x8_t __builtin_mpl_vector_rhaddq_v8u16(uint16x8_t a, uint16x8_t b); +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrhaddq_u16( + uint16x8_t a, uint16x8_t b) { + return __builtin_mpl_vector_rhaddq_v8u16(a, b); +} -void __builtin_mpl_vector_st3_lane_u64v1(uint64_t *ptr, uint64x1x3_t val, const int lane); -#define vst3_lane_u64(ptr, val, lane) __builtin_mpl_vector_st3_lane_u64v1(ptr, val, lane) +uint32x2_t __builtin_mpl_vector_rhadd_v2u32(uint32x2_t a, uint32x2_t b); +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrhadd_u32( + uint32x2_t a, uint32x2_t b) { + return __builtin_mpl_vector_rhadd_v2u32(a, b); +} -void __builtin_mpl_vector_st3q_lane_u64v2(uint64_t *ptr, uint64x2x3_t val, const int lane); -#define vst3q_lane_u64(ptr, val, lane) __builtin_mpl_vector_st3q_lane_u64v2(ptr, val, lane) +uint32x4_t __builtin_mpl_vector_rhaddq_v4u32(uint32x4_t a, uint32x4_t b); +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrhaddq_u32( + uint32x4_t a, uint32x4_t b) { + return __builtin_mpl_vector_rhaddq_v4u32(a, b); +} -void __builtin_mpl_vector_st4_lane_i16v4(int16_t *ptr, int16x4x4_t val, const int lane); -#define vst4_lane_s16(ptr, val, lane) __builtin_mpl_vector_st4_lane_i16v4(ptr, val, lane) +int8x8_t __builtin_mpl_vector_addhn_v8i8(int16x8_t a, int16x8_t b); +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddhn_s16( + int16x8_t a, int16x8_t b) { + return __builtin_mpl_vector_addhn_v8i8(a, b); +} -void __builtin_mpl_vector_st4q_lane_i16v8(int16_t *ptr, int16x8x4_t val, const int lane); -#define vst4q_lane_s16(ptr, val, lane) __builtin_mpl_vector_st4q_lane_i16v8(ptr, val, lane) +int16x4_t __builtin_mpl_vector_addhn_v4i16(int32x4_t a, int32x4_t b); +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddhn_s32( + int32x4_t a, int32x4_t b) { + return __builtin_mpl_vector_addhn_v4i16(a, b); +} -void __builtin_mpl_vector_st4_lane_i32v2(int32_t *ptr, int32x2x4_t val, const int lane); -#define vst4_lane_s32(ptr, val, lane) __builtin_mpl_vector_st4_lane_i32v2(ptr, val, lane) +int32x2_t __builtin_mpl_vector_addhn_v2i32(int64x2_t a, int64x2_t b); +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddhn_s64( + int64x2_t a, int64x2_t b) { + return __builtin_mpl_vector_addhn_v2i32(a, b); +} -void __builtin_mpl_vector_st4q_lane_i32v4(int32_t *ptr, int32x4x4_t val, const int lane); -#define vst4q_lane_s32(ptr, val, lane) __builtin_mpl_vector_st4q_lane_i32v4(ptr, val, lane) +uint8x8_t __builtin_mpl_vector_addhn_v8u8(uint16x8_t a, uint16x8_t b); +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddhn_u16( + uint16x8_t a, uint16x8_t b) { + return __builtin_mpl_vector_addhn_v8u8(a, b); +} -void __builtin_mpl_vector_st4_lane_u16v4(uint16_t *ptr, uint16x4x4_t val, const int lane); -#define vst4_lane_u16(ptr, val, lane) __builtin_mpl_vector_st4_lane_u16v4(ptr, val, lane) +uint16x4_t __builtin_mpl_vector_addhn_v4u16(uint32x4_t a, uint32x4_t b); +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddhn_u32( + uint32x4_t a, uint32x4_t b) { + return __builtin_mpl_vector_addhn_v4u16(a, b); +} -void __builtin_mpl_vector_st4q_lane_u16v8(uint16_t *ptr, uint16x8x4_t val, const int lane); -#define vst4q_lane_u16(ptr, val, lane) __builtin_mpl_vector_st4q_lane_u16v8(ptr, val, lane) +uint32x2_t __builtin_mpl_vector_addhn_v2u32(uint64x2_t a, uint64x2_t b); +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddhn_u64( + uint64x2_t a, uint64x2_t b) { + return __builtin_mpl_vector_addhn_v2u32(a, b); +} -void __builtin_mpl_vector_st4_lane_u32v2(uint32_t *ptr, uint32x2x4_t val, const int lane); -#define vst4_lane_u32(ptr, val, lane) __builtin_mpl_vector_st4_lane_u32v2(ptr, val, lane) +int8x16_t __builtin_mpl_vector_addhn_high_v16i8(int8x8_t r, int16x8_t a, int16x8_t b); +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddhn_high_s16( + int8x8_t r, int16x8_t a, int16x8_t b) { + return __builtin_mpl_vector_addhn_high_v16i8(r, a, b); +} -void __builtin_mpl_vector_st4q_lane_u32v4(uint32_t *ptr, uint32x4x4_t val, const int lane); -#define vst4q_lane_u32(ptr, val, lane) __builtin_mpl_vector_st4q_lane_u32v4(ptr, val, lane) +int16x8_t __builtin_mpl_vector_addhn_high_v8i16(int16x4_t r, int32x4_t a, int32x4_t b); +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddhn_high_s32( + int16x4_t r, int32x4_t a, int32x4_t b) { + return __builtin_mpl_vector_addhn_high_v8i16(r, a, b); +} -void __builtin_mpl_vector_st4q_lane_i8v16(int8_t *ptr, int8x16x4_t val, const int lane); -#define vst4q_lane_s8(ptr, val, lane) __builtin_mpl_vector_st4q_lane_i8v16(ptr, val, lane) +int32x4_t __builtin_mpl_vector_addhn_high_v4i32(int32x2_t r, int64x2_t a, int64x2_t b); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddhn_high_s64( + int32x2_t r, int64x2_t a, int64x2_t b) { + return __builtin_mpl_vector_addhn_high_v4i32(r, a, b); +} -void __builtin_mpl_vector_st4q_lane_u8v16(uint8_t *ptr, uint8x16x4_t val, const int lane); -#define vst4q_lane_u8(ptr, val, lane) __builtin_mpl_vector_st4q_lane_u8v16(ptr, val, lane) +uint8x16_t __builtin_mpl_vector_addhn_high_v16u8(uint8x8_t r, uint16x8_t a, uint16x8_t b); +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddhn_high_u16( + uint8x8_t r, uint16x8_t a, uint16x8_t b) { + return __builtin_mpl_vector_addhn_high_v16u8(r, a, b); +} -void __builtin_mpl_vector_st4_lane_i64v1(int64_t *ptr, int64x1x4_t val, const int lane); -#define vst4_lane_s64(ptr, val, lane) __builtin_mpl_vector_st4_lane_i64v1(ptr, val, lane) +uint16x8_t __builtin_mpl_vector_addhn_high_v8u16(uint16x4_t r, uint32x4_t a, uint32x4_t b); +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddhn_high_u32( + uint16x4_t r, uint32x4_t a, uint32x4_t b) { + return __builtin_mpl_vector_addhn_high_v8u16(r, a, b); +} -void __builtin_mpl_vector_st4q_lane_i64v2(int64_t *ptr, int64x2x4_t val, const int lane); -#define vst4q_lane_s64(ptr, val, lane) __builtin_mpl_vector_st4q_lane_i64v2(ptr, val, lane) +uint32x4_t __builtin_mpl_vector_addhn_high_v4u32(uint32x2_t r, uint64x2_t a, uint64x2_t b); +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddhn_high_u64( + uint32x2_t r, uint64x2_t a, uint64x2_t b) { + return __builtin_mpl_vector_addhn_high_v4u32(r, a, b); +} -void __builtin_mpl_vector_st4_lane_u64v1(uint64_t *ptr, uint64x1x4_t val, const int lane); -#define vst4_lane_u64(ptr, val, lane) __builtin_mpl_vector_st4_lane_u64v1(ptr, val, lane) +int8x8_t __builtin_mpl_vector_raddhn_v8i8(int16x8_t a, int16x8_t b); +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vraddhn_s16( + int16x8_t a, int16x8_t b) { + return __builtin_mpl_vector_raddhn_v8i8(a, b); +} -void __builtin_mpl_vector_st4q_lane_u64v2(uint64_t *ptr, uint64x2x4_t val, const int lane); -#define vst4q_lane_u64(ptr, val, lane) __builtin_mpl_vector_st4q_lane_u64v2(ptr, val, lane) +int16x4_t __builtin_mpl_vector_raddhn_v4i16(int32x4_t a, int32x4_t b); +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vraddhn_s32( + int32x4_t a, int32x4_t b) { + return __builtin_mpl_vector_raddhn_v4i16(a, b); +} -int8x8_t __builtin_mpl_vector_tbl1_i8v8(int8x16_t a, int8x8_t idx); -static inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__)) -vtbl1_s8(int8x8_t a, int8x8_t idx) { - return __builtin_mpl_vector_tbl1_i8v8(vcombine_s8(a, (int8x8_t){0}), idx); +int32x2_t __builtin_mpl_vector_raddhn_v2i32(int64x2_t a, int64x2_t b); +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vraddhn_s64( + int64x2_t a, int64x2_t b) { + return __builtin_mpl_vector_raddhn_v2i32(a, b); } -uint8x8_t __builtin_mpl_vector_tbl1_u8v8(uint16x8_t a, uint8x8_t idx); -static inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__)) -vtbl1_u8(uint8x8_t a, uint8x8_t idx) { - return __builtin_mpl_vector_tbl1_i8v8(vcombine_s8(a, (uint8x8_t){0}), idx); +uint8x8_t __builtin_mpl_vector_raddhn_v8u8(uint16x8_t a, uint16x8_t b); +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vraddhn_u16( + uint16x8_t a, uint16x8_t b) { + return __builtin_mpl_vector_raddhn_v8u8(a, b); } -int8x8_t __builtin_mpl_vector_qtbl1_i8v8(int8x16_t t, uint8x8_t idx); -#define vqtbl1_s8(t, idx) __builtin_mpl_vector_qtbl1_i8v8(t, idx) +uint16x4_t __builtin_mpl_vector_raddhn_v4u16(uint32x4_t a, uint32x4_t b); +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vraddhn_u32( + uint32x4_t a, uint32x4_t b) { + return __builtin_mpl_vector_raddhn_v4u16(a, b); +} -int8x16_t __builtin_mpl_vector_qtbl1q_i8v16(int8x16_t t, uint8x16_t idx); -#define vqtbl1q_s8(t, idx) __builtin_mpl_vector_qtbl1q_i8v16(t, idx) +uint32x2_t __builtin_mpl_vector_raddhn_v2u32(uint64x2_t a, uint64x2_t b); +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vraddhn_u64( + uint64x2_t a, uint64x2_t b) { + return __builtin_mpl_vector_raddhn_v2u32(a, b); +} -uint8x8_t __builtin_mpl_vector_qtbl1_u8v8(uint8x16_t t, uint8x8_t idx); -#define vqtbl1_u8(t, idx) __builtin_mpl_vector_qtbl1_u8v8(t, idx) +int8x16_t __builtin_mpl_vector_raddhn_high_v16i8(int8x8_t r, int16x8_t a, int16x8_t b); +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vraddhn_high_s16( + int8x8_t r, int16x8_t a, int16x8_t b) { + return __builtin_mpl_vector_raddhn_high_v16i8(r, a, b); +} -uint8x16_t __builtin_mpl_vector_qtbl1q_u8v16(uint8x16_t t, uint8x16_t idx); -#define vqtbl1q_u8(t, idx) __builtin_mpl_vector_qtbl1q_u8v16(t, idx) +int16x8_t __builtin_mpl_vector_raddhn_high_v8i16(int16x4_t r, int32x4_t a, int32x4_t b); +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vraddhn_high_s32( + int16x4_t r, int32x4_t a, int32x4_t b) { + return __builtin_mpl_vector_raddhn_high_v8i16(r, a, b); +} -static inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__)) -vtbl2_s8(int8x8x2_t a, int8x8_t idx) { - return vqtbl1_s8(vcombine_s8(a.val[0], a.val[1]), idx); +int32x4_t __builtin_mpl_vector_raddhn_high_v4i32(int32x2_t r, int64x2_t a, int64x2_t b); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vraddhn_high_s64( + int32x2_t r, int64x2_t a, int64x2_t b) { + return __builtin_mpl_vector_raddhn_high_v4i32(r, a, b); } -static inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__)) -vtbl2_u8(uint8x8x2_t a, uint8x8_t idx) { - return vqtbl1_u8(vcombine_u8(a.val[0], a.val[1]), idx); +uint8x16_t __builtin_mpl_vector_raddhn_high_v16u8(uint8x8_t r, uint16x8_t a, uint16x8_t b); +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vraddhn_high_u16( + uint8x8_t r, uint16x8_t a, uint16x8_t b) { + return __builtin_mpl_vector_raddhn_high_v16u8(r, a, b); } -int8x8_t __builtin_mpl_vector_tbl3_i8v8(int8x8x3_t a, int8x8_t idx); -#define vtbl3_s8(a, idx) __builtin_mpl_vector_tbl3_i8v8(a, idx) +uint16x8_t __builtin_mpl_vector_raddhn_high_v8u16(uint16x4_t r, uint32x4_t a, uint32x4_t b); +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vraddhn_high_u32( + uint16x4_t r, uint32x4_t a, uint32x4_t b) { + return __builtin_mpl_vector_raddhn_high_v8u16(r, a, b); +} -uint8x8_t __builtin_mpl_vector_tbl3_u8v8(uint8x8x3_t a, uint8x8_t idx); -#define vtbl3_u8(a, idx) __builtin_mpl_vector_tbl3_u8v8(a, idx) +uint32x4_t __builtin_mpl_vector_raddhn_high_v4u32(uint32x2_t r, uint64x2_t a, uint64x2_t b); +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vraddhn_high_u64( + uint32x2_t r, uint64x2_t a, uint64x2_t b) { + return __builtin_mpl_vector_raddhn_high_v4u32(r, a, b); +} -int8x8_t __builtin_mpl_vector_tbl4_i8v8(int8x8x4_t a, int8x8_t idx); -#define vtbl4_s8(a, idx) __builtin_mpl_vector_tbl4_i8v8(a, idx) +int8x8_t __builtin_mpl_vector_qadd_v8i8(int8x8_t a, int8x8_t b); +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqadd_s8( + int8x8_t a, int8x8_t b) { + return __builtin_mpl_vector_qadd_v8i8(a, b); +} -uint8x8_t __builtin_mpl_vector_tbl4_u8v8(uint8x8x4_t a, uint8x8_t idx); -#define vtbl4_u8(a, idx) __builtin_mpl_vector_tbl4_u8v8(a, idx) +int8x16_t __builtin_mpl_vector_qaddq_v16i8(int8x16_t a, int8x16_t b); +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqaddq_s8( + int8x16_t a, int8x16_t b) { + return __builtin_mpl_vector_qaddq_v16i8(a, b); +} -int8x8_t __builtin_mpl_vector_qtbl2_i8v8(int8x16x2_t t, uint8x8_t idx); -#define vqtbl2_s8(t, idx) __builtin_mpl_vector_qtbl2_i8v8(t, idx) +int16x4_t __builtin_mpl_vector_qadd_v4i16(int16x4_t a, int16x4_t b); +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqadd_s16( + int16x4_t a, int16x4_t b) { + return __builtin_mpl_vector_qadd_v4i16(a, b); +} -int8x16_t __builtin_mpl_vector_qtbl2q_i8v16(int8x16x2_t t, uint8x16_t idx); -#define vqtbl2q_s8(t, idx) __builtin_mpl_vector_qtbl2q_i8v16(t, idx) +int16x8_t __builtin_mpl_vector_qaddq_v8i16(int16x8_t a, int16x8_t b); +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqaddq_s16( + int16x8_t a, int16x8_t b) { + return __builtin_mpl_vector_qaddq_v8i16(a, b); +} -uint8x8_t __builtin_mpl_vector_qtbl2_u8v8(uint8x16x2_t t, uint8x8_t idx); -#define vqtbl2_u8(t, idx) __builtin_mpl_vector_qtbl2_u8v8(t, idx) +int32x2_t __builtin_mpl_vector_qadd_v2i32(int32x2_t a, int32x2_t b); +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqadd_s32( + int32x2_t a, int32x2_t b) { + return __builtin_mpl_vector_qadd_v2i32(a, b); +} -uint8x16_t __builtin_mpl_vector_qtbl2q_u8v16(uint8x16x2_t t, uint8x16_t idx); -#define vqtbl2q_u8(t, idx) __builtin_mpl_vector_qtbl2q_u8v16(t, idx) +int32x4_t __builtin_mpl_vector_qaddq_v4i32(int32x4_t a, int32x4_t b); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqaddq_s32( + int32x4_t a, int32x4_t b) { + return __builtin_mpl_vector_qaddq_v4i32(a, b); +} -int8x8_t __builtin_mpl_vector_qtbl3_i8v8(int8x16x3_t t, uint8x8_t idx); -#define vqtbl3_s8(t, idx) __builtin_mpl_vector_qtbl3_i8v8(t, idx) +int64x1_t __builtin_mpl_vector_qadd_v1i64(int64x1_t a, int64x1_t b); +extern inline int64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqadd_s64( + int64x1_t a, int64x1_t b) { + return __builtin_mpl_vector_qadd_v1i64(a, b); +} -int8x16_t __builtin_mpl_vector_qtbl3q_i8v16(int8x16x3_t t, uint8x16_t idx); -#define vqtbl3q_s8(t, idx) __builtin_mpl_vector_qtbl3q_i8v16(t, idx) +int64x2_t __builtin_mpl_vector_qaddq_v2i64(int64x2_t a, int64x2_t b); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqaddq_s64( + int64x2_t a, int64x2_t b) { + return __builtin_mpl_vector_qaddq_v2i64(a, b); +} -uint8x8_t __builtin_mpl_vector_qtbl3_u8v8(uint8x16x3_t t, uint8x8_t idx); -#define vqtbl3_u8(t, idx) __builtin_mpl_vector_qtbl3_u8v8(t, idx) +uint8x8_t __builtin_mpl_vector_qadd_v8u8(uint8x8_t a, uint8x8_t b); +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqadd_u8( + uint8x8_t a, uint8x8_t b) { + return __builtin_mpl_vector_qadd_v8u8(a, b); +} -uint8x16_t __builtin_mpl_vector_qtbl3q_u8v16(uint8x16x3_t t, uint8x16_t idx); -#define vqtbl3q_u8(t, idx) __builtin_mpl_vector_qtbl3q_u8v16(t, idx) +uint8x16_t __builtin_mpl_vector_qaddq_v16u8(uint8x16_t a, uint8x16_t b); +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqaddq_u8( + uint8x16_t a, uint8x16_t b) { + return __builtin_mpl_vector_qaddq_v16u8(a, b); +} -int8x8_t __builtin_mpl_vector_qtbl4_i8v8(int8x16x4_t t, uint8x8_t idx); -#define vqtbl4_s8(t, idx) __builtin_mpl_vector_qtbl4_i8v8(t, idx) +uint16x4_t __builtin_mpl_vector_qadd_v4u16(uint16x4_t a, uint16x4_t b); +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqadd_u16( + uint16x4_t a, uint16x4_t b) { + return __builtin_mpl_vector_qadd_v4u16(a, b); +} -int8x16_t __builtin_mpl_vector_qtbl4q_i8v16(int8x16x4_t t, uint8x16_t idx); -#define vqtbl4q_s8(t, idx) __builtin_mpl_vector_qtbl4q_i8v16(t, idx) +uint16x8_t __builtin_mpl_vector_qaddq_v8u16(uint16x8_t a, uint16x8_t b); +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqaddq_u16( + uint16x8_t a, uint16x8_t b) { + return __builtin_mpl_vector_qaddq_v8u16(a, b); +} -uint8x8_t __builtin_mpl_vector_qtbl4_u8v8(uint8x16x4_t t, uint8x8_t idx); -#define vqtbl4_u8(t, idx) __builtin_mpl_vector_qtbl4_u8v8(t, idx) +uint32x2_t __builtin_mpl_vector_qadd_v2u32(uint32x2_t a, uint32x2_t b); +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqadd_u32( + uint32x2_t a, uint32x2_t b) { + return __builtin_mpl_vector_qadd_v2u32(a, b); +} -uint8x16_t __builtin_mpl_vector_qtbl4q_u8v16(uint8x16x4_t t, uint8x16_t idx); -#define vqtbl4q_u8(t, idx) __builtin_mpl_vector_qtbl4q_u8v16(t, idx) +uint32x4_t __builtin_mpl_vector_qaddq_v4u32(uint32x4_t a, uint32x4_t b); +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqaddq_u32( + uint32x4_t a, uint32x4_t b) { + return __builtin_mpl_vector_qaddq_v4u32(a, b); +} -static inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__)) -vtbx1_s8(int8x8_t a, int8x8_t b, int8x8_t idx) { - uint8x8_t mask = vclt_u8((uint8x8_t)(idx), vmov_n_u8(8)); - int8x8_t tbl = vtbl1_s8(b, idx); - return vbsl_s8(mask, tbl, a); +uint64x1_t __builtin_mpl_vector_qadd_v1u64(uint64x1_t a, uint64x1_t b); +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqadd_u64( + uint64x1_t a, uint64x1_t b) { + return __builtin_mpl_vector_qadd_v1u64(a, b); } -static inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__)) -vtbx1_u8(uint8x8_t a, uint8x8_t b, uint8x8_t idx) { - uint8x8_t mask = vclt_u8(idx, vmov_n_u8(8)); - uint8x8_t tbl = vtbl1_u8(b, idx); - return vbsl_u8(mask, tbl, a); +uint64x2_t __builtin_mpl_vector_qaddq_v2u64(uint64x2_t a, uint64x2_t b); +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqaddq_u64( + uint64x2_t a, uint64x2_t b) { + return __builtin_mpl_vector_qaddq_v2u64(a, b); } -int8x8_t __builtin_mpl_vector_qtbx1_i8v8(int8x8_t a, int8x16_t t, uint8x8_t idx); -#define vqtbx1_s8(a, t, idx) __builtin_mpl_vector_qtbx1_i8v8(a, t, idx) +extern inline int8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqaddb_s8( + int8_t a, int8_t b) { + return vget_lane_s8(vqadd_s8((int8x8_t){a}, (int8x8_t){b}), 0); +} -int8x16_t __builtin_mpl_vector_qtbx1q_i8v16(int8x16_t a, int8x16_t t, uint8x16_t idx); -#define vqtbx1q_s8(a, t, idx) __builtin_mpl_vector_qtbx1q_i8v16(a, t, idx) +extern inline int16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqaddh_s16( + int16_t a, int16_t b) { + return vget_lane_s16(vqadd_s16((int16x4_t){a}, (int16x4_t){b}), 0); +} -uint8x8_t __builtin_mpl_vector_qtbx1_u8v8(uint8x8_t a, uint8x16_t t, uint8x8_t idx); -#define vqtbx1_u8(a, t, idx) __builtin_mpl_vector_qtbx1_u8v8(a, t, idx) +extern inline int32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqadds_s32( + int32_t a, int32_t b) { + return vget_lane_s32(vqadd_s32((int32x2_t){a}, (int32x2_t){b}), 0); +} -uint8x16_t __builtin_mpl_vector_qtbx1q_u8v16(uint8x16_t a, uint8x16_t t, uint8x16_t idx); -#define vqtbx1q_u8(a, t, idx) __builtin_mpl_vector_qtbx1q_u8v16(a, t, idx) +extern inline int64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqaddd_s64( + int64_t a, int64_t b) { + return vget_lane_s64(vqadd_s64((int64x1_t){a}, (int64x1_t){b}), 0); +} -static inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__)) -vtbx2_s8(int8x8_t a, int8x8x2_t b, int8x8_t idx) { - return vqtbx1_s8(a, vcombine_s8(b.val[0], b.val[1]), idx); +extern inline uint8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqaddb_u8( + uint8_t a, uint8_t b) { + return vget_lane_u8(vqadd_u8((uint8x8_t){a}, (uint8x8_t){b}), 0); } -static inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__)) -vtbx2_u8(uint8x8_t a, uint8x8x2_t b, uint8x8_t idx) { - return vqtbx1_u8(a, vcombine_u8(b.val[0], b.val[1]), idx); +extern inline uint16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqaddh_u16( + uint16_t a, uint16_t b) { + return vget_lane_u16(vqadd_u16((uint16x4_t){a}, (uint16x4_t){b}), 0); } -int8x8_t __builtin_mpl_vector_tbx3_i8v8(int8x8_t a, int8x8x3_t b, int8x8_t idx); -#define vtbx3_s8(a, b, idx) __builtin_mpl_vector_tbx3_i8v8(a, b, idx) +extern inline uint32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqadds_u32( + uint32_t a, uint32_t b) { + return vget_lane_u32(vqadd_u32((uint32x2_t){a}, (uint32x2_t){b}), 0); +} -uint8x8_t __builtin_mpl_vector_tbx3_u8v8(uint8x8_t a, uint8x8x3_t b, uint8x8_t idx); -#define vtbx3_u8(a, b, idx) __builtin_mpl_vector_tbx3_u8v8(a, b, idx) +extern inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqaddd_u64( + uint64_t a, uint64_t b) { + return vget_lane_u64(vqadd_u64((uint64x1_t){a}, (uint64x1_t){b}), 0); +} -int8x8_t __builtin_mpl_vector_tbx4_i8v8(int8x8_t a, int8x8x4_t b, int8x8_t idx); -#define vtbx4_s8(a, b, idx) __builtin_mpl_vector_tbx4_i8v8(a, b, idx) +int8x8_t __builtin_mpl_vector_uqadd_v8i8(int8x8_t a, uint8x8_t b); +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vuqadd_s8( + int8x8_t a, uint8x8_t b) { + return __builtin_mpl_vector_uqadd_v8i8(a, b); +} -uint8x8_t __builtin_mpl_vector_tbx4_u8v8(uint8x8_t a, uint8x8x4_t b, uint8x8_t idx); -#define vtbx4_u8(a, b, idx) __builtin_mpl_vector_tbx4_u8v8(a, b, idx) +int8x16_t __builtin_mpl_vector_uqaddq_v16i8(int8x16_t a, uint8x16_t b); +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vuqaddq_s8( + int8x16_t a, uint8x16_t b) { + return __builtin_mpl_vector_uqaddq_v16i8(a, b); +} -int8x8_t __builtin_mpl_vector_qtbx2_i8v8(int8x8_t a, int8x16x2_t t, uint8x8_t idx); -#define vqtbx2_s8(a, t, idx) __builtin_mpl_vector_qtbx2_i8v8(a, t, idx) +int16x4_t __builtin_mpl_vector_uqadd_v4i16(int16x4_t a, uint16x4_t b); +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vuqadd_s16( + int16x4_t a, uint16x4_t b) { + return __builtin_mpl_vector_uqadd_v4i16(a, b); +} -int8x16_t __builtin_mpl_vector_qtbx2q_i8v16(int8x16_t a, int8x16x2_t t, uint8x16_t idx); -#define vqtbx2q_s8(a, t, idx) __builtin_mpl_vector_qtbx2q_i8v16(a, t, idx) +int16x8_t __builtin_mpl_vector_uqaddq_v8i16(int16x8_t a, uint16x8_t b); +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vuqaddq_s16( + int16x8_t a, uint16x8_t b) { + return __builtin_mpl_vector_uqaddq_v8i16(a, b); +} -uint8x8_t __builtin_mpl_vector_qtbx2_u8v8(uint8x8_t a, uint8x16x2_t t, uint8x8_t idx); -#define vqtbx2_u8(a, t, idx) __builtin_mpl_vector_qtbx2_u8v8(a, t, idx) +int32x2_t __builtin_mpl_vector_uqadd_v2i32(int32x2_t a, uint32x2_t b); +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vuqadd_s32( + int32x2_t a, uint32x2_t b) { + return __builtin_mpl_vector_uqadd_v2i32(a, b); +} -uint8x16_t __builtin_mpl_vector_qtbx2q_u8v16(uint8x16_t a, uint8x16x2_t t, uint8x16_t idx); -#define vqtbx2q_u8(a, t, idx) __builtin_mpl_vector_qtbx2q_u8v16(a, t, idx) +int32x4_t __builtin_mpl_vector_uqaddq_v4i32(int32x4_t a, uint32x4_t b); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vuqaddq_s32( + int32x4_t a, uint32x4_t b) { + return __builtin_mpl_vector_uqaddq_v4i32(a, b); +} -int8x8_t __builtin_mpl_vector_qtbx3_i8v8(int8x8_t a, int8x16x3_t t, uint8x8_t idx); -#define vqtbx3_s8(a, t, idx) __builtin_mpl_vector_qtbx3_i8v8(a, t, idx) +int64x1_t __builtin_mpl_vector_uqadd_v1i64(int64x1_t a, uint64x1_t b); +extern inline int64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vuqadd_s64( + int64x1_t a, uint64x1_t b) { + return __builtin_mpl_vector_uqadd_v1i64(a, b); +} -int8x16_t __builtin_mpl_vector_qtbx3q_i8v16(int8x16_t a, int8x16x3_t t, uint8x16_t idx); -#define vqtbx3q_s8(a, t, idx) __builtin_mpl_vector_qtbx3q_i8v16(a, t, idx) +int64x2_t __builtin_mpl_vector_uqaddq_v2i64(int64x2_t a, uint64x2_t b); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vuqaddq_s64( + int64x2_t a, uint64x2_t b) { + return __builtin_mpl_vector_uqaddq_v2i64(a, b); +} -uint8x8_t __builtin_mpl_vector_qtbx3_u8v8(uint8x8_t a, uint8x16x3_t t, uint8x8_t idx); -#define vqtbx3_u8(a, t, idx) __builtin_mpl_vector_qtbx3_u8v8(a, t, idx) +extern inline int8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vuqaddb_s8( + int8_t a, int8_t b) { + return vget_lane_s8(vuqadd_s8((int8x8_t){a}, (int8x8_t){b}), 0); +} -uint8x16_t __builtin_mpl_vector_qtbx3q_u8v16(uint8x16_t a, uint8x16x3_t t, uint8x16_t idx); -#define vqtbx3q_u8(a, t, idx) __builtin_mpl_vector_qtbx3q_u8v16(a, t, idx) +extern inline int16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vuqaddh_s16( + int16_t a, int16_t b) { + return vget_lane_s16(vuqadd_s16((int16x4_t){a}, (int16x4_t){b}), 0); +} -int8x8_t __builtin_mpl_vector_qtbx4_i8v8(int8x8_t a, int8x16x4_t t, uint8x8_t idx); -#define vqtbx4_s8(a, t, idx) __builtin_mpl_vector_qtbx4_i8v8(a, t, idx) +extern inline int32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vuqadds_s32( + int32_t a, int32_t b) { + return vget_lane_s32(vuqadd_s32((int32x2_t){a}, (int32x2_t){b}), 0); +} -int8x16_t __builtin_mpl_vector_qtbx4q_i8v16(int8x16_t a, int8x16x4_t t, uint8x16_t idx); -#define vqtbx4q_s8(a, t, idx) __builtin_mpl_vector_qtbx4q_i8v16(a, t, idx) +extern inline int64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vuqaddd_s64( + int64_t a, int64_t b) { + return vget_lane_s64(vuqadd_s64((int64x1_t){a}, (int64x1_t){b}), 0); +} -uint8x8_t __builtin_mpl_vector_qtbx4_u8v8(uint8x8_t a, uint8x16x4_t t, uint8x8_t idx); -#define vqtbx4_u8(a, t, idx) __builtin_mpl_vector_qtbx4_u8v8(a, t, idx) +uint8x8_t __builtin_mpl_vector_sqadd_v8u8(uint8x8_t a, int8x8_t b); +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsqadd_u8( + uint8x8_t a, int8x8_t b) { + return __builtin_mpl_vector_sqadd_v8u8(a, b); +} -uint8x16_t __builtin_mpl_vector_qtbx4q_u8v16(uint8x16_t a, uint8x16x4_t t, uint8x16_t idx); -#define vqtbx4q_u8(a, t, idx) __builtin_mpl_vector_qtbx4q_u8v16(a, t, idx) +uint8x16_t __builtin_mpl_vector_sqaddq_v16u8(uint8x16_t a, int8x16_t b); +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsqaddq_u8( + uint8x16_t a, int8x16_t b) { + return __builtin_mpl_vector_sqaddq_v16u8(a, b); +} -int8x8_t __builtin_mpl_vector_hadd_i8v8(int8x8_t a, int8x8_t b); -#define vhadd_s8(a, b) __builtin_mpl_vector_hadd_i8v8(a, b) +uint16x4_t __builtin_mpl_vector_sqadd_v4u16(uint16x4_t a, int16x4_t b); +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsqadd_u16( + uint16x4_t a, int16x4_t b) { + return __builtin_mpl_vector_sqadd_v4u16(a, b); +} -int8x16_t __builtin_mpl_vector_haddq_i8v16(int8x16_t a, int8x16_t b); -#define vhaddq_s8(a, b) __builtin_mpl_vector_haddq_i8v16(a, b) +uint16x8_t __builtin_mpl_vector_sqaddq_v8u16(uint16x8_t a, int16x8_t b); +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsqaddq_u16( + uint16x8_t a, int16x8_t b) { + return __builtin_mpl_vector_sqaddq_v8u16(a, b); +} -int16x4_t __builtin_mpl_vector_hadd_i16v4(int16x4_t a, int16x4_t b); -#define vhadd_s16(a, b) __builtin_mpl_vector_hadd_i16v4(a, b) +uint32x2_t __builtin_mpl_vector_sqadd_v2u32(uint32x2_t a, int32x2_t b); +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsqadd_u32( + uint32x2_t a, int32x2_t b) { + return __builtin_mpl_vector_sqadd_v2u32(a, b); +} -int16x8_t __builtin_mpl_vector_haddq_i16v8(int16x8_t a, int16x8_t b); -#define vhaddq_s16(a, b) __builtin_mpl_vector_haddq_i16v8(a, b) +uint32x4_t __builtin_mpl_vector_sqaddq_v4u32(uint32x4_t a, int32x4_t b); +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsqaddq_u32( + uint32x4_t a, int32x4_t b) { + return __builtin_mpl_vector_sqaddq_v4u32(a, b); +} -int32x2_t __builtin_mpl_vector_hadd_i32v2(int32x2_t a, int32x2_t b); -#define vhadd_s32(a, b) __builtin_mpl_vector_hadd_i32v2(a, b) +uint64x1_t __builtin_mpl_vector_sqadd_v1u64(uint64x1_t a, int64x1_t b); +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsqadd_u64( + uint64x1_t a, int64x1_t b) { + return __builtin_mpl_vector_sqadd_v1u64(a, b); +} -int32x4_t __builtin_mpl_vector_haddq_i32v4(int32x4_t a, int32x4_t b); -#define vhaddq_s32(a, b) __builtin_mpl_vector_haddq_i32v4(a, b) +uint64x2_t __builtin_mpl_vector_sqaddq_v2u64(uint64x2_t a, int64x2_t b); +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsqaddq_u64( + uint64x2_t a, int64x2_t b) { + return __builtin_mpl_vector_sqaddq_v2u64(a, b); +} -uint8x8_t __builtin_mpl_vector_hadd_u8v8(uint8x8_t a, uint8x8_t b); -#define vhadd_u8(a, b) __builtin_mpl_vector_hadd_u8v8(a, b) +extern inline uint8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsqaddb_u8( + uint8_t a, uint8_t b) { + return vget_lane_u8(vsqadd_u8((uint8x8_t){a}, (uint8x8_t){b}), 0); +} -uint8x16_t __builtin_mpl_vector_haddq_u8v16(uint8x16_t a, uint8x16_t b); -#define vhaddq_u8(a, b) __builtin_mpl_vector_haddq_u8v16(a, b) +extern inline uint16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsqaddh_u16( + uint16_t a, uint16_t b) { + return vget_lane_u16(vsqadd_u16((uint16x4_t){a}, (uint16x4_t){b}), 0); +} -uint16x4_t __builtin_mpl_vector_hadd_u16v4(uint16x4_t a, uint16x4_t b); -#define vhadd_u16(a, b) __builtin_mpl_vector_hadd_u16v4(a, b) +extern inline uint32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsqadds_u32( + uint32_t a, uint32_t b) { + return vget_lane_u32(vsqadd_u32((uint32x2_t){a}, (uint32x2_t){b}), 0); +} -uint16x8_t __builtin_mpl_vector_haddq_u16v8(uint16x8_t a, uint16x8_t b); -#define vhaddq_u16(a, b) __builtin_mpl_vector_haddq_u16v8(a, b) +extern inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsqaddd_u64( + uint64_t a, uint64_t b) { + return vget_lane_u64(vsqadd_u64((uint64x1_t){a}, (uint64x1_t){b}), 0); +} -uint32x2_t __builtin_mpl_vector_hadd_u32v2(uint32x2_t a, uint32x2_t b); -#define vhadd_u32(a, b) __builtin_mpl_vector_hadd_u32v2(a, b) +int8x8_t __builtin_mpl_vector_mla_v8i8(int8x8_t a, int8x8_t b, int8x8_t c); +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmla_s8( + int8x8_t a, int8x8_t b, int8x8_t c) { + return __builtin_mpl_vector_mla_v8i8(a, b, c); +} -uint32x4_t __builtin_mpl_vector_haddq_u32v4(uint32x4_t a, uint32x4_t b); -#define vhaddq_u32(a, b) __builtin_mpl_vector_haddq_u32v4(a, b) +int8x16_t __builtin_mpl_vector_mlaq_v16i8(int8x16_t a, int8x16_t b, int8x16_t c); +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlaq_s8( + int8x16_t a, int8x16_t b, int8x16_t c) { + return __builtin_mpl_vector_mlaq_v16i8(a, b, c); +} -int8x8_t __builtin_mpl_vector_rhadd_i8v8(int8x8_t a, int8x8_t b); -#define vrhadd_s8(a, b) __builtin_mpl_vector_rhadd_i8v8(a, b) +int16x4_t __builtin_mpl_vector_mla_v4i16(int16x4_t a, int16x4_t b, int16x4_t c); +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmla_s16( + int16x4_t a, int16x4_t b, int16x4_t c) { + return __builtin_mpl_vector_mla_v4i16(a, b, c); +} -int8x16_t __builtin_mpl_vector_rhaddq_i8v16(int8x16_t a, int8x16_t b); -#define vrhaddq_s8(a, b) __builtin_mpl_vector_rhaddq_i8v16(a, b) +int16x8_t __builtin_mpl_vector_mlaq_v8i16(int16x8_t a, int16x8_t b, int16x8_t c); +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlaq_s16( + int16x8_t a, int16x8_t b, int16x8_t c) { + return __builtin_mpl_vector_mlaq_v8i16(a, b, c); +} -int16x4_t __builtin_mpl_vector_rhadd_i16v4(int16x4_t a, int16x4_t b); -#define vrhadd_s16(a, b) __builtin_mpl_vector_rhadd_i16v4(a, b) +int32x2_t __builtin_mpl_vector_mla_v2i32(int32x2_t a, int32x2_t b, int32x2_t c); +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmla_s32( + int32x2_t a, int32x2_t b, int32x2_t c) { + return __builtin_mpl_vector_mla_v2i32(a, b, c); +} -int16x8_t __builtin_mpl_vector_rhaddq_i16v8(int16x8_t a, int16x8_t b); -#define vrhaddq_s16(a, b) __builtin_mpl_vector_rhaddq_i16v8(a, b) +int32x4_t __builtin_mpl_vector_mlaq_v4i32(int32x4_t a, int32x4_t b, int32x4_t c); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlaq_s32( + int32x4_t a, int32x4_t b, int32x4_t c) { + return __builtin_mpl_vector_mlaq_v4i32(a, b, c); +} -int32x2_t __builtin_mpl_vector_rhadd_i32v2(int32x2_t a, int32x2_t b); -#define vrhadd_s32(a, b) __builtin_mpl_vector_rhadd_i32v2(a, b) +uint8x8_t __builtin_mpl_vector_mla_v8u8(uint8x8_t a, uint8x8_t b, uint8x8_t c); +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmla_u8( + uint8x8_t a, uint8x8_t b, uint8x8_t c) { + return __builtin_mpl_vector_mla_v8u8(a, b, c); +} -int32x4_t __builtin_mpl_vector_rhaddq_i32v4(int32x4_t a, int32x4_t b); -#define vrhaddq_s32(a, b) __builtin_mpl_vector_rhaddq_i32v4(a, b) +uint8x16_t __builtin_mpl_vector_mlaq_v16u8(uint8x16_t a, uint8x16_t b, uint8x16_t c); +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlaq_u8( + uint8x16_t a, uint8x16_t b, uint8x16_t c) { + return __builtin_mpl_vector_mlaq_v16u8(a, b, c); +} -uint8x8_t __builtin_mpl_vector_rhadd_u8v8(uint8x8_t a, uint8x8_t b); -#define vrhadd_u8(a, b) __builtin_mpl_vector_rhadd_u8v8(a, b) +uint16x4_t __builtin_mpl_vector_mla_v4u16(uint16x4_t a, uint16x4_t b, uint16x4_t c); +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmla_u16( + uint16x4_t a, uint16x4_t b, uint16x4_t c) { + return __builtin_mpl_vector_mla_v4u16(a, b, c); +} -uint8x16_t __builtin_mpl_vector_rhaddq_u8v16(uint8x16_t a, uint8x16_t b); -#define vrhaddq_u8(a, b) __builtin_mpl_vector_rhaddq_u8v16(a, b) +uint16x8_t __builtin_mpl_vector_mlaq_v8u16(uint16x8_t a, uint16x8_t b, uint16x8_t c); +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlaq_u16( + uint16x8_t a, uint16x8_t b, uint16x8_t c) { + return __builtin_mpl_vector_mlaq_v8u16(a, b, c); +} -uint16x4_t __builtin_mpl_vector_rhadd_u16v4(uint16x4_t a, uint16x4_t b); -#define vrhadd_u16(a, b) __builtin_mpl_vector_rhadd_u16v4(a, b) +uint32x2_t __builtin_mpl_vector_mla_v2u32(uint32x2_t a, uint32x2_t b, uint32x2_t c); +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmla_u32( + uint32x2_t a, uint32x2_t b, uint32x2_t c) { + return __builtin_mpl_vector_mla_v2u32(a, b, c); +} -uint16x8_t __builtin_mpl_vector_rhaddq_u16v8(uint16x8_t a, uint16x8_t b); -#define vrhaddq_u16(a, b) __builtin_mpl_vector_rhaddq_u16v8(a, b) +uint32x4_t __builtin_mpl_vector_mlaq_v4u32(uint32x4_t a, uint32x4_t b, uint32x4_t c); +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlaq_u32( + uint32x4_t a, uint32x4_t b, uint32x4_t c) { + return __builtin_mpl_vector_mlaq_v4u32(a, b, c); +} -uint32x2_t __builtin_mpl_vector_rhadd_u32v2(uint32x2_t a, uint32x2_t b); -#define vrhadd_u32(a, b) __builtin_mpl_vector_rhadd_u32v2(a, b) +int8x8_t __builtin_mpl_vector_mls_v8i8(int8x8_t a, int8x8_t b, int8x8_t c); +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmls_s8( + int8x8_t a, int8x8_t b, int8x8_t c) { + return __builtin_mpl_vector_mls_v8i8(a, b, c); +} -uint32x4_t __builtin_mpl_vector_rhaddq_u32v4(uint32x4_t a, uint32x4_t b); -#define vrhaddq_u32(a, b) __builtin_mpl_vector_rhaddq_u32v4(a, b) +int8x16_t __builtin_mpl_vector_mlsq_v16i8(int8x16_t a, int8x16_t b, int8x16_t c); +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlsq_s8( + int8x16_t a, int8x16_t b, int8x16_t c) { + return __builtin_mpl_vector_mlsq_v16i8(a, b, c); +} -int8x8_t __builtin_mpl_vector_addhn_i8v8(int16x8_t a, int16x8_t b); -#define vaddhn_s16(a, b) __builtin_mpl_vector_addhn_i8v8(a, b) +int16x4_t __builtin_mpl_vector_mls_v4i16(int16x4_t a, int16x4_t b, int16x4_t c); +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmls_s16( + int16x4_t a, int16x4_t b, int16x4_t c) { + return __builtin_mpl_vector_mls_v4i16(a, b, c); +} -int16x4_t __builtin_mpl_vector_addhn_i16v4(int32x4_t a, int32x4_t b); -#define vaddhn_s32(a, b) __builtin_mpl_vector_addhn_i16v4(a, b) +int16x8_t __builtin_mpl_vector_mlsq_v8i16(int16x8_t a, int16x8_t b, int16x8_t c); +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlsq_s16( + int16x8_t a, int16x8_t b, int16x8_t c) { + return __builtin_mpl_vector_mlsq_v8i16(a, b, c); +} -int32x2_t __builtin_mpl_vector_addhn_i32v2(int64x2_t a, int64x2_t b); -#define vaddhn_s64(a, b) __builtin_mpl_vector_addhn_i32v2(a, b) +int32x2_t __builtin_mpl_vector_mls_v2i32(int32x2_t a, int32x2_t b, int32x2_t c); +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmls_s32( + int32x2_t a, int32x2_t b, int32x2_t c) { + return __builtin_mpl_vector_mls_v2i32(a, b, c); +} -uint8x8_t __builtin_mpl_vector_addhn_u8v8(uint16x8_t a, uint16x8_t b); -#define vaddhn_u16(a, b) __builtin_mpl_vector_addhn_u8v8(a, b) +int32x4_t __builtin_mpl_vector_mlsq_v4i32(int32x4_t a, int32x4_t b, int32x4_t c); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlsq_s32( + int32x4_t a, int32x4_t b, int32x4_t c) { + return __builtin_mpl_vector_mlsq_v4i32(a, b, c); +} -uint16x4_t __builtin_mpl_vector_addhn_u16v4(uint32x4_t a, uint32x4_t b); -#define vaddhn_u32(a, b) __builtin_mpl_vector_addhn_u16v4(a, b) +uint8x8_t __builtin_mpl_vector_mls_v8u8(uint8x8_t a, uint8x8_t b, uint8x8_t c); +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmls_u8( + uint8x8_t a, uint8x8_t b, uint8x8_t c) { + return __builtin_mpl_vector_mls_v8u8(a, b, c); +} -uint32x2_t __builtin_mpl_vector_addhn_u32v2(uint64x2_t a, uint64x2_t b); -#define vaddhn_u64(a, b) __builtin_mpl_vector_addhn_u32v2(a, b) +uint8x16_t __builtin_mpl_vector_mlsq_v16u8(uint8x16_t a, uint8x16_t b, uint8x16_t c); +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlsq_u8( + uint8x16_t a, uint8x16_t b, uint8x16_t c) { + return __builtin_mpl_vector_mlsq_v16u8(a, b, c); +} -int8x16_t __builtin_mpl_vector_addhn_high_i8v16(int8x8_t r, int16x8_t a, int16x8_t b); -#define vaddhn_high_s16(r, a, b) __builtin_mpl_vector_addhn_high_i8v16(r, a, b) +uint16x4_t __builtin_mpl_vector_mls_v4u16(uint16x4_t a, uint16x4_t b, uint16x4_t c); +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmls_u16( + uint16x4_t a, uint16x4_t b, uint16x4_t c) { + return __builtin_mpl_vector_mls_v4u16(a, b, c); +} -int16x8_t __builtin_mpl_vector_addhn_high_i16v8(int16x4_t r, int32x4_t a, int32x4_t b); -#define vaddhn_high_s32(r, a, b) __builtin_mpl_vector_addhn_high_i16v8(r, a, b) +uint16x8_t __builtin_mpl_vector_mlsq_v8u16(uint16x8_t a, uint16x8_t b, uint16x8_t c); +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlsq_u16( + uint16x8_t a, uint16x8_t b, uint16x8_t c) { + return __builtin_mpl_vector_mlsq_v8u16(a, b, c); +} -int32x4_t __builtin_mpl_vector_addhn_high_i32v4(int32x2_t r, int64x2_t a, int64x2_t b); -#define vaddhn_high_s64(r, a, b) __builtin_mpl_vector_addhn_high_i32v4(r, a, b) +uint32x2_t __builtin_mpl_vector_mls_v2u32(uint32x2_t a, uint32x2_t b, uint32x2_t c); +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmls_u32( + uint32x2_t a, uint32x2_t b, uint32x2_t c) { + return __builtin_mpl_vector_mls_v2u32(a, b, c); +} -uint8x16_t __builtin_mpl_vector_addhn_high_u8v16(uint8x8_t r, uint16x8_t a, uint16x8_t b); -#define vaddhn_high_u16(r, a, b) __builtin_mpl_vector_addhn_high_u8v16(r, a, b) +uint32x4_t __builtin_mpl_vector_mlsq_v4u32(uint32x4_t a, uint32x4_t b, uint32x4_t c); +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlsq_u32( + uint32x4_t a, uint32x4_t b, uint32x4_t c) { + return __builtin_mpl_vector_mlsq_v4u32(a, b, c); +} -uint16x8_t __builtin_mpl_vector_addhn_high_u16v8(uint16x4_t r, uint32x4_t a, uint32x4_t b); -#define vaddhn_high_u32(r, a, b) __builtin_mpl_vector_addhn_high_u16v8(r, a, b) +int16x8_t __builtin_mpl_vector_mlal_v8i16(int16x8_t a, int8x8_t b, int8x8_t c); +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlal_s8( + int16x8_t a, int8x8_t b, int8x8_t c) { + return __builtin_mpl_vector_mlal_v8i16(a, b, c); +} -uint32x4_t __builtin_mpl_vector_addhn_high_u32v4(uint32x2_t r, uint64x2_t a, uint64x2_t b); -#define vaddhn_high_u64(r, a, b) __builtin_mpl_vector_addhn_high_u32v4(r, a, b) +int32x4_t __builtin_mpl_vector_mlal_v4i32(int32x4_t a, int16x4_t b, int16x4_t c); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlal_s16( + int32x4_t a, int16x4_t b, int16x4_t c) { + return __builtin_mpl_vector_mlal_v4i32(a, b, c); +} -int8x8_t __builtin_mpl_vector_raddhn_i8v8(int16x8_t a, int16x8_t b); -#define vraddhn_s16(a, b) __builtin_mpl_vector_raddhn_i8v8(a, b) +int64x2_t __builtin_mpl_vector_mlal_v2i64(int64x2_t a, int32x2_t b, int32x2_t c); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlal_s32( + int64x2_t a, int32x2_t b, int32x2_t c) { + return __builtin_mpl_vector_mlal_v2i64(a, b, c); +} -int16x4_t __builtin_mpl_vector_raddhn_i16v4(int32x4_t a, int32x4_t b); -#define vraddhn_s32(a, b) __builtin_mpl_vector_raddhn_i16v4(a, b) +uint16x8_t __builtin_mpl_vector_mlal_v8u16(uint16x8_t a, uint8x8_t b, uint8x8_t c); +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlal_u8( + uint16x8_t a, uint8x8_t b, uint8x8_t c) { + return __builtin_mpl_vector_mlal_v8u16(a, b, c); +} -int32x2_t __builtin_mpl_vector_raddhn_i32v2(int64x2_t a, int64x2_t b); -#define vraddhn_s64(a, b) __builtin_mpl_vector_raddhn_i32v2(a, b) +uint32x4_t __builtin_mpl_vector_mlal_v4u32(uint32x4_t a, uint16x4_t b, uint16x4_t c); +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlal_u16( + uint32x4_t a, uint16x4_t b, uint16x4_t c) { + return __builtin_mpl_vector_mlal_v4u32(a, b, c); +} -uint8x8_t __builtin_mpl_vector_raddhn_u8v8(uint16x8_t a, uint16x8_t b); -#define vraddhn_u16(a, b) __builtin_mpl_vector_raddhn_u8v8(a, b) +uint64x2_t __builtin_mpl_vector_mlal_v2u64(uint64x2_t a, uint32x2_t b, uint32x2_t c); +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlal_u32( + uint64x2_t a, uint32x2_t b, uint32x2_t c) { + return __builtin_mpl_vector_mlal_v2u64(a, b, c); +} -uint16x4_t __builtin_mpl_vector_raddhn_u16v4(uint32x4_t a, uint32x4_t b); -#define vraddhn_u32(a, b) __builtin_mpl_vector_raddhn_u16v4(a, b) +int16x8_t __builtin_mpl_vector_mlal_high_v8i16(int16x8_t a, int8x16_t b, int8x16_t c); +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlal_high_s8( + int16x8_t a, int8x16_t b, int8x16_t c) { + return __builtin_mpl_vector_mlal_high_v8i16(a, b, c); +} -uint32x2_t __builtin_mpl_vector_raddhn_u32v2(uint64x2_t a, uint64x2_t b); -#define vraddhn_u64(a, b) __builtin_mpl_vector_raddhn_u32v2(a, b) +int32x4_t __builtin_mpl_vector_mlal_high_v4i32(int32x4_t a, int16x8_t b, int16x8_t c); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlal_high_s16( + int32x4_t a, int16x8_t b, int16x8_t c) { + return __builtin_mpl_vector_mlal_high_v4i32(a, b, c); +} -int8x16_t __builtin_mpl_vector_raddhn_high_i8v16(int8x8_t r, int16x8_t a, int16x8_t b); -#define vraddhn_high_s16(r, a, b) __builtin_mpl_vector_raddhn_high_i8v16(r, a, b) +int64x2_t __builtin_mpl_vector_mlal_high_v2i64(int64x2_t a, int32x4_t b, int32x4_t c); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlal_high_s32( + int64x2_t a, int32x4_t b, int32x4_t c) { + return __builtin_mpl_vector_mlal_high_v2i64(a, b, c); +} -int16x8_t __builtin_mpl_vector_raddhn_high_i16v8(int16x4_t r, int32x4_t a, int32x4_t b); -#define vraddhn_high_s32(r, a, b) __builtin_mpl_vector_raddhn_high_i16v8(r, a, b) +uint16x8_t __builtin_mpl_vector_mlal_high_v8u16(uint16x8_t a, uint8x16_t b, uint8x16_t c); +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlal_high_u8( + uint16x8_t a, uint8x16_t b, uint8x16_t c) { + return __builtin_mpl_vector_mlal_high_v8u16(a, b, c); +} -int32x4_t __builtin_mpl_vector_raddhn_high_i32v4(int32x2_t r, int64x2_t a, int64x2_t b); -#define vraddhn_high_s64(r, a, b) __builtin_mpl_vector_raddhn_high_i32v4(r, a, b) +uint32x4_t __builtin_mpl_vector_mlal_high_v4u32(uint32x4_t a, uint16x8_t b, uint16x8_t c); +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlal_high_u16( + uint32x4_t a, uint16x8_t b, uint16x8_t c) { + return __builtin_mpl_vector_mlal_high_v4u32(a, b, c); +} -uint8x16_t __builtin_mpl_vector_raddhn_high_u8v16(uint8x8_t r, uint16x8_t a, uint16x8_t b); -#define vraddhn_high_u16(r, a, b) __builtin_mpl_vector_raddhn_high_u8v16(r, a, b) +uint64x2_t __builtin_mpl_vector_mlal_high_v2u64(uint64x2_t a, uint32x4_t b, uint32x4_t c); +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlal_high_u32( + uint64x2_t a, uint32x4_t b, uint32x4_t c) { + return __builtin_mpl_vector_mlal_high_v2u64(a, b, c); +} -uint16x8_t __builtin_mpl_vector_raddhn_high_u16v8(uint16x4_t r, uint32x4_t a, uint32x4_t b); -#define vraddhn_high_u32(r, a, b) __builtin_mpl_vector_raddhn_high_u16v8(r, a, b) +int16x8_t __builtin_mpl_vector_mlsl_v8i16(int16x8_t a, int8x8_t b, int8x8_t c); +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlsl_s8( + int16x8_t a, int8x8_t b, int8x8_t c) { + return __builtin_mpl_vector_mlsl_v8i16(a, b, c); +} -uint32x4_t __builtin_mpl_vector_raddhn_high_u32v4(uint32x2_t r, uint64x2_t a, uint64x2_t b); -#define vraddhn_high_u64(r, a, b) __builtin_mpl_vector_raddhn_high_u32v4(r, a, b) +int32x4_t __builtin_mpl_vector_mlsl_v4i32(int32x4_t a, int16x4_t b, int16x4_t c); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlsl_s16( + int32x4_t a, int16x4_t b, int16x4_t c) { + return __builtin_mpl_vector_mlsl_v4i32(a, b, c); +} -int8x8_t __builtin_mpl_vector_qadd_i8v8(int8x8_t a, int8x8_t b); -#define vqadd_s8(a, b) __builtin_mpl_vector_qadd_i8v8(a, b) +int64x2_t __builtin_mpl_vector_mlsl_v2i64(int64x2_t a, int32x2_t b, int32x2_t c); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlsl_s32( + int64x2_t a, int32x2_t b, int32x2_t c) { + return __builtin_mpl_vector_mlsl_v2i64(a, b, c); +} -int8x16_t __builtin_mpl_vector_qaddq_i8v16(int8x16_t a, int8x16_t b); -#define vqaddq_s8(a, b) __builtin_mpl_vector_qaddq_i8v16(a, b) +uint16x8_t __builtin_mpl_vector_mlsl_v8u16(uint16x8_t a, uint8x8_t b, uint8x8_t c); +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlsl_u8( + uint16x8_t a, uint8x8_t b, uint8x8_t c) { + return __builtin_mpl_vector_mlsl_v8u16(a, b, c); +} -int16x4_t __builtin_mpl_vector_qadd_i16v4(int16x4_t a, int16x4_t b); -#define vqadd_s16(a, b) __builtin_mpl_vector_qadd_i16v4(a, b) +uint32x4_t __builtin_mpl_vector_mlsl_v4u32(uint32x4_t a, uint16x4_t b, uint16x4_t c); +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlsl_u16( + uint32x4_t a, uint16x4_t b, uint16x4_t c) { + return __builtin_mpl_vector_mlsl_v4u32(a, b, c); +} -int16x8_t __builtin_mpl_vector_qaddq_i16v8(int16x8_t a, int16x8_t b); -#define vqaddq_s16(a, b) __builtin_mpl_vector_qaddq_i16v8(a, b) +uint64x2_t __builtin_mpl_vector_mlsl_v2u64(uint64x2_t a, uint32x2_t b, uint32x2_t c); +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlsl_u32( + uint64x2_t a, uint32x2_t b, uint32x2_t c) { + return __builtin_mpl_vector_mlsl_v2u64(a, b, c); +} -int32x2_t __builtin_mpl_vector_qadd_i32v2(int32x2_t a, int32x2_t b); -#define vqadd_s32(a, b) __builtin_mpl_vector_qadd_i32v2(a, b) +int16x8_t __builtin_mpl_vector_mlsl_high_v8i16(int16x8_t a, int8x16_t b, int8x16_t c); +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlsl_high_s8( + int16x8_t a, int8x16_t b, int8x16_t c) { + return __builtin_mpl_vector_mlsl_high_v8i16(a, b, c); +} -int32x4_t __builtin_mpl_vector_qaddq_i32v4(int32x4_t a, int32x4_t b); -#define vqaddq_s32(a, b) __builtin_mpl_vector_qaddq_i32v4(a, b) +int32x4_t __builtin_mpl_vector_mlsl_high_v4i32(int32x4_t a, int16x8_t b, int16x8_t c); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlsl_high_s16( + int32x4_t a, int16x8_t b, int16x8_t c) { + return __builtin_mpl_vector_mlsl_high_v4i32(a, b, c); +} -int64x1_t __builtin_mpl_vector_qadd_i64v1(int64x1_t a, int64x1_t b); -#define vqadd_s64(a, b) __builtin_mpl_vector_qadd_i64v1(a, b) +int64x2_t __builtin_mpl_vector_mlsl_high_v2i64(int64x2_t a, int32x4_t b, int32x4_t c); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlsl_high_s32( + int64x2_t a, int32x4_t b, int32x4_t c) { + return __builtin_mpl_vector_mlsl_high_v2i64(a, b, c); +} -int64x2_t __builtin_mpl_vector_qaddq_i64v2(int64x2_t a, int64x2_t b); -#define vqaddq_s64(a, b) __builtin_mpl_vector_qaddq_i64v2(a, b) +uint16x8_t __builtin_mpl_vector_mlsl_high_v8u16(uint16x8_t a, uint8x16_t b, uint8x16_t c); +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlsl_high_u8( + uint16x8_t a, uint8x16_t b, uint8x16_t c) { + return __builtin_mpl_vector_mlsl_high_v8u16(a, b, c); +} -uint8x8_t __builtin_mpl_vector_qadd_u8v8(uint8x8_t a, uint8x8_t b); -#define vqadd_u8(a, b) __builtin_mpl_vector_qadd_u8v8(a, b) +uint32x4_t __builtin_mpl_vector_mlsl_high_v4u32(uint32x4_t a, uint16x8_t b, uint16x8_t c); +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlsl_high_u16( + uint32x4_t a, uint16x8_t b, uint16x8_t c) { + return __builtin_mpl_vector_mlsl_high_v4u32(a, b, c); +} -uint8x16_t __builtin_mpl_vector_qaddq_u8v16(uint8x16_t a, uint8x16_t b); -#define vqaddq_u8(a, b) __builtin_mpl_vector_qaddq_u8v16(a, b) +uint64x2_t __builtin_mpl_vector_mlsl_high_v2u64(uint64x2_t a, uint32x4_t b, uint32x4_t c); +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlsl_high_u32( + uint64x2_t a, uint32x4_t b, uint32x4_t c) { + return __builtin_mpl_vector_mlsl_high_v2u64(a, b, c); +} -uint16x4_t __builtin_mpl_vector_qadd_u16v4(uint16x4_t a, uint16x4_t b); -#define vqadd_u16(a, b) __builtin_mpl_vector_qadd_u16v4(a, b) +int16x4_t __builtin_mpl_vector_qdmulh_v4i16(int16x4_t a, int16x4_t b); +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmulh_s16( + int16x4_t a, int16x4_t b) { + return __builtin_mpl_vector_qdmulh_v4i16(a, b); +} -uint16x8_t __builtin_mpl_vector_qaddq_u16v8(uint16x8_t a, uint16x8_t b); -#define vqaddq_u16(a, b) __builtin_mpl_vector_qaddq_u16v8(a, b) +int16x8_t __builtin_mpl_vector_qdmulhq_v8i16(int16x8_t a, int16x8_t b); +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmulhq_s16( + int16x8_t a, int16x8_t b) { + return __builtin_mpl_vector_qdmulhq_v8i16(a, b); +} -uint32x2_t __builtin_mpl_vector_qadd_u32v2(uint32x2_t a, uint32x2_t b); -#define vqadd_u32(a, b) __builtin_mpl_vector_qadd_u32v2(a, b) +int32x2_t __builtin_mpl_vector_qdmulh_v2i32(int32x2_t a, int32x2_t b); +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmulh_s32( + int32x2_t a, int32x2_t b) { + return __builtin_mpl_vector_qdmulh_v2i32(a, b); +} -uint32x4_t __builtin_mpl_vector_qaddq_u32v4(uint32x4_t a, uint32x4_t b); -#define vqaddq_u32(a, b) __builtin_mpl_vector_qaddq_u32v4(a, b) +int32x4_t __builtin_mpl_vector_qdmulhq_v4i32(int32x4_t a, int32x4_t b); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmulhq_s32( + int32x4_t a, int32x4_t b) { + return __builtin_mpl_vector_qdmulhq_v4i32(a, b); +} -uint64x1_t __builtin_mpl_vector_qadd_u64v1(uint64x1_t a, uint64x1_t b); -#define vqadd_u64(a, b) __builtin_mpl_vector_qadd_u64v1(a, b) +extern inline int16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmulhh_s16( + int16_t a, int16_t b) { + return vget_lane_s16(vqdmulh_s16((int16x4_t){a}, (int16x4_t){b}), 0); +} -uint64x2_t __builtin_mpl_vector_qaddq_u64v2(uint64x2_t a, uint64x2_t b); -#define vqaddq_u64(a, b) __builtin_mpl_vector_qaddq_u64v2(a, b) +extern inline int32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmulhs_s32( + int32_t a, int32_t b) { + return vget_lane_s32(vqdmulh_s32((int32x2_t){a}, (int32x2_t){b}), 0); +} -static inline int8_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqaddb_s8(int8_t a, int8_t b) { - return vget_lane_s8(vqadd_s8((int8x8_t){a}, (int8x8_t){b}), 0); +int16x4_t __builtin_mpl_vector_qrdmulh_v4i16(int16x4_t a, int16x4_t b); +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrdmulh_s16( + int16x4_t a, int16x4_t b) { + return __builtin_mpl_vector_qrdmulh_v4i16(a, b); } -static inline int16_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqaddh_s16(int16_t a, int16_t b) { - return vget_lane_s16(vqadd_s16((int16x4_t){a}, (int16x4_t){b}), 0); +int16x8_t __builtin_mpl_vector_qrdmulhq_v8i16(int16x8_t a, int16x8_t b); +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrdmulhq_s16( + int16x8_t a, int16x8_t b) { + return __builtin_mpl_vector_qrdmulhq_v8i16(a, b); } -static inline int32_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqadds_s32(int32_t a, int32_t b) { - return vget_lane_s32(vqadd_s32((int32x2_t){a}, (int32x2_t){b}), 0); +int32x2_t __builtin_mpl_vector_qrdmulh_v2i32(int32x2_t a, int32x2_t b); +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrdmulh_s32( + int32x2_t a, int32x2_t b) { + return __builtin_mpl_vector_qrdmulh_v2i32(a, b); } -static inline int64_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqaddd_s64(int64_t a, int64_t b) { - return vget_lane_s64(vqadd_s64((int64x1_t){a}, (int64x1_t){b}), 0); +int32x4_t __builtin_mpl_vector_qrdmulhq_v4i32(int32x4_t a, int32x4_t b); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrdmulhq_s32( + int32x4_t a, int32x4_t b) { + return __builtin_mpl_vector_qrdmulhq_v4i32(a, b); } -static inline uint8_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqaddb_u8(uint8_t a, uint8_t b) { - return vget_lane_u8(vqadd_u8((uint8x8_t){a}, (uint8x8_t){b}), 0); +extern inline int16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrdmulhh_s16( + int16_t a, int16_t b) { + return vget_lane_s16(vqrdmulh_s16((int16x4_t){a}, (int16x4_t){b}), 0); } -static inline uint16_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqaddh_u16(uint16_t a, uint16_t b) { - return vget_lane_u16(vqadd_u16((uint16x4_t){a}, (uint16x4_t){b}), 0); +extern inline int32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrdmulhs_s32( + int32_t a, int32_t b) { + return vget_lane_s32(vqrdmulh_s32((int32x2_t){a}, (int32x2_t){b}), 0); } -static inline uint32_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqadds_u32(uint32_t a, uint32_t b) { - return vget_lane_u32(vqadd_u32((uint32x2_t){a}, (uint32x2_t){b}), 0); +int32x4_t __builtin_mpl_vector_qdmull_v4i32(int16x4_t a, int16x4_t b); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmull_s16( + int16x4_t a, int16x4_t b) { + return __builtin_mpl_vector_qdmull_v4i32(a, b); } -static inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqaddd_u64(uint64_t a, uint64_t b) { - return vget_lane_u64(vqadd_u64((uint64x1_t){a}, (uint64x1_t){b}), 0); +int64x2_t __builtin_mpl_vector_qdmull_v2i64(int32x2_t a, int32x2_t b); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmull_s32( + int32x2_t a, int32x2_t b) { + return __builtin_mpl_vector_qdmull_v2i64(a, b); } -int8x8_t __builtin_mpl_vector_uqadd_i8v8(int8x8_t a, uint8x8_t b); -#define vuqadd_s8(a, b) __builtin_mpl_vector_uqadd_i8v8(a, b) +extern inline int32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmullh_s16( + int16_t a, int16_t b) { + return vgetq_lane_s32(vqdmull_s16((int16x4_t){a}, (int16x4_t){b}), 0); +} -int8x16_t __builtin_mpl_vector_uqaddq_i8v16(int8x16_t a, uint8x16_t b); -#define vuqaddq_s8(a, b) __builtin_mpl_vector_uqaddq_i8v16(a, b) +extern inline int64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmulls_s32( + int32_t a, int32_t b) { + return vgetq_lane_s64(vqdmull_s32((int32x2_t){a}, (int32x2_t){b}), 0); +} -int16x4_t __builtin_mpl_vector_uqadd_i16v4(int16x4_t a, uint16x4_t b); -#define vuqadd_s16(a, b) __builtin_mpl_vector_uqadd_i16v4(a, b) +int32x4_t __builtin_mpl_vector_qdmull_high_v4i32(int16x8_t a, int16x8_t b); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmull_high_s16( + int16x8_t a, int16x8_t b) { + return __builtin_mpl_vector_qdmull_high_v4i32(a, b); +} -int16x8_t __builtin_mpl_vector_uqaddq_i16v8(int16x8_t a, uint16x8_t b); -#define vuqaddq_s16(a, b) __builtin_mpl_vector_uqaddq_i16v8(a, b) +int64x2_t __builtin_mpl_vector_qdmull_high_v2i64(int32x4_t a, int32x4_t b); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmull_high_s32( + int32x4_t a, int32x4_t b) { + return __builtin_mpl_vector_qdmull_high_v2i64(a, b); +} -int32x2_t __builtin_mpl_vector_uqadd_i32v2(int32x2_t a, uint32x2_t b); -#define vuqadd_s32(a, b) __builtin_mpl_vector_uqadd_i32v2(a, b) +int32x4_t __builtin_mpl_vector_qdmlal_v4i32(int32x4_t a, int16x4_t b, int16x4_t c); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmlal_s16( + int32x4_t a, int16x4_t b, int16x4_t c) { + return __builtin_mpl_vector_qdmlal_v4i32(a, b, c); +} -int32x4_t __builtin_mpl_vector_uqaddq_i32v4(int32x4_t a, uint32x4_t b); -#define vuqaddq_s32(a, b) __builtin_mpl_vector_uqaddq_i32v4(a, b) +int64x2_t __builtin_mpl_vector_qdmlal_v2i64(int64x2_t a, int32x2_t b, int32x2_t c); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmlal_s32( + int64x2_t a, int32x2_t b, int32x2_t c) { + return __builtin_mpl_vector_qdmlal_v2i64(a, b, c); +} -int64x1_t __builtin_mpl_vector_uqadd_i64v1(int64x1_t a, uint64x1_t b); -#define vuqadd_s64(a, b) __builtin_mpl_vector_uqadd_i64v1(a, b) +extern inline int32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmlalh_s16( + int32_t a, int16_t b, int16_t c) { + return vgetq_lane_s32(vqdmlal_s16((int32x4_t){a}, (int16x4_t){b}, (int16x4_t){c}), 0); +} -int64x2_t __builtin_mpl_vector_uqaddq_i64v2(int64x2_t a, uint64x2_t b); -#define vuqaddq_s64(a, b) __builtin_mpl_vector_uqaddq_i64v2(a, b) +extern inline int32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmlals_s32( + int32_t a, int16_t b, int16_t c) { + return vgetq_lane_s64(vqdmlal_s32((int64x2_t){a}, (int32x2_t){b}, (int32x2_t){c}), 0); +} -static inline int8_t __attribute__ ((__always_inline__, __gnu_inline__)) -vuqaddb_s8(int8_t a, int8_t b) { - return vget_lane_s8(vuqadd_s8((int8x8_t){a}, (int8x8_t){b}), 0); +int32x4_t __builtin_mpl_vector_qdmlal_high_v4i32(int32x4_t a, int16x8_t b, int16x8_t c); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmlal_high_s16( + int32x4_t a, int16x8_t b, int16x8_t c) { + return __builtin_mpl_vector_qdmlal_high_v4i32(a, b, c); } -static inline int16_t __attribute__ ((__always_inline__, __gnu_inline__)) -vuqaddh_s16(int16_t a, int16_t b) { - return vget_lane_s16(vuqadd_s16((int16x4_t){a}, (int16x4_t){b}), 0); +int64x2_t __builtin_mpl_vector_qdmlal_high_v2i64(int64x2_t a, int32x4_t b, int32x4_t c); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmlal_high_s32( + int64x2_t a, int32x4_t b, int32x4_t c) { + return __builtin_mpl_vector_qdmlal_high_v2i64(a, b, c); } -static inline int32_t __attribute__ ((__always_inline__, __gnu_inline__)) -vuqadds_s32(int32_t a, int32_t b) { - return vget_lane_s32(vuqadd_s32((int32x2_t){a}, (int32x2_t){b}), 0); +int32x4_t __builtin_mpl_vector_qdmlsl_v4i32(int32x4_t a, int16x4_t b, int16x4_t c); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmlsl_s16( + int32x4_t a, int16x4_t b, int16x4_t c) { + return __builtin_mpl_vector_qdmlsl_v4i32(a, b, c); } -static inline int64_t __attribute__ ((__always_inline__, __gnu_inline__)) -vuqaddd_s64(int64_t a, int64_t b) { - return vget_lane_s64(vuqadd_s64((int64x1_t){a}, (int64x1_t){b}), 0); +int64x2_t __builtin_mpl_vector_qdmlsl_v2i64(int64x2_t a, int32x2_t b, int32x2_t c); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmlsl_s32( + int64x2_t a, int32x2_t b, int32x2_t c) { + return __builtin_mpl_vector_qdmlsl_v2i64(a, b, c); } -uint8x8_t __builtin_mpl_vector_sqadd_u8v8(uint8x8_t a, int8x8_t b); -#define vsqadd_u8(a, b) __builtin_mpl_vector_sqadd_u8v8(a, b) +extern inline int32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmlslh_s16( + int32_t a, int16_t b, int16_t c) { + return vgetq_lane_s32(vqdmlsl_s16((int32x4_t){a}, (int16x4_t){b}, (int16x4_t){c}), 0); +} -uint8x16_t __builtin_mpl_vector_sqaddq_u8v16(uint8x16_t a, int8x16_t b); -#define vsqaddq_u8(a, b) __builtin_mpl_vector_sqaddq_u8v16(a, b) +extern inline int32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmlsls_s32( + int32_t a, int16_t b, int16_t c) { + return vgetq_lane_s64(vqdmlsl_s32((int64x2_t){a}, (int32x2_t){b}, (int32x2_t){c}), 0); +} -uint16x4_t __builtin_mpl_vector_sqadd_u16v4(uint16x4_t a, int16x4_t b); -#define vsqadd_u16(a, b) __builtin_mpl_vector_sqadd_u16v4(a, b) +int32x4_t __builtin_mpl_vector_qdmlsl_high_v4i32(int32x4_t a, int16x8_t b, int16x8_t c); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmlsl_high_s16( + int32x4_t a, int16x8_t b, int16x8_t c) { + return __builtin_mpl_vector_qdmlsl_high_v4i32(a, b, c); +} -uint16x8_t __builtin_mpl_vector_sqaddq_u16v8(uint16x8_t a, int16x8_t b); -#define vsqaddq_u16(a, b) __builtin_mpl_vector_sqaddq_u16v8(a, b) +int64x2_t __builtin_mpl_vector_qdmlsl_high_v2i64(int64x2_t a, int32x4_t b, int32x4_t c); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmlsl_high_s32( + int64x2_t a, int32x4_t b, int32x4_t c) { + return __builtin_mpl_vector_qdmlsl_high_v2i64(a, b, c); +} -uint32x2_t __builtin_mpl_vector_sqadd_u32v2(uint32x2_t a, int32x2_t b); -#define vsqadd_u32(a, b) __builtin_mpl_vector_sqadd_u32v2(a, b) +int32x4_t __builtin_mpl_vector_qdmlal_lane_v4i32(int32x4_t a, int16x4_t b, int16x4_t v, const int lane); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmlal_lane_s16( + int32x4_t a, int16x4_t b, int16x4_t v, const int lane) { + return __builtin_mpl_vector_qdmlal_lane_v4i32(a, b, v, lane); +} -uint32x4_t __builtin_mpl_vector_sqaddq_u32v4(uint32x4_t a, int32x4_t b); -#define vsqaddq_u32(a, b) __builtin_mpl_vector_sqaddq_u32v4(a, b) +int64x2_t __builtin_mpl_vector_qdmlal_lane_v2i64(int64x2_t a, int32x2_t b, int32x2_t v, const int lane); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmlal_lane_s32( + int64x2_t a, int32x2_t b, int32x2_t v, const int lane) { + return __builtin_mpl_vector_qdmlal_lane_v2i64(a, b, v, lane); +} -uint64x1_t __builtin_mpl_vector_sqadd_u64v1(uint64x1_t a, int64x1_t b); -#define vsqadd_u64(a, b) __builtin_mpl_vector_sqadd_u64v1(a, b) +extern inline int32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmlalh_lane_s16( + int32_t a, int16_t b, int16x4_t v, const int lane) { + return vgetq_lane_s32(vqdmlal_lane_s16((int32x4_t){a}, (int16x4_t){b}, v, lane), 0); +} -uint64x2_t __builtin_mpl_vector_sqaddq_u64v2(uint64x2_t a, int64x2_t b); -#define vsqaddq_u64(a, b) __builtin_mpl_vector_sqaddq_u64v2(a, b) +extern inline int64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmlals_lane_s32( + int64_t a, int32_t b, int32x2_t v, const int lane) { + return vgetq_lane_s64(vqdmlal_lane_s32((int64x2_t){a}, (int32x2_t){b}, v, lane), 0); +} -static inline uint8_t __attribute__ ((__always_inline__, __gnu_inline__)) -vsqaddb_u8(uint8_t a, uint8_t b) { - return vget_lane_u8(vsqadd_u8((uint8x8_t){a}, (uint8x8_t){b}), 0); +int32x4_t __builtin_mpl_vector_qdmlal_high_lane_v4i32(int32x4_t a, int16x8_t b, int16x4_t v, const int lane); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmlal_high_lane_s16( + int32x4_t a, int16x8_t b, int16x4_t v, const int lane) { + return __builtin_mpl_vector_qdmlal_high_lane_v4i32(a, b, v, lane); } -static inline uint16_t __attribute__ ((__always_inline__, __gnu_inline__)) -vsqaddh_u16(uint16_t a, uint16_t b) { - return vget_lane_u16(vsqadd_u16((uint16x4_t){a}, (uint16x4_t){b}), 0); +int64x2_t __builtin_mpl_vector_qdmlal_high_lane_v2i64(int64x2_t a, int32x4_t b, int32x2_t v, const int lane); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmlal_high_lane_s32( + int64x2_t a, int32x4_t b, int32x2_t v, const int lane) { + return __builtin_mpl_vector_qdmlal_high_lane_v2i64(a, b, v, lane); } -static inline uint32_t __attribute__ ((__always_inline__, __gnu_inline__)) -vsqadds_u32(uint32_t a, uint32_t b) { - return vget_lane_u32(vsqadd_u32((uint32x2_t){a}, (uint32x2_t){b}), 0); +int32x4_t __builtin_mpl_vector_qdmlal_laneq_v4i32(int32x4_t a, int16x4_t b, int16x8_t v, const int lane); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmlal_laneq_s16( + int32x4_t a, int16x4_t b, int16x8_t v, const int lane) { + return __builtin_mpl_vector_qdmlal_laneq_v4i32(a, b, v, lane); } -static inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__)) -vsqaddd_u64(uint64_t a, uint64_t b) { - return vget_lane_u64(vsqadd_u64((uint64x1_t){a}, (uint64x1_t){b}), 0); +int64x2_t __builtin_mpl_vector_qdmlal_laneq_v2i64(int64x2_t a, int32x2_t b, int32x4_t v, const int lane); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmlal_laneq_s32( + int64x2_t a, int32x2_t b, int32x4_t v, const int lane) { + return __builtin_mpl_vector_qdmlal_laneq_v2i64(a, b, v, lane); } -int8x8_t __builtin_mpl_vector_mla_i8v8(int8x8_t a, int8x8_t b, int8x8_t c); -#define vmla_s8(a, b, c) __builtin_mpl_vector_mla_i8v8(a, b, c) +extern inline int32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmlalh_laneq_s16( + int32_t a, int16_t b, int16x8_t v, const int lane) { + return vgetq_lane_s32(vqdmlal_laneq_s16((int32x4_t){a}, (int16x4_t){b}, v, lane), 0); +} -int8x16_t __builtin_mpl_vector_mlaq_i8v16(int8x16_t a, int8x16_t b, int8x16_t c); -#define vmlaq_s8(a, b, c) __builtin_mpl_vector_mlaq_i8v16(a, b, c) +extern inline int64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmlals_laneq_s32( + int64_t a, int32_t b, int32x4_t v, const int lane) { + return vgetq_lane_s64(vqdmlal_laneq_s32((int64x2_t){a}, (int32x2_t){b}, v, lane), 0); +} -int16x4_t __builtin_mpl_vector_mla_i16v4(int16x4_t a, int16x4_t b, int16x4_t c); -#define vmla_s16(a, b, c) __builtin_mpl_vector_mla_i16v4(a, b, c) +int32x4_t __builtin_mpl_vector_qdmlal_high_laneq_v4i32(int32x4_t a, int16x8_t b, int16x8_t v, const int lane); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmlal_high_laneq_s16( + int32x4_t a, int16x8_t b, int16x8_t v, const int lane) { + return __builtin_mpl_vector_qdmlal_high_laneq_v4i32(a, b, v, lane); +} -int16x8_t __builtin_mpl_vector_mlaq_i16v8(int16x8_t a, int16x8_t b, int16x8_t c); -#define vmlaq_s16(a, b, c) __builtin_mpl_vector_mlaq_i16v8(a, b, c) +int64x2_t __builtin_mpl_vector_qdmlal_high_laneq_v2i64(int64x2_t a, int32x4_t b, int32x4_t v, const int lane); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmlal_high_laneq_s32( + int64x2_t a, int32x4_t b, int32x4_t v, const int lane) { + return __builtin_mpl_vector_qdmlal_high_laneq_v2i64(a, b, v, lane); +} -int32x2_t __builtin_mpl_vector_mla_i32v2(int32x2_t a, int32x2_t b, int32x2_t c); -#define vmla_s32(a, b, c) __builtin_mpl_vector_mla_i32v2(a, b, c) +int32x4_t __builtin_mpl_vector_qdmlsl_lane_v4i32(int32x4_t a, int16x4_t b, int16x4_t v, const int lane); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmlsl_lane_s16( + int32x4_t a, int16x4_t b, int16x4_t v, const int lane) { + return __builtin_mpl_vector_qdmlsl_lane_v4i32(a, b, v, lane); +} -int32x4_t __builtin_mpl_vector_mlaq_i32v4(int32x4_t a, int32x4_t b, int32x4_t c); -#define vmlaq_s32(a, b, c) __builtin_mpl_vector_mlaq_i32v4(a, b, c) +int64x2_t __builtin_mpl_vector_qdmlsl_lane_v2i64(int64x2_t a, int32x2_t b, int32x2_t v, const int lane); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmlsl_lane_s32( + int64x2_t a, int32x2_t b, int32x2_t v, const int lane) { + return __builtin_mpl_vector_qdmlsl_lane_v2i64(a, b, v, lane); +} -uint8x8_t __builtin_mpl_vector_mla_u8v8(uint8x8_t a, uint8x8_t b, uint8x8_t c); -#define vmla_u8(a, b, c) __builtin_mpl_vector_mla_u8v8(a, b, c) +extern inline int32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmlslh_lane_s16( + int32_t a, int16_t b, int16x4_t v, const int lane) { + return vgetq_lane_s32(vqdmlsl_lane_s16((int32x4_t){a}, (int16x4_t){b}, v, lane), 0); +} -uint8x16_t __builtin_mpl_vector_mlaq_u8v16(uint8x16_t a, uint8x16_t b, uint8x16_t c); -#define vmlaq_u8(a, b, c) __builtin_mpl_vector_mlaq_u8v16(a, b, c) +extern inline int64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmlsls_lane_s32( + int64_t a, int32_t b, int32x2_t v, const int lane) { + return vgetq_lane_s64(vqdmlsl_lane_s32((int64x2_t){a}, (int32x2_t){b}, v, lane), 0); +} -uint16x4_t __builtin_mpl_vector_mla_u16v4(uint16x4_t a, uint16x4_t b, uint16x4_t c); -#define vmla_u16(a, b, c) __builtin_mpl_vector_mla_u16v4(a, b, c) +int32x4_t __builtin_mpl_vector_qdmlsl_high_lane_v4i32(int32x4_t a, int16x8_t b, int16x4_t v, const int lane); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmlsl_high_lane_s16( + int32x4_t a, int16x8_t b, int16x4_t v, const int lane) { + return __builtin_mpl_vector_qdmlsl_high_lane_v4i32(a, b, v, lane); +} -uint16x8_t __builtin_mpl_vector_mlaq_u16v8(uint16x8_t a, uint16x8_t b, uint16x8_t c); -#define vmlaq_u16(a, b, c) __builtin_mpl_vector_mlaq_u16v8(a, b, c) +int64x2_t __builtin_mpl_vector_qdmlsl_high_lane_v2i64(int64x2_t a, int32x4_t b, int32x2_t v, const int lane); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmlsl_high_lane_s32( + int64x2_t a, int32x4_t b, int32x2_t v, const int lane) { + return __builtin_mpl_vector_qdmlsl_high_lane_v2i64(a, b, v, lane); +} -uint32x2_t __builtin_mpl_vector_mla_u32v2(uint32x2_t a, uint32x2_t b, uint32x2_t c); -#define vmla_u32(a, b, c) __builtin_mpl_vector_mla_u32v2(a, b, c) +int32x4_t __builtin_mpl_vector_qdmlsl_laneq_v4i32(int32x4_t a, int16x4_t b, int16x8_t v, const int lane); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmlsl_laneq_s16( + int32x4_t a, int16x4_t b, int16x8_t v, const int lane) { + return __builtin_mpl_vector_qdmlsl_laneq_v4i32(a, b, v, lane); +} -uint32x4_t __builtin_mpl_vector_mlaq_u32v4(uint32x4_t a, uint32x4_t b, uint32x4_t c); -#define vmlaq_u32(a, b, c) __builtin_mpl_vector_mlaq_u32v4(a, b, c) +int64x2_t __builtin_mpl_vector_qdmlsl_laneq_v2i64(int64x2_t a, int32x2_t b, int32x4_t v, const int lane); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmlsl_laneq_s32( + int64x2_t a, int32x2_t b, int32x4_t v, const int lane) { + return __builtin_mpl_vector_qdmlsl_laneq_v2i64(a, b, v, lane); +} -int8x8_t __builtin_mpl_vector_mls_i8v8(int8x8_t a, int8x8_t b, int8x8_t c); -#define vmls_s8(a, b, c) __builtin_mpl_vector_mls_i8v8(a, b, c) +extern inline int32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmlslh_laneq_s16( + int32_t a, int16_t b, int16x8_t v, const int lane) { + return vgetq_lane_s32(vqdmlsl_laneq_s16((int32x4_t){a}, (int16x4_t){b}, v, lane), 0); +} -int8x16_t __builtin_mpl_vector_mlsq_i8v16(int8x16_t a, int8x16_t b, int8x16_t c); -#define vmlsq_s8(a, b, c) __builtin_mpl_vector_mlsq_i8v16(a, b, c) +extern inline int64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmlsls_laneq_s32( + int64_t a, int32_t b, int32x4_t v, const int lane) { + return vgetq_lane_s64(vqdmlsl_laneq_s32((int64x2_t){a}, (int32x2_t){b}, v, lane), 0); +} -int16x4_t __builtin_mpl_vector_mls_i16v4(int16x4_t a, int16x4_t b, int16x4_t c); -#define vmls_s16(a, b, c) __builtin_mpl_vector_mls_i16v4(a, b, c) +int32x4_t __builtin_mpl_vector_qdmlsl_high_laneq_v4i32(int32x4_t a, int16x8_t b, int16x8_t v, const int lane); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmlsl_high_laneq_s16( + int32x4_t a, int16x8_t b, int16x8_t v, const int lane) { + return __builtin_mpl_vector_qdmlsl_high_laneq_v4i32(a, b, v, lane); +} -int16x8_t __builtin_mpl_vector_mlsq_i16v8(int16x8_t a, int16x8_t b, int16x8_t c); -#define vmlsq_s16(a, b, c) __builtin_mpl_vector_mlsq_i16v8(a, b, c) +int64x2_t __builtin_mpl_vector_qdmlsl_high_laneq_v2i64(int64x2_t a, int32x4_t b, int32x4_t v, const int lane); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmlsl_high_laneq_s32( + int64x2_t a, int32x4_t b, int32x4_t v, const int lane) { + return __builtin_mpl_vector_qdmlsl_high_laneq_v2i64(a, b, v, lane); +} -int32x2_t __builtin_mpl_vector_mls_i32v2(int32x2_t a, int32x2_t b, int32x2_t c); -#define vmls_s32(a, b, c) __builtin_mpl_vector_mls_i32v2(a, b, c) +int32x4_t __builtin_mpl_vector_qdmull_n_v4i32(int16x4_t a, int16x4_t b); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmull_n_s16( + int16x4_t a, int16_t b) { + return __builtin_mpl_vector_qdmull_n_v4i32(a, (int16x4_t){b}); +} -int32x4_t __builtin_mpl_vector_mlsq_i32v4(int32x4_t a, int32x4_t b, int32x4_t c); -#define vmlsq_s32(a, b, c) __builtin_mpl_vector_mlsq_i32v4(a, b, c) +int64x2_t __builtin_mpl_vector_qdmull_n_v2i64(int32x2_t a, int32x2_t b); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmull_n_s32( + int32x2_t a, int32_t b) { + return __builtin_mpl_vector_qdmull_n_v2i64(a, (int32x2_t){b}); +} -uint8x8_t __builtin_mpl_vector_mls_u8v8(uint8x8_t a, uint8x8_t b, uint8x8_t c); -#define vmls_u8(a, b, c) __builtin_mpl_vector_mls_u8v8(a, b, c) +int32x4_t __builtin_mpl_vector_qdmull_high_n_v4i32(int16x8_t a, int16x8_t b); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmull_high_n_s16( + int16x8_t a, int16_t b) { + return __builtin_mpl_vector_qdmull_high_n_v4i32(a, (int16x8_t){b}); +} -uint8x16_t __builtin_mpl_vector_mlsq_u8v16(uint8x16_t a, uint8x16_t b, uint8x16_t c); -#define vmlsq_u8(a, b, c) __builtin_mpl_vector_mlsq_u8v16(a, b, c) +int64x2_t __builtin_mpl_vector_qdmull_high_n_v2i64(int32x4_t a, int32x4_t b); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmull_high_n_s32( + int32x4_t a, int32_t b) { + return __builtin_mpl_vector_qdmull_high_n_v2i64(a, (int32x4_t){b}); +} -uint16x4_t __builtin_mpl_vector_mls_u16v4(uint16x4_t a, uint16x4_t b, uint16x4_t c); -#define vmls_u16(a, b, c) __builtin_mpl_vector_mls_u16v4(a, b, c) +int32x4_t __builtin_mpl_vector_qdmull_lane_v4i32(int16x4_t a, int16x4_t v, const int lane); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmull_lane_s16( + int16x4_t a, int16x4_t v, const int lane) { + return __builtin_mpl_vector_qdmull_lane_v4i32(a, v, lane); +} -uint16x8_t __builtin_mpl_vector_mlsq_u16v8(uint16x8_t a, uint16x8_t b, uint16x8_t c); -#define vmlsq_u16(a, b, c) __builtin_mpl_vector_mlsq_u16v8(a, b, c) +int64x2_t __builtin_mpl_vector_qdmull_lane_v2i64(int32x2_t a, int32x2_t v, const int lane); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmull_lane_s32( + int32x2_t a, int32x2_t v, const int lane) { + return __builtin_mpl_vector_qdmull_lane_v2i64(a, v, lane); +} -uint32x2_t __builtin_mpl_vector_mls_u32v2(uint32x2_t a, uint32x2_t b, uint32x2_t c); -#define vmls_u32(a, b, c) __builtin_mpl_vector_mls_u32v2(a, b, c) +extern inline int32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmullh_lane_s16( + int16_t a, int16x4_t v, const int lane) { + return vgetq_lane_s32(vqdmull_lane_s16((int16x4_t){a}, v, lane), 0); +} -uint32x4_t __builtin_mpl_vector_mlsq_u32v4(uint32x4_t a, uint32x4_t b, uint32x4_t c); -#define vmlsq_u32(a, b, c) __builtin_mpl_vector_mlsq_u32v4(a, b, c) +extern inline int64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmulls_lane_s32( + int32_t a, int32x2_t v, const int lane) { + return vgetq_lane_s64(vqdmull_lane_s32((int32x2_t){a}, v, lane), 0); +} -int16x8_t __builtin_mpl_vector_mlal_i16v8(int16x8_t a, int8x8_t b, int8x8_t c); -#define vmlal_s8(a, b, c) __builtin_mpl_vector_mlal_i16v8(a, b, c) +int32x4_t __builtin_mpl_vector_qdmull_high_lane_v4i32(int16x8_t a, int16x4_t v, const int lane); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmull_high_lane_s16( + int16x8_t a, int16x4_t v, const int lane) { + return __builtin_mpl_vector_qdmull_high_lane_v4i32(a, v, lane); +} -int32x4_t __builtin_mpl_vector_mlal_i32v4(int32x4_t a, int16x4_t b, int16x4_t c); -#define vmlal_s16(a, b, c) __builtin_mpl_vector_mlal_i32v4(a, b, c) +int64x2_t __builtin_mpl_vector_qdmull_high_lane_v2i64(int32x4_t a, int32x2_t v, const int lane); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmull_high_lane_s32( + int32x4_t a, int32x2_t v, const int lane) { + return __builtin_mpl_vector_qdmull_high_lane_v2i64(a, v, lane); +} -int64x2_t __builtin_mpl_vector_mlal_i64v2(int64x2_t a, int32x2_t b, int32x2_t c); -#define vmlal_s32(a, b, c) __builtin_mpl_vector_mlal_i64v2(a, b, c) +int32x4_t __builtin_mpl_vector_qdmull_laneq_v4i32(int16x4_t a, int16x8_t v, const int lane); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmull_laneq_s16( + int16x4_t a, int16x8_t v, const int lane) { + return __builtin_mpl_vector_qdmull_laneq_v4i32(a, v, lane); +} -uint16x8_t __builtin_mpl_vector_mlal_u16v8(uint16x8_t a, uint8x8_t b, uint8x8_t c); -#define vmlal_u8(a, b, c) __builtin_mpl_vector_mlal_u16v8(a, b, c) +int64x2_t __builtin_mpl_vector_qdmull_laneq_v2i64(int32x2_t a, int32x4_t v, const int lane); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmull_laneq_s32( + int32x2_t a, int32x4_t v, const int lane) { + return __builtin_mpl_vector_qdmull_laneq_v2i64(a, v, lane); +} -uint32x4_t __builtin_mpl_vector_mlal_u32v4(uint32x4_t a, uint16x4_t b, uint16x4_t c); -#define vmlal_u16(a, b, c) __builtin_mpl_vector_mlal_u32v4(a, b, c) +extern inline int32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmullh_laneq_s16( + int16_t a, int16x8_t v, const int lane) { + return vgetq_lane_s32(vqdmull_laneq_s16((int16x4_t){a}, v, lane), 0); +} -uint64x2_t __builtin_mpl_vector_mlal_u64v2(uint64x2_t a, uint32x2_t b, uint32x2_t c); -#define vmlal_u32(a, b, c) __builtin_mpl_vector_mlal_u64v2(a, b, c) +extern inline int64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmulls_laneq_s32( + int32_t a, int32x4_t v, const int lane) { + return vgetq_lane_s64(vqdmull_laneq_s32((int32x2_t){a}, v, lane), 0); +} -int16x8_t __builtin_mpl_vector_mlal_high_i16v8(int16x8_t a, int8x16_t b, int8x16_t c); -#define vmlal_high_s8(a, b, c) __builtin_mpl_vector_mlal_high_i16v8(a, b, c) +int32x4_t __builtin_mpl_vector_qdmull_high_laneq_v4i32(int16x8_t a, int16x8_t v, const int lane); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmull_high_laneq_s16( + int16x8_t a, int16x8_t v, const int lane) { + return __builtin_mpl_vector_qdmull_high_laneq_v4i32(a, v, lane); +} -int32x4_t __builtin_mpl_vector_mlal_high_i32v4(int32x4_t a, int16x8_t b, int16x8_t c); -#define vmlal_high_s16(a, b, c) __builtin_mpl_vector_mlal_high_i32v4(a, b, c) +int64x2_t __builtin_mpl_vector_qdmull_high_laneq_v2i64(int32x4_t a, int32x4_t v, const int lane); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmull_high_laneq_s32( + int32x4_t a, int32x4_t v, const int lane) { + return __builtin_mpl_vector_qdmull_high_laneq_v2i64(a, v, lane); +} -int64x2_t __builtin_mpl_vector_mlal_high_i64v2(int64x2_t a, int32x4_t b, int32x4_t c); -#define vmlal_high_s32(a, b, c) __builtin_mpl_vector_mlal_high_i64v2(a, b, c) +int16x4_t __builtin_mpl_vector_qdmulh_n_v4i16(int16x4_t a, int16x4_t b); +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmulh_n_s16( + int16x4_t a, int16_t b) { + return __builtin_mpl_vector_qdmulh_n_v4i16(a, (int16x4_t){b}); +} -uint16x8_t __builtin_mpl_vector_mlal_high_u16v8(uint16x8_t a, uint8x16_t b, uint8x16_t c); -#define vmlal_high_u8(a, b, c) __builtin_mpl_vector_mlal_high_u16v8(a, b, c) +int16x8_t __builtin_mpl_vector_qdmulhq_n_v8i16(int16x8_t a, int16x8_t b); +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmulhq_n_s16( + int16x8_t a, int16_t b) { + return __builtin_mpl_vector_qdmulhq_n_v8i16(a, (int16x8_t){b}); +} -uint32x4_t __builtin_mpl_vector_mlal_high_u32v4(uint32x4_t a, uint16x8_t b, uint16x8_t c); -#define vmlal_high_u16(a, b, c) __builtin_mpl_vector_mlal_high_u32v4(a, b, c) +int32x2_t __builtin_mpl_vector_qdmulh_n_v2i32(int32x2_t a, int32x2_t b); +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmulh_n_s32( + int32x2_t a, int32_t b) { + return __builtin_mpl_vector_qdmulh_n_v2i32(a, (int32x2_t){b}); +} -uint64x2_t __builtin_mpl_vector_mlal_high_u64v2(uint64x2_t a, uint32x4_t b, uint32x4_t c); -#define vmlal_high_u32(a, b, c) __builtin_mpl_vector_mlal_high_u64v2(a, b, c) +int32x4_t __builtin_mpl_vector_qdmulhq_n_v4i32(int32x4_t a, int32x4_t b); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmulhq_n_s32( + int32x4_t a, int32_t b) { + return __builtin_mpl_vector_qdmulhq_n_v4i32(a, (int32x4_t){b}); +} -int16x8_t __builtin_mpl_vector_mlsl_i16v8(int16x8_t a, int8x8_t b, int8x8_t c); -#define vmlsl_s8(a, b, c) __builtin_mpl_vector_mlsl_i16v8(a, b, c) +int16x4_t __builtin_mpl_vector_qdmulh_lane_v4i16(int16x4_t a, int16x4_t v, const int lane); +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmulh_lane_s16( + int16x4_t a, int16x4_t v, const int lane) { + return __builtin_mpl_vector_qdmulh_lane_v4i16(a, v, lane); +} -int32x4_t __builtin_mpl_vector_mlsl_i32v4(int32x4_t a, int16x4_t b, int16x4_t c); -#define vmlsl_s16(a, b, c) __builtin_mpl_vector_mlsl_i32v4(a, b, c) +int16x8_t __builtin_mpl_vector_qdmulhq_lane_v8i16(int16x8_t a, int16x4_t v, const int lane); +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmulhq_lane_s16( + int16x8_t a, int16x4_t v, const int lane) { + return __builtin_mpl_vector_qdmulhq_lane_v8i16(a, v, lane); +} -int64x2_t __builtin_mpl_vector_mlsl_i64v2(int64x2_t a, int32x2_t b, int32x2_t c); -#define vmlsl_s32(a, b, c) __builtin_mpl_vector_mlsl_i64v2(a, b, c) +int32x2_t __builtin_mpl_vector_qdmulh_lane_v2i32(int32x2_t a, int32x2_t v, const int lane); +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmulh_lane_s32( + int32x2_t a, int32x2_t v, const int lane) { + return __builtin_mpl_vector_qdmulh_lane_v2i32(a, v, lane); +} -uint16x8_t __builtin_mpl_vector_mlsl_u16v8(uint16x8_t a, uint8x8_t b, uint8x8_t c); -#define vmlsl_u8(a, b, c) __builtin_mpl_vector_mlsl_u16v8(a, b, c) +int32x4_t __builtin_mpl_vector_qdmulhq_lane_v4i32(int32x4_t a, int32x2_t v, const int lane); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmulhq_lane_s32( + int32x4_t a, int32x2_t v, const int lane) { + return __builtin_mpl_vector_qdmulhq_lane_v4i32(a, v, lane); +} -uint32x4_t __builtin_mpl_vector_mlsl_u32v4(uint32x4_t a, uint16x4_t b, uint16x4_t c); -#define vmlsl_u16(a, b, c) __builtin_mpl_vector_mlsl_u32v4(a, b, c) +extern inline int16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmulhh_lane_s16( + int16_t a, int16x4_t v, const int lane) { + return vget_lane_s16(vqdmulh_lane_s16((int16x4_t){a}, v, lane), 0); +} -uint64x2_t __builtin_mpl_vector_mlsl_u64v2(uint64x2_t a, uint32x2_t b, uint32x2_t c); -#define vmlsl_u32(a, b, c) __builtin_mpl_vector_mlsl_u64v2(a, b, c) +extern inline int32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmulhs_lane_s32( + int32_t a, int32x2_t v, const int lane) { + return vget_lane_s32(vqdmulh_lane_s32((int32x2_t){a}, v, lane), 0); +} -int16x8_t __builtin_mpl_vector_mlsl_high_i16v8(int16x8_t a, int8x16_t b, int8x16_t c); -#define vmlsl_high_s8(a, b, c) __builtin_mpl_vector_mlsl_high_i16v8(a, b, c) +int16x4_t __builtin_mpl_vector_qdmulh_laneq_v4i16(int16x4_t a, int16x8_t v, const int lane); +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmulh_laneq_s16( + int16x4_t a, int16x8_t v, const int lane) { + return __builtin_mpl_vector_qdmulh_laneq_v4i16(a, v, lane); +} -int32x4_t __builtin_mpl_vector_mlsl_high_i32v4(int32x4_t a, int16x8_t b, int16x8_t c); -#define vmlsl_high_s16(a, b, c) __builtin_mpl_vector_mlsl_high_i32v4(a, b, c) +int16x8_t __builtin_mpl_vector_qdmulhq_laneq_v8i16(int16x8_t a, int16x8_t v, const int lane); +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmulhq_laneq_s16( + int16x8_t a, int16x8_t v, const int lane) { + return __builtin_mpl_vector_qdmulhq_laneq_v8i16(a, v, lane); +} -int64x2_t __builtin_mpl_vector_mlsl_high_i64v2(int64x2_t a, int32x4_t b, int32x4_t c); -#define vmlsl_high_s32(a, b, c) __builtin_mpl_vector_mlsl_high_i64v2(a, b, c) +int32x2_t __builtin_mpl_vector_qdmulh_laneq_v2i32(int32x2_t a, int32x4_t v, const int lane); +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmulh_laneq_s32( + int32x2_t a, int32x4_t v, const int lane) { + return __builtin_mpl_vector_qdmulh_laneq_v2i32(a, v, lane); +} -uint16x8_t __builtin_mpl_vector_mlsl_high_u16v8(uint16x8_t a, uint8x16_t b, uint8x16_t c); -#define vmlsl_high_u8(a, b, c) __builtin_mpl_vector_mlsl_high_u16v8(a, b, c) +int32x4_t __builtin_mpl_vector_qdmulhq_laneq_v4i32(int32x4_t a, int32x4_t v, const int lane); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmulhq_laneq_s32( + int32x4_t a, int32x4_t v, const int lane) { + return __builtin_mpl_vector_qdmulhq_laneq_v4i32(a, v, lane); +} -uint32x4_t __builtin_mpl_vector_mlsl_high_u32v4(uint32x4_t a, uint16x8_t b, uint16x8_t c); -#define vmlsl_high_u16(a, b, c) __builtin_mpl_vector_mlsl_high_u32v4(a, b, c) +extern inline int16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmulhh_laneq_s16( + int16_t a, int16x8_t v, const int lane) { + return vget_lane_s16(vqdmulh_laneq_s16((int16x4_t){a}, v, lane), 0); +} -uint64x2_t __builtin_mpl_vector_mlsl_high_u64v2(uint64x2_t a, uint32x4_t b, uint32x4_t c); -#define vmlsl_high_u32(a, b, c) __builtin_mpl_vector_mlsl_high_u64v2(a, b, c) +extern inline int32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmulhs_laneq_s32( + int32_t a, int32x4_t v, const int lane) { + return vget_lane_s32(vqdmulh_laneq_s32((int32x2_t){a}, v, lane), 0); +} -int16x4_t __builtin_mpl_vector_qdmulh_i16v4(int16x4_t a, int16x4_t b); -#define vqdmulh_s16(a, b) __builtin_mpl_vector_qdmulh_i16v4(a, b) +int16x4_t __builtin_mpl_vector_qrdmulh_n_v4i16(int16x4_t a, int16x4_t b); +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrdmulh_n_s16( + int16x4_t a, int16_t b) { + return __builtin_mpl_vector_qrdmulh_n_v4i16(a, (int16x4_t){b}); +} -int16x8_t __builtin_mpl_vector_qdmulhq_i16v8(int16x8_t a, int16x8_t b); -#define vqdmulhq_s16(a, b) __builtin_mpl_vector_qdmulhq_i16v8(a, b) +int16x8_t __builtin_mpl_vector_qrdmulhq_n_v8i16(int16x8_t a, int16x8_t b); +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrdmulhq_n_s16( + int16x8_t a, int16_t b) { + return __builtin_mpl_vector_qrdmulhq_n_v8i16(a, (int16x8_t){b}); +} -int32x2_t __builtin_mpl_vector_qdmulh_i32v2(int32x2_t a, int32x2_t b); -#define vqdmulh_s32(a, b) __builtin_mpl_vector_qdmulh_i32v2(a, b) +int32x2_t __builtin_mpl_vector_qrdmulh_n_v2i32(int32x2_t a, int32x2_t b); +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrdmulh_n_s32( + int32x2_t a, int32_t b) { + return __builtin_mpl_vector_qrdmulh_n_v2i32(a, (int32x2_t){b}); +} -int32x4_t __builtin_mpl_vector_qdmulhq_i32v4(int32x4_t a, int32x4_t b); -#define vqdmulhq_s32(a, b) __builtin_mpl_vector_qdmulhq_i32v4(a, b) +int32x4_t __builtin_mpl_vector_qrdmulhq_n_v4i32(int32x4_t a, int32x4_t b); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrdmulhq_n_s32( + int32x4_t a, int32_t b) { + return __builtin_mpl_vector_qrdmulhq_n_v4i32(a, (int32x4_t){b}); +} -static inline int16_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqdmulhh_s16(int16_t a, int16_t b) { - return vget_lane_s16(vqdmulh_s16((int16x4_t){a}, (int16x4_t){b}), 0); +int16x4_t __builtin_mpl_vector_qrdmulh_lane_v4i16(int16x4_t a, int16x4_t v, const int lane); +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrdmulh_lane_s16( + int16x4_t a, int16x4_t v, const int lane) { + return __builtin_mpl_vector_qrdmulh_lane_v4i16(a, v, lane); } -static inline int32_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqdmulhs_s32(int32_t a, int32_t b) { - return vget_lane_s32(vqdmulh_s32((int32x2_t){a}, (int32x2_t){b}), 0); +int16x8_t __builtin_mpl_vector_qrdmulhq_lane_v8i16(int16x8_t a, int16x4_t v, const int lane); +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrdmulhq_lane_s16( + int16x8_t a, int16x4_t v, const int lane) { + return __builtin_mpl_vector_qrdmulhq_lane_v8i16(a, v, lane); } -int16x4_t __builtin_mpl_vector_qrdmulh_i16v4(int16x4_t a, int16x4_t b); -#define vqrdmulh_s16(a, b) __builtin_mpl_vector_qrdmulh_i16v4(a, b) +int32x2_t __builtin_mpl_vector_qrdmulh_lane_v2i32(int32x2_t a, int32x2_t v, const int lane); +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrdmulh_lane_s32( + int32x2_t a, int32x2_t v, const int lane) { + return __builtin_mpl_vector_qrdmulh_lane_v2i32(a, v, lane); +} -int16x8_t __builtin_mpl_vector_qrdmulhq_i16v8(int16x8_t a, int16x8_t b); -#define vqrdmulhq_s16(a, b) __builtin_mpl_vector_qrdmulhq_i16v8(a, b) +int32x4_t __builtin_mpl_vector_qrdmulhq_lane_v4i32(int32x4_t a, int32x2_t v, const int lane); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrdmulhq_lane_s32( + int32x4_t a, int32x2_t v, const int lane) { + return __builtin_mpl_vector_qrdmulhq_lane_v4i32(a, v, lane); +} -int32x2_t __builtin_mpl_vector_qrdmulh_i32v2(int32x2_t a, int32x2_t b); -#define vqrdmulh_s32(a, b) __builtin_mpl_vector_qrdmulh_i32v2(a, b) +extern inline int16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrdmulhh_lane_s16( + int16_t a, int16x4_t v, const int lane) { + return vget_lane_s16(vqrdmulh_lane_s16((int16x4_t){a}, v, lane), 0); +} -int32x4_t __builtin_mpl_vector_qrdmulhq_i32v4(int32x4_t a, int32x4_t b); -#define vqrdmulhq_s32(a, b) __builtin_mpl_vector_qrdmulhq_i32v4(a, b) +extern inline int32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrdmulhs_lane_s32( + int32_t a, int32x2_t v, const int lane) { + return vget_lane_s32(vqrdmulh_lane_s32((int32x2_t){a}, v, lane), 0); +} -static inline int16_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqrdmulhh_s16(int16_t a, int16_t b) { - return vget_lane_s16(vqrdmulh_s16((int16x4_t){a}, (int16x4_t){b}), 0); +int16x4_t __builtin_mpl_vector_qrdmulh_laneq_v4i16(int16x4_t a, int16x8_t v, const int lane); +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrdmulh_laneq_s16( + int16x4_t a, int16x8_t v, const int lane) { + return __builtin_mpl_vector_qrdmulh_laneq_v4i16(a, v, lane); } -static inline int32_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqrdmulhs_s32(int32_t a, int32_t b) { - return vget_lane_s32(vqrdmulh_s32((int32x2_t){a}, (int32x2_t){b}), 0); +int16x8_t __builtin_mpl_vector_qrdmulhq_laneq_v8i16(int16x8_t a, int16x8_t v, const int lane); +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrdmulhq_laneq_s16( + int16x8_t a, int16x8_t v, const int lane) { + return __builtin_mpl_vector_qrdmulhq_laneq_v8i16(a, v, lane); } -int32x4_t __builtin_mpl_vector_qdmull_i32v4(int16x4_t a, int16x4_t b); -#define vqdmull_s16(a, b) __builtin_mpl_vector_qdmull_i32v4(a, b) +int32x2_t __builtin_mpl_vector_qrdmulh_laneq_v2i32(int32x2_t a, int32x4_t v, const int lane); +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrdmulh_laneq_s32( + int32x2_t a, int32x4_t v, const int lane) { + return __builtin_mpl_vector_qrdmulh_laneq_v2i32(a, v, lane); +} -int64x2_t __builtin_mpl_vector_qdmull_i64v2(int32x2_t a, int32x2_t b); -#define vqdmull_s32(a, b) __builtin_mpl_vector_qdmull_i64v2(a, b) +int32x4_t __builtin_mpl_vector_qrdmulhq_laneq_v4i32(int32x4_t a, int32x4_t v, const int lane); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrdmulhq_laneq_s32( + int32x4_t a, int32x4_t v, const int lane) { + return __builtin_mpl_vector_qrdmulhq_laneq_v4i32(a, v, lane); +} -static inline int32_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqdmullh_s16(int16_t a, int16_t b) { - return vgetq_lane_s32(vqdmull_s16((int16x4_t){a}, (int16x4_t){b}), 0); +extern inline int16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrdmulhh_laneq_s16( + int16_t a, int16x8_t v, const int lane) { + return vget_lane_s16(vqrdmulh_laneq_s16((int16x4_t){a}, v, lane), 0); } -static inline int64_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqdmulls_s32(int32_t a, int32_t b) { - return vgetq_lane_s64(vqdmull_s32((int32x2_t){a}, (int32x2_t){b}), 0); +extern inline int32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrdmulhs_laneq_s32( + int32_t a, int32x4_t v, const int lane) { + return vget_lane_s32(vqrdmulh_laneq_s32((int32x2_t){a}, v, lane), 0); } -int32x4_t __builtin_mpl_vector_qdmull_high_i32v4(int16x8_t a, int16x8_t b); -#define vqdmull_high_s16(a, b) __builtin_mpl_vector_qdmull_high_i32v4(a, b) +int32x4_t __builtin_mpl_vector_qdmlal_n_v4i32(int32x4_t a, int16x4_t b, int16x4_t c); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmlal_n_s16( + int32x4_t a, int16x4_t b, int16_t c) { + return __builtin_mpl_vector_qdmlal_n_v4i32(a, b, (int16x4_t){c}); +} -int64x2_t __builtin_mpl_vector_qdmull_high_i64v2(int32x4_t a, int32x4_t b); -#define vqdmull_high_s32(a, b) __builtin_mpl_vector_qdmull_high_i64v2(a, b) +int64x2_t __builtin_mpl_vector_qdmlal_n_v2i64(int64x2_t a, int32x2_t b, int32x2_t c); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmlal_n_s32( + int64x2_t a, int32x2_t b, int32_t c) { + return __builtin_mpl_vector_qdmlal_n_v2i64(a, b, (int32x2_t){c}); +} -int32x4_t __builtin_mpl_vector_qdmlal_i32v4(int32x4_t a, int16x4_t b, int16x4_t c); -#define vqdmlal_s16(a, b, c) __builtin_mpl_vector_qdmlal_i32v4(a, b, c) +int32x4_t __builtin_mpl_vector_qdmlal_high_n_v4i32(int32x4_t a, int16x8_t b, int16x8_t c); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmlal_high_n_s16( + int32x4_t a, int16x8_t b, int16_t c) { + return __builtin_mpl_vector_qdmlal_high_n_v4i32(a, b, (int16x8_t){c}); +} -int64x2_t __builtin_mpl_vector_qdmlal_i64v2(int64x2_t a, int32x2_t b, int32x2_t c); -#define vqdmlal_s32(a, b, c) __builtin_mpl_vector_qdmlal_i64v2(a, b, c) +int64x2_t __builtin_mpl_vector_qdmlal_high_n_v2i64(int64x2_t a, int32x4_t b, int32x4_t c); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmlal_high_n_s32( + int64x2_t a, int32x4_t b, int32_t c) { + return __builtin_mpl_vector_qdmlal_high_n_v2i64(a, b, (int32x4_t){c}); +} -static inline int32_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqdmlalh_s16(int32_t a, int16_t b, int16_t c) { - return vgetq_lane_s32(vqdmlal_s16((int32x4_t){a}, (int16x4_t){b}, (int16x4_t){c}), 0); +int32x4_t __builtin_mpl_vector_qdmlsl_n_v4i32(int32x4_t a, int16x4_t b, int16x4_t c); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmlsl_n_s16( + int32x4_t a, int16x4_t b, int16_t c) { + return __builtin_mpl_vector_qdmlsl_n_v4i32(a, b, (int16x4_t){c}); } -static inline int32_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqdmlals_s32(int32_t a, int16_t b, int16_t c) { - return vgetq_lane_s64(vqdmlal_s32((int64x2_t){a}, (int32x2_t){b}, (int32x2_t){c}), 0); +int64x2_t __builtin_mpl_vector_qdmlsl_n_v2i64(int64x2_t a, int32x2_t b, int32x2_t c); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmlsl_n_s32( + int64x2_t a, int32x2_t b, int32_t c) { + return __builtin_mpl_vector_qdmlsl_n_v2i64(a, b, (int32x2_t){c}); } -int32x4_t __builtin_mpl_vector_qdmlal_high_i32v4(int32x4_t a, int16x8_t b, int16x8_t c); -#define vqdmlal_high_s16(a, b, c) __builtin_mpl_vector_qdmlal_high_i32v4(a, b, c) +int32x4_t __builtin_mpl_vector_qdmlsl_high_n_v4i32(int32x4_t a, int16x8_t b, int16x8_t c); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmlsl_high_n_s16( + int32x4_t a, int16x8_t b, int16_t c) { + return __builtin_mpl_vector_qdmlsl_high_n_v4i32(a, b, (int16x8_t){c}); +} -int64x2_t __builtin_mpl_vector_qdmlal_high_i64v2(int64x2_t a, int32x4_t b, int32x4_t c); -#define vqdmlal_high_s32(a, b, c) __builtin_mpl_vector_qdmlal_high_i64v2(a, b, c) +int64x2_t __builtin_mpl_vector_qdmlsl_high_n_v2i64(int64x2_t a, int32x4_t b, int32x4_t c); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqdmlsl_high_n_s32( + int64x2_t a, int32x4_t b, int32_t c) { + return __builtin_mpl_vector_qdmlsl_high_n_v2i64(a, b, (int32x4_t){c}); +} -int32x4_t __builtin_mpl_vector_qdmlsl_i32v4(int32x4_t a, int16x4_t b, int16x4_t c); -#define vqdmlsl_s16(a, b, c) __builtin_mpl_vector_qdmlsl_i32v4(a, b, c) +int8x8_t __builtin_mpl_vector_hsub_v8i8(int8x8_t a, int8x8_t b); +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vhsub_s8( + int8x8_t a, int8x8_t b) { + return __builtin_mpl_vector_hsub_v8i8(a, b); +} -int64x2_t __builtin_mpl_vector_qdmlsl_i64v2(int64x2_t a, int32x2_t b, int32x2_t c); -#define vqdmlsl_s32(a, b, c) __builtin_mpl_vector_qdmlsl_i64v2(a, b, c) +int8x16_t __builtin_mpl_vector_hsubq_v16i8(int8x16_t a, int8x16_t b); +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vhsubq_s8( + int8x16_t a, int8x16_t b) { + return __builtin_mpl_vector_hsubq_v16i8(a, b); +} -static inline int32_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqdmlslh_s16(int32_t a, int16_t b, int16_t c) { - return vgetq_lane_s32(vqdmlsl_s16((int32x4_t){a}, (int16x4_t){b}, (int16x4_t){c}), 0); +int16x4_t __builtin_mpl_vector_hsub_v4i16(int16x4_t a, int16x4_t b); +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vhsub_s16( + int16x4_t a, int16x4_t b) { + return __builtin_mpl_vector_hsub_v4i16(a, b); } -static inline int32_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqdmlsls_s32(int32_t a, int16_t b, int16_t c) { - return vgetq_lane_s64(vqdmlsl_s32((int64x2_t){a}, (int32x2_t){b}, (int32x2_t){c}), 0); +int16x8_t __builtin_mpl_vector_hsubq_v8i16(int16x8_t a, int16x8_t b); +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vhsubq_s16( + int16x8_t a, int16x8_t b) { + return __builtin_mpl_vector_hsubq_v8i16(a, b); } -int32x4_t __builtin_mpl_vector_qdmlsl_high_i32v4(int32x4_t a, int16x8_t b, int16x8_t c); -#define vqdmlsl_high_s16(a, b, c) __builtin_mpl_vector_qdmlsl_high_i32v4(a, b, c) +int32x2_t __builtin_mpl_vector_hsub_v2i32(int32x2_t a, int32x2_t b); +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vhsub_s32( + int32x2_t a, int32x2_t b) { + return __builtin_mpl_vector_hsub_v2i32(a, b); +} -int64x2_t __builtin_mpl_vector_qdmlsl_high_i64v2(int64x2_t a, int32x4_t b, int32x4_t c); -#define vqdmlsl_high_s32(a, b, c) __builtin_mpl_vector_qdmlsl_high_i64v2(a, b, c) +int32x4_t __builtin_mpl_vector_hsubq_v4i32(int32x4_t a, int32x4_t b); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vhsubq_s32( + int32x4_t a, int32x4_t b) { + return __builtin_mpl_vector_hsubq_v4i32(a, b); +} -int32x4_t __builtin_mpl_vector_qdmlal_lane_i32v4(int32x4_t a, int16x4_t b, int16x4_t v, const int lane); -#define vqdmlal_lane_s16(a, b, v, lane) __builtin_mpl_vector_qdmlal_lane_i32v4(a, b, v, lane) +uint8x8_t __builtin_mpl_vector_hsub_v8u8(uint8x8_t a, uint8x8_t b); +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vhsub_u8( + uint8x8_t a, uint8x8_t b) { + return __builtin_mpl_vector_hsub_v8u8(a, b); +} -int64x2_t __builtin_mpl_vector_qdmlal_lane_i64v2(int64x2_t a, int32x2_t b, int32x2_t v, const int lane); -#define vqdmlal_lane_s32(a, b, v, lane) __builtin_mpl_vector_qdmlal_lane_i64v2(a, b, v, lane) +uint8x16_t __builtin_mpl_vector_hsubq_v16u8(uint8x16_t a, uint8x16_t b); +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vhsubq_u8( + uint8x16_t a, uint8x16_t b) { + return __builtin_mpl_vector_hsubq_v16u8(a, b); +} -static inline int32_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqdmlalh_lane_s16(int32_t a, int16_t b, int16x4_t v, const int lane) { - return vgetq_lane_s32(vqdmlal_lane_s16((int32x4_t){a}, (int16x4_t){b}, v, lane), 0); +uint16x4_t __builtin_mpl_vector_hsub_v4u16(uint16x4_t a, uint16x4_t b); +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vhsub_u16( + uint16x4_t a, uint16x4_t b) { + return __builtin_mpl_vector_hsub_v4u16(a, b); } -static inline int64_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqdmlals_lane_s32(int64_t a, int32_t b, int32x2_t v, const int lane) { - return vgetq_lane_s64(vqdmlal_lane_s32((int64x2_t){a}, (int32x2_t){b}, v, lane), 0); +uint16x8_t __builtin_mpl_vector_hsubq_v8u16(uint16x8_t a, uint16x8_t b); +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vhsubq_u16( + uint16x8_t a, uint16x8_t b) { + return __builtin_mpl_vector_hsubq_v8u16(a, b); } -int32x4_t __builtin_mpl_vector_qdmlal_high_lane_i32v4(int32x4_t a, int16x8_t b, int16x4_t v, const int lane); -#define vqdmlal_high_lane_s16(a, b, v, lane) __builtin_mpl_vector_qdmlal_high_lane_i32v4(a, b, v, lane) +uint32x2_t __builtin_mpl_vector_hsub_v2u32(uint32x2_t a, uint32x2_t b); +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vhsub_u32( + uint32x2_t a, uint32x2_t b) { + return __builtin_mpl_vector_hsub_v2u32(a, b); +} -int64x2_t __builtin_mpl_vector_qdmlal_high_lane_i64v2(int64x2_t a, int32x4_t b, int32x2_t v, const int lane); -#define vqdmlal_high_lane_s32(a, b, v, lane) __builtin_mpl_vector_qdmlal_high_lane_i64v2(a, b, v, lane) +uint32x4_t __builtin_mpl_vector_hsubq_v4u32(uint32x4_t a, uint32x4_t b); +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vhsubq_u32( + uint32x4_t a, uint32x4_t b) { + return __builtin_mpl_vector_hsubq_v4u32(a, b); +} -int32x4_t __builtin_mpl_vector_qdmlal_laneq_i32v4(int32x4_t a, int16x4_t b, int16x8_t v, const int lane); -#define vqdmlal_laneq_s16(a, b, v, lane) __builtin_mpl_vector_qdmlal_laneq_i32v4(a, b, v, lane) +int8x8_t __builtin_mpl_vector_subhn_v8i8(int16x8_t a, int16x8_t b); +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsubhn_s16( + int16x8_t a, int16x8_t b) { + return __builtin_mpl_vector_subhn_v8i8(a, b); +} -int64x2_t __builtin_mpl_vector_qdmlal_laneq_i64v2(int64x2_t a, int32x2_t b, int32x4_t v, const int lane); -#define vqdmlal_laneq_s32(a, b, v, lane) __builtin_mpl_vector_qdmlal_laneq_i64v2(a, b, v, lane) +int16x4_t __builtin_mpl_vector_subhn_v4i16(int32x4_t a, int32x4_t b); +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsubhn_s32( + int32x4_t a, int32x4_t b) { + return __builtin_mpl_vector_subhn_v4i16(a, b); +} -static inline int32_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqdmlalh_laneq_s16(int32_t a, int16_t b, int16x8_t v, const int lane) { - return vgetq_lane_s32(vqdmlal_laneq_s16((int32x4_t){a}, (int16x4_t){b}, v, lane), 0); +int32x2_t __builtin_mpl_vector_subhn_v2i32(int64x2_t a, int64x2_t b); +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsubhn_s64( + int64x2_t a, int64x2_t b) { + return __builtin_mpl_vector_subhn_v2i32(a, b); } -static inline int64_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqdmlals_laneq_s32(int64_t a, int32_t b, int32x4_t v, const int lane) { - return vgetq_lane_s64(vqdmlal_laneq_s32((int64x2_t){a}, (int32x2_t){b}, v, lane), 0); +uint8x8_t __builtin_mpl_vector_subhn_v8u8(uint16x8_t a, uint16x8_t b); +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsubhn_u16( + uint16x8_t a, uint16x8_t b) { + return __builtin_mpl_vector_subhn_v8u8(a, b); } -int32x4_t __builtin_mpl_vector_qdmlal_high_laneq_i32v4(int32x4_t a, int16x8_t b, int16x8_t v, const int lane); -#define vqdmlal_high_laneq_s16(a, b, v, lane) __builtin_mpl_vector_qdmlal_high_laneq_i32v4(a, b, v, lane) +uint16x4_t __builtin_mpl_vector_subhn_v4u16(uint32x4_t a, uint32x4_t b); +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsubhn_u32( + uint32x4_t a, uint32x4_t b) { + return __builtin_mpl_vector_subhn_v4u16(a, b); +} -int64x2_t __builtin_mpl_vector_qdmlal_high_laneq_i64v2(int64x2_t a, int32x4_t b, int32x4_t v, const int lane); -#define vqdmlal_high_laneq_s32(a, b, v, lane) __builtin_mpl_vector_qdmlal_high_laneq_i64v2(a, b, v, lane) +uint32x2_t __builtin_mpl_vector_subhn_v2u32(uint64x2_t a, uint64x2_t b); +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsubhn_u64( + uint64x2_t a, uint64x2_t b) { + return __builtin_mpl_vector_subhn_v2u32(a, b); +} -int32x4_t __builtin_mpl_vector_qdmlsl_lane_i32v4(int32x4_t a, int16x4_t b, int16x4_t v, const int lane); -#define vqdmlsl_lane_s16(a, b, v, lane) __builtin_mpl_vector_qdmlsl_lane_i32v4(a, b, v, lane) +int8x16_t __builtin_mpl_vector_subhn_high_v16i8(int8x8_t r, int16x8_t a, int16x8_t b); +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsubhn_high_s16( + int8x8_t r, int16x8_t a, int16x8_t b) { + return __builtin_mpl_vector_subhn_high_v16i8(r, a, b); +} -int64x2_t __builtin_mpl_vector_qdmlsl_lane_i64v2(int64x2_t a, int32x2_t b, int32x2_t v, const int lane); -#define vqdmlsl_lane_s32(a, b, v, lane) __builtin_mpl_vector_qdmlsl_lane_i64v2(a, b, v, lane) +int16x8_t __builtin_mpl_vector_subhn_high_v8i16(int16x4_t r, int32x4_t a, int32x4_t b); +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsubhn_high_s32( + int16x4_t r, int32x4_t a, int32x4_t b) { + return __builtin_mpl_vector_subhn_high_v8i16(r, a, b); +} -static inline int32_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqdmlslh_lane_s16(int32_t a, int16_t b, int16x4_t v, const int lane) { - return vgetq_lane_s32(vqdmlsl_lane_s16((int32x4_t){a}, (int16x4_t){b}, v, lane), 0); +int32x4_t __builtin_mpl_vector_subhn_high_v4i32(int32x2_t r, int64x2_t a, int64x2_t b); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsubhn_high_s64( + int32x2_t r, int64x2_t a, int64x2_t b) { + return __builtin_mpl_vector_subhn_high_v4i32(r, a, b); } -static inline int64_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqdmlsls_lane_s32(int64_t a, int32_t b, int32x2_t v, const int lane) { - return vgetq_lane_s64(vqdmlsl_lane_s32((int64x2_t){a}, (int32x2_t){b}, v, lane), 0); +uint8x16_t __builtin_mpl_vector_subhn_high_v16u8(uint8x8_t r, uint16x8_t a, uint16x8_t b); +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsubhn_high_u16( + uint8x8_t r, uint16x8_t a, uint16x8_t b) { + return __builtin_mpl_vector_subhn_high_v16u8(r, a, b); } -int32x4_t __builtin_mpl_vector_qdmlsl_high_lane_i32v4(int32x4_t a, int16x8_t b, int16x4_t v, const int lane); -#define vqdmlsl_high_lane_s16(a, b, v, lane) __builtin_mpl_vector_qdmlsl_high_lane_i32v4(a, b, v, lane) +uint16x8_t __builtin_mpl_vector_subhn_high_v8u16(uint16x4_t r, uint32x4_t a, uint32x4_t b); +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsubhn_high_u32( + uint16x4_t r, uint32x4_t a, uint32x4_t b) { + return __builtin_mpl_vector_subhn_high_v8u16(r, a, b); +} -int64x2_t __builtin_mpl_vector_qdmlsl_high_lane_i64v2(int64x2_t a, int32x4_t b, int32x2_t v, const int lane); -#define vqdmlsl_high_lane_s32(a, b, v, lane) __builtin_mpl_vector_qdmlsl_high_lane_i64v2(a, b, v, lane) +uint32x4_t __builtin_mpl_vector_subhn_high_v4u32(uint32x2_t r, uint64x2_t a, uint64x2_t b); +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsubhn_high_u64( + uint32x2_t r, uint64x2_t a, uint64x2_t b) { + return __builtin_mpl_vector_subhn_high_v4u32(r, a, b); +} -int32x4_t __builtin_mpl_vector_qdmlsl_laneq_i32v4(int32x4_t a, int16x4_t b, int16x8_t v, const int lane); -#define vqdmlsl_laneq_s16(a, b, v, lane) __builtin_mpl_vector_qdmlsl_laneq_i32v4(a, b, v, lane) +int8x8_t __builtin_mpl_vector_rsubhn_v8i8(int16x8_t a, int16x8_t b); +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrsubhn_s16( + int16x8_t a, int16x8_t b) { + return __builtin_mpl_vector_rsubhn_v8i8(a, b); +} -int64x2_t __builtin_mpl_vector_qdmlsl_laneq_i64v2(int64x2_t a, int32x2_t b, int32x4_t v, const int lane); -#define vqdmlsl_laneq_s32(a, b, v, lane) __builtin_mpl_vector_qdmlsl_laneq_i64v2(a, b, v, lane) +int16x4_t __builtin_mpl_vector_rsubhn_v4i16(int32x4_t a, int32x4_t b); +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrsubhn_s32( + int32x4_t a, int32x4_t b) { + return __builtin_mpl_vector_rsubhn_v4i16(a, b); +} -static inline int32_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqdmlslh_laneq_s16(int32_t a, int16_t b, int16x8_t v, const int lane) { - return vgetq_lane_s32(vqdmlsl_laneq_s16((int32x4_t){a}, (int16x4_t){b}, v, lane), 0); +int32x2_t __builtin_mpl_vector_rsubhn_v2i32(int64x2_t a, int64x2_t b); +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrsubhn_s64( + int64x2_t a, int64x2_t b) { + return __builtin_mpl_vector_rsubhn_v2i32(a, b); } -static inline int64_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqdmlsls_laneq_s32(int64_t a, int32_t b, int32x4_t v, const int lane) { - return vgetq_lane_s64(vqdmlsl_laneq_s32((int64x2_t){a}, (int32x2_t){b}, v, lane), 0); +uint8x8_t __builtin_mpl_vector_rsubhn_v8u8(uint16x8_t a, uint16x8_t b); +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrsubhn_u16( + uint16x8_t a, uint16x8_t b) { + return __builtin_mpl_vector_rsubhn_v8u8(a, b); } -int32x4_t __builtin_mpl_vector_qdmlsl_high_laneq_i32v4(int32x4_t a, int16x8_t b, int16x8_t v, const int lane); -#define vqdmlsl_high_laneq_s16(a, b, v, lane) __builtin_mpl_vector_qdmlsl_high_laneq_i32v4(a, b, v, lane) +uint16x4_t __builtin_mpl_vector_rsubhn_v4u16(uint32x4_t a, uint32x4_t b); +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrsubhn_u32( + uint32x4_t a, uint32x4_t b) { + return __builtin_mpl_vector_rsubhn_v4u16(a, b); +} -int64x2_t __builtin_mpl_vector_qdmlsl_high_laneq_i64v2(int64x2_t a, int32x4_t b, int32x4_t v, const int lane); -#define vqdmlsl_high_laneq_s32(a, b, v, lane) __builtin_mpl_vector_qdmlsl_high_laneq_i64v2(a, b, v, lane) +uint32x2_t __builtin_mpl_vector_rsubhn_v2u32(uint64x2_t a, uint64x2_t b); +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrsubhn_u64( + uint64x2_t a, uint64x2_t b) { + return __builtin_mpl_vector_rsubhn_v2u32(a, b); +} -int16x8_t __builtin_mpl_vector_mull_i16v8(int8x8_t a, int8x8_t b); -#define vmull_s8(a, b) __builtin_mpl_vector_mull_i16v8(a, b) +int8x16_t __builtin_mpl_vector_rsubhn_high_v16i8(int8x8_t r, int16x8_t a, int16x8_t b); +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrsubhn_high_s16( + int8x8_t r, int16x8_t a, int16x8_t b) { + return __builtin_mpl_vector_rsubhn_high_v16i8(r, a, b); +} -int32x4_t __builtin_mpl_vector_mull_i32v4(int16x4_t a, int16x4_t b); -#define vmull_s16(a, b) __builtin_mpl_vector_mull_i32v4(a, b) +int16x8_t __builtin_mpl_vector_rsubhn_high_v8i16(int16x4_t r, int32x4_t a, int32x4_t b); +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrsubhn_high_s32( + int16x4_t r, int32x4_t a, int32x4_t b) { + return __builtin_mpl_vector_rsubhn_high_v8i16(r, a, b); +} -int64x2_t __builtin_mpl_vector_mull_i64v2(int32x2_t a, int32x2_t b); -#define vmull_s32(a, b) __builtin_mpl_vector_mull_i64v2(a, b) +int32x4_t __builtin_mpl_vector_rsubhn_high_v4i32(int32x2_t r, int64x2_t a, int64x2_t b); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrsubhn_high_s64( + int32x2_t r, int64x2_t a, int64x2_t b) { + return __builtin_mpl_vector_rsubhn_high_v4i32(r, a, b); +} -uint16x8_t __builtin_mpl_vector_mull_u16v8(uint8x8_t a, uint8x8_t b); -#define vmull_u8(a, b) __builtin_mpl_vector_mull_u16v8(a, b) +uint8x16_t __builtin_mpl_vector_rsubhn_high_v16u8(uint8x8_t r, uint16x8_t a, uint16x8_t b); +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrsubhn_high_u16( + uint8x8_t r, uint16x8_t a, uint16x8_t b) { + return __builtin_mpl_vector_rsubhn_high_v16u8(r, a, b); +} -uint32x4_t __builtin_mpl_vector_mull_u32v4(uint16x4_t a, uint16x4_t b); -#define vmull_u16(a, b) __builtin_mpl_vector_mull_u32v4(a, b) +uint16x8_t __builtin_mpl_vector_rsubhn_high_v8u16(uint16x4_t r, uint32x4_t a, uint32x4_t b); +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrsubhn_high_u32( + uint16x4_t r, uint32x4_t a, uint32x4_t b) { + return __builtin_mpl_vector_rsubhn_high_v8u16(r, a, b); +} -uint64x2_t __builtin_mpl_vector_mull_u64v2(uint32x2_t a, uint32x2_t b); -#define vmull_u32(a, b) __builtin_mpl_vector_mull_u64v2(a, b) +uint32x4_t __builtin_mpl_vector_rsubhn_high_v4u32(uint32x2_t r, uint64x2_t a, uint64x2_t b); +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrsubhn_high_u64( + uint32x2_t r, uint64x2_t a, uint64x2_t b) { + return __builtin_mpl_vector_rsubhn_high_v4u32(r, a, b); +} -int16x8_t __builtin_mpl_vector_mull_high_i16v8(int8x16_t a, int8x16_t b); -#define vmull_high_s8(a, b) __builtin_mpl_vector_mull_high_i16v8(a, b) +int8x8_t __builtin_mpl_vector_qsub_v8i8(int8x8_t a, int8x8_t b); +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqsub_s8( + int8x8_t a, int8x8_t b) { + return __builtin_mpl_vector_qsub_v8i8(a, b); +} -int32x4_t __builtin_mpl_vector_mull_high_i32v4(int16x8_t a, int16x8_t b); -#define vmull_high_s16(a, b) __builtin_mpl_vector_mull_high_i32v4(a, b) +int8x16_t __builtin_mpl_vector_qsubq_v16i8(int8x16_t a, int8x16_t b); +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqsubq_s8( + int8x16_t a, int8x16_t b) { + return __builtin_mpl_vector_qsubq_v16i8(a, b); +} -int64x2_t __builtin_mpl_vector_mull_high_i64v2(int32x4_t a, int32x4_t b); -#define vmull_high_s32(a, b) __builtin_mpl_vector_mull_high_i64v2(a, b) +int16x4_t __builtin_mpl_vector_qsub_v4i16(int16x4_t a, int16x4_t b); +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqsub_s16( + int16x4_t a, int16x4_t b) { + return __builtin_mpl_vector_qsub_v4i16(a, b); +} -uint16x8_t __builtin_mpl_vector_mull_high_u16v8(uint8x16_t a, uint8x16_t b); -#define vmull_high_u8(a, b) __builtin_mpl_vector_mull_high_u16v8(a, b) +int16x8_t __builtin_mpl_vector_qsubq_v8i16(int16x8_t a, int16x8_t b); +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqsubq_s16( + int16x8_t a, int16x8_t b) { + return __builtin_mpl_vector_qsubq_v8i16(a, b); +} -uint32x4_t __builtin_mpl_vector_mull_high_u32v4(uint16x8_t a, uint16x8_t b); -#define vmull_high_u16(a, b) __builtin_mpl_vector_mull_high_u32v4(a, b) +int32x2_t __builtin_mpl_vector_qsub_v2i32(int32x2_t a, int32x2_t b); +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqsub_s32( + int32x2_t a, int32x2_t b) { + return __builtin_mpl_vector_qsub_v2i32(a, b); +} -int32x4_t __builtin_mpl_vector_qdmull_n_i32v4(int16x4_t a, int16x4_t b); -static inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqdmull_n_s16(int16x4_t a, int16_t b) { - return __builtin_mpl_vector_qdmull_n_i32v4(a, (int16x4_t){b}); +int32x4_t __builtin_mpl_vector_qsubq_v4i32(int32x4_t a, int32x4_t b); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqsubq_s32( + int32x4_t a, int32x4_t b) { + return __builtin_mpl_vector_qsubq_v4i32(a, b); } -int64x2_t __builtin_mpl_vector_qdmull_n_i64v2(int32x2_t a, int32x2_t b); -static inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqdmull_n_s32(int32x2_t a, int32_t b) { - return __builtin_mpl_vector_qdmull_n_i64v2(a, (int32x2_t){b}); +int64x1_t __builtin_mpl_vector_qsub_v1i64(int64x1_t a, int64x1_t b); +extern inline int64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqsub_s64( + int64x1_t a, int64x1_t b) { + return __builtin_mpl_vector_qsub_v1i64(a, b); } -int32x4_t __builtin_mpl_vector_qdmull_high_n_i32v4(int16x8_t a, int16x8_t b); -static inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqdmull_high_n_s16(int16x8_t a, int16_t b) { - return __builtin_mpl_vector_qdmull_high_n_i32v4(a, (int16x8_t){b}); +int64x2_t __builtin_mpl_vector_qsubq_v2i64(int64x2_t a, int64x2_t b); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqsubq_s64( + int64x2_t a, int64x2_t b) { + return __builtin_mpl_vector_qsubq_v2i64(a, b); } -int64x2_t __builtin_mpl_vector_qdmull_high_n_i64v2(int32x4_t a, int32x4_t b); -static inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqdmull_high_n_s32(int32x4_t a, int32_t b) { - return __builtin_mpl_vector_qdmull_high_n_i64v2(a, (int32x4_t){b}); +uint8x8_t __builtin_mpl_vector_qsub_v8u8(uint8x8_t a, uint8x8_t b); +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqsub_u8( + uint8x8_t a, uint8x8_t b) { + return __builtin_mpl_vector_qsub_v8u8(a, b); } -int32x4_t __builtin_mpl_vector_qdmull_lane_i32v4(int16x4_t a, int16x4_t v, const int lane); -#define vqdmull_lane_s16(a, v, lane) __builtin_mpl_vector_qdmull_lane_i32v4(a, v, lane) +uint8x16_t __builtin_mpl_vector_qsubq_v16u8(uint8x16_t a, uint8x16_t b); +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqsubq_u8( + uint8x16_t a, uint8x16_t b) { + return __builtin_mpl_vector_qsubq_v16u8(a, b); +} -int64x2_t __builtin_mpl_vector_qdmull_lane_i64v2(int32x2_t a, int32x2_t v, const int lane); -#define vqdmull_lane_s32(a, v, lane) __builtin_mpl_vector_qdmull_lane_i64v2(a, v, lane) +uint16x4_t __builtin_mpl_vector_qsub_v4u16(uint16x4_t a, uint16x4_t b); +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqsub_u16( + uint16x4_t a, uint16x4_t b) { + return __builtin_mpl_vector_qsub_v4u16(a, b); +} -static inline int32_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqdmullh_lane_s16(int16_t a, int16x4_t v, const int lane) { - return vgetq_lane_s32(vqdmull_lane_s16((int16x4_t){a}, v, lane), 0); +uint16x8_t __builtin_mpl_vector_qsubq_v8u16(uint16x8_t a, uint16x8_t b); +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqsubq_u16( + uint16x8_t a, uint16x8_t b) { + return __builtin_mpl_vector_qsubq_v8u16(a, b); } -static inline int64_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqdmulls_lane_s32(int32_t a, int32x2_t v, const int lane) { - return vgetq_lane_s64(vqdmull_lane_s32((int32x2_t){a}, v, lane), 0); +uint32x2_t __builtin_mpl_vector_qsub_v2u32(uint32x2_t a, uint32x2_t b); +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqsub_u32( + uint32x2_t a, uint32x2_t b) { + return __builtin_mpl_vector_qsub_v2u32(a, b); } -int32x4_t __builtin_mpl_vector_qdmull_high_lane_i32v4(int16x8_t a, int16x4_t v, const int lane); -#define vqdmull_high_lane_s16(a, v, lane) __builtin_mpl_vector_qdmull_high_lane_i32v4(a, v, lane) +uint32x4_t __builtin_mpl_vector_qsubq_v4u32(uint32x4_t a, uint32x4_t b); +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqsubq_u32( + uint32x4_t a, uint32x4_t b) { + return __builtin_mpl_vector_qsubq_v4u32(a, b); +} -int64x2_t __builtin_mpl_vector_qdmull_high_lane_i64v2(int32x4_t a, int32x2_t v, const int lane); -#define vqdmull_high_lane_s32(a, v, lane) __builtin_mpl_vector_qdmull_high_lane_i64v2(a, v, lane) +uint64x1_t __builtin_mpl_vector_qsub_v1u64(uint64x1_t a, uint64x1_t b); +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqsub_u64( + uint64x1_t a, uint64x1_t b) { + return __builtin_mpl_vector_qsub_v1u64(a, b); +} -int32x4_t __builtin_mpl_vector_qdmull_laneq_i32v4(int16x4_t a, int16x8_t v, const int lane); -#define vqdmull_laneq_s16(a, v, lane) __builtin_mpl_vector_qdmull_laneq_i32v4(a, v, lane) +uint64x2_t __builtin_mpl_vector_qsubq_v2u64(uint64x2_t a, uint64x2_t b); +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqsubq_u64( + uint64x2_t a, uint64x2_t b) { + return __builtin_mpl_vector_qsubq_v2u64(a, b); +} -int64x2_t __builtin_mpl_vector_qdmull_laneq_i64v2(int32x2_t a, int32x4_t v, const int lane); -#define vqdmull_laneq_s32(a, v, lane) __builtin_mpl_vector_qdmull_laneq_i64v2(a, v, lane) +extern inline int8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqsubb_s8( + int8_t a, int8_t b) { + return vget_lane_s8(vqsub_s8((int8x8_t){a}, (int8x8_t){b}), 0); +} -static inline int32_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqdmullh_laneq_s16(int16_t a, int16x8_t v, const int lane) { - return vgetq_lane_s32(vqdmull_laneq_s16((int16x4_t){a}, v, lane), 0); +extern inline int16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqsubh_s16( + int16_t a, int16_t b) { + return vget_lane_s16(vqsub_s16((int16x4_t){a}, (int16x4_t){b}), 0); } -static inline int64_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqdmulls_laneq_s32(int32_t a, int32x4_t v, const int lane) { - return vgetq_lane_s64(vqdmull_laneq_s32((int32x2_t){a}, v, lane), 0); +extern inline int32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqsubs_s32( + int32_t a, int32_t b) { + return vget_lane_s32(vqsub_s32((int32x2_t){a}, (int32x2_t){b}), 0); } -int32x4_t __builtin_mpl_vector_qdmull_high_laneq_i32v4(int16x8_t a, int16x8_t v, const int lane); -#define vqdmull_high_laneq_s16(a, v, lane) __builtin_mpl_vector_qdmull_high_laneq_i32v4(a, v, lane) +extern inline int64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqsubd_s64( + int64_t a, int64_t b) { + return vget_lane_s64(vqsub_s64((int64x1_t){a}, (int64x1_t){b}), 0); +} -int64x2_t __builtin_mpl_vector_qdmull_high_laneq_i64v2(int32x4_t a, int32x4_t v, const int lane); -#define vqdmull_high_laneq_s32(a, v, lane) __builtin_mpl_vector_qdmull_high_laneq_i64v2(a, v, lane) +extern inline uint8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqsubb_u8( + uint8_t a, uint8_t b) { + return vget_lane_u8(vqsub_u8((uint8x8_t){a}, (uint8x8_t){b}), 0); +} -int16x4_t __builtin_mpl_vector_qdmulh_n_i16v4(int16x4_t a, int16x4_t b); -static inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqdmulh_n_s16(int16x4_t a, int16_t b) { - return __builtin_mpl_vector_qdmulh_n_i16v4(a, (int16x4_t){b}); +extern inline uint16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqsubh_u16( + uint16_t a, uint16_t b) { + return vget_lane_u16(vqsub_u16((uint16x4_t){a}, (uint16x4_t){b}), 0); } -int16x8_t __builtin_mpl_vector_qdmulhq_n_i16v8(int16x8_t a, int16x8_t b); -static inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqdmulhq_n_s16(int16x8_t a, int16_t b) { - return __builtin_mpl_vector_qdmulhq_n_i16v8(a, (int16x8_t){b}); +extern inline uint32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqsubs_u32( + uint32_t a, uint32_t b) { + return vget_lane_u32(vqsub_u32((uint32x2_t){a}, (uint32x2_t){b}), 0); } -int32x2_t __builtin_mpl_vector_qdmulh_n_i32v2(int32x2_t a, int32x2_t b); -static inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqdmulh_n_s32(int32x2_t a, int32_t b) { - return __builtin_mpl_vector_qdmulh_n_i32v2(a, (int32x2_t){b}); +extern inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqsubd_u64( + uint64_t a, uint64_t b) { + return vget_lane_u64(vqsub_u64((uint64x1_t){a}, (uint64x1_t){b}), 0); } -int32x4_t __builtin_mpl_vector_qdmulhq_n_i32v4(int32x4_t a, int32x4_t b); -static inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqdmulhq_n_s32(int32x4_t a, int32_t b) { - return __builtin_mpl_vector_qdmulhq_n_i32v4(a, (int32x4_t){b}); +int8x8_t __builtin_mpl_vector_aba_v8i8(int8x8_t a, int8x8_t b, int8x8_t c); +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaba_s8( + int8x8_t a, int8x8_t b, int8x8_t c) { + return __builtin_mpl_vector_aba_v8i8(a, b, c); } -int16x4_t __builtin_mpl_vector_qdmulh_lane_i16v4(int16x4_t a, int16x4_t v, const int lane); -#define vqdmulh_lane_s16(a, v, lane) __builtin_mpl_vector_qdmulh_lane_i16v4(a, v, lane) +int8x16_t __builtin_mpl_vector_abaq_v16i8(int8x16_t a, int8x16_t b, int8x16_t c); +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vabaq_s8( + int8x16_t a, int8x16_t b, int8x16_t c) { + return __builtin_mpl_vector_abaq_v16i8(a, b, c); +} -int16x8_t __builtin_mpl_vector_qdmulhq_lane_i16v8(int16x8_t a, int16x4_t v, const int lane); -#define vqdmulhq_lane_s16(a, v, lane) __builtin_mpl_vector_qdmulhq_lane_i16v8(a, v, lane) +int16x4_t __builtin_mpl_vector_aba_v4i16(int16x4_t a, int16x4_t b, int16x4_t c); +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaba_s16( + int16x4_t a, int16x4_t b, int16x4_t c) { + return __builtin_mpl_vector_aba_v4i16(a, b, c); +} -int32x2_t __builtin_mpl_vector_qdmulh_lane_i32v2(int32x2_t a, int32x2_t v, const int lane); -#define vqdmulh_lane_s32(a, v, lane) __builtin_mpl_vector_qdmulh_lane_i32v2(a, v, lane) +int16x8_t __builtin_mpl_vector_abaq_v8i16(int16x8_t a, int16x8_t b, int16x8_t c); +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vabaq_s16( + int16x8_t a, int16x8_t b, int16x8_t c) { + return __builtin_mpl_vector_abaq_v8i16(a, b, c); +} -int32x4_t __builtin_mpl_vector_qdmulhq_lane_i32v4(int32x4_t a, int32x2_t v, const int lane); -#define vqdmulhq_lane_s32(a, v, lane) __builtin_mpl_vector_qdmulhq_lane_i32v4(a, v, lane) +int32x2_t __builtin_mpl_vector_aba_v2i32(int32x2_t a, int32x2_t b, int32x2_t c); +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaba_s32( + int32x2_t a, int32x2_t b, int32x2_t c) { + return __builtin_mpl_vector_aba_v2i32(a, b, c); +} -static inline int16_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqdmulhh_lane_s16(int16_t a, int16x4_t v, const int lane) { - return vget_lane_s16(vqdmulh_lane_s16((int16x4_t){a}, v, lane), 0); +int32x4_t __builtin_mpl_vector_abaq_v4i32(int32x4_t a, int32x4_t b, int32x4_t c); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vabaq_s32( + int32x4_t a, int32x4_t b, int32x4_t c) { + return __builtin_mpl_vector_abaq_v4i32(a, b, c); } -static inline int32_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqdmulhs_lane_s32(int32_t a, int32x2_t v, const int lane) { - return vget_lane_s32(vqdmulh_lane_s32((int32x2_t){a}, v, lane), 0); +uint8x8_t __builtin_mpl_vector_aba_v8u8(uint8x8_t a, uint8x8_t b, uint8x8_t c); +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaba_u8( + uint8x8_t a, uint8x8_t b, uint8x8_t c) { + return __builtin_mpl_vector_aba_v8u8(a, b, c); } -int16x4_t __builtin_mpl_vector_qdmulh_laneq_i16v4(int16x4_t a, int16x8_t v, const int lane); -#define vqdmulh_laneq_s16(a, v, lane) __builtin_mpl_vector_qdmulh_laneq_i16v4(a, v, lane) +uint8x16_t __builtin_mpl_vector_abaq_v16u8(uint8x16_t a, uint8x16_t b, uint8x16_t c); +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vabaq_u8( + uint8x16_t a, uint8x16_t b, uint8x16_t c) { + return __builtin_mpl_vector_abaq_v16u8(a, b, c); +} -int16x8_t __builtin_mpl_vector_qdmulhq_laneq_i16v8(int16x8_t a, int16x8_t v, const int lane); -#define vqdmulhq_laneq_s16(a, v, lane) __builtin_mpl_vector_qdmulhq_laneq_i16v8(a, v, lane) +uint16x4_t __builtin_mpl_vector_aba_v4u16(uint16x4_t a, uint16x4_t b, uint16x4_t c); +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaba_u16( + uint16x4_t a, uint16x4_t b, uint16x4_t c) { + return __builtin_mpl_vector_aba_v4u16(a, b, c); +} -int32x2_t __builtin_mpl_vector_qdmulh_laneq_i32v2(int32x2_t a, int32x4_t v, const int lane); -#define vqdmulh_laneq_s32(a, v, lane) __builtin_mpl_vector_qdmulh_laneq_i32v2(a, v, lane) +uint16x8_t __builtin_mpl_vector_abaq_v8u16(uint16x8_t a, uint16x8_t b, uint16x8_t c); +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vabaq_u16( + uint16x8_t a, uint16x8_t b, uint16x8_t c) { + return __builtin_mpl_vector_abaq_v8u16(a, b, c); +} -int32x4_t __builtin_mpl_vector_qdmulhq_laneq_i32v4(int32x4_t a, int32x4_t v, const int lane); -#define vqdmulhq_laneq_s32(a, v, lane) __builtin_mpl_vector_qdmulhq_laneq_i32v4(a, v, lane) +uint32x2_t __builtin_mpl_vector_aba_v2u32(uint32x2_t a, uint32x2_t b, uint32x2_t c); +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaba_u32( + uint32x2_t a, uint32x2_t b, uint32x2_t c) { + return __builtin_mpl_vector_aba_v2u32(a, b, c); +} -static inline int16_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqdmulhh_laneq_s16(int16_t a, int16x8_t v, const int lane) { - return vget_lane_s16(vqdmulh_laneq_s16((int16x4_t){a}, v, lane), 0); +uint32x4_t __builtin_mpl_vector_abaq_v4u32(uint32x4_t a, uint32x4_t b, uint32x4_t c); +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vabaq_u32( + uint32x4_t a, uint32x4_t b, uint32x4_t c) { + return __builtin_mpl_vector_abaq_v4u32(a, b, c); } -static inline int32_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqdmulhs_laneq_s32(int32_t a, int32x4_t v, const int lane) { - return vget_lane_s32(vqdmulh_laneq_s32((int32x2_t){a}, v, lane), 0); +int16x8_t __builtin_mpl_vector_abal_v8i16(int16x8_t a, int8x8_t b, int8x8_t c); +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vabal_s8( + int16x8_t a, int8x8_t b, int8x8_t c) { + return __builtin_mpl_vector_abal_v8i16(a, b, c); } -int16x4_t __builtin_mpl_vector_qrdmulh_n_i16v4(int16x4_t a, int16x4_t b); -static inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqrdmulh_n_s16(int16x4_t a, int16_t b) { - return __builtin_mpl_vector_qrdmulh_n_i16v4(a, (int16x4_t){b}); +int32x4_t __builtin_mpl_vector_abal_v4i32(int32x4_t a, int16x4_t b, int16x4_t c); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vabal_s16( + int32x4_t a, int16x4_t b, int16x4_t c) { + return __builtin_mpl_vector_abal_v4i32(a, b, c); } -int16x8_t __builtin_mpl_vector_qrdmulhq_n_i16v8(int16x8_t a, int16x8_t b); -static inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqrdmulhq_n_s16(int16x8_t a, int16_t b) { - return __builtin_mpl_vector_qrdmulhq_n_i16v8(a, (int16x8_t){b}); +int64x2_t __builtin_mpl_vector_abal_v2i64(int64x2_t a, int32x2_t b, int32x2_t c); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vabal_s32( + int64x2_t a, int32x2_t b, int32x2_t c) { + return __builtin_mpl_vector_abal_v2i64(a, b, c); } -int32x2_t __builtin_mpl_vector_qrdmulh_n_i32v2(int32x2_t a, int32x2_t b); -static inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqrdmulh_n_s32(int32x2_t a, int32_t b) { - return __builtin_mpl_vector_qrdmulh_n_i32v2(a, (int32x2_t){b}); +uint16x8_t __builtin_mpl_vector_abal_v8u16(uint16x8_t a, uint8x8_t b, uint8x8_t c); +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vabal_u8( + uint16x8_t a, uint8x8_t b, uint8x8_t c) { + return __builtin_mpl_vector_abal_v8u16(a, b, c); } -int32x4_t __builtin_mpl_vector_qrdmulhq_n_i32v4(int32x4_t a, int32x4_t b); -static inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqrdmulhq_n_s32(int32x4_t a, int32_t b) { - return __builtin_mpl_vector_qrdmulhq_n_i32v4(a, (int32x4_t){b}); +uint32x4_t __builtin_mpl_vector_abal_v4u32(uint32x4_t a, uint16x4_t b, uint16x4_t c); +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vabal_u16( + uint32x4_t a, uint16x4_t b, uint16x4_t c) { + return __builtin_mpl_vector_abal_v4u32(a, b, c); } -int16x4_t __builtin_mpl_vector_qrdmulh_lane_i16v4(int16x4_t a, int16x4_t v, const int lane); -#define vqrdmulh_lane_s16(a, v, lane) __builtin_mpl_vector_qrdmulh_lane_i16v4(a, v, lane) +uint64x2_t __builtin_mpl_vector_abal_v2u64(uint64x2_t a, uint32x2_t b, uint32x2_t c); +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vabal_u32( + uint64x2_t a, uint32x2_t b, uint32x2_t c) { + return __builtin_mpl_vector_abal_v2u64(a, b, c); +} -int16x8_t __builtin_mpl_vector_qrdmulhq_lane_i16v8(int16x8_t a, int16x4_t v, const int lane); -#define vqrdmulhq_lane_s16(a, v, lane) __builtin_mpl_vector_qrdmulhq_lane_i16v8(a, v, lane) +int16x8_t __builtin_mpl_vector_abal_high_v8i16(int16x8_t a, int8x16_t b, int8x16_t c); +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vabal_high_s8( + int16x8_t a, int8x16_t b, int8x16_t c) { + return __builtin_mpl_vector_abal_high_v8i16(a, b, c); +} -int32x2_t __builtin_mpl_vector_qrdmulh_lane_i32v2(int32x2_t a, int32x2_t v, const int lane); -#define vqrdmulh_lane_s32(a, v, lane) __builtin_mpl_vector_qrdmulh_lane_i32v2(a, v, lane) +int32x4_t __builtin_mpl_vector_abal_high_v4i32(int32x4_t a, int16x8_t b, int16x8_t c); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vabal_high_s16( + int32x4_t a, int16x8_t b, int16x8_t c) { + return __builtin_mpl_vector_abal_high_v4i32(a, b, c); +} -int32x4_t __builtin_mpl_vector_qrdmulhq_lane_i32v4(int32x4_t a, int32x2_t v, const int lane); -#define vqrdmulhq_lane_s32(a, v, lane) __builtin_mpl_vector_qrdmulhq_lane_i32v4(a, v, lane) +int64x2_t __builtin_mpl_vector_abal_high_v2i64(int64x2_t a, int32x4_t b, int32x4_t c); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vabal_high_s32( + int64x2_t a, int32x4_t b, int32x4_t c) { + return __builtin_mpl_vector_abal_high_v2i64(a, b, c); +} -static inline int16_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqrdmulhh_lane_s16(int16_t a, int16x4_t v, const int lane) { - return vget_lane_s16(vqrdmulh_lane_s16((int16x4_t){a}, v, lane), 0); +uint16x8_t __builtin_mpl_vector_abal_high_v8u16(uint16x8_t a, uint8x16_t b, uint8x16_t c); +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vabal_high_u8( + uint16x8_t a, uint8x16_t b, uint8x16_t c) { + return __builtin_mpl_vector_abal_high_v8u16(a, b, c); } -static inline int32_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqrdmulhs_lane_s32(int32_t a, int32x2_t v, const int lane) { - return vget_lane_s32(vqrdmulh_lane_s32((int32x2_t){a}, v, lane), 0); +uint32x4_t __builtin_mpl_vector_abal_high_v4u32(uint32x4_t a, uint16x8_t b, uint16x8_t c); +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vabal_high_u16( + uint32x4_t a, uint16x8_t b, uint16x8_t c) { + return __builtin_mpl_vector_abal_high_v4u32(a, b, c); } -int16x4_t __builtin_mpl_vector_qrdmulh_laneq_i16v4(int16x4_t a, int16x8_t v, const int lane); -#define vqrdmulh_laneq_s16(a, v, lane) __builtin_mpl_vector_qrdmulh_laneq_i16v4(a, v, lane) +uint64x2_t __builtin_mpl_vector_abal_high_v2u64(uint64x2_t a, uint32x4_t b, uint32x4_t c); +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vabal_high_u32( + uint64x2_t a, uint32x4_t b, uint32x4_t c) { + return __builtin_mpl_vector_abal_high_v2u64(a, b, c); +} -int16x8_t __builtin_mpl_vector_qrdmulhq_laneq_i16v8(int16x8_t a, int16x8_t v, const int lane); -#define vqrdmulhq_laneq_s16(a, v, lane) __builtin_mpl_vector_qrdmulhq_laneq_i16v8(a, v, lane) +int8x8_t __builtin_mpl_vector_qabs_v8i8(int8x8_t a); +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqabs_s8(int8x8_t a) { + return __builtin_mpl_vector_qabs_v8i8(a); +} -int32x2_t __builtin_mpl_vector_qrdmulh_laneq_i32v2(int32x2_t a, int32x4_t v, const int lane); -#define vqrdmulh_laneq_s32(a, v, lane) __builtin_mpl_vector_qrdmulh_laneq_i32v2(a, v, lane) +int8x16_t __builtin_mpl_vector_qabsq_v16i8(int8x16_t a); +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqabsq_s8( + int8x16_t a) { + return __builtin_mpl_vector_qabsq_v16i8(a); +} -int32x4_t __builtin_mpl_vector_qrdmulhq_laneq_i32v4(int32x4_t a, int32x4_t v, const int lane); -#define vqrdmulhq_laneq_s32(a, v, lane) __builtin_mpl_vector_qrdmulhq_laneq_i32v4(a, v, lane) +int16x4_t __builtin_mpl_vector_qabs_v4i16(int16x4_t a); +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqabs_s16( + int16x4_t a) { + return __builtin_mpl_vector_qabs_v4i16(a); +} -static inline int16_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqrdmulhh_laneq_s16(int16_t a, int16x8_t v, const int lane) { - return vget_lane_s16(vqrdmulh_laneq_s16((int16x4_t){a}, v, lane), 0); +int16x8_t __builtin_mpl_vector_qabsq_v8i16(int16x8_t a); +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqabsq_s16( + int16x8_t a) { + return __builtin_mpl_vector_qabsq_v8i16(a); } -static inline int32_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqrdmulhs_laneq_s32(int32_t a, int32x4_t v, const int lane) { - return vget_lane_s32(vqrdmulh_laneq_s32((int32x2_t){a}, v, lane), 0); +int32x2_t __builtin_mpl_vector_qabs_v2i32(int32x2_t a); +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqabs_s32( + int32x2_t a) { + return __builtin_mpl_vector_qabs_v2i32(a); } -int32x4_t __builtin_mpl_vector_qdmlal_n_i32v4(int32x4_t a, int16x4_t b, int16x4_t c); -static inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqdmlal_n_s16(int32x4_t a, int16x4_t b, int16_t c) { - return __builtin_mpl_vector_qdmlal_n_i32v4(a, b, (int16x4_t){c}); +int32x4_t __builtin_mpl_vector_qabsq_v4i32(int32x4_t a); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqabsq_s32( + int32x4_t a) { + return __builtin_mpl_vector_qabsq_v4i32(a); } -int64x2_t __builtin_mpl_vector_qdmlal_n_i64v2(int64x2_t a, int32x2_t b, int32x2_t c); -static inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqdmlal_n_s32(int64x2_t a, int32x2_t b, int32_t c) { - return __builtin_mpl_vector_qdmlal_n_i64v2(a, b, (int32x2_t){c}); +int64x1_t __builtin_mpl_vector_qabs_v1i64(int64x1_t a); +extern inline int64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqabs_s64( + int64x1_t a) { + return __builtin_mpl_vector_qabs_v1i64(a); } -int32x4_t __builtin_mpl_vector_qdmlal_high_n_i32v4(int32x4_t a, int16x8_t b, int16x8_t c); -static inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqdmlal_high_n_s16(int32x4_t a, int16x8_t b, int16_t c) { - return __builtin_mpl_vector_qdmlal_high_n_i32v4(a, b, (int16x8_t){c}); +int64x2_t __builtin_mpl_vector_qabsq_v2i64(int64x2_t a); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqabsq_s64( + int64x2_t a) { + return __builtin_mpl_vector_qabsq_v2i64(a); } -int64x2_t __builtin_mpl_vector_qdmlal_high_n_i64v2(int64x2_t a, int32x4_t b, int32x4_t c); -static inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqdmlal_high_n_s32(int64x2_t a, int32x4_t b, int32_t c) { - return __builtin_mpl_vector_qdmlal_high_n_i64v2(a, b, (int32x4_t){c}); +extern inline int8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqabsb_s8(int8_t a) { + return vget_lane_s8(vqabs_s8((int8x8_t){a}), 0); } -int32x4_t __builtin_mpl_vector_qdmlsl_n_i32v4(int32x4_t a, int16x4_t b, int16x4_t c); -static inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqdmlsl_n_s16(int32x4_t a, int16x4_t b, int16_t c) { - return __builtin_mpl_vector_qdmlsl_n_i32v4(a, b, (int16x4_t){c}); +extern inline int16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqabsh_s16(int16_t a) { + return vget_lane_s16(vqabs_s16((int16x4_t){a}), 0); } -int64x2_t __builtin_mpl_vector_qdmlsl_n_i64v2(int64x2_t a, int32x2_t b, int32x2_t c); -static inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqdmlsl_n_s32(int64x2_t a, int32x2_t b, int32_t c) { - return __builtin_mpl_vector_qdmlsl_n_i64v2(a, b, (int32x2_t){c}); +extern inline int32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqabss_s32(int32_t a) { + return vget_lane_s32(vqabs_s32((int32x2_t){a}), 0); } -int32x4_t __builtin_mpl_vector_qdmlsl_high_n_i32v4(int32x4_t a, int16x8_t b, int16x8_t c); -static inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqdmlsl_high_n_s16(int32x4_t a, int16x8_t b, int16_t c) { - return __builtin_mpl_vector_qdmlsl_high_n_i32v4(a, b, (int16x8_t){c}); +extern inline int64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqabsd_s64(int64_t a) { + return vget_lane_s64(vqabs_s64((int64x1_t){a}), 0); } -int64x2_t __builtin_mpl_vector_qdmlsl_high_n_i64v2(int64x2_t a, int32x4_t b, int32x4_t c); -static inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqdmlsl_high_n_s32(int64x2_t a, int32x4_t b, int32_t c) { - return __builtin_mpl_vector_qdmlsl_high_n_i64v2(a, b, (int32x4_t){c}); +uint32x2_t __builtin_mpl_vector_rsqrte_v2u32(uint32x2_t a); +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrsqrte_u32( + uint32x2_t a) { + return __builtin_mpl_vector_rsqrte_v2u32(a); } -int8x8_t __builtin_mpl_vector_hsub_i8v8(int8x8_t a, int8x8_t b); -#define vhsub_s8(a, b) __builtin_mpl_vector_hsub_i8v8(a, b) +uint32x4_t __builtin_mpl_vector_rsqrteq_v4u32(uint32x4_t a); +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrsqrteq_u32( + uint32x4_t a) { + return __builtin_mpl_vector_rsqrteq_v4u32(a); +} -int8x16_t __builtin_mpl_vector_hsubq_i8v16(int8x16_t a, int8x16_t b); -#define vhsubq_s8(a, b) __builtin_mpl_vector_hsubq_i8v16(a, b) +int16x4_t __builtin_mpl_vector_addlv_v8i8(int8x8_t a); +extern inline int16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddlv_s8(int8x8_t a) { + return vget_lane_s16(__builtin_mpl_vector_addlv_v8i8(a), 0); +} -int16x4_t __builtin_mpl_vector_hsub_i16v4(int16x4_t a, int16x4_t b); -#define vhsub_s16(a, b) __builtin_mpl_vector_hsub_i16v4(a, b) +int16x4_t __builtin_mpl_vector_addlvq_v16i8(int8x16_t a); +extern inline int16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddlvq_s8(int8x16_t a) { + return vget_lane_s16(__builtin_mpl_vector_addlvq_v16i8(a), 0); +} -int16x8_t __builtin_mpl_vector_hsubq_i16v8(int16x8_t a, int16x8_t b); -#define vhsubq_s16(a, b) __builtin_mpl_vector_hsubq_i16v8(a, b) +int32x2_t __builtin_mpl_vector_addlv_v4i16(int16x4_t a); +extern inline int32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddlv_s16(int16x4_t a) { + return vget_lane_s32(__builtin_mpl_vector_addlv_v4i16(a), 0); +} -int32x2_t __builtin_mpl_vector_hsub_i32v2(int32x2_t a, int32x2_t b); -#define vhsub_s32(a, b) __builtin_mpl_vector_hsub_i32v2(a, b) +int32x2_t __builtin_mpl_vector_addlvq_v8i16(int16x8_t a); +extern inline int32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddlvq_s16( + int16x8_t a) { + return vget_lane_s32(__builtin_mpl_vector_addlvq_v8i16(a), 0); +} -int32x4_t __builtin_mpl_vector_hsubq_i32v4(int32x4_t a, int32x4_t b); -#define vhsubq_s32(a, b) __builtin_mpl_vector_hsubq_i32v4(a, b) +extern inline int64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddlv_s32(int32x2_t a) { + return vget_lane_s64(vpaddl_s32(a), 0); +} -uint8x8_t __builtin_mpl_vector_hsub_u8v8(uint8x8_t a, uint8x8_t b); -#define vhsub_u8(a, b) __builtin_mpl_vector_hsub_u8v8(a, b) +int64x1_t __builtin_mpl_vector_addlvq_v4i32(int32x4_t a); +extern inline int64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddlvq_s32( + int32x4_t a) { + return vget_lane_s64(__builtin_mpl_vector_addlvq_v4i32(a), 0); +} -uint8x16_t __builtin_mpl_vector_hsubq_u8v16(uint8x16_t a, uint8x16_t b); -#define vhsubq_u8(a, b) __builtin_mpl_vector_hsubq_u8v16(a, b) +uint16x4_t __builtin_mpl_vector_addlv_v8u8(uint8x8_t a); +extern inline uint16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddlv_u8(uint8x8_t a) { + return vget_lane_u16(__builtin_mpl_vector_addlv_v8u8(a), 0); +} -uint16x4_t __builtin_mpl_vector_hsub_u16v4(uint16x4_t a, uint16x4_t b); -#define vhsub_u16(a, b) __builtin_mpl_vector_hsub_u16v4(a, b) +uint16x4_t __builtin_mpl_vector_addlvq_v16u8(uint8x16_t a); +extern inline uint16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddlvq_u8( + uint8x16_t a) { + return vget_lane_u16(__builtin_mpl_vector_addlvq_v16u8(a), 0); +} -uint16x8_t __builtin_mpl_vector_hsubq_u16v8(uint16x8_t a, uint16x8_t b); -#define vhsubq_u16(a, b) __builtin_mpl_vector_hsubq_u16v8(a, b) +uint32x2_t __builtin_mpl_vector_addlv_v4u16(uint16x4_t a); +extern inline uint32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddlv_u16( + uint16x4_t a) { + return vget_lane_u32(__builtin_mpl_vector_addlv_v4u16(a), 0); +} -uint32x2_t __builtin_mpl_vector_hsub_u32v2(uint32x2_t a, uint32x2_t b); -#define vhsub_u32(a, b) __builtin_mpl_vector_hsub_u32v2(a, b) +uint32x2_t __builtin_mpl_vector_addlvq_v8u16(uint16x8_t a); +extern inline uint32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddlvq_u16( + uint16x8_t a) { + return vget_lane_u32(__builtin_mpl_vector_addlvq_v8u16(a), 0); +} -uint32x4_t __builtin_mpl_vector_hsubq_u32v4(uint32x4_t a, uint32x4_t b); -#define vhsubq_u32(a, b) __builtin_mpl_vector_hsubq_u32v4(a, b) +extern inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddlv_u32( + uint32x2_t a) { + return vget_lane_u64(vpaddl_u32(a), 0); +} -int8x8_t __builtin_mpl_vector_subhn_i8v8(int16x8_t a, int16x8_t b); -#define vsubhn_s16(a, b) __builtin_mpl_vector_subhn_i8v8(a, b) +uint64x1_t __builtin_mpl_vector_addlvq_v4u32(uint32x4_t a); +extern inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vaddlvq_u32( + uint32x4_t a) { + return vget_lane_u64(__builtin_mpl_vector_addlvq_v4u32(a), 0); +} -int16x4_t __builtin_mpl_vector_subhn_i16v4(int32x4_t a, int32x4_t b); -#define vsubhn_s32(a, b) __builtin_mpl_vector_subhn_i16v4(a, b) +int8x8_t __builtin_mpl_vector_qshl_v8i8(int8x8_t a, int8x8_t b); +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshl_s8( + int8x8_t a, int8x8_t b) { + return __builtin_mpl_vector_qshl_v8i8(a, b); +} -int32x2_t __builtin_mpl_vector_subhn_i32v2(int64x2_t a, int64x2_t b); -#define vsubhn_s64(a, b) __builtin_mpl_vector_subhn_i32v2(a, b) +int8x16_t __builtin_mpl_vector_qshlq_v16i8(int8x16_t a, int8x16_t b); +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshlq_s8( + int8x16_t a, int8x16_t b) { + return __builtin_mpl_vector_qshlq_v16i8(a, b); +} -uint8x8_t __builtin_mpl_vector_subhn_u8v8(uint16x8_t a, uint16x8_t b); -#define vsubhn_u16(a, b) __builtin_mpl_vector_subhn_u8v8(a, b) +int16x4_t __builtin_mpl_vector_qshl_v4i16(int16x4_t a, int16x4_t b); +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshl_s16( + int16x4_t a, int16x4_t b) { + return __builtin_mpl_vector_qshl_v4i16(a, b); +} -uint16x4_t __builtin_mpl_vector_subhn_u16v4(uint32x4_t a, uint32x4_t b); -#define vsubhn_u32(a, b) __builtin_mpl_vector_subhn_u16v4(a, b) +int16x8_t __builtin_mpl_vector_qshlq_v8i16(int16x8_t a, int16x8_t b); +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshlq_s16( + int16x8_t a, int16x8_t b) { + return __builtin_mpl_vector_qshlq_v8i16(a, b); +} -uint32x2_t __builtin_mpl_vector_subhn_u32v2(uint64x2_t a, uint64x2_t b); -#define vsubhn_u64(a, b) __builtin_mpl_vector_subhn_u32v2(a, b) +int32x2_t __builtin_mpl_vector_qshl_v2i32(int32x2_t a, int32x2_t b); +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshl_s32( + int32x2_t a, int32x2_t b) { + return __builtin_mpl_vector_qshl_v2i32(a, b); +} -int8x16_t __builtin_mpl_vector_subhn_high_i8v16(int8x8_t r, int16x8_t a, int16x8_t b); -#define vsubhn_high_s16(r, a, b) __builtin_mpl_vector_subhn_high_i8v16(r, a, b) +int32x4_t __builtin_mpl_vector_qshlq_v4i32(int32x4_t a, int32x4_t b); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshlq_s32( + int32x4_t a, int32x4_t b) { + return __builtin_mpl_vector_qshlq_v4i32(a, b); +} -int16x8_t __builtin_mpl_vector_subhn_high_i16v8(int16x4_t r, int32x4_t a, int32x4_t b); -#define vsubhn_high_s32(r, a, b) __builtin_mpl_vector_subhn_high_i16v8(r, a, b) +int64x1_t __builtin_mpl_vector_qshl_v1i64(int64x1_t a, int64x1_t b); +extern inline int64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshl_s64( + int64x1_t a, int64x1_t b) { + return __builtin_mpl_vector_qshl_v1i64(a, b); +} -int32x4_t __builtin_mpl_vector_subhn_high_i32v4(int32x2_t r, int64x2_t a, int64x2_t b); -#define vsubhn_high_s64(r, a, b) __builtin_mpl_vector_subhn_high_i32v4(r, a, b) +int64x2_t __builtin_mpl_vector_qshlq_v2i64(int64x2_t a, int64x2_t b); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshlq_s64( + int64x2_t a, int64x2_t b) { + return __builtin_mpl_vector_qshlq_v2i64(a, b); +} -uint8x16_t __builtin_mpl_vector_subhn_high_u8v16(uint8x8_t r, uint16x8_t a, uint16x8_t b); -#define vsubhn_high_u16(r, a, b) __builtin_mpl_vector_subhn_high_u8v16(r, a, b) +uint8x8_t __builtin_mpl_vector_qshl_v8u8(uint8x8_t a, int8x8_t b); +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshl_u8( + uint8x8_t a, int8x8_t b) { + return __builtin_mpl_vector_qshl_v8u8(a, b); +} -uint16x8_t __builtin_mpl_vector_subhn_high_u16v8(uint16x4_t r, uint32x4_t a, uint32x4_t b); -#define vsubhn_high_u32(r, a, b) __builtin_mpl_vector_subhn_high_u16v8(r, a, b) +uint8x16_t __builtin_mpl_vector_qshlq_v16u8(uint8x16_t a, int8x16_t b); +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshlq_u8( + uint8x16_t a, int8x16_t b) { + return __builtin_mpl_vector_qshlq_v16u8(a, b); +} -uint32x4_t __builtin_mpl_vector_subhn_high_u32v4(uint32x2_t r, uint64x2_t a, uint64x2_t b); -#define vsubhn_high_u64(r, a, b) __builtin_mpl_vector_subhn_high_u32v4(r, a, b) +uint16x4_t __builtin_mpl_vector_qshl_v4u16(uint16x4_t a, int16x4_t b); +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshl_u16( + uint16x4_t a, int16x4_t b) { + return __builtin_mpl_vector_qshl_v4u16(a, b); +} -int8x8_t __builtin_mpl_vector_rsubhn_i8v8(int16x8_t a, int16x8_t b); -#define vrsubhn_s16(a, b) __builtin_mpl_vector_rsubhn_i8v8(a, b) +uint16x8_t __builtin_mpl_vector_qshlq_v8u16(uint16x8_t a, int16x8_t b); +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshlq_u16( + uint16x8_t a, int16x8_t b) { + return __builtin_mpl_vector_qshlq_v8u16(a, b); +} -int16x4_t __builtin_mpl_vector_rsubhn_i16v4(int32x4_t a, int32x4_t b); -#define vrsubhn_s32(a, b) __builtin_mpl_vector_rsubhn_i16v4(a, b) +uint32x2_t __builtin_mpl_vector_qshl_v2u32(uint32x2_t a, int32x2_t b); +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshl_u32( + uint32x2_t a, int32x2_t b) { + return __builtin_mpl_vector_qshl_v2u32(a, b); +} -int32x2_t __builtin_mpl_vector_rsubhn_i32v2(int64x2_t a, int64x2_t b); -#define vrsubhn_s64(a, b) __builtin_mpl_vector_rsubhn_i32v2(a, b) +uint32x4_t __builtin_mpl_vector_qshlq_v4u32(uint32x4_t a, int32x4_t b); +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshlq_u32( + uint32x4_t a, int32x4_t b) { + return __builtin_mpl_vector_qshlq_v4u32(a, b); +} -uint8x8_t __builtin_mpl_vector_rsubhn_u8v8(uint16x8_t a, uint16x8_t b); -#define vrsubhn_u16(a, b) __builtin_mpl_vector_rsubhn_u8v8(a, b) +uint64x1_t __builtin_mpl_vector_qshl_v1u64(uint64x1_t a, int64x1_t b); +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshl_u64( + uint64x1_t a, int64x1_t b) { + return __builtin_mpl_vector_qshl_v1u64(a, b); +} -uint16x4_t __builtin_mpl_vector_rsubhn_u16v4(uint32x4_t a, uint32x4_t b); -#define vrsubhn_u32(a, b) __builtin_mpl_vector_rsubhn_u16v4(a, b) +uint64x2_t __builtin_mpl_vector_qshlq_v2u64(uint64x2_t a, int64x2_t b); +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshlq_u64( + uint64x2_t a, int64x2_t b) { + return __builtin_mpl_vector_qshlq_v2u64(a, b); +} -uint32x2_t __builtin_mpl_vector_rsubhn_u32v2(uint64x2_t a, uint64x2_t b); -#define vrsubhn_u64(a, b) __builtin_mpl_vector_rsubhn_u32v2(a, b) +extern inline int8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshlb_s8( + int8_t a, int8_t b) { + return vget_lane_s8(vqshl_s8((int8x8_t){a}, (int8x8_t){b}), 0); +} -int8x16_t __builtin_mpl_vector_rsubhn_high_i8v16(int8x8_t r, int16x8_t a, int16x8_t b); -#define vrsubhn_high_s16(r, a, b) __builtin_mpl_vector_rsubhn_high_i8v16(r, a, b) +extern inline int16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshlh_s16( + int16_t a, int16_t b) { + return vget_lane_s16(vqshl_s16((int16x4_t){a}, (int16x4_t){b}), 0); +} -int16x8_t __builtin_mpl_vector_rsubhn_high_i16v8(int16x4_t r, int32x4_t a, int32x4_t b); -#define vrsubhn_high_s32(r, a, b) __builtin_mpl_vector_rsubhn_high_i16v8(r, a, b) +extern inline int32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshls_s32( + int32_t a, int32_t b) { + return vget_lane_s32(vqshl_s32((int32x2_t){a}, (int32x2_t){b}), 0); +} -int32x4_t __builtin_mpl_vector_rsubhn_high_i32v4(int32x2_t r, int64x2_t a, int64x2_t b); -#define vrsubhn_high_s64(r, a, b) __builtin_mpl_vector_rsubhn_high_i32v4(r, a, b) +extern inline int64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshld_s64( + int64_t a, int64_t b) { + return vget_lane_s64(vqshl_s64((int64x1_t){a}, (int64x1_t){b}), 0); +} -uint8x16_t __builtin_mpl_vector_rsubhn_high_u8v16(uint8x8_t r, uint16x8_t a, uint16x8_t b); -#define vrsubhn_high_u16(r, a, b) __builtin_mpl_vector_rsubhn_high_u8v16(r, a, b) +extern inline uint8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshlb_u8( + uint8_t a, uint8_t b) { + return vget_lane_u8(vqshl_u8((uint8x8_t){a}, (uint8x8_t){b}), 0); +} -uint16x8_t __builtin_mpl_vector_rsubhn_high_u16v8(uint16x4_t r, uint32x4_t a, uint32x4_t b); -#define vrsubhn_high_u32(r, a, b) __builtin_mpl_vector_rsubhn_high_u16v8(r, a, b) +extern inline uint16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshlh_u16( + uint16_t a, uint16_t b) { + return vget_lane_u16(vqshl_u16((uint16x4_t){a}, (uint16x4_t){b}), 0); +} -uint32x4_t __builtin_mpl_vector_rsubhn_high_u32v4(uint32x2_t r, uint64x2_t a, uint64x2_t b); -#define vrsubhn_high_u64(r, a, b) __builtin_mpl_vector_rsubhn_high_u32v4(r, a, b) +extern inline uint32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshls_u32( + uint32_t a, uint32_t b) { + return vget_lane_u32(vqshl_u32((uint32x2_t){a}, (uint32x2_t){b}), 0); +} -int8x8_t __builtin_mpl_vector_qsub_i8v8(int8x8_t a, int8x8_t b); -#define vqsub_s8(a, b) __builtin_mpl_vector_qsub_i8v8(a, b) +extern inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshld_u64( + uint64_t a, uint64_t b) { + return vget_lane_u64(vqshl_u64((uint64x1_t){a}, (uint64x1_t){b}), 0); +} -int8x16_t __builtin_mpl_vector_qsubq_i8v16(int8x16_t a, int8x16_t b); -#define vqsubq_s8(a, b) __builtin_mpl_vector_qsubq_i8v16(a, b) +int8x8_t __builtin_mpl_vector_qshl_n_v8i8(int8x8_t a, const int n); +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshl_n_s8( + int8x8_t a, const int n) { + return __builtin_mpl_vector_qshl_n_v8i8(a, n); +} -int16x4_t __builtin_mpl_vector_qsub_i16v4(int16x4_t a, int16x4_t b); -#define vqsub_s16(a, b) __builtin_mpl_vector_qsub_i16v4(a, b) +int8x16_t __builtin_mpl_vector_qshlq_n_v16i8(int8x16_t a, const int n); +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshlq_n_s8( + int8x16_t a, const int n) { + return __builtin_mpl_vector_qshlq_n_v16i8(a, n); +} -int16x8_t __builtin_mpl_vector_qsubq_i16v8(int16x8_t a, int16x8_t b); -#define vqsubq_s16(a, b) __builtin_mpl_vector_qsubq_i16v8(a, b) +int16x4_t __builtin_mpl_vector_qshl_n_v4i16(int16x4_t a, const int n); +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshl_n_s16( + int16x4_t a, const int n) { + return __builtin_mpl_vector_qshl_n_v4i16(a, n); +} -int32x2_t __builtin_mpl_vector_qsub_i32v2(int32x2_t a, int32x2_t b); -#define vqsub_s32(a, b) __builtin_mpl_vector_qsub_i32v2(a, b) +int16x8_t __builtin_mpl_vector_qshlq_n_v8i16(int16x8_t a, const int n); +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshlq_n_s16( + int16x8_t a, const int n) { + return __builtin_mpl_vector_qshlq_n_v8i16(a, n); +} -int32x4_t __builtin_mpl_vector_qsubq_i32v4(int32x4_t a, int32x4_t b); -#define vqsubq_s32(a, b) __builtin_mpl_vector_qsubq_i32v4(a, b) +int32x2_t __builtin_mpl_vector_qshl_n_v2i32(int32x2_t a, const int n); +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshl_n_s32( + int32x2_t a, const int n) { + return __builtin_mpl_vector_qshl_n_v2i32(a, n); +} -int64x1_t __builtin_mpl_vector_qsub_i64v1(int64x1_t a, int64x1_t b); -#define vqsub_s64(a, b) __builtin_mpl_vector_qsub_i64v1(a, b) +int32x4_t __builtin_mpl_vector_qshlq_n_v4i32(int32x4_t a, const int n); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshlq_n_s32( + int32x4_t a, const int n) { + return __builtin_mpl_vector_qshlq_n_v4i32(a, n); +} -int64x2_t __builtin_mpl_vector_qsubq_i64v2(int64x2_t a, int64x2_t b); -#define vqsubq_s64(a, b) __builtin_mpl_vector_qsubq_i64v2(a, b) +int64x1_t __builtin_mpl_vector_qshl_n_v1i64(int64x1_t a, const int n); +extern inline int64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshl_n_s64( + int64x1_t a, const int n) { + return __builtin_mpl_vector_qshl_n_v1i64(a, n); +} -uint8x8_t __builtin_mpl_vector_qsub_u8v8(uint8x8_t a, uint8x8_t b); -#define vqsub_u8(a, b) __builtin_mpl_vector_qsub_u8v8(a, b) +int64x2_t __builtin_mpl_vector_qshlq_n_v2i64(int64x2_t a, const int n); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshlq_n_s64( + int64x2_t a, const int n) { + return __builtin_mpl_vector_qshlq_n_v2i64(a, n); +} -uint8x16_t __builtin_mpl_vector_qsubq_u8v16(uint8x16_t a, uint8x16_t b); -#define vqsubq_u8(a, b) __builtin_mpl_vector_qsubq_u8v16(a, b) +uint8x8_t __builtin_mpl_vector_qshl_n_v8u8(uint8x8_t a, const int n); +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshl_n_u8( + uint8x8_t a, const int n) { + return __builtin_mpl_vector_qshl_n_v8u8(a, n); +} -uint16x4_t __builtin_mpl_vector_qsub_u16v4(uint16x4_t a, uint16x4_t b); -#define vqsub_u16(a, b) __builtin_mpl_vector_qsub_u16v4(a, b) +uint8x16_t __builtin_mpl_vector_qshlq_n_v16u8(uint8x16_t a, const int n); +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshlq_n_u8( + uint8x16_t a, const int n) { + return __builtin_mpl_vector_qshlq_n_v16u8(a, n); +} -uint16x8_t __builtin_mpl_vector_qsubq_u16v8(uint16x8_t a, uint16x8_t b); -#define vqsubq_u16(a, b) __builtin_mpl_vector_qsubq_u16v8(a, b) +uint16x4_t __builtin_mpl_vector_qshl_n_v4u16(uint16x4_t a, const int n); +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshl_n_u16( + uint16x4_t a, const int n) { + return __builtin_mpl_vector_qshl_n_v4u16(a, n); +} -uint32x2_t __builtin_mpl_vector_qsub_u32v2(uint32x2_t a, uint32x2_t b); -#define vqsub_u32(a, b) __builtin_mpl_vector_qsub_u32v2(a, b) +uint16x8_t __builtin_mpl_vector_qshlq_n_v8u16(uint16x8_t a, const int n); +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshlq_n_u16( + uint16x8_t a, const int n) { + return __builtin_mpl_vector_qshlq_n_v8u16(a, n); +} -uint32x4_t __builtin_mpl_vector_qsubq_u32v4(uint32x4_t a, uint32x4_t b); -#define vqsubq_u32(a, b) __builtin_mpl_vector_qsubq_u32v4(a, b) +uint32x2_t __builtin_mpl_vector_qshl_n_v2u32(uint32x2_t a, const int n); +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshl_n_u32( + uint32x2_t a, const int n) { + return __builtin_mpl_vector_qshl_n_v2u32(a, n); +} -uint64x1_t __builtin_mpl_vector_qsub_u64v1(uint64x1_t a, uint64x1_t b); -#define vqsub_u64(a, b) __builtin_mpl_vector_qsub_u64v1(a, b) +uint32x4_t __builtin_mpl_vector_qshlq_n_v4u32(uint32x4_t a, const int n); +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshlq_n_u32( + uint32x4_t a, const int n) { + return __builtin_mpl_vector_qshlq_n_v4u32(a, n); +} -uint64x2_t __builtin_mpl_vector_qsubq_u64v2(uint64x2_t a, uint64x2_t b); -#define vqsubq_u64(a, b) __builtin_mpl_vector_qsubq_u64v2(a, b) +uint64x1_t __builtin_mpl_vector_qshl_n_v1u64(uint64x1_t a, const int n); +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshl_n_u64( + uint64x1_t a, const int n) { + return __builtin_mpl_vector_qshl_n_v1u64(a, n); +} -static inline int8_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqsubb_s8(int8_t a, int8_t b) { - return vget_lane_s8(vqsub_s8((int8x8_t){a}, (int8x8_t){b}), 0); +uint64x2_t __builtin_mpl_vector_qshlq_n_v2u64(uint64x2_t a, const int n); +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshlq_n_u64( + uint64x2_t a, const int n) { + return __builtin_mpl_vector_qshlq_n_v2u64(a, n); } -static inline int16_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqsubh_s16(int16_t a, int16_t b) { - return vget_lane_s16(vqsub_s16((int16x4_t){a}, (int16x4_t){b}), 0); +extern inline int8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshlb_n_s8( + int8_t a, const int n) { + return vget_lane_s64(vqshl_n_s8((int8x8_t){a}, n), 0); } -static inline int32_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqsubs_s32(int32_t a, int32_t b) { - return vget_lane_s32(vqsub_s32((int32x2_t){a}, (int32x2_t){b}), 0); +extern inline int16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshlh_n_s16( + int16_t a, const int n) { + return vget_lane_s64(vqshl_n_s16((int16x4_t){a}, n), 0); } -static inline int64_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqsubd_s64(int64_t a, int64_t b) { - return vget_lane_s64(vqsub_s64((int64x1_t){a}, (int64x1_t){b}), 0); +extern inline int32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshls_n_s32( + int32_t a, const int n) { + return vget_lane_s64(vqshl_n_s32((int32x2_t){a}, n), 0); } -static inline uint8_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqsubb_u8(uint8_t a, uint8_t b) { - return vget_lane_u8(vqsub_u8((uint8x8_t){a}, (uint8x8_t){b}), 0); +extern inline int64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshld_n_s64( + int64_t a, const int n) { + return vget_lane_s64(vqshl_n_s64((int64x1_t){a}, n), 0); } -static inline uint16_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqsubh_u16(uint16_t a, uint16_t b) { - return vget_lane_u16(vqsub_u16((uint16x4_t){a}, (uint16x4_t){b}), 0); +extern inline uint8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshlb_n_u8( + uint8_t a, const int n) { + return vget_lane_u64(vqshl_n_u8((uint8x8_t){a}, n), 0); } -static inline uint32_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqsubs_u32(uint32_t a, uint32_t b) { - return vget_lane_u32(vqsub_u32((uint32x2_t){a}, (uint32x2_t){b}), 0); +extern inline uint16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshlh_n_u16( + uint16_t a, const int n) { + return vget_lane_u64(vqshl_n_u16((uint16x4_t){a}, n), 0); } -static inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqsubd_u64(uint64_t a, uint64_t b) { - return vget_lane_u64(vqsub_u64((uint64x1_t){a}, (uint64x1_t){b}), 0); +extern inline uint32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshls_n_u32( + uint32_t a, const int n) { + return vget_lane_u64(vqshl_n_u32((uint32x2_t){a}, n), 0); } -int8x8_t __builtin_mpl_vector_aba_i8v8(int8x8_t a, int8x8_t b, int8x8_t c); -#define vaba_s8(a, b, c) __builtin_mpl_vector_aba_i8v8(a, b, c) +extern inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshld_n_u64( + uint64_t a, const int n) { + return vget_lane_u64(vqshl_n_u64((uint64x1_t){a}, n), 0); +} -int8x16_t __builtin_mpl_vector_abaq_i8v16(int8x16_t a, int8x16_t b, int8x16_t c); -#define vabaq_s8(a, b, c) __builtin_mpl_vector_abaq_i8v16(a, b, c) +uint8x8_t __builtin_mpl_vector_qshlu_n_v8u8(int8x8_t a, const int n); +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshlu_n_s8( + int8x8_t a, const int n) { + return __builtin_mpl_vector_qshlu_n_v8u8(a, n); +} -int16x4_t __builtin_mpl_vector_aba_i16v4(int16x4_t a, int16x4_t b, int16x4_t c); -#define vaba_s16(a, b, c) __builtin_mpl_vector_aba_i16v4(a, b, c) +uint8x16_t __builtin_mpl_vector_qshluq_n_v16u8(int8x16_t a, const int n); +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshluq_n_s8( + int8x16_t a, const int n) { + return __builtin_mpl_vector_qshluq_n_v16u8(a, n); +} -int16x8_t __builtin_mpl_vector_abaq_i16v8(int16x8_t a, int16x8_t b, int16x8_t c); -#define vabaq_s16(a, b, c) __builtin_mpl_vector_abaq_i16v8(a, b, c) +uint16x4_t __builtin_mpl_vector_qshlu_n_v4u16(int16x4_t a, const int n); +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshlu_n_s16( + int16x4_t a, const int n) { + return __builtin_mpl_vector_qshlu_n_v4u16(a, n); +} -int32x2_t __builtin_mpl_vector_aba_i32v2(int32x2_t a, int32x2_t b, int32x2_t c); -#define vaba_s32(a, b, c) __builtin_mpl_vector_aba_i32v2(a, b, c) +uint16x8_t __builtin_mpl_vector_qshluq_n_v8u16(int16x8_t a, const int n); +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshluq_n_s16( + int16x8_t a, const int n) { + return __builtin_mpl_vector_qshluq_n_v8u16(a, n); +} -int32x4_t __builtin_mpl_vector_abaq_i32v4(int32x4_t a, int32x4_t b, int32x4_t c); -#define vabaq_s32(a, b, c) __builtin_mpl_vector_abaq_i32v4(a, b, c) +uint32x2_t __builtin_mpl_vector_qshlu_n_v2u32(int32x2_t a, const int n); +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshlu_n_s32( + int32x2_t a, const int n) { + return __builtin_mpl_vector_qshlu_n_v2u32(a, n); +} -uint8x8_t __builtin_mpl_vector_aba_u8v8(uint8x8_t a, uint8x8_t b, uint8x8_t c); -#define vaba_u8(a, b, c) __builtin_mpl_vector_aba_u8v8(a, b, c) +uint32x4_t __builtin_mpl_vector_qshluq_n_v4u32(int32x4_t a, const int n); +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshluq_n_s32( + int32x4_t a, const int n) { + return __builtin_mpl_vector_qshluq_n_v4u32(a, n); +} -uint8x16_t __builtin_mpl_vector_abaq_u8v16(uint8x16_t a, uint8x16_t b, uint8x16_t c); -#define vabaq_u8(a, b, c) __builtin_mpl_vector_abaq_u8v16(a, b, c) +uint64x1_t __builtin_mpl_vector_qshlu_n_v1u64(int64x1_t a, const int n); +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshlu_n_s64( + int64x1_t a, const int n) { + return __builtin_mpl_vector_qshlu_n_v1u64(a, n); +} -uint16x4_t __builtin_mpl_vector_aba_u16v4(uint16x4_t a, uint16x4_t b, uint16x4_t c); -#define vaba_u16(a, b, c) __builtin_mpl_vector_aba_u16v4(a, b, c) +uint64x2_t __builtin_mpl_vector_qshluq_n_v2u64(int64x2_t a, const int n); +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshluq_n_s64( + int64x2_t a, const int n) { + return __builtin_mpl_vector_qshluq_n_v2u64(a, n); +} -uint16x8_t __builtin_mpl_vector_abaq_u16v8(uint16x8_t a, uint16x8_t b, uint16x8_t c); -#define vabaq_u16(a, b, c) __builtin_mpl_vector_abaq_u16v8(a, b, c) +extern inline uint8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshlub_n_s8( + int8_t a, const int n) { + return vget_lane_u64(vqshlu_n_s8((int8x8_t){a}, n), 0); +} -uint32x2_t __builtin_mpl_vector_aba_u32v2(uint32x2_t a, uint32x2_t b, uint32x2_t c); -#define vaba_u32(a, b, c) __builtin_mpl_vector_aba_u32v2(a, b, c) +extern inline uint16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshluh_n_s16( + int16_t a, const int n) { + return vget_lane_u64(vqshlu_n_s16((int16x4_t){a}, n), 0); +} -uint32x4_t __builtin_mpl_vector_abaq_u32v4(uint32x4_t a, uint32x4_t b, uint32x4_t c); -#define vabaq_u32(a, b, c) __builtin_mpl_vector_abaq_u32v4(a, b, c) +extern inline uint32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshlus_n_s32( + int32_t a, const int n) { + return vget_lane_u64(vqshlu_n_s32((int32x2_t){a}, n), 0); +} -int16x8_t __builtin_mpl_vector_abal_i16v8(int16x8_t a, int8x8_t b, int8x8_t c); -#define vabal_s8(a, b, c) __builtin_mpl_vector_abal_i16v8(a, b, c) +extern inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshlud_n_s64( + int64_t a, const int n) { + return vget_lane_u64(vqshlu_n_s64((int64x1_t){a}, n), 0); +} -int32x4_t __builtin_mpl_vector_abal_i32v4(int32x4_t a, int16x4_t b, int16x4_t c); -#define vabal_s16(a, b, c) __builtin_mpl_vector_abal_i32v4(a, b, c) +int8x8_t __builtin_mpl_vector_rshl_v8i8(int8x8_t a, int8x8_t b); +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrshl_s8( + int8x8_t a, int8x8_t b) { + return __builtin_mpl_vector_rshl_v8i8(a, b); +} -int64x2_t __builtin_mpl_vector_abal_i64v2(int64x2_t a, int32x2_t b, int32x2_t c); -#define vabal_s32(a, b, c) __builtin_mpl_vector_abal_i64v2(a, b, c) +int8x16_t __builtin_mpl_vector_rshlq_v16i8(int8x16_t a, int8x16_t b); +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrshlq_s8( + int8x16_t a, int8x16_t b) { + return __builtin_mpl_vector_rshlq_v16i8(a, b); +} -uint16x8_t __builtin_mpl_vector_abal_u16v8(uint16x8_t a, uint8x8_t b, uint8x8_t c); -#define vabal_u8(a, b, c) __builtin_mpl_vector_abal_u16v8(a, b, c) +int16x4_t __builtin_mpl_vector_rshl_v4i16(int16x4_t a, int16x4_t b); +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrshl_s16( + int16x4_t a, int16x4_t b) { + return __builtin_mpl_vector_rshl_v4i16(a, b); +} -uint32x4_t __builtin_mpl_vector_abal_u32v4(uint32x4_t a, uint16x4_t b, uint16x4_t c); -#define vabal_u16(a, b, c) __builtin_mpl_vector_abal_u32v4(a, b, c) +int16x8_t __builtin_mpl_vector_rshlq_v8i16(int16x8_t a, int16x8_t b); +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrshlq_s16( + int16x8_t a, int16x8_t b) { + return __builtin_mpl_vector_rshlq_v8i16(a, b); +} -uint64x2_t __builtin_mpl_vector_abal_u64v2(uint64x2_t a, uint32x2_t b, uint32x2_t c); -#define vabal_u32(a, b, c) __builtin_mpl_vector_abal_u64v2(a, b, c) +int32x2_t __builtin_mpl_vector_rshl_v2i32(int32x2_t a, int32x2_t b); +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrshl_s32( + int32x2_t a, int32x2_t b) { + return __builtin_mpl_vector_rshl_v2i32(a, b); +} -int16x8_t __builtin_mpl_vector_abal_high_i16v8(int16x8_t a, int8x16_t b, int8x16_t c); -#define vabal_high_s8(a, b, c) __builtin_mpl_vector_abal_high_i16v8(a, b, c) +int32x4_t __builtin_mpl_vector_rshlq_v4i32(int32x4_t a, int32x4_t b); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrshlq_s32( + int32x4_t a, int32x4_t b) { + return __builtin_mpl_vector_rshlq_v4i32(a, b); +} -int32x4_t __builtin_mpl_vector_abal_high_i32v4(int32x4_t a, int16x8_t b, int16x8_t c); -#define vabal_high_s16(a, b, c) __builtin_mpl_vector_abal_high_i32v4(a, b, c) +int64x1_t __builtin_mpl_vector_rshl_v1i64(int64x1_t a, int64x1_t b); +extern inline int64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrshl_s64( + int64x1_t a, int64x1_t b) { + return __builtin_mpl_vector_rshl_v1i64(a, b); +} -int64x2_t __builtin_mpl_vector_abal_high_i64v2(int64x2_t a, int32x4_t b, int32x4_t c); -#define vabal_high_s32(a, b, c) __builtin_mpl_vector_abal_high_i64v2(a, b, c) +int64x2_t __builtin_mpl_vector_rshlq_v2i64(int64x2_t a, int64x2_t b); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrshlq_s64( + int64x2_t a, int64x2_t b) { + return __builtin_mpl_vector_rshlq_v2i64(a, b); +} -uint16x8_t __builtin_mpl_vector_abal_high_u16v8(uint16x8_t a, uint8x16_t b, uint8x16_t c); -#define vabal_high_u8(a, b, c) __builtin_mpl_vector_abal_high_u16v8(a, b, c) +uint8x8_t __builtin_mpl_vector_rshl_v8u8(uint8x8_t a, int8x8_t b); +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrshl_u8( + uint8x8_t a, int8x8_t b) { + return __builtin_mpl_vector_rshl_v8u8(a, b); +} -uint32x4_t __builtin_mpl_vector_abal_high_u32v4(uint32x4_t a, uint16x8_t b, uint16x8_t c); -#define vabal_high_u16(a, b, c) __builtin_mpl_vector_abal_high_u32v4(a, b, c) +uint8x16_t __builtin_mpl_vector_rshlq_v16u8(uint8x16_t a, int8x16_t b); +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrshlq_u8( + uint8x16_t a, int8x16_t b) { + return __builtin_mpl_vector_rshlq_v16u8(a, b); +} -uint64x2_t __builtin_mpl_vector_abal_high_u64v2(uint64x2_t a, uint32x4_t b, uint32x4_t c); -#define vabal_high_u32(a, b, c) __builtin_mpl_vector_abal_high_u64v2(a, b, c) +uint16x4_t __builtin_mpl_vector_rshl_v4u16(uint16x4_t a, int16x4_t b); +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrshl_u16( + uint16x4_t a, int16x4_t b) { + return __builtin_mpl_vector_rshl_v4u16(a, b); +} -int8x8_t __builtin_mpl_vector_qabs_i8v8(int8x8_t a); -#define vqabs_s8(a) __builtin_mpl_vector_qabs_i8v8(a) +uint16x8_t __builtin_mpl_vector_rshlq_v8u16(uint16x8_t a, int16x8_t b); +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrshlq_u16( + uint16x8_t a, int16x8_t b) { + return __builtin_mpl_vector_rshlq_v8u16(a, b); +} -int8x16_t __builtin_mpl_vector_qabsq_i8v16(int8x16_t a); -#define vqabsq_s8(a) __builtin_mpl_vector_qabsq_i8v16(a) +uint32x2_t __builtin_mpl_vector_rshl_v2u32(uint32x2_t a, int32x2_t b); +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrshl_u32( + uint32x2_t a, int32x2_t b) { + return __builtin_mpl_vector_rshl_v2u32(a, b); +} -int16x4_t __builtin_mpl_vector_qabs_i16v4(int16x4_t a); -#define vqabs_s16(a) __builtin_mpl_vector_qabs_i16v4(a) +uint32x4_t __builtin_mpl_vector_rshlq_v4u32(uint32x4_t a, int32x4_t b); +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrshlq_u32( + uint32x4_t a, int32x4_t b) { + return __builtin_mpl_vector_rshlq_v4u32(a, b); +} -int16x8_t __builtin_mpl_vector_qabsq_i16v8(int16x8_t a); -#define vqabsq_s16(a) __builtin_mpl_vector_qabsq_i16v8(a) +uint64x1_t __builtin_mpl_vector_rshl_v1u64(uint64x1_t a, int64x1_t b); +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrshl_u64( + uint64x1_t a, int64x1_t b) { + return __builtin_mpl_vector_rshl_v1u64(a, b); +} -int32x2_t __builtin_mpl_vector_qabs_i32v2(int32x2_t a); -#define vqabs_s32(a) __builtin_mpl_vector_qabs_i32v2(a) +uint64x2_t __builtin_mpl_vector_rshlq_v2u64(uint64x2_t a, int64x2_t b); +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrshlq_u64( + uint64x2_t a, int64x2_t b) { + return __builtin_mpl_vector_rshlq_v2u64(a, b); +} -int32x4_t __builtin_mpl_vector_qabsq_i32v4(int32x4_t a); -#define vqabsq_s32(a) __builtin_mpl_vector_qabsq_i32v4(a) +extern inline int64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrshld_s64( + int64_t a, int64_t b) { + return vget_lane_s64(vrshl_s64((int64x1_t){a}, (int64x1_t){b}), 0); +} -int64x1_t __builtin_mpl_vector_qabs_i64v1(int64x1_t a); -#define vqabs_s64(a) __builtin_mpl_vector_qabs_i64v1(a) +extern inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrshld_u64( + uint64_t a, uint64_t b) { + return vget_lane_u64(vrshl_u64((uint64x1_t){a}, (uint64x1_t){b}), 0); +} -int64x2_t __builtin_mpl_vector_qabsq_i64v2(int64x2_t a); -#define vqabsq_s64(a) __builtin_mpl_vector_qabsq_i64v2(a) +int8x8_t __builtin_mpl_vector_qrshl_v8i8(int8x8_t a, int8x8_t b); +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrshl_s8( + int8x8_t a, int8x8_t b) { + return __builtin_mpl_vector_qrshl_v8i8(a, b); +} -static inline int8_t __attribute__ ((__always_inline__, __gnu_inline__)) vqabsb_s8(int8_t a) { - return vget_lane_s8(vqabs_s8((int8x8_t){a}), 0); +int8x16_t __builtin_mpl_vector_qrshlq_v16i8(int8x16_t a, int8x16_t b); +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrshlq_s8( + int8x16_t a, int8x16_t b) { + return __builtin_mpl_vector_qrshlq_v16i8(a, b); } -static inline int16_t __attribute__ ((__always_inline__, __gnu_inline__)) vqabsh_s16(int16_t a) { - return vget_lane_s16(vqabs_s16((int16x4_t){a}), 0); +int16x4_t __builtin_mpl_vector_qrshl_v4i16(int16x4_t a, int16x4_t b); +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrshl_s16( + int16x4_t a, int16x4_t b) { + return __builtin_mpl_vector_qrshl_v4i16(a, b); } -static inline int32_t __attribute__ ((__always_inline__, __gnu_inline__)) vqabss_s32(int32_t a) { - return vget_lane_s32(vqabs_s32((int32x2_t){a}), 0); +int16x8_t __builtin_mpl_vector_qrshlq_v8i16(int16x8_t a, int16x8_t b); +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrshlq_s16( + int16x8_t a, int16x8_t b) { + return __builtin_mpl_vector_qrshlq_v8i16(a, b); } -static inline int64_t __attribute__ ((__always_inline__, __gnu_inline__)) vqabsd_s64(int64_t a) { - return vget_lane_s64(vqabs_s64((int64x1_t){a}), 0); +int32x2_t __builtin_mpl_vector_qrshl_v2i32(int32x2_t a, int32x2_t b); +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrshl_s32( + int32x2_t a, int32x2_t b) { + return __builtin_mpl_vector_qrshl_v2i32(a, b); } -uint32x2_t __builtin_mpl_vector_rsqrte_u32v2(uint32x2_t a); -#define vrsqrte_u32(a) __builtin_mpl_vector_rsqrte_u32v2(a) +int32x4_t __builtin_mpl_vector_qrshlq_v4i32(int32x4_t a, int32x4_t b); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrshlq_s32( + int32x4_t a, int32x4_t b) { + return __builtin_mpl_vector_qrshlq_v4i32(a, b); +} -uint32x4_t __builtin_mpl_vector_rsqrteq_u32v4(uint32x4_t a); -#define vrsqrteq_u32(a) __builtin_mpl_vector_rsqrteq_u32v4(a) +int64x1_t __builtin_mpl_vector_qrshl_v1i64(int64x1_t a, int64x1_t b); +extern inline int64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrshl_s64( + int64x1_t a, int64x1_t b) { + return __builtin_mpl_vector_qrshl_v1i64(a, b); +} -int16x4_t __builtin_mpl_vector_addlv_i8v8(int8x8_t a); -static inline int16_t __attribute__ ((__always_inline__, __gnu_inline__)) vaddlv_s8(int8x8_t a) { - return vget_lane_s16(__builtin_mpl_vector_addlv_i8v8(a), 0); +int64x2_t __builtin_mpl_vector_qrshlq_v2i64(int64x2_t a, int64x2_t b); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrshlq_s64( + int64x2_t a, int64x2_t b) { + return __builtin_mpl_vector_qrshlq_v2i64(a, b); } -int16x4_t __builtin_mpl_vector_addlvq_i8v16(int8x16_t a); -static inline int16_t __attribute__ ((__always_inline__, __gnu_inline__)) vaddlvq_s8(int8x16_t a) { - return vget_lane_s16(__builtin_mpl_vector_addlvq_i8v16(a), 0); +uint8x8_t __builtin_mpl_vector_qrshl_v8u8(uint8x8_t a, int8x8_t b); +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrshl_u8( + uint8x8_t a, int8x8_t b) { + return __builtin_mpl_vector_qrshl_v8u8(a, b); } -int32x2_t __builtin_mpl_vector_addlv_i16v4(int16x4_t a); -static inline int32_t __attribute__ ((__always_inline__, __gnu_inline__)) vaddlv_s16(int16x4_t a) { - return vget_lane_s32(__builtin_mpl_vector_addlv_i16v4(a), 0); +uint8x16_t __builtin_mpl_vector_qrshlq_v16u8(uint8x16_t a, int8x16_t b); +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrshlq_u8( + uint8x16_t a, int8x16_t b) { + return __builtin_mpl_vector_qrshlq_v16u8(a, b); } -int32x2_t __builtin_mpl_vector_addlvq_i16v8(int16x8_t a); -static inline int32_t __attribute__ ((__always_inline__, __gnu_inline__)) vaddlvq_s16(int16x8_t a) { - return vget_lane_s32(__builtin_mpl_vector_addlvq_i16v8(a), 0); +uint16x4_t __builtin_mpl_vector_qrshl_v4u16(uint16x4_t a, int16x4_t b); +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrshl_u16( + uint16x4_t a, int16x4_t b) { + return __builtin_mpl_vector_qrshl_v4u16(a, b); } -static inline int64_t __attribute__ ((__always_inline__, __gnu_inline__)) vaddlv_s32(int32x2_t a) { - return vget_lane_s64(vpaddl_s32(a), 0); +uint16x8_t __builtin_mpl_vector_qrshlq_v8u16(uint16x8_t a, int16x8_t b); +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrshlq_u16( + uint16x8_t a, int16x8_t b) { + return __builtin_mpl_vector_qrshlq_v8u16(a, b); } -int64x1_t __builtin_mpl_vector_addlvq_i32v4(int32x4_t a); -static inline int64_t __attribute__ ((__always_inline__, __gnu_inline__)) vaddlvq_s32(int32x4_t a) { - return vget_lane_s64(__builtin_mpl_vector_addlvq_i32v4(a), 0); +uint32x2_t __builtin_mpl_vector_qrshl_v2u32(uint32x2_t a, int32x2_t b); +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrshl_u32( + uint32x2_t a, int32x2_t b) { + return __builtin_mpl_vector_qrshl_v2u32(a, b); } -uint16x4_t __builtin_mpl_vector_addlv_u8v8(uint8x8_t a); -static inline uint16_t __attribute__ ((__always_inline__, __gnu_inline__)) vaddlv_u8(uint8x8_t a) { - return vget_lane_u16(__builtin_mpl_vector_addlv_u8v8(a), 0); +uint32x4_t __builtin_mpl_vector_qrshlq_v4u32(uint32x4_t a, int32x4_t b); +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrshlq_u32( + uint32x4_t a, int32x4_t b) { + return __builtin_mpl_vector_qrshlq_v4u32(a, b); } -uint16x4_t __builtin_mpl_vector_addlvq_u8v16(uint8x16_t a); -static inline uint16_t __attribute__ ((__always_inline__, __gnu_inline__)) vaddlvq_u8(uint8x16_t a) { - return vget_lane_u16(__builtin_mpl_vector_addlvq_u8v16(a), 0); +uint64x1_t __builtin_mpl_vector_qrshl_v1u64(uint64x1_t a, int64x1_t b); +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrshl_u64( + uint64x1_t a, int64x1_t b) { + return __builtin_mpl_vector_qrshl_v1u64(a, b); } -uint32x2_t __builtin_mpl_vector_addlv_u16v4(uint16x4_t a); -static inline uint32_t __attribute__ ((__always_inline__, __gnu_inline__)) vaddlv_u16(uint16x4_t a) { - return vget_lane_u32(__builtin_mpl_vector_addlv_u16v4(a), 0); +uint64x2_t __builtin_mpl_vector_qrshlq_v2u64(uint64x2_t a, int64x2_t b); +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrshlq_u64( + uint64x2_t a, int64x2_t b) { + return __builtin_mpl_vector_qrshlq_v2u64(a, b); } -uint32x2_t __builtin_mpl_vector_addlvq_u16v8(uint16x8_t a); -static inline uint32_t __attribute__ ((__always_inline__, __gnu_inline__)) vaddlvq_u16(uint16x8_t a) { - return vget_lane_u32(__builtin_mpl_vector_addlvq_u16v8(a), 0); +extern inline int8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrshlb_s8( + int8_t a, int8_t b) { + return vget_lane_s8(vqrshl_s8((int8x8_t){a}, (int8x8_t){b}), 0); } -static inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__)) vaddlv_u32(uint32x2_t a) { - return vget_lane_u64(vpaddl_u32(a), 0); +extern inline int16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrshlh_s16( + int16_t a, int16_t b) { + return vget_lane_s16(vqrshl_s16((int16x4_t){a}, (int16x4_t){b}), 0); } -uint64x1_t __builtin_mpl_vector_addlvq_u32v4(uint32x4_t a); -static inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__)) vaddlvq_u32(uint32x4_t a) { - return vget_lane_u64(__builtin_mpl_vector_addlvq_u32v4(a), 0); +extern inline int32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrshls_s32( + int32_t a, int32_t b) { + return vget_lane_s32(vqrshl_s32((int32x2_t){a}, (int32x2_t){b}), 0); } -int8x8_t __builtin_mpl_vector_qshl_i8v8(int8x8_t a, int8x8_t b); -#define vqshl_s8(a, b) __builtin_mpl_vector_qshl_i8v8(a, b) +extern inline int64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrshld_s64( + int64_t a, int64_t b) { + return vget_lane_s64(vqrshl_s64((int64x1_t){a}, (int64x1_t){b}), 0); +} -int8x16_t __builtin_mpl_vector_qshlq_i8v16(int8x16_t a, int8x16_t b); -#define vqshlq_s8(a, b) __builtin_mpl_vector_qshlq_i8v16(a, b) +extern inline uint8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrshlb_u8( + uint8_t a, int8_t b) { + return vget_lane_u8(vqrshl_u8((uint8x8_t){a}, (int8x8_t){b}), 0); +} -int16x4_t __builtin_mpl_vector_qshl_i16v4(int16x4_t a, int16x4_t b); -#define vqshl_s16(a, b) __builtin_mpl_vector_qshl_i16v4(a, b) +extern inline uint16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrshlh_u16( + uint16_t a, int16_t b) { + return vget_lane_u16(vqrshl_u16((uint16x4_t){a}, (int16x4_t){b}), 0); +} -int16x8_t __builtin_mpl_vector_qshlq_i16v8(int16x8_t a, int16x8_t b); -#define vqshlq_s16(a, b) __builtin_mpl_vector_qshlq_i16v8(a, b) +extern inline uint32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrshls_u32( + uint32_t a, int32_t b) { + return vget_lane_u32(vqrshl_u32((uint32x2_t){a}, (int32x2_t){b}), 0); +} -int32x2_t __builtin_mpl_vector_qshl_i32v2(int32x2_t a, int32x2_t b); -#define vqshl_s32(a, b) __builtin_mpl_vector_qshl_i32v2(a, b) +extern inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrshld_u64( + uint64_t a, int64_t b) { + return vget_lane_u64(vqrshl_u64((uint64x1_t){a}, (int64x1_t){b}), 0); +} -int32x4_t __builtin_mpl_vector_qshlq_i32v4(int32x4_t a, int32x4_t b); -#define vqshlq_s32(a, b) __builtin_mpl_vector_qshlq_i32v4(a, b) +int16x8_t __builtin_mpl_vector_shll_n_v8i16(int8x8_t a, const int n); +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshll_n_s8( + int8x8_t a, const int n) { + return __builtin_mpl_vector_shll_n_v8i16(a, n); +} -int64x1_t __builtin_mpl_vector_qshl_i64v1(int64x1_t a, int64x1_t b); -#define vqshl_s64(a, b) __builtin_mpl_vector_qshl_i64v1(a, b) +int32x4_t __builtin_mpl_vector_shll_n_v4i32(int16x4_t a, const int n); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshll_n_s16( + int16x4_t a, const int n) { + return __builtin_mpl_vector_shll_n_v4i32(a, n); +} -int64x2_t __builtin_mpl_vector_qshlq_i64v2(int64x2_t a, int64x2_t b); -#define vqshlq_s64(a, b) __builtin_mpl_vector_qshlq_i64v2(a, b) +int64x2_t __builtin_mpl_vector_shll_n_v2i64(int32x2_t a, const int n); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshll_n_s32( + int32x2_t a, const int n) { + return __builtin_mpl_vector_shll_n_v2i64(a, n); +} -uint8x8_t __builtin_mpl_vector_qshl_u8v8(uint8x8_t a, int8x8_t b); -#define vqshl_u8(a, b) __builtin_mpl_vector_qshl_u8v8(a, b) +uint16x8_t __builtin_mpl_vector_shll_n_v8u16(uint8x8_t a, const int n); +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshll_n_u8( + uint8x8_t a, const int n) { + return __builtin_mpl_vector_shll_n_v8u16(a, n); +} -uint8x16_t __builtin_mpl_vector_qshlq_u8v16(uint8x16_t a, int8x16_t b); -#define vqshlq_u8(a, b) __builtin_mpl_vector_qshlq_u8v16(a, b) +uint32x4_t __builtin_mpl_vector_shll_n_v4u32(uint16x4_t a, const int n); +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshll_n_u16( + uint16x4_t a, const int n) { + return __builtin_mpl_vector_shll_n_v4u32(a, n); +} -uint16x4_t __builtin_mpl_vector_qshl_u16v4(uint16x4_t a, int16x4_t b); -#define vqshl_u16(a, b) __builtin_mpl_vector_qshl_u16v4(a, b) +uint64x2_t __builtin_mpl_vector_shll_n_v2u64(uint32x2_t a, const int n); +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshll_n_u32( + uint32x2_t a, const int n) { + return __builtin_mpl_vector_shll_n_v2u64(a, n); +} -uint16x8_t __builtin_mpl_vector_qshlq_u16v8(uint16x8_t a, int16x8_t b); -#define vqshlq_u16(a, b) __builtin_mpl_vector_qshlq_u16v8(a, b) +int16x8_t __builtin_mpl_vector_shll_high_n_v8i16(int8x16_t a, const int n); +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshll_high_n_s8( + int8x16_t a, const int n) { + return __builtin_mpl_vector_shll_high_n_v8i16(a, n); +} -uint32x2_t __builtin_mpl_vector_qshl_u32v2(uint32x2_t a, int32x2_t b); -#define vqshl_u32(a, b) __builtin_mpl_vector_qshl_u32v2(a, b) +int32x4_t __builtin_mpl_vector_shll_high_n_v4i32(int16x8_t a, const int n); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshll_high_n_s16( + int16x8_t a, const int n) { + return __builtin_mpl_vector_shll_high_n_v4i32(a, n); +} -uint32x4_t __builtin_mpl_vector_qshlq_u32v4(uint32x4_t a, int32x4_t b); -#define vqshlq_u32(a, b) __builtin_mpl_vector_qshlq_u32v4(a, b) +int64x2_t __builtin_mpl_vector_shll_high_n_v2i64(int32x4_t a, const int n); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshll_high_n_s32( + int32x4_t a, const int n) { + return __builtin_mpl_vector_shll_high_n_v2i64(a, n); +} -uint64x1_t __builtin_mpl_vector_qshl_u64v1(uint64x1_t a, int64x1_t b); -#define vqshl_u64(a, b) __builtin_mpl_vector_qshl_u64v1(a, b) +uint16x8_t __builtin_mpl_vector_shll_high_n_v8u16(uint8x16_t a, const int n); +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshll_high_n_u8( + uint8x16_t a, const int n) { + return __builtin_mpl_vector_shll_high_n_v8u16(a, n); +} -uint64x2_t __builtin_mpl_vector_qshlq_u64v2(uint64x2_t a, int64x2_t b); -#define vqshlq_u64(a, b) __builtin_mpl_vector_qshlq_u64v2(a, b) +uint32x4_t __builtin_mpl_vector_shll_high_n_v4u32(uint16x8_t a, const int n); +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshll_high_n_u16( + uint16x8_t a, const int n) { + return __builtin_mpl_vector_shll_high_n_v4u32(a, n); +} -static inline int8_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqshlb_s8(int8_t a, int8_t b) { - return vget_lane_s8(vqshl_s8((int8x8_t){a}, (int8x8_t){b}), 0); +uint64x2_t __builtin_mpl_vector_shll_high_n_v2u64(uint32x4_t a, const int n); +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshll_high_n_u32( + uint32x4_t a, const int n) { + return __builtin_mpl_vector_shll_high_n_v2u64(a, n); } -static inline int16_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqshlh_s16(int16_t a, int16_t b) { - return vget_lane_s16(vqshl_s16((int16x4_t){a}, (int16x4_t){b}), 0); +int8x8_t __builtin_mpl_vector_sli_n_v8i8(int8x8_t a, int8x8_t b, const int n); +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsli_n_s8( + int8x8_t a, int8x8_t b, const int n) { + return __builtin_mpl_vector_sli_n_v8i8(a, b, n); } -static inline int32_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqshls_s32(int32_t a, int32_t b) { - return vget_lane_s32(vqshl_s32((int32x2_t){a}, (int32x2_t){b}), 0); +int8x16_t __builtin_mpl_vector_sliq_n_v16i8(int8x16_t a, int8x16_t b, const int n); +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsliq_n_s8( + int8x16_t a, int8x16_t b, const int n) { + return __builtin_mpl_vector_sliq_n_v16i8(a, b, n); } -static inline int64_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqshld_s64(int64_t a, int64_t b) { - return vget_lane_s64(vqshl_s64((int64x1_t){a}, (int64x1_t){b}), 0); +int16x4_t __builtin_mpl_vector_sli_n_v4i16(int16x4_t a, int16x4_t b, const int n); +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsli_n_s16( + int16x4_t a, int16x4_t b, const int n) { + return __builtin_mpl_vector_sli_n_v4i16(a, b, n); } -static inline uint8_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqshlb_u8(uint8_t a, uint8_t b) { - return vget_lane_u8(vqshl_u8((uint8x8_t){a}, (uint8x8_t){b}), 0); +int16x8_t __builtin_mpl_vector_sliq_n_v8i16(int16x8_t a, int16x8_t b, const int n); +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsliq_n_s16( + int16x8_t a, int16x8_t b, const int n) { + return __builtin_mpl_vector_sliq_n_v8i16(a, b, n); } -static inline uint16_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqshlh_u16(uint16_t a, uint16_t b) { - return vget_lane_u16(vqshl_u16((uint16x4_t){a}, (uint16x4_t){b}), 0); +int32x2_t __builtin_mpl_vector_sli_n_v2i32(int32x2_t a, int32x2_t b, const int n); +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsli_n_s32( + int32x2_t a, int32x2_t b, const int n) { + return __builtin_mpl_vector_sli_n_v2i32(a, b, n); } -static inline uint32_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqshls_u32(uint32_t a, uint32_t b) { - return vget_lane_u32(vqshl_u32((uint32x2_t){a}, (uint32x2_t){b}), 0); +int32x4_t __builtin_mpl_vector_sliq_n_v4i32(int32x4_t a, int32x4_t b, const int n); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsliq_n_s32( + int32x4_t a, int32x4_t b, const int n) { + return __builtin_mpl_vector_sliq_n_v4i32(a, b, n); } -static inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqshld_u64(uint64_t a, uint64_t b) { - return vget_lane_u64(vqshl_u64((uint64x1_t){a}, (uint64x1_t){b}), 0); +int64x1_t __builtin_mpl_vector_sli_n_v1i64(int64x1_t a, int64x1_t b, const int n); +extern inline int64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsli_n_s64( + int64x1_t a, int64x1_t b, const int n) { + return __builtin_mpl_vector_sli_n_v1i64(a, b, n); } -int8x8_t __builtin_mpl_vector_qshl_n_i8v8(int8x8_t a, const int n); -#define vqshl_n_s8(a, n) __builtin_mpl_vector_qshl_n_i8v8(a, n) +int64x2_t __builtin_mpl_vector_sliq_n_v2i64(int64x2_t a, int64x2_t b, const int n); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsliq_n_s64( + int64x2_t a, int64x2_t b, const int n) { + return __builtin_mpl_vector_sliq_n_v2i64(a, b, n); +} -int8x16_t __builtin_mpl_vector_qshlq_n_i8v16(int8x16_t a, const int n); -#define vqshlq_n_s8(a, n) __builtin_mpl_vector_qshlq_n_i8v16(a, n) +uint8x8_t __builtin_mpl_vector_sli_n_v8u8(uint8x8_t a, uint8x8_t b, const int n); +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsli_n_u8( + uint8x8_t a, uint8x8_t b, const int n) { + return __builtin_mpl_vector_sli_n_v8u8(a, b, n); +} -int16x4_t __builtin_mpl_vector_qshl_n_i16v4(int16x4_t a, const int n); -#define vqshl_n_s16(a, n) __builtin_mpl_vector_qshl_n_i16v4(a, n) +uint8x16_t __builtin_mpl_vector_sliq_n_v16u8(uint8x16_t a, uint8x16_t b, const int n); +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsliq_n_u8( + uint8x16_t a, uint8x16_t b, const int n) { + return __builtin_mpl_vector_sliq_n_v16u8(a, b, n); +} -int16x8_t __builtin_mpl_vector_qshlq_n_i16v8(int16x8_t a, const int n); -#define vqshlq_n_s16(a, n) __builtin_mpl_vector_qshlq_n_i16v8(a, n) +uint16x4_t __builtin_mpl_vector_sli_n_v4u16(uint16x4_t a, uint16x4_t b, const int n); +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsli_n_u16( + uint16x4_t a, uint16x4_t b, const int n) { + return __builtin_mpl_vector_sli_n_v4u16(a, b, n); +} -int32x2_t __builtin_mpl_vector_qshl_n_i32v2(int32x2_t a, const int n); -#define vqshl_n_s32(a, n) __builtin_mpl_vector_qshl_n_i32v2(a, n) +uint16x8_t __builtin_mpl_vector_sliq_n_v8u16(uint16x8_t a, uint16x8_t b, const int n); +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsliq_n_u16( + uint16x8_t a, uint16x8_t b, const int n) { + return __builtin_mpl_vector_sliq_n_v8u16(a, b, n); +} -int32x4_t __builtin_mpl_vector_qshlq_n_i32v4(int32x4_t a, const int n); -#define vqshlq_n_s32(a, n) __builtin_mpl_vector_qshlq_n_i32v4(a, n) +uint32x2_t __builtin_mpl_vector_sli_n_v2u32(uint32x2_t a, uint32x2_t b, const int n); +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsli_n_u32( + uint32x2_t a, uint32x2_t b, const int n) { + return __builtin_mpl_vector_sli_n_v2u32(a, b, n); +} -int64x1_t __builtin_mpl_vector_qshl_n_i64v1(int64x1_t a, const int n); -#define vqshl_n_s64(a, n) __builtin_mpl_vector_qshl_n_i64v1(a, n) +uint32x4_t __builtin_mpl_vector_sliq_n_v4u32(uint32x4_t a, uint32x4_t b, const int n); +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsliq_n_u32( + uint32x4_t a, uint32x4_t b, const int n) { + return __builtin_mpl_vector_sliq_n_v4u32(a, b, n); +} -int64x2_t __builtin_mpl_vector_qshlq_n_i64v2(int64x2_t a, const int n); -#define vqshlq_n_s64(a, n) __builtin_mpl_vector_qshlq_n_i64v2(a, n) +uint64x1_t __builtin_mpl_vector_sli_n_v1u64(uint64x1_t a, uint64x1_t b, const int n); +extern inline uint64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsli_n_u64( + uint64x1_t a, uint64x1_t b, const int n) { + return __builtin_mpl_vector_sli_n_v1u64(a, b, n); +} -uint8x8_t __builtin_mpl_vector_qshl_n_u8v8(uint8x8_t a, const int n); -#define vqshl_n_u8(a, n) __builtin_mpl_vector_qshl_n_u8v8(a, n) +uint64x2_t __builtin_mpl_vector_sliq_n_v2u64(uint64x2_t a, uint64x2_t b, const int n); +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsliq_n_u64( + uint64x2_t a, uint64x2_t b, const int n) { + return __builtin_mpl_vector_sliq_n_v2u64(a, b, n); +} -uint8x16_t __builtin_mpl_vector_qshlq_n_u8v16(uint8x16_t a, const int n); -#define vqshlq_n_u8(a, n) __builtin_mpl_vector_qshlq_n_u8v16(a, n) +extern inline int64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vslid_n_s64( + int64_t a, int64_t b, const int n) { + return vget_lane_s64(vsli_n_s64((int64x1_t){a}, (int64x1_t){b}, n), 0); +} -uint16x4_t __builtin_mpl_vector_qshl_n_u16v4(uint16x4_t a, const int n); -#define vqshl_n_u16(a, n) __builtin_mpl_vector_qshl_n_u16v4(a, n) +extern inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vslid_n_u64( + uint64_t a, uint64_t b, const int n) { + return vget_lane_u64(vsli_n_u64((uint64x1_t){a}, (uint64x1_t){b}, n), 0); +} -uint16x8_t __builtin_mpl_vector_qshlq_n_u16v8(uint16x8_t a, const int n); -#define vqshlq_n_u16(a, n) __builtin_mpl_vector_qshlq_n_u16v8(a, n) +int8x8_t __builtin_mpl_vector_rshr_n_v8i8(int8x8_t a, const int n); +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrshr_n_s8( + int8x8_t a, const int n) { + return __builtin_mpl_vector_rshr_n_v8i8(a, n); +} -uint32x2_t __builtin_mpl_vector_qshl_n_u32v2(uint32x2_t a, const int n); -#define vqshl_n_u32(a, n) __builtin_mpl_vector_qshl_n_u32v2(a, n) +int8x16_t __builtin_mpl_vector_rshrq_n_v16i8(int8x16_t a, const int n); +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrshrq_n_s8( + int8x16_t a, const int n) { + return __builtin_mpl_vector_rshrq_n_v16i8(a, n); +} -uint32x4_t __builtin_mpl_vector_qshlq_n_u32v4(uint32x4_t a, const int n); -#define vqshlq_n_u32(a, n) __builtin_mpl_vector_qshlq_n_u32v4(a, n) +int16x4_t __builtin_mpl_vector_rshr_n_v4i16(int16x4_t a, const int n); +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrshr_n_s16( + int16x4_t a, const int n) { + return __builtin_mpl_vector_rshr_n_v4i16(a, n); +} -uint64x1_t __builtin_mpl_vector_qshl_n_u64v1(uint64x1_t a, const int n); -#define vqshl_n_u64(a, n) __builtin_mpl_vector_qshl_n_u64v1(a, n) +int16x8_t __builtin_mpl_vector_rshrq_n_v8i16(int16x8_t a, const int n); +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrshrq_n_s16( + int16x8_t a, const int n) { + return __builtin_mpl_vector_rshrq_n_v8i16(a, n); +} -uint64x2_t __builtin_mpl_vector_qshlq_n_u64v2(uint64x2_t a, const int n); -#define vqshlq_n_u64(a, n) __builtin_mpl_vector_qshlq_n_u64v2(a, n) +int32x2_t __builtin_mpl_vector_rshr_n_v2i32(int32x2_t a, const int n); +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrshr_n_s32( + int32x2_t a, const int n) { + return __builtin_mpl_vector_rshr_n_v2i32(a, n); +} -static inline int8_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqshlb_n_s8(int8_t a, const int n) { - return vget_lane_s64(vqshl_n_s8((int8x8_t){a}, n), 0); +int32x4_t __builtin_mpl_vector_rshrq_n_v4i32(int32x4_t a, const int n); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrshrq_n_s32( + int32x4_t a, const int n) { + return __builtin_mpl_vector_rshrq_n_v4i32(a, n); } -static inline int16_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqshlh_n_s16(int16_t a, const int n) { - return vget_lane_s64(vqshl_n_s16((int16x4_t){a}, n), 0); +int64x2_t __builtin_mpl_vector_rshrq_n_v2i64(int64x2_t a, const int n); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrshrq_n_s64( + int64x2_t a, const int n) { + return __builtin_mpl_vector_rshrq_n_v2i64(a, n); } -static inline int32_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqshls_n_s32(int32_t a, const int n) { - return vget_lane_s64(vqshl_n_s32((int32x2_t){a}, n), 0); +uint8x8_t __builtin_mpl_vector_rshr_n_v8u8(uint8x8_t a, const int n); +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrshr_n_u8( + uint8x8_t a, const int n) { + return __builtin_mpl_vector_rshr_n_v8u8(a, n); } -static inline int64_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqshld_n_s64(int64_t a, const int n) { - return vget_lane_s64(vqshl_n_s64((int64x1_t){a}, n), 0); +uint8x16_t __builtin_mpl_vector_rshrq_n_v16u8(uint8x16_t a, const int n); +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrshrq_n_u8( + uint8x16_t a, const int n) { + return __builtin_mpl_vector_rshrq_n_v16u8(a, n); } -static inline uint8_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqshlb_n_u8(uint8_t a, const int n) { - return vget_lane_u64(vqshl_n_u8((uint8x8_t){a}, n), 0); +uint16x4_t __builtin_mpl_vector_rshr_n_v4u16(uint16x4_t a, const int n); +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrshr_n_u16( + uint16x4_t a, const int n) { + return __builtin_mpl_vector_rshr_n_v4u16(a, n); } -static inline uint16_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqshlh_n_u16(uint16_t a, const int n) { - return vget_lane_u64(vqshl_n_u16((uint16x4_t){a}, n), 0); +uint16x8_t __builtin_mpl_vector_rshrq_n_v8u16(uint16x8_t a, const int n); +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrshrq_n_u16( + uint16x8_t a, const int n) { + return __builtin_mpl_vector_rshrq_n_v8u16(a, n); } -static inline uint32_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqshls_n_u32(uint32_t a, const int n) { - return vget_lane_u64(vqshl_n_u32((uint32x2_t){a}, n), 0); +uint32x2_t __builtin_mpl_vector_rshr_n_v2u32(uint32x2_t a, const int n); +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrshr_n_u32( + uint32x2_t a, const int n) { + return __builtin_mpl_vector_rshr_n_v2u32(a, n); } -static inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqshld_n_u64(uint64_t a, const int n) { - return vget_lane_u64(vqshl_n_u64((uint64x1_t){a}, n), 0); +uint32x4_t __builtin_mpl_vector_rshrq_n_v4u32(uint32x4_t a, const int n); +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrshrq_n_u32( + uint32x4_t a, const int n) { + return __builtin_mpl_vector_rshrq_n_v4u32(a, n); } -uint8x8_t __builtin_mpl_vector_qshlu_n_u8v8(int8x8_t a, const int n); -#define vqshlu_n_s8(a, n) __builtin_mpl_vector_qshlu_n_u8v8(a, n) +uint64x2_t __builtin_mpl_vector_rshrq_n_v2u64(uint64x2_t a, const int n); +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrshrq_n_u64( + uint64x2_t a, const int n) { + return __builtin_mpl_vector_rshrq_n_v2u64(a, n); +} -uint8x16_t __builtin_mpl_vector_qshluq_n_u8v16(int8x16_t a, const int n); -#define vqshluq_n_s8(a, n) __builtin_mpl_vector_qshluq_n_u8v16(a, n) +int64x1_t __builtin_mpl_vector_rshrd_n_i64(int64x1_t a, const int n); +extern inline int64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrshrd_n_s64( + int64_t a, const int n) { + return vget_lane_s64(__builtin_mpl_vector_rshrd_n_i64((int64x1_t){a}, n), 0); +} -uint16x4_t __builtin_mpl_vector_qshlu_n_u16v4(int16x4_t a, const int n); -#define vqshlu_n_s16(a, n) __builtin_mpl_vector_qshlu_n_u16v4(a, n) +uint64x1_t __builtin_mpl_vector_rshrd_n_u64(uint64x1_t a, const int n); +extern inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrshrd_n_u64( + uint64_t a, const int n) { + return vget_lane_u64(__builtin_mpl_vector_rshrd_n_u64((uint64x1_t){a}, n), 0); +} -uint16x8_t __builtin_mpl_vector_qshluq_n_u16v8(int16x8_t a, const int n); -#define vqshluq_n_s16(a, n) __builtin_mpl_vector_qshluq_n_u16v8(a, n) +int8x8_t __builtin_mpl_vector_sra_n_v8i8(int8x8_t a, int8x8_t b, const int n); +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsra_n_s8( + int8x8_t a, int8x8_t b, const int n) { + return __builtin_mpl_vector_sra_n_v8i8(a, b, n); +} -uint32x2_t __builtin_mpl_vector_qshlu_n_u32v2(int32x2_t a, const int n); -#define vqshlu_n_s32(a, n) __builtin_mpl_vector_qshlu_n_u32v2(a, n) +int8x16_t __builtin_mpl_vector_sraq_n_v16i8(int8x16_t a, int8x16_t b, const int n); +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsraq_n_s8( + int8x16_t a, int8x16_t b, const int n) { + return __builtin_mpl_vector_sraq_n_v16i8(a, b, n); +} -uint32x4_t __builtin_mpl_vector_qshluq_n_u32v4(int32x4_t a, const int n); -#define vqshluq_n_s32(a, n) __builtin_mpl_vector_qshluq_n_u32v4(a, n) +int16x4_t __builtin_mpl_vector_sra_n_v4i16(int16x4_t a, int16x4_t b, const int n); +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsra_n_s16( + int16x4_t a, int16x4_t b, const int n) { + return __builtin_mpl_vector_sra_n_v4i16(a, b, n); +} -uint64x1_t __builtin_mpl_vector_qshlu_n_u64v1(int64x1_t a, const int n); -#define vqshlu_n_s64(a, n) __builtin_mpl_vector_qshlu_n_u64v1(a, n) +int16x8_t __builtin_mpl_vector_sraq_n_v8i16(int16x8_t a, int16x8_t b, const int n); +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsraq_n_s16( + int16x8_t a, int16x8_t b, const int n) { + return __builtin_mpl_vector_sraq_n_v8i16(a, b, n); +} -uint64x2_t __builtin_mpl_vector_qshluq_n_u64v2(int64x2_t a, const int n); -#define vqshluq_n_s64(a, n) __builtin_mpl_vector_qshluq_n_u64v2(a, n) +int32x2_t __builtin_mpl_vector_sra_n_v2i32(int32x2_t a, int32x2_t b, const int n); +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsra_n_s32( + int32x2_t a, int32x2_t b, const int n) { + return __builtin_mpl_vector_sra_n_v2i32(a, b, n); +} -static inline uint8_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqshlub_n_s8(int8_t a, const int n) { - return vget_lane_u64(vqshlu_n_s8((int8x8_t){a}, n), 0); +int32x4_t __builtin_mpl_vector_sraq_n_v4i32(int32x4_t a, int32x4_t b, const int n); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsraq_n_s32( + int32x4_t a, int32x4_t b, const int n) { + return __builtin_mpl_vector_sraq_n_v4i32(a, b, n); } -static inline uint16_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqshluh_n_s16(int16_t a, const int n) { - return vget_lane_u64(vqshlu_n_s16((int16x4_t){a}, n), 0); +int64x2_t __builtin_mpl_vector_sraq_n_v2i64(int64x2_t a, int64x2_t b, const int n); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsraq_n_s64( + int64x2_t a, int64x2_t b, const int n) { + return __builtin_mpl_vector_sraq_n_v2i64(a, b, n); } -static inline uint32_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqshlus_n_s32(int32_t a, const int n) { - return vget_lane_u64(vqshlu_n_s32((int32x2_t){a}, n), 0); +uint8x8_t __builtin_mpl_vector_sra_n_v8u8(uint8x8_t a, uint8x8_t b, const int n); +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsra_n_u8( + uint8x8_t a, uint8x8_t b, const int n) { + return __builtin_mpl_vector_sra_n_v8u8(a, b, n); } -static inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqshlud_n_s64(int64_t a, const int n) { - return vget_lane_u64(vqshlu_n_s64((int64x1_t){a}, n), 0); +uint8x16_t __builtin_mpl_vector_sraq_n_v16u8(uint8x16_t a, uint8x16_t b, const int n); +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsraq_n_u8( + uint8x16_t a, uint8x16_t b, const int n) { + return __builtin_mpl_vector_sraq_n_v16u8(a, b, n); } -int8x8_t __builtin_mpl_vector_rshl_i8v8(int8x8_t a, int8x8_t b); -#define vrshl_s8(a, b) __builtin_mpl_vector_rshl_i8v8(a, b) +uint16x4_t __builtin_mpl_vector_sra_n_v4u16(uint16x4_t a, uint16x4_t b, const int n); +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsra_n_u16( + uint16x4_t a, uint16x4_t b, const int n) { + return __builtin_mpl_vector_sra_n_v4u16(a, b, n); +} -int8x16_t __builtin_mpl_vector_rshlq_i8v16(int8x16_t a, int8x16_t b); -#define vrshlq_s8(a, b) __builtin_mpl_vector_rshlq_i8v16(a, b) +uint16x8_t __builtin_mpl_vector_sraq_n_v8u16(uint16x8_t a, uint16x8_t b, const int n); +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsraq_n_u16( + uint16x8_t a, uint16x8_t b, const int n) { + return __builtin_mpl_vector_sraq_n_v8u16(a, b, n); +} -int16x4_t __builtin_mpl_vector_rshl_i16v4(int16x4_t a, int16x4_t b); -#define vrshl_s16(a, b) __builtin_mpl_vector_rshl_i16v4(a, b) +uint32x2_t __builtin_mpl_vector_sra_n_v2u32(uint32x2_t a, uint32x2_t b, const int n); +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsra_n_u32( + uint32x2_t a, uint32x2_t b, const int n) { + return __builtin_mpl_vector_sra_n_v2u32(a, b, n); +} -int16x8_t __builtin_mpl_vector_rshlq_i16v8(int16x8_t a, int16x8_t b); -#define vrshlq_s16(a, b) __builtin_mpl_vector_rshlq_i16v8(a, b) +uint32x4_t __builtin_mpl_vector_sraq_n_v4u32(uint32x4_t a, uint32x4_t b, const int n); +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsraq_n_u32( + uint32x4_t a, uint32x4_t b, const int n) { + return __builtin_mpl_vector_sraq_n_v4u32(a, b, n); +} -int32x2_t __builtin_mpl_vector_rshl_i32v2(int32x2_t a, int32x2_t b); -#define vrshl_s32(a, b) __builtin_mpl_vector_rshl_i32v2(a, b) +uint64x2_t __builtin_mpl_vector_sraq_n_v2u64(uint64x2_t a, uint64x2_t b, const int n); +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsraq_n_u64( + uint64x2_t a, uint64x2_t b, const int n) { + return __builtin_mpl_vector_sraq_n_v2u64(a, b, n); +} -int32x4_t __builtin_mpl_vector_rshlq_i32v4(int32x4_t a, int32x4_t b); -#define vrshlq_s32(a, b) __builtin_mpl_vector_rshlq_i32v4(a, b) +int64x1_t __builtin_mpl_vector_srad_n_i64(int64x1_t a, int64x1_t b, const int n); +extern inline int64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsrad_n_s64( + int64_t a, int64_t b, const int n) { + return vget_lane_s64(__builtin_mpl_vector_srad_n_i64((int64x1_t){a}, (int64x1_t){b}, n), 0); +} -int64x1_t __builtin_mpl_vector_rshl_i64v1(int64x1_t a, int64x1_t b); -#define vrshl_s64(a, b) __builtin_mpl_vector_rshl_i64v1(a, b) +uint64x1_t __builtin_mpl_vector_srad_n_u64(uint64x1_t a, uint64x1_t b, const int n); +extern inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsrad_n_u64( + uint64_t a, uint64_t b, const int n) { + return vget_lane_u64(__builtin_mpl_vector_srad_n_u64((uint64x1_t){a}, (uint64x1_t){b}, n), 0); +} -int64x2_t __builtin_mpl_vector_rshlq_i64v2(int64x2_t a, int64x2_t b); -#define vrshlq_s64(a, b) __builtin_mpl_vector_rshlq_i64v2(a, b) +int8x8_t __builtin_mpl_vector_rsra_n_v8i8(int8x8_t a, int8x8_t b, const int n); +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrsra_n_s8( + int8x8_t a, int8x8_t b, const int n) { + return __builtin_mpl_vector_rsra_n_v8i8(a, b, n); +} -uint8x8_t __builtin_mpl_vector_rshl_u8v8(uint8x8_t a, int8x8_t b); -#define vrshl_u8(a, b) __builtin_mpl_vector_rshl_u8v8(a, b) +int8x16_t __builtin_mpl_vector_rsraq_n_v16i8(int8x16_t a, int8x16_t b, const int n); +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrsraq_n_s8( + int8x16_t a, int8x16_t b, const int n) { + return __builtin_mpl_vector_rsraq_n_v16i8(a, b, n); +} -uint8x16_t __builtin_mpl_vector_rshlq_u8v16(uint8x16_t a, int8x16_t b); -#define vrshlq_u8(a, b) __builtin_mpl_vector_rshlq_u8v16(a, b) +int16x4_t __builtin_mpl_vector_rsra_n_v4i16(int16x4_t a, int16x4_t b, const int n); +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrsra_n_s16( + int16x4_t a, int16x4_t b, const int n) { + return __builtin_mpl_vector_rsra_n_v4i16(a, b, n); +} -uint16x4_t __builtin_mpl_vector_rshl_u16v4(uint16x4_t a, int16x4_t b); -#define vrshl_u16(a, b) __builtin_mpl_vector_rshl_u16v4(a, b) +int16x8_t __builtin_mpl_vector_rsraq_n_v8i16(int16x8_t a, int16x8_t b, const int n); +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrsraq_n_s16( + int16x8_t a, int16x8_t b, const int n) { + return __builtin_mpl_vector_rsraq_n_v8i16(a, b, n); +} -uint16x8_t __builtin_mpl_vector_rshlq_u16v8(uint16x8_t a, int16x8_t b); -#define vrshlq_u16(a, b) __builtin_mpl_vector_rshlq_u16v8(a, b) +int32x2_t __builtin_mpl_vector_rsra_n_v2i32(int32x2_t a, int32x2_t b, const int n); +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrsra_n_s32( + int32x2_t a, int32x2_t b, const int n) { + return __builtin_mpl_vector_rsra_n_v2i32(a, b, n); +} -uint32x2_t __builtin_mpl_vector_rshl_u32v2(uint32x2_t a, int32x2_t b); -#define vrshl_u32(a, b) __builtin_mpl_vector_rshl_u32v2(a, b) +int32x4_t __builtin_mpl_vector_rsraq_n_v4i32(int32x4_t a, int32x4_t b, const int n); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrsraq_n_s32( + int32x4_t a, int32x4_t b, const int n) { + return __builtin_mpl_vector_rsraq_n_v4i32(a, b, n); +} -uint32x4_t __builtin_mpl_vector_rshlq_u32v4(uint32x4_t a, int32x4_t b); -#define vrshlq_u32(a, b) __builtin_mpl_vector_rshlq_u32v4(a, b) +int64x2_t __builtin_mpl_vector_rsraq_n_v2i64(int64x2_t a, int64x2_t b, const int n); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrsraq_n_s64( + int64x2_t a, int64x2_t b, const int n) { + return __builtin_mpl_vector_rsraq_n_v2i64(a, b, n); +} -uint64x1_t __builtin_mpl_vector_rshl_u64v1(uint64x1_t a, int64x1_t b); -#define vrshl_u64(a, b) __builtin_mpl_vector_rshl_u64v1(a, b) +uint8x8_t __builtin_mpl_vector_rsra_n_v8u8(uint8x8_t a, uint8x8_t b, const int n); +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrsra_n_u8( + uint8x8_t a, uint8x8_t b, const int n) { + return __builtin_mpl_vector_rsra_n_v8u8(a, b, n); +} -uint64x2_t __builtin_mpl_vector_rshlq_u64v2(uint64x2_t a, int64x2_t b); -#define vrshlq_u64(a, b) __builtin_mpl_vector_rshlq_u64v2(a, b) +uint8x16_t __builtin_mpl_vector_rsraq_n_v16u8(uint8x16_t a, uint8x16_t b, const int n); +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrsraq_n_u8( + uint8x16_t a, uint8x16_t b, const int n) { + return __builtin_mpl_vector_rsraq_n_v16u8(a, b, n); +} -static inline int64_t __attribute__ ((__always_inline__, __gnu_inline__)) -vrshld_s64(int64_t a, int64_t b) { - return vget_lane_s64(vrshl_s64((int64x1_t){a}, (int64x1_t){b}), 0); +uint16x4_t __builtin_mpl_vector_rsra_n_v4u16(uint16x4_t a, uint16x4_t b, const int n); +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrsra_n_u16( + uint16x4_t a, uint16x4_t b, const int n) { + return __builtin_mpl_vector_rsra_n_v4u16(a, b, n); } -static inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__)) -vrshld_u64(uint64_t a, uint64_t b) { - return vget_lane_u64(vrshl_u64((uint64x1_t){a}, (uint64x1_t){b}), 0); +uint16x8_t __builtin_mpl_vector_rsraq_n_v8u16(uint16x8_t a, uint16x8_t b, const int n); +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrsraq_n_u16( + uint16x8_t a, uint16x8_t b, const int n) { + return __builtin_mpl_vector_rsraq_n_v8u16(a, b, n); } -int8x8_t __builtin_mpl_vector_qrshl_i8v8(int8x8_t a, int8x8_t b); -#define vqrshl_s8(a, b) __builtin_mpl_vector_qrshl_i8v8(a, b) +uint32x2_t __builtin_mpl_vector_rsra_n_v2u32(uint32x2_t a, uint32x2_t b, const int n); +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrsra_n_u32( + uint32x2_t a, uint32x2_t b, const int n) { + return __builtin_mpl_vector_rsra_n_v2u32(a, b, n); +} -int8x16_t __builtin_mpl_vector_qrshlq_i8v16(int8x16_t a, int8x16_t b); -#define vqrshlq_s8(a, b) __builtin_mpl_vector_qrshlq_i8v16(a, b) +uint32x4_t __builtin_mpl_vector_rsraq_n_v4u32(uint32x4_t a, uint32x4_t b, const int n); +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrsraq_n_u32( + uint32x4_t a, uint32x4_t b, const int n) { + return __builtin_mpl_vector_rsraq_n_v4u32(a, b, n); +} -int16x4_t __builtin_mpl_vector_qrshl_i16v4(int16x4_t a, int16x4_t b); -#define vqrshl_s16(a, b) __builtin_mpl_vector_qrshl_i16v4(a, b) +uint64x2_t __builtin_mpl_vector_rsraq_n_v2u64(uint64x2_t a, uint64x2_t b, const int n); +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrsraq_n_u64( + uint64x2_t a, uint64x2_t b, const int n) { + return __builtin_mpl_vector_rsraq_n_v2u64(a, b, n); +} -int16x8_t __builtin_mpl_vector_qrshlq_i16v8(int16x8_t a, int16x8_t b); -#define vqrshlq_s16(a, b) __builtin_mpl_vector_qrshlq_i16v8(a, b) +int64x1_t __builtin_mpl_vector_rsrad_n_i64(int64x1_t a, int64x1_t b, const int n); +extern inline int64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrsrad_n_s64( + int64_t a, int64_t b, const int n) { + return vget_lane_s64(__builtin_mpl_vector_rsrad_n_i64((int64x1_t){a}, (int64x1_t){b}, n), 0); +} -int32x2_t __builtin_mpl_vector_qrshl_i32v2(int32x2_t a, int32x2_t b); -#define vqrshl_s32(a, b) __builtin_mpl_vector_qrshl_i32v2(a, b) +uint64x1_t __builtin_mpl_vector_rsrad_n_u64(uint64x1_t a, uint64x1_t b, const int n); +extern inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrsrad_n_u64( + uint64_t a, uint64_t b, const int n) { + return vget_lane_u64(__builtin_mpl_vector_rsrad_n_u64((uint64x1_t){a}, (uint64x1_t){b}, n), 0); +} -int32x4_t __builtin_mpl_vector_qrshlq_i32v4(int32x4_t a, int32x4_t b); -#define vqrshlq_s32(a, b) __builtin_mpl_vector_qrshlq_i32v4(a, b) +int8x8_t __builtin_mpl_vector_shrn_n_v8i8(int16x8_t a, const int n); +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshrn_n_s16( + int16x8_t a, const int n) { + return __builtin_mpl_vector_shrn_n_v8i8(a, n); +} -int64x1_t __builtin_mpl_vector_qrshl_i64v1(int64x1_t a, int64x1_t b); -#define vqrshl_s64(a, b) __builtin_mpl_vector_qrshl_i64v1(a, b) +int16x4_t __builtin_mpl_vector_shrn_n_v4i16(int32x4_t a, const int n); +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshrn_n_s32( + int32x4_t a, const int n) { + return __builtin_mpl_vector_shrn_n_v4i16(a, n); +} -int64x2_t __builtin_mpl_vector_qrshlq_i64v2(int64x2_t a, int64x2_t b); -#define vqrshlq_s64(a, b) __builtin_mpl_vector_qrshlq_i64v2(a, b) +int32x2_t __builtin_mpl_vector_shrn_n_v2i32(int64x2_t a, const int n); +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshrn_n_s64( + int64x2_t a, const int n) { + return __builtin_mpl_vector_shrn_n_v2i32(a, n); +} -uint8x8_t __builtin_mpl_vector_qrshl_u8v8(uint8x8_t a, int8x8_t b); -#define vqrshl_u8(a, b) __builtin_mpl_vector_qrshl_u8v8(a, b) +uint8x8_t __builtin_mpl_vector_shrn_n_v8u8(uint16x8_t a, const int n); +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshrn_n_u16( + uint16x8_t a, const int n) { + return __builtin_mpl_vector_shrn_n_v8u8(a, n); +} -uint8x16_t __builtin_mpl_vector_qrshlq_u8v16(uint8x16_t a, int8x16_t b); -#define vqrshlq_u8(a, b) __builtin_mpl_vector_qrshlq_u8v16(a, b) +uint16x4_t __builtin_mpl_vector_shrn_n_v4u16(uint32x4_t a, const int n); +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshrn_n_u32( + uint32x4_t a, const int n) { + return __builtin_mpl_vector_shrn_n_v4u16(a, n); +} -uint16x4_t __builtin_mpl_vector_qrshl_u16v4(uint16x4_t a, int16x4_t b); -#define vqrshl_u16(a, b) __builtin_mpl_vector_qrshl_u16v4(a, b) +uint32x2_t __builtin_mpl_vector_shrn_n_v2u32(uint64x2_t a, const int n); +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshrn_n_u64( + uint64x2_t a, const int n) { + return __builtin_mpl_vector_shrn_n_v2u32(a, n); +} -uint16x8_t __builtin_mpl_vector_qrshlq_u16v8(uint16x8_t a, int16x8_t b); -#define vqrshlq_u16(a, b) __builtin_mpl_vector_qrshlq_u16v8(a, b) +int8x16_t __builtin_mpl_vector_shrn_high_n_v16i8(int8x8_t r, int16x8_t a, const int n); +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshrn_high_n_s16( + int8x8_t r, int16x8_t a, const int n) { + return __builtin_mpl_vector_shrn_high_n_v16i8(r, a, n); +} -uint32x2_t __builtin_mpl_vector_qrshl_u32v2(uint32x2_t a, int32x2_t b); -#define vqrshl_u32(a, b) __builtin_mpl_vector_qrshl_u32v2(a, b) +int16x8_t __builtin_mpl_vector_shrn_high_n_v8i16(int16x4_t r, int32x4_t a, const int n); +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshrn_high_n_s32( + int16x4_t r, int32x4_t a, const int n) { + return __builtin_mpl_vector_shrn_high_n_v8i16(r, a, n); +} -uint32x4_t __builtin_mpl_vector_qrshlq_u32v4(uint32x4_t a, int32x4_t b); -#define vqrshlq_u32(a, b) __builtin_mpl_vector_qrshlq_u32v4(a, b) +int32x4_t __builtin_mpl_vector_shrn_high_n_v4i32(int32x2_t r, int64x2_t a, const int n); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshrn_high_n_s64( + int32x2_t r, int64x2_t a, const int n) { + return __builtin_mpl_vector_shrn_high_n_v4i32(r, a, n); +} -uint64x1_t __builtin_mpl_vector_qrshl_u64v1(uint64x1_t a, int64x1_t b); -#define vqrshl_u64(a, b) __builtin_mpl_vector_qrshl_u64v1(a, b) +uint8x16_t __builtin_mpl_vector_shrn_high_n_v16u8(uint8x8_t r, uint16x8_t a, const int n); +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshrn_high_n_u16( + uint8x8_t r, uint16x8_t a, const int n) { + return __builtin_mpl_vector_shrn_high_n_v16u8(r, a, n); +} -uint64x2_t __builtin_mpl_vector_qrshlq_u64v2(uint64x2_t a, int64x2_t b); -#define vqrshlq_u64(a, b) __builtin_mpl_vector_qrshlq_u64v2(a, b) +uint16x8_t __builtin_mpl_vector_shrn_high_n_v8u16(uint16x4_t r, uint32x4_t a, const int n); +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshrn_high_n_u32( + uint16x4_t r, uint32x4_t a, const int n) { + return __builtin_mpl_vector_shrn_high_n_v8u16(r, a, n); +} -static inline int8_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqrshlb_s8(int8_t a, int8_t b) { - return vget_lane_s8(vqrshl_s8((int8x8_t){a}, (int8x8_t){b}), 0); +uint32x4_t __builtin_mpl_vector_shrn_high_n_v4u32(uint32x2_t r, uint64x2_t a, const int n); +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vshrn_high_n_u64( + uint32x2_t r, uint64x2_t a, const int n) { + return __builtin_mpl_vector_shrn_high_n_v4u32(r, a, n); } -static inline int16_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqrshlh_s16(int16_t a, int16_t b) { - return vget_lane_s16(vqrshl_s16((int16x4_t){a}, (int16x4_t){b}), 0); +uint8x8_t __builtin_mpl_vector_qshrun_n_v8u8(int16x8_t a, const int n); +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshrun_n_s16( + int16x8_t a, const int n) { + return __builtin_mpl_vector_qshrun_n_v8u8(a, n); } -static inline int32_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqrshls_s32(int32_t a, int32_t b) { - return vget_lane_s32(vqrshl_s32((int32x2_t){a}, (int32x2_t){b}), 0); +uint16x4_t __builtin_mpl_vector_qshrun_n_v4u16(int32x4_t a, const int n); +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshrun_n_s32( + int32x4_t a, const int n) { + return __builtin_mpl_vector_qshrun_n_v4u16(a, n); } -static inline int64_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqrshld_s64(int64_t a, int64_t b) { - return vget_lane_s64(vqrshl_s64((int64x1_t){a}, (int64x1_t){b}), 0); +uint32x2_t __builtin_mpl_vector_qshrun_n_v2u32(int64x2_t a, const int n); +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshrun_n_s64( + int64x2_t a, const int n) { + return __builtin_mpl_vector_qshrun_n_v2u32(a, n); } -static inline uint8_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqrshlb_u8(uint8_t a, int8_t b) { - return vget_lane_u8(vqrshl_u8((uint8x8_t){a}, (int8x8_t){b}), 0); +extern inline uint8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshrunh_n_s16( + int16_t a, const int n) { + return vget_lane_u8(vqshrun_n_s16((int16x8_t){a}, n), 0); } -static inline uint16_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqrshlh_u16(uint16_t a, int16_t b) { - return vget_lane_u16(vqrshl_u16((uint16x4_t){a}, (int16x4_t){b}), 0); +extern inline uint16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshruns_n_s32( + int32_t a, const int n) { + return vget_lane_u16(vqshrun_n_s32((int32x4_t){a}, n), 0); } -static inline uint32_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqrshls_u32(uint32_t a, int32_t b) { - return vget_lane_u32(vqrshl_u32((uint32x2_t){a}, (int32x2_t){b}), 0); +extern inline uint32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshrund_n_s64( + int64_t a, const int n) { + return vget_lane_u32(vqshrun_n_s64((int64x2_t){a}, n), 0); } -static inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqrshld_u64(uint64_t a, int64_t b) { - return vget_lane_u64(vqrshl_u64((uint64x1_t){a}, (int64x1_t){b}), 0); +uint8x16_t __builtin_mpl_vector_qshrun_high_n_v16u8(uint8x8_t r, int16x8_t a, const int n); +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshrun_high_n_s16( + uint8x8_t r, int16x8_t a, const int n) { + return __builtin_mpl_vector_qshrun_high_n_v16u8(r, a, n); } -int16x8_t __builtin_mpl_vector_shll_n_i16v8(int8x8_t a, const int n); -#define vshll_n_s8(a, n) __builtin_mpl_vector_shll_n_i16v8(a, n) +uint16x8_t __builtin_mpl_vector_qshrun_high_n_v8u16(uint16x4_t r, int32x4_t a, const int n); +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshrun_high_n_s32( + uint16x4_t r, int32x4_t a, const int n) { + return __builtin_mpl_vector_qshrun_high_n_v8u16(r, a, n); +} -int32x4_t __builtin_mpl_vector_shll_n_i32v4(int16x4_t a, const int n); -#define vshll_n_s16(a, n) __builtin_mpl_vector_shll_n_i32v4(a, n) +uint32x4_t __builtin_mpl_vector_qshrun_high_n_v4u32(uint32x2_t r, int64x2_t a, const int n); +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshrun_high_n_s64( + uint32x2_t r, int64x2_t a, const int n) { + return __builtin_mpl_vector_qshrun_high_n_v4u32(r, a, n); +} -int64x2_t __builtin_mpl_vector_shll_n_i64v2(int32x2_t a, const int n); -#define vshll_n_s32(a, n) __builtin_mpl_vector_shll_n_i64v2(a, n) +int8x8_t __builtin_mpl_vector_qshrn_n_v8i8(int16x8_t a, const int n); +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshrn_n_s16( + int16x8_t a, const int n) { + return __builtin_mpl_vector_qshrn_n_v8i8(a, n); +} -uint16x8_t __builtin_mpl_vector_shll_n_u16v8(uint8x8_t a, const int n); -#define vshll_n_u8(a, n) __builtin_mpl_vector_shll_n_u16v8(a, n) +int16x4_t __builtin_mpl_vector_qshrn_n_v4i16(int32x4_t a, const int n); +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshrn_n_s32( + int32x4_t a, const int n) { + return __builtin_mpl_vector_qshrn_n_v4i16(a, n); +} -uint32x4_t __builtin_mpl_vector_shll_n_u32v4(uint16x4_t a, const int n); -#define vshll_n_u16(a, n) __builtin_mpl_vector_shll_n_u32v4(a, n) +int32x2_t __builtin_mpl_vector_qshrn_n_v2i32(int64x2_t a, const int n); +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshrn_n_s64( + int64x2_t a, const int n) { + return __builtin_mpl_vector_qshrn_n_v2i32(a, n); +} -uint64x2_t __builtin_mpl_vector_shll_n_u64v2(uint32x2_t a, const int n); -#define vshll_n_u32(a, n) __builtin_mpl_vector_shll_n_u64v2(a, n) +uint8x8_t __builtin_mpl_vector_qshrn_n_v8u8(uint16x8_t a, const int n); +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshrn_n_u16( + uint16x8_t a, const int n) { + return __builtin_mpl_vector_qshrn_n_v8u8(a, n); +} -int16x8_t __builtin_mpl_vector_shll_high_n_i16v8(int8x16_t a, const int n); -#define vshll_high_n_s8(a, n) __builtin_mpl_vector_shll_high_n_i16v8(a, n) +uint16x4_t __builtin_mpl_vector_qshrn_n_v4u16(uint32x4_t a, const int n); +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshrn_n_u32( + uint32x4_t a, const int n) { + return __builtin_mpl_vector_qshrn_n_v4u16(a, n); +} -int32x4_t __builtin_mpl_vector_shll_high_n_i32v4(int16x8_t a, const int n); -#define vshll_high_n_s16(a, n) __builtin_mpl_vector_shll_high_n_i32v4(a, n) +uint32x2_t __builtin_mpl_vector_qshrn_n_v2u32(uint64x2_t a, const int n); +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshrn_n_u64( + uint64x2_t a, const int n) { + return __builtin_mpl_vector_qshrn_n_v2u32(a, n); +} -int64x2_t __builtin_mpl_vector_shll_high_n_i64v2(int32x4_t a, const int n); -#define vshll_high_n_s32(a, n) __builtin_mpl_vector_shll_high_n_i64v2(a, n) +extern inline int8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshrnh_n_s16( + int16_t a, const int n) { + return vget_lane_s8(vqshrn_n_s16((int16x8_t){a}, n), 0); +} -uint16x8_t __builtin_mpl_vector_shll_high_n_u16v8(uint8x16_t a, const int n); -#define vshll_high_n_u8(a, n) __builtin_mpl_vector_shll_high_n_u16v8(a, n) +extern inline int16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshrns_n_s32( + int32_t a, const int n) { + return vget_lane_s16(vqshrn_n_s32((int32x4_t){a}, n), 0); +} -uint32x4_t __builtin_mpl_vector_shll_high_n_u32v4(uint16x8_t a, const int n); -#define vshll_high_n_u16(a, n) __builtin_mpl_vector_shll_high_n_u32v4(a, n) +extern inline int32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshrnd_n_s64( + int64_t a, const int n) { + return vget_lane_s32(vqshrn_n_s64((int64x2_t){a}, n), 0); +} -uint64x2_t __builtin_mpl_vector_shll_high_n_u64v2(uint32x4_t a, const int n); -#define vshll_high_n_u32(a, n) __builtin_mpl_vector_shll_high_n_u64v2(a, n) +extern inline uint8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshrnh_n_u16( + uint16_t a, const int n) { + return vget_lane_u8(vqshrn_n_u16((uint16x8_t){a}, n), 0); +} -int8x8_t __builtin_mpl_vector_sli_n_i8v8(int8x8_t a, int8x8_t b, const int n); -#define vsli_n_s8(a, b, n) __builtin_mpl_vector_sli_n_i8v8(a, b, n) +extern inline uint16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshrns_n_u32( + uint32_t a, const int n) { + return vget_lane_u16(vqshrn_n_u32((uint32x4_t){a}, n), 0); +} -int8x16_t __builtin_mpl_vector_sliq_n_i8v16(int8x16_t a, int8x16_t b, const int n); -#define vsliq_n_s8(a, b, n) __builtin_mpl_vector_sliq_n_i8v16(a, b, n) +extern inline uint32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshrnd_n_u64( + uint64_t a, const int n) { + return vget_lane_u32(vqshrn_n_u64((uint64x2_t){a}, n), 0); +} -int16x4_t __builtin_mpl_vector_sli_n_i16v4(int16x4_t a, int16x4_t b, const int n); -#define vsli_n_s16(a, b, n) __builtin_mpl_vector_sli_n_i16v4(a, b, n) +int8x16_t __builtin_mpl_vector_qshrn_high_n_v16i8(int8x8_t r, int16x8_t a, const int n); +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshrn_high_n_s16( + int8x8_t r, int16x8_t a, const int n) { + return __builtin_mpl_vector_qshrn_high_n_v16i8(r, a, n); +} -int16x8_t __builtin_mpl_vector_sliq_n_i16v8(int16x8_t a, int16x8_t b, const int n); -#define vsliq_n_s16(a, b, n) __builtin_mpl_vector_sliq_n_i16v8(a, b, n) +int16x8_t __builtin_mpl_vector_qshrn_high_n_v8i16(int16x4_t r, int32x4_t a, const int n); +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshrn_high_n_s32( + int16x4_t r, int32x4_t a, const int n) { + return __builtin_mpl_vector_qshrn_high_n_v8i16(r, a, n); +} -int32x2_t __builtin_mpl_vector_sli_n_i32v2(int32x2_t a, int32x2_t b, const int n); -#define vsli_n_s32(a, b, n) __builtin_mpl_vector_sli_n_i32v2(a, b, n) +int32x4_t __builtin_mpl_vector_qshrn_high_n_v4i32(int32x2_t r, int64x2_t a, const int n); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshrn_high_n_s64( + int32x2_t r, int64x2_t a, const int n) { + return __builtin_mpl_vector_qshrn_high_n_v4i32(r, a, n); +} -int32x4_t __builtin_mpl_vector_sliq_n_i32v4(int32x4_t a, int32x4_t b, const int n); -#define vsliq_n_s32(a, b, n) __builtin_mpl_vector_sliq_n_i32v4(a, b, n) +uint8x16_t __builtin_mpl_vector_qshrn_high_n_v16u8(uint8x8_t r, uint16x8_t a, const int n); +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshrn_high_n_u16( + uint8x8_t r, uint16x8_t a, const int n) { + return __builtin_mpl_vector_qshrn_high_n_v16u8(r, a, n); +} -int64x1_t __builtin_mpl_vector_sli_n_i64v1(int64x1_t a, int64x1_t b, const int n); -#define vsli_n_s64(a, b, n) __builtin_mpl_vector_sli_n_i64v1(a, b, n) +uint16x8_t __builtin_mpl_vector_qshrn_high_n_v8u16(uint16x4_t r, uint32x4_t a, const int n); +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshrn_high_n_u32( + uint16x4_t r, uint32x4_t a, const int n) { + return __builtin_mpl_vector_qshrn_high_n_v8u16(r, a, n); +} -int64x2_t __builtin_mpl_vector_sliq_n_i64v2(int64x2_t a, int64x2_t b, const int n); -#define vsliq_n_s64(a, b, n) __builtin_mpl_vector_sliq_n_i64v2(a, b, n) +uint32x4_t __builtin_mpl_vector_qshrn_high_n_v4u32(uint32x2_t r, uint64x2_t a, const int n); +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqshrn_high_n_u64( + uint32x2_t r, uint64x2_t a, const int n) { + return __builtin_mpl_vector_qshrn_high_n_v4u32(r, a, n); +} -uint8x8_t __builtin_mpl_vector_sli_n_u8v8(uint8x8_t a, uint8x8_t b, const int n); -#define vsli_n_u8(a, b, n) __builtin_mpl_vector_sli_n_u8v8(a, b, n) +uint8x8_t __builtin_mpl_vector_qrshrun_n_v8u8(int16x8_t a, const int n); +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrshrun_n_s16( + int16x8_t a, const int n) { + return __builtin_mpl_vector_qrshrun_n_v8u8(a, n); +} -uint8x16_t __builtin_mpl_vector_sliq_n_u8v16(uint8x16_t a, uint8x16_t b, const int n); -#define vsliq_n_u8(a, b, n) __builtin_mpl_vector_sliq_n_u8v16(a, b, n) +uint16x4_t __builtin_mpl_vector_qrshrun_n_v4u16(int32x4_t a, const int n); +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrshrun_n_s32( + int32x4_t a, const int n) { + return __builtin_mpl_vector_qrshrun_n_v4u16(a, n); +} -uint16x4_t __builtin_mpl_vector_sli_n_u16v4(uint16x4_t a, uint16x4_t b, const int n); -#define vsli_n_u16(a, b, n) __builtin_mpl_vector_sli_n_u16v4(a, b, n) +uint32x2_t __builtin_mpl_vector_qrshrun_n_v2u32(int64x2_t a, const int n); +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrshrun_n_s64( + int64x2_t a, const int n) { + return __builtin_mpl_vector_qrshrun_n_v2u32(a, n); +} -uint16x8_t __builtin_mpl_vector_sliq_n_u16v8(uint16x8_t a, uint16x8_t b, const int n); -#define vsliq_n_u16(a, b, n) __builtin_mpl_vector_sliq_n_u16v8(a, b, n) +extern inline uint8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrshrunh_n_s16( + int16_t a, const int n) { + return vget_lane_u8(vqrshrun_n_s16((int16x8_t){a}, n), 0); +} -uint32x2_t __builtin_mpl_vector_sli_n_u32v2(uint32x2_t a, uint32x2_t b, const int n); -#define vsli_n_u32(a, b, n) __builtin_mpl_vector_sli_n_u32v2(a, b, n) +extern inline uint16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrshruns_n_s32( + int32_t a, const int n) { + return vget_lane_u16(vqrshrun_n_s32((int32x4_t){a}, n), 0); +} -uint32x4_t __builtin_mpl_vector_sliq_n_u32v4(uint32x4_t a, uint32x4_t b, const int n); -#define vsliq_n_u32(a, b, n) __builtin_mpl_vector_sliq_n_u32v4(a, b, n) +extern inline uint32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrshrund_n_s64( + int64_t a, const int n) { + return vget_lane_u32(vqrshrun_n_s64((int64x2_t){a}, n), 0); +} -uint64x1_t __builtin_mpl_vector_sli_n_u64v1(uint64x1_t a, uint64x1_t b, const int n); -#define vsli_n_u64(a, b, n) __builtin_mpl_vector_sli_n_u64v1(a, b, n) +uint8x16_t __builtin_mpl_vector_qrshrun_high_n_v16u8(uint8x8_t r, int16x8_t a, const int n); +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrshrun_high_n_s16( + uint8x8_t r, int16x8_t a, const int n) { + return __builtin_mpl_vector_qrshrun_high_n_v16u8(r, a, n); +} -uint64x2_t __builtin_mpl_vector_sliq_n_u64v2(uint64x2_t a, uint64x2_t b, const int n); -#define vsliq_n_u64(a, b, n) __builtin_mpl_vector_sliq_n_u64v2(a, b, n) +uint16x8_t __builtin_mpl_vector_qrshrun_high_n_v8u16(uint16x4_t r, int32x4_t a, const int n); +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrshrun_high_n_s32( + uint16x4_t r, int32x4_t a, const int n) { + return __builtin_mpl_vector_qrshrun_high_n_v8u16(r, a, n); +} -static inline int64_t __attribute__ ((__always_inline__, __gnu_inline__)) -vslid_n_s64(int64_t a, int64_t b, const int n) { - return vget_lane_s64(vsli_n_s64((int64x1_t){a}, (int64x1_t){b}, n), 0); +uint32x4_t __builtin_mpl_vector_qrshrun_high_n_v4u32(uint32x2_t r, int64x2_t a, const int n); +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrshrun_high_n_s64( + uint32x2_t r, int64x2_t a, const int n) { + return __builtin_mpl_vector_qrshrun_high_n_v4u32(r, a, n); } -static inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__)) -vslid_n_u64(uint64_t a, uint64_t b, const int n) { - return vget_lane_u64(vsli_n_u64((uint64x1_t){a}, (uint64x1_t){b}, n), 0); +int8x8_t __builtin_mpl_vector_qrshrn_n_v8i8(int16x8_t a, const int n); +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrshrn_n_s16( + int16x8_t a, const int n) { + return __builtin_mpl_vector_qrshrn_n_v8i8(a, n); } -int8x8_t __builtin_mpl_vector_rshr_n_i8v8(int8x8_t a, const int n); -#define vrshr_n_s8(a, n) __builtin_mpl_vector_rshr_n_i8v8(a, n) +int16x4_t __builtin_mpl_vector_qrshrn_n_v4i16(int32x4_t a, const int n); +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrshrn_n_s32( + int32x4_t a, const int n) { + return __builtin_mpl_vector_qrshrn_n_v4i16(a, n); +} -int8x16_t __builtin_mpl_vector_rshrq_n_i8v16(int8x16_t a, const int n); -#define vrshrq_n_s8(a, n) __builtin_mpl_vector_rshrq_n_i8v16(a, n) +int32x2_t __builtin_mpl_vector_qrshrn_n_v2i32(int64x2_t a, const int n); +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrshrn_n_s64( + int64x2_t a, const int n) { + return __builtin_mpl_vector_qrshrn_n_v2i32(a, n); +} -int16x4_t __builtin_mpl_vector_rshr_n_i16v4(int16x4_t a, const int n); -#define vrshr_n_s16(a, n) __builtin_mpl_vector_rshr_n_i16v4(a, n) +uint8x8_t __builtin_mpl_vector_qrshrn_n_v8u8(uint16x8_t a, const int n); +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrshrn_n_u16( + uint16x8_t a, const int n) { + return __builtin_mpl_vector_qrshrn_n_v8u8(a, n); +} -int16x8_t __builtin_mpl_vector_rshrq_n_i16v8(int16x8_t a, const int n); -#define vrshrq_n_s16(a, n) __builtin_mpl_vector_rshrq_n_i16v8(a, n) +uint16x4_t __builtin_mpl_vector_qrshrn_n_v4u16(uint32x4_t a, const int n); +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrshrn_n_u32( + uint32x4_t a, const int n) { + return __builtin_mpl_vector_qrshrn_n_v4u16(a, n); +} -int32x2_t __builtin_mpl_vector_rshr_n_i32v2(int32x2_t a, const int n); -#define vrshr_n_s32(a, n) __builtin_mpl_vector_rshr_n_i32v2(a, n) +uint32x2_t __builtin_mpl_vector_qrshrn_n_v2u32(uint64x2_t a, const int n); +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrshrn_n_u64( + uint64x2_t a, const int n) { + return __builtin_mpl_vector_qrshrn_n_v2u32(a, n); +} -int32x4_t __builtin_mpl_vector_rshrq_n_i32v4(int32x4_t a, const int n); -#define vrshrq_n_s32(a, n) __builtin_mpl_vector_rshrq_n_i32v4(a, n) +extern inline int8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrshrnh_n_s16( + int16_t a, const int n) { + return vget_lane_s8(vqrshrn_n_s16((int16x8_t){a}, n), 0); +} -int64x2_t __builtin_mpl_vector_rshrq_n_i64v2(int64x2_t a, const int n); -#define vrshrq_n_s64(a, n) __builtin_mpl_vector_rshrq_n_i64v2(a, n) +extern inline int16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrshrns_n_s32( + int32_t a, const int n) { + return vget_lane_s16(vqrshrn_n_s32((int32x4_t){a}, n), 0); +} -uint8x8_t __builtin_mpl_vector_rshr_n_u8v8(uint8x8_t a, const int n); -#define vrshr_n_u8(a, n) __builtin_mpl_vector_rshr_n_u8v8(a, n) +extern inline int32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrshrnd_n_s64( + int64_t a, const int n) { + return vget_lane_s32(vqrshrn_n_s64((int64x2_t){a}, n), 0); +} -uint8x16_t __builtin_mpl_vector_rshrq_n_u8v16(uint8x16_t a, const int n); -#define vrshrq_n_u8(a, n) __builtin_mpl_vector_rshrq_n_u8v16(a, n) +extern inline uint8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrshrnh_n_u16( + uint16_t a, const int n) { + return vget_lane_u8(vqrshrn_n_u16((uint16x8_t){a}, n), 0); +} -uint16x4_t __builtin_mpl_vector_rshr_n_u16v4(uint16x4_t a, const int n); -#define vrshr_n_u16(a, n) __builtin_mpl_vector_rshr_n_u16v4(a, n) +extern inline uint16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrshrns_n_u32( + uint32_t a, const int n) { + return vget_lane_u16(vqrshrn_n_u32((uint32x4_t){a}, n), 0); +} -uint16x8_t __builtin_mpl_vector_rshrq_n_u16v8(uint16x8_t a, const int n); -#define vrshrq_n_u16(a, n) __builtin_mpl_vector_rshrq_n_u16v8(a, n) +extern inline uint32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrshrnd_n_u64( + uint64_t a, const int n) { + return vget_lane_u32(vqrshrn_n_u64((uint64x2_t){a}, n), 0); +} -uint32x2_t __builtin_mpl_vector_rshr_n_u32v2(uint32x2_t a, const int n); -#define vrshr_n_u32(a, n) __builtin_mpl_vector_rshr_n_u32v2(a, n) +int8x16_t __builtin_mpl_vector_qrshrn_high_n_v16i8(int8x8_t r, int16x8_t a, const int n); +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrshrn_high_n_s16( + int8x8_t r, int16x8_t a, const int n) { + return __builtin_mpl_vector_qrshrn_high_n_v16i8(r, a, n); +} -uint32x4_t __builtin_mpl_vector_rshrq_n_u32v4(uint32x4_t a, const int n); -#define vrshrq_n_u32(a, n) __builtin_mpl_vector_rshrq_n_u32v4(a, n) +int16x8_t __builtin_mpl_vector_qrshrn_high_n_v8i16(int16x4_t r, int32x4_t a, const int n); +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrshrn_high_n_s32( + int16x4_t r, int32x4_t a, const int n) { + return __builtin_mpl_vector_qrshrn_high_n_v8i16(r, a, n); +} -uint64x2_t __builtin_mpl_vector_rshrq_n_u64v2(uint64x2_t a, const int n); -#define vrshrq_n_u64(a, n) __builtin_mpl_vector_rshrq_n_u64v2(a, n) +int32x4_t __builtin_mpl_vector_qrshrn_high_n_v4i32(int32x2_t r, int64x2_t a, const int n); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrshrn_high_n_s64( + int32x2_t r, int64x2_t a, const int n) { + return __builtin_mpl_vector_qrshrn_high_n_v4i32(r, a, n); +} -int64x1_t __builtin_mpl_vector_rshrd_n_i64(int64x1_t a, const int n); -static inline int64_t __attribute__ ((__always_inline__, __gnu_inline__)) -vrshrd_n_s64(int64_t a, const int n) { - return vget_lane_s64(__builtin_mpl_vector_rshrd_n_i64((int64x1_t){a}, n), 0); +uint8x16_t __builtin_mpl_vector_qrshrn_high_n_v16u8(uint8x8_t r, uint16x8_t a, const int n); +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrshrn_high_n_u16( + uint8x8_t r, uint16x8_t a, const int n) { + return __builtin_mpl_vector_qrshrn_high_n_v16u8(r, a, n); } -uint64x1_t __builtin_mpl_vector_rshrd_n_u64(uint64x1_t a, const int n); -static inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__)) -vrshrd_n_u64(uint64_t a, const int n) { - return vget_lane_u64(__builtin_mpl_vector_rshrd_n_u64((uint64x1_t){a}, n), 0); +uint16x8_t __builtin_mpl_vector_qrshrn_high_n_v8u16(uint16x4_t r, uint32x4_t a, const int n); +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrshrn_high_n_u32( + uint16x4_t r, uint32x4_t a, const int n) { + return __builtin_mpl_vector_qrshrn_high_n_v8u16(r, a, n); } -int8x8_t __builtin_mpl_vector_sra_n_i8v8(int8x8_t a, int8x8_t b, const int n); -#define vsra_n_s8(a, b, n) __builtin_mpl_vector_sra_n_i8v8(a, b, n) +uint32x4_t __builtin_mpl_vector_qrshrn_high_n_v4u32(uint32x2_t r, uint64x2_t a, const int n); +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqrshrn_high_n_u64( + uint32x2_t r, uint64x2_t a, const int n) { + return __builtin_mpl_vector_qrshrn_high_n_v4u32(r, a, n); +} -int8x16_t __builtin_mpl_vector_sraq_n_i8v16(int8x16_t a, int8x16_t b, const int n); -#define vsraq_n_s8(a, b, n) __builtin_mpl_vector_sraq_n_i8v16(a, b, n) +int8x8_t __builtin_mpl_vector_rshrn_n_v8i8(int16x8_t a, const int n); +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrshrn_n_s16( + int16x8_t a, const int n) { + return __builtin_mpl_vector_rshrn_n_v8i8(a, n); +} -int16x4_t __builtin_mpl_vector_sra_n_i16v4(int16x4_t a, int16x4_t b, const int n); -#define vsra_n_s16(a, b, n) __builtin_mpl_vector_sra_n_i16v4(a, b, n) +int16x4_t __builtin_mpl_vector_rshrn_n_v4i16(int32x4_t a, const int n); +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrshrn_n_s32( + int32x4_t a, const int n) { + return __builtin_mpl_vector_rshrn_n_v4i16(a, n); +} -int16x8_t __builtin_mpl_vector_sraq_n_i16v8(int16x8_t a, int16x8_t b, const int n); -#define vsraq_n_s16(a, b, n) __builtin_mpl_vector_sraq_n_i16v8(a, b, n) +int32x2_t __builtin_mpl_vector_rshrn_n_v2i32(int64x2_t a, const int n); +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrshrn_n_s64( + int64x2_t a, const int n) { + return __builtin_mpl_vector_rshrn_n_v2i32(a, n); +} -int32x2_t __builtin_mpl_vector_sra_n_i32v2(int32x2_t a, int32x2_t b, const int n); -#define vsra_n_s32(a, b, n) __builtin_mpl_vector_sra_n_i32v2(a, b, n) +uint8x8_t __builtin_mpl_vector_rshrn_n_v8u8(uint16x8_t a, const int n); +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrshrn_n_u16( + uint16x8_t a, const int n) { + return __builtin_mpl_vector_rshrn_n_v8u8(a, n); +} -int32x4_t __builtin_mpl_vector_sraq_n_i32v4(int32x4_t a, int32x4_t b, const int n); -#define vsraq_n_s32(a, b, n) __builtin_mpl_vector_sraq_n_i32v4(a, b, n) +uint16x4_t __builtin_mpl_vector_rshrn_n_v4u16(uint32x4_t a, const int n); +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrshrn_n_u32( + uint32x4_t a, const int n) { + return __builtin_mpl_vector_rshrn_n_v4u16(a, n); +} -int64x2_t __builtin_mpl_vector_sraq_n_i64v2(int64x2_t a, int64x2_t b, const int n); -#define vsraq_n_s64(a, b, n) __builtin_mpl_vector_sraq_n_i64v2(a, b, n) +uint32x2_t __builtin_mpl_vector_rshrn_n_v2u32(uint64x2_t a, const int n); +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrshrn_n_u64( + uint64x2_t a, const int n) { + return __builtin_mpl_vector_rshrn_n_v2u32(a, n); +} -uint8x8_t __builtin_mpl_vector_sra_n_u8v8(uint8x8_t a, uint8x8_t b, const int n); -#define vsra_n_u8(a, b, n) __builtin_mpl_vector_sra_n_u8v8(a, b, n) +int8x16_t __builtin_mpl_vector_rshrn_high_n_v16i8(int8x8_t r, int16x8_t a, const int n); +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrshrn_high_n_s16( + int8x8_t r, int16x8_t a, const int n) { + return __builtin_mpl_vector_rshrn_high_n_v16i8(r, a, n); +} -uint8x16_t __builtin_mpl_vector_sraq_n_u8v16(uint8x16_t a, uint8x16_t b, const int n); -#define vsraq_n_u8(a, b, n) __builtin_mpl_vector_sraq_n_u8v16(a, b, n) +int16x8_t __builtin_mpl_vector_rshrn_high_n_v8i16(int16x4_t r, int32x4_t a, const int n); +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrshrn_high_n_s32( + int16x4_t r, int32x4_t a, const int n) { + return __builtin_mpl_vector_rshrn_high_n_v8i16(r, a, n); +} -uint16x4_t __builtin_mpl_vector_sra_n_u16v4(uint16x4_t a, uint16x4_t b, const int n); -#define vsra_n_u16(a, b, n) __builtin_mpl_vector_sra_n_u16v4(a, b, n) +int32x4_t __builtin_mpl_vector_rshrn_high_n_v4i32(int32x2_t r, int64x2_t a, const int n); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrshrn_high_n_s64( + int32x2_t r, int64x2_t a, const int n) { + return __builtin_mpl_vector_rshrn_high_n_v4i32(r, a, n); +} -uint16x8_t __builtin_mpl_vector_sraq_n_u16v8(uint16x8_t a, uint16x8_t b, const int n); -#define vsraq_n_u16(a, b, n) __builtin_mpl_vector_sraq_n_u16v8(a, b, n) +uint8x16_t __builtin_mpl_vector_rshrn_high_n_v16u8(uint8x8_t r, uint16x8_t a, const int n); +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrshrn_high_n_u16( + uint8x8_t r, uint16x8_t a, const int n) { + return __builtin_mpl_vector_rshrn_high_n_v16u8(r, a, n); +} -uint32x2_t __builtin_mpl_vector_sra_n_u32v2(uint32x2_t a, uint32x2_t b, const int n); -#define vsra_n_u32(a, b, n) __builtin_mpl_vector_sra_n_u32v2(a, b, n) +uint16x8_t __builtin_mpl_vector_rshrn_high_n_v8u16(uint16x4_t r, uint32x4_t a, const int n); +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrshrn_high_n_u32( + uint16x4_t r, uint32x4_t a, const int n) { + return __builtin_mpl_vector_rshrn_high_n_v8u16(r, a, n); +} -uint32x4_t __builtin_mpl_vector_sraq_n_u32v4(uint32x4_t a, uint32x4_t b, const int n); -#define vsraq_n_u32(a, b, n) __builtin_mpl_vector_sraq_n_u32v4(a, b, n) +uint32x4_t __builtin_mpl_vector_rshrn_high_n_v4u32(uint32x2_t r, uint64x2_t a, const int n); +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vrshrn_high_n_u64( + uint32x2_t r, uint64x2_t a, const int n) { + return __builtin_mpl_vector_rshrn_high_n_v4u32(r, a, n); +} -uint64x2_t __builtin_mpl_vector_sraq_n_u64v2(uint64x2_t a, uint64x2_t b, const int n); -#define vsraq_n_u64(a, b, n) __builtin_mpl_vector_sraq_n_u64v2(a, b, n) +int8x8_t __builtin_mpl_vector_sri_n_v8i8(int8x8_t a, int8x8_t b, const int n); +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsri_n_s8( + int8x8_t a, int8x8_t b, const int n) { + return __builtin_mpl_vector_sri_n_v8i8(a, b, n); +} -int64x1_t __builtin_mpl_vector_srad_n_i64(int64x1_t a, int64x1_t b, const int n); -static inline int64_t __attribute__ ((__always_inline__, __gnu_inline__)) -vsrad_n_s64(int64_t a, int64_t b, const int n) { - return vget_lane_s64(__builtin_mpl_vector_srad_n_i64((int64x1_t){a}, (int64x1_t){b}, n), 0); +int8x16_t __builtin_mpl_vector_sriq_n_v16i8(int8x16_t a, int8x16_t b, const int n); +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsriq_n_s8( + int8x16_t a, int8x16_t b, const int n) { + return __builtin_mpl_vector_sriq_n_v16i8(a, b, n); } -uint64x1_t __builtin_mpl_vector_srad_n_u64(uint64x1_t a, uint64x1_t b, const int n); -static inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__)) -vsrad_n_u64(uint64_t a, uint64_t b, const int n) { - return vget_lane_u64(__builtin_mpl_vector_srad_n_u64((uint64x1_t){a}, (uint64x1_t){b}, n), 0); +int16x4_t __builtin_mpl_vector_sri_n_v4i16(int16x4_t a, int16x4_t b, const int n); +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsri_n_s16( + int16x4_t a, int16x4_t b, const int n) { + return __builtin_mpl_vector_sri_n_v4i16(a, b, n); } -int8x8_t __builtin_mpl_vector_rsra_n_i8v8(int8x8_t a, int8x8_t b, const int n); -#define vrsra_n_s8(a, b, n) __builtin_mpl_vector_rsra_n_i8v8(a, b, n) +int16x8_t __builtin_mpl_vector_sriq_n_v8i16(int16x8_t a, int16x8_t b, const int n); +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsriq_n_s16( + int16x8_t a, int16x8_t b, const int n) { + return __builtin_mpl_vector_sriq_n_v8i16(a, b, n); +} -int8x16_t __builtin_mpl_vector_rsraq_n_i8v16(int8x16_t a, int8x16_t b, const int n); -#define vrsraq_n_s8(a, b, n) __builtin_mpl_vector_rsraq_n_i8v16(a, b, n) +int32x2_t __builtin_mpl_vector_sri_n_v2i32(int32x2_t a, int32x2_t b, const int n); +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsri_n_s32( + int32x2_t a, int32x2_t b, const int n) { + return __builtin_mpl_vector_sri_n_v2i32(a, b, n); +} -int16x4_t __builtin_mpl_vector_rsra_n_i16v4(int16x4_t a, int16x4_t b, const int n); -#define vrsra_n_s16(a, b, n) __builtin_mpl_vector_rsra_n_i16v4(a, b, n) +int32x4_t __builtin_mpl_vector_sriq_n_v4i32(int32x4_t a, int32x4_t b, const int n); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsriq_n_s32( + int32x4_t a, int32x4_t b, const int n) { + return __builtin_mpl_vector_sriq_n_v4i32(a, b, n); +} -int16x8_t __builtin_mpl_vector_rsraq_n_i16v8(int16x8_t a, int16x8_t b, const int n); -#define vrsraq_n_s16(a, b, n) __builtin_mpl_vector_rsraq_n_i16v8(a, b, n) +int64x2_t __builtin_mpl_vector_sriq_n_v2i64(int64x2_t a, int64x2_t b, const int n); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsriq_n_s64( + int64x2_t a, int64x2_t b, const int n) { + return __builtin_mpl_vector_sriq_n_v2i64(a, b, n); +} -int32x2_t __builtin_mpl_vector_rsra_n_i32v2(int32x2_t a, int32x2_t b, const int n); -#define vrsra_n_s32(a, b, n) __builtin_mpl_vector_rsra_n_i32v2(a, b, n) +uint8x8_t __builtin_mpl_vector_sri_n_v8u8(uint8x8_t a, uint8x8_t b, const int n); +extern inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsri_n_u8( + uint8x8_t a, uint8x8_t b, const int n) { + return __builtin_mpl_vector_sri_n_v8u8(a, b, n); +} -int32x4_t __builtin_mpl_vector_rsraq_n_i32v4(int32x4_t a, int32x4_t b, const int n); -#define vrsraq_n_s32(a, b, n) __builtin_mpl_vector_rsraq_n_i32v4(a, b, n) +uint8x16_t __builtin_mpl_vector_sriq_n_v16u8(uint8x16_t a, uint8x16_t b, const int n); +extern inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsriq_n_u8( + uint8x16_t a, uint8x16_t b, const int n) { + return __builtin_mpl_vector_sriq_n_v16u8(a, b, n); +} -int64x2_t __builtin_mpl_vector_rsraq_n_i64v2(int64x2_t a, int64x2_t b, const int n); -#define vrsraq_n_s64(a, b, n) __builtin_mpl_vector_rsraq_n_i64v2(a, b, n) +uint16x4_t __builtin_mpl_vector_sri_n_v4u16(uint16x4_t a, uint16x4_t b, const int n); +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsri_n_u16( + uint16x4_t a, uint16x4_t b, const int n) { + return __builtin_mpl_vector_sri_n_v4u16(a, b, n); +} -uint8x8_t __builtin_mpl_vector_rsra_n_u8v8(uint8x8_t a, uint8x8_t b, const int n); -#define vrsra_n_u8(a, b, n) __builtin_mpl_vector_rsra_n_u8v8(a, b, n) +uint16x8_t __builtin_mpl_vector_sriq_n_v8u16(uint16x8_t a, uint16x8_t b, const int n); +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsriq_n_u16( + uint16x8_t a, uint16x8_t b, const int n) { + return __builtin_mpl_vector_sriq_n_v8u16(a, b, n); +} -uint8x16_t __builtin_mpl_vector_rsraq_n_u8v16(uint8x16_t a, uint8x16_t b, const int n); -#define vrsraq_n_u8(a, b, n) __builtin_mpl_vector_rsraq_n_u8v16(a, b, n) +uint32x2_t __builtin_mpl_vector_sri_n_v2u32(uint32x2_t a, uint32x2_t b, const int n); +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsri_n_u32( + uint32x2_t a, uint32x2_t b, const int n) { + return __builtin_mpl_vector_sri_n_v2u32(a, b, n); +} -uint16x4_t __builtin_mpl_vector_rsra_n_u16v4(uint16x4_t a, uint16x4_t b, const int n); -#define vrsra_n_u16(a, b, n) __builtin_mpl_vector_rsra_n_u16v4(a, b, n) +uint32x4_t __builtin_mpl_vector_sriq_n_v4u32(uint32x4_t a, uint32x4_t b, const int n); +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsriq_n_u32( + uint32x4_t a, uint32x4_t b, const int n) { + return __builtin_mpl_vector_sriq_n_v4u32(a, b, n); +} -uint16x8_t __builtin_mpl_vector_rsraq_n_u16v8(uint16x8_t a, uint16x8_t b, const int n); -#define vrsraq_n_u16(a, b, n) __builtin_mpl_vector_rsraq_n_u16v8(a, b, n) +uint64x2_t __builtin_mpl_vector_sriq_n_v2u64(uint64x2_t a, uint64x2_t b, const int n); +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsriq_n_u64( + uint64x2_t a, uint64x2_t b, const int n) { + return __builtin_mpl_vector_sriq_n_v2u64(a, b, n); +} -uint32x2_t __builtin_mpl_vector_rsra_n_u32v2(uint32x2_t a, uint32x2_t b, const int n); -#define vrsra_n_u32(a, b, n) __builtin_mpl_vector_rsra_n_u32v2(a, b, n) +int64x1_t __builtin_mpl_vector_srid_n_i64(int64x1_t a, int64x1_t b, const int n); +extern inline int64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsrid_n_s64( + int64_t a, int64_t b, const int n) { + return vget_lane_s64(__builtin_mpl_vector_srid_n_i64((int64x1_t){a}, (int64x1_t){b}, n), 0); +} -uint32x4_t __builtin_mpl_vector_rsraq_n_u32v4(uint32x4_t a, uint32x4_t b, const int n); -#define vrsraq_n_u32(a, b, n) __builtin_mpl_vector_rsraq_n_u32v4(a, b, n) +uint64x1_t __builtin_mpl_vector_srid_n_u64(uint64x1_t a, uint64x1_t b, const int n); +extern inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vsrid_n_u64( + uint64_t a, uint64_t b, const int n) { + return vget_lane_u64(__builtin_mpl_vector_srid_n_u64((uint64x1_t){a}, (uint64x1_t){b}, n), 0); +} -uint64x2_t __builtin_mpl_vector_rsraq_n_u64v2(uint64x2_t a, uint64x2_t b, const int n); -#define vrsraq_n_u64(a, b, n) __builtin_mpl_vector_rsraq_n_u64v2(a, b, n) +int16x4_t __builtin_mpl_vector_mla_lane_v4i16(int16x4_t a, int16x4_t b, int16x4_t v, const int lane); +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmla_lane_s16( + int16x4_t a, int16x4_t b, int16x4_t v, const int lane) { + return __builtin_mpl_vector_mla_lane_v4i16(a, b, v, lane); +} -int64x1_t __builtin_mpl_vector_rsrad_n_i64(int64x1_t a, int64x1_t b, const int n); -static inline int64_t __attribute__ ((__always_inline__, __gnu_inline__)) -vrsrad_n_s64(int64_t a, int64_t b, const int n) { - return vget_lane_s64(__builtin_mpl_vector_rsrad_n_i64((int64x1_t){a}, (int64x1_t){b}, n), 0); +int16x8_t __builtin_mpl_vector_mlaq_lane_v8i16(int16x8_t a, int16x8_t b, int16x4_t v, const int lane); +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlaq_lane_s16( + int16x8_t a, int16x8_t b, int16x4_t v, const int lane) { + return __builtin_mpl_vector_mlaq_lane_v8i16(a, b, v, lane); } -uint64x1_t __builtin_mpl_vector_rsrad_n_u64(uint64x1_t a, uint64x1_t b, const int n); -static inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__)) -vrsrad_n_u64(uint64_t a, uint64_t b, const int n) { - return vget_lane_u64(__builtin_mpl_vector_rsrad_n_u64((uint64x1_t){a}, (uint64x1_t){b}, n), 0); +int32x2_t __builtin_mpl_vector_mla_lane_v2i32(int32x2_t a, int32x2_t b, int32x2_t v, const int lane); +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmla_lane_s32( + int32x2_t a, int32x2_t b, int32x2_t v, const int lane) { + return __builtin_mpl_vector_mla_lane_v2i32(a, b, v, lane); } -int8x8_t __builtin_mpl_vector_shrn_n_i8v8(int16x8_t a, const int n); -#define vshrn_n_s16(a, n) __builtin_mpl_vector_shrn_n_i8v8(a, n) +int32x4_t __builtin_mpl_vector_mlaq_lane_v4i32(int32x4_t a, int32x4_t b, int32x2_t v, const int lane); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlaq_lane_s32( + int32x4_t a, int32x4_t b, int32x2_t v, const int lane) { + return __builtin_mpl_vector_mlaq_lane_v4i32(a, b, v, lane); +} -int16x4_t __builtin_mpl_vector_shrn_n_i16v4(int32x4_t a, const int n); -#define vshrn_n_s32(a, n) __builtin_mpl_vector_shrn_n_i16v4(a, n) +uint16x4_t __builtin_mpl_vector_mla_lane_v4u16(uint16x4_t a, uint16x4_t b, uint16x4_t v, const int lane); +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmla_lane_u16( + uint16x4_t a, uint16x4_t b, uint16x4_t v, const int lane) { + return __builtin_mpl_vector_mla_lane_v4u16(a, b, v, lane); +} -int32x2_t __builtin_mpl_vector_shrn_n_i32v2(int64x2_t a, const int n); -#define vshrn_n_s64(a, n) __builtin_mpl_vector_shrn_n_i32v2(a, n) +uint16x8_t __builtin_mpl_vector_mlaq_lane_v8u16(uint16x8_t a, uint16x8_t b, uint16x4_t v, const int lane); +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlaq_lane_u16( + uint16x8_t a, uint16x8_t b, uint16x4_t v, const int lane) { + return __builtin_mpl_vector_mlaq_lane_v8u16(a, b, v, lane); +} -uint8x8_t __builtin_mpl_vector_shrn_n_u8v8(uint16x8_t a, const int n); -#define vshrn_n_u16(a, n) __builtin_mpl_vector_shrn_n_u8v8(a, n) +uint32x2_t __builtin_mpl_vector_mla_lane_v2u32(uint32x2_t a, uint32x2_t b, uint32x2_t v, const int lane); +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmla_lane_u32( + uint32x2_t a, uint32x2_t b, uint32x2_t v, const int lane) { + return __builtin_mpl_vector_mla_lane_v2u32(a, b, v, lane); +} -uint16x4_t __builtin_mpl_vector_shrn_n_u16v4(uint32x4_t a, const int n); -#define vshrn_n_u32(a, n) __builtin_mpl_vector_shrn_n_u16v4(a, n) +uint32x4_t __builtin_mpl_vector_mlaq_lane_v4u32(uint32x4_t a, uint32x4_t b, uint32x2_t v, const int lane); +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlaq_lane_u32( + uint32x4_t a, uint32x4_t b, uint32x2_t v, const int lane) { + return __builtin_mpl_vector_mlaq_lane_v4u32(a, b, v, lane); +} -uint32x2_t __builtin_mpl_vector_shrn_n_u32v2(uint64x2_t a, const int n); -#define vshrn_n_u64(a, n) __builtin_mpl_vector_shrn_n_u32v2(a, n) +int16x4_t __builtin_mpl_vector_mla_laneq_v4i16(int16x4_t a, int16x4_t b, int16x8_t v, const int lane); +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmla_laneq_s16( + int16x4_t a, int16x4_t b, int16x8_t v, const int lane) { + return __builtin_mpl_vector_mla_laneq_v4i16(a, b, v, lane); +} -int8x16_t __builtin_mpl_vector_shrn_high_n_i8v16(int8x8_t r, int16x8_t a, const int n); -#define vshrn_high_n_s16(r, a, n) __builtin_mpl_vector_shrn_high_n_i8v16(r, a, n) +int16x8_t __builtin_mpl_vector_mlaq_laneq_v8i16(int16x8_t a, int16x8_t b, int16x8_t v, const int lane); +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlaq_laneq_s16( + int16x8_t a, int16x8_t b, int16x8_t v, const int lane) { + return __builtin_mpl_vector_mlaq_laneq_v8i16(a, b, v, lane); +} -int16x8_t __builtin_mpl_vector_shrn_high_n_i16v8(int16x4_t r, int32x4_t a, const int n); -#define vshrn_high_n_s32(r, a, n) __builtin_mpl_vector_shrn_high_n_i16v8(r, a, n) +int32x2_t __builtin_mpl_vector_mla_laneq_v2i32(int32x2_t a, int32x2_t b, int32x4_t v, const int lane); +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmla_laneq_s32( + int32x2_t a, int32x2_t b, int32x4_t v, const int lane) { + return __builtin_mpl_vector_mla_laneq_v2i32(a, b, v, lane); +} -int32x4_t __builtin_mpl_vector_shrn_high_n_i32v4(int32x2_t r, int64x2_t a, const int n); -#define vshrn_high_n_s64(r, a, n) __builtin_mpl_vector_shrn_high_n_i32v4(r, a, n) +int32x4_t __builtin_mpl_vector_mlaq_laneq_v4i32(int32x4_t a, int32x4_t b, int32x4_t v, const int lane); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlaq_laneq_s32( + int32x4_t a, int32x4_t b, int32x4_t v, const int lane) { + return __builtin_mpl_vector_mlaq_laneq_v4i32(a, b, v, lane); +} -uint8x16_t __builtin_mpl_vector_shrn_high_n_u8v16(uint8x8_t r, uint16x8_t a, const int n); -#define vshrn_high_n_u16(r, a, n) __builtin_mpl_vector_shrn_high_n_u8v16(r, a, n) +uint16x4_t __builtin_mpl_vector_mla_laneq_v4u16(uint16x4_t a, uint16x4_t b, uint16x8_t v, const int lane); +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmla_laneq_u16( + uint16x4_t a, uint16x4_t b, uint16x8_t v, const int lane) { + return __builtin_mpl_vector_mla_laneq_v4u16(a, b, v, lane); +} -uint16x8_t __builtin_mpl_vector_shrn_high_n_u16v8(uint16x4_t r, uint32x4_t a, const int n); -#define vshrn_high_n_u32(r, a, n) __builtin_mpl_vector_shrn_high_n_u16v8(r, a, n) +uint16x8_t __builtin_mpl_vector_mlaq_laneq_v8u16(uint16x8_t a, uint16x8_t b, uint16x8_t v, const int lane); +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlaq_laneq_u16( + uint16x8_t a, uint16x8_t b, uint16x8_t v, const int lane) { + return __builtin_mpl_vector_mlaq_laneq_v8u16(a, b, v, lane); +} -uint32x4_t __builtin_mpl_vector_shrn_high_n_u32v4(uint32x2_t r, uint64x2_t a, const int n); -#define vshrn_high_n_u64(r, a, n) __builtin_mpl_vector_shrn_high_n_u32v4(r, a, n) +uint32x2_t __builtin_mpl_vector_mla_laneq_v2u32(uint32x2_t a, uint32x2_t b, uint32x4_t v, const int lane); +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmla_laneq_u32( + uint32x2_t a, uint32x2_t b, uint32x4_t v, const int lane) { + return __builtin_mpl_vector_mla_laneq_v2u32(a, b, v, lane); +} -uint8x8_t __builtin_mpl_vector_qshrun_n_u8v8(int16x8_t a, const int n); -#define vqshrun_n_s16(a, n) __builtin_mpl_vector_qshrun_n_u8v8(a, n) +uint32x4_t __builtin_mpl_vector_mlaq_laneq_v4u32(uint32x4_t a, uint32x4_t b, uint32x4_t v, const int lane); +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlaq_laneq_u32( + uint32x4_t a, uint32x4_t b, uint32x4_t v, const int lane) { + return __builtin_mpl_vector_mlaq_laneq_v4u32(a, b, v, lane); +} -uint16x4_t __builtin_mpl_vector_qshrun_n_u16v4(int32x4_t a, const int n); -#define vqshrun_n_s32(a, n) __builtin_mpl_vector_qshrun_n_u16v4(a, n) +int32x4_t __builtin_mpl_vector_mlal_lane_v4i32(int32x4_t a, int16x4_t b, int16x4_t v, const int lane); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlal_lane_s16( + int32x4_t a, int16x4_t b, int16x4_t v, const int lane) { + return __builtin_mpl_vector_mlal_lane_v4i32(a, b, v, lane); +} -uint32x2_t __builtin_mpl_vector_qshrun_n_u32v2(int64x2_t a, const int n); -#define vqshrun_n_s64(a, n) __builtin_mpl_vector_qshrun_n_u32v2(a, n) +int64x2_t __builtin_mpl_vector_mlal_lane_v2i64(int64x2_t a, int32x2_t b, int32x2_t v, const int lane); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlal_lane_s32( + int64x2_t a, int32x2_t b, int32x2_t v, const int lane) { + return __builtin_mpl_vector_mlal_lane_v2i64(a, b, v, lane); +} -static inline uint8_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqshrunh_n_s16(int16_t a, const int n) { - return vget_lane_u8(vqshrun_n_s16((int16x8_t){a}, n), 0); +uint32x4_t __builtin_mpl_vector_mlal_lane_v4u32(uint32x4_t a, uint16x4_t b, uint16x4_t v, const int lane); +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlal_lane_u16( + uint32x4_t a, uint16x4_t b, uint16x4_t v, const int lane) { + return __builtin_mpl_vector_mlal_lane_v4u32(a, b, v, lane); } -static inline uint16_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqshruns_n_s32(int32_t a, const int n) { - return vget_lane_u16(vqshrun_n_s32((int32x4_t){a}, n), 0); +uint64x2_t __builtin_mpl_vector_mlal_lane_v2u64(uint64x2_t a, uint32x2_t b, uint32x2_t v, const int lane); +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlal_lane_u32( + uint64x2_t a, uint32x2_t b, uint32x2_t v, const int lane) { + return __builtin_mpl_vector_mlal_lane_v2u64(a, b, v, lane); } -static inline uint32_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqshrund_n_s64(int64_t a, const int n) { - return vget_lane_u32(vqshrun_n_s64((int64x2_t){a}, n), 0); +int32x4_t __builtin_mpl_vector_mlal_high_lane_v4i32(int32x4_t a, int16x8_t b, int16x4_t v, const int lane); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlal_high_lane_s16( + int32x4_t a, int16x8_t b, int16x4_t v, const int lane) { + return __builtin_mpl_vector_mlal_high_lane_v4i32(a, b, v, lane); } -uint8x16_t __builtin_mpl_vector_qshrun_high_n_u8v16(uint8x8_t r, int16x8_t a, const int n); -#define vqshrun_high_n_s16(r, a, n) __builtin_mpl_vector_qshrun_high_n_u8v16(r, a, n) +int64x2_t __builtin_mpl_vector_mlal_high_lane_v2i64(int64x2_t a, int32x4_t b, int32x2_t v, const int lane); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlal_high_lane_s32( + int64x2_t a, int32x4_t b, int32x2_t v, const int lane) { + return __builtin_mpl_vector_mlal_high_lane_v2i64(a, b, v, lane); +} -uint16x8_t __builtin_mpl_vector_qshrun_high_n_u16v8(uint16x4_t r, int32x4_t a, const int n); -#define vqshrun_high_n_s32(r, a, n) __builtin_mpl_vector_qshrun_high_n_u16v8(r, a, n) +uint32x4_t __builtin_mpl_vector_mlal_high_lane_v4u32(uint32x4_t a, uint16x8_t b, uint16x4_t v, const int lane); +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlal_high_lane_u16( + uint32x4_t a, uint16x8_t b, uint16x4_t v, const int lane) { + return __builtin_mpl_vector_mlal_high_lane_v4u32(a, b, v, lane); +} -uint32x4_t __builtin_mpl_vector_qshrun_high_n_u32v4(uint32x2_t r, int64x2_t a, const int n); -#define vqshrun_high_n_s64(r, a, n) __builtin_mpl_vector_qshrun_high_n_u32v4(r, a, n) +uint64x2_t __builtin_mpl_vector_mlal_high_lane_v2u64(uint64x2_t a, uint32x4_t b, uint32x2_t v, const int lane); +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlal_high_lane_u32( + uint64x2_t a, uint32x4_t b, uint32x2_t v, const int lane) { + return __builtin_mpl_vector_mlal_high_lane_v2u64(a, b, v, lane); +} -int8x8_t __builtin_mpl_vector_qshrn_n_i8v8(int16x8_t a, const int n); -#define vqshrn_n_s16(a, n) __builtin_mpl_vector_qshrn_n_i8v8(a, n) +int32x4_t __builtin_mpl_vector_mlal_laneq_v4i32(int32x4_t a, int16x4_t b, int16x8_t v, const int lane); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlal_laneq_s16( + int32x4_t a, int16x4_t b, int16x8_t v, const int lane) { + return __builtin_mpl_vector_mlal_laneq_v4i32(a, b, v, lane); +} -int16x4_t __builtin_mpl_vector_qshrn_n_i16v4(int32x4_t a, const int n); -#define vqshrn_n_s32(a, n) __builtin_mpl_vector_qshrn_n_i16v4(a, n) +int64x2_t __builtin_mpl_vector_mlal_laneq_v2i64(int64x2_t a, int32x2_t b, int32x4_t v, const int lane); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlal_laneq_s32( + int64x2_t a, int32x2_t b, int32x4_t v, const int lane) { + return __builtin_mpl_vector_mlal_laneq_v2i64(a, b, v, lane); +} -int32x2_t __builtin_mpl_vector_qshrn_n_i32v2(int64x2_t a, const int n); -#define vqshrn_n_s64(a, n) __builtin_mpl_vector_qshrn_n_i32v2(a, n) +uint32x4_t __builtin_mpl_vector_mlal_laneq_v4u32(uint32x4_t a, uint16x4_t b, uint16x8_t v, const int lane); +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlal_laneq_u16( + uint32x4_t a, uint16x4_t b, uint16x8_t v, const int lane) { + return __builtin_mpl_vector_mlal_laneq_v4u32(a, b, v, lane); +} -uint8x8_t __builtin_mpl_vector_qshrn_n_u8v8(uint16x8_t a, const int n); -#define vqshrn_n_u16(a, n) __builtin_mpl_vector_qshrn_n_u8v8(a, n) +uint64x2_t __builtin_mpl_vector_mlal_laneq_v2u64(uint64x2_t a, uint32x2_t b, uint32x4_t v, const int lane); +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlal_laneq_u32( + uint64x2_t a, uint32x2_t b, uint32x4_t v, const int lane) { + return __builtin_mpl_vector_mlal_laneq_v2u64(a, b, v, lane); +} -uint16x4_t __builtin_mpl_vector_qshrn_n_u16v4(uint32x4_t a, const int n); -#define vqshrn_n_u32(a, n) __builtin_mpl_vector_qshrn_n_u16v4(a, n) +int32x4_t __builtin_mpl_vector_mlal_high_laneq_v4i32(int32x4_t a, int16x8_t b, int16x8_t v, const int lane); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlal_high_laneq_s16( + int32x4_t a, int16x8_t b, int16x8_t v, const int lane) { + return __builtin_mpl_vector_mlal_high_laneq_v4i32(a, b, v, lane); +} -uint32x2_t __builtin_mpl_vector_qshrn_n_u32v2(uint64x2_t a, const int n); -#define vqshrn_n_u64(a, n) __builtin_mpl_vector_qshrn_n_u32v2(a, n) +int64x2_t __builtin_mpl_vector_mlal_high_laneq_v2i64(int64x2_t a, int32x4_t b, int32x4_t v, const int lane); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlal_high_laneq_s32( + int64x2_t a, int32x4_t b, int32x4_t v, const int lane) { + return __builtin_mpl_vector_mlal_high_laneq_v2i64(a, b, v, lane); +} -static inline int8_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqshrnh_n_s16(int16_t a, const int n) { - return vget_lane_s8(vqshrn_n_s16((int16x8_t){a}, n), 0); +uint32x4_t __builtin_mpl_vector_mlal_high_laneq_v4u32(uint32x4_t a, uint16x8_t b, uint16x8_t v, const int lane); +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlal_high_laneq_u16( + uint32x4_t a, uint16x8_t b, uint16x8_t v, const int lane) { + return __builtin_mpl_vector_mlal_high_laneq_v4u32(a, b, v, lane); } -static inline int16_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqshrns_n_s32(int32_t a, const int n) { - return vget_lane_s16(vqshrn_n_s32((int32x4_t){a}, n), 0); +uint64x2_t __builtin_mpl_vector_mlal_high_laneq_v2u64(uint64x2_t a, uint32x4_t b, uint32x4_t v, const int lane); +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlal_high_laneq_u32( + uint64x2_t a, uint32x4_t b, uint32x4_t v, const int lane) { + return __builtin_mpl_vector_mlal_high_laneq_v2u64(a, b, v, lane); } -static inline int32_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqshrnd_n_s64(int64_t a, const int n) { - return vget_lane_s32(vqshrn_n_s64((int64x2_t){a}, n), 0); +int16x4_t __builtin_mpl_vector_mla_n_v4i16(int16x4_t a, int16x4_t b, int16x4_t c); +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmla_n_s16( + int16x4_t a, int16x4_t b, int16_t c) { + return __builtin_mpl_vector_mla_n_v4i16(a, b, (int16x4_t){c}); } -static inline uint8_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqshrnh_n_u16(uint16_t a, const int n) { - return vget_lane_u8(vqshrn_n_u16((uint16x8_t){a}, n), 0); +int16x8_t __builtin_mpl_vector_mlaq_n_v8i16(int16x8_t a, int16x8_t b, int16x8_t c); +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlaq_n_s16( + int16x8_t a, int16x8_t b, int16_t c) { + return __builtin_mpl_vector_mlaq_n_v8i16(a, b, (int16x8_t){c}); } -static inline uint16_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqshrns_n_u32(uint32_t a, const int n) { - return vget_lane_u16(vqshrn_n_u32((uint32x4_t){a}, n), 0); +int32x2_t __builtin_mpl_vector_mla_n_v2i32(int32x2_t a, int32x2_t b, int32x2_t c); +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmla_n_s32( + int32x2_t a, int32x2_t b, int32_t c) { + return __builtin_mpl_vector_mla_n_v2i32(a, b, (int32x2_t){c}); } -static inline uint32_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqshrnd_n_u64(uint64_t a, const int n) { - return vget_lane_u32(vqshrn_n_u64((uint64x2_t){a}, n), 0); +int32x4_t __builtin_mpl_vector_mlaq_n_v4i32(int32x4_t a, int32x4_t b, int32x4_t c); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlaq_n_s32( + int32x4_t a, int32x4_t b, int32_t c) { + return __builtin_mpl_vector_mlaq_n_v4i32(a, b, (int32x4_t){c}); } -int8x16_t __builtin_mpl_vector_qshrn_high_n_i8v16(int8x8_t r, int16x8_t a, const int n); -#define vqshrn_high_n_s16(r, a, n) __builtin_mpl_vector_qshrn_high_n_i8v16(r, a, n) +uint16x4_t __builtin_mpl_vector_mla_n_v4u16(uint16x4_t a, uint16x4_t b, uint16x4_t c); +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmla_n_u16( + uint16x4_t a, uint16x4_t b, uint16_t c) { + return __builtin_mpl_vector_mla_n_v4u16(a, b, (uint16x4_t){c}); +} -int16x8_t __builtin_mpl_vector_qshrn_high_n_i16v8(int16x4_t r, int32x4_t a, const int n); -#define vqshrn_high_n_s32(r, a, n) __builtin_mpl_vector_qshrn_high_n_i16v8(r, a, n) +uint16x8_t __builtin_mpl_vector_mlaq_n_v8u16(uint16x8_t a, uint16x8_t b, uint16x8_t c); +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlaq_n_u16( + uint16x8_t a, uint16x8_t b, uint16_t c) { + return __builtin_mpl_vector_mlaq_n_v8u16(a, b, (uint16x8_t){c}); +} -int32x4_t __builtin_mpl_vector_qshrn_high_n_i32v4(int32x2_t r, int64x2_t a, const int n); -#define vqshrn_high_n_s64(r, a, n) __builtin_mpl_vector_qshrn_high_n_i32v4(r, a, n) +uint32x2_t __builtin_mpl_vector_mla_n_v2u32(uint32x2_t a, uint32x2_t b, uint32x2_t c); +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmla_n_u32( + uint32x2_t a, uint32x2_t b, uint32_t c) { + return __builtin_mpl_vector_mla_n_v2u32(a, b, (uint32x2_t){c}); +} -uint8x16_t __builtin_mpl_vector_qshrn_high_n_u8v16(uint8x8_t r, uint16x8_t a, const int n); -#define vqshrn_high_n_u16(r, a, n) __builtin_mpl_vector_qshrn_high_n_u8v16(r, a, n) +uint32x4_t __builtin_mpl_vector_mlaq_n_v4u32(uint32x4_t a, uint32x4_t b, uint32x4_t c); +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlaq_n_u32( + uint32x4_t a, uint32x4_t b, int32_t c) { + return __builtin_mpl_vector_mlaq_n_v4u32(a, b, (uint32x4_t){c}); +} -uint16x8_t __builtin_mpl_vector_qshrn_high_n_u16v8(uint16x4_t r, uint32x4_t a, const int n); -#define vqshrn_high_n_u32(r, a, n) __builtin_mpl_vector_qshrn_high_n_u16v8(r, a, n) +int16x4_t __builtin_mpl_vector_mls_lane_v4i16(int16x4_t a, int16x4_t b, int16x4_t v, const int lane); +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmls_lane_s16( + int16x4_t a, int16x4_t b, int16x4_t v, const int lane) { + return __builtin_mpl_vector_mls_lane_v4i16(a, b, v, lane); +} -uint32x4_t __builtin_mpl_vector_qshrn_high_n_u32v4(uint32x2_t r, uint64x2_t a, const int n); -#define vqshrn_high_n_u64(r, a, n) __builtin_mpl_vector_qshrn_high_n_u32v4(r, a, n) +int16x8_t __builtin_mpl_vector_mlsq_lane_v8i16(int16x8_t a, int16x8_t b, int16x4_t v, const int lane); +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlsq_lane_s16( + int16x8_t a, int16x8_t b, int16x4_t v, const int lane) { + return __builtin_mpl_vector_mlsq_lane_v8i16(a, b, v, lane); +} -uint8x8_t __builtin_mpl_vector_qrshrun_n_u8v8(int16x8_t a, const int n); -#define vqrshrun_n_s16(a, n) __builtin_mpl_vector_qrshrun_n_u8v8(a, n) +int32x2_t __builtin_mpl_vector_mls_lane_v2i32(int32x2_t a, int32x2_t b, int32x2_t v, const int lane); +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmls_lane_s32( + int32x2_t a, int32x2_t b, int32x2_t v, const int lane) { + return __builtin_mpl_vector_mls_lane_v2i32(a, b, v, lane); +} -uint16x4_t __builtin_mpl_vector_qrshrun_n_u16v4(int32x4_t a, const int n); -#define vqrshrun_n_s32(a, n) __builtin_mpl_vector_qrshrun_n_u16v4(a, n) +int32x4_t __builtin_mpl_vector_mlsq_lane_v4i32(int32x4_t a, int32x4_t b, int32x2_t v, const int lane); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlsq_lane_s32( + int32x4_t a, int32x4_t b, int32x2_t v, const int lane) { + return __builtin_mpl_vector_mlsq_lane_v4i32(a, b, v, lane); +} -uint32x2_t __builtin_mpl_vector_qrshrun_n_u32v2(int64x2_t a, const int n); -#define vqrshrun_n_s64(a, n) __builtin_mpl_vector_qrshrun_n_u32v2(a, n) +uint16x4_t __builtin_mpl_vector_mls_lane_v4u16(uint16x4_t a, uint16x4_t b, uint16x4_t v, const int lane); +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmls_lane_u16( + uint16x4_t a, uint16x4_t b, uint16x4_t v, const int lane) { + return __builtin_mpl_vector_mls_lane_v4u16(a, b, v, lane); +} -static inline uint8_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqrshrunh_n_s16(int16_t a, const int n) { - return vget_lane_u8(vqrshrun_n_s16((int16x8_t){a}, n), 0); +uint16x8_t __builtin_mpl_vector_mlsq_lane_v8u16(uint16x8_t a, uint16x8_t b, uint16x4_t v, const int lane); +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlsq_lane_u16( + uint16x8_t a, uint16x8_t b, uint16x4_t v, const int lane) { + return __builtin_mpl_vector_mlsq_lane_v8u16(a, b, v, lane); } -static inline uint16_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqrshruns_n_s32(int32_t a, const int n) { - return vget_lane_u16(vqrshrun_n_s32((int32x4_t){a}, n), 0); +uint32x2_t __builtin_mpl_vector_mls_lane_v2u32(uint32x2_t a, uint32x2_t b, uint32x2_t v, const int lane); +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmls_lane_u32( + uint32x2_t a, uint32x2_t b, uint32x2_t v, const int lane) { + return __builtin_mpl_vector_mls_lane_v2u32(a, b, v, lane); } -static inline uint32_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqrshrund_n_s64(int64_t a, const int n) { - return vget_lane_u32(vqrshrun_n_s64((int64x2_t){a}, n), 0); +uint32x4_t __builtin_mpl_vector_mlsq_lane_v4u32(uint32x4_t a, uint32x4_t b, uint32x2_t v, const int lane); +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlsq_lane_u32( + uint32x4_t a, uint32x4_t b, uint32x2_t v, const int lane) { + return __builtin_mpl_vector_mlsq_lane_v4u32(a, b, v, lane); } -uint8x16_t __builtin_mpl_vector_qrshrun_high_n_u8v16(uint8x8_t r, int16x8_t a, const int n); -#define vqrshrun_high_n_s16(r, a, n) __builtin_mpl_vector_qrshrun_high_n_u8v16(r, a, n) +int16x4_t __builtin_mpl_vector_mls_laneq_v4i16(int16x4_t a, int16x4_t b, int16x8_t v, const int lane); +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmls_laneq_s16( + int16x4_t a, int16x4_t b, int16x8_t v, const int lane) { + return __builtin_mpl_vector_mls_laneq_v4i16(a, b, v, lane); +} -uint16x8_t __builtin_mpl_vector_qrshrun_high_n_u16v8(uint16x4_t r, int32x4_t a, const int n); -#define vqrshrun_high_n_s32(r, a, n) __builtin_mpl_vector_qrshrun_high_n_u16v8(r, a, n) +int16x8_t __builtin_mpl_vector_mlsq_laneq_v8i16(int16x8_t a, int16x8_t b, int16x8_t v, const int lane); +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlsq_laneq_s16( + int16x8_t a, int16x8_t b, int16x8_t v, const int lane) { + return __builtin_mpl_vector_mlsq_laneq_v8i16(a, b, v, lane); +} -uint32x4_t __builtin_mpl_vector_qrshrun_high_n_u32v4(uint32x2_t r, int64x2_t a, const int n); -#define vqrshrun_high_n_s64(r, a, n) __builtin_mpl_vector_qrshrun_high_n_u32v4(r, a, n) +int32x2_t __builtin_mpl_vector_mls_laneq_v2i32(int32x2_t a, int32x2_t b, int32x4_t v, const int lane); +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmls_laneq_s32( + int32x2_t a, int32x2_t b, int32x4_t v, const int lane) { + return __builtin_mpl_vector_mls_laneq_v2i32(a, b, v, lane); +} -int8x8_t __builtin_mpl_vector_qrshrn_n_i8v8(int16x8_t a, const int n); -#define vqrshrn_n_s16(a, n) __builtin_mpl_vector_qrshrn_n_i8v8(a, n) +int32x4_t __builtin_mpl_vector_mlsq_laneq_v4i32(int32x4_t a, int32x4_t b, int32x4_t v, const int lane); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlsq_laneq_s32( + int32x4_t a, int32x4_t b, int32x4_t v, const int lane) { + return __builtin_mpl_vector_mlsq_laneq_v4i32(a, b, v, lane); +} -int16x4_t __builtin_mpl_vector_qrshrn_n_i16v4(int32x4_t a, const int n); -#define vqrshrn_n_s32(a, n) __builtin_mpl_vector_qrshrn_n_i16v4(a, n) +uint16x4_t __builtin_mpl_vector_mls_laneq_v4u16(uint16x4_t a, uint16x4_t b, uint16x8_t v, const int lane); +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmls_laneq_u16( + uint16x4_t a, uint16x4_t b, uint16x8_t v, const int lane) { + return __builtin_mpl_vector_mls_laneq_v4u16(a, b, v, lane); +} -int32x2_t __builtin_mpl_vector_qrshrn_n_i32v2(int64x2_t a, const int n); -#define vqrshrn_n_s64(a, n) __builtin_mpl_vector_qrshrn_n_i32v2(a, n) +uint16x8_t __builtin_mpl_vector_mlsq_laneq_v8u16(uint16x8_t a, uint16x8_t b, uint16x8_t v, const int lane); +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlsq_laneq_u16( + uint16x8_t a, uint16x8_t b, uint16x8_t v, const int lane) { + return __builtin_mpl_vector_mlsq_laneq_v8u16(a, b, v, lane); +} -uint8x8_t __builtin_mpl_vector_qrshrn_n_u8v8(uint16x8_t a, const int n); -#define vqrshrn_n_u16(a, n) __builtin_mpl_vector_qrshrn_n_u8v8(a, n) +uint32x2_t __builtin_mpl_vector_mls_laneq_v2u32(uint32x2_t a, uint32x2_t b, uint32x4_t v, const int lane); +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmls_laneq_u32( + uint32x2_t a, uint32x2_t b, uint32x4_t v, const int lane) { + return __builtin_mpl_vector_mls_laneq_v2u32(a, b, v, lane); +} -uint16x4_t __builtin_mpl_vector_qrshrn_n_u16v4(uint32x4_t a, const int n); -#define vqrshrn_n_u32(a, n) __builtin_mpl_vector_qrshrn_n_u16v4(a, n) +uint32x4_t __builtin_mpl_vector_mlsq_laneq_v4u32(uint32x4_t a, uint32x4_t b, uint32x4_t v, const int lane); +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlsq_laneq_u32( + uint32x4_t a, uint32x4_t b, uint32x4_t v, const int lane) { + return __builtin_mpl_vector_mlsq_laneq_v4u32(a, b, v, lane); +} -uint32x2_t __builtin_mpl_vector_qrshrn_n_u32v2(uint64x2_t a, const int n); -#define vqrshrn_n_u64(a, n) __builtin_mpl_vector_qrshrn_n_u32v2(a, n) +int32x4_t __builtin_mpl_vector_mlsl_lane_v4i32(int32x4_t a, int16x4_t b, int16x4_t v, const int lane); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlsl_lane_s16( + int32x4_t a, int16x4_t b, int16x4_t v, const int lane) { + return __builtin_mpl_vector_mlsl_lane_v4i32(a, b, v, lane); +} -static inline int8_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqrshrnh_n_s16(int16_t a, const int n) { - return vget_lane_s8(vqrshrn_n_s16((int16x8_t){a}, n), 0); +int64x2_t __builtin_mpl_vector_mlsl_lane_v2i64(int64x2_t a, int32x2_t b, int32x2_t v, const int lane); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlsl_lane_s32( + int64x2_t a, int32x2_t b, int32x2_t v, const int lane) { + return __builtin_mpl_vector_mlsl_lane_v2i64(a, b, v, lane); } -static inline int16_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqrshrns_n_s32(int32_t a, const int n) { - return vget_lane_s16(vqrshrn_n_s32((int32x4_t){a}, n), 0); +uint32x4_t __builtin_mpl_vector_mlsl_lane_v4u32(uint32x4_t a, uint16x4_t b, uint16x4_t v, const int lane); +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlsl_lane_u16( + uint32x4_t a, uint16x4_t b, uint16x4_t v, const int lane) { + return __builtin_mpl_vector_mlsl_lane_v4u32(a, b, v, lane); } -static inline int32_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqrshrnd_n_s64(int64_t a, const int n) { - return vget_lane_s32(vqrshrn_n_s64((int64x2_t){a}, n), 0); +uint64x2_t __builtin_mpl_vector_mlsl_lane_v2u64(uint64x2_t a, uint32x2_t b, uint32x2_t v, const int lane); +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlsl_lane_u32( + uint64x2_t a, uint32x2_t b, uint32x2_t v, const int lane) { + return __builtin_mpl_vector_mlsl_lane_v2u64(a, b, v, lane); } -static inline uint8_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqrshrnh_n_u16(uint16_t a, const int n) { - return vget_lane_u8(vqrshrn_n_u16((uint16x8_t){a}, n), 0); +int32x4_t __builtin_mpl_vector_mlsl_high_lane_v4i32(int32x4_t a, int16x8_t b, int16x4_t v, const int lane); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlsl_high_lane_s16( + int32x4_t a, int16x8_t b, int16x4_t v, const int lane) { + return __builtin_mpl_vector_mlsl_high_lane_v4i32(a, b, v, lane); } -static inline uint16_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqrshrns_n_u32(uint32_t a, const int n) { - return vget_lane_u16(vqrshrn_n_u32((uint32x4_t){a}, n), 0); +int64x2_t __builtin_mpl_vector_mlsl_high_lane_v2i64(int64x2_t a, int32x4_t b, int32x2_t v, const int lane); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlsl_high_lane_s32( + int64x2_t a, int32x4_t b, int32x2_t v, const int lane) { + return __builtin_mpl_vector_mlsl_high_lane_v2i64(a, b, v, lane); } -static inline uint32_t __attribute__ ((__always_inline__, __gnu_inline__)) -vqrshrnd_n_u64(uint64_t a, const int n) { - return vget_lane_u32(vqrshrn_n_u64((uint64x2_t){a}, n), 0); +uint32x4_t __builtin_mpl_vector_mlsl_high_lane_v4u32(uint32x4_t a, uint16x8_t b, uint16x4_t v, const int lane); +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlsl_high_lane_u16( + uint32x4_t a, uint16x8_t b, uint16x4_t v, const int lane) { + return __builtin_mpl_vector_mlsl_high_lane_v4u32(a, b, v, lane); } -int8x16_t __builtin_mpl_vector_qrshrn_high_n_i8v16(int8x8_t r, int16x8_t a, const int n); -#define vqrshrn_high_n_s16(r, a, n) __builtin_mpl_vector_qrshrn_high_n_i8v16(r, a, n) +uint64x2_t __builtin_mpl_vector_mlsl_high_lane_v2u64(uint64x2_t a, uint32x4_t b, uint32x2_t v, const int lane); +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlsl_high_lane_u32( + uint64x2_t a, uint32x4_t b, uint32x2_t v, const int lane) { + return __builtin_mpl_vector_mlsl_high_lane_v2u64(a, b, v, lane); +} -int16x8_t __builtin_mpl_vector_qrshrn_high_n_i16v8(int16x4_t r, int32x4_t a, const int n); -#define vqrshrn_high_n_s32(r, a, n) __builtin_mpl_vector_qrshrn_high_n_i16v8(r, a, n) +int32x4_t __builtin_mpl_vector_mlsl_laneq_v4i32(int32x4_t a, int16x4_t b, int16x8_t v, const int lane); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlsl_laneq_s16( + int32x4_t a, int16x4_t b, int16x8_t v, const int lane) { + return __builtin_mpl_vector_mlsl_laneq_v4i32(a, b, v, lane); +} -int32x4_t __builtin_mpl_vector_qrshrn_high_n_i32v4(int32x2_t r, int64x2_t a, const int n); -#define vqrshrn_high_n_s64(r, a, n) __builtin_mpl_vector_qrshrn_high_n_i32v4(r, a, n) +int64x2_t __builtin_mpl_vector_mlsl_laneq_v2i64(int64x2_t a, int32x2_t b, int32x4_t v, const int lane); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlsl_laneq_s32( + int64x2_t a, int32x2_t b, int32x4_t v, const int lane) { + return __builtin_mpl_vector_mlsl_laneq_v2i64(a, b, v, lane); +} -uint8x16_t __builtin_mpl_vector_qrshrn_high_n_u8v16(uint8x8_t r, uint16x8_t a, const int n); -#define vqrshrn_high_n_u16(r, a, n) __builtin_mpl_vector_qrshrn_high_n_u8v16(r, a, n) +uint32x4_t __builtin_mpl_vector_mlsl_laneq_v4u32(uint32x4_t a, uint16x4_t b, uint16x8_t v, const int lane); +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlsl_laneq_u16( + uint32x4_t a, uint16x4_t b, uint16x8_t v, const int lane) { + return __builtin_mpl_vector_mlsl_laneq_v4u32(a, b, v, lane); +} -uint16x8_t __builtin_mpl_vector_qrshrn_high_n_u16v8(uint16x4_t r, uint32x4_t a, const int n); -#define vqrshrn_high_n_u32(r, a, n) __builtin_mpl_vector_qrshrn_high_n_u16v8(r, a, n) +uint64x2_t __builtin_mpl_vector_mlsl_laneq_v2u64(uint64x2_t a, uint32x2_t b, uint32x4_t v, const int lane); +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlsl_laneq_u32( + uint64x2_t a, uint32x2_t b, uint32x4_t v, const int lane) { + return __builtin_mpl_vector_mlsl_laneq_v2u64(a, b, v, lane); +} -uint32x4_t __builtin_mpl_vector_qrshrn_high_n_u32v4(uint32x2_t r, uint64x2_t a, const int n); -#define vqrshrn_high_n_u64(r, a, n) __builtin_mpl_vector_qrshrn_high_n_u32v4(r, a, n) +int32x4_t __builtin_mpl_vector_mlsl_high_laneq_v4i32(int32x4_t a, int16x8_t b, int16x8_t v, const int lane); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlsl_high_laneq_s16( + int32x4_t a, int16x8_t b, int16x8_t v, const int lane) { + return __builtin_mpl_vector_mlsl_high_laneq_v4i32(a, b, v, lane); +} -int8x8_t __builtin_mpl_vector_rshrn_n_i8v8(int16x8_t a, const int n); -#define vrshrn_n_s16(a, n) __builtin_mpl_vector_rshrn_n_i8v8(a, n) +int64x2_t __builtin_mpl_vector_mlsl_high_laneq_v2i64(int64x2_t a, int32x4_t b, int32x4_t v, const int lane); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlsl_high_laneq_s32( + int64x2_t a, int32x4_t b, int32x4_t v, const int lane) { + return __builtin_mpl_vector_mlsl_high_laneq_v2i64(a, b, v, lane); +} -int16x4_t __builtin_mpl_vector_rshrn_n_i16v4(int32x4_t a, const int n); -#define vrshrn_n_s32(a, n) __builtin_mpl_vector_rshrn_n_i16v4(a, n) +uint32x4_t __builtin_mpl_vector_mlsl_high_laneq_v4u32(uint32x4_t a, uint16x8_t b, uint16x8_t v, const int lane); +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlsl_high_laneq_u16( + uint32x4_t a, uint16x8_t b, uint16x8_t v, const int lane) { + return __builtin_mpl_vector_mlsl_high_laneq_v4u32(a, b, v, lane); +} -int32x2_t __builtin_mpl_vector_rshrn_n_i32v2(int64x2_t a, const int n); -#define vrshrn_n_s64(a, n) __builtin_mpl_vector_rshrn_n_i32v2(a, n) +uint64x2_t __builtin_mpl_vector_mlsl_high_laneq_v2u64(uint64x2_t a, uint32x4_t b, uint32x4_t v, const int lane); +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlsl_high_laneq_u32( + uint64x2_t a, uint32x4_t b, uint32x4_t v, const int lane) { + return __builtin_mpl_vector_mlsl_high_laneq_v2u64(a, b, v, lane); +} -uint8x8_t __builtin_mpl_vector_rshrn_n_u8v8(uint16x8_t a, const int n); -#define vrshrn_n_u16(a, n) __builtin_mpl_vector_rshrn_n_u8v8(a, n) +int32x4_t __builtin_mpl_vector_mlal_n_v4i32(int32x4_t a, int16x4_t b, int16x4_t c); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlal_n_s16( + int32x4_t a, int16x4_t b, int16_t c) { + return __builtin_mpl_vector_mlal_n_v4i32(a, b, (int16x4_t){c}); +} -uint16x4_t __builtin_mpl_vector_rshrn_n_u16v4(uint32x4_t a, const int n); -#define vrshrn_n_u32(a, n) __builtin_mpl_vector_rshrn_n_u16v4(a, n) +int64x2_t __builtin_mpl_vector_mlal_n_v2i64(int64x2_t a, int32x2_t b, int32x2_t c); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlal_n_s32( + int64x2_t a, int32x2_t b, int32_t c) { + return __builtin_mpl_vector_mlal_n_v2i64(a, b, (int32x2_t){c}); +} -uint32x2_t __builtin_mpl_vector_rshrn_n_u32v2(uint64x2_t a, const int n); -#define vrshrn_n_u64(a, n) __builtin_mpl_vector_rshrn_n_u32v2(a, n) +uint32x4_t __builtin_mpl_vector_mlal_n_v4u32(uint32x4_t a, uint16x4_t b, uint16x4_t c); +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlal_n_u16( + uint32x4_t a, uint16x4_t b, uint16_t c) { + return __builtin_mpl_vector_mlal_n_v4u32(a, b, (uint16x4_t){c}); +} -int8x16_t __builtin_mpl_vector_rshrn_high_n_i8v16(int8x8_t r, int16x8_t a, const int n); -#define vrshrn_high_n_s16(r, a, n) __builtin_mpl_vector_rshrn_high_n_i8v16(r, a, n) +uint64x2_t __builtin_mpl_vector_mlal_n_v2u64(uint64x2_t a, uint32x2_t b, uint32x2_t c); +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlal_n_u32( + uint64x2_t a, uint32x2_t b, uint32_t c) { + return __builtin_mpl_vector_mlal_n_v2u64(a, b, (uint32x2_t){c}); +} -int16x8_t __builtin_mpl_vector_rshrn_high_n_i16v8(int16x4_t r, int32x4_t a, const int n); -#define vrshrn_high_n_s32(r, a, n) __builtin_mpl_vector_rshrn_high_n_i16v8(r, a, n) +int32x4_t __builtin_mpl_vector_mlal_high_n_v4i32(int32x4_t a, int16x8_t b, int16x8_t c); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlal_high_n_s16( + int32x4_t a, int16x8_t b, int16_t c) { + return __builtin_mpl_vector_mlal_high_n_v4i32(a, b, (int16x8_t){c}); +} -int32x4_t __builtin_mpl_vector_rshrn_high_n_i32v4(int32x2_t r, int64x2_t a, const int n); -#define vrshrn_high_n_s64(r, a, n) __builtin_mpl_vector_rshrn_high_n_i32v4(r, a, n) +int64x2_t __builtin_mpl_vector_mlal_high_n_v2i64(int64x2_t a, int32x4_t b, int32x4_t c); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlal_high_n_s32( + int64x2_t a, int32x4_t b, int32_t c) { + return __builtin_mpl_vector_mlal_high_n_v2i64(a, b, (int32x4_t){c}); +} -uint8x16_t __builtin_mpl_vector_rshrn_high_n_u8v16(uint8x8_t r, uint16x8_t a, const int n); -#define vrshrn_high_n_u16(r, a, n) __builtin_mpl_vector_rshrn_high_n_u8v16(r, a, n) +uint32x4_t __builtin_mpl_vector_mlal_high_n_v4u32(uint32x4_t a, uint16x8_t b, uint16x8_t c); +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlal_high_n_u16( + uint32x4_t a, uint16x8_t b, uint16_t c) { + return __builtin_mpl_vector_mlal_high_n_v4u32(a, b, (uint16x8_t){c}); +} -uint16x8_t __builtin_mpl_vector_rshrn_high_n_u16v8(uint16x4_t r, uint32x4_t a, const int n); -#define vrshrn_high_n_u32(r, a, n) __builtin_mpl_vector_rshrn_high_n_u16v8(r, a, n) +uint64x2_t __builtin_mpl_vector_mlal_high_n_v2u64(uint64x2_t a, uint32x4_t b, uint32x4_t c); +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlal_high_n_u32( + uint64x2_t a, uint32x4_t b, uint32_t c) { + return __builtin_mpl_vector_mlal_high_n_v2u64(a, b, (uint32x4_t){c}); +} -uint32x4_t __builtin_mpl_vector_rshrn_high_n_u32v4(uint32x2_t r, uint64x2_t a, const int n); -#define vrshrn_high_n_u64(r, a, n) __builtin_mpl_vector_rshrn_high_n_u32v4(r, a, n) +int16x4_t __builtin_mpl_vector_mls_n_v4i16(int16x4_t a, int16x4_t b, int16x4_t c); +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmls_n_s16( + int16x4_t a, int16x4_t b, int16_t c) { + return __builtin_mpl_vector_mls_n_v4i16(a, b, (int16x4_t){c}); +} -int8x8_t __builtin_mpl_vector_sri_n_i8v8(int8x8_t a, int8x8_t b, const int n); -#define vsri_n_s8(a, b, n) __builtin_mpl_vector_sri_n_i8v8(a, b, n) +int16x8_t __builtin_mpl_vector_mlsq_n_v8i16(int16x8_t a, int16x8_t b, int16x8_t c); +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlsq_n_s16( + int16x8_t a, int16x8_t b, int16_t c) { + return __builtin_mpl_vector_mlsq_n_v8i16(a, b, (int16x8_t){c}); +} -int8x16_t __builtin_mpl_vector_sriq_n_i8v16(int8x16_t a, int8x16_t b, const int n); -#define vsriq_n_s8(a, b, n) __builtin_mpl_vector_sriq_n_i8v16(a, b, n) +int32x2_t __builtin_mpl_vector_mls_n_v2i32(int32x2_t a, int32x2_t b, int32x2_t c); +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmls_n_s32( + int32x2_t a, int32x2_t b, int32_t c) { + return __builtin_mpl_vector_mls_n_v2i32(a, b, (int32x2_t){c}); +} -int16x4_t __builtin_mpl_vector_sri_n_i16v4(int16x4_t a, int16x4_t b, const int n); -#define vsri_n_s16(a, b, n) __builtin_mpl_vector_sri_n_i16v4(a, b, n) +int32x4_t __builtin_mpl_vector_mlsq_n_v4i32(int32x4_t a, int32x4_t b, int32x4_t c); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlsq_n_s32( + int32x4_t a, int32x4_t b, int32_t c) { + return __builtin_mpl_vector_mlsq_n_v4i32(a, b, (int32x4_t){c}); +} -int16x8_t __builtin_mpl_vector_sriq_n_i16v8(int16x8_t a, int16x8_t b, const int n); -#define vsriq_n_s16(a, b, n) __builtin_mpl_vector_sriq_n_i16v8(a, b, n) +uint16x4_t __builtin_mpl_vector_mls_n_v4u16(uint16x4_t a, uint16x4_t b, uint16x4_t c); +extern inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmls_n_u16( + uint16x4_t a, uint16x4_t b, uint16_t c) { + return __builtin_mpl_vector_mls_n_v4u16(a, b, (uint16x4_t){c}); +} -int32x2_t __builtin_mpl_vector_sri_n_i32v2(int32x2_t a, int32x2_t b, const int n); -#define vsri_n_s32(a, b, n) __builtin_mpl_vector_sri_n_i32v2(a, b, n) +uint16x8_t __builtin_mpl_vector_mlsq_n_v8u16(uint16x8_t a, uint16x8_t b, uint16x8_t c); +extern inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlsq_n_u16( + uint16x8_t a, uint16x8_t b, uint16_t c) { + return __builtin_mpl_vector_mlsq_n_v8u16(a, b, (uint16x8_t){c}); +} -int32x4_t __builtin_mpl_vector_sriq_n_i32v4(int32x4_t a, int32x4_t b, const int n); -#define vsriq_n_s32(a, b, n) __builtin_mpl_vector_sriq_n_i32v4(a, b, n) +uint32x2_t __builtin_mpl_vector_mls_n_v2u32(uint32x2_t a, uint32x2_t b, uint32x2_t c); +extern inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmls_n_u32( + uint32x2_t a, uint32x2_t b, uint32_t c) { + return __builtin_mpl_vector_mls_n_v2u32(a, b, (uint32x2_t){c}); +} -int64x2_t __builtin_mpl_vector_sriq_n_i64v2(int64x2_t a, int64x2_t b, const int n); -#define vsriq_n_s64(a, b, n) __builtin_mpl_vector_sriq_n_i64v2(a, b, n) +uint32x4_t __builtin_mpl_vector_mlsq_n_v4u32(uint32x4_t a, uint32x4_t b, uint32x4_t c); +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlsq_n_u32( + uint32x4_t a, uint32x4_t b, uint32_t c) { + return __builtin_mpl_vector_mlsq_n_v4u32(a, b, (uint32x4_t){c}); +} -uint8x8_t __builtin_mpl_vector_sri_n_u8v8(uint8x8_t a, uint8x8_t b, const int n); -#define vsri_n_u8(a, b, n) __builtin_mpl_vector_sri_n_u8v8(a, b, n) +int32x4_t __builtin_mpl_vector_mlsl_n_v4i32(int32x4_t a, int16x4_t b, int16x4_t c); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlsl_n_s16( + int32x4_t a, int16x4_t b, int16_t c) { + return __builtin_mpl_vector_mlsl_n_v4i32(a, b, (int16x4_t){c}); +} -uint8x16_t __builtin_mpl_vector_sriq_n_u8v16(uint8x16_t a, uint8x16_t b, const int n); -#define vsriq_n_u8(a, b, n) __builtin_mpl_vector_sriq_n_u8v16(a, b, n) +int64x2_t __builtin_mpl_vector_mlsl_n_v2i64(int64x2_t a, int32x2_t b, int32x2_t c); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlsl_n_s32( + int64x2_t a, int32x2_t b, int32_t c) { + return __builtin_mpl_vector_mlsl_n_v2i64(a, b, (int32x2_t){c}); +} -uint16x4_t __builtin_mpl_vector_sri_n_u16v4(uint16x4_t a, uint16x4_t b, const int n); -#define vsri_n_u16(a, b, n) __builtin_mpl_vector_sri_n_u16v4(a, b, n) +uint32x4_t __builtin_mpl_vector_mlsl_n_v4u32(uint32x4_t a, uint16x4_t b, uint16x4_t c); +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlsl_n_u16( + uint32x4_t a, uint16x4_t b, uint16_t c) { + return __builtin_mpl_vector_mlsl_n_v4u32(a, b, (uint16x4_t){c}); +} -uint16x8_t __builtin_mpl_vector_sriq_n_u16v8(uint16x8_t a, uint16x8_t b, const int n); -#define vsriq_n_u16(a, b, n) __builtin_mpl_vector_sriq_n_u16v8(a, b, n) +uint64x2_t __builtin_mpl_vector_mlsl_n_v2u64(uint64x2_t a, uint32x2_t b, uint32x2_t c); +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlsl_n_u32( + uint64x2_t a, uint32x2_t b, uint32_t c) { + return __builtin_mpl_vector_mlsl_n_v2u64(a, b, (uint32x2_t){c}); +} -uint32x2_t __builtin_mpl_vector_sri_n_u32v2(uint32x2_t a, uint32x2_t b, const int n); -#define vsri_n_u32(a, b, n) __builtin_mpl_vector_sri_n_u32v2(a, b, n) +int32x4_t __builtin_mpl_vector_mlsl_high_n_v4i32(int32x4_t a, int16x8_t b, int16x8_t c); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlsl_high_n_s16( + int32x4_t a, int16x8_t b, int16_t c) { + return __builtin_mpl_vector_mlsl_high_n_v4i32(a, b, (int16x8_t){c}); +} -uint32x4_t __builtin_mpl_vector_sriq_n_u32v4(uint32x4_t a, uint32x4_t b, const int n); -#define vsriq_n_u32(a, b, n) __builtin_mpl_vector_sriq_n_u32v4(a, b, n) +int64x2_t __builtin_mpl_vector_mlsl_high_n_v2i64(int64x2_t a, int32x4_t b, int32x4_t c); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlsl_high_n_s32( + int64x2_t a, int32x4_t b, int32_t c) { + return __builtin_mpl_vector_mlsl_high_n_v2i64(a, b, (int32x4_t){c}); +} -uint64x2_t __builtin_mpl_vector_sriq_n_u64v2(uint64x2_t a, uint64x2_t b, const int n); -#define vsriq_n_u64(a, b, n) __builtin_mpl_vector_sriq_n_u64v2(a, b, n) +uint32x4_t __builtin_mpl_vector_mlsl_high_n_v4u32(uint32x4_t a, uint16x8_t b, uint16x8_t c); +extern inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlsl_high_n_u16( + uint32x4_t a, uint16x8_t b, uint16_t c) { + return __builtin_mpl_vector_mlsl_high_n_v4u32(a, b, (uint16x8_t){c}); +} -int64x1_t __builtin_mpl_vector_srid_n_i64(int64x1_t a, int64x1_t b, const int n); -static inline int64_t __attribute__ ((__always_inline__, __gnu_inline__)) -vsrid_n_s64(int64_t a, int64_t b, const int n) { - return vget_lane_s64(__builtin_mpl_vector_srid_n_i64((int64x1_t){a}, (int64x1_t){b}, n), 0); +uint64x2_t __builtin_mpl_vector_mlsl_high_n_v2u64(uint64x2_t a, uint32x4_t b, uint32x4_t c); +extern inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vmlsl_high_n_u32( + uint64x2_t a, uint32x4_t b, uint32_t c) { + return __builtin_mpl_vector_mlsl_high_n_v2u64(a, b, (uint32x4_t){c}); } -uint64x1_t __builtin_mpl_vector_srid_n_u64(uint64x1_t a, uint64x1_t b, const int n); -static inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__)) -vsrid_n_u64(uint64_t a, uint64_t b, const int n) { - return vget_lane_u64(__builtin_mpl_vector_srid_n_u64((uint64x1_t){a}, (uint64x1_t){b}, n), 0); +int8x8_t __builtin_mpl_vector_qneg_v8i8(int8x8_t a); +extern inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqneg_s8(int8x8_t a) { + return __builtin_mpl_vector_qneg_v8i8(a); } -int16x4_t __builtin_mpl_vector_mla_lane_i16v4(int16x4_t a, int16x4_t b, int16x4_t v, const int lane); -#define vmla_lane_s16(a, b, v, lane) __builtin_mpl_vector_mla_lane_i16v4(a, b, v, lane) +int8x16_t __builtin_mpl_vector_qnegq_v16i8(int8x16_t a); +extern inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqnegq_s8( + int8x16_t a) { + return __builtin_mpl_vector_qnegq_v16i8(a); +} -int16x8_t __builtin_mpl_vector_mlaq_lane_i16v8(int16x8_t a, int16x8_t b, int16x4_t v, const int lane); -#define vmlaq_lane_s16(a, b, v, lane) __builtin_mpl_vector_mlaq_lane_i16v8(a, b, v, lane) +int16x4_t __builtin_mpl_vector_qneg_v4i16(int16x4_t a); +extern inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqneg_s16( + int16x4_t a) { + return __builtin_mpl_vector_qneg_v4i16(a); +} -int32x2_t __builtin_mpl_vector_mla_lane_i32v2(int32x2_t a, int32x2_t b, int32x2_t v, const int lane); -#define vmla_lane_s32(a, b, v, lane) __builtin_mpl_vector_mla_lane_i32v2(a, b, v, lane) +int16x8_t __builtin_mpl_vector_qnegq_v8i16(int16x8_t a); +extern inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqnegq_s16( + int16x8_t a) { + return __builtin_mpl_vector_qnegq_v8i16(a); +} -int32x4_t __builtin_mpl_vector_mlaq_lane_i32v4(int32x4_t a, int32x4_t b, int32x2_t v, const int lane); -#define vmlaq_lane_s32(a, b, v, lane) __builtin_mpl_vector_mlaq_lane_i32v4(a, b, v, lane) +int32x2_t __builtin_mpl_vector_qneg_v2i32(int32x2_t a); +extern inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqneg_s32( + int32x2_t a) { + return __builtin_mpl_vector_qneg_v2i32(a); +} -uint16x4_t __builtin_mpl_vector_mla_lane_u16v4(uint16x4_t a, uint16x4_t b, uint16x4_t v, const int lane); -#define vmla_lane_u16(a, b, v, lane) __builtin_mpl_vector_mla_lane_u16v4(a, b, v, lane) +int32x4_t __builtin_mpl_vector_qnegq_v4i32(int32x4_t a); +extern inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqnegq_s32( + int32x4_t a) { + return __builtin_mpl_vector_qnegq_v4i32(a); +} -uint16x8_t __builtin_mpl_vector_mlaq_lane_u16v8(uint16x8_t a, uint16x8_t b, uint16x4_t v, const int lane); -#define vmlaq_lane_u16(a, b, v, lane) __builtin_mpl_vector_mlaq_lane_u16v8(a, b, v, lane) +int64x1_t __builtin_mpl_vector_qneg_v1i64(int64x1_t a); +extern inline int64x1_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqneg_s64( + int64x1_t a) { + return __builtin_mpl_vector_qneg_v1i64(a); +} -uint32x2_t __builtin_mpl_vector_mla_lane_u32v2(uint32x2_t a, uint32x2_t b, uint32x2_t v, const int lane); -#define vmla_lane_u32(a, b, v, lane) __builtin_mpl_vector_mla_lane_u32v2(a, b, v, lane) +int64x2_t __builtin_mpl_vector_qnegq_v2i64(int64x2_t a); +extern inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqnegq_s64( + int64x2_t a) { + return __builtin_mpl_vector_qnegq_v2i64(a); +} -uint32x4_t __builtin_mpl_vector_mlaq_lane_u32v4(uint32x4_t a, uint32x4_t b, uint32x2_t v, const int lane); -#define vmlaq_lane_u32(a, b, v, lane) __builtin_mpl_vector_mlaq_lane_u32v4(a, b, v, lane) +extern inline int8_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqnegb_s8(int8_t a) { + return vget_lane_s8(vqneg_s8((int8x8_t){a}), 0); +} -int16x4_t __builtin_mpl_vector_mla_laneq_i16v4(int16x4_t a, int16x4_t b, int16x8_t v, const int lane); -#define vmla_laneq_s16(a, b, v, lane) __builtin_mpl_vector_mla_laneq_i16v4(a, b, v, lane) +extern inline int16_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqnegh_s16(int16_t a) { + return vget_lane_s16(vqneg_s16((int16x4_t){a}), 0); +} -int16x8_t __builtin_mpl_vector_mlaq_laneq_i16v8(int16x8_t a, int16x8_t b, int16x8_t v, const int lane); -#define vmlaq_laneq_s16(a, b, v, lane) __builtin_mpl_vector_mlaq_laneq_i16v8(a, b, v, lane) +extern inline int32_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqnegs_s32(int32_t a) { + return vget_lane_s32(vqneg_s32((int32x2_t){a}), 0); +} -int32x2_t __builtin_mpl_vector_mla_laneq_i32v2(int32x2_t a, int32x2_t b, int32x4_t v, const int lane); -#define vmla_laneq_s32(a, b, v, lane) __builtin_mpl_vector_mla_laneq_i32v2(a, b, v, lane) +extern inline int64_t __attribute__ ((__always_inline__, __gnu_inline__, function_like_macro)) vqnegd_s64(int64_t a) { + return vget_lane_s64(vqneg_s64((int64x1_t){a}), 0); +} -int32x4_t __builtin_mpl_vector_mlaq_laneq_i32v4(int32x4_t a, int32x4_t b, int32x4_t v, const int lane); -#define vmlaq_laneq_s32(a, b, v, lane) __builtin_mpl_vector_mlaq_laneq_i32v4(a, b, v, lane) +// unsupport +#define vadd_f16(a, b) (a + b) +#define vaddq_f16(a, b) (a + b) +#define vdup_n_f16(a) __builtin_mpl_vector_from_scalar_v4f16(a) +#define vdupq_n_f16(a) __builtin_mpl_vector_from_scalar_v8f16(a) +#define vceq_f16(a, b) (a == b) +#define vceqq_f16(a, b) (a == b) +#define vcgt_f16(a, b) (a > b) +#define vcgtq_f16(a, b) (a > b) +#define vcge_f16(a, b) (a >= b) +#define vcgeq_f16(a, b) (a >= b) +#define vclt_f16(a, b) (a < b) +#define vcltq_f16(a, b) (a < b) +#define vcle_f16(a, b) (a <= b) +#define vcleq_f16(a, b) (a <= b) +#define vext_f16(a, b, n) __builtin_mpl_vector_merge_v4f16(a, b, n) +#define vextq_f16(a, b, n) __builtin_mpl_vector_merge_v8f16(a, b, n) +#define vget_high_f16(a) __builtin_mpl_vector_get_high_v4f16(a) +#define vget_lane_f16(a, n) __builtin_mpl_vector_get_element_v4f16(a, n) +#define vgetq_lane_f16(a, n) __builtin_mpl_vector_get_element_v8f16(a, n) +#define vget_low_f16(a) __builtin_mpl_vector_get_low_v4f16(a) +#define vld1_f16(a) __builtin_mpl_vector_load_v4f16(a) +#define vld1q_f16(a) __builtin_mpl_vector_load_v8f16(a) +#define vreinterpret_f16_s8(a) ((float16x4_t)a) +#define vreinterpret_f16_u8(a) ((float16x4_t)a) +#define vreinterpretq_f16_s8(a) ((float16x8_t)a) +#define vreinterpretq_f16_u8(a) ((float16x8_t)a) +#define vreinterpret_f16_s16(a) ((float16x4_t)a) +#define vreinterpret_f16_u16(a) ((float16x4_t)a) +#define vreinterpretq_f16_s16(a) ((float16x8_t)a) +#define vreinterpretq_f16_u16(a) ((float16x8_t)a) +#define vreinterpret_f16_s32(a) ((float16x4_t)a) +#define vreinterpret_f16_u32(a) ((float16x4_t)a) +#define vreinterpretq_f16_s32(a) ((float16x8_t)a) +#define vreinterpretq_f16_u32(a) ((float16x8_t)a) +#define vreinterpret_f16_s64(a) ((float16x4_t)a) +#define vreinterpret_f16_u64(a) ((float16x4_t)a) +#define vreinterpretq_f16_s64(a) ((float16x8_t)a) +#define vreinterpretq_f16_u64(a) ((float16x8_t)a) +#define vset_lane_f16(v, a, n) __builtin_mpl_vector_set_element_v4f16(v, a, n) +#define vsetq_lane_f16(v, a, n) __builtin_mpl_vector_set_element_v8f16(v, a, n) +#define vst1_f16(p, v) __builtin_mpl_vector_store_v4f16(p, v) +#define vst1q_f16(p, v) __builtin_mpl_vector_store_v8f16(p, v) +#define vsub_f16(a, b) (a - b) +#define vsubq_f16(a, b) (a - b) +#define vceqz_p8(a) (a == 0) +#define vceqzq_p8(a) (a == 0) +#define vceqz_p64(a) (a == 0) +#define vceqzq_p64(a) (a == 0) -uint16x4_t __builtin_mpl_vector_mla_laneq_u16v4(uint16x4_t a, uint16x4_t b, uint16x8_t v, const int lane); -#define vmla_laneq_u16(a, b, v, lane) __builtin_mpl_vector_mla_laneq_u16v4(a, b, v, lane) +void __builtin_mpl_vector_st2_i8v8(int8_t *ptr, int8x8x2_t val); +#define vst2_s8(ptr, val) __builtin_mpl_vector_st2_i8v8(ptr, val) -uint16x8_t __builtin_mpl_vector_mlaq_laneq_u16v8(uint16x8_t a, uint16x8_t b, uint16x8_t v, const int lane); -#define vmlaq_laneq_u16(a, b, v, lane) __builtin_mpl_vector_mlaq_laneq_u16v8(a, b, v, lane) +void __builtin_mpl_vector_st2q_i8v16(int8_t *ptr, int8x16x2_t val); +#define vst2q_s8(ptr, val) __builtin_mpl_vector_st2q_i8v16(ptr, val) -uint32x2_t __builtin_mpl_vector_mla_laneq_u32v2(uint32x2_t a, uint32x2_t b, uint32x4_t v, const int lane); -#define vmla_laneq_u32(a, b, v, lane) __builtin_mpl_vector_mla_laneq_u32v2(a, b, v, lane) +void __builtin_mpl_vector_st2_i16v4(int16_t *ptr, int16x4x2_t val); +#define vst2_s16(ptr, val) __builtin_mpl_vector_st2_i16v4(ptr, val) -uint32x4_t __builtin_mpl_vector_mlaq_laneq_u32v4(uint32x4_t a, uint32x4_t b, uint32x4_t v, const int lane); -#define vmlaq_laneq_u32(a, b, v, lane) __builtin_mpl_vector_mlaq_laneq_u32v4(a, b, v, lane) +void __builtin_mpl_vector_st2q_i16v8(int16_t *ptr, int16x8x2_t val); +#define vst2q_s16(ptr, val) __builtin_mpl_vector_st2q_i16v8(ptr, val) -int32x4_t __builtin_mpl_vector_mlal_lane_i32v4(int32x4_t a, int16x4_t b, int16x4_t v, const int lane); -#define vmlal_lane_s16(a, b, v, lane) __builtin_mpl_vector_mlal_lane_i32v4(a, b, v, lane) +void __builtin_mpl_vector_st2_i32v2(int32_t *ptr, int32x2x2_t val); +#define vst2_s32(ptr, val) __builtin_mpl_vector_st2_i32v2(ptr, val) -int64x2_t __builtin_mpl_vector_mlal_lane_i64v2(int64x2_t a, int32x2_t b, int32x2_t v, const int lane); -#define vmlal_lane_s32(a, b, v, lane) __builtin_mpl_vector_mlal_lane_i64v2(a, b, v, lane) +void __builtin_mpl_vector_st2q_i32v4(int32_t *ptr, int32x4x2_t val); +#define vst2q_s32(ptr, val) __builtin_mpl_vector_st2q_i32v4(ptr, val) -uint32x4_t __builtin_mpl_vector_mlal_lane_u32v4(uint32x4_t a, uint16x4_t b, uint16x4_t v, const int lane); -#define vmlal_lane_u16(a, b, v, lane) __builtin_mpl_vector_mlal_lane_u32v4(a, b, v, lane) +void __builtin_mpl_vector_st2_u8v8(uint8_t *ptr, uint8x8x2_t val); +#define vst2_u8(ptr, val) __builtin_mpl_vector_st2_u8v8(ptr, val) -uint64x2_t __builtin_mpl_vector_mlal_lane_u64v2(uint64x2_t a, uint32x2_t b, uint32x2_t v, const int lane); -#define vmlal_lane_u32(a, b, v, lane) __builtin_mpl_vector_mlal_lane_u64v2(a, b, v, lane) +void __builtin_mpl_vector_st2q_u8v16(uint8_t *ptr, uint8x16x2_t val); +#define vst2q_u8(ptr, val) __builtin_mpl_vector_st2q_u8v16(ptr, val) -int32x4_t __builtin_mpl_vector_mlal_high_lane_i32v4(int32x4_t a, int16x8_t b, int16x4_t v, const int lane); -#define vmlal_high_lane_s16(a, b, v, lane) __builtin_mpl_vector_mlal_high_lane_i32v4(a, b, v, lane) +void __builtin_mpl_vector_st2_u16v4(uint16_t *ptr, uint16x4x2_t val); +#define vst2_u16(ptr, val) __builtin_mpl_vector_st2_u16v4(ptr, val) -int64x2_t __builtin_mpl_vector_mlal_high_lane_i64v2(int64x2_t a, int32x4_t b, int32x2_t v, const int lane); -#define vmlal_high_lane_s32(a, b, v, lane) __builtin_mpl_vector_mlal_high_lane_i64v2(a, b, v, lane) +void __builtin_mpl_vector_st2q_u16v8(uint16_t *ptr, uint16x8x2_t val); +#define vst2q_u16(ptr, val) __builtin_mpl_vector_st2q_u16v8(ptr, val) -uint32x4_t __builtin_mpl_vector_mlal_high_lane_u32v4(uint32x4_t a, uint16x8_t b, uint16x4_t v, const int lane); -#define vmlal_high_lane_u16(a, b, v, lane) __builtin_mpl_vector_mlal_high_lane_u32v4(a, b, v, lane) +void __builtin_mpl_vector_st2_u32v2(uint32_t *ptr, uint32x2x2_t val); +#define vst2_u32(ptr, val) __builtin_mpl_vector_st2_u32v2(ptr, val) -uint64x2_t __builtin_mpl_vector_mlal_high_lane_u64v2(uint64x2_t a, uint32x4_t b, uint32x2_t v, const int lane); -#define vmlal_high_lane_u32(a, b, v, lane) __builtin_mpl_vector_mlal_high_lane_u64v2(a, b, v, lane) +void __builtin_mpl_vector_st2q_u32v4(uint32_t *ptr, uint32x4x2_t val); +#define vst2q_u32(ptr, val) __builtin_mpl_vector_st2q_u32v4(ptr, val) -int32x4_t __builtin_mpl_vector_mlal_laneq_i32v4(int32x4_t a, int16x4_t b, int16x8_t v, const int lane); -#define vmlal_laneq_s16(a, b, v, lane) __builtin_mpl_vector_mlal_laneq_i32v4(a, b, v, lane) +void __builtin_mpl_vector_st2_i64v1(int64_t *ptr, int64x1x2_t val); +#define vst2_s64(ptr, val) __builtin_mpl_vector_st2_i64v1(ptr, val) -int64x2_t __builtin_mpl_vector_mlal_laneq_i64v2(int64x2_t a, int32x2_t b, int32x4_t v, const int lane); -#define vmlal_laneq_s32(a, b, v, lane) __builtin_mpl_vector_mlal_laneq_i64v2(a, b, v, lane) +void __builtin_mpl_vector_st2_u64v1(uint64_t *ptr, uint64x1x2_t val); +#define vst2_u64(ptr, val) __builtin_mpl_vector_st2_u64v1(ptr, val) -uint32x4_t __builtin_mpl_vector_mlal_laneq_u32v4(uint32x4_t a, uint16x4_t b, uint16x8_t v, const int lane); -#define vmlal_laneq_u16(a, b, v, lane) __builtin_mpl_vector_mlal_laneq_u32v4(a, b, v, lane) +void __builtin_mpl_vector_st2q_i64v2(int64_t *ptr, int64x2x2_t val); +#define vst2q_s64(ptr, val) __builtin_mpl_vector_st2q_i64v2(ptr, val) -uint64x2_t __builtin_mpl_vector_mlal_laneq_u64v2(uint64x2_t a, uint32x2_t b, uint32x4_t v, const int lane); -#define vmlal_laneq_u32(a, b, v, lane) __builtin_mpl_vector_mlal_laneq_u64v2(a, b, v, lane) +void __builtin_mpl_vector_st2q_u64v2(uint64_t *ptr, uint64x2x2_t val); +#define vst2q_u64(ptr, val) __builtin_mpl_vector_st2q_u64v2(ptr, val) -int32x4_t __builtin_mpl_vector_mlal_high_laneq_i32v4(int32x4_t a, int16x8_t b, int16x8_t v, const int lane); -#define vmlal_high_laneq_s16(a, b, v, lane) __builtin_mpl_vector_mlal_high_laneq_i32v4(a, b, v, lane) +void __builtin_mpl_vector_st3_i8v8(int8_t *ptr, int8x8x3_t val); +#define vst3_s8(ptr, val) __builtin_mpl_vector_st3_i8v8(ptr, val) -int64x2_t __builtin_mpl_vector_mlal_high_laneq_i64v2(int64x2_t a, int32x4_t b, int32x4_t v, const int lane); -#define vmlal_high_laneq_s32(a, b, v, lane) __builtin_mpl_vector_mlal_high_laneq_i64v2(a, b, v, lane) +void __builtin_mpl_vector_st3q_i8v16(int8_t *ptr, int8x16x3_t val); +#define vst3q_s8(ptr, val) __builtin_mpl_vector_st3q_i8v16(ptr, val) -uint32x4_t __builtin_mpl_vector_mlal_high_laneq_u32v4(uint32x4_t a, uint16x8_t b, uint16x8_t v, const int lane); -#define vmlal_high_laneq_u16(a, b, v, lane) __builtin_mpl_vector_mlal_high_laneq_u32v4(a, b, v, lane) +void __builtin_mpl_vector_st3_i16v4(int16_t *ptr, int16x4x3_t val); +#define vst3_s16(ptr, val) __builtin_mpl_vector_st3_i16v4(ptr, val) -uint64x2_t __builtin_mpl_vector_mlal_high_laneq_u64v2(uint64x2_t a, uint32x4_t b, uint32x4_t v, const int lane); -#define vmlal_high_laneq_u32(a, b, v, lane) __builtin_mpl_vector_mlal_high_laneq_u64v2(a, b, v, lane) +void __builtin_mpl_vector_st3q_i16v8(int16_t *ptr, int16x8x3_t val); +#define vst3q_s16(ptr, val) __builtin_mpl_vector_st3q_i16v8(ptr, val) -int16x4_t __builtin_mpl_vector_mla_n_i16v4(int16x4_t a, int16x4_t b, int16x4_t c); -static inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__)) -vmla_n_s16(int16x4_t a, int16x4_t b, int16_t c) { - return __builtin_mpl_vector_mla_n_i16v4(a, b, (int16x4_t){c}); -} +void __builtin_mpl_vector_st3_i32v2(int32_t *ptr, int32x2x3_t val); +#define vst3_s32(ptr, val) __builtin_mpl_vector_st3_i32v2(ptr, val) -int16x8_t __builtin_mpl_vector_mlaq_n_i16v8(int16x8_t a, int16x8_t b, int16x8_t c); -static inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__)) -vmlaq_n_s16(int16x8_t a, int16x8_t b, int16_t c) { - return __builtin_mpl_vector_mlaq_n_i16v8(a, b, (int16x8_t){c}); -} +void __builtin_mpl_vector_st3q_i32v4(int32_t *ptr, int32x4x3_t val); +#define vst3q_s32(ptr, val) __builtin_mpl_vector_st3q_i32v4(ptr, val) -int32x2_t __builtin_mpl_vector_mla_n_i32v2(int32x2_t a, int32x2_t b, int32x2_t c); -static inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__)) -vmla_n_s32(int32x2_t a, int32x2_t b, int32_t c) { - return __builtin_mpl_vector_mla_n_i32v2(a, b, (int32x2_t){c}); -} +void __builtin_mpl_vector_st3_u8v8(uint8_t *ptr, uint8x8x3_t val); +#define vst3_u8(ptr, val) __builtin_mpl_vector_st3_u8v8(ptr, val) -int32x4_t __builtin_mpl_vector_mlaq_n_i32v4(int32x4_t a, int32x4_t b, int32x4_t c); -static inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__)) -vmlaq_n_s32(int32x4_t a, int32x4_t b, int32_t c) { - return __builtin_mpl_vector_mlaq_n_i32v4(a, b, (int32x4_t){c}); -} +void __builtin_mpl_vector_st3q_u8v16(uint8_t *ptr, uint8x16x3_t val); +#define vst3q_u8(ptr, val) __builtin_mpl_vector_st3q_u8v16(ptr, val) -uint16x4_t __builtin_mpl_vector_mla_n_u16v4(uint16x4_t a, uint16x4_t b, uint16x4_t c); -static inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__)) -vmla_n_u16(uint16x4_t a, uint16x4_t b, uint16_t c) { - return __builtin_mpl_vector_mla_n_u16v4(a, b, (uint16x4_t){c}); -} +void __builtin_mpl_vector_st3_u16v4(uint16_t *ptr, uint16x4x3_t val); +#define vst3_u16(ptr, val) __builtin_mpl_vector_st3_u16v4(ptr, val) -uint16x8_t __builtin_mpl_vector_mlaq_n_u16v8(uint16x8_t a, uint16x8_t b, uint16x8_t c); -static inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__)) -vmlaq_n_u16(uint16x8_t a, uint16x8_t b, uint16_t c) { - return __builtin_mpl_vector_mlaq_n_u16v8(a, b, (uint16x8_t){c}); -} +void __builtin_mpl_vector_st3q_u16v8(uint16_t *ptr, uint16x8x3_t val); +#define vst3q_u16(ptr, val) __builtin_mpl_vector_st3q_u16v8(ptr, val) -uint32x2_t __builtin_mpl_vector_mla_n_u32v2(uint32x2_t a, uint32x2_t b, uint32x2_t c); -static inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__)) -vmla_n_u32(uint32x2_t a, uint32x2_t b, uint32_t c) { - return __builtin_mpl_vector_mla_n_u32v2(a, b, (uint32x2_t){c}); -} +void __builtin_mpl_vector_st3_u32v2(uint32_t *ptr, uint32x2x3_t val); +#define vst3_u32(ptr, val) __builtin_mpl_vector_st3_u32v2(ptr, val) -uint32x4_t __builtin_mpl_vector_mlaq_n_u32v4(uint32x4_t a, uint32x4_t b, uint32x4_t c); -static inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__)) -vmlaq_n_u32(uint32x4_t a, uint32x4_t b, uint32_t c) { - return __builtin_mpl_vector_mlaq_n_u32v4(a, b, (uint32x4_t){c}); -} +void __builtin_mpl_vector_st3q_u32v4(uint32_t *ptr, uint32x4x3_t val); +#define vst3q_u32(ptr, val) __builtin_mpl_vector_st3q_u32v4(ptr, val) -int16x4_t __builtin_mpl_vector_mls_lane_i16v4(int16x4_t a, int16x4_t b, int16x4_t v, const int lane); -#define vmls_lane_s16(a, b, v, lane) __builtin_mpl_vector_mls_lane_i16v4(a, b, v, lane) +void __builtin_mpl_vector_st3_i64v1(int64_t *ptr, int64x1x3_t val); +#define vst3_s64(ptr, val) __builtin_mpl_vector_st3_i64v1(ptr, val) -int16x8_t __builtin_mpl_vector_mlsq_lane_i16v8(int16x8_t a, int16x8_t b, int16x4_t v, const int lane); -#define vmlsq_lane_s16(a, b, v, lane) __builtin_mpl_vector_mlsq_lane_i16v8(a, b, v, lane) +void __builtin_mpl_vector_st3_u64v1(uint64_t *ptr, uint64x1x3_t val); +#define vst3_u64(ptr, val) __builtin_mpl_vector_st3_u64v1(ptr, val) -int32x2_t __builtin_mpl_vector_mls_lane_i32v2(int32x2_t a, int32x2_t b, int32x2_t v, const int lane); -#define vmls_lane_s32(a, b, v, lane) __builtin_mpl_vector_mls_lane_i32v2(a, b, v, lane) +void __builtin_mpl_vector_st3q_i64v2(int64_t *ptr, int64x2x3_t val); +#define vst3q_s64(ptr, val) __builtin_mpl_vector_st3q_i64v2(ptr, val) -int32x4_t __builtin_mpl_vector_mlsq_lane_i32v4(int32x4_t a, int32x4_t b, int32x2_t v, const int lane); -#define vmlsq_lane_s32(a, b, v, lane) __builtin_mpl_vector_mlsq_lane_i32v4(a, b, v, lane) +void __builtin_mpl_vector_st3q_u64v2(uint64_t *ptr, uint64x2x3_t val); +#define vst3q_u64(ptr, val) __builtin_mpl_vector_st3q_u64v2(ptr, val) -uint16x4_t __builtin_mpl_vector_mls_lane_u16v4(uint16x4_t a, uint16x4_t b, uint16x4_t v, const int lane); -#define vmls_lane_u16(a, b, v, lane) __builtin_mpl_vector_mls_lane_u16v4(a, b, v, lane) +void __builtin_mpl_vector_st4_i8v8(int8_t *ptr, int8x8x4_t val); +#define vst4_s8(ptr, val) __builtin_mpl_vector_st4_i8v8(ptr, val) -uint16x8_t __builtin_mpl_vector_mlsq_lane_u16v8(uint16x8_t a, uint16x8_t b, uint16x4_t v, const int lane); -#define vmlsq_lane_u16(a, b, v, lane) __builtin_mpl_vector_mlsq_lane_u16v8(a, b, v, lane) +void __builtin_mpl_vector_st4q_i8v16(int8_t *ptr, int8x16x4_t val); +#define vst4q_s8(ptr, val) __builtin_mpl_vector_st4q_i8v16(ptr, val) -uint32x2_t __builtin_mpl_vector_mls_lane_u32v2(uint32x2_t a, uint32x2_t b, uint32x2_t v, const int lane); -#define vmls_lane_u32(a, b, v, lane) __builtin_mpl_vector_mls_lane_u32v2(a, b, v, lane) +void __builtin_mpl_vector_st4_i16v4(int16_t *ptr, int16x4x4_t val); +#define vst4_s16(ptr, val) __builtin_mpl_vector_st4_i16v4(ptr, val) -uint32x4_t __builtin_mpl_vector_mlsq_lane_u32v4(uint32x4_t a, uint32x4_t b, uint32x2_t v, const int lane); -#define vmlsq_lane_u32(a, b, v, lane) __builtin_mpl_vector_mlsq_lane_u32v4(a, b, v, lane) +void __builtin_mpl_vector_st4q_i16v8(int16_t *ptr, int16x8x4_t val); +#define vst4q_s16(ptr, val) __builtin_mpl_vector_st4q_i16v8(ptr, val) -int16x4_t __builtin_mpl_vector_mls_laneq_i16v4(int16x4_t a, int16x4_t b, int16x8_t v, const int lane); -#define vmls_laneq_s16(a, b, v, lane) __builtin_mpl_vector_mls_laneq_i16v4(a, b, v, lane) +void __builtin_mpl_vector_st4_i32v2(int32_t *ptr, int32x2x4_t val); +#define vst4_s32(ptr, val) __builtin_mpl_vector_st4_i32v2(ptr, val) -int16x8_t __builtin_mpl_vector_mlsq_laneq_i16v8(int16x8_t a, int16x8_t b, int16x8_t v, const int lane); -#define vmlsq_laneq_s16(a, b, v, lane) __builtin_mpl_vector_mlsq_laneq_i16v8(a, b, v, lane) +void __builtin_mpl_vector_st4q_i32v4(int32_t *ptr, int32x4x4_t val); +#define vst4q_s32(ptr, val) __builtin_mpl_vector_st4q_i32v4(ptr, val) -int32x2_t __builtin_mpl_vector_mls_laneq_i32v2(int32x2_t a, int32x2_t b, int32x4_t v, const int lane); -#define vmls_laneq_s32(a, b, v, lane) __builtin_mpl_vector_mls_laneq_i32v2(a, b, v, lane) +void __builtin_mpl_vector_st4_u8v8(uint8_t *ptr, uint8x8x4_t val); +#define vst4_u8(ptr, val) __builtin_mpl_vector_st4_u8v8(ptr, val) -int32x4_t __builtin_mpl_vector_mlsq_laneq_i32v4(int32x4_t a, int32x4_t b, int32x4_t v, const int lane); -#define vmlsq_laneq_s32(a, b, v, lane) __builtin_mpl_vector_mlsq_laneq_i32v4(a, b, v, lane) +void __builtin_mpl_vector_st4q_u8v16(uint8_t *ptr, uint8x16x4_t val); +#define vst4q_u8(ptr, val) __builtin_mpl_vector_st4q_u8v16(ptr, val) -uint16x4_t __builtin_mpl_vector_mls_laneq_u16v4(uint16x4_t a, uint16x4_t b, uint16x8_t v, const int lane); -#define vmls_laneq_u16(a, b, v, lane) __builtin_mpl_vector_mls_laneq_u16v4(a, b, v, lane) +void __builtin_mpl_vector_st4_u16v4(uint16_t *ptr, uint16x4x4_t val); +#define vst4_u16(ptr, val) __builtin_mpl_vector_st4_u16v4(ptr, val) -uint16x8_t __builtin_mpl_vector_mlsq_laneq_u16v8(uint16x8_t a, uint16x8_t b, uint16x8_t v, const int lane); -#define vmlsq_laneq_u16(a, b, v, lane) __builtin_mpl_vector_mlsq_laneq_u16v8(a, b, v, lane) +void __builtin_mpl_vector_st4q_u16v8(uint16_t *ptr, uint16x8x4_t val); +#define vst4q_u16(ptr, val) __builtin_mpl_vector_st4q_u16v8(ptr, val) -uint32x2_t __builtin_mpl_vector_mls_laneq_u32v2(uint32x2_t a, uint32x2_t b, uint32x4_t v, const int lane); -#define vmls_laneq_u32(a, b, v, lane) __builtin_mpl_vector_mls_laneq_u32v2(a, b, v, lane) +void __builtin_mpl_vector_st4_u32v2(uint32_t *ptr, uint32x2x4_t val); +#define vst4_u32(ptr, val) __builtin_mpl_vector_st4_u32v2(ptr, val) -uint32x4_t __builtin_mpl_vector_mlsq_laneq_u32v4(uint32x4_t a, uint32x4_t b, uint32x4_t v, const int lane); -#define vmlsq_laneq_u32(a, b, v, lane) __builtin_mpl_vector_mlsq_laneq_u32v4(a, b, v, lane) +void __builtin_mpl_vector_st4q_u32v4(uint32_t *ptr, uint32x4x4_t val); +#define vst4q_u32(ptr, val) __builtin_mpl_vector_st4q_u32v4(ptr, val) -int32x4_t __builtin_mpl_vector_mlsl_lane_i32v4(int32x4_t a, int16x4_t b, int16x4_t v, const int lane); -#define vmlsl_lane_s16(a, b, v, lane) __builtin_mpl_vector_mlsl_lane_i32v4(a, b, v, lane) +void __builtin_mpl_vector_st4_i64v1(int64_t *ptr, int64x1x4_t val); +#define vst4_s64(ptr, val) __builtin_mpl_vector_st4_i64v1(ptr, val) -int64x2_t __builtin_mpl_vector_mlsl_lane_i64v2(int64x2_t a, int32x2_t b, int32x2_t v, const int lane); -#define vmlsl_lane_s32(a, b, v, lane) __builtin_mpl_vector_mlsl_lane_i64v2(a, b, v, lane) +void __builtin_mpl_vector_st4_u64v1(uint64_t *ptr, uint64x1x4_t val); +#define vst4_u64(ptr, val) __builtin_mpl_vector_st4_u64v1(ptr, val) -uint32x4_t __builtin_mpl_vector_mlsl_lane_u32v4(uint32x4_t a, uint16x4_t b, uint16x4_t v, const int lane); -#define vmlsl_lane_u16(a, b, v, lane) __builtin_mpl_vector_mlsl_lane_u32v4(a, b, v, lane) +void __builtin_mpl_vector_st4q_i64v2(int64_t *ptr, int64x2x4_t val); +#define vst4q_s64(ptr, val) __builtin_mpl_vector_st4q_i64v2(ptr, val) -uint64x2_t __builtin_mpl_vector_mlsl_lane_u64v2(uint64x2_t a, uint32x2_t b, uint32x2_t v, const int lane); -#define vmlsl_lane_u32(a, b, v, lane) __builtin_mpl_vector_mlsl_lane_u64v2(a, b, v, lane) +void __builtin_mpl_vector_st4q_u64v2(uint64_t *ptr, uint64x2x4_t val); +#define vst4q_u64(ptr, val) __builtin_mpl_vector_st4q_u64v2(ptr, val) -int32x4_t __builtin_mpl_vector_mlsl_high_lane_i32v4(int32x4_t a, int16x8_t b, int16x4_t v, const int lane); -#define vmlsl_high_lane_s16(a, b, v, lane) __builtin_mpl_vector_mlsl_high_lane_i32v4(a, b, v, lane) +void __builtin_mpl_vector_st2_lane_i8v8(int8_t *ptr, int8x8x2_t val, const int lane); +#define vst2_lane_s8(ptr, val, lane) __builtin_mpl_vector_st2_lane_i8v8(ptr, val, lane) -int64x2_t __builtin_mpl_vector_mlsl_high_lane_i64v2(int64x2_t a, int32x4_t b, int32x2_t v, const int lane); -#define vmlsl_high_lane_s32(a, b, v, lane) __builtin_mpl_vector_mlsl_high_lane_i64v2(a, b, v, lane) +void __builtin_mpl_vector_st2_lane_u8v8(uint8_t *ptr, uint8x8x2_t val, const int lane); +#define vst2_lane_u8(ptr, val, lane) __builtin_mpl_vector_st2_lane_u8v8(ptr, val, lane) -uint32x4_t __builtin_mpl_vector_mlsl_high_lane_u32v4(uint32x4_t a, uint16x8_t b, uint16x4_t v, const int lane); -#define vmlsl_high_lane_u16(a, b, v, lane) __builtin_mpl_vector_mlsl_high_lane_u32v4(a, b, v, lane) +void __builtin_mpl_vector_st3_lane_i8v8(int8_t *ptr, int8x8x3_t val, const int lane); +#define vst3_lane_s8(ptr, val, lane) __builtin_mpl_vector_st3_lane_i8v8(ptr, val, lane) -uint64x2_t __builtin_mpl_vector_mlsl_high_lane_u64v2(uint64x2_t a, uint32x4_t b, uint32x2_t v, const int lane); -#define vmlsl_high_lane_u32(a, b, v, lane) __builtin_mpl_vector_mlsl_high_lane_u64v2(a, b, v, lane) +void __builtin_mpl_vector_st3_lane_u8v8(uint8_t *ptr, uint8x8x3_t val, const int lane); +#define vst3_lane_u8(ptr, val, lane) __builtin_mpl_vector_st3_lane_u8v8(ptr, val, lane) -int32x4_t __builtin_mpl_vector_mlsl_laneq_i32v4(int32x4_t a, int16x4_t b, int16x8_t v, const int lane); -#define vmlsl_laneq_s16(a, b, v, lane) __builtin_mpl_vector_mlsl_laneq_i32v4(a, b, v, lane) +void __builtin_mpl_vector_st4_lane_i8v8(int8_t *ptr, int8x8x4_t val, const int lane); +#define vst4_lane_s8(ptr, val, lane) __builtin_mpl_vector_st4_lane_i8v8(ptr, val, lane) -int64x2_t __builtin_mpl_vector_mlsl_laneq_i64v2(int64x2_t a, int32x2_t b, int32x4_t v, const int lane); -#define vmlsl_laneq_s32(a, b, v, lane) __builtin_mpl_vector_mlsl_laneq_i64v2(a, b, v, lane) +void __builtin_mpl_vector_st4_lane_u8v8(uint8_t *ptr, uint8x8x4_t val, const int lane); +#define vst4_lane_u8(ptr, val, lane) __builtin_mpl_vector_st4_lane_u8v8(ptr, val, lane) -uint32x4_t __builtin_mpl_vector_mlsl_laneq_u32v4(uint32x4_t a, uint16x4_t b, uint16x8_t v, const int lane); -#define vmlsl_laneq_u16(a, b, v, lane) __builtin_mpl_vector_mlsl_laneq_u32v4(a, b, v, lane) +void __builtin_mpl_vector_st2_lane_i16v4(int16_t *ptr, int16x4x2_t val, const int lane); +#define vst2_lane_s16(ptr, val, lane) __builtin_mpl_vector_st2_lane_i16v4(ptr, val, lane) -uint64x2_t __builtin_mpl_vector_mlsl_laneq_u64v2(uint64x2_t a, uint32x2_t b, uint32x4_t v, const int lane); -#define vmlsl_laneq_u32(a, b, v, lane) __builtin_mpl_vector_mlsl_laneq_u64v2(a, b, v, lane) +void __builtin_mpl_vector_st2q_lane_i16v8(int16_t *ptr, int16x8x2_t val, const int lane); +#define vst2q_lane_s16(ptr, val, lane) __builtin_mpl_vector_st2q_lane_i16v8(ptr, val, lane) -int32x4_t __builtin_mpl_vector_mlsl_high_laneq_i32v4(int32x4_t a, int16x8_t b, int16x8_t v, const int lane); -#define vmlsl_high_laneq_s16(a, b, v, lane) __builtin_mpl_vector_mlsl_high_laneq_i32v4(a, b, v, lane) +void __builtin_mpl_vector_st2_lane_i32v2(int32_t *ptr, int32x2x2_t val, const int lane); +#define vst2_lane_s32(ptr, val, lane) __builtin_mpl_vector_st2_lane_i32v2(ptr, val, lane) -int64x2_t __builtin_mpl_vector_mlsl_high_laneq_i64v2(int64x2_t a, int32x4_t b, int32x4_t v, const int lane); -#define vmlsl_high_laneq_s32(a, b, v, lane) __builtin_mpl_vector_mlsl_high_laneq_i64v2(a, b, v, lane) +void __builtin_mpl_vector_st2q_lane_i32v4(int32_t *ptr, int32x4x2_t val, const int lane); +#define vst2q_lane_s32(ptr, val, lane) __builtin_mpl_vector_st2q_lane_i32v4(ptr, val, lane) -uint32x4_t __builtin_mpl_vector_mlsl_high_laneq_u32v4(uint32x4_t a, uint16x8_t b, uint16x8_t v, const int lane); -#define vmlsl_high_laneq_u16(a, b, v, lane) __builtin_mpl_vector_mlsl_high_laneq_u32v4(a, b, v, lane) +void __builtin_mpl_vector_st2_lane_u16v4(uint16_t *ptr, uint16x4x2_t val, const int lane); +#define vst2_lane_u16(ptr, val, lane) __builtin_mpl_vector_st2_lane_u16v4(ptr, val, lane) -uint64x2_t __builtin_mpl_vector_mlsl_high_laneq_u64v2(uint64x2_t a, uint32x4_t b, uint32x4_t v, const int lane); -#define vmlsl_high_laneq_u32(a, b, v, lane) __builtin_mpl_vector_mlsl_high_laneq_u64v2(a, b, v, lane) +void __builtin_mpl_vector_st2q_lane_u16v8(uint16_t *ptr, uint16x8x2_t val, const int lane); +#define vst2q_lane_u16(ptr, val, lane) __builtin_mpl_vector_st2q_lane_u16v8(ptr, val, lane) -int32x4_t __builtin_mpl_vector_mlal_n_i32v4(int32x4_t a, int16x4_t b, int16x4_t c); -static inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__)) -vmlal_n_s16(int32x4_t a, int16x4_t b, int16_t c) { - return __builtin_mpl_vector_mlal_n_i32v4(a, b, (int16x4_t){c}); -} +void __builtin_mpl_vector_st2_lane_u32v2(uint32_t *ptr, uint32x2x2_t val, const int lane); +#define vst2_lane_u32(ptr, val, lane) __builtin_mpl_vector_st2_lane_u32v2(ptr, val, lane) -int64x2_t __builtin_mpl_vector_mlal_n_i64v2(int64x2_t a, int32x2_t b, int32x2_t c); -static inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__)) -vmlal_n_s32(int64x2_t a, int32x2_t b, int32_t c) { - return __builtin_mpl_vector_mlal_n_i64v2(a, b, (int32x2_t){c}); -} +void __builtin_mpl_vector_st2q_lane_u32v4(uint32_t *ptr, uint32x4x2_t val, const int lane); +#define vst2q_lane_u32(ptr, val, lane) __builtin_mpl_vector_st2q_lane_u32v4(ptr, val, lane) -uint32x4_t __builtin_mpl_vector_mlal_n_u32v4(uint32x4_t a, uint16x4_t b, uint16x4_t c); -static inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__)) -vmlal_n_u16(uint32x4_t a, uint16x4_t b, uint16_t c) { - return __builtin_mpl_vector_mlal_n_u32v4(a, b, (uint16x4_t){c}); -} +void __builtin_mpl_vector_st2q_lane_i8v16(int8_t *ptr, int8x16x2_t val, const int lane); +#define vst2q_lane_s8(ptr, val, lane) __builtin_mpl_vector_st2q_lane_i8v16(ptr, val, lane) -uint64x2_t __builtin_mpl_vector_mlal_n_u64v2(uint64x2_t a, uint32x2_t b, uint32x2_t c); -static inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__)) -vmlal_n_u32(uint64x2_t a, uint32x2_t b, uint32_t c) { - return __builtin_mpl_vector_mlal_n_u64v2(a, b, (uint32x2_t){c}); -} +void __builtin_mpl_vector_st2q_lane_u8v16(uint8_t *ptr, uint8x16x2_t val, const int lane); +#define vst2q_lane_u8(ptr, val, lane) __builtin_mpl_vector_st2q_lane_u8v16(ptr, val, lane) -int32x4_t __builtin_mpl_vector_mlal_high_n_i32v4(int32x4_t a, int16x8_t b, int16x8_t c); -static inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__)) -vmlal_high_n_s16(int32x4_t a, int16x8_t b, int16_t c) { - return __builtin_mpl_vector_mlal_high_n_i32v4(a, b, (int16x8_t){c}); -} +void __builtin_mpl_vector_st2_lane_i64v1(int64_t *ptr, int64x1x2_t val, const int lane); +#define vst2_lane_s64(ptr, val, lane) __builtin_mpl_vector_st2_lane_i64v1(ptr, val, lane) -int64x2_t __builtin_mpl_vector_mlal_high_n_i64v2(int64x2_t a, int32x4_t b, int32x4_t c); -static inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__)) -vmlal_high_n_s32(int64x2_t a, int32x4_t b, int32_t c) { - return __builtin_mpl_vector_mlal_high_n_i64v2(a, b, (int32x4_t){c}); -} +void __builtin_mpl_vector_st2q_lane_i64v2(int64_t *ptr, int64x2x2_t val, const int lane); +#define vst2q_lane_s64(ptr, val, lane) __builtin_mpl_vector_st2q_lane_i64v2(ptr, val, lane) -uint32x4_t __builtin_mpl_vector_mlal_high_n_u32v4(uint32x4_t a, uint16x8_t b, uint16x8_t c); -static inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__)) -vmlal_high_n_u16(uint32x4_t a, uint16x8_t b, uint16_t c) { - return __builtin_mpl_vector_mlal_high_n_u32v4(a, b, (uint16x8_t){c}); -} +void __builtin_mpl_vector_st2_lane_u64v1(uint64_t *ptr, uint64x1x2_t val, const int lane); +#define vst2_lane_u64(ptr, val, lane) __builtin_mpl_vector_st2_lane_u64v1(ptr, val, lane) -uint64x2_t __builtin_mpl_vector_mlal_high_n_u64v2(uint64x2_t a, uint32x4_t b, uint32x4_t c); -static inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__)) -vmlal_high_n_u32(uint64x2_t a, uint32x4_t b, uint32_t c) { - return __builtin_mpl_vector_mlal_high_n_u64v2(a, b, (uint32x4_t){c}); -} +void __builtin_mpl_vector_st2q_lane_u64v2(uint64_t *ptr, uint64x2x2_t val, const int lane); +#define vst2q_lane_u64(ptr, val, lane) __builtin_mpl_vector_st2q_lane_u64v2(ptr, val, lane) -int16x4_t __builtin_mpl_vector_mls_n_i16v4(int16x4_t a, int16x4_t b, int16x4_t c); -static inline int16x4_t __attribute__ ((__always_inline__, __gnu_inline__)) -vmls_n_s16(int16x4_t a, int16x4_t b, int16_t c) { - return __builtin_mpl_vector_mls_n_i16v4(a, b, (int16x4_t){c}); -} +void __builtin_mpl_vector_st3_lane_i16v4(int16_t *ptr, int16x4x3_t val, const int lane); +#define vst3_lane_s16(ptr, val, lane) __builtin_mpl_vector_st3_lane_i16v4(ptr, val, lane) -int16x8_t __builtin_mpl_vector_mlsq_n_i16v8(int16x8_t a, int16x8_t b, int16x8_t c); -static inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__)) -vmlsq_n_s16(int16x8_t a, int16x8_t b, int16_t c) { - return __builtin_mpl_vector_mlsq_n_i16v8(a, b, (int16x8_t){c}); -} +void __builtin_mpl_vector_st3q_lane_i16v8(int16_t *ptr, int16x8x3_t val, const int lane); +#define vst3q_lane_s16(ptr, val, lane) __builtin_mpl_vector_st3q_lane_i16v8(ptr, val, lane) -int32x2_t __builtin_mpl_vector_mls_n_i32v2(int32x2_t a, int32x2_t b, int32x2_t c); -static inline int32x2_t __attribute__ ((__always_inline__, __gnu_inline__)) -vmls_n_s32(int32x2_t a, int32x2_t b, int32_t c) { - return __builtin_mpl_vector_mls_n_i32v2(a, b, (int32x2_t){c}); -} +void __builtin_mpl_vector_st3_lane_i32v2(int32_t *ptr, int32x2x3_t val, const int lane); +#define vst3_lane_s32(ptr, val, lane) __builtin_mpl_vector_st3_lane_i32v2(ptr, val, lane) -int32x4_t __builtin_mpl_vector_mlsq_n_i32v4(int32x4_t a, int32x4_t b, int32x4_t c); -static inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__)) -vmlsq_n_s32(int32x4_t a, int32x4_t b, int32_t c) { - return __builtin_mpl_vector_mlsq_n_i32v4(a, b, (int32x4_t){c}); -} +void __builtin_mpl_vector_st3q_lane_i32v4(int32_t *ptr, int32x4x3_t val, const int lane); +#define vst3q_lane_s32(ptr, val, lane) __builtin_mpl_vector_st3q_lane_i32v4(ptr, val, lane) -uint16x4_t __builtin_mpl_vector_mls_n_u16v4(uint16x4_t a, uint16x4_t b, uint16x4_t c); -static inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__)) -vmls_n_u16(uint16x4_t a, uint16x4_t b, uint16_t c) { - return __builtin_mpl_vector_mls_n_u16v4(a, b, (uint16x4_t){c}); -} +void __builtin_mpl_vector_st3_lane_u16v4(uint16_t *ptr, uint16x4x3_t val, const int lane); +#define vst3_lane_u16(ptr, val, lane) __builtin_mpl_vector_st3_lane_u16v4(ptr, val, lane) -uint16x8_t __builtin_mpl_vector_mlsq_n_u16v8(uint16x8_t a, uint16x8_t b, uint16x8_t c); -static inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__)) -vmlsq_n_u16(uint16x8_t a, uint16x8_t b, uint16_t c) { - return __builtin_mpl_vector_mlsq_n_u16v8(a, b, (uint16x8_t){c}); -} +void __builtin_mpl_vector_st3q_lane_u16v8(uint16_t *ptr, uint16x8x3_t val, const int lane); +#define vst3q_lane_u16(ptr, val, lane) __builtin_mpl_vector_st3q_lane_u16v8(ptr, val, lane) -uint32x2_t __builtin_mpl_vector_mls_n_u32v2(uint32x2_t a, uint32x2_t b, uint32x2_t c); -static inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__)) -vmls_n_u32(uint32x2_t a, uint32x2_t b, uint32_t c) { - return __builtin_mpl_vector_mls_n_u32v2(a, b, (uint32x2_t){c}); -} +void __builtin_mpl_vector_st3_lane_u32v2(uint32_t *ptr, uint32x2x3_t val, const int lane); +#define vst3_lane_u32(ptr, val, lane) __builtin_mpl_vector_st3_lane_u32v2(ptr, val, lane) -uint32x4_t __builtin_mpl_vector_mlsq_n_u32v4(uint32x4_t a, uint32x4_t b, uint32x4_t c); -static inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__)) -vmlsq_n_u32(uint32x4_t a, uint32x4_t b, uint32_t c) { - return __builtin_mpl_vector_mlsq_n_u32v4(a, b, (uint32x4_t){c}); -} +void __builtin_mpl_vector_st3q_lane_u32v4(uint32_t *ptr, uint32x4x3_t val, const int lane); +#define vst3q_lane_u32(ptr, val, lane) __builtin_mpl_vector_st3q_lane_u32v4(ptr, val, lane) -int32x4_t __builtin_mpl_vector_mlsl_n_i32v4(int32x4_t a, int16x4_t b, int16x4_t c); -static inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__)) -vmlsl_n_s16(int32x4_t a, int16x4_t b, int16_t c) { - return __builtin_mpl_vector_mlsl_n_i32v4(a, b, (int16x4_t){c}); -} +void __builtin_mpl_vector_st3q_lane_i8v16(int8_t *ptr, int8x16x3_t val, const int lane); +#define vst3q_lane_s8(ptr, val, lane) __builtin_mpl_vector_st3q_lane_i8v16(ptr, val, lane) -int64x2_t __builtin_mpl_vector_mlsl_n_i64v2(int64x2_t a, int32x2_t b, int32x2_t c); -static inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__)) -vmlsl_n_s32(int64x2_t a, int32x2_t b, int32_t c) { - return __builtin_mpl_vector_mlsl_n_i64v2(a, b, (int32x2_t){c}); -} +void __builtin_mpl_vector_st3q_lane_u8v16(uint8_t *ptr, uint8x16x3_t val, const int lane); +#define vst3q_lane_u8(ptr, val, lane) __builtin_mpl_vector_st3q_lane_u8v16(ptr, val, lane) -uint32x4_t __builtin_mpl_vector_mlsl_n_u32v4(uint32x4_t a, uint16x4_t b, uint16x4_t c); -static inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__)) -vmlsl_n_u16(uint32x4_t a, uint16x4_t b, uint16_t c) { - return __builtin_mpl_vector_mlsl_n_u32v4(a, b, (uint16x4_t){c}); -} +void __builtin_mpl_vector_st3_lane_i64v1(int64_t *ptr, int64x1x3_t val, const int lane); +#define vst3_lane_s64(ptr, val, lane) __builtin_mpl_vector_st3_lane_i64v1(ptr, val, lane) -uint64x2_t __builtin_mpl_vector_mlsl_n_u64v2(uint64x2_t a, uint32x2_t b, uint32x2_t c); -static inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__)) -vmlsl_n_u32(uint64x2_t a, uint32x2_t b, uint32_t c) { - return __builtin_mpl_vector_mlsl_n_u64v2(a, b, (uint32x2_t){c}); -} +void __builtin_mpl_vector_st3q_lane_i64v2(int64_t *ptr, int64x2x3_t val, const int lane); +#define vst3q_lane_s64(ptr, val, lane) __builtin_mpl_vector_st3q_lane_i64v2(ptr, val, lane) -int32x4_t __builtin_mpl_vector_mlsl_high_n_i32v4(int32x4_t a, int16x8_t b, int16x8_t c); -static inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__)) -vmlsl_high_n_s16(int32x4_t a, int16x8_t b, int16_t c) { - return __builtin_mpl_vector_mlsl_high_n_i32v4(a, b, (int16x8_t){c}); -} +void __builtin_mpl_vector_st3_lane_u64v1(uint64_t *ptr, uint64x1x3_t val, const int lane); +#define vst3_lane_u64(ptr, val, lane) __builtin_mpl_vector_st3_lane_u64v1(ptr, val, lane) -int64x2_t __builtin_mpl_vector_mlsl_high_n_i64v2(int64x2_t a, int32x4_t b, int32x4_t c); -static inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__)) -vmlsl_high_n_s32(int64x2_t a, int32x4_t b, int32_t c) { - return __builtin_mpl_vector_mlsl_high_n_i64v2(a, b, (int32x4_t){c}); -} +void __builtin_mpl_vector_st3q_lane_u64v2(uint64_t *ptr, uint64x2x3_t val, const int lane); +#define vst3q_lane_u64(ptr, val, lane) __builtin_mpl_vector_st3q_lane_u64v2(ptr, val, lane) -uint32x4_t __builtin_mpl_vector_mlsl_high_n_u32v4(uint32x4_t a, uint16x8_t b, uint16x8_t c); -static inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__)) -vmlsl_high_n_u16(uint32x4_t a, uint16x8_t b, uint16_t c) { - return __builtin_mpl_vector_mlsl_high_n_u32v4(a, b, (uint16x8_t){c}); -} +void __builtin_mpl_vector_st4_lane_i16v4(int16_t *ptr, int16x4x4_t val, const int lane); +#define vst4_lane_s16(ptr, val, lane) __builtin_mpl_vector_st4_lane_i16v4(ptr, val, lane) -uint64x2_t __builtin_mpl_vector_mlsl_high_n_u64v2(uint64x2_t a, uint32x4_t b, uint32x4_t c); -static inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__)) -vmlsl_high_n_u32(uint64x2_t a, uint32x4_t b, uint32_t c) { - return __builtin_mpl_vector_mlsl_high_n_u64v2(a, b, (uint32x4_t){c}); -} +void __builtin_mpl_vector_st4q_lane_i16v8(int16_t *ptr, int16x8x4_t val, const int lane); +#define vst4q_lane_s16(ptr, val, lane) __builtin_mpl_vector_st4q_lane_i16v8(ptr, val, lane) -int8x8_t __builtin_mpl_vector_qneg_i8v8(int8x8_t a); -#define vqneg_s8(a) __builtin_mpl_vector_qneg_i8v8(a) +void __builtin_mpl_vector_st4_lane_i32v2(int32_t *ptr, int32x2x4_t val, const int lane); +#define vst4_lane_s32(ptr, val, lane) __builtin_mpl_vector_st4_lane_i32v2(ptr, val, lane) -int8x16_t __builtin_mpl_vector_qnegq_i8v16(int8x16_t a); -#define vqnegq_s8(a) __builtin_mpl_vector_qnegq_i8v16(a) +void __builtin_mpl_vector_st4q_lane_i32v4(int32_t *ptr, int32x4x4_t val, const int lane); +#define vst4q_lane_s32(ptr, val, lane) __builtin_mpl_vector_st4q_lane_i32v4(ptr, val, lane) -int16x4_t __builtin_mpl_vector_qneg_i16v4(int16x4_t a); -#define vqneg_s16(a) __builtin_mpl_vector_qneg_i16v4(a) +void __builtin_mpl_vector_st4_lane_u16v4(uint16_t *ptr, uint16x4x4_t val, const int lane); +#define vst4_lane_u16(ptr, val, lane) __builtin_mpl_vector_st4_lane_u16v4(ptr, val, lane) -int16x8_t __builtin_mpl_vector_qnegq_i16v8(int16x8_t a); -#define vqnegq_s16(a) __builtin_mpl_vector_qnegq_i16v8(a) +void __builtin_mpl_vector_st4q_lane_u16v8(uint16_t *ptr, uint16x8x4_t val, const int lane); +#define vst4q_lane_u16(ptr, val, lane) __builtin_mpl_vector_st4q_lane_u16v8(ptr, val, lane) -int32x2_t __builtin_mpl_vector_qneg_i32v2(int32x2_t a); -#define vqneg_s32(a) __builtin_mpl_vector_qneg_i32v2(a) +void __builtin_mpl_vector_st4_lane_u32v2(uint32_t *ptr, uint32x2x4_t val, const int lane); +#define vst4_lane_u32(ptr, val, lane) __builtin_mpl_vector_st4_lane_u32v2(ptr, val, lane) -int32x4_t __builtin_mpl_vector_qnegq_i32v4(int32x4_t a); -#define vqnegq_s32(a) __builtin_mpl_vector_qnegq_i32v4(a) +void __builtin_mpl_vector_st4q_lane_u32v4(uint32_t *ptr, uint32x4x4_t val, const int lane); +#define vst4q_lane_u32(ptr, val, lane) __builtin_mpl_vector_st4q_lane_u32v4(ptr, val, lane) -int64x1_t __builtin_mpl_vector_qneg_i64v1(int64x1_t a); -#define vqneg_s64(a) __builtin_mpl_vector_qneg_i64v1(a) +void __builtin_mpl_vector_st4q_lane_i8v16(int8_t *ptr, int8x16x4_t val, const int lane); +#define vst4q_lane_s8(ptr, val, lane) __builtin_mpl_vector_st4q_lane_i8v16(ptr, val, lane) -int64x2_t __builtin_mpl_vector_qnegq_i64v2(int64x2_t a); -#define vqnegq_s64(a) __builtin_mpl_vector_qnegq_i64v2(a) +void __builtin_mpl_vector_st4q_lane_u8v16(uint8_t *ptr, uint8x16x4_t val, const int lane); +#define vst4q_lane_u8(ptr, val, lane) __builtin_mpl_vector_st4q_lane_u8v16(ptr, val, lane) -static inline int8_t __attribute__ ((__always_inline__, __gnu_inline__)) vqnegb_s8(int8_t a) { - return vget_lane_s8(vqneg_s8((int8x8_t){a}), 0); -} +void __builtin_mpl_vector_st4_lane_i64v1(int64_t *ptr, int64x1x4_t val, const int lane); +#define vst4_lane_s64(ptr, val, lane) __builtin_mpl_vector_st4_lane_i64v1(ptr, val, lane) -static inline int16_t __attribute__ ((__always_inline__, __gnu_inline__)) vqnegh_s16(int16_t a) { - return vget_lane_s16(vqneg_s16((int16x4_t){a}), 0); -} +void __builtin_mpl_vector_st4q_lane_i64v2(int64_t *ptr, int64x2x4_t val, const int lane); +#define vst4q_lane_s64(ptr, val, lane) __builtin_mpl_vector_st4q_lane_i64v2(ptr, val, lane) -static inline int32_t __attribute__ ((__always_inline__, __gnu_inline__)) vqnegs_s32(int32_t a) { - return vget_lane_s32(vqneg_s32((int32x2_t){a}), 0); -} +void __builtin_mpl_vector_st4_lane_u64v1(uint64_t *ptr, uint64x1x4_t val, const int lane); +#define vst4_lane_u64(ptr, val, lane) __builtin_mpl_vector_st4_lane_u64v1(ptr, val, lane) -static inline int64_t __attribute__ ((__always_inline__, __gnu_inline__)) vqnegd_s64(int64_t a) { - return vget_lane_s64(vqneg_s64((int64x1_t){a}), 0); -} +void __builtin_mpl_vector_st4q_lane_u64v2(uint64_t *ptr, uint64x2x4_t val, const int lane); +#define vst4q_lane_u64(ptr, val, lane) __builtin_mpl_vector_st4q_lane_u64v2(ptr, val, lane) -#endif /* __ARM_NEON_H */ +#endif // __ARM_NEON_H \ No newline at end of file diff --git a/src/hir2mpl/ast_input/clang/src/ast_expr.cpp b/src/hir2mpl/ast_input/clang/src/ast_expr.cpp index 8fcc71f3b0181c790d5dd240ce0445ea89dca318..aa07e980a03e9bc097a938e37f224dda16f8f72e 100644 --- a/src/hir2mpl/ast_input/clang/src/ast_expr.cpp +++ b/src/hir2mpl/ast_input/clang/src/ast_expr.cpp @@ -12,7 +12,7 @@ * FIT FOR A PARTICULAR PURPOSE. * See the Mulan PSL v2 for more details. */ -#include "ast_expr.h" +#include #include "ast_decl.h" #include "ast_macros.h" #include "mpl_logging.h" @@ -27,8 +27,7 @@ #include "ror.h" #include "conditional_operator.h" #include "fe_macros.h" - -#include +#include "ast_expr.h" namespace maple { @@ -336,9 +335,6 @@ std::string ASTCallExpr::CvtBuiltInFuncName(std::string builtInName) const { } } -std::unordered_map ASTCallExpr::builtingFuncPtrMap = - ASTCallExpr::InitBuiltinFuncPtrMap(); - void ASTCallExpr::AddArgsExpr(const std::unique_ptr &callStmt, std::list &stmts) const { for (int32 i = (static_cast(args.size()) - 1); i >= 0; --i) { UniqueFEIRExpr expr = args[i]->Emit2FEExpr(stmts); @@ -408,6 +404,10 @@ std::unique_ptr ASTCallExpr::GenCallStmt() const { op = OP_call; } callStmt = std::make_unique(*info, op, nullptr, false); + if (preferInlinePI != PreferInlinePI::kNonePI) { + callStmt->SetHasPragma(true); + callStmt->SetPragmaPIStatus(preferInlinePI); + } } return callStmt; } @@ -1137,8 +1137,8 @@ UniqueFEIRExpr ASTCompoundLiteralExpr::Emit2FEExprImpl(std::list MIRConst *ASTCompoundLiteralExpr::GenerateMIRPtrConst() const { CHECK_NULL_FATAL(compoundLiteralType); std::string tmpName = FEUtils::GetSequentialName("cle."); - if (FEOptions::GetInstance().GetFuncInlineSize() != 0) { - tmpName = tmpName + FEUtils::GetFileNameHashStr(FEManager::GetModule().GetFileName()); + if (FEOptions::GetInstance().NeedMangling()) { + tmpName = tmpName + FEUtils::GetFileNameHashStr(FEManager::GetModule().GetFileNameExceptRootPath()); } // If a var is pointer type, agg value cannot be directly assigned to it // Create a temporary symbol for addrof agg value @@ -1392,12 +1392,21 @@ void ASTInitListExpr::ProcessDesignatedInitUpdater( auto designatedInitUpdateExpr = static_cast(expr); const ASTExpr *baseExpr = designatedInitUpdateExpr->GetBaseExpr(); ASTExpr *updaterExpr = designatedInitUpdateExpr->GetUpdaterExpr(); + int64_t constArraySize = designatedInitUpdateExpr->GetConstArraySize(); auto feExpr = baseExpr->Emit2FEExpr(stmts); size_t stringLength = static_cast(baseExpr)->GetLength(); CHECK_FATAL(stringLength <= INT_MAX, "Too large length range"); if (std::holds_alternative(base)) { std::unique_ptr> argExprList = std::make_unique>(); argExprList->emplace_back(addrOfCharArray->Clone()); + (void)argExprList->emplace_back(FEIRBuilder::CreateExprConstI32(0)); + (void)argExprList->emplace_back(FEIRBuilder::CreateExprConstI32(static_cast(constArraySize))); + std::unique_ptr memsetStmt = std::make_unique( + INTRN_C_memset, nullptr, nullptr, std::move(argExprList)); + (void)stmts.emplace_back(std::move(memsetStmt)); + + argExprList = std::make_unique>(); + argExprList->emplace_back(addrOfCharArray->Clone()); argExprList->emplace_back(feExpr->Clone()); argExprList->emplace_back(FEIRBuilder::CreateExprConstI32(static_cast(stringLength))); std::unique_ptr memcpyStmt = std::make_unique( @@ -2506,7 +2515,9 @@ UniqueFEIRExpr ASTBinaryOperatorExpr::Emit2FEExprLogicOperate(std::listSetAttrs(genAttrs); // check short circuit boundary if (trueLabelIdx == 0) { trueLabelIdx = FEUtils::GetSequentialNumber(); @@ -3305,6 +3316,17 @@ UniqueFEIRExpr ASTAtomicExpr::Emit2FEExprImpl(std::list &stmts) UniqueFEIRExpr ASTExprStmtExpr::Emit2FEExprImpl(std::list &stmts) const { CHECK_FATAL(cpdStmt->GetASTStmtOp() == kASTStmtCompound, "Invalid in ASTExprStmtExpr"); const auto *lastCpdStmt = static_cast(cpdStmt); + // Top mirscope should be pushed to stack first + bool hasEmitted2MIRScope = false; + FEFunction &feFunction = FEManager::GetCurrentFEFunction(); + const ASTCompoundStmt* topLastCpdStmt = nullptr; + if (!lastCpdStmt->GetHasEmitted2MIRScope()) { + feFunction.PushStmtScope(FEUtils::CvtLoc2SrcPosition(lastCpdStmt->GetSrcLoc()), + FEUtils::CvtLoc2SrcPosition(lastCpdStmt->GetEndLoc())); + lastCpdStmt->SetHasEmitted2MIRScope(true); + topLastCpdStmt = lastCpdStmt; + hasEmitted2MIRScope = true; + } while (lastCpdStmt->GetASTStmtList().back()->GetASTStmtOp() == kASTStmtStmtExpr) { auto bodyStmt = static_cast(lastCpdStmt->GetASTStmtList().back())->GetBodyStmt(); lastCpdStmt = static_cast(bodyStmt); @@ -3319,6 +3341,13 @@ UniqueFEIRExpr ASTExprStmtExpr::Emit2FEExprImpl(std::list &stmts for (auto &stmt : stmts0) { stmts.emplace_back(std::move(stmt)); } + // Pop the mirscope emitted before + if (hasEmitted2MIRScope) { + UniqueFEIRScope scope = feFunction.PopTopScope(); + if (scope) { + scope->ProcessVLAStack(stmts, IsCallAlloca(), topLastCpdStmt->GetEndLoc()); + } + } return feirExpr; } } diff --git a/src/hir2mpl/ast_input/clang/src/ast_parser.cpp b/src/hir2mpl/ast_input/clang/src/ast_parser.cpp index 816e20de17c193f2c8cff6ac95215fd4ed2ab3a5..ca74fb1fdc1140ece6fcc1eed7baa527cb0103fa 100644 --- a/src/hir2mpl/ast_input/clang/src/ast_parser.cpp +++ b/src/hir2mpl/ast_input/clang/src/ast_parser.cpp @@ -13,6 +13,7 @@ * See the Mulan PSL v2 for more details. */ #include "ast_parser.h" +#include #include "driver_options.h" #include "mpl_logging.h" #include "mir_module.h" @@ -859,9 +860,9 @@ ASTValue *ASTParser::TranslateConstantValue2ASTValue(MapleAllocator &allocator, astValue->pty = PTY_i128; static bool i128Warning = true; if (i128Warning) { - WARN(kLncWarn, "%s:%d PTY_i128 is not fully supported", - FEManager::GetModule().GetFileNameFromFileNum(astFile->GetExprLOC(*expr).fileIdx).c_str(), - astFile->GetExprLOC(*expr).line); + FE_INFO_LEVEL(FEOptions::kDumpLevelUnsupported, "%s:%d PTY_i128 is not fully supported", + FEManager::GetModule().GetFileNameFromFileNum(astFile->GetExprLOC(*expr).fileIdx).c_str(), + astFile->GetExprLOC(*expr).line); i128Warning = false; } break; @@ -891,9 +892,9 @@ ASTValue *ASTParser::TranslateConstantValue2ASTValue(MapleAllocator &allocator, astValue->pty = PTY_u128; static bool u128Warning = true; if (u128Warning) { - WARN(kLncWarn, "%s:%d PTY_u128 is not fully supported", - FEManager::GetModule().GetFileNameFromFileNum(astFile->GetExprLOC(*expr).fileIdx).c_str(), - astFile->GetExprLOC(*expr).line); + FE_INFO_LEVEL(FEOptions::kDumpLevelUnsupported, "%s:%d PTY_u128 is not fully supported", + FEManager::GetModule().GetFileNameFromFileNum(astFile->GetExprLOC(*expr).fileIdx).c_str(), + astFile->GetExprLOC(*expr).line); u128Warning = false; } break; @@ -925,9 +926,9 @@ ASTValue *ASTParser::TranslateConstantValue2ASTValue(MapleAllocator &allocator, static bool f128Warning = true; if (f128Warning && (ty->isFloat128Type() || (ty->isRealFloatingType() && astFile->GetAstContext()->getTypeSize(ty) == 128))) { - WARN(kLncWarn, "%s:%d PTY_f128 is not fully supported", - FEManager::GetModule().GetFileNameFromFileNum(astFile->GetExprLOC(*expr).fileIdx).c_str(), - astFile->GetExprLOC(*expr).line); + FE_INFO_LEVEL(FEOptions::kDumpLevelUnsupported, "%s:%d PTY_f128 is not fully supported", + FEManager::GetModule().GetFileNameFromFileNum(astFile->GetExprLOC(*expr).fileIdx).c_str(), + astFile->GetExprLOC(*expr).line); f128Warning = false; } bool losesInfo; @@ -1055,13 +1056,78 @@ ASTValue *ASTParser::TranslateExprEval(MapleAllocator &allocator, const clang::E return astExpr; \ } +bool ASTParser::HasCallConstantP(const clang::Stmt &expr) { + if (constantPMap.find(expr.getID(*astFile->GetNonConstAstContext())) != constantPMap.cend()) { + return true; + } + if (expr.getStmtClass() == clang::Stmt::CallExprClass) { + auto *callExpr = llvm::cast(&expr); + if (GetFuncNameFromFuncDecl(*callExpr->getDirectCallee()) == "__builtin_constant_p") { + (void)constantPMap.emplace(expr.getID(*astFile->GetNonConstAstContext()), &expr); + return true; + } + } + for (const clang::Stmt *subStmt : expr.children()) { + if (subStmt == nullptr) { + continue; + } + if (HasCallConstantP(*subStmt)) { + (void)constantPMap.emplace(expr.getID(*astFile->GetNonConstAstContext()), &expr); + return true; + } + } + return false; +} + +ASTExpr *ASTParser::ProcessBuiltinConstantP(const clang::Expr &expr, ASTIntegerLiteral *intExpr, + const llvm::APSInt intVal) const { + if (expr.getStmtClass() == clang::Stmt::CallExprClass) { + auto *callExpr = llvm::cast(&expr); + // if callexpr __builtin_constant_p Evaluate result is 1 or arg has side effects, fold this expr as IntegerLiteral + if (GetFuncNameFromFuncDecl(*callExpr->getDirectCallee()) == "__builtin_constant_p" && + (intVal == 1 || callExpr->getArg(0)->HasSideEffects(*astFile->GetNonConstAstContext()))) { + return intExpr; + } + } + return nullptr; +} + +ASTExpr *ASTParser::ProcessFloatInEvaluateExpr(MapleAllocator &allocator, const clang::APValue constVal) const { + ASTFloatingLiteral *floatExpr = allocator.New(allocator); + llvm::APFloat floatVal = constVal.getFloat(); + const llvm::fltSemantics &fltSem = floatVal.getSemantics(); + double val = 0; + if (&fltSem == &llvm::APFloat::IEEEsingle()) { + val = static_cast(floatVal.convertToFloat()); + floatExpr->SetKind(FloatKind::F32); + floatExpr->SetVal(val); + } else if (&fltSem == &llvm::APFloat::IEEEdouble()) { + val = static_cast(floatVal.convertToDouble()); + floatExpr->SetKind(FloatKind::F64); + floatExpr->SetVal(val); + } else if (&fltSem == &llvm::APFloat::IEEEquad() || &fltSem == &llvm::APFloat::x87DoubleExtended()) { + bool losesInfo; + (void)floatVal.convert(llvm::APFloat::IEEEquad(), llvm::APFloatBase::rmNearestTiesToAway, &losesInfo); + llvm::APInt intValue = floatVal.bitcastToAPInt(); + floatExpr->SetKind(FloatKind::F128); + floatExpr->SetVal(intValue.getRawData()); + } else { + return nullptr; + } + if (floatVal.isPosZero()) { + floatExpr->SetEvaluatedFlag(kEvaluatedAsZero); + } else { + floatExpr->SetEvaluatedFlag(kEvaluatedAsNonZero); + } + return floatExpr; +} + ASTExpr *ASTParser::EvaluateExprAsConst(MapleAllocator &allocator, const clang::Expr *expr) { ASSERT_NOT_NULL(expr); clang::Expr::EvalResult constResult; if (!expr->EvaluateAsConstantExpr(constResult, *astFile->GetNonConstAstContext())) { return nullptr; } - // Supplement SideEffects for EvaluateAsConstantExpr, // If the expression contains a LabelStmt, the expression is unfoldable // e.g. int x = 0 && ({ a : 1; }); goto a; @@ -1074,6 +1140,10 @@ ASTExpr *ASTParser::EvaluateExprAsConst(MapleAllocator &allocator, const clang:: ASTIntegerLiteral *intExpr = allocator.New(allocator); llvm::APSInt intVal = constVal.getInt(); intExpr->SetVal(IntVal(intVal.getRawData(), intVal.getBitWidth(), intVal.isSigned())); + bool hasCallConstantP = HasCallConstantP(*expr); + if (hasCallConstantP) { + return ProcessBuiltinConstantP(*expr, intExpr, intVal); + } if (intVal == 0) { intExpr->SetEvaluatedFlag(kEvaluatedAsZero); } else { @@ -1095,34 +1165,11 @@ ASTExpr *ASTParser::EvaluateExprAsConst(MapleAllocator &allocator, const clang:: } return intExpr; } else if (constVal.isFloat()) { - ASTFloatingLiteral *floatExpr = allocator.New(allocator); - llvm::APFloat floatVal = constVal.getFloat(); - const llvm::fltSemantics &fltSem = floatVal.getSemantics(); - double val = 0; - if (&fltSem == &llvm::APFloat::IEEEsingle()) { - val = static_cast(floatVal.convertToFloat()); - floatExpr->SetKind(FloatKind::F32); - floatExpr->SetVal(val); - } else if (&fltSem == &llvm::APFloat::IEEEdouble()) { - val = static_cast(floatVal.convertToDouble()); - floatExpr->SetKind(FloatKind::F64); - floatExpr->SetVal(val); - } else if (&fltSem == &llvm::APFloat::IEEEquad() || &fltSem == &llvm::APFloat::x87DoubleExtended()) { - bool losesInfo; - (void)floatVal.convert(llvm::APFloat::IEEEquad(), - llvm::APFloatBase::rmNearestTiesToAway, &losesInfo); - llvm::APInt intValue = floatVal.bitcastToAPInt(); - floatExpr->SetKind(FloatKind::F128); - floatExpr->SetVal(intValue.getRawData()); - } else { + bool hasCallConstantP = HasCallConstantP(*expr); + if (hasCallConstantP) { return nullptr; } - if (floatVal.isPosZero()) { - floatExpr->SetEvaluatedFlag(kEvaluatedAsZero); - } else { - floatExpr->SetEvaluatedFlag(kEvaluatedAsNonZero); - } - return floatExpr; + return ProcessFloatInEvaluateExpr(allocator, constVal); } return nullptr; } @@ -2006,7 +2053,9 @@ ASTExpr *ASTParser::ProcessExprMemberExpr(MapleAllocator &allocator, const clang memberName = astFile->GetOrCreateMappedUnnamedName(*expr.getMemberDecl()); } auto *fieldDecl = llvm::dyn_cast(expr.getMemberDecl()); - SetFieldLenNameInMemberExpr(allocator, *astMemberExpr, *fieldDecl); + if (fieldDecl != nullptr) { + SetFieldLenNameInMemberExpr(allocator, *astMemberExpr, *fieldDecl); + } astMemberExpr->SetMemberName(memberName); astMemberExpr->SetMemberType(astFile->CvtType(allocator, expr.getMemberDecl()->getType())); @@ -2032,6 +2081,12 @@ ASTExpr *ASTParser::ProcessExprDesignatedInitUpdateExpr(MapleAllocator &allocato if (updaterExpr == nullptr) { return nullptr; } + auto qualType = initListExpr->getType(); + if (qualType->isConstantArrayType()) { + const auto *constArrayType = llvm::dyn_cast(qualType); + ASSERT(constArrayType != nullptr, "initListExpr constArrayType is null pointer!"); + astDesignatedInitUpdateExpr->SetConstArraySize(constArrayType->getSize().getSExtValue()); + } astDesignatedInitUpdateExpr->SetUpdaterExpr(updaterExpr); return astDesignatedInitUpdateExpr; } @@ -2228,6 +2283,18 @@ ASTExpr *ASTParser::ProcessExprCallExpr(MapleAllocator &allocator, const clang:: } else { astCallExpr->SetIcall(true); } + switch (expr.getPreferInlineScopeSpecifier()) { + case clang::PI_None: + astCallExpr->SetPreferInlinePI(PreferInlinePI::kNonePI); + break; + case clang::PI_PreferInline: + astCallExpr->SetPreferInlinePI(PreferInlinePI::kPreferInlinePI); + break; + case clang::PI_PreferNoInline: + astCallExpr->SetPreferInlinePI(PreferInlinePI::kPreferNoInlinePI); + break; + default: break; + } return astCallExpr; } @@ -2913,12 +2980,56 @@ ASTDecl *ASTParser::ProcessDeclStaticAssertDecl(MapleAllocator &allocator, const return nullptr; } +bool ASTParser::HandleFieldToRecordType(MapleAllocator &allocator, ASTStruct &curASTStruct, + const clang::DeclContext &declContext) { + for (auto *loadDecl : declContext.decls()) { + if (loadDecl == nullptr) { + return false; + } + auto *fieldDecl = llvm::dyn_cast(loadDecl); + if (llvm::isa(loadDecl)) { + clang::RecordDecl *subRecordDecl = llvm::cast(loadDecl->getCanonicalDecl()); + ASTStruct *sub = static_cast(ProcessDecl(allocator, *subRecordDecl)); + if (sub == nullptr) { + return false; + } + } + if (llvm::isa(loadDecl)) { + ASTField *af = static_cast(ProcessDecl(allocator, *fieldDecl)); + if (af == nullptr) { + return false; + } + curASTStruct.SetField(af); + } + } + return true; +} + ASTDecl *ASTParser::ProcessDeclRecordDecl(MapleAllocator &allocator, const clang::RecordDecl &decl) { ASTStruct *curStructOrUnion = static_cast(ASTDeclsBuilder::GetInstance(allocator).GetASTDecl(decl.getID())); if (curStructOrUnion != nullptr) { return curStructOrUnion; } + MapleGenericAttrs attrs(allocator); + astFile->CollectRecordAttrs(decl, attrs); + TypeAttrs typeAttrs = attrs.ConvertToTypeAttrs(); + astFile->CollectTypeAttrs(decl, typeAttrs); + if (decl.getTypedefNameForAnonDecl() != nullptr && !FEOptions::GetInstance().IsDbgFriendly()) { + if (decl.getTypedefNameForAnonDecl()->getUnderlyingDecl() != nullptr) { + const clang::TypedefDecl *typedefDecl = + llvm::cast(decl.getTypedefNameForAnonDecl()->getUnderlyingDecl()); + auto *astTypedefDecl = ProcessDeclTypedefDecl(allocator, *typedefDecl); + if (typeAttrs.GetAttr(ATTR_aligned) && astTypedefDecl != nullptr) { + uint32_t alignedNum = 0; + for (const auto *alignedAttr : decl.specific_attrs()) { + alignedNum = alignedAttr->getAlignment(*(astFile->GetNonConstAstContext())); + } + astTypedefDecl->SetAlign(alignedNum / 8); // 8: bits to byte + } + return astTypedefDecl; + } + } std::stringstream recName; clang::QualType qType = decl.getTypeForDecl()->getCanonicalTypeInternal(); astFile->EmitTypeName(*qType->getAs(), recName); @@ -2926,10 +3037,6 @@ ASTDecl *ASTParser::ProcessDeclRecordDecl(MapleAllocator &allocator, const clang if (recType == nullptr) { return nullptr; } - MapleGenericAttrs attrs(allocator); - astFile->CollectRecordAttrs(decl, attrs); - TypeAttrs typeAttrs = attrs.ConvertToTypeAttrs(); - astFile->CollectTypeAttrs(decl, typeAttrs); std::string structName = recName.str(); curStructOrUnion = ASTDeclsBuilder::GetInstance(allocator).ASTStructBuilder(allocator, fileName, structName, MapleVector({recType}, allocator.Adapter()), attrs, decl.getID()); @@ -2947,26 +3054,8 @@ ASTDecl *ASTParser::ProcessDeclRecordDecl(MapleAllocator &allocator, const clang if (declContext == nullptr) { return nullptr; } - for (auto *loadDecl : declContext->decls()) { - if (loadDecl == nullptr) { - return nullptr; - } - auto *fieldDecl = llvm::dyn_cast(loadDecl); - if (llvm::isa(loadDecl)) { - clang::RecordDecl *subRecordDecl = llvm::cast(loadDecl->getCanonicalDecl()); - ASTStruct *sub = static_cast(ProcessDecl(allocator, *subRecordDecl)); - if (sub == nullptr) { - return nullptr; - } - } - - if (llvm::isa(loadDecl)) { - ASTField *af = static_cast(ProcessDecl(allocator, *fieldDecl)); - if (af == nullptr) { - return nullptr; - } - curStructOrUnion->SetField(af); - } + if (!HandleFieldToRecordType(allocator, *curStructOrUnion, *declContext)) { + return nullptr; } if (!decl.isDefinedOutsideFunctionOrMethod()) { // Record function scope type decl in global with unique suffix identified @@ -3012,8 +3101,9 @@ MapleGenericAttrs ASTParser::SolveFunctionAttributes(MapleAllocator &allocator, astFile->CollectFuncAttrs(funcDecl, attrs, kPublic); // for inline optimize if ((attrs.GetAttr(GENATTR_static) || ASTUtil::IsFuncMustBeDeleted(attrs)) && - FEOptions::GetInstance().GetFuncInlineSize() != 0) { - if (FEOptions::GetInstance().GetWPAA() && FEOptions::GetInstance().IsEnableFuncMerge()) { + FEOptions::GetInstance().NeedMangling()) { + if (FEOptions::GetInstance().GetWPAA() && FEOptions::GetInstance().IsEnableFuncMerge() && + !FEOptions::GetInstance().IsExportInlineMplt()) { astFile->BuildStaticFunctionLayout(funcDecl, funcName); } else { funcName = funcName + astFile->GetAstFileNameHashStr(); @@ -3030,6 +3120,7 @@ MapleGenericAttrs ASTParser::SolveFunctionAttributes(MapleAllocator &allocator, ASTStmt *ASTParser::SolveFunctionBody(MapleAllocator &allocator, const clang::FunctionDecl &funcDecl, ASTFunc &astFunc, const std::list &stmts) { + constantPMap.clear(); ASTStmt *astCompoundStmt = ProcessStmt(allocator, *llvm::cast(funcDecl.getBody())); if (astCompoundStmt != nullptr) { astFunc.SetCompoundStmt(astCompoundStmt); @@ -3061,7 +3152,7 @@ ASTFunc *ASTParser::BuildAstFunc(MapleAllocator &allocator, const clang::Functio MapleVector paramDecls = SolveFuncParameterDecls(allocator, funcDecl, typeDescIn, implicitStmts, needBody); MapleGenericAttrs attrs = SolveFunctionAttributes(allocator, funcDecl, funcName); - bool isInlineDefinition = ASTUtil::IsFuncMustBeDeleted(attrs) && FEOptions::GetInstance().GetFuncInlineSize() != 0; + bool isInlineDefinition = ASTUtil::IsFuncMustBeDeleted(attrs) && FEOptions::GetInstance().NeedMangling(); std::string originFuncName = GetFuncNameFromFuncDecl(funcDecl); if (needDefDeMangledVer && isInlineDefinition) { astFunc = ASTDeclsBuilder::GetInstance(allocator).ASTFuncBuilder(allocator, fileName, originFuncName, @@ -3184,6 +3275,16 @@ ASTDecl *ASTParser::ProcessDeclFieldDecl(MapleAllocator &allocator, const clang: if (isAligned) { fieldDecl->SetAlign(decl.getMaxAlignment() / 8); // 8: bits to byte } + if (!FEOptions::GetInstance().IsDbgFriendly() && llvm::isa(qualType) && + qualType.getCanonicalType()->isBuiltinType()) { + const clang::TypedefType *typedefQualType = llvm::dyn_cast(qualType); + const auto typedefDecl = typedefQualType->getDecl(); + TypeAttrs typeAttrs; + astFile->CollectTypeAttrs(*typedefDecl, typeAttrs); + if (typeAttrs.GetAttr(ATTR_aligned)) { + fieldDecl->SetTypeAlign(typedefDecl->getMaxAlignment() / 8); // 8: bits to byte + } + } const auto *valueDecl = llvm::dyn_cast(&decl); if (valueDecl != nullptr) { ProcessNonnullFuncPtrAttrs(allocator, *valueDecl, *fieldDecl); @@ -3219,8 +3320,9 @@ void ASTParser::SetInitExprForASTVar(MapleAllocator &allocator, const clang::Var } void ASTParser::SetAlignmentForASTVar(const clang::VarDecl &varDecl, ASTVar &astVar) const { + clang::QualType varType = varDecl.getType(); int64 naturalAlignment = astFile->GetContext()->toCharUnitsFromBits( - astFile->GetContext()->getTypeUnadjustedAlign(varDecl.getType())).getQuantity(); + astFile->GetContext()->getTypeUnadjustedAlign(varType)).getQuantity(); // Get alignment from the decl uint32 alignmentBits = varDecl.getMaxAlignment(); if (alignmentBits != 0) { @@ -3230,11 +3332,14 @@ void ASTParser::SetAlignmentForASTVar(const clang::VarDecl &varDecl, ASTVar &ast } } // Get alignment from the type - alignmentBits = astFile->GetContext()->getTypeAlignIfKnown(varDecl.getType()); + alignmentBits = astFile->GetContext()->getTypeAlignIfKnown(varType); if (alignmentBits != 0) { uint32 alignment = alignmentBits / 8; - if (alignment > astVar.GetAlign() && alignment > naturalAlignment) { - astVar.SetAlign(alignment); + if (varType->isArrayType()) { + auto elementType = llvm::cast(varType)->getElementType(); + if (alignment > astVar.GetAlign() && elementType->isBuiltinType()) { + astVar.SetTypeAlign(alignment); + } } } } @@ -3264,10 +3369,24 @@ ASTDecl *ASTParser::ProcessDeclVarDecl(MapleAllocator &allocator, const clang::V if (varType == nullptr) { return nullptr; } + if (qualType->isArrayType()) { + const clang::Type *ptrType = qualType.getTypePtrOrNull(); + const clang::ArrayType *arrType = ptrType->getAsArrayTypeUnsafe(); + if (llvm::isa(arrType->getElementType())) { + const auto *defType = llvm::dyn_cast(arrType->getElementType()); + auto defDecl = defType->getDecl(); + uint32_t alignedNum = defDecl->getMaxAlignment() / 8; // bits to byte. + auto basicQualType = qualType.getCanonicalType().getTypePtrOrNull()->getAsArrayTypeUnsafe()->getElementType(); + if (alignedNum > GetSizeFromQualType(basicQualType)) { + FE_ERR(kLncErr, astFile->GetLOC(decl.getLocation()), + "alignment of array elements is greater than element size."); + } + } + } MapleGenericAttrs attrs(allocator); astFile->CollectVarAttrs(decl, attrs, kNone); // for inline optimize - if (attrs.GetAttr(GENATTR_static) && FEOptions::GetInstance().GetFuncInlineSize() != 0) { + if (attrs.GetAttr(GENATTR_static) && FEOptions::GetInstance().NeedMangling()) { varName = varName + astFile->GetAstFileNameHashStr(); } if (varType->IsMIRIncompleteStructType() && !attrs.GetAttr(GENATTR_extern)) { @@ -3310,7 +3429,7 @@ ASTDecl *ASTParser::ProcessDeclVarDecl(MapleAllocator &allocator, const clang::V if (astExpr != nullptr) { astVar->SetVariableArrayExpr(astExpr); } - if (!decl.getType()->isIncompleteType()) { + if (!decl.getType()->isIncompleteType() && attrs.GetAttr(GENATTR_aligned)) { SetAlignmentForASTVar(decl, *astVar); } const auto *valueDecl = llvm::dyn_cast(&decl); @@ -3336,6 +3455,8 @@ ASTDecl *ASTParser::ProcessDeclParmVarDecl(MapleAllocator &allocator, const clan parmName = FEUtils::GetSequentialName("arg|"); } } + parmName = std::regex_match(parmName, FEUtils::kShortCircutPrefix) ? + FEUtils::GetSequentialName(parmName + "_") : parmName; MIRType *paramType = astFile->CvtType(allocator, parmQualType); if (paramType == nullptr) { return nullptr; @@ -3373,8 +3494,8 @@ ASTDecl *ASTParser::ProcessDeclParmVarDecl(MapleAllocator &allocator, const clan } ASTDecl *ASTParser::ProcessDeclFileScopeAsmDecl(MapleAllocator &allocator, const clang::FileScopeAsmDecl &decl) { - ASTFileScopeAsm *astAsmDecl = allocator.GetMemPool()->New(allocator, fileName); - astAsmDecl->SetAsmStr(decl.getAsmString()->getString().str()); + MapleString nameStr(decl.getAsmString()->getString().str(), allocator.GetMemPool()); + ASTFileScopeAsm *astAsmDecl = allocator.GetMemPool()->New(allocator, fileName, nameStr); return astAsmDecl; } @@ -3432,20 +3553,23 @@ ASTDecl *ASTParser::ProcessDeclEnumConstantDecl(MapleAllocator &allocator, const } ASTDecl *ASTParser::ProcessDeclTypedefDecl(MapleAllocator &allocator, const clang::TypedefDecl &decl) { + ASTTypedefDecl *astTypedef = + static_cast(ASTDeclsBuilder::GetInstance(allocator).GetASTDecl(decl.getID())); + if (astTypedef != nullptr) { + return astTypedef; + } + std::string typedefName = astFile->GetDeclName(decl); + MapleGenericAttrs attrs(allocator); + astFile->CollectAttrs(decl, attrs, kNone); + clang::QualType underlyTy = decl.getUnderlyingType(); + MIRType *defType = astFile->CvtTypedefDecl(allocator, *(decl.getCanonicalDecl())); + if (defType == nullptr) { + defType = astFile->CvtType(allocator, underlyTy, true); + } + CHECK_NULL_FATAL(defType); if (FEOptions::GetInstance().IsDbgFriendly()) { - ASTTypedefDecl *astTypedef = - static_cast(ASTDeclsBuilder::GetInstance(allocator).GetASTDecl(decl.getID())); - if (astTypedef != nullptr) { - return astTypedef; - } - std::string typedefName = astFile->GetDeclName(decl); - MapleGenericAttrs attrs(allocator); - astFile->CollectAttrs(decl, attrs, kNone); - clang::QualType underlyTy = decl.getUnderlyingType(); - MIRType *type = astFile->CvtType(allocator, underlyTy, true); - CHECK_NULL_FATAL(type); astTypedef = ASTDeclsBuilder::GetInstance(allocator).ASTTypedefBuilder( - allocator, fileName, typedefName, MapleVector({type}, allocator.Adapter()), attrs, decl.getID()); + allocator, fileName, typedefName, MapleVector({defType}, allocator.Adapter()), attrs, decl.getID()); const clang::TypedefType *underlyingTypedefType = llvm::dyn_cast(underlyTy); if (underlyingTypedefType != nullptr) { auto *subTypedeDecl = static_cast(ProcessDecl(allocator, *underlyingTypedefType->getDecl())); @@ -3455,6 +3579,67 @@ ASTDecl *ASTParser::ProcessDeclTypedefDecl(MapleAllocator &allocator, const clan astTypedef->SetGlobal(true); } return astTypedef; + } else if (underlyTy->isRecordType()) { + ASTStruct *astTypedefStructOrUnion = + static_cast(ASTDeclsBuilder::GetInstance(allocator).GetASTDecl(decl.getID())); + if (astTypedefStructOrUnion != nullptr) { + return astTypedefStructOrUnion; + } + const clang::RecordType *baseType = llvm::cast(underlyTy.getCanonicalType()); + astFile->CollectRecordAttrs(*(baseType->getDecl()), attrs); + TypeAttrs typeAttrs = attrs.ConvertToTypeAttrs(); + astFile->CollectTypeAttrs(decl, typeAttrs); + std::stringstream recName; + astFile->EmitTypeName(*underlyTy->getAs(), recName); + if (FEOptions::GetInstance().GetWPAA()) { + typedefName = recName.str(); + } + astTypedefStructOrUnion = ASTDeclsBuilder::GetInstance(allocator).ASTStructBuilder( + allocator, fileName, typedefName, MapleVector({defType}, allocator.Adapter()), + attrs, decl.getID()); + if (baseType->isUnionType()) { + astTypedefStructOrUnion->SetIsUnion(); + } + astTypedefStructOrUnion->SetAttr(GENATTR_typedef); + astTypedefStructOrUnion->SetAttr(GENATTR_type_alias); + if (typeAttrs.GetAttr(ATTR_aligned)) { + uint32_t alignedNum = 0; + for (const auto *alignedAttr : decl.specific_attrs()) { + alignedNum = alignedAttr->getAlignment(*(astFile->GetNonConstAstContext())); + } + astTypedefStructOrUnion->SetAlign(alignedNum / 8); // 8: bits to byte + } + std::string aliasList; + const clang::TypedefType *subTypedefType = nullptr; + if (llvm::isa(underlyTy)) { + subTypedefType = llvm::dyn_cast(underlyTy); + } + while (subTypedefType != nullptr && llvm::isa(subTypedefType)) { + aliasList += "$" + subTypedefType->getDecl()->getDeclName().getAsString(); + if (llvm::isa(subTypedefType->getDecl()->getUnderlyingType())) { + subTypedefType = llvm::dyn_cast(subTypedefType->getDecl()->getUnderlyingType()); + } else { + subTypedefType = nullptr; + } + aliasList += ", "; + } + std::string baseTypeName = baseType->getDecl()->getDeclName().getAsString(); + if ((aliasList != "" || !llvm::isa(underlyTy)) && baseTypeName != "") { + aliasList += "$" + baseTypeName; + } + astTypedefStructOrUnion->SetTypedefAliasList(aliasList); + if (decl.isDefinedOutsideFunctionOrMethod()) { + astTypedefStructOrUnion->SetGlobal(true); + } + const auto *declContext = llvm::dyn_cast(baseType->getDecl()); + if (declContext == nullptr) { + return nullptr; + } + if (HandleFieldToRecordType(allocator, *astTypedefStructOrUnion, *declContext)) { + return astTypedefStructOrUnion; + } else { + return nullptr; + } } clang::QualType underlyCanonicalTy = decl.getCanonicalDecl()->getUnderlyingType().getCanonicalType(); if (underlyCanonicalTy->isRecordType()) { @@ -3481,6 +3666,18 @@ ASTDecl *ASTParser::ProcessDeclLabelDecl(MapleAllocator &allocator, const clang: return astDecl; } +bool ASTParser::HandleRecordAndTypedef(ASTStruct *structOrUnion) { + if (structOrUnion == nullptr) { + return false; + } + auto itor = std::find(astStructs.cbegin(), astStructs.cend(), structOrUnion); + if (itor != astStructs.end()) { + } else { + (void)astStructs.emplace_back(structOrUnion); + } + return true; +} + bool ASTParser::RetrieveStructs(MapleAllocator &allocator) { for (auto &decl : std::as_const(recordDecles)) { clang::RecordDecl *recDecl = llvm::cast(decl->getCanonicalDecl()); @@ -3519,14 +3716,9 @@ bool ASTParser::RetrieveStructs(MapleAllocator &allocator) { astStructs.emplace_back(curStructOrUnion); } else { ASTStruct *curStructOrUnion = static_cast(ProcessDecl(allocator, *recDecl)); - if (curStructOrUnion == nullptr) { + if (!HandleRecordAndTypedef(curStructOrUnion)) { return false; } - auto itor = std::find(astStructs.cbegin(), astStructs.cend(), curStructOrUnion); - if (itor != astStructs.end()) { - } else { - (void)astStructs.emplace_back(curStructOrUnion); - } } } return true; @@ -3596,7 +3788,17 @@ bool ASTParser::RetrieveGlobalTypeDef(MapleAllocator &allocator) { if (gTypeDefDecl->isImplicit()) { continue; } - (void)ProcessDecl(allocator, *gTypeDefDecl); + if (FEOptions::GetInstance().IsDbgFriendly()) { + (void)ProcessDecl(allocator, *gTypeDefDecl); + } else { + clang::TypedefDecl *typedefDecl = llvm::cast(gTypeDefDecl); + if (typedefDecl->getUnderlyingType()->isRecordType()) { + ASTStruct *curStructOrUnion = static_cast(ProcessDecl(allocator, *gTypeDefDecl)); + if (!HandleRecordAndTypedef(curStructOrUnion)) { + return false; + } + } + } } return true; } diff --git a/src/hir2mpl/ast_input/clang/src/ast_parser_builting_func.cpp b/src/hir2mpl/ast_input/clang/src/ast_parser_builting_func.cpp index 099f4fe5bb9108ac094baec348e4effaa166ed51..b029b034bc1382399af30d71eb52ec365435bd28 100644 --- a/src/hir2mpl/ast_input/clang/src/ast_parser_builting_func.cpp +++ b/src/hir2mpl/ast_input/clang/src/ast_parser_builting_func.cpp @@ -28,22 +28,105 @@ #include "mir_module.h" #include "mpl_logging.h" #include "fe_macros.h" +#include "driver_options.h" +#include "global_tables.h" namespace maple { -std::unordered_map ASTCallExpr::InitBuiltinFuncPtrMap() { - std::unordered_map ans; + +std::unordered_map ASTCallExpr::builtinFuncPtrMap = {}; +std::unordered_map ASTCallExpr::clibFuncProtoTypeMap = {}; + +std::unordered_map &ASTCallExpr::GetOrCreateClibFuncProtoTypeMap() { + if (clibFuncProtoTypeMap.empty()) { + TypeTable& tab = GlobalTables::GetTypeTable(); +#define BUILTIN_FUNC_EMIT(funcName, ...) clibFuncProtoTypeMap[(funcName)] = { __VA_ARGS__ } +#include "clib_func_emit.def" +#undef BUILTIN_FUNC_EMIT + } + return clibFuncProtoTypeMap; +} + +std::unordered_map &ASTCallExpr::GetOrCreateBuiltinFuncPtrMap() { + if (builtinFuncPtrMap.empty()) { #define BUILTIN_FUNC_EMIT(funcName, FuncPtrBuiltinFunc) \ - ans[funcName] = FuncPtrBuiltinFunc; + builtinFuncPtrMap[(funcName)] = (FuncPtrBuiltinFunc) #include "builtin_func_emit.def" #undef BUILTIN_FUNC_EMIT // vector builtinfunc -#define DEF_MIR_INTRINSIC(STR, NAME, INTRN_CLASS, RETURN_TYPE, ...) \ - ans["__builtin_mpl_"#STR] = &ASTCallExpr::EmitBuiltin##STR; +#define DEF_MIR_INTRINSIC(STR, NAME, INTRN_CLASS, RETURN_TYPE, ...) \ + builtinFuncPtrMap["__builtin_mpl_"#STR] = &ASTCallExpr::EmitBuiltin##STR; #include "intrinsic_vector.def" #include "intrinsic_vector_new.def" #undef DEF_MIR_INTRINSIC + } + return builtinFuncPtrMap; +} - return ans; +UniqueFEIRExpr ASTCallExpr::ProcessLibcFunc(std::list &stmts, bool &isFinish) const { + if (FEOptions::GetInstance().IsNoBuiltin()) { + isFinish = false; + return nullptr; + } + + auto &cLibFuncs = GetOrCreateClibFuncProtoTypeMap(); + auto cLibFunc = cLibFuncs.find(GetFuncName()); + if (cLibFunc != cLibFuncs.end() && + !GetFuncAttrs().GetAttr(maple::FuncAttrKind::FUNCATTR_static) && + GetRetType()->EqualToWithAttr(*(cLibFunc->second).retInfo) && + GetArgsExpr().size() == (cLibFunc->second).argInfo.size()) { + size_t i = 0; + for (; i < GetArgsExpr().size(); ++i) { + if (!GetArgsExpr().at(i)->GetType()->EqualTo(*(cLibFunc->second).argInfo.at(i)) || + !GetArgsExpr().at(i)->GetType()->EqualToWithAttr(*(cLibFunc->second).argInfo.at(i))) { + break; + } + } + if (i == GetArgsExpr().size()) { + isFinish = true; + return (this->*(cLibFunc->second.funcPtrClibFunc))(stmts); + } + } + + isFinish = false; + return nullptr; +} + +UniqueFEIRExpr ASTCallExpr::ProcessBuiltinFunc(std::list &stmts, bool &isFinish) const { + // process a kind of builtinFunc & unsupport __builtin_mpl_vector_st_call function + using BuiltinFunc = UniqueFEIRExpr(*)(std::list &stmtsBuiltin, bool &isFinishBuiltin, + const MapleVector &argsBuiltin, MIRType &mirTypeBuiltin, + const std::pair &funcMessageBuiltin); + static std::map> builtinFuncKindMap = { + {"__builtin_mpl_vector_load", &EmitBuiltinVectorLoad}, + {"__builtin_mpl_vector_store", &EmitBuiltinVectorStore}, + {"__builtin_mpl_vector_shli", &EmitBuiltinVectorShli}, + {"__builtin_mpl_vector_shri", &EmitBuiltinVectorShri}, + {"__builtin_mpl_vector_shru", &EmitBuiltinVectorShru}, + {"__builtin_mpl_vector_st", &EmitBuiltinVectorStFunc} + }; + const std::pair funcMessage = {GetFuncName(), GetSrcLoc()}; + for (auto &it : builtinFuncKindMap) { + if (GetFuncName().compare(0, it.first.size(), it.first) == 0) { + return (it.second)(stmts, isFinish, args, *mirType, funcMessage); + } + } + // process a single builtinFunc + auto &builtinFuncs = GetOrCreateBuiltinFuncPtrMap(); + auto ptrFunc = builtinFuncs.find(GetFuncName()); + if (ptrFunc != builtinFuncs.end()) { + isFinish = true; + return (this->*(ptrFunc->second))(stmts); + } + + if (FEOptions::GetInstance().GetDumpLevel() >= FEOptions::kDumpLevelInfo) { + std::string prefix = "__builtin"; + if (GetFuncName().compare(0, prefix.size(), prefix) == 0) { + FE_INFO_LEVEL(FEOptions::kDumpLevelInfo, "%s:%d BuiltinFunc (%s) has not been implemented", + FEManager::GetModule().GetFileNameFromFileNum(GetSrcFileIdx()).c_str(), GetSrcFileLineNum(), + GetFuncName().c_str()); + } + } + return ProcessLibcFunc(stmts, isFinish); } UniqueFEIRExpr ASTCallExpr::CreateIntrinsicopForC(std::list &stmts, @@ -114,47 +197,6 @@ UniqueFEIRExpr ASTCallExpr::CreateBinaryExpr(std::list &stmts, O return std::make_unique(std::move(feTy), op, std::move(arg1), std::move(arg2)); } -UniqueFEIRExpr ASTCallExpr::ProcessBuiltinFunc(std::list &stmts, bool &isFinish) const { - // process a kind of builtinFunc & unsupport __builtin_mpl_vector_st_call function - using BuiltinFunc = UniqueFEIRExpr(*)(std::list &stmtsBuiltin, bool &isFinishBuiltin, - const MapleVector &argsBuiltin, MIRType &mirTypeBuiltin, - const std::pair &funcMessageBuiltin); - static std::map> builtinFuncKindMap = { - {"__builtin_mpl_vector_load", &EmitBuiltinVectorLoad}, - {"__builtin_mpl_vector_store", &EmitBuiltinVectorStore}, - {"__builtin_mpl_vector_shli", &EmitBuiltinVectorShli}, - {"__builtin_mpl_vector_shri", &EmitBuiltinVectorShri}, - {"__builtin_mpl_vector_shru", &EmitBuiltinVectorShru}, - {"__builtin_mpl_vector_st", &EmitBuiltinVectorStFunc} - }; - const std::pair funcMessage = {GetFuncName(), GetSrcLoc()}; - for (auto &it : builtinFuncKindMap) { - if (GetFuncName().compare(0, it.first.size(), it.first) == 0) { - return (it.second)(stmts, isFinish, args, *mirType, funcMessage); - } - } - // process a single builtinFunc - auto ptrFunc = builtingFuncPtrMap.find(GetFuncName()); - if (ptrFunc != builtingFuncPtrMap.end()) { - isFinish = true; - return EmitBuiltinFunc(stmts); - } - isFinish = false; - if (FEOptions::GetInstance().GetDumpLevel() >= FEOptions::kDumpLevelInfo) { - std::string prefix = "__builtin"; - if (GetFuncName().compare(0, prefix.size(), prefix) == 0) { - FE_INFO_LEVEL(FEOptions::kDumpLevelInfo, "%s:%d BuiltinFunc (%s) has not been implemented", - FEManager::GetModule().GetFileNameFromFileNum(GetSrcFileIdx()).c_str(), GetSrcFileLineNum(), - GetFuncName().c_str()); - } - } - return nullptr; -} - -UniqueFEIRExpr ASTCallExpr::EmitBuiltinFunc(std::list &stmts) const { - return (this->*(builtingFuncPtrMap[GetFuncName()]))(stmts); -} - #define DEF_MIR_INTRINSIC(STR, NAME, INTRN_CLASS, RETURN_TYPE, ...) \ UniqueFEIRExpr ASTCallExpr::EmitBuiltin##STR(std::list &stmts) const { \ auto feType = FEIRTypeHelper::CreateTypeNative(*mirType); \ @@ -295,11 +337,11 @@ UniqueFEIRExpr ASTCallExpr::EmitBuiltinVaCopy(std::list &stmts) } UniqueFEIRExpr ASTCallExpr::EmitBuiltinPrefetch(std::list &stmts) const { - // __builtin_prefetch is not supported, only parsing args including stmts - for (size_t i = 0; i <= args.size() - 1; ++i) { - (void)args[i]->Emit2FEExpr(stmts); - } - return nullptr; + return CreateIntrinsicCallAssignedForC(stmts, INTRN_C_prefetch); +} + +UniqueFEIRExpr ASTCallExpr::EmitBuiltinClearCache(std::list &stmts) const { + return CreateIntrinsicCallAssignedForC(stmts, INTRN_C___clear_cache); } UniqueFEIRExpr ASTCallExpr::EmitBuiltinCtz(std::list &stmts) const { @@ -378,6 +420,10 @@ UniqueFEIRExpr ASTCallExpr::EmitBuiltinAlignDown(std::list &stmt return CreateIntrinsicopForC(stmts, INTRN_C_aligndown); } +UniqueFEIRExpr ASTCallExpr::EmitBuiltinConstantP(std::list &stmts) const { + return CreateIntrinsicopForC(stmts, INTRN_C_constant_p); +} + UniqueFEIRExpr ASTCallExpr::EmitBuiltinSyncAddAndFetch8(std::list &stmts) const { return CreateIntrinsicCallAssignedForC(stmts, INTRN_C___sync_add_and_fetch_8); } @@ -685,16 +731,18 @@ UniqueFEIRExpr ASTCallExpr::EmitBuiltinAlloca(std::list &stmts) return alloca; } +UniqueFEIRExpr ASTCallExpr::EmitBuiltinAllocaWithAlign(std::list &stmts) const { + return CreateIntrinsicopForC(stmts, INTRN_C_alloca_with_align); +} + UniqueFEIRExpr ASTCallExpr::EmitBuiltinExpect(std::list &stmts) const { ASSERT(args.size() == 2, "__builtin_expect requires two arguments"); std::list subStmts; UniqueFEIRExpr feExpr = CreateIntrinsicopForC(subStmts, INTRN_C___builtin_expect, false); - bool isOptimized = false; for (auto &stmt : std::as_const(subStmts)) { // If there are mutiple conditions combined with logical AND '&&' or logical OR '||' in __builtin_expect, generate // a __builtin_expect intrinsicop for each one condition in mpl if (stmt->GetKind() == FEIRNodeKind::kStmtCondGoto) { - isOptimized = true; auto *condGotoStmt = static_cast(stmt.get()); // skip if condition label name not starts with if (condGotoStmt->GetLabelName().rfind(FEUtils::kCondGoToStmtLabelNamePrefix, 0) != 0) { @@ -722,8 +770,7 @@ UniqueFEIRExpr ASTCallExpr::EmitBuiltinExpect(std::list &stmts) } } stmts.splice(stmts.end(), subStmts); - return isOptimized ? static_cast(feExpr.get())->GetOpnds().front()->Clone() - : feExpr->Clone(); + return feExpr->Clone(); } UniqueFEIRExpr ASTCallExpr::EmitBuiltinAbs(std::list &stmts) const { @@ -857,19 +904,35 @@ UniqueFEIRExpr ASTCallExpr::EmitBuiltinIsunordered(std::list &st } UniqueFEIRExpr ASTCallExpr::EmitBuiltinIsless(std::list &stmts) const { - return CreateBinaryExpr(stmts, OP_lt); + auto feTy = std::make_unique(*mirType); + auto arg1 = args[0]->Emit2FEExpr(stmts); + auto arg2 = args[1]->Emit2FEExpr(stmts); + auto left = std::make_unique(feTy->Clone(), OP_cmpg, arg1->Clone(), arg2->Clone()); + return FEIRBuilder::CreateExprZeroCompare(OP_lt, std::move(left)); } UniqueFEIRExpr ASTCallExpr::EmitBuiltinIslessequal(std::list &stmts) const { - return CreateBinaryExpr(stmts, OP_le); + auto feTy = std::make_unique(*mirType); + auto arg1 = args[0]->Emit2FEExpr(stmts); + auto arg2 = args[1]->Emit2FEExpr(stmts); + auto left = std::make_unique(feTy->Clone(), OP_cmpg, arg1->Clone(), arg2->Clone()); + return FEIRBuilder::CreateExprZeroCompare(OP_le, std::move(left)); } UniqueFEIRExpr ASTCallExpr::EmitBuiltinIsgreater(std::list &stmts) const { - return CreateBinaryExpr(stmts, OP_gt); + auto feTy = std::make_unique(*mirType); + auto arg1 = args[0]->Emit2FEExpr(stmts); + auto arg2 = args[1]->Emit2FEExpr(stmts); + auto left = std::make_unique(feTy->Clone(), OP_cmpl, arg1->Clone(), arg2->Clone()); + return FEIRBuilder::CreateExprZeroCompare(OP_gt, std::move(left)); } UniqueFEIRExpr ASTCallExpr::EmitBuiltinIsgreaterequal(std::list &stmts) const { - return CreateBinaryExpr(stmts, OP_ge); + auto feTy = std::make_unique(*mirType); + auto arg1 = args[0]->Emit2FEExpr(stmts); + auto arg2 = args[1]->Emit2FEExpr(stmts); + auto left = std::make_unique(feTy->Clone(), OP_cmpl, arg1->Clone(), arg2->Clone()); + return FEIRBuilder::CreateExprZeroCompare(OP_ge, std::move(left)); } UniqueFEIRExpr ASTCallExpr::EmitBuiltinIslessgreater(std::list &stmts) const { @@ -977,23 +1040,20 @@ ASTExpr *ASTParser::ParseBuiltinClassifyType(MapleAllocator &allocator, const cl ASTExpr *ASTParser::ParseBuiltinConstantP(MapleAllocator &allocator, const clang::CallExpr &expr, std::stringstream &ss, ASTCallExpr &astCallExpr) const { (void)astCallExpr; - (void)ss; - int64 constP = expr.getArg(0)->isConstantInitializer(*astFile->GetNonConstAstContext(), false) ? 1 : 0; - // Pointers are not considered constant - if (expr.getArg(0)->getType()->isPointerType() && - !llvm::isa(expr.getArg(0)->IgnoreParenCasts())) { - constP = 0; - } - ASTIntegerLiteral *astIntegerLiteral = ASTDeclsBuilder::ASTExprBuilder(allocator); - astIntegerLiteral->SetVal(constP); - astIntegerLiteral->SetType(astFile->CvtType(allocator, expr.getType())); - return astIntegerLiteral; + return ProcessBuiltinFuncByName(allocator, expr, ss, "__builtin_constant_p"); } -ASTExpr *ASTParser::ParseBuiltinSignbit(MapleAllocator &allocator, const clang::CallExpr &expr, +ASTExpr *ASTParser::ParseBuiltinSignBit(MapleAllocator &allocator, const clang::CallExpr &expr, std::stringstream &ss, ASTCallExpr &astCallExpr) const { (void)astCallExpr; - return ProcessBuiltinFuncByName(allocator, expr, ss, "__signbit"); + PrimType argType = astFile->CvtType(allocator, expr.getArg(0)->getType())->GetPrimType(); + if (argType == PTY_f64) { + return ProcessBuiltinFuncByName(allocator, expr, ss, "__signbit"); + } else if (argType == PTY_f32) { + return ProcessBuiltinFuncByName(allocator, expr, ss, "__signbitf"); + } else { + return ProcessBuiltinFuncByName(allocator, expr, ss, "__signbitl"); + } } ASTExpr *ASTParser::ParseBuiltinIsinfsign(MapleAllocator &allocator, const clang::CallExpr &expr, @@ -1120,21 +1180,6 @@ ASTExpr *ASTParser::ParseBuiltinNanf(MapleAllocator &allocator, const clang::Cal return astFloatingLiteral; } -ASTExpr *ASTParser::ParseBuiltinSignBitf(MapleAllocator &allocator, const clang::CallExpr &expr, - std::stringstream &ss, ASTCallExpr &astCallExpr) const { - (void)astCallExpr; - return ProcessBuiltinFuncByName(allocator, expr, ss, "__signbitf"); -} - -ASTExpr *ASTParser::ParseBuiltinSignBitl(MapleAllocator &allocator, const clang::CallExpr &expr, - std::stringstream &ss, ASTCallExpr &astCallExpr) const { - (void)astCallExpr; - if (astFile->CvtType(allocator, expr.getArg(0)->getType())->GetPrimType() != PTY_f128) { - return ProcessBuiltinFuncByName(allocator, expr, ss, "__signbit"); - } - return ProcessBuiltinFuncByName(allocator, expr, ss, "__signbitl"); -} - ASTExpr *ASTParser::ParseBuiltinTrap(MapleAllocator &allocator, const clang::CallExpr &expr, std::stringstream &ss, ASTCallExpr &astCallExpr) const { (void)astCallExpr; diff --git a/src/hir2mpl/ast_input/clang/src/ast_struct2fe_helper.cpp b/src/hir2mpl/ast_input/clang/src/ast_struct2fe_helper.cpp index 796db04bf597fdb987a6462857b7c2c471dfa7f8..09e27613c299ea523319d3de070e9e8728ae3519 100644 --- a/src/hir2mpl/ast_input/clang/src/ast_struct2fe_helper.cpp +++ b/src/hir2mpl/ast_input/clang/src/ast_struct2fe_helper.cpp @@ -61,6 +61,9 @@ TypeAttrs ASTStruct2FEHelper::GetStructAttributeFromInputImpl() const { if (astStruct.GetAlign() != 0) { typeAttrs.SetAlign(astStruct.GetAlign()); } + if (typeAttrs.GetAttr(ATTR_type_alias)) { + typeAttrs.SetTypeAlias(astStruct.GetTypedefAliasList()); + } return typeAttrs; } @@ -102,6 +105,9 @@ MIRStructType *ASTStruct2FEHelper::CreateMIRStructTypeImpl(bool &error) const { ERR(kLncErr, "class name is empty"); return nullptr; } + if (FEOptions::GetInstance().IsDbgFriendly() && astStruct.GetGenericAttrs().GetAttr(GENATTR_typedef)) { + return nullptr; + } MIRStructType *type = FEManager::GetTypeManager().GetOrCreateStructType(astStruct.GenerateUniqueVarName()); error = false; if (astStruct.IsUnion()) { @@ -144,6 +150,7 @@ bool ASTStructField2FEHelper::ProcessDeclWithContainerImpl(MapleAllocator &alloc GStrIdx idx = GlobalTables::GetStrTable().GetOrCreateStrIdxFromName(fieldName); FieldAttrs attrs = field.GetGenericAttrs().ConvertToFieldAttrs(); attrs.SetAlign(field.GetAlign()); + attrs.SetTypeAlign(field.GetTypeAlign()); MIRType *fieldType = field.GetTypeDesc().front(); ASSERT(fieldType != nullptr, "nullptr check for fieldType"); ENCChecker::InsertBoundaryInAtts(attrs, field.GetBoundaryInfo()); @@ -173,9 +180,11 @@ bool ASTGlobalVar2FEHelper::ProcessDeclImpl(MapleAllocator &allocator) { TypeAttrs typeAttrs = astVar.GetGenericAttrs().ConvertToTypeAttrs(); ENCChecker::InsertBoundaryInAtts(typeAttrs, astVar.GetBoundaryInfo()); MIRSymbol *mirSymbol = FEManager::GetMIRBuilder().GetGlobalDecl(varName); + bool isExtern = false; if (mirSymbol != nullptr) { // do not allow extern var override global var if (mirSymbol->GetStorageClass() != MIRStorageClass::kScExtern && typeAttrs.GetAttr(ATTR_extern)) { + isExtern = true; typeAttrs.ResetAttr(ATTR_extern); } else if (mirSymbol->GetStorageClass() == MIRStorageClass::kScExtern && !typeAttrs.GetAttr(ATTR_extern)) { mirSymbol->SetStorageClass(MIRStorageClass::kScGlobal); @@ -188,7 +197,7 @@ bool ASTGlobalVar2FEHelper::ProcessDeclImpl(MapleAllocator &allocator) { } // Set the type here in case a previous declaration had an incomplete // array type and the definition has the complete type. - if (mirSymbol->GetType()->GetTypeIndex() != type->GetTypeIndex()) { + if (mirSymbol->GetType()->GetTypeIndex() != type->GetTypeIndex() && !isExtern) { mirSymbol->SetTyIdx(type->GetTypeIndex()); } if (mirSymbol->GetSrcPosition().LineNum() == 0) { @@ -202,8 +211,13 @@ bool ASTGlobalVar2FEHelper::ProcessDeclImpl(MapleAllocator &allocator) { } else { mirSymbol->SetStorageClass(MIRStorageClass::kScGlobal); } - typeAttrs.SetAlign(astVar.GetAlign()); + if (astVar.GetAlign() != 0) { + typeAttrs.SetAttr(ATTR_aligned); + } mirSymbol->AddAttrs(typeAttrs); + if (mirSymbol->GetAttr(ATTR_aligned)) { + mirSymbol->GetAttrs().SetAlign(astVar.GetAlign()); + } if (!astVar.GetSectionAttr().empty()) { mirSymbol->sectionAttr = GlobalTables::GetUStrTable().GetOrCreateStrIdxFromName(astVar.GetSectionAttr()); } diff --git a/src/hir2mpl/ast_input/common/include/ast_decl.h b/src/hir2mpl/ast_input/common/include/ast_decl.h index 80a265a025066c5f9ec140cf89194c848650efd7..53ee865ea021e7a6552ad58ac8c34def7932e491 100644 --- a/src/hir2mpl/ast_input/common/include/ast_decl.h +++ b/src/hir2mpl/ast_input/common/include/ast_decl.h @@ -57,6 +57,10 @@ class ASTDecl { return genAttrs; } + void SetGenericAttrs(MapleGenericAttrs newGenAttrs) { + genAttrs = newGenAttrs; + } + void SetGlobal(bool isGlobal) { isGlobalDecl = isGlobal; } @@ -93,6 +97,14 @@ class ASTDecl { return align; } + void SetTypeAlign(uint32 n) { + typeAlign = n; + } + + uint32 GetTypeAlign() const { + return typeAlign; + } + void SetAttr(GenericAttrKind attrKind) { genAttrs.SetAttr(attrKind); } @@ -185,6 +197,10 @@ class ASTDecl { return isCallAlloca; } + void SetName(MapleString newName) { + name = newName; + } + protected: virtual MIRConst *Translate2MIRConstImpl() const { CHECK_FATAL(false, "Maybe implemented for other ASTDecls"); @@ -194,6 +210,7 @@ class ASTDecl { bool isGlobalDecl; bool isParam = false; uint32 align = 0; // in byte + uint32 typeAlign = 0; // in byte const MapleString srcFileName; MapleString name; @@ -323,11 +340,20 @@ class ASTStruct : public ASTDecl { return isPack; } + void SetTypedefAliasList(std::string str) { + typeAliasList = str; + } + + std::string GetTypedefAliasList() const { + return typeAliasList; + } + private: void GenerateInitStmtImpl(std::list &stmts) override; bool isUnion = false; bool isPack = false; + std::string typeAliasList; MapleList fields; MapleList methods; }; @@ -390,23 +416,19 @@ class ASTVar : public ASTDecl { class ASTFileScopeAsm : public ASTDecl { public: - ASTFileScopeAsm(MapleAllocator &allocatorIn, const MapleString &srcFile) + ASTFileScopeAsm(MapleAllocator &allocatorIn, const MapleString &srcFile, const MapleString &asmStrArg) : ASTDecl(allocatorIn, srcFile, MapleString("", allocatorIn.GetMemPool()), - MapleVector(allocatorIn.Adapter())) { + MapleVector(allocatorIn.Adapter())), asmStr(asmStrArg) { declKind = kASTFileScopeAsm; } ~ASTFileScopeAsm() override = default; - void SetAsmStr(const std::string &str) { - asmStr = str; - } - - const std::string &GetAsmStr() const { + const MapleString &GetAsmStr() const { return asmStr; } private: - std::string asmStr; + MapleString asmStr; }; class ASTEnumConstant : public ASTDecl { diff --git a/src/hir2mpl/ast_input/common/include/ast_input-inl.h b/src/hir2mpl/ast_input/common/include/ast_input-inl.h index 5e988d09af12b35536f6788156cc3a5eaf307e02..d6e335254f7c3f2b359eec55ab6ef89318f9c7dd 100644 --- a/src/hir2mpl/ast_input/common/include/ast_input-inl.h +++ b/src/hir2mpl/ast_input/common/include/ast_input-inl.h @@ -38,8 +38,8 @@ bool ASTInput::ReadASTFile(MapleAllocator &allocatorIn, uint32 index, const s TRY_DO(parser->RetrieveStructs(allocatorIn)); if (FEOptions::GetInstance().IsDbgFriendly()) { TRY_DO(parser->RetrieveEnums(allocatorIn)); - TRY_DO(parser->RetrieveGlobalTypeDef(allocatorIn)); } + TRY_DO(parser->RetrieveGlobalTypeDef(allocatorIn)); TRY_DO(parser->RetrieveGlobalVars(allocatorIn)); TRY_DO(parser->RetrieveFileScopeAsms(allocatorIn)); TRY_DO(parser->Release(allocatorIn)); diff --git a/src/hir2mpl/common/include/enhance_c_checker.h b/src/hir2mpl/common/include/enhance_c_checker.h index ef4a438a0fd0cb3916dd262303eab39993c71929..2cf389d98bdf93ad077202a53e02b99e37fbb6fe 100644 --- a/src/hir2mpl/common/include/enhance_c_checker.h +++ b/src/hir2mpl/common/include/enhance_c_checker.h @@ -33,7 +33,6 @@ class ENCChecker { static void CheckNonnullLocalVarInit(const MIRSymbol &sym, const ASTExpr *initExpr); static void CheckNonnullLocalVarInit(const MIRSymbol &sym, const UniqueFEIRExpr &initFEExpr, std::list &stmts); - static std::string GetNthStr(size_t index); static std::string PrintParamIdx(const std::list &idxs); static void CheckNonnullArgsAndRetForFuncPtr(const MIRType &dstType, const UniqueFEIRExpr &srcExpr, const Loc &loc); static bool HasNonnullFieldInStruct(const MIRType &mirType); diff --git a/src/hir2mpl/common/include/fe_options.h b/src/hir2mpl/common/include/fe_options.h index e216b530c4638ade9a3eed3571fb262cdec0bc4a..e21e8a6886f5055280bb9ac5db0ffdf4930e3208 100644 --- a/src/hir2mpl/common/include/fe_options.h +++ b/src/hir2mpl/common/include/fe_options.h @@ -25,9 +25,10 @@ namespace maple { class FEOptions { public: static const int kDumpLevelDisable = 0; - static const int kDumpLevelInfo = 1; - static const int kDumpLevelInfoDetail = 2; - static const int kDumpLevelInfoDebug = 3; + static const int kDumpLevelUnsupported = 1; + static const int kDumpLevelInfo = 2; + static const int kDumpLevelInfoDetail = 3; + static const int kDumpLevelInfoDebug = 4; enum ModeJavaStaticFieldName { kNoType = 0, // without type @@ -183,6 +184,22 @@ class FEOptions { return outputName; } + void SetInlineMpltDir(const std::string &dir) { + inlineMpltDir = dir; + } + + const std::string &GetInlineMpltDir() const { + return inlineMpltDir; + } + + void SetExportInlineMplt() { + isExportInlineMplt = true; + } + + bool IsExportInlineMplt() const { + return isExportInlineMplt; + } + void EnableDumpInstComment() { isDumpInstComment = true; } @@ -494,6 +511,10 @@ class FEOptions { return wpaa; } + bool NeedMangling() const { + return wpaa || isExportInlineMplt; + } + void SetFuncMergeEnable(bool flag) { funcMerge = flag; } @@ -502,6 +523,13 @@ class FEOptions { return funcMerge; } + void SetNoBuiltin(bool flag) { + noBuiltin = flag; + } + + bool IsNoBuiltin() const { + return noBuiltin; + } private: static FEOptions options; // input control options @@ -526,8 +554,10 @@ class FEOptions { bool isGenAsciiMplt; std::string outputPath; std::string outputName; + std::string inlineMpltDir; bool isDumpInstComment = false; bool isNoMplFile = false; + bool isExportInlineMplt = false; // debug info control options int dumpLevel; @@ -582,6 +612,7 @@ class FEOptions { uint32 funcInlineSize = 0; bool wpaa = false; bool funcMerge = true; + bool noBuiltin = false; FEOptions(); ~FEOptions() = default; }; diff --git a/src/hir2mpl/common/include/fe_utils.h b/src/hir2mpl/common/include/fe_utils.h index 3a5a34f1a4c85cb36afe27ab4ec9ef815d49cc7b..e08c89bb0d7e7537affd58bd33de9baaa91fc223 100644 --- a/src/hir2mpl/common/include/fe_utils.h +++ b/src/hir2mpl/common/include/fe_utils.h @@ -17,6 +17,7 @@ #include #include #include +#include #include "mpl_logging.h" #include "prim_types.h" #include "mir_type.h" @@ -103,6 +104,7 @@ class FEUtils { static const std::string kMCCStaticFieldSetObject; static const std::string kCondGoToStmtLabelNamePrefix; + static const std::regex kShortCircutPrefix; static inline MemPool *NewMempool(const std::string &name, bool isLocalPool) { return memPoolCtrler.NewMemPool(name, isLocalPool); diff --git a/src/hir2mpl/common/include/feir_stmt.h b/src/hir2mpl/common/include/feir_stmt.h index eca16c6d19d025558e3f317ac451ad1d993b0abf..68ae3cf73e395e32ac9867f482703a3815dc8dd3 100644 --- a/src/hir2mpl/common/include/feir_stmt.h +++ b/src/hir2mpl/common/include/feir_stmt.h @@ -35,6 +35,7 @@ #include "feir_type_helper.h" #include "feir_dfg.h" #include "int128_util.h" +#include "pragma_status.h" namespace maple { class FEIRBuilder; @@ -1667,6 +1668,21 @@ class FEIRStmtAssign : public FEIRStmt { hasException = arg; } + void SetHasPragma(bool flag) { + hasPragma = flag; + } + + bool HasPragma() const { + return hasPragma; + } + + void SetPragmaPIStatus(PreferInlinePI state) { + pragmaPIStatus = state; + } + + PreferInlinePI GetPragmaPIStatus() const { + return pragmaPIStatus; + } protected: bool HasDefImpl() const override { return ((var != nullptr) && (var.get() != nullptr)); @@ -1688,6 +1704,8 @@ class FEIRStmtAssign : public FEIRStmt { bool hasException; std::unique_ptr var = nullptr; std::list exprArgs; + bool hasPragma = false; + PreferInlinePI pragmaPIStatus = PreferInlinePI::kNonePI; }; // ---------- FEIRStmtDAssign ---------- diff --git a/src/hir2mpl/common/include/hir2mpl_options.h b/src/hir2mpl/common/include/hir2mpl_options.h index b835a3d12abb1febe8584253e2475fdae393787a..01f4ddcd92a328e996b86570915836d83840c848 100644 --- a/src/hir2mpl/common/include/hir2mpl_options.h +++ b/src/hir2mpl/common/include/hir2mpl_options.h @@ -66,6 +66,8 @@ class HIR2MPLOptions { // output control options bool ProcessOutputPath(const maplecl::OptionInterface &output) const; bool ProcessOutputName(const maplecl::OptionInterface &outputName) const; + bool ProcessInlineMpltDir(const maplecl::OptionInterface &inlineMpltDir) const; + bool ProcessExportInlineMplt(const maplecl::OptionInterface &) const; bool ProcessGenMpltOnly(const maplecl::OptionInterface &) const; bool ProcessGenAsciiMplt(const maplecl::OptionInterface &) const; bool ProcessDumpInstComment(const maplecl::OptionInterface &) const; @@ -98,6 +100,7 @@ class HIR2MPLOptions { bool ProcessFuncInlineSize(const maplecl::OptionInterface &funcInliceSize) const; bool ProcessWPAA(const maplecl::OptionInterface &) const; bool ProcessFM(const maplecl::OptionInterface &fmOpt) const; + bool ProcessNoBuiltin(const maplecl::OptionInterface &) const; // ast compiler options bool ProcessUseSignedChar(const maplecl::OptionInterface &) const; diff --git a/src/hir2mpl/common/include/pragma_status.h b/src/hir2mpl/common/include/pragma_status.h new file mode 100644 index 0000000000000000000000000000000000000000..74231974becba61b49ff1fc4a63b878cec46310d --- /dev/null +++ b/src/hir2mpl/common/include/pragma_status.h @@ -0,0 +1,32 @@ +/* + * Copyright (c) [2023] Huawei Technologies Co.,Ltd.All rights reserved. + * + * OpenArkCompiler is licensed under the Mulan PSL v1. + * You can use this software according to the terms and conditions of the Mulan PSL v1. + * You may obtain a copy of Mulan PSL v1 at: + * + * http://license.coscl.org.cn/MulanPSL + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v1 for more details. + */ +#ifndef HIR2MPL_AST_INPUT_INCLUDE_PRAGMA_STATUS_H +#define HIR2MPL_AST_INPUT_INCLUDE_PRAGMA_STATUS_H +namespace maple { + +enum class SafeSS { + kNoneSS, + kSafeSS, + kUnsafeSS, +}; + +// #pragma prefer_inline ON/OFF +enum class PreferInlinePI { + kNonePI, + kPreferInlinePI, + kPreferNoInlinePI, +}; +} +#endif // HIR2MPL_AST_INPUT_INCLUDE_PRAGMA_STATUS_H \ No newline at end of file diff --git a/src/hir2mpl/common/src/enhance_c_checker.cpp b/src/hir2mpl/common/src/enhance_c_checker.cpp index e9e240ea43f7fe931cdd57ded886208ac25f5170..6d0c7aacd086abd43ea218ba46f2eefdf126a4d5 100644 --- a/src/hir2mpl/common/src/enhance_c_checker.cpp +++ b/src/hir2mpl/common/src/enhance_c_checker.cpp @@ -174,22 +174,6 @@ void ENCChecker::CheckNonnullLocalVarInit(const MIRSymbol &sym, const UniqueFEIR } } -std::string ENCChecker::GetNthStr(size_t index) { - switch (index) { - case 0: - return "1st"; - case 1: - return "2nd"; - case 2: - return "3rd"; - default: { - std::ostringstream oss; - oss << index + 1 << "th"; - return oss.str(); - } - } -} - std::string ENCChecker::PrintParamIdx(const std::list &idxs) { std::ostringstream os; for (auto iter = idxs.begin(); iter != idxs.end(); ++iter) { @@ -671,7 +655,7 @@ bool ASTParser::ProcessBoundaryFuncPtrAttrsByIndexForParams(T *attr, ASTDecl &as MIRType *lenType = GlobalTables::GetTypeTable().GetTypeFromTyIdx(typesVec[lenIdx]); if (lenType == nullptr || !FEUtils::IsInteger(lenType->GetPrimType())) { FE_ERR(kLncErr, astDecl.GetSrcLoc(), "The boundary length var by the %s argument is not an integer type", - ENCChecker::GetNthStr(lenIdx).c_str()); + GetNthStr(lenIdx).c_str()); return isUpdated; } for (const clang::ParamIdx ¶mIdx : attr->index()) { @@ -804,7 +788,7 @@ void ASTParser::ProcessBoundaryLenExprInFunc(MapleAllocator &allocator, const cl qualType = funcDecl.getParamDecl(idx)->getType(); } else { FE_ERR(kLncErr, lenExpr->GetSrcLoc(), "The parameter annotated boundary attr [the %s argument] is not found" - "in the function [%s]", ENCChecker::GetNthStr(idx).c_str(), astFunc.GetName().c_str()); + "in the function [%s]", GetNthStr(idx).c_str(), astFunc.GetName().c_str()); return; } // parameter stringLiteral -> real parameter decl @@ -838,14 +822,14 @@ void ASTParser::ProcessBoundaryLenExprInFunc(MapleAllocator &allocator, const cl unsigned int idx, ASTFunc &astFunc, unsigned int lenIdx, bool isSize) { if (lenIdx > astFunc.GetParamDecls().size()) { FE_ERR(kLncErr, astFunc.GetSrcLoc(), "The %s parameter specified as boundary length var is not found " - "in the function [%s]", ENCChecker::GetNthStr(lenIdx).c_str(), astFunc.GetName().c_str()); + "in the function [%s]", GetNthStr(lenIdx).c_str(), astFunc.GetName().c_str()); return; } ASTDecl *lenDecl = astFunc.GetParamDecls()[lenIdx]; MIRType *lenType = lenDecl->GetTypeDesc().front(); if (lenType == nullptr || !FEUtils::IsInteger(lenType->GetPrimType())) { FE_ERR(kLncErr, astFunc.GetSrcLoc(), "The %s parameter specified as boundary length var is not an integer type " - "in the function [%s]", ENCChecker::GetNthStr(lenIdx).c_str(), astFunc.GetName().c_str()); + "in the function [%s]", GetNthStr(lenIdx).c_str(), astFunc.GetName().c_str()); return; } ASTDeclRefExpr *lenRefExpr = ASTDeclsBuilder::ASTExprBuilder(allocator); @@ -859,7 +843,7 @@ void ASTParser::ProcessBoundaryLenExprInFunc(MapleAllocator &allocator, const cl ptrDecl = astFunc.GetParamDecls()[idx]; } else { FE_ERR(kLncErr, astFunc.GetSrcLoc(), "The %s parameter annotated boundary attr is not found in the function [%s]", - ENCChecker::GetNthStr(idx).c_str(), astFunc.GetName().c_str()); + GetNthStr(idx).c_str(), astFunc.GetName().c_str()); return; } ptrDecl->SetBoundaryLenParamIdx(static_cast(lenIdx)); @@ -1914,7 +1898,7 @@ void ENCChecker::ReplaceBoundaryErr(const MIRBuilder &mirBuilder, const FEIRStmt auto callAssert = static_cast(stmt); FE_ERR(kLncErr, stmt->GetSrcLoc(), "boundaryless pointer passed to %s that requires a boundary pointer for " "the %s argument", callAssert->GetFuncName().c_str(), - ENCChecker::GetNthStr(callAssert->GetParamIndex()).c_str()); + GetNthStr(callAssert->GetParamIndex()).c_str()); } else if (op == OP_returnassertle) { MIRFunction *curFunction = mirBuilder.GetCurrentFunctionNotNull(); if (curFunction->GetName().find(kBoundsBuiltFunc) == std::string::npos) { diff --git a/src/hir2mpl/common/src/fe_file_type.cpp b/src/hir2mpl/common/src/fe_file_type.cpp index 77aed1c0df27a2cac2d7fc9e22279e20532ae28a..d0c13c9e402d534852ebcfd3a25134f555936523 100644 --- a/src/hir2mpl/common/src/fe_file_type.cpp +++ b/src/hir2mpl/common/src/fe_file_type.cpp @@ -38,7 +38,11 @@ FEFileType::FileType FEFileType::GetFileTypeByExtName(const std::string &extName FEFileType::FileType FEFileType::GetFileTypeByPathName(const std::string &pathName) const { std::string extName = GetExtName(pathName); - return GetFileTypeByExtName(extName); + FEFileType::FileType type = GetFileTypeByExtName(extName); + if (type == kUnknownType) { + type = GetFileTypeByMagicNumber(pathName); + } + return type; } FEFileType::FileType FEFileType::GetFileTypeByMagicNumber(const std::string &pathName) const { diff --git a/src/hir2mpl/common/src/fe_utils.cpp b/src/hir2mpl/common/src/fe_utils.cpp index 17631a7edff50133cd56c6e80ea0b9b362618f34..725f3768985ac4a3f14b27cd2d17c7628a09a44c 100644 --- a/src/hir2mpl/common/src/fe_utils.cpp +++ b/src/hir2mpl/common/src/fe_utils.cpp @@ -52,6 +52,7 @@ const std::string FEUtils::kMCCStaticFieldSetDouble = "MCC_StaticFieldSetDouble" const std::string FEUtils::kMCCStaticFieldSetObject = "MCC_StaticFieldSetObject"; const std::string FEUtils::kCondGoToStmtLabelNamePrefix = "shortCircuit_"; +const std::regex FEUtils::kShortCircutPrefix = std::regex("^" + FEUtils::kCondGoToStmtLabelNamePrefix + "[0-9]+$"); std::vector FEUtils::Split(const std::string &str, char delim) { std::vector ans; diff --git a/src/hir2mpl/common/src/feir_builder.cpp b/src/hir2mpl/common/src/feir_builder.cpp index 517441964c0d4b4a6901155ab2d19872455dd869..b54c7d8caedf4a1205d52d9528a3b1dd8b444463 100644 --- a/src/hir2mpl/common/src/feir_builder.cpp +++ b/src/hir2mpl/common/src/feir_builder.cpp @@ -269,18 +269,13 @@ UniqueFEIRExpr FEIRBuilder::CreateExprMathUnary(Opcode op, UniqueFEIRExpr expr) } UniqueFEIRExpr FEIRBuilder::CreateExprZeroCompare(Opcode op, UniqueFEIRExpr expr) { - CHECK_FATAL(op == OP_ne || op == OP_eq, "Unsupported op in CreateExprZeroCompare."); + auto checkEquality = op == OP_ne || op == OP_eq; if (op == OP_ne && expr->GetKind() == kExprBinary && static_cast(expr.get())->IsComparative()) { return expr; } - if (expr->GetKind() == kExprConst) { + if (expr->GetKind() == kExprConst && checkEquality) { FEIRExprConst *constExpr = static_cast(expr.get()); - int64 val; - if (op == OP_ne) { - val = constExpr->GetValue().u64 == 0 ? 0 : 1; - } else { - val = constExpr->GetValue().u64 == 0 ? 1 : 0; - } + auto val = static_cast((constExpr->GetValue().u64 == 0) != (op == OP_ne)); return std::make_unique(val, PTY_u1); } UniqueFEIRExpr zeroExpr = diff --git a/src/hir2mpl/common/src/feir_stmt.cpp b/src/hir2mpl/common/src/feir_stmt.cpp index a9bdb75bc898076591e3f389666fc5f7669d12e5..ba91b483b466cfa28f40afea930faeb8a7395932 100644 --- a/src/hir2mpl/common/src/feir_stmt.cpp +++ b/src/hir2mpl/common/src/feir_stmt.cpp @@ -1911,6 +1911,23 @@ std::list FEIRStmtCallAssign::GenMIRStmtsImpl(MIRBuilder &mirBuilder) } else { stmtCall = mirBuilder.CreateStmtCallAssigned(methodInfo.GetPuIdx(), std::move(args), retVarSym, mirOp); } + if (HasPragma() && stmtCall != nullptr) { + auto &pragmas = GlobalTables::GetGPragmaTable().GetPragmaTable(); + CPragma *pragmaPI = nullptr; + if (GetPragmaPIStatus() == PreferInlinePI::kPreferInlinePI) { + pragmaPI = GPragmaTable::CreateCPragma(CPragmaKind::PRAGMA_prefer_inline, + static_cast(pragmas.size()), "ON"); + } else if (GetPragmaPIStatus() == PreferInlinePI::kPreferNoInlinePI) { + pragmaPI = GPragmaTable::CreateCPragma(CPragmaKind::PRAGMA_prefer_inline, + static_cast(pragmas.size()), "OFF"); + } + uint32 pragmaPIIndex = pragmaPI->GetIndex(); + if (pragmaPIIndex >= pragmas.size()) { + pragmas.resize(pragmaPIIndex + 1); + GlobalTables::GetGPragmaTable().SetPragmaItem(pragmaPIIndex, pragmaPI); + } + (void)stmtCall->GetPragmas()->emplace(pragmaPIIndex); // prefer_inline or prefer_no_inline global id + } ans.push_back(stmtCall); return ans; } @@ -1940,7 +1957,7 @@ void FEIRStmtCallAssign::InsertNonnullCheckingInArgs(const UniqueFEIRExpr &expr, } if (ENCChecker::HasNullExpr(expr)) { FE_ERR(kLncErr, loc, "null passed to a callee that requires a nonnull argument[the %s argument]", - ENCChecker::GetNthStr(index).c_str()); + GetNthStr(index).c_str()); return; } if (expr->GetPrimType() == PTY_ptr) { @@ -2060,7 +2077,7 @@ void FEIRStmtICallAssign::InsertNonnullCheckingInArgs(MIRBuilder &mirBuilder, st } if (ENCChecker::HasNullExpr(expr)) { FE_ERR(kLncErr, loc, "null passed to a callee that requires a nonnull argument[the %s argument]", - ENCChecker::GetNthStr(idx).c_str()); + GetNthStr(idx).c_str()); continue; } if (expr->GetPrimType() == PTY_ptr) { @@ -2673,8 +2690,8 @@ BaseNode *FEIRExprIRead::GenMIRNodeImpl(MIRBuilder &mirBuilder) const { FEIRExprAddrofConstArray::FEIRExprAddrofConstArray(const std::vector &arrayIn, MIRType *typeIn, const std::string &strIn) : FEIRExpr(FEIRNodeKind::kExprAddrof, FEIRTypeHelper::CreateTypeNative(*GlobalTables::GetTypeTable().GetPtrType())), - arrayName(FEOptions::GetInstance().GetFuncInlineSize() != 0 ? FEUtils::GetSequentialName("const_array_") + - FEUtils::GetFileNameHashStr(FEManager::GetModule().GetFileName()) : + arrayName(FEOptions::GetInstance().NeedMangling() ? FEUtils::GetSequentialName("const_array_") + + FEUtils::GetFileNameHashStr(FEManager::GetModule().GetFileNameExceptRootPath()) : FEUtils::GetSequentialName("const_array_")), elemType(typeIn), str(strIn) { diff --git a/src/hir2mpl/common/src/hir2mpl_compiler.cpp b/src/hir2mpl/common/src/hir2mpl_compiler.cpp index ecb6b851a68c6b410da757463820e6643ccff7d0..94aa3756e0076e2e728cee5494da49664f1fb7f2 100644 --- a/src/hir2mpl/common/src/hir2mpl_compiler.cpp +++ b/src/hir2mpl/common/src/hir2mpl_compiler.cpp @@ -14,6 +14,8 @@ */ #include "hir2mpl_compiler.h" #include +#include +#include "file_utils.h" #include "fe_manager.h" #include "fe_file_type.h" #include "fe_timer.h" @@ -215,25 +217,32 @@ void HIR2MPLCompiler::ExportMpltFile() { } void HIR2MPLCompiler::ExportMplFile() { - if (!FEOptions::GetInstance().IsNoMplFile() && !FEOptions::GetInstance().IsGenMpltOnly()) { - FETimer timer; - timer.StartAndDump("Output mpl"); - bool emitStructureType = false; - // Currently, struct types cannot be dumped to mplt. - // After mid-end interfaces are optimized, the judgment can be deleted. - if (srcLang == kSrcLangC) { - emitStructureType = true; - } - module.OutputAsciiMpl("", ".mpl", nullptr, emitStructureType, false); - if (FEOptions::GetInstance().GetFuncInlineSize() != 0 && !FEOptions::GetInstance().GetWPAA()) { - std::unique_ptr modInline = std::make_unique(module); - bool isInlineNeeded = modInline->CollectInlineInfo(FEOptions::GetInstance().GetFuncInlineSize()); - if (isInlineNeeded) { - modInline->DumpInlineCandidateToFile(outNameWithoutType + ".mplt_inline"); - } + if (FEOptions::GetInstance().IsNoMplFile() || FEOptions::GetInstance().IsGenMpltOnly()) { + return; + } + FETimer timer; + timer.StartAndDump("Output mpl"); + bool emitStructureType = false; + // Currently, struct types cannot be dumped to mplt. + // After mid-end interfaces are optimized, the judgment can be deleted. + if (srcLang == kSrcLangC) { + emitStructureType = true; + } + module.OutputAsciiMpl("", ".mpl", nullptr, emitStructureType, false); + if (FEOptions::GetInstance().IsExportInlineMplt()) { + std::unique_ptr modInline = std::make_unique(module); + const uint32 kDefaultExportSize = FEOptions::GetInstance().GetFuncInlineSize() == 0 ? + 50 : FEOptions::GetInstance().GetFuncInlineSize(); + bool isInlineNeeded = modInline->CollectInlineInfo(kDefaultExportSize); + if (isInlineNeeded) { + std::string curPath = FileUtils::GetCurDirPath(); + auto fileName = FEFileType::GetName(outNameWithoutType, false); + fileName = fileName + "_" + + FileUtils::GetFileNameHashStr(curPath + kFileSeperatorChar + outNameWithoutType) + ".mplt_inline"; + modInline->DumpInlineCandidateToFile(FEOptions::GetInstance().GetInlineMpltDir() + kFileSeperatorChar + fileName); } - timer.StopAndDumpTimeMS("Output mpl"); } + timer.StopAndDumpTimeMS("Output mpl"); } void HIR2MPLCompiler::RegisterCompilerComponent(std::unique_ptr comp) { diff --git a/src/hir2mpl/common/src/hir2mpl_option.cpp b/src/hir2mpl/common/src/hir2mpl_option.cpp index 97225a489cc3f688fe98970fcff0f76d8ad63d03..51e726cf1f14851690be4ffe589f0f0d62da3fc8 100644 --- a/src/hir2mpl/common/src/hir2mpl_option.cpp +++ b/src/hir2mpl/common/src/hir2mpl_option.cpp @@ -92,9 +92,10 @@ maplecl::Option noMplFile({"--no-mpl-file", "-no-mpl-file"}, maplecl::Option dumpLevel({"--dump-level", "-d"}, " -d, -dump-level xx : debug info dump level\n" " [0] disable\n" - " [1] dump simple info\n" - " [2] dump detail info\n" - " [3] dump debug info", + " [1] dump unsupported info" + " [2] dump simple info\n" + " [3] dump detail info\n" + " [4] dump debug info", {hir2mplCategory}); maplecl::Option dumpComment({"--dump-comment", "-dump-comment"}, diff --git a/src/hir2mpl/common/src/hir2mpl_options.cpp b/src/hir2mpl/common/src/hir2mpl_options.cpp index 316b364ecc3c59b177ca3215c69c0b9888fa8c6d..5456f5f7a3289bc96b13a6261e9b505e560b0318 100644 --- a/src/hir2mpl/common/src/hir2mpl_options.cpp +++ b/src/hir2mpl/common/src/hir2mpl_options.cpp @@ -79,6 +79,10 @@ bool HIR2MPLOptions::InitFactory() { &HIR2MPLOptions::ProcessDumpInstComment); RegisterFactoryFunction(&opts::hir2mpl::noMplFile, &HIR2MPLOptions::ProcessNoMplFile); + RegisterFactoryFunction(&opts::inlineMpltDir, + &HIR2MPLOptions::ProcessInlineMpltDir); + RegisterFactoryFunction(&opts::exportMpltInline, + &HIR2MPLOptions::ProcessExportInlineMplt); // debug info control options RegisterFactoryFunction(&opts::hir2mpl::dumpLevel, @@ -149,7 +153,8 @@ bool HIR2MPLOptions::InitFactory() { &HIR2MPLOptions::ProcessWPAA); RegisterFactoryFunction(&opts::fm, &HIR2MPLOptions::ProcessFM); - + RegisterFactoryFunction(&opts::oFnoBuiltin, + &HIR2MPLOptions::ProcessNoBuiltin); return true; } @@ -315,6 +320,17 @@ bool HIR2MPLOptions::ProcessOutputName(const maplecl::OptionInterface &outputNam return true; } +bool HIR2MPLOptions::ProcessInlineMpltDir(const maplecl::OptionInterface &inlineMpltDir) const { + std::string arg = inlineMpltDir.GetCommonValue(); + FEOptions::GetInstance().SetInlineMpltDir(arg); + return true; +} + +bool HIR2MPLOptions::ProcessExportInlineMplt(const maplecl::OptionInterface &) const { + FEOptions::GetInstance().SetExportInlineMplt(); + return true; +} + bool HIR2MPLOptions::ProcessGenMpltOnly(const maplecl::OptionInterface &) const { FEOptions::GetInstance().SetIsGenMpltOnly(true); return true; @@ -598,7 +614,6 @@ bool HIR2MPLOptions::ProcessFuncInlineSize(const maplecl::OptionInterface &funcI bool HIR2MPLOptions::ProcessWPAA(const maplecl::OptionInterface &) const { FEOptions::GetInstance().SetWPAA(true); - FEOptions::GetInstance().SetFuncInlineSize(UINT32_MAX); return true; } @@ -608,6 +623,11 @@ bool HIR2MPLOptions::ProcessFM(const maplecl::OptionInterface &fmOpt) const { return true; } +// no builtin +bool HIR2MPLOptions::ProcessNoBuiltin(const maplecl::OptionInterface &) const { + FEOptions::GetInstance().SetNoBuiltin(true); + return true; +} // AOT bool HIR2MPLOptions::ProcessAOT(const maplecl::OptionInterface &) const { diff --git a/src/mapleall/maple_be/BUILD.gn b/src/mapleall/maple_be/BUILD.gn index b44218fa7f90ae4dc1b1b7156cdad1ba6e39fbc1..9fe937ad22ab98d76e88ff7380453f760a0c2d46 100644 --- a/src/mapleall/maple_be/BUILD.gn +++ b/src/mapleall/maple_be/BUILD.gn @@ -252,6 +252,7 @@ src_libcgphases = [ "src/cg/list_scheduler.cpp", "src/cg/local_schedule.cpp", "src/cg/cg_aggressive_opt.cpp", + "src/cg/cg_sink.cpp", ] src_libcg = [ diff --git a/src/mapleall/maple_be/CMakeLists.txt b/src/mapleall/maple_be/CMakeLists.txt index d19cd491e230aec6890d6d29936e1bc26d69d4a8..b2455453818258cfbf978a699d9cad3f09d9b454 100755 --- a/src/mapleall/maple_be/CMakeLists.txt +++ b/src/mapleall/maple_be/CMakeLists.txt @@ -160,6 +160,7 @@ if(${TARGET} STREQUAL "aarch64" OR ${TARGET} STREQUAL "aarch64_ilp32") src/cg/local_schedule.cpp src/cg/list_scheduler.cpp src/cg/cg_aggressive_opt.cpp + src/cg/cg_sink.cpp ) endif() diff --git a/src/mapleall/maple_be/include/ad/cortex_a55/sched_cortex_a55.td b/src/mapleall/maple_be/include/ad/cortex_a55/sched_cortex_a55.td index 8b278dbe02394418c0ba9db1703a33ed8af275a9..ff7e6dd158a7e6cf2e17e7606cf37befef8223b1 100644 --- a/src/mapleall/maple_be/include/ad/cortex_a55/sched_cortex_a55.td +++ b/src/mapleall/maple_be/include/ad/cortex_a55/sched_cortex_a55.td @@ -13,7 +13,7 @@ * See the Mulan PSL v1 for more details. */ DefType UnitType = Primary, And, Or; -DefType BypassType = Accumulator, Store, AluShift; +DefType BypassType = Accumulator, StoreAddr, AluShift; // Architecture name Class ArchitectureName ; @@ -69,6 +69,7 @@ Def Unit : kUnitIdSlot0LdAgu {And, [kUnitIdSlot0, kUnitIdLdAgu]}; Def Unit : kUnitIdSlot0StAgu {And, [kUnitIdSlot0, kUnitIdStAgu]}; Def Unit : nothing {}; +// "," indicates the next cycle Def Reservation : kLtUndef {0}; Def Reservation : kLtShift {2, [kUnitIdSlotS]}; Def Reservation : kLtShiftReg {2, [ kUnitIdSlotS, kUnitIdHazard]}; @@ -109,24 +110,22 @@ Def Reservation : kLtAdvsimdDivdQ {29, [kUnitIdSlotD, kUnitIdFpMulD, kUnitIdFpDi Def Reservation : kLtCryptoAese {3, [kUnitIdSlot0]}; Def Reservation : kLtCryptoAesmc {3, [kUnitIdSlotS]}; Def Reservation : kLtClinit {14, [kUnitIdSlotS, nothing, kUnitIdSlotDAgen, kUnitIdSlot0LdAgu, - kUnitIdLdAgu, nothing, kUnitIdSlotDAgen, kUnitIdSlot0LdAgu, - kUnitIdLdAgu, nothing, kUnitIdSlotDAgen, kUnitIdSlot0LdAgu, - kUnitIdLdAgu]}; + kUnitIdLdAgu, nothing, kUnitIdSlotDAgen, kUnitIdSlot0LdAgu, + kUnitIdLdAgu, nothing, kUnitIdSlotDAgen, kUnitIdSlot0LdAgu, + kUnitIdLdAgu]}; Def Reservation : kLtAdrpLdr {6, [kUnitIdSlotS, nothing, kUnitIdSlotDAgen, kUnitIdSlot0LdAgu, - kUnitIdLdAgu]}; + kUnitIdLdAgu]}; Def Reservation : kLtClinitTail {8, [kUnitIdSlotDAgen, kUnitIdSlot0LdAgu, kUnitIdLdAgu, nothing, - kUnitIdSlotDAgen, kUnitIdSlot0LdAgu, kUnitIdLdAgu]}; + kUnitIdSlotDAgen, kUnitIdSlot0LdAgu, kUnitIdLdAgu]}; Def Reservation : kLtTlsRel {6, [kUnitIdSlotS]}; Def Reservation : kLtTlsCall {10, [kUnitIdSlotS, kUnitIdSlotDAgen, kUnitIdSlot0LdAgu, kUnitIdLdAgu]}; Def Bypass {0, [kLtShift, kLtShiftReg], [kLtAlu]}; Def Bypass {1, [kLtShift], [kLtShift, kLtShiftReg, kLtAluShift, kLtAluShiftReg]}; Def Bypass {1, [kLtShiftReg], [kLtShift, kLtShiftReg, kLtAluShift, kLtAluShiftReg]}; -Def Bypass {1, [kLtAlu, kLtAluShift, kLtAluShiftReg], [kLtAlu]}; +Def Bypass {1, [kLtAlu, kLtAluShift, kLtAluShiftReg, kLtAluExtr], [kLtAlu]}; Def Bypass {1, [kLtAlu, kLtAluShift, kLtAluShiftReg, kLtAluExtr], [kLtAluShift], AluShift}; Def Bypass {1, [kLtAlu, kLtAluShift, kLtAluShiftReg, kLtAluExtr], [kLtAluShiftReg], AluShift}; -Def Bypass {1, [kLtAlu, kLtAluShift, kLtAluShiftReg, kLtAluExtr], [kLtAluShift]}; -Def Bypass {1, [kLtAlu, kLtAluShift, kLtAluShiftReg, kLtAluExtr], [kLtAluShiftReg]}; Def Bypass {2, [kLtAlu, kLtAluShift, kLtAluShiftReg, kLtAluExtr], [kLtAluExtr]}; Def Bypass {2, [kLtAlu, kLtAluShift, kLtAluShiftReg, kLtAluExtr], [kLtShift]}; Def Bypass {2, [kLtAlu, kLtAluShift, kLtAluShiftReg, kLtAluExtr], [kLtShiftReg]}; @@ -135,41 +134,42 @@ Def Bypass {2, [kLtMul], [kLtAlu]}; Def Bypass {3, [kLtMul], [kLtAluShift, kLtAluShiftReg, kLtAluExtr, kLtShift, kLtShiftReg]}; Def Bypass {2, [kLtLoad1], [kLtAlu]}; Def Bypass {3, [kLtLoad1], [kLtAluShift, kLtAluShiftReg, kLtAluExtr, kLtShift, kLtShiftReg]}; -Def Bypass {3, [kLtLoad2], [kLtAlu]}; -Def Bypass {0, [kLtAlu], [kLtStore1, kLtStore2, kLtStore3plus], Store}; -Def Bypass {0, [kLtAluShift], [kLtStore1, kLtStore2, kLtStore3plus], Store}; -Def Bypass {0, [kLtAluShiftReg], [kLtStore1, kLtStore2, kLtStore3plus], Store}; -Def Bypass {0, [kLtAluExtr], [ kLtStore1, kLtStore2, kLtStore3plus], Store}; -Def Bypass {0, [kLtShift], [kLtStore1, kLtStore2, kLtStore3plus], Store}; -Def Bypass {0, [kLtShiftReg], [kLtStore1, kLtStore2, kLtStore3plus], Store}; -Def Bypass {1, [kLtMul], [kLtStore1, kLtStore2, kLtStore3plus], Store}; -Def Bypass {1, [kLtLoad1], [kLtStore1, kLtStore2, kLtStore3plus], Store}; -Def Bypass {1, [kLtLoad2], [kLtStore1, kLtStore2, kLtStore3plus], Store}; -Def Bypass {1, [kLtLoad3plus], [kLtStore1, kLtStore2, kLtStore3plus], Store}; +Def Bypass {2, [kLtLoad2], [kLtAlu]}; +Def Bypass {0, [kLtAlu], [kLtStore1, kLtStore2, kLtStore3plus], StoreAddr}; +Def Bypass {0, [kLtAluShift], [kLtStore1, kLtStore2, kLtStore3plus], StoreAddr}; +Def Bypass {0, [kLtAluShiftReg], [kLtStore1, kLtStore2, kLtStore3plus], StoreAddr}; +Def Bypass {0, [kLtAluExtr], [ kLtStore1, kLtStore2, kLtStore3plus], StoreAddr}; +Def Bypass {0, [kLtShift], [kLtStore1, kLtStore2, kLtStore3plus], StoreAddr}; +Def Bypass {0, [kLtShiftReg], [kLtStore1, kLtStore2, kLtStore3plus], StoreAddr}; +Def Bypass {1, [kLtMul], [kLtStore1, kLtStore2, kLtStore3plus], StoreAddr}; +Def Bypass {1, [kLtLoad1], [kLtStore1, kLtStore2, kLtStore3plus], StoreAddr}; +Def Bypass {1, [kLtLoad2], [kLtStore1, kLtStore2, kLtStore3plus], StoreAddr}; +Def Bypass {1, [kLtLoad3plus], [kLtStore1, kLtStore2, kLtStore3plus], StoreAddr}; Def Bypass {0, [kLtAlu, kLtAluShift, kLtAluShiftReg, kLtAluExtr, kLtShift, kLtShiftReg], [kLtR2f]}; Def Bypass {1, [kLtMul, kLtLoad1, kLtLoad2], [kLtR2f]}; Def Bypass {2, [kLtAlu, kLtAluShift, kLtAluShiftReg, kLtAluExtr], [kLtR2fCvt]}; Def Bypass {3, [kLtMul, kLtLoad1, kLtLoad2], [kLtR2fCvt]}; Def Bypass {0, [kLtAlu, kLtAluShift, kLtAluShiftReg, kLtAluExtr, kLtShift, kLtShiftReg], [kLtBranch]}; -Def Bypass {1, [kLtFpalu, kLtFpmul, kLtR2f, kLtR2fCvt, kLtFconst], [kLtFpmac], Accumulator}; -Def Bypass {1, [kLtFLoad64, kLtFLoadMany], [kLtFpmac]}; -Def Bypass {4, [kLtFpmac], [kLtFpmac], Accumulator}; +Def Bypass {1, [kLtFpalu, kLtFpmul, kLtFpmac, kLtR2f, kLtFLoad64, kLtFLoadMany], [kLtFpmac], Accumulator}; +Def Bypass {4, [kLtFpalu], [kLtFpalu, kLtFpmul, kLtFpmac, kLtAdvsimdDivS, kLtAdvsimdDivD, kLtAdvsimdDivSQ, kLtAdvsimdDivdQ]}; +Def Bypass {4, [kLtFpmul], [kLtFpalu, kLtFpmul, kLtFpmac, kLtAdvsimdDivS, kLtAdvsimdDivD, kLtAdvsimdDivSQ, kLtAdvsimdDivdQ]}; Def Bypass {0, [kLtCryptoAese], [kLtCryptoAesmc]}; +// Bypass of the user-defined type for {kLtClinit, kLtAdrpLdr, kLtClinitTail} Def Bypass {1, [kLtShiftReg], [kLtClinit]}; Def Bypass {2, [kLtAlu, kLtAluShift, kLtAluExtr], [kLtClinit]}; Def Bypass {3, [kLtMul, kLtLoad1], [kLtClinit]}; Def Bypass {13, [kLtAlu], [kLtClinit]}; -Def Bypass {11, [kLtClinit], [kLtStore1, kLtStore3plus], Store}; +Def Bypass {11, [kLtClinit], [kLtStore1, kLtStore3plus]}; Def Bypass {11, [kLtClinit], [kLtR2f]}; Def Bypass {13, [kLtClinit], [kLtR2fCvt]}; Def Bypass {1, [kLtShiftReg], [kLtAdrpLdr]}; Def Bypass {2, [kLtAlu, kLtAluShift, kLtAluExtr], [kLtAdrpLdr]}; Def Bypass {3, [kLtMul, kLtLoad1], [kLtAdrpLdr]}; Def Bypass {5, [kLtAdrpLdr], [kLtAlu]}; -Def Bypass {3, [kLtAdrpLdr], [kLtStore1, kLtStore3plus], Store}; +Def Bypass {3, [kLtAdrpLdr], [kLtStore1, kLtStore3plus]}; Def Bypass {3, [kLtAdrpLdr], [kLtR2f]}; Def Bypass {5, [kLtAdrpLdr], [kLtR2fCvt]}; Def Bypass {7, [kLtClinitTail], [kLtAlu]}; -Def Bypass {5, [kLtClinitTail], [kLtStore1, kLtStore3plus], Store}; +Def Bypass {5, [kLtClinitTail], [kLtStore1, kLtStore3plus]}; Def Bypass {5, [kLtClinitTail], [kLtR2f]}; Def Bypass {7, [kLtClinitTail], [kLtR2fCvt]}; diff --git a/src/mapleall/maple_be/include/ad/mad.h b/src/mapleall/maple_be/include/ad/mad.h index 03b5c9aacc2ca9150fb84d1a7ed21596bd0eaef6..30fdb953fae8baab2bbbcf7b815c087c32a41e14 100644 --- a/src/mapleall/maple_be/include/ad/mad.h +++ b/src/mapleall/maple_be/include/ad/mad.h @@ -22,6 +22,7 @@ #include "insn.h" namespace maplebe { +constexpr int kOccupyWidth = 32; enum UnitId : maple::uint32 { #include "mplad_unit_id.def" kUnitIdLast @@ -72,15 +73,14 @@ class Unit { const std::vector &GetCompositeUnits() const; std::string GetName() const; - bool IsFree(uint32 cost) const; - void Occupy(const Insn &insn, uint32 cycle); // old interface - void Occupy(uint32 cost, std::vector &visited); // new interface + bool IsIdle(uint32 cycle) const; + void Occupy(uint32 cycle); void Release(); - void AdvanceCycle(); + void AdvanceOneCycle(); void Dump(int indent = 0) const; - std::bitset<32> GetOccupancyTable() const; + std::bitset GetOccupancyTable() const; - void SetOccupancyTable(std::bitset<32> value) { + void SetOccupancyTable(const std::bitset value) { occupancyTable = value; } @@ -89,8 +89,8 @@ class Unit { enum UnitId unitId; enum UnitType unitType; - // using 32-bit vector simulating resource occupation, the LSB always indicates the current cycle by AdvanceCycle - std::bitset<32> occupancyTable; + // using 32-bit vector simulating resource occupation, the LSB always indicates the current cycle by AdvanceOneCycle + std::bitset occupancyTable; std::vector compositeUnits; }; @@ -178,10 +178,10 @@ class MAD { int GetLatency(const Insn &def, const Insn &use) const; int DefaultLatency(const Insn &insn) const; Reservation *FindReservation(const Insn &insn) const; - void AdvanceCycle() const; + void AdvanceOneCycleForAll() const; void ReleaseAllUnits() const; - void SaveStates(std::vector> &occupyTable, int size) const; - void RestoreStates(std::vector> &occupyTable, int size) const; + void SaveStates(std::vector> &occupyTable, int size) const; + void RestoreStates(std::vector> &occupyTable, int size) const; int GetMaxParallelism() const { return parallelism; @@ -240,10 +240,10 @@ class AccumulatorBypass : public Bypass { bool CanBypass(const Insn &defInsn, const Insn &useInsn) const override; }; -class StoreBypass : public Bypass { +class StoreAddrBypass : public Bypass { public: - StoreBypass(LatencyType d, LatencyType u, int l) : Bypass(d, u, l) {} - ~StoreBypass() override = default; + StoreAddrBypass(LatencyType d, LatencyType u, int l) : Bypass(d, u, l) {} + ~StoreAddrBypass() override = default; bool CanBypass(const Insn &defInsn, const Insn &useInsn) const override; }; diff --git a/src/mapleall/maple_be/include/be/lower.h b/src/mapleall/maple_be/include/be/lower.h index a6395effb32d0951ccae95cca72cb8d5e76ef2cf..068a677f731e7da7aacafc17b1bec21b52f4298d 100644 --- a/src/mapleall/maple_be/include/be/lower.h +++ b/src/mapleall/maple_be/include/be/lower.h @@ -171,8 +171,8 @@ class CGLowerer { BaseNode *LowerArray(ArrayNode &array, const BaseNode &parent); BaseNode *LowerCArray(ArrayNode &array); - DassignNode *SaveReturnValueInLocal(StIdx stIdx, uint16 fieldID, StmtNode *&beforeStmt); - BaseNode *NeedRetypeWhenLowerCallAssigned(PrimType pType, StmtNode *&beforeStmt); + DassignNode *SaveReturnValueInLocal(StIdx stIdx, uint16 fieldID); + BaseNode *NeedRetypeWhenLowerCallAssigned(PrimType pType); void LowerCallStmt(StmtNode &stmt, StmtNode *&nextStmt, BlockNode &newBlk, MIRType *retty = nullptr, bool uselvar = false, bool isIntrinAssign = false); BlockNode *LowerIntrinsiccallAassignedToAssignStmt(IntrinsiccallNode &intrinsicCall); @@ -347,6 +347,9 @@ class CGLowerer { BaseNode *GetClassInfoExpr(const std::string &classInfo) const; BaseNode *GetBaseNodeFromCurFunc(MIRFunction &curFunc, bool isFromJarray); + BaseNode *LowerImplicitCvt(PrimType toType, BaseNode &expr); + void LowerImplicitCvt(BlockNode &block); + OptionFlag options = 0; bool needBranchCleanup = false; bool hasTry = false; diff --git a/src/mapleall/maple_be/include/cg/aarch64/aarch64_MPISel.h b/src/mapleall/maple_be/include/cg/aarch64/aarch64_MPISel.h index d3110f29c8021103ae8c9273879c000562e1f91e..fead5b953aaa2a24a20b840edb2e2256a4ed1ccc 100644 --- a/src/mapleall/maple_be/include/cg/aarch64/aarch64_MPISel.h +++ b/src/mapleall/maple_be/include/cg/aarch64/aarch64_MPISel.h @@ -41,7 +41,7 @@ class AArch64MPIsel : public MPISel { void SelectIntrinCall(IntrinsiccallNode &intrinsiccallNode) override; void SelectAggIassign(IassignNode &stmt, Operand &addrOpnd, Operand &opndRhs) override; void SelectAggDassign(maplebe::MirTypeInfo &lhsInfo, MemOperand &symbolMem, Operand &opndRh, - const DassignNode &stmt) override; + DassignNode &stmt) override; void SelectAggCopy(MemOperand &lhs, MemOperand &rhs, uint32 copySize) override; void SelectRangeGoto(RangeGotoNode &rangeGotoNode, Operand &srcOpnd) override; void SelectCondGoto(CondGotoNode &stmt, BaseNode &condNode) override; @@ -87,6 +87,7 @@ class AArch64MPIsel : public MPISel { Operand *SelectCstrncmp(IntrinsicopNode &node, Operand &opnd0, const BaseNode &parent) override; Operand *SelectCstrchr(IntrinsicopNode &node, Operand &opnd0, const BaseNode &parent) override; Operand *SelectCstrrchr(IntrinsicopNode &node, Operand &opnd0, const BaseNode &parent) override; + void SelectCprefetch(IntrinsiccallNode &intrinsiccallNode) override; Operand *SelectAbs(UnaryNode &node, Operand &opnd0, const BaseNode &parent) override; void SelectAsm(AsmNode &node) override; private: diff --git a/src/mapleall/maple_be/include/cg/aarch64/aarch64_abi.h b/src/mapleall/maple_be/include/cg/aarch64/aarch64_abi.h index 9f3118688e087c0cd4d0e3237c6b44c52294ef80..48d17ce63db9f12d7f40c11828c23989e35cd85e 100644 --- a/src/mapleall/maple_be/include/cg/aarch64/aarch64_abi.h +++ b/src/mapleall/maple_be/include/cg/aarch64/aarch64_abi.h @@ -27,7 +27,9 @@ constexpr uint32 kNumIntParmRegs = 8; constexpr uint32 kNumFloatParmRegs = 8; constexpr int32 kYieldPointReservedReg = 19; constexpr uint32 kNormalUseOperandNum = 3; +constexpr uint32 kMaxInstrForTbnz = 8000; // approximately less than (2^13); constexpr uint32 kMaxInstrForCondBr = 260000; // approximately less than (2^18); +constexpr uint32 kMaxInstrForLdr = 260000; // approximately less than (2^18); constexpr AArch64reg kIntReturnRegs[kNumIntParmRegs] = { R0, R1, R2, R3, R4, R5, R6, R7 }; constexpr AArch64reg kFloatReturnRegs[kNumFloatParmRegs] = { V0, V1, V2, V3, V4, V5, V6, V7 }; diff --git a/src/mapleall/maple_be/include/cg/aarch64/aarch64_aggressive_opt.h b/src/mapleall/maple_be/include/cg/aarch64/aarch64_aggressive_opt.h index d24d08624807259fb27285e333dd3e06c124e126..f42076849466c62477ab62a0e92d6ec3420f48d9 100644 --- a/src/mapleall/maple_be/include/cg/aarch64/aarch64_aggressive_opt.h +++ b/src/mapleall/maple_be/include/cg/aarch64/aarch64_aggressive_opt.h @@ -30,6 +30,7 @@ class AArch64CombineRedundantX16Opt { void Run(); private: + // Record memory instructions that use x16 info struct UseX16InsnInfo { void InsertAddPrevInsns(MapleVector &recentPrevInsns) const { for (auto insn : recentPrevInsns) { @@ -37,27 +38,46 @@ class AArch64CombineRedundantX16Opt { } } - uint32 infoId = 0; + uint32 infoId = 0; // unique id of the info, which is accumulated - Insn *memInsn = nullptr; + Insn *memInsn = nullptr; // the memory instruction that use x16. e.g. ldr x1, [x16, #8] + // If there has x16 accumulation, record all related instructions. + // e.g. + // add x16, sp, #1, LSL #12 ----> push in $addPrevInsns + // add x16, x16, #512 ----> set $addInsn + // str x1, [x16, #8] MapleVector *addPrevInsns = nullptr; - Insn *addInsn = nullptr; - - uint32 memSize = 0; - int64 originalOfst = 0; - int64 curOfst = 0; - int64 curAddImm = 0; - + Insn *addInsn = nullptr; // the split instruction that def x16 + + uint32 memSize = 0; // used to calculate valid offset in memory instruction + int64 originalOfst = 0; // the offset before optimize of memory instruction + int64 curOfst = 0; // the offset after optimize of memory instruction + int64 curAddImm = 0; // the split immediate after optimize of x16-add + + // The offset of memory instruction is in a valid range, + // so we use min-value and max-value to indicate the valid split immediate range: [minValidAddImm, maxValidAddImm], + // values within the range are all valid for the current $memInsn + // e.g. + // a valid split immediate case: + // add x16, useOpnd, #minValidAddImm + // str x1, [x16, #validOffset] int64 minValidAddImm = 0; int64 maxValidAddImm = 0; }; + // Record related info after combining optimization struct CombineInfo { + // the first found common split immediate that satisfies all memInsns in the current segment int64 combineAddImm = 0; + // e.g. add x16, x10(addUseOpnd), #1024 RegOperand *addUseOpnd = nullptr; + // Because the offsets of memory insns are discrete points, and the multiple requirements must be met, + // therefore, there may be multiple splitting x16-def insns shared within a segment. MapleVector *combineUseInfos = nullptr; }; + // The minimum unit of the combine optimization, + // the instructions in it can all share the same value split by x16. struct SegmentInfo { MapleVector *segUseInfos = nullptr; MapleVector *segCombineInfos = nullptr; @@ -70,15 +90,12 @@ class AArch64CombineRedundantX16Opt { } segmentInfo->segCombineInfos->clear(); - if (clearX16Def) { - recentX16DefPrevInsns->clear(); - recentX16DefInsn = nullptr; - recentSplitUseOpnd = nullptr; - } + recentX16DefPrevInsns->clear(); + recentX16DefInsn = nullptr; + recentSplitUseOpnd = nullptr; recentAddImm = 0; isSameAddImm = true; - clearX16Def = false; isX16Used = false; hasUseOpndReDef = false; isSpecialX16Def = false; @@ -88,6 +105,7 @@ class AArch64CombineRedundantX16Opt { void ClearSegmentInfo(MemPool *tmpMp, MapleAllocator *tmpAlloc); void ResetInsnId(); bool IsEndOfSegment(const Insn &insn, bool hasX16Def); + void ProcessAtEndOfSegment(BB &bb, Insn &insn, bool hasX16Def, MemPool *localMp, MapleAllocator *localAlloc); void ComputeRecentAddImm(); void RecordRecentSplitInsnInfo(Insn &insn); bool IsUseX16MemInsn(const Insn &insn) const; @@ -117,10 +135,12 @@ class AArch64CombineRedundantX16Opt { RegOperand *recentSplitUseOpnd = nullptr; int64 recentAddImm = 0; bool isSameAddImm = true; - bool clearX16Def = false; bool isX16Used = false; bool hasUseOpndReDef = false; bool isSpecialX16Def = false; // For ignoring movz/movk that def x16 pattern + // We only care about x16 def insns for splitting, such as add*/mov*. + // This filed identifies whether the x16 def insn is irrelevant, for example, ubfx/sub ... + bool isIrrelevantX16Def = false; }; class AArch64AggressiveOpt : public CGAggressiveOpt { diff --git a/src/mapleall/maple_be/include/cg/aarch64/aarch64_cgfunc.h b/src/mapleall/maple_be/include/cg/aarch64/aarch64_cgfunc.h index 26736bd435dfff8687fda951371499411f572971..e26a34894bc1ae0471f66225b92c1b3f710ddb9c 100644 --- a/src/mapleall/maple_be/include/cg/aarch64/aarch64_cgfunc.h +++ b/src/mapleall/maple_be/include/cg/aarch64/aarch64_cgfunc.h @@ -122,14 +122,14 @@ class AArch64CGFunc : public CGFunc { bool LmbcSmallAggForCall(BlkassignoffNode &bNode, const Operand *src, std::vector **parmList); bool GetNumReturnRegsForIassignfpoff(MIRType &rType, PrimType &primType, uint32 &numRegs); void GenIassignfpoffStore(Operand &srcOpnd, int32 offset, uint32 byteSize, PrimType primType); - void SelectAggDassign(const DassignNode &stmt) override; + void SelectAggDassign(DassignNode &stmt) override; void SelectIassign(IassignNode &stmt) override; void SelectIassignoff(IassignoffNode &stmt) override; void SelectIassignfpoff(IassignFPoffNode &stmt, Operand &opnd) override; void SelectIassignspoff(PrimType pTy, int32 offset, Operand &opnd) override; void SelectBlkassignoff(BlkassignoffNode &bNode, Operand &src) override; void SelectAggIassign(IassignNode &stmt, Operand &addrOpnd) override; - void GenLdStForAggIassign(uint64 ofst, uint32 rhsOffset, uint32 lhsOffset, RegOperand &rhsAddrOpnd, + void GenLdStForAggIassign(IassignNode &stmt, uint64 ofst, uint32 rhsOffset, uint32 lhsOffset, RegOperand &rhsAddrOpnd, Operand &lhsAddrOpnd, uint32 memOpndSize, regno_t vRegNO, bool isRefField); void SelectReturnSendOfStructInRegs(BaseNode *x) override; void SelectReturn(Operand *opnd0) override; @@ -173,10 +173,13 @@ class AArch64CGFunc : public CGFunc { Operand *SelectAtomicLoad(Operand &addrOpnd, PrimType primType, AArch64isa::MemoryOrdering memOrder); Operand *SelectCAtomicFetch(IntrinsicopNode &intrinopNode, SyncAndAtomicOp op, bool fetchBefore) override; Operand *SelectCReturnAddress(IntrinsicopNode &intrinopNode) override; + Operand *SelectCAllocaWithAlign(IntrinsicopNode &intrinsicopNode) override; void SelectCAtomicExchange(const IntrinsiccallNode &intrinsiccallNode) override; Operand *SelectCAtomicCompareExchange(const IntrinsicopNode &intrinsicopNode, bool isCompareExchangeN) override; Operand *SelectCAtomicTestAndSet(const IntrinsicopNode &intrinsicopNode) override; void SelectCAtomicClear(const IntrinsiccallNode &intrinsiccallNode) override; + void SelectCprefetch(IntrinsiccallNode &intrinsiccallNode) override; + void SelectCclearCache(IntrinsiccallNode &intrinsiccallNode) override; void SelectMembar(StmtNode &membar) override; void SelectComment(CommentNode &comment) override; @@ -302,7 +305,9 @@ class AArch64CGFunc : public CGFunc { Operand *SelectLazyLoadStatic(MIRSymbol &st, int64 offset, PrimType primType) override; Operand *SelectLoadArrayClassCache(MIRSymbol &st, int64 offset, PrimType primType) override; RegOperand &SelectCopy(Operand &src, PrimType stype, PrimType dtype) override; - void SelectCopy(Operand &dest, PrimType dtype, Operand &src, PrimType stype); + // Use BaseNode to set memory-related instructions reference info, + // For other instructions, this field is nullptr. + void SelectCopy(Operand &dest, PrimType dtype, Operand &src, PrimType stype, BaseNode *baseNode = nullptr); void SelectCopyImm(Operand &dest, PrimType dType, ImmOperand &src, PrimType sType); void SelectCopyImm(Operand &dest, ImmOperand &src, PrimType dtype); void SelectLibCall(const std::string &funcName, std::vector &opndVec, PrimType primType, @@ -389,7 +394,7 @@ class AArch64CGFunc : public CGFunc { void PrepareVectorOperands(Operand **o1, PrimType &oty1, Operand **o2, PrimType &oty2); RegOperand *AdjustOneElementVectorOperand(PrimType oType, RegOperand *opnd); - bool DistanceCheck(const BB &bb, LabelIdx targLabIdx, uint32 targId) const; + bool DistanceCheck(const BB &bb, LabelIdx targLabIdx, uint32 targId, uint32 maxDistance) const; PrimType FilterOneElementVectorType(PrimType origTyp) const { return origTyp == PTY_v1i64 || origTyp == PTY_v1u64 ? PTY_f64 : origTyp; @@ -400,6 +405,7 @@ class AArch64CGFunc : public CGFunc { Operand &high; }; + void SetMemReferenceOfInsn(Insn &insn, BaseNode *baseNode); struct SplittedInt128 SplitInt128(Operand &opnd); RegOperand &CombineInt128(const SplittedInt128 parts); void CombineInt128(Operand &resOpnd, const SplittedInt128 parts); @@ -534,6 +540,8 @@ class AArch64CGFunc : public CGFunc { RegOperand *LmbcStructReturnLoad(int32 offset); RegOperand *GetBaseReg(const SymbolAlloc &symAlloc) override; int32 GetBaseOffset(const SymbolAlloc &symbolAlloc) override; + void AddPseudoRetInsns(BB &bb) override; + void AddPseudoRetInsnsInExitBBs() override; Operand &CreateCommentOperand(const std::string &s) const { return *memPool->New(s, *memPool); @@ -670,8 +678,6 @@ class AArch64CGFunc : public CGFunc { uCatch.opndCatch = &opnd; } - AArch64reg GetReturnRegisterNumber(); - MOperator PickStInsn(uint32 bitSize, PrimType primType, AArch64isa::MemoryOrdering memOrd = AArch64isa::kMoNone) const; MOperator PickLdInsn(uint32 bitSize, PrimType primType, @@ -800,6 +806,9 @@ class AArch64CGFunc : public CGFunc { void SetStoreFP(bool val) { storeFP = val; } + LabelIdx GetLabelInInsn(Insn &insn) override { + return static_cast(insn.GetOperand(AArch64isa::GetJumpTargetIdx(insn))).GetLabelIndex(); + } private: enum RelationOperator : uint8 { @@ -868,10 +877,10 @@ class AArch64CGFunc : public CGFunc { MIRType *lmbcCallReturnType = nullptr; bool storeFP = false; - void SelectLoadAcquire(Operand &dest, PrimType dtype, Operand &src, PrimType stype, - AArch64isa::MemoryOrdering memOrd, bool isDirect); + void SelectLoadAcquire(Operand &dest, PrimType dtype, Operand &src, PrimType stype, AArch64isa::MemoryOrdering memOrd, + bool isDirect, BaseNode *baseNode = nullptr); void SelectStoreRelease(Operand &dest, PrimType dtype, Operand &src, PrimType stype, - AArch64isa::MemoryOrdering memOrd, bool isDirect); + AArch64isa::MemoryOrdering memOrd, bool isDirect, BaseNode *baseNode = nullptr); MOperator PickJmpInsn(Opcode brOp, Opcode cmpOp, bool isFloat, bool isSigned) const; bool IsFrameReg(const RegOperand &opnd) const override; @@ -953,9 +962,10 @@ class AArch64CGFunc : public CGFunc { Operand *SelectRoundLibCall(RoundType roundType, const TypeCvtNode &node, Operand &opnd0); Operand *SelectRoundOperator(RoundType roundType, const TypeCvtNode &node, Operand &opnd0, const BaseNode &parent); Operand *SelectAArch64align(const IntrinsicopNode &intrnNode, bool isUp /* false for align down */); - void SelectCopyMemOpnd(Operand &dest, PrimType dtype, uint32 dsize, Operand &src, PrimType stype); - void SelectCopyRegOpnd(Operand &dest, PrimType dtype, Operand::OperandType opndType, uint32 dsize, Operand &src, - PrimType stype); + void SelectCopyMemOpnd(Operand &dest, PrimType dtype, uint32 dsize, Operand &src, PrimType stype, + BaseNode *baseNode = nullptr); + void SelectCopyRegOpnd(Operand &dest, PrimType dtype, Operand::OperandType opndType, uint32 dsize, + Operand &src, PrimType stype, BaseNode *baseNode = nullptr); bool GenerateCompareWithZeroInstruction(Opcode jmpOp, Opcode cmpOp, bool is64Bits, PrimType primType, LabelOperand &targetOpnd, Operand &opnd0); void GenCVaStartIntrin(RegOperand &opnd, uint32 stkSize); @@ -969,6 +979,7 @@ class AArch64CGFunc : public CGFunc { bool SelectTLSModelByPreemptibility(Operand &result, StImmOperand &stImm, bool isShlib); void SelectAddrofThreadLocal(Operand &result, StImmOperand &stImm); void SelectThreadAnchor(Operand &result, StImmOperand &stImm); + void SelectThreadWarmup(Operand &result, StImmOperand &stImm); void SelectCTlsLocalDesc(Operand &result, StImmOperand &stImm); void SelectCTlsGlobalDesc(Operand &result, StImmOperand &stImm); void SelectCTlsGotDesc(Operand &result, StImmOperand &stImm); @@ -985,7 +996,8 @@ class AArch64CGFunc : public CGFunc { Operand *SelectAArch64CAtomicFetch(const IntrinsicopNode &intrinopNode, SyncAndAtomicOp op, bool fetchBefore); Operand *SelectAArch64CSyncFetch(const IntrinsicopNode &intrinopNode, SyncAndAtomicOp op, bool fetchBefore); /* Helper functions for translating complex Maple IR instructions/inrinsics */ - void SelectDassign(StIdx stIdx, FieldID fieldId, PrimType rhsPType, Operand &opnd0); + void SelectDassign(const StIdx stIdx, FieldID fieldId, PrimType rhsPType, + Operand &opnd0, DassignNode *stmt = nullptr); LabelIdx CreateLabeledBB(StmtNode &stmt); void SaveReturnValueInLocal(CallReturnVector &retVals, size_t index, PrimType primType, Operand &value, StmtNode &parentStmt); @@ -1024,9 +1036,8 @@ class AArch64CGFunc : public CGFunc { Insn *AggtStrLdrInsert(bool bothUnion, Insn *lastStrLdr, Insn &newStrLdr); MemOperand &CreateMemOpndForStatic(const MIRSymbol &symbol, int64 offset, uint32 size, bool needLow12, RegOperand *regOp); - LabelIdx GetLabelInInsn(Insn &insn) override { - return static_cast(insn.GetOperand(AArch64isa::GetJumpTargetIdx(insn))).GetLabelIndex(); - } + Operand *DoAlloca(const BaseNode &expr, Operand &opnd0, size_t extraAlignment); + void CheckAndSetStackProtectInfoWithAddrof(const MIRSymbol &symbol) { // 1. if me performs stack protection check, doesn't need to set stack protect // 2. only addressing variables on the stack, need to set stack protect diff --git a/src/mapleall/maple_be/include/cg/aarch64/aarch64_data_dep_base.h b/src/mapleall/maple_be/include/cg/aarch64/aarch64_data_dep_base.h index 712421043f41b1b70e13ca6ee229dfd7874e180b..64656bdedc66171bdcc765440be0191cea4d4164 100644 --- a/src/mapleall/maple_be/include/cg/aarch64/aarch64_data_dep_base.h +++ b/src/mapleall/maple_be/include/cg/aarch64/aarch64_data_dep_base.h @@ -27,8 +27,7 @@ class AArch64DataDepBase : public DataDepBase { void InitCDGNodeDataInfo(MemPool &mp, MapleAllocator &alloc, CDGNode &cdgNode) override; bool IsFrameReg(const RegOperand &opnd) const override; - bool NeedBuildDepsForStackMem(const Insn &memInsn1, const Insn &memInsn2) const; - bool NeedBuildDepsForHeapMem(const Insn &memInsn1, const Insn &memInsn2) const; + Insn *GetMemBaseDefInsn(const Insn &memInsn) const; void AnalysisAmbiInsns(BB &bb) override; @@ -60,4 +59,4 @@ class AArch64DataDepBase : public DataDepBase { }; } -#endif /* MAPLEBE_INCLUDE_CG_AARCH64_AARCH64_DATA_DEP_BASE_H */ +#endif // MAPLEBE_INCLUDE_CG_AARCH64_AARCH64_DATA_DEP_BASE_H diff --git a/src/mapleall/maple_be/include/cg/aarch64/aarch64_emitter.h b/src/mapleall/maple_be/include/cg/aarch64/aarch64_emitter.h index 520e2275a1d71310ad81733b1ae8dde7ebd864b0..27384a0f03d789e34017957053b886d1b69462bc 100644 --- a/src/mapleall/maple_be/include/cg/aarch64/aarch64_emitter.h +++ b/src/mapleall/maple_be/include/cg/aarch64/aarch64_emitter.h @@ -59,10 +59,12 @@ class AArch64AsmEmitter : public AsmEmitter { void EmitCheckThrowPendingException(Emitter &emitter) const; void EmitCTlsDescRel(Emitter &emitter, const Insn &insn) const; // emit instrinsic for local-exec TLS model void EmitCTlsDescCall(Emitter &emitter, const Insn &insn) const; // emit instrinsic for general dynamic TLS mode + void EmitCTlsDescCallWarmup(Emitter &emitter, const Insn &insn) const; // emit hack instrinsic for local dynamic opt void EmitCTlsDescGot(Emitter &emitter, const Insn &insn) const; // emit instrinsic for initial-exec TLS model void EmitCTlsLoadTdata(Emitter &emitter, const Insn &insn) const; // emit instrinsic for warmup-dynamic TLS model void EmitCTlsLoadTbss(Emitter &emitter, const Insn &insn) const; // emit instrinsic for warmup-dynamic TLS model void EmitSyncLockTestSet(Emitter &emitter, const Insn &insn) const; + void EmitPrefetch(Emitter &emitter, const Insn &insn) const; void PrepareVectorOperand(RegOperand *regOpnd, uint32 &compositeOpnds, Insn &insn) const; bool CheckInsnRefField(const Insn &insn, uint32 opndIndex) const; diff --git a/src/mapleall/maple_be/include/cg/aarch64/aarch64_fixshortbranch.h b/src/mapleall/maple_be/include/cg/aarch64/aarch64_fixshortbranch.h index fe65b0bee1e3d6ce0d2f85727e6abbdba921700d..355a0ba3245cb65dc80cceffbbba3df84b9e8b67 100644 --- a/src/mapleall/maple_be/include/cg/aarch64/aarch64_fixshortbranch.h +++ b/src/mapleall/maple_be/include/cg/aarch64/aarch64_fixshortbranch.h @@ -26,24 +26,29 @@ class AArch64FixShortBranch { ~AArch64FixShortBranch() = default; void FixShortBranches() const; void FixShortBranchesForSplitting(); + // for long branch which exceeds size of imm19, we need to insert pad. + // see InsertJumpPad to know how we do this. + void PatchLongBranch(); + void FixLdr(); private: CGFunc *cgFunc = nullptr; BB *boundaryBB = nullptr; BB *lastBB = nullptr; - /* For long branch caused by cold-hot bb splitting , - * insert an unconditional branch at the end section in order to minimize the negative impact - * From To - * cond_br target_label cond_br new_label - * fallthruBB fallthruBB - * [section end] - * new_label: - * unconditional br target_label - */ + // For long branch caused by cold-hot bb splitting , + // insert an unconditional branch at the end section in order to minimize the negative impact + // From To + // cond_br target_label cond_br new_label + // fallthruBB fallthruBB + // [section end] + // new_label: + // unconditional br target_label void InsertJmpPadAtSecEnd(Insn &insn, uint32 targetLabelIdx, BB &targetBB); void InitSecEnd(); uint32 CalculateAlignRange(const BB &bb, uint32 addr) const; + uint32 CalculateIfBBNum() const; void SetInsnId() const; + bool CheckFunctionSize(uint32 maxSize) const; }; /* class AArch64ShortBranch */ MAPLE_FUNC_PHASE_DECLARE_BEGIN(CgFixShortBranch, maplebe::CGFunc) diff --git a/src/mapleall/maple_be/include/cg/aarch64/aarch64_global_schedule.h b/src/mapleall/maple_be/include/cg/aarch64/aarch64_global_schedule.h index e576e5fe36432497df7dc1ae228db4832155a9ed..418fd196d14146c9f626ae83e1af6f60359df0e3 100644 --- a/src/mapleall/maple_be/include/cg/aarch64/aarch64_global_schedule.h +++ b/src/mapleall/maple_be/include/cg/aarch64/aarch64_global_schedule.h @@ -29,9 +29,7 @@ class AArch64GlobalSchedule : public GlobalSchedule { void VerifyingSchedule(CDGRegion ®ion) override; protected: - void InitInCDGNode(CDGRegion ®ion, CDGNode &cdgNode, MemPool *cdgNodeMp) override; void FinishScheduling(CDGNode &cdgNode) override; - void DumpInsnInfoByScheduledOrder(CDGNode &cdgNode) const override; }; } /* namespace maplebe */ diff --git a/src/mapleall/maple_be/include/cg/aarch64/aarch64_ico.h b/src/mapleall/maple_be/include/cg/aarch64/aarch64_ico.h index e7632c3dfb6e9061662d2314a5c71dba87bdddd6..09b651860b5d2ce47164e7a058eda90840616223 100755 --- a/src/mapleall/maple_be/include/cg/aarch64/aarch64_ico.h +++ b/src/mapleall/maple_be/include/cg/aarch64/aarch64_ico.h @@ -36,9 +36,12 @@ class AArch64ICOPattern : public ICOPattern { ConditionCode Encode(MOperator mOp, bool inverse) const; Insn *BuildCmpInsn(const Insn &condBr) const; Insn *BuildCcmpInsn(ConditionCode ccCode, ConditionCode ccCode2, const Insn &cmpInsn, Insn *&moveInsn) const; + Insn *BuildCcmpInsn(ConditionCode ccCode, ConditionCode ccCode2, const Insn &branchInsn, const Insn &cmpInsn) const; + MOperator GetBranchCondOpcode(MOperator op) const; Insn *BuildCondSet(const Insn &branch, RegOperand ®, bool inverse) const; Insn *BuildCondSetMask(const Insn &branch, RegOperand ®, bool inverse) const; Insn *BuildCondSel(const Insn &branch, MOperator mOp, RegOperand &dst, RegOperand &src1, RegOperand &src2) const; + Insn *BuildTstInsn(const Insn &branch) const; static uint32 GetNZCV(ConditionCode ccCode, bool inverse); bool CheckMop(MOperator mOperator) const; bool CheckMopOfCmp(MOperator mOperator) const; @@ -63,7 +66,7 @@ class AArch64ICOIfThenElsePattern : public AArch64ICOPattern { }; explicit AArch64ICOIfThenElsePattern(CGFunc &func) : AArch64ICOPattern(func) { - patternName = "IfthenElsePattern"; + patternName = "IfThenElsePattern"; } ~AArch64ICOIfThenElsePattern() override { cmpBB = nullptr; @@ -123,6 +126,8 @@ class AArch64ICOSameCondPattern : public AArch64ICOPattern { bool Optimize(BB &secondIfBB) override; protected: bool DoOpt(BB &firstIfBB, BB &secondIfBB) const; + bool CanConvertToSameCond(BB &firstIfBB, BB &secondIfBB) const; + Insn &ConvertCompBrInsnToCompInsn(const Insn &insn) const; }; /* If-Then MorePreds pattern @@ -203,6 +208,34 @@ class AArch64ICOCondSetPattern : public AArch64ICOPattern { // brInsn is last branch insn in firstMovBB, which is 'b .L.1827__42' in pattern1 above. Insn *brInsn = nullptr; }; -} /* namespace maplebe */ + +// .L.1676__17: +// tbz w1, #0, .L.1676__14 and w2, w1, #3 +// .L.1676__18: => cmp w2, #3 +// tbz w1, #1, .L.1676__14 bne .L.1676__14 +// +// condition: +// 1.the curBB lastInsn and the nextBB firstInsn must be xtbz/xtbnz/wtbz/wtbnz +// 2.the curBB and the nextBB jump to the same target and test the same register +// 3.the curBB and the nextBB test the adjacent bits +// 4.nextBB can only have one pred +class AArch64ICOMergeTbzPattern : public AArch64ICOPattern { + public: + explicit AArch64ICOMergeTbzPattern(CGFunc &func) : AArch64ICOPattern(func) { + patternName = "MergeTbzPattern"; + } + ~AArch64ICOMergeTbzPattern() override { + lastInsnOfcurBB = nullptr; + firstInsnOfnextBB = nullptr; + } + bool Optimize(BB &curBB) override; + protected: + bool DoOpt(BB &curBB, BB &nextBB) const; + bool IsTbzOrTbnzInsn(const Insn *insn) const; + private: + Insn *lastInsnOfcurBB = nullptr; + Insn *firstInsnOfnextBB = nullptr; +}; +} // namespace maplebe #endif /* MAPLEBE_INCLUDE_CG_AARCH64_AARCH64_ICO_H */ diff --git a/src/mapleall/maple_be/include/cg/aarch64/aarch64_imm_valid.h b/src/mapleall/maple_be/include/cg/aarch64/aarch64_imm_valid.h index c9f2e7c296ea7af8d61188dd1358d6eedfc6b873..1a314ae8f290b010811c0120469d52b834993ded 100644 --- a/src/mapleall/maple_be/include/cg/aarch64/aarch64_imm_valid.h +++ b/src/mapleall/maple_be/include/cg/aarch64/aarch64_imm_valid.h @@ -59,6 +59,13 @@ bool IsBitmaskImmediate(uint64 val, uint32 bitLen); using namespace aarch64; inline bool IsSingleInstructionMovable32(int64 value) { + // When value & ffffffff00000000 is 0, all high 32-bits are 0. + // When value & ffffffff00000000 is ffffffff00000000, all high 32-bits are 1. + // High 32-bits should be all 0 or all 1, when it comes to mov w0, #imm. + if ((static_cast(value) & 0xffffffff00000000ULL) != 0 && + (static_cast(value) & 0xffffffff00000000ULL) != 0xffffffff00000000ULL) { + return false; + } return (IsMoveWidableImmediateCopy(static_cast(value), 32) || IsMoveWidableImmediateCopy(~static_cast(value), 32) || IsBitmaskImmediate(static_cast(value), 32)); diff --git a/src/mapleall/maple_be/include/cg/aarch64/aarch64_intrinsic_desc.def b/src/mapleall/maple_be/include/cg/aarch64/aarch64_intrinsic_desc.def index c8b24c4e9aa12297dfc4d2e9552b56a376ef0d4f..2945d414de41c826f77f6782b29797755835862b 100644 --- a/src/mapleall/maple_be/include/cg/aarch64/aarch64_intrinsic_desc.def +++ b/src/mapleall/maple_be/include/cg/aarch64/aarch64_intrinsic_desc.def @@ -536,708 +536,708 @@ INTRINSICDESC(vector_trn2q_v8u16, MOP_vtrn2vvv, -1, {0, 1}) INTRINSICDESC(vector_trn2_v2u32, MOP_vtrn2uuu, -1, {0, 1}) INTRINSICDESC(vector_trn2q_v4u32, MOP_vtrn2vvv, -1, {0, 1}) INTRINSICDESC(vector_trn2q_v2u64, MOP_vtrn2vvv, -1, {0, 1}) -INTRINSICDESC(vector_ld1_i8v8, MOP_dldr, -1, {0}) -INTRINSICDESC(vector_ld1q_i8v16, MOP_qldr, -1, {0}) -INTRINSICDESC(vector_ld1_i16v4, MOP_dldr, -1, {0}) -INTRINSICDESC(vector_ld1q_i16v8, MOP_qldr, -1, {0}) -INTRINSICDESC(vector_ld1_i32v2, MOP_dldr, -1, {0}) -INTRINSICDESC(vector_ld1q_i32v4, MOP_qldr, -1, {0}) -INTRINSICDESC(vector_ld1_i64v1, MOP_dldr, -1, {0}) -INTRINSICDESC(vector_ld1q_i64v2, MOP_qldr, -1, {0}) -INTRINSICDESC(vector_ld1_u8v8, MOP_dldr, -1, {0}) -INTRINSICDESC(vector_ld1q_u8v16, MOP_qldr, -1, {0}) -INTRINSICDESC(vector_ld1_u16v4, MOP_dldr, -1, {0}) -INTRINSICDESC(vector_ld1q_u16v8, MOP_qldr, -1, {0}) -INTRINSICDESC(vector_ld1_u32v2, MOP_dldr, -1, {0}) -INTRINSICDESC(vector_ld1q_u32v4, MOP_qldr, -1, {0}) -INTRINSICDESC(vector_ld1_u64v1, MOP_dldr, -1, {0}) -INTRINSICDESC(vector_ld1q_u64v2, MOP_qldr, -1, {0}) -INTRINSICDESC(vector_ld1_lane_i8v8, MOP_vld1ub, 1, {0}, {{1,{1,2,1}}}) -INTRINSICDESC(vector_ld1q_lane_i8v16, MOP_vld1vb, 1, {0}, {{1,{1,2,1}}}) -INTRINSICDESC(vector_ld1_lane_i16v4, MOP_vld1uh, 1, {0}, {{1,{1,2,1}}}) -INTRINSICDESC(vector_ld1q_lane_i16v8, MOP_vld1vh, 1, {0}, {{1,{1,2,1}}}) -INTRINSICDESC(vector_ld1_lane_i32v2, MOP_vld1uw, 1, {0}, {{1,{1,2,1}}}) -INTRINSICDESC(vector_ld1q_lane_i32v4, MOP_vld1vw, 1, {0}, {{1,{1,2,1}}}) -INTRINSICDESC(vector_ld1_lane_i64v1, MOP_vld1ud, 1, {0}, {{1,{1,2,1}}}) -INTRINSICDESC(vector_ld1q_lane_i64v2, MOP_vld1vd, 1, {0}, {{1,{1,2,1}}}) -INTRINSICDESC(vector_ld1_lane_u8v8, MOP_vld1ub, 1, {0}, {{1,{1,2,1}}}) -INTRINSICDESC(vector_ld1q_lane_u8v16, MOP_vld1vb, 1, {0}, {{1,{1,2,1}}}) -INTRINSICDESC(vector_ld1_lane_u16v4, MOP_vld1uh, 1, {0}, {{1,{1,2,1}}}) -INTRINSICDESC(vector_ld1q_lane_u16v8, MOP_vld1vh, 1, {0}, {{1,{1,2,1}}}) -INTRINSICDESC(vector_ld1_lane_u32v2, MOP_vld1uw, 1, {0}, {{1,{1,2,1}}}) -INTRINSICDESC(vector_ld1q_lane_u32v4, MOP_vld1vw, 1, {0}, {{1,{1,2,1}}}) -INTRINSICDESC(vector_ld1_lane_u64v1, MOP_vld1ud, 1, {0}, {{1,{1,2,1}}}) -INTRINSICDESC(vector_ld1q_lane_u64v2, MOP_vld1vd, 1, {0}, {{1,{1,2,1}}}) -INTRINSICDESC(vector_ld1_dup_i8v8, MOP_vld1rub, -1, {0}, {{-1,{-1,-1,1}}}) -INTRINSICDESC(vector_ld1q_dup_i8v16, MOP_vld1rvb, -1, {0}, {{-1,{-1,-1,1}}}) -INTRINSICDESC(vector_ld1_dup_i16v4, MOP_vld1ruh, -1, {0}, {{-1,{-1,-1,1}}}) -INTRINSICDESC(vector_ld1q_dup_i16v8, MOP_vld1rvh, -1, {0}, {{-1,{-1,-1,1}}}) -INTRINSICDESC(vector_ld1_dup_i32v2, MOP_vld1ruw, -1, {0}, {{-1,{-1,-1,1}}}) -INTRINSICDESC(vector_ld1q_dup_i32v4, MOP_vld1rvw, -1, {0}, {{-1,{-1,-1,1}}}) -INTRINSICDESC(vector_ld1_dup_i64v1, MOP_vld1ud, -1, {0}, {{-1,{-1,-1,1}}}) -INTRINSICDESC(vector_ld1q_dup_i64v2, MOP_vld1rvd, -1, {0}, {{-1,{-1,-1,1}}}) -INTRINSICDESC(vector_ld1_dup_u8v8, MOP_vld1rub, -1, {0}, {{-1,{-1,-1,1}}}) -INTRINSICDESC(vector_ld1q_dup_u8v16, MOP_vld1rvb, -1, {0}, {{-1,{-1,-1,1}}}) -INTRINSICDESC(vector_ld1_dup_u16v4, MOP_vld1ruh, -1, {0}, {{-1,{-1,-1,1}}}) -INTRINSICDESC(vector_ld1q_dup_u16v8, MOP_vld1rvh, -1, {0}, {{-1,{-1,-1,1}}}) -INTRINSICDESC(vector_ld1_dup_u32v2, MOP_vld1ruw, -1, {0}, {{-1,{-1,-1,1}}}) -INTRINSICDESC(vector_ld1q_dup_u32v4, MOP_vld1rvw, -1, {0}, {{-1,{-1,-1,1}}}) -INTRINSICDESC(vector_ld1_dup_u64v1, MOP_vld1ud, -1, {0}, {{-1,{-1,-1,1}}}) -INTRINSICDESC(vector_ld1q_dup_u64v2, MOP_vld1rvd, -1, {0}, {{-1,{-1,-1,1}}}) -INTRINSICDESC(vector_tbl1_i8v8, MOP_vtbluvu, -1, {0, 1}, {{0,{-1,-1,1}}}) -INTRINSICDESC(vector_tbl1_u8v8, MOP_vtbluvu, -1, {0, 1}, {{0,{-1,-1,1}}}) -INTRINSICDESC(vector_qtbl1_i8v8, MOP_vtbluvu, -1, {0, 1}, {{0,{-1,-1,1}}}) -INTRINSICDESC(vector_qtbl1q_i8v16, MOP_vtblvvv, -1, {0, 1}, {{0,{-1,-1,1}}}) -INTRINSICDESC(vector_qtbl1_u8v8, MOP_vtbluvu, -1, {0, 1}, {{0,{-1,-1,1}}}) -INTRINSICDESC(vector_qtbl1q_u8v16, MOP_vtblvvv, -1, {0, 1}, {{0,{-1,-1,1}}}) -INTRINSICDESC(vector_qtbx1_i8v8, MOP_vtbxuvu, 0, {1, 2}, {{1,{-1,-1,1}}}) -INTRINSICDESC(vector_qtbx1q_i8v16, MOP_vtbxvvv, 0, {1, 2}, {{1,{-1,-1,1}}}) -INTRINSICDESC(vector_qtbx1_u8v8, MOP_vtbxuvu, 0, {1, 2}, {{1,{-1,-1,1}}}) -INTRINSICDESC(vector_qtbx1q_u8v16, MOP_vtbxvvv, 0, {1, 2}, {{1,{-1,-1,1}}}) -INTRINSICDESC(vector_hadd_i8v8, MOP_vshadduuu, -1, {0, 1}) -INTRINSICDESC(vector_haddq_i8v16, MOP_vshaddvvv, -1, {0, 1}) -INTRINSICDESC(vector_hadd_i16v4, MOP_vshadduuu, -1, {0, 1}) -INTRINSICDESC(vector_haddq_i16v8, MOP_vshaddvvv, -1, {0, 1}) -INTRINSICDESC(vector_hadd_i32v2, MOP_vshadduuu, -1, {0, 1}) -INTRINSICDESC(vector_haddq_i32v4, MOP_vshaddvvv, -1, {0, 1}) -INTRINSICDESC(vector_hadd_u8v8, MOP_vuhadduuu, -1, {0, 1}) -INTRINSICDESC(vector_haddq_u8v16, MOP_vuhaddvvv, -1, {0, 1}) -INTRINSICDESC(vector_hadd_u16v4, MOP_vuhadduuu, -1, {0, 1}) -INTRINSICDESC(vector_haddq_u16v8, MOP_vuhaddvvv, -1, {0, 1}) -INTRINSICDESC(vector_hadd_u32v2, MOP_vuhadduuu, -1, {0, 1}) -INTRINSICDESC(vector_haddq_u32v4, MOP_vuhaddvvv, -1, {0, 1}) -INTRINSICDESC(vector_rhadd_i8v8, MOP_vsrhadduuu, -1, {0, 1}) -INTRINSICDESC(vector_rhaddq_i8v16, MOP_vsrhaddvvv, -1, {0, 1}) -INTRINSICDESC(vector_rhadd_i16v4, MOP_vsrhadduuu, -1, {0, 1}) -INTRINSICDESC(vector_rhaddq_i16v8, MOP_vsrhaddvvv, -1, {0, 1}) -INTRINSICDESC(vector_rhadd_i32v2, MOP_vsrhadduuu, -1, {0, 1}) -INTRINSICDESC(vector_rhaddq_i32v4, MOP_vsrhaddvvv, -1, {0, 1}) -INTRINSICDESC(vector_rhadd_u8v8, MOP_vurhadduuu, -1, {0, 1}) -INTRINSICDESC(vector_rhaddq_u8v16, MOP_vurhaddvvv, -1, {0, 1}) -INTRINSICDESC(vector_rhadd_u16v4, MOP_vurhadduuu, -1, {0, 1}) -INTRINSICDESC(vector_rhaddq_u16v8, MOP_vurhaddvvv, -1, {0, 1}) -INTRINSICDESC(vector_rhadd_u32v2, MOP_vurhadduuu, -1, {0, 1}) -INTRINSICDESC(vector_rhaddq_u32v4, MOP_vurhaddvvv, -1, {0, 1}) -INTRINSICDESC(vector_addhn_i8v8, MOP_vaddhnuvv, -1, {0, 1}) -INTRINSICDESC(vector_addhn_i16v4, MOP_vaddhnuvv, -1, {0, 1}) -INTRINSICDESC(vector_addhn_i32v2, MOP_vaddhnuvv, -1, {0, 1}) -INTRINSICDESC(vector_addhn_u8v8, MOP_vaddhnuvv, -1, {0, 1}) -INTRINSICDESC(vector_addhn_u16v4, MOP_vaddhnuvv, -1, {0, 1}) -INTRINSICDESC(vector_addhn_u32v2, MOP_vaddhnuvv, -1, {0, 1}) -INTRINSICDESC(vector_addhn_high_i8v16, MOP_vaddhn2vvv, 0, {1, 2}) -INTRINSICDESC(vector_addhn_high_i16v8, MOP_vaddhn2vvv, 0, {1, 2}) -INTRINSICDESC(vector_addhn_high_i32v4, MOP_vaddhn2vvv, 0, {1, 2}) -INTRINSICDESC(vector_addhn_high_u8v16, MOP_vaddhn2vvv, 0, {1, 2}) -INTRINSICDESC(vector_addhn_high_u16v8, MOP_vaddhn2vvv, 0, {1, 2}) -INTRINSICDESC(vector_addhn_high_u32v4, MOP_vaddhn2vvv, 0, {1, 2}) -INTRINSICDESC(vector_raddhn_i8v8, MOP_vraddhnuvv, -1, {0, 1}) -INTRINSICDESC(vector_raddhn_i16v4, MOP_vraddhnuvv, -1, {0, 1}) -INTRINSICDESC(vector_raddhn_i32v2, MOP_vraddhnuvv, -1, {0, 1}) -INTRINSICDESC(vector_raddhn_u8v8, MOP_vraddhnuvv, -1, {0, 1}) -INTRINSICDESC(vector_raddhn_u16v4, MOP_vraddhnuvv, -1, {0, 1}) -INTRINSICDESC(vector_raddhn_u32v2, MOP_vraddhnuvv, -1, {0, 1}) -INTRINSICDESC(vector_raddhn_high_i8v16, MOP_vraddhn2vvv, 0, {1, 2}) -INTRINSICDESC(vector_raddhn_high_i16v8, MOP_vraddhn2vvv, 0, {1, 2}) -INTRINSICDESC(vector_raddhn_high_i32v4, MOP_vraddhn2vvv, 0, {1, 2}) -INTRINSICDESC(vector_raddhn_high_u8v16, MOP_vraddhn2vvv, 0, {1, 2}) -INTRINSICDESC(vector_raddhn_high_u16v8, MOP_vraddhn2vvv, 0, {1, 2}) -INTRINSICDESC(vector_raddhn_high_u32v4, MOP_vraddhn2vvv, 0, {1, 2}) -INTRINSICDESC(vector_qadd_i8v8, MOP_vsqadduuu, -1, {0, 1}) -INTRINSICDESC(vector_qaddq_i8v16, MOP_vsqaddvvv, -1, {0, 1}) -INTRINSICDESC(vector_qadd_i16v4, MOP_vsqadduuu, -1, {0, 1}) -INTRINSICDESC(vector_qaddq_i16v8, MOP_vsqaddvvv, -1, {0, 1}) -INTRINSICDESC(vector_qadd_i32v2, MOP_vsqadduuu, -1, {0, 1}) -INTRINSICDESC(vector_qaddq_i32v4, MOP_vsqaddvvv, -1, {0, 1}) -INTRINSICDESC(vector_qadd_i64v1, MOP_vdsqaddrrr, -1, {0, 1}) -INTRINSICDESC(vector_qaddq_i64v2, MOP_vsqaddvvv, -1, {0, 1}) -INTRINSICDESC(vector_qadd_u8v8, MOP_vuqadduuu, -1, {0, 1}) -INTRINSICDESC(vector_qaddq_u8v16, MOP_vuqaddvvv, -1, {0, 1}) -INTRINSICDESC(vector_qadd_u16v4, MOP_vuqadduuu, -1, {0, 1}) -INTRINSICDESC(vector_qaddq_u16v8, MOP_vuqaddvvv, -1, {0, 1}) -INTRINSICDESC(vector_qadd_u32v2, MOP_vuqadduuu, -1, {0, 1}) -INTRINSICDESC(vector_qaddq_u32v4, MOP_vuqaddvvv, -1, {0, 1}) -INTRINSICDESC(vector_qadd_u64v1, MOP_vduqaddrrr, -1, {0, 1}) -INTRINSICDESC(vector_qaddq_u64v2, MOP_vuqaddvvv, -1, {0, 1}) -INTRINSICDESC(vector_uqadd_i8v8, MOP_vsuqadduu, 0, {1}) -INTRINSICDESC(vector_uqaddq_i8v16, MOP_vsuqaddvv, 0, {1}) -INTRINSICDESC(vector_uqadd_i16v4, MOP_vsuqadduu, 0, {1}) -INTRINSICDESC(vector_uqaddq_i16v8, MOP_vsuqaddvv, 0, {1}) -INTRINSICDESC(vector_uqadd_i32v2, MOP_vsuqadduu, 0, {1}) -INTRINSICDESC(vector_uqaddq_i32v4, MOP_vsuqaddvv, 0, {1}) -INTRINSICDESC(vector_uqadd_i64v1, MOP_vdsuqaddrr, 0, {1}) -INTRINSICDESC(vector_uqaddq_i64v2, MOP_vsuqaddvv, 0, {1}) -INTRINSICDESC(vector_sqadd_u8v8, MOP_vusqadduu, 0, {1}) -INTRINSICDESC(vector_sqaddq_u8v16, MOP_vusqaddvv, 0, {1}) -INTRINSICDESC(vector_sqadd_u16v4, MOP_vusqadduu, 0, {1}) -INTRINSICDESC(vector_sqaddq_u16v8, MOP_vusqaddvv, 0, {1}) -INTRINSICDESC(vector_sqadd_u32v2, MOP_vusqadduu, 0, {1}) -INTRINSICDESC(vector_sqaddq_u32v4, MOP_vusqaddvv, 0, {1}) -INTRINSICDESC(vector_sqadd_u64v1, MOP_vdusqaddrr, 0, {1}) -INTRINSICDESC(vector_sqaddq_u64v2, MOP_vusqaddvv, 0, {1}) -INTRINSICDESC(vector_mla_i8v8, MOP_vmlauuu, 0, {1, 2}) -INTRINSICDESC(vector_mlaq_i8v16, MOP_vmlavvv, 0, {1, 2}) -INTRINSICDESC(vector_mla_i16v4, MOP_vmlauuu, 0, {1, 2}) -INTRINSICDESC(vector_mlaq_i16v8, MOP_vmlavvv, 0, {1, 2}) -INTRINSICDESC(vector_mla_i32v2, MOP_vmlauuu, 0, {1, 2}) -INTRINSICDESC(vector_mlaq_i32v4, MOP_vmlavvv, 0, {1, 2}) -INTRINSICDESC(vector_mla_u8v8, MOP_vmlauuu, 0, {1, 2}) -INTRINSICDESC(vector_mlaq_u8v16, MOP_vmlavvv, 0, {1, 2}) -INTRINSICDESC(vector_mla_u16v4, MOP_vmlauuu, 0, {1, 2}) -INTRINSICDESC(vector_mlaq_u16v8, MOP_vmlavvv, 0, {1, 2}) -INTRINSICDESC(vector_mla_u32v2, MOP_vmlauuu, 0, {1, 2}) -INTRINSICDESC(vector_mlaq_u32v4, MOP_vmlavvv, 0, {1, 2}) -INTRINSICDESC(vector_mls_i8v8, MOP_vmlsuuu, 0, {1, 2}) -INTRINSICDESC(vector_mlsq_i8v16, MOP_vmlsvvv, 0, {1, 2}) -INTRINSICDESC(vector_mls_i16v4, MOP_vmlsuuu, 0, {1, 2}) -INTRINSICDESC(vector_mlsq_i16v8, MOP_vmlsvvv, 0, {1, 2}) -INTRINSICDESC(vector_mls_i32v2, MOP_vmlsuuu, 0, {1, 2}) -INTRINSICDESC(vector_mlsq_i32v4, MOP_vmlsvvv, 0, {1, 2}) -INTRINSICDESC(vector_mls_u8v8, MOP_vmlsuuu, 0, {1, 2}) -INTRINSICDESC(vector_mlsq_u8v16, MOP_vmlsvvv, 0, {1, 2}) -INTRINSICDESC(vector_mls_u16v4, MOP_vmlsuuu, 0, {1, 2}) -INTRINSICDESC(vector_mlsq_u16v8, MOP_vmlsvvv, 0, {1, 2}) -INTRINSICDESC(vector_mls_u32v2, MOP_vmlsuuu, 0, {1, 2}) -INTRINSICDESC(vector_mlsq_u32v4, MOP_vmlsvvv, 0, {1, 2}) -INTRINSICDESC(vector_mlal_i16v8, MOP_vsmlalvuu, 0, {1, 2}) -INTRINSICDESC(vector_mlal_i32v4, MOP_vsmlalvuu, 0, {1, 2}) -INTRINSICDESC(vector_mlal_i64v2, MOP_vsmlalvuu, 0, {1, 2}) -INTRINSICDESC(vector_mlal_u16v8, MOP_vumlalvuu, 0, {1, 2}) -INTRINSICDESC(vector_mlal_u32v4, MOP_vumlalvuu, 0, {1, 2}) -INTRINSICDESC(vector_mlal_u64v2, MOP_vumlalvuu, 0, {1, 2}) -INTRINSICDESC(vector_mlal_high_i16v8, MOP_vsmlal2vvv, 0, {1, 2}) -INTRINSICDESC(vector_mlal_high_i32v4, MOP_vsmlal2vvv, 0, {1, 2}) -INTRINSICDESC(vector_mlal_high_i64v2, MOP_vsmlal2vvv, 0, {1, 2}) -INTRINSICDESC(vector_mlal_high_u16v8, MOP_vumlal2vvv, 0, {1, 2}) -INTRINSICDESC(vector_mlal_high_u32v4, MOP_vumlal2vvv, 0, {1, 2}) -INTRINSICDESC(vector_mlal_high_u64v2, MOP_vumlal2vvv, 0, {1, 2}) -INTRINSICDESC(vector_mlsl_i16v8, MOP_vsmlslvuu, 0, {1, 2}) -INTRINSICDESC(vector_mlsl_i32v4, MOP_vsmlslvuu, 0, {1, 2}) -INTRINSICDESC(vector_mlsl_i64v2, MOP_vsmlslvuu, 0, {1, 2}) -INTRINSICDESC(vector_mlsl_u16v8, MOP_vumlslvuu, 0, {1, 2}) -INTRINSICDESC(vector_mlsl_u32v4, MOP_vumlslvuu, 0, {1, 2}) -INTRINSICDESC(vector_mlsl_u64v2, MOP_vumlslvuu, 0, {1, 2}) -INTRINSICDESC(vector_mlsl_high_i16v8, MOP_vsmlsl2vvv, 0, {1, 2}) -INTRINSICDESC(vector_mlsl_high_i32v4, MOP_vsmlsl2vvv, 0, {1, 2}) -INTRINSICDESC(vector_mlsl_high_i64v2, MOP_vsmlsl2vvv, 0, {1, 2}) -INTRINSICDESC(vector_mlsl_high_u16v8, MOP_vumlsl2vvv, 0, {1, 2}) -INTRINSICDESC(vector_mlsl_high_u32v4, MOP_vumlsl2vvv, 0, {1, 2}) -INTRINSICDESC(vector_mlsl_high_u64v2, MOP_vumlsl2vvv, 0, {1, 2}) -INTRINSICDESC(vector_qdmulh_i16v4, MOP_vsqdmulhuuu, -1, {0, 1}) -INTRINSICDESC(vector_qdmulhq_i16v8, MOP_vsqdmulhvvv, -1, {0, 1}) -INTRINSICDESC(vector_qdmulh_i32v2, MOP_vsqdmulhuuu, -1, {0, 1}) -INTRINSICDESC(vector_qdmulhq_i32v4, MOP_vsqdmulhvvv, -1, {0, 1}) -INTRINSICDESC(vector_qrdmulh_i16v4, MOP_vsqrdmulhuuu, -1, {0, 1}) -INTRINSICDESC(vector_qrdmulhq_i16v8, MOP_vsqrdmulhvvv, -1, {0, 1}) -INTRINSICDESC(vector_qrdmulh_i32v2, MOP_vsqrdmulhuuu, -1, {0, 1}) -INTRINSICDESC(vector_qrdmulhq_i32v4, MOP_vsqrdmulhvvv, -1, {0, 1}) -INTRINSICDESC(vector_qdmull_i32v4, MOP_vsqdmullvuu, -1, {0, 1}) -INTRINSICDESC(vector_qdmull_i64v2, MOP_vsqdmullvuu, -1, {0, 1}) -INTRINSICDESC(vector_qdmull_high_i32v4, MOP_vsqdmull2vvv, -1, {0, 1}) -INTRINSICDESC(vector_qdmull_high_i64v2, MOP_vsqdmull2vvv, -1, {0, 1}) -INTRINSICDESC(vector_qdmlal_i32v4, MOP_vsqdmlalvuu, 0, {1, 2}) -INTRINSICDESC(vector_qdmlal_i64v2, MOP_vsqdmlalvuu, 0, {1, 2}) -INTRINSICDESC(vector_qdmlal_high_i32v4, MOP_vsqdmlal2vvv, 0, {1, 2}) -INTRINSICDESC(vector_qdmlal_high_i64v2, MOP_vsqdmlal2vvv, 0, {1, 2}) -INTRINSICDESC(vector_qdmlsl_i32v4, MOP_vsqdmlslvuu, 0, {1, 2}) -INTRINSICDESC(vector_qdmlsl_i64v2, MOP_vsqdmlslvuu, 0, {1, 2}) -INTRINSICDESC(vector_qdmlsl_high_i32v4, MOP_vsqdmlsl2vvv, 0, {1, 2}) -INTRINSICDESC(vector_qdmlsl_high_i64v2, MOP_vsqdmlsl2vvv, 0, {1, 2}) -INTRINSICDESC(vector_qdmlal_lane_i32v4, MOP_vsqdmlalvuu, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_qdmlal_lane_i64v2, MOP_vsqdmlalvuu, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_qdmlal_high_lane_i32v4, MOP_vsqdmlal2vvu, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_qdmlal_high_lane_i64v2, MOP_vsqdmlal2vvu, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_qdmlal_laneq_i32v4, MOP_vsqdmlalvuv, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_qdmlal_laneq_i64v2, MOP_vsqdmlalvuv, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_qdmlal_high_laneq_i32v4, MOP_vsqdmlal2vvv, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_qdmlal_high_laneq_i64v2, MOP_vsqdmlal2vvv, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_qdmlsl_lane_i32v4, MOP_vsqdmlslvuu, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_qdmlsl_lane_i64v2, MOP_vsqdmlslvuu, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_qdmlsl_high_lane_i32v4, MOP_vsqdmlsl2vvu, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_qdmlsl_high_lane_i64v2, MOP_vsqdmlsl2vvu, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_qdmlsl_laneq_i32v4, MOP_vsqdmlslvuv, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_qdmlsl_laneq_i64v2, MOP_vsqdmlslvuv, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_qdmlsl_high_laneq_i32v4, MOP_vsqdmlsl2vvv, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_qdmlsl_high_laneq_i64v2, MOP_vsqdmlsl2vvv, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mull_i16v8, MOP_vsmullvuu, -1, {0, 1}) -INTRINSICDESC(vector_mull_i32v4, MOP_vsmullvuu, -1, {0, 1}) -INTRINSICDESC(vector_mull_i64v2, MOP_vsmullvuu, -1, {0, 1}) -INTRINSICDESC(vector_mull_u16v8, MOP_vumullvuu, -1, {0, 1}) -INTRINSICDESC(vector_mull_u32v4, MOP_vumullvuu, -1, {0, 1}) -INTRINSICDESC(vector_mull_u64v2, MOP_vumullvuu, -1, {0, 1}) -INTRINSICDESC(vector_mull_high_i16v8, MOP_vsmull2vvv, -1, {0, 1}) -INTRINSICDESC(vector_mull_high_i32v4, MOP_vsmull2vvv, -1, {0, 1}) -INTRINSICDESC(vector_mull_high_i64v2, MOP_vsmull2vvv, -1, {0, 1}) -INTRINSICDESC(vector_mull_high_u16v8, MOP_vumull2vvv, -1, {0, 1}) -INTRINSICDESC(vector_mull_high_u32v4, MOP_vumull2vvv, -1, {0, 1}) -INTRINSICDESC(vector_qdmull_n_i32v4, MOP_vsqdmulluuu, -1, {0, 1}, {{1,{-1,0}}}) -INTRINSICDESC(vector_qdmull_n_i64v2, MOP_vsqdmullvuu, -1, {0, 1}, {{1,{-1,0}}}) -INTRINSICDESC(vector_qdmull_high_n_i32v4, MOP_vsqdmull2vvv, -1, {0, 1}, {{1,{-1,0}}}) -INTRINSICDESC(vector_qdmull_high_n_i64v2, MOP_vsqdmull2vvv, -1, {0, 1}, {{1,{-1,0}}}) -INTRINSICDESC(vector_qdmull_lane_i32v4, MOP_vsqdmullvuu, -1, {0, 1}, {{1,2}}) -INTRINSICDESC(vector_qdmull_lane_i64v2, MOP_vsqdmullvuu, -1, {0, 1}, {{1,2}}) -INTRINSICDESC(vector_qdmull_high_lane_i32v4, MOP_vsqdmull2vvu, -1, {0, 1}, {{1,2}}) -INTRINSICDESC(vector_qdmull_high_lane_i64v2, MOP_vsqdmull2vvu, -1, {0, 1}, {{1,2}}) -INTRINSICDESC(vector_qdmull_laneq_i32v4, MOP_vsqdmullvuv, -1, {0, 1}, {{1,2}}) -INTRINSICDESC(vector_qdmull_laneq_i64v2, MOP_vsqdmullvuv, -1, {0, 1}, {{1,2}}) -INTRINSICDESC(vector_qdmull_high_laneq_i32v4, MOP_vsqdmull2vvv, -1, {0, 1}, {{1,2}}) -INTRINSICDESC(vector_qdmull_high_laneq_i64v2, MOP_vsqdmull2vvv, -1, {0, 1}, {{1,2}}) -INTRINSICDESC(vector_qdmulh_n_i16v4, MOP_vsqdmulhuuu, -1, {0, 1}, {{1,{-1,0}}}) -INTRINSICDESC(vector_qdmulhq_n_i16v8, MOP_vsqdmulhvvv, -1, {0, 1}, {{1,{-1,0}}}) -INTRINSICDESC(vector_qdmulh_n_i32v2, MOP_vsqdmulhuuu, -1, {0, 1}, {{1,{-1,0}}}) -INTRINSICDESC(vector_qdmulhq_n_i32v4, MOP_vsqdmulhvvv, -1, {0, 1}, {{1,{-1,0}}}) -INTRINSICDESC(vector_qdmulh_lane_i16v4, MOP_vsqdmulhuuu, -1, {0, 1}, {{1,2}}) -INTRINSICDESC(vector_qdmulhq_lane_i16v8, MOP_vsqdmulhvvu, -1, {0, 1}, {{1,2}}) -INTRINSICDESC(vector_qdmulh_lane_i32v2, MOP_vsqdmulhuuu, -1, {0, 1}, {{1,2}}) -INTRINSICDESC(vector_qdmulhq_lane_i32v4, MOP_vsqdmulhvvu, -1, {0, 1}, {{1,2}}) -INTRINSICDESC(vector_qdmulh_laneq_i16v4, MOP_vsqdmulhuuv, -1, {0, 1}, {{1,2}}) -INTRINSICDESC(vector_qdmulhq_laneq_i16v8, MOP_vsqdmulhvvv, -1, {0, 1}, {{1,2}}) -INTRINSICDESC(vector_qdmulh_laneq_i32v2, MOP_vsqdmulhuuv, -1, {0, 1}, {{1,2}}) -INTRINSICDESC(vector_qdmulhq_laneq_i32v4, MOP_vsqdmulhvvv, -1, {0, 1}, {{1,2}}) -INTRINSICDESC(vector_qrdmulh_n_i16v4, MOP_vsqrdmulhuuu, -1, {0, 1}, {{1,{-1,0}}}) -INTRINSICDESC(vector_qrdmulhq_n_i16v8, MOP_vsqrdmulhvvv, -1, {0, 1}, {{1,{-1,0}}}) -INTRINSICDESC(vector_qrdmulh_n_i32v2, MOP_vsqrdmulhuuu, -1, {0, 1}, {{1,{-1,0}}}) -INTRINSICDESC(vector_qrdmulhq_n_i32v4, MOP_vsqrdmulhvvv, -1, {0, 1}, {{1,{-1,0}}}) -INTRINSICDESC(vector_qrdmulh_lane_i16v4, MOP_vsqrdmulhuuu, -1, {0, 1}, {{1,2}}) -INTRINSICDESC(vector_qrdmulhq_lane_i16v8, MOP_vsqrdmulhvvu, -1, {0, 1}, {{1,2}}) -INTRINSICDESC(vector_qrdmulh_lane_i32v2, MOP_vsqrdmulhuuu, -1, {0, 1}, {{1,2}}) -INTRINSICDESC(vector_qrdmulhq_lane_i32v4, MOP_vsqrdmulhvvu, -1, {0, 1}, {{1,2}}) -INTRINSICDESC(vector_qrdmulhh_lane_i16v4, MOP_vsqrdmulhuuu, -1, {0, 1}, {{1,2}}) -INTRINSICDESC(vector_qrdmulhs_lane_i32v2, MOP_vsqrdmulhuuu, -1, {0, 1}, {{1,2}}) -INTRINSICDESC(vector_qrdmulh_laneq_i16v4, MOP_vsqrdmulhuuv, -1, {0, 1}, {{1,2}}) -INTRINSICDESC(vector_qrdmulhq_laneq_i16v8, MOP_vsqrdmulhvvv, -1, {0, 1}, {{1,2}}) -INTRINSICDESC(vector_qrdmulh_laneq_i32v2, MOP_vsqrdmulhuuv, -1, {0, 1}, {{1,2}}) -INTRINSICDESC(vector_qrdmulhq_laneq_i32v4, MOP_vsqrdmulhvvv, -1, {0, 1}, {{1,2}}) -INTRINSICDESC(vector_qrdmulhh_laneq_i16v8, MOP_vsqrdmulhuuv, -1, {0, 1}, {{1,2}}) -INTRINSICDESC(vector_qrdmulhs_laneq_i32v4, MOP_vsqrdmulhuuv, -1, {0, 1}, {{1,2}}) -INTRINSICDESC(vector_qdmlal_n_i32v4, MOP_vsqdmlalvuu, 0, {1, 2}, {{2,{-1,0}}}) -INTRINSICDESC(vector_qdmlal_n_i64v2, MOP_vsqdmlalvuu, 0, {1, 2}, {{2,{-1,0}}}) -INTRINSICDESC(vector_qdmlal_high_n_i32v4, MOP_vsqdmlal2vvv, 0, {1, 2}, {{2,{-1,0}}}) -INTRINSICDESC(vector_qdmlal_high_n_i64v2, MOP_vsqdmlal2vvv, 0, {1, 2}, {{2,{-1,0}}}) -INTRINSICDESC(vector_qdmlsl_n_i32v4, MOP_vsqdmlslvuu, 0, {1, 2}, {{2,{-1,0}}}) -INTRINSICDESC(vector_qdmlsl_n_i64v2, MOP_vsqdmlslvuu, 0, {1, 2}, {{2,{-1,0}}}) -INTRINSICDESC(vector_qdmlsl_high_n_i32v4, MOP_vsqdmlsl2vvv, 0, {1, 2}, {{2,{-1,0}}}) -INTRINSICDESC(vector_qdmlsl_high_n_i64v2, MOP_vsqdmlsl2vvv, 0, {1, 2}, {{2,{-1,0}}}) -INTRINSICDESC(vector_hsub_i8v8, MOP_vshsubuuu, -1, {0, 1}) -INTRINSICDESC(vector_hsubq_i8v16, MOP_vshsubvvv, -1, {0, 1}) -INTRINSICDESC(vector_hsub_i16v4, MOP_vshsubuuu, -1, {0, 1}) -INTRINSICDESC(vector_hsubq_i16v8, MOP_vshsubvvv, -1, {0, 1}) -INTRINSICDESC(vector_hsub_i32v2, MOP_vshsubuuu, -1, {0, 1}) -INTRINSICDESC(vector_hsubq_i32v4, MOP_vshsubvvv, -1, {0, 1}) -INTRINSICDESC(vector_hsub_u8v8, MOP_vuhsubuuu, -1, {0, 1}) -INTRINSICDESC(vector_hsubq_u8v16, MOP_vuhsubvvv, -1, {0, 1}) -INTRINSICDESC(vector_hsub_u16v4, MOP_vuhsubuuu, -1, {0, 1}) -INTRINSICDESC(vector_hsubq_u16v8, MOP_vuhsubvvv, -1, {0, 1}) -INTRINSICDESC(vector_hsub_u32v2, MOP_vuhsubuuu, -1, {0, 1}) -INTRINSICDESC(vector_hsubq_u32v4, MOP_vuhsubvvv, -1, {0, 1}) -INTRINSICDESC(vector_subhn_i8v8, MOP_vsubhnuvv, -1, {0, 1}) -INTRINSICDESC(vector_subhn_i16v4, MOP_vsubhnuvv, -1, {0, 1}) -INTRINSICDESC(vector_subhn_i32v2, MOP_vsubhnuvv, -1, {0, 1}) -INTRINSICDESC(vector_subhn_u8v8, MOP_vsubhnuvv, -1, {0, 1}) -INTRINSICDESC(vector_subhn_u16v4, MOP_vsubhnuvv, -1, {0, 1}) -INTRINSICDESC(vector_subhn_u32v2, MOP_vsubhnuvv, -1, {0, 1}) -INTRINSICDESC(vector_subhn_high_i8v16, MOP_vsubhn2vvv, 0, {1, 2}) -INTRINSICDESC(vector_subhn_high_i16v8, MOP_vsubhn2vvv, 0, {1, 2}) -INTRINSICDESC(vector_subhn_high_i32v4, MOP_vsubhn2vvv, 0, {1, 2}) -INTRINSICDESC(vector_subhn_high_u8v16, MOP_vsubhn2vvv, 0, {1, 2}) -INTRINSICDESC(vector_subhn_high_u16v8, MOP_vsubhn2vvv, 0, {1, 2}) -INTRINSICDESC(vector_subhn_high_u32v4, MOP_vsubhn2vvv, 0, {1, 2}) -INTRINSICDESC(vector_rsubhn_i8v8, MOP_vrsubhnuvv, -1, {0, 1}) -INTRINSICDESC(vector_rsubhn_i16v4, MOP_vrsubhnuvv, -1, {0, 1}) -INTRINSICDESC(vector_rsubhn_i32v2, MOP_vrsubhnuvv, -1, {0, 1}) -INTRINSICDESC(vector_rsubhn_u8v8, MOP_vrsubhnuvv, -1, {0, 1}) -INTRINSICDESC(vector_rsubhn_u16v4, MOP_vrsubhnuvv, -1, {0, 1}) -INTRINSICDESC(vector_rsubhn_u32v2, MOP_vrsubhnuvv, -1, {0, 1}) -INTRINSICDESC(vector_rsubhn_high_i8v16, MOP_vrsubhn2vvv, 0, {1, 2}) -INTRINSICDESC(vector_rsubhn_high_i16v8, MOP_vrsubhn2vvv, 0, {1, 2}) -INTRINSICDESC(vector_rsubhn_high_i32v4, MOP_vrsubhn2vvv, 0, {1, 2}) -INTRINSICDESC(vector_rsubhn_high_u8v16, MOP_vrsubhn2vvv, 0, {1, 2}) -INTRINSICDESC(vector_rsubhn_high_u16v8, MOP_vrsubhn2vvv, 0, {1, 2}) -INTRINSICDESC(vector_rsubhn_high_u32v4, MOP_vrsubhn2vvv, 0, {1, 2}) -INTRINSICDESC(vector_qsub_i8v8, MOP_vsqsubuuu, -1, {0, 1}) -INTRINSICDESC(vector_qsubq_i8v16, MOP_vsqsubvvv, -1, {0, 1}) -INTRINSICDESC(vector_qsub_i16v4, MOP_vsqsubuuu, -1, {0, 1}) -INTRINSICDESC(vector_qsubq_i16v8, MOP_vsqsubvvv, -1, {0, 1}) -INTRINSICDESC(vector_qsub_i32v2, MOP_vsqsubuuu, -1, {0, 1}) -INTRINSICDESC(vector_qsubq_i32v4, MOP_vsqsubvvv, -1, {0, 1}) -INTRINSICDESC(vector_qsub_i64v1, MOP_vdsqsubrrr, -1, {0, 1}) -INTRINSICDESC(vector_qsubq_i64v2, MOP_vsqsubvvv, -1, {0, 1}) -INTRINSICDESC(vector_qsub_u8v8, MOP_vuqsubuuu, -1, {0, 1}) -INTRINSICDESC(vector_qsubq_u8v16, MOP_vuqsubvvv, -1, {0, 1}) -INTRINSICDESC(vector_qsub_u16v4, MOP_vuqsubuuu, -1, {0, 1}) -INTRINSICDESC(vector_qsubq_u16v8, MOP_vuqsubvvv, -1, {0, 1}) -INTRINSICDESC(vector_qsub_u32v2, MOP_vuqsubuuu, -1, {0, 1}) -INTRINSICDESC(vector_qsubq_u32v4, MOP_vuqsubvvv, -1, {0, 1}) -INTRINSICDESC(vector_qsub_u64v1, MOP_vduqsubrrr, -1, {0, 1}) -INTRINSICDESC(vector_qsubq_u64v2, MOP_vuqsubvvv, -1, {0, 1}) -INTRINSICDESC(vector_aba_i8v8, MOP_vsabauuu, 0, {1, 2}) -INTRINSICDESC(vector_abaq_i8v16, MOP_vsabavvv, 0, {1, 2}) -INTRINSICDESC(vector_aba_i16v4, MOP_vsabauuu, 0, {1, 2}) -INTRINSICDESC(vector_abaq_i16v8, MOP_vsabavvv, 0, {1, 2}) -INTRINSICDESC(vector_aba_i32v2, MOP_vsabauuu, 0, {1, 2}) -INTRINSICDESC(vector_abaq_i32v4, MOP_vsabavvv, 0, {1, 2}) -INTRINSICDESC(vector_aba_u8v8, MOP_vuabauuu, 0, {1, 2}) -INTRINSICDESC(vector_abaq_u8v16, MOP_vuabavvv, 0, {1, 2}) -INTRINSICDESC(vector_aba_u16v4, MOP_vuabauuu, 0, {1, 2}) -INTRINSICDESC(vector_abaq_u16v8, MOP_vuabavvv, 0, {1, 2}) -INTRINSICDESC(vector_aba_u32v2, MOP_vuabauuu, 0, {1, 2}) -INTRINSICDESC(vector_abaq_u32v4, MOP_vuabavvv, 0, {1, 2}) -INTRINSICDESC(vector_abal_i16v8, MOP_vsabalvuu, 0, {1, 2}) -INTRINSICDESC(vector_abal_i32v4, MOP_vsabalvuu, 0, {1, 2}) -INTRINSICDESC(vector_abal_i64v2, MOP_vsabalvuu, 0, {1, 2}) -INTRINSICDESC(vector_abal_u16v8, MOP_vuabalvuu, 0, {1, 2}) -INTRINSICDESC(vector_abal_u32v4, MOP_vuabalvuu, 0, {1, 2}) -INTRINSICDESC(vector_abal_u64v2, MOP_vuabalvuu, 0, {1, 2}) -INTRINSICDESC(vector_abal_high_i16v8, MOP_vsabal2vvv, 0, {1, 2}) -INTRINSICDESC(vector_abal_high_i32v4, MOP_vsabal2vvv, 0, {1, 2}) -INTRINSICDESC(vector_abal_high_i64v2, MOP_vsabal2vvv, 0, {1, 2}) -INTRINSICDESC(vector_abal_high_u16v8, MOP_vuabal2vvv, 0, {1, 2}) -INTRINSICDESC(vector_abal_high_u32v4, MOP_vuabal2vvv, 0, {1, 2}) -INTRINSICDESC(vector_abal_high_u64v2, MOP_vuabal2vvv, 0, {1, 2}) -INTRINSICDESC(vector_qabs_i8v8, MOP_vsqabsuu, -1, {0}) -INTRINSICDESC(vector_qabsq_i8v16, MOP_vsqabsvv, -1, {0}) -INTRINSICDESC(vector_qabs_i16v4, MOP_vsqabsuu, -1, {0}) -INTRINSICDESC(vector_qabsq_i16v8, MOP_vsqabsvv, -1, {0}) -INTRINSICDESC(vector_qabs_i32v2, MOP_vsqabsuu, -1, {0}) -INTRINSICDESC(vector_qabsq_i32v4, MOP_vsqabsvv, -1, {0}) -INTRINSICDESC(vector_qabs_i64v1, MOP_vdsqabsrr, -1, {0}) -INTRINSICDESC(vector_qabsq_i64v2, MOP_vsqabsvv, -1, {0}) -INTRINSICDESC(vector_rsqrte_u32v2, MOP_vursqrteuu, -1, {0}) -INTRINSICDESC(vector_rsqrteq_u32v4, MOP_vursqrtevv, -1, {0}) -INTRINSICDESC(vector_addlv_i8v8, MOP_vhsaddlvru, -1, {0}) -INTRINSICDESC(vector_addlvq_i8v16, MOP_vhsaddlvrv, -1, {0}) -INTRINSICDESC(vector_addlv_i16v4, MOP_vwsaddlvru, -1, {0}) -INTRINSICDESC(vector_addlvq_i16v8, MOP_vwsaddlvrv, -1, {0}) -INTRINSICDESC(vector_addlvq_i32v4, MOP_vdsaddlvrv, -1, {0}) -INTRINSICDESC(vector_addlv_u8v8, MOP_vhuaddlvru, -1, {0}) -INTRINSICDESC(vector_addlvq_u8v16, MOP_vhuaddlvrv, -1, {0}) -INTRINSICDESC(vector_addlv_u16v4, MOP_vwuaddlvru, -1, {0}) -INTRINSICDESC(vector_addlvq_u16v8, MOP_vwuaddlvrv, -1, {0}) -INTRINSICDESC(vector_addlvq_u32v4, MOP_vduaddlvrv, -1, {0}) -INTRINSICDESC(vector_qshl_i8v8, MOP_vsqshluuu, -1, {0,1}) -INTRINSICDESC(vector_qshlq_i8v16, MOP_vsqshlvvv, -1, {0,1}) -INTRINSICDESC(vector_qshl_i16v4, MOP_vsqshluuu, -1, {0,1}) -INTRINSICDESC(vector_qshlq_i16v8, MOP_vsqshlvvv, -1, {0,1}) -INTRINSICDESC(vector_qshl_i32v2, MOP_vsqshluuu, -1, {0,1}) -INTRINSICDESC(vector_qshlq_i32v4, MOP_vsqshlvvv, -1, {0,1}) -INTRINSICDESC(vector_qshl_i64v1, MOP_vdsqshlrrr, -1, {0,1}) -INTRINSICDESC(vector_qshlq_i64v2, MOP_vsqshlvvv, -1, {0,1}) -INTRINSICDESC(vector_qshl_u8v8, MOP_vuqshluuu, -1, {0,1}) -INTRINSICDESC(vector_qshlq_u8v16, MOP_vuqshlvvv, -1, {0,1}) -INTRINSICDESC(vector_qshl_u16v4, MOP_vuqshluuu, -1, {0,1}) -INTRINSICDESC(vector_qshlq_u16v8, MOP_vuqshlvvv, -1, {0,1}) -INTRINSICDESC(vector_qshl_u32v2, MOP_vuqshluuu, -1, {0,1}) -INTRINSICDESC(vector_qshlq_u32v4, MOP_vuqshlvvv, -1, {0,1}) -INTRINSICDESC(vector_qshl_u64v1, MOP_vduqshlrrr, -1, {0,1}) -INTRINSICDESC(vector_qshlq_u64v2, MOP_vuqshlvvv, -1, {0,1}) -INTRINSICDESC(vector_qshl_n_i8v8, MOP_vsqshluui, -1, {0,1}) -INTRINSICDESC(vector_qshlq_n_i8v16, MOP_vsqshlvvi, -1, {0,1}) -INTRINSICDESC(vector_qshl_n_i16v4, MOP_vsqshluui, -1, {0,1}) -INTRINSICDESC(vector_qshlq_n_i16v8, MOP_vsqshlvvi, -1, {0,1}) -INTRINSICDESC(vector_qshl_n_i32v2, MOP_vsqshluui, -1, {0,1}) -INTRINSICDESC(vector_qshlq_n_i32v4, MOP_vsqshlvvi, -1, {0,1}) -INTRINSICDESC(vector_qshl_n_i64v1, MOP_vdsqshlrri, -1, {0,1}) -INTRINSICDESC(vector_qshlq_n_i64v2, MOP_vsqshlvvi, -1, {0,1}) -INTRINSICDESC(vector_qshl_n_u8v8, MOP_vuqshluui, -1, {0,1}) -INTRINSICDESC(vector_qshlq_n_u8v16, MOP_vuqshlvvi, -1, {0,1}) -INTRINSICDESC(vector_qshl_n_u16v4, MOP_vuqshluui, -1, {0,1}) -INTRINSICDESC(vector_qshlq_n_u16v8, MOP_vuqshlvvi, -1, {0,1}) -INTRINSICDESC(vector_qshl_n_u32v2, MOP_vuqshluui, -1, {0,1}) -INTRINSICDESC(vector_qshlq_n_u32v4, MOP_vuqshlvvi, -1, {0,1}) -INTRINSICDESC(vector_qshl_n_u64v1, MOP_vduqshlrri, -1, {0,1}) -INTRINSICDESC(vector_qshlq_n_u64v2, MOP_vuqshlvvi, -1, {0,1}) -INTRINSICDESC(vector_qshlu_n_u8v8, MOP_vsqshluuui, -1, {0,1}) -INTRINSICDESC(vector_qshluq_n_u8v16, MOP_vsqshluvvi, -1, {0,1}) -INTRINSICDESC(vector_qshlu_n_u16v4, MOP_vsqshluuui, -1, {0,1}) -INTRINSICDESC(vector_qshluq_n_u16v8, MOP_vsqshluvvi, -1, {0,1}) -INTRINSICDESC(vector_qshlu_n_u32v2, MOP_vsqshluuui, -1, {0,1}) -INTRINSICDESC(vector_qshluq_n_u32v4, MOP_vsqshluvvi, -1, {0,1}) -INTRINSICDESC(vector_qshlu_n_u64v1, MOP_vdsqshlurri, -1, {0,1}) -INTRINSICDESC(vector_qshluq_n_u64v2, MOP_vsqshluvvi, -1, {0,1}) -INTRINSICDESC(vector_rshl_i8v8, MOP_vsrshluuuu, -1, {0,1}) -INTRINSICDESC(vector_rshlq_i8v16, MOP_vsrshluvvv, -1, {0,1}) -INTRINSICDESC(vector_rshl_i16v4, MOP_vsrshluuuu, -1, {0,1}) -INTRINSICDESC(vector_rshlq_i16v8, MOP_vsrshluvvv, -1, {0,1}) -INTRINSICDESC(vector_rshl_i32v2, MOP_vsrshluuuu, -1, {0,1}) -INTRINSICDESC(vector_rshlq_i32v4, MOP_vsrshluvvv, -1, {0,1}) -INTRINSICDESC(vector_rshl_i64v1, MOP_vdsrshlurrr, -1, {0,1}) -INTRINSICDESC(vector_rshlq_i64v2, MOP_vsrshluvvv, -1, {0,1}) -INTRINSICDESC(vector_rshl_u8v8, MOP_vurshluuuu, -1, {0,1}) -INTRINSICDESC(vector_rshlq_u8v16, MOP_vurshluvvv, -1, {0,1}) -INTRINSICDESC(vector_rshl_u16v4, MOP_vurshluuuu, -1, {0,1}) -INTRINSICDESC(vector_rshlq_u16v8, MOP_vurshluvvv, -1, {0,1}) -INTRINSICDESC(vector_rshl_u32v2, MOP_vurshluuuu, -1, {0,1}) -INTRINSICDESC(vector_rshlq_u32v4, MOP_vurshluvvv, -1, {0,1}) -INTRINSICDESC(vector_rshl_u64v1, MOP_vdurshlurrr, -1, {0,1}) -INTRINSICDESC(vector_rshlq_u64v2, MOP_vurshluvvv, -1, {0,1}) -INTRINSICDESC(vector_qrshl_i8v8, MOP_vsqrshluuu, -1, {0,1}) -INTRINSICDESC(vector_qrshlq_i8v16, MOP_vsqrshlvvv, -1, {0,1}) -INTRINSICDESC(vector_qrshl_i16v4, MOP_vsqrshluuu, -1, {0,1}) -INTRINSICDESC(vector_qrshlq_i16v8, MOP_vsqrshlvvv, -1, {0,1}) -INTRINSICDESC(vector_qrshl_i32v2, MOP_vsqrshluuu, -1, {0,1}) -INTRINSICDESC(vector_qrshlq_i32v4, MOP_vsqrshlvvv, -1, {0,1}) -INTRINSICDESC(vector_qrshl_i64v1, MOP_vdsqrshlrrr, -1, {0,1}) -INTRINSICDESC(vector_qrshlq_i64v2, MOP_vsqrshlvvv, -1, {0,1}) -INTRINSICDESC(vector_qrshl_u8v8, MOP_vuqrshluuu, -1, {0,1}) -INTRINSICDESC(vector_qrshlq_u8v16, MOP_vuqrshlvvv, -1, {0,1}) -INTRINSICDESC(vector_qrshl_u16v4, MOP_vuqrshluuu, -1, {0,1}) -INTRINSICDESC(vector_qrshlq_u16v8, MOP_vuqrshlvvv, -1, {0,1}) -INTRINSICDESC(vector_qrshl_u32v2, MOP_vuqrshluuu, -1, {0,1}) -INTRINSICDESC(vector_qrshlq_u32v4, MOP_vuqrshlvvv, -1, {0,1}) -INTRINSICDESC(vector_qrshl_u64v1, MOP_vduqrshlrrr, -1, {0,1}) -INTRINSICDESC(vector_qrshlq_u64v2, MOP_vuqrshlvvv, -1, {0,1}) -INTRINSICDESC(vector_shll_n_i16v8, MOP_vsshllvui, -1, {0,1}) -INTRINSICDESC(vector_shll_n_i32v4, MOP_vsshllvui, -1, {0,1}) -INTRINSICDESC(vector_shll_n_i64v2, MOP_vsshllvui, -1, {0,1}) -INTRINSICDESC(vector_shll_n_u16v8, MOP_vushllvui, -1, {0,1}) -INTRINSICDESC(vector_shll_n_u32v4, MOP_vushllvui, -1, {0,1}) -INTRINSICDESC(vector_shll_n_u64v2, MOP_vushllvui, -1, {0,1}) -INTRINSICDESC(vector_shll_high_n_i16v8, MOP_vsshll2vvi, -1, {0,1}) -INTRINSICDESC(vector_shll_high_n_i32v4, MOP_vsshll2vvi, -1, {0,1}) -INTRINSICDESC(vector_shll_high_n_i64v2, MOP_vsshll2vvi, -1, {0,1}) -INTRINSICDESC(vector_shll_high_n_u16v8, MOP_vushll2vvi, -1, {0,1}) -INTRINSICDESC(vector_shll_high_n_u32v4, MOP_vushll2vvi, -1, {0,1}) -INTRINSICDESC(vector_shll_high_n_u64v2, MOP_vushll2vvi, -1, {0,1}) -INTRINSICDESC(vector_sli_n_i8v8, MOP_vsliuui, 0, {1, 2}) -INTRINSICDESC(vector_sliq_n_i8v16, MOP_vslivvi, 0, {1, 2}) -INTRINSICDESC(vector_sli_n_i16v4, MOP_vsliuui, 0, {1, 2}) -INTRINSICDESC(vector_sliq_n_i16v8, MOP_vslivvi, 0, {1, 2}) -INTRINSICDESC(vector_sli_n_i32v2, MOP_vsliuui, 0, {1, 2}) -INTRINSICDESC(vector_sliq_n_i32v4, MOP_vslivvi, 0, {1, 2}) -INTRINSICDESC(vector_sli_n_i64v1, MOP_vdslirri, 0, {1, 2}) -INTRINSICDESC(vector_sliq_n_i64v2, MOP_vslivvi, 0, {1, 2}) -INTRINSICDESC(vector_sli_n_u8v8, MOP_vsliuui, 0, {1, 2}) -INTRINSICDESC(vector_sliq_n_u8v16, MOP_vslivvi, 0, {1, 2}) -INTRINSICDESC(vector_sli_n_u16v4, MOP_vsliuui, 0, {1, 2}) -INTRINSICDESC(vector_sliq_n_u16v8, MOP_vslivvi, 0, {1, 2}) -INTRINSICDESC(vector_sli_n_u32v2, MOP_vsliuui, 0, {1, 2}) -INTRINSICDESC(vector_sliq_n_u32v4, MOP_vslivvi, 0, {1, 2}) -INTRINSICDESC(vector_sli_n_u64v1, MOP_vdslirri, 0, {1, 2}) -INTRINSICDESC(vector_sliq_n_u64v2, MOP_vslivvi, 0, {1, 2}) -INTRINSICDESC(vector_rshr_n_i8v8, MOP_vsrshruui, -1, {0, 1}) -INTRINSICDESC(vector_rshrq_n_i8v16, MOP_vsrshrvvi, -1, {0, 1}) -INTRINSICDESC(vector_rshr_n_i16v4, MOP_vsrshruui, -1, {0, 1}) -INTRINSICDESC(vector_rshrq_n_i16v8, MOP_vsrshrvvi, -1, {0, 1}) -INTRINSICDESC(vector_rshr_n_i32v2, MOP_vsrshruui, -1, {0, 1}) -INTRINSICDESC(vector_rshrq_n_i32v4, MOP_vsrshrvvi, -1, {0, 1}) -INTRINSICDESC(vector_rshrq_n_i64v2, MOP_vsrshrvvi, -1, {0, 1}) -INTRINSICDESC(vector_rshr_n_u8v8, MOP_vurshruui, -1, {0, 1}) -INTRINSICDESC(vector_rshrq_n_u8v16, MOP_vurshrvvi, -1, {0, 1}) -INTRINSICDESC(vector_rshr_n_u16v4, MOP_vurshruui, -1, {0, 1}) -INTRINSICDESC(vector_rshrq_n_u16v8, MOP_vurshrvvi, -1, {0, 1}) -INTRINSICDESC(vector_rshr_n_u32v2, MOP_vurshruui, -1, {0, 1}) -INTRINSICDESC(vector_rshrq_n_u32v4, MOP_vurshrvvi, -1, {0, 1}) -INTRINSICDESC(vector_rshrq_n_u64v2, MOP_vurshrvvi, -1, {0, 1}) +INTRINSICDESC(vector_ld1_v8i8, MOP_dldr, -1, {0}) +INTRINSICDESC(vector_ld1q_v16i8, MOP_qldr, -1, {0}) +INTRINSICDESC(vector_ld1_v4i16, MOP_dldr, -1, {0}) +INTRINSICDESC(vector_ld1q_v8i16, MOP_qldr, -1, {0}) +INTRINSICDESC(vector_ld1_v2i32, MOP_dldr, -1, {0}) +INTRINSICDESC(vector_ld1q_v4i32, MOP_qldr, -1, {0}) +INTRINSICDESC(vector_ld1_v1i64, MOP_dldr, -1, {0}) +INTRINSICDESC(vector_ld1q_v2i64, MOP_qldr, -1, {0}) +INTRINSICDESC(vector_ld1_v8u8, MOP_dldr, -1, {0}) +INTRINSICDESC(vector_ld1q_v16u8, MOP_qldr, -1, {0}) +INTRINSICDESC(vector_ld1_v4u16, MOP_dldr, -1, {0}) +INTRINSICDESC(vector_ld1q_v8u16, MOP_qldr, -1, {0}) +INTRINSICDESC(vector_ld1_v2u32, MOP_dldr, -1, {0}) +INTRINSICDESC(vector_ld1q_v4u32, MOP_qldr, -1, {0}) +INTRINSICDESC(vector_ld1_v1u64, MOP_dldr, -1, {0}) +INTRINSICDESC(vector_ld1q_v2u64, MOP_qldr, -1, {0}) +INTRINSICDESC(vector_ld1_lane_v8i8, MOP_vld1ub, 1, {0}, {{1,{1,2,1}}}) +INTRINSICDESC(vector_ld1q_lane_v16i8, MOP_vld1vb, 1, {0}, {{1,{1,2,1}}}) +INTRINSICDESC(vector_ld1_lane_v4i16, MOP_vld1uh, 1, {0}, {{1,{1,2,1}}}) +INTRINSICDESC(vector_ld1q_lane_v8i16, MOP_vld1vh, 1, {0}, {{1,{1,2,1}}}) +INTRINSICDESC(vector_ld1_lane_v2i32, MOP_vld1uw, 1, {0}, {{1,{1,2,1}}}) +INTRINSICDESC(vector_ld1q_lane_v4i32, MOP_vld1vw, 1, {0}, {{1,{1,2,1}}}) +INTRINSICDESC(vector_ld1_lane_v1i64, MOP_vld1ud, 1, {0}, {{1,{1,2,1}}}) +INTRINSICDESC(vector_ld1q_lane_v2i64, MOP_vld1vd, 1, {0}, {{1,{1,2,1}}}) +INTRINSICDESC(vector_ld1_lane_v8u8, MOP_vld1ub, 1, {0}, {{1,{1,2,1}}}) +INTRINSICDESC(vector_ld1q_lane_v16u8, MOP_vld1vb, 1, {0}, {{1,{1,2,1}}}) +INTRINSICDESC(vector_ld1_lane_v4u16, MOP_vld1uh, 1, {0}, {{1,{1,2,1}}}) +INTRINSICDESC(vector_ld1q_lane_v8u16, MOP_vld1vh, 1, {0}, {{1,{1,2,1}}}) +INTRINSICDESC(vector_ld1_lane_v2u32, MOP_vld1uw, 1, {0}, {{1,{1,2,1}}}) +INTRINSICDESC(vector_ld1q_lane_v4u32, MOP_vld1vw, 1, {0}, {{1,{1,2,1}}}) +INTRINSICDESC(vector_ld1_lane_v1u64, MOP_vld1ud, 1, {0}, {{1,{1,2,1}}}) +INTRINSICDESC(vector_ld1q_lane_v2u64, MOP_vld1vd, 1, {0}, {{1,{1,2,1}}}) +INTRINSICDESC(vector_ld1_dup_v8i8, MOP_vld1rub, -1, {0}, {{-1,{-1,-1,1}}}) +INTRINSICDESC(vector_ld1q_dup_v16i8, MOP_vld1rvb, -1, {0}, {{-1,{-1,-1,1}}}) +INTRINSICDESC(vector_ld1_dup_v4i16, MOP_vld1ruh, -1, {0}, {{-1,{-1,-1,1}}}) +INTRINSICDESC(vector_ld1q_dup_v8i16, MOP_vld1rvh, -1, {0}, {{-1,{-1,-1,1}}}) +INTRINSICDESC(vector_ld1_dup_v2i32, MOP_vld1ruw, -1, {0}, {{-1,{-1,-1,1}}}) +INTRINSICDESC(vector_ld1q_dup_v4i32, MOP_vld1rvw, -1, {0}, {{-1,{-1,-1,1}}}) +INTRINSICDESC(vector_ld1_dup_v1i64, MOP_vld1ud, -1, {0}, {{-1,{-1,-1,1}}}) +INTRINSICDESC(vector_ld1q_dup_v2i64, MOP_vld1rvd, -1, {0}, {{-1,{-1,-1,1}}}) +INTRINSICDESC(vector_ld1_dup_v8u8, MOP_vld1rub, -1, {0}, {{-1,{-1,-1,1}}}) +INTRINSICDESC(vector_ld1q_dup_v16u8, MOP_vld1rvb, -1, {0}, {{-1,{-1,-1,1}}}) +INTRINSICDESC(vector_ld1_dup_v4u16, MOP_vld1ruh, -1, {0}, {{-1,{-1,-1,1}}}) +INTRINSICDESC(vector_ld1q_dup_v8u16, MOP_vld1rvh, -1, {0}, {{-1,{-1,-1,1}}}) +INTRINSICDESC(vector_ld1_dup_v2u32, MOP_vld1ruw, -1, {0}, {{-1,{-1,-1,1}}}) +INTRINSICDESC(vector_ld1q_dup_v4u32, MOP_vld1rvw, -1, {0}, {{-1,{-1,-1,1}}}) +INTRINSICDESC(vector_ld1_dup_v1u64, MOP_vld1ud, -1, {0}, {{-1,{-1,-1,1}}}) +INTRINSICDESC(vector_ld1q_dup_v2u64, MOP_vld1rvd, -1, {0}, {{-1,{-1,-1,1}}}) +INTRINSICDESC(vector_tbl1_v8i8, MOP_vtbluvu, -1, {0, 1}, {{0,{-1,-1,1}}}) +INTRINSICDESC(vector_tbl1_v8u8, MOP_vtbluvu, -1, {0, 1}, {{0,{-1,-1,1}}}) +INTRINSICDESC(vector_qtbl1_v8i8, MOP_vtbluvu, -1, {0, 1}, {{0,{-1,-1,1}}}) +INTRINSICDESC(vector_qtbl1q_v16i8, MOP_vtblvvv, -1, {0, 1}, {{0,{-1,-1,1}}}) +INTRINSICDESC(vector_qtbl1_v8u8, MOP_vtbluvu, -1, {0, 1}, {{0,{-1,-1,1}}}) +INTRINSICDESC(vector_qtbl1q_v16u8, MOP_vtblvvv, -1, {0, 1}, {{0,{-1,-1,1}}}) +INTRINSICDESC(vector_qtbx1_v8i8, MOP_vtbxuvu, 0, {1, 2}, {{1,{-1,-1,1}}}) +INTRINSICDESC(vector_qtbx1q_v16i8, MOP_vtbxvvv, 0, {1, 2}, {{1,{-1,-1,1}}}) +INTRINSICDESC(vector_qtbx1_v8u8, MOP_vtbxuvu, 0, {1, 2}, {{1,{-1,-1,1}}}) +INTRINSICDESC(vector_qtbx1q_v16u8, MOP_vtbxvvv, 0, {1, 2}, {{1,{-1,-1,1}}}) +INTRINSICDESC(vector_hadd_v8i8, MOP_vshadduuu, -1, {0, 1}) +INTRINSICDESC(vector_haddq_v16i8, MOP_vshaddvvv, -1, {0, 1}) +INTRINSICDESC(vector_hadd_v4i16, MOP_vshadduuu, -1, {0, 1}) +INTRINSICDESC(vector_haddq_v8i16, MOP_vshaddvvv, -1, {0, 1}) +INTRINSICDESC(vector_hadd_v2i32, MOP_vshadduuu, -1, {0, 1}) +INTRINSICDESC(vector_haddq_v4i32, MOP_vshaddvvv, -1, {0, 1}) +INTRINSICDESC(vector_hadd_v8u8, MOP_vuhadduuu, -1, {0, 1}) +INTRINSICDESC(vector_haddq_v16u8, MOP_vuhaddvvv, -1, {0, 1}) +INTRINSICDESC(vector_hadd_v4u16, MOP_vuhadduuu, -1, {0, 1}) +INTRINSICDESC(vector_haddq_v8u16, MOP_vuhaddvvv, -1, {0, 1}) +INTRINSICDESC(vector_hadd_v2u32, MOP_vuhadduuu, -1, {0, 1}) +INTRINSICDESC(vector_haddq_v4u32, MOP_vuhaddvvv, -1, {0, 1}) +INTRINSICDESC(vector_rhadd_v8i8, MOP_vsrhadduuu, -1, {0, 1}) +INTRINSICDESC(vector_rhaddq_v16i8, MOP_vsrhaddvvv, -1, {0, 1}) +INTRINSICDESC(vector_rhadd_v4i16, MOP_vsrhadduuu, -1, {0, 1}) +INTRINSICDESC(vector_rhaddq_v8i16, MOP_vsrhaddvvv, -1, {0, 1}) +INTRINSICDESC(vector_rhadd_v2i32, MOP_vsrhadduuu, -1, {0, 1}) +INTRINSICDESC(vector_rhaddq_v4i32, MOP_vsrhaddvvv, -1, {0, 1}) +INTRINSICDESC(vector_rhadd_v8u8, MOP_vurhadduuu, -1, {0, 1}) +INTRINSICDESC(vector_rhaddq_v16u8, MOP_vurhaddvvv, -1, {0, 1}) +INTRINSICDESC(vector_rhadd_v4u16, MOP_vurhadduuu, -1, {0, 1}) +INTRINSICDESC(vector_rhaddq_v8u16, MOP_vurhaddvvv, -1, {0, 1}) +INTRINSICDESC(vector_rhadd_v2u32, MOP_vurhadduuu, -1, {0, 1}) +INTRINSICDESC(vector_rhaddq_v4u32, MOP_vurhaddvvv, -1, {0, 1}) +INTRINSICDESC(vector_addhn_v8i8, MOP_vaddhnuvv, -1, {0, 1}) +INTRINSICDESC(vector_addhn_v4i16, MOP_vaddhnuvv, -1, {0, 1}) +INTRINSICDESC(vector_addhn_v2i32, MOP_vaddhnuvv, -1, {0, 1}) +INTRINSICDESC(vector_addhn_v8u8, MOP_vaddhnuvv, -1, {0, 1}) +INTRINSICDESC(vector_addhn_v4u16, MOP_vaddhnuvv, -1, {0, 1}) +INTRINSICDESC(vector_addhn_v2u32, MOP_vaddhnuvv, -1, {0, 1}) +INTRINSICDESC(vector_addhn_high_v16i8, MOP_vaddhn2vvv, 0, {1, 2}) +INTRINSICDESC(vector_addhn_high_v8i16, MOP_vaddhn2vvv, 0, {1, 2}) +INTRINSICDESC(vector_addhn_high_v4i32, MOP_vaddhn2vvv, 0, {1, 2}) +INTRINSICDESC(vector_addhn_high_v16u8, MOP_vaddhn2vvv, 0, {1, 2}) +INTRINSICDESC(vector_addhn_high_v8u16, MOP_vaddhn2vvv, 0, {1, 2}) +INTRINSICDESC(vector_addhn_high_v4u32, MOP_vaddhn2vvv, 0, {1, 2}) +INTRINSICDESC(vector_raddhn_v8i8, MOP_vraddhnuvv, -1, {0, 1}) +INTRINSICDESC(vector_raddhn_v4i16, MOP_vraddhnuvv, -1, {0, 1}) +INTRINSICDESC(vector_raddhn_v2i32, MOP_vraddhnuvv, -1, {0, 1}) +INTRINSICDESC(vector_raddhn_v8u8, MOP_vraddhnuvv, -1, {0, 1}) +INTRINSICDESC(vector_raddhn_v4u16, MOP_vraddhnuvv, -1, {0, 1}) +INTRINSICDESC(vector_raddhn_v2u32, MOP_vraddhnuvv, -1, {0, 1}) +INTRINSICDESC(vector_raddhn_high_v16i8, MOP_vraddhn2vvv, 0, {1, 2}) +INTRINSICDESC(vector_raddhn_high_v8i16, MOP_vraddhn2vvv, 0, {1, 2}) +INTRINSICDESC(vector_raddhn_high_v4i32, MOP_vraddhn2vvv, 0, {1, 2}) +INTRINSICDESC(vector_raddhn_high_v16u8, MOP_vraddhn2vvv, 0, {1, 2}) +INTRINSICDESC(vector_raddhn_high_v8u16, MOP_vraddhn2vvv, 0, {1, 2}) +INTRINSICDESC(vector_raddhn_high_v4u32, MOP_vraddhn2vvv, 0, {1, 2}) +INTRINSICDESC(vector_qadd_v8i8, MOP_vsqadduuu, -1, {0, 1}) +INTRINSICDESC(vector_qaddq_v16i8, MOP_vsqaddvvv, -1, {0, 1}) +INTRINSICDESC(vector_qadd_v4i16, MOP_vsqadduuu, -1, {0, 1}) +INTRINSICDESC(vector_qaddq_v8i16, MOP_vsqaddvvv, -1, {0, 1}) +INTRINSICDESC(vector_qadd_v2i32, MOP_vsqadduuu, -1, {0, 1}) +INTRINSICDESC(vector_qaddq_v4i32, MOP_vsqaddvvv, -1, {0, 1}) +INTRINSICDESC(vector_qadd_v1i64, MOP_vdsqaddrrr, -1, {0, 1}) +INTRINSICDESC(vector_qaddq_v2i64, MOP_vsqaddvvv, -1, {0, 1}) +INTRINSICDESC(vector_qadd_v8u8, MOP_vuqadduuu, -1, {0, 1}) +INTRINSICDESC(vector_qaddq_v16u8, MOP_vuqaddvvv, -1, {0, 1}) +INTRINSICDESC(vector_qadd_v4u16, MOP_vuqadduuu, -1, {0, 1}) +INTRINSICDESC(vector_qaddq_v8u16, MOP_vuqaddvvv, -1, {0, 1}) +INTRINSICDESC(vector_qadd_v2u32, MOP_vuqadduuu, -1, {0, 1}) +INTRINSICDESC(vector_qaddq_v4u32, MOP_vuqaddvvv, -1, {0, 1}) +INTRINSICDESC(vector_qadd_v1u64, MOP_vduqaddrrr, -1, {0, 1}) +INTRINSICDESC(vector_qaddq_v2u64, MOP_vuqaddvvv, -1, {0, 1}) +INTRINSICDESC(vector_uqadd_v8i8, MOP_vsuqadduu, 0, {1}) +INTRINSICDESC(vector_uqaddq_v16i8, MOP_vsuqaddvv, 0, {1}) +INTRINSICDESC(vector_uqadd_v4i16, MOP_vsuqadduu, 0, {1}) +INTRINSICDESC(vector_uqaddq_v8i16, MOP_vsuqaddvv, 0, {1}) +INTRINSICDESC(vector_uqadd_v2i32, MOP_vsuqadduu, 0, {1}) +INTRINSICDESC(vector_uqaddq_v4i32, MOP_vsuqaddvv, 0, {1}) +INTRINSICDESC(vector_uqadd_v1i64, MOP_vdsuqaddrr, 0, {1}) +INTRINSICDESC(vector_uqaddq_v2i64, MOP_vsuqaddvv, 0, {1}) +INTRINSICDESC(vector_sqadd_v8u8, MOP_vusqadduu, 0, {1}) +INTRINSICDESC(vector_sqaddq_v16u8, MOP_vusqaddvv, 0, {1}) +INTRINSICDESC(vector_sqadd_v4u16, MOP_vusqadduu, 0, {1}) +INTRINSICDESC(vector_sqaddq_v8u16, MOP_vusqaddvv, 0, {1}) +INTRINSICDESC(vector_sqadd_v2u32, MOP_vusqadduu, 0, {1}) +INTRINSICDESC(vector_sqaddq_v4u32, MOP_vusqaddvv, 0, {1}) +INTRINSICDESC(vector_sqadd_v1u64, MOP_vdusqaddrr, 0, {1}) +INTRINSICDESC(vector_sqaddq_v2u64, MOP_vusqaddvv, 0, {1}) +INTRINSICDESC(vector_mla_v8i8, MOP_vmlauuu, 0, {1, 2}) +INTRINSICDESC(vector_mlaq_v16i8, MOP_vmlavvv, 0, {1, 2}) +INTRINSICDESC(vector_mla_v4i16, MOP_vmlauuu, 0, {1, 2}) +INTRINSICDESC(vector_mlaq_v8i16, MOP_vmlavvv, 0, {1, 2}) +INTRINSICDESC(vector_mla_v2i32, MOP_vmlauuu, 0, {1, 2}) +INTRINSICDESC(vector_mlaq_v4i32, MOP_vmlavvv, 0, {1, 2}) +INTRINSICDESC(vector_mla_v8u8, MOP_vmlauuu, 0, {1, 2}) +INTRINSICDESC(vector_mlaq_v16u8, MOP_vmlavvv, 0, {1, 2}) +INTRINSICDESC(vector_mla_v4u16, MOP_vmlauuu, 0, {1, 2}) +INTRINSICDESC(vector_mlaq_v8u16, MOP_vmlavvv, 0, {1, 2}) +INTRINSICDESC(vector_mla_v2u32, MOP_vmlauuu, 0, {1, 2}) +INTRINSICDESC(vector_mlaq_v4u32, MOP_vmlavvv, 0, {1, 2}) +INTRINSICDESC(vector_mls_v8i8, MOP_vmlsuuu, 0, {1, 2}) +INTRINSICDESC(vector_mlsq_v16i8, MOP_vmlsvvv, 0, {1, 2}) +INTRINSICDESC(vector_mls_v4i16, MOP_vmlsuuu, 0, {1, 2}) +INTRINSICDESC(vector_mlsq_v8i16, MOP_vmlsvvv, 0, {1, 2}) +INTRINSICDESC(vector_mls_v2i32, MOP_vmlsuuu, 0, {1, 2}) +INTRINSICDESC(vector_mlsq_v4i32, MOP_vmlsvvv, 0, {1, 2}) +INTRINSICDESC(vector_mls_v8u8, MOP_vmlsuuu, 0, {1, 2}) +INTRINSICDESC(vector_mlsq_v16u8, MOP_vmlsvvv, 0, {1, 2}) +INTRINSICDESC(vector_mls_v4u16, MOP_vmlsuuu, 0, {1, 2}) +INTRINSICDESC(vector_mlsq_v8u16, MOP_vmlsvvv, 0, {1, 2}) +INTRINSICDESC(vector_mls_v2u32, MOP_vmlsuuu, 0, {1, 2}) +INTRINSICDESC(vector_mlsq_v4u32, MOP_vmlsvvv, 0, {1, 2}) +INTRINSICDESC(vector_mlal_v8i16, MOP_vsmlalvuu, 0, {1, 2}) +INTRINSICDESC(vector_mlal_v4i32, MOP_vsmlalvuu, 0, {1, 2}) +INTRINSICDESC(vector_mlal_v2i64, MOP_vsmlalvuu, 0, {1, 2}) +INTRINSICDESC(vector_mlal_v8u16, MOP_vumlalvuu, 0, {1, 2}) +INTRINSICDESC(vector_mlal_v4u32, MOP_vumlalvuu, 0, {1, 2}) +INTRINSICDESC(vector_mlal_v2u64, MOP_vumlalvuu, 0, {1, 2}) +INTRINSICDESC(vector_mlal_high_v8i16, MOP_vsmlal2vvv, 0, {1, 2}) +INTRINSICDESC(vector_mlal_high_v4i32, MOP_vsmlal2vvv, 0, {1, 2}) +INTRINSICDESC(vector_mlal_high_v2i64, MOP_vsmlal2vvv, 0, {1, 2}) +INTRINSICDESC(vector_mlal_high_v8u16, MOP_vumlal2vvv, 0, {1, 2}) +INTRINSICDESC(vector_mlal_high_v4u32, MOP_vumlal2vvv, 0, {1, 2}) +INTRINSICDESC(vector_mlal_high_v2u64, MOP_vumlal2vvv, 0, {1, 2}) +INTRINSICDESC(vector_mlsl_v8i16, MOP_vsmlslvuu, 0, {1, 2}) +INTRINSICDESC(vector_mlsl_v4i32, MOP_vsmlslvuu, 0, {1, 2}) +INTRINSICDESC(vector_mlsl_v2i64, MOP_vsmlslvuu, 0, {1, 2}) +INTRINSICDESC(vector_mlsl_v8u16, MOP_vumlslvuu, 0, {1, 2}) +INTRINSICDESC(vector_mlsl_v4u32, MOP_vumlslvuu, 0, {1, 2}) +INTRINSICDESC(vector_mlsl_v2u64, MOP_vumlslvuu, 0, {1, 2}) +INTRINSICDESC(vector_mlsl_high_v8i16, MOP_vsmlsl2vvv, 0, {1, 2}) +INTRINSICDESC(vector_mlsl_high_v4i32, MOP_vsmlsl2vvv, 0, {1, 2}) +INTRINSICDESC(vector_mlsl_high_v2i64, MOP_vsmlsl2vvv, 0, {1, 2}) +INTRINSICDESC(vector_mlsl_high_v8u16, MOP_vumlsl2vvv, 0, {1, 2}) +INTRINSICDESC(vector_mlsl_high_v4u32, MOP_vumlsl2vvv, 0, {1, 2}) +INTRINSICDESC(vector_mlsl_high_v2u64, MOP_vumlsl2vvv, 0, {1, 2}) +INTRINSICDESC(vector_qdmulh_v4i16, MOP_vsqdmulhuuu, -1, {0, 1}) +INTRINSICDESC(vector_qdmulhq_v8i16, MOP_vsqdmulhvvv, -1, {0, 1}) +INTRINSICDESC(vector_qdmulh_v2i32, MOP_vsqdmulhuuu, -1, {0, 1}) +INTRINSICDESC(vector_qdmulhq_v4i32, MOP_vsqdmulhvvv, -1, {0, 1}) +INTRINSICDESC(vector_qrdmulh_v4i16, MOP_vsqrdmulhuuu, -1, {0, 1}) +INTRINSICDESC(vector_qrdmulhq_v8i16, MOP_vsqrdmulhvvv, -1, {0, 1}) +INTRINSICDESC(vector_qrdmulh_v2i32, MOP_vsqrdmulhuuu, -1, {0, 1}) +INTRINSICDESC(vector_qrdmulhq_v4i32, MOP_vsqrdmulhvvv, -1, {0, 1}) +INTRINSICDESC(vector_qdmull_v4i32, MOP_vsqdmullvuu, -1, {0, 1}) +INTRINSICDESC(vector_qdmull_v2i64, MOP_vsqdmullvuu, -1, {0, 1}) +INTRINSICDESC(vector_qdmull_high_v4i32, MOP_vsqdmull2vvv, -1, {0, 1}) +INTRINSICDESC(vector_qdmull_high_v2i64, MOP_vsqdmull2vvv, -1, {0, 1}) +INTRINSICDESC(vector_qdmlal_v4i32, MOP_vsqdmlalvuu, 0, {1, 2}) +INTRINSICDESC(vector_qdmlal_v2i64, MOP_vsqdmlalvuu, 0, {1, 2}) +INTRINSICDESC(vector_qdmlal_high_v4i32, MOP_vsqdmlal2vvv, 0, {1, 2}) +INTRINSICDESC(vector_qdmlal_high_v2i64, MOP_vsqdmlal2vvv, 0, {1, 2}) +INTRINSICDESC(vector_qdmlsl_v4i32, MOP_vsqdmlslvuu, 0, {1, 2}) +INTRINSICDESC(vector_qdmlsl_v2i64, MOP_vsqdmlslvuu, 0, {1, 2}) +INTRINSICDESC(vector_qdmlsl_high_v4i32, MOP_vsqdmlsl2vvv, 0, {1, 2}) +INTRINSICDESC(vector_qdmlsl_high_v2i64, MOP_vsqdmlsl2vvv, 0, {1, 2}) +INTRINSICDESC(vector_qdmlal_lane_v4i32, MOP_vsqdmlalvuu, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_qdmlal_lane_v2i64, MOP_vsqdmlalvuu, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_qdmlal_high_lane_v4i32, MOP_vsqdmlal2vvu, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_qdmlal_high_lane_v2i64, MOP_vsqdmlal2vvu, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_qdmlal_laneq_v4i32, MOP_vsqdmlalvuv, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_qdmlal_laneq_v2i64, MOP_vsqdmlalvuv, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_qdmlal_high_laneq_v4i32, MOP_vsqdmlal2vvv, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_qdmlal_high_laneq_v2i64, MOP_vsqdmlal2vvv, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_qdmlsl_lane_v4i32, MOP_vsqdmlslvuu, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_qdmlsl_lane_v2i64, MOP_vsqdmlslvuu, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_qdmlsl_high_lane_v4i32, MOP_vsqdmlsl2vvu, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_qdmlsl_high_lane_v2i64, MOP_vsqdmlsl2vvu, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_qdmlsl_laneq_v4i32, MOP_vsqdmlslvuv, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_qdmlsl_laneq_v2i64, MOP_vsqdmlslvuv, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_qdmlsl_high_laneq_v4i32, MOP_vsqdmlsl2vvv, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_qdmlsl_high_laneq_v2i64, MOP_vsqdmlsl2vvv, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mull_v8i16, MOP_vsmullvuu, -1, {0, 1}) +INTRINSICDESC(vector_mull_v4i32, MOP_vsmullvuu, -1, {0, 1}) +INTRINSICDESC(vector_mull_v2i64, MOP_vsmullvuu, -1, {0, 1}) +INTRINSICDESC(vector_mull_v8u16, MOP_vumullvuu, -1, {0, 1}) +INTRINSICDESC(vector_mull_v4u32, MOP_vumullvuu, -1, {0, 1}) +INTRINSICDESC(vector_mull_v2u64, MOP_vumullvuu, -1, {0, 1}) +INTRINSICDESC(vector_mull_high_v8i16, MOP_vsmull2vvv, -1, {0, 1}) +INTRINSICDESC(vector_mull_high_v4i32, MOP_vsmull2vvv, -1, {0, 1}) +INTRINSICDESC(vector_mull_high_v2i64, MOP_vsmull2vvv, -1, {0, 1}) +INTRINSICDESC(vector_mull_high_v8u16, MOP_vumull2vvv, -1, {0, 1}) +INTRINSICDESC(vector_mull_high_v4u32, MOP_vumull2vvv, -1, {0, 1}) +INTRINSICDESC(vector_qdmull_n_v4i32, MOP_vsqdmulluuu, -1, {0, 1}, {{1,{-1,0}}}) +INTRINSICDESC(vector_qdmull_n_v2i64, MOP_vsqdmullvuu, -1, {0, 1}, {{1,{-1,0}}}) +INTRINSICDESC(vector_qdmull_high_n_v4i32, MOP_vsqdmull2vvv, -1, {0, 1}, {{1,{-1,0}}}) +INTRINSICDESC(vector_qdmull_high_n_v2i64, MOP_vsqdmull2vvv, -1, {0, 1}, {{1,{-1,0}}}) +INTRINSICDESC(vector_qdmull_lane_v4i32, MOP_vsqdmullvuu, -1, {0, 1}, {{1,2}}) +INTRINSICDESC(vector_qdmull_lane_v2i64, MOP_vsqdmullvuu, -1, {0, 1}, {{1,2}}) +INTRINSICDESC(vector_qdmull_high_lane_v4i32, MOP_vsqdmull2vvu, -1, {0, 1}, {{1,2}}) +INTRINSICDESC(vector_qdmull_high_lane_v2i64, MOP_vsqdmull2vvu, -1, {0, 1}, {{1,2}}) +INTRINSICDESC(vector_qdmull_laneq_v4i32, MOP_vsqdmullvuv, -1, {0, 1}, {{1,2}}) +INTRINSICDESC(vector_qdmull_laneq_v2i64, MOP_vsqdmullvuv, -1, {0, 1}, {{1,2}}) +INTRINSICDESC(vector_qdmull_high_laneq_v4i32, MOP_vsqdmull2vvv, -1, {0, 1}, {{1,2}}) +INTRINSICDESC(vector_qdmull_high_laneq_v2i64, MOP_vsqdmull2vvv, -1, {0, 1}, {{1,2}}) +INTRINSICDESC(vector_qdmulh_n_v4i16, MOP_vsqdmulhuuu, -1, {0, 1}, {{1,{-1,0}}}) +INTRINSICDESC(vector_qdmulhq_n_v8i16, MOP_vsqdmulhvvv, -1, {0, 1}, {{1,{-1,0}}}) +INTRINSICDESC(vector_qdmulh_n_v2i32, MOP_vsqdmulhuuu, -1, {0, 1}, {{1,{-1,0}}}) +INTRINSICDESC(vector_qdmulhq_n_v4i32, MOP_vsqdmulhvvv, -1, {0, 1}, {{1,{-1,0}}}) +INTRINSICDESC(vector_qdmulh_lane_v4i16, MOP_vsqdmulhuuu, -1, {0, 1}, {{1,2}}) +INTRINSICDESC(vector_qdmulhq_lane_v8i16, MOP_vsqdmulhvvu, -1, {0, 1}, {{1,2}}) +INTRINSICDESC(vector_qdmulh_lane_v2i32, MOP_vsqdmulhuuu, -1, {0, 1}, {{1,2}}) +INTRINSICDESC(vector_qdmulhq_lane_v4i32, MOP_vsqdmulhvvu, -1, {0, 1}, {{1,2}}) +INTRINSICDESC(vector_qdmulh_laneq_v4i16, MOP_vsqdmulhuuv, -1, {0, 1}, {{1,2}}) +INTRINSICDESC(vector_qdmulhq_laneq_v8i16, MOP_vsqdmulhvvv, -1, {0, 1}, {{1,2}}) +INTRINSICDESC(vector_qdmulh_laneq_v2i32, MOP_vsqdmulhuuv, -1, {0, 1}, {{1,2}}) +INTRINSICDESC(vector_qdmulhq_laneq_v4i32, MOP_vsqdmulhvvv, -1, {0, 1}, {{1,2}}) +INTRINSICDESC(vector_qrdmulh_n_v4i16, MOP_vsqrdmulhuuu, -1, {0, 1}, {{1,{-1,0}}}) +INTRINSICDESC(vector_qrdmulhq_n_v8i16, MOP_vsqrdmulhvvv, -1, {0, 1}, {{1,{-1,0}}}) +INTRINSICDESC(vector_qrdmulh_n_v2i32, MOP_vsqrdmulhuuu, -1, {0, 1}, {{1,{-1,0}}}) +INTRINSICDESC(vector_qrdmulhq_n_v4i32, MOP_vsqrdmulhvvv, -1, {0, 1}, {{1,{-1,0}}}) +INTRINSICDESC(vector_qrdmulh_lane_v4i16, MOP_vsqrdmulhuuu, -1, {0, 1}, {{1,2}}) +INTRINSICDESC(vector_qrdmulhq_lane_v8i16, MOP_vsqrdmulhvvu, -1, {0, 1}, {{1,2}}) +INTRINSICDESC(vector_qrdmulh_lane_v2i32, MOP_vsqrdmulhuuu, -1, {0, 1}, {{1,2}}) +INTRINSICDESC(vector_qrdmulhq_lane_v4i32, MOP_vsqrdmulhvvu, -1, {0, 1}, {{1,2}}) +INTRINSICDESC(vector_qrdmulhh_lane_v4i16, MOP_vsqrdmulhuuu, -1, {0, 1}, {{1,2}}) +INTRINSICDESC(vector_qrdmulhs_lane_v2i32, MOP_vsqrdmulhuuu, -1, {0, 1}, {{1,2}}) +INTRINSICDESC(vector_qrdmulh_laneq_v4i16, MOP_vsqrdmulhuuv, -1, {0, 1}, {{1,2}}) +INTRINSICDESC(vector_qrdmulhq_laneq_v8i16, MOP_vsqrdmulhvvv, -1, {0, 1}, {{1,2}}) +INTRINSICDESC(vector_qrdmulh_laneq_v2i32, MOP_vsqrdmulhuuv, -1, {0, 1}, {{1,2}}) +INTRINSICDESC(vector_qrdmulhq_laneq_v4i32, MOP_vsqrdmulhvvv, -1, {0, 1}, {{1,2}}) +INTRINSICDESC(vector_qrdmulhh_laneq_v8i16, MOP_vsqrdmulhuuv, -1, {0, 1}, {{1,2}}) +INTRINSICDESC(vector_qrdmulhs_laneq_v4i32, MOP_vsqrdmulhuuv, -1, {0, 1}, {{1,2}}) +INTRINSICDESC(vector_qdmlal_n_v4i32, MOP_vsqdmlalvuu, 0, {1, 2}, {{2,{-1,0}}}) +INTRINSICDESC(vector_qdmlal_n_v2i64, MOP_vsqdmlalvuu, 0, {1, 2}, {{2,{-1,0}}}) +INTRINSICDESC(vector_qdmlal_high_n_v4i32, MOP_vsqdmlal2vvv, 0, {1, 2}, {{2,{-1,0}}}) +INTRINSICDESC(vector_qdmlal_high_n_v2i64, MOP_vsqdmlal2vvv, 0, {1, 2}, {{2,{-1,0}}}) +INTRINSICDESC(vector_qdmlsl_n_v4i32, MOP_vsqdmlslvuu, 0, {1, 2}, {{2,{-1,0}}}) +INTRINSICDESC(vector_qdmlsl_n_v2i64, MOP_vsqdmlslvuu, 0, {1, 2}, {{2,{-1,0}}}) +INTRINSICDESC(vector_qdmlsl_high_n_v4i32, MOP_vsqdmlsl2vvv, 0, {1, 2}, {{2,{-1,0}}}) +INTRINSICDESC(vector_qdmlsl_high_n_v2i64, MOP_vsqdmlsl2vvv, 0, {1, 2}, {{2,{-1,0}}}) +INTRINSICDESC(vector_hsub_v8i8, MOP_vshsubuuu, -1, {0, 1}) +INTRINSICDESC(vector_hsubq_v16i8, MOP_vshsubvvv, -1, {0, 1}) +INTRINSICDESC(vector_hsub_v4i16, MOP_vshsubuuu, -1, {0, 1}) +INTRINSICDESC(vector_hsubq_v8i16, MOP_vshsubvvv, -1, {0, 1}) +INTRINSICDESC(vector_hsub_v2i32, MOP_vshsubuuu, -1, {0, 1}) +INTRINSICDESC(vector_hsubq_v4i32, MOP_vshsubvvv, -1, {0, 1}) +INTRINSICDESC(vector_hsub_v8u8, MOP_vuhsubuuu, -1, {0, 1}) +INTRINSICDESC(vector_hsubq_v16u8, MOP_vuhsubvvv, -1, {0, 1}) +INTRINSICDESC(vector_hsub_v4u16, MOP_vuhsubuuu, -1, {0, 1}) +INTRINSICDESC(vector_hsubq_v8u16, MOP_vuhsubvvv, -1, {0, 1}) +INTRINSICDESC(vector_hsub_v2u32, MOP_vuhsubuuu, -1, {0, 1}) +INTRINSICDESC(vector_hsubq_v4u32, MOP_vuhsubvvv, -1, {0, 1}) +INTRINSICDESC(vector_subhn_v8i8, MOP_vsubhnuvv, -1, {0, 1}) +INTRINSICDESC(vector_subhn_v4i16, MOP_vsubhnuvv, -1, {0, 1}) +INTRINSICDESC(vector_subhn_v2i32, MOP_vsubhnuvv, -1, {0, 1}) +INTRINSICDESC(vector_subhn_v8u8, MOP_vsubhnuvv, -1, {0, 1}) +INTRINSICDESC(vector_subhn_v4u16, MOP_vsubhnuvv, -1, {0, 1}) +INTRINSICDESC(vector_subhn_v2u32, MOP_vsubhnuvv, -1, {0, 1}) +INTRINSICDESC(vector_subhn_high_v16i8, MOP_vsubhn2vvv, 0, {1, 2}) +INTRINSICDESC(vector_subhn_high_v8i16, MOP_vsubhn2vvv, 0, {1, 2}) +INTRINSICDESC(vector_subhn_high_v4i32, MOP_vsubhn2vvv, 0, {1, 2}) +INTRINSICDESC(vector_subhn_high_v16u8, MOP_vsubhn2vvv, 0, {1, 2}) +INTRINSICDESC(vector_subhn_high_v8u16, MOP_vsubhn2vvv, 0, {1, 2}) +INTRINSICDESC(vector_subhn_high_v4u32, MOP_vsubhn2vvv, 0, {1, 2}) +INTRINSICDESC(vector_rsubhn_v8i8, MOP_vrsubhnuvv, -1, {0, 1}) +INTRINSICDESC(vector_rsubhn_v4i16, MOP_vrsubhnuvv, -1, {0, 1}) +INTRINSICDESC(vector_rsubhn_v2i32, MOP_vrsubhnuvv, -1, {0, 1}) +INTRINSICDESC(vector_rsubhn_v8u8, MOP_vrsubhnuvv, -1, {0, 1}) +INTRINSICDESC(vector_rsubhn_v4u16, MOP_vrsubhnuvv, -1, {0, 1}) +INTRINSICDESC(vector_rsubhn_v2u32, MOP_vrsubhnuvv, -1, {0, 1}) +INTRINSICDESC(vector_rsubhn_high_v16i8, MOP_vrsubhn2vvv, 0, {1, 2}) +INTRINSICDESC(vector_rsubhn_high_v8i16, MOP_vrsubhn2vvv, 0, {1, 2}) +INTRINSICDESC(vector_rsubhn_high_v4i32, MOP_vrsubhn2vvv, 0, {1, 2}) +INTRINSICDESC(vector_rsubhn_high_v16u8, MOP_vrsubhn2vvv, 0, {1, 2}) +INTRINSICDESC(vector_rsubhn_high_v8u16, MOP_vrsubhn2vvv, 0, {1, 2}) +INTRINSICDESC(vector_rsubhn_high_v4u32, MOP_vrsubhn2vvv, 0, {1, 2}) +INTRINSICDESC(vector_qsub_v8i8, MOP_vsqsubuuu, -1, {0, 1}) +INTRINSICDESC(vector_qsubq_v16i8, MOP_vsqsubvvv, -1, {0, 1}) +INTRINSICDESC(vector_qsub_v4i16, MOP_vsqsubuuu, -1, {0, 1}) +INTRINSICDESC(vector_qsubq_v8i16, MOP_vsqsubvvv, -1, {0, 1}) +INTRINSICDESC(vector_qsub_v2i32, MOP_vsqsubuuu, -1, {0, 1}) +INTRINSICDESC(vector_qsubq_v4i32, MOP_vsqsubvvv, -1, {0, 1}) +INTRINSICDESC(vector_qsub_v1i64, MOP_vdsqsubrrr, -1, {0, 1}) +INTRINSICDESC(vector_qsubq_v2i64, MOP_vsqsubvvv, -1, {0, 1}) +INTRINSICDESC(vector_qsub_v8u8, MOP_vuqsubuuu, -1, {0, 1}) +INTRINSICDESC(vector_qsubq_v16u8, MOP_vuqsubvvv, -1, {0, 1}) +INTRINSICDESC(vector_qsub_v4u16, MOP_vuqsubuuu, -1, {0, 1}) +INTRINSICDESC(vector_qsubq_v8u16, MOP_vuqsubvvv, -1, {0, 1}) +INTRINSICDESC(vector_qsub_v2u32, MOP_vuqsubuuu, -1, {0, 1}) +INTRINSICDESC(vector_qsubq_v4u32, MOP_vuqsubvvv, -1, {0, 1}) +INTRINSICDESC(vector_qsub_v1u64, MOP_vduqsubrrr, -1, {0, 1}) +INTRINSICDESC(vector_qsubq_v2u64, MOP_vuqsubvvv, -1, {0, 1}) +INTRINSICDESC(vector_aba_v8i8, MOP_vsabauuu, 0, {1, 2}) +INTRINSICDESC(vector_abaq_v16i8, MOP_vsabavvv, 0, {1, 2}) +INTRINSICDESC(vector_aba_v4i16, MOP_vsabauuu, 0, {1, 2}) +INTRINSICDESC(vector_abaq_v8i16, MOP_vsabavvv, 0, {1, 2}) +INTRINSICDESC(vector_aba_v2i32, MOP_vsabauuu, 0, {1, 2}) +INTRINSICDESC(vector_abaq_v4i32, MOP_vsabavvv, 0, {1, 2}) +INTRINSICDESC(vector_aba_v8u8, MOP_vuabauuu, 0, {1, 2}) +INTRINSICDESC(vector_abaq_v16u8, MOP_vuabavvv, 0, {1, 2}) +INTRINSICDESC(vector_aba_v4u16, MOP_vuabauuu, 0, {1, 2}) +INTRINSICDESC(vector_abaq_v8u16, MOP_vuabavvv, 0, {1, 2}) +INTRINSICDESC(vector_aba_v2u32, MOP_vuabauuu, 0, {1, 2}) +INTRINSICDESC(vector_abaq_v4u32, MOP_vuabavvv, 0, {1, 2}) +INTRINSICDESC(vector_abal_v8i16, MOP_vsabalvuu, 0, {1, 2}) +INTRINSICDESC(vector_abal_v4i32, MOP_vsabalvuu, 0, {1, 2}) +INTRINSICDESC(vector_abal_v2i64, MOP_vsabalvuu, 0, {1, 2}) +INTRINSICDESC(vector_abal_v8u16, MOP_vuabalvuu, 0, {1, 2}) +INTRINSICDESC(vector_abal_v4u32, MOP_vuabalvuu, 0, {1, 2}) +INTRINSICDESC(vector_abal_v2u64, MOP_vuabalvuu, 0, {1, 2}) +INTRINSICDESC(vector_abal_high_v8i16, MOP_vsabal2vvv, 0, {1, 2}) +INTRINSICDESC(vector_abal_high_v4i32, MOP_vsabal2vvv, 0, {1, 2}) +INTRINSICDESC(vector_abal_high_v2i64, MOP_vsabal2vvv, 0, {1, 2}) +INTRINSICDESC(vector_abal_high_v8u16, MOP_vuabal2vvv, 0, {1, 2}) +INTRINSICDESC(vector_abal_high_v4u32, MOP_vuabal2vvv, 0, {1, 2}) +INTRINSICDESC(vector_abal_high_v2u64, MOP_vuabal2vvv, 0, {1, 2}) +INTRINSICDESC(vector_qabs_v8i8, MOP_vsqabsuu, -1, {0}) +INTRINSICDESC(vector_qabsq_v16i8, MOP_vsqabsvv, -1, {0}) +INTRINSICDESC(vector_qabs_v4i16, MOP_vsqabsuu, -1, {0}) +INTRINSICDESC(vector_qabsq_v8i16, MOP_vsqabsvv, -1, {0}) +INTRINSICDESC(vector_qabs_v2i32, MOP_vsqabsuu, -1, {0}) +INTRINSICDESC(vector_qabsq_v4i32, MOP_vsqabsvv, -1, {0}) +INTRINSICDESC(vector_qabs_v1i64, MOP_vdsqabsrr, -1, {0}) +INTRINSICDESC(vector_qabsq_v2i64, MOP_vsqabsvv, -1, {0}) +INTRINSICDESC(vector_rsqrte_v2u32, MOP_vursqrteuu, -1, {0}) +INTRINSICDESC(vector_rsqrteq_v4u32, MOP_vursqrtevv, -1, {0}) +INTRINSICDESC(vector_addlv_v8i8, MOP_vhsaddlvru, -1, {0}) +INTRINSICDESC(vector_addlvq_v16i8, MOP_vhsaddlvrv, -1, {0}) +INTRINSICDESC(vector_addlv_v4i16, MOP_vwsaddlvru, -1, {0}) +INTRINSICDESC(vector_addlvq_v8i16, MOP_vwsaddlvrv, -1, {0}) +INTRINSICDESC(vector_addlvq_v4i32, MOP_vdsaddlvrv, -1, {0}) +INTRINSICDESC(vector_addlv_v8u8, MOP_vhuaddlvru, -1, {0}) +INTRINSICDESC(vector_addlvq_v16u8, MOP_vhuaddlvrv, -1, {0}) +INTRINSICDESC(vector_addlv_v4u16, MOP_vwuaddlvru, -1, {0}) +INTRINSICDESC(vector_addlvq_v8u16, MOP_vwuaddlvrv, -1, {0}) +INTRINSICDESC(vector_addlvq_v4u32, MOP_vduaddlvrv, -1, {0}) +INTRINSICDESC(vector_qshl_v8i8, MOP_vsqshluuu, -1, {0,1}) +INTRINSICDESC(vector_qshlq_v16i8, MOP_vsqshlvvv, -1, {0,1}) +INTRINSICDESC(vector_qshl_v4i16, MOP_vsqshluuu, -1, {0,1}) +INTRINSICDESC(vector_qshlq_v8i16, MOP_vsqshlvvv, -1, {0,1}) +INTRINSICDESC(vector_qshl_v2i32, MOP_vsqshluuu, -1, {0,1}) +INTRINSICDESC(vector_qshlq_v4i32, MOP_vsqshlvvv, -1, {0,1}) +INTRINSICDESC(vector_qshl_v1i64, MOP_vdsqshlrrr, -1, {0,1}) +INTRINSICDESC(vector_qshlq_v2i64, MOP_vsqshlvvv, -1, {0,1}) +INTRINSICDESC(vector_qshl_v8u8, MOP_vuqshluuu, -1, {0,1}) +INTRINSICDESC(vector_qshlq_v16u8, MOP_vuqshlvvv, -1, {0,1}) +INTRINSICDESC(vector_qshl_v4u16, MOP_vuqshluuu, -1, {0,1}) +INTRINSICDESC(vector_qshlq_v8u16, MOP_vuqshlvvv, -1, {0,1}) +INTRINSICDESC(vector_qshl_v2u32, MOP_vuqshluuu, -1, {0,1}) +INTRINSICDESC(vector_qshlq_v4u32, MOP_vuqshlvvv, -1, {0,1}) +INTRINSICDESC(vector_qshl_v1u64, MOP_vduqshlrrr, -1, {0,1}) +INTRINSICDESC(vector_qshlq_v2u64, MOP_vuqshlvvv, -1, {0,1}) +INTRINSICDESC(vector_qshl_n_v8i8, MOP_vsqshluui, -1, {0,1}) +INTRINSICDESC(vector_qshlq_n_v16i8, MOP_vsqshlvvi, -1, {0,1}) +INTRINSICDESC(vector_qshl_n_v4i16, MOP_vsqshluui, -1, {0,1}) +INTRINSICDESC(vector_qshlq_n_v8i16, MOP_vsqshlvvi, -1, {0,1}) +INTRINSICDESC(vector_qshl_n_v2i32, MOP_vsqshluui, -1, {0,1}) +INTRINSICDESC(vector_qshlq_n_v4i32, MOP_vsqshlvvi, -1, {0,1}) +INTRINSICDESC(vector_qshl_n_v1i64, MOP_vdsqshlrri, -1, {0,1}) +INTRINSICDESC(vector_qshlq_n_v2i64, MOP_vsqshlvvi, -1, {0,1}) +INTRINSICDESC(vector_qshl_n_v8u8, MOP_vuqshluui, -1, {0,1}) +INTRINSICDESC(vector_qshlq_n_v16u8, MOP_vuqshlvvi, -1, {0,1}) +INTRINSICDESC(vector_qshl_n_v4u16, MOP_vuqshluui, -1, {0,1}) +INTRINSICDESC(vector_qshlq_n_v8u16, MOP_vuqshlvvi, -1, {0,1}) +INTRINSICDESC(vector_qshl_n_v2u32, MOP_vuqshluui, -1, {0,1}) +INTRINSICDESC(vector_qshlq_n_v4u32, MOP_vuqshlvvi, -1, {0,1}) +INTRINSICDESC(vector_qshl_n_v1u64, MOP_vduqshlrri, -1, {0,1}) +INTRINSICDESC(vector_qshlq_n_v2u64, MOP_vuqshlvvi, -1, {0,1}) +INTRINSICDESC(vector_qshlu_n_v8u8, MOP_vsqshluuui, -1, {0,1}) +INTRINSICDESC(vector_qshluq_n_v16u8, MOP_vsqshluvvi, -1, {0,1}) +INTRINSICDESC(vector_qshlu_n_v4u16, MOP_vsqshluuui, -1, {0,1}) +INTRINSICDESC(vector_qshluq_n_v8u16, MOP_vsqshluvvi, -1, {0,1}) +INTRINSICDESC(vector_qshlu_n_v2u32, MOP_vsqshluuui, -1, {0,1}) +INTRINSICDESC(vector_qshluq_n_v4u32, MOP_vsqshluvvi, -1, {0,1}) +INTRINSICDESC(vector_qshlu_n_v1u64, MOP_vdsqshlurri, -1, {0,1}) +INTRINSICDESC(vector_qshluq_n_v2u64, MOP_vsqshluvvi, -1, {0,1}) +INTRINSICDESC(vector_rshl_v8i8, MOP_vsrshluuuu, -1, {0,1}) +INTRINSICDESC(vector_rshlq_v16i8, MOP_vsrshluvvv, -1, {0,1}) +INTRINSICDESC(vector_rshl_v4i16, MOP_vsrshluuuu, -1, {0,1}) +INTRINSICDESC(vector_rshlq_v8i16, MOP_vsrshluvvv, -1, {0,1}) +INTRINSICDESC(vector_rshl_v2i32, MOP_vsrshluuuu, -1, {0,1}) +INTRINSICDESC(vector_rshlq_v4i32, MOP_vsrshluvvv, -1, {0,1}) +INTRINSICDESC(vector_rshl_v1i64, MOP_vdsrshlurrr, -1, {0,1}) +INTRINSICDESC(vector_rshlq_v2i64, MOP_vsrshluvvv, -1, {0,1}) +INTRINSICDESC(vector_rshl_v8u8, MOP_vurshluuuu, -1, {0,1}) +INTRINSICDESC(vector_rshlq_v16u8, MOP_vurshluvvv, -1, {0,1}) +INTRINSICDESC(vector_rshl_v4u16, MOP_vurshluuuu, -1, {0,1}) +INTRINSICDESC(vector_rshlq_v8u16, MOP_vurshluvvv, -1, {0,1}) +INTRINSICDESC(vector_rshl_v2u32, MOP_vurshluuuu, -1, {0,1}) +INTRINSICDESC(vector_rshlq_v4u32, MOP_vurshluvvv, -1, {0,1}) +INTRINSICDESC(vector_rshl_v1u64, MOP_vdurshlurrr, -1, {0,1}) +INTRINSICDESC(vector_rshlq_v2u64, MOP_vurshluvvv, -1, {0,1}) +INTRINSICDESC(vector_qrshl_v8i8, MOP_vsqrshluuu, -1, {0,1}) +INTRINSICDESC(vector_qrshlq_v16i8, MOP_vsqrshlvvv, -1, {0,1}) +INTRINSICDESC(vector_qrshl_v4i16, MOP_vsqrshluuu, -1, {0,1}) +INTRINSICDESC(vector_qrshlq_v8i16, MOP_vsqrshlvvv, -1, {0,1}) +INTRINSICDESC(vector_qrshl_v2i32, MOP_vsqrshluuu, -1, {0,1}) +INTRINSICDESC(vector_qrshlq_v4i32, MOP_vsqrshlvvv, -1, {0,1}) +INTRINSICDESC(vector_qrshl_v1i64, MOP_vdsqrshlrrr, -1, {0,1}) +INTRINSICDESC(vector_qrshlq_v2i64, MOP_vsqrshlvvv, -1, {0,1}) +INTRINSICDESC(vector_qrshl_v8u8, MOP_vuqrshluuu, -1, {0,1}) +INTRINSICDESC(vector_qrshlq_v16u8, MOP_vuqrshlvvv, -1, {0,1}) +INTRINSICDESC(vector_qrshl_v4u16, MOP_vuqrshluuu, -1, {0,1}) +INTRINSICDESC(vector_qrshlq_v8u16, MOP_vuqrshlvvv, -1, {0,1}) +INTRINSICDESC(vector_qrshl_v2u32, MOP_vuqrshluuu, -1, {0,1}) +INTRINSICDESC(vector_qrshlq_v4u32, MOP_vuqrshlvvv, -1, {0,1}) +INTRINSICDESC(vector_qrshl_v1u64, MOP_vduqrshlrrr, -1, {0,1}) +INTRINSICDESC(vector_qrshlq_v2u64, MOP_vuqrshlvvv, -1, {0,1}) +INTRINSICDESC(vector_shll_n_v8i16, MOP_vsshllvui, -1, {0,1}) +INTRINSICDESC(vector_shll_n_v4i32, MOP_vsshllvui, -1, {0,1}) +INTRINSICDESC(vector_shll_n_v2i64, MOP_vsshllvui, -1, {0,1}) +INTRINSICDESC(vector_shll_n_v8u16, MOP_vushllvui, -1, {0,1}) +INTRINSICDESC(vector_shll_n_v4u32, MOP_vushllvui, -1, {0,1}) +INTRINSICDESC(vector_shll_n_v2u64, MOP_vushllvui, -1, {0,1}) +INTRINSICDESC(vector_shll_high_n_v8i16, MOP_vsshll2vvi, -1, {0,1}) +INTRINSICDESC(vector_shll_high_n_v4i32, MOP_vsshll2vvi, -1, {0,1}) +INTRINSICDESC(vector_shll_high_n_v2i64, MOP_vsshll2vvi, -1, {0,1}) +INTRINSICDESC(vector_shll_high_n_v8u16, MOP_vushll2vvi, -1, {0,1}) +INTRINSICDESC(vector_shll_high_n_v4u32, MOP_vushll2vvi, -1, {0,1}) +INTRINSICDESC(vector_shll_high_n_v2u64, MOP_vushll2vvi, -1, {0,1}) +INTRINSICDESC(vector_sli_n_v8i8, MOP_vsliuui, 0, {1, 2}) +INTRINSICDESC(vector_sliq_n_v16i8, MOP_vslivvi, 0, {1, 2}) +INTRINSICDESC(vector_sli_n_v4i16, MOP_vsliuui, 0, {1, 2}) +INTRINSICDESC(vector_sliq_n_v8i16, MOP_vslivvi, 0, {1, 2}) +INTRINSICDESC(vector_sli_n_v2i32, MOP_vsliuui, 0, {1, 2}) +INTRINSICDESC(vector_sliq_n_v4i32, MOP_vslivvi, 0, {1, 2}) +INTRINSICDESC(vector_sli_n_v1i64, MOP_vdslirri, 0, {1, 2}) +INTRINSICDESC(vector_sliq_n_v2i64, MOP_vslivvi, 0, {1, 2}) +INTRINSICDESC(vector_sli_n_v8u8, MOP_vsliuui, 0, {1, 2}) +INTRINSICDESC(vector_sliq_n_v16u8, MOP_vslivvi, 0, {1, 2}) +INTRINSICDESC(vector_sli_n_v4u16, MOP_vsliuui, 0, {1, 2}) +INTRINSICDESC(vector_sliq_n_v8u16, MOP_vslivvi, 0, {1, 2}) +INTRINSICDESC(vector_sli_n_v2u32, MOP_vsliuui, 0, {1, 2}) +INTRINSICDESC(vector_sliq_n_v4u32, MOP_vslivvi, 0, {1, 2}) +INTRINSICDESC(vector_sli_n_v1u64, MOP_vdslirri, 0, {1, 2}) +INTRINSICDESC(vector_sliq_n_v2u64, MOP_vslivvi, 0, {1, 2}) +INTRINSICDESC(vector_rshr_n_v8i8, MOP_vsrshruui, -1, {0, 1}) +INTRINSICDESC(vector_rshrq_n_v16i8, MOP_vsrshrvvi, -1, {0, 1}) +INTRINSICDESC(vector_rshr_n_v4i16, MOP_vsrshruui, -1, {0, 1}) +INTRINSICDESC(vector_rshrq_n_v8i16, MOP_vsrshrvvi, -1, {0, 1}) +INTRINSICDESC(vector_rshr_n_v2i32, MOP_vsrshruui, -1, {0, 1}) +INTRINSICDESC(vector_rshrq_n_v4i32, MOP_vsrshrvvi, -1, {0, 1}) +INTRINSICDESC(vector_rshrq_n_v2i64, MOP_vsrshrvvi, -1, {0, 1}) +INTRINSICDESC(vector_rshr_n_v8u8, MOP_vurshruui, -1, {0, 1}) +INTRINSICDESC(vector_rshrq_n_v16u8, MOP_vurshrvvi, -1, {0, 1}) +INTRINSICDESC(vector_rshr_n_v4u16, MOP_vurshruui, -1, {0, 1}) +INTRINSICDESC(vector_rshrq_n_v8u16, MOP_vurshrvvi, -1, {0, 1}) +INTRINSICDESC(vector_rshr_n_v2u32, MOP_vurshruui, -1, {0, 1}) +INTRINSICDESC(vector_rshrq_n_v4u32, MOP_vurshrvvi, -1, {0, 1}) +INTRINSICDESC(vector_rshrq_n_v2u64, MOP_vurshrvvi, -1, {0, 1}) INTRINSICDESC(vector_rshrd_n_i64, MOP_vdsrshrrri, -1, {0, 1}) INTRINSICDESC(vector_rshrd_n_u64, MOP_vdurshrrri, -1, {0, 1}) -INTRINSICDESC(vector_sra_n_i8v8, MOP_vssrauui, 0, {1, 2}) -INTRINSICDESC(vector_sraq_n_i8v16, MOP_vssravvi, 0, {1, 2}) -INTRINSICDESC(vector_sra_n_i16v4, MOP_vssrauui, 0, {1, 2}) -INTRINSICDESC(vector_sraq_n_i16v8, MOP_vssravvi, 0, {1, 2}) -INTRINSICDESC(vector_sra_n_i32v2, MOP_vssrauui, 0, {1, 2}) -INTRINSICDESC(vector_sraq_n_i32v4, MOP_vssravvi, 0, {1, 2}) -INTRINSICDESC(vector_sraq_n_i64v2, MOP_vssravvi, 0, {1, 2}) -INTRINSICDESC(vector_sra_n_u8v8, MOP_vusrauui, 0, {1, 2}) -INTRINSICDESC(vector_sraq_n_u8v16, MOP_vusravvi, 0, {1, 2}) -INTRINSICDESC(vector_sra_n_u16v4, MOP_vusrauui, 0, {1, 2}) -INTRINSICDESC(vector_sraq_n_u16v8, MOP_vusravvi, 0, {1, 2}) -INTRINSICDESC(vector_sra_n_u32v2, MOP_vusrauui, 0, {1, 2}) -INTRINSICDESC(vector_sraq_n_u32v4, MOP_vusravvi, 0, {1, 2}) -INTRINSICDESC(vector_sraq_n_u64v2, MOP_vusravvi, 0, {1, 2}) +INTRINSICDESC(vector_sra_n_v8i8, MOP_vssrauui, 0, {1, 2}) +INTRINSICDESC(vector_sraq_n_v16i8, MOP_vssravvi, 0, {1, 2}) +INTRINSICDESC(vector_sra_n_v4i16, MOP_vssrauui, 0, {1, 2}) +INTRINSICDESC(vector_sraq_n_v8i16, MOP_vssravvi, 0, {1, 2}) +INTRINSICDESC(vector_sra_n_v2i32, MOP_vssrauui, 0, {1, 2}) +INTRINSICDESC(vector_sraq_n_v4i32, MOP_vssravvi, 0, {1, 2}) +INTRINSICDESC(vector_sraq_n_v2i64, MOP_vssravvi, 0, {1, 2}) +INTRINSICDESC(vector_sra_n_v8u8, MOP_vusrauui, 0, {1, 2}) +INTRINSICDESC(vector_sraq_n_v16u8, MOP_vusravvi, 0, {1, 2}) +INTRINSICDESC(vector_sra_n_v4u16, MOP_vusrauui, 0, {1, 2}) +INTRINSICDESC(vector_sraq_n_v8u16, MOP_vusravvi, 0, {1, 2}) +INTRINSICDESC(vector_sra_n_v2u32, MOP_vusrauui, 0, {1, 2}) +INTRINSICDESC(vector_sraq_n_v4u32, MOP_vusravvi, 0, {1, 2}) +INTRINSICDESC(vector_sraq_n_v2u64, MOP_vusravvi, 0, {1, 2}) INTRINSICDESC(vector_srad_n_i64, MOP_vdssrarri, 0, {1, 2}) INTRINSICDESC(vector_srad_n_u64, MOP_vdusrarri, 0, {1, 2}) -INTRINSICDESC(vector_rsra_n_i8v8, MOP_vsrsrauui, 0, {1, 2}) -INTRINSICDESC(vector_rsraq_n_i8v16, MOP_vsrsravvi, 0, {1, 2}) -INTRINSICDESC(vector_rsra_n_i16v4, MOP_vsrsrauui, 0, {1, 2}) -INTRINSICDESC(vector_rsraq_n_i16v8, MOP_vsrsravvi, 0, {1, 2}) -INTRINSICDESC(vector_rsra_n_i32v2, MOP_vsrsrauui, 0, {1, 2}) -INTRINSICDESC(vector_rsraq_n_i32v4, MOP_vsrsravvi, 0, {1, 2}) -INTRINSICDESC(vector_rsraq_n_i64v2, MOP_vsrsravvi, 0, {1, 2}) -INTRINSICDESC(vector_rsra_n_u8v8, MOP_vursrauui, 0, {1, 2}) -INTRINSICDESC(vector_rsraq_n_u8v16, MOP_vursravvi, 0, {1, 2}) -INTRINSICDESC(vector_rsra_n_u16v4, MOP_vursrauui, 0, {1, 2}) -INTRINSICDESC(vector_rsraq_n_u16v8, MOP_vursravvi, 0, {1, 2}) -INTRINSICDESC(vector_rsra_n_u32v2, MOP_vursrauui, 0, {1, 2}) -INTRINSICDESC(vector_rsraq_n_u32v4, MOP_vursravvi, 0, {1, 2}) -INTRINSICDESC(vector_rsraq_n_u64v2, MOP_vursravvi, 0, {1, 2}) +INTRINSICDESC(vector_rsra_n_v8i8, MOP_vsrsrauui, 0, {1, 2}) +INTRINSICDESC(vector_rsraq_n_v16i8, MOP_vsrsravvi, 0, {1, 2}) +INTRINSICDESC(vector_rsra_n_v4i16, MOP_vsrsrauui, 0, {1, 2}) +INTRINSICDESC(vector_rsraq_n_v8i16, MOP_vsrsravvi, 0, {1, 2}) +INTRINSICDESC(vector_rsra_n_v2i32, MOP_vsrsrauui, 0, {1, 2}) +INTRINSICDESC(vector_rsraq_n_v4i32, MOP_vsrsravvi, 0, {1, 2}) +INTRINSICDESC(vector_rsraq_n_v2i64, MOP_vsrsravvi, 0, {1, 2}) +INTRINSICDESC(vector_rsra_n_v8u8, MOP_vursrauui, 0, {1, 2}) +INTRINSICDESC(vector_rsraq_n_v16u8, MOP_vursravvi, 0, {1, 2}) +INTRINSICDESC(vector_rsra_n_v4u16, MOP_vursrauui, 0, {1, 2}) +INTRINSICDESC(vector_rsraq_n_v8u16, MOP_vursravvi, 0, {1, 2}) +INTRINSICDESC(vector_rsra_n_v2u32, MOP_vursrauui, 0, {1, 2}) +INTRINSICDESC(vector_rsraq_n_v4u32, MOP_vursravvi, 0, {1, 2}) +INTRINSICDESC(vector_rsraq_n_v2u64, MOP_vursravvi, 0, {1, 2}) INTRINSICDESC(vector_rsrad_n_i64, MOP_vdsrsrarri, 0, {1, 2}) INTRINSICDESC(vector_rsrad_n_u64, MOP_vdursrarri, 0, {1, 2}) -INTRINSICDESC(vector_shrn_n_i8v8, MOP_vshrnuvi, -1, {0, 1}) -INTRINSICDESC(vector_shrn_n_i16v4, MOP_vshrnuvi, -1, {0, 1}) -INTRINSICDESC(vector_shrn_n_i32v2, MOP_vshrnuvi, -1, {0, 1}) -INTRINSICDESC(vector_shrn_n_u8v8, MOP_vshrnuvi, -1, {0, 1}) -INTRINSICDESC(vector_shrn_n_u16v4, MOP_vshrnuvi, -1, {0, 1}) -INTRINSICDESC(vector_shrn_n_u32v2, MOP_vshrnuvi, -1, {0, 1}) -INTRINSICDESC(vector_shrn_high_n_i8v16, MOP_vshrn2vvi, 0, {1, 2}) -INTRINSICDESC(vector_shrn_high_n_i16v8, MOP_vshrn2vvi, 0, {1, 2}) -INTRINSICDESC(vector_shrn_high_n_i32v4, MOP_vshrn2vvi, 0, {1, 2}) -INTRINSICDESC(vector_shrn_high_n_u8v16, MOP_vshrn2vvi, 0, {1, 2}) -INTRINSICDESC(vector_shrn_high_n_u16v8, MOP_vshrn2vvi, 0, {1, 2}) -INTRINSICDESC(vector_shrn_high_n_u32v4, MOP_vshrn2vvi, 0, {1, 2}) -INTRINSICDESC(vector_qshrun_n_u8v8, MOP_vsqshrunuvi, -1, {0, 1}) -INTRINSICDESC(vector_qshrun_n_u16v4, MOP_vsqshrunuvi, -1, {0, 1}) -INTRINSICDESC(vector_qshrun_n_u32v2, MOP_vsqshrunuvi, -1, {0, 1}) -INTRINSICDESC(vector_qshrun_high_n_u8v16, MOP_vsqshrun2vvi, 0, {1, 2}) -INTRINSICDESC(vector_qshrun_high_n_u16v8, MOP_vsqshrun2vvi, 0, {1, 2}) -INTRINSICDESC(vector_qshrun_high_n_u32v4, MOP_vsqshrun2vvi, 0, {1, 2}) -INTRINSICDESC(vector_qshrn_n_i8v8, MOP_vsqshrnuvi, -1, {0, 1}) -INTRINSICDESC(vector_qshrn_n_i16v4, MOP_vsqshrnuvi, -1, {0, 1}) -INTRINSICDESC(vector_qshrn_n_i32v2, MOP_vsqshrnuvi, -1, {0, 1}) -INTRINSICDESC(vector_qshrn_n_u8v8, MOP_vuqshrnuvi, -1, {0, 1}) -INTRINSICDESC(vector_qshrn_n_u16v4, MOP_vuqshrnuvi, -1, {0, 1}) -INTRINSICDESC(vector_qshrn_n_u32v2, MOP_vuqshrnuvi, -1, {0, 1}) -INTRINSICDESC(vector_qshrn_high_n_i8v16, MOP_vsqshrn2vvi, 0, {1, 2}) -INTRINSICDESC(vector_qshrn_high_n_i16v8, MOP_vsqshrn2vvi, 0, {1, 2}) -INTRINSICDESC(vector_qshrn_high_n_i32v4, MOP_vsqshrn2vvi, 0, {1, 2}) -INTRINSICDESC(vector_qshrn_high_n_u8v16, MOP_vuqshrn2vvi, 0, {1, 2}) -INTRINSICDESC(vector_qshrn_high_n_u16v8, MOP_vuqshrn2vvi, 0, {1, 2}) -INTRINSICDESC(vector_qshrn_high_n_u32v4, MOP_vuqshrn2vvi, 0, {1, 2}) -INTRINSICDESC(vector_qrshrun_n_u8v8, MOP_vsqrshrunuvi, -1, {0, 1}) -INTRINSICDESC(vector_qrshrun_n_u16v4, MOP_vsqrshrunuvi, -1, {0, 1}) -INTRINSICDESC(vector_qrshrun_n_u32v2, MOP_vsqrshrunuvi, -1, {0, 1}) -INTRINSICDESC(vector_qrshrun_high_n_u8v16, MOP_vsqrshrun2vvi, 0, {1, 2}) -INTRINSICDESC(vector_qrshrun_high_n_u16v8, MOP_vsqrshrun2vvi, 0, {1, 2}) -INTRINSICDESC(vector_qrshrun_high_n_u32v4, MOP_vsqrshrun2vvi, 0, {1, 2}) -INTRINSICDESC(vector_qrshrn_n_i8v8, MOP_vsqrshrnuvi, -1, {0, 1}) -INTRINSICDESC(vector_qrshrn_n_i16v4, MOP_vsqrshrnuvi, -1, {0, 1}) -INTRINSICDESC(vector_qrshrn_n_i32v2, MOP_vsqrshrnuvi, -1, {0, 1}) -INTRINSICDESC(vector_qrshrn_n_u8v8, MOP_vuqrshrnuvi, -1, {0, 1}) -INTRINSICDESC(vector_qrshrn_n_u16v4, MOP_vuqrshrnuvi, -1, {0, 1}) -INTRINSICDESC(vector_qrshrn_n_u32v2, MOP_vuqrshrnuvi, -1, {0, 1}) -INTRINSICDESC(vector_qrshrn_high_n_i8v16, MOP_vsqrshrn2vvi, 0, {1, 2}) -INTRINSICDESC(vector_qrshrn_high_n_i16v8, MOP_vsqrshrn2vvi, 0, {1, 2}) -INTRINSICDESC(vector_qrshrn_high_n_i32v4, MOP_vsqrshrn2vvi, 0, {1, 2}) -INTRINSICDESC(vector_qrshrn_high_n_u8v16, MOP_vuqrshrn2vvi, 0, {1, 2}) -INTRINSICDESC(vector_qrshrn_high_n_u16v8, MOP_vuqrshrn2vvi, 0, {1, 2}) -INTRINSICDESC(vector_qrshrn_high_n_u32v4, MOP_vuqrshrn2vvi, 0, {1, 2}) -INTRINSICDESC(vector_rshrn_n_i8v8, MOP_vrshrnuvi, -1, {0, 1}) -INTRINSICDESC(vector_rshrn_n_i16v4, MOP_vrshrnuvi, -1, {0, 1}) -INTRINSICDESC(vector_rshrn_n_i32v2, MOP_vrshrnuvi, -1, {0, 1}) -INTRINSICDESC(vector_rshrn_n_u8v8, MOP_vrshrnuvi, -1, {0, 1}) -INTRINSICDESC(vector_rshrn_n_u16v4, MOP_vrshrnuvi, -1, {0, 1}) -INTRINSICDESC(vector_rshrn_n_u32v2, MOP_vrshrnuvi, -1, {0, 1}) -INTRINSICDESC(vector_rshrn_high_n_i8v16, MOP_vrshrn2vvi, 0, {1, 2}) -INTRINSICDESC(vector_rshrn_high_n_i16v8, MOP_vrshrn2vvi, 0, {1, 2}) -INTRINSICDESC(vector_rshrn_high_n_i32v4, MOP_vrshrn2vvi, 0, {1, 2}) -INTRINSICDESC(vector_rshrn_high_n_u8v16, MOP_vrshrn2vvi, 0, {1, 2}) -INTRINSICDESC(vector_rshrn_high_n_u16v8, MOP_vrshrn2vvi, 0, {1, 2}) -INTRINSICDESC(vector_rshrn_high_n_u32v4, MOP_vrshrn2vvi, 0, {1, 2}) -INTRINSICDESC(vector_sri_n_i8v8, MOP_vsriuui, 0, {1, 2}) -INTRINSICDESC(vector_sriq_n_i8v16, MOP_vsrivvi, 0, {1, 2}) -INTRINSICDESC(vector_sri_n_i16v4, MOP_vsriuui, 0, {1, 2}) -INTRINSICDESC(vector_sriq_n_i16v8, MOP_vsrivvi, 0, {1, 2}) -INTRINSICDESC(vector_sri_n_i32v2, MOP_vsriuui, 0, {1, 2}) -INTRINSICDESC(vector_sriq_n_i32v4, MOP_vsrivvi, 0, {1, 2}) -INTRINSICDESC(vector_sriq_n_i64v2, MOP_vsrivvi, 0, {1, 2}) -INTRINSICDESC(vector_sri_n_u8v8, MOP_vsriuui, 0, {1, 2}) -INTRINSICDESC(vector_sriq_n_u8v16, MOP_vsrivvi, 0, {1, 2}) -INTRINSICDESC(vector_sri_n_u16v4, MOP_vsriuui, 0, {1, 2}) -INTRINSICDESC(vector_sriq_n_u16v8, MOP_vsrivvi, 0, {1, 2}) -INTRINSICDESC(vector_sri_n_u32v2, MOP_vsriuui, 0, {1, 2}) -INTRINSICDESC(vector_sriq_n_u32v4, MOP_vsrivvi, 0, {1, 2}) -INTRINSICDESC(vector_sriq_n_u64v2, MOP_vsrivvi, 0, {1, 2}) +INTRINSICDESC(vector_shrn_n_v8i8, MOP_vshrnuvi, -1, {0, 1}) +INTRINSICDESC(vector_shrn_n_v4i16, MOP_vshrnuvi, -1, {0, 1}) +INTRINSICDESC(vector_shrn_n_v2i32, MOP_vshrnuvi, -1, {0, 1}) +INTRINSICDESC(vector_shrn_n_v8u8, MOP_vshrnuvi, -1, {0, 1}) +INTRINSICDESC(vector_shrn_n_v4u16, MOP_vshrnuvi, -1, {0, 1}) +INTRINSICDESC(vector_shrn_n_v2u32, MOP_vshrnuvi, -1, {0, 1}) +INTRINSICDESC(vector_shrn_high_n_v16i8, MOP_vshrn2vvi, 0, {1, 2}) +INTRINSICDESC(vector_shrn_high_n_v8i16, MOP_vshrn2vvi, 0, {1, 2}) +INTRINSICDESC(vector_shrn_high_n_v4i32, MOP_vshrn2vvi, 0, {1, 2}) +INTRINSICDESC(vector_shrn_high_n_v16u8, MOP_vshrn2vvi, 0, {1, 2}) +INTRINSICDESC(vector_shrn_high_n_v8u16, MOP_vshrn2vvi, 0, {1, 2}) +INTRINSICDESC(vector_shrn_high_n_v4u32, MOP_vshrn2vvi, 0, {1, 2}) +INTRINSICDESC(vector_qshrun_n_v8u8, MOP_vsqshrunuvi, -1, {0, 1}) +INTRINSICDESC(vector_qshrun_n_v4u16, MOP_vsqshrunuvi, -1, {0, 1}) +INTRINSICDESC(vector_qshrun_n_v2u32, MOP_vsqshrunuvi, -1, {0, 1}) +INTRINSICDESC(vector_qshrun_high_n_v16u8, MOP_vsqshrun2vvi, 0, {1, 2}) +INTRINSICDESC(vector_qshrun_high_n_v8u16, MOP_vsqshrun2vvi, 0, {1, 2}) +INTRINSICDESC(vector_qshrun_high_n_v4u32, MOP_vsqshrun2vvi, 0, {1, 2}) +INTRINSICDESC(vector_qshrn_n_v8i8, MOP_vsqshrnuvi, -1, {0, 1}) +INTRINSICDESC(vector_qshrn_n_v4i16, MOP_vsqshrnuvi, -1, {0, 1}) +INTRINSICDESC(vector_qshrn_n_v2i32, MOP_vsqshrnuvi, -1, {0, 1}) +INTRINSICDESC(vector_qshrn_n_v8u8, MOP_vuqshrnuvi, -1, {0, 1}) +INTRINSICDESC(vector_qshrn_n_v4u16, MOP_vuqshrnuvi, -1, {0, 1}) +INTRINSICDESC(vector_qshrn_n_v2u32, MOP_vuqshrnuvi, -1, {0, 1}) +INTRINSICDESC(vector_qshrn_high_n_v16i8, MOP_vsqshrn2vvi, 0, {1, 2}) +INTRINSICDESC(vector_qshrn_high_n_v8i16, MOP_vsqshrn2vvi, 0, {1, 2}) +INTRINSICDESC(vector_qshrn_high_n_v4i32, MOP_vsqshrn2vvi, 0, {1, 2}) +INTRINSICDESC(vector_qshrn_high_n_v16u8, MOP_vuqshrn2vvi, 0, {1, 2}) +INTRINSICDESC(vector_qshrn_high_n_v8u16, MOP_vuqshrn2vvi, 0, {1, 2}) +INTRINSICDESC(vector_qshrn_high_n_v4u32, MOP_vuqshrn2vvi, 0, {1, 2}) +INTRINSICDESC(vector_qrshrun_n_v8u8, MOP_vsqrshrunuvi, -1, {0, 1}) +INTRINSICDESC(vector_qrshrun_n_v4u16, MOP_vsqrshrunuvi, -1, {0, 1}) +INTRINSICDESC(vector_qrshrun_n_v2u32, MOP_vsqrshrunuvi, -1, {0, 1}) +INTRINSICDESC(vector_qrshrun_high_n_v16u8, MOP_vsqrshrun2vvi, 0, {1, 2}) +INTRINSICDESC(vector_qrshrun_high_n_v8u16, MOP_vsqrshrun2vvi, 0, {1, 2}) +INTRINSICDESC(vector_qrshrun_high_n_v4u32, MOP_vsqrshrun2vvi, 0, {1, 2}) +INTRINSICDESC(vector_qrshrn_n_v8i8, MOP_vsqrshrnuvi, -1, {0, 1}) +INTRINSICDESC(vector_qrshrn_n_v4i16, MOP_vsqrshrnuvi, -1, {0, 1}) +INTRINSICDESC(vector_qrshrn_n_v2i32, MOP_vsqrshrnuvi, -1, {0, 1}) +INTRINSICDESC(vector_qrshrn_n_v8u8, MOP_vuqrshrnuvi, -1, {0, 1}) +INTRINSICDESC(vector_qrshrn_n_v4u16, MOP_vuqrshrnuvi, -1, {0, 1}) +INTRINSICDESC(vector_qrshrn_n_v2u32, MOP_vuqrshrnuvi, -1, {0, 1}) +INTRINSICDESC(vector_qrshrn_high_n_v16i8, MOP_vsqrshrn2vvi, 0, {1, 2}) +INTRINSICDESC(vector_qrshrn_high_n_v8i16, MOP_vsqrshrn2vvi, 0, {1, 2}) +INTRINSICDESC(vector_qrshrn_high_n_v4i32, MOP_vsqrshrn2vvi, 0, {1, 2}) +INTRINSICDESC(vector_qrshrn_high_n_v16u8, MOP_vuqrshrn2vvi, 0, {1, 2}) +INTRINSICDESC(vector_qrshrn_high_n_v8u16, MOP_vuqrshrn2vvi, 0, {1, 2}) +INTRINSICDESC(vector_qrshrn_high_n_v4u32, MOP_vuqrshrn2vvi, 0, {1, 2}) +INTRINSICDESC(vector_rshrn_n_v8i8, MOP_vrshrnuvi, -1, {0, 1}) +INTRINSICDESC(vector_rshrn_n_v4i16, MOP_vrshrnuvi, -1, {0, 1}) +INTRINSICDESC(vector_rshrn_n_v2i32, MOP_vrshrnuvi, -1, {0, 1}) +INTRINSICDESC(vector_rshrn_n_v8u8, MOP_vrshrnuvi, -1, {0, 1}) +INTRINSICDESC(vector_rshrn_n_v4u16, MOP_vrshrnuvi, -1, {0, 1}) +INTRINSICDESC(vector_rshrn_n_v2u32, MOP_vrshrnuvi, -1, {0, 1}) +INTRINSICDESC(vector_rshrn_high_n_v16i8, MOP_vrshrn2vvi, 0, {1, 2}) +INTRINSICDESC(vector_rshrn_high_n_v8i16, MOP_vrshrn2vvi, 0, {1, 2}) +INTRINSICDESC(vector_rshrn_high_n_v4i32, MOP_vrshrn2vvi, 0, {1, 2}) +INTRINSICDESC(vector_rshrn_high_n_v16u8, MOP_vrshrn2vvi, 0, {1, 2}) +INTRINSICDESC(vector_rshrn_high_n_v8u16, MOP_vrshrn2vvi, 0, {1, 2}) +INTRINSICDESC(vector_rshrn_high_n_v4u32, MOP_vrshrn2vvi, 0, {1, 2}) +INTRINSICDESC(vector_sri_n_v8i8, MOP_vsriuui, 0, {1, 2}) +INTRINSICDESC(vector_sriq_n_v16i8, MOP_vsrivvi, 0, {1, 2}) +INTRINSICDESC(vector_sri_n_v4i16, MOP_vsriuui, 0, {1, 2}) +INTRINSICDESC(vector_sriq_n_v8i16, MOP_vsrivvi, 0, {1, 2}) +INTRINSICDESC(vector_sri_n_v2i32, MOP_vsriuui, 0, {1, 2}) +INTRINSICDESC(vector_sriq_n_v4i32, MOP_vsrivvi, 0, {1, 2}) +INTRINSICDESC(vector_sriq_n_v2i64, MOP_vsrivvi, 0, {1, 2}) +INTRINSICDESC(vector_sri_n_v8u8, MOP_vsriuui, 0, {1, 2}) +INTRINSICDESC(vector_sriq_n_v16u8, MOP_vsrivvi, 0, {1, 2}) +INTRINSICDESC(vector_sri_n_v4u16, MOP_vsriuui, 0, {1, 2}) +INTRINSICDESC(vector_sriq_n_v8u16, MOP_vsrivvi, 0, {1, 2}) +INTRINSICDESC(vector_sri_n_v2u32, MOP_vsriuui, 0, {1, 2}) +INTRINSICDESC(vector_sriq_n_v4u32, MOP_vsrivvi, 0, {1, 2}) +INTRINSICDESC(vector_sriq_n_v2u64, MOP_vsrivvi, 0, {1, 2}) INTRINSICDESC(vector_srid_n_i64, MOP_vdsrirri, 0, {1, 2}) INTRINSICDESC(vector_srid_n_u64, MOP_vdsrirri, 0, {1, 2}) -INTRINSICDESC(vector_mla_lane_i16v4, MOP_vmlauuu, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mlaq_lane_i16v8, MOP_vmlavvu, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mla_lane_i32v2, MOP_vmlauuu, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mlaq_lane_i32v4, MOP_vmlavvu, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mla_lane_u16v4, MOP_vmlauuu, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mlaq_lane_u16v8, MOP_vmlavvu, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mla_lane_u32v2, MOP_vmlauuu, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mlaq_lane_u32v4, MOP_vmlavvu, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mla_laneq_i16v4, MOP_vmlauuv, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mlaq_laneq_i16v8, MOP_vmlavvv, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mla_laneq_i32v2, MOP_vmlauuv, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mlaq_laneq_i32v4, MOP_vmlavvv, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mla_laneq_u16v4, MOP_vmlauuv, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mlaq_laneq_u16v8, MOP_vmlavvv, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mla_laneq_u32v2, MOP_vmlauuv, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mlaq_laneq_u32v4, MOP_vmlavvv, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mlal_lane_i32v4, MOP_vsmlalvuu, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mlal_lane_i64v2, MOP_vsmlalvuu, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mlal_lane_u32v4, MOP_vumlalvuu, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mlal_lane_u64v2, MOP_vumlalvuu, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mlal_high_lane_i32v4, MOP_vsmlal2vvv, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mlal_high_lane_i64v2, MOP_vsmlal2vvv, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mlal_high_lane_u32v4, MOP_vumlal2vvv, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mlal_high_lane_u64v2, MOP_vumlal2vvv, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mlal_laneq_i32v4, MOP_vsmlalvuv, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mlal_laneq_i64v2, MOP_vsmlalvuv, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mlal_laneq_u32v4, MOP_vumlalvuv, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mlal_laneq_u64v2, MOP_vumlalvuv, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mlal_high_laneq_i32v4, MOP_vsmlal2vvv, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mlal_high_laneq_i64v2, MOP_vsmlal2vvv, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mlal_high_laneq_u32v4, MOP_vumlal2vvv, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mlal_high_laneq_u64v2, MOP_vumlal2vvv, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mla_n_i16v4, MOP_vmlauuu, 0, {1, 2}, {{2,{-1,0}}}) -INTRINSICDESC(vector_mlaq_n_i16v8, MOP_vmlavvv, 0, {1, 2}, {{2,{-1,0}}}) -INTRINSICDESC(vector_mla_n_i32v2, MOP_vmlauuu, 0, {1, 2}, {{2,{-1,0}}}) -INTRINSICDESC(vector_mlaq_n_i32v4, MOP_vmlavvv, 0, {1, 2}, {{2,{-1,0}}}) -INTRINSICDESC(vector_mla_n_u16v4, MOP_vmlauuu, 0, {1, 2}, {{2,{-1,0}}}) -INTRINSICDESC(vector_mlaq_n_u16v8, MOP_vmlavvv, 0, {1, 2}, {{2,{-1,0}}}) -INTRINSICDESC(vector_mla_n_u32v2, MOP_vmlauuu, 0, {1, 2}, {{2,{-1,0}}}) -INTRINSICDESC(vector_mlaq_n_u32v4, MOP_vmlavvv, 0, {1, 2}, {{2,{-1,0}}}) -INTRINSICDESC(vector_mls_lane_i16v4, MOP_vmlsuuu, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mlsq_lane_i16v8, MOP_vmlsvvu, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mls_lane_i32v2, MOP_vmlsuuu, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mlsq_lane_i32v4, MOP_vmlsvvu, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mls_lane_u16v4, MOP_vmlsuuu, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mlsq_lane_u16v8, MOP_vmlsvvu, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mls_lane_u32v2, MOP_vmlsuuu, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mlsq_lane_u32v4, MOP_vmlsvvu, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mls_laneq_i16v4, MOP_vmlsuuv, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mlsq_laneq_i16v8, MOP_vmlsvvv, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mls_laneq_i32v2, MOP_vmlsuuv, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mlsq_laneq_i32v4, MOP_vmlsvvv, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mls_laneq_u16v4, MOP_vmlsuuv, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mlsq_laneq_u16v8, MOP_vmlsvvv, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mls_laneq_u32v2, MOP_vmlsuuv, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mlsq_laneq_u32v4, MOP_vmlsvvv, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mlsl_lane_i32v4, MOP_vsmlslvuu, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mlsl_lane_i64v2, MOP_vsmlslvuu, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mlsl_lane_u32v4, MOP_vumlslvuu, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mlsl_lane_u64v2, MOP_vumlslvuu, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mlsl_high_lane_i32v4, MOP_vsmlsl2vvu, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mlsl_high_lane_i64v2, MOP_vsmlsl2vvu, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mlsl_high_lane_u32v4, MOP_vumlsl2vvu, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mlsl_high_lane_u64v2, MOP_vumlsl2vvu, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mlsl_laneq_i32v4, MOP_vsmlslvuv, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mlsl_laneq_i64v2, MOP_vsmlslvuv, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mlsl_laneq_u32v4, MOP_vumlslvuv, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mlsl_laneq_u64v2, MOP_vumlslvuv, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mlsl_high_laneq_i32v4, MOP_vsmlsl2vvv, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mlsl_high_laneq_i64v2, MOP_vsmlsl2vvv, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mlsl_high_laneq_u32v4, MOP_vumlsl2vvv, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mlsl_high_laneq_u64v2, MOP_vumlsl2vvv, 0, {1, 2}, {{2,3}}) -INTRINSICDESC(vector_mlal_n_i32v4, MOP_vsmlalvuu, 0, {1, 2}, {{2,{-1,0}}}) -INTRINSICDESC(vector_mlal_n_i64v2, MOP_vsmlalvuu, 0, {1, 2}, {{2,{-1,0}}}) -INTRINSICDESC(vector_mlal_n_u32v4, MOP_vsmlalvuu, 0, {1, 2}, {{2,{-1,0}}}) -INTRINSICDESC(vector_mlal_n_u64v2, MOP_vsmlalvuu, 0, {1, 2}, {{2,{-1,0}}}) -INTRINSICDESC(vector_mlal_high_n_i32v4, MOP_vsmlal2vvv, 0, {1, 2}, {{2,{-1,0}}}) -INTRINSICDESC(vector_mlal_high_n_i64v2, MOP_vsmlal2vvv, 0, {1, 2}, {{2,{-1,0}}}) -INTRINSICDESC(vector_mlal_high_n_u32v4, MOP_vsmlal2vvv, 0, {1, 2}, {{2,{-1,0}}}) -INTRINSICDESC(vector_mlal_high_n_u64v2, MOP_vsmlal2vvv, 0, {1, 2}, {{2,{-1,0}}}) -INTRINSICDESC(vector_mls_n_i16v4, MOP_vmlsuuu, 0, {1, 2}, {{2,{-1,0}}}) -INTRINSICDESC(vector_mlsq_n_i16v8, MOP_vmlsvvv, 0, {1, 2}, {{2,{-1,0}}}) -INTRINSICDESC(vector_mls_n_i32v2, MOP_vmlsuuu, 0, {1, 2}, {{2,{-1,0}}}) -INTRINSICDESC(vector_mlsq_n_i32v4, MOP_vmlsvvv, 0, {1, 2}, {{2,{-1,0}}}) -INTRINSICDESC(vector_mls_n_u16v4, MOP_vmlsuuu, 0, {1, 2}, {{2,{-1,0}}}) -INTRINSICDESC(vector_mlsq_n_u16v8, MOP_vmlsvvv, 0, {1, 2}, {{2,{-1,0}}}) -INTRINSICDESC(vector_mls_n_u32v2, MOP_vmlsuuu, 0, {1, 2}, {{2,{-1,0}}}) -INTRINSICDESC(vector_mlsq_n_u32v4, MOP_vmlsvvv, 0, {1, 2}, {{2,{-1,0}}}) -INTRINSICDESC(vector_mlsl_n_i32v4, MOP_vsmlslvuu, 0, {1, 2}, {{2,{-1,0}}}) -INTRINSICDESC(vector_mlsl_n_i64v2, MOP_vsmlslvuu, 0, {1, 2}, {{2,{-1,0}}}) -INTRINSICDESC(vector_mlsl_n_u32v4, MOP_vumlslvuu, 0, {1, 2}, {{2,{-1,0}}}) -INTRINSICDESC(vector_mlsl_n_u64v2, MOP_vumlslvuu, 0, {1, 2}, {{2,{-1,0}}}) -INTRINSICDESC(vector_mlsl_high_n_i32v4, MOP_vsmlsl2vvv, 0, {1, 2}, {{2,{-1,0}}}) -INTRINSICDESC(vector_mlsl_high_n_i64v2, MOP_vsmlsl2vvv, 0, {1, 2}, {{2,{-1,0}}}) -INTRINSICDESC(vector_mlsl_high_n_u32v4, MOP_vumlsl2vvv, 0, {1, 2}, {{2,{-1,0}}}) -INTRINSICDESC(vector_mlsl_high_n_u64v2, MOP_vumlsl2vvv, 0, {1, 2}, {{2,{-1,0}}}) -INTRINSICDESC(vector_qneg_i8v8, MOP_vsqneguu, -1, {0}) -INTRINSICDESC(vector_qnegq_i8v16, MOP_vsqnegvv, -1, {0}) -INTRINSICDESC(vector_qneg_i16v4, MOP_vsqneguu, -1, {0}) -INTRINSICDESC(vector_qnegq_i16v8, MOP_vsqnegvv, -1, {0}) -INTRINSICDESC(vector_qneg_i32v2, MOP_vsqneguu, -1, {0}) -INTRINSICDESC(vector_qnegq_i32v4, MOP_vsqnegvv, -1, {0}) -INTRINSICDESC(vector_qneg_i64v1, MOP_vdsqnegrr, -1, {0}) -INTRINSICDESC(vector_qnegq_i64v2, MOP_vsqnegvv, -1, {0}) +INTRINSICDESC(vector_mla_lane_v4i16, MOP_vmlauuu, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mlaq_lane_v8i16, MOP_vmlavvu, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mla_lane_v2i32, MOP_vmlauuu, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mlaq_lane_v4i32, MOP_vmlavvu, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mla_lane_v4u16, MOP_vmlauuu, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mlaq_lane_v8u16, MOP_vmlavvu, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mla_lane_v2u32, MOP_vmlauuu, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mlaq_lane_v4u32, MOP_vmlavvu, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mla_laneq_v4i16, MOP_vmlauuv, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mlaq_laneq_v8i16, MOP_vmlavvv, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mla_laneq_v2i32, MOP_vmlauuv, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mlaq_laneq_v4i32, MOP_vmlavvv, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mla_laneq_v4u16, MOP_vmlauuv, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mlaq_laneq_v8u16, MOP_vmlavvv, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mla_laneq_v2u32, MOP_vmlauuv, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mlaq_laneq_v4u32, MOP_vmlavvv, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mlal_lane_v4i32, MOP_vsmlalvuu, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mlal_lane_v2i64, MOP_vsmlalvuu, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mlal_lane_v4u32, MOP_vumlalvuu, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mlal_lane_v2u64, MOP_vumlalvuu, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mlal_high_lane_v4i32, MOP_vsmlal2vvv, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mlal_high_lane_v2i64, MOP_vsmlal2vvv, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mlal_high_lane_v4u32, MOP_vumlal2vvv, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mlal_high_lane_v2u64, MOP_vumlal2vvv, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mlal_laneq_v4i32, MOP_vsmlalvuv, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mlal_laneq_v2i64, MOP_vsmlalvuv, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mlal_laneq_v4u32, MOP_vumlalvuv, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mlal_laneq_v2u64, MOP_vumlalvuv, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mlal_high_laneq_v4i32, MOP_vsmlal2vvv, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mlal_high_laneq_v2i64, MOP_vsmlal2vvv, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mlal_high_laneq_v4u32, MOP_vumlal2vvv, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mlal_high_laneq_v2u64, MOP_vumlal2vvv, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mla_n_v4i16, MOP_vmlauuu, 0, {1, 2}, {{2,{-1,0}}}) +INTRINSICDESC(vector_mlaq_n_v8i16, MOP_vmlavvv, 0, {1, 2}, {{2,{-1,0}}}) +INTRINSICDESC(vector_mla_n_v2i32, MOP_vmlauuu, 0, {1, 2}, {{2,{-1,0}}}) +INTRINSICDESC(vector_mlaq_n_v4i32, MOP_vmlavvv, 0, {1, 2}, {{2,{-1,0}}}) +INTRINSICDESC(vector_mla_n_v4u16, MOP_vmlauuu, 0, {1, 2}, {{2,{-1,0}}}) +INTRINSICDESC(vector_mlaq_n_v8u16, MOP_vmlavvv, 0, {1, 2}, {{2,{-1,0}}}) +INTRINSICDESC(vector_mla_n_v2u32, MOP_vmlauuu, 0, {1, 2}, {{2,{-1,0}}}) +INTRINSICDESC(vector_mlaq_n_v4u32, MOP_vmlavvv, 0, {1, 2}, {{2,{-1,0}}}) +INTRINSICDESC(vector_mls_lane_v4i16, MOP_vmlsuuu, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mlsq_lane_v8i16, MOP_vmlsvvu, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mls_lane_v2i32, MOP_vmlsuuu, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mlsq_lane_v4i32, MOP_vmlsvvu, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mls_lane_v4u16, MOP_vmlsuuu, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mlsq_lane_v8u16, MOP_vmlsvvu, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mls_lane_v2u32, MOP_vmlsuuu, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mlsq_lane_v4u32, MOP_vmlsvvu, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mls_laneq_v4i16, MOP_vmlsuuv, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mlsq_laneq_v8i16, MOP_vmlsvvv, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mls_laneq_v2i32, MOP_vmlsuuv, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mlsq_laneq_v4i32, MOP_vmlsvvv, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mls_laneq_v4u16, MOP_vmlsuuv, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mlsq_laneq_v8u16, MOP_vmlsvvv, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mls_laneq_v2u32, MOP_vmlsuuv, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mlsq_laneq_v4u32, MOP_vmlsvvv, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mlsl_lane_v4i32, MOP_vsmlslvuu, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mlsl_lane_v2i64, MOP_vsmlslvuu, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mlsl_lane_v4u32, MOP_vumlslvuu, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mlsl_lane_v2u64, MOP_vumlslvuu, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mlsl_high_lane_v4i32, MOP_vsmlsl2vvu, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mlsl_high_lane_v2i64, MOP_vsmlsl2vvu, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mlsl_high_lane_v4u32, MOP_vumlsl2vvu, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mlsl_high_lane_v2u64, MOP_vumlsl2vvu, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mlsl_laneq_v4i32, MOP_vsmlslvuv, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mlsl_laneq_v2i64, MOP_vsmlslvuv, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mlsl_laneq_v4u32, MOP_vumlslvuv, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mlsl_laneq_v2u64, MOP_vumlslvuv, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mlsl_high_laneq_v4i32, MOP_vsmlsl2vvv, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mlsl_high_laneq_v2i64, MOP_vsmlsl2vvv, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mlsl_high_laneq_v4u32, MOP_vumlsl2vvv, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mlsl_high_laneq_v2u64, MOP_vumlsl2vvv, 0, {1, 2}, {{2,3}}) +INTRINSICDESC(vector_mlal_n_v4i32, MOP_vsmlalvuu, 0, {1, 2}, {{2,{-1,0}}}) +INTRINSICDESC(vector_mlal_n_v2i64, MOP_vsmlalvuu, 0, {1, 2}, {{2,{-1,0}}}) +INTRINSICDESC(vector_mlal_n_v4u32, MOP_vsmlalvuu, 0, {1, 2}, {{2,{-1,0}}}) +INTRINSICDESC(vector_mlal_n_v2u64, MOP_vsmlalvuu, 0, {1, 2}, {{2,{-1,0}}}) +INTRINSICDESC(vector_mlal_high_n_v4i32, MOP_vsmlal2vvv, 0, {1, 2}, {{2,{-1,0}}}) +INTRINSICDESC(vector_mlal_high_n_v2i64, MOP_vsmlal2vvv, 0, {1, 2}, {{2,{-1,0}}}) +INTRINSICDESC(vector_mlal_high_n_v4u32, MOP_vsmlal2vvv, 0, {1, 2}, {{2,{-1,0}}}) +INTRINSICDESC(vector_mlal_high_n_v2u64, MOP_vsmlal2vvv, 0, {1, 2}, {{2,{-1,0}}}) +INTRINSICDESC(vector_mls_n_v4i16, MOP_vmlsuuu, 0, {1, 2}, {{2,{-1,0}}}) +INTRINSICDESC(vector_mlsq_n_v8i16, MOP_vmlsvvv, 0, {1, 2}, {{2,{-1,0}}}) +INTRINSICDESC(vector_mls_n_v2i32, MOP_vmlsuuu, 0, {1, 2}, {{2,{-1,0}}}) +INTRINSICDESC(vector_mlsq_n_v4i32, MOP_vmlsvvv, 0, {1, 2}, {{2,{-1,0}}}) +INTRINSICDESC(vector_mls_n_v4u16, MOP_vmlsuuu, 0, {1, 2}, {{2,{-1,0}}}) +INTRINSICDESC(vector_mlsq_n_v8u16, MOP_vmlsvvv, 0, {1, 2}, {{2,{-1,0}}}) +INTRINSICDESC(vector_mls_n_v2u32, MOP_vmlsuuu, 0, {1, 2}, {{2,{-1,0}}}) +INTRINSICDESC(vector_mlsq_n_v4u32, MOP_vmlsvvv, 0, {1, 2}, {{2,{-1,0}}}) +INTRINSICDESC(vector_mlsl_n_v4i32, MOP_vsmlslvuu, 0, {1, 2}, {{2,{-1,0}}}) +INTRINSICDESC(vector_mlsl_n_v2i64, MOP_vsmlslvuu, 0, {1, 2}, {{2,{-1,0}}}) +INTRINSICDESC(vector_mlsl_n_v4u32, MOP_vumlslvuu, 0, {1, 2}, {{2,{-1,0}}}) +INTRINSICDESC(vector_mlsl_n_v2u64, MOP_vumlslvuu, 0, {1, 2}, {{2,{-1,0}}}) +INTRINSICDESC(vector_mlsl_high_n_v4i32, MOP_vsmlsl2vvv, 0, {1, 2}, {{2,{-1,0}}}) +INTRINSICDESC(vector_mlsl_high_n_v2i64, MOP_vsmlsl2vvv, 0, {1, 2}, {{2,{-1,0}}}) +INTRINSICDESC(vector_mlsl_high_n_v4u32, MOP_vumlsl2vvv, 0, {1, 2}, {{2,{-1,0}}}) +INTRINSICDESC(vector_mlsl_high_n_v2u64, MOP_vumlsl2vvv, 0, {1, 2}, {{2,{-1,0}}}) +INTRINSICDESC(vector_qneg_v8i8, MOP_vsqneguu, -1, {0}) +INTRINSICDESC(vector_qnegq_v16i8, MOP_vsqnegvv, -1, {0}) +INTRINSICDESC(vector_qneg_v4i16, MOP_vsqneguu, -1, {0}) +INTRINSICDESC(vector_qnegq_v8i16, MOP_vsqnegvv, -1, {0}) +INTRINSICDESC(vector_qneg_v2i32, MOP_vsqneguu, -1, {0}) +INTRINSICDESC(vector_qnegq_v4i32, MOP_vsqnegvv, -1, {0}) +INTRINSICDESC(vector_qneg_v1i64, MOP_vdsqnegrr, -1, {0}) +INTRINSICDESC(vector_qnegq_v2i64, MOP_vsqnegvv, -1, {0}) diff --git a/src/mapleall/maple_be/include/cg/aarch64/aarch64_local_schedule.h b/src/mapleall/maple_be/include/cg/aarch64/aarch64_local_schedule.h index 80b9d6bae12ebec5d3539edc89c0400fd0ff2fdf..9afb372dc3d1e510a760f4c595415b5546b20e54 100644 --- a/src/mapleall/maple_be/include/cg/aarch64/aarch64_local_schedule.h +++ b/src/mapleall/maple_be/include/cg/aarch64/aarch64_local_schedule.h @@ -25,7 +25,6 @@ class AArch64LocalSchedule : public LocalSchedule { ~AArch64LocalSchedule() override = default; void FinishScheduling(CDGNode &cdgNode) override; - void DumpInsnInfoByScheduledOrder(CDGNode &cdgNode) const override; }; } /* namespace maplebe */ diff --git a/src/mapleall/maple_be/include/cg/aarch64/aarch64_md.def b/src/mapleall/maple_be/include/cg/aarch64/aarch64_md.def index 493666336f91dabb6f47ee88778cb26012d430e5..7a41a210a19258f8690b6b134794b109096aefcf 100644 --- a/src/mapleall/maple_be/include/cg/aarch64/aarch64_md.def +++ b/src/mapleall/maple_be/include/cg/aarch64/aarch64_md.def @@ -348,6 +348,15 @@ DEFINE_MOP(MOP_wfminrrr, {&OpndDesc::Reg32FD, &OpndDesc::Reg32FS, &OpndDesc::Reg /* MOP_xfminrrr */ DEFINE_MOP(MOP_xfminrrr, {&OpndDesc::Reg64FD, &OpndDesc::Reg64FS, &OpndDesc::Reg64FS}, 0, kLtFpalu, "fmin", "0,1,2", 1) +/* MOP_wfmaxnmrrr */ +DEFINE_MOP(MOP_wfmaxnmrrr, {&OpndDesc::Reg32FD, &OpndDesc::Reg32FS, &OpndDesc::Reg32FS}, 0, kLtFpalu, "fmaxnm", "0,1,2", 1) +/* MOP_xfmaxnmrrr */ +DEFINE_MOP(MOP_xfmaxnmrrr, {&OpndDesc::Reg64FD, &OpndDesc::Reg64FS, &OpndDesc::Reg64FS}, 0, kLtFpalu, "fmaxnm", "0,1,2", 1) +/* MOP_wfminnmrrr */ +DEFINE_MOP(MOP_wfminnmrrr, {&OpndDesc::Reg32FD, &OpndDesc::Reg32FS, &OpndDesc::Reg32FS}, 0, kLtFpalu, "fminnm", "0,1,2", 1) +/* MOP_xfminnmrrr */ +DEFINE_MOP(MOP_xfminnmrrr, {&OpndDesc::Reg64FD, &OpndDesc::Reg64FS, &OpndDesc::Reg64FS}, 0, kLtFpalu, "fminnm", "0,1,2", 1) + /* MOP_wsdivrrr */ DEFINE_MOP(MOP_wsdivrrr, {&OpndDesc::Reg32ID, &OpndDesc::Reg32IS, &OpndDesc::Reg32IS}, CANTHROW, kLtDiv, "sdiv", "0,1,2", 1) /* MOP_xsdivrrr */ @@ -382,7 +391,9 @@ DEFINE_MOP(MOP_wubfizrri5i5, {&OpndDesc::Reg32ID, &OpndDesc::Reg32IS, &OpndDesc: /* MOP_xubfizrri6i6 */ DEFINE_MOP(MOP_xubfizrri6i6, {&OpndDesc::Reg64ID, &OpndDesc::Reg64IS, &OpndDesc::Imm6, &OpndDesc::Imm6}, 0, kLtAluShift, "ubfiz", "0,1,2,3", 1, MOP_xubfizrri6i6Valid) -/* MOP_xsbfizrri6i6 Signed Bitfield Insert in Zero */ +/* MOP_wsbfizrri5i5 Signed Bitfield Insert in Zero */ +DEFINE_MOP(MOP_wsbfizrri5i5, {&OpndDesc::Reg32ID, &OpndDesc::Reg32IS, &OpndDesc::Imm5, &OpndDesc::Imm5}, 0, kLtAluShift, "sbfiz", "0,1,2,3", 1, MOP_wsbfizrri5i5Valid) +/* MOP_xsbfizrri6i6 */ DEFINE_MOP(MOP_xsbfizrri6i6, {&OpndDesc::Reg64ID, &OpndDesc::Reg64IS, &OpndDesc::Imm6, &OpndDesc::Imm6}, 0, kLtAluShift, "sbfiz", "0,1,2,3", 1, MOP_xsbfizrri6i6Valid) /* MOP_wbfirri5i5 -- Bitfield Insert */ @@ -466,14 +477,14 @@ DEFINE_MOP(MOP_sdivrrr, {&OpndDesc::Reg32FD, &OpndDesc::Reg32FS, &OpndDesc::Reg3 DEFINE_MOP(MOP_ddivrrr, {&OpndDesc::Reg64FD, &OpndDesc::Reg64FS, &OpndDesc::Reg64FS}, CANTHROW, kLtAdvsimdDivD, "fdiv", "0,1,2", 1) /* MOP_smadd */ -DEFINE_MOP(MOP_smadd, {&OpndDesc::Reg32FD, &OpndDesc::Reg32FS, &OpndDesc::Reg32FS, &OpndDesc::Reg32FS}, CANTHROW, kLtFpmul, "fmadd", "0,1,2,3", 1) +DEFINE_MOP(MOP_smadd, {&OpndDesc::Reg32FD, &OpndDesc::Reg32FS, &OpndDesc::Reg32FS, &OpndDesc::Reg32FS}, CANTHROW, kLtFpmac, "fmadd", "0,1,2,3", 1) /* MOP_dmadd */ -DEFINE_MOP(MOP_dmadd, {&OpndDesc::Reg64FD, &OpndDesc::Reg64FS, &OpndDesc::Reg64FS, &OpndDesc::Reg64FS}, CANTHROW, kLtFpmul, "fmadd", "0,1,2,3", 1) +DEFINE_MOP(MOP_dmadd, {&OpndDesc::Reg64FD, &OpndDesc::Reg64FS, &OpndDesc::Reg64FS, &OpndDesc::Reg64FS}, CANTHROW, kLtFpmac, "fmadd", "0,1,2,3", 1) /* MOP_smsub */ -DEFINE_MOP(MOP_smsub, {&OpndDesc::Reg32FD, &OpndDesc::Reg32FS, &OpndDesc::Reg32FS, &OpndDesc::Reg32FS}, CANTHROW, kLtFpmul, "fmsub", "0,1,2,3", 1) +DEFINE_MOP(MOP_smsub, {&OpndDesc::Reg32FD, &OpndDesc::Reg32FS, &OpndDesc::Reg32FS, &OpndDesc::Reg32FS}, CANTHROW, kLtFpmac, "fmsub", "0,1,2,3", 1) /* MOP_dmsub */ -DEFINE_MOP(MOP_dmsub, {&OpndDesc::Reg64FD, &OpndDesc::Reg64FS, &OpndDesc::Reg64FS, &OpndDesc::Reg64FS}, CANTHROW, kLtFpmul, "fmsub", "0,1,2,3", 1) +DEFINE_MOP(MOP_dmsub, {&OpndDesc::Reg64FD, &OpndDesc::Reg64FS, &OpndDesc::Reg64FS, &OpndDesc::Reg64FS}, CANTHROW, kLtFpmac, "fmsub", "0,1,2,3", 1) /* MOP_snmul */ DEFINE_MOP(MOP_snmul, {&OpndDesc::Reg32FD, &OpndDesc::Reg32FS, &OpndDesc::Reg32FS}, CANTHROW, kLtFpmul, "fnmul", "0,1,2", 1) @@ -518,6 +529,17 @@ DEFINE_MOP(MOP_tls_desc_rel, {&OpndDesc::Reg64ID, &OpndDesc::Reg64IS, &OpndDesc: */ DEFINE_MOP(MOP_tls_desc_call, {&OpndDesc::Reg64ID, &OpndDesc::Reg64ID, &OpndDesc::ListSrc}, ISSPCALL | CANTHROW | SPINTRINSIC, kLtBranch, "tlsdesccall", "0,1", 4) +/* + * A special hack for tls warmup opt. + * We just need a insn pattern for ld to relocation, and do not add a call (blr) to avoid x0 clobbered. + * adrp x0, , :tlsdesc:symbol + * ldr x1, [x0, #tlsdesc_lo12:symbol]] + * add x0, #tlsdesc_lo12:symbol + * .tlsdesccall symbol + * nop // place holder, may not be needed if TLS image is bigger than reserved space. + */ +DEFINE_MOP(MOP_tls_desc_call_warmup, {&OpndDesc::Reg64ID, &OpndDesc::Reg64ID, &OpndDesc::ListSrc}, ISCALL | CANTHROW | SPINTRINSIC, kLtBranch, "tlsdesccall", "0,1", 2) + /* * will be emit to three instrunctions in a row: * adrp xd, :got:__staticDecoupleValueOffset$$xxx+offset @@ -989,8 +1011,8 @@ DEFINE_MOP(MOP_vuaddwvvu, {&OpndDesc::Reg128VD, &OpndDesc::Reg128VS, &OpndDesc:: DEFINE_MOP(MOP_vsaddw2vvv, {&OpndDesc::Reg128VD, &OpndDesc::Reg128VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "saddw2", "0,1,2", 1) DEFINE_MOP(MOP_vuaddw2vvv, {&OpndDesc::Reg128VD, &OpndDesc::Reg128VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "uaddw2", "0,1,2", 1) DEFINE_MOP(MOP_vaddvvv, {&OpndDesc::Reg128VD, &OpndDesc::Reg128VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "add", "0,1,2", 1) -DEFINE_MOP(MOP_vmuluuu, {&OpndDesc::Reg64VD, &OpndDesc::Reg64VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtFpalu, "mul", "0,1,2", 1, MOP_vmuluuuRegisterLimit) -DEFINE_MOP(MOP_vmulvvv, {&OpndDesc::Reg128VD, &OpndDesc::Reg128VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "mul", "0,1,2", 1, MOP_vmulvvvRegisterLimit) +DEFINE_MOP(MOP_vmuluuu, {&OpndDesc::Reg64VD, &OpndDesc::Reg64VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtAdvsimdMul, "mul", "0,1,2", 1, MOP_vmuluuuRegisterLimit) +DEFINE_MOP(MOP_vmulvvv, {&OpndDesc::Reg128VD, &OpndDesc::Reg128VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtAdvsimdMulQ, "mul", "0,1,2", 1, MOP_vmulvvvRegisterLimit) DEFINE_MOP(MOP_vsubrrr, {&OpndDesc::Reg64FD, &OpndDesc::Reg64FS, &OpndDesc::Reg64FS}, ISVECTOR, kLtFpalu, "sub", "0,1,2", 1) DEFINE_MOP(MOP_vsubuuu, {&OpndDesc::Reg64VD, &OpndDesc::Reg64VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtFpalu, "sub", "0,1,2", 1) DEFINE_MOP(MOP_vsubvvv, {&OpndDesc::Reg128VD, &OpndDesc::Reg128VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "sub", "0,1,2", 1) @@ -1519,6 +1541,9 @@ DEFINE_MOP(MOP_tail_call_opt_xbl, {&OpndDesc::AddressName, &OpndDesc::ListSrc}, /* MOP_tail_call_opt_xblr -- branch without link (call) to register; this is a special definition */ DEFINE_MOP(MOP_tail_call_opt_xblr, {&OpndDesc::Reg64IS, &OpndDesc::ListSrc}, CANTHROW | ISTAILCALL, kLtBranch, "br", "0", 1) +/* MOP_prefetch */ +DEFINE_MOP(MOP_prefetch, {&OpndDesc::Reg64IS, &OpndDesc::Imm32, &OpndDesc::Imm32}, 0, kLtUndef, "intrinsic_prefetch", "0,1,2", 1) + /* MOP_pseudo_param_def_x, */ DEFINE_MOP(MOP_pseudo_param_def_x, {&OpndDesc::Reg64ID}, 0, kLtUndef, "//MOP_pseudo_param_def", "0", 0) @@ -1550,6 +1575,9 @@ DEFINE_MOP(MOP_pseudo_ret_float, {&OpndDesc::Reg64FS}, 0, kLtUndef, "//MOP_pseud /* MOP_pseudo_eh_def_x, */ DEFINE_MOP(MOP_pseudo_eh_def_x, {&OpndDesc::Reg64ID}, 0, kLtUndef, "//MOP_pseudo_eh_def_x", "0", 0) +/* The semantics of assert_nonnull is similar to call, and cannot be scheduled. */ +/* MOP_ret_assert_nonnull, */ +DEFINE_MOP(MOP_assert_nonnull, {&OpndDesc::Reg32ID, &OpndDesc::Mem32S}, ISLOAD | CANTHROW | ISCALL, kLtUndef, "ldr", "0,1", 1, MOP_wldrValid, MOP_wldrSplit) /*MOP_nop */ DEFINE_MOP(MOP_nop, {}, ISNOP, kLtAlu, "nop", "", 1) diff --git a/src/mapleall/maple_be/include/cg/aarch64/aarch64_mem_reference.h b/src/mapleall/maple_be/include/cg/aarch64/aarch64_mem_reference.h new file mode 100644 index 0000000000000000000000000000000000000000..4106b4bf57ab9c20a065bd405368c421355b2347 --- /dev/null +++ b/src/mapleall/maple_be/include/cg/aarch64/aarch64_mem_reference.h @@ -0,0 +1,185 @@ +/* + * Copyright (c) [2023] Huawei Technologies Co.,Ltd.All rights reserved. + * + * OpenArkCompiler is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * + * http://license.coscl.org.cn/MulanPSL2 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ +#ifndef MAPLEBE_INCLUDE_CG_AARCH64_AARCH64_MEM_REFERENCE_H +#define MAPLEBE_INCLUDE_CG_AARCH64_AARCH64_MEM_REFERENCE_H + +#include "deps.h" +#include "aarch64_insn.h" + +namespace maplebe { +class AArch64MemReference { + public: + // If the two memory reference sets do not have the same element(ostIdx), + // there is no alias, return false. + static bool HasMemoryReferenceAlias(const MemDefUseSet &refSet1, const MemDefUseSet &refSet2) { + // Process conservatively when no alias info is available + if (refSet1.empty() || refSet2.empty()) { + return true; + } + for (const auto &ostIdx : refSet2) { + if (refSet1.find(ostIdx) != refSet1.end()) { + return true; + } + } + return false; + } + + // Check memory overlap of same baseAddress in basic analysis and + // can be used for both [stack] and [heap] memory. + static bool IsMemoryOverlap(const Insn &memInsn1, const Insn &memInsn2, + const Insn *baseDefInsn1, const Insn *baseDefInsn2) { + auto *memOpnd1 = static_cast(memInsn1.GetMemOpnd()); + auto *memOpnd2 = static_cast(memInsn2.GetMemOpnd()); + ASSERT_NOT_NULL(memOpnd1); + ASSERT_NOT_NULL(memOpnd2); + // Must be BOI-mode + ASSERT(memOpnd1->GetAddrMode() == MemOperand::kBOI && memOpnd2->GetAddrMode() == MemOperand::kBOI, + "invalid addressing mode"); + + RegOperand *baseOpnd1 = memOpnd1->GetBaseRegister(); + RegOperand *baseOpnd2 = memOpnd2->GetBaseRegister(); + // BaseRegister will be nullptr in BOI-mode, in what cases? + if (baseOpnd1 == nullptr || baseOpnd2 == nullptr) { + return true; + } + + // If the two base addresses are different, we can not analyze whether they overlap here, + // so we process conservatively. + if (baseOpnd1->GetRegisterNumber() != baseOpnd2->GetRegisterNumber()) { + return true; + } + if (baseDefInsn1 != baseDefInsn2) { + return true; + } + + OfstOperand *ofstOpnd1 = memOpnd1->GetOffsetImmediate(); + OfstOperand *ofstOpnd2 = memOpnd2->GetOffsetImmediate(); + + int64 ofstValue1 = (ofstOpnd1 == nullptr ? 0 : ofstOpnd1->GetOffsetValue()); + int64 ofstValue2 = (ofstOpnd2 == nullptr ? 0 : ofstOpnd2->GetOffsetValue()); + + // Compatible with the load/store pair and load/store + uint32 memByteSize1 = memInsn1.GetMemoryByteSize(); + uint32 memByteSize2 = memInsn2.GetMemoryByteSize(); + + int64 memByteBoundary1 = ofstValue1 + static_cast(memByteSize1); + int64 memByteBoundary2 = ofstValue2 + static_cast(memByteSize2); + + // no overlap + // baseAddr ofst2 ofst1 ofst2---> + // |________|___memSize2_____|_____memSize1_____|__________ + // | | + // memBoundary2 memBoundary1 + if (ofstValue2 >= memByteBoundary1 || ofstValue1 >= memByteBoundary2) { + return false; + } + return true; + } + + // Simply distinguish irrelevant stack memory. + static bool HasBasicMemoryDep(const Insn &memInsn1, const Insn &memInsn2, Insn *baseDefInsn1, Insn *baseDefInsn2) { + // The callee-save and callee-reload instructions do not conflict with any other memory access instructions, + // we use the $isIndependent field to check that. + const MemDefUse *memReference1 = memInsn1.GetReferenceOsts(); + const MemDefUse *memReference2 = memInsn2.GetReferenceOsts(); + if (memReference1 != nullptr && memReference1->IsIndependent()) { + return false; + } + if (memReference2 != nullptr && memReference2->IsIndependent()) { + return false; + } + + auto *memOpnd1 = static_cast(memInsn1.GetMemOpnd()); + auto *memOpnd2 = static_cast(memInsn2.GetMemOpnd()); + // Not here to consider StImmOperand(e.g. adrp) or call(e.g. bl) + if (memOpnd1 == nullptr || memOpnd2 == nullptr) { + return true; + } + // 1. Check MIRSymbol + if (memOpnd1->GetSymbol() != nullptr && memOpnd2->GetSymbol() != nullptr && + memOpnd1->GetSymbol() != memOpnd2->GetSymbol()) { + return false; + } + // Only consider the BOI-mode for basic overlap analysis + if (memOpnd1->GetAddrMode() != MemOperand::kBOI || memOpnd2->GetAddrMode() != MemOperand::kBOI) { + return true; + } + RegOperand *baseOpnd1 = memOpnd1->GetBaseRegister(); + RegOperand *baseOpnd2 = memOpnd2->GetBaseRegister(); + // BaseRegister will be nullptr in BOI-mode, in what cases? + if (baseOpnd1 == nullptr || baseOpnd2 == nullptr) { + return true; + } + // 2. Check memory overlap + if (!IsMemoryOverlap(memInsn1, memInsn2, baseDefInsn1, baseDefInsn2)) { + return false; + } + return true; + } + + static bool HasAliasMemoryDep(const Insn &fromMemInsn, const Insn &toMemInsn, DepType depType) { + const MemDefUse *fromReferenceOsts = fromMemInsn.GetReferenceOsts(); + const MemDefUse *toReferenceOsts = toMemInsn.GetReferenceOsts(); + // Process conservatively when no alias info is available + if (fromReferenceOsts == nullptr || toReferenceOsts == nullptr) { + return true; + } + const MemDefUseSet &fromMemDefSet = fromReferenceOsts->GetDefSet(); + const MemDefUseSet &fromMemUseSet = fromReferenceOsts->GetUseSet(); + const MemDefUseSet &toMemDefSet = toReferenceOsts->GetDefSet(); + const MemDefUseSet &toMemUseSet = toReferenceOsts->GetUseSet(); + + switch (depType) { + // Check write->read dependency + case kDependenceTypeTrue: + return HasMemoryReferenceAlias(fromMemDefSet, toMemUseSet); + // Check read->write dependency + case kDependenceTypeAnti: + return HasMemoryReferenceAlias(fromMemUseSet, toMemDefSet); + // Check write->write dependency + case kDependenceTypeOutput: + return HasMemoryReferenceAlias(fromMemDefSet, toMemDefSet); + case kDependenceTypeNone: { + if (HasMemoryReferenceAlias(fromMemDefSet, toMemDefSet) || + HasMemoryReferenceAlias(fromMemDefSet, toMemUseSet) || + HasMemoryReferenceAlias(fromMemUseSet, toMemDefSet)) { + return true; + } else { + return false; + } + } + default: + CHECK_FATAL(false, "invalid memory dependency type"); + } + } + + // The entrance: if memory dependency needs to be build, return true. + // fromMemInsn & toMemInsn: will be [load, store, adrp, call] + // baseDefInsns: for basic memory dependency analysis, they define the base address and can be nullptr. + // depType: for memory analysis based on me-alias-info, only consider TRUE, ANTI, OUTPUT and NONE dependency type + // from fromMemInsn to toMemInsn, if it is NONE, we take care of both def and use sets. + static bool NeedBuildMemoryDependency(const Insn &fromMemInsn, const Insn &toMemInsn, Insn *baseDefInsn1, + Insn *baseDefInsn2, DepType depType) { + // 1. Do basic analysis of memory-related instructions based on cg-ir + if (!HasBasicMemoryDep(fromMemInsn, toMemInsn, baseDefInsn1, baseDefInsn2)) { + return false; + } + // 2. Do alias analysis of memory-related instructions based on me-alias-info + return HasAliasMemoryDep(fromMemInsn, toMemInsn, depType); + } +}; +} // namespace maplebe + +#endif // MAPLEBE_INCLUDE_CG_AARCH64_AARCH64_MEM_REFERENCE_H diff --git a/src/mapleall/maple_be/include/cg/aarch64/aarch64_mop_valid.h b/src/mapleall/maple_be/include/cg/aarch64/aarch64_mop_valid.h index d540b4ebb41214a062260741e929241ed491ccc0..02b01f272136c00aab426b336220cd8f12ea1ebd 100644 --- a/src/mapleall/maple_be/include/cg/aarch64/aarch64_mop_valid.h +++ b/src/mapleall/maple_be/include/cg/aarch64/aarch64_mop_valid.h @@ -29,22 +29,32 @@ inline bool StrLdr8Valid(Operand *o) { // Immediate verification for half word from/to memory. simm: -256 ~ 255; pimm: 0 ~ 8190, multiple of 2. inline bool StrLdr16Valid(Operand *o) { - if (static_cast(o)->GetAddrMode() == MemOperand::kLo12Li) { - return (static_cast(AArch64isa::GetMemOpndOffsetValue(o)) & static_cast(k1BitSize)) == - static_cast(k0BitSize); + MemOperand *memOpnd = static_cast(o); + if (memOpnd->GetAddrMode() == MemOperand::kLo12Li) { + uint8 symAlign = 0; + const MIRSymbol *sym = memOpnd->GetSymbol(); + if (sym && sym->IsConst() && !sym->NeedGOT(CGOptions::IsPIC(), CGOptions::IsPIE())) { + symAlign = 1U << sym->GetSymbolAlign(CGOptions::IsArm64ilp32()); + } + return ((symAlign + static_cast(AArch64isa::GetMemOpndOffsetValue(o))) & static_cast(k1BitSize)) == + static_cast(k0BitSize); } - return StrLdrInsnSignedOfstValid(AArch64isa::GetMemOpndOffsetValue(o), k1ByteSize, - static_cast(o)->IsIntactIndexed()); + return StrLdrInsnSignedOfstValid(AArch64isa::GetMemOpndOffsetValue(o), k1ByteSize, memOpnd->IsIntactIndexed()); } // Immediate verification for a word from/to memory. simm: -256 ~ 255; pimm: 0 ~ 16380, multiple of 4. inline bool StrLdr32Valid(Operand *o) { - if (static_cast(o)->GetAddrMode() == MemOperand::kLo12Li) { - return (static_cast(AArch64isa::GetMemOpndOffsetValue(o)) & static_cast(k3BitSize)) == - static_cast(k0BitSize); + MemOperand *memOpnd = static_cast(o); + if (memOpnd->GetAddrMode() == MemOperand::kLo12Li) { + uint8 symAlign = 0; + const MIRSymbol *sym = memOpnd->GetSymbol(); + if (sym && sym->IsConst() && !sym->NeedGOT(CGOptions::IsPIC(), CGOptions::IsPIE())) { + symAlign = 1U << sym->GetSymbolAlign(CGOptions::IsArm64ilp32()); + } + return ((symAlign + static_cast(AArch64isa::GetMemOpndOffsetValue(o))) & static_cast(k3BitSize)) == + static_cast(k0BitSize); } - return StrLdrInsnSignedOfstValid(AArch64isa::GetMemOpndOffsetValue(o), k2ByteSize, - static_cast(o)->IsIntactIndexed()); + return StrLdrInsnSignedOfstValid(AArch64isa::GetMemOpndOffsetValue(o), k2ByteSize, memOpnd->IsIntactIndexed()); } // Immediate verification: value range -256 ~ 252, multiple of 4. @@ -58,12 +68,17 @@ inline bool StrLdr32PairValid(Operand *o) { // Immediate verification for 2 words from/to memory. simm: -256 ~ 255; pimm: 0 ~ 32760, multiple of 8. inline bool StrLdr64Valid(Operand *o) { - if (static_cast(o)->GetAddrMode() == MemOperand::kLo12Li) { - return (static_cast(AArch64isa::GetMemOpndOffsetValue(o)) & static_cast(k7BitSize)) == - static_cast(k0BitSize); + MemOperand *memOpnd = static_cast(o); + if (memOpnd->GetAddrMode() == MemOperand::kLo12Li) { + uint8 symAlign = 0; + const MIRSymbol *sym = memOpnd->GetSymbol(); + if (sym && sym->IsConst() && !sym->NeedGOT(CGOptions::IsPIC(), CGOptions::IsPIE())) { + symAlign = 1U << sym->GetSymbolAlign(CGOptions::IsArm64ilp32()); + } + return ((symAlign + static_cast(AArch64isa::GetMemOpndOffsetValue(o))) & static_cast(k7BitSize)) == + static_cast(k0BitSize); } - return StrLdrInsnSignedOfstValid(AArch64isa::GetMemOpndOffsetValue(o), k3ByteSize, - static_cast(o)->IsIntactIndexed()); + return StrLdrInsnSignedOfstValid(AArch64isa::GetMemOpndOffsetValue(o), k3ByteSize, memOpnd->IsIntactIndexed()); } // Immediate verification: value range -512 ~ 504, multiple of 8. @@ -77,12 +92,17 @@ inline bool StrLdr64PairValid(Operand *o) { // Immediate verification for 4 words from/to memory. simm: -256 ~ 255; pimm: 0 ~ 65520, multiple of 16. inline bool StrLdr128Valid(Operand *o) { - if (static_cast(o)->GetAddrMode() == MemOperand::kLo12Li) { - return (static_cast(AArch64isa::GetMemOpndOffsetValue(o)) & static_cast(k15BitSize)) == - static_cast(k0BitSize); + MemOperand *memOpnd = static_cast(o); + if (memOpnd->GetAddrMode() == MemOperand::kLo12Li) { + uint8 symAlign = 0; + const MIRSymbol *sym = memOpnd->GetSymbol(); + if (sym && sym->IsConst() && !sym->NeedGOT(CGOptions::IsPIC(), CGOptions::IsPIE())) { + symAlign = 1U << sym->GetSymbolAlign(CGOptions::IsArm64ilp32()); + } + return ((symAlign + static_cast(AArch64isa::GetMemOpndOffsetValue(o))) & static_cast(k15BitSize)) == + static_cast(k0BitSize); } - return StrLdrInsnSignedOfstValid(AArch64isa::GetMemOpndOffsetValue(o), k4ByteSize, - static_cast(o)->IsIntactIndexed()); + return StrLdrInsnSignedOfstValid(AArch64isa::GetMemOpndOffsetValue(o), k4ByteSize, memOpnd->IsIntactIndexed()); } // Immediate verification: value range -1024 ~ 1008, multiple of 16. @@ -445,6 +465,20 @@ inline bool MOP_xubfizrri6i6Valid(const MapleVector &opnds) { } } +inline bool MOP_wsbfizrri5i5Valid(const MapleVector &opnds) { + if ((opnds[kInsnThirdOpnd] != nullptr) && (opnds[kInsnFourthOpnd] != nullptr)) { + int64 lsb = static_cast(opnds[kInsnThirdOpnd])->GetValue(); + int64 width = static_cast(opnds[kInsnFourthOpnd])->GetValue(); + return Lsb5BitValid(lsb) && Width5BitValid(width, lsb); + } else { + bool checkThird = (opnds[kInsnThirdOpnd] != nullptr) ? + Lsb5BitValid(static_cast(opnds[kInsnThirdOpnd])->GetValue()) : true; + bool checkFourth = (opnds[kInsnFourthOpnd] != nullptr) ? + Width5BitOnlyValid(static_cast(opnds[kInsnFourthOpnd])->GetValue()) : true; + return checkThird && checkFourth; + } +} + inline bool MOP_xsbfizrri6i6Valid(const MapleVector &opnds) { if ((opnds[kInsnThirdOpnd] != nullptr) && (opnds[kInsnFourthOpnd] != nullptr)) { int64 lsb = static_cast(opnds[kInsnThirdOpnd])->GetValue(); diff --git a/src/mapleall/maple_be/include/cg/aarch64/aarch64_optimize_common.h b/src/mapleall/maple_be/include/cg/aarch64/aarch64_optimize_common.h index 0a1384cb65011012322bccc70f80dfb7677aa9a3..2b0142fac1f8422d6cb59c13b0e43c93015717f6 100644 --- a/src/mapleall/maple_be/include/cg/aarch64/aarch64_optimize_common.h +++ b/src/mapleall/maple_be/include/cg/aarch64/aarch64_optimize_common.h @@ -31,11 +31,12 @@ class AArch64InsnVisitor : public InsnVisitor { void ModifyJumpTarget(maple::LabelIdx targetLabel, BB &bb) override; void ModifyJumpTarget(Operand &targetOperand, BB &bb) override; void ModifyJumpTarget(BB &newTarget, BB &bb) override; - /* Check if it requires to add extra gotos when relocate bb */ + // Check if it requires to add extra gotos when relocate bb Insn *CloneInsn(Insn &originalInsn) override; LabelIdx GetJumpLabel(const Insn &insn) const override; bool IsCompareInsn(const Insn &insn) const override; bool IsCompareAndBranchInsn(const Insn &insn) const override; + bool IsTestAndBranchInsn(const Insn &insn) const override; bool IsAddOrSubInsn(const Insn &insn) const override; RegOperand *CreateVregFromReg(const RegOperand &pReg) override; void ReTargetSuccBB(BB &bb, LabelIdx newTarget) const override; @@ -43,6 +44,6 @@ class AArch64InsnVisitor : public InsnVisitor { BB *CreateGotoBBAfterCondBB(BB &bb, BB &fallthru, bool isTargetFallthru) const override; void ModifyFathruBBToGotoBB(BB &bb, LabelIdx labelIdx) const override; }; -} /* namespace maplebe */ +} // namespace maplebe -#endif /* MAPLEBE_INCLUDE_CG_AARCH64_AARCH64_OPTIMIZE_COMMON_H */ +#endif // MAPLEBE_INCLUDE_CG_AARCH64_AARCH64_OPTIMIZE_COMMON_H diff --git a/src/mapleall/maple_be/include/cg/aarch64/aarch64_peep.h b/src/mapleall/maple_be/include/cg/aarch64/aarch64_peep.h index b8e986026228629f723e670025aad1ba41377c2d..c5399d407c495a51c1c70261ef761fd67d0413d4 100644 --- a/src/mapleall/maple_be/include/cg/aarch64/aarch64_peep.h +++ b/src/mapleall/maple_be/include/cg/aarch64/aarch64_peep.h @@ -122,6 +122,20 @@ class CselToCsetPattern : public CGPeepPattern { RegOperand *useReg = nullptr; }; +// cmp w2, w3/imm +// csel w0, w1, w1, NE ===> mov w0, w1 +class CselToMovPattern : public CGPeepPattern { + public: + CselToMovPattern(CGFunc &cgFunc, BB &currBB, Insn &currInsn) + : CGPeepPattern(cgFunc, currBB, currInsn) {} + ~CselToMovPattern() override = default; + void Run(BB &bb, Insn &insn) override; + bool CheckCondition(Insn &insn) override; + std::string GetPatternName() override { + return "CselToMovPattern"; + } +}; + /* * mov w1, #1 * csel w2, w1, w0, EQ ===> csinc w2, w0, WZR, NE @@ -1114,7 +1128,8 @@ class CombineContiLoadAndStorePattern : public CGPeepPattern { * bl foo (change memory) * str x21, [x19, #16] */ - bool IsRegNotSameMemUseInInsn(const Insn &insn, regno_t regNO, bool isStore, int64 baseOfst) const; + bool IsRegNotSameMemUseInInsn(const Insn &checkInsn, const Insn &curInsn, regno_t curBaseRegNO, bool isCurStore, + int64 curBaseOfst, int64 curBaseMemRange) const; bool IsValidNormalLoadOrStorePattern(const Insn &insn, const Insn &prevInsn, const MemOperand &memOpnd, int64 curOfstVal, int64 prevOfstVal); bool IsValidStackArgLoadOrStorePattern(const Insn &curInsn, const Insn &prevInsn, const MemOperand &curMemOpnd, @@ -1467,7 +1482,10 @@ class AndAndCmpBranchesToTstPattern : public CGPeepPattern { return "AndAndCmpBranchesToCsetPattern"; } private: + bool CheckCondInsn(Insn &insn); + Insn *CheckAndGetPrevAndDefInsn(const RegOperand ®Opnd) const; bool CheckAndSelectPattern(const Insn &currInsn); + RegOperand *ccReg = nullptr; Insn *prevPrevAndInsn = nullptr; Insn *prevAndInsn = nullptr; Insn *prevCmpInsn = nullptr; @@ -1475,24 +1493,24 @@ class AndAndCmpBranchesToTstPattern : public CGPeepPattern { MOperator newEorMop = MOP_undef; int64 tstImmVal = -1; }; -/* - * cbnz w0, @label - * .... - * mov w0, #0 (elseBB) -->this instruction can be deleted - * - * cbz w0, @label - * .... - * mov w0, #0 (ifBB) -->this instruction can be deleted - * - * condition: - * 1.there is not predefine points of w0 in elseBB(ifBB) - * 2.the first opearnd of cbnz insn is same as the first Operand of mov insn - * 3.w0 is defined by move 0 - * 4.all preds of elseBB(ifBB) end with cbnz or cbz - * - * NOTE: if there are multiple preds and there is not define point of w0 in one pred, - * (mov w0, 0) can't be deleted, avoiding use before def. - */ + +// cbnz w0, @label +// .... +// mov w0, #0 (elseBB) -->this instruction can be deleted +// +// cbz w0, @label +// .... +// mov w0, #0 (ifBB) -->this instruction can be deleted +// +// condition: +// 1.there is not predefine points of w0 in elseBB(ifBB) +// 2.the first opearnd of cbnz insn is same as the first Operand of mov insn +// 3.w0 is defined by move 0 +// 4.all preds of elseBB(ifBB) end with cbnz/wcbnz or cbz/wcbz +// 5.w0 is only used in 32bit between mov 0 and next def point if preds has wcbz/wcbnz. +// +// NOTE: if there are multiple preds and there is not define point of w0 in one pred, +// (mov w0, 0) can't be deleted, avoiding use before def. class DeleteMovAfterCbzOrCbnzAArch64 : public PeepPattern { public: explicit DeleteMovAfterCbzOrCbnzAArch64(CGFunc &cgFunc) : PeepPattern(cgFunc) { @@ -1503,13 +1521,60 @@ class DeleteMovAfterCbzOrCbnzAArch64 : public PeepPattern { void Run(BB &bb, Insn &insn) override; private: - bool PredBBCheck(BB &bb, bool checkCbz, const Operand &opnd) const; + bool PredBBCheck(BB &bb, bool checkCbz, const Operand &opnd, bool is64BitOnly) const; bool OpndDefByMovZero(const Insn &insn) const; bool NoPreDefine(Insn &testInsn) const; void ProcessBBHandle(BB *processBB, const BB &bb, const Insn &insn) const; + bool NoMoreThan32BitUse(Insn &testInsn) const; CGCFG *cgcfg = nullptr; }; +// we optimize the following scenarios in this pattern: +// for example 1: +// mov w1, #9 +// cmp w0, #1 => cmp w0, #1 +// mov w2, #8 csel w0, w0, wzr, EQ +// csel w0, w1, w2, EQ add w0, w0, #8 +// for example 2: +// mov w1, #8 +// cmp w0, #1 => cmp w0, #1 +// mov w2, #9 cset w0, NE +// csel w0, w1, w2, EQ add w0, w0, #8 +// for example 3: +// mov w1, #3 +// cmp w0, #4 => cmp w0, #4 +// mov w2, #7 csel w0, w0, wzr, EQ +// csel w0, w1, w2, NE add w0, w0, #3 +// condition: +// 1. The source operand of the two mov instructions are immediate operand; +// 2. The difference value between two immediates is equal to the value being compared in the cmp insn; +// 3. The reg w1 and w2 are not used in the instructions after csel; +// 4. The condOpnd in csel insn must be CC_NE or CC_EQ; +// 5. If the value in w1 is less than value in w2, condition in csel must be CC_NE, otherwise, +// the difference between them must be one; +// 6. If the value in w1 is more than value in w2, condition in csel must be CC_EQ, otherwise, +// the difference between them must be one. +class CombineMovInsnBeforeCSelAArch64 : public PeepPattern { + public: + explicit CombineMovInsnBeforeCSelAArch64(CGFunc &cgFunc) : PeepPattern(cgFunc) {} + ~CombineMovInsnBeforeCSelAArch64() override { + insnMov2 = nullptr; + insnMov1 = nullptr; + cmpInsn = nullptr; + } + void Run(BB &bb, Insn &insn) override; + + private: + bool CheckCondition(Insn &insn); + Insn *FindPrevMovInsn(const Insn &insn, regno_t regNo) const; + Insn *FindPrevCmpInsn(const Insn &insn) const; + Insn *insnMov2 = nullptr; + Insn *insnMov1 = nullptr; + Insn *cmpInsn = nullptr; + bool needReverseCond = false; + bool needCsetInsn = false; +}; + /* * We optimize the following pattern in this function: * movz x0, #11544, LSL #0 @@ -1875,6 +1940,7 @@ class AArch64PrePeepHole1 : public PeepPatternMatch { kAndCmpBranchesToTbzOpt, kComplexExtendWordLslOpt, kAddCmpZeroOpt, + kCombineMovInsnBeforeCSelOpt, kPeepholeOptsNum, }; }; diff --git a/src/mapleall/maple_be/include/cg/aarch64/aarch64_phases.def b/src/mapleall/maple_be/include/cg/aarch64/aarch64_phases.def index 76e910a4ecd9acebb40bf07437ea1fbec2b791e7..95778786b96944bb71d31096d0832d8aa3c812d9 100644 --- a/src/mapleall/maple_be/include/cg/aarch64/aarch64_phases.def +++ b/src/mapleall/maple_be/include/cg/aarch64/aarch64_phases.def @@ -18,7 +18,6 @@ ADDTARGETPHASE("handlefunction", !CGOptions::UseNewCg()); ADDTARGETPHASE("instructionselector", CGOptions::UseNewCg()); ADDTARGETPHASE("handlecfg", CGOptions::UseNewCg()); - ADDTARGETPHASE("patchlongbranch", CGOptions::UseNewCg() && CGOptions::DoFixLongBranch()); ADDTARGETPHASE("cgprofuse", Options::profileUse); ADDTARGETPHASE("moveargs", true); ADDTARGETPHASE("instructionstandardize", CGOptions::UseNewCg()); @@ -63,10 +62,12 @@ ADDTARGETPHASE("framefinalize", true); ADDTARGETPHASE("cfgo", GetMIRModule()->IsCModule() && CGOptions::DoCFGO()); ADDTARGETPHASE("peephole0", CGOptions::DoPeephole()); + ADDTARGETPHASE("clearrdinfo", CGOptions::DoPeephole()); ADDTARGETPHASE("ebo", CGOptions::DoEBO()); ADDTARGETPHASE("postcfgo", CGOptions::DoCFGO()); ADDTARGETPHASE("duptail", !CGOptions::DoLiteProfUse() && !CGOptions::DoLiteProfGen()); ADDTARGETPHASE("cgpostpeephole", CGOptions::DoPeephole()); + ADDTARGETPHASE("postrasink", GetMIRModule()->IsCModule() && CGOptions::DoPostRASink()); ADDTARGETPHASE("yieldpoint", GetMIRModule()->IsJavaModule() && CGOptions::IsInsertYieldPoint()); ADDTARGETPHASE("localschedule", GetMIRModule()->IsCModule() && CGOptions::DoLocalSchedule()); ADDTARGETPHASE("cgsplitcriticaledge", CGOptions::DoLiteProfGen()); diff --git a/src/mapleall/maple_be/include/cg/aarch64/aarch64_proepilog.h b/src/mapleall/maple_be/include/cg/aarch64/aarch64_proepilog.h index 60be6df824e967a5028cf295be4216d9433c3b2a..36a72359585d7e8c7b37cbad1a754ee8e9f8d6fa 100644 --- a/src/mapleall/maple_be/include/cg/aarch64/aarch64_proepilog.h +++ b/src/mapleall/maple_be/include/cg/aarch64/aarch64_proepilog.h @@ -67,8 +67,10 @@ class AArch64GenProEpilog : public GenProEpilog { static void AppendInstructionPopPair(CGFunc &cgFunc, AArch64reg reg0, AArch64reg reg1, RegType rty, int32 offset); void Run() override; private: + AArch64reg GetStackGuardRegister(const BB &bb) const; + std::pair GetStackGuardCheckRegister(const BB &bb) const; MemOperand *GetDownStack(); - void GenStackGuard(); + RegOperand &GenStackGuard(AArch64reg regNO); void AddStackGuard(BB &bb); void GenStackGuardCheckInsn(BB &bb); BB &GetOrGenStackGuardCheckFailBB(BB &bb); diff --git a/src/mapleall/maple_be/include/cg/aarch64/aarch64_ra_opt.h b/src/mapleall/maple_be/include/cg/aarch64/aarch64_ra_opt.h index fbc73f660f33dc118374e95c4974880e678db0d6..bc28b96b51b84d4b3efaca6c7daa78d3298fc9b0 100644 --- a/src/mapleall/maple_be/include/cg/aarch64/aarch64_ra_opt.h +++ b/src/mapleall/maple_be/include/cg/aarch64/aarch64_ra_opt.h @@ -133,7 +133,7 @@ class VregRename : public RaOptPattern { VregRename(CGFunc &func, MemPool &pool, LoopAnalysis &loop, bool dump = false) : RaOptPattern(func, pool, dump), loopInfo(loop), renameInfo(alloc.Adapter()) { renameInfo.resize(cgFunc.GetMaxRegNum()); - ccRegno = static_cast(&cgFunc.GetOrCreateRflag())->GetRegisterNumber(); + ccRegno = static_cast(&cgFunc.GetOrCreateRflag())->GetRegisterNumber(); } ~VregRename() override = default; diff --git a/src/mapleall/maple_be/include/cg/aarch64/aarch64_rce.h b/src/mapleall/maple_be/include/cg/aarch64/aarch64_rce.h index e99124d505701b0db5f053f535c8b33b2c332aa0..e606e6c42718591ef48b5f056ad619044f196f2f 100644 --- a/src/mapleall/maple_be/include/cg/aarch64/aarch64_rce.h +++ b/src/mapleall/maple_be/include/cg/aarch64/aarch64_rce.h @@ -94,9 +94,6 @@ class AArch64RedundantComputeElim : public RedundantComputeElim { !insn1->OpndIsUse(i) && !insn2->OpndIsUse(i)) { continue; } - if (!opnd1.BasicEquals(opnd2)) { - return false; - } if (opk1 == Operand::kOpdRegister) { if (!static_cast(opnd1).Equals(opnd2)) { return false; diff --git a/src/mapleall/maple_be/include/cg/aarch64/aarch64_reaching.h b/src/mapleall/maple_be/include/cg/aarch64/aarch64_reaching.h index 5f0363fdd69b9673e8c0bd41f93108c07c5cc215..2f2c8fb1ed439bfea209726c0190690a3e890c0d 100644 --- a/src/mapleall/maple_be/include/cg/aarch64/aarch64_reaching.h +++ b/src/mapleall/maple_be/include/cg/aarch64/aarch64_reaching.h @@ -46,8 +46,6 @@ class AArch64ReachingDefinition : public ReachingDefinition { void GenAllCallerSavedRegs(BB &bb, Insn &insn) final; bool IsRegKilledByCallInsn(const Insn &insn, regno_t regNO) const final; bool KilledByCallBetweenInsnInSameBB(const Insn &startInsn, const Insn &endInsn, regno_t regNO) const final; - void AddRetPseudoInsn(BB &bb) final; - void AddRetPseudoInsns() final; bool IsCallerSavedReg(uint32 regNO) const final; void FindRegDefInBB(uint32 regNO, BB &bb, InsnSet &defInsnSet) const final; void FindMemDefInBB(uint32 offset, BB &bb, InsnSet &defInsnSet) const final; diff --git a/src/mapleall/maple_be/include/cg/aarch64/aarch64_validbit_opt.h b/src/mapleall/maple_be/include/cg/aarch64/aarch64_validbit_opt.h index 721353426ebe37a76ce565c53f779e9cba504b38..1eec11cca0899134d58e8f6b3111e0973514155b 100644 --- a/src/mapleall/maple_be/include/cg/aarch64/aarch64_validbit_opt.h +++ b/src/mapleall/maple_be/include/cg/aarch64/aarch64_validbit_opt.h @@ -27,7 +27,7 @@ class AArch64ValidBitOpt : public ValidBitOpt { ~AArch64ValidBitOpt() override = default; void DoOpt() override; - void SetValidBits(Insn &insn) override; + bool SetValidBits(Insn &insn) override; bool SetPhiValidBits(Insn &insn) override; private: void OptPatternWithImplicitCvt(BB &bb, Insn &insn); @@ -115,33 +115,32 @@ class ExtValidBitPattern : public PropPattern { MOperator newMop = MOP_undef; }; -// check uxtw Vreg Preg case -// uxtw Vreg1 Preg0 -// if use of R1 is 32bit -// -> -// movx Vreg1 Preg0 -// make use of RA to delete redundant insn, if Vreg1 is allocated to R0 -// then the insn is removed. +// redundant uxtw/sxtw prop, and modify all useInsn form X mop to W mop +// case1 - uxtw vreg preg, modify utxw to wmov, not prop +// uxtw R101, R0 ==> mov R101, R0 +// xcbz R101, label2 wcbz R101, label2 +// case2 - uxtw vreg vreg, prop src +// uxtw R102, R101 ==> wcbz R101, label2 +// xcbz R102, label2 class RedundantExpandProp : public PropPattern { public: - RedundantExpandProp(CGFunc &cgFunc, CGSSAInfo &info, LiveIntervalAnalysis &ll) : PropPattern(cgFunc, info, ll) {} - ~RedundantExpandProp() override { - newDstOpnd = nullptr; - newSrcOpnd = nullptr; - destVersion = nullptr; - srcVersion = nullptr; - } + RedundantExpandProp(CGFunc &cgFunc, CGSSAInfo &info, LiveIntervalAnalysis &ll) + : PropPattern(cgFunc, info, ll) {} + ~RedundantExpandProp() override = default; void Run(BB &bb, Insn &insn) override; bool CheckCondition(Insn &insn) override; std::string GetPatternName() override { return "RedundantExpandProp"; } - private: - RegOperand *newDstOpnd = nullptr; - RegOperand *newSrcOpnd = nullptr; - VRegVersion *destVersion = nullptr; - VRegVersion *srcVersion = nullptr; + bool CheckAllUseInsnCanUseMopW(const RegOperand &defOpnd, InsnSet &visitedInsn); + bool CheckInsnCanUseMopW(const RegOperand &defOpnd, DUInsnInfo &useInfo); + bool CheckOtherInsnUseMopW(const RegOperand &defOpnd, DUInsnInfo &useInfo) const; + bool CheckPhiSrcRegDefW(const RegOperand ®Opnd) const; + void ModifyInsnUseMopW(); + + std::vector needModifyInsns; + std::vector> checkPhiInsns; // }; /* @@ -213,6 +212,48 @@ class CmpBranchesPattern : public ValidBitPattern { bool isEqOrNe = false; bool is64Bit = false; }; + +// when a register's valid bit < right shift bit, means it can only return 0 +// example: +// asr w0, w19, #31 (w19.vb < 31) => mov w0, #0 +class RSPattern : public ValidBitPattern { + public: + RSPattern(CGFunc &cgFunc, CGSSAInfo &info) : ValidBitPattern(cgFunc, info) {} + ~RSPattern() override {} + void Run(BB &bb, Insn &insn) override; + bool CheckCondition(Insn &insn) override; + std::string GetPatternName() override { + return "RSPattern"; + }; + + private: + MOperator newMop = MOP_undef; + uint32 oldImmSize = 0; + bool oldImmIsSigned = false; +}; + +// fold rev before cbz/cbnz, cmp & beq/bne +// rev16 w0, w0 +// and w0, w0, #16383 and w0, w0, #0xff3fff3f +// cbnz w0, .label ===> cbnz w0, .label +class RevCbzToCbzPattern : public ValidBitPattern { + public: + RevCbzToCbzPattern(CGFunc &cgFunc, CGSSAInfo &info) : ValidBitPattern(cgFunc, info) {} + ~RevCbzToCbzPattern() override { + cbzInsn = nullptr; + } + void Run(BB &bb, Insn &insn) override; + bool CheckCondition(Insn &insn) override; + std::string GetPatternName() override { + return "RevCbzToCbzPattern"; + } + + private: + void SetRevValue(MOperator mop, const uint64 &oldValue, uint64 &newValue, bool isLogicalImm16) const; + Insn *cbzInsn = nullptr; + std::vector oldInsns; + std::vector newInsns; +}; } /* namespace maplebe */ #endif /* MAPLEBE_INCLUDE_CG_AARCH64_VALIDBIT_OPT_H */ diff --git a/src/mapleall/maple_be/include/cg/base_schedule.h b/src/mapleall/maple_be/include/cg/base_schedule.h index e4f5d450db32195aa73cd7fa4abed6a074cfa61b..e435edb63a6a3fdd36dc49b79423e32bf8d8d937 100644 --- a/src/mapleall/maple_be/include/cg/base_schedule.h +++ b/src/mapleall/maple_be/include/cg/base_schedule.h @@ -44,11 +44,13 @@ class BaseSchedule { protected: void InitInsnIdAndLocInsn(); + // Using total number of machine instructions to control the end of the scheduling process + void InitMachineInsnNum(CDGNode &cdgNode) const; uint32 CaculateOriginalCyclesOfBB(CDGNode &cdgNode) const; void DumpRegionInfoBeforeSchedule(CDGRegion ®ion) const; void DumpCDGNodeInfoBeforeSchedule(CDGNode &cdgNode) const; void DumpCDGNodeInfoAfterSchedule(CDGNode &cdgNode) const; - virtual void DumpInsnInfoByScheduledOrder(CDGNode &cdgNode) const = 0; + void DumpInsnInfoByScheduledOrder(CDGNode &cdgNode) const; MemPool &schedMP; MapleAllocator schedAlloc; @@ -59,6 +61,6 @@ class BaseSchedule { bool doDelayHeu = false; bool isUnitTest = false; }; -} /* namespace maplebe */ +} // namespace maplebe #endif // MAPLEBE_INCLUDE_CG_BASE_SCHEDULE_H diff --git a/src/mapleall/maple_be/include/cg/cfgo.h b/src/mapleall/maple_be/include/cg/cfgo.h index faf37ea2be91467701892b2940276a70531d8ff2..c24fe3ca1f3aae84820d4e8aaf97b52a96cd022e 100644 --- a/src/mapleall/maple_be/include/cg/cfgo.h +++ b/src/mapleall/maple_be/include/cg/cfgo.h @@ -89,7 +89,7 @@ class FlipBRPattern : public OptimizationPattern { virtual MOperator FlipConditionOp(MOperator flippedOp) = 0; }; -/* This class represents the scenario that the BB is unreachable. */ +// This class represents the scenario that the BB is unreachable. class UnreachBBPattern : public OptimizationPattern { public: explicit UnreachBBPattern(CGFunc &func) : OptimizationPattern(func) { @@ -102,10 +102,8 @@ class UnreachBBPattern : public OptimizationPattern { bool Optimize(BB &curBB) override; }; -/* - * This class represents the scenario that a common jump BB can be duplicated - * to one of its another predecessor. - */ +// This class represents the scenario that a common jump BB can be duplicated +// to one of its another predecessor. class DuplicateBBPattern : public OptimizationPattern { public: explicit DuplicateBBPattern(CGFunc &func) : OptimizationPattern(func) { @@ -120,9 +118,7 @@ class DuplicateBBPattern : public OptimizationPattern { static constexpr int kThreshold = 10; }; -/* - * This class represents the scenario that a BB contains nothing. - */ +// This class represents the scenario that a BB contains nothing. class EmptyBBPattern : public OptimizationPattern { public: explicit EmptyBBPattern(CGFunc &func) : OptimizationPattern(func) { @@ -161,6 +157,6 @@ MAPLE_FUNC_PHASE_DECLARE_END MAPLE_FUNC_PHASE_DECLARE_BEGIN(CgPostCfgo, maplebe::CGFunc) OVERRIDE_DEPENDENCE MAPLE_FUNC_PHASE_DECLARE_END -} /* namespace maplebe */ +} // namespace maplebe -#endif /* MAPLEBE_INCLUDE_CG_CFGO_H */ +#endif // MAPLEBE_INCLUDE_CG_CFGO_H diff --git a/src/mapleall/maple_be/include/cg/cfi.h b/src/mapleall/maple_be/include/cg/cfi.h index bfa224fbf1c3691770595f2c2a3fcd79135373b2..506d0c818c2e670a0a7e45b95e068367774c1d50 100644 --- a/src/mapleall/maple_be/include/cg/cfi.h +++ b/src/mapleall/maple_be/include/cg/cfi.h @@ -73,6 +73,11 @@ class CfiInsn : public maplebe::Insn { ~CfiInsn() override = default; + CfiInsn *CloneTree(MapleAllocator &allocator) const override { + // Use parent deep copy, as need + return static_cast(Insn::CloneTree(allocator)); + } + bool IsMachineInstruction() const override { return false; } @@ -117,6 +122,11 @@ class RegOperand : public maplebe::OperandVisitable { uint32 GetRegisterNO() const { return regNO; } + + RegOperand *CloneTree(MapleAllocator &allocator) const override { + return allocator.GetMemPool()->New(*this); + } + Operand *Clone(MemPool &memPool) const override { Operand *opnd = memPool.Clone(*this); return opnd; @@ -140,6 +150,11 @@ class ImmOperand : public maplebe::OperandVisitable { ~ImmOperand() override = default; using OperandVisitable::OperandVisitable; + ImmOperand *CloneTree(MapleAllocator &allocator) const override { + // const MIRSymbol is not changed in cg, so we can do shallow copy + return allocator.GetMemPool()->New(*this); + } + Operand *Clone(MemPool &memPool) const override { Operand *opnd = memPool.Clone(*this); return opnd; @@ -169,6 +184,11 @@ class SymbolOperand : public maplebe::OperandVisitable { } using OperandVisitable::OperandVisitable; + SymbolOperand *CloneTree(MapleAllocator &allocator) const override { + // const MIRSymbol is not changed in cg, so we can do shallow copy + return allocator.GetMemPool()->New(*this); + } + Operand *Clone(MemPool &memPool) const override { Operand *opnd = memPool.Clone(*this); return opnd; @@ -194,6 +214,10 @@ class StrOperand : public maplebe::OperandVisitable { ~StrOperand() override = default; using OperandVisitable::OperandVisitable; + StrOperand *CloneTree(MapleAllocator &allocator) const override { + return allocator.GetMemPool()->New(*this); + } + Operand *Clone(MemPool &memPool) const override { Operand *opnd = memPool.Clone(*this); return opnd; @@ -222,6 +246,10 @@ class LabelOperand : public maplebe::OperandVisitable { ~LabelOperand() override = default; using OperandVisitable::OperandVisitable; + LabelOperand *CloneTree(MapleAllocator &allocator) const override { + return allocator.GetMemPool()->New(*this); + } + Operand *Clone(MemPool &memPool) const override { Operand *opnd = memPool.Clone(*this); return opnd; diff --git a/src/mapleall/maple_be/include/cg/cg.h b/src/mapleall/maple_be/include/cg/cg.h index 911915e8d7e96c22f60ffd931f7c991205094e2c..f7fc1a3cf33c56bf879469cee08b6bd0f1d7e3e3 100644 --- a/src/mapleall/maple_be/include/cg/cg.h +++ b/src/mapleall/maple_be/include/cg/cg.h @@ -375,13 +375,11 @@ class CG { return funcWrapLabels.find(func) != funcWrapLabels.end(); } - static void SetFuncWrapLabels(MIRFunction *func, const std::pair labels) { - if (!IsInFuncWrapLabels(func)) { - funcWrapLabels[func] = labels; - } + static void SetFuncWrapLabels(const MIRFunction *func, const std::pair labels) { + funcWrapLabels[func] = labels; } - static std::map> &GetFuncWrapLabels() { + static std::map> &GetFuncWrapLabels() { return funcWrapLabels; } static void SetCurCGFunc(CGFunc &cgFunc) { @@ -405,7 +403,7 @@ class CG { const MIRModule *GetMIRModule() const { return mirModule; } - + protected: MemPool *memPool = nullptr; MapleAllocator allocator; @@ -420,7 +418,7 @@ class CG { MIRSymbol *dbgTraceExit = nullptr; MIRSymbol *dbgFuncProfile = nullptr; MIRSymbol *fileGP; /* for lmbc, one local %GP per file */ - static std::map> funcWrapLabels; + static std::map> funcWrapLabels; bool isLibcore = false; bool isLmbc = false; }; /* class CG */ diff --git a/src/mapleall/maple_be/include/cg/cg_cdg.h b/src/mapleall/maple_be/include/cg/cg_cdg.h index 59f67eefb05a81f61bd333b5127a24cf9d36c5e0..2335394227cce95302ef4eb130a0f8c318f14634 100644 --- a/src/mapleall/maple_be/include/cg/cg_cdg.h +++ b/src/mapleall/maple_be/include/cg/cg_cdg.h @@ -50,7 +50,7 @@ class CDGNode { membarInsn = nullptr; pseudoSepNodes = nullptr; lastCallInsn = nullptr; - inlineAsmInsn = nullptr; + lastInlineAsmInsn = nullptr; regDefs = nullptr; stackDefs = nullptr; region = nullptr; @@ -190,12 +190,12 @@ class CDGNode { lastFrameDef = frameInsn; } - Insn *GetInlineAsmInsn() { - return inlineAsmInsn; + Insn *GetLastInlineAsmInsn() { + return lastInlineAsmInsn; } - void SetInlineAsmInsn(Insn *asmInsn) { - inlineAsmInsn = asmInsn; + void SetLastInlineAsmInsn(Insn *asmInsn) { + lastInlineAsmInsn = asmInsn; } void InitTopoInRegionInfo(MemPool &tmpMp, MapleAllocator &tmpAlloc) { @@ -226,7 +226,7 @@ class CDGNode { membarInsn = nullptr; lastCallInsn = nullptr; lastFrameDef = nullptr; - inlineAsmInsn = nullptr; + lastInlineAsmInsn = nullptr; lastComments.clear(); regDefs = nullptr; @@ -245,7 +245,7 @@ class CDGNode { membarInsn = nullptr; lastCallInsn = nullptr; lastFrameDef = nullptr; - inlineAsmInsn = nullptr; + lastInlineAsmInsn = nullptr; for (auto ®Def : *regDefs) { regDef = nullptr; @@ -461,7 +461,7 @@ class CDGNode { Insn *membarInsn = nullptr; Insn *lastCallInsn = nullptr; Insn *lastFrameDef = nullptr; - Insn *inlineAsmInsn = nullptr; + Insn *lastInlineAsmInsn = nullptr; MapleVector *regDefs = nullptr; // the index is regNO, record the latest defInsn in the curBB MapleVector *regUses = nullptr; // the index is regNO MapleVector *stackUses = nullptr; diff --git a/src/mapleall/maple_be/include/cg/cg_cfg.h b/src/mapleall/maple_be/include/cg/cg_cfg.h index ebf63f87c8710a8f7d9fbf4eae0b813bdd8a9f50..dac8b6d9285066897919b7e6fd42a44185b1f144 100644 --- a/src/mapleall/maple_be/include/cg/cg_cfg.h +++ b/src/mapleall/maple_be/include/cg/cg_cfg.h @@ -58,6 +58,7 @@ class InsnVisitor { virtual LabelIdx GetJumpLabel(const Insn &insn) const = 0; virtual bool IsCompareInsn(const Insn &insn) const = 0; virtual bool IsCompareAndBranchInsn(const Insn &insn) const = 0; + virtual bool IsTestAndBranchInsn(const Insn &insn) const = 0; virtual bool IsAddOrSubInsn(const Insn &insn) const = 0; virtual void ReTargetSuccBB(BB &bb, LabelIdx newTarget) const = 0; @@ -119,6 +120,7 @@ class CGCFG { Insn *CloneInsn(Insn &originalInsn) const; static BB *GetTargetSuc(BB &curBB, bool branchOnly = false, bool isGotoIf = false); bool IsCompareAndBranchInsn(const Insn &insn) const; + bool IsTestAndBranchInsn(const Insn &insn) const; bool IsAddOrSubInsn(const Insn &insn) const; Insn *FindLastCondBrInsn(BB &bb) const; diff --git a/src/mapleall/maple_be/include/cg/cg_option.h b/src/mapleall/maple_be/include/cg/cg_option.h index 2fe0c038f848de61bb1054a3352e49525cc698f3..cd1a48b31aed8da30ef2c334b9c0baf60eca0ae5 100644 --- a/src/mapleall/maple_be/include/cg/cg_option.h +++ b/src/mapleall/maple_be/include/cg/cg_option.h @@ -984,6 +984,18 @@ class CGOptions { return doPeephole; } + static void EnablePostRASink() { + doPostRASink = true; + } + + static void DisablePostRASink() { + doPostRASink = false; + } + + static bool DoPostRASink() { + return doPostRASink; + } + static void EnableRetMerge() { doRetMerge = true; } @@ -1090,14 +1102,12 @@ class CGOptions { return IsPIC() && !IsPIE(); } - void SetPICOptionHelper(CGOptions::PICMode mode) { + static void SetPICOptionHelper(CGOptions::PICMode mode) { SetPICMode(mode); - SetOption(CGOptions::kGenPic); } - void SetPIEOptionHelper(CGOptions::PICMode mode) { + static void SetPIEOptionHelper(CGOptions::PICMode mode) { SetPIEMode(mode); - SetOption(CGOptions::kGenPie); /* Enable fpie will also set fpic to be enabled. */ SetPICOptionHelper(mode); } @@ -1334,6 +1344,18 @@ class CGOptions { return functionSections; } + static void EnableDataSections() { + dataSections = true; + } + + static void DisableDataSections() { + dataSections = false; + } + + static bool IsDataSections() { + return dataSections; + } + static void SetFramePointer(FramePointerType fpType) { useFramePointer = fpType; } @@ -1618,6 +1640,18 @@ class CGOptions { return alignLoopIterations; } + static void EnableCGMemAlias() { + doCGMemAlias = true; + } + + static void DisableCGMemAlias() { + doCGMemAlias = false; + } + + static bool DoCGMemAlias() { + return doCGMemAlias; + } + private: std::vector phaseSequence; bool runCGFlag = true; @@ -1664,6 +1698,7 @@ class CGOptions { static bool doMultiPassColorRA; static bool doPrePeephole; static bool doPeephole; + static bool doPostRASink; static bool doRetMerge; static bool doSchedule; static bool doAlignAnalysis; @@ -1703,6 +1738,7 @@ class CGOptions { /* if true generate adrp/ldr/blr */ static bool genLongCalls; static bool functionSections; + static bool dataSections; static FramePointerType useFramePointer; static bool gcOnly; static bool doPreSchedule; @@ -1755,7 +1791,13 @@ class CGOptions { static uint32 alignThreshold; static uint32 alignLoopIterations; static uint32 dupFreqThreshold; + static bool doCGMemAlias; }; +// Const For TLS Warmup Opt +constexpr uint64 offsetTbcReservedForX86 = 224; +constexpr uint64 offsetManualAnchorSymbol = 8; +constexpr uint64 offsetTlsParamEntry = 8; // fixed size in AARCH64 +constexpr uint64 lslDtvEntrySize = 3; // 3 for 8B dtv in elibc, 4 for 16B dtv entry in glibc } /* namespace maplebe */ #define SET_FIND(SET, NAME) ((SET).find(NAME)) diff --git a/src/mapleall/maple_be/include/cg/cg_options.h b/src/mapleall/maple_be/include/cg/cg_options.h index ad78c8545090a1018afe462e8b3924b600c2b46d..157619a0828af4bcedbbe3e235b3e5cd55842b5c 100644 --- a/src/mapleall/maple_be/include/cg/cg_options.h +++ b/src/mapleall/maple_be/include/cg/cg_options.h @@ -20,10 +20,6 @@ namespace opts::cg { -extern maplecl::Option fpie; -extern maplecl::Option fpic; -extern maplecl::Option fPIE; -extern maplecl::Option fPIC; extern maplecl::Option fnoSemanticInterposition; extern maplecl::Option verboseAsm; extern maplecl::Option verboseCg; @@ -116,6 +112,7 @@ extern maplecl::Option floatAbi; extern maplecl::Option filetype; extern maplecl::Option longCalls; extern maplecl::Option functionSections; +extern maplecl::Option dataSections; extern maplecl::Option omitFramePointer; extern maplecl::Option omitLeafFramePointer; extern maplecl::Option fastMath; @@ -147,6 +144,7 @@ extern maplecl::Option pgoCodeAlign; extern maplecl::Option alignThreshold; extern maplecl::Option alignLoopIterations; extern maplecl::Option dupFreqThreshold; +extern maplecl::Option cgMemAlias; } #endif /* MAPLE_BE_INCLUDE_CG_OPTIONS_H */ diff --git a/src/mapleall/maple_be/include/cg/cg_phi_elimination.h b/src/mapleall/maple_be/include/cg/cg_phi_elimination.h index 1fe8d22ab948a2e3c5d17315e6a05a646edf27da..0d566e4446f1068d54cf20b86fb4292255777405 100644 --- a/src/mapleall/maple_be/include/cg/cg_phi_elimination.h +++ b/src/mapleall/maple_be/include/cg/cg_phi_elimination.h @@ -25,7 +25,6 @@ class PhiEliminate { : cgFunc(&f), ssaInfo(&ssaAnalysisResult), phiEliAlloc(&mp), - eliminatedBB(phiEliAlloc.Adapter()), replaceVreg(phiEliAlloc.Adapter()), remateInfoAfterSSA(phiEliAlloc.Adapter()) { tempRegNO = static_cast(GetSSAInfo()->GetAllSSAOperands().size()) + CGSSAInfo::ssaRegNObase; @@ -57,7 +56,6 @@ class PhiEliminate { private: void PlaceMovInPredBB(uint32 predBBId, Insn &movInsn) const; virtual RegOperand &CreateTempRegForCSSA(RegOperand &oriOpnd) = 0; - MapleSet eliminatedBB; /* * noDef Vregs occupy the vregno_t which is used for ssa re_creating * first : conflicting VReg with noDef VReg second : new_Vreg opnd to replace occupied Vreg diff --git a/src/mapleall/maple_be/include/cg/cg_predict.h b/src/mapleall/maple_be/include/cg/cg_predict.h index 9387629b78dc0aa8c22b178e344f4982edf0c61c..2b35ceb854915b5896be35536eb8797a05257991 100644 --- a/src/mapleall/maple_be/include/cg/cg_predict.h +++ b/src/mapleall/maple_be/include/cg/cg_predict.h @@ -35,7 +35,7 @@ struct Edge { class CgPrediction : public AnalysisResult { public: - static void VerifyFreq(CGFunc &cgFunc); + static void VerifyFreq(const CGFunc &cgFunc); CgPrediction(MemPool &memPool, MemPool &tmpPool, CGFunc &cgFunc, DomAnalysis &dom, PostDomAnalysis &pdom, LoopAnalysis &loops) : AnalysisResult(&memPool), @@ -54,9 +54,9 @@ class CgPrediction : public AnalysisResult { ~CgPrediction() override = default; Edge *FindEdge(const BB &src, const BB &dest) const; bool IsBackEdge(const Edge &edge) const; - void NormallizeCFGProb(); - void NormallizeBBProb(BB *bb); - void Verify(); + void NormallizeCFGProb() const; + void NormallizeBBProb(BB &bb) const; + void Verify() const; void Init(); bool DoPropFreq(const BB *head, std::vector *headers, BB &bb); void PropFreqInLoops(); @@ -67,7 +67,7 @@ class CgPrediction : public AnalysisResult { void SetPredictDebug(bool val); void SavePredictResultIntoCfg(); void FixRedundantSuccsPreds(); - void RemoveRedundantSuccsPreds(BB *bb); + void RemoveRedundantSuccsPreds(BB &bb); protected: MapleAllocator mePredAlloc; diff --git a/src/mapleall/maple_be/include/cg/cg_sink.h b/src/mapleall/maple_be/include/cg/cg_sink.h new file mode 100644 index 0000000000000000000000000000000000000000..b4984d65ba5a66e78b726a1da67b188ecb4642c3 --- /dev/null +++ b/src/mapleall/maple_be/include/cg/cg_sink.h @@ -0,0 +1,69 @@ +/* + * Copyright (c) [2023] Huawei Technologies Co.,Ltd.All rights reserved. + * + * OpenArkCompiler is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * + * http://license.coscl.org.cn/MulanPSL2 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ + +#ifndef MAPLEBE_INCLUDE_CG_SINK_H +#define MAPLEBE_INCLUDE_CG_SINK_H + +#include "cgfunc.h" +#include "cg_phase.h" +#include "loop.h" + +namespace maplebe { +class PostRASink { + public: + PostRASink(CGFunc &func, MemPool &pool) + : cgFunc(func), + memPool(pool), + alloc(&pool), + modifiedRegs(alloc.Adapter()), + usedRegs(alloc.Adapter()) {} + + virtual ~PostRASink() = default; + + std::string PhaseName() const { + return "postrasink"; + } + + void Run(); + protected: + CGFunc &cgFunc; + MemPool &memPool; + MapleAllocator alloc; + MapleSet modifiedRegs; // registers that have been modified in curBB + MapleSet usedRegs; // registers that have been used in curBB + + bool TryToSink(BB &bb); + + // mov insn to sinkBB's begin + void SinkInsn(Insn &insn, BB &sinkBB) const; + + // update sinkBB's live-in + void UpdateLiveIn(BB &sinkBB, const std::vector &defRegs, const std::vector &useRegs) const; + + void UpdateRegsUsedDefed(const std::vector &defRegs, const std::vector &useRegs); + + // check whether register is used or modified in curBB + bool HasRegisterDependency(const std::vector &defRegs, const std::vector &useRegs) const; + + BB *GetSingleLiveInSuccBB(const BB &curBB, const std::set &sinkableBBs, + const std::vector &defRegs) const; +}; + +MAPLE_FUNC_PHASE_DECLARE_BEGIN(CgPostRASink, maplebe::CGFunc) +OVERRIDE_DEPENDENCE +MAPLE_FUNC_PHASE_DECLARE_END +} // namespace maplebe + +#endif // MAPLEBE_INCLUDE_CG_SINK_H \ No newline at end of file diff --git a/src/mapleall/maple_be/include/cg/cg_validbit_opt.h b/src/mapleall/maple_be/include/cg/cg_validbit_opt.h index 4dd988a0b1bae3d7ec105ce13b9f28d4d87d2504..c2b297e4cf3e9275749a652228c28491c6ed9dde 100644 --- a/src/mapleall/maple_be/include/cg/cg_validbit_opt.h +++ b/src/mapleall/maple_be/include/cg/cg_validbit_opt.h @@ -98,7 +98,8 @@ class ValidBitOpt { virtual void DoOpt() = 0; void RectifyValidBitNum(); void SetValidBitToOpndSize(); - virtual void SetValidBits(Insn &insn) = 0; + void SetPhiInsnZeroValidBit(); + virtual bool SetValidBits(Insn &insn) = 0; virtual bool SetPhiValidBits(Insn &insn) = 0; protected: diff --git a/src/mapleall/maple_be/include/cg/cgbb.h b/src/mapleall/maple_be/include/cg/cgbb.h index 2cb2a6dbed942e9bc76689d1fad89376782b9e28..237da1b7a27daad08f3539f1248348391fd5d801 100644 --- a/src/mapleall/maple_be/include/cg/cgbb.h +++ b/src/mapleall/maple_be/include/cg/cgbb.h @@ -196,8 +196,10 @@ class BB : public maple::BaseGraphNode { insn.SetNext(nullptr); insn.SetPrev(nullptr); insn.SetBB(this); + if (insn.IsMachineInstruction()) { + internalFlag1++; + } } - internalFlag1++; } void AppendOtherBBInsn(Insn &insn) { @@ -218,7 +220,9 @@ class BB : public maple::BaseGraphNode { insn.SetNext(nullptr); } insn.SetBB(this); - internalFlag1++; + if (insn.IsMachineInstruction()) { + internalFlag1++; + } } void ReplaceInsn(Insn &insn, Insn &newInsn); @@ -272,7 +276,7 @@ class BB : public maple::BaseGraphNode { CHECK_FATAL(false, "request to remove a non-existent element?"); } - void RemoveFromSuccessorList(BB &bb) { + void RemoveFromSuccessorList(const BB &bb) { for (auto i = succs.begin(); i != succs.end(); ++i) { if (*i == &bb) { succs.erase(i); @@ -564,7 +568,7 @@ class BB : public maple::BaseGraphNode { succsProb.erase(&bb); } - void ReplaceSucc(MapleList::const_iterator it, BB &newBB) { + void ReplaceSucc(const MapleList::const_iterator it, BB &newBB) { int prob = succsProb[*it]; EraseSuccs(it); PushBackSuccs(newBB, prob); @@ -856,8 +860,8 @@ class BB : public maple::BaseGraphNode { void SetCDGNode(CDGNode *node) { cdgNode = node; } - - MapleVector &GetSuccsFreq() { + + const MapleVector &GetSuccsFreq() const { return succsFreq; } @@ -989,7 +993,7 @@ class BB : public maple::BaseGraphNode { MapleList succs; MapleList ehPreds; MapleList ehSuccs; - MapleMap succsProb; + MapleMap succsProb; MapleVector succsFreq; MapleVector succsProfFreq; bool inColdSection = false; /* for bb splitting */ @@ -1039,7 +1043,8 @@ class BB : public maple::BaseGraphNode { MapleList callInsns; MapleVector rangeGotoLabelVec; - /* bb support for SSA analysis */ + // bb support for SSA analysis + // before rename - key is origRegNO, after rename - key is phiDefRegNO MapleMap phiInsnList; /* includes Built-in functions for atomic memory access */ diff --git a/src/mapleall/maple_be/include/cg/cgfunc.h b/src/mapleall/maple_be/include/cg/cgfunc.h index 1e4121fa8e8c40f440c26483429a8d7f050a8a64..263bc5706b4b18d0a9133a2d24aa0b4c25191522 100644 --- a/src/mapleall/maple_be/include/cg/cgfunc.h +++ b/src/mapleall/maple_be/include/cg/cgfunc.h @@ -189,6 +189,7 @@ class CGFunc { void GenerateInstruction(); bool MemBarOpt(const StmtNode &membar); void UpdateCallBBFrequency(); + void ClearUnreachableBB(); void HandleFunction(); void MakeupScopeLabels(BB &bb); void ProcessExitBBVec(); @@ -216,6 +217,8 @@ class CGFunc { void DumpBBInfo(const BB *bb) const; void DumpCGIR() const; Operand *HandleExpr(const BaseNode &parent, BaseNode &expr); + virtual void AddPseudoRetInsns(BB &bb) = 0; + virtual void AddPseudoRetInsnsInExitBBs() = 0; virtual void DetermineReturnTypeofCall() = 0; /* handle rc reset */ virtual void HandleRCCall(bool begin, const MIRSymbol *retRef = nullptr) = 0; @@ -227,7 +230,7 @@ class CGFunc { virtual void SelectAbort() = 0; virtual void SelectAssertNull(UnaryStmtNode &stmt) = 0; virtual void SelectAsm(AsmNode &node) = 0; - virtual void SelectAggDassign(const DassignNode &stmt) = 0; + virtual void SelectAggDassign(DassignNode &stmt) = 0; virtual void SelectIassign(IassignNode &stmt) = 0; virtual void SelectIassignoff(IassignoffNode &stmt) = 0; virtual void SelectIassignfpoff(IassignFPoffNode &stmt, Operand &opnd) = 0; @@ -264,11 +267,14 @@ class CGFunc { virtual Operand *SelectCAtomicExchangeN(const IntrinsicopNode &intrinsicopNode) = 0; virtual Operand *SelectCAtomicFetch(IntrinsicopNode &intrinsicopNode, SyncAndAtomicOp op, bool fetchBefore) = 0; virtual Operand *SelectCReturnAddress(IntrinsicopNode &intrinsicopNode) = 0; + virtual Operand *SelectCAllocaWithAlign(IntrinsicopNode &intrinsicopNode) = 0; virtual void SelectCAtomicExchange(const IntrinsiccallNode &intrinsiccallNode) = 0; virtual Operand *SelectCAtomicCompareExchange(const IntrinsicopNode &intrinsicopNode, bool isCompareExchangeN = false) = 0; virtual Operand *SelectCAtomicTestAndSet(const IntrinsicopNode &intrinsicopNode) = 0; virtual void SelectCAtomicClear(const IntrinsiccallNode &intrinsiccallNode) = 0; + virtual void SelectCprefetch(IntrinsiccallNode &intrinsiccallNode) = 0; + virtual void SelectCclearCache(IntrinsiccallNode &intrinsicopNode) = 0; virtual void SelectMembar(StmtNode &membar) = 0; virtual void SelectComment(CommentNode &comment) = 0; virtual void HandleCatch() = 0; @@ -541,8 +547,6 @@ class CGFunc { MIRSymbol *GetRetRefSymbol(BaseNode &expr); - void PatchLongBranch(); - void VerifyAllInsn(); virtual uint32 MaxCondBranchDistance() { @@ -918,10 +922,6 @@ class CGFunc { return funcScopeAllocator; } - const MapleAllocator *GetFuncScopeAllocator() const { - return funcScopeAllocator; - } - const MapleMap GetEmitStVec() const { return emitStVec; } @@ -1182,6 +1182,14 @@ class CGFunc { isAfterRegAlloc = true; } + bool IsEntryCold() { + return isEntryCold; + } + + void SetIsEntryCold() { + isEntryCold = true; + } + const MapleString &GetShortFuncName() const { return shortFuncName; } @@ -1190,7 +1198,7 @@ class CGFunc { return lSymSize; } - bool HasTakenLabel() const{ + bool HasTakenLabel() const { return hasTakenLabel; } @@ -1198,6 +1206,14 @@ class CGFunc { hasTakenLabel = true; } + bool HasLaidOutByPgoUse() const { + return hasLaidOutByPgoUse; + } + + void SetHasLaidOutByPgoUse() { + hasLaidOutByPgoUse = true; + } + virtual InsnVisitor *NewInsnModifier() = 0; MapleVector &GetDbgCallFrameLocations(bool isParam) { @@ -1342,7 +1358,9 @@ class CGFunc { bool isVolStore = false; bool isAfterRegAlloc = false; bool isAggParamInReg = false; + bool isEntryCold = false; bool hasTakenLabel = false; + bool hasLaidOutByPgoUse = false; bool withSrc = true; uint32 frequency = 0; DebugInfo *debugInfo = nullptr; /* debugging info */ diff --git a/src/mapleall/maple_be/include/cg/data_dep_analysis.h b/src/mapleall/maple_be/include/cg/data_dep_analysis.h index 6dd4c40c0828bcb104f17b0e55d6241b8f01bae8..ac01180378c6b24277926048fff8088b62f1b107 100644 --- a/src/mapleall/maple_be/include/cg/data_dep_analysis.h +++ b/src/mapleall/maple_be/include/cg/data_dep_analysis.h @@ -13,15 +13,13 @@ * See the Mulan PSL v2 for more details. */ -/* - * Build intra/inter block data dependence graph. - * 1: Build data dependence nodes - * 2: Build edges between dependence nodes. Edges are: - * 2.1) True dependence - * 2.2) Anti dependence - * 2.3) Output dependence - * 2.4) Barrier dependence - */ +// Build intra/inter block data dependence graph. +// 1: Build data dependence nodes +// 2: Build edges between dependence nodes. Edges are: +// 2.1) True dependence +// 2.2) Anti dependence +// 2.3) Output dependence +// 2.4) Barrier dependence #ifndef MAPLEBE_INCLUDE_CG_DATA_DEP_ANALYSIS_H #define MAPLEBE_INCLUDE_CG_DATA_DEP_ANALYSIS_H @@ -59,6 +57,6 @@ class DataDepAnalysis { MapleAllocator interAlloc; DataDepBase &ddb; }; -} /* namespace maplebe */ +} // namespace maplebe #endif // MAPLEBE_INCLUDE_CG_DATA_DEP_ANALYSIS_H diff --git a/src/mapleall/maple_be/include/cg/data_dep_base.h b/src/mapleall/maple_be/include/cg/data_dep_base.h index 44d8aeb1646dcf1d9dd6891cf1b6493480948181..145945cc74817eab19a963b83b8ca032f7ef708d 100644 --- a/src/mapleall/maple_be/include/cg/data_dep_base.h +++ b/src/mapleall/maple_be/include/cg/data_dep_base.h @@ -119,4 +119,4 @@ class DataDepBase { }; } -#endif /* MAPLEBE_INCLUDE_CG_DATA_DEP_BASE_H */ +#endif // MAPLEBE_INCLUDE_CG_DATA_DEP_BASE_H diff --git a/src/mapleall/maple_be/include/cg/dbg.h b/src/mapleall/maple_be/include/cg/dbg.h index 5be95ec515ab524de7583546e4c61cef82a28e91..86e28a690f0ec7273750a6d3b1cf62b03bb52931 100644 --- a/src/mapleall/maple_be/include/cg/dbg.h +++ b/src/mapleall/maple_be/include/cg/dbg.h @@ -52,6 +52,11 @@ class DbgInsn : public maplebe::Insn { ~DbgInsn() override = default; + DbgInsn *CloneTree(MapleAllocator &allocator) const override { + // Use parent deep copy, as need + return static_cast(Insn::CloneTree(allocator)); + } + bool IsMachineInstruction() const override { return false; } @@ -97,6 +102,11 @@ class ImmOperand : public maplebe::OperandVisitable { ~ImmOperand() override = default; using OperandVisitable::OperandVisitable; + ImmOperand *CloneTree(MapleAllocator &allocator) const override { + // const MIRSymbol is not changed in cg, so we can do shallow copy + return allocator.GetMemPool()->New(*this); + } + Operand *Clone(MemPool &memPool) const override { Operand *opnd = memPool.Clone(*this); return opnd; diff --git a/src/mapleall/maple_be/include/cg/deps.h b/src/mapleall/maple_be/include/cg/deps.h index d906b2911af19d333a7ab5f8ae50af0ece0f7b22..760e1c61bac02904a8ccbd5b3c962d590399f2eb 100644 --- a/src/mapleall/maple_be/include/cg/deps.h +++ b/src/mapleall/maple_be/include/cg/deps.h @@ -122,16 +122,16 @@ class DepNode { virtual ~DepNode() = default; - /* - * Old interface: - * If all unit of this node need when it is scheduled is free, this node can be scheduled, - * return true. - */ - bool IsResourceFree() const { - for (uint32 i = 0; i < unitNum; ++i) { - Unit *unit = units[i]; + // If the cpu units required by the reservation type of the instruction are idle, + // return true. + bool IsResourceIdle() const { + // The 'i' indicates cpu cycles, that 0 indicates the current cycle + uint32 cycles = reservation->GetUnitNum(); + Unit * const *requiredUnits = reservation->GetUnit(); + for (uint32 i = 0; i < cycles; ++i) { + Unit *unit = requiredUnits[i]; if (unit != nullptr) { - if (!unit->IsFree(i)) { + if (!unit->IsIdle(i)) { return false; } } @@ -139,53 +139,20 @@ class DepNode { return true; } - /* - * Old interface: - * Mark those unit needed being occupied when an instruction is scheduled - */ - void OccupyUnits() { - for (uint32 i = 0; i < unitNum; ++i) { - Unit *unit = units[i]; + // When an instruction is issued, occupy all units required in the specific cycle + void OccupyRequiredUnits() const { + // The 'i' indicates cpu cycles, that 0 indicates the current cycle + uint32 cycles = reservation->GetUnitNum(); + Unit * const *requiredUnits = reservation->GetUnit(); + for (uint32 i = 0; i < cycles; ++i) { + Unit *unit = requiredUnits[i]; if (unit != nullptr) { - unit->Occupy(*insn, i); + unit->Occupy(i); } } } - /* - * New interface using in list-scheduler: - * If all unit of this node need when it is scheduled is free, this node can be scheduled, - * return true. - */ - bool IsResourceFree(uint32 cost) const { - for (uint32 i = 0; i < unitNum; ++i) { - const Unit *unit = units[i]; - if (unit != nullptr) { - if (!unit->IsFree(cost)) { - return false; - } - } - } - return true; - } - - /* - * New interface using in list-scheduler: - * Mark those unit needed being occupied when an instruction is scheduled - */ - void OccupyUnits(uint32 cost) { - // Indicates whether the unit has been occupied by the current schedule insn - // and the index is unitId - std::vector visited(kUnitIdLast); - for (uint32 i = 0; i < unitNum; ++i) { - Unit *unit = units[i]; - if (unit != nullptr && !visited[unit->GetUnitId()]) { - unit->Occupy(cost, visited); - } - } - } - - /* Get unit kind of this node's units[0]. */ + // Get unit kind of this node's units[0] uint32 GetUnitKind() const { uint32 retValue = 0; if ((units == nullptr) || (units[0] == nullptr)) { diff --git a/src/mapleall/maple_be/include/cg/dup_tail.h b/src/mapleall/maple_be/include/cg/dup_tail.h index 9a893cf861bfc205673b06ff2e1e78cb6c968cf3..96a3e98cd8757496d8b032fc9a798382903785d8 100644 --- a/src/mapleall/maple_be/include/cg/dup_tail.h +++ b/src/mapleall/maple_be/include/cg/dup_tail.h @@ -34,7 +34,7 @@ class DupPattern : public OptimizationPattern { } ~DupPattern() override = default; bool Optimize(BB &curBB) override; - uint32 GetFreqThreshold(); + uint32 GetFreqThreshold() const; private: // if the ret bb's insn num > 1, we should not dup ret bb by default diff --git a/src/mapleall/maple_be/include/cg/ebo.h b/src/mapleall/maple_be/include/cg/ebo.h index 88f018a6c583efd3366c37e885c2e9e206f34b46..a948462d50a4d82934a1adaad002c6601220e4e4 100644 --- a/src/mapleall/maple_be/include/cg/ebo.h +++ b/src/mapleall/maple_be/include/cg/ebo.h @@ -45,6 +45,7 @@ struct OpndInfo { int32 hashVal = 0; /* Mem operand is placed in hash table, this is the hashVal of it, and otherwise -1. */ Operand *opnd; /* Operand */ Operand *replacementOpnd = nullptr; /* Rename opnd with this new name. */ + uint32 replacementIndex = 0; // the index of replacementOpnd in Defining insn OpndInfo *replacementInfo = nullptr; /* Rename opnd with this info. */ BB *bb = nullptr; /* The Definining bb. */ Insn *insn = nullptr; /* The Defining insn. */ @@ -148,8 +149,8 @@ class Ebo { bool OpndAvailableInBB(const BB &bb, OpndInfo *info) const; bool ForwardPropCheck(const Operand *opndReplace, const OpndInfo &opndInfo, const Operand &opnd, Insn &insn) const; - bool RegForwardCheck(Insn &insn, const Operand &opnd, const Operand *opndReplace, - Operand &oldOpnd, const OpndInfo *tmpInfo) const; + bool RegForwardCheck(Insn &insn, const Operand &opnd, const Operand *opndReplace, Operand &oldOpnd, + const uint32 oldOpndIndex, const OpndInfo *tmpInfo) const; bool IsNotVisited(const BB &bb) { return !visitedBBs.at(bb.GetId()); }; diff --git a/src/mapleall/maple_be/include/cg/emit.h b/src/mapleall/maple_be/include/cg/emit.h index cc6bcd5353dd113debafec037362983d5f7aa068..278e9d119acacf6fa8ff039fa5cabfc794070e09 100644 --- a/src/mapleall/maple_be/include/cg/emit.h +++ b/src/mapleall/maple_be/include/cg/emit.h @@ -163,7 +163,7 @@ class Emitter { bool withAddr, const std::string &addrName = ""); void EmitNullConstant(uint64 size); void EmitCombineBfldValue(StructEmitInfo &structEmitInfo, bool finished); - void EmitBitFieldConstant(StructEmitInfo &structEmitInfo, MIRConst &mirConst, const MIRType *nextType, + void EmitBitFieldConstant(StructEmitInfo &structEmitInfo, MIRConst &mirConst, bool combineNextField, uint64 fieldOffset); void EmitScalarConstant(MIRConst &mirConst, bool newLine = true, bool flag32 = false, bool isIndirect = false); void EmitStr(const std::string& mplStr, bool emitAscii = false, bool emitNewline = false); @@ -200,7 +200,6 @@ class Emitter { void MarkVtabOrItabEndFlag(const std::vector &mirSymbolVec) const; void EmitArrayConstant(MIRConst &mirConst); void EmitStructConstant(MIRConst &mirConst); - void EmitStructConstant(MIRConst &mirConst, uint32 &subStructFieldCounts); void EmitVectorConstant(MIRConst &mirConst); void EmitLocalVariable(const CGFunc &cgFunc); void EmitUninitializedSymbolsWithPrefixSection(const MIRSymbol &symbol, const std::string §ionName); @@ -268,6 +267,9 @@ class Emitter { EmitDIFormSpecification(attr->GetDwForm()); } + // Emit data section + void EmitDataSection(const std::string §ionName, const std::string &symbolName, const std::string §ionSuffix); + #if 1 /* REQUIRE TO SEPERATE TARGAARCH64 TARGARM32 */ /* Following code is under TARGAARCH64 condition */ void EmitHugeSoRoutines(bool lastRoutine = false); @@ -359,6 +361,8 @@ class Emitter { void EmitAliasAndRef(const MIRSymbol &sym); // handle function symbol which has alias and weak ref // collect all global TLS together -- better perfomance for local dynamic void EmitTLSBlock(const MapleVector &tdataVec, const MapleVector &tbssVec); + void EmitTLSBlockTdata(const MapleVector &tdataVec); + void EmitTLSBlockTbss(const MapleVector &tbssVec, bool tdataExist); CG *cg; MOperator currentMop = UINT_MAX; diff --git a/src/mapleall/maple_be/include/cg/global_schedule.h b/src/mapleall/maple_be/include/cg/global_schedule.h index d6ed2e4bfb5956ac4587912c23fb3a13efb1c9c5..92328c35d40185901e4d442072699b9127ef1b50 100644 --- a/src/mapleall/maple_be/include/cg/global_schedule.h +++ b/src/mapleall/maple_be/include/cg/global_schedule.h @@ -31,24 +31,22 @@ class GlobalSchedule : public BaseSchedule { } void Run() override; bool CheckCondition(CDGRegion ®ion); - /* Region-based global scheduling entry, using the list scheduling algorithm for scheduling insns in bb */ + // Region-based global scheduling entry, using the list scheduling algorithm for scheduling insns in bb void DoGlobalSchedule(CDGRegion ®ion); - /* Verifying the Correctness of Global Scheduling */ + // Verifying the Correctness of Global Scheduling virtual void VerifyingSchedule(CDGRegion ®ion) = 0; protected: - virtual void InitInCDGNode(CDGRegion ®ion, CDGNode &cdgNode, MemPool *cdgNodeMp) = 0; + void InitInCDGNode(CDGRegion ®ion, CDGNode &cdgNode, MemPool &cdgNodeMp); + void PrepareCommonSchedInfo(CDGRegion ®ion, CDGNode &cdgNode, MemPool &cdgNodeMp); virtual void FinishScheduling(CDGNode &cdgNode) = 0; void ClearCDGNodeInfo(CDGRegion ®ion, CDGNode &cdgNode, MemPool *cdgNodeMp); - void DumpInsnInfoByScheduledOrder(CDGNode &cdgNode) const override { - (void)cdgNode; - } DataDepAnalysis &interDDA; }; MAPLE_FUNC_PHASE_DECLARE(CgGlobalSchedule, maplebe::CGFunc) -} /* namespace maplebe */ +} // namespace maplebe #endif // MAPLEBE_INCLUDE_CG_GLOBAL_SCHEDULE_H diff --git a/src/mapleall/maple_be/include/cg/insn.h b/src/mapleall/maple_be/include/cg/insn.h index 87595ac5182d7f4366e119365d60d7003308d5e5..5b5aa90fb6fc4994f8648f412df185036f57e7fc 100644 --- a/src/mapleall/maple_be/include/cg/insn.h +++ b/src/mapleall/maple_be/include/cg/insn.h @@ -19,13 +19,15 @@ #include #include #include +/* Maple CG headers */ #include "operand.h" -#include "mpl_logging.h" #include "isa.h" - -/* Maple IR header */ -#include "types_def.h" /* for uint32 */ #include "common_utils.h" +/* Maple IR headers */ +#include "types_def.h" /* for uint32 */ +/* Maple Util headers */ +#include "mpl_logging.h" +#include "mem_reference_table.h" /* for alias */ namespace maplebe { /* forward declaration */ @@ -79,11 +81,11 @@ struct VectorRegSpec { class Insn { public: enum RetType : uint8 { - kRegNull, /* no return type */ - kRegFloat, /* return register is V0 */ - kRegInt /* return register is R0 */ + kRegNull, // no return type + kRegFloat, // return register is V0 + kRegInt // return register is R0 }; - /* MCC_DecRefResetPair clear 2 stack position, MCC_ClearLocalStackRef clear 1 stack position */ + // MCC_DecRefResetPair clear 2 stack position, MCC_ClearLocalStackRef clear 1 stack position static constexpr uint8 kMaxStackOffsetSize = 2; static constexpr int32 kUnknownProb = -1; @@ -121,6 +123,19 @@ class Insn { } virtual ~Insn() = default; + // Custom deep copy + virtual Insn *CloneTree(MapleAllocator &allocator) const { + auto *insn = allocator.GetMemPool()->New(*this); + insn->opnds.clear(); + for (auto opnd : opnds) { + (void)insn->opnds.emplace_back(opnd->CloneTree(allocator)); + } + return insn; + } + + // Default shallow copy + Insn *Clone(const MemPool /* &memPool */) const; + MOperator GetMachineOpcode() const { return mOp; } @@ -225,6 +240,7 @@ class Insn { bool IsStore() const; bool IsConversion() const; bool IsAtomic() const; + bool IsCondDef() const; bool IsLoadPair() const; bool IsStorePair() const; @@ -283,14 +299,6 @@ class Insn { return IsStore() && IsAtomic(); } - void SetCondDef() { - flags |= kOpCondDef; - } - - bool IsCondDef() const { - return flags & kOpCondDef; - } - bool AccessMem() const { return IsLoad() || IsStore(); } @@ -574,8 +582,6 @@ class Insn { return isPhiMovInsn; } - Insn *Clone(const MemPool /* &memPool */) const; - void SetInsnDescrption(const InsnDesc &newMD) { md = &newMD; } @@ -626,7 +632,7 @@ class Insn { void ClearRegSpecList() { regSpecList.clear(); } - int32 GetProb() { + int32 GetProb() const { return probability; } void SetProb(int prob) { @@ -655,6 +661,14 @@ class Insn { return *this; } + void SetReferenceOsts(MemDefUse *memDefUse) { + referenceOsts = memDefUse; + } + + const MemDefUse *GetReferenceOsts() const { + return referenceOsts; + } + protected: MOperator mOp; MapleAllocator localAlloc; @@ -671,7 +685,6 @@ class Insn { MapleList regSpecList; enum OpKind : uint32 { kOpUnknown = 0, - kOpCondDef = 0x1, kOpAccessRefField = (1ULL << 30), /* load-from/store-into a ref flag-fieldGetMachineOpcode() */ kOpDassignToSaveRetValToLocal = (1ULL << 31) /* save return value to local flag */ }; @@ -708,7 +721,15 @@ class Insn { */ bool processRHS = false; // for jmp insn, probability is the prob for jumping - int32 probability = kUnknownProb; + int32 probability = kUnknownProb; + + /* + * This field indicates the OstIdx list referenced by memory-related and call-related instructions, + * the alias information is transferred from ME. + * If the field is nullptr, the memory location referenced by the instruction is unknown, + * and needs to be processed conservatively. + */ + MemDefUse *referenceOsts = nullptr; }; struct InsnIdCmp { diff --git a/src/mapleall/maple_be/include/cg/isel.h b/src/mapleall/maple_be/include/cg/isel.h index be93f9c392a29773fdf19572b010c5d140c2006e..d1029867609d19f6e76a43cd04e686cfc7ad4e91 100644 --- a/src/mapleall/maple_be/include/cg/isel.h +++ b/src/mapleall/maple_be/include/cg/isel.h @@ -42,7 +42,7 @@ class MPISel { Operand *HandleExpr(const BaseNode &parent, BaseNode &expr); - void SelectDassign(const DassignNode &stmt, Operand &opndRhs); + void SelectDassign(DassignNode &stmt, Operand &opndRhs); void SelectDassignoff(const DassignoffNode &stmt, Operand &opnd0); void SelectIassign(const IassignNode &stmt, Operand &opndAddr, Operand &opndRhs); void SelectIassignoff(const IassignoffNode &stmt); @@ -125,8 +125,9 @@ class MPISel { virtual Operand *SelectCstrncmp(IntrinsicopNode &node, Operand &opnd0, const BaseNode &parent) = 0; virtual Operand *SelectCstrchr(IntrinsicopNode &node, Operand &opnd0, const BaseNode &parent) = 0; virtual Operand *SelectCstrrchr(IntrinsicopNode &node, Operand &opnd0, const BaseNode &parent) = 0; + virtual void SelectCprefetch(IntrinsiccallNode &intrinsiccallNode) = 0; virtual void SelectAsm(AsmNode &node) = 0; - virtual void SelectAggDassign(MirTypeInfo &lhsInfo, MemOperand &symbolMem, Operand &rOpnd, const DassignNode &s) = 0; + virtual void SelectAggDassign(MirTypeInfo &lhsInfo, MemOperand &symbolMem, Operand &rOpnd, DassignNode &s) = 0; Operand *SelectBnot(const UnaryNode &node, Operand &opnd0, const BaseNode &parent); Operand *SelectMin(const BinaryNode &node, Operand &opnd0, Operand &opnd1); Operand *SelectMax(const BinaryNode &node, Operand &opnd0, Operand &opnd1); diff --git a/src/mapleall/maple_be/include/cg/list_scheduler.h b/src/mapleall/maple_be/include/cg/list_scheduler.h index 245dac8bc67c0b59b0a0abda4b318b0be37a4401..48cc753a69fcfdc3db41217cbb8be1f3c07ea554 100644 --- a/src/mapleall/maple_be/include/cg/list_scheduler.h +++ b/src/mapleall/maple_be/include/cg/list_scheduler.h @@ -65,15 +65,11 @@ class CommonScheduleInfo { private: MapleAllocator csiAlloc; - /* - * Candidate instructions list of current BB, - * by control flow sequence - */ + // Candidate instructions list of current BB, + // by control flow sequence MapleVector candidates; - /* - * Scheduled results list of current BB - * for global-scheduler, it stored only to the last depNode of current BB - */ + // Scheduled results list of current BB + // for global-scheduler, it stored only to the last depNode of current BB MapleVector schedResults; }; @@ -99,17 +95,15 @@ class ListScheduler { } } - /* - * The entry of list-scheduler - * cdgNode: current scheduled BB - */ + // The entry of list-scheduler + // cdgNode: current scheduled BB void DoListScheduling(); void ComputeDelayPriority(); - /* Compute the earliest start cycle, update maxEStart */ + // Compute the earliest start cycle, update maxEStart void ComputeEStart(uint32 cycle); - /* Compute the latest start cycle */ + // Compute the latest start cycle void ComputeLStart(); - /* Calculate the most used unitKind index */ + // Calculate the most used unitKind index void CalculateMostUsedUnitKindCount(); void SetCommonSchedInfo(CommonScheduleInfo &csi) { @@ -171,10 +165,8 @@ class ListScheduler { return waitingQueue.erase(depIter); } - /* - * Default rank readyList function by delay heuristic, - * which uses delay as algorithm of computing priority - */ + // Default rank readyList function by delay heuristic, + // which uses delay as algorithm of computing priority static bool DelayRankScheduleInsns(const DepNode *node1, const DepNode *node2) { // p as an acronym for priority CompareDelay compareDelay; @@ -220,21 +212,15 @@ class ListScheduler { CDGRegion *region = nullptr; // the current region CDGNode *curCDGNode = nullptr; // the current scheduled BB CommonScheduleInfo *commonSchedInfo = nullptr; // common scheduling info that prepared by other scheduler - /* - * The function ptr that computes instruction priority based on heuristic rules, - * list-scheduler provides default implementations and supports customization by other schedulers - */ + // The function ptr that computes instruction priority based on heuristic rules, + // list-scheduler provides default implementations and supports customization by other schedulers SchedRankFunctor rankScheduleInsns = nullptr; bool doDelayHeuristics = true; // true: compute delay; false: compute eStart & lStart std::string phaseName; // for dumping log - /* - * A node is moved from [candidates] to [waitingQueue] when it's all data dependency are met - */ + // A node is moved from [candidates] to [waitingQueue] when it's all data dependency are met MapleVector waitingQueue; - /* - * A node is moved from [waitingQueue] to [readyList] when resources required by it are free and - * estart-cycle <= curr-cycle - */ + // A node is moved from [waitingQueue] to [readyList] when resources required by it are free and + // estart-cycle <= curr-cycle MapleVector readyList; uint32 currCycle = 0; // Simulates the CPU clock during scheduling uint32 advancedCycle = 0; // Using after an instruction is scheduled, record its execution cycles @@ -246,6 +232,6 @@ class ListScheduler { DepNode *lastSchedNode = nullptr; // Last scheduled node bool isUnitTest = false; }; -} /* namespace maplebe */ +} // namespace maplebe #endif // MAPLEBE_INCLUDE_CG_LIST_SCHEDULER_H diff --git a/src/mapleall/maple_be/include/cg/local_schedule.h b/src/mapleall/maple_be/include/cg/local_schedule.h index 58da2b1930c0bac9f9cec62aa557c8a67ba5533f..a95d4fe62ca942e5ff63fc1dc72c298df12f6a59 100644 --- a/src/mapleall/maple_be/include/cg/local_schedule.h +++ b/src/mapleall/maple_be/include/cg/local_schedule.h @@ -38,15 +38,12 @@ class LocalSchedule : public BaseSchedule { protected: void InitInCDGNode(CDGNode &cdgNode); virtual void FinishScheduling(CDGNode &cdgNode) = 0; - void DumpInsnInfoByScheduledOrder(CDGNode &cdgNode) const override { - (void)cdgNode; - } DataDepAnalysis &intraDDA; }; MAPLE_FUNC_PHASE_DECLARE_BEGIN(CgLocalSchedule, maplebe::CGFunc) MAPLE_FUNC_PHASE_DECLARE_END -} /* namespace maplebe */ +} // namespace maplebe #endif // MAPLEBE_INCLUDE_CG_LOCAL_SCHEDULE_H diff --git a/src/mapleall/maple_be/include/cg/operand.h b/src/mapleall/maple_be/include/cg/operand.h index d91356beb86c5142d22eda66405356fb50823975..4485568bcce82a515aee4dacb96e724910df88fa 100644 --- a/src/mapleall/maple_be/include/cg/operand.h +++ b/src/mapleall/maple_be/include/cg/operand.h @@ -73,6 +73,11 @@ class Operand { Operand(OperandType type, uint32 size) : opndKind(type), size(size) {} virtual ~Operand() = default; + // Custom deep copy + virtual Operand *CloneTree(MapleAllocator &allocator) const = 0; + // Default shallow copy + virtual Operand *Clone(MemPool &memPool) const = 0; + uint32 GetSize() const { return size; } @@ -157,12 +162,8 @@ class Operand { return false; } - virtual Operand *Clone(MemPool &memPool) const = 0; - - /* - * A simple implementation here. - * Each subclass can elaborate on demand. - */ + // A simple implementation here. + // Each subclass can elaborate on demand. virtual bool Equals(Operand &op) const { return BasicEquals(op) && (&op == this); } @@ -171,9 +172,7 @@ class Operand { return opndKind == op.GetKind() && size == op.GetSize(); } - /* - * Operand hash content, ensuring uniqueness - */ + // Operand hash content, ensuring uniqueness virtual std::string GetHashContent() const { return std::to_string(opndKind) + std::to_string(size); } @@ -222,6 +221,10 @@ class RegOperand : public OperandVisitable { ~RegOperand() override = default; using OperandVisitable::OperandVisitable; + RegOperand *CloneTree(MapleAllocator &allocator) const override { + return allocator.GetMemPool()->New(*this); + } + Operand *Clone(MemPool &memPool) const override { return memPool.Clone(*this); } @@ -454,6 +457,11 @@ class ImmOperand : public OperandVisitable { }; using OperandVisitable::OperandVisitable; + ImmOperand *CloneTree(MapleAllocator &allocator) const override { + // const MIRSymbol is not changed in cg, so we can do shallow copy + return allocator.GetMemPool()->New(*this); + } + Operand *Clone(MemPool &memPool) const override { return memPool.Clone(*this); } @@ -644,11 +652,7 @@ class ImmOperand : public OperandVisitable { if (!operand.IsImmediate()) { return false; } - auto &op = static_cast(operand); - if (&op == this) { - return true; - } - return (BasicEquals(op) && value == op.GetValue() && isSigned == op.IsSignedValue()); + return ValueEquals(static_cast(operand)); } std::string GetHashContent() const override { @@ -703,6 +707,11 @@ class OfstOperand : public ImmOperand { ofSymbol = nullptr; } + OfstOperand *CloneTree(MapleAllocator &allocator) const override { + // const MIRSymbol is not changed in cg, so we can do shallow copy + return allocator.GetMemPool()->New(*this); + } + Operand *Clone(MemPool &memPool) const override { return memPool.Clone(*this); } @@ -789,6 +798,10 @@ class ExtendShiftOperand : public OperandVisitable { ~ExtendShiftOperand() override = default; using OperandVisitable::OperandVisitable; + ExtendShiftOperand *CloneTree(MapleAllocator &allocator) const override { + return allocator.GetMemPool()->New(*this); + } + Operand *Clone(MemPool &memPool) const override { return memPool.Clone(*this); } @@ -859,6 +872,10 @@ class BitShiftOperand : public OperandVisitable { ~BitShiftOperand() override = default; using OperandVisitable::OperandVisitable; + BitShiftOperand *CloneTree(MapleAllocator &allocator) const override { + return allocator.GetMemPool()->New(*this); + } + Operand *Clone(MemPool &memPool) const override { return memPool.Clone(*this); } @@ -1052,6 +1069,26 @@ class MemOperand : public OperandVisitable { ~MemOperand() override = default; using OperandVisitable::OperandVisitable; + MemOperand *CloneTree(MapleAllocator &allocator) const override { + auto *memOpnd = allocator.GetMemPool()->New(*this); + if (baseOpnd != nullptr) { + memOpnd->SetBaseRegister(*baseOpnd->CloneTree(allocator)); + } + if (indexOpnd != nullptr) { + memOpnd->SetIndexRegister(*indexOpnd->CloneTree(allocator)); + } + if (offsetOpnd != nullptr) { + memOpnd->SetOffsetOperand(*offsetOpnd->CloneTree(allocator)); + } + if (exOpnd != nullptr) { + memOpnd->SetExtendOperand(exOpnd->CloneTree(allocator)); + } + if (lsOpnd != nullptr) { + memOpnd->SetBitOperand(lsOpnd->CloneTree(allocator)); + } + return memOpnd; + } + MemOperand *Clone(MemPool &memPool) const override { return memPool.Clone(*this); } @@ -1370,6 +1407,10 @@ class LabelOperand : public OperandVisitable { ~LabelOperand() override = default; using OperandVisitable::OperandVisitable; + LabelOperand *CloneTree(MapleAllocator &allocator) const override { + return allocator.GetMemPool()->New(*this); + } + Operand *Clone(MemPool &memPool) const override { return memPool.Clone(*this); } @@ -1443,6 +1484,14 @@ class ListOperand : public OperandVisitable { using OperandVisitable::OperandVisitable; + ListOperand *CloneTree(MapleAllocator &allocator) const override { + auto *listOpnd = allocator.GetMemPool()->New(allocator); + for (auto regOpnd : opndList) { + listOpnd->PushOpnd(*regOpnd->CloneTree(allocator)); + } + return listOpnd; + } + Operand *Clone(MemPool &memPool) const override { return memPool.Clone(*this); } @@ -1500,6 +1549,11 @@ class StImmOperand : public OperandVisitable { using OperandVisitable::OperandVisitable; + StImmOperand *CloneTree(MapleAllocator &allocator) const override { + // const MIRSymbol is not changed in cg, so we can do shallow copy + return allocator.GetMemPool()->New(*this); + } + Operand *Clone(MemPool &memPool) const override { return memPool.Clone(*this); } @@ -1560,6 +1614,10 @@ class CommentOperand : public OperandVisitable { return comment; } + CommentOperand *CloneTree(MapleAllocator &allocator) const override { + return allocator.GetMemPool()->New(*this); + } + Operand *Clone(MemPool &memPool) const override { return memPool.Clone(*this); } @@ -1601,6 +1659,14 @@ class ListConstraintOperand : public OperandVisitable { } } + ListConstraintOperand *CloneTree(MapleAllocator &allocator) const override { + auto *constraintOpnd = allocator.GetMemPool()->New(allocator); + for (auto stringOpnd : stringList) { + (void)constraintOpnd->stringList.emplace_back(stringOpnd->CloneTree(allocator)); + } + return constraintOpnd; + } + Operand *Clone(MemPool &memPool) const override { return memPool.Clone(*this); } @@ -1628,6 +1694,14 @@ class PhiOperand : public OperandVisitable { ~PhiOperand() override = default; using OperandVisitable::OperandVisitable; + PhiOperand *CloneTree(MapleAllocator &allocator) const override { + auto *phiOpnd = allocator.GetMemPool()->New(allocator); + for (auto phiPair : phiList) { + phiOpnd->InsertOpnd(phiPair.first, *phiPair.second->CloneTree(allocator)); + } + return phiOpnd; + } + Operand *Clone(MemPool &memPool) const override { return memPool.Clone(*this); } @@ -1691,6 +1765,15 @@ class FuncNameOperand : public OperandVisitable { } using OperandVisitable::OperandVisitable; + FuncNameOperand *CloneTree(MapleAllocator &allocator) const override { + // const MIRSymbol is not changed in cg, so we can do shallow copy + return allocator.GetMemPool()->New(*this); + } + + Operand *Clone(MemPool &memPool) const override { + return memPool.New(*this); + } + const std::string &GetName() const { return symbol->GetName(); } @@ -1707,10 +1790,6 @@ class FuncNameOperand : public OperandVisitable { symbol = &fsym; } - Operand *Clone(MemPool &memPool) const override { - return memPool.New(*this); - } - bool Less(const Operand &right) const override { if (&right == this) { return false; @@ -1733,6 +1812,37 @@ class FuncNameOperand : public OperandVisitable { const MIRSymbol *symbol; }; +class CondOperand : public OperandVisitable { + public: + explicit CondOperand(maplebe::ConditionCode cc) : OperandVisitable(Operand::kOpdCond, k4ByteSize), cc(cc) {} + + ~CondOperand() override = default; + using OperandVisitable::OperandVisitable; + + CondOperand *CloneTree(MapleAllocator &allocator) const override { + return allocator.GetMemPool()->New(*this); + } + + Operand *Clone(MemPool &memPool) const override { + return memPool.New(cc); + } + + ConditionCode GetCode() const { + return cc; + } + + bool Less(const Operand &right) const override; + + void Dump() const override { + CHECK_FATAL_FALSE("dont run here"); + } + + static const char *ccStrs[kCcLast]; + + private: + ConditionCode cc; +}; + namespace operand { /* bit 0-7 for common */ enum CommOpndDescProp : maple::uint64 { @@ -1836,33 +1946,6 @@ class OpndDesc { maple::uint32 size; }; -class CondOperand : public OperandVisitable { - public: - explicit CondOperand(maplebe::ConditionCode cc) : OperandVisitable(Operand::kOpdCond, k4ByteSize), cc(cc) {} - - ~CondOperand() override = default; - using OperandVisitable::OperandVisitable; - - Operand *Clone(MemPool &memPool) const override { - return memPool.New(cc); - } - - ConditionCode GetCode() const { - return cc; - } - - bool Less(const Operand &right) const override; - - void Dump() const override { - CHECK_FATAL_FALSE("dont run here"); - } - - static const char *ccStrs[kCcLast]; - - private: - ConditionCode cc; -}; - class OpndDumpVisitor : public OperandVisitorBase, public OperandVisitors splitRegRefs; // registers reference points MapleBitVector afterCallBBs; + private: // collect registers which will be split virtual void CollectSplitRegs() = 0; diff --git a/src/mapleall/maple_be/include/cg/reaching.h b/src/mapleall/maple_be/include/cg/reaching.h index 3dec5c220e6fafec77615ccab3e4416088b0bdc0..641c7902cf3b3c7b98493d4436f15b8fd4ae37cf 100644 --- a/src/mapleall/maple_be/include/cg/reaching.h +++ b/src/mapleall/maple_be/include/cg/reaching.h @@ -117,8 +117,6 @@ class ReachingDefinition : public AnalysisResult { virtual void GenAllAsmDefRegs(BB &bb, Insn &insn, uint32 index) = 0; virtual void GenAllAsmUseRegs(BB &bb, Insn &insn, uint32 index) = 0; virtual void GenAllCallerSavedRegs(BB &bb, Insn &insn) = 0; - virtual void AddRetPseudoInsn(BB &bb) = 0; - virtual void AddRetPseudoInsns() = 0; virtual int32 GetStackSize() const = 0; virtual bool IsCallerSavedReg(uint32 regNO) const = 0; virtual void FindRegDefInBB(uint32 regNO, BB &bb, InsnSet &defInsnSet) const = 0; diff --git a/src/mapleall/maple_be/include/cg/reg_alloc_color_ra.h b/src/mapleall/maple_be/include/cg/reg_alloc_color_ra.h index cda33e094e5b0bdce42c6ec922a6563e601cba17..581b0f0c70380a3e2b35f30fd654f0b7f34e9146 100644 --- a/src/mapleall/maple_be/include/cg/reg_alloc_color_ra.h +++ b/src/mapleall/maple_be/include/cg/reg_alloc_color_ra.h @@ -1352,7 +1352,7 @@ class GraphColorRegAllocator : public RegAllocator { void LocalRegisterAllocator(bool doAllocate); MemOperand *GetSpillOrReuseMem(LiveRange &lr, bool &isOutOfRange, Insn &insn, bool isDef); void SpillOperandForSpillPre(Insn &insn, const Operand &opnd, RegOperand &phyOpnd, uint32 spillIdx, bool needSpill); - void SpillOperandForSpillPost(Insn &insn, const Operand &opnd, bool isDef, RegOperand &phyOpnd, + void SpillOperandForSpillPost(Insn &insn, const Operand &opnd, RegOperand &phyOpnd, uint32 spillIdx, bool needSpill); MemOperand *GetConsistentReuseMem(const MapleSet &conflict, const std::set &usedMemOpnd, uint32 size, @@ -1390,7 +1390,7 @@ class GraphColorRegAllocator : public RegAllocator { bool FinalizeRegisterPreprocess(FinalizeRegisterInfo &fInfo, const Insn &insn, MapleBitVector &usedRegMask); void SplitVregAroundLoop(const LoopDesc &loop, const std::vector &lrs, - BB &headerPred, BB &exitSucc, const std::set &cands); + BB &storeBB, BB &reloadBB, const std::set &cands); bool LoopNeedSplit(const LoopDesc &loop, std::set &cands); bool LrGetBadReg(const LiveRange &lr) const; void AnalysisLoopPressureAndSplit(const LoopDesc &loop); diff --git a/src/mapleall/maple_be/include/cg/schedule.h b/src/mapleall/maple_be/include/cg/schedule.h index 51f87da8f651bb2fe9a331dac1d0ea54f403b9cc..53b93c0e3c49f9019a27beb8d8ad79fcb1fdce63 100644 --- a/src/mapleall/maple_be/include/cg/schedule.h +++ b/src/mapleall/maple_be/include/cg/schedule.h @@ -92,7 +92,7 @@ class ScheduleProcessInfo { void PushElemIntoScheduledNodes(DepNode *node) { node->SetState(kScheduled); node->SetSchedCycle(currCycle); - node->OccupyUnits(); + node->OccupyRequiredUnits(); scheduledNodes.emplace_back(node); } diff --git a/src/mapleall/maple_be/include/cg/schedule_heuristic.h b/src/mapleall/maple_be/include/cg/schedule_heuristic.h index 3613c6c6cd75a6137576e830b3288de8d29a8590..fed2d6da7cf2918fc352de97f4f2ec52f51e1332 100644 --- a/src/mapleall/maple_be/include/cg/schedule_heuristic.h +++ b/src/mapleall/maple_be/include/cg/schedule_heuristic.h @@ -17,16 +17,14 @@ #include "deps.h" -/* - * Define a series of priority comparison function objects. - * @ReturnValue: - * - positive: node1 has higher priority - * - negative: node2 has higher priority - * - zero: node1 == node2 - * And ensure the sort is stable. - */ +// Define a series of priority comparison function objects. +// @ReturnValue: +// - positive: node1 has higher priority +// - negative: node2 has higher priority +// - zero: node1 == node2 +// And ensure the sort is stable. namespace maplebe { -/* Prefer max delay priority */ +// Prefer max delay priority class CompareDelay { public: int operator() (const DepNode &node1, const DepNode &node2) const { @@ -34,12 +32,13 @@ class CompareDelay { } }; -/* - * To make better use of cpu cache prefetch: - * 1. if both insns are memory operation and have same base address (same base register), prefer lowest offset - * 2. if one insn is store and the other is not memory operation, prefer non-memory-insn scheduled before store - * 3. if one insn is load and the other is not memory operation, prefer load scheduled before non-memory-insn - */ + +// To make better use of cpu cache prefetch: +// (1) if both insns are memory operation and have same base address (same base register) and same access byte, +// prefer lowest offset; +// the following (2) and (3) are not implemented currently, and can be optimized in the future: +// (2) if one insn is store and the other is not memory operation, prefer non-memory-insn scheduled before store; +// (3) if one insn is load and the other is not memory operation, prefer load scheduled before non-memory-insn. class CompareDataCache { public: int operator() (const DepNode &node1, const DepNode &node2) { @@ -51,6 +50,11 @@ class CompareDataCache { if (insn1->IsMemAccess() && insn2->IsMemAccess()) { auto *memOpnd1 = static_cast(insn1->GetMemOpnd()); auto *memOpnd2 = static_cast(insn2->GetMemOpnd()); + // Need the same access byte + if ((insn1->IsLoadStorePair() && !insn2->IsLoadStorePair()) || + (!insn1->IsLoadStorePair() && insn2->IsLoadStorePair())) { + return 0; + } if (memOpnd1 != nullptr && memOpnd2 != nullptr) { // Exclude load address if (memOpnd1->GetAddrMode() == MemOperand::kBOI && memOpnd2->GetAddrMode() == MemOperand::kBOI) { RegOperand *baseOpnd1 = memOpnd1->GetBaseRegister(); @@ -79,31 +83,22 @@ class CompareDataCache { } } } - } - else if (insn1->IsMemAccess()) { - if (insn1->IsLoad() || insn1->IsLoadPair()) { - return 1; - } else { - return -1; - } - } else if (insn2->IsMemAccess()) { - if (insn2->IsLoad() || insn2->IsLoadPair()) { - return -1; - } else { - return 1; - } + } else if (enableIrrelevant && insn1->IsMemAccess()) { + return (insn1->IsLoad() || insn1->IsLoadPair()) ? 1 : -1; + } else if (enableIrrelevant && insn2->IsMemAccess()) { + return (insn2->IsLoad() || insn2->IsLoadPair()) ? -1 : 1; } return 0; } + + bool enableIrrelevant = false; }; -/* - * Prefer the class of the edges of two insn and last scheduled insn with the highest class number: - * 1. true dependency - * 2. anti/output dependency - * 3. the rest of the dependency - * 4. independent of last scheduled insn - */ +// Prefer the class of the edges of two insn and last scheduled insn with the highest class number: +// 1. true dependency +// 2. anti/output dependency +// 3. the rest of the dependency +// 4. independent of last scheduled insn class CompareClassOfLastScheduledNode { public: explicit CompareClassOfLastScheduledNode(uint32 lsid) : lastSchedInsnId(lsid) {} @@ -171,7 +166,7 @@ class CompareClassOfLastScheduledNode { uint32 lastSchedInsnId = 0; }; -/* Prefer min eStart */ +// Prefer min eStart class CompareEStart { public: int operator() (const DepNode &node1, const DepNode &node2) const { @@ -179,7 +174,7 @@ class CompareEStart { } }; -/* Prefer min lStart */ +// Prefer min lStart class CompareLStart { public: int operator() (const DepNode &node1, const DepNode &node2) const { @@ -187,7 +182,7 @@ class CompareLStart { } }; -/* Prefer max cost of insn */ +// Prefer max cost of insn class CompareCost { public: int operator() (const DepNode &node1, const DepNode &node2) { @@ -195,7 +190,7 @@ class CompareCost { } }; -/* Prefer using more unit kind */ +// Prefer using more unit kind class CompareUnitKindNum { public: explicit CompareUnitKindNum(uint32 maxUnitIndex) : maxUnitIdx(maxUnitIndex) {} @@ -213,7 +208,7 @@ class CompareUnitKindNum { } private: - /* Check if a node use a specific unit kind */ + // Check if a node use a specific unit kind bool IsUseUnitKind(const DepNode &depNode) const { uint32 unitKind = depNode.GetUnitKind(); auto idx = static_cast(__builtin_ffs(static_cast(unitKind))); @@ -231,7 +226,7 @@ class CompareUnitKindNum { uint32 maxUnitIdx = 0; }; -/* Prefer slot0 */ +// Prefer slot0 class CompareSlotType { public: int operator() (const DepNode &node1, const DepNode &node2) { @@ -247,7 +242,7 @@ class CompareSlotType { } }; -/* Prefer more succNodes */ +// Prefer more succNodes class CompareSuccNodeSize { public: int operator() (const DepNode &node1, const DepNode &node2) const { @@ -255,7 +250,7 @@ class CompareSuccNodeSize { } }; -/* Default order */ +// Default order class CompareInsnID { public: int operator() (const DepNode &node1, const DepNode &node2) { @@ -266,5 +261,5 @@ class CompareInsnID { return static_cast(insn2->GetId() - insn1->GetId()); } }; -} /* namespace maplebe */ +} // namespace maplebe #endif // MAPLEBE_INCLUDE_CG_SCHEDULE_HEURISTIC_H diff --git a/src/mapleall/maple_be/include/cg/x86_64/x64_MPISel.h b/src/mapleall/maple_be/include/cg/x86_64/x64_MPISel.h index a452f20b769666b93a97ac798aa6a4765fec2eb2..2b6ea5c43641f609fdce35ca43e952bb586ef008 100644 --- a/src/mapleall/maple_be/include/cg/x86_64/x64_MPISel.h +++ b/src/mapleall/maple_be/include/cg/x86_64/x64_MPISel.h @@ -38,8 +38,7 @@ class X64MPIsel : public MPISel { void SelectGoto(GotoNode &stmt) override; void SelectIntrinCall(IntrinsiccallNode &intrinsiccallNode) override; void SelectAggIassign(IassignNode &stmt, Operand &AddrOpnd, Operand &opndRhs) override; - void SelectAggDassign(maplebe::MirTypeInfo &lhsInfo, MemOperand &symbolMem, Operand &rOpnd, - const DassignNode &s) override; + void SelectAggDassign(maplebe::MirTypeInfo &lhsInfo, MemOperand &symbolMem, Operand &rOpnd, DassignNode &s) override; void SelectAggCopy(MemOperand &lhs, MemOperand &rhs, uint32 copySize) override; void SelectRangeGoto(RangeGotoNode &rangeGotoNode, Operand &srcOpnd) override; void SelectCondGoto(CondGotoNode &stmt, BaseNode &condNode) override; @@ -84,6 +83,7 @@ class X64MPIsel : public MPISel { Operand *SelectCstrncmp(IntrinsicopNode &node, Operand &opnd0, const BaseNode &parent) override; Operand *SelectCstrchr(IntrinsicopNode &node, Operand &opnd0, const BaseNode &parent) override; Operand *SelectCstrrchr(IntrinsicopNode &node, Operand &opnd0, const BaseNode &parent) override; + void SelectCprefetch(IntrinsiccallNode &intrinsiccallNode) override; Operand *SelectAbs(UnaryNode &node, Operand &opnd0, const BaseNode &parent) override; void SelectAsm(AsmNode &node) override; private: diff --git a/src/mapleall/maple_be/include/cg/x86_64/x64_abi.h b/src/mapleall/maple_be/include/cg/x86_64/x64_abi.h index 252576216896bbabada6bd094b898619c07de156..8b92a02e3dee3ee012cc79185d8c5603235dd6ac 100644 --- a/src/mapleall/maple_be/include/cg/x86_64/x64_abi.h +++ b/src/mapleall/maple_be/include/cg/x86_64/x64_abi.h @@ -29,7 +29,6 @@ constexpr int32 kNumFloatParmRegs = 8; constexpr int32 kNumFloatReturnRegs = 2; constexpr uint32 kNormalUseOperandNum = 2; -constexpr uint32 kMaxInstrForCondBr = 260000; constexpr X64reg kIntParmRegs[kNumIntParmRegs] = { R7, R6, R3, R2, R8, R9 }; constexpr X64reg kIntReturnRegs[kNumIntReturnRegs] = { R0, R3 }; diff --git a/src/mapleall/maple_be/include/cg/x86_64/x64_abstract_mapping.def b/src/mapleall/maple_be/include/cg/x86_64/x64_abstract_mapping.def index 6f2daf65e1471ab61a2be4e142ac55615a3c7122..462fa203614b41be98d3711be30443d8e64d453e 100644 --- a/src/mapleall/maple_be/include/cg/x86_64/x64_abstract_mapping.def +++ b/src/mapleall/maple_be/include/cg/x86_64/x64_abstract_mapping.def @@ -108,7 +108,7 @@ DEFINE_MAPPING(abstract::MOP_zext_rr_64_8, x64::MOP_movzbq_r_r) DEFINE_MAPPING(abstract::MOP_sext_rr_64_8, x64::MOP_movsbq_r_r) DEFINE_MAPPING(abstract::MOP_zext_rr_64_16, x64::MOP_movzwq_r_r) DEFINE_MAPPING(abstract::MOP_sext_rr_64_16, x64::MOP_movswq_r_r) -DEFINE_MAPPING(abstract::MOP_zext_rr_64_32, x64::MOP_movl_r_r) +DEFINE_MAPPING(abstract::MOP_zext_rr_64_32, x64::MOP_movzlq_r_r) DEFINE_MAPPING(abstract::MOP_sext_rr_64_32, x64::MOP_movslq_r_r) /* CvtOp truncate */ diff --git a/src/mapleall/maple_be/include/cg/x86_64/x64_cgfunc.h b/src/mapleall/maple_be/include/cg/x86_64/x64_cgfunc.h index c5af805e6b3ec148951d223e50450cf099472cd3..54b6b2be063449d367099da34abfe45e0201e7de 100644 --- a/src/mapleall/maple_be/include/cg/x86_64/x64_cgfunc.h +++ b/src/mapleall/maple_be/include/cg/x86_64/x64_cgfunc.h @@ -32,6 +32,8 @@ class X64CGFunc : public CGFunc { InsnVisitor *NewInsnModifier() override { return memPool->New(*this); } + void AddPseudoRetInsns(BB &bb) override; + void AddPseudoRetInsnsInExitBBs() override; void GenSaveMethodInfoCode(BB &bb) override; void GenerateCleanupCode(BB &bb) override; bool NeedCleanup() override; @@ -49,7 +51,7 @@ class X64CGFunc : public CGFunc { void SelectAbort() override; void SelectAssertNull(UnaryStmtNode &stmt) override; void SelectAsm(AsmNode &node) override; - void SelectAggDassign(const DassignNode &stmt) override; + void SelectAggDassign(DassignNode &stmt) override; void SelectIassign(IassignNode &stmt) override; void SelectIassignoff(IassignoffNode &stmt) override; void SelectIassignfpoff(IassignFPoffNode &stmt, Operand &opnd) override; @@ -84,10 +86,13 @@ class X64CGFunc : public CGFunc { Operand *SelectCSyncValCmpSwap(IntrinsicopNode &intrinopNode) override; Operand *SelectCSyncLockTestSet(IntrinsicopNode &intrinopNode, PrimType pty) override; Operand *SelectCReturnAddress(IntrinsicopNode &intrinopNode) override; + Operand *SelectCAllocaWithAlign(IntrinsicopNode &intrinsicopNode) override; void SelectCAtomicExchange(const IntrinsiccallNode &intrinsiccallNode) override; Operand *SelectCAtomicCompareExchange(const IntrinsicopNode &intrinsicopNode, bool isCompareExchangeN) override; Operand *SelectCAtomicTestAndSet(const IntrinsicopNode &intrinsicopNode) override; void SelectCAtomicClear(const IntrinsiccallNode &intrinsiccallNode) override; + void SelectCprefetch(IntrinsiccallNode &intrinsiccallNode) override; + void SelectCclearCache(IntrinsiccallNode &intrinsiccallNode) override; void SelectMembar(StmtNode &membar) override; void SelectComment(CommentNode &comment) override; void HandleCatch() override; diff --git a/src/mapleall/maple_be/include/cg/x86_64/x64_emitter.h b/src/mapleall/maple_be/include/cg/x86_64/x64_emitter.h index c74d3e8b832c528a221accd087c6e05c6d8191ed..e2957f6ef8ac4e69bec1f1e8edc7264f03218877 100644 --- a/src/mapleall/maple_be/include/cg/x86_64/x64_emitter.h +++ b/src/mapleall/maple_be/include/cg/x86_64/x64_emitter.h @@ -34,6 +34,10 @@ class X64Emitter : public AsmEmitter { void EmitBBHeaderLabel(FuncEmitInfo &funcEmitInfo, const std::string &name, LabelIdx labIdx) override; void EmitJavaInsnAddr(FuncEmitInfo &funcEmitInfo) override; void Run(FuncEmitInfo &funcEmitInfo) override; + + private: + void DumpTargetASM(Emitter &emitter, Insn &insn); + void EmitPrefetch(Emitter &emitter, const Insn &insn) const; }; class X64OpndEmitVisitor : public OpndEmitVisitor { diff --git a/src/mapleall/maple_be/include/cg/x86_64/x64_md.def b/src/mapleall/maple_be/include/cg/x86_64/x64_md.def index a3f3183c75e695cf2c4ad65fb24939d2feee79b8..01e75d4ea76dd9acb24966ece00bc70b39b19941 100644 --- a/src/mapleall/maple_be/include/cg/x86_64/x64_md.def +++ b/src/mapleall/maple_be/include/cg/x86_64/x64_md.def @@ -97,12 +97,13 @@ DEFINE_MOP(MOP_movswl_r_r, {&OpndDesc::Reg16IS,&OpndDesc::Reg32ID},ISCONVERSION, /* zero extension */ /* * Perhaps unexpectedly, instructions that move or generate 32-bit register values also set the upper 32 bits of the register to zero. - * Consequently, there is no need for an instruction movzlq. + * But movl also will be delete, so we create movzlq instruction */ DEFINE_MOP(MOP_movzbq_m_r, {&OpndDesc::Mem8S,&OpndDesc::Reg64ID},ISCONVERSION,kLtAlu,"movzbq","0,1",1) DEFINE_MOP(MOP_movzbq_r_r, {&OpndDesc::Reg8IS,&OpndDesc::Reg64ID},ISCONVERSION,kLtAlu,"movzbq","0,1",1) DEFINE_MOP(MOP_movzwq_m_r, {&OpndDesc::Mem16S,&OpndDesc::Reg64ID},ISCONVERSION,kLtAlu,"movzwq","0,1",1) DEFINE_MOP(MOP_movzwq_r_r, {&OpndDesc::Reg16IS,&OpndDesc::Reg64ID},ISCONVERSION,kLtAlu,"movzwq","0,1",1) +DEFINE_MOP(MOP_movzlq_r_r, {&OpndDesc::Reg32IS,&OpndDesc::Reg32ID},ISCONVERSION,kLtAlu,"movl","0,1",1) /* sign extension */ DEFINE_MOP(MOP_movsbq_m_r, {&OpndDesc::Mem8S,&OpndDesc::Reg64ID},ISCONVERSION,kLtAlu,"movsbq","0,1",1) DEFINE_MOP(MOP_movsbq_r_r, {&OpndDesc::Reg8IS,&OpndDesc::Reg64ID},ISCONVERSION,kLtAlu,"movsbq","0,1",1) @@ -527,5 +528,9 @@ DEFINE_MOP(MOP_cvtss2sd_r, {&OpndDesc::Reg128FS, &OpndDesc::Reg128FD},0,kLtAlu," DEFINE_MOP(MOP_cvtsd2ss_r, {&OpndDesc::Reg128FS, &OpndDesc::Reg128FD},0,kLtAlu,"cvtsd2ss","0,1",1) DEFINE_MOP(MOP_ucomisd_r_r, {&OpndDesc::Reg128FS,&OpndDesc::Reg128FS},0,kLtAlu,"ucomisd","0,1",1) + +/* MOP_prefetch */ +DEFINE_MOP(MOP_prefetch, {&OpndDesc::Reg64IS, &OpndDesc::Imm32, &OpndDesc::Imm32}, 0, kLtUndef, "intrinsic_prefetch", "0,1,2", 1) + /* pseudo operation */ DEFINE_MOP(MOP_pseudo_ret_int, {&OpndDesc::Reg64IS},0,kLtUndef,"//MOP_pseudo_ret_int","", 0) diff --git a/src/mapleall/maple_be/include/cg/x86_64/x64_optimize_common.h b/src/mapleall/maple_be/include/cg/x86_64/x64_optimize_common.h index ae2b89a64cb656c2e3294b220f1649930ff5b943..e2d7449c73a9819436bc77d3b8e8384770b2182e 100644 --- a/src/mapleall/maple_be/include/cg/x86_64/x64_optimize_common.h +++ b/src/mapleall/maple_be/include/cg/x86_64/x64_optimize_common.h @@ -35,6 +35,7 @@ class X64InsnVisitor : public InsnVisitor { LabelIdx GetJumpLabel(const Insn &insn) const override; bool IsCompareInsn(const Insn &insn) const override; bool IsCompareAndBranchInsn(const Insn &insn) const override; + bool IsTestAndBranchInsn(const Insn &insn) const override; bool IsAddOrSubInsn(const Insn &insn) const override; RegOperand *CreateVregFromReg(const RegOperand &pReg) override; void ReTargetSuccBB(BB &bb, LabelIdx newTarget) const override; diff --git a/src/mapleall/maple_be/include/cg/x86_64/x64_reaching.h b/src/mapleall/maple_be/include/cg/x86_64/x64_reaching.h index f53023c23e64aa73aa29a813b3da60c7fae34dc1..99ca7198c80f9f4f4598c9eeb888512487a066ef 100644 --- a/src/mapleall/maple_be/include/cg/x86_64/x64_reaching.h +++ b/src/mapleall/maple_be/include/cg/x86_64/x64_reaching.h @@ -44,9 +44,7 @@ class X64ReachingDefinition : public ReachingDefinition { void GenAllCallerSavedRegs(BB &bb, Insn &insn) final; bool IsRegKilledByCallInsn(const Insn &insn, regno_t regNO) const final; bool KilledByCallBetweenInsnInSameBB(const Insn &startInsn, const Insn &endInsn, regno_t regNO) const final; - void AddRetPseudoInsn(BB &bb) final; - - void AddRetPseudoInsns() final; bool IsCallerSavedReg(uint32 regNO) const final; + bool IsCallerSavedReg(uint32 regNO) const final; void FindRegDefInBB(uint32 regNO, BB &bb, InsnSet &defInsnSet) const final; void FindMemDefInBB(uint32 offset, BB &bb, InsnSet &defInsnSet) const final; void DFSFindDefForRegOpnd(const BB &startBB, uint32 regNO, std::vector &visitedBB, diff --git a/src/mapleall/maple_be/src/ad/mad.cpp b/src/mapleall/maple_be/src/ad/mad.cpp index dfb25ef8bb9839385ee2144acdbd7f50b5cf8e9a..2c58c73fdb2258df64b670706c3e62fc21baaf97 100644 --- a/src/mapleall/maple_be/src/ad/mad.cpp +++ b/src/mapleall/maple_be/src/ad/mad.cpp @@ -49,97 +49,65 @@ Unit::Unit(enum UnitType theUnitType, enum UnitId theUnitId, int numOfUnits, ... MAD::AddUnit(*this); } -/* return name of unit */ +// return name of unit std::string Unit::GetName() const { ASSERT(GetUnitId() <= kUnitIdLast, "Unexpected UnitID"); return kUnitName[GetUnitId()]; } -/* Check whether the unit is free from the current cycle(bit 0) to the cost */ -bool Unit::IsFree(uint32 cost) const { +// If the unit is idle in the CYCLE, return true +bool Unit::IsIdle(uint32 cycle) const { if (unitType == kUnitTypeOr) { - for (auto *unit : compositeUnits) { - if (unit->IsFree(cost)) { + // For 'or'-unit, if one of them is idle, return true + for (Unit *unit : compositeUnits) { + if (unit->IsIdle(cycle)) { return true; } } return false; } else if (GetUnitType() == kUnitTypeAnd) { + // For 'and'-unit, if all of them are idle, return true for (auto *unit : compositeUnits) { - if (!unit->IsFree(cost)) { + if (!unit->IsIdle(cycle)) { return false; } } return true; } - return ((occupancyTable & std::bitset<32>((1u << cost) - 1)) == 0); + return ((occupancyTable & std::bitset(1u << cycle)) == 0); } -/* - * Old interface: - * Occupy unit for cost cycles - */ -void Unit::Occupy(const Insn &insn, uint32 cycle) { +// Occupy unit in the CYCLE +void Unit::Occupy(uint32 cycle) { if (GetUnitType() == kUnitTypeOr) { + // For 'or'-unit, occupy the first idle unit for (auto unit : GetCompositeUnits()) { - if (unit->IsFree(cycle)) { - unit->Occupy(insn, cycle); + if (unit->IsIdle(cycle)) { + unit->Occupy(cycle); return; } } - - ASSERT(false, "CG internal error, should not be reach here."); - return; + // If there is no return before, there is an error. + CHECK_FATAL(false, "when the instruction issue, all units it required must be idle"); } else if (GetUnitType() == kUnitTypeAnd) { + // For 'and'-unit, occupy all the unit for (auto unit : GetCompositeUnits()) { - unit->Occupy(insn, cycle); + unit->Occupy(cycle); } return; } occupancyTable |= (1ULL << cycle); } -/* - * New interface for list-scheduler: - * Occupy unit for cost cycles - */ -void Unit::Occupy(uint32 cost, std::vector &visited) { - if (visited[unitId]) { - return; - } - visited[unitId] = true; - if (unitType == kUnitTypeOr) { // occupy any functional unit - for (auto *unit : compositeUnits) { - if (unit->IsFree(cost)) { - unit->Occupy(cost, visited); - return; - } - } - CHECK_FATAL(false, "Or-type units should have one free unit"); - } else if (unitType == kUnitTypeAnd) { // occupy all functional units - for (auto *unit : compositeUnits) { - unit->Occupy(cost, visited); - } - return; - } - // Single unit - // For slot0 and slot1, only occupy one cycle - if (unitId == kUnitIdSlot0 || unitId == kUnitIdSlot1) { - occupancyTable |= 1; - } else { - occupancyTable |= ((1u << cost) - 1); - } -} - -/* Advance all units one cycle */ -void Unit::AdvanceCycle() { +// Advance one cpu cycle, and update the occupation status of all units +void Unit::AdvanceOneCycle() { if (GetUnitType() != kUnitTypePrimart) { return; } occupancyTable = (occupancyTable >> 1); } -/* Release all units. */ +// Release all units void Unit::Release() { if (GetUnitType() != kUnitTypePrimart) { return; @@ -163,7 +131,7 @@ void Unit::Dump(int indent) const { LogInfo::MapleLogger() << "occupancyTable = " << occupancyTable << '\n'; } -std::bitset<32> Unit::GetOccupancyTable() const { +std::bitset Unit::GetOccupancyTable() const { return occupancyTable; } @@ -203,7 +171,7 @@ void MAD::InitParallelism() const { #include "mplad_arch_define.def" } -/* according insn's insnType to get a reservation */ +// Return the reservation by latencyType of the instruction Reservation *MAD::FindReservation(const Insn &insn) const { uint32 insnType = insn.GetLatencyType(); for (auto reservation : allReservations) { @@ -214,7 +182,7 @@ Reservation *MAD::FindReservation(const Insn &insn) const { return nullptr; } -/* Get latency that is def insn to use insn */ +// Return latency from producer instruction to consumer instruction int MAD::GetLatency(const Insn &def, const Insn &use) const { int latency = BypassLatency(def, use); if (latency < 0) { @@ -223,27 +191,36 @@ int MAD::GetLatency(const Insn &def, const Insn &use) const { return latency; } -/* Get bypass latency that is def insn to use insn */ +// Return latency according to latency from producer instruction to consumer instruction int MAD::BypassLatency(const Insn &def, const Insn &use) const { int latency = -1; ASSERT(def.GetLatencyType() < kLtLast, "out of range"); ASSERT(use.GetLatencyType() < kLtLast, "out of range"); BypassVector &bypassVec = bypassArrays[def.GetLatencyType()][use.GetLatencyType()]; for (auto *bypass : bypassVec) { - latency = std::min(latency, bypass->GetLatency()); + if (bypass->CanBypass(def, use)) { + latency = bypass->GetLatency(); + break; + } } return latency; } -/* Get insn's default latency */ +// Return default cost of the instruction int MAD::DefaultLatency(const Insn &insn) const { Reservation *res = insn.GetDepNode()->GetReservation(); return res != nullptr ? res->GetLatency() : 0; } -void MAD::AdvanceCycle() const { +// In the dual-issue arch, if two slots are occupied in the current cycle, +// return true +bool MAD::IsFullIssued() const { + return !GetUnitByUnitId(kUnitIdSlot0)->IsIdle(0) && !GetUnitByUnitId(kUnitIdSlot1)->IsIdle(0); +} + +void MAD::AdvanceOneCycleForAll() const { for (auto unit : allUnits) { - unit->AdvanceCycle(); + unit->AdvanceOneCycle(); } } @@ -253,7 +230,7 @@ void MAD::ReleaseAllUnits() const { } } -void MAD::SaveStates(std::vector> &occupyTable, int size) const { +void MAD::SaveStates(std::vector> &occupyTable, int size) const { int i = 0; for (auto unit : allUnits) { CHECK_FATAL(i < size, "unit number error"); @@ -265,21 +242,13 @@ void MAD::SaveStates(std::vector> &occupyTable, int size) const #define ADDBYPASS(DEFLTTY, USELTTY, LT) AddBypass(*(new Bypass(DEFLTTY, USELTTY, LT))) #define ADDALUSHIFTBYPASS(DEFLTTY, USELTTY, LT) AddBypass(*(new AluShiftBypass(DEFLTTY, USELTTY, LT))) #define ADDACCUMULATORBYPASS(DEFLTTY, USELTTY, LT) AddBypass(*(new AccumulatorBypass(DEFLTTY, USELTTY, LT))) -#define ADDSTOREBYPASS(DEFLTTY, USELTTY, LT) AddBypass(*(new StoreBypass(DEFLTTY, USELTTY, LT))) +#define ADDSTOREADDRBYPASS(DEFLTTY, USELTTY, LT) AddBypass(*(new StoreAddrBypass(DEFLTTY, USELTTY, LT))) void MAD::InitBypass() const { #include "mplad_bypass_define.def" } -/* - * check whether all slots are used, - * the bit 0 of occupyTable indicates the current cycle, so the cost(arg) is 1 - */ -bool MAD::IsFullIssued() const { - return !GetUnitByUnitId(kUnitIdSlot0)->IsFree(1) && !GetUnitByUnitId(kUnitIdSlot1)->IsFree(1); -} - -void MAD::RestoreStates(std::vector> &occupyTable, int size) const { +void MAD::RestoreStates(std::vector> &occupyTable, int size) const { int i = 0; for (auto unit : allUnits) { CHECK_FATAL(i < size, "unit number error"); @@ -294,61 +263,117 @@ bool Bypass::CanBypass(const Insn &defInsn, const Insn &useInsn) const { return true; } +// Return true if the USEINSN is an arithmetic or logic or shift instruction, +// and the defOpnd of DEFINSN is not used in shift operation of USEINSN. +// e.g. +// true: r3=r2+x1 -> r5=r4<<0x2+r3 +// false: r3=r2+x1 -> r5=r3<<0x2+r4 bool AluShiftBypass::CanBypass(const Insn &defInsn, const Insn &useInsn) const { - /* - * hook condition - * true: r1=r2+x1 -> r3=r2<<0x2+r1 - * false:r1=r2+x1 -> r3=r1<<0x2+r2 - */ - return &(defInsn.GetOperand(kInsnFirstOpnd)) != &(useInsn.GetOperand(kInsnSecondOpnd)); + RegOperand *productOpnd = nullptr; + uint32 defOpndNum = defInsn.GetOperandSize(); + for (uint32 i = 0; i < defOpndNum; ++i) { + if (defInsn.OpndIsDef(i)) { + Operand &opnd = defInsn.GetOperand(i); + CHECK_FATAL(opnd.IsRegister(), "invalid producer insn of type alu-shift"); + productOpnd = &static_cast(opnd); + break; + } + } + CHECK_NULL_FATAL(productOpnd); + uint32 useOpndNum = useInsn.GetOperandSize(); + if (useOpndNum <= kInsnThirdOpnd) { // operand_size <= 2 + return true; + } + Operand &lastUseOpnd = useInsn.GetOperand(useOpndNum - 1); + if (lastUseOpnd.GetKind() != Operand::kOpdShift && lastUseOpnd.GetKind() == Operand::kOpdExtend && + lastUseOpnd.GetKind() == Operand::kOpdRegShift) { + return true; + } + Operand &shiftOpnd = useInsn.GetOperand(useOpndNum - 2); + if (shiftOpnd.GetKind() != Operand::kOpdRegister) { + return true; + } + if (static_cast(shiftOpnd).GetRegisterNumber() == productOpnd->GetRegisterNumber()) { + return false; + } + return true; } -/* - * AccumulatorBypass: from multiplier to summator - */ +// Return true if the defOpnd of DEFINSN is used in the accumulator operation(MLA-like) of USEINSN. +// In aarch64, the MOPs are in {madd, msub, fmadd, fmsub, fnmadd, fnmsub} +// e.g. +// The USEINSN is {madd|msub} and the defOpnd is used in the following cases: +// true: r98=x0*x1 -> x0=x2*x3+r98 +// false:r98=x0*x1 -> x0=x2*r98+x3 bool AccumulatorBypass::CanBypass(const Insn &defInsn, const Insn &useInsn) const { - /* - * hook condition - * true: r98=x0*x1 -> x0=x2*x3+r98 - * false:r98=x0*x1 -> x0=x2*r98+x3 - */ - return (&(defInsn.GetOperand(kInsnFirstOpnd)) != &(useInsn.GetOperand(kInsnSecondOpnd)) && - &(defInsn.GetOperand(kInsnFirstOpnd)) != &(useInsn.GetOperand(kInsnThirdOpnd))); -} - -bool StoreBypass::CanBypass(const Insn &defInsn, const Insn &useInsn) const { - /* - * hook condition - * true: r96=r92+x2 -> str r96, [r92] - * false:r96=r92+x2 -> str r92, [r96] - * false:r96=r92+x2 -> str r92, [r94, r96] - */ -#if TARGAARCH64 - switch (useInsn.GetMachineOpcode()) { - case MOP_wstrb: - case MOP_wstrh: - case MOP_wstr: - case MOP_xstr: - case MOP_sstr: - case MOP_dstr: { - auto &useMemOpnd = static_cast(useInsn.GetOperand(kInsnSecondOpnd)); - return (&(defInsn.GetOperand(kInsnFirstOpnd)) != useMemOpnd.GetOffset() && - &(defInsn.GetOperand(kInsnFirstOpnd)) != useMemOpnd.GetBaseRegister()); - } - case MOP_wstp: - case MOP_xstp: { - auto &useMemOpnd = static_cast(useInsn.GetOperand(kInsnThirdOpnd)); - return (&(defInsn.GetOperand(kInsnFirstOpnd)) != useMemOpnd.GetOffset() && - &(defInsn.GetOperand(kInsnFirstOpnd)) != useMemOpnd.GetBaseRegister()); + RegOperand *productOpnd = nullptr; + uint32 defOpndNum = defInsn.GetOperandSize(); + for (uint32 i = 0; i < defOpndNum; ++i) { + if (defInsn.OpndIsDef(i)) { + Operand &opnd = defInsn.GetOperand(i); + CHECK_FATAL(opnd.IsRegister(), "invalid producer insn of type alu-shift"); + productOpnd = &static_cast(opnd); + break; } - - default: - return false; } -#endif + CHECK_NULL_FATAL(productOpnd); + // Currently, the MOPs of valid USEINSN are in {madd, msub, fmadd, fmsub, fnmadd, fnmsub}, + // that have four operands of LATENCYTYPE kLtMul and kLtFpmac. + uint32 useOpndNum = useInsn.GetOperandSize(); + if (useOpndNum != kInsnFifthOpnd) { // operand_size != 4 + return false; + } + // Get accumulator operand + Operand &accuOpnd = useInsn.GetOperand(useOpndNum - 1); + CHECK_FATAL(accuOpnd.IsRegister(), "invalid consumer insn of type mul"); + if (static_cast(accuOpnd).GetRegisterNumber() == productOpnd->GetRegisterNumber()) { + return true; + } return false; } +// Return true if the USEINSN(an integer store) does not use the defOpnd of DEFINSN to +// calculate the mem address. +// e.g. +// true: r96=r92+x2 -> str r96, [r92] +// false: r96=r92+x2 -> str r92, [r96, #8] +// false: r96=r92+x2 -> str r92, [r94, r96] +bool StoreAddrBypass::CanBypass(const Insn &defInsn, const Insn &useInsn) const { + // Only for LATENCY-TYPE {kLtStore1, kLtStore2, kLtStore3plus} + if (useInsn.GetLatencyType() != kLtStore1 && useInsn.GetLatencyType() != kLtStore2 && + useInsn.GetLatencyType() != kLtStore3plus) { + return false; + } + RegOperand *productOpnd = nullptr; + uint32 defOpndNum = defInsn.GetOperandSize(); + for (uint32 i = 0; i < defOpndNum; ++i) { + if (defInsn.OpndIsDef(i)) { + Operand &opnd = defInsn.GetOperand(i); + CHECK_FATAL(opnd.IsRegister(), "invalid producer insn of type alu-shift"); + productOpnd = &static_cast(opnd); + break; + } + } + CHECK_NULL_FATAL(productOpnd); + uint32 useOpndNum = useInsn.GetOperandSize(); + for (uint32 i = 0; i < useOpndNum; ++i) { + Operand &opnd = useInsn.GetOperand(i); + if (opnd.GetKind() == Operand::kOpdMem) { + auto &memOpnd = static_cast(opnd); + RegOperand *baseOpnd = memOpnd.GetBaseRegister(); + RegOperand *indexOpnd = memOpnd.GetIndexRegister(); + if (baseOpnd != nullptr && baseOpnd->GetRegisterNumber() == productOpnd->GetRegisterNumber()) { + return false; + } + if (indexOpnd != nullptr && indexOpnd->GetRegisterNumber() == productOpnd->GetRegisterNumber()) { + return false; + } + break; + } + } + return true; +} + /* Reservation */ Reservation::Reservation(LatencyType t, int l, int n, ...) : type(t), latency(l), unitNum(n) { ASSERT(l >= 0, "CG internal error, latency and unitNum should not be less than 0."); diff --git a/src/mapleall/maple_be/src/be/lower.cpp b/src/mapleall/maple_be/src/be/lower.cpp index 0272858ad8a83e8fc1a340b56deeb0e96ee6dbc6..be90a479cff43691f811ed57ea7b06e17a9b0c7c 100644 --- a/src/mapleall/maple_be/src/be/lower.cpp +++ b/src/mapleall/maple_be/src/be/lower.cpp @@ -1106,19 +1106,16 @@ void CGLowerer::LowerAsmStmt(AsmNode *asmNode, BlockNode *newBlk) { newBlk->AddStatement(asmNode); } -BaseNode *CGLowerer::NeedRetypeWhenLowerCallAssigned(PrimType pType, StmtNode *&beforeStmt) { - if (!IsPrimitiveInteger(pType) || GetPrimTypeBitSize(pType) >= k32BitSize) { - return mirModule.GetMIRBuilder()->CreateExprRegread(pType, -kSregRetval0); - } - auto newPTy = PTY_u32; - RegreadNode *retNode = mirModule.GetMIRBuilder()->CreateExprRegread(newPTy, -kSregRetval0); - auto pregIdx = GetCurrentFunc()->GetPregTab()->CreatePreg(newPTy); - beforeStmt = mirModule.GetMIRBuilder()->CreateStmtRegassign(newPTy, pregIdx, retNode); - RegreadNode *preg = mirModule.GetMIRBuilder()->CreateExprRegread(newPTy, pregIdx); - return mirModule.GetMIRBuilder()->CreateExprTypeCvt(OP_cvt, pType, newPTy, *preg); +BaseNode *CGLowerer::NeedRetypeWhenLowerCallAssigned(PrimType pType) { + BaseNode *retNode = mirModule.GetMIRBuilder()->CreateExprRegread(pType, -kSregRetval0); + if (IsPrimitiveInteger(pType) && GetPrimTypeBitSize(pType) <= k32BitSize) { + auto newPty = IsPrimitiveUnsigned(pType) ? PTY_u64 : PTY_i64; + retNode = mirModule.GetMIRBuilder()->CreateExprTypeCvt(OP_cvt, newPty, pType, *retNode); + } + return retNode; } -DassignNode *CGLowerer::SaveReturnValueInLocal(StIdx stIdx, uint16 fieldID, StmtNode *&beforeStmt) { +DassignNode *CGLowerer::SaveReturnValueInLocal(StIdx stIdx, uint16 fieldID) { MIRSymbol *var; if (stIdx.IsGlobal()) { var = GlobalTables::GetGsymTable().GetSymbolFromStidx(stIdx.Idx()); @@ -1132,7 +1129,7 @@ DassignNode *CGLowerer::SaveReturnValueInLocal(StIdx stIdx, uint16 fieldID, Stmt } else { pType = GlobalTables::GetTypeTable().GetTypeTable().at(var->GetTyIdx())->GetPrimType(); } - auto *regRead = NeedRetypeWhenLowerCallAssigned(pType, beforeStmt); + auto *regRead = NeedRetypeWhenLowerCallAssigned(pType); return mirModule.GetMIRBuilder()->CreateStmtDassign(*var, fieldID, regRead); } @@ -1299,7 +1296,6 @@ BlockNode *CGLowerer::GenBlockNode(StmtNode &newCall, const CallReturnVector &p2 if (!handledAtLowerLevel) { CHECK_FATAL(p2nRets.size() <= 1, "make sure p2nRets size <= 1"); /* Create DassignStmt to save kSregRetval0. */ - StmtNode *beforeDStmt = nullptr; StmtNode *dStmt = nullptr; MIRType *retType = nullptr; if (p2nRets.size() == 1) { @@ -1321,7 +1317,7 @@ BlockNode *CGLowerer::GenBlockNode(StmtNode &newCall, const CallReturnVector &p2 RegFieldPair regFieldPair = p2nRets[0].second; if (!regFieldPair.IsReg()) { uint16 fieldID = static_cast(regFieldPair.GetFieldID()); - DassignNode *dn = SaveReturnValueInLocal(stIdx, fieldID, beforeDStmt); + DassignNode *dn = SaveReturnValueInLocal(stIdx, fieldID); CHECK_FATAL(dn->GetFieldID() == 0, "make sure dn's fieldID return 0"); LowerDassign(*dn, *blk); CHECK_FATAL(&newCall == blk->GetLast() || newCall.GetNext() == blk->GetLast(), ""); @@ -1332,7 +1328,7 @@ BlockNode *CGLowerer::GenBlockNode(StmtNode &newCall, const CallReturnVector &p2 MIRPreg *mirPreg = GetCurrentFunc()->GetPregTab()->PregFromPregIdx(pregIdx); bool is64x1vec = beCommon.CallIsOfAttr(FUNCATTR_oneelem_simd, &newCall); PrimType pType = is64x1vec ? PTY_f64 : mirPreg->GetPrimType(); - auto regNode = NeedRetypeWhenLowerCallAssigned(pType, beforeDStmt); + auto regNode = NeedRetypeWhenLowerCallAssigned(pType); RegassignNode *regAssign; if (is64x1vec && IsPrimitiveInteger(mirPreg->GetPrimType())) { // not f64 MIRType *to; @@ -1371,9 +1367,6 @@ BlockNode *CGLowerer::GenBlockNode(StmtNode &newCall, const CallReturnVector &p2 LowerCallStmt(newCall, dStmt, *blk, retType, uselvar, opcode == OP_intrinsiccallassigned); if (!uselvar && dStmt != nullptr) { dStmt->SetSrcPos(newCall.GetSrcPos()); - if (beforeDStmt != nullptr) { - blk->AddStatement(beforeDStmt); - } blk->AddStatement(dStmt); } } @@ -1919,7 +1912,7 @@ void CGLowerer::LowerAssertBoundary(StmtNode &stmt, BlockNode &block, BlockNode beCommon.AddNewTypeAfterBecommon(oldTypeTableSize, newTypeTableSize); } StmtNode *callPrintf = mirBuilder->CreateStmtCall(printf->GetPuidx(), argsPrintf); - UnaryStmtNode *abortModeNode = mirBuilder->CreateStmtUnary(OP_abort, nullptr); + auto *abortModeNode = mirBuilder->CreateStmtNary(OP_abort, nullptr); brFalseNode->SetSrcPos(stmt.GetSrcPos()); labelBC->SetSrcPos(stmt.GetSrcPos()); @@ -3810,18 +3803,24 @@ BaseNode *CGLowerer::LowerIntrinsicop(const BaseNode &parent, IntrinsicopNode &i } if (intrnID == INTRN_C_constant_p) { BaseNode *opnd = intrinNode.Opnd(0); - int64 val = (opnd->op == OP_constval || opnd->op == OP_sizeoftype || - opnd->op == OP_conststr || opnd->op == OP_conststr16) ? 1 : 0; + PrimType pType = opnd->GetPrimType(); + int64 val = ((opnd->op == OP_constval && pType != PTY_a64 && pType != PTY_a32 && pType != PTY_ptr) || + opnd->op == OP_sizeoftype || opnd->op == OP_conststr || opnd->op == OP_conststr16) ? 1 : 0; return mirModule.GetMIRBuilder()->CreateIntConst(static_cast(val), PTY_i32); } if (intrnID == INTRN_C___builtin_expect) { return intrinNode.Opnd(0); } + if (intrnID == INTRN_C_alloca_with_align) { + GetCurrentFunc()->SetVlaOrAlloca(true); + return &intrinNode; + } if (intrinDesc.IsVectorOp() || intrinDesc.IsAtomic()) { return &intrinNode; } - if (intrnID == INTRN_C___tls_get_tbss_anchor || intrnID == INTRN_C___tls_get_tdata_anchor) { + if (intrnID == INTRN_C___tls_get_tbss_anchor || intrnID == INTRN_C___tls_get_tdata_anchor || + intrnID == INTRN_C___tls_get_thread_pointer) { return &intrinNode; } @@ -4445,6 +4444,130 @@ void CGLowerer::BuildLabel2FreqMap() { } } +BaseNode *CGLowerer::LowerImplicitCvt(PrimType toType, BaseNode &expr) { + switch (expr.GetOpCode()) { + case OP_le: + case OP_ge: + case OP_gt: + case OP_lt: + case OP_ne: + case OP_eq: + case OP_cmp: + case OP_cmpl: + case OP_cmpg: { // cmp OP + auto &cmpNode = static_cast(expr); + cmpNode.SetBOpnd(LowerImplicitCvt(cmpNode.GetOpndType(), *cmpNode.GetBOpnd(kFirstOpnd)), kFirstOpnd); + cmpNode.SetBOpnd(LowerImplicitCvt(cmpNode.GetOpndType(), *cmpNode.GetBOpnd(kSecondOpnd)), kSecondOpnd); + break; + } + case OP_ceil: + case OP_floor: + case OP_retype: + case OP_cvt: + case OP_round: + case OP_trunc: { // cvt OP + auto &cvtNode = static_cast(expr); + cvtNode.SetOpnd(LowerImplicitCvt(cvtNode.FromType(), *cvtNode.Opnd(kFirstOpnd)), kFirstOpnd); + break; + } + case OP_ashr: + case OP_lshr: + case OP_shl: + case OP_ror: { // shift OP, only first opnd has implicit cvt + auto &shiftNode = static_cast(expr); + shiftNode.SetBOpnd(LowerImplicitCvt(shiftNode.GetPrimType(), *shiftNode.GetBOpnd(kFirstOpnd)), kFirstOpnd); + break; + } + case OP_iread: + case OP_ireadoff: + case OP_CG_array_elem_add: + case OP_sext: + case OP_zext: + case OP_extractbits: + case OP_depositbits: + case OP_intrinsicop: { + for (size_t i = 0; i < expr.NumOpnds(); ++i) { + expr.SetOpnd(LowerImplicitCvt(expr.Opnd(i)->GetPrimType(), *expr.Opnd(i)), i); + } + break; + } + case OP_dread: + case OP_regread: + case OP_ireadfpoff: + case OP_addrof: + case OP_addrofoff: + case OP_addroffunc: + case OP_addroflabel: + case OP_constval: + case OP_conststr: + case OP_conststr16: { // leaf OP, no expr + break; + } + case OP_select: { // only second/third has implicit cvt + expr.SetOpnd(LowerImplicitCvt(expr.GetPrimType(), *expr.Opnd(kSecondOpnd)), kSecondOpnd); + expr.SetOpnd(LowerImplicitCvt(expr.GetPrimType(), *expr.Opnd(kThirdOpnd)), kThirdOpnd); + break; + } + case OP_add: + case OP_mul: + case OP_div: + case OP_rem: + case OP_sub: + case OP_band: + case OP_bior: + case OP_bxor: + case OP_abs: + case OP_bnot: + case OP_lnot: + case OP_land: + case OP_lior: + case OP_min: + case OP_max: + case OP_neg: + case OP_recip: + case OP_sqrt: // use default + default: { + for (size_t i = 0; i < expr.NumOpnds(); ++i) { + expr.SetOpnd(LowerImplicitCvt(expr.GetPrimType(), *expr.Opnd(i)), i); + } + break; + } + } + + auto *newExpr = &expr; + if (IsPrimitiveInteger(toType) && IsPrimitiveInteger(newExpr->GetPrimType()) && + GetPrimTypeBitSize(toType) > GetPrimTypeBitSize(newExpr->GetPrimType())) { + newExpr = mirModule.GetMIRBuilder()->CreateExprTypeCvt(OP_cvt, toType, newExpr->GetPrimType(), expr); + if (CGOptions::GetInstance().GetOptimizeLevel() >= CGOptions::kLevel2) { + auto *simplified = MapleCastOpt::SimplifyCast(*mirBuilder, newExpr); + newExpr = (simplified != nullptr ? simplified : newExpr); + } + } + return newExpr; +} + +void CGLowerer::LowerImplicitCvt(BlockNode &block) { + for (auto *stmt = block.GetFirst(); stmt != nullptr; stmt = stmt->GetNext()) { + switch (stmt->GetOpCode()) { + case OP_block: { + LowerImplicitCvt(static_cast(*stmt)); + break; + } + case OP_regassign: { + auto ®assign = static_cast(*stmt); + regassign.SetOpnd(LowerImplicitCvt(regassign.GetPrimType(), *regassign.Opnd(kFirstOpnd)), kFirstOpnd); + break; + } + default: { + for (size_t i = 0; i < stmt->NumOpnds(); ++i) { + stmt->SetOpnd(LowerImplicitCvt(stmt->Opnd(i)->GetPrimType(), *stmt->Opnd(i)), i); + } + break; + } + } + } +} + void CGLowerer::LowerFunc(MIRFunction &func) { labelIdx = 0; SetCurrentFunc(&func); @@ -4472,6 +4595,8 @@ void CGLowerer::LowerFunc(MIRFunction &func) { // We do the simplify work here because now all the intrinsic calls and potential expansion work of memcpy or other // functions are handled well. So we can concentrate to do the replacement work. SimplifyBlock(*newBody); + // There may be implicit conversion to explicit conversion. + LowerImplicitCvt(*func.GetBody()); uint32 newTypeTableSize = GlobalTables::GetTypeTable().GetTypeTableSize(); if (newTypeTableSize != oldTypeTableSize) { beCommon.AddNewTypeAfterBecommon(oldTypeTableSize, newTypeTableSize); diff --git a/src/mapleall/maple_be/src/be/switch_lowerer.cpp b/src/mapleall/maple_be/src/be/switch_lowerer.cpp index 166c5f1ca0bbae9c886f6465bc6b61343522590c..3a71e286c1ec7707d511ed78b70ca5622d6732d0 100644 --- a/src/mapleall/maple_be/src/be/switch_lowerer.cpp +++ b/src/mapleall/maple_be/src/be/switch_lowerer.cpp @@ -219,7 +219,17 @@ BlockNode *SwitchLowerer::BuildCodeForSwitchItems(int32 start, int32 end, bool l if (start > end) { return localBlk; } - CondGotoNode *cGoto = nullptr; + + StmtNode *cGoto = nullptr; + // if a switch only has 2 cases and has no default branch, lower it as a condgoto + if (stmt->GetDefaultLabel() == 0 && switchItems.size() == 2) { + cGoto = BuildCondGotoNode(switchItems[static_cast(start)].first, OP_brtrue, + *BuildCmpNode(OP_eq, static_cast(switchItems[static_cast(start)].first))); + localBlk->AddStatement(cGoto); + cGoto = BuildGotoNode(switchItems[static_cast(end)].first); + localBlk->AddStatement(cGoto); + return localBlk; + } RangeGotoNode *rangeGoto = nullptr; IfStmtNode *ifStmt = nullptr; CompareNode *cmpNode = nullptr; @@ -379,7 +389,7 @@ BlockNode *SwitchLowerer::BuildCodeForSwitchItems(int32 start, int32 end, bool l while ((start <= end) && (switchItems[static_cast(start)].second == 0)) { if ((start == end) && lowBlockNodeChecked && highBlockNodeChecked) { /* can omit the condition */ - cGoto = reinterpret_cast(BuildGotoNode(switchItems[static_cast(start)].first)); + cGoto = BuildGotoNode(switchItems[static_cast(start)].first); } else { cGoto = BuildCondGotoNode(switchItems[static_cast(start)].first, OP_brtrue, *BuildCmpNode(OP_eq, static_cast(switchItems[static_cast(start)].first))); diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_MPISel.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_MPISel.cpp index bf6a7fae858763d96db4a3f34e4c17e18de0adaf..82d0a77a86beaa78bc8cd0522c25cbb95d651f74 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_MPISel.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_MPISel.cpp @@ -287,8 +287,7 @@ RegOperand *AArch64MPIsel::PrepareMemcpyParm(uint64 copySize) { return ®Result; } -void AArch64MPIsel::SelectAggDassign(MirTypeInfo &lhsInfo, MemOperand &symbolMem, Operand &opndRh, - const DassignNode &stmt) { +void AArch64MPIsel::SelectAggDassign(MirTypeInfo &lhsInfo, MemOperand &symbolMem, Operand &opndRh, DassignNode &stmt) { (void)lhsInfo; (void)symbolMem; (void)opndRh; @@ -371,6 +370,10 @@ void AArch64MPIsel::SelectIntrinCall(IntrinsiccallNode &intrinsiccallNode) { if (intrinsic == INTRN_C_stack_save || intrinsic == INTRN_C_stack_restore) { return; } + if (intrinsic == INTRN_C_prefetch) { + SelectCprefetch(intrinsiccallNode); + return; + } CHECK_FATAL_FALSE("Intrinsic %d: %s not implemented by AArch64 isel CG.", intrinsic, GetIntrinsicName(intrinsic)); } @@ -731,6 +734,10 @@ Operand *AArch64MPIsel::SelectCstrrchr(IntrinsicopNode &node, Operand &opnd0, co return nullptr; } +void AArch64MPIsel::SelectCprefetch(IntrinsiccallNode &intrinsiccallNode) { + cgFunc->SelectCprefetch(intrinsiccallNode); +} + Operand *AArch64MPIsel::SelectAbs(UnaryNode &node, Operand &opnd0, const BaseNode &parent) { return cgFunc->SelectAbs(node, opnd0); } diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_aggressive_opt.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_aggressive_opt.cpp index 37c4ca016e03f97057fc785de04a6de165e164a3..1dccd9d306b655b86ff5fd26ecbecffedba19f6a 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_aggressive_opt.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_aggressive_opt.cpp @@ -16,6 +16,7 @@ #include "aarch64_cg.h" namespace maplebe { +// The main process of AArch64CombineRedundantX16Opt void AArch64CombineRedundantX16Opt::Run() { ResetInsnId(); FOR_ALL_BB(bb, &aarFunc) { @@ -30,27 +31,26 @@ void AArch64CombineRedundantX16Opt::Run() { ASSERT(bb->GetFirstInsn() == insn, "invalid pgo counter-insn"); continue; } + // For the following case, useOpnd(x10) is redefined between two x16 definition points, + // so the two x16s cannot be shared, they should be in two segments of combining optimization. + // e.g. + // add x16, x10, #1024 + // ... + // lsl x10, x10, #4 (x10 is redefined) + // ... + // add x16, x10, #1024 if (HasUseOpndReDef(*insn)) { hasUseOpndReDef = true; } bool hasX16Def = HasX16Def(*insn); + // 1. The instruction ends the current segment. if (IsEndOfSegment(*insn, hasX16Def)) { - // End of segment because it is not an add split instruction but def x16, need to clear previous segment infos - if (segmentInfo->segUseInfos->size() > 1) { - FindCommonX16DefInsns(localMp, localAlloc); - CombineRedundantX16DefInsns(*bb); - } - if (hasX16Def) { - if (HasX16Use(*insn)) { - (void)recentX16DefPrevInsns->emplace_back(recentX16DefInsn); - } - recentSplitUseOpnd = GetAddUseOpnd(*insn); - recentX16DefInsn = insn; - } - ClearCurrentSegmentInfos(); + ProcessAtEndOfSegment(*bb, *insn, hasX16Def, localMp, localAlloc); continue; } + // 2. The instruction does not end the current segment, but def x16 for splitting, record def info. if (hasX16Def) { + // Before the instruction, there has instructions that use the old x16 value if (isX16Used) { recentX16DefPrevInsns->clear(); } @@ -61,9 +61,12 @@ void AArch64CombineRedundantX16Opt::Run() { if (!IsUseX16MemInsn(*insn)) { continue; } + // 3. The instruction does not end the current segment, but use x16, then we compute split immediate and + // record use info. ComputeRecentAddImm(); RecordUseX16InsnInfo(*insn, localMp, localAlloc); } + // Process the last segment in bb if (segmentInfo->segUseInfos->size() > 1) { FindCommonX16DefInsns(localMp, localAlloc); CombineRedundantX16DefInsns(*bb); @@ -83,9 +86,25 @@ void AArch64CombineRedundantX16Opt::ResetInsnId() { } } +// We divide instructions that can share x16 value into segments, when the following scenario occurs, +// the current segment ends, its all infos are needed to be cleared, and a new segment is started: +// (1) meet call instruction +// (2) meet special x16 def (not add/mov/movz/movk mops that split immediate) +// (3) meet useOpnd has been redefined +// e.g. +// add x16, x2, #3072 ---- +// ldp x3, x4, [x16, #184] | +// ... | +// add x16, x2, #3072 | +// ldp x3, x4, [x16, #200] ---- =====> the first common segment +// +// add x16, x1, #2048 ---- +// ldp x5, x6, [x16, #8] | +// ... | +// add x16, x1, #2048 | +// ldp x5, x6, [x16, #16] ---- =====> the second common segment bool AArch64CombineRedundantX16Opt::IsEndOfSegment(const Insn &insn, bool hasX16Def) { if (insn.IsCall() || (IsUseX16MemInsn(insn) && (recentSplitUseOpnd == nullptr || isSpecialX16Def))) { - clearX16Def = true; return true; } if (!hasX16Def) { @@ -95,7 +114,7 @@ bool AArch64CombineRedundantX16Opt::IsEndOfSegment(const Insn &insn, bool hasX16 if (curMop != MOP_waddrri12 && curMop != MOP_xaddrri12 && curMop != MOP_waddrri24 && curMop != MOP_xaddrri24 && curMop != MOP_waddrrr && curMop != MOP_xaddrrr && curMop != MOP_wmovri32 && curMop != MOP_xmovri64 && curMop != MOP_wmovkri16 && curMop != MOP_xmovkri16 && curMop != MOP_wmovzri16 && curMop != MOP_xmovzri16) { - clearX16Def = true; + isIrrelevantX16Def = true; return true; } RegOperand *useOpnd = nullptr; @@ -126,9 +145,60 @@ bool AArch64CombineRedundantX16Opt::IsEndOfSegment(const Insn &insn, bool hasX16 hasUseOpndReDef = false; return true; } + // For corner case: + // mov R16, #4097 ----> $recentX16DefInsn that does not have recentSplitUseOpnd + // use R16 (e.g. sub R10, R10, R16) + // add R16, sp, #12288 ----> $curInsn that define x16 + // + // But for the following cases, they are not the end of segment: + // (1) + // mov R16, #4097 ----> $recentX16DefPrevInsns + // add R16, R10, R16 ----> $recentX16DefInsn + // use R16 + // add R16, R10, #12288 ----> $curInsn that define x16 + // (2) + // mov R16, #4097 ----> $recentX16DefInsn that does not have recentSplitUseOpnd + // add R16, R16, #12288 ----> $curInsn that define x16 + if (hasX16Def && recentX16DefInsn != nullptr && + (recentX16DefInsn->GetMachineOpcode() == MOP_wmovri32 || recentX16DefInsn->GetMachineOpcode() == MOP_xmovri64) && + useOpnd != nullptr && useOpnd->GetRegisterNumber() != R16) { + return true; + } return false; } +void AArch64CombineRedundantX16Opt::ProcessAtEndOfSegment(BB &bb, Insn &insn, bool hasX16Def, MemPool *localMp, + MapleAllocator *localAlloc) { + // If the current segment ends, we handle the x16 common optimization for the segment following + if (segmentInfo->segUseInfos->size() > 1) { + FindCommonX16DefInsns(localMp, localAlloc); + CombineRedundantX16DefInsns(bb); + } + std::vector tmpRecentX16DefPrevInsns; + tmpRecentX16DefPrevInsns.assign(recentX16DefPrevInsns->begin(), recentX16DefPrevInsns->end()); + // For the instructions that both use and define x16, we need to record x16 prev define insn + // e.g. + // add x16, sp, #1, LSL #12 ----> $recentX16DefInsn + // add x16, x16, #512 ----> $insn + bool hasX16Use = HasX16Use(insn); + if (hasX16Use) { + (void)tmpRecentX16DefPrevInsns.emplace_back(recentX16DefInsn); + } + // Clear old segment infos + ClearCurrentSegmentInfos(); + // Record new segment infos: + // if the current segment ends and the instruction defines x16 for splitting, we record data infos following + if (hasX16Def && !isIrrelevantX16Def) { + recentSplitUseOpnd = GetAddUseOpnd(insn); + recentX16DefInsn = &insn; + if (hasX16Use) { + recentX16DefPrevInsns->assign(tmpRecentX16DefPrevInsns.begin(), tmpRecentX16DefPrevInsns.end()); + } + } + // Clear isIrrelevantX16Def after using + isIrrelevantX16Def = false; +} + void AArch64CombineRedundantX16Opt::ComputeRecentAddImm() { CHECK_FATAL(recentSplitUseOpnd != nullptr, "invalid srcOpnd"); CHECK_FATAL(recentX16DefInsn != nullptr || !recentX16DefPrevInsns->empty(), "missing x16 def instruction"); @@ -220,13 +290,18 @@ bool AArch64CombineRedundantX16Opt::IsUseX16MemInsn(const Insn &insn) const { } uint32 memOpndIdx = GetMemOperandIdx(insn); auto &memOpnd = static_cast(insn.GetOperand(memOpndIdx)); - if (memOpnd.IsPostIndexed() || memOpnd.IsPreIndexed()) { - return false; - } RegOperand *baseOpnd = memOpnd.GetBaseRegister(); if (baseOpnd == nullptr || baseOpnd->GetRegisterNumber() != R16) { return false; } + // We are not allowed pre-index/post-index memory instruction that use x16 to split offset, because + // it implicitly redefines the x16 and it is difficult to the interval calculation and valid offset judgement, + // so we do not combine x16 in AddSubMergeLdStPattern of cgpostpeephole. + // e.g. + // add x16, sp, #1, LSL #12 + // stp x27, x28, [x16, #16]! --\-> it's wrong case + // If such opportunities still exist after x16 combining optimization, add related opt in this phase. + CHECK_FATAL(!memOpnd.IsPreIndexed() && !memOpnd.IsPostIndexed(), "dangerous insn that implicitly redefines x16"); CHECK_FATAL(memOpnd.GetAddrMode() == MemOperand::kBOI || memOpnd.GetAddrMode() == MemOperand::kLo12Li, "invalid mem instruction which uses x16"); return true; @@ -293,6 +368,10 @@ void AArch64CombineRedundantX16Opt::ComputeValidAddImmInterval(UseX16InsnInfo &x x16UseInfo.maxValidAddImm = x16UseInfo.originalOfst - minValidOfst; } +// Find the common x16 def value for all use x16 instructions in the current segment: +// 1. If the split immediate is same, we can just use the value to combine; +// 2. else, we calculate the valid interval for each use x16 insns and find a valid immediate within the +// interval that meets the multiple requirements for all use x16 insns. void AArch64CombineRedundantX16Opt::FindCommonX16DefInsns(MemPool *tmpMp, MapleAllocator *tmpAlloc) const { if (isSameAddImm) { ProcessSameAddImmCombineInfo(tmpMp, tmpAlloc); @@ -311,6 +390,22 @@ void AArch64CombineRedundantX16Opt::ProcessSameAddImmCombineInfo(MemPool *tmpMp, (void)segmentInfo->segCombineInfos->emplace_back(newCombineInfo); } +// The interval algorithm to find a valid common split immediate. +// 1. |______| |______| |______| +// interval disjoint, no common immediate; +// 2. |______| +// |______| +// |______| +// Ideally, there shares the same immediate; +// 3. |______| |______| +// |______| |______| +// The first two insns can share one immediate, and the last two insns can share one different immediate; +// 4. |______| (1) +// |______| (2) +// |______| (3) +// (1)(2) share one immediate or (2)(3) share one immediate, we choose the first two +// After the above calculation, we get a valid interval, then we traverse the interval and check whether the +// offset meets the multiple requirement(e.g. /4 or /8 ...) void AArch64CombineRedundantX16Opt::ProcessIntervalIntersectionCombineInfo(MemPool *tmpMp, MapleAllocator *tmpAlloc) const { ASSERT(segmentInfo->segUseInfos != nullptr, "uninitialized useInsnInfos"); @@ -382,6 +477,7 @@ void AArch64CombineRedundantX16Opt::CombineRedundantX16DefInsns(BB &bb) { auto &oldImmOpnd = static_cast(firstInsnInfo->addInsn->GetOperand(kInsnThirdOpnd)); auto &commonAddImmOpnd = aarFunc.CreateImmOperand( combineInfo->combineAddImm, oldImmOpnd.GetSize(), oldImmOpnd.IsSignedValue()); + commonAddImmOpnd.SetVary(oldImmOpnd.GetVary()); uint32 size = combineInfo->addUseOpnd->GetSize(); aarFunc.SelectAddAfterInsnBySize(firstInsnInfo->addInsn->GetOperand(kInsnFirstOpnd), *combineInfo->addUseOpnd, commonAddImmOpnd, size, false, *firstInsnInfo->addInsn); @@ -421,20 +517,43 @@ bool AArch64CombineRedundantX16Opt::HasUseOpndReDef(const Insn &insn) const { return false; } +// 1. For recentX16DefInsn, the mop are in {movri, addrrr, addrri, addrrre} +// 2. For other insn, we need to check every operand of insn bool AArch64CombineRedundantX16Opt::HasX16Use(const Insn &insn) const{ - MOperator mop = insn.GetMachineOpcode(); - if (mop == MOP_wmovri32 || mop == MOP_xmovri64) { - return false; - } else if (mop == MOP_waddrrr || mop == MOP_xaddrrr) { - auto &srcOpnd1 = static_cast(insn.GetOperand(kInsnSecondOpnd)); - auto &srcOpnd2 = static_cast(insn.GetOperand(kInsnThirdOpnd)); - if (srcOpnd1.GetRegisterNumber() == R16 || srcOpnd2.GetRegisterNumber() == R16) { - return true; + uint32 opndNum = insn.GetOperandSize(); + for (uint32 i = 0; i < opndNum; ++i) { + if (!insn.OpndIsUse(i)) { + continue; } - } else { - auto &useOpnd = static_cast(insn.GetOperand(kInsnSecondOpnd)); - if (useOpnd.GetRegisterNumber() == R16) { - return true; + Operand &opnd = insn.GetOperand(i); + switch (opnd.GetKind()) { + case Operand::kOpdRegister: { + if (static_cast(opnd).GetRegisterNumber() == R16) { + return true; + } + break; + } + case Operand::kOpdMem: { + RegOperand *baseOpnd = static_cast(opnd).GetBaseRegister(); + if (baseOpnd != nullptr && baseOpnd->GetRegisterNumber() == R16) { + return true; + } + RegOperand *indexOpnd = static_cast(opnd).GetIndexRegister(); + if (indexOpnd != nullptr && indexOpnd->GetRegisterNumber() == R16) { + return true; + } + break; + } + case Operand::kOpdList: { + for (const auto *opndElem : static_cast(opnd).GetOperands()) { + if (opndElem->GetRegisterNumber() == R16) { + return true; + } + } + break; + } + default: + continue; } } return false; @@ -560,10 +679,10 @@ void AArch64CombineRedundantX16Opt::ClearSegmentInfo(MemPool *tmpMp, MapleAlloca recentSplitUseOpnd = nullptr; recentAddImm = 0; isSameAddImm = true; - clearX16Def = false; isX16Used = false; hasUseOpndReDef = false; isSpecialX16Def = false; + isIrrelevantX16Def = false; } void AArch64AggressiveOpt::DoOpt() { diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_alignment.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_alignment.cpp index 0da32c10ce7869d8886679b932250dfb51144da8..3c2eb99eb9ceabd78d3cdffd9174d12da0a6b49f 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_alignment.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_alignment.cpp @@ -300,7 +300,7 @@ bool AArch64AlignAnalysis::MarkShortBranchSplit() { continue; } auto &labelOpnd = static_cast(insn->GetOperand(kInsnThirdOpnd)); - if (aarFunc->DistanceCheck(*bb, labelOpnd.GetLabelIndex(), insn->GetId())) { + if (aarFunc->DistanceCheck(*bb, labelOpnd.GetLabelIndex(), insn->GetId(), AArch64Abi::kMaxInstrForTbnz)) { continue; } split = true; diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_cfi_generator.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_cfi_generator.cpp index 680cbe3fc81934c2feabe2bdea2ee1a0b3bc5bc1..06a93c898b61b95c0591827c35838aff7d9404cf 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_cfi_generator.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_cfi_generator.cpp @@ -29,8 +29,8 @@ void AArch64GenCfi::GenerateRegisterSaveDirective(BB &bb, Insn &stackDefInsn) { curInsn = bb.InsertInsnAfter(*curInsn, aarchCGFunc.CreateCfiOffsetInsn(stackBaseReg, -cfiOffset, k64BitSize)); } int32 RLROffset = static_cast(cgFunc).GetStoreFP() ? kOffset8MemPos : 0; - curInsn = bb.InsertInsnAfter(*curInsn, aarchCGFunc.CreateCfiOffsetInsn(RLR, static_cast(-cfiOffset + RLROffset), - k64BitSize)); + curInsn = bb.InsertInsnAfter(*curInsn, + aarchCGFunc.CreateCfiOffsetInsn(RLR, static_cast(-cfiOffset + RLROffset), k64BitSize)); /* change CFA register and offset */ if (useFP) { diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp index cf135adbff6a7976f19d13ad4d3d04a11fdfbd2d..a6de5fa0954b35a89fcb3e9a1c37e55caee8aa34 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp @@ -195,6 +195,22 @@ bool IsBlkassignForPush(const BlkassignoffNode &bNode) { return spBased; } +void AArch64CGFunc::SetMemReferenceOfInsn(Insn &insn, BaseNode *baseNode) { + if (baseNode == nullptr) { + return; + } + MIRFunction &mirFunction = GetFunction(); + MemReferenceTable *memRefTable = mirFunction.GetMemReferenceTable(); + // In O0 mode, we do not run the ME, and the referenceTable is nullptr + if (memRefTable == nullptr) { + return; + } + MemDefUsePart &memDefUsePart = memRefTable->GetMemDefUsePart(); + if (memDefUsePart.find(baseNode) != memDefUsePart.end()) { + insn.SetReferenceOsts(memDefUsePart.find(baseNode)->second); + } +} + MIRStructType *AArch64CGFunc::GetLmbcStructArgType(BaseNode &stmt, size_t argNo) const { MIRType *ty = nullptr; if (stmt.GetOpCode() == OP_call) { @@ -317,7 +333,7 @@ MOperator AArch64CGFunc::PickMovInsn(const RegOperand &lhs, const RegOperand &rh } void AArch64CGFunc::SelectLoadAcquire(Operand &dest, PrimType dtype, Operand &src, PrimType stype, - AArch64isa::MemoryOrdering memOrd, bool isDirect) { + AArch64isa::MemoryOrdering memOrd, bool isDirect, BaseNode *baseNode) { ASSERT(src.GetKind() == Operand::kOpdMem, "Just checking"); ASSERT(memOrd != AArch64isa::kMoNone, "Just checking"); @@ -328,7 +344,7 @@ void AArch64CGFunc::SelectLoadAcquire(Operand &dest, PrimType dtype, Operand &sr Operand *newSrc = &src; auto &memOpnd = static_cast(src); OfstOperand *immOpnd = memOpnd.GetOffsetImmediate(); - int32 offset = static_cast(immOpnd->GetOffsetValue()); + auto offset = static_cast(immOpnd->GetOffsetValue()); RegOperand *origBaseReg = memOpnd.GetBaseRegister(); if (offset != 0) { RegOperand &resOpnd = CreateRegisterOperandOfType(PTY_i64); @@ -345,6 +361,8 @@ void AArch64CGFunc::SelectLoadAcquire(Operand &dest, PrimType dtype, Operand &sr /* Check if the right load-acquire instruction is available. */ if (mOp != MOP_undef) { Insn &insn = GetInsnBuilder()->BuildInsn(mOp, dest, *newSrc); + // Set memory reference info of IreadNode + SetMemReferenceOfInsn(insn, baseNode); if (isDirect && GetCG()->GenerateVerboseCG()) { insn.SetComment(key); } @@ -356,6 +374,8 @@ void AArch64CGFunc::SelectLoadAcquire(Operand &dest, PrimType dtype, Operand &sr PrimType itype = (stype == PTY_f32) ? PTY_i32 : PTY_i64; RegOperand ®Opnd = CreateRegisterOperandOfType(itype); Insn &insn = GetInsnBuilder()->BuildInsn(PickLdInsn(ssize, itype, memOrd), regOpnd, *newSrc); + // Set memory reference info of IreadNode + SetMemReferenceOfInsn(insn, baseNode); if (isDirect && GetCG()->GenerateVerboseCG()) { insn.SetComment(key); } @@ -367,6 +387,8 @@ void AArch64CGFunc::SelectLoadAcquire(Operand &dest, PrimType dtype, Operand &sr ASSERT((ssize == k8BitSize) || (ssize == k16BitSize), "Just checking"); PrimType utype = (ssize == k8BitSize) ? PTY_u8 : PTY_u16; Insn &insn = GetInsnBuilder()->BuildInsn(PickLdInsn(ssize, utype, memOrd), dest, *newSrc); + // Set memory reference info of IreadNode + SetMemReferenceOfInsn(insn, baseNode); if (isDirect && GetCG()->GenerateVerboseCG()) { insn.SetComment(key); } @@ -379,16 +401,16 @@ void AArch64CGFunc::SelectLoadAcquire(Operand &dest, PrimType dtype, Operand &sr } void AArch64CGFunc::SelectStoreRelease(Operand &dest, PrimType dtype, Operand &src, PrimType stype, - AArch64isa::MemoryOrdering memOrd, bool isDirect) { + AArch64isa::MemoryOrdering memOrd, bool isDirect, BaseNode *baseNode) { ASSERT(dest.GetKind() == Operand::kOpdMem, "Just checking"); uint32 dsize = isDirect ? dest.GetSize() : GetPrimTypeBitSize(stype); MOperator mOp = PickStInsn(dsize, stype, memOrd); Operand *newDest = &dest; - MemOperand *memOpnd = static_cast(&dest); + auto *memOpnd = static_cast(&dest); OfstOperand *immOpnd = memOpnd->GetOffsetImmediate(); - int32 offset = static_cast(immOpnd->GetOffsetValue()); + auto offset = static_cast(immOpnd->GetOffsetValue()); RegOperand *origBaseReg = memOpnd->GetBaseRegister(); if (offset != 0) { RegOperand &resOpnd = CreateRegisterOperandOfType(PTY_i64); @@ -405,6 +427,8 @@ void AArch64CGFunc::SelectStoreRelease(Operand &dest, PrimType dtype, Operand &s /* Check if the right store-release instruction is available. */ if (mOp != MOP_undef) { Insn &insn = GetInsnBuilder()->BuildInsn(mOp, src, *newDest); + // Set memory reference info of IassignNode + SetMemReferenceOfInsn(insn, baseNode); if (isDirect && GetCG()->GenerateVerboseCG()) { insn.SetComment(key); } @@ -418,6 +442,8 @@ void AArch64CGFunc::SelectStoreRelease(Operand &dest, PrimType dtype, Operand &s mOp = (stype == PTY_f32) ? MOP_xvmovrs : MOP_xvmovrd; GetCurBB()->AppendInsn(GetInsnBuilder()->BuildInsn(mOp, regOpnd, src)); Insn &insn = GetInsnBuilder()->BuildInsn(PickStInsn(dsize, itype, memOrd), regOpnd, *newDest); + // Set memory reference info of IassignNode + SetMemReferenceOfInsn(insn, baseNode); if (isDirect && GetCG()->GenerateVerboseCG()) { insn.SetComment(key); } @@ -574,7 +600,7 @@ std::string AArch64CGFunc::GenerateMemOpndVerbose(const Operand &src) const { } void AArch64CGFunc::SelectCopyMemOpnd(Operand &dest, PrimType dtype, uint32 dsize, - Operand &src, PrimType stype) { + Operand &src, PrimType stype, BaseNode *baseNode) { AArch64isa::MemoryOrdering memOrd = AArch64isa::kMoNone; const MIRSymbol *sym = static_cast(&src)->GetSymbol(); if ((sym != nullptr) && (sym->GetStorageClass() == kScGlobal) && sym->GetAttr(ATTR_memory_order_acquire)) { @@ -582,7 +608,7 @@ void AArch64CGFunc::SelectCopyMemOpnd(Operand &dest, PrimType dtype, uint32 dsiz } if (memOrd != AArch64isa::kMoNone) { - AArch64CGFunc::SelectLoadAcquire(dest, dtype, src, stype, memOrd, true); + AArch64CGFunc::SelectLoadAcquire(dest, dtype, src, stype, memOrd, true, baseNode); return; } Insn *insn = nullptr; @@ -608,6 +634,9 @@ void AArch64CGFunc::SelectCopyMemOpnd(Operand &dest, PrimType dtype, uint32 dsiz } } + ASSERT_NOT_NULL(insn); + // Set memory reference info + SetMemReferenceOfInsn(*insn, baseNode); if (GetCG()->GenerateVerboseCG()) { insn->SetComment(GenerateMemOpndVerbose(src)); } @@ -720,8 +749,8 @@ void AArch64CGFunc::SplitMovImmOpndInstruction(int64 immVal, RegOperand &destReg } } -void AArch64CGFunc::SelectCopyRegOpnd(Operand &dest, PrimType dtype, Operand::OperandType opndType, - uint32 dsize, Operand &src, PrimType stype) { +void AArch64CGFunc::SelectCopyRegOpnd(Operand &dest, PrimType dtype, Operand::OperandType opndType, uint32 dsize, + Operand &src, PrimType stype, BaseNode *baseNode) { if (opndType != Operand::kOpdMem) { if (!CGOptions::IsArm64ilp32()) { ASSERT(stype != PTY_a32, ""); @@ -736,36 +765,34 @@ void AArch64CGFunc::SelectCopyRegOpnd(Operand &dest, PrimType dtype, Operand::Op } if (memOrd != AArch64isa::kMoNone) { - AArch64CGFunc::SelectStoreRelease(dest, dtype, src, stype, memOrd, true); + AArch64CGFunc::SelectStoreRelease(dest, dtype, src, stype, memOrd, true, baseNode); return; } - bool is64Bits = (dest.GetSize() == k64BitSize) ? true : false; MOperator strMop = PickStInsn(dsize, stype); if (!dest.IsMemoryAccessOperand()) { GetCurBB()->AppendInsn(GetInsnBuilder()->BuildInsn(strMop, src, dest)); return; } - MemOperand *memOpnd = static_cast(&dest); + auto *memOpnd = static_cast(&dest); ASSERT(memOpnd != nullptr, "memOpnd should not be nullptr"); - if (memOpnd->GetAddrMode() == MemOperand::kLo12Li) { - GetCurBB()->AppendInsn(GetInsnBuilder()->BuildInsn(strMop, src, dest)); + if (memOpnd->GetAddrMode() == MemOperand::kLo12Li || memOpnd->GetOffsetOperand() == nullptr) { + Insn &storeInsn = GetInsnBuilder()->BuildInsn(strMop, src, dest); + // Set memory reference info + SetMemReferenceOfInsn(storeInsn, baseNode); + GetCurBB()->AppendInsn(storeInsn); return; } - if (memOpnd->GetOffsetOperand() == nullptr) { - GetCurBB()->AppendInsn(GetInsnBuilder()->BuildInsn(strMop, src, dest)); - return; - } - ImmOperand *immOpnd = static_cast(memOpnd->GetOffsetOperand()); + + auto *immOpnd = static_cast(memOpnd->GetOffsetOperand()); ASSERT(immOpnd != nullptr, "immOpnd should not be nullptr"); int64 immVal = immOpnd->GetValue(); bool isIntactIndexed = memOpnd->IsIntactIndexed(); bool isPostIndexed = memOpnd->IsPostIndexed(); bool isPreIndexed = memOpnd->IsPreIndexed(); - ASSERT(!isPostIndexed, "memOpnd should not be post-index type"); - ASSERT(!isPreIndexed, "memOpnd should not be pre-index type"); bool isInRange = false; + bool is64Bits = (dest.GetSize() == k64BitSize); if (!GetMirModule().IsCModule()) { isInRange = IsImmediateValueInRange(strMop, immVal, is64Bits, isIntactIndexed, isPostIndexed, isPreIndexed); } else { @@ -773,13 +800,19 @@ void AArch64CGFunc::SelectCopyRegOpnd(Operand &dest, PrimType dtype, Operand::Op } bool isMopStr = IsStoreMop(strMop); if (isInRange || !isMopStr) { - GetCurBB()->AppendInsn(GetInsnBuilder()->BuildInsn(strMop, src, dest)); + Insn &storeInsn = GetInsnBuilder()->BuildInsn(strMop, src, dest); + // Set memory reference info + SetMemReferenceOfInsn(storeInsn, baseNode); + GetCurBB()->AppendInsn(storeInsn); return; } ASSERT(memOpnd->GetBaseRegister() != nullptr, "nullptr check"); if (isIntactIndexed) { memOpnd = &SplitOffsetWithAddInstruction(*memOpnd, dsize); - GetCurBB()->AppendInsn(GetInsnBuilder()->BuildInsn(strMop, src, *memOpnd)); + Insn &storeInsn = GetInsnBuilder()->BuildInsn(strMop, src, *memOpnd); + // Set memory reference info + SetMemReferenceOfInsn(storeInsn, baseNode); + GetCurBB()->AppendInsn(storeInsn); } else if (isPostIndexed || isPreIndexed) { RegOperand ® = CreateRegisterOperandOfType(PTY_i64); MOperator mopMov = MOP_xmovri64; @@ -789,6 +822,8 @@ void AArch64CGFunc::SelectCopyRegOpnd(Operand &dest, PrimType dtype, Operand::Op CreateImmOperand(0, k32BitSize, false)); CHECK_NULL_FATAL(newDest); Insn &insn1 = GetInsnBuilder()->BuildInsn(strMop, src, *newDest); + // Set memory reference info + SetMemReferenceOfInsn(insn1, baseNode); Insn &insn2 = GetInsnBuilder()->BuildInsn(mopAdd, *newDest->GetBaseRegister(), *newDest->GetBaseRegister(), reg); if (isPostIndexed) { GetCurBB()->AppendInsn(insn1); @@ -801,7 +836,7 @@ void AArch64CGFunc::SelectCopyRegOpnd(Operand &dest, PrimType dtype, Operand::Op } } -void AArch64CGFunc::SelectCopy(Operand &dest, PrimType dtype, Operand &src, PrimType stype) { +void AArch64CGFunc::SelectCopy(Operand &dest, PrimType dtype, Operand &src, PrimType stype, BaseNode *baseNode) { ASSERT(dest.IsRegister() || dest.IsMemoryAccessOperand(), ""); uint32 dsize = GetPrimTypeBitSize(dtype); if (dest.IsRegister()) { @@ -810,12 +845,12 @@ void AArch64CGFunc::SelectCopy(Operand &dest, PrimType dtype, Operand &src, Prim Operand::OperandType opnd0Type = dest.GetKind(); Operand::OperandType opnd1Type = src.GetKind(); ASSERT(((dsize >= src.GetSize()) || (opnd0Type == Operand::kOpdRegister) || (opnd0Type == Operand::kOpdMem)), "NYI"); - ASSERT(((opnd0Type == Operand::kOpdRegister) || (src.GetKind() == Operand::kOpdRegister)), + ASSERT(((opnd0Type == Operand::kOpdRegister) || (opnd1Type == Operand::kOpdRegister)), "either src or dest should be register"); switch (opnd1Type) { case Operand::kOpdMem: - SelectCopyMemOpnd(dest, dtype, dsize, src, stype); + SelectCopyMemOpnd(dest, dtype, dsize, src, stype, baseNode); /* when srcType is PTY_u1, using and 1 to reserve only the 1st bit, clear high bits */ if (stype == PTY_u1) { GetCurBB()->AppendInsn(GetInsnBuilder()->BuildInsn((dsize == k32BitSize) ? MOP_wandrri12 : MOP_xandrri13, @@ -844,12 +879,12 @@ void AArch64CGFunc::SelectCopy(Operand &dest, PrimType dtype, Operand &src, Prim GetCurBB()->AppendInsn(vInsn); break; } - RegOperand &desReg = static_cast(dest); - RegOperand &srcReg = static_cast(src); + auto &desReg = static_cast(dest); + auto &srcReg = static_cast(src); if (desReg.GetRegisterNumber() == srcReg.GetRegisterNumber()) { break; } - SelectCopyRegOpnd(dest, dtype, opnd0Type, dsize, src, stype); + SelectCopyRegOpnd(dest, dtype, opnd0Type, dsize, src, stype, baseNode); break; } default: @@ -924,7 +959,11 @@ bool AArch64CGFunc::IsOperandImmValid(MOperator mOp, Operand *o, uint32 opndIdx) if (md->IsLoadStorePair() || (memOpnd->GetAddrMode() == MemOperand::kBOI)) { flag = md->Verify(testOpnds); } else if (memOpnd->GetAddrMode() == MemOperand::kLo12Li) { - flag = offsetValue == 0; + if (offsetValue == 0) { + flag = md->Verify(testOpnds); + } else { + flag = false; + } } else if (memOpnd->IsPostIndexed() || memOpnd->IsPreIndexed()) { flag = (offsetValue <= static_cast(k256BitSizeInt) && offsetValue >= kNegative256BitSize); } @@ -1080,7 +1119,7 @@ MemOperand &AArch64CGFunc::SplitOffsetWithAddInstruction(const MemOperand &memOp } void AArch64CGFunc::SelectDassign(DassignNode &stmt, Operand &opnd0) { - SelectDassign(stmt.GetStIdx(), stmt.GetFieldID(), stmt.GetRHS()->GetPrimType(), opnd0); + SelectDassign(stmt.GetStIdx(), stmt.GetFieldID(), stmt.GetRHS()->GetPrimType(), opnd0, &stmt); } /* @@ -1126,17 +1165,18 @@ RegOperand *AArch64CGFunc::ExtractNewMemBase(const MemOperand &memOpnd) { * NOTE: I divided SelectDassign so that we can create "virtual" assignments * when selecting other complex Maple IR instructions. For example, the atomic * exchange and other intrinsics will need to assign its results to local - * variables. Such Maple IR instructions are pltform-specific (e.g. + * variables. Such Maple IR instructions are platform-specific (e.g. * atomic_exchange can be implemented as one single machine intruction on x86_64 * and ARMv8.1, but ARMv8.0 needs an LL/SC loop), therefore they cannot (in * principle) be lowered at BELowerer or CGLowerer. */ -void AArch64CGFunc::SelectDassign(StIdx stIdx, FieldID fieldId, PrimType rhsPType, Operand &opnd0) { +void AArch64CGFunc::SelectDassign(const StIdx stIdx, FieldID fieldId, PrimType rhsPType, + Operand &opnd0, DassignNode *stmt) { MIRSymbol *symbol = GetFunction().GetLocalOrGlobalSymbol(stIdx); uint32 offset = 0; bool parmCopy = false; if (fieldId != 0) { - MIRStructType *structType = static_cast(symbol->GetType()); + auto *structType = static_cast(symbol->GetType()); ASSERT(structType != nullptr, "SelectDassign: non-zero fieldID for non-structure"); offset = structType->GetKind() == kTypeClass ? GetBecommon().GetJClassFieldOffset(*structType, fieldId).byteOffset : structType->GetFieldOffsetFromBaseAddr(fieldId).byteOffset; @@ -1149,10 +1189,10 @@ void AArch64CGFunc::SelectDassign(StIdx stIdx, FieldID fieldId, PrimType rhsPTyp IsSignedInteger(type->GetPrimType())); MOperator mOp = MOP_undef; if ((type->GetKind() == kTypeStruct) || (type->GetKind() == kTypeUnion)) { - MIRStructType *structType = static_cast(type); + auto *structType = static_cast(type); type = structType->GetFieldType(fieldId); } else if (type->GetKind() == kTypeClass) { - MIRClassType *classType = static_cast(type); + auto *classType = static_cast(type); type = classType->GetFieldType(fieldId); } @@ -1200,12 +1240,16 @@ void AArch64CGFunc::SelectDassign(StIdx stIdx, FieldID fieldId, PrimType rhsPTyp } else if (memOrd == AArch64isa::kMoNone) { mOp = PickStInsn(GetPrimTypeBitSize(ptyp), ptyp); Insn &insn = GetInsnBuilder()->BuildInsn(mOp, stOpnd, *memOpnd); + // Set memory reference info of DassignNode + if (stmt != nullptr) { + SetMemReferenceOfInsn(insn, stmt); + } if (GetCG()->GenerateVerboseCG()) { insn.SetComment(GenerateMemOpndVerbose(*memOpnd)); } GetCurBB()->AppendInsn(insn); } else { - AArch64CGFunc::SelectStoreRelease(*memOpnd, ptyp, stOpnd, ptyp, memOrd, true); + AArch64CGFunc::SelectStoreRelease(*memOpnd, ptyp, stOpnd, ptyp, memOrd, true, stmt); } } @@ -1226,6 +1270,8 @@ void AArch64CGFunc::SelectDassignoff(DassignoffNode &stmt, Operand &opnd0) { memOpnd = memOpnd->IsOffsetMisaligned(size) ? &ConstraintOffsetToSafeRegion(size, *memOpnd, symbol) : memOpnd; Insn &insn = GetInsnBuilder()->BuildInsn(mOp, stOpnd, *memOpnd); + // Set memory reference info of Dassignoff + SetMemReferenceOfInsn(insn, &stmt); GetCurBB()->AppendInsn(insn); } @@ -1234,7 +1280,7 @@ void AArch64CGFunc::SelectAssertNull(UnaryStmtNode &stmt) { RegOperand &baseReg = LoadIntoRegister(*opnd0, PTY_a64); auto &zwr = GetZeroOpnd(k32BitSize); auto &mem = CreateMemOpnd(baseReg, 0, k32BitSize); - Insn &loadRef = GetInsnBuilder()->BuildInsn(MOP_wldr, zwr, mem); + Insn &loadRef = GetInsnBuilder()->BuildInsn(MOP_assert_nonnull, zwr, mem); loadRef.SetDoNotRemove(true); if (GetCG()->GenerateVerboseCG()) { loadRef.SetComment("null pointer check"); @@ -1293,29 +1339,26 @@ void AArch64CGFunc::SelectAsm(AsmNode &node) { ListOperand *listInputOpnd = CreateListOpnd(*GetFuncScopeAllocator()); ListOperand *listOutputOpnd = CreateListOpnd(*GetFuncScopeAllocator()); ListOperand *listClobber = CreateListOpnd(*GetFuncScopeAllocator()); - ListConstraintOperand *listInConstraint = memPool->New(*GetFuncScopeAllocator()); - ListConstraintOperand *listOutConstraint = memPool->New(*GetFuncScopeAllocator()); - ListConstraintOperand *listInRegPrefix = memPool->New(*GetFuncScopeAllocator()); - ListConstraintOperand *listOutRegPrefix = memPool->New(*GetFuncScopeAllocator()); + auto *listInConstraint = memPool->New(*GetFuncScopeAllocator()); + auto *listOutConstraint = memPool->New(*GetFuncScopeAllocator()); + auto *listInRegPrefix = memPool->New(*GetFuncScopeAllocator()); + auto *listOutRegPrefix = memPool->New(*GetFuncScopeAllocator()); std::list> rPlusOpnd; bool noReplacement = false; if (node.asmString.find('$') == std::string::npos) { - /* no replacements */ + // no replacements noReplacement = true; } - /* input constraints should be processed before OP_asm instruction */ + // input constraints should be processed before OP_asm instruction for (size_t i = 0; i < node.numOpnds; ++i) { - /* process input constraint */ + // process input constraint std::string str = GlobalTables::GetUStrTable().GetStringFromStrIdx(node.inputConstraints[i]); - bool isOutputTempNode = false; - if (str[0] == '+') { - isOutputTempNode = true; - } + bool isOutputTempNode = (str[0] == '+'); listInConstraint->stringList.push_back(static_cast(&CreateStringOperand(str))); - /* process input operands */ + // process input operands switch (node.Opnd(i)->op) { case OP_dread: { - DreadNode &dread = static_cast(*node.Opnd(i)); + auto &dread = static_cast(*node.Opnd(i)); Operand *inOpnd = SelectDread(node, dread); PrimType pType = dread.GetPrimType(); listInputOpnd->PushOpnd(static_cast(*inOpnd)); @@ -1351,7 +1394,7 @@ void AArch64CGFunc::SelectAsm(AsmNode &node) { break; } case OP_ireadoff: { - IreadoffNode *ireadoff = static_cast(node.Opnd(i)); + auto *ireadoff = static_cast(node.Opnd(i)); Operand *inOpnd = SelectIreadoff(node, *ireadoff); listInputOpnd->PushOpnd(static_cast(*inOpnd)); PrimType pType = ireadoff->GetPrimType(); @@ -1363,7 +1406,7 @@ void AArch64CGFunc::SelectAsm(AsmNode &node) { break; } case OP_ireadfpoff: { - IreadFPoffNode *ireadfpoff = static_cast(node.Opnd(i)); + auto *ireadfpoff = static_cast(node.Opnd(i)); Operand *inOpnd = SelectIreadfpoff(node, *ireadfpoff); listInputOpnd->PushOpnd(static_cast(*inOpnd)); PrimType pType = ireadfpoff->GetPrimType(); @@ -1375,7 +1418,7 @@ void AArch64CGFunc::SelectAsm(AsmNode &node) { break; } case OP_iread: { - IreadNode *iread = static_cast(node.Opnd(i)); + auto *iread = static_cast(node.Opnd(i)); Operand *inOpnd = SelectIread(node, *iread); listInputOpnd->PushOpnd(static_cast(*inOpnd)); PrimType pType = iread->GetPrimType(); @@ -1387,7 +1430,7 @@ void AArch64CGFunc::SelectAsm(AsmNode &node) { break; } case OP_add: { - BinaryNode *addNode = static_cast(node.Opnd(i)); + auto *addNode = static_cast(node.Opnd(i)); Operand *inOpnd = SelectAdd(*addNode, *AArchHandleExpr(*addNode, *addNode->Opnd(0)), *AArchHandleExpr(*addNode, *addNode->Opnd(1)), node); listInputOpnd->PushOpnd(static_cast(*inOpnd)); @@ -1409,7 +1452,7 @@ void AArch64CGFunc::SelectAsm(AsmNode &node) { if (str.find("r") != std::string::npos) { bool isSigned = scale < 0; ImmOperand &immOpnd = CreateImmOperand(scale, k64BitSize, isSigned); - /* set default type as a 64 bit reg */ + // set default type as a 64 bit reg PrimType pty = isSigned ? PTY_i64 : PTY_u64; auto &tempReg = static_cast(CreateRegisterOperandOfType(pty)); SelectCopy(tempReg, pty, immOpnd, isSigned ? PTY_i64 : PTY_u64); @@ -1457,14 +1500,14 @@ void AArch64CGFunc::SelectAsm(AsmNode &node) { intrnOpnds.emplace_back(listInConstraint); intrnOpnds.emplace_back(listOutRegPrefix); intrnOpnds.emplace_back(listInRegPrefix); - Insn *asmInsn = &GetInsnBuilder()->BuildInsn(MOP_asm, intrnOpnds); - GetCurBB()->AppendInsn(*asmInsn); + Insn &asmInsn = GetInsnBuilder()->BuildInsn(MOP_asm, intrnOpnds); + GetCurBB()->AppendInsn(asmInsn); - /* process listOutputOpnd */ + // process listOutputOpnd for (size_t i = 0; i < node.asmOutputs.size(); ++i) { bool isOutputTempNode = false; RegOperand *rPOpnd = nullptr; - /* process output constraint */ + // process output constraint std::string str = GlobalTables::GetUStrTable().GetStringFromStrIdx(node.outputConstraints[i]); listOutConstraint->stringList.push_back(static_cast(&CreateStringOperand(str))); @@ -1482,14 +1525,15 @@ void AArch64CGFunc::SelectAsm(AsmNode &node) { if (str.find("Q") != std::string::npos || str.find("m") != std::string::npos) { continue; } - /* process output operands */ + // process output operands StIdx stIdx = node.asmOutputs[i].first; RegFieldPair regFieldPair = node.asmOutputs[i].second; + RegOperand *outOpnd = nullptr; if (regFieldPair.IsReg()) { - PregIdx pregIdx = static_cast(regFieldPair.GetPregIdx()); + auto pregIdx = static_cast(regFieldPair.GetPregIdx()); MIRPreg *mirPreg = mirModule.CurFunction()->GetPregTab()->PregFromPregIdx(pregIdx); - RegOperand *outOpnd = - isOutputTempNode ? rPOpnd : &GetOrCreateVirtualRegisterOperand(GetVirtualRegNOFromPseudoRegIdx(pregIdx)); + outOpnd = (isOutputTempNode ? rPOpnd : + &GetOrCreateVirtualRegisterOperand(GetVirtualRegNOFromPseudoRegIdx(pregIdx))); PrimType srcType = mirPreg->GetPrimType(); PrimType destType = srcType; if (GetPrimTypeBitSize(destType) < k32BitSize) { @@ -1514,7 +1558,6 @@ void AArch64CGFunc::SelectAsm(AsmNode &node) { } CHECK_FATAL(var != nullptr, "var should not be nullptr"); if (!noReplacement || var->GetAsmAttr() != UStrIdx(0)) { - RegOperand *outOpnd = nullptr; PrimType pty = GlobalTables::GetTypeTable().GetTypeTable().at(var->GetTyIdx())->GetPrimType(); if (var->GetAsmAttr() != UStrIdx(0)) { std::string regDesp = GlobalTables::GetUStrTable().GetStringFromStrIdx(var->GetAsmAttr()); @@ -1532,12 +1575,30 @@ void AArch64CGFunc::SelectAsm(AsmNode &node) { } } } + // Because the PrimType is lost after select node, and the RegType of regOperand can not distinguish + // float and vector, we temporarily generate movrr of integer type. + // Unified rectification is required in the future, and support vector and float type. + if (str.size() > 1 && str[0] == '=' && str[1] == 'r' && node.asmString.empty() && + listInputOpnd != nullptr && listInputOpnd->GetOperands().size() > i && outOpnd != nullptr) { + unsigned long idx = 0; + auto iter = listInputOpnd->GetOperands().begin(); + while (iter != listInputOpnd->GetOperands().end() && idx != i) { + ++iter; + ++idx; + } + RegOperand *inOpnd = *iter; + if (inOpnd != nullptr && outOpnd != nullptr && inOpnd->IsOfIntClass() && outOpnd->IsOfIntClass()) { + MOperator mop = (inOpnd->GetSize() == k64BitSize ? MOP_wmovrr : MOP_xmovrr); + Insn &insn = GetInsnBuilder()->BuildInsn(mop, *outOpnd, *inOpnd); + GetCurBB()->AppendInsn(insn); + } + } } if (noReplacement) { return; } - /* process listClobber */ + // process listClobber for (size_t i = 0; i < node.clobberList.size(); ++i) { std::string str = GlobalTables::GetUStrTable().GetStringFromStrIdx(node.clobberList[i]); auto regno = static_cast(static_cast(str[1]) - kZeroAsciiNum); @@ -1572,11 +1633,11 @@ void AArch64CGFunc::SelectAsm(AsmNode &node) { break; } case 'c': { - asmInsn->SetAsmDefCondCode(); + asmInsn.SetAsmDefCondCode(); break; } case 'm': { - asmInsn->SetAsmModMem(); + asmInsn.SetAsmModMem(); break; } default: @@ -1624,13 +1685,14 @@ void AArch64CGFunc::SelectRegassign(RegassignNode &stmt, Operand &opnd0) { /* The subtree should already taken care of the agg type that is in excess of 8 bytes */ rhsType = PTY_i64; } - PrimType dtype = rhsType; - if (GetPrimTypeBitSize(dtype) < k32BitSize) { - ASSERT(IsPrimitiveInteger(dtype), ""); - dtype = IsSignedInteger(dtype) ? PTY_i32 : PTY_u32; - } ASSERT(regOpnd != nullptr, "null ptr check!"); - SelectCopy(*regOpnd, dtype, opnd0, rhsType); + Operand *srcOpnd = &opnd0; + if (GetPrimTypeSize(stmt.GetPrimType()) > GetPrimTypeSize(rhsType) && IsPrimitiveInteger(rhsType)) { + CHECK_FATAL(IsPrimitiveInteger(stmt.GetPrimType()), "NIY"); + srcOpnd = &CreateRegisterOperandOfType(stmt.GetPrimType()); + SelectCvtInt2Int(nullptr, srcOpnd, &opnd0, rhsType, stmt.GetPrimType()); + } + SelectCopy(*regOpnd, stmt.GetPrimType(), *srcOpnd, rhsType, stmt.GetRHS()); if (GetCG()->GenerateVerboseCG()) { if (GetCurBB()->GetLastInsn()) { GetCurBB()->GetLastInsn()->AppendComment(" regassign %" + std::to_string(pregIdx) + "; "); @@ -1645,12 +1707,6 @@ void AArch64CGFunc::SelectRegassign(RegassignNode &stmt, Operand &opnd0) { MIRPreg *preg = GetFunction().GetPregTab()->PregFromPregIdx(pregIdx); uint32 srcBitLength = GetPrimTypeSize(preg->GetPrimType()) * kBitsPerByte; GetCurBB()->AppendInsn(GetInsnBuilder()->BuildInsn(PickStInsn(srcBitLength, stype), *regOpnd, *dest)); - } else if (regOpnd->GetRegisterNumber() == R0 || regOpnd->GetRegisterNumber() == R1) { - Insn &pseudo = GetInsnBuilder()->BuildInsn(MOP_pseudo_ret_int, *regOpnd); - GetCurBB()->AppendInsn(pseudo); - } else if (regOpnd->GetRegisterNumber() >= V0 && regOpnd->GetRegisterNumber() <= V3) { - Insn &pseudo = GetInsnBuilder()->BuildInsn(MOP_pseudo_ret_float, *regOpnd); - GetCurBB()->AppendInsn(pseudo); } } @@ -1742,14 +1798,14 @@ bool AArch64CGFunc::IslhsSizeAligned(uint64 lhsSizeCovered, uint32 newAlignUsed, return false; } -void AArch64CGFunc::SelectAggDassign(const DassignNode &stmt) { +void AArch64CGFunc::SelectAggDassign(DassignNode &stmt) { MIRSymbol *lhsSymbol = GetFunction().GetLocalOrGlobalSymbol(stmt.GetStIdx()); uint32 lhsOffset = 0; MIRType *lhsType = lhsSymbol->GetType(); bool bothUnion = false; uint32 lhsAlign = lhsType->GetAlign(); if (stmt.GetFieldID() != 0) { - MIRStructType *structType = static_cast(lhsSymbol->GetType()); + auto *structType = static_cast(lhsSymbol->GetType()); ASSERT(structType != nullptr, "SelectAggDassign: non-zero fieldID for non-structure"); lhsType = structType->GetFieldType(stmt.GetFieldID()); lhsAlign = structType->GetFieldTypeAlign(stmt.GetFieldID()); @@ -1764,20 +1820,20 @@ void AArch64CGFunc::SelectAggDassign(const DassignNode &stmt) { uint32 alignUsed; uint32 rhsOffset = 0; if (stmt.GetRHS()->GetOpCode() == OP_dread) { - AddrofNode *rhsDread = static_cast(stmt.GetRHS()); + auto *rhsDread = static_cast(stmt.GetRHS()); MIRSymbol *rhsSymbol = GetFunction().GetLocalOrGlobalSymbol(rhsDread->GetStIdx()); MIRType *rhsType = rhsSymbol->GetType(); + rhsAlign = rhsType->GetAlign(); if (rhsDread->GetFieldID() != 0) { - MIRStructType *structType = static_cast(rhsSymbol->GetType()); + auto *structType = static_cast(rhsSymbol->GetType()); ASSERT(structType != nullptr, "SelectAggDassign: non-zero fieldID for non-structure"); - rhsType = structType->GetFieldType(rhsDread->GetFieldID()); + rhsAlign = structType->GetFieldTypeAlign(rhsDread->GetFieldID()); rhsOffset = structType->GetKind() == kTypeClass ? static_cast(GetBecommon().GetJClassFieldOffset(*structType, rhsDread->GetFieldID()).byteOffset) : static_cast(structType->GetFieldOffsetFromBaseAddr(rhsDread->GetFieldID()).byteOffset); bothUnion = bothUnion && (structType->GetKind() == kTypeUnion); } bothUnion = bothUnion && (rhsSymbol == lhsSymbol); - rhsAlign = rhsType->GetAlign(); alignUsed = std::min(lhsAlign, rhsAlign); ASSERT(alignUsed != 0, "expect non-zero"); uint32 copySize = GetAggCopySize(lhsOffset, rhsOffset, alignUsed); @@ -1848,6 +1904,8 @@ void AArch64CGFunc::SelectAggDassign(const DassignNode &stmt) { newLoadInsn = &GetInsnBuilder()->BuildInsn(mOp, result, *rhsMemOpnd); } ASSERT(newLoadInsn != nullptr, "build load instruction failed in SelectAggDassign"); + // Set memory reference info of Dread + SetMemReferenceOfInsn(*newLoadInsn, stmt.GetRHS()); lastLdr = AggtStrLdrInsert(bothUnion, lastLdr, *newLoadInsn); // generate the store ImmOperand &lhsOfstOpnd = CreateImmOperand(static_cast(lhsBaseOffset), k32BitSize, @@ -1872,6 +1930,8 @@ void AArch64CGFunc::SelectAggDassign(const DassignNode &stmt) { newStoreInsn = &GetInsnBuilder()->BuildInsn(mOp, result, *lhsMemOpnd); } ASSERT(newStoreInsn != nullptr, "build store instruction failed in SelectAggDassign"); + // Set memory reference info of Agg Dassign + SetMemReferenceOfInsn(*newStoreInsn, &stmt); lastStr = AggtStrLdrInsert(bothUnion, lastStr, *newStoreInsn); } /* take care of extra content at the end less than the unit */ @@ -1898,7 +1958,10 @@ void AArch64CGFunc::SelectAggDassign(const DassignNode &stmt) { regno_t vRegNO = NewVReg(kRegTyInt, std::max(4u, newAlignUsed)); RegOperand &result = CreateVirtualRegisterOperand(vRegNO); MOperator mOp = PickLdInsn(newAlignUsed * k8BitSize, PTY_u32); - GetCurBB()->AppendInsn(GetInsnBuilder()->BuildInsn(mOp, result, *rhsMemOpnd)); + Insn &loadInsn = GetInsnBuilder()->BuildInsn(mOp, result, *rhsMemOpnd); + // Set memory reference info of Dread + SetMemReferenceOfInsn(loadInsn, stmt.GetRHS()); + GetCurBB()->AppendInsn(loadInsn); // generate the store sym = lhsIsLo12 ? lhsSymbol : nullptr; uint64 lhsOffVal = lhsSizeCovered + static_cast(lhsOffsetVal); @@ -1912,28 +1975,31 @@ void AArch64CGFunc::SelectAggDassign(const DassignNode &stmt) { } lhsMemOpnd = FixLargeMemOpnd(*lhsMemOpnd, newAlignUsed); mOp = PickStInsn(newMemSize, PTY_u32); - GetCurBB()->AppendInsn(GetInsnBuilder()->BuildInsn(mOp, result, *lhsMemOpnd)); + Insn &storeInsn = GetInsnBuilder()->BuildInsn(mOp, result, *lhsMemOpnd); + // Set memory reference info of Agg Dassign + SetMemReferenceOfInsn(storeInsn, &stmt); + GetCurBB()->AppendInsn(storeInsn); lhsSizeCovered += newAlignUsed; } } else if (stmt.GetRHS()->GetOpCode() == OP_iread) { - IreadNode *rhsIread = static_cast(stmt.GetRHS()); - RegOperand *addrOpnd = static_cast(AArchHandleExpr(*rhsIread, *rhsIread->Opnd(0))); + auto *rhsIread = static_cast(stmt.GetRHS()); + auto *addrOpnd = static_cast(AArchHandleExpr(*rhsIread, *rhsIread->Opnd(0))); addrOpnd = &LoadIntoRegister(*addrOpnd, rhsIread->Opnd(0)->GetPrimType()); - MIRPtrType *rhsPointerType = static_cast( + auto *rhsPointerType = static_cast( GlobalTables::GetTypeTable().GetTypeFromTyIdx(rhsIread->GetTyIdx())); MIRType *rhsType = static_cast( GlobalTables::GetTypeTable().GetTypeFromTyIdx(rhsPointerType->GetPointedTyIdx())); bool isRefField = false; + rhsAlign = rhsType->GetAlign(); if (rhsIread->GetFieldID() != 0) { - MIRStructType *rhsStructType = static_cast(rhsType); + auto *rhsStructType = static_cast(rhsType); ASSERT(rhsStructType != nullptr, "SelectAggDassign: non-zero fieldID for non-structure"); - rhsType = rhsStructType->GetFieldType(rhsIread->GetFieldID()); + rhsAlign = rhsStructType->GetFieldTypeAlign(rhsIread->GetFieldID()); rhsOffset = rhsStructType->GetKind() == kTypeClass ? static_cast(GetBecommon().GetJClassFieldOffset(*rhsStructType, rhsIread->GetFieldID()).byteOffset) : static_cast(rhsStructType->GetFieldOffsetFromBaseAddr(rhsIread->GetFieldID()).byteOffset); isRefField = GetBecommon().IsRefField(*rhsStructType, rhsIread->GetFieldID()); } - rhsAlign = rhsType->GetAlign(); alignUsed = std::min(lhsAlign, rhsAlign); ASSERT(alignUsed != 0, "expect non-zero"); uint32 copySize = GetAggCopySize(rhsOffset, lhsOffset, alignUsed); @@ -1969,26 +2035,30 @@ void AArch64CGFunc::SelectAggDassign(const DassignNode &stmt) { regno_t vRegNO = NewVReg(kRegTyInt, std::max(4u, copySize)); RegOperand &result = CreateVirtualRegisterOperand(vRegNO); bool doPair = (!lhsIsLo12 && copySize >= k4BitSize) && ((i + 1) < (lhsSize / copySize)); - Insn *insn = nullptr; + Insn *loadInsn = nullptr; RegOperand *result1 = nullptr; if (doPair) { MOperator mOpLDP = (copySize == k4BitSize) ? MOP_wldp : MOP_xldp; regno_t vRegNO1 = NewVReg(kRegTyInt, std::max(4u, copySize)); result1 = &CreateVirtualRegisterOperand(vRegNO1); rhsMemOpnd = FixLargeMemOpnd(mOpLDP, *rhsMemOpnd, memSize, kInsnThirdOpnd); - insn = &GetInsnBuilder()->BuildInsn(mOpLDP, result, *result1, *rhsMemOpnd); + loadInsn = &GetInsnBuilder()->BuildInsn(mOpLDP, result, *result1, *rhsMemOpnd); } else { MOperator mOp = PickLdInsn(memSize, PTY_u32); rhsMemOpnd = FixLargeMemOpnd(mOp, *rhsMemOpnd, memSize, kInsnSecondOpnd); - insn = &GetInsnBuilder()->BuildInsn(mOp, result, *rhsMemOpnd); + loadInsn = &GetInsnBuilder()->BuildInsn(mOp, result, *rhsMemOpnd); } - insn->MarkAsAccessRefField(isRefField); - GetCurBB()->AppendInsn(*insn); + ASSERT_NOT_NULL(loadInsn); + // Set memory reference info of Iread + SetMemReferenceOfInsn(*loadInsn, stmt.GetRHS()); + loadInsn->MarkAsAccessRefField(isRefField); + GetCurBB()->AppendInsn(*loadInsn); /* generate the store */ MIRSymbol *sym = lhsIsLo12 ? lhsSymbol : nullptr; ImmOperand &lhsOfstOpnd = CreateImmOperand(static_cast(lhsBaseOffset), k32BitSize, false, lhsOffstOpnd->GetVary()); MemOperand *lhsMemOpnd = nullptr; + Insn *storeInsn = nullptr; if (sym) { lhsMemOpnd = CreateMemOperand(memSize, *lhsBaseReg, lhsOfstOpnd, *sym); } else { @@ -1998,13 +2068,17 @@ void AArch64CGFunc::SelectAggDassign(const DassignNode &stmt) { MOperator mOpSTP = (copySize == k4BitSize) ? MOP_wstp : MOP_xstp; lhsMemOpnd = FixLargeMemOpnd(mOpSTP, *lhsMemOpnd, memSize, kInsnThirdOpnd); ASSERT(result1 != nullptr, "result1 should not be nullptr"); - GetCurBB()->AppendInsn(GetInsnBuilder()->BuildInsn(mOpSTP, result, *result1, *lhsMemOpnd)); + storeInsn = &GetInsnBuilder()->BuildInsn(mOpSTP, result, *result1, *lhsMemOpnd); i++; } else { MOperator mOp = PickStInsn(memSize, PTY_u32); lhsMemOpnd = FixLargeMemOpnd(mOp, *lhsMemOpnd, memSize, kInsnSecondOpnd); - GetCurBB()->AppendInsn(GetInsnBuilder()->BuildInsn(mOp, result, *lhsMemOpnd)); + storeInsn = &GetInsnBuilder()->BuildInsn(mOp, result, *lhsMemOpnd); } + ASSERT_NOT_NULL(storeInsn); + // Set memory reference info of Agg Dassign + SetMemReferenceOfInsn(*storeInsn, &stmt); + GetCurBB()->AppendInsn(*storeInsn); } /* take care of extra content at the end less than the unit of alignUsed */ uint64 lhsSizeCovered = (lhsSize / copySize) * copySize; @@ -2016,15 +2090,17 @@ void AArch64CGFunc::SelectAggDassign(const DassignNode &stmt) { } /* generate the load */ uint32 memSize = newAlignUsed * k8BitSize; - int64 rhsOffValWithCover = static_cast(rhsOffset + lhsSizeCovered); + auto rhsOffValWithCover = static_cast(rhsOffset + lhsSizeCovered); ImmOperand &ofstOpnd = CreateImmOperand(rhsOffValWithCover, k32BitSize, false); MemOperand *rhsMemOpnd = CreateMemOperand(memSize, *addrOpnd, ofstOpnd); rhsMemOpnd = FixLargeMemOpnd(*rhsMemOpnd, newAlignUsed); RegOperand &result = CreateVirtualRegisterOperand(NewVReg(kRegTyInt, std::max(4u, newAlignUsed))); MOperator mOp = PickLdInsn(memSize, PTY_u32); - Insn &insn = GetInsnBuilder()->BuildInsn(mOp, result, *rhsMemOpnd); - insn.MarkAsAccessRefField(isRefField); - GetCurBB()->AppendInsn(insn); + Insn &loadInsn = GetInsnBuilder()->BuildInsn(mOp, result, *rhsMemOpnd); + // Set memory reference info of Iread + SetMemReferenceOfInsn(loadInsn, stmt.GetRHS()); + loadInsn.MarkAsAccessRefField(isRefField); + GetCurBB()->AppendInsn(loadInsn); /* generate the store */ MIRSymbol *sym = lhsIsLo12 ? lhsSymbol : nullptr; uint64 immSize = lhsSizeCovered + static_cast(lhsOffsetVal); @@ -2038,7 +2114,10 @@ void AArch64CGFunc::SelectAggDassign(const DassignNode &stmt) { } lhsMemOpnd = FixLargeMemOpnd(*lhsMemOpnd, newAlignUsed); mOp = PickStInsn(memSize, PTY_u32); - GetCurBB()->AppendInsn(GetInsnBuilder()->BuildInsn(mOp, result, *lhsMemOpnd)); + Insn &storeInsn = GetInsnBuilder()->BuildInsn(mOp, result, *lhsMemOpnd); + // Set memory reference info of Agg Dassign + SetMemReferenceOfInsn(storeInsn, &stmt); + GetCurBB()->AppendInsn(storeInsn); lhsSizeCovered += newAlignUsed; } } else { @@ -2061,7 +2140,7 @@ static MIRType *GetPointedToType(const MIRPtrType &pointerType) { void AArch64CGFunc::SelectIassign(IassignNode &stmt) { uint32 offset = 0; - MIRPtrType *pointerType = static_cast(GlobalTables::GetTypeTable().GetTypeFromTyIdx(stmt.GetTyIdx())); + auto *pointerType = static_cast(GlobalTables::GetTypeTable().GetTypeFromTyIdx(stmt.GetTyIdx())); ASSERT(pointerType != nullptr, "expect a pointer type at iassign node"); MIRType *pointedType = nullptr; bool isRefField = false; @@ -2095,9 +2174,8 @@ void AArch64CGFunc::SelectIassign(IassignNode &stmt) { PrimType styp = stmt.GetRHS()->GetPrimType(); Operand *valOpnd = AArchHandleExpr(stmt, *stmt.GetRHS()); - Operand &srcOpnd = - LoadIntoRegister(*valOpnd, - (IsPrimitiveInteger(styp) || IsPrimitiveVectorInteger(styp)), GetPrimTypeBitSize(styp)); + Operand &srcOpnd = LoadIntoRegister(*valOpnd, (IsPrimitiveInteger(styp) || IsPrimitiveVectorInteger(styp)), + GetPrimTypeBitSize(styp)); PrimType destType = pointedType->GetPrimType(); if (destType == PTY_agg) { @@ -2117,9 +2195,9 @@ void AArch64CGFunc::SelectIassign(IassignNode &stmt) { } if (memOrd == AArch64isa::kMoNone) { - SelectCopy(memOpnd, destType, srcOpnd, destType); + SelectCopy(memOpnd, destType, srcOpnd, destType, &stmt); } else { - AArch64CGFunc::SelectStoreRelease(memOpnd, destType, srcOpnd, destType, memOrd, false); + AArch64CGFunc::SelectStoreRelease(memOpnd, destType, srcOpnd, destType, memOrd, false, &stmt); } GetCurBB()->GetLastInsn()->MarkAsAccessRefField(isRefField); } @@ -2134,7 +2212,7 @@ void AArch64CGFunc::SelectIassignoff(IassignoffNode &stmt) { ConstraintOffsetToSafeRegion(dataSize, memOpnd, nullptr) : memOpnd; Operand *valOpnd = AArchHandleExpr(stmt, *stmt.GetBOpnd(1)); Operand &srcOpnd = LoadIntoRegister(*valOpnd, true, GetPrimTypeBitSize(destType)); - SelectCopy(memOpnd, destType, srcOpnd, destType); + SelectCopy(memOpnd, destType, srcOpnd, destType, &stmt); } MemOperand *AArch64CGFunc::GenLmbcFpMemOperand(int32 offset, uint32 byteSize, AArch64reg baseRegno) { @@ -2523,11 +2601,11 @@ void AArch64CGFunc::SelectAggIassign(IassignNode &stmt, Operand &addrOpnd) { Operand &lhsAddrOpnd = LoadIntoRegister(addrOpnd, stmt.Opnd(0)->GetPrimType()); uint32 lhsOffset = 0; MIRType *stmtType = GlobalTables::GetTypeTable().GetTypeFromTyIdx(stmt.GetTyIdx()); - MIRPtrType *lhsPointerType = static_cast(stmtType); + auto *lhsPointerType = static_cast(stmtType); MIRType *lhsType = GlobalTables::GetTypeTable().GetTypeFromTyIdx(lhsPointerType->GetPointedTyIdx()); uint32 lhsAlign = lhsType->GetAlign(); if (stmt.GetFieldID() != 0) { - MIRStructType *structType = static_cast(lhsType); + auto *structType = static_cast(lhsType); ASSERT(structType != nullptr, "SelectAggIassign: non-zero fieldID for non-structure"); lhsType = structType->GetFieldType(stmt.GetFieldID()); lhsAlign = structType->GetFieldTypeAlign(stmt.GetFieldID()); @@ -2562,19 +2640,18 @@ void AArch64CGFunc::SelectAggIassign(IassignNode &stmt, Operand &addrOpnd) { uint32 alignUsed; uint32 rhsOffset = 0; if (stmt.GetRHS()->GetOpCode() == OP_dread) { - AddrofNode *rhsDread = static_cast(stmt.GetRHS()); + auto *rhsDread = static_cast(stmt.GetRHS()); MIRSymbol *rhsSymbol = GetFunction().GetLocalOrGlobalSymbol(rhsDread->GetStIdx()); MIRType *rhsType = rhsSymbol->GetType(); + rhsAlign = rhsType->GetAlign(); if (rhsDread->GetFieldID() != 0) { - MIRStructType *structType = static_cast(rhsSymbol->GetType()); + auto *structType = static_cast(rhsSymbol->GetType()); ASSERT(structType != nullptr, "SelectAggIassign: non-zero fieldID for non-structure"); - rhsType = structType->GetFieldType(rhsDread->GetFieldID()); + rhsAlign = structType->GetFieldTypeAlign(rhsDread->GetFieldID()); rhsOffset = structType->GetKind() == kTypeClass ? static_cast(GetBecommon().GetJClassFieldOffset(*structType, rhsDread->GetFieldID()).byteOffset) : static_cast(structType->GetFieldOffsetFromBaseAddr(rhsDread->GetFieldID()).byteOffset); } - rhsAlign = rhsType->GetAlign(); - alignUsed = std::min(lhsAlign, rhsAlign); ASSERT(alignUsed != 0, "expect non-zero"); uint32 copySize = GetAggCopySize(rhsOffset, lhsOffset, alignUsed); @@ -2624,31 +2701,42 @@ void AArch64CGFunc::SelectAggIassign(IassignNode &stmt, Operand &addrOpnd) { MOperator mOpLDP = (copySize == k4BitSize) ? MOP_wldp : MOP_xldp; bool doPair = (!rhsIsLo12 && (copySize >= k4BitSize) && ((i + 1) < (lhsSize / copySize))); RegOperand *result1 = nullptr; + Insn *loadInsn = nullptr; if (doPair) { regno_t vRegNO1 = NewVReg(kRegTyInt, std::max(4u, copySize)); result1 = &CreateVirtualRegisterOperand(vRegNO1); rhsMemOpnd = FixLargeMemOpnd(mOpLDP, *static_cast(rhsMemOpnd), result.GetSize(), kInsnThirdOpnd); - GetCurBB()->AppendInsn(GetInsnBuilder()->BuildInsn(mOpLDP, result, *result1, *rhsMemOpnd)); + loadInsn = &GetInsnBuilder()->BuildInsn(mOpLDP, result, *result1, *rhsMemOpnd); } else { MOperator mOp = PickLdInsn(memSize, PTY_u32); rhsMemOpnd = FixLargeMemOpnd(mOp, *static_cast(rhsMemOpnd), result.GetSize(), kInsnSecondOpnd); - GetCurBB()->AppendInsn(GetInsnBuilder()->BuildInsn(mOp, result, *rhsMemOpnd)); + loadInsn = &GetInsnBuilder()->BuildInsn(mOp, result, *rhsMemOpnd); } + ASSERT_NOT_NULL(loadInsn); + // Set memory reference info + SetMemReferenceOfInsn(*loadInsn, stmt.GetRHS()); + GetCurBB()->AppendInsn(*loadInsn); /* generate the store */ MemOperand *lhsMemOpnd = nullptr; ImmOperand &ofstOpnd = CreateImmOperand(static_cast(static_cast(lhsBaseOffset)), k32BitSize, false); lhsMemOpnd = CreateMemOperand(memSize, static_cast(lhsAddrOpnd), ofstOpnd); + Insn *storeInsn = nullptr; if (doPair) { MOperator mOpSTP = (copySize == k4BitSize) ? MOP_wstp : MOP_xstp; lhsMemOpnd = FixLargeMemOpnd(mOpSTP, *lhsMemOpnd, result.GetSize(), kInsnThirdOpnd); - GetCurBB()->AppendInsn(GetInsnBuilder()->BuildInsn(mOpSTP, result, *result1, *lhsMemOpnd)); + ASSERT_NOT_NULL(result1); + storeInsn = &GetInsnBuilder()->BuildInsn(mOpSTP, result, *result1, *lhsMemOpnd); i++; } else { MOperator mOp = PickStInsn(memSize, PTY_u32); lhsMemOpnd = FixLargeMemOpnd(mOp, *lhsMemOpnd, memSize, kInsnSecondOpnd); - GetCurBB()->AppendInsn(GetInsnBuilder()->BuildInsn(mOp, result, *lhsMemOpnd)); + storeInsn = &GetInsnBuilder()->BuildInsn(mOp, result, *lhsMemOpnd); } + ASSERT_NOT_NULL(storeInsn); + // Set memory reference info + SetMemReferenceOfInsn(*storeInsn, &stmt); + GetCurBB()->AppendInsn(*storeInsn); } /* take care of extra content at the end less than the unit of alignUsed */ uint64 lhsSizeCovered = (lhsSize / copySize) * copySize; @@ -2673,37 +2761,43 @@ void AArch64CGFunc::SelectAggIassign(IassignNode &stmt, Operand &addrOpnd) { Operand &result = CreateVirtualRegisterOperand(NewVReg(kRegTyInt, std::max(4u, newAlignUsed))); MOperator mOp = PickLdInsn(newMemSize, PTY_u32); rhsMemOpnd = FixLargeMemOpnd(mOp, *rhsMemOpnd, newMemSize, kInsnSecondOpnd); - GetCurBB()->AppendInsn(GetInsnBuilder()->BuildInsn(mOp, result, *rhsMemOpnd)); + Insn &loadInsn = GetInsnBuilder()->BuildInsn(mOp, result, *rhsMemOpnd); + // Set memory reference info + SetMemReferenceOfInsn(loadInsn, stmt.GetRHS()); + GetCurBB()->AppendInsn(loadInsn); /* generate the store */ - int64 lhsOffVal = static_cast(lhsOffset + lhsSizeCovered); + auto lhsOffVal = static_cast(lhsOffset + lhsSizeCovered); MemOperand *lhsMemOpnd = nullptr; ImmOperand &ofstOpnd = CreateImmOperand(lhsOffVal, k32BitSize, false); lhsMemOpnd = CreateMemOperand(newMemSize, static_cast(lhsAddrOpnd), ofstOpnd); mOp = PickStInsn(newMemSize, PTY_u32); lhsMemOpnd = FixLargeMemOpnd(mOp, *lhsMemOpnd, newMemSize, kInsnSecondOpnd); - GetCurBB()->AppendInsn(GetInsnBuilder()->BuildInsn(mOp, result, *lhsMemOpnd)); + Insn &storeInsn = GetInsnBuilder()->BuildInsn(mOp, result, *lhsMemOpnd); + // Set memory reference info + SetMemReferenceOfInsn(storeInsn, &stmt); + GetCurBB()->AppendInsn(storeInsn); lhsSizeCovered += newAlignUsed; } } else { /* rhs is iread */ ASSERT(stmt.GetRHS()->GetOpCode() == OP_iread, "SelectAggDassign: NYI"); - IreadNode *rhsIread = static_cast(stmt.GetRHS()); - RegOperand *rhsAddrOpnd = static_cast(AArchHandleExpr(*rhsIread, *rhsIread->Opnd(0))); + auto *rhsIread = static_cast(stmt.GetRHS()); + auto *rhsAddrOpnd = static_cast(AArchHandleExpr(*rhsIread, *rhsIread->Opnd(0))); rhsAddrOpnd = &LoadIntoRegister(*rhsAddrOpnd, rhsIread->Opnd(0)->GetPrimType()); - MIRPtrType *rhsPointerType = + auto *rhsPointerType = static_cast(GlobalTables::GetTypeTable().GetTypeFromTyIdx(rhsIread->GetTyIdx())); MIRType *rhsType = static_cast( GlobalTables::GetTypeTable().GetTypeFromTyIdx(rhsPointerType->GetPointedTyIdx())); bool isRefField = false; + rhsAlign = rhsType->GetAlign(); if (rhsIread->GetFieldID() != 0) { - MIRStructType *rhsStructType = static_cast(rhsType); + auto *rhsStructType = static_cast(rhsType); ASSERT(rhsStructType, "SelectAggDassign: non-zero fieldID for non-structure"); - rhsType = rhsStructType->GetFieldType(rhsIread->GetFieldID()); + rhsAlign = rhsStructType->GetFieldTypeAlign(rhsIread->GetFieldID()); rhsOffset = rhsStructType->GetKind() == kTypeClass ? static_cast(GetBecommon().GetJClassFieldOffset(*rhsStructType, rhsIread->GetFieldID()).byteOffset) : static_cast(rhsStructType->GetFieldOffsetFromBaseAddr(rhsIread->GetFieldID()).byteOffset); isRefField = GetBecommon().IsRefField(*rhsStructType, rhsIread->GetFieldID()); } - rhsAlign = rhsType->GetAlign(); alignUsed = std::min(lhsAlign, rhsAlign); ASSERT(alignUsed != 0, "expect non-zero"); uint32 copySize = GetAggCopySize(rhsOffset, lhsOffset, alignUsed); @@ -2734,50 +2828,58 @@ void AArch64CGFunc::SelectAggIassign(IassignNode &stmt, Operand &addrOpnd) { rhsMemOpnd = CreateMemOperand(operandSize, *rhsAddrOpnd, rhsOfstOpnd); RegOperand &result = CreateVirtualRegisterOperand(NewVReg(kRegTyInt, std::max(4u, copySize))); bool doPair = ((copySize >= k4BitSize) && ((i + 1) < (lhsSize / copySize))); - Insn *insn = nullptr; + Insn *loadInsn = nullptr; RegOperand *result1 = nullptr; if (doPair) { MOperator mOpLDP = (copySize == k4BitSize) ? MOP_wldp : MOP_xldp; rhsMemOpnd = FixLargeMemOpnd(mOpLDP, *static_cast(rhsMemOpnd), operandSize, kInsnThirdOpnd); result1 = &CreateVirtualRegisterOperand(NewVReg(kRegTyInt, std::max(4u, copySize))); - insn = &GetInsnBuilder()->BuildInsn(mOpLDP, result, *result1, *rhsMemOpnd); + loadInsn = &GetInsnBuilder()->BuildInsn(mOpLDP, result, *result1, *rhsMemOpnd); } else { MOperator mOp = PickLdInsn(operandSize, PTY_u32); rhsMemOpnd = FixLargeMemOpnd(mOp, *static_cast(rhsMemOpnd), operandSize, kInsnSecondOpnd); - insn = &GetInsnBuilder()->BuildInsn(mOp, result, *rhsMemOpnd); + loadInsn = &GetInsnBuilder()->BuildInsn(mOp, result, *rhsMemOpnd); } - insn->MarkAsAccessRefField(isRefField); - GetCurBB()->AppendInsn(*insn); + ASSERT_NOT_NULL(loadInsn); + // Set memory reference info + SetMemReferenceOfInsn(*loadInsn, stmt.GetRHS()); + loadInsn->MarkAsAccessRefField(isRefField); + GetCurBB()->AppendInsn(*loadInsn); /* generate the store */ int64 lhsOffVal = lhsOffset + i * copySize; MemOperand *lhsMemOpnd = nullptr; ImmOperand &lhsOfstOpnd = CreateImmOperand(lhsOffVal, k32BitSize, false); lhsMemOpnd = CreateMemOperand(operandSize, static_cast(lhsAddrOpnd), lhsOfstOpnd); + Insn *storeInsn = nullptr; if (doPair) { MOperator mOpSTP = (copySize == k4BitSize) ? MOP_wstp : MOP_xstp; lhsMemOpnd = FixLargeMemOpnd(mOpSTP, *static_cast(lhsMemOpnd), operandSize, kInsnThirdOpnd); ASSERT(result1 != nullptr, "result1 should not be nullptr"); - GetCurBB()->AppendInsn(GetInsnBuilder()->BuildInsn(mOpSTP, result, *result1, *lhsMemOpnd)); + storeInsn = &GetInsnBuilder()->BuildInsn(mOpSTP, result, *result1, *lhsMemOpnd); i++; } else { MOperator mOp = PickStInsn(operandSize, PTY_u32); lhsMemOpnd = FixLargeMemOpnd(mOp, *static_cast(lhsMemOpnd), operandSize, kInsnSecondOpnd); - GetCurBB()->AppendInsn(GetInsnBuilder()->BuildInsn(mOp, result, *lhsMemOpnd)); + storeInsn = &GetInsnBuilder()->BuildInsn(mOp, result, *lhsMemOpnd); } hasPairOrTwoWords = true; + ASSERT_NOT_NULL(storeInsn); + // Set memory reference info + SetMemReferenceOfInsn(*storeInsn, &stmt); + GetCurBB()->AppendInsn(*storeInsn); } /* take care of extra content at the end less than the unit */ uint64 lhsSizeCovered = (lhsSize / copySize) * copySize; uint32 newAlignUsed = copySize; // Insn can be reduced when lhsSizeNotCovered = 3 | 5 | 6 | 7 // 3: h + b -> w ; 5: w + b -> x ; 6: w + h -> x ; 7: w + h + b -> x - uint32 lhsSizeNotCovered = static_cast(lhsSize - lhsSizeCovered); + auto lhsSizeNotCovered = static_cast(lhsSize - lhsSizeCovered); if (hasPairOrTwoWords && (lhsSizeNotCovered == k3BitSize || ((lhsSizeNotCovered >= k5BitSize) && (lhsSizeNotCovered <= k7BitSize)))) { uint64 ofst = (lhsSizeNotCovered == k3BitSize) ? (lhsSize - k4BitSize) : (lhsSize - k8BitSize); uint32 memOpndSize = (lhsSizeNotCovered == k3BitSize) ? k32BitSize : k64BitSize; regno_t vRegNO = NewVReg(kRegTyInt, (lhsSizeNotCovered == k3BitSize) ? k4BitSize : k8BitSize); - GenLdStForAggIassign(ofst, rhsOffset, lhsOffset, *rhsAddrOpnd, lhsAddrOpnd, memOpndSize, vRegNO, isRefField); + GenLdStForAggIassign(stmt, ofst, rhsOffset, lhsOffset, *rhsAddrOpnd, lhsAddrOpnd, memOpndSize, vRegNO, isRefField); lhsSizeCovered += lhsSizeNotCovered; } while (lhsSizeCovered < lhsSize) { @@ -2787,32 +2889,38 @@ void AArch64CGFunc::SelectAggIassign(IassignNode &stmt, Operand &addrOpnd) { } uint32 memOpndSize = newAlignUsed * k8BitSize; regno_t vRegNO = NewVReg(kRegTyInt, std::max(4u, newAlignUsed)); - GenLdStForAggIassign(lhsSizeCovered, rhsOffset, lhsOffset, *rhsAddrOpnd, lhsAddrOpnd, memOpndSize, vRegNO, + GenLdStForAggIassign(stmt, lhsSizeCovered, rhsOffset, lhsOffset, *rhsAddrOpnd, lhsAddrOpnd, memOpndSize, vRegNO, isRefField); lhsSizeCovered += newAlignUsed; } } } -void AArch64CGFunc::GenLdStForAggIassign(uint64 ofst, uint32 rhsOffset, uint32 lhsOffset, RegOperand &rhsAddrOpnd, - Operand &lhsAddrOpnd, uint32 memOpndSize, regno_t vRegNO, bool isRefField) { +void AArch64CGFunc::GenLdStForAggIassign(IassignNode &stmt, uint64 ofst, uint32 rhsOffset, uint32 lhsOffset, + RegOperand &rhsAddrOpnd, Operand &lhsAddrOpnd, uint32 memOpndSize, + regno_t vRegNO, bool isRefField) { /* generate the load */ - int64 rhsOffValCovered = static_cast(rhsOffset + ofst); + auto rhsOffValCovered = static_cast(rhsOffset + ofst); ImmOperand &rhsOfstOpnd = CreateImmOperand(rhsOffValCovered, k32BitSize, false); MemOperand *rhsMemOpnd = CreateMemOperand(memOpndSize, rhsAddrOpnd, rhsOfstOpnd); RegOperand &result = CreateVirtualRegisterOperand(vRegNO); MOperator mOpLD = PickLdInsn(memOpndSize, PTY_u32); rhsMemOpnd = FixLargeMemOpnd(mOpLD, *rhsMemOpnd, memOpndSize, static_cast(kInsnSecondOpnd)); - Insn &insn = GetInsnBuilder()->BuildInsn(mOpLD, result, *rhsMemOpnd); - insn.MarkAsAccessRefField(isRefField); - GetCurBB()->AppendInsn(insn); + Insn &loadInsn = GetInsnBuilder()->BuildInsn(mOpLD, result, *rhsMemOpnd); + // Set memory reference info + SetMemReferenceOfInsn(loadInsn, stmt.GetRHS()); + loadInsn.MarkAsAccessRefField(isRefField); + GetCurBB()->AppendInsn(loadInsn); /* generate the store */ - int64 lhsOffValWithCover = static_cast(lhsOffset + ofst); + auto lhsOffValWithCover = static_cast(lhsOffset + ofst); ImmOperand &lhsOfstOpnd = CreateImmOperand(lhsOffValWithCover, k32BitSize, false); MemOperand *lhsMemOpnd = CreateMemOperand(memOpndSize, static_cast(lhsAddrOpnd), lhsOfstOpnd); MOperator mOpST = PickStInsn(memOpndSize, PTY_u32); lhsMemOpnd = FixLargeMemOpnd(mOpST, *lhsMemOpnd, memOpndSize, static_cast(kInsnSecondOpnd)); - GetCurBB()->AppendInsn(GetInsnBuilder()->BuildInsn(mOpST, result, *lhsMemOpnd)); + Insn &storeInsn = GetInsnBuilder()->BuildInsn(mOpST, result, *lhsMemOpnd); + // Set memory reference info + SetMemReferenceOfInsn(storeInsn, &stmt); + GetCurBB()->AppendInsn(storeInsn); } void AArch64CGFunc::SelectReturnSendOfStructInRegs(BaseNode *x) { @@ -2876,18 +2984,18 @@ void AArch64CGFunc::SelectReturnSendOfStructInRegs(BaseNode *x) { if (retMatch.GetReg3() != kRinvalid) { generateReturnValToRegs(retMatch.GetReg3(), retMatch.GetPrimTypeOfReg3()); } - - // Create artificial dependency to extend the live range - for (auto *opnd : result) { - auto pseudoMop = (opnd->GetRegisterType() == kRegTyInt) ? MOP_pseudo_ret_int : - MOP_pseudo_ret_float; - Insn &pseudoInsn = GetInsnBuilder()->BuildInsn(pseudoMop, *opnd); - GetCurBB()->AppendInsn(pseudoInsn); - } } Operand *AArch64CGFunc::SelectDread(const BaseNode &parent, DreadNode &expr) { MIRSymbol *symbol = GetFunction().GetLocalOrGlobalSymbol(expr.GetStIdx()); + if (opts::aggressiveTlsLocalDynamicOptMultiThread && + symbol->GetName() == ".tls_start_" + GetMirModule().GetTlsAnchorHashString()) { + RegOperand &result = GetRegOpnd(false, PTY_u64); + RegOperand ® = GetRegOpnd(false, PTY_u64); + StImmOperand &stImm = CreateStImmOperand(*symbol, 0, 0); + GetCurBB()->AppendInsn(GetInsnBuilder()->BuildInsn(MOP_tls_desc_call_warmup, result, reg, stImm)); + return &result; + } if (symbol->IsEhIndex()) { MIRType *type = GlobalTables::GetTypeTable().GetTypeFromTyIdx(static_cast(PTY_i32)); /* use the second register return by __builtin_eh_return(). */ @@ -2903,7 +3011,7 @@ Operand *AArch64CGFunc::SelectDread(const BaseNode &parent, DreadNode &expr) { bool parmCopy = false; auto fieldId = expr.GetFieldID(); if (fieldId != 0) { - MIRStructType *structType = static_cast(symbol->GetType()); + auto *structType = static_cast(symbol->GetType()); ASSERT(structType != nullptr, "SelectDread: non-zero fieldID for non-structure"); symType = structType->GetFieldType(fieldId)->GetPrimType(); offset = structType->GetKind() == kTypeClass ? @@ -2931,7 +3039,7 @@ Operand *AArch64CGFunc::SelectDread(const BaseNode &parent, DreadNode &expr) { Operand &dest = GetZeroOpnd(k64BitSize); if (symbol->GetAttr(ATTR_volatile)) { /* Need to generate loads for the upper parts of the struct. */ - uint32 numLoads = static_cast(RoundUp(aggSize, k64BitSize) / k64BitSize); + auto numLoads = static_cast(RoundUp(aggSize, k64BitSize) / k64BitSize); for (uint32 o = 0; o < numLoads; ++o) { if (parmCopy) { memOpnd = &LoadStructCopyBase(*symbol, offset + o * GetPointerSize(), GetPointerSize()); @@ -2941,7 +3049,7 @@ Operand *AArch64CGFunc::SelectDread(const BaseNode &parent, DreadNode &expr) { if (IsImmediateOffsetOutOfRange(*memOpnd, GetPointerSize())) { memOpnd = &SplitOffsetWithAddInstruction(*memOpnd, GetPointerSize()); } - SelectCopy(dest, PTY_u64, *memOpnd, PTY_u64); + SelectCopy(dest, PTY_u64, *memOpnd, PTY_u64, &expr); } } else { /* No side-effects. No need to generate anything for eval. */ @@ -2973,7 +3081,7 @@ Operand *AArch64CGFunc::SelectDread(const BaseNode &parent, DreadNode &expr) { } memOpnd = memOpnd->IsOffsetMisaligned(dataSize) ? &ConstraintOffsetToSafeRegion(dataSize, *memOpnd, symbol) : memOpnd; - SelectCopy(resOpnd, resultType, *memOpnd, symType); + SelectCopy(resOpnd, resultType, *memOpnd, symType, &expr); return &resOpnd; } @@ -3003,9 +3111,11 @@ RegOperand *AArch64CGFunc::SelectRegread(RegreadNode &expr) { void AArch64CGFunc::SelectAddrof(Operand &result, StImmOperand &stImm, FieldID field) { const MIRSymbol *symbol = stImm.GetSymbol(); - if (symbol->GetName() == ".tbss_start_" + GetMirModule().GetTlsAnchorHashString() || - symbol->GetName() == ".tdata_start_" + GetMirModule().GetTlsAnchorHashString()) { - SelectThreadAnchor(result, stImm); + if ((opts::aggressiveTlsLocalDynamicOpt || opts::aggressiveTlsLocalDynamicOptMultiThread) && + (symbol->GetName() == ".tbss_start_" + GetMirModule().GetTlsAnchorHashString() || + symbol->GetName() == ".tdata_start_" + GetMirModule().GetTlsAnchorHashString() || + symbol->GetName() == ".tls_start_" + GetMirModule().GetTlsAnchorHashString())) { + SelectThreadWarmup(result, stImm); return; } CheckAndSetStackProtectInfoWithAddrof(*symbol); @@ -3098,6 +3208,11 @@ void AArch64CGFunc::SelectAddrof(Operand &result, StImmOperand &stImm, FieldID f } void AArch64CGFunc::SelectThreadAnchor(Operand &result, StImmOperand &stImm) { + auto ® = GetRegOpnd(false, PTY_u64); + GetCurBB()->AppendInsn(GetInsnBuilder()->BuildInsn(MOP_tls_desc_call_warmup, result, reg, stImm)); +} + +void AArch64CGFunc::SelectThreadWarmup(Operand &result, StImmOperand &stImm) { auto &r0opnd = GetOrCreatePhysicalRegisterOperand (R0, k64BitSize, GetRegTyFromPrimTy(PTY_u64)); GetCurBB()->AppendInsn(GetInsnBuilder()->BuildInsn(MOP_tls_desc_call, r0opnd, result, stImm)); SelectCopy(result, PTY_u64, r0opnd, PTY_u64); @@ -3269,10 +3384,11 @@ Operand *AArch64CGFunc::SelectIreadoff(const BaseNode &parent, IreadoffNode &ire auto *result = &CreateRegisterOperandOfType(primType); auto *addrOpnd = AArchHandleExpr(ireadoff, *baseAddr); ASSERT_NOT_NULL(addrOpnd); + Insn *loadInsn = nullptr; if (primType == PTY_agg && parent.GetOpCode() == OP_regassign) { auto &memOpnd = CreateMemOpnd(LoadIntoRegister(*addrOpnd, PTY_a64), offset, bitSize); auto mop = PickLdInsn(64, PTY_a64); - GetCurBB()->AppendInsn(GetInsnBuilder()->BuildInsn(mop, *result, memOpnd)); + loadInsn = &GetInsnBuilder()->BuildInsn(mop, *result, memOpnd); auto ®AssignNode = static_cast(parent); PregIdx pIdx = regAssignNode.GetRegIdx(); CHECK_FATAL(IsSpecialPseudoRegister(pIdx), "SelectIreadfpoff of agg"); @@ -3281,8 +3397,12 @@ Operand *AArch64CGFunc::SelectIreadoff(const BaseNode &parent, IreadoffNode &ire } else { auto &memOpnd = CreateMemOpnd(LoadIntoRegister(*addrOpnd, PTY_a64), offset, bitSize); auto mop = PickLdInsn(bitSize, primType); - GetCurBB()->AppendInsn(GetInsnBuilder()->BuildInsn(mop, *result, memOpnd)); + loadInsn = &GetInsnBuilder()->BuildInsn(mop, *result, memOpnd); } + ASSERT_NOT_NULL(loadInsn); + GetCurBB()->AppendInsn(*loadInsn); + // Set memory reference info of IreadoffNode + SetMemReferenceOfInsn(*loadInsn, &ireadoff); return result; } @@ -3354,7 +3474,7 @@ Operand *AArch64CGFunc::SelectIread(const BaseNode &parent, IreadNode &expr, int extraOffset, PrimType finalBitFieldDestType) { uint32 offset = 0; MIRType *type = GlobalTables::GetTypeTable().GetTypeFromTyIdx(expr.GetTyIdx()); - MIRPtrType *pointerType = static_cast(type); + auto *pointerType = static_cast(type); ASSERT(pointerType != nullptr, "expect a pointer type at iread node"); MIRType *pointedType = nullptr; bool isRefField = false; @@ -3390,11 +3510,9 @@ Operand *AArch64CGFunc::SelectIread(const BaseNode &parent, IreadNode &expr, RegType regType = GetRegTyFromPrimTy(expr.GetPrimType()); uint32 regSize = GetPrimTypeSize(expr.GetPrimType()); if (expr.GetFieldID() == 0 && pointedType->GetPrimType() == PTY_agg) { - /* Maple IR can passing small struct to be loaded into a single register. */ - if (regType == kRegTyFloat) { - /* regsize is correct */ - } else { - uint32 sz = static_cast(pointedType->GetSize()); + /* Maple IR can pass small struct to be loaded into a single register. */ + if (regType != kRegTyFloat) { + auto sz = static_cast(pointedType->GetSize()); regSize = (sz <= k4ByteSize) ? k4ByteSize : k8ByteSize; } } else if (regSize < k4ByteSize) { @@ -3417,7 +3535,7 @@ Operand *AArch64CGFunc::SelectIread(const BaseNode &parent, IreadNode &expr, maple::LogInfo::MapleLogger(kLlErr) << "Warning: objsize is zero! \n"; } else { if (pointedType->IsStructType()) { - MIRStructType *structType = static_cast(pointedType); + auto *structType = static_cast(pointedType); /* size << 3, that is size * 8, change bytes to bits */ bitSize = static_cast(std::min(structType->GetSize(), static_cast(GetPointerSize())) << 3); } else { @@ -3449,9 +3567,8 @@ Operand *AArch64CGFunc::SelectIread(const BaseNode &parent, IreadNode &expr, } } - MemOperand *memOpnd = - CreateMemOpndOrNull(destType, expr, *expr.Opnd(0), - static_cast(static_cast(offset) + extraOffset), memOrd); + MemOperand *memOpnd = CreateMemOpndOrNull(destType, expr, *expr.Opnd(0), + static_cast(static_cast(offset) + extraOffset), memOrd); if (aggParamReg != nullptr) { isAggParamInReg = false; return aggParamReg; @@ -3475,6 +3592,8 @@ Operand *AArch64CGFunc::SelectIread(const BaseNode &parent, IreadNode &expr, memOpnd = &SplitOffsetWithAddInstruction(*memOpnd, bitSize); } Insn &insn = GetInsnBuilder()->BuildInsn(mOp, *result, *memOpnd); + // Set memory reference info of IreadNode + SetMemReferenceOfInsn(insn, &expr); if (parent.GetOpCode() == OP_eval && result->IsRegister() && static_cast(result)->GetRegisterNumber() == RZR) { insn.SetComment("null-check"); @@ -3520,7 +3639,7 @@ Operand *AArch64CGFunc::SelectIread(const BaseNode &parent, IreadNode &expr, if ((memOpnd->GetMemVaryType() == kNotVary) && IsImmediateOffsetOutOfRange(*memOpnd, bitSize)) { memOpnd = &SplitOffsetWithAddInstruction(*memOpnd, bitSize); } - AArch64CGFunc::SelectLoadAcquire(*result, destType, *memOpnd, destType, memOrd, false); + AArch64CGFunc::SelectLoadAcquire(*result, destType, *memOpnd, destType, memOrd, false, &expr); } GetCurBB()->GetLastInsn()->MarkAsAccessRefField(isRefField); return result; @@ -5703,6 +5822,11 @@ RegOperand *AArch64CGFunc::SelectIntrinsicOpLoadTlsAnchor(const IntrinsicopNode& const BaseNode &parent) { auto intrinsicId = intrinsicopNode.GetIntrinsic(); RegOperand &result = GetOrCreateResOperand(parent, PTY_u64); + if (intrinsicId == INTRN_C___tls_get_thread_pointer) { + auto tpidr = &CreateCommentOperand("tpidr_el0"); + GetCurBB()->AppendInsn(GetInsnBuilder()->BuildInsn(MOP_mrs, result, *tpidr)); + return &result; + } if (opts::aggressiveTlsLocalDynamicOpt) { if (intrinsicId == INTRN_C___tls_get_tbss_anchor) { GetCurBB()->AppendInsn(GetInsnBuilder()->BuildInsn(MOP_tlsload_tbss, result)); @@ -5983,30 +6107,12 @@ void AArch64CGFunc::SelectCvtInt2Int(const BaseNode *parent, Operand *&resOpnd, : ((fsize == k8BitSize) ? MOP_xsxtb32 : MOP_xsxth32)); GetCurBB()->AppendInsn(GetInsnBuilder()->BuildInsn(mOp, *resOpnd, *opnd0)); } else { - /* Unsigned */ - if (is64Bit) { - if (fsize == k8BitSize) { - ImmOperand &immOpnd = CreateImmOperand(0xff, k64BitSize, false); - GetCurBB()->AppendInsn(GetInsnBuilder()->BuildInsn(MOP_xandrri13, *resOpnd, *opnd0, immOpnd)); - } else if (fsize == k16BitSize) { - ImmOperand &immOpnd = CreateImmOperand(0xffff, k64BitSize, false); - GetCurBB()->AppendInsn(GetInsnBuilder()->BuildInsn(MOP_xandrri13, *resOpnd, *opnd0, immOpnd)); - } else { - GetCurBB()->AppendInsn(GetInsnBuilder()->BuildInsn(MOP_xuxtw64, *resOpnd, *opnd0)); - } - } else { - ASSERT(((fsize == k8BitSize) || (fsize == k16BitSize)), "incorrect from size"); - if (fsize == k8BitSize) { - static_cast(opnd0)->SetValidBitsNum(k8BitSize); - static_cast(resOpnd)->SetValidBitsNum(k8BitSize); - } - if (fromType == PTY_u1) { - static_cast(opnd0)->SetValidBitsNum(1); - static_cast(resOpnd)->SetValidBitsNum(1); - } - GetCurBB()->AppendInsn(GetInsnBuilder()->BuildInsn( - (fsize == k8BitSize) ? MOP_xuxtb32 : MOP_xuxth32, *resOpnd, *opnd0)); - } + // Unsigned + ASSERT((is64Bit || (fsize == k8BitSize || fsize == k16BitSize)), "incorrect from size"); + MOperator mOp = + (is64Bit ? ((fsize == k8BitSize) ? MOP_xuxtb32 : ((fsize == k16BitSize) ? MOP_xuxth32 : MOP_xuxtw64)) : + ((fsize == k8BitSize) ? MOP_xuxtb32 : MOP_xuxth32)); + GetCurBB()->AppendInsn(GetInsnBuilder()->BuildInsn(mOp, *resOpnd, *opnd0)); } } else { /* Same size or truncate */ #ifdef CNV_OPTIMIZE @@ -6173,8 +6279,19 @@ Operand *AArch64CGFunc::SelectSelect(TernaryNode &node, Operand &opnd0, Operand break; } if (!IsPrimitiveVector(dtype)) { + auto cvtIntOpnd2Int = [this](Operand &opnd, PrimType fromType, PrimType toType) -> Operand& { + if (!IsPrimitiveInteger(fromType) || toType == fromType) { + return opnd; + } + Operand *newOpnd = &CreateRegisterOperandOfType(toType); + SelectCvtInt2Int(nullptr, newOpnd, &opnd, fromType, toType); + return *newOpnd; + }; + + auto &newTrueOpnd = cvtIntOpnd2Int(trueOpnd, node.Opnd(kSecondOpnd)->GetPrimType(), dtype); + auto &newFalseOpnd = cvtIntOpnd2Int(falseOpnd, node.Opnd(kThirdOpnd)->GetPrimType(), dtype); RegOperand &resOpnd = GetOrCreateResOperand(parent, dtype); - SelectSelect(resOpnd, opnd0, trueOpnd, falseOpnd, dtype, ctype, hasCompare, cc); + SelectSelect(resOpnd, opnd0, newTrueOpnd, newFalseOpnd, dtype, ctype, hasCompare, cc); return &resOpnd; } else { return SelectVectorSelect(opnd0, dtype, trueOpnd, falseOpnd); @@ -6242,10 +6359,12 @@ void AArch64CGFunc::SelectRangeGoto(RangeGotoNode &rangeGotoNode, Operand &srcOp RegOperand *addOpnd = &CreateVirtualRegisterOperand(vRegNO); int32 minIdx = switchTable[0].first; - SelectAdd(*addOpnd, opnd0, - CreateImmOperand(-static_cast(minIdx) - static_cast(rangeGotoNode.GetTagOffset()), - GetPrimTypeBitSize(itype), true), - itype); + int64 offset = -static_cast(minIdx) - static_cast(rangeGotoNode.GetTagOffset()); + if (offset == 0) { + SelectCopy(*addOpnd, PTY_u64, opnd0, itype); + } else { + SelectAdd(*addOpnd, opnd0, CreateImmOperand(offset, GetPrimTypeBitSize(itype), true), itype); + } /* contains the index */ if (addOpnd->GetSize() != GetPrimTypeBitSize(PTY_u64)) { @@ -6288,39 +6407,69 @@ Operand *AArch64CGFunc::SelectLoadArrayClassCache(MIRSymbol &st, int64 offset, P return &resOpnd; } -Operand *AArch64CGFunc::SelectAlloca(UnaryNode &node, Operand &opnd0) { +// syntax1: alloca () +// Allocates an object on the stack of the calling function, +// with size in bytes given by . The object is aligned +// on the aarch64 default stack alignment boundary. +// must be positive and not exceed the stack size limit. +// +// syntax2: intrinsicop (, ) +// Similar to alloca, but the object is aligned on alignment +// given by in bits. must be a constant integer +// expression that evaluates to a power of 2 greater than or +// equal to CHAR_BIT and not greater than INT_MAX. +Operand *AArch64CGFunc::DoAlloca(const BaseNode &expr, Operand &opnd0, size_t extraAlignment) { if (!CGOptions::IsArm64ilp32()) { - ASSERT((node.GetPrimType() == PTY_a64), "wrong type"); + ASSERT((expr.GetPrimType() == PTY_a64), "wrong type"); } if (GetCG()->IsLmbc()) { SetHasVLAOrAlloca(true); } - PrimType stype = node.Opnd(0)->GetPrimType(); - Operand *resOpnd = &opnd0; + + Operand *szOpnd = &opnd0; + PrimType stype = expr.Opnd(0)->GetPrimType(); if (GetPrimTypeBitSize(stype) < GetPrimTypeBitSize(PTY_u64)) { - resOpnd = &CreateRegisterOperandOfType(PTY_u64); - SelectCvtInt2Int(nullptr, resOpnd, &opnd0, stype, PTY_u64); + szOpnd = &CreateRegisterOperandOfType(PTY_u64); + SelectCvtInt2Int(nullptr, szOpnd, &opnd0, stype, PTY_u64); } - RegOperand &aliOp = CreateRegisterOperandOfType(PTY_u64); + // compute the alignment + size_t alignment = kAarch64StackPtrAlignment; + if (extraAlignment > kAarch64StackPtrAlignment) { // intrinsicop C_alloca_with_align need extra alignment requirment + alignment = extraAlignment; + } - SelectAdd(aliOp, *resOpnd, CreateImmOperand(kAarch64StackPtrAlignment - 1, k64BitSize, true), PTY_u64); + // compute the object size, the object size must be not less than both size given by and alignment, + // and aligned on kAarch64StackPtrAlignment. + RegOperand &aliOp = CreateRegisterOperandOfType(PTY_u64); + SelectAdd(aliOp, *szOpnd, CreateImmOperand(static_cast(alignment - 1), k64BitSize, true), PTY_u64); Operand &shifOpnd = CreateImmOperand(__builtin_ctz(kAarch64StackPtrAlignment), k64BitSize, true); SelectShift(aliOp, aliOp, shifOpnd, kShiftLright, PTY_u64); SelectShift(aliOp, aliOp, shifOpnd, kShiftLeft, PTY_u64); Operand &spOpnd = GetOrCreatePhysicalRegisterOperand(RSP, k64BitSize, kRegTyInt); SelectSub(spOpnd, spOpnd, aliOp, PTY_u64); + + // adjust the object offset + SelectCopy(aliOp, PTY_u64, spOpnd, PTY_u64); int64 allocaOffset = GetMemlayout()->SizeOfArgsToStackPass(); if (GetCG()->IsLmbc()) { allocaOffset -= kDivide2 * k8ByteSize; } if (allocaOffset > 0) { - RegOperand &resallo = CreateRegisterOperandOfType(PTY_u64); - SelectAdd(resallo, spOpnd, CreateImmOperand(allocaOffset, k64BitSize, true), PTY_u64); - return &resallo; - } else { - return &SelectCopy(spOpnd, PTY_u64, PTY_u64); + SelectAdd(aliOp, aliOp, CreateImmOperand(allocaOffset, k64BitSize, true), PTY_u64); + } + if (alignment > kAarch64StackPtrAlignment) { + SelectAdd(aliOp, aliOp, CreateImmOperand(static_cast(alignment - 1), k64BitSize, true), PTY_u64); + Operand &alignShifOpnd = CreateImmOperand(__builtin_ctz(static_cast(alignment)), k64BitSize, true); + SelectShift(aliOp, aliOp, alignShifOpnd, kShiftLright, PTY_u64); + SelectShift(aliOp, aliOp, alignShifOpnd, kShiftLeft, PTY_u64); } + + return &aliOp; +} + +Operand *AArch64CGFunc::SelectAlloca(UnaryNode &node, Operand &opnd0) { + return DoAlloca(node, opnd0, 0); } Operand *AArch64CGFunc::SelectMalloc(UnaryNode &node, Operand &opnd0) { @@ -8531,6 +8680,16 @@ void AArch64CGFunc::SelectCall(CallNode &callNode) { MIRSymbol *fsym = GetFunction().GetLocalOrGlobalSymbol(fn->GetStIdx(), false); MIRType *retType = fn->GetReturnType(); + // when __builtin_unreachable is called, create a new BB and set it to be unreachable, + // in order to save the previous instructions. + if (GetMirModule().IsCModule() && fsym->GetName() == "__builtin_unreachable") { + BB *nextBB = CreateNewBB(); + GetCurBB()->AppendBB(*nextBB); + SetCurBB(*nextBB); + GetCurBB()->SetUnreachable(true); + return; + } + if (GetCG()->GenerateVerboseCG()) { auto &comment = GetOpndBuilder()->CreateComment(fsym->GetName()); GetCurBB()->AppendInsn(GetInsnBuilder()->BuildCommentInsn(comment)); @@ -8588,6 +8747,8 @@ void AArch64CGFunc::SelectCall(CallNode &callNode) { return; } Insn &callInsn = AppendCall(*fsym, *srcOpnds); + // Set memory reference info of Call + SetMemReferenceOfInsn(callInsn, &callNode); if (callNode.GetMayTailCall()) { callInsn.SetMayTailCall(); } @@ -8604,10 +8765,6 @@ void AArch64CGFunc::SelectCall(CallNode &callNode) { GetFunction().SetHasCall(); if (GetMirModule().IsCModule()) { /* do not mark abort BB in C at present */ - if (fsym->GetName() == "__builtin_unreachable") { - GetCurBB()->ClearInsns(); - GetCurBB()->SetUnreachable(true); - } if (fn->GetAttr(FUNCATTR_noreturn)) { GetCurBB()->SetKind(BB::kBBNoReturn); PushBackNoReturnCallBBsVec(*GetCurBB()); @@ -8639,8 +8796,10 @@ void AArch64CGFunc::SelectIcall(IcallNode &icallNode, Operand &srcOpnd) { fptrOpnd = &SelectCopy(srcOpnd, ty, ty); } ASSERT(fptrOpnd->IsRegister(), "SelectIcall: function pointer not RegOperand"); - RegOperand *regOpnd = static_cast(fptrOpnd); + auto *regOpnd = static_cast(fptrOpnd); Insn &callInsn = GetInsnBuilder()->BuildInsn(MOP_xblr, *regOpnd, *srcOpnds); + // Set memory reference info of Call + SetMemReferenceOfInsn(callInsn, &icallNode); if (icallNode.GetMayTailCall()) { callInsn.SetMayTailCall(); @@ -8814,7 +8973,8 @@ RegOperand &AArch64CGFunc::GetOrCreateSpecialRegisterOperand(PregIdx sregIdx, Pr } uint32 bitSize = GetPrimTypeBitSize(primType); bitSize = bitSize <= k32BitSize ? k32BitSize : bitSize; - return GetOrCreatePhysicalRegisterOperand(pReg, bitSize, GetRegTyFromPrimTy(primType)); + auto &phyOpnd = GetOrCreatePhysicalRegisterOperand(pReg, bitSize, GetRegTyFromPrimTy(primType)); + return SelectCopy(phyOpnd, primType, primType); // most opt only deal vreg, so return a vreg } RegOperand &AArch64CGFunc::GetOrCreatePhysicalRegisterOperand(std::string &asmAttr) { @@ -9536,6 +9696,55 @@ int32 AArch64CGFunc::GetBaseOffset(const SymbolAlloc &symbolAlloc) { return 0; } +void AArch64CGFunc::AddPseudoRetInsns(BB &bb) { + // Generate reg info for return value + AArch64CallConvImpl parmlocator(GetBecommon()); + CCLocInfo retMatch; + // Use returnType of mirFunction. + // If required, do special process for AGG. + parmlocator.LocateRetVal(*GetFunction().GetReturnType(), retMatch); + auto generatePseudoRetInsn = [this, &bb](regno_t regNO, PrimType primType) { + RegType regType = (IsPrimitiveInteger(primType) ? kRegTyInt : kRegTyFloat); + if (CGOptions::IsBigEndian() && regType == kRegTyInt) { + primType = PTY_u64; + } else if (GetPrimTypeSize(primType) <= k4ByteSize) { + primType = (regType == kRegTyInt ? PTY_u32 : PTY_f32); + } + MOperator pseudoMop = (regType == kRegTyInt ? MOP_pseudo_ret_int : MOP_pseudo_ret_float); + RegOperand &phyRetReg = GetOrCreatePhysicalRegisterOperand(static_cast(regNO), + GetPrimTypeBitSize(primType), regType); + Insn &pseudoRetInsn = GetInsnBuilder()->BuildInsn(pseudoMop, phyRetReg); + bb.AppendInsn(pseudoRetInsn); + }; + if (retMatch.GetReg0() != kRinvalid) { + generatePseudoRetInsn(retMatch.GetReg0(), retMatch.GetPrimTypeOfReg0()); + } + if (retMatch.GetReg1() != kRinvalid) { + generatePseudoRetInsn(retMatch.GetReg1(), retMatch.GetPrimTypeOfReg1()); + } + if (retMatch.GetReg2() != kRinvalid) { + generatePseudoRetInsn(retMatch.GetReg2(), retMatch.GetPrimTypeOfReg2()); + } + if (retMatch.GetReg3() != kRinvalid) { + generatePseudoRetInsn(retMatch.GetReg3(), retMatch.GetPrimTypeOfReg3()); + } +} + +// We create pseudo ret insns for extending the live range of return value +void AArch64CGFunc::AddPseudoRetInsnsInExitBBs() { + if (GetExitBBsVec().empty()) { + if (GetCleanupBB() != nullptr && GetCleanupBB()->GetPrev() != nullptr) { + AddPseudoRetInsns(*GetCleanupBB()->GetPrev()); + } else if (!GetMirModule().IsCModule()) { + AddPseudoRetInsns(*GetLastBB()->GetPrev()); + } + return; + } + for (auto *exitBB : GetExitBBsVec()) { + AddPseudoRetInsns(*exitBB); + } +} + void AArch64CGFunc::AppendCall(const MIRSymbol &funcSymbol) { ListOperand *srcOpnds = CreateListOpnd(*GetFuncScopeAllocator()); AppendCall(funcSymbol, *srcOpnds); @@ -9739,17 +9948,6 @@ MemOperand *AArch64CGFunc::GetPseudoRegisterSpillMemoryOperand(PregIdx i) { return memOpnd; } -/* Get the number of return register of current function. */ -AArch64reg AArch64CGFunc::GetReturnRegisterNumber() { - AArch64CallConvImpl retLocator(GetBecommon()); - CCLocInfo retMech; - retLocator.LocateRetVal(*(GetFunction().GetReturnType()), retMech); - if (retMech.GetRegCount() > 0) { - return static_cast(retMech.GetReg0()); - } - return kRinvalid; -} - bool AArch64CGFunc::CanLazyBinding(const Insn &ldrInsn) const { Operand &memOpnd = ldrInsn.GetOperand(1); auto &aarchMemOpnd = static_cast(memOpnd); @@ -10298,11 +10496,7 @@ bool AArch64CGFunc::SelectTLSModelByAttr(Operand &result, StImmOperand &stImm, [ bool AArch64CGFunc::SelectTLSModelByOption(Operand &result, StImmOperand &stImm, bool isShlib) { CGOptions::TLSModel ftlsModel = CGOptions::GetTLSModel(); if (ftlsModel == CGOptions::kLocalExecTLSModel) { // local-exec model has same output with or without PIC - if (stImm.GetSymbol()->GetStorageClass() != kScExtern) { - SelectCTlsLocalDesc(result, stImm); - } else { - SelectCTlsGlobalDesc(result, stImm); - } + SelectCTlsLocalDesc(result, stImm); } else { if (isShlib) { if (ftlsModel == CGOptions::kInitialExecTLSModel) { @@ -10507,6 +10701,12 @@ void AArch64CGFunc::SelectIntrinsicCall(IntrinsiccallNode &intrinsicCallNode) { case INTRN_C___builtin_division_exception: SelectCDIVException(); return; + case INTRN_C_prefetch: + SelectCprefetch(intrinsicCallNode); + return; + case INTRN_C___clear_cache: + SelectCclearCache(intrinsicCallNode); + return; default: break; } @@ -11491,6 +11691,17 @@ Operand *AArch64CGFunc::SelectCReturnAddress(IntrinsicopNode &intrinopNode) { return nullptr; } +Operand *AArch64CGFunc::SelectCAllocaWithAlign(IntrinsicopNode &intrinsicopNode) { + auto &constNode = static_cast(*intrinsicopNode.Opnd(1)); + MIRIntConst *mirIntConst = safe_cast(constNode.GetConstVal()); + size_t alignment = static_cast(mirIntConst->GetExtValue()); + ASSERT((1 << __builtin_ctz(alignment)) == alignment, "wrong opnd2"); + alignment /= kBitsPerByte; // convert bits to bytes + CHECK_FATAL(alignment > 0, "alignment must greater than 0"); + + return DoAlloca(intrinsicopNode, *AArchHandleExpr(intrinsicopNode, *intrinsicopNode.Opnd(0)), alignment); +} + Operand *AArch64CGFunc::SelectCalignup(IntrinsicopNode &intrnNode) { return SelectAArch64align(intrnNode, true); } @@ -11562,6 +11773,60 @@ void AArch64CGFunc::SelectCDIVException() { GetCurBB()->AppendInsn(GetInsnBuilder()->BuildInsn(MOP_brk, immOpnd)); } +// intrinsicop (, ...) +// Prefetch memory, at least one and at most three parameters. +// Implement to asm: prfm prfop, [xn] +// Prfop is the prefetch operation, its value deponds on & , +// the default value of is 0, the default value of is 3. +void AArch64CGFunc::SelectCprefetch(IntrinsiccallNode &intrinsiccallNode) { + MOperator mOp = MOP_prefetch; + std::vector intrnOpnds; + auto opndNum = intrinsiccallNode.NumOpnds(); + constexpr int32 opnd0Default = 0; //0: default value of opnd0 + constexpr int32 opnd1Default = 3; //3: default value of opnd1 + CHECK_FATAL(opndNum >= kOperandNumUnary && opndNum <= kOperandNumTernary, "wrong opndnum"); + + intrnOpnds.emplace_back(AArchHandleExpr(intrinsiccallNode, *intrinsiccallNode.Opnd(kInsnFirstOpnd))); + if (opndNum == kOperandNumUnary) { + intrnOpnds.emplace_back(&CreateImmOperand(opnd0Default, k32BitSize, true)); + intrnOpnds.emplace_back(&CreateImmOperand(opnd1Default, k32BitSize, true)); + } + if (opndNum == kOperandNumBinary) { + intrnOpnds.emplace_back(AArchHandleExpr(intrinsiccallNode, *intrinsiccallNode.Opnd(kInsnSecondOpnd))); + intrnOpnds.emplace_back(&CreateImmOperand(opnd1Default, k32BitSize, true)); + } + if (opndNum == kOperandNumTernary) { + intrnOpnds.emplace_back(AArchHandleExpr(intrinsiccallNode, *intrinsiccallNode.Opnd(kInsnSecondOpnd))); + intrnOpnds.emplace_back(AArchHandleExpr(intrinsiccallNode, *intrinsiccallNode.Opnd(kInsnThirdOpnd))); + } + + GetCurBB()->AppendInsn(GetInsnBuilder()->BuildInsn(mOp, intrnOpnds)); +} + +// intrinsicop (, ) +// Flush the processor's instruction cache for the region of memory. +// In aarch64, it is emitted to a call to the __clear_cache function. +void AArch64CGFunc::SelectCclearCache(IntrinsiccallNode &intrinsiccallNode) { + ListOperand *srcOpnds = CreateListOpnd(*GetFuncScopeAllocator()); + + RegOperand &r0Opnd = GetOrCreatePhysicalRegisterOperand(R0, k64BitSize, kRegTyInt); + Operand *opnd0 = AArchHandleExpr(intrinsiccallNode, *intrinsiccallNode.Opnd(kInsnFirstOpnd)); + SelectCopy(r0Opnd, PTY_ptr, *opnd0, PTY_ptr); + srcOpnds->PushOpnd(r0Opnd); + + RegOperand &r1Opnd = GetOrCreatePhysicalRegisterOperand(R1, k64BitSize, kRegTyInt); + Operand *opnd1 = AArchHandleExpr(intrinsiccallNode, *intrinsiccallNode.Opnd(kInsnSecondOpnd)); + SelectCopy(r1Opnd, PTY_ptr, *opnd1, PTY_ptr); + srcOpnds->PushOpnd(r1Opnd); + + MIRSymbol *callSym = GlobalTables::GetGsymTable().CreateSymbol(kScopeGlobal); + std::string funcName("__clear_cache"); + callSym->SetNameStrIdx(funcName); + callSym->SetStorageClass(kScText); + callSym->SetSKind(kStFunc); + AppendCall(*callSym, *srcOpnds); +} + /* * NOTE: consider moving the following things into aarch64_cg.cpp They may * serve not only inrinsics, but other MapleIR instructions as well. @@ -12668,12 +12933,10 @@ RegOperand *AArch64CGFunc::SelectVectorIntrinsics(const IntrinsicopNode &intrins return result; } -/* - * Check the distance between the first insn of BB with the lable(targ_labidx) - * and the insn with targ_id. If the distance greater than kShortBRDistance - * return false. - */ -bool AArch64CGFunc::DistanceCheck(const BB &bb, LabelIdx targLabIdx, uint32 targId) const { +// Check the distance between the first insn of BB with the lable(targ_labidx) +// and the insn with targ_id. If the distance greater than maxDistance +// return false. +bool AArch64CGFunc::DistanceCheck(const BB &bb, LabelIdx targLabIdx, uint32 targId, uint32 maxDistance) const { for (auto *tBB : bb.GetSuccs()) { if (tBB->GetLabIdx() != targLabIdx) { continue; @@ -12691,7 +12954,7 @@ bool AArch64CGFunc::DistanceCheck(const BB &bb, LabelIdx targLabIdx, uint32 targ } } uint32 tmp = (tInsn->GetId() > targId) ? (tInsn->GetId() - targId) : (targId - tInsn->GetId()); - return (tmp < kShortBRDistance); + return (tmp < maxDistance); } CHECK_FATAL(false, "CFG error"); } @@ -12717,9 +12980,6 @@ void AArch64CGFunc::HandleFuncCfg(CGCFG *cfg) { if (maplebe::CGOptions::IsLazyBinding() && cg->IsLibcore()) { ProcessLazyBinding(); } - if (cg->DoPatchLongBranch()) { - PatchLongBranch(); - } if (maplebe::CGOptions::DoEnableHotColdSplit()) { cfg->CheckCFGFreq(); } diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_data_dep_base.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_data_dep_base.cpp index dc0975d68ea62b242d70203569b3f8ee49745930..7958e6720044046163d0b551e70ac03278170429 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_data_dep_base.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_data_dep_base.cpp @@ -15,14 +15,13 @@ #include "aarch64_cg.h" #include "pressure.h" #include "cg_irbuilder.h" +#include "aarch64_mem_reference.h" #include "aarch64_data_dep_base.h" namespace maplebe { -/* - * It is a yield point if loading from a dedicated - * register holding polling page address: - * ldr wzr, [RYP] - */ +// It is a yield point if loading from a dedicated +// register holding polling page address: +// ldr wzr, [RYP] static bool IsYieldPoint(const Insn &insn) { if (insn.IsLoad() && !insn.IsLoadLabel()) { auto mem = static_cast(insn.GetMemOpnd()); @@ -44,104 +43,16 @@ void AArch64DataDepBase::InitCDGNodeDataInfo(MemPool &mp, MapleAllocator &alloc, cdgNode.InitDataDepInfo(mp, alloc, maxRegNum); } -// Simply distinguish irrelevant stack memory -bool AArch64DataDepBase::NeedBuildDepsForStackMem(const Insn &memInsn1, const Insn &memInsn2) const { - auto *memOpnd1 = static_cast(memInsn1.GetMemOpnd()); - auto *memOpnd2 = static_cast(memInsn2.GetMemOpnd()); - // Not here to consider StImmOperand - if (memOpnd1 == nullptr || memOpnd2 == nullptr) { - return true; - } - - if (memOpnd1->GetAddrMode() != MemOperand::kBOI || memOpnd2->GetAddrMode() != MemOperand::kBOI) { - return true; - } - - RegOperand *baseOpnd1 = memOpnd1->GetBaseRegister(); - RegOperand *baseOpnd2 = memOpnd2->GetBaseRegister(); - if (baseOpnd1 == nullptr || baseOpnd2 == nullptr) { - return true; +Insn *AArch64DataDepBase::GetMemBaseDefInsn(const Insn &memInsn) const { + auto *memOpnd = static_cast(memInsn.GetMemOpnd()); + if (memOpnd == nullptr) { + return nullptr; } - - // Currently, only the stack memory is judged - if (baseOpnd1->GetRegisterNumber() != RSP || baseOpnd2->GetRegisterNumber() != RSP) { - return true; - } - - OfstOperand *ofstOpnd1 = memOpnd1->GetOffsetImmediate(); - OfstOperand *ofstOpnd2 = memOpnd2->GetOffsetImmediate(); - - uint32 memByteSize1 = memInsn1.GetMemoryByteSize(); - uint32 memByteSize2 = memInsn2.GetMemoryByteSize(); - - int64 memByteBoundary1 = ofstOpnd1->GetOffsetValue() + static_cast(memByteSize1); - int64 memByteBoundary2 = ofstOpnd2->GetOffsetValue() + static_cast(memByteSize2); - // no overlap - // sp ofst2 ofst1 ofst2---> - // |________|__memsize2__|_____|___memsize1___|__________ - if (ofstOpnd2->GetOffsetValue() >= memByteBoundary1 || memByteBoundary2 <= ofstOpnd1->GetOffsetValue() || - ofstOpnd1->GetOffsetValue() >= memByteBoundary2 || memByteBoundary1 <= ofstOpnd2->GetOffsetValue()) { - return false; + RegOperand *baseOpnd = memOpnd->GetBaseRegister(); + if (baseOpnd == nullptr) { + return nullptr; } - return true; -} - -// Simply distinguish irrelevant memory between global variable heap memory and stack memory -bool AArch64DataDepBase::NeedBuildDepsForHeapMem(const Insn &memInsn1, const Insn &memInsn2) const { - // Heap insn may not be memory operation, e.g. tls_desc_call, - // we just build the dependency on the register for the instruction clobber. - if (memInsn1.GetMachineOpcode() == MOP_tls_desc_call || memInsn2.GetMachineOpcode() == MOP_tls_desc_call) { - return false; - } - - auto *memOpnd1 = static_cast(memInsn1.GetMemOpnd()); - auto *memOpnd2 = static_cast(memInsn2.GetMemOpnd()); - - MOperator mop1 = memInsn1.GetMachineOpcode(); - MOperator mop2 = memInsn2.GetMachineOpcode(); - // Need not build mem dependency for adrp ? - if (memOpnd1 == nullptr && memOpnd2 == nullptr) { - if (mop1 == MOP_xadrp && mop2 == MOP_xadrp) { - return false; - } - } else if (memOpnd1 == nullptr && mop1 == MOP_xadrp && memOpnd2 != nullptr) { - RegOperand *baseOpnd2 = memOpnd2->GetBaseRegister(); - CHECK_NULL_FATAL(baseOpnd2); - if (baseOpnd2->GetRegisterNumber() == RSP) { - return false; - } - } else if (memOpnd2 == nullptr && mop2 == MOP_xadrp && memOpnd1 != nullptr) { - RegOperand *baseOpnd1 = memOpnd1->GetBaseRegister(); - CHECK_NULL_FATAL(baseOpnd1); - if (baseOpnd1->GetRegisterNumber() == RSP) { - return false; - } - } - - if (memOpnd1 == nullptr || memOpnd2 == nullptr) { - return true; - } - - // BaseRegister may be nullptr - // e.g. - // ldr (opnd0: reg:V34 [F] Sz: [64]) (opnd1: Mem: size:64 isStack:0-0 literal: .LB_HppPacketLossStat3) - RegOperand *baseOpnd1 = memOpnd1->GetBaseRegister(); - RegOperand *baseOpnd2 = memOpnd2->GetBaseRegister(); - if (memOpnd1->GetAddrMode() == MemOperand::kBOI && memOpnd2->GetAddrMode() == MemOperand::kLo12Li) { - Insn *baseDefInsn2 = curCDGNode->GetLatestDefInsn(baseOpnd2->GetRegisterNumber()); - if (baseOpnd1 != nullptr && (baseOpnd1->GetRegisterNumber() == RSP || baseOpnd1->GetRegisterNumber() == RFP) && - baseDefInsn2 != nullptr && baseDefInsn2->GetMachineOpcode() == MOP_xadrp) { - return false; - } - } else if (memOpnd2->GetAddrMode() == MemOperand::kBOI && memOpnd1->GetAddrMode() == MemOperand::kLo12Li) { - Insn *baseDefInsn1 = curCDGNode->GetLatestDefInsn(baseOpnd1->GetRegisterNumber()); - if (baseOpnd2 != nullptr && (baseOpnd2->GetRegisterNumber() == RSP || baseOpnd2->GetRegisterNumber() == RFP) && - baseDefInsn1 != nullptr && baseDefInsn1->GetMachineOpcode() == MOP_xadrp) { - return false; - } - } - - return true; + return curCDGNode->GetLatestDefInsn(baseOpnd->GetRegisterNumber()); } void AArch64DataDepBase::BuildDepsForMemDefCommon(Insn &insn, CDGNode &cdgNode) { @@ -150,7 +61,8 @@ void AArch64DataDepBase::BuildDepsForMemDefCommon(Insn &insn, CDGNode &cdgNode) MapleVector &stackUses = cdgNode.GetStackUseInsns(); for (auto *stackUse : stackUses) { // the insn may be stack memory or heap use memory - if (NeedBuildDepsForStackMem(insn, *stackUse) && NeedBuildDepsForHeapMem(insn, *stackUse)) { + if (AArch64MemReference::NeedBuildMemoryDependency(*stackUse, insn, GetMemBaseDefInsn(*stackUse), + GetMemBaseDefInsn(insn), kDependenceTypeAnti)) { AddDependence(*stackUse->GetDepNode(), *insn.GetDepNode(), kDependenceTypeAnti); } } @@ -158,7 +70,8 @@ void AArch64DataDepBase::BuildDepsForMemDefCommon(Insn &insn, CDGNode &cdgNode) MapleVector &stackDefs = cdgNode.GetStackDefInsns(); for (auto *stackDef : stackDefs) { // the insn may be stack memory or heap use memory - if (NeedBuildDepsForStackMem(insn, *stackDef) && NeedBuildDepsForHeapMem(insn, *stackDef)) { + if (AArch64MemReference::NeedBuildMemoryDependency(*stackDef, insn, GetMemBaseDefInsn(*stackDef), + GetMemBaseDefInsn(insn), kDependenceTypeOutput)) { AddDependence(*stackDef->GetDepNode(), *insn.GetDepNode(), kDependenceTypeOutput); } } @@ -166,14 +79,16 @@ void AArch64DataDepBase::BuildDepsForMemDefCommon(Insn &insn, CDGNode &cdgNode) // Build anti dependency MapleVector &heapUses = cdgNode.GetHeapUseInsns(); for (auto *heapUse : heapUses) { - if (NeedBuildDepsForHeapMem(insn, *heapUse)) { + if (AArch64MemReference::NeedBuildMemoryDependency(*heapUse, insn, GetMemBaseDefInsn(*heapUse), + GetMemBaseDefInsn(insn), kDependenceTypeAnti)) { AddDependence(*heapUse->GetDepNode(), *insn.GetDepNode(), kDependenceTypeAnti); } } // Build output dependency MapleVector &heapDefs = cdgNode.GetHeapDefInsns(); for (auto *heapDef : heapDefs) { - if (NeedBuildDepsForHeapMem(insn, *heapDef)) { + if (AArch64MemReference::NeedBuildMemoryDependency(*heapDef, insn, GetMemBaseDefInsn(*heapDef), + GetMemBaseDefInsn(insn), kDependenceTypeOutput)) { AddDependence(*heapDef->GetDepNode(), *insn.GetDepNode(), kDependenceTypeOutput); } } @@ -185,26 +100,27 @@ void AArch64DataDepBase::BuildDepsForMemUseCommon(Insn &insn, CDGNode &cdgNode) for (auto *stackDef : stackDefs) { // The insn may be stack memory or heap memory if ((stackDef->IsCall() && stackDef->GetMachineOpcode() != MOP_tls_desc_call) || - (NeedBuildDepsForStackMem(insn, *stackDef) && NeedBuildDepsForHeapMem(insn, *stackDef))) { + AArch64MemReference::NeedBuildMemoryDependency(*stackDef, insn, GetMemBaseDefInsn(*stackDef), + GetMemBaseDefInsn(insn), kDependenceTypeTrue)) { AddDependence(*stackDef->GetDepNode(), *insn.GetDepNode(), kDependenceTypeTrue); } } // Build dependency for heap memory access MapleVector &heapDefs = cdgNode.GetHeapDefInsns(); for (auto *heapDef : heapDefs) { - if (NeedBuildDepsForHeapMem(insn, *heapDef)) { + if (AArch64MemReference::NeedBuildMemoryDependency(*heapDef, insn, GetMemBaseDefInsn(*heapDef), + GetMemBaseDefInsn(insn), kDependenceTypeTrue)) { AddDependence(*heapDef->GetDepNode(), *insn.GetDepNode(), kDependenceTypeTrue); } } } -/* - * Build data dependence of symbol memory access. - * Memory access with symbol must be a heap memory access. - */ +// Build data dependence of symbol memory access. +// Memory accesses with symbol must be a heap memory access. void AArch64DataDepBase::BuildDepsAccessStImmMem(Insn &insn) { for (auto *heapDef : curCDGNode->GetHeapDefInsns()) { - if (NeedBuildDepsForHeapMem(*heapDef, insn)) { + if (AArch64MemReference::NeedBuildMemoryDependency(*heapDef, insn, GetMemBaseDefInsn(*heapDef), + GetMemBaseDefInsn(insn), kDependenceTypeTrue)) { AddDependence(*heapDef->GetDepNode(), *insn.GetDepNode(), kDependenceTypeMemAccess); } } @@ -218,7 +134,7 @@ void AArch64DataDepBase::BuildDepsAccessStImmMem(Insn &insn) { } } -/* Build data dependence of memory bars instructions */ +// Build data dependence of memory bars instructions void AArch64DataDepBase::BuildDepsMemBar(Insn &insn) { if (isIntra || curRegion->GetRegionNodeSize() == 1 || curRegion->GetRegionRoot() == curCDGNode) { AddDependence4InsnInVectorByTypeAndCmp(curCDGNode->GetStackUseInsns(), insn, kDependenceTypeMembar); @@ -234,10 +150,8 @@ void AArch64DataDepBase::BuildDepsMemBar(Insn &insn) { curCDGNode->SetMembarInsn(&insn); } -/* - * Build data dependence of stack memory and heap memory read: - * for memOpnd, do not build the true dependency, and identify it by a special mem dependency. - */ +// Build data dependence of stack memory and heap memory read: +// for memOpnd, do not build the true dependency, and identify it by a special mem dependency. void AArch64DataDepBase::BuildDepsUseMem(Insn &insn, MemOperand &memOpnd) { memOpnd.SetAccessSize(insn.GetMemoryByteSize()); @@ -319,11 +233,9 @@ void AArch64DataDepBase::BuildDepsDefMem(Insn &insn, MemOperand &memOpnd) { } } -/* - * Build dependence of call instructions. - * caller-saved physical registers will be defined by a call instruction. - * also a conditional register may be modified by a call. - */ +// Build dependence of call instructions. +// caller-saved physical registers will be defined by a call instruction. +// also a conditional register may be modified by a call. void AArch64DataDepBase::BuildCallerSavedDeps(Insn &insn) { // Build anti dependence and output dependence for (uint32 i = R0; i <= R9; ++i) { @@ -349,7 +261,7 @@ void AArch64DataDepBase::BuildCallerSavedDeps(Insn &insn) { } } -/* Some insns may dirty all stack memory, such as "bl MCC_InitializeLocalStackRef" */ +// Some insns may dirty all stack memory, such as "bl MCC_InitializeLocalStackRef" void AArch64DataDepBase::BuildDepsDirtyStack(Insn &insn) { /* Build anti dependence */ MapleVector &stackUses = curCDGNode->GetStackUseInsns(); @@ -360,19 +272,19 @@ void AArch64DataDepBase::BuildDepsDirtyStack(Insn &insn) { curCDGNode->AddStackDefInsn(&insn); } -/* Some call insns may use all stack memory, such as "bl MCC_CleanupLocalStackRef_NaiveRCFast" */ +// Some call insns may use all stack memory, such as "bl MCC_CleanupLocalStackRef_NaiveRCFast" void AArch64DataDepBase::BuildDepsUseStack(Insn &insn) { /* Build true dependence */ MapleVector &stackDefs = curCDGNode->GetStackDefInsns(); AddDependence4InsnInVectorByType(stackDefs, insn, kDependenceTypeTrue); } -/* Some insns may dirty all heap memory, such as a call insn */ +// Some insns may dirty all heap memory, such as a call insn void AArch64DataDepBase::BuildDepsDirtyHeap(Insn &insn) { - /* Build anti dependence */ + // Build anti dependence MapleVector &heapUses = curCDGNode->GetHeapUseInsns(); AddDependence4InsnInVectorByType(heapUses, insn, kDependenceTypeAnti); - /* Build output dependence */ + // Build output dependence MapleVector &heapDefs = curCDGNode->GetHeapDefInsns(); AddDependence4InsnInVectorByType(heapDefs, insn, kDependenceTypeOutput); @@ -383,7 +295,7 @@ void AArch64DataDepBase::BuildDepsDirtyHeap(Insn &insn) { curCDGNode->AddHeapDefInsn(&insn); } -/* Analysis live-in registers in catch bb and cleanup bb */ +// Analysis live-in registers in catch bb and cleanup bb void AArch64DataDepBase::AnalysisAmbiInsns(BB &bb) { curCDGNode->SetHasAmbiRegs(false); if (bb.GetEhSuccs().empty()) { @@ -391,19 +303,19 @@ void AArch64DataDepBase::AnalysisAmbiInsns(BB &bb) { } MapleSet &ehInRegs = curCDGNode->GetEhInRegs(); - /* Union all catch bb */ + // Union all catch bb for (auto succBB : bb.GetEhSuccs()) { const MapleSet &liveInRegSet = succBB->GetLiveInRegNO(); (void)set_union(liveInRegSet.begin(), liveInRegSet.end(), ehInRegs.begin(), ehInRegs.end(), inserter(ehInRegs, ehInRegs.begin())); } - /* Union cleanup entry bb */ + // Union cleanup entry bb const MapleSet ®NOSet = cgFunc.GetCleanupBB()->GetLiveInRegNO(); (void)std::set_union(regNOSet.begin(), regNOSet.end(), ehInRegs.begin(), ehInRegs.end(), inserter(ehInRegs, ehInRegs.begin())); - /* Subtract R0 and R1, that is defined by eh runtime */ + // Subtract R0 and R1, that is defined by eh runtime (void)ehInRegs.erase(R0); (void)ehInRegs.erase(R1); if (ehInRegs.empty()) { @@ -412,12 +324,10 @@ void AArch64DataDepBase::AnalysisAmbiInsns(BB &bb) { curCDGNode->SetHasAmbiRegs(true); } -/* - * Build data dependence of memory operand. - * insn : an instruction with the memory access operand. - * opnd : the memory access operand. - * regProp : operand property of the memory access operand. - */ +// Build data dependence of memory operand. +// insn : an instruction with the memory access operand. +// opnd : the memory access operand. +// regProp : operand property of the memory access operand. void AArch64DataDepBase::BuildMemOpndDependency(Insn &insn, Operand &opnd, const OpndDesc ®Prop) { ASSERT(opnd.IsMemoryAccessOperand(), "opnd must be memory Operand"); auto *memOpnd = static_cast(&opnd); @@ -453,7 +363,7 @@ void AArch64DataDepBase::BuildMemOpndDependency(Insn &insn, Operand &opnd, const } } -/* Build Dependency for each operand of insn */ +// Build Dependency for each operand of insn void AArch64DataDepBase::BuildOpndDependency(Insn &insn) { const InsnDesc* md = insn.GetDesc(); MOperator mOp = insn.GetMachineOpcode(); @@ -475,7 +385,7 @@ void AArch64DataDepBase::BuildOpndDependency(Insn &insn) { BuildDepsDefReg(insn, regNO); } } else if (opnd.IsConditionCode()) { - /* For condition operand, such as NE, EQ, and so on. */ + // For condition operand, such as NE, EQ, and so on. if (regProp->IsUse()) { BuildDepsUseReg(insn, kRFLAG); BuildDepsBetweenControlRegAndCall(insn, false); @@ -494,9 +404,7 @@ void AArch64DataDepBase::BuildOpndDependency(Insn &insn) { } } -/* - * Build dependencies in some special cases for MOP_xbl - */ +// Build dependencies in some special cases for MOP_xbl void AArch64DataDepBase::BuildSpecialBLDepsForJava(Insn &insn) { ASSERT(insn.GetMachineOpcode() == MOP_xbl, "invalid insn"); auto &target = static_cast(insn.GetOperand(0)); @@ -527,9 +435,7 @@ void AArch64DataDepBase::BuildSpecialCallDeps(Insn &insn) { } } -/* - * Build dependencies in some special cases (stack/heap/throw/clinit/lazy binding/control flow) - */ +// Build dependencies in some special cases (stack/heap/throw/clinit/lazy binding/control flow) void AArch64DataDepBase::BuildSpecialInsnDependency(Insn &insn, const MapleVector &nodes) { const InsnDesc *md = insn.GetDesc(); MOperator mOp = insn.GetMachineOpcode(); @@ -561,7 +467,7 @@ void AArch64DataDepBase::BuildSpecialInsnDependency(Insn &insn, const MapleVecto } void AArch64DataDepBase::BuildAsmInsnDependency(Insn &insn) { - Insn *asmInsn = curCDGNode->GetInlineAsmInsn(); + Insn *asmInsn = curCDGNode->GetLastInlineAsmInsn(); if (asmInsn != nullptr) { // Due to the possible undefined behavior of users, we conservatively restrict // the instructions under the asm-insn to be moved above this instruction, @@ -602,7 +508,7 @@ void AArch64DataDepBase::BuildAsmInsnDependency(Insn &insn) { } BuildDepsUseReg(insn, useOpnd->GetRegisterNumber()); } - curCDGNode->SetInlineAsmInsn(&insn); + curCDGNode->SetLastInlineAsmInsn(&insn); } } @@ -682,4 +588,4 @@ void AArch64DataDepBase::DumpNodeStyleInDot(std::ofstream &file, DepNode &depNod file << "label = \"" << depNode.GetInsn()->GetId() << ":\n"; file << "{ " << md->name << "}\"];\n"; } -} /* namespace maplebe */ +} // namespace maplebe \ No newline at end of file diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_dce.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_dce.cpp index 7983fa68a38ada106fbb6077950d744ac298a65d..9ef5343b643e6dc333985d04f2f598a581956cd1 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_dce.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_dce.cpp @@ -49,7 +49,7 @@ bool AArch64Dce::RemoveUnuseDef(VRegVersion &defVersion) { defInsn->GetBB()->RemoveInsn(*defInsn); if (defInsn->IsPhi()) { for (auto dv : defVersions) { - defInsn->GetBB()->RemovePhiInsn(dv->GetOriginalRegNO()); + defInsn->GetBB()->RemovePhiInsn(dv->GetSSAvRegOpnd()->GetRegisterNumber()); } } for (auto dv : defVersions) { diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_ebo.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_ebo.cpp index e11935b507f132cd54595aa5d1a1b840e98516f5..db681ae36684008febdfaa9c09ae9bf73bebfa0f 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_ebo.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_ebo.cpp @@ -738,7 +738,6 @@ bool AArch64Ebo::SimplifyBothConst(BB &bb, Insn &insn, const ImmOperand &immOper val = static_cast(opndValue0 ^ opndValue1); break; case MOP_wandrri12: - case MOP_waddrri24: case MOP_wandrrr: case MOP_xandrri13: case MOP_xandrrr: @@ -855,10 +854,24 @@ bool AArch64Ebo::CombineExtensionAndLoad(Insn *insn, const MapleVectorinsn; - if (prevInsn == nullptr || (prevInsn->GetBB() != insn->GetBB() && prevInsn->GetBB()->GetSuccsSize() > 1)) { + if (prevInsn == nullptr) { return false; } - + // prevInsn should not have other succs along to insn + // if bb: + // ldr R1 (this should not be changed) + // bb1: + // sxtb R2 R1 + // bb2: + // other use of R1 + BB *bb = prevInsn->GetBB(); + BB *curInsnBB = insn->GetBB(); + while (bb != curInsnBB) { + if (bb->GetSuccsSize() > 1) { + return false; + } + bb = bb->GetSuccs().front(); + } MOperator prevMop = prevInsn->GetMachineOpcode(); ASSERT(prevMop != MOP_undef, "Invalid opcode of instruction!"); PairMOperator *begin = &(extInsnPairTable[idx][0]); diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_emitter.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_emitter.cpp index 2045790f810be1a31a4fa72e521217882c5b6653..f8c4c51857af766872cf301cf462d8c654d3b27a 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_emitter.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_emitter.cpp @@ -433,6 +433,10 @@ void AArch64AsmEmitter::EmitCallWithLocalAlias(Emitter &emitter, const std::stri void HandleSpecificSec(Emitter &emitter, CGFunc &cgFunc) { const std::string §ionName = cgFunc.GetFunction().GetAttrs().GetPrefixSectionName(); + if (sectionName == "pkt_fwd" && cgFunc.GetPriority() != 0) { + (void)emitter.Emit("\t.section .text.hot.").Emit(cgFunc.GetPriority()).Emit("\n"); + return; + } emitter.Emit("\t.section\t" + sectionName); if (cgFunc.GetPriority() != 0) { if (!opts::linkerTimeOpt.IsEnabledByUser()) { @@ -486,16 +490,10 @@ void AArch64AsmEmitter::Run(FuncEmitInfo &funcEmitInfo) { (void)emitter.Emit("\t.section .text.").Emit(cgFunc.GetName()).Emit(",\"ax\",@progbits\n"); } else if (cgFunc.GetFunction().GetAttr(FUNCATTR_constructor_priority)) { (void)emitter.Emit("\t.section\t.text.startup").Emit(",\"ax\",@progbits\n"); + } else if (cgFunc.GetPriority() != 0) { + (void)emitter.Emit("\t.section .text.hot.").Emit(cgFunc.GetPriority()).Emit("\n"); } else { - if (cgFunc.GetPriority() != 0) { - if (opts::linkerTimeOpt.IsEnabledByUser()) { - (void)emitter.Emit("\t.section\tperf_hot").Emit(",\"ax\",@progbits\n"); - } else { - (void)emitter.Emit("\t.section\tperf_hot.").Emit(cgFunc.GetPriority()).Emit(",\"ax\",@progbits\n"); - } - } else { - (void)emitter.Emit("\t.text\n"); - } + (void)emitter.Emit("\t.text\n"); } if (CGOptions::GetFuncAlignPow() != 0) { (void)emitter.Emit("\t.align ").Emit(CGOptions::GetFuncAlignPow()).Emit("\n"); @@ -529,6 +527,12 @@ void AArch64AsmEmitter::Run(FuncEmitInfo &funcEmitInfo) { } } std::string funcStName = funcSt->GetName(); + std::string funcOriginName = funcStName; + // When entry bb is cold, hot bbs are set before entry bb. + // Function original name label should be set next to entry bb, so we name the label before hot bbs "func.hot". + if (cgFunc.IsEntryCold()) { + funcStName = funcOriginName + ".hot"; + } MIRFunction *func = funcSt->GetFunction(); if (func->GetAttr(FUNCATTR_weak)) { (void)emitter.Emit("\t.weak\t" + funcStName + "\n"); @@ -576,9 +580,25 @@ void AArch64AsmEmitter::Run(FuncEmitInfo &funcEmitInfo) { /* set hot-cold section boundary */ BB *boundaryBB = nullptr; + BB *lastBB = nullptr; FOR_ALL_BB(bb, &aarchCGFunc) { if (bb->IsInColdSection() && boundaryBB == nullptr) { boundaryBB = bb; + // fix startlable and endlabe in splited funcs + CG *cg = cgFunc.GetCG(); + if (cg->GetCGOptions().WithDwarf() && cgFunc.GetWithSrc()) { + LabelIdx endLblIdxHot = cgFunc.CreateLabel(); + BB *newEndBB = cgFunc.CreateNewBB(); + BB *firstBB = cgFunc.GetFirstBB(); + newEndBB->AddLabel(endLblIdxHot); + if (lastBB) { + lastBB->AppendBB(*newEndBB); + } + DebugInfo *di = cg->GetMIRModule()->GetDbgInfo(); + DBGDie *fdie = di->GetFuncDie(func); + fdie->SetAttr(DW_AT_high_pc, endLblIdxHot); + CG::SetFuncWrapLabels(func, std::make_pair(firstBB->GetLabIdx(), endLblIdxHot)); + } } if (boundaryBB && !bb->IsInColdSection()) { LogInfo::MapleLogger() << " ==== in Func " << aarchCGFunc.GetName() << " ====\n"; @@ -586,6 +606,7 @@ void AArch64AsmEmitter::Run(FuncEmitInfo &funcEmitInfo) { bb->Dump(); CHECK_FATAL_FALSE("cold section is not pure!"); } + lastBB = bb; } /* emit instructions */ @@ -620,10 +641,18 @@ void AArch64AsmEmitter::Run(FuncEmitInfo &funcEmitInfo) { cgFunc.GetFunction().IsDefaultVisibility()) { EmitLocalAliasOfFuncName(emitter, funcStName); } - std::string sectionName = ".text.unlikely." + funcStName + ".cold"; + // When entry bb is cold, the func label before cold section should be function original name. + funcStName = cgFunc.IsEntryCold() ? funcOriginName : funcOriginName + ".cold"; + std::string sectionName = ".text.unlikely." + funcStName; (void)emitter.Emit("\t.section " + sectionName + ",\"ax\"\n"); (void)emitter.Emit("\t.align 5\n"); - (void)emitter.Emit(funcStName + ".cold:\n"); + // Because entry bb will be called, so the label next to entry bb should be global for caller. + if (cgFunc.IsEntryCold()) { + (void)emitter.Emit("\t.globl\t").Emit(funcStName).Emit("\n"); + (void)emitter.Emit("\t.type\t" + funcStName + ", %function\n"); + } + (void)emitter.Emit(funcStName + ":\n"); + funcStName = funcOriginName; } } if (CGOptions::IsMapleLinker()) { @@ -634,7 +663,11 @@ void AArch64AsmEmitter::Run(FuncEmitInfo &funcEmitInfo) { EmitAArch64CfiInsn(emitter, cgFunc.GetInsnBuilder()->BuildCfiInsn(cfi::OP_CFI_endproc)); } if (boundaryBB) { - (void)emitter.Emit("\t.size\t" + funcStName + ".cold, .-").Emit(funcStName + ".cold\n"); + if (cgFunc.IsEntryCold()) { + (void)emitter.Emit("\t.size\t" + funcStName + ", .-").Emit(funcStName + "\n"); + } else { + (void)emitter.Emit("\t.size\t" + funcStName + ".cold, .-").Emit(funcStName + ".cold\n"); + } } else { (void)emitter.Emit("\t.size\t" + funcStName + ", .-").Emit(funcStName + "\n"); } @@ -827,6 +860,10 @@ void AArch64AsmEmitter::EmitAArch64Insn(maplebe::Emitter &emitter, Insn &insn) c EmitCTlsDescCall(emitter, insn); return; } + case MOP_tls_desc_call_warmup: { + EmitCTlsDescCallWarmup(emitter, insn); + return; + } case MOP_tls_desc_rel: { EmitCTlsDescRel(emitter, insn); return; @@ -840,6 +877,10 @@ void AArch64AsmEmitter::EmitAArch64Insn(maplebe::Emitter &emitter, Insn &insn) c EmitSyncLockTestSet(emitter, insn); return; } + case MOP_prefetch: { + EmitPrefetch(emitter, insn); + return; + } default: break; } @@ -2109,6 +2150,42 @@ void AArch64AsmEmitter::EmitCTlsDescCall(Emitter &emitter, const Insn &insn) con (void)emitter.Emit("\n"); } +void AArch64AsmEmitter::EmitCTlsDescCallWarmup(Emitter &emitter, const Insn &insn) const { + const InsnDesc *md = &AArch64CG::kMd[MOP_tls_desc_call_warmup]; + Operand *result = &insn.GetOperand(kInsnFirstOpnd); + const OpndDesc *resultProp = md->opndMD[kInsnFirstOpnd]; + Operand *reg = &insn.GetOperand(kInsnSecondOpnd); + const OpndDesc *regProp = md->opndMD[kInsnSecondOpnd]; + Operand *symbol = &insn.GetOperand(kInsnThirdOpnd); + auto *stImmOpnd = static_cast(symbol); + std::string symName = stImmOpnd->GetName(); + symName += stImmOpnd->GetSymbol()->GetStorageClass() == kScPstatic ? + std::to_string(emitter.GetCG()->GetMIRModule()->CurFunction()->GetPuidx()) : ""; + A64OpndEmitVisitor resultVisitor(emitter, resultProp); + A64OpndEmitVisitor regVisitor(emitter, regProp); + // adrp result, :tlsdesc:symbol + (void)emitter.Emit("\t").Emit("adrp\t"); + result->Accept(resultVisitor); + (void)emitter.Emit(", :tlsdesc:").Emit(symName).Emit("\n"); + // ldr reg, [result, #tlsdesc_lo12:symbol] + (void)emitter.Emit("\t").Emit("ldr").Emit("\t"); + reg->Accept(regVisitor); + (void)emitter.Emit(", ["); + result->Accept(resultVisitor); + (void)emitter.Emit(", #:tlsdesc_lo12:").Emit(symName).Emit("]\n"); + // add result ,#tlsdesc_lo12:symbol + (void)emitter.Emit("\t").Emit("add\t"); + result->Accept(resultVisitor); + (void)emitter.Emit(", "); + result->Accept(resultVisitor); + (void)emitter.Emit(", :tlsdesc_lo12:").Emit(symName).Emit("\n"); + // .tlsdesccall + (void)emitter.Emit("\t").Emit(".tlsdesccall").Emit("\t").Emit(symName).Emit("\n"); + // placeholder + // may not be needed if TLS image is bigger than reserved space + (void)emitter.Emit("\t").Emit("nop").Emit("\n"); +} + void AArch64AsmEmitter::EmitCTlsLoadTdata(Emitter &emitter, const Insn &insn) const { const InsnDesc *md = &AArch64CG::kMd[MOP_tlsload_tdata]; Operand *result = &insn.GetOperand(kInsnFirstOpnd); @@ -2357,6 +2434,25 @@ void AArch64AsmEmitter::EmitAArch64DbgInsn(FuncEmitInfo &funcEmitInfo, Emitter & (void)emitter.Emit("\n"); } +void AArch64AsmEmitter::EmitPrefetch(Emitter &emitter, const Insn &insn) const { + constexpr int32 rwLimit = 2; // 2: the value of opnd1 cannot exceed 2 + constexpr int32 localityLimit = 4; // 4: the value of opnd2 cannot exceed 4 + static const std::string PRFOP[rwLimit][localityLimit] = {{"pldl1strm", "pldl3keep", "pldl2keep", "pldl1keep"}, + {"pstl1strm", "pstl3keep", "pstl2keep", "pstl1keep"}}; + const InsnDesc *md = &AArch64CG::kMd[insn.GetMachineOpcode()]; + auto *addr = &insn.GetOperand(kInsnFirstOpnd); + auto *rw = &insn.GetOperand(kInsnSecondOpnd); + auto *locality = &insn.GetOperand(kInsnThirdOpnd); + A64OpndEmitVisitor addrVisitor(emitter, md->opndMD[kInsnFirstOpnd]); + int64 rwConstVal = static_cast(rw)->GetValue(); + int64 localityConstVal = static_cast(locality)->GetValue(); + CHECK_FATAL((rwConstVal < rwLimit) && (rwConstVal >= 0) && + (localityConstVal < localityLimit) && (localityConstVal >= 0), "wrong opnd"); + (void)emitter.Emit("\tprfm\t").Emit(PRFOP[rwConstVal][localityConstVal]).Emit(", ["); + addr->Accept(addrVisitor); + (void)emitter.Emit("]\n"); +} + bool AArch64AsmEmitter::CheckInsnRefField(const Insn &insn, uint32 opndIndex) const { if (insn.IsAccessRefField() && insn.AccessMem()) { Operand &opnd0 = insn.GetOperand(opndIndex); diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_fixshortbranch.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_fixshortbranch.cpp index b4afa4b73898b5f2606ee55af97184b7b6774490..b0b9f239f6157a553a194cf3982450a6c462bb89 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_fixshortbranch.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_fixshortbranch.cpp @@ -63,6 +63,43 @@ void AArch64FixShortBranch::SetInsnId() const { } } +uint32 AArch64FixShortBranch::CalculateIfBBNum() const { + uint32 ifBBCount = 0; + FOR_ALL_BB(bb, cgFunc) { + if (bb->GetKind() != BB::kBBIf) { + ifBBCount++; + } + } + return ifBBCount; +} + +void AArch64FixShortBranch::PatchLongBranch() { + AArch64CGFunc *aarch64CGFunc = static_cast(cgFunc); + SetInsnId(); + uint32 ifBBCount = CalculateIfBBNum(); + for (BB *bb = aarch64CGFunc->GetFirstBB(); bb != nullptr; bb = bb->GetNext()) { + if (bb->GetKind() != BB::kBBIf) { + continue; + } + Insn *insn = bb->GetLastMachineInsn(); + while (insn != nullptr && insn->IsImmaterialInsn()) { + insn = insn->GetPrev(); + } + if (insn == nullptr || !insn->IsCondBranch()) { + continue; + } + LabelIdx tbbLabelIdx = aarch64CGFunc->GetLabelInInsn(*insn); + // when we change condbr to condbr and b, we will have more insns + // in case the insn num will cause distance check not calculating right + // we assume that each if bb will be changed(which is the worst case). + if (ifBBCount <= AArch64Abi::kMaxInstrForCondBr && + aarch64CGFunc->DistanceCheck(*bb, tbbLabelIdx, insn->GetId(), AArch64Abi::kMaxInstrForCondBr - ifBBCount)) { + continue; + } + aarch64CGFunc->InsertJumpPad(insn); + } +} + /* * TBZ/TBNZ instruction is generated under -O2, these branch instructions only have a range of +/-32KB. * If the branch target is not reachable, we split tbz/tbnz into combination of ubfx and cbz/cbnz, which @@ -88,7 +125,7 @@ void AArch64FixShortBranch::FixShortBranches() const { } LabelOperand &label = static_cast(insn->GetOperand(kInsnThirdOpnd)); /* should not be commented out after bug fix */ - if (aarch64CGFunc->DistanceCheck(*bb, label.GetLabelIndex(), insn->GetId())) { + if (aarch64CGFunc->DistanceCheck(*bb, label.GetLabelIndex(), insn->GetId(), AArch64Abi::kMaxInstrForTbnz)) { continue; } auto ® = static_cast(insn->GetOperand(kInsnFirstOpnd)); @@ -220,11 +257,80 @@ void AArch64FixShortBranch::InitSecEnd() { } } +bool AArch64FixShortBranch::CheckFunctionSize(uint32 maxSize) const { + uint32 firstInsnId = 0; + uint32 lastInsnId = UINT32_MAX; + bool findLast = false; + bool findFirst = false; + + for (auto *bb = cgFunc->GetLastBB(); bb != nullptr && !findLast; bb = bb->GetPrev()) { + for (auto *insn = bb->GetLastInsn(); insn != nullptr && !findLast; insn = insn->GetPrev()) { + if (!insn->IsMachineInstruction() || insn->IsImmaterialInsn()) { + continue; + } + findLast = true; + lastInsnId = insn->GetId(); + break; + } + } + + for (auto *bb = cgFunc->GetFirstBB(); bb != nullptr && !findFirst; bb = bb->GetNext()) { + for (auto *insn = bb->GetFirstInsn(); insn != nullptr && !findFirst; insn = insn->GetNext()) { + if (!insn->IsMachineInstruction() || insn->IsImmaterialInsn()) { + continue; + } + findFirst = true; + firstInsnId = insn->GetId(); + break; + } + } + return (lastInsnId - firstInsnId + 1) <= maxSize; +} + +// when func size >= kMaxInstrForLdr +// ldr R1, .L.4__5 +// .L_x: ... +// => +// adrp x1, .L.4__5 +// add x1, x1, :lo12:.L.4__5 +// ldr x1, [x1] +void AArch64FixShortBranch::FixLdr() { + AArch64CGFunc *aarch64CGFunc = static_cast(cgFunc); + SetInsnId(); + if (CheckFunctionSize(AArch64Abi::kMaxInstrForLdr)) { + return; + } + FOR_ALL_BB(bb, cgFunc) { + FOR_BB_INSNS(insn, bb) { + if (!insn->IsMachineInstruction()) { + continue; + } + if (insn->GetMachineOpcode() == MOP_xldli && insn->GetOperand(kInsnSecondOpnd).IsLabelOpnd()) { + // ldr -> adrp + add + auto ®Opnd = static_cast(insn->GetOperand(kInsnFirstOpnd)); + auto &labelOpnd = static_cast(insn->GetOperand(kInsnSecondOpnd)); + Operand &immOpnd = aarch64CGFunc->CreateImmOperand(labelOpnd.GetLabelIndex(), k64BitSize, false); + insn->SetOperand(kInsnSecondOpnd, immOpnd); + insn->SetMOP(AArch64CG::kMd[MOP_adrp_label]); + // ldr x1, [x1] + MemOperand *newDest = aarch64CGFunc->CreateMemOperand(k64BitSize, regOpnd, + aarch64CGFunc->CreateImmOperand(0, k32BitSize, false)); + auto *newRegOpnd = static_cast(regOpnd.Clone(*aarch64CGFunc->GetMemoryPool())); + Insn &ldrInsn = aarch64CGFunc->GetInsnBuilder()->BuildInsn(MOP_xldr, *newRegOpnd, *newDest); + (void)bb->InsertInsnAfter(*insn, ldrInsn); + } + } + } +} + bool CgFixShortBranch::PhaseRun(maplebe::CGFunc &f) { auto *fixShortBranch = GetPhaseAllocator()->New(&f); CHECK_FATAL(fixShortBranch != nullptr, "AArch64FixShortBranch instance create failure"); fixShortBranch->FixShortBranches(); - if (LiteProfile::IsInWhiteList(f.GetName()) && CGOptions::DoLiteProfUse()) { + // fix ldr would cause insn num increasing, do ldr fix first. + fixShortBranch->FixLdr(); + fixShortBranch->PatchLongBranch(); + if (f.HasLaidOutByPgoUse()) { LiteProfile::BBInfo *bbInfo = f.GetFunction().GetModule()->GetLiteProfile().GetFuncBBProf(f.GetName()); if (bbInfo) { CHECK_FATAL(bbInfo->verified.first, "Must verified pgo data in pgo use"); diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_global.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_global.cpp index c1612c3b60af465c6ad999131538ea75ff04327b..8c1cc9db5088c8fa581832831cb15f37aed9d70e 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_global.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_global.cpp @@ -1788,16 +1788,23 @@ bool ExtendShiftOptPattern::CheckCondition(Insn &insn) { if ((extendOp == ExtendShiftOperand::kUndef) && (shiftOp == BitShiftOperand::kUndef)) { return false; } - /* If the size of the use point in sxtb is greater than the size of the def point, - * optimization cannot be carried out, for example: - * sxtb w6, w2 - * cmp x3, x6 - * ==> - * cmp x3, w2, SXTB - */ + // If the size of the use point in cmp is greater than the size of the def point, + // optimization cannot be carried out, for example: + // sxtb w6, w2 + // cmp x3, x6 + // ==> + // cmp x3, w2, SXTB (wrong) + // + // lsl w6, w2, #2 + // cmp x3, x6 + // ==> + // cmp x2, x2, LSL #2 (wrong) if ((extendOp == ExtendShiftOperand::kSXTB || extendOp == ExtendShiftOperand::kSXTH || - extendOp == ExtendShiftOperand::kSXTW) && + extendOp == ExtendShiftOperand::kSXTW || + shiftOp == BitShiftOperand::kShiftLSL || + shiftOp == BitShiftOperand::kShiftLSR || + shiftOp == BitShiftOperand::kShiftASR) && (defInsn->GetOperandSize(0) < insn.GetOperandSize(replaceIdx))) { return false; } diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_global_schedule.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_global_schedule.cpp index 34784b1046fe6468dcf53889fea6c12de0ae92ec..5309096ff5ca19f27642f14f3fce68ef23b5d6f7 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_global_schedule.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_global_schedule.cpp @@ -24,7 +24,7 @@ void AArch64GlobalSchedule::VerifyingSchedule(CDGRegion ®ion) { for (auto cdgNode : region.GetRegionNodes()) { MemPool *cdgNodeMp = memPoolCtrler.NewMemPool("global-scheduler cdgNode memPool", true); - InitInCDGNode(region, *cdgNode, cdgNodeMp); + InitInCDGNode(region, *cdgNode, *cdgNodeMp); uint32 scheduledNodeNum = 0; /* Schedule independent instructions sequentially */ @@ -64,53 +64,6 @@ void AArch64GlobalSchedule::VerifyingSchedule(CDGRegion ®ion) { } } -void AArch64GlobalSchedule::InitInCDGNode(CDGRegion ®ion, CDGNode &cdgNode, MemPool *cdgNodeMp) { - commonSchedInfo = cdgNodeMp->New(*cdgNodeMp); - // 1. The instructions of the current node - MapleVector &curDataNodes = cdgNode.GetAllDataNodes(); - // For verify, the node is stored in reverse order and for global, the node is stored in sequence - for (auto depNode : curDataNodes) { - commonSchedInfo->AddCandidates(depNode); - depNode->SetState(kCandidate); - } - // 2. The instructions of the equivalent candidate nodes of the current node - std::vector equivalentNodes; - cda.GetEquivalentNodesInRegion(region, cdgNode, equivalentNodes); - for (auto equivNode : equivalentNodes) { - BB *equivBB = equivNode->GetBB(); - ASSERT(equivBB != nullptr, "get bb from cdgNode failed"); - if (equivBB->IsAtomicBuiltInBB()) { - continue; - } - for (auto depNode : equivNode->GetAllDataNodes()) { - Insn *insn = depNode->GetInsn(); - CHECK_FATAL(insn != nullptr, "get insn from depNode failed"); - // call & branch insns cannot be moved across BB - if (insn->IsBranch() || insn->IsCall()) { - continue; - } - commonSchedInfo->AddCandidates(depNode); - depNode->SetState(kCandidate); - } - } - listScheduler->SetCommonSchedInfo(*commonSchedInfo); - - // Init insnNum of curCDGNode - uint32 insnNum = 0; - BB *curBB = cdgNode.GetBB(); - CHECK_FATAL(curBB != nullptr, "get bb from cdgNode failed"); - FOR_BB_INSNS_CONST(insn, curBB) { - if (insn->IsMachineInstruction()) { - insnNum++; - } - } - cdgNode.SetInsnNum(insnNum); - - if (GLOBAL_SCHEDULE_DUMP) { - DumpCDGNodeInfoBeforeSchedule(cdgNode); - } -} - void AArch64GlobalSchedule::FinishScheduling(CDGNode &cdgNode) { BB *curBB = cdgNode.GetBB(); CHECK_FATAL(curBB != nullptr, "get bb from cdgNode failed"); @@ -156,39 +109,4 @@ void AArch64GlobalSchedule::FinishScheduling(CDGNode &cdgNode) { ASSERT(curBB->NumInsn() >= static_cast(cdgNode.GetInsnNum()), "The number of instructions after global-scheduling is unexpected"); } - -void AArch64GlobalSchedule::DumpInsnInfoByScheduledOrder(CDGNode &cdgNode) const { - LogInfo::MapleLogger() << " ------------------------------------------------\n"; - LogInfo::MapleLogger() << " " << - // '6,8,14' Set the width for printing. - std::setiosflags(std::ios::left) << std::setw(6) << "insn" << std::resetiosflags(std::ios::left) << - std::setiosflags(std::ios::right) << std::setw(8) << "mop" << std::resetiosflags(std::ios::right) << - std::setiosflags(std::ios::right) << std::setw(6) << "bb" << std::resetiosflags(std::ios::right) << - std::setiosflags(std::ios::right) << std::setw(14) << "succs(latency)" << - std::resetiosflags(std::ios::right) << "\n"; - LogInfo::MapleLogger() << " ------------------------------------------------\n"; - BB *curBB = cdgNode.GetBB(); - ASSERT(curBB != nullptr, "get bb from cdgNode failed"); - FOR_BB_INSNS_CONST(insn, curBB) { - if (!insn->IsMachineInstruction()) { - continue; - } - LogInfo::MapleLogger() << " " << - std::setiosflags(std::ios::left) << std::setw(6) << insn->GetId() << std::resetiosflags(std::ios::left) << - std::setiosflags(std::ios::right) << std::setw(8); - const InsnDesc *md = &AArch64CG::kMd[insn->GetMachineOpcode()]; - LogInfo::MapleLogger() << md->name << std::resetiosflags(std::ios::right) << - std::setiosflags(std::ios::right) << std::setw(6) << curBB->GetId() << std::resetiosflags(std::ios::right) << - std::setiosflags(std::ios::right) << std::setw(14); - const DepNode *depNode = insn->GetDepNode(); - ASSERT(depNode != nullptr, "get depNode from insn failed"); - for (auto succLink : depNode->GetSuccs()) { - DepNode &succNode = succLink->GetTo(); - LogInfo::MapleLogger() << succNode.GetInsn()->GetId() << "(" << succLink->GetLatency() << "), "; - } - LogInfo::MapleLogger() << std::resetiosflags(std::ios::right) << "\n"; - } - LogInfo::MapleLogger() << " ------------------------------------------------\n"; - LogInfo::MapleLogger() << "\n"; -} -} \ No newline at end of file +} /* namespace maplebe */ \ No newline at end of file diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_ico.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_ico.cpp index f9578c35f8d0170a07b9aa0ea3b9d69f7aef97fa..b1cfc9102aee0599e3efd0ad3b4110bf11a8ee37 100755 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_ico.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_ico.cpp @@ -34,6 +34,7 @@ void AArch64IfConversionOptimizer::InitOptimizePatterns() { singlePassPatterns.emplace_back(memPool->New(*cgFunc)); } singlePassPatterns.emplace_back(memPool->New(*cgFunc)); + singlePassPatterns.emplace_back(memPool->New(*cgFunc)); } /* build ccmp Insn */ @@ -62,10 +63,9 @@ Insn *AArch64ICOPattern::BuildCcmpInsn(ConditionCode ccCode, ConditionCode ccCod return nullptr; } ImmOperand &opnd3 = func->CreateImmOperand(PTY_u8, nzcv); - CondOperand &cond = static_cast(cgFunc)->GetCondOperand(ccCode); - uint32 dSize = opnd1.GetSize(); - - MOperator mOpCode = (dSize == k64BitSize ? MOP_xccmprric : MOP_wccmprric); + CondOperand &cond = static_cast(cgFunc)->GetCondOperand(ccCode); + bool is64Bits = cmpInsn.GetDesc()->GetOpndDes(kInsnSecondOpnd)->GetSize() == k64BitSize ? true : false; + MOperator mOpCode = is64Bits ? MOP_xccmprric : MOP_wccmprric; auto moveAble = static_cast(opnd2).IsSingleInstructionMovable( AArch64CG::kMd[cmpInsn.GetMachineOpcode()].GetOpndDes(1)->GetSize()); if (!moveAble) { @@ -79,7 +79,7 @@ Insn *AArch64ICOPattern::BuildCcmpInsn(ConditionCode ccCode, ConditionCode ccCod (opnd2.IsImmediate() ? MOP_wmovri32 : MOP_wmovrr)); moveInsn = &cgFunc->GetInsnBuilder()->BuildInsn(mOp, *newReg, opnd2); } else { - mOpCode = (dSize == k64BitSize ? MOP_xccmpriic : MOP_wccmpriic); + mOpCode = is64Bits ? MOP_xccmpriic : MOP_wccmpriic; } } std::vector opnds; @@ -92,6 +92,51 @@ Insn *AArch64ICOPattern::BuildCcmpInsn(ConditionCode ccCode, ConditionCode ccCod return &cgFunc->GetInsnBuilder()->BuildInsn(mOpCode, opnds); } +// build ccmp Insn +Insn *AArch64ICOPattern::BuildCcmpInsn(ConditionCode ccCode, ConditionCode ccCode2, const Insn &branchInsn, + const Insn &cmpInsn) const { + Operand &opnd0 = cmpInsn.GetOperand(kInsnFirstOpnd); + Operand &opnd1 = branchInsn.GetOperand(kInsnFirstOpnd); + + // ccmp has only int opnd + if (!static_cast(opnd1).IsOfIntClass()) { + return nullptr; + } + AArch64CGFunc *func = static_cast(cgFunc); + uint32 nzcv = GetNZCV(ccCode, false); + if (nzcv == k16BitSize) { + return nullptr; + } + ImmOperand &opnd3 = func->CreateImmOperand(PTY_u8, nzcv); + CondOperand &cond = static_cast(cgFunc)->GetCondOperand(ccCode2); + MOperator mOpCode = branchInsn.GetDesc()->GetOpndDes(kInsnFirstOpnd)->GetSize() == k64BitSize ? MOP_xccmprric : + MOP_wccmprric; + ImmOperand &opnd2 = func->CreateImmOperand(PTY_u8, 0); + + std::vector opnds; + opnds.emplace_back(&opnd0); + opnds.emplace_back(&opnd1); + opnds.emplace_back(&opnd2); + opnds.emplace_back(&opnd3); + opnds.emplace_back(&cond); + opnds.emplace_back(&opnd0); + return &cgFunc->GetInsnBuilder()->BuildInsn(mOpCode, opnds); +} + +MOperator AArch64ICOPattern::GetBranchCondOpcode(MOperator op) const{ + switch (op) { + case AArch64MOP_t::MOP_xcbnz: + case AArch64MOP_t::MOP_wcbnz: + return AArch64MOP_t::MOP_bne; + case AArch64MOP_t::MOP_xcbz: + case AArch64MOP_t::MOP_wcbz: + return AArch64MOP_t::MOP_beq; + default: + break; + } + return AArch64MOP_t::MOP_undef; +} + /* Rooted ccCode resource NZCV */ uint32 AArch64ICOPattern::GetNZCV(ConditionCode ccCode, bool inverse) { switch (ccCode) { @@ -123,10 +168,11 @@ uint32 AArch64ICOPattern::GetNZCV(ConditionCode ccCode, bool inverse) { Insn *AArch64ICOPattern::BuildCmpInsn(const Insn &condBr) const { AArch64CGFunc *func = static_cast(cgFunc); RegOperand ® = static_cast(condBr.GetOperand(0)); - PrimType ptyp = (reg.GetSize() == k64BitSize) ? PTY_u64 : PTY_u32; + bool is64Bits = condBr.GetDesc()->GetOpndDes(kInsnFirstOpnd)->GetSize() == k64BitSize ? true : false; + PrimType ptyp = is64Bits ? PTY_u64 : PTY_u32; ImmOperand &numZero = func->CreateImmOperand(ptyp, 0); Operand &rflag = func->GetOrCreateRflag(); - MOperator mopCode = (reg.GetSize() == k64BitSize) ? MOP_xcmpri : MOP_wcmpri; + MOperator mopCode = is64Bits ? MOP_xcmpri : MOP_wcmpri; Insn &cmpInsn = func->GetInsnBuilder()->BuildInsn(mopCode, rflag, reg, numZero); return &cmpInsn; } @@ -207,12 +253,14 @@ ConditionCode AArch64ICOPattern::Encode(MOperator mOp, bool inverse) const { case MOP_bge: return inverse ? CC_LT : CC_GE; case MOP_wcbnz: - return inverse ? CC_EQ : CC_NE; case MOP_xcbnz: + case MOP_wtbnz: + case MOP_xtbnz: return inverse ? CC_EQ : CC_NE; case MOP_wcbz: - return inverse ? CC_NE : CC_EQ; case MOP_xcbz: + case MOP_wtbz: + case MOP_xtbz: return inverse ? CC_NE : CC_EQ; default: return kCcLast; @@ -225,7 +273,7 @@ Insn *AArch64ICOPattern::BuildCondSet(const Insn &branch, RegOperand ®, bool AArch64CGFunc *func = static_cast(cgFunc); CondOperand &cond = func->GetCondOperand(ccCode); Operand &rflag = func->GetOrCreateRflag(); - MOperator mopCode = (reg.GetSize() == k64BitSize) ? MOP_xcsetrc : MOP_wcsetrc; + MOperator mopCode = branch.GetDesc()->GetOpndDes(kInsnFirstOpnd)->GetSize() == k64BitSize ? MOP_xcsetrc : MOP_wcsetrc; return &func->GetInsnBuilder()->BuildInsn(mopCode, reg, cond, rflag); } @@ -235,7 +283,8 @@ Insn *AArch64ICOPattern::BuildCondSetMask(const Insn &branch, RegOperand ®, b AArch64CGFunc *func = static_cast(cgFunc); CondOperand &cond = func->GetCondOperand(ccCode); Operand &rflag = func->GetOrCreateRflag(); - MOperator mopCode = (reg.GetSize() == k64BitSize) ? MOP_xcsetmrc : MOP_wcsetmrc; + MOperator mopCode = branch.GetDesc()->GetOpndDes(kInsnFirstOpnd)->GetSize() == k64BitSize ? MOP_xcsetmrc : + MOP_wcsetmrc; return &func->GetInsnBuilder()->BuildInsn(mopCode, reg, cond, rflag); } @@ -243,11 +292,21 @@ Insn *AArch64ICOPattern::BuildCondSel(const Insn &branch, MOperator mOp, RegOper RegOperand &src2) const { ConditionCode ccCode = Encode(branch.GetMachineOpcode(), false); ASSERT(ccCode != kCcLast, "unknown cond, ccCode can't be kCcLast"); - CondOperand &cond = static_cast(cgFunc)->GetCondOperand(ccCode); - Operand &rflag = static_cast(cgFunc)->GetOrCreateRflag(); + CondOperand &cond = static_cast(cgFunc)->GetCondOperand(ccCode); + Operand &rflag = static_cast(cgFunc)->GetOrCreateRflag(); return &cgFunc->GetInsnBuilder()->BuildInsn(mOp, dst, src1, src2, cond, rflag); } +Insn *AArch64ICOPattern::BuildTstInsn(const Insn &branch) const { + RegOperand &opnd0 = static_cast(branch.GetOperand(kInsnFirstOpnd)); + auto mOpCode = branch.GetDesc()->opndMD[0]->GetSize() <= k32BitSize ? MOP_wtstri32 : MOP_xtstri64; + Operand &rflag = static_cast(cgFunc)->GetOrCreateRflag(); + ImmOperand &immOpnd = static_cast(branch.GetOperand(kInsnSecondOpnd)); + uint64 value = static_cast(1) << static_cast(immOpnd.GetValue()); + return &cgFunc->GetInsnBuilder()->BuildInsn(mOpCode, rflag, opnd0, + static_cast(cgFunc)->CreateImmOperand(static_cast(value), k64BitSize, false)); +} + void AArch64ICOIfThenElsePattern::GenerateInsnForImm(const Insn &branchInsn, Operand &ifDest, Operand &elseDest, RegOperand &destReg, std::vector &generateInsn) const { ImmOperand &imm1 = static_cast(ifDest); @@ -338,6 +397,11 @@ void AArch64ICOIfThenElsePattern::GenerateInsnForReg(const Insn &branchInsn, Ope Insn &tempInsnIf = cgFunc->GetInsnBuilder()->BuildInsn(mOp, destReg, *tReg); generateInsn.emplace_back(&tempInsnIf); } else { + if (cgFunc->GetTheCFG()->IsTestAndBranchInsn(branchInsn)) { + Insn *tstInsn = BuildTstInsn(branchInsn); + CHECK_FATAL(tstInsn != nullptr, "build a tst insn failed"); + generateInsn.emplace_back(tstInsn); + } bool isIntTy = destReg.IsOfIntClass(); MOperator mOpCode = isIntTy ? MOP_xcselrrrc : MOP_dcselrrrc; Insn *cselInsn = BuildCondSel(branchInsn, mOpCode, destReg, *tReg, *eReg); @@ -390,6 +454,10 @@ bool AArch64ICOIfThenElsePattern::BuildCondMovInsn(const BB &bb, Operand *dest = nullptr; std::vector src; + if (cgFunc->GetTheCFG()->IsTestAndBranchInsn(*cmpInsn) && !IsMovMOperator(*insn)) { + return false; + } + if (!IsSetInsn(*insn, &dest, src)) { ASSERT(false, "insn check"); } @@ -425,6 +493,9 @@ bool AArch64ICOIfThenElsePattern::BuildCondMovInsn(const BB &bb, /* generate cset or csel instruction */ ASSERT(ifDest != nullptr, "null ptr check"); if (ifDest->IsIntImmediate() && elseDest->IsIntImmediate()) { + if (cgFunc->GetTheCFG()->IsTestAndBranchInsn(*branchInsn)) { + return false; + } GenerateInsnForImm(*branchInsn, *ifDest, *elseDest, *destReg, generateInsn); } else { RegOperand *tReg = GenerateRegAndTempInsn(*ifDest, *destReg, generateInsn); @@ -549,6 +620,11 @@ bool AArch64ICOIfThenElsePattern::CheckCondMoveBB(BB *bb, std::map src; + if (cgFunc->GetTheCFG()->IsTestAndBranchInsn(*cmpInsn)) { + if (!IsMovMOperator(*insn)) { + return false; + } + } if (!IsSetInsn(*insn, &dest, src)) { return false; } @@ -815,15 +891,32 @@ bool AArch64ICOIfThenElsePattern::DoOpt(BB *ifBB, BB *elseBB, BB &joinBB) { flagOpnd = &(opnd0); } - /* tbz will not be optimized */ - MOperator mOperator = condBr->GetMachineOpcode(); - if (mOperator == MOP_xtbz || mOperator == MOP_wtbz || mOperator == MOP_xtbnz || mOperator == MOP_wtbnz) { - return false; + // tbz/tbnz will be optimized + // for example: + // cmpBB: cmpBB: + // ldrb w1, [x2,#49] ldrb w1, [x2,#49] + // tbz w1, #1, thenBB => tst w1, 2 + // elseBB: csel w0, w0, 0, eq + // mov w0, #0 thenBB: + // thenBB: ... + // ... + if (cgFunc->GetTheCFG()->IsTestAndBranchInsn(*condBr)) { + Operand &opnd0 = condBr->GetOperand(0); + if (opnd0.IsRegister() && static_cast(opnd0).GetRegisterNumber() == RZR) { + return false; + } + cmpInsn = condBr; + flagOpnd = &(opnd0); } + if (cmpInsn == nullptr) { return false; } if (ifBB != nullptr && elseBB != nullptr) { + // in this scenarios, tbz/tbnz will not be optimized + if (cgFunc->GetTheCFG()->IsTestAndBranchInsn(*condBr)) { + return false; + } while (DoHostBeforeDoCselOpt(*ifBB, *elseBB)) {} } @@ -843,6 +936,13 @@ bool AArch64ICOIfThenElsePattern::DoOpt(BB *ifBB, BB *elseBB, BB &joinBB) { insnInIfBBToBeRremovedOutOfCurrBB))) { return false; } + + // in this scenarios, tbz/tbnz will not be optimized + if (cgFunc->GetTheCFG()->IsTestAndBranchInsn(*condBr) && ((elseBB != nullptr && elseSetInsn.empty()) || + (ifBB != nullptr && ifSetInsn.empty()))) { + return false; + } + // If ifBB and elseBB are the same bb, there is no need to move statement forward. if (ifBB == elseBB && (insnInElseBBToBeRremovedOutOfCurrBB != nullptr || insnInIfBBToBeRremovedOutOfCurrBB != nullptr)) { @@ -935,20 +1035,25 @@ bool AArch64ICOIfThenElsePattern::DoOpt(BB *ifBB, BB *elseBB, BB &joinBB) { } for (auto setInsn : elseSetInsn) { - if (Has2SrcOpndSetInsn(*setInsn)) { - (void)cmpBB->InsertInsnBefore(*cmpInsn, *setInsn); + if (!cgFunc->GetTheCFG()->IsTestAndBranchInsn(*cmpInsn)) { + if (Has2SrcOpndSetInsn(*setInsn)) { + (void)cmpBB->InsertInsnBefore(*cmpInsn, *setInsn); + } } } - /* delete condBr */ - cmpBB->RemoveInsn(*condBr); + // delete condBr when it is not tbz/tbnz optimization scenarios + if (cmpInsn != condBr) { + cmpBB->RemoveInsn(*condBr); + } /* Insert goto insn after csel insn. */ if (cmpBB->GetKind() == BB::kBBGoto || cmpBB->GetKind() == BB::kBBIf) { if (elseBB != nullptr) { (void)cmpBB->InsertInsnAfter(*cmpBB->GetLastInsn(), *elseBB->GetLastInsn()); } else { - ASSERT(ifBB != nullptr, "ifBB should not be nullptr"); - (void)cmpBB->InsertInsnAfter(*cmpBB->GetLastInsn(), *ifBB->GetLastInsn()); + if (ifBB != nullptr) { + (void)cmpBB->InsertInsnAfter(*cmpBB->GetLastInsn(), *ifBB->GetLastInsn()); + } } } @@ -960,6 +1065,11 @@ bool AArch64ICOIfThenElsePattern::DoOpt(BB *ifBB, BB *elseBB, BB &joinBB) { (void)cmpBB->InsertInsnAfter(*cmpInsn, **itr); } + // delete condBr when it is tbz/tbnz optimization scenarios + if (cmpInsn == condBr) { + cmpBB->RemoveInsn(*condBr); + } + /* Remove branches and merge join */ if (ifBB != nullptr) { BB *prevLast = ifBB->GetPrev(); @@ -1132,6 +1242,52 @@ bool AArch64ICOPattern::CheckMopOfCmp(MOperator mOperator) const { } } +// The case of jumping to different branches can be converted to jumping to the same branch. +// A similar scenario is as follows: +// .L.__1: .L.__1: +// ... ... +// cbz w1, .L.__4 cbz w1, .L.__4 +// .L.__2: ==> .L.__2: +// cmp w1, #6 cmp w1, #6 +// bne .L.__3 beq .L.__4 +// .L.__4: .L.__3: +// ... ... +bool AArch64ICOSameCondPattern::CanConvertToSameCond(BB &firstIfBB, BB &secondIfBB) const { + auto *firstIfSucc0 = firstIfBB.GetSuccs().front(); + auto *firstIfSucc1 = firstIfBB.GetSuccs().back(); + auto *secondIfSucc0 = secondIfBB.GetSuccs().front(); + auto *secondIfSucc1 = secondIfBB.GetSuccs().back(); + Insn *cmpBrInsn1 = cgFunc->GetTheCFG()->FindLastCondBrInsn(firstIfBB); + if (cmpBrInsn1 == nullptr) { + return false; + } + Insn *cmpInsn2 = FindLastCmpInsn(secondIfBB); + if (cmpInsn2 == nullptr) { + return false; + } + if (&cmpBrInsn1->GetOperand(kInsnFirstOpnd) != &cmpInsn2->GetOperand(kInsnSecondOpnd)) { + return false; + } + + if (firstIfSucc0 == &secondIfBB) { + if (firstIfSucc1 == secondIfSucc0 || firstIfSucc1 == secondIfSucc1) { + return true; + } + } else if (firstIfSucc1 == &secondIfBB) { + if (firstIfSucc0 == secondIfSucc0 || firstIfSucc1 == secondIfSucc1) { + return true; + } + } + return false; +} + +Insn &AArch64ICOSameCondPattern::ConvertCompBrInsnToCompInsn(const Insn &insn) const { + ASSERT(cgFunc->GetTheCFG()->GetInsnModifier()->IsCompareAndBranchInsn(insn), "insn is not compare and branch insn"); + MOperator mOpCode = insn.GetDesc()->GetOpndDes(kInsnFirstOpnd)->GetSize() == k64BitSize ? MOP_xcmpri : MOP_wcmpri; + return cgFunc->GetInsnBuilder()->BuildInsn(mOpCode, static_cast(cgFunc)->GetOrCreateRflag(), + insn.GetOperand(kInsnFirstOpnd), static_cast(cgFunc)->CreateImmOperand(0, k8BitSize, false)); +} + /* branchInsn1 is firstIfBB's LastCondBrInsn * branchInsn2 is secondIfBB's LastCondBrInsn * @@ -1141,21 +1297,32 @@ bool AArch64ICOSameCondPattern::DoOpt(BB &firstIfBB, BB &secondIfBB) const { Insn *branchInsn1 = cgFunc->GetTheCFG()->FindLastCondBrInsn(firstIfBB); ASSERT(branchInsn1 != nullptr, "nullptr check"); Insn *cmpInsn1 = FindLastCmpInsn(firstIfBB); - MOperator mOperator1 = branchInsn1->GetMachineOpcode(); Insn *branchInsn2 = cgFunc->GetTheCFG()->FindLastCondBrInsn(secondIfBB); ASSERT(branchInsn2 != nullptr, "nullptr check"); Insn *cmpInsn2 = FindLastCmpInsn(secondIfBB); MOperator mOperator2 = branchInsn2->GetMachineOpcode(); - if (cmpInsn1 == nullptr || cmpInsn2 == nullptr) { + // cmpInsn1 maybe nullptr, cmpInsn2 can not be nullptr. + // when cmpInsn1 is nullptr, branchInsn1 is cbz/cbnz/tbz/tbnz insn, + // but tbz/tbnz will not be optimized. + // The optimization scenarios are as follows: + // branch1: branch1: + // cbz/cbnz x1, label_1 cmp w0, imm/w2 + // branch2: => ccmp x1, 0, 4, lo + // cmp w0, imm/w2 beq label_1 + // bhs label_1 + if (cmpInsn2 == nullptr || !CheckMopOfCmp(cmpInsn2->GetMachineOpcode()) || !CheckMop(mOperator2)) { return false; } - if (!CheckMopOfCmp(cmpInsn1->GetMachineOpcode()) || !CheckMopOfCmp(cmpInsn2->GetMachineOpcode())) { + + // tbz/tbnz will not be optimized. + if (cgFunc->GetTheCFG()->IsTestAndBranchInsn(*branchInsn1)) { return false; } - /* tbz and cbz will not be optimizsed */ - if (!CheckMop(mOperator1) || !CheckMop(mOperator2)) { - return false; + + if (cgFunc->GetTheCFG()->IsCompareAndBranchInsn(*branchInsn1)) { + cmpInsn1 = nullptr; } + /* two BB has same branch */ std::vector labelOpnd1 = GetLabelOpnds(*branchInsn1); std::vector labelOpnd2 = GetLabelOpnds(*branchInsn2); @@ -1163,6 +1330,11 @@ bool AArch64ICOSameCondPattern::DoOpt(BB &firstIfBB, BB &secondIfBB) const { if (labelOpnd1.size() != 1 || labelOpnd1.size() != 1) { return false; } + if (cmpInsn1 == nullptr && labelOpnd1[0]->GetLabelIndex() != labelOpnd2[0]->GetLabelIndex()) { + if (!CanConvertToSameCond(firstIfBB, secondIfBB)) { + return false; + } + } auto fallthruBBOfFirstIf = firstIfBB.GetNext(); bool fallthruIsSendIfBB = (fallthruBBOfFirstIf->GetLabIdx() == secondIfBB.GetLabIdx()); // Determine if two if bbs have the same successor. @@ -1188,12 +1360,14 @@ bool AArch64ICOSameCondPattern::DoOpt(BB &firstIfBB, BB &secondIfBB) const { ConditionCode ccCode = Encode(branchInsn1->GetMachineOpcode(), fallthruIsSendIfBB); bool inverseCCCode2 = false; // Determine the value of flag NZCV. - if (fallthruIsSendIfBB) { - if (labelOpnd2[0]->GetLabelIndex() == labelOpnd1[0]->GetLabelIndex()) { + if (cmpInsn1 != nullptr) { + if ((fallthruIsSendIfBB && labelOpnd2[0]->GetLabelIndex() == labelOpnd1[0]->GetLabelIndex()) || + (!fallthruIsSendIfBB && labelOpnd2[0]->GetLabelIndex() == fallthruBBOfFirstIf->GetLabIdx())) { inverseCCCode2 = true; } } else { - if (labelOpnd2[0]->GetLabelIndex() == fallthruBBOfFirstIf->GetLabIdx()) { + if ((labelOpnd2[0]->GetLabelIndex() == labelOpnd1[0]->GetLabelIndex()) || + (labelOpnd2[0]->GetLabelIndex() != labelOpnd1[0]->GetLabelIndex() && !fallthruIsSendIfBB)) { inverseCCCode2 = true; } } @@ -1201,25 +1375,96 @@ bool AArch64ICOSameCondPattern::DoOpt(BB &firstIfBB, BB &secondIfBB) const { ASSERT(ccCode != kCcLast, "unknown cond, ccCode can't be kCcLast"); Insn *movInsn = nullptr; /* build ccmp Insn */ - Insn *ccmpInsn = BuildCcmpInsn(ccCode, ccCode2, *cmpInsn2, movInsn); + Insn *ccmpInsn = nullptr; + if (cmpInsn1 != nullptr) { + ccmpInsn = BuildCcmpInsn(ccCode, ccCode2, *cmpInsn2, movInsn); + } else { + if (labelOpnd1[0]->GetLabelIndex() != labelOpnd2[0]->GetLabelIndex()) { + ccmpInsn = BuildCcmpInsn(ccCode, ccCode2, *cmpInsn2, movInsn); + } else { + ccmpInsn = BuildCcmpInsn(ccCode, ccCode2, *branchInsn1, *cmpInsn2); + } + } + if (ccmpInsn == nullptr) { return false; } + auto *nextBB = secondIfBB.GetNext(); /* insert ccmp Insn */ - firstIfBB.InsertInsnBefore(*branchInsn1, *ccmpInsn); - if (movInsn != nullptr) { + if (cmpInsn1 == nullptr && labelOpnd2[0]->GetLabelIndex() != labelOpnd1[0]->GetLabelIndex()) { + (void)firstIfBB.InsertInsnAfter(*branchInsn1, *ccmpInsn); + } else { + (void)firstIfBB.InsertInsnBefore(*branchInsn1, *ccmpInsn); + } + + // insert mov insn + if (movInsn != nullptr && cmpInsn1 != nullptr) { firstIfBB.InsertInsnBefore(*cmpInsn1, *movInsn); } - if (fallthruIsSendIfBB) { - firstIfBB.ReplaceInsn(*branchInsn1, *branchInsn2); - } else { - LabelOperand &targetOpnd = cgFunc->GetOrCreateLabelOperand(*nextBB); - auto &newInsn = cgFunc->GetInsnBuilder()->BuildInsn(AArch64isa::FlipConditionOp(branchInsn2->GetMachineOpcode()), - branchInsn2->GetOperand(0), targetOpnd); - firstIfBB.ReplaceInsn(*branchInsn1, newInsn); + if (movInsn != nullptr && cmpInsn1 == nullptr) { + firstIfBB.InsertInsnBefore(*ccmpInsn, *movInsn); + } + + // insert cmp insn or branch insn + if (cmpInsn1 == nullptr) { + if (labelOpnd2[0]->GetLabelIndex() != labelOpnd1[0]->GetLabelIndex()) { + // firstIfBB's fallthru bb is not secondIfBB in cbz/cbnz optimization scenarios + // for example: + // .L.__1: .L.__1: .L.__1: + // ... ... cmp w1, 0 + // cbnz w1, .L.__3 cbz w1, .L.__2 ccmp w1, 6, 0, ne + // .L.__2: .L.__2: bhs .L.__4 + // ... => .... => .L.__2: + // .L.__3: .L.__3: ... + // cmp w1, #6 cmp w1, #6 .L.__4 + // blo .L.__2 blo .L.__2 ... + // .L.__4: .L.__4: + // ... ... + if (!fallthruIsSendIfBB) { + LabelOperand &targetOpnd = cgFunc->GetOrCreateLabelOperand(*nextBB); + auto &newInsn = cgFunc->GetInsnBuilder()->BuildInsn( + AArch64isa::FlipConditionOp(branchInsn2->GetMachineOpcode()), branchInsn2->GetOperand(0), targetOpnd); + firstIfBB.InsertInsnAfter(*ccmpInsn, newInsn); + } else { + (void)firstIfBB.InsertInsnAfter(*ccmpInsn, *branchInsn2); + } + } else { + (void)firstIfBB.InsertInsnBefore(*ccmpInsn, *cmpInsn2); + } } - auto secondIfLabel = secondIfBB.GetLabIdx(); + + // cbz/cbnz optimization scenarios + if (cmpInsn1 == nullptr) { + // Although two BBs jump to different labels, they can be redirected to the same label. + if (labelOpnd1[0]->GetLabelIndex() != labelOpnd2[0]->GetLabelIndex()) { + firstIfBB.ReplaceInsn(*branchInsn1, ConvertCompBrInsnToCompInsn(*branchInsn1)); + } else { + LabelOperand *targetOpnd = nullptr; + Insn *newInsn = nullptr; + if (fallthruIsSendIfBB) { + targetOpnd = labelOpnd1[0]; + newInsn = &cgFunc->GetInsnBuilder()->BuildInsn(GetBranchCondOpcode(branchInsn1->GetMachineOpcode()), + ccmpInsn->GetOperand(0), *targetOpnd); + } else { + targetOpnd = &cgFunc->GetOrCreateLabelOperand(*nextBB); + newInsn = &cgFunc->GetInsnBuilder()->BuildInsn(AArch64isa::FlipConditionOp(branchInsn2->GetMachineOpcode()), + branchInsn2->GetOperand(0), *targetOpnd); + } + firstIfBB.ReplaceInsn(*branchInsn1, *newInsn); + } + } else { // common cmp optimization scenarios + if (fallthruIsSendIfBB) { + firstIfBB.ReplaceInsn(*branchInsn1, *branchInsn2); + } else { + LabelOperand &targetOpnd = cgFunc->GetOrCreateLabelOperand(*nextBB); + auto &newInsn = cgFunc->GetInsnBuilder()->BuildInsn(AArch64isa::FlipConditionOp(branchInsn2->GetMachineOpcode()), + branchInsn2->GetOperand(0), targetOpnd); + firstIfBB.ReplaceInsn(*branchInsn1, newInsn); + } + } + + auto secondIfLabel = secondIfBB.GetLabIdx(); auto &label2BBMap = cgFunc->GetLab2BBMap(); if (secondIfLabel != MIRLabelTable::GetDummyLabel()) { label2BBMap.erase(secondIfLabel); @@ -1230,7 +1475,7 @@ bool AArch64ICOSameCondPattern::DoOpt(BB &firstIfBB, BB &secondIfBB) const { // \ / (l/u) \ unknown // bb7 bb11 // => - // bb6 + // bb6 // / unkown \ likely // \ \ // bb7 bb11 @@ -1316,8 +1561,8 @@ bool AArch64ICOMorePredsPattern::MovToCsel(std::vector &movInsn, std::vec Operand &opnd1 = insn->GetOperand(kInsnSecondOpnd); ConditionCode ccCode = AArch64ICOPattern::Encode(branchInsn.GetMachineOpcode(), false); ASSERT(ccCode != kCcLast, "unknown cond, ccCode can't be kCcLast"); - CondOperand &cond = static_cast(cgFunc)->GetCondOperand(ccCode); - Operand &rflag = static_cast(cgFunc)->GetOrCreateRflag(); + CondOperand &cond = static_cast(cgFunc)->GetCondOperand(ccCode); + Operand &rflag = static_cast(cgFunc)->GetOrCreateRflag(); RegOperand ®Opnd0 = static_cast(opnd0); RegOperand ®Opnd1 = static_cast(opnd1); /* movInsn's opnd1 is Immediate */ @@ -1550,4 +1795,81 @@ bool AArch64ICOCondSetPattern::DoOpt(BB &curBB) { return true; } +bool AArch64ICOMergeTbzPattern::IsTbzOrTbnzInsn(const Insn *insn) const { + if (insn == nullptr) { + return false; + } + MOperator mop = insn->GetMachineOpcode(); + return (mop == MOP_wtbz) || (mop == MOP_wtbnz) || + (mop == MOP_xtbz) || (mop == MOP_xtbnz); +} + +bool AArch64ICOMergeTbzPattern::Optimize(BB &curBB) { + BB *nextBB = curBB.GetNext(); + if ((curBB.GetKind() != BB::kBBIf) || (nextBB == nullptr) || + (nextBB->GetKind() != BB::kBBIf)) { + return false; + } + lastInsnOfcurBB = curBB.GetLastMachineInsn(); + firstInsnOfnextBB = nextBB->GetFirstMachineInsn(); + if ((!IsTbzOrTbnzInsn(lastInsnOfcurBB)) || (!IsTbzOrTbnzInsn(firstInsnOfnextBB))) { + return false; + } + if (nextBB->GetPreds().size() != 1) { + return false; + } + return DoOpt(curBB, *nextBB); +} + +bool AArch64ICOMergeTbzPattern::DoOpt(BB &curBB, BB &nextBB) const { + RegOperand ®Opnd0 = static_cast(lastInsnOfcurBB->GetOperand(kInsnFirstOpnd)); + RegOperand ®Opnd1 = static_cast(firstInsnOfnextBB->GetOperand(kInsnFirstOpnd)); + LabelOperand &labelOpnd0 = static_cast(lastInsnOfcurBB->GetOperand(kInsnThirdOpnd)); + LabelOperand &labelOpnd1 = static_cast(firstInsnOfnextBB->GetOperand(kInsnThirdOpnd)); + if ((!RegOperand::IsSameRegNO(regOpnd0, regOpnd1)) || (!labelOpnd0.Equals(labelOpnd1))) { + return false; + } + + ImmOperand &immOpnd0 = static_cast(lastInsnOfcurBB->GetOperand(kInsnSecondOpnd)); + ImmOperand &immOpnd1 = static_cast(firstInsnOfnextBB->GetOperand(kInsnSecondOpnd)); + uint64 imm0 = static_cast(immOpnd0.GetValue()); + uint64 imm1 = static_cast(immOpnd1.GetValue()); + if (abs(static_cast(imm0 - imm1)) != k1BitSizeInt) { + return false; + } + + MOperator mop0 = lastInsnOfcurBB->GetMachineOpcode(); + MOperator mop1 = firstInsnOfnextBB->GetMachineOpcode(); + uint64 cmpImm = 0; + uint64 minImm = std::min(imm0, imm1); + if (mop0 == MOP_xtbz || mop0 == MOP_wtbz) { + cmpImm |= (1ULL << imm0); + } + if (mop1 == MOP_xtbz || mop1 == MOP_wtbz) { + cmpImm |= (1ULL << imm1); + } + cmpImm >>= minImm; + + uint32 typeSize = k32BitSize; + if ((imm0 >= k32BitSizeInt) || (imm1 >= k32BitSizeInt)) { + typeSize = k64BitSize; + } + AArch64CGFunc *func = static_cast(cgFunc); + RegOperand &newOpnd = func->GetOpndBuilder()->CreateVReg(typeSize, kRegTyInt); + auto &newUbfxInsn = + func->GetInsnBuilder()->BuildInsn((typeSize == k32BitSize) ? MOP_wubfxrri5i5 : MOP_xubfxrri6i6, + newOpnd, regOpnd0, + func->CreateImmOperand(static_cast(minImm), k8BitSize, false), + func->CreateImmOperand(k2BitSize, k8BitSize, false)); + curBB.ReplaceInsn(*lastInsnOfcurBB, newUbfxInsn); + Operand &rflag = func->GetOrCreateRflag(); + auto &newCmpInsn = + func->GetInsnBuilder()->BuildInsn((typeSize == k32BitSize) ? MOP_wcmpri : MOP_xcmpri, + rflag, newOpnd, + func->CreateImmOperand(static_cast(cmpImm), typeSize, false)); + curBB.AppendInsn(newCmpInsn); + curBB.AppendInsn(func->GetInsnBuilder()->BuildInsn(MOP_bne, rflag, labelOpnd0)); + cgFunc->GetTheCFG()->RemoveBB(nextBB, true); + return true; +} } /* namespace maplebe */ diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_local_schedule.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_local_schedule.cpp index ce84b3a55788c3d766c540e61665299393d6c027..537327e411c2f916638d0288dd4b20bb23f2ff51 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_local_schedule.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_local_schedule.cpp @@ -61,39 +61,4 @@ void AArch64LocalSchedule::FinishScheduling(CDGNode &cdgNode) { commonSchedInfo = nullptr; } - -void AArch64LocalSchedule::DumpInsnInfoByScheduledOrder(CDGNode &cdgNode) const { - LogInfo::MapleLogger() << " ------------------------------------------------\n"; - LogInfo::MapleLogger() << " " << - // '6,8,14' Set the width for printing. - std::setiosflags(std::ios::left) << std::setw(6) << "insn" << std::resetiosflags(std::ios::left) << - std::setiosflags(std::ios::right) << std::setw(8) << "mop" << std::resetiosflags(std::ios::right) << - std::setiosflags(std::ios::right) << std::setw(8) << "bb" << std::resetiosflags(std::ios::right) << - std::setiosflags(std::ios::right) << std::setw(14) << "succs(latency)" << - std::resetiosflags(std::ios::right) << "\n"; - LogInfo::MapleLogger() << " ------------------------------------------------\n"; - BB *curBB = cdgNode.GetBB(); - ASSERT(curBB != nullptr, "get bb from cdgNode failed"); - FOR_BB_INSNS_CONST(insn, curBB) { - if (!insn->IsMachineInstruction()) { - continue; - } - LogInfo::MapleLogger() << " " << - std::setiosflags(std::ios::left) << std::setw(6) << insn->GetId() << std::resetiosflags(std::ios::left) << - std::setiosflags(std::ios::right) << std::setw(8); - const InsnDesc *md = &AArch64CG::kMd[insn->GetMachineOpcode()]; - LogInfo::MapleLogger() << md->name << std::resetiosflags(std::ios::right) << - std::setiosflags(std::ios::right) << std::setw(8) << curBB->GetId() << std::resetiosflags(std::ios::right) << - std::setiosflags(std::ios::right) << std::setw(14); - const DepNode *depNode = insn->GetDepNode(); - ASSERT(depNode != nullptr, "get depNode from insn failed"); - for (auto succLink : depNode->GetSuccs()) { - DepNode &succNode = succLink->GetTo(); - LogInfo::MapleLogger() << succNode.GetInsn()->GetId() << "(" << succLink->GetLatency() << "), "; - } - LogInfo::MapleLogger() << std::resetiosflags(std::ios::right) << "\n"; - } - LogInfo::MapleLogger() << " ------------------------------------------------\n"; - LogInfo::MapleLogger() << "\n"; -} } /* namespace maplebe */ diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_optimize_common.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_optimize_common.cpp index e2305f49169b4f324d6cb21f3d7d4503c97d00ae..2b4ec2c8ceb669e53a543babfe2251a47b84bde0 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_optimize_common.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_optimize_common.cpp @@ -48,27 +48,22 @@ void AArch64InsnVisitor::ModifyJumpTarget(BB &newTarget, BB &bb) { } Insn *AArch64InsnVisitor::CloneInsn(Insn &originalInsn) { - MemPool *memPool = const_cast(CG::GetCurCGFunc()->GetMemoryPool()); - if (originalInsn.IsTargetInsn()) { - return memPool->Clone(originalInsn); + // Use custom deep copy + MapleAllocator *allocator = GetCGFunc()->GetFuncScopeAllocator(); + if (originalInsn.IsTargetInsn() || originalInsn.IsComment()) { + return originalInsn.CloneTree(*allocator); } else if (originalInsn.IsCfiInsn()) { - return memPool->Clone(*static_cast(&originalInsn)); + return static_cast(originalInsn).CloneTree(*allocator); } else if (originalInsn.IsDbgInsn()) { - return memPool->Clone(*static_cast(&originalInsn)); - } - if (originalInsn.IsComment()) { - return memPool->Clone(originalInsn); + return static_cast(originalInsn).CloneTree(*allocator); } CHECK_FATAL(false, "Cannot clone"); - return nullptr; } -/* - * Precondition: The given insn is a jump instruction. - * Get the jump target label from the given instruction. - * Note: MOP_xbr is a branching instruction, but the target is unknown at compile time, - * because a register instead of label. So we don't take it as a branching instruction. - */ +// Precondition: The given insn is a jump instruction. +// Get the jump target label from the given instruction. +// Note: MOP_xbr is a branching instruction, but the target is unknown at compile time, +// because a register instead of label. So we don't take it as a branching instruction. LabelIdx AArch64InsnVisitor::GetJumpLabel(const Insn &insn) const { uint32 operandIdx = AArch64isa::GetJumpTargetIdx(insn); if (insn.GetOperand(operandIdx).IsLabelOpnd()) { @@ -100,6 +95,8 @@ bool AArch64InsnVisitor::IsCompareInsn(const Insn &insn) const { case MOP_wcmnrr: case MOP_xcmnri: case MOP_xcmnrr: + case MOP_wwcmprre: + case MOP_xwcmprre: return true; default: return false; @@ -118,6 +115,18 @@ bool AArch64InsnVisitor::IsCompareAndBranchInsn(const Insn &insn) const { } } +bool AArch64InsnVisitor::IsTestAndBranchInsn(const Insn &insn) const { + switch (insn.GetMachineOpcode()) { + case MOP_xtbz: + case MOP_wtbz: + case MOP_xtbnz: + case MOP_wtbnz: + return true; + default: + return false; + } +} + bool AArch64InsnVisitor::IsAddOrSubInsn(const Insn &insn) const { switch (insn.GetMachineOpcode()) { case MOP_xaddrrr: @@ -174,7 +183,7 @@ BB *AArch64InsnVisitor::CreateGotoBBAfterCondBB(BB &bb, BB &fallthru, bool isTar Insn &gotoInsn = GetCGFunc()->GetInsnBuilder()->BuildInsn(MOP_xuncond, targetOpnd); newBB->AppendInsn(gotoInsn); - /* maintain pred and succ */ + // maintain pred and succ if (!isTargetFallthru) { fallthru.RemovePreds(bb); } @@ -196,4 +205,4 @@ void AArch64InsnVisitor::ModifyFathruBBToGotoBB(BB &bb, LabelIdx labelIdx) const bb.AppendInsn(jumpInsn); bb.SetKind(BB::kBBGoto); } -} /* namespace maplebe */ +} // namespace maplebe diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_peep.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_peep.cpp index 7c5e38eef34b1983bf2a8f2d068761cb981cbf2c..fcaf478379d401702b0f6c08ecac1df3a04df0a8 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_peep.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_peep.cpp @@ -20,6 +20,7 @@ #include "aarch64_utils.h" #include "cg_irbuilder.h" #include "aarch64_cg.h" +#include "aarch64_mem_reference.h" namespace maplebe { #define JAVALANG (cgFunc->GetMirModule().IsJavaModule()) @@ -155,6 +156,7 @@ bool AArch64CGPeepHole::DoSSAOptimize(BB &bb, Insn &insn) { } case MOP_wcsetrc: case MOP_xcsetrc: { + manager->Optimize(true); manager->Optimize(true); manager->Optimize(true); break; @@ -187,6 +189,7 @@ bool AArch64CGPeepHole::DoSSAOptimize(BB &bb, Insn &insn) { } case MOP_wcselrrrc: case MOP_xcselrrrc: { + manager->Optimize(true); manager->Optimize(true); manager->Optimize(true); break; @@ -944,6 +947,31 @@ void CselToCsetPattern::Run(BB &bb, Insn &insn) { } } +bool CselToMovPattern::CheckCondition(Insn &insn) { + MOperator mop = insn.GetMachineOpcode(); + if (mop != MOP_wcselrrrc && mop != MOP_xcselrrrc) { + return false; + } + + if (!RegOperand::IsSameReg(insn.GetOperand(kInsnSecondOpnd), insn.GetOperand(kInsnThirdOpnd))) { + return false; + } + + return true; +} + +void CselToMovPattern::Run(BB &bb, Insn &insn) { + if (!CheckCondition(insn)) { + return; + } + + MOperator newMop = insn.GetMachineOpcode() == MOP_wcselrrrc ? MOP_wmovrr : MOP_xmovrr; + Insn &newInsn = cgFunc->GetInsnBuilder()->BuildInsn(newMop, insn.GetOperand(kInsnFirstOpnd), + insn.GetOperand(kInsnSecondOpnd)); + + bb.ReplaceInsn(insn, newInsn); +} + bool CselToCsincRemoveMovPattern::IsOpndMovOneAndNewOpndOpt(const Insn &curInsn) { auto &insnThirdOpnd = static_cast(curInsn.GetOperand(kInsnThirdOpnd)); auto &insnSecondOpnd = static_cast(curInsn.GetOperand(kInsnSecondOpnd)); @@ -957,7 +985,7 @@ bool CselToCsincRemoveMovPattern::IsOpndMovOneAndNewOpndOpt(const Insn &curInsn) MOperator insnSecondOpndDefMop = insnSecondOpndDefInsn->GetMachineOpcode(); if (insnThirdOpndDefMop == MOP_wmovri32 || insnThirdOpndDefMop == MOP_xmovri64) { prevMovInsn = insnThirdOpndDefInsn; - } else if (insnSecondOpndDefMop == MOP_wmovri32 || insnSecondOpndDefMop == MOP_xmovri64){ + } else if (insnSecondOpndDefMop == MOP_wmovri32 || insnSecondOpndDefMop == MOP_xmovri64) { prevMovInsn = insnSecondOpndDefInsn; needReverseCond = true; } else { @@ -1209,7 +1237,6 @@ void AndCmpBranchesToTbzPattern::Run(BB &bb, Insn &insn) { } bool AndAndCmpBranchesToTstPattern::CheckAndSelectPattern(const Insn &currInsn) { - MOperator curMop = currInsn.GetMachineOpcode(); MOperator prevAndMop = prevAndInsn->GetMachineOpcode(); MOperator prevPrevAndMop = prevPrevAndInsn->GetMachineOpcode(); if (prevAndMop != prevPrevAndMop) { @@ -1223,25 +1250,60 @@ bool AndAndCmpBranchesToTstPattern::CheckAndSelectPattern(const Insn &currInsn) static_cast(prevPrevAndImmOpnd.GetValue() + 1)) == 0)) { bool isWOrX = (prevAndMop == MOP_wandrri12 && prevPrevAndMop == MOP_wandrri12); newEorMop = isWOrX ? MOP_weorrrr : MOP_xeorrrr; + newTstMop = isWOrX ? MOP_wtstri32 : MOP_xtstri64; tstImmVal = prevAndImmOpnd.GetValue(); - switch (curMop) { - case MOP_bne: - newTstMop = isWOrX ? MOP_wtstri32 : MOP_xtstri64; - break; - default: - return false; - } return true; } return false; } + +bool AndAndCmpBranchesToTstPattern::CheckCondInsn(Insn &insn) { + if (insn.GetMachineOpcode() == MOP_bne || insn.GetMachineOpcode() == MOP_beq) { + ccReg = static_cast(&insn.GetOperand(kInsnFirstOpnd)); + return true; + } + if (!insn.IsCondDef()) { + return false; + } + CondOperand *condOpnd = nullptr; + for (uint32 i = 0; i < insn.GetOperandSize(); ++i) { + if (insn.GetDesc()->GetOpndDes(i) == &OpndDesc::Cond) { + condOpnd = static_cast(&insn.GetOperand(i)); + } else if (insn.GetDesc()->GetOpndDes(i) == &OpndDesc::CCS) { + ccReg = static_cast(&insn.GetOperand(i)); + } + } + if (condOpnd == nullptr || ccReg == nullptr) { + return false; + } + return (condOpnd->GetCode() == CC_NE || condOpnd->GetCode() == CC_EQ); +} + +Insn *AndAndCmpBranchesToTstPattern::CheckAndGetPrevAndDefInsn(const RegOperand ®Opnd) const { + if (!regOpnd.IsSSAForm()) { + return nullptr; + } + auto *regVersion = ssaInfo->FindSSAVersion(regOpnd.GetRegisterNumber()); + ASSERT(regVersion != nullptr, "UseVRegVersion must not be null based on ssa"); + if (regVersion->GetAllUseInsns().size() != 1) { // only one use point can do opt + return nullptr; + } + auto *defInfo = regVersion->GetDefInsnInfo(); + if (defInfo == nullptr) { + return nullptr; + } + auto andMop = defInfo->GetInsn()->GetMachineOpcode(); + if (andMop != MOP_wandrri12 && andMop != MOP_xandrri13) { + return nullptr; + } + return defInfo->GetInsn(); +} + bool AndAndCmpBranchesToTstPattern::CheckCondition(Insn &insn) { - MOperator curMop = insn.GetMachineOpcode(); - if (curMop != MOP_bne) { + if (!CheckCondInsn(insn)) { return false; } - auto &ccReg = static_cast(insn.GetOperand(kInsnFirstOpnd)); - prevCmpInsn = ssaInfo->GetDefInsn(ccReg); + prevCmpInsn = ssaInfo->GetDefInsn(*ccReg); if (prevCmpInsn == nullptr) { return false; } @@ -1249,19 +1311,12 @@ bool AndAndCmpBranchesToTstPattern::CheckCondition(Insn &insn) { if (prevCmpMop != MOP_wcmprr && prevCmpMop != MOP_xcmprr) { return false; } - auto &cmpFirstReg = static_cast(prevCmpInsn->GetOperand(kInsnSecondOpnd)); - auto &cmpSecondReg = static_cast(prevCmpInsn->GetOperand(kInsnThirdOpnd)); - prevAndInsn = ssaInfo->GetDefInsn(cmpSecondReg); - prevPrevAndInsn = ssaInfo->GetDefInsn(cmpFirstReg); - if (prevAndInsn == nullptr || prevPrevAndInsn == nullptr) { - return false; - } - MOperator prevAndMop = prevAndInsn->GetMachineOpcode(); - if (prevAndMop != MOP_wandrri12 && prevAndMop != MOP_xandrri13) { + prevAndInsn = CheckAndGetPrevAndDefInsn(static_cast(prevCmpInsn->GetOperand(kInsnThirdOpnd))); + if (prevAndInsn == nullptr) { return false; } - MOperator prevPrevAndMop = prevPrevAndInsn->GetMachineOpcode(); - if (prevPrevAndMop != MOP_wandrri12 && prevPrevAndMop != MOP_xandrri13) { + prevPrevAndInsn = CheckAndGetPrevAndDefInsn(static_cast(prevCmpInsn->GetOperand(kInsnSecondOpnd))); + if (prevPrevAndInsn == nullptr) { return false; } if (!CheckAndSelectPattern(insn)) { @@ -1269,6 +1324,7 @@ bool AndAndCmpBranchesToTstPattern::CheckCondition(Insn &insn) { } return true; } + void AndAndCmpBranchesToTstPattern ::Run(BB &bb, Insn &insn) { if (!CheckCondition(insn)) { return; @@ -1301,6 +1357,7 @@ void AndAndCmpBranchesToTstPattern ::Run(BB &bb, Insn &insn) { DumpAfterPattern(prevs, &newEorInsn, &newTstInsn); } } + bool ZeroCmpBranchesToTbzPattern::CheckAndSelectPattern(const Insn &currInsn) { MOperator currMop = currInsn.GetMachineOpcode(); MOperator prevMop = preInsn->GetMachineOpcode(); @@ -1731,7 +1788,6 @@ bool AndCbzToTbzPattern::CheckCondition(Insn &insn) { void AndCbzToTbzPattern::Run(BB &bb, Insn &insn) { auto *aarchFunc = static_cast(cgFunc); - bool isDeleted = false; if (!CheckCondition(insn)) { return; } @@ -1763,32 +1819,34 @@ void AndCbzToTbzPattern::Run(BB &bb, Insn &insn) { ImmOperand &tbzImm = aarchFunc->CreateImmOperand(tbzVal, k8BitSize, false); Insn *newInsn = nullptr; // if bit offset is invalid (implicit zero), then it should be a unconditional branch - if(!aarchFunc->IsOperandImmValid(newMop, &tbzImm, kInsnSecondOpnd)) { + if (!aarchFunc->IsOperandImmValid(newMop, &tbzImm, kInsnSecondOpnd)) { // cfg adjustment in ssa is complicate, so we just bypass this pattern if imm is invalid. if (ssaInfo) { return; } + bool delEdgeWithTarget = false; if (newMop == MOP_wtbz) { newInsn = &aarchFunc->GetInsnBuilder()->BuildInsn(MOP_xuncond, labelOpnd); - BB *bbFt = bb.GetNext(); - bbFt->RemovePreds(bb); bb.SetKind(BB::kBBGoto); - bb.RemoveSuccs(*bbFt); } else if (newMop == MOP_wtbnz) { - BB *targetBB = cgFunc->GetBBFromLab2BBMap(labelOpnd.GetLabelIndex()); - targetBB->RemovePreds(bb); bb.SetKind(BB::kBBFallthru); - bb.RemoveSuccs(*targetBB); bb.RemoveInsn(insn); - isDeleted = true; + delEdgeWithTarget = true; } else { CHECK_FATAL(false, "only wtbz/wtbnz can have invalid imm"); } + auto *bbFt = bb.GetNext(); + auto *targetBB = cgFunc->GetBBFromLab2BBMap(labelOpnd.GetLabelIndex()); + if (targetBB != bbFt) { // when targetBB is ftBB, we cannot remove preds/succs + auto *delEdgeBB = delEdgeWithTarget ? targetBB : bbFt; + delEdgeBB->RemovePreds(bb); + bb.RemoveSuccs(*delEdgeBB); + } } else { newInsn = &cgFunc->GetInsnBuilder()->BuildInsn(newMop, prevInsn->GetOperand(kInsnSecondOpnd), tbzImm, labelOpnd); } - if (!isDeleted) { + if (newInsn != nullptr) { bb.ReplaceInsn(insn, *newInsn); SetCurrInsn(newInsn); } @@ -2533,7 +2591,7 @@ void OneHoleBranchPattern::Run(BB &bb, Insn &insn) { auto ®Operand = static_cast(prePrevInsn->GetOperand(kInsnSecondOpnd)); Insn &newTbzInsn = cgFunc->GetInsnBuilder()->BuildInsn(newOp, regOperand, oneHoleOpnd, label); if (!VERIFY_INSN(&newTbzInsn)) { - return; + return; } bb.ReplaceInsn(insn, newTbzInsn); ssaInfo->ReplaceInsn(insn, newTbzInsn); @@ -2647,7 +2705,9 @@ void AArch64CGPeepHole::DoNormalOptimize(BB &bb, Insn &insn) { } case MOP_xubfxrri6i6: { manager->NormalPatternOpt(!cgFunc->IsAfterRegAlloc()); - manager->NormalPatternOpt(!cgFunc->IsAfterRegAlloc()); + if (!manager->OptSuccess()) { + manager->NormalPatternOpt(!cgFunc->IsAfterRegAlloc()); + } break; } case MOP_xmovzri16: { @@ -2686,8 +2746,12 @@ void AArch64CGPeepHole::DoNormalOptimize(BB &bb, Insn &insn) { case MOP_qldr: case MOP_qstr: { manager->NormalPatternOpt(cgFunc->IsAfterRegAlloc()); - manager->NormalPatternOpt(cgFunc->IsAfterRegAlloc()); - manager->NormalPatternOpt(cgFunc->IsAfterRegAlloc()); + if (!manager->OptSuccess()) { + manager->NormalPatternOpt(cgFunc->IsAfterRegAlloc()); + } + if (!manager->OptSuccess()) { + manager->NormalPatternOpt(cgFunc->IsAfterRegAlloc()); + } break; } case MOP_xvmovrv: @@ -2711,7 +2775,9 @@ void AArch64CGPeepHole::DoNormalOptimize(BB &bb, Insn &insn) { case MOP_wcbnz: case MOP_xcbnz: { manager->NormalPatternOpt(!cgFunc->IsAfterRegAlloc()); - manager->NormalPatternOpt(cgFunc->IsAfterRegAlloc()); + if (!manager->OptSuccess()) { + manager->NormalPatternOpt(cgFunc->IsAfterRegAlloc()); + } break; } case MOP_xsxtb32: @@ -2764,6 +2830,7 @@ void AArch64CGPeepHole::DoNormalOptimize(BB &bb, Insn &insn) { case MOP_wcselrrrc: case MOP_xcselrrrc: { manager->NormalPatternOpt(cgFunc->IsAfterRegAlloc()); + manager->NormalPatternOpt(!cgFunc->IsAfterRegAlloc()); break; } default: @@ -2833,6 +2900,7 @@ void AArch64PrePeepHole::Run(BB &bb, Insn &insn) { void AArch64PrePeepHole1::InitOpts() { optimizations.resize(kPeepholeOptsNum); optimizations[kAddCmpZeroOpt] = optOwnMemPool->New(cgFunc); + optimizations[kCombineMovInsnBeforeCSelOpt] = optOwnMemPool->New(cgFunc); } void AArch64PrePeepHole1::Run(BB &bb, Insn &insn) { @@ -2843,6 +2911,11 @@ void AArch64PrePeepHole1::Run(BB &bb, Insn &insn) { (static_cast(optimizations[kAddCmpZeroOpt]))->Run(bb, insn); break; } + case MOP_wcselrrrc: + case MOP_xcselrrrc: { + (static_cast(optimizations[kCombineMovInsnBeforeCSelOpt]))->Run(bb, insn); + break; + } default: break; } @@ -3034,74 +3107,67 @@ bool IsSameRegisterOperation(const RegOperand &desMovOpnd, (uxtDestOpnd.GetRegisterNumber() == uxtFromOpnd.GetRegisterNumber())); } -bool CombineContiLoadAndStorePattern::IsRegNotSameMemUseInInsn(const Insn &insn, regno_t regNO, bool isStore, - int64 baseOfst) const { - uint32 opndNum = insn.GetOperandSize(); - bool sameMemAccess = false; /* both store or load */ - if (insn.IsStore() == isStore) { - sameMemAccess = true; - } +bool CombineContiLoadAndStorePattern::IsRegNotSameMemUseInInsn(const Insn &checkInsn, const Insn &curInsn, + regno_t curBaseRegNO, bool isCurStore, + int64 curBaseOfst, int64 curBaseMemRange) const { + uint32 opndNum = checkInsn.GetOperandSize(); for (uint32 i = 0; i < opndNum; ++i) { - Operand &opnd = insn.GetOperand(i); + Operand &opnd = checkInsn.GetOperand(i); if (opnd.IsList()) { auto &listOpnd = static_cast(opnd); for (auto &listElem : listOpnd.GetOperands()) { auto *regOpnd = static_cast(listElem); ASSERT(regOpnd != nullptr, "parameter operand must be RegOperand"); - if (regNO == regOpnd->GetRegisterNumber()) { + if (curBaseRegNO == regOpnd->GetRegisterNumber()) { return true; } } } else if (opnd.IsMemoryAccessOperand()) { auto &memOperand = static_cast(opnd); - RegOperand *base = memOperand.GetBaseRegister(); - /* need check offset as well */ + RegOperand *checkBaseReg = memOperand.GetBaseRegister(); + // If the BASEREG of the two MEM insns are different, we use cg-mem-reference to check the alias of two MEM: + // if there is no alias, we can combine MEM pair cross the MEM insn. + // e.g. + // str x1, [x9] + // str x6, [x2] + // str x3, [x9, #8] regno_t stackBaseRegNO = cgFunc->UseFP() ? R29 : RSP; - if (!sameMemAccess && base != nullptr) { - regno_t curBaseRegNO = base->GetRegisterNumber(); - auto memBarrierRange = static_cast(insn.IsLoadStorePair() ? k16BitSize : k8BitSize); - if (!(curBaseRegNO == regNO && memOperand.GetAddrMode() == MemOperand::kBOI && - memOperand.GetOffsetImmediate() != nullptr && - (memOperand.GetOffsetImmediate()->GetOffsetValue() <= (baseOfst - memBarrierRange) || - memOperand.GetOffsetImmediate()->GetOffsetValue() >= (baseOfst + memBarrierRange)))) { - return true; - } - } - /* do not trust the following situation : - * str x1, [x9] - * str x6, [x2] - * str x3, [x9, #8] - */ - if (isStore && regNO != stackBaseRegNO && base != nullptr && - base->GetRegisterNumber() != stackBaseRegNO && base->GetRegisterNumber() != regNO) { + if ((isCurStore || checkInsn.IsStore()) && checkBaseReg != nullptr && !(curBaseRegNO == stackBaseRegNO && + checkBaseReg->GetRegisterNumber() == stackBaseRegNO) && checkBaseReg->GetRegisterNumber() != curBaseRegNO && + AArch64MemReference::HasAliasMemoryDep(checkInsn, curInsn, kDependenceTypeNone)) { return true; } - if (isStore && base != nullptr && base->GetRegisterNumber() == regNO) { - if (memOperand.GetAddrMode() == MemOperand::kBOI && memOperand.GetOffsetImmediate() != nullptr) { - int64 curOffset = memOperand.GetOffsetImmediate()->GetOffsetValue(); - if (memOperand.GetSize() == k64BitSize) { - auto memBarrierRange = static_cast(insn.IsLoadStorePair() ? k16BitSize : k8BitSize); - if (curOffset < baseOfst + memBarrierRange && - curOffset > baseOfst - memBarrierRange) { - return true; - } - } else if (memOperand.GetSize() == k32BitSize) { - auto memBarrierRange = static_cast(insn.IsLoadStorePair() ? k8BitSize : k4BitSize); - if (curOffset < baseOfst + memBarrierRange && - curOffset > baseOfst - memBarrierRange) { - return true; - } + // Check memory overlap + if ((isCurStore || checkInsn.IsStore()) && checkBaseReg != nullptr && + memOperand.GetAddrMode() == MemOperand::kBOI && memOperand.GetOffsetImmediate() != nullptr) { + // If memInsn is split with x16, we need to find the actual base register + int64 checkOffset = memOperand.GetOffsetImmediate()->GetOffsetValue(); + regno_t checkRegNO = checkBaseReg->GetRegisterNumber(); + if (checkRegNO == R16) { + const Insn *prevInsn = checkInsn.GetPrev(); + // Before cgaggressiveopt, the def and use of R16 must be adjacent, and the def of R16 must be addrri, + // otherwise, the process is conservative and the mem insn that can be combined is not search forward. + if (prevInsn == nullptr || prevInsn->GetMachineOpcode() != MOP_xaddrri12 || + static_cast(prevInsn->GetOperand(kInsnFirstOpnd)).GetRegisterNumber() != R16) { + return true; } + checkOffset += static_cast(prevInsn->GetOperand(kInsnThirdOpnd)).GetValue(); + } + auto curMemRange = static_cast(checkInsn.GetMemoryByteSize()); + // curOfst curOfst+curMemRange + // |______|_/_/_/_/_/_/_/_/_/_/_|____________| + if ((curBaseOfst >= checkOffset && curBaseOfst < (checkOffset + curMemRange)) || + (checkOffset >= curBaseOfst && checkOffset < (curBaseOfst + curBaseMemRange))) { + return true; } } } else if (opnd.IsConditionCode()) { - Operand &rflagOpnd = cgFunc->GetOrCreateRflag(); - auto &rflagReg = static_cast(rflagOpnd); - if (rflagReg.GetRegisterNumber() == regNO) { + auto &rflagOpnd = static_cast(cgFunc->GetOrCreateRflag()); + if (rflagOpnd.GetRegisterNumber() == curBaseRegNO) { return true; } } else if (opnd.IsRegister()) { - if (!isStore && static_cast(opnd).GetRegisterNumber() == regNO) { + if (!isCurStore && static_cast(opnd).GetRegisterNumber() == curBaseRegNO) { return true; } } @@ -3119,14 +3185,17 @@ std::vector CombineContiLoadAndStorePattern::FindPrevStrLdr(Insn &insn, r if (curInsn->IsRegDefined(memBaseRegNO)) { return prevContiInsns; } - if (IsRegNotSameMemUseInInsn(*curInsn, memBaseRegNO, insn.IsStore(), static_cast(baseOfst))) { + ASSERT(insn.GetOperand(kInsnSecondOpnd).IsMemoryAccessOperand(), "invalid mem insn"); + auto baseMemRange = static_cast(insn.GetMemoryByteSize()); + if (IsRegNotSameMemUseInInsn(*curInsn, insn, memBaseRegNO, insn.IsStore(), static_cast(baseOfst), + baseMemRange)) { return prevContiInsns; } - /* record continuous STD/LDR insn */ + // record continuous STD/LDR insn if (!curInsn->IsLoadStorePair() && ((insn.IsStore() && curInsn->IsStore()) || (insn.IsLoad() && curInsn->IsLoad()))) { auto *memOperand = static_cast(curInsn->GetMemOpnd()); - /* do not combine ldr r0, label */ + // do not combine ldr r0, label if (memOperand != nullptr) { auto *baseRegOpnd = static_cast(memOperand->GetBaseRegister()); ASSERT(baseRegOpnd == nullptr || !baseRegOpnd->IsVirtualRegister(), "physical reg has not been allocated?"); @@ -3135,11 +3204,10 @@ std::vector CombineContiLoadAndStorePattern::FindPrevStrLdr(Insn &insn, r } } } - /* ldr x8, [x21, #8] - * call foo() - * ldr x9, [x21, #16] - * although x21 is a calleeSave register, there is no guarantee data in memory [x21] is not changed - */ + // ldr x8, [x21, #8] + // call foo() + // ldr x9, [x21, #16] + // although x21 is a calleeSave register, there is no guarantee data in memory [x21] is not changed if (curInsn->IsCall() || curInsn->GetMachineOpcode() == MOP_asm || curInsn->ScanReg(destRegNO)) { return prevContiInsns; } @@ -3160,7 +3228,7 @@ bool CombineContiLoadAndStorePattern::CheckCondition(Insn &insn) { return true; } -/* Combining 2 STRs into 1 stp or 2 LDRs into 1 ldp */ +// Combining 2 STRs into 1 stp or 2 LDRs into 1 ldp void CombineContiLoadAndStorePattern::Run(BB &bb, Insn &insn) { if (!CheckCondition(insn)) { return; @@ -3191,7 +3259,7 @@ void CombineContiLoadAndStorePattern::Run(BB &bb, Insn &insn) { MemOperand *combineMemOpnd = (curOfstVal < prevOfstVal) ? curMemOpnd : prevMemOpnd; if (IsValidNormalLoadOrStorePattern(insn, *prevContiInsn, *curMemOpnd, curOfstVal, prevOfstVal)) { - /* Process normal mem pair */ + // Process normal mem pair MOperator newMop = GetMopPair(insn.GetMachineOpcode(), true); Insn *combineInsn = GenerateMemPairInsn(newMop, curDestOpnd, prevDestOpnd, *combineMemOpnd, curOfstVal < prevOfstVal); @@ -3200,17 +3268,19 @@ void CombineContiLoadAndStorePattern::Run(BB &bb, Insn &insn) { if (!(static_cast(*cgFunc).IsOperandImmValid(newMop, combineMemOpnd, isPairAfterCombine ? kInsnThirdOpnd : kInsnSecondOpnd))) { if (FindUseX16AfterInsn(*prevContiInsn)) { - /* Do not combine Insns when x16 was used after curInsn */ + // Do not combine Insns when x16 was used after curInsn bb.RemoveInsn(*combineInsn); return; } SPLIT_INSN(combineInsn, cgFunc); } RemoveInsnAndKeepComment(bb, insn, *prevContiInsn); + SetCurrInsn(combineInsn); + optSuccess = true; return; } else if (IsValidStackArgLoadOrStorePattern(insn, *prevContiInsn, *curMemOpnd, *prevMemOpnd, curOfstVal, prevOfstVal)) { - /* Process stack-arg mem pair */ + // Process stack-arg mem pair regno_t curDestRegNo = curDestOpnd.GetRegisterNumber(); regno_t prevDestRegNo = prevDestOpnd.GetRegisterNumber(); RegOperand &newDest = static_cast(cgFunc)->GetOrCreatePhysicalRegisterOperand( @@ -3224,6 +3294,8 @@ void CombineContiLoadAndStorePattern::Run(BB &bb, Insn &insn) { Insn *combineInsn = GenerateMemPairInsn(newMop, newDest, newPrevDest, *combineMemOpnd, curOfstVal < prevOfstVal); bb.InsertInsnAfter(*prevContiInsn, *combineInsn); RemoveInsnAndKeepComment(bb, insn, *prevContiInsn); + SetCurrInsn(combineInsn); + optSuccess = true; return; } } @@ -3261,12 +3333,12 @@ Insn *CombineContiLoadAndStorePattern::GenerateMemPairInsn(MOperator newMop, Reg bool isCurDestFirst) { ASSERT(newMop != MOP_undef, "invalid MOperator"); Insn *combineInsn = nullptr; - if (isPairAfterCombine) { /* for ldr/str --> ldp/stp */ + if (isPairAfterCombine) { // for ldr/str --> ldp/stp combineInsn = (isCurDestFirst) ? &cgFunc->GetInsnBuilder()->BuildInsn(newMop, curDestOpnd, prevDestOpnd, combineMemOpnd) : &cgFunc->GetInsnBuilder()->BuildInsn(newMop, prevDestOpnd, curDestOpnd, combineMemOpnd); - } else { /* for strb/strh --> strh/str, curDestOpnd == preDestOpnd */ + } else { // for strb/strh --> strh/str, curDestOpnd == preDestOpnd combineInsn = &cgFunc->GetInsnBuilder()->BuildInsn(newMop, curDestOpnd, combineMemOpnd); combineMemOpnd.SetSize(newMop == MOP_wstrh ? maplebe::k16BitSize : maplebe::k32BitSize); } @@ -3346,7 +3418,7 @@ bool CombineContiLoadAndStorePattern::IsValidStackArgLoadOrStorePattern(const In } void CombineContiLoadAndStorePattern::RemoveInsnAndKeepComment(BB &bb, Insn &insn, Insn &prevInsn) const { - /* keep the comment */ + // keep the comment Insn *nn = prevInsn.GetNextMachineInsn(); std::string newComment = ""; MapleString comment = insn.GetComment(); @@ -3878,9 +3950,13 @@ void ContiLDRorSTRToSameMEMPattern::Run(BB &bb, Insn &insn) { if (!moveSameReg) { (void)bb.InsertInsnAfter(*prevInsn, cgFunc->GetInsnBuilder()->BuildInsn(newOp, reg1, reg2)); } + SetCurrInsn(insn.GetNextMachineInsn()); + optSuccess = true; bb.RemoveInsn(insn); } else if (reg1.GetRegisterNumber() == reg2.GetRegisterNumber() && base1->GetRegisterNumber() != reg2.GetRegisterNumber()) { + SetCurrInsn(insn.GetNextMachineInsn()); + optSuccess = true; bb.RemoveInsn(insn); } } @@ -4258,31 +4334,37 @@ void AndCbzBranchesToTstPattern::Run(BB &bb, Insn &insn) { bb.ReplaceInsn(*nextInsn, newInsnJmp); } -/* - * help function for DeleteMovAfterCbzOrCbnz - * input: - * bb: the bb to be checked out - * checkCbz: to check out BB end with cbz or cbnz, if cbz, input true - * opnd: for MOV reg, #0, opnd indicate reg - * return: - * according to cbz, return true if insn is cbz or cbnz and the first operand of cbz(cbnz) is same as input - * operand - */ -bool DeleteMovAfterCbzOrCbnzAArch64::PredBBCheck(BB &bb, bool checkCbz, const Operand &opnd) const { +// help function for DeleteMovAfterCbzOrCbnz +// input: bb: the bb to be checked out +// checkCbz: to check out BB end with cbz or cbnz, if cbz, input true +// opnd: for MOV reg, #0, opnd indicate reg +// return: according to cbz, return true if insn is cbz or cbnz and the first operand of cbz(cbnz) is same as input +// operand +bool DeleteMovAfterCbzOrCbnzAArch64::PredBBCheck(BB &bb, bool checkCbz, const Operand &opnd, bool is64BitOnly) const { if (bb.GetKind() != BB::kBBIf) { return false; } + if (bb.GetNext() == maplebe::CGCFG::GetTargetSuc(bb)) { + return false; + } + Insn *condBr = cgcfg->FindLastCondBrInsn(bb); ASSERT(condBr != nullptr, "condBr must be found"); if (!cgcfg->IsCompareAndBranchInsn(*condBr)) { return false; } MOperator mOp = condBr->GetMachineOpcode(); - if (checkCbz && mOp != MOP_wcbz && mOp != MOP_xcbz) { + if (is64BitOnly && checkCbz && mOp != MOP_xcbz) { + return false; + } + if (is64BitOnly && !checkCbz && mOp != MOP_xcbnz) { return false; } - if (!checkCbz && mOp != MOP_xcbnz && mOp != MOP_wcbnz) { + if (!is64BitOnly && checkCbz && mOp != MOP_xcbz && mOp != MOP_wcbz) { + return false; + } + if (!is64BitOnly && !checkCbz && mOp != MOP_xcbnz && mOp != MOP_wcbnz) { return false; } return RegOperand::IsSameRegNO(condBr->GetOperand(kInsnFirstOpnd), opnd); @@ -4314,7 +4396,7 @@ bool DeleteMovAfterCbzOrCbnzAArch64::OpndDefByMovZero(const Insn &insn) const { } } -/* check whether predefine insn of first operand of test_insn is exist in current BB */ +// check whether predefine insn of first operand of test_insn is exist in current BB bool DeleteMovAfterCbzOrCbnzAArch64::NoPreDefine(Insn &testInsn) const { Insn *nextInsn = nullptr; for (Insn *insn = testInsn.GetBB()->GetFirstMachineInsn(); insn != nullptr && insn != &testInsn; insn = nextInsn) { @@ -4355,14 +4437,68 @@ bool DeleteMovAfterCbzOrCbnzAArch64::NoPreDefine(Insn &testInsn) const { } return true; } + +bool DeleteMovAfterCbzOrCbnzAArch64::NoMoreThan32BitUse(Insn &testInsn) const { + auto &testOpnd = static_cast(testInsn.GetOperand(kFirstOpnd)); + InsnSet regUseInsnSet = cgFunc.GetRD()->FindUseForRegOpnd(testInsn, kInsnFirstOpnd, false); + for (auto useInsn : regUseInsnSet) { + MOperator mop = useInsn->GetMachineOpcode(); + if (mop == MOP_pseudo_ret_int) { + if (cgFunc.GetFunction().GetReturnType()->GetSize() > k4ByteSize) { + return false; + } + continue; + } + uint32 optSize = useInsn->GetOperandSize(); + const InsnDesc *md = useInsn->GetDesc(); + for (uint32 i = 0; i < optSize; i++) { + auto &opnd = useInsn->GetOperand(i); + const auto *opndDesc = md->GetOpndDes(i); + if (opndDesc->IsDef()) { + continue; + } + if (opnd.IsRegister()) { + auto ®Opnd = static_cast(opnd); + if (RegOperand::IsSameRegNO(regOpnd, testOpnd) && + opndDesc->GetSize() > k32BitSize) { + return false; + } + } else if (opnd.IsMemoryAccessOperand()) { + auto &memOpnd = static_cast(opnd); + auto *baseOpnd = memOpnd.GetBaseRegister(); + auto *indexOpnd = memOpnd.GetIndexRegister(); + if ((baseOpnd != nullptr) && (RegOperand::IsSameRegNO(*baseOpnd, testOpnd)) && + (baseOpnd->GetSize() > k32BitSize)) { + return false; + } + if ((indexOpnd != nullptr) && (RegOperand::IsSameRegNO(*indexOpnd, testOpnd)) && + (indexOpnd->GetSize() > k32BitSize)) { + return false; + } + } else if (opnd.IsList()) { + auto &listOpnd = static_cast(opnd); + for (auto *regOpnd : std::as_const(listOpnd.GetOperands())) { + if (RegOperand::IsSameRegNO(*regOpnd, testOpnd) && + regOpnd->GetSize() > k32BitSize) { + return false; + } + } + } + } + } + return true; +} + void DeleteMovAfterCbzOrCbnzAArch64::ProcessBBHandle(BB *processBB, const BB &bb, const Insn &insn) const { ASSERT(processBB != nullptr, "process_bb is null in ProcessBBHandle"); + MOperator condBrMop = insn.GetMachineOpcode(); + bool is64BitOnly = (condBrMop == MOP_xcbz || condBrMop == MOP_xcbnz); FOR_BB_INSNS_SAFE(processInsn, processBB, nextProcessInsn) { nextProcessInsn = processInsn->GetNextMachineInsn(); if (!processInsn->IsMachineInstruction()) { continue; } - /* register may be a caller save register */ + // register may be a caller save register if (processInsn->IsCall()) { break; } @@ -4371,33 +4507,35 @@ void DeleteMovAfterCbzOrCbnzAArch64::ProcessBBHandle(BB *processBB, const BB &bb continue; } bool toDoOpt = true; - MOperator condBrMop = insn.GetMachineOpcode(); - /* process elseBB, other preds must be cbz */ + // process elseBB, other preds must be cbz if (condBrMop == MOP_wcbnz || condBrMop == MOP_xcbnz) { - /* check out all preds of process_bb */ + // check out all preds of process_bb for (auto *processBBPred : processBB->GetPreds()) { if (processBBPred == &bb) { continue; } - if (!PredBBCheck(*processBBPred, true, processInsn->GetOperand(kInsnFirstOpnd))) { + if (!PredBBCheck(*processBBPred, true, processInsn->GetOperand(kInsnFirstOpnd), is64BitOnly)) { toDoOpt = false; break; } } } else { - /* process ifBB, other preds can be cbz or cbnz(one at most) */ + // process ifBB, other preds can be cbz or cbnz(one at most) for (auto processBBPred : processBB->GetPreds()) { if (processBBPred == &bb) { continue; } - /* for cbnz pred, there is one at most */ + // for cbnz pred, there is one at most if (!PredBBCheck(*processBBPred, processBBPred != processBB->GetPrev(), - processInsn->GetOperand(kInsnFirstOpnd))) { + processInsn->GetOperand(kInsnFirstOpnd), is64BitOnly)) { toDoOpt = false; break; } } } + if (!is64BitOnly && !NoMoreThan32BitUse(*processInsn)) { + toDoOpt = false; + } if (!toDoOpt) { continue; } @@ -4430,6 +4568,140 @@ void DeleteMovAfterCbzOrCbnzAArch64::Run(BB &bb, Insn &insn) { ProcessBBHandle(processBB, bb, insn); } +Insn *CombineMovInsnBeforeCSelAArch64::FindPrevMovInsn(const Insn &insn, regno_t regNo) const { + for (Insn *curInsn = insn.GetPreviousMachineInsn(); curInsn != nullptr; curInsn = curInsn->GetPreviousMachineInsn()) { + MOperator mop = curInsn->GetMachineOpcode(); + if ((mop == MOP_wmovri32 || mop == MOP_xmovri64) && + static_cast(curInsn->GetOperand(kInsnFirstOpnd)).GetRegisterNumber() == regNo) { + return curInsn; + } + // If the register is redefined between the mov and csel insns, the optimization cannot be performed. + if (curInsn->IsRegDefined(regNo)) { + break; + } + } + return nullptr; +} + +Insn *CombineMovInsnBeforeCSelAArch64::FindPrevCmpInsn(const Insn &insn) const { + for (Insn *curInsn = insn.GetPreviousMachineInsn(); curInsn != nullptr; curInsn = curInsn->GetPreviousMachineInsn()) { + MOperator mop = curInsn->GetMachineOpcode(); + if (mop == MOP_wcmpri || mop == MOP_xcmpri) { + return curInsn; + } + } + return nullptr; +} + +bool CombineMovInsnBeforeCSelAArch64::CheckCondition(Insn &insn) { + MOperator curMop = insn.GetMachineOpcode(); + if (curMop != MOP_wcselrrrc && curMop != MOP_xcselrrrc) { + return false; + } + + auto &condOpnd = static_cast(insn.GetOperand(kInsnFourthOpnd)); + if (condOpnd.GetCode() != CC_NE && condOpnd.GetCode() != CC_EQ) { + return false; + } + + auto &opnd1 = static_cast(insn.GetOperand(kInsnSecondOpnd)); + auto &opnd2 = static_cast(insn.GetOperand(kInsnThirdOpnd)); + regno_t regNo1 = opnd1.GetRegisterNumber(); + regno_t regNo2 = opnd2.GetRegisterNumber(); + if (regNo1 == regNo2) { + return false; + } + + insnMov1 = FindPrevMovInsn(insn, regNo1); + if (insnMov1 == nullptr) { + return false; + } + insnMov2 = FindPrevMovInsn(insn, regNo2); + if (insnMov2 == nullptr) { + return false; + } + cmpInsn = FindPrevCmpInsn(insn); + if (cmpInsn == nullptr) { + return false; + } + + auto &cmpImmOpnd = static_cast(cmpInsn->GetOperand(kInsnThirdOpnd)); + auto &immOpnd1 = static_cast(insnMov1->GetOperand(kInsnSecondOpnd)); + auto &immOpnd2 = static_cast(insnMov2->GetOperand(kInsnSecondOpnd)); + auto maxImm = std::max(immOpnd1.GetValue(), immOpnd2.GetValue()); + auto minImm = std::min(immOpnd1.GetValue(), immOpnd2.GetValue()); + // to avoid difference value of imm1 and imm2 overflows + if (minImm < 0 && maxImm >= minImm - INT64_MIN) { + return false; + } + auto diffValue = maxImm - minImm; + if (cmpImmOpnd.GetValue() != diffValue) { + return false; + } + // condition 5 + if (immOpnd1.GetValue() < immOpnd2.GetValue() && condOpnd.GetCode() != CC_NE && diffValue != 1) { + return false; + } + // condition 6 + if (immOpnd1.GetValue() > immOpnd2.GetValue() && condOpnd.GetCode() != CC_EQ && diffValue != 1) { + return false; + } + if (immOpnd1.GetValue() < immOpnd2.GetValue()) { + needReverseCond = true; + } + if (diffValue == 1 && ((immOpnd1.GetValue() < immOpnd2.GetValue() && condOpnd.GetCode() != CC_NE) || + (immOpnd1.GetValue() > immOpnd2.GetValue() && condOpnd.GetCode() != CC_EQ))) { + needCsetInsn = true; + } + + if (IfOperandIsLiveAfterInsn(opnd1, insn) || IfOperandIsLiveAfterInsn(opnd2, insn)) { + return false; + } + + return true; +} + +void CombineMovInsnBeforeCSelAArch64::Run(BB &bb, Insn &insn) { + if (!CheckCondition(insn)) { + return; + } + + uint32 opndSize = insn.GetDesc()->opndMD[kInsnFirstOpnd]->GetSize(); + MOperator mOp = opndSize <= k32BitSize ? MOP_waddrri12 : MOP_xaddrri12; + auto &opnd0 = insn.GetOperand(kInsnFirstOpnd); + auto &cmpSrcopnd = cmpInsn->GetOperand(kInsnSecondOpnd); + auto *aarFunc = static_cast(&cgFunc); + auto *condOpnd = static_cast(&insn.GetOperand(kInsnFourthOpnd)); + CondOperand &reverseCondOpnd = aarFunc->GetCondOperand(AArch64isa::GetReverseCC(condOpnd->GetCode())); + if (needReverseCond) { + condOpnd = &reverseCondOpnd; + } + + // csel insn or cset insn + Insn *newInsn = nullptr; + // cset insn + if (needCsetInsn) { + MOperator newMop = opndSize <= k32BitSize ? MOP_wcsetrc : MOP_xcsetrc; + newInsn = &cgFunc.GetInsnBuilder()->BuildInsn(newMop, opnd0, *condOpnd, insn.GetOperand(kInsnFifthOpnd)); + } else { + // csel insn + newInsn = &cgFunc.GetInsnBuilder()->BuildInsn(insn.GetMachineOpcode(), opnd0, cmpSrcopnd, + cgFunc.GetZeroOpnd(opndSize), *condOpnd, insn.GetOperand(kInsnFifthOpnd)); + } + + auto &immOpnd1 = static_cast(insnMov1->GetOperand(kInsnSecondOpnd)); + auto &immOpnd2 = static_cast(insnMov2->GetOperand(kInsnSecondOpnd)); + int64 value = immOpnd1.GetValue() > immOpnd2.GetValue() ? immOpnd2.GetValue() : immOpnd1.GetValue(); + // add Insn + auto &newImmOpnd = aarFunc->CreateImmOperand(value, k12BitSize, false); + Insn &addInsn = cgFunc.GetInsnBuilder()->BuildInsn(mOp, opnd0, opnd0, newImmOpnd); + + bb.RemoveInsn(*insnMov2); + bb.RemoveInsn(*insnMov1); + bb.InsertInsnAfter(insn, addInsn); + bb.ReplaceInsn(insn, *newInsn); +} + bool LoadFloatPointPattern::FindLoadFloatPoint(Insn &insn) { MOperator mOp = insn.GetMachineOpcode(); optInsn.clear(); @@ -4996,6 +5268,8 @@ void UbfxToUxtwPattern::Run(BB &bb, Insn &insn) { Insn *newInsn = &cgFunc->GetInsnBuilder()->BuildInsn( MOP_xuxtw64, insn.GetOperand(kInsnFirstOpnd), insn.GetOperand(kInsnSecondOpnd)); bb.ReplaceInsn(insn, *newInsn); + SetCurrInsn(newInsn); + optSuccess = true; if (CG_PEEP_DUMP) { std::vector prevs; prevs.emplace_back(&insn); @@ -5168,6 +5442,10 @@ bool AddSubMergeLdStPattern::CheckCondition(Insn &insn) { if (insnDefRegNO != insnUseRegNO) { return false; } + // Do not combine x16 until cgaggressiveopt + if (insnDefReg->IsPhysicalRegister() && insnDefRegNO == R16) { + return false; + } nextInsn = FindRegInBB(insn, false); prevInsn = FindRegInBB(insn, true); isAddSubFront = CheckIfCanBeMerged(nextInsn, insn); @@ -5372,6 +5650,10 @@ bool AddCmpZeroAArch64::CheckAddCmpZeroCheckAdd(const Insn &prevInsn, const Insn } bool AddCmpZeroAArch64::CheckAddCmpZeroContinue(const Insn &insn, const RegOperand &opnd) const { + // check if insn will redef target reg or status reg + if (insn.GetDesc()->IsCall() || insn.GetDesc()->IsSpecialCall()) { + return false; + } for (uint32 i = 0; i < insn.GetOperandSize(); ++i) { if (insn.GetDesc()->GetOpndDes(i) == &OpndDesc::CCS) { return false; diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_proepilog.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_proepilog.cpp index 6f288fedb572c4f0bb8da8330c915eb170dd69e3..acb3d43a0d45fa6ad1ed82759f5deb8dea73a985 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_proepilog.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_proepilog.cpp @@ -103,6 +103,44 @@ bool AArch64GenProEpilog::NeedProEpilog() { return AArch64NeedProEpilog(cgFunc); } +// find a idle register, default R30 +AArch64reg AArch64GenProEpilog::GetStackGuardRegister(const BB &bb) const { + if (Globals::GetInstance()->GetOptimLevel() == CGOptions::kLevel0) { + return R30; + } + for (regno_t reg = R9; reg < R29; ++reg) { + if (bb.GetLiveInRegNO().count(reg) == 0 && reg != R16) { + if (!AArch64Abi::IsCalleeSavedReg(static_cast(reg))) { + return static_cast(reg); + } + } + } + return R30; +} + +// find two idle register, default R30 and R16 +std::pair AArch64GenProEpilog::GetStackGuardCheckRegister(const BB &bb) const { + AArch64reg stGuardReg = R30; + AArch64reg stCheckReg = R16; + if (Globals::GetInstance()->GetOptimLevel() == CGOptions::kLevel0) { + return {stGuardReg, stCheckReg}; + } + for (regno_t reg = R9; reg < R29; ++reg) { + if (bb.GetLiveOutRegNO().count(reg) == 0 && reg != R16) { + if (AArch64Abi::IsCalleeSavedReg(static_cast(reg))) { + continue; + } + if (stGuardReg == R30) { + stGuardReg = static_cast(reg); + } else { + stCheckReg = static_cast(reg); + break; + } + } + } + return {stGuardReg, stCheckReg}; +} + // RealStackFrameSize - [GR,16] - [VR,16] - 8 (from fp to stack protect area) // We allocate 16 byte for stack protect area MemOperand *AArch64GenProEpilog::GetDownStack() { @@ -126,12 +164,12 @@ MemOperand *AArch64GenProEpilog::GetDownStack() { MemOperand *downStk = aarchCGFunc.CreateStackMemOpnd(stackBaseReg, memSize, GetPointerBitSize()); if (downStk->GetMemVaryType() == kNotVary && aarchCGFunc.IsImmediateOffsetOutOfRange(*downStk, k64BitSize)) { - downStk = &aarchCGFunc.SplitOffsetWithAddInstruction(*downStk, k64BitSize, R10); + downStk = &aarchCGFunc.SplitOffsetWithAddInstruction(*downStk, k64BitSize, R16); } return downStk; } -void AArch64GenProEpilog::GenStackGuard() { +RegOperand &AArch64GenProEpilog::GenStackGuard(AArch64reg regNO) { auto &aarchCGFunc = static_cast(cgFunc); aarchCGFunc.GetDummyBB()->ClearInsns(); @@ -141,7 +179,7 @@ void AArch64GenProEpilog::GenStackGuard() { GlobalTables::GetStrTable().GetStrIdxFromName(std::string("__stack_chk_guard"))); StImmOperand &stOpnd = aarchCGFunc.CreateStImmOperand(*stkGuardSym, 0, 0); RegOperand &stAddrOpnd = - aarchCGFunc.GetOrCreatePhysicalRegisterOperand(R9, GetPointerBitSize(), kRegTyInt); + aarchCGFunc.GetOrCreatePhysicalRegisterOperand(regNO, GetPointerBitSize(), kRegTyInt); aarchCGFunc.SelectAddrof(stAddrOpnd, stOpnd); MemOperand *guardMemOp = aarchCGFunc.CreateMemOperand(GetPointerBitSize(), stAddrOpnd, @@ -150,6 +188,7 @@ void AArch64GenProEpilog::GenStackGuard() { Insn &insn = cgFunc.GetInsnBuilder()->BuildInsn(mOp, stAddrOpnd, *guardMemOp); insn.SetDoNotRemove(true); cgFunc.GetCurBB()->AppendInsn(insn); + return stAddrOpnd; } void AArch64GenProEpilog::AddStackGuard(BB &bb) { @@ -158,9 +197,7 @@ void AArch64GenProEpilog::AddStackGuard(BB &bb) { } BB *formerCurBB = cgFunc.GetCurBB(); auto &aarchCGFunc = static_cast(cgFunc); - GenStackGuard(); - RegOperand &stAddrOpnd = - aarchCGFunc.GetOrCreatePhysicalRegisterOperand(R9, GetPointerBitSize(), kRegTyInt); + auto &stAddrOpnd = GenStackGuard(GetStackGuardRegister(bb)); auto mOp = aarchCGFunc.PickStInsn(GetPointerBitSize(), PTY_u64); Insn &tmpInsn = cgFunc.GetInsnBuilder()->BuildInsn(mOp, stAddrOpnd, *GetDownStack()); tmpInsn.SetDoNotRemove(true); @@ -179,7 +216,7 @@ BB &AArch64GenProEpilog::GetOrGenStackGuardCheckFailBB(BB &bb) { // create new check fail BB auto failLable = aarchCGFunc.CreateLabel(); - stackChkFailBB = aarchCGFunc.CreateNewBB(failLable, bb.IsUnreachable(), BB::kBBFallthru, bb.GetFrequency()); + stackChkFailBB = aarchCGFunc.CreateNewBB(failLable, bb.IsUnreachable(), BB::kBBNoReturn, bb.GetFrequency()); cgFunc.SetCurBB(*stackChkFailBB); MIRSymbol *failFunc = GlobalTables::GetGsymTable().GetSymbolFromStrIdx( GlobalTables::GetStrTable().GetStrIdxFromName(std::string("__stack_chk_fail"))); @@ -200,11 +237,10 @@ void AArch64GenProEpilog::GenStackGuardCheckInsn(BB &bb) { BB *formerCurBB = cgFunc.GetCurBB(); auto &aarchCGFunc = static_cast(cgFunc); - GenStackGuard(); - RegOperand &stAddrOpnd = - aarchCGFunc.GetOrCreatePhysicalRegisterOperand(R9, GetPointerBitSize(), kRegTyInt); + auto [stGuardReg, stCheckReg] = GetStackGuardCheckRegister(bb); + auto &stAddrOpnd = GenStackGuard(stGuardReg); RegOperand &checkOp = - aarchCGFunc.GetOrCreatePhysicalRegisterOperand(R10, GetPointerBitSize(), kRegTyInt); + aarchCGFunc.GetOrCreatePhysicalRegisterOperand(stCheckReg, GetPointerBitSize(), kRegTyInt); auto mOp = aarchCGFunc.PickLdInsn(GetPointerBitSize(), PTY_u64); Insn &newInsn = cgFunc.GetInsnBuilder()->BuildInsn(mOp, checkOp, *GetDownStack()); newInsn.SetDoNotRemove(true); @@ -213,7 +249,8 @@ void AArch64GenProEpilog::GenStackGuardCheckInsn(BB &bb) { cgFunc.SelectBxor(stAddrOpnd, stAddrOpnd, checkOp, PTY_u64); auto &failBB = GetOrGenStackGuardCheckFailBB(bb); aarchCGFunc.SelectCondGoto(aarchCGFunc.GetOrCreateLabelOperand(failBB.GetLabIdx()), OP_brtrue, OP_ne, - stAddrOpnd, aarchCGFunc.CreateImmOperand(0, k64BitSize, false), PTY_u64, false, BB::kUnknownProb); + stAddrOpnd, aarchCGFunc.CreateImmOperand(0, k64BitSize, false), + PTY_u64, false, BB::kUnknownProb); auto chkBB = cgFunc.CreateNewBB(bb.GetLabIdx(), bb.IsUnreachable(), BB::kBBIf, bb.GetFrequency()); chkBB->AppendBBInsns(bb); @@ -278,6 +315,10 @@ void AArch64GenProEpilog::AppendInstructionPushPair(CGFunc &cgFunc, o2 = SplitStpLdpOffsetForCalleeSavedWithAddInstruction(cgFunc, *static_cast(o2), dataSize, R16); } Insn &pushInsn = cgFunc.GetInsnBuilder()->BuildInsn(mOp, o0, o1, *o2); + // Identify that the instruction is not alias with any other memory instructions. + auto *memDefUse = cgFunc.GetFuncScopeAllocator()->New(*cgFunc.GetFuncScopeAllocator()); + memDefUse->SetIndependent(); + pushInsn.SetReferenceOsts(memDefUse); std::string comment = "SAVE CALLEE REGISTER PAIR"; pushInsn.SetComment(comment); AppendInstructionTo(pushInsn, cgFunc); @@ -298,6 +339,10 @@ void AArch64GenProEpilog::AppendInstructionPushSingle(CGFunc &cgFunc, } Insn &pushInsn = cgFunc.GetInsnBuilder()->BuildInsn(mOp, o0, *o1); + // Identify that the instruction is not alias with any other memory instructions. + auto *memDefUse = cgFunc.GetFuncScopeAllocator()->New(*cgFunc.GetFuncScopeAllocator()); + memDefUse->SetIndependent(); + pushInsn.SetReferenceOsts(memDefUse); std::string comment = "SAVE CALLEE REGISTER"; pushInsn.SetComment(comment); AppendInstructionTo(pushInsn, cgFunc); @@ -872,6 +917,10 @@ void AArch64GenProEpilog::AppendInstructionPopSingle(CGFunc &cgFunc, AArch64reg } Insn &popInsn = cgFunc.GetInsnBuilder()->BuildInsn(mOp, o0, *o1); + // Identify that the instruction is not alias with any other memory instructions. + auto *memDefUse = cgFunc.GetFuncScopeAllocator()->New(*cgFunc.GetFuncScopeAllocator()); + memDefUse->SetIndependent(); + popInsn.SetReferenceOsts(memDefUse); popInsn.SetComment("RESTORE"); cgFunc.GetCurBB()->AppendInsn(popInsn); } @@ -890,6 +939,10 @@ void AArch64GenProEpilog::AppendInstructionPopPair(CGFunc &cgFunc, o2 = SplitStpLdpOffsetForCalleeSavedWithAddInstruction(cgFunc, *static_cast(o2), dataSize, R16); } Insn &popInsn = cgFunc.GetInsnBuilder()->BuildInsn(mOp, o0, o1, *o2); + // Identify that the instruction is not alias with any other memory instructions. + auto *memDefUse = cgFunc.GetFuncScopeAllocator()->New(*cgFunc.GetFuncScopeAllocator()); + memDefUse->SetIndependent(); + popInsn.SetReferenceOsts(memDefUse); popInsn.SetComment("RESTORE RESTORE"); cgFunc.GetCurBB()->AppendInsn(popInsn); } diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_prop.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_prop.cpp index 9b69d2933004f344dcce6e19667dc7418aa38745..2699819966b8b02b8e48f389b9f22c2d58bc2573 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_prop.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_prop.cpp @@ -509,6 +509,7 @@ bool A64ConstProp::ConstProp(DUInsnInfo &useDUInfo, ImmOperand &constOpnd) { bool A64ConstProp::ReplaceCmpToCmnOrConstPropCmp(DUInsnInfo &useDUInfo, ImmOperand &constOpnd) { Insn *useInsn = useDUInfo.GetInsn(); MOperator curMop = curInsn->GetMachineOpcode(); + MOperator useMop = useInsn->GetMachineOpcode(); if (useDUInfo.GetOperands().size() != 1) { return false; } @@ -521,7 +522,7 @@ bool A64ConstProp::ReplaceCmpToCmnOrConstPropCmp(DUInsnInfo &useDUInfo, ImmOpera static_cast(constOpnd.GetValue()); if (iVal < 0 && iVal >= kNegativeImmLowerLimit) { iVal = iVal * (-1); - MOperator newMop = curMop == MOP_wmovri32 ? MOP_wcmnri : MOP_xcmnri; + MOperator newMop = useMop == MOP_wcmprr ? MOP_wcmnri : MOP_xcmnri; ImmOperand &newOpnd = static_cast(cgFunc)->CreateImmOperand(iVal, constOpnd.GetSize(), constOpnd.IsSignedValue()); if (!static_cast(cgFunc)->IsOperandImmValid(newMop, &newOpnd, kInsnThirdOpnd)) { @@ -537,7 +538,7 @@ bool A64ConstProp::ReplaceCmpToCmnOrConstPropCmp(DUInsnInfo &useDUInfo, ImmOpera ReplaceInsnAndUpdateSSA(*useInsn, *newInsn); return true; } else if (iVal > 0) { - MOperator newMop = curMop == MOP_wmovri32 ? MOP_wcmpri : MOP_xcmpri; + MOperator newMop = useMop == MOP_wcmprr ? MOP_wcmpri : MOP_xcmpri; if (!static_cast(cgFunc)->IsOperandImmValid(newMop, static_cast(&constOpnd), kInsnThirdOpnd)) { return false; @@ -573,10 +574,11 @@ bool A64ConstProp::MovLslConstToMov(DUInsnInfo &useDUInfo, const ImmOperand &con if (curMop == MOP_wlslrri5 || curMop == MOP_xlslrri6) { val = static_cast(static_cast(val) << shift); } else if (curMop == MOP_wlsrrri5 || curMop == MOP_xlsrrri6 || - ((curMop == MOP_wasrrri5 || curMop == MOP_xasrrri6) && ((val & (1ULL << k63Bits)) == 0))) { + ((curMop == MOP_wasrrri5 || curMop == MOP_xasrrri6) && + ((static_cast(val) & (1ULL << k63Bits)) == 0))) { val = static_cast(static_cast(val) >> shift); } else if (((curMop == MOP_wasrrri5 || curMop == MOP_xasrrri6) && - ((val & (1ULL << k63Bits)) == (1ULL << k63Bits)))) { + ((static_cast(val) & (1ULL << k63Bits)) == (1ULL << k63Bits)))) { uint64 leadOnes = ~(ULLONG_MAX >> shift); val = static_cast((static_cast(val) >> shift) | leadOnes); } else { @@ -1022,11 +1024,6 @@ MemOperand *A64StrLdrProp::SelectReplaceMem(const MemOperand &currMemOpnd) { int64 val = ofstOpnd->GetValue(); auto *offset1 = static_cast(&defInsn->GetOperand(kInsnThirdOpnd)); CHECK_FATAL(offset1 != nullptr, "offset1 is null!"); - // this restriction is for 'ldr' insn whose second operand has wrong alignment - if (offset1->GetSymbol() && offset1->GetSymbol()->IsConst() && - offset1->GetSymbol()->GetSymbolAlign(CGOptions::IsArm64ilp32()) != kAlignOfU8) { - break; - } val += offset1->GetOffset(); OfstOperand *newOfsetOpnd = &static_cast(cgFunc)->CreateOfstOpnd(static_cast(val), k32BitSize); @@ -2688,10 +2685,7 @@ bool A64PregCopyPattern::HasValidDefInsnDependency() { bool A64PregCopyPattern::CheckPhiCaseCondition(Insn &defInsn) { std::unordered_map visited; std::vector visitedPhiDefs; - if (defInsn.IsPhi()) { - (void)visitedPhiDefs.emplace_back( - static_cast(defInsn.GetOperand(kInsnFirstOpnd)).GetRegisterNumber()); - } + visitedPhiDefs.emplace_back(static_cast(defInsn.GetOperand(kInsnFirstOpnd)).GetRegisterNumber()); if (!DFSFindValidDefInsns(&defInsn, visitedPhiDefs, visited)) { return false; } @@ -2748,6 +2742,10 @@ bool A64PregCopyPattern::CheckPhiCaseCondition(Insn &defInsn) { if (differIdx <= 0) { return false; } + auto defRegNO = static_cast(defInsn.GetOperand(kInsnFirstOpnd)).GetRegisterNumber(); + if (differOrigNO == optSsaInfo->FindSSAVersion(defRegNO)->GetOriginalRegNO()) { + return false; + } } if (differIdx == -1) { return false; @@ -2879,8 +2877,8 @@ Insn &A64PregCopyPattern::CreateNewPhiInsn(std::unordered_mapCreateNewInsnSSAInfo(phiInsn); BB *bb = curInsn->GetBB(); (void)bb->InsertInsnBefore(*curInsn, phiInsn); - /* */ - bb->AddPhiInsn(differOrigNO, phiInsn); + // phiDef-ssaRegNO, phiInsn + bb->AddPhiInsn(static_cast(phiInsn.GetOperand(kInsnFirstOpnd)).GetRegisterNumber(), phiInsn); return phiInsn; } @@ -2912,7 +2910,7 @@ RegOperand *A64PregCopyPattern::CheckAndGetExistPhiDef(Insn &phiInsn, std::vecto VRegVersion *version = optSsaInfo->FindSSAVersion(ssaRegNO); (void)validDifferOrigRegNOs.insert(version->GetOriginalRegNO()); } - MapleMap &phiInsns = phiInsn.GetBB()->GetPhiInsns(); + auto &phiInsns = phiInsn.GetBB()->GetPhiInsns(); for (auto &phiIt : as_const(phiInsns)) { auto &def = static_cast(phiIt.second->GetOperand(kInsnFirstOpnd)); VRegVersion *defVersion = optSsaInfo->FindSSAVersion(def.GetRegisterNumber()); @@ -3031,16 +3029,8 @@ void A64PregCopyPattern::Optimize(Insn &insn) { } } } else { - std::vector validDifferRegNOs; - for (Insn *vdInsn : validDefInsns) { - auto &vdOpnd = static_cast(vdInsn->GetOperand(static_cast(differIdx))); - (void)validDifferRegNOs.emplace_back(vdOpnd.GetRegisterNumber()); - } - RegOperand *differPhiDefOpnd = CheckAndGetExistPhiDef(*firstPhiInsn, validDifferRegNOs); - if (differPhiDefOpnd == nullptr) { - std::unordered_map visited; - differPhiDefOpnd = &DFSBuildPhiInsn(firstPhiInsn, visited); - } + std::unordered_map visited; + auto *differPhiDefOpnd = &DFSBuildPhiInsn(firstPhiInsn, visited); CHECK_FATAL(differPhiDefOpnd, "get differPhiDefOpnd failed"); for (uint32 i = 0; i < opndNum; ++i) { if (defInsn->OpndIsDef(i)) { diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_ra_opt.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_ra_opt.cpp index b1bcc12b54fe7100a8eff3275391ca28c417cd3d..b7ef41c2191b2a570c31d119d78859d138c513f6 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_ra_opt.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_ra_opt.cpp @@ -314,7 +314,7 @@ void AArch64LRSplitForSink::CollectSplitRegs() { } if (dumpInfo) { LogInfo::MapleLogger() << "find need split reg :"; - for (auto [regno, _] : splitRegs) { + for (const auto &[regno, _] : std::as_const(splitRegs)) { LogInfo::MapleLogger() << "R" << regno << ","; } LogInfo::MapleLogger() << "\n"; diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_rce.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_rce.cpp index 1b64585860d46147762cab1083b7379064d17644..60a7890e01b2c5f01d695fbbf33c9d1a770ec6ad 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_rce.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_rce.cpp @@ -269,9 +269,6 @@ bool AArch64RedundantComputeElim::DoOpt(BB *bb) { continue; } doOpt = true; - if (cgFunc->GetName() == "expand_shift" && insn->GetId() == 144) { - std::cout << "add logical shift!" << std::endl; - } auto iter = candidates.find(insn); if (iter != candidates.end()) { /* during iteration, avoid repeated processing of insn, which may access wrong duInsnInfo of ssaVersion */ diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_reaching.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_reaching.cpp index 718fcbac6cf20e86729703c97e34a1255a235a3e..6e3e7b3c2e8079ac7ef6645bc41459ba7fb06ee3 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_reaching.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_reaching.cpp @@ -148,46 +148,6 @@ void AArch64ReachingDefinition::InitEhDefine(BB &bb) { pseudoInsns.emplace_back(&newPseudoInsn); } -/* insert pseudoInsns for return value R0/V0 */ -void AArch64ReachingDefinition::AddRetPseudoInsn(BB &bb) { - AArch64reg regNO = static_cast(cgFunc)->GetReturnRegisterNumber(); - if (regNO == kInvalidRegNO) { - return; - } - if (bb.GetKind() == BB::kBBGoto) { - return; /* a goto block should not have unreachable instr */ - } - - if (regNO == R0) { - RegOperand ®Opnd = - static_cast(cgFunc)->GetOrCreatePhysicalRegisterOperand(regNO, k64BitSize, kRegTyInt); - Insn &retInsn = cgFunc->GetInsnBuilder()->BuildInsn(MOP_pseudo_ret_int, regOpnd); - bb.AppendInsn(retInsn); - pseudoInsns.emplace_back(&retInsn); - } else if (regNO == V0) { - RegOperand ®Opnd = - static_cast(cgFunc)->GetOrCreatePhysicalRegisterOperand(regNO, k64BitSize, kRegTyFloat); - Insn &retInsn = cgFunc->GetInsnBuilder()->BuildInsn(MOP_pseudo_ret_float, regOpnd); - bb.AppendInsn(retInsn); - pseudoInsns.emplace_back(&retInsn); - } -} - -void AArch64ReachingDefinition::AddRetPseudoInsns() { - uint32 exitBBSize = cgFunc->GetExitBBsVec().size(); - if (exitBBSize == 0) { - if (cgFunc->GetCleanupBB() != nullptr && cgFunc->GetCleanupBB()->GetPrev() != nullptr) { - AddRetPseudoInsn(*cgFunc->GetCleanupBB()->GetPrev()); - } else if (!cgFunc->GetMirModule().IsCModule()) { - AddRetPseudoInsn(*cgFunc->GetLastBB()->GetPrev()); - } - } else { - for (uint32 i = 0; i < exitBBSize; ++i) { - AddRetPseudoInsn(*cgFunc->GetExitBB(i)); - } - } -} - void AArch64ReachingDefinition::GenAllAsmDefRegs(BB &bb, Insn &insn, uint32 index) { for (auto ® : static_cast(insn.GetOperand(index)).GetOperands()) { regGen[bb.GetId()]->SetBit(static_cast(reg)->GetRegisterNumber()); diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_schedule.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_schedule.cpp index b85023c12a29c2906231e582082af665bcdaf2e2..c946e350f435e6b8d353f327c4854256b3aa9d67 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_schedule.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_schedule.cpp @@ -494,9 +494,9 @@ void AArch64Schedule::SelectNode(AArch64ScheduleProcessInfo &scheduleInfo) { } } /* The priority of free-reg node is higher than pipeline */ - while (!targetNode->IsResourceFree()) { + while (!targetNode->IsResourceIdle()) { scheduleInfo.IncCurrCycle(); - mad->AdvanceCycle(); + mad->AdvanceOneCycleForAll(); } if (GetConsiderRegPressure() && !scheduleInfo.IsFirstSeparator()) { UpdateLiveRegSet(scheduleInfo, *targetNode); @@ -561,7 +561,7 @@ void AArch64Schedule::UpdateAdvanceCycle(AArch64ScheduleProcessInfo &scheduleInf void AArch64Schedule::UpdateScheduleProcessInfo(AArch64ScheduleProcessInfo &info) const { while (info.GetAdvanceCycle() > 0) { info.IncCurrCycle(); - mad->AdvanceCycle(); + mad->AdvanceOneCycleForAll(); info.DecAdvanceCycle(); } info.ClearAvailableReadyList(); @@ -576,7 +576,7 @@ bool AArch64Schedule::CheckSchedulable(AArch64ScheduleProcessInfo &info) const { if (GetConsiderRegPressure()) { info.PushElemIntoAvailableReadyList(node); } else { - if (node->IsResourceFree() && node->GetEStart() <= info.GetCurrCycle()) { + if (node->IsResourceIdle() && node->GetEStart() <= info.GetCurrCycle()) { info.PushElemIntoAvailableReadyList(node); } } @@ -913,14 +913,14 @@ uint32 AArch64Schedule::SimulateOnly() { for (uint32 i = 0; i < nodes.size();) { while (advanceCycle > 0) { ++currCycle; - mad->AdvanceCycle(); + mad->AdvanceOneCycleForAll(); --advanceCycle; } DepNode *targetNode = nodes[i]; - if ((currCycle >= targetNode->GetEStart()) && targetNode->IsResourceFree()) { + if ((currCycle >= targetNode->GetEStart()) && targetNode->IsResourceIdle()) { targetNode->SetSimulateCycle(currCycle); - targetNode->OccupyUnits(); + targetNode->OccupyRequiredUnits(); /* Update estart. */ for (auto succLink : targetNode->GetSuccs()) { @@ -1022,7 +1022,7 @@ void AArch64Schedule::IterateBruteForce(DepNode &targetNode, MapleVector tempList = readyList; EraseNodeFromNodeList(targetNode, tempList); - targetNode.OccupyUnits(); + targetNode.OccupyRequiredUnits(); /* Update readyList. */ UpdateReadyList(targetNode, tempList, true); @@ -1060,7 +1060,7 @@ void AArch64Schedule::IterateBruteForce(DepNode &targetNode, MapleVector tempAvailableList; while (advanceCycle > 0) { ++currCycle; - mad->AdvanceCycle(); + mad->AdvanceOneCycleForAll(); --advanceCycle; } /* Check EStart. */ @@ -1078,7 +1078,7 @@ void AArch64Schedule::IterateBruteForce(DepNode &targetNode, MapleVectorIsResourceFree()) { + if (node->IsResourceIdle()) { availableReadyList.emplace_back(node); } } diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_strldr.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_strldr.cpp index 535a290d1e38ee8bd83075787b845fcc88f25a95..a12bcfa9711d3921846af7f908ba00bd3c2de5e5 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_strldr.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_strldr.cpp @@ -671,14 +671,6 @@ bool AArch64StoreLoadOpt::ReplaceMemOpnd(Insn &insn, regno_t regNo, RegOperand & if (!CheckDefInsn(*regDefInsn, insn)) { return false; } - // this restriction is for 'ldr' insn whose second operand has wrong alignment - if (regDefInsn->GetOperandSize() > kInsnThirdOpnd && regDefInsn->GetOperand(kInsnThirdOpnd).IsStImmediate()) { - auto &stImm = static_cast(regDefInsn->GetOperand(kInsnThirdOpnd)); - if (stImm.GetSymbol() && stImm.GetSymbol()->IsConst() && - stImm.GetSymbol()->GetSymbolAlign(CGOptions::IsArm64ilp32()) != kAlignOfU8) { - return false; - } - } MemOperand *newMemOpnd = SelectReplaceMem(*regDefInsn, insn, base, offset); if (newMemOpnd == nullptr) { diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_validbit_opt.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_validbit_opt.cpp index e018522aaee911b1f8b6dc7d416a3f4ee111d25a..a24104d4c9f59793ad19e069a79ab1cc8553921c 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_validbit_opt.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_validbit_opt.cpp @@ -79,47 +79,194 @@ void AArch64ValidBitOpt::DoOpt() { } } +// modify insn's mop from X to W +void RedundantExpandProp::ModifyInsnUseMopW() { + static const std::map kInsnMopX2WMap = { + {MOP_xcbnz, MOP_wcbnz}, + {MOP_xcbz, MOP_wcbz}, + {MOP_xtbnz, MOP_wtbnz}, + {MOP_xtbz, MOP_wtbz}, + {MOP_xubfizrri6i6, MOP_wubfizrri5i5}, + {MOP_xsbfizrri6i6, MOP_wsbfizrri5i5}, + {MOP_xubfxrri6i6, MOP_wubfxrri5i5}, + {MOP_xsbfxrri6i6, MOP_wsbfxrri5i5}, + {MOP_xcmnri, MOP_wcmnri} + }; + + for (auto *insn : needModifyInsns) { + auto iter = kInsnMopX2WMap.find(insn->GetMachineOpcode()); + CHECK_FATAL(iter != kInsnMopX2WMap.end(), "insn must be modified"); + insn->SetMOP(AArch64CG::kMd[iter->second]); + } +} + void RedundantExpandProp::Run(BB &bb, Insn &insn) { if (!CheckCondition(insn)) { return; } - insn.SetMOP(AArch64CG::kMd[MOP_xmovrr]); + ModifyInsnUseMopW(); + + auto &destOpnd = static_cast(insn.GetOperand(kInsnFirstOpnd)); + auto &srcOpnd = static_cast(insn.GetOperand(kInsnSecondOpnd)); + if (destOpnd.IsSSAForm() && srcOpnd.IsSSAForm()) { + auto *destVersion = ssaInfo->FindSSAVersion(destOpnd.GetRegisterNumber()); + ASSERT(destVersion != nullptr, "find Version failed"); + auto *srcVersion = ssaInfo->FindSSAVersion(srcOpnd.GetRegisterNumber()); + ASSERT(srcVersion != nullptr, "find Version failed"); + ReplaceImplicitCvtAndProp(destVersion, srcVersion); + } else { // only change mop because there is no ssa version + auto &newInsn = cgFunc->GetInsnBuilder()->BuildInsn(MOP_wmovrr, destOpnd, srcOpnd); + bb.ReplaceInsn(insn, newInsn); + ssaInfo->ReplaceInsn(insn, newInsn); + } +} + +// check others insn can use mopW +bool RedundantExpandProp::CheckOtherInsnUseMopW(const RegOperand &defOpnd, DUInsnInfo &useInfo) const { + auto defRegNO = defOpnd.GetRegisterNumber(); + const auto *useInsn = useInfo.GetInsn(); + for (auto [idx, count] : std::as_const(useInfo.GetOperands())) { + const auto &opnd = useInsn->GetOperand(idx); + auto *opndMd = useInsn->GetDesc()->GetOpndDes(idx); + if (opnd.IsRegister()) { + if (!opndMd->IsUse() || opnd.GetSize() != k32BitSize || opndMd->GetSize() != k32BitSize) { + return false; + } + } else if (opnd.IsMemoryAccessOperand()) { + const auto &memOpnd = static_cast(opnd); + if (memOpnd.GetAddrMode() != MemOperand::kBOE && memOpnd.GetAddrMode() != MemOperand::kBOL) { + return false; + } + if (memOpnd.GetIndexRegister()->GetRegisterNumber() != defRegNO) { + return false; + } + return (memOpnd.GetIndexRegister()->GetSize() == k32BitSize); + } else if (opnd.IsList()) { + for (const auto *regOpnd : static_cast(opnd).GetOperands()) { + if (regOpnd->GetRegisterNumber() == defRegNO && regOpnd->GetSize() != k32BitSize) { + return false; + } + } + } + } + return true; +} + +bool RedundantExpandProp::CheckInsnCanUseMopW(const RegOperand &defOpnd, DUInsnInfo &useInfo) { + auto *useInsn = useInfo.GetInsn(); + switch (useInsn->GetMachineOpcode()) { + case MOP_xcbnz: + case MOP_xcbz: { + needModifyInsns.push_back(useInsn); + return true; + } + case MOP_xtbnz: + case MOP_xtbz: { + ASSERT(useInsn->GetOperand(kInsnSecondOpnd).IsImmediate(), "tbz/tbnz second opnd must be immediate"); + needModifyInsns.push_back(useInsn); + auto &immOpnd = static_cast(useInsn->GetOperand(kInsnSecondOpnd)); + return (immOpnd.GetValue() < static_cast(k32BitSize)); + } + case MOP_xubfizrri6i6: + case MOP_xsbfizrri6i6: + case MOP_xubfxrri6i6: + case MOP_xsbfxrri6i6: { + ASSERT(useInsn->GetOperand(kInsnThirdOpnd).IsImmediate(), "third opnd must be immediate"); + ASSERT(useInsn->GetOperand(kInsnFourthOpnd).IsImmediate(), "fourth opnd must be immediate"); + needModifyInsns.push_back(useInsn); + auto &lsb = static_cast(useInsn->GetOperand(kInsnThirdOpnd)); + auto &width = static_cast(useInsn->GetOperand(kInsnFourthOpnd)); + return (lsb.GetValue() + width.GetValue() <= k32BitSize); + }; + case MOP_xcmnri: { + ASSERT(useInsn->GetOperand(kInsnThirdOpnd).IsImmediate(), "cmpri third opnd must be immediate"); + needModifyInsns.push_back(useInsn); + auto &immOpnd = static_cast(useInsn->GetOperand(kInsnThirdOpnd)); + return (immOpnd.GetValue() > INT32_MIN) && (immOpnd.GetValue() <= INT32_MAX); + } + default: { + return CheckOtherInsnUseMopW(defOpnd, useInfo); + } + } +} + +bool RedundantExpandProp::CheckPhiSrcRegDefW(const RegOperand ®Opnd) const { + // all opnd of phiInsn should have the ValidBit of no more than 32 bits + if (regOpnd.GetValidBitsNum() <= k32BitSize) { + return true; + } + auto *regVersion = ssaInfo->FindSSAVersion(regOpnd.GetRegisterNumber()); + ASSERT(regVersion != nullptr, "find Version failed"); + if (regVersion->GetDefInsnInfo() == nullptr) { + return true; // undef reg + } + auto *defInsn = regVersion->GetDefInsnInfo()->GetInsn(); + ASSERT(defInsn != nullptr, "find defInsn failed"); + if (defInsn->GetMachineOpcode() == MOP_wmovrr) { + // when mOp is wmov and src is preg, the validBit is 64-bits + // however, the lower 32-bits can be used for calculation + const auto &defUseOpnd = static_cast(defInsn->GetOperand(kInsnSecondOpnd)); + return !cgFunc->GetTargetRegInfo()->IsVirtualRegister(defUseOpnd); + } + return false; +} + +// check defOpnd's all use-point can use mopW +bool RedundantExpandProp::CheckAllUseInsnCanUseMopW(const RegOperand &defOpnd, InsnSet &visitedInsn) { + auto *defVersion = ssaInfo->FindSSAVersion(defOpnd.GetRegisterNumber()); + ASSERT(defVersion != nullptr, "find Version failed"); + for (auto destUseIt : defVersion->GetAllUseInsns()) { + auto *useInsn = destUseIt.second->GetInsn(); + if (visitedInsn.count(useInsn) != 0) { + continue; + } + visitedInsn.insert(useInsn); + auto &propInsns = ssaInfo->GetSafePropInsns(); + if (std::find(propInsns.begin(), propInsns.end(), useInsn->GetId()) != propInsns.end()) { + return false; + } + if (useInsn->IsPhi()) { // phi insn, need dfs check + auto &phiDefOpnd = useInsn->GetOperand(kInsnFirstOpnd); + CHECK_FATAL(phiDefOpnd.IsRegister(), "must be register"); + if (!CheckAllUseInsnCanUseMopW(static_cast(phiDefOpnd), visitedInsn)) { + return false; + } + checkPhiInsns.emplace_back(&defOpnd, useInsn); + } else if (!CheckInsnCanUseMopW(defOpnd, *destUseIt.second)) { + return false; + } + } + return true; } bool RedundantExpandProp::CheckCondition(Insn &insn) { - if (insn.GetMachineOpcode() != MOP_xuxtw64) { + ASSERT(insn.GetOperand(kInsnFirstOpnd).IsRegister(), "must be register"); + auto &destOpnd = static_cast(insn.GetOperand(kInsnFirstOpnd)); + if (!destOpnd.IsSSAForm()) { return false; } - auto *destOpnd = &static_cast(insn.GetOperand(kInsnFirstOpnd)); - if (destOpnd != nullptr && destOpnd->IsSSAForm()) { - destVersion = ssaInfo->FindSSAVersion(destOpnd->GetRegisterNumber()); - ASSERT(destVersion != nullptr, "find Version failed"); - for (auto destUseIt : destVersion->GetAllUseInsns()) { - Insn *useInsn = destUseIt.second->GetInsn(); - auto &propInsns = ssaInfo->GetSafePropInsns(); - bool isSafeCvt = std::find(propInsns.begin(), propInsns.end(), useInsn->GetId()) != propInsns.end(); - if (useInsn->IsPhi() || isSafeCvt) { - return false; + InsnSet visitedInsn; + visitedInsn.emplace(&insn); + if (!CheckAllUseInsnCanUseMopW(destOpnd, visitedInsn)) { + return false; + } + if (!needModifyInsns.empty()) { + // if insns needs to be modified, need check all phiInsnUseReg is defined as 32 bits. + for (auto [noNeedCheckReg, phiInsn] : std::as_const(checkPhiInsns)) { + ASSERT(phiInsn->GetOperand(kInsnSecondOpnd).IsPhi(), "expect phiOpnd"); + auto &phiOpnd = static_cast(phiInsn->GetOperand(kInsnSecondOpnd)); + for (const auto phiOpndIt : std::as_const(phiOpnd.GetOperands())) { + if (phiOpndIt.second == nullptr || + phiOpndIt.second->GetRegisterNumber() == noNeedCheckReg->GetRegisterNumber()) { + continue; } - int32 lastOpndId = static_cast(useInsn->GetOperandSize() - 1); - const InsnDesc *md = useInsn->GetDesc(); - // i should be int - for (int32 i = lastOpndId; i >= 0; --i) { - auto *reg = (md->opndMD[static_cast(i)]); - auto &opnd = useInsn->GetOperand(static_cast(i)); - if (reg->IsUse() && opnd.IsRegister() && - static_cast(opnd).GetRegisterNumber() == destOpnd->GetRegisterNumber()) { - if (opnd.GetSize() == k32BitSize && reg->GetSize() == k32BitSize) { - continue; - } else { - return false; - } - } + if (!CheckPhiSrcRegDefW(*phiOpndIt.second)) { + return false; } - } - return true; + } + } } - return false; + return true; } // Patterns that may have implicit cvt @@ -138,6 +285,17 @@ void AArch64ValidBitOpt::OptPatternWithImplicitCvt(BB &bb, Insn &insn) { OptimizeNoProp(bb, insn); break; } + case MOP_xasrrri6: + case MOP_wasrrri5: { + OptimizeNoProp(bb, insn); + break; + } + case MOP_xrevrr: + case MOP_wrevrr: + case MOP_wrevrr16: { + OptimizeNoProp(bb, insn); + break; + } default: break; } @@ -173,7 +331,8 @@ void AArch64ValidBitOpt::OptCvt(BB &bb, Insn &insn) { void AArch64ValidBitOpt::OptPregCvt(BB &bb, Insn &insn) { MOperator curMop = insn.GetMachineOpcode(); switch (curMop) { - case MOP_xuxtw64: { + case MOP_xuxtw64: + case MOP_xsxtw64: { OptimizeProp(bb, insn); break; } @@ -182,20 +341,28 @@ void AArch64ValidBitOpt::OptPregCvt(BB &bb, Insn &insn) { } } -void AArch64ValidBitOpt::SetValidBits(Insn &insn) { +bool AArch64ValidBitOpt::SetValidBits(Insn &insn) { + bool hasChange = false; + auto checkChangeAndSetValidBitsNum = [&hasChange](RegOperand &dstOpnd, uint32 newVB) { + if (dstOpnd.GetValidBitsNum() != newVB) { + dstOpnd.SetValidBitsNum(newVB); + hasChange = true; + } + }; + MOperator mop = insn.GetMachineOpcode(); switch (mop) { // for case sbfx 32 64 // we can not deduce that dst opnd valid bit num; case MOP_xsbfxrri6i6: { auto &dstOpnd = static_cast(insn.GetOperand(kInsnFirstOpnd)); - dstOpnd.SetValidBitsNum(static_cast(k64BitSize)); + checkChangeAndSetValidBitsNum(dstOpnd, k64BitSize); break; } case MOP_wcsetrc: case MOP_xcsetrc: { auto &dstOpnd = static_cast(insn.GetOperand(kInsnFirstOpnd)); - dstOpnd.SetValidBitsNum(k1BitSize); + checkChangeAndSetValidBitsNum(dstOpnd, k1BitSize); break; } case MOP_wmovri32: @@ -204,22 +371,26 @@ void AArch64ValidBitOpt::SetValidBits(Insn &insn) { ASSERT(srcOpnd.IsIntImmediate(), "must be ImmOperand"); auto &immOpnd = static_cast(srcOpnd); auto &dstOpnd = static_cast(insn.GetOperand(kInsnFirstOpnd)); - dstOpnd.SetValidBitsNum(GetImmValidBit(immOpnd.GetValue(), dstOpnd.GetSize())); + if (!cgFunc->GetTargetRegInfo()->IsVirtualRegister(dstOpnd)) { + return false; + } + checkChangeAndSetValidBitsNum(dstOpnd, GetImmValidBit(immOpnd.GetValue(), dstOpnd.GetSize())); break; } case MOP_xmovrr: case MOP_wmovrr: { auto &dstOpnd = static_cast(insn.GetOperand(kInsnFirstOpnd)); auto &srcOpnd = static_cast(insn.GetOperand(kInsnSecondOpnd)); - if (srcOpnd.IsPhysicalRegister() || dstOpnd.IsPhysicalRegister()) { - return; + if (!cgFunc->GetTargetRegInfo()->IsVirtualRegister(dstOpnd)) { + return false; } - if (srcOpnd.GetRegisterNumber() == RZR) { - srcOpnd.SetValidBitsNum(k1BitSize); + uint32 newVB = srcOpnd.GetValidBitsNum(); + if (!cgFunc->GetTargetRegInfo()->IsVirtualRegister(srcOpnd)) { + newVB = (srcOpnd.GetRegisterNumber() == RZR ? k1BitSize : k64BitSize); } if (!(dstOpnd.GetSize() == k64BitSize && srcOpnd.GetSize() == k32BitSize) && !(dstOpnd.GetSize() == k32BitSize && srcOpnd.GetSize() == k64BitSize)) { - dstOpnd.SetValidBitsNum(srcOpnd.GetValidBitsNum()); + checkChangeAndSetValidBitsNum(dstOpnd, newVB); } break; } @@ -231,9 +402,9 @@ void AArch64ValidBitOpt::SetValidBits(Insn &insn) { auto &dstOpnd = static_cast(insn.GetOperand(kInsnFirstOpnd)); auto &srcOpnd = static_cast(insn.GetOperand(kInsnSecondOpnd)); if ((static_cast(srcOpnd.GetValidBitsNum()) - shiftBits) <= 0) { - dstOpnd.SetValidBitsNum(k1BitSize); + checkChangeAndSetValidBitsNum(dstOpnd, k1BitSize); } else { - dstOpnd.SetValidBitsNum(srcOpnd.GetValidBitsNum() - static_cast(shiftBits)); + checkChangeAndSetValidBitsNum(dstOpnd, srcOpnd.GetValidBitsNum() - static_cast(shiftBits)); } break; } @@ -246,7 +417,7 @@ void AArch64ValidBitOpt::SetValidBits(Insn &insn) { auto &srcOpnd = static_cast(insn.GetOperand(kInsnSecondOpnd)); uint32 newVB = ((srcOpnd.GetValidBitsNum() + shiftBits) > srcOpnd.GetSize()) ? srcOpnd.GetSize() : (srcOpnd.GetValidBitsNum() + shiftBits); - dstOpnd.SetValidBitsNum(newVB); + checkChangeAndSetValidBitsNum(dstOpnd, newVB); break; } case MOP_wasrrri5: @@ -259,9 +430,9 @@ void AArch64ValidBitOpt::SetValidBits(Insn &insn) { auto shiftBits = static_cast(static_cast(opnd).GetValue()); auto &dstOpnd = static_cast(insn.GetOperand(kInsnFirstOpnd)); if ((static_cast(srcOpnd.GetValidBitsNum()) - shiftBits) <= 0) { - dstOpnd.SetValidBitsNum(k1BitSize); + checkChangeAndSetValidBitsNum(dstOpnd, k1BitSize); } else { - dstOpnd.SetValidBitsNum(srcOpnd.GetValidBitsNum() - static_cast(shiftBits)); + checkChangeAndSetValidBitsNum(dstOpnd, srcOpnd.GetValidBitsNum() - static_cast(shiftBits)); } } break; @@ -274,14 +445,14 @@ void AArch64ValidBitOpt::SetValidBits(Insn &insn) { uint32 newVB = dstOpnd.GetValidBitsNum(); newVB = (mop == MOP_xuxtb32) ? ((srcVB < k8BitSize) ? srcVB : k8BitSize) : newVB; newVB = (mop == MOP_xuxth32) ? ((srcVB < k16BitSize) ? srcVB : k16BitSize) : newVB; - dstOpnd.SetValidBitsNum(newVB); + checkChangeAndSetValidBitsNum(dstOpnd, newVB); break; } case MOP_xuxtw64: { auto &dstOpnd = static_cast(insn.GetOperand(kInsnFirstOpnd)); auto &srcOpnd = static_cast(insn.GetOperand(kInsnSecondOpnd)); - if (srcOpnd.GetValidBitsNum() == k32BitSize) { - dstOpnd.SetValidBitsNum(k32BitSize); + if (srcOpnd.GetValidBitsNum() <= k32BitSize) { + checkChangeAndSetValidBitsNum(dstOpnd, srcOpnd.GetValidBitsNum()); } break; } @@ -289,14 +460,14 @@ void AArch64ValidBitOpt::SetValidBits(Insn &insn) { case MOP_xubfxrri6i6: { auto &dstOpnd = static_cast(insn.GetOperand(kInsnFirstOpnd)); auto &widthOpnd = static_cast(insn.GetOperand(kInsnFourthOpnd)); - dstOpnd.SetValidBitsNum(static_cast(widthOpnd.GetValue())); + checkChangeAndSetValidBitsNum(dstOpnd, static_cast(widthOpnd.GetValue())); break; } case MOP_wldrb: case MOP_wldrh: { auto &dstOpnd = static_cast(insn.GetOperand(kInsnFirstOpnd)); uint32 newVB = (mop == MOP_wldrb) ? k8BitSize : k16BitSize; - dstOpnd.SetValidBitsNum(newVB); + checkChangeAndSetValidBitsNum(dstOpnd, newVB); break; } case MOP_wandrrr: @@ -305,7 +476,7 @@ void AArch64ValidBitOpt::SetValidBits(Insn &insn) { uint32 src1VB = static_cast(insn.GetOperand(kInsnSecondOpnd)).GetValidBitsNum(); uint32 src2VB = static_cast(insn.GetOperand(kInsnThirdOpnd)).GetValidBitsNum(); uint32 newVB = (src1VB <= src2VB ? src1VB : src2VB); - dstOpnd.SetValidBitsNum(newVB); + checkChangeAndSetValidBitsNum(dstOpnd, newVB); break; } case MOP_wandrri12: @@ -315,7 +486,7 @@ void AArch64ValidBitOpt::SetValidBits(Insn &insn) { uint32 src1VB = static_cast(insn.GetOperand(kInsnSecondOpnd)).GetValidBitsNum(); uint32 src2VB = GetImmValidBit(immOpnd.GetValue(), dstOpnd.GetSize()); uint32 newVB = (src1VB <= src2VB ? src1VB : src2VB); - dstOpnd.SetValidBitsNum(newVB); + checkChangeAndSetValidBitsNum(dstOpnd, newVB); break; } case MOP_wiorrrr: { @@ -326,7 +497,7 @@ void AArch64ValidBitOpt::SetValidBits(Insn &insn) { if (newVB > k32BitSize) { newVB = k32BitSize; } - dstOpnd.SetValidBitsNum(newVB); + checkChangeAndSetValidBitsNum(dstOpnd, newVB); break; } case MOP_xiorrrr: { @@ -334,7 +505,7 @@ void AArch64ValidBitOpt::SetValidBits(Insn &insn) { uint32 src1VB = static_cast(insn.GetOperand(kInsnSecondOpnd)).GetValidBitsNum(); uint32 src2VB = static_cast(insn.GetOperand(kInsnThirdOpnd)).GetValidBitsNum(); uint32 newVB = (src1VB >= src2VB ? src1VB : src2VB); - dstOpnd.SetValidBitsNum(newVB); + checkChangeAndSetValidBitsNum(dstOpnd, newVB); break; } case MOP_wiorrri12: { @@ -346,7 +517,7 @@ void AArch64ValidBitOpt::SetValidBits(Insn &insn) { if (newVB > k32BitSize) { newVB = k32BitSize; } - dstOpnd.SetValidBitsNum(newVB); + checkChangeAndSetValidBitsNum(dstOpnd, newVB); break; } case MOP_xiorrri13: { @@ -355,7 +526,7 @@ void AArch64ValidBitOpt::SetValidBits(Insn &insn) { uint32 src1VB = static_cast(insn.GetOperand(kInsnSecondOpnd)).GetValidBitsNum(); uint32 src2VB = GetImmValidBit(immOpnd.GetValue(), dstOpnd.GetSize()); uint32 newVB = (src1VB >= src2VB ? src1VB : src2VB); - dstOpnd.SetValidBitsNum(newVB); + checkChangeAndSetValidBitsNum(dstOpnd, newVB); break; } case MOP_wrevrr16: { @@ -369,15 +540,16 @@ void AArch64ValidBitOpt::SetValidBits(Insn &insn) { case MOP_wubfizrri5i5: case MOP_xubfizrri6i6: { auto &dstOpnd = static_cast(insn.GetOperand(kInsnFirstOpnd)); - auto &lsb = static_cast(insn.GetOperand(kInsnThirdOpnd)); - auto &width = static_cast(insn.GetOperand(kInsnFourthOpnd)); - uint32 newVB = lsb.GetValue() + width.GetValue(); - dstOpnd.SetValidBitsNum(newVB); + auto &lsb = static_cast(insn.GetOperand(kInsnThirdOpnd)); + auto &width = static_cast(insn.GetOperand(kInsnFourthOpnd)); + uint32 newVB = static_cast(lsb.GetValue() + width.GetValue()); + checkChangeAndSetValidBitsNum(dstOpnd, newVB); break; } default: break; } + return hasChange; } bool AArch64ValidBitOpt::SetPhiValidBits(Insn &insn) { @@ -534,13 +706,26 @@ bool ExtValidBitPattern::CheckRedundantUxtbUxth(const Insn &insn) { srcOpnd = &static_cast(insn.GetOperand(kInsnSecondOpnd)); checkMops = {MOP_wstrb}; } - if (destOpnd != nullptr && destOpnd->IsSSAForm() && srcOpnd != nullptr && srcOpnd->IsSSAForm()) { + if (destOpnd != nullptr && destOpnd->IsSSAForm() && srcOpnd != nullptr) { destVersion = ssaInfo->FindSSAVersion(destOpnd->GetRegisterNumber()); - srcVersion = ssaInfo->FindSSAVersion(srcOpnd->GetRegisterNumber()); ASSERT(destVersion != nullptr, "find Version failed"); for (auto destUseIt : destVersion->GetAllUseInsns()) { Insn *useInsn = destUseIt.second->GetInsn(); - if (checkMops.find(useInsn->GetMachineOpcode()) == checkMops.end()) { + if (useInsn->GetMachineOpcode() == MOP_wandrri12 || useInsn->GetMachineOpcode() == MOP_xandrri13) { + // uxtb R101, R100 + // and R102, R101, #14 + // when imm value = 0xFF, the and insn will be deleted by AndValidBitPattern + CHECK_FATAL(useInsn->GetOperand(kInsnThirdOpnd).IsImmediate(), "must be imm!"); + auto &andImm = static_cast(useInsn->GetOperand(kInsnThirdOpnd)); + if (andImm.GetValue() < 0) { // when immediate number is less than 0, high-bits must be 1 + return false; + } + if (insn.GetMachineOpcode() == MOP_xuxth32 && andImm.GetValue() >= 0xFFFF) { + return false; + } else if (insn.GetMachineOpcode() == MOP_xuxtb32 && andImm.GetValue() >= 0xFF) { + return false; + } + } else if (checkMops.find(useInsn->GetMachineOpcode()) == checkMops.end()) { return false; } } @@ -557,7 +742,7 @@ bool ExtValidBitPattern::CheckValidCvt(const Insn &insn) { destOpnd = &static_cast(insn.GetOperand(kInsnFirstOpnd)); srcOpnd = &static_cast(insn.GetOperand(kInsnSecondOpnd)); } - if (insn.GetMachineOpcode() == MOP_xubfxrri6i6) { + if (insn.GetMachineOpcode() == MOP_xubfxrri6i6 || insn.GetMachineOpcode() == MOP_xsbfxrri6i6) { destOpnd = &static_cast(insn.GetOperand(kInsnFirstOpnd)); srcOpnd = &static_cast(insn.GetOperand(kInsnSecondOpnd)); auto &lsb = static_cast(insn.GetOperand(kInsnThirdOpnd)); @@ -575,6 +760,10 @@ bool ExtValidBitPattern::CheckValidCvt(const Insn &insn) { // check case: // uxtw R1 R0 // uxtw R2 R1 + // this case is forbidden becasue, these two insns would be removed and caused error. + // the first insn would be removed because R1's only has 32 bit use point. + // the second insn would be removed because R1's validbit is 32 bit (when we removed first one, we don't + // update the validbit of R1.) if (useInsn->GetMachineOpcode() == MOP_xuxtw64) { return false; } @@ -618,8 +807,9 @@ bool ExtValidBitPattern::CheckCondition(Insn &insn) { switch (mOp) { case MOP_xuxtb32: case MOP_xuxth32: { + auto maxValidBit = (mOp == MOP_xuxtb32 ? k8BitSize : k16BitSize); if (CheckRedundantUxtbUxth(insn) || - (static_cast(dstOpnd).GetValidBitsNum() == static_cast(srcOpnd).GetValidBitsNum() && + (static_cast(srcOpnd).GetValidBitsNum() <= maxValidBit && !static_cast(srcOpnd).IsPhysicalRegister())) { // Do not optimize callee ensuring vb of parameter newMop = MOP_wmovrr; break; @@ -629,11 +819,11 @@ bool ExtValidBitPattern::CheckCondition(Insn &insn) { case MOP_xuxtw64: { if (CheckValidCvt(insn) || (static_cast(srcOpnd).GetValidBitsNum() <= k32BitSize && !static_cast(srcOpnd).IsPhysicalRegister())) { // Do not optimize callee ensuring vb of parameter - if (static_cast(srcOpnd).IsSSAForm() && srcVersion != nullptr) { - srcVersion->SetImplicitCvt(); - } - newMop = MOP_wmovrr; - break; + if (static_cast(srcOpnd).IsSSAForm() && srcVersion != nullptr) { + srcVersion->SetImplicitCvt(); + } + newMop = MOP_wmovrr; + break; } return false; } @@ -654,21 +844,22 @@ bool ExtValidBitPattern::CheckCondition(Insn &insn) { CHECK_FATAL(immOpnd2.IsImmediate(), "must be immediate"); int64 lsb = static_cast(immOpnd1).GetValue(); int64 width = static_cast(immOpnd2).GetValue(); + auto &srcRegOpnd = static_cast(srcOpnd); if (CheckValidCvt(insn)) { - if (static_cast(srcOpnd).IsSSAForm() && srcVersion != nullptr) { + if (srcRegOpnd.IsSSAForm() && srcVersion != nullptr) { srcVersion->SetImplicitCvt(); } newMop = MOP_xmovrr; break; } - if (lsb != 0 || static_cast(srcOpnd).GetValidBitsNum() > width) { + if (lsb != 0 || srcRegOpnd.GetValidBitsNum() > width || + srcRegOpnd.IsPhysicalRegister()) { // Do not optimize callee ensuring vb of parameter return false; } - if ((mOp == MOP_wsbfxrri5i5 || mOp == MOP_xsbfxrri6i6) && - static_cast(srcOpnd).GetValidBitsNum() == width) { + if ((mOp == MOP_wsbfxrri5i5 || mOp == MOP_xsbfxrri6i6) && srcRegOpnd.GetValidBitsNum() == width) { return false; } - if (static_cast(srcOpnd).IsSSAForm() && srcVersion != nullptr) { + if (srcRegOpnd.IsSSAForm() && srcVersion != nullptr) { srcVersion->SetImplicitCvt(); } if (mOp == MOP_wubfxrri5i5 || mOp == MOP_wsbfxrri5i5) { @@ -700,17 +891,6 @@ void ExtValidBitPattern::Run(BB &bb, Insn &insn) { case MOP_xubfxrri6i6: case MOP_wsbfxrri5i5: case MOP_xsbfxrri6i6: { - // if dest is preg, change mop because there is no ssa version for preg - if (newDstOpnd != nullptr && newDstOpnd->IsPhysicalRegister() && newSrcOpnd != nullptr && - newSrcOpnd->IsSSAForm()) { - Insn &newInsn = cgFunc->GetInsnBuilder()->BuildInsn(newMop, *newDstOpnd, *newSrcOpnd); - bb.ReplaceInsn(insn, newInsn); - ssaInfo->ReplaceInsn(insn, newInsn); - if (newDstOpnd->GetSize() > newSrcOpnd->GetSize() || newDstOpnd->GetSize() != newDstOpnd->GetValidBitsNum()) { - ssaInfo->InsertSafePropInsn(newInsn.GetId()); - } - return; - } if (newDstOpnd != nullptr && newDstOpnd->IsSSAForm() && newSrcOpnd != nullptr && newSrcOpnd->IsSSAForm()) { destVersion = ssaInfo->FindSSAVersion(newDstOpnd->GetRegisterNumber()); ASSERT(destVersion != nullptr, "find Version failed"); @@ -718,8 +898,16 @@ void ExtValidBitPattern::Run(BB &bb, Insn &insn) { ASSERT(srcVersion != nullptr, "find Version failed"); cgFunc->InsertExtendSet(srcVersion->GetSSAvRegOpnd()->GetRegisterNumber()); ReplaceImplicitCvtAndProp(destVersion, srcVersion); - return; + } else if (newDstOpnd != nullptr && newSrcOpnd != nullptr) { + // only change mop because there is no ssa version + Insn &newInsn = cgFunc->GetInsnBuilder()->BuildInsn(newMop, *newDstOpnd, *newSrcOpnd); + bb.ReplaceInsn(insn, newInsn); + ssaInfo->ReplaceInsn(insn, newInsn); + if (newDstOpnd->GetSize() > newSrcOpnd->GetSize() || newDstOpnd->GetSize() != newDstOpnd->GetValidBitsNum()) { + ssaInfo->InsertSafePropInsn(newInsn.GetId()); + } } + break; } default: return; @@ -961,5 +1149,164 @@ void CmpBranchesPattern::Run(BB &bb, Insn &insn) { DumpAfterPattern(prevs, &insn, &newInsn); } } + +bool RSPattern::CheckCondition(Insn &insn) { + if (!insn.GetOperand(kInsnSecondOpnd).IsRegister() && !insn.GetOperand(kInsnThirdOpnd).IsImmediate()) { + return false; + } + RegOperand regOpnd = static_cast(insn.GetOperand(kInsnSecondOpnd)); + ImmOperand &oldImmOperand = static_cast(insn.GetOperand(kInsnThirdOpnd)); + if (regOpnd.GetValidBitsNum() < oldImmOperand.GetValue()) { + newMop = insn.GetMachineOpcode() == MOP_xasrrri6 ? MOP_xmovri64 : MOP_wmovri32; + oldImmSize = oldImmOperand.GetSize(); + oldImmIsSigned = oldImmOperand.IsSignedValue(); + return true; + } + return false; +} + +void RSPattern::Run(BB &bb, Insn &insn) { + if (!CheckCondition(insn)) { + return; + } + auto *aarFunc = static_cast(cgFunc); + ImmOperand &newImmOpnd = aarFunc->CreateImmOperand(0, oldImmSize, oldImmIsSigned); + Insn &newInsn = cgFunc->GetInsnBuilder()->BuildInsn(newMop, insn.GetOperand(kInsnFirstOpnd), newImmOpnd); + bb.ReplaceInsn(insn, newInsn); + // update ssa info + ssaInfo->ReplaceInsn(insn, newInsn); +} + +void RevCbzToCbzPattern::SetRevValue(MOperator mop, const uint64 &oldVal, uint64 &newVal, bool isLogicalImm16) const { + if (mop == MOP_wrevrr16) { + // 32bits mask for wrev16 + // 0x000000FFU, 0x0000FF00U + newVal = (((oldVal & 0x000000FFU) << k8BitSize) | ((oldVal & 0x0000FF00U) >> k8BitSize)); + // if rev16 use point validbit is 16bit, construct a valid imm12 number as much as possible + if (isLogicalImm16) { + newVal |= (newVal << k16BitSize); + } + } else if (mop == MOP_wrevrr) { + // 32bits mask for wrev + // 0x000000FFU, 0x0000FF00U, 0x00FF0000U, 0xFF000000U + newVal = (((oldVal & 0x000000FFU) << k24BitSize) | ((oldVal & 0x0000FF00U) << k8BitSize) | + ((oldVal & 0x00FF0000U) >> k8BitSize) | ((oldVal & 0xFF000000U) >> k24BitSize)); + } else if (mop == MOP_xrevrr) { + // 64bits mask for xrev + // 0x00000000000000FFULL, 0x000000000000FF00ULL, 0x0000000000FF0000ULL, 0x00000000FF000000ULL + // 0x000000FF00000000ULL, 0x0000FF0000000000ULL, 0x00FF000000000000ULL, 0xFF00000000000000ULL + newVal = (((oldVal & 0x00000000000000FFULL) << k56BitSize) | + ((oldVal & 0x000000000000FF00ULL) << k40BitSize) | + ((oldVal & 0x0000000000FF0000ULL) << k24BitSize) | + ((oldVal & 0x00000000FF000000ULL) << k8BitSize) | + ((oldVal & 0x000000FF00000000ULL) >> k8BitSize) | + ((oldVal & 0x0000FF0000000000ULL) >> k24BitSize) | + ((oldVal & 0x00FF000000000000ULL) >> k40BitSize) | + ((oldVal & 0xFF00000000000000ULL) >> k56BitSize)); + } +} + +bool RevCbzToCbzPattern::CheckCondition(Insn &insn) { + auto *curReg = static_cast(&(insn.GetOperand(kInsnFirstOpnd))); + VRegVersion *curVersion = ssaInfo->FindSSAVersion(curReg->GetRegisterNumber()); + ASSERT(curVersion != nullptr, "find Version failed"); + auto *useList = &(curVersion->GetAllUseInsns()); + + while (useList->size() == k1BitSize) { + Insn *nextInsn = useList->begin()->second->GetInsn(); + if (nextInsn == nullptr) { + return false; + } + MOperator useMop = nextInsn->GetMachineOpcode(); + if ((useMop == MOP_wcbz || useMop == MOP_xcbz || useMop == MOP_wcbnz || useMop == MOP_xcbnz)) { + cbzInsn = nextInsn; + return true; + } + if ((useMop == MOP_wcmpri || useMop == MOP_xcmpri)) { + curReg = static_cast(&(nextInsn->GetOperand(kInsnFirstOpnd))); + curVersion = ssaInfo->FindSSAVersion(curReg->GetRegisterNumber()); + ASSERT(curVersion != nullptr, "find Version failed"); + useList = &(curVersion->GetAllUseInsns()); + if (useList->size() != k1BitSize) { + return false; + } + Insn *condInsn = useList->begin()->second->GetInsn(); + if (condInsn == nullptr) { + return false; + } + MOperator condMop = condInsn->GetMachineOpcode(); + if ((condMop != MOP_beq) && (condMop != MOP_bne)) { + return false; + } + oldInsns.push_back(nextInsn); + return true; + } + if (((useMop == MOP_weorrri12) || (useMop == MOP_xeorrri13) || (useMop == MOP_wandrri12) || + (useMop == MOP_xandrri13) || (useMop == MOP_wiorrri12) || (useMop == MOP_xiorrri13))) { + oldInsns.push_back(nextInsn); + curReg = static_cast(&(nextInsn->GetOperand(kInsnFirstOpnd))); + curVersion = ssaInfo->FindSSAVersion(curReg->GetRegisterNumber()); + ASSERT(curVersion != nullptr, "find Version failed"); + useList = &(curVersion->GetAllUseInsns()); + continue; + } + break; + } + return false; +} + +void RevCbzToCbzPattern::Run(BB &bb, Insn &insn) { + if (!CheckCondition(insn)) { + return; + } + auto &revUseReg = static_cast(insn.GetOperand(kInsnSecondOpnd)); + MOperator revMop = insn.GetMachineOpcode(); + bool isValidBits16 = false; + if ((revMop == MOP_wrevrr16) && (revUseReg.GetValidBitsNum() <= k16BitSize)) { + isValidBits16 = true; + } + + for (size_t i = 0; i < oldInsns.size(); ++i) { + auto *oldInsn = oldInsns[i]; + MOperator mop = oldInsn->GetMachineOpcode(); + auto &oldImmOpnd = static_cast(oldInsn->GetOperand(kInsnThirdOpnd)); + uint64 oldValue = static_cast(oldImmOpnd.GetValue()); + uint64 newValue = 0; + uint32 immSize = kMaxImmVal12Bits; + bool isLogicalImm = true; + if ((mop == MOP_xcmpri) || (mop == MOP_wcmpri)) { + isLogicalImm = false; + } + if ((revMop == MOP_xrevrr) && isLogicalImm) { + immSize = kMaxImmVal13Bits; + } + SetRevValue(revMop, oldValue, newValue, (isLogicalImm && isValidBits16)); + auto *aarFunc = static_cast(cgFunc); + ImmOperand &newImmOpnd = aarFunc->CreateImmOperand(static_cast(newValue), immSize, false); + Insn &newInsn = cgFunc->GetInsnBuilder()->BuildInsn(mop, oldInsn->GetOperand(kInsnFirstOpnd), + oldInsn->GetOperand(kInsnSecondOpnd), newImmOpnd); + if (i == 0) { + newInsn.SetOperand(kInsnSecondOpnd, revUseReg); + } + if (!VERIFY_INSN(&newInsn)) { + return; + } + newInsns.push_back(&newInsn); + } + + if (oldInsns.size() == 0) { + CHECK_FATAL(cbzInsn != nullptr, "cbzInsn can't be nullptr"); + Insn &newInsn = cgFunc->GetInsnBuilder()->BuildInsn(cbzInsn->GetMachineOpcode(), + revUseReg, cbzInsn->GetOperand(kInsnSecondOpnd)); + cbzInsn->GetBB()->ReplaceInsn(*cbzInsn, newInsn); + ssaInfo->ReplaceInsn(*cbzInsn, newInsn); + } + + for (size_t i = 0; i < oldInsns.size(); ++i) { + oldInsns[i]->GetBB()->ReplaceInsn(*oldInsns[i], *newInsns[i]); + ssaInfo->ReplaceInsn(*oldInsns[i], *newInsns[i]); + } +} + } /* namespace maplebe */ diff --git a/src/mapleall/maple_be/src/cg/alignment.cpp b/src/mapleall/maple_be/src/cg/alignment.cpp index 18124de852083a1bc4087e1f176ec6f95d9ab3bd..85a4680687a2a91af66cc11c269855b443c2e640 100644 --- a/src/mapleall/maple_be/src/cg/alignment.cpp +++ b/src/mapleall/maple_be/src/cg/alignment.cpp @@ -23,7 +23,7 @@ namespace maplebe { void AlignAnalysis::AnalysisAlignment() { // If pgo is enabled, we analysis alignment on specific by frequency. - if (CGOptions::DoLiteProfUse() && CGOptions::DoPgoCodeAlign()) { + if (cgFunc.HasLaidOutByPgoUse() && CGOptions::DoPgoCodeAlign()) { LiteProfile::BBInfo *bbInfo = cgFunc.GetFunction().GetModule()->GetLiteProfile().GetFuncBBProf(cgFunc.GetName()); if (bbInfo == nullptr) { LogInfo::MapleLogger() << cgFunc.GetName() << " is not in white list in pgo use\n"; diff --git a/src/mapleall/maple_be/src/cg/base_schedule.cpp b/src/mapleall/maple_be/src/cg/base_schedule.cpp index a3cac2062c18051087c9b611ca1feb677b2c602c..47b76e25730491fda137b16895aaa9c34a05cb50 100644 --- a/src/mapleall/maple_be/src/cg/base_schedule.cpp +++ b/src/mapleall/maple_be/src/cg/base_schedule.cpp @@ -14,12 +14,13 @@ */ #include "base_schedule.h" +#ifdef TARGAARCH64 +#include "aarch64_cg.h" +#endif namespace maplebe { -/* - * Set insnId to guarantee default priority, - * Set locInsn to maintain debug info - */ +// Set insnId to guarantee default priority, +// Set locInsn to maintain debug info void BaseSchedule::InitInsnIdAndLocInsn() { uint32 id = 0; FOR_ALL_BB(bb, &cgFunc) { @@ -40,6 +41,18 @@ void BaseSchedule::InitInsnIdAndLocInsn() { } } +void BaseSchedule::InitMachineInsnNum(CDGNode &cdgNode) const { + uint32 insnNum = 0; + BB *curBB = cdgNode.GetBB(); + CHECK_FATAL(curBB != nullptr, "get bb from cdgNode failed"); + FOR_BB_INSNS_CONST(insn, curBB) { + if (insn->IsMachineInstruction()) { + insnNum++; + } + } + cdgNode.SetInsnNum(insnNum); +} + void BaseSchedule::InitInRegion(CDGRegion ®ion) const { // Init valid dependency size for scheduling for (auto *cdgNode : region.GetRegionNodes()) { @@ -154,4 +167,47 @@ void BaseSchedule::DumpCDGNodeInfoAfterSchedule(CDGNode &cdgNode) const { curBB->Dump(); LogInfo::MapleLogger() << " = = = = = = = = = = = = = = = = = = = = = = = = = = =\n\n\n"; } -} /* namespace maplebe */ + +void BaseSchedule::DumpInsnInfoByScheduledOrder(CDGNode &cdgNode) const { + // For print table log with unequal widths + int printWidth1 = 6; + int printWidth2 = 8; + int printWidth3 = 14; + LogInfo::MapleLogger() << " ------------------------------------------------\n"; + (void)LogInfo::MapleLogger().fill(' '); + LogInfo::MapleLogger() << " " << + std::setiosflags(std::ios::left) << std::setw(printWidth1) << "insn" << std::resetiosflags(std::ios::left) << + std::setiosflags(std::ios::right) << std::setw(printWidth2) << "mop" << std::resetiosflags(std::ios::right) << + std::setiosflags(std::ios::right) << std::setw(printWidth2) << "bb" << std::resetiosflags(std::ios::right) << + std::setiosflags(std::ios::right) << std::setw(printWidth3) << "succs(latency)" << + std::resetiosflags(std::ios::right) << "\n"; + LogInfo::MapleLogger() << " ------------------------------------------------\n"; + BB *curBB = cdgNode.GetBB(); + ASSERT(curBB != nullptr, "get bb from cdgNode failed"); + FOR_BB_INSNS_CONST(insn, curBB) { + if (!insn->IsMachineInstruction()) { + continue; + } + LogInfo::MapleLogger() << " " << + std::setiosflags(std::ios::left) << std::setw(printWidth1) << insn->GetId() << + std::resetiosflags(std::ios::left) << std::setiosflags(std::ios::right) << std::setw(printWidth2); + const InsnDesc *md = nullptr; +#ifdef TARGAARCH64 + md = &AArch64CG::kMd[insn->GetMachineOpcode()]; +#endif + CHECK_NULL_FATAL(md); + LogInfo::MapleLogger() << md->name << std::resetiosflags(std::ios::right) << + std::setiosflags(std::ios::right) << std::setw(printWidth2) << curBB->GetId() << + std::resetiosflags(std::ios::right) << std::setiosflags(std::ios::right) << std::setw(printWidth3); + const DepNode *depNode = insn->GetDepNode(); + ASSERT(depNode != nullptr, "get depNode from insn failed"); + for (auto succLink : depNode->GetSuccs()) { + DepNode &succNode = succLink->GetTo(); + LogInfo::MapleLogger() << succNode.GetInsn()->GetId() << "(" << succLink->GetLatency() << "), "; + } + LogInfo::MapleLogger() << std::resetiosflags(std::ios::right) << "\n"; + } + LogInfo::MapleLogger() << " ------------------------------------------------\n"; + LogInfo::MapleLogger() << "\n"; +} +} // namespace maplebe diff --git a/src/mapleall/maple_be/src/cg/cfgo.cpp b/src/mapleall/maple_be/src/cg/cfgo.cpp index cba7c6444ddaca4990c6c7cca0f30a036d2ddaae..b69543824319adff904596b07a6e77a02af82aef 100644 --- a/src/mapleall/maple_be/src/cg/cfgo.cpp +++ b/src/mapleall/maple_be/src/cg/cfgo.cpp @@ -31,7 +31,7 @@ using namespace maple; #define CFGO_DUMP_NEWPM CG_DEBUG_FUNC(f) -/* return true if to is put after from and there is no real insns between from and to, */ +// return true if to is put after from and there is no real insns between from and to bool ChainingPattern::NoInsnBetween(const BB &from, const BB &to) const { const BB *bb = nullptr; for (bb = from.GetNext(); bb != nullptr && bb != &to && bb != cgFunc->GetLastBB(); bb = bb->GetNext()) { @@ -42,7 +42,7 @@ bool ChainingPattern::NoInsnBetween(const BB &from, const BB &to) const { return (bb == &to); } -/* return true if insns in bb1 and bb2 are the same except the last goto insn. */ +// return true if insns in bb1 and bb2 are the same except the last goto insn. bool ChainingPattern::DoSameThing(const BB &bb1, const Insn &last1, const BB &bb2, const Insn &last2) const { const Insn *insn1 = bb1.GetFirstMachineInsn(); const Insn *insn2 = bb2.GetFirstMachineInsn(); @@ -75,12 +75,10 @@ bool ChainingPattern::DoSameThing(const BB &bb1, const Insn &last1, const BB &bb return (insn1 == last1.GetNextMachineInsn() && insn2 == last2.GetNextMachineInsn()); } -/* - * BB2 can be merged into BB1, if - * 1. BB1's kind is fallthrough; - * 2. BB2 has only one predecessor which is BB1 and BB2 is not the lastbb - * 3. BB2 is neither catch BB nor switch case BB - */ +// BB2 can be merged into BB1, if +// 1. BB1's kind is fallthrough; +// 2. BB2 has only one predecessor which is BB1 and BB2 is not the lastbb +// 3. BB2 is neither catch BB nor switch case BB bool ChainingPattern::MergeFallthuBB(BB &curBB) { BB *sucBB = curBB.GetNext(); if (sucBB == nullptr || @@ -114,10 +112,8 @@ bool ChainingPattern::MergeGotoBB(BB &curBB, BB &sucBB) { } bool ChainingPattern::MoveSuccBBAsCurBBNext(BB &curBB, BB &sucBB) { - /* - * without the judge below, there is - * Assembler Error: CFI state restore without previous remember - */ + // without the judge below, there is + // Assembler Error: CFI state restore without previous remember if (sucBB.GetHasCfi() || (sucBB.GetFirstInsn() != nullptr && sucBB.GetFirstInsn()->IsCfiInsn())) { return false; } @@ -125,7 +121,7 @@ bool ChainingPattern::MoveSuccBBAsCurBBNext(BB &curBB, BB &sucBB) { if (checkOnly) { return false; } - /* put sucBB as curBB's next. */ + // put sucBB as curBB's next. ASSERT(sucBB.GetPrev() != nullptr, "the target of current goto BB will not be the first bb"); sucBB.GetPrev()->SetNext(sucBB.GetNext()); if (sucBB.GetNext() != nullptr) { @@ -196,7 +192,7 @@ bool ChainingPattern::ClearCurBBAndResetTargetBB(BB &curBB, BB &sucBB) { if (last1 == nullptr) { return false; } - if (!DoSameThing(*newTarget, *last1, curBB, *brInsn->GetPreviousMachineInsn())) { + if (brInsn->GetPreviousMachineInsn() && !DoSameThing(*newTarget, *last1, curBB, *brInsn->GetPreviousMachineInsn())) { return false; } @@ -225,13 +221,15 @@ bool ChainingPattern::ClearCurBBAndResetTargetBB(BB &curBB, BB &sucBB) { return true; } -/* - * Following optimizations are performed: - * 1. Basic block merging - * 2. unnecessary jumps elimination - * 3. Remove duplicates Basic block. - */ +// Following optimizations are performed: +// 1. Basic block merging +// 2. unnecessary jumps elimination +// 3. Remove duplicates Basic block. bool ChainingPattern::Optimize(BB &curBB) { + if (curBB.IsUnreachable()) { + return false; + } + if (curBB.GetKind() == BB::kBBFallthru) { return MergeFallthuBB(curBB); } @@ -243,13 +241,11 @@ bool ChainingPattern::Optimize(BB &curBB) { } BB *sucBB = CGCFG::GetTargetSuc(curBB); - /* - * BB2 can be merged into BB1, if - * 1. BB1 ends with a goto; - * 2. BB2 has only one predecessor which is BB1 - * 3. BB2 is of goto kind. Otherwise, the original fall through will be broken - * 4. BB2 is neither catch BB nor switch case BB - */ + // BB2 can be merged into BB1, if + // 1. BB1 ends with a goto; + // 2. BB2 has only one predecessor which is BB1 + // 3. BB2 is of goto kind. Otherwise, the original fall through will be broken + // 4. BB2 is neither catch BB nor switch case BB if (sucBB == nullptr || curBB.GetEhSuccs().size() != sucBB->GetEhSuccs().size()) { return false; } @@ -267,38 +263,30 @@ bool ChainingPattern::Optimize(BB &curBB) { return false; } return MergeGotoBB(curBB, *sucBB); - } else if (sucBB != &curBB && - curBB.GetNext() != sucBB && - sucBB != cgFunc->GetLastBB() && - !sucBB->IsPredecessor(*sucBB->GetPrev()) && + } else if (sucBB != &curBB && curBB.GetNext() != sucBB && + sucBB != cgFunc->GetLastBB() && !sucBB->IsPredecessor(*sucBB->GetPrev()) && !(sucBB->GetNext() != nullptr && sucBB->GetNext()->IsPredecessor(*sucBB)) && - !IsLabelInLSDAOrSwitchTable(sucBB->GetLabIdx()) && - sucBB->GetEhSuccs().empty() && + !IsLabelInLSDAOrSwitchTable(sucBB->GetLabIdx()) && sucBB->GetEhSuccs().empty() && sucBB->GetKind() != BB::kBBThrow && curBB.GetNext() != nullptr) { return MoveSuccBBAsCurBBNext(curBB, *sucBB); } - /* - * Last goto instruction can be removed, if: - * 1. The goto target is physically the next one to current BB. - */ + // Last goto instruction can be removed, if: + // 1. The goto target is physically the next one to current BB. else if (sucBB == curBB.GetNext() || (NoInsnBetween(curBB, *sucBB) && !IsLabelInLSDAOrSwitchTable(curBB.GetNext()->GetLabIdx()))) { return RemoveGotoInsn(curBB, *sucBB); } - /* - * Clear curBB and target it to sucBB->GetPrev() - * if sucBB->GetPrev() and curBB's insns are the same. - * - * curBB: curBB: - * insn_x0 b prevbb - * b sucBB ... - * ... ==> prevbb: - * prevbb: insn_x0 - * insn_x0 sucBB: - * sucBB: - */ - else if (sucBB != curBB.GetNext() && - !curBB.IsSoloGoto() && + // Clear curBB and target it to sucBB->GetPrev() + // if sucBB->GetPrev() and curBB's insns are the same. + // + // curBB: curBB: + // insn_x0 b prevbb + // b sucBB ... + // ... ==> prevbb: + // prevbb: insn_x0 + // insn_x0 sucBB: + // sucBB: + else if (sucBB != curBB.GetNext() && !curBB.IsSoloGoto() && !IsLabelInLSDAOrSwitchTable(curBB.GetLabIdx()) && sucBB->GetKind() == BB::kBBReturn && sucBB->GetPreds().size() > 1 && @@ -311,28 +299,26 @@ bool ChainingPattern::Optimize(BB &curBB) { return false; } -/* - * curBB: curBB: - * insn_x0 insn_x0 - * b targetBB b BB - * ... ==> ... - * targetBB: targetBB: - * b BB b BB - * ... ... - * BB: BB: - * *------------------------------ - * curBB: curBB: - * insn_x0 insn_x0 - * cond_br brBB cond_br BB - * ... ... - * brBB: ==> brBB: - * b BB b BB - * ... ... - * BB: BB: - * - * conditions: - * 1. only goto and comment in brBB; - */ +// curBB: curBB: +// insn_x0 insn_x0 +// b targetBB b BB +// ... ==> ... +// targetBB: targetBB: +// b BB b BB +// ... ... +// BB: BB: +// *------------------------------ +// curBB: curBB: +// insn_x0 insn_x0 +// cond_br brBB cond_br BB +// ... ... +// brBB: ==> brBB: +// b BB b BB +// ... ... +// BB: BB: +// +// conditions: +// 1. only goto and comment in brBB; bool SequentialJumpPattern::Optimize(BB &curBB) { if (curBB.IsUnreachable()) { return false; @@ -422,7 +408,7 @@ void SequentialJumpPattern::UpdateSwitchSucc(BB &curBB, BB &sucBB) const { } cgFunc->UpdateEmitSt(curBB, sucBB.GetLabIdx(), gotoTarget->GetLabIdx()); - /* connect curBB, gotoTarget */ + // connect curBB, gotoTarget for (auto it = gotoTarget->GetPredsBegin(); it != gotoTarget->GetPredsEnd(); ++it) { if (*it == &sucBB) { auto origIt = it; @@ -454,7 +440,7 @@ void SequentialJumpPattern::UpdateSwitchSucc(BB &curBB, BB &sucBB) const { break; } } - /* cut curBB -> sucBB */ + // cut curBB -> sucBB for (auto it = sucBB.GetPredsBegin(); it != sucBB.GetPredsEnd(); ++it) { if (*it == &curBB) { sucBB.ErasePreds(it); @@ -495,12 +481,10 @@ bool SequentialJumpPattern::HasInvalidPred(BB &sucBB) const { return false; } -/* - * preCond: - * sucBB is one of curBB's successor. - * - * Change curBB's successor to sucBB's successor - */ +// preCond: +// sucBB is one of curBB's successor. +// +// Change curBB's successor to sucBB's successor void SequentialJumpPattern::SkipSucBB(BB &curBB, BB &sucBB) const { BB *gotoTarget = CGCFG::GetTargetSuc(sucBB); CHECK_FATAL(gotoTarget != nullptr, "gotoTarget is null in SequentialJumpPattern::SkipSucBB"); @@ -562,18 +546,16 @@ void SequentialJumpPattern::SkipSucBB(BB &curBB, BB &sucBB) const { } } -/* - * Found pattern - * curBB: curBB: - * ... ==> ... - * cond_br brBB cond1_br ftBB - * ftBB: brBB: - * bl throwfunc ... - * brBB: retBB: - * ... ... - * retBB: ftBB: - * ... bl throwfunc - */ +// Found pattern +// curBB: curBB: +// ... ==> ... +// cond_br brBB cond1_br ftBB +// ftBB: brBB: +// bl throwfunc ... +// brBB: retBB: +// ... ... +// retBB: ftBB: +// ... bl throwfunc void FlipBRPattern::RelocateThrowBB(BB &curBB) { BB *ftBB = curBB.GetNext(); CHECK_FATAL(ftBB != nullptr, "ifBB has a fall through BB"); @@ -610,18 +592,18 @@ void FlipBRPattern::RelocateThrowBB(BB &curBB) { } } } - /* get branch insn of curBB */ + // get branch insn of curBB Insn *curBBBranchInsn = theCFG->FindLastCondBrInsn(curBB); CHECK_FATAL(curBBBranchInsn != nullptr, "curBB(it is a kBBif) has no branch"); - /* Reverse the branch */ + // Reverse the branch uint32 targetIdx = GetJumpTargetIdx(*curBBBranchInsn); MOperator mOp = FlipConditionOp(curBBBranchInsn->GetMachineOpcode()); LabelOperand &brTarget = cgFunc->GetOrCreateLabelOperand(*ftBB); curBBBranchInsn->SetMOP(cgFunc->GetCG()->GetTargetMd(mOp)); curBBBranchInsn->SetOperand(targetIdx, brTarget); - /* move ftBB after retBB */ + // move ftBB after retBB curBB.SetNext(brBB); CHECK_NULL_FATAL(brBB); brBB->SetPrev(&curBB); @@ -632,35 +614,36 @@ void FlipBRPattern::RelocateThrowBB(BB &curBB) { retBB->SetNext(ftBB); } -/* - * 1. relocate goto BB - * Found pattern (1) ftBB->GetPreds().size() == 1 - * curBB: curBB: cond1_br target - * ... ==> brBB: - * cond_br brBB ... - * ftBB: targetBB: (ftBB,targetBB) - * goto target (2) ftBB->GetPreds().size() > 1 - * brBB: curBB : cond1_br ftBB - * ... brBB: - * targetBB ... - * ftBB - * targetBB - * - * loopHeaderBB: loopHeaderBB: - * ... ... - * cond_br loopExit: cond_br loopHeaderBB - * ftBB: ftBB: - * goto loopHeaderBB: goto loopExit - * - * 3. relocate throw BB in RelocateThrowBB() - */ +// 1. relocate goto BB +// Found pattern (1) ftBB->GetPreds().size() == 1 +// curBB: curBB: cond1_br target +// ... ==> brBB: +// cond_br brBB ... +// ftBB: targetBB: (ftBB,targetBB) +// goto target (2) ftBB->GetPreds().size() > 1 +// brBB: curBB : cond1_br ftBB +// ... brBB: +// targetBB ... +// ftBB +// targetBB +// +// loopHeaderBB: loopHeaderBB: +// ... ... +// cond_br loopExit: cond_br loopHeaderBB +// ftBB: ftBB: +// goto loopHeaderBB: goto loopExit +// +// 3. relocate throw BB in RelocateThrowBB() bool FlipBRPattern::Optimize(BB &curBB) { + if (curBB.IsUnreachable()) { + return false; + } if (curBB.GetKind() == BB::kBBIf && !curBB.IsEmpty()) { BB *ftBB = curBB.GetNext(); ASSERT(ftBB != nullptr, "ftBB is null in FlipBRPattern::Optimize"); BB *brBB = CGCFG::GetTargetSuc(curBB); ASSERT(brBB != nullptr, "brBB is null in FlipBRPattern::Optimize"); - /* Check if it can be optimized */ + // Check if it can be optimized if (ftBB->GetKind() == BB::kBBGoto && ftBB->GetNext() == brBB) { if (!ftBB->GetEhSuccs().empty()) { return false; @@ -681,7 +664,7 @@ bool FlipBRPattern::Optimize(BB &curBB) { } ASSERT(brInsn != nullptr, "FlipBRPattern: ftBB has no branch"); - /* Reverse the branch */ + // Reverse the branch uint32 targetIdx = GetJumpTargetIdx(*curBBBranchInsn); MOperator mOp = FlipConditionOp(curBBBranchInsn->GetMachineOpcode()); if (mOp == 0) { @@ -696,12 +679,12 @@ bool FlipBRPattern::Optimize(BB &curBB) { curBBBranchInsn->SetMOP(cgFunc->GetCG()->GetTargetMd(mOp)); Operand &brTarget = brInsn->GetOperand(GetJumpTargetIdx(*brInsn)); curBBBranchInsn->SetOperand(targetIdx, brTarget); - /* Insert ftBB's insn at the beginning of tgtBB. */ + // Insert ftBB's insn at the beginning of tgtBB. if (!ftBB->IsSoloGoto()) { ftBB->RemoveInsn(*brInsn); tgtBB->InsertAtBeginning(*ftBB); } - /* Patch pred and succ lists */ + // Patch pred and succ lists ftBB->EraseSuccs(it); ftBB->PushBackSuccs(*brBB); it = curBB.GetSuccsBegin(); @@ -726,7 +709,7 @@ bool FlipBRPattern::Optimize(BB &curBB) { } } brBB->PushFrontPreds(*ftBB); - /* Remove instructions from ftBB so curBB falls thru to brBB */ + // Remove instructions from ftBB so curBB falls thru to brBB ftBB->SetFirstInsn(nullptr); ftBB->SetLastInsn(nullptr); ftBB->SetKind(BB::kBBFallthru); @@ -800,13 +783,13 @@ bool FlipBRPattern::Optimize(BB &curBB) { return false; } -/* remove a basic block that contains nothing */ +// remove a basic block that contains nothing bool EmptyBBPattern::Optimize(BB &curBB) { // Can not remove the BB whose address is referenced by adrp_label insn if (curBB.IsUnreachable() || curBB.IsAdrpLabel()) { return false; } - /* Empty bb and it's not a cleanupBB/returnBB/lastBB/catchBB. */ + // Empty bb and it's not a cleanupBB/returnBB/lastBB/catchBB. if (curBB.GetPrev() == nullptr || curBB.IsCleanup() || &curBB == cgFunc->GetLastBB() || curBB.GetKind() == BB::kBBReturn || IsLabelInLSDAOrSwitchTable(curBB.GetLabIdx())) { return false; @@ -847,20 +830,18 @@ bool EmptyBBPattern::Optimize(BB &curBB) { return false; } -/* - * remove unreachable BB - * condition: - * 1. unreachable BB can't have cfi instruction when postcfgo. - */ +// remove unreachable BB +// condition: +// 1. unreachable BB can't have cfi instruction when postcfgo. bool UnreachBBPattern::Optimize(BB &curBB) { if (curBB.IsUnreachable()) { Log(curBB.GetId()); if (checkOnly) { return false; } - /* if curBB in exitbbsvec,return false. */ + // if curBB in exitbbsvec,return false. if (cgFunc->IsExitBB(curBB)) { - /* In C some bb follow noreturn calls should remain unreachable */ + // In C some bb follow noreturn calls should remain unreachable curBB.SetUnreachable(cgFunc->GetMirModule().GetSrcLang() == kSrcLangC); return false; } @@ -870,10 +851,10 @@ bool UnreachBBPattern::Optimize(BB &curBB) { } EHFunc *ehFunc = cgFunc->GetEHFunc(); - /* if curBB InLSDA ,replace curBB's label with nextReachableBB before remove it. */ + // if curBB InLSDA ,replace curBB's label with nextReachableBB before remove it. if (ehFunc != nullptr && ehFunc->NeedFullLSDA() && CGCFG::InLSDA(curBB.GetLabIdx(), ehFunc)) { - /* find nextReachableBB */ + // find nextReachableBB BB *nextReachableBB = nullptr; for (BB *bb = &curBB; bb != nullptr; bb = bb->GetNext()) { if (!bb->IsUnreachable()) { @@ -891,7 +872,7 @@ bool UnreachBBPattern::Optimize(BB &curBB) { ehFunc->GetLSDACallSiteTable()->UpdateCallSite(curBB, *nextReachableBB); } - /* Indicates whether the curBB is removed. */ + // Indicates whether the curBB is removed bool isRemoved = true; if (curBB.GetPrev() != nullptr) { curBB.GetPrev()->SetNext(curBB.GetNext()); @@ -904,7 +885,7 @@ bool UnreachBBPattern::Optimize(BB &curBB) { if (cgFunc->GetFirstBB() == cgFunc->GetLastBB() && cgFunc->GetFirstBB() != nullptr) { isRemoved = false; } - /* flush after remove; */ + // flush after remove for (BB *bb : curBB.GetSuccs()) { bb->RemovePreds(curBB); cgFunc->GetTheCFG()->FlushUnReachableStatusAndRemoveRelations(*bb, *cgFunc); @@ -915,7 +896,7 @@ bool UnreachBBPattern::Optimize(BB &curBB) { } curBB.ClearSuccs(); curBB.ClearEhSuccs(); - /* return always be false */ + // return always be false if (!isRemoved) { return false; } @@ -936,22 +917,20 @@ bool UnreachBBPattern::Optimize(BB &curBB) { return false; } -/* BB_pred1: BB_pred1: - * b curBB insn_x0 - * ... b BB2 - * BB_pred2: ==> ... - * b curBB BB_pred2: - * ... insn_x0 - * curBB: b BB2 - * insn_x0 ... - * b BB2 curBB: - * insn_x0 - * b BB2 - * condition: - * 1. The number of instruct in curBB - * is less than THRESHOLD; - * 2. curBB can't have cfi instruction when postcfgo. - */ +// BB_pred1: BB_pred1: +// b curBB insn_x0 +// ... b BB2 +// BB_pred2: ==> ... +// b curBB BB_pred2: +// ... insn_x0 +// curBB: b BB2 +// insn_x0 ... +// b BB2 curBB: +// insn_x0 +// b BB2 +// condition: +// 1. The number of instruction in curBB is less than THRESHOLD; +// 2. curBB can't have cfi instruction when postcfgo bool DuplicateBBPattern::Optimize(BB &curBB) { if (!cgFunc->IsAfterRegAlloc()) { return false; @@ -963,7 +942,7 @@ bool DuplicateBBPattern::Optimize(BB &curBB) { return false; } - /* curBB can't be in try block */ + // curBB can't be in try block if (curBB.GetKind() != BB::kBBGoto || IsLabelInLSDAOrSwitchTable(curBB.GetLabIdx()) || !curBB.GetEhSuccs().empty()) { return false; @@ -976,7 +955,7 @@ bool DuplicateBBPattern::Optimize(BB &curBB) { } } #endif - /* It is possible curBB jump to itself */ + // It is possible curBB jump to itself uint32 numPreds = curBB.NumPreds(); for (BB *bb : curBB.GetPreds()) { if (bb == &curBB) { @@ -984,8 +963,7 @@ bool DuplicateBBPattern::Optimize(BB &curBB) { } } - if (numPreds > 1 && CGCFG::GetTargetSuc(curBB) != nullptr && - CGCFG::GetTargetSuc(curBB)->NumPreds() > 1) { + if (numPreds > 1 && CGCFG::GetTargetSuc(curBB) != nullptr && CGCFG::GetTargetSuc(curBB)->NumPreds() > 1) { std::vector candidates; for (BB *bb : curBB.GetPreds()) { if (bb->GetKind() == BB::kBBGoto && bb->GetNext() != &curBB && bb != &curBB && !bb->IsEmpty()) { @@ -1037,7 +1015,7 @@ bool DuplicateBBPattern::Optimize(BB &curBB) { return false; } -/* === new pm === */ +// === new pm === void CgPreCfgo::GetAnalysisDependence(AnalysisDep &aDep) const { aDep.AddRequired(); } @@ -1107,4 +1085,4 @@ bool CgPostCfgo::PhaseRun(maplebe::CGFunc &f) { return false; } MAPLE_TRANSFORM_PHASE_REGISTER_CANSKIP(CgPostCfgo, postcfgo) -} /* namespace maplebe */ +} // namespace maplebe diff --git a/src/mapleall/maple_be/src/cg/cfi_generator.cpp b/src/mapleall/maple_be/src/cg/cfi_generator.cpp index 439330a95ff7a6ee7a25928cd587d73f4d8862fd..b096161b19a7e8095f6cb89bd63cf10603e9e588 100644 --- a/src/mapleall/maple_be/src/cg/cfi_generator.cpp +++ b/src/mapleall/maple_be/src/cg/cfi_generator.cpp @@ -136,7 +136,7 @@ void GenCfi::Run() { } bool CgGenCfi::PhaseRun(maplebe::CGFunc &f) { - if (CGOptions::DoLiteProfGen() || CGOptions::DoLiteProfUse()) { + if (CGOptions::DoLiteProfGen() || f.HasLaidOutByPgoUse()) { return true; } #if TARGAARCH64 diff --git a/src/mapleall/maple_be/src/cg/cg.cpp b/src/mapleall/maple_be/src/cg/cg.cpp index fcf1c38ef6a55550b76d927f676e7bfbbb9f1394..5a7ad9bd729bf1a84b9169c13311654e46575278 100644 --- a/src/mapleall/maple_be/src/cg/cg.cpp +++ b/src/mapleall/maple_be/src/cg/cg.cpp @@ -40,7 +40,7 @@ const CG *Globals::GetTarget() const { } CGFunc *CG::currentCGFunction = nullptr; -std::map> CG::funcWrapLabels; +std::map> CG::funcWrapLabels; CG::~CG() { if (emitter != nullptr) { diff --git a/src/mapleall/maple_be/src/cg/cg_cfg.cpp b/src/mapleall/maple_be/src/cg/cg_cfg.cpp index 4555d6f19fce77c2a3144bb1fe2c7293c75c6e53..5495f2754d3bfb3be6f5abbb153da9b19f7e451c 100644 --- a/src/mapleall/maple_be/src/cg/cg_cfg.cpp +++ b/src/mapleall/maple_be/src/cg/cg_cfg.cpp @@ -308,6 +308,7 @@ void CGCFG::InitInsnVisitor(CGFunc &func) const { insnVisitor = func.NewInsnModifier(); } +// Do custom deep copy Insn *CGCFG::CloneInsn(Insn &originalInsn) const { cgFunc->IncTotalNumberOfInstructions(); return insnVisitor->CloneInsn(originalInsn); @@ -763,6 +764,10 @@ bool CGCFG::IsCompareAndBranchInsn(const Insn &insn) const { return insnVisitor->IsCompareAndBranchInsn(insn); } +bool CGCFG::IsTestAndBranchInsn(const Insn &insn) const { + return insnVisitor->IsTestAndBranchInsn(insn); +} + bool CGCFG::IsAddOrSubInsn(const Insn &insn) const { return insnVisitor->IsAddOrSubInsn(insn); } diff --git a/src/mapleall/maple_be/src/cg/cg_critical_edge.cpp b/src/mapleall/maple_be/src/cg/cg_critical_edge.cpp index ac18b618ada6c89ee97e0c187542a3ac2f781647..8d15df7c86613624578b62f02d3b1287f9205339 100644 --- a/src/mapleall/maple_be/src/cg/cg_critical_edge.cpp +++ b/src/mapleall/maple_be/src/cg/cg_critical_edge.cpp @@ -46,7 +46,10 @@ void CriticalEdge::CollectCriticalEdges() { } bool CgCriticalEdge::PhaseRun(maplebe::CGFunc &f) { - if (Globals::GetInstance()->GetOptimLevel() >= CGOptions::kLevel2 && f.NumBBs() < kBBLimit) { + // In O0 mode, only the critical edge before pgogen will be enabled. + // In O2 mode, all critical edge phases will be enabled. + if ((Globals::GetInstance()->GetOptimLevel() >= CGOptions::kLevel2 || CGOptions::DoLiteProfGen()) && + f.NumBBs() < kBBLimit) { MemPool *memPool = GetPhaseMemPool(); CriticalEdge *split = memPool->New(f, *memPool); f.GetTheCFG()->InitInsnVisitor(f); diff --git a/src/mapleall/maple_be/src/cg/cg_dominance.cpp b/src/mapleall/maple_be/src/cg/cg_dominance.cpp index ac3f8baf266601b0b0e75056546991ae2fcc0c67..d66f4c5a251ec3269eca01c6e748e9a2a2bb9c53 100644 --- a/src/mapleall/maple_be/src/cg/cg_dominance.cpp +++ b/src/mapleall/maple_be/src/cg/cg_dominance.cpp @@ -23,16 +23,27 @@ namespace maplebe { constexpr uint32 kBBVectorInitialSize = 2; void DomAnalysis::PostOrderWalk(const BB &bb, int32 &pid, MapleVector &visitedMap) { - ASSERT(bb.GetId() < visitedMap.size(), "index out of range in Dominance::PostOrderWalk"); - if (visitedMap[bb.GetId()]) { - return; - } - visitedMap[bb.GetId()] = true; - for (const auto *suc : bb.GetAllSuccs()) { - PostOrderWalk(*suc, pid, visitedMap); + std::stack s; + s.push(&bb); + visitedMap[bb.GetID()] = true; + while (!s.empty()) { + auto node = s.top(); + auto nodeId = node->GetID(); + ASSERT(nodeId < visitedMap.size() && nodeId < postOrderIDVec.size(), "index out of range"); + bool tail = true; + for (auto succ : node->GetAllSuccs()) { + if (!visitedMap[succ->GetID()]) { + tail = false; + visitedMap[succ->GetID()] = true; + s.push(succ); + break; + } + } + if (tail) { + s.pop(); + postOrderIDVec[nodeId] = pid++; + } } - ASSERT(bb.GetId() < postOrderIDVec.size(), "index out of range in Dominance::PostOrderWalk"); - postOrderIDVec[bb.GetId()] = pid++; } void DomAnalysis::GenPostOrderID() { @@ -260,19 +271,31 @@ void DomAnalysis::Dump() { /* ================= for PostDominance ================= */ void PostDomAnalysis::PdomPostOrderWalk(const BB &bb, int32 &pid, MapleVector &visitedMap) { - ASSERT(bb.GetId() < visitedMap.size(), "index out of range in Dominance::PdomPostOrderWalk"); - if (bbVec[bb.GetId()] == nullptr) { - return; - } - if (visitedMap[bb.GetId()]) { - return; - } - visitedMap[bb.GetId()] = true; - for (const auto *pre : bb.GetAllPreds()) { - PdomPostOrderWalk(*pre, pid, visitedMap); + std::stack s; + s.push(&bb); + visitedMap[bb.GetID()] = true; + while (!s.empty()) { + auto node = s.top(); + auto nodeId = node->GetID(); + if (bbVec[nodeId] == nullptr) { + s.pop(); + continue; + } + ASSERT(nodeId < visitedMap.size() && nodeId < pdomPostOrderIDVec.size(), "index out of range"); + bool tail = true; + for (auto pred : node->GetAllPreds()) { + if (!visitedMap[pred->GetID()]) { + tail = false; + visitedMap[pred->GetID()] = true; + s.push(pred); + break; + } + } + if (tail) { + s.pop(); + pdomPostOrderIDVec[nodeId] = pid++; + } } - ASSERT(bb.GetId() < pdomPostOrderIDVec.size(), "index out of range in Dominance::PdomPostOrderWalk"); - pdomPostOrderIDVec[bb.GetId()] = pid++; } void PostDomAnalysis::PdomGenPostOrderID() { @@ -464,7 +487,7 @@ void PostDomAnalysis::GeneratePdomTreeDot() { (void)fileName.append(cgFunc.GetName()); (void)fileName.append(".dot"); - pdomFile.open(fileName, std::ios::trunc); + pdomFile.open(fileName.c_str(), std::ios::trunc); if (!pdomFile.is_open()) { LogInfo::MapleLogger(kLlWarn) << "fileName:" << fileName << " open failed.\n"; return; diff --git a/src/mapleall/maple_be/src/cg/cg_option.cpp b/src/mapleall/maple_be/src/cg/cg_option.cpp index 1fd5e95a810d6eda806c6a18d1060107e0b0432c..2c30401c9e08763437f13de11bae68a8955ff0d2 100644 --- a/src/mapleall/maple_be/src/cg/cg_option.cpp +++ b/src/mapleall/maple_be/src/cg/cg_option.cpp @@ -103,6 +103,7 @@ bool CGOptions::doVregRename = false; bool CGOptions::doMultiPassColorRA = true; bool CGOptions::doPrePeephole = false; bool CGOptions::doPeephole = false; +bool CGOptions::doPostRASink = false; bool CGOptions::doRetMerge = false; bool CGOptions::doSchedule = false; bool CGOptions::doWriteRefFieldOpt = false; @@ -128,6 +129,7 @@ CGOptions::ABIType CGOptions::abiType = kABIHard; CGOptions::EmitFileType CGOptions::emitFileType = kAsm; bool CGOptions::genLongCalls = false; bool CGOptions::functionSections = false; +bool CGOptions::dataSections = false; CGOptions::FramePointerType CGOptions::useFramePointer = kNoneFP; bool CGOptions::gcOnly = false; bool CGOptions::quiet = false; @@ -157,6 +159,7 @@ bool CGOptions::doAggrOpt = false; CGOptions::VisibilityType CGOptions::visibilityType = kDefaultVisibility; CGOptions::TLSModel CGOptions::tlsModel = kDefaultTLSModel; bool CGOptions::noplt = false; +bool CGOptions::doCGMemAlias = false; CGOptions &CGOptions::GetInstance() { static CGOptions instance; @@ -224,30 +227,28 @@ bool CGOptions::SolveOptions(bool isDebug) { SetQuiet(false); } - if (opts::cg::fpie.IsEnabledByUser() || opts::cg::fPIE.IsEnabledByUser()) { - if (opts::cg::fPIE && opts::cg::fPIE.IsEnabledByUser()) { - SetPIEOptionHelper(kLargeMode); - } else if (opts::cg::fpie && opts::cg::fpie.IsEnabledByUser()) { - SetPIEOptionHelper(kSmallMode); + if (opts::fpie.IsEnabledByUser() || opts::fPIE.IsEnabledByUser()) { + if (opts::fPIE && opts::fPIE.IsEnabledByUser()) { + SetOption(CGOptions::kGenPie); + SetOption(CGOptions::kGenPic); + } else if (opts::fpie && opts::fpie.IsEnabledByUser()) { + SetOption(CGOptions::kGenPie); + SetOption(CGOptions::kGenPic); } else { - SetPIEMode(kClose); ClearOption(CGOptions::kGenPie); } } - if (opts::cg::fpic.IsEnabledByUser() || opts::cg::fPIC.IsEnabledByUser()) { + if (opts::fpic.IsEnabledByUser() || opts::fPIC.IsEnabledByUser()) { /* To avoid fpie mode being modified twice, need to ensure fpie is not opened. */ - if (!opts::cg::fpie && !opts::cg::fpie.IsEnabledByUser() && !opts::cg::fPIE.IsEnabledByUser() && !opts::cg::fPIE) { - if (opts::cg::fPIC && opts::cg::fPIC.IsEnabledByUser()) { - SetPICOptionHelper(kLargeMode); - SetPIEMode(kClose); + if (!opts::fpie && !opts::fpie.IsEnabledByUser() && !opts::fPIE.IsEnabledByUser() && !opts::fPIE) { + if (opts::fPIC && opts::fPIC.IsEnabledByUser()) { + SetOption(CGOptions::kGenPic); ClearOption(CGOptions::kGenPie); - } else if (opts::cg::fpic && opts::cg::fpic.IsEnabledByUser()) { - SetPICOptionHelper(kSmallMode); - SetPIEMode(kClose); + } else if (opts::fpic && opts::fpic.IsEnabledByUser()) { + SetOption(CGOptions::kGenPic); ClearOption(CGOptions::kGenPie); } else { - SetPICMode(kClose); ClearOption(CGOptions::kGenPic); } } @@ -629,7 +630,11 @@ bool CGOptions::SolveOptions(bool isDebug) { } if (opts::cg::unwindTables.IsEnabledByUser()) { - SetOption(kUseUnwindTables); + if (opts::cg::unwindTables) { + SetOption(kUseUnwindTables); + } else { + ClearOption(kUseUnwindTables); + } } if (opts::cg::nativeopt.IsEnabledByUser()) { @@ -652,6 +657,10 @@ bool CGOptions::SolveOptions(bool isDebug) { opts::cg::functionSections ? EnableFunctionSections() : DisableFunctionSections(); } + if (opts::cg::dataSections.IsEnabledByUser()) { + opts::cg::dataSections ? EnableDataSections() : DisableDataSections(); + } + if (opts::cg::omitLeafFramePointer.IsEnabledByUser()) { opts::cg::omitLeafFramePointer ? SetFramePointer(kNonLeafFP) : SetFramePointer(kAllFP); } @@ -884,6 +893,7 @@ void CGOptions::EnableO0() { doICO = false; doPrePeephole = false; doPeephole = false; + doPostRASink = false; doStoreLoadOpt = false; doGlobalOpt = false; doPreRAOpt = false; @@ -899,6 +909,7 @@ void CGOptions::EnableO0() { doCondBrAlign = false; doLoopAlign = false; doAggrOpt = false; + doCGMemAlias = false; SetOption(kUseUnwindTables); if (maple::Triple::GetTriple().GetEnvironment() == Triple::kGnuIlp32) { ClearOption(kUseStackProtectorStrong); @@ -932,6 +943,7 @@ void CGOptions::EnableO2() { doICO = true; doPrePeephole = true; doPeephole = true; + doPostRASink = true; doStoreLoadOpt = true; doGlobalOpt = true; doPreSchedule = true; @@ -941,6 +953,7 @@ void CGOptions::EnableO2() { doLoopAlign = true; doRetMerge = true; doAggrOpt = true; + doCGMemAlias = true; SetOption(kConstFold); SetOption(kUseUnwindTables); ClearOption(kUseStackProtectorStrong); @@ -993,6 +1006,7 @@ void CGOptions::EnableLiteCG() { doAlignAnalysis = false; doCondBrAlign = false; doAggrOpt = false; + doCGMemAlias = false; ClearOption(kUseStackProtectorStrong); ClearOption(kUseStackProtectorAll); diff --git a/src/mapleall/maple_be/src/cg/cg_options.cpp b/src/mapleall/maple_be/src/cg/cg_options.cpp index ab2b1783f308591d00eb228a8b662c8b7a2ca99c..32d439f2e4ffab25fe3567f74b5bcb5245d375fb 100644 --- a/src/mapleall/maple_be/src/cg/cg_options.cpp +++ b/src/mapleall/maple_be/src/cg/cg_options.cpp @@ -18,43 +18,21 @@ namespace opts::cg { -maplecl::Option fpie({"-fpie", "--fpie"}, - " --fpie \tGenerate position-independent executable in small mode.\n" - " --no-pie/-fno-pie \n", - {cgCategory, driverCategory, ldCategory}, - maplecl::DisableEvery({"-fno-pie", "--no-pie"})); - -maplecl::Option fPIE({"-fPIE", "--fPIE"}, - " --fPIE \tGenerate position-independent executable in large mode.\n" - " --no-pie/-fno-pie \n", - {cgCategory, driverCategory, ldCategory}); - -maplecl::Option fpic({"-fpic", "--fpic"}, - " --fpic \tGenerate position-independent shared library in small mode.\n" - " --no-pic/-fno-pic \n", - {cgCategory, driverCategory, ldCategory}, - maplecl::DisableEvery({"-fno-pic", "--no-pic"})); - -maplecl::Option fPIC({"-fPIC", "--fPIC"}, - " --fPIC \tGenerate position-independent shared library in large mode.\n" - " --no-pic/-fno-pic \n", - {cgCategory, driverCategory, ldCategory}); - maplecl::Option fnoSemanticInterposition({"-fno-semantic-interposition"}, " --fno-semantic-interposition\tIf interposition happens for functions, the overwriting function " "will have precisely the same semantics (and side effects).\n" " -fsemantic-interposition\n", - {cgCategory, driverCategory}, maplecl::DisableWith("-fsemantic-interposition")); + {cgCategory, driverCategory}, kOptCommon | kOptOptimization, maplecl::DisableWith("-fsemantic-interposition")); maplecl::Option verboseAsm({"--verbose-asm"}, " --verbose-asm \tAdd comments to asm output\n" " --no-verbose-asm \n", - {driverCategory, cgCategory}, maplecl::DisableWith("--no-verbose-asm")); + {driverCategory, cgCategory}, kOptMaple, maplecl::DisableWith("--no-verbose-asm")); maplecl::Option verboseCg({"--verbose-cg"}, " --verbose-cg \tAdd comments to cg output\n" " --no-verbose-cg \n", - {driverCategory, cgCategory}, maplecl::DisableWith("--no-verbose-cg")); + {driverCategory, cgCategory}, kOptMaple, maplecl::DisableWith("--no-verbose-cg")); maplecl::Option maplelinker({"--maplelinker"}, " --maplelinker \tGenerate the MapleLinker .s format\n" @@ -64,7 +42,7 @@ maplecl::Option maplelinker({"--maplelinker"}, maplecl::Option quiet({"--quiet"}, " --quiet \tBe quiet (don't output debug messages)\n" " --no-quiet \n", - {driverCategory, cgCategory}, maplecl::DisableWith("--no-quiet")); + {driverCategory, cgCategory}, kOptMaple, maplecl::DisableWith("--no-quiet")); maplecl::Option cg({"--cg"}, " --cg \tGenerate the output .s file\n" @@ -255,7 +233,7 @@ maplecl::Option genGctibFile({"--gen-gctib-file"}, maplecl::Option unwindTables({"--unwind-tables"}, " --unwind-tables \tgenerate unwind tables for function \n" " --no-unwind-tables \n", - {cgCategory}, maplecl::DisableWith("--no-unwind-tables")); + {cgCategory, driverCategory}, kOptMaple, maplecl::DisableWith("--no-unwind-tables")); maplecl::Option debug({"-g", "--g"}, " -g \tGenerate debug information\n", @@ -291,7 +269,7 @@ maplecl::Option withRaGraphColor({"--with-ra-graph-color"}, maplecl::Option patchLongBranch({"--patch-long-branch"}, " --patch-long-branch \tEnable patching long distance branch with jumping pad\n", - {driverCategory, cgCategory}); + {driverCategory, cgCategory}, kOptMaple); maplecl::Option constFold({"--const-fold"}, " --const-fold \tEnable constant folding\n" @@ -361,7 +339,7 @@ maplecl::Option dumpPhases({"--dump-phases"}, maplecl::Option skipPhases({"--skip-phases"}, " --skip-phases=PHASENAME,... \tSkip the phases specified in the comma separated list\n", - {cgCategory, driverCategory}); + {cgCategory, driverCategory}, kOptMaple); maplecl::Option skipFrom({"--skip-from"}, " --skip-from=PHASENAME \tSkip the rest phases from PHASENAME(included)\n", @@ -416,7 +394,7 @@ maplecl::Option cyclePatternList({"--cycle-pattern-list"}, maplecl::Option duplicateAsmList({"--duplicate_asm_list"}, " --duplicate_asm_list \tDuplicate asm functions to delete plt call\n" " \t--duplicate_asm_list=list_file\n", - {driverCategory, cgCategory}); + {driverCategory, cgCategory}, kOptMaple); maplecl::Option duplicateAsmList2({"--duplicate_asm_list2"}, " --duplicate_asm_list2 \tDuplicate more asm functions to delete plt call\n" @@ -476,19 +454,28 @@ maplecl::Option longCalls({"--long-calls"}, " --no-long-calls \n", {cgCategory}, maplecl::DisableWith("--no-long-calls")); -maplecl::Option functionSections({"--function-sections", "-ffunction-sections"}, - " --function-sections \t\n" +maplecl::Option functionSections({"-ffunction-sections", "--function-sections"}, + " --function-sections \tPlace each function item into its own section in the output file " + "if the target supports arbitrary sections.\n" " --no-function-sections \n", - {cgCategory, driverCategory}, maplecl::DisableWith("--no-function-sections")); -maplecl::Option omitFramePointer({"--omit-frame-pointer", "-fomit-frame-pointer"}, + {cgCategory, driverCategory}, kOptCommon, maplecl::DisableWith("--no-function-sections")); + +maplecl::Option dataSections({"-fdata-sections", "--data-sections"}, + " --data-sections \tPlace each data item into its own section in the output file " + "if the target supports arbitrary sections.\n" + " --no-data-sections \n", + {cgCategory, driverCategory}, kOptCommon, maplecl::DisableWith("--no-data-sections")); + +maplecl::Option omitFramePointer({"-fomit-frame-pointer", "--omit-frame-pointer"}, " --omit-frame-pointer \tDo not use frame pointer for non-leaf func\n" " --no-omit-frame-pointer \n", - {cgCategory, driverCategory}, maplecl::DisableEvery({"--no-omit-frame-pointer", "-fno-omit-frame-pointer"})); + {cgCategory, driverCategory}, kOptCommon | kOptOptimization, + maplecl::DisableEvery({"--no-omit-frame-pointer", "-fno-omit-frame-pointer"})); -maplecl::Option omitLeafFramePointer({"--omit-leaf-frame-pointer", "-momit-leaf-frame-pointer"}, +maplecl::Option omitLeafFramePointer({"-momit-leaf-frame-pointer", "--omit-leaf-frame-pointer"}, " --omit-leaf-frame-pointer \tDo not use frame pointer for leaf func\n" " --no-omit-leaf-frame-pointer\n", - {cgCategory, driverCategory}, + {cgCategory, driverCategory}, kOptCommon, maplecl::DisableEvery({"--no-omit-leaf-frame-pointer", "-mno-omit-leaf-frame-pointer"})); maplecl::Option fastMath({"--fast-math"}, @@ -499,7 +486,7 @@ maplecl::Option fastMath({"--fast-math"}, maplecl::Option alignAnalysis({"--align-analysis"}, " --align-analysis \tPerform alignanalysis\n" " --no-align-analysis \n", - {cgCategory}, maplecl::DisableWith("--no-align-analysis")); + {driverCategory, cgCategory}, kOptMaple, maplecl::DisableWith("--no-align-analysis")); maplecl::Option cgSsa({"--cg-ssa"}, " --cg-ssa \tPerform cg ssa\n" @@ -521,15 +508,20 @@ maplecl::Option localSchedule({"--local-schedule"}, " --no-local-schedule \n", {cgCategory}, maplecl::DisableWith("--no-local-schedule")); +maplecl::Option cgMemAlias({"--cg-mem-alias"}, + " --cg-mem-alias \tEnable cg mem alias\n" + " --no-cg-mem-alias \n", + {cgCategory}, maplecl::DisableWith("--no-cg-mem-alias")); + maplecl::Option calleeEnsureParam({"--callee-ensure-param"}, " --callee-ensure-param \tCallee ensure valid vb of params\n" " --caller-ensure-param \n", {cgCategory}, maplecl::DisableWith("--caller-ensure-param")); -maplecl::Option common({"--common", "-fcommon"}, +maplecl::Option common({"-fcommon", "--common"}, " --common \t\n" " --no-common \n", - {cgCategory, driverCategory}, maplecl::DisableEvery({"--no-common", "-fno-common"})); + {cgCategory, driverCategory}, kOptCommon, maplecl::DisableEvery({"--no-common", "-fno-common"})); maplecl::Option condbrAlign({"--condbr-align"}, " --condbr-align \tPerform condbr align\n" @@ -554,7 +546,7 @@ maplecl::Option jumpAlignPow({"--jump-align-pow"}, maplecl::Option funcAlignPow({"--func-align-pow"}, " --func-align-pow=NUM \tO2 func bb align pow (NUM == 0, no func-align)\n", - {cgCategory}); + {driverCategory, cgCategory}, kOptMaple); maplecl::Option coldPathThreshold({"--cold-path-threshold"}, " --cold-path-threshold=NUM \tLayout cold path out of hot path\n", @@ -563,27 +555,27 @@ maplecl::Option coldPathThreshold({"--cold-path-threshold"}, maplecl::Option litePgoGen({"--lite-pgo-gen"}, " --lite-pgo-gen \tInstrumentation CG bb and generate bb-cnt info\n" " --no-lite-pgo-gen \n", - {driverCategory, cgCategory}, maplecl::DisableWith("--no-lite-pgo-gen")); + {driverCategory, cgCategory}, kOptMaple, maplecl::DisableWith("--no-lite-pgo-gen")); maplecl::Option instrumentationDir ({"--instrumentation-dir"}, " --instrumentation-dir=directory\n" " \tInstrumentation file output directory\n", - {driverCategory, cgCategory}); + {driverCategory, cgCategory}, kOptMaple); maplecl::Option litePgoWhiteList ({"--lite-pgo-white-list"}, " --lite-pgo-white-list=filepath\n" " \tInstrumentation function white list\n", - {driverCategory, cgCategory}); + {driverCategory, cgCategory}, kOptMaple); maplecl::Option litePgoOutputFunc ({"--lite-pgo-output-func"}, " --lite-pgo-output-func=function name\n" " \tGenerate lite profile at the exit of the output " "function[default none]\n", - {driverCategory, cgCategory}); + {driverCategory, cgCategory}, kOptMaple); maplecl::Option litePgoFile({"--lite-pgo-file"}, " --lite-pgo-file=filepath \tLite pgo guide file\n", - {driverCategory, cgCategory}); + {driverCategory, cgCategory}, kOptMaple); maplecl::Option functionPriority({"--function-priority"}, " --function-priority=filepath \tWhen profile data is given, priority suffix is added to section " @@ -591,31 +583,35 @@ maplecl::Option functionPriority({"--function-priority"}, {cgCategory}); maplecl::Option litePgoVerify({"--lite-pgo-verify"}, - " --lite-pgo-verify \tverify lite-pgo data strictly, abort when encountering mismatch " + " --lite-pgo-verify \tverify lite-pgo data strictly, abort when encountering mismatch " "data(default:skip).\n" " --no-lite-pgo-verify\n", - {driverCategory, cgCategory}, maplecl::DisableWith("--no-lite-pgo-verify")); + {driverCategory, cgCategory}, kOptMaple, maplecl::DisableWith("--no-lite-pgo-verify")); maplecl::Option optimizedFrameLayout({"--optimized-frame-layout"}, - " --optimized-frame-layout \tEnable optimized framelayout, put small local variables near sp, put " + " --optimized-frame-layout \tEnable optimized framelayout, put small local variables near sp, put " "callee save region near sp\n", {cgCategory}, maplecl::DisableWith("--no-optimized-frame-layout")); maplecl::Option loopAlign({"--loop-align"}, - " --loop-align \tPerform add nop for loop instead of insert .p2align\n" - " --no-loop-align \n", - {cgCategory}, maplecl::DisableWith("--no-loop-align")); + " --loop-align \tPerform add nop for loop instead of insert .p2align\n" + " --no-loop-align \n", + {cgCategory}, maplecl::DisableWith("--no-loop-align")); + maplecl::Option pgoCodeAlign({"--pgo-code-align"}, - " --pgo-code-align \tuse the bb's frequency generated by pgo" - " to do the alignment analysis\n", - {cgCategory}); + " --pgo-code-align \tuse the bb's frequency generated by pgo" + " to do the alignment analysis\n", + {cgCategory}); + maplecl::Option alignThreshold({"--align-threshold"}, - " --align-threshold=NUM(1, 100) \talign thresold, default 100", - {cgCategory}); + " --align-threshold=NUM(1, 100)\talign thresold, default 100", + {cgCategory}); + maplecl::Option alignLoopIterations({"--align-loop-Iterations"}, - " --align-loop-Iterations=NUM(1, 4) \tdefault 4", - {cgCategory}); + " --align-loop-Iterations=NUM(1, 4) \tdefault 4", + {cgCategory}); + maplecl::Option dupFreqThreshold({"--dup-threshold"}, - " --dup-threshold=NUM(1, 100) \tdup thresold, default 100", - {cgCategory}); + " --dup-threshold=NUM(1, 100) \tdup thresold, default 100", + {cgCategory}); } // namespace opts::cg diff --git a/src/mapleall/maple_be/src/cg/cg_pgo_use.cpp b/src/mapleall/maple_be/src/cg/cg_pgo_use.cpp index 529406092ad4b178423203b0fc5b05f3d453060b..f368c2994d133b55859cb6f4b819574c1fc5c440 100644 --- a/src/mapleall/maple_be/src/cg/cg_pgo_use.cpp +++ b/src/mapleall/maple_be/src/cg/cg_pgo_use.cpp @@ -136,7 +136,12 @@ void CGProfUse::ComputeEdgeFreq() { if (useInfo->GetCount() > outCount) { total = useInfo->GetCount() - outCount; } - CHECK_FATAL(useInfo->GetCount() >= outCount, "find bad frequency"); + if (useInfo->GetCount() < outCount) { + LogInfo::MapleLogger() << "Error Function: " << f.GetName() << "\n"; + LogInfo::MapleLogger() << "BB" << curbb->GetId() << " freq is " << useInfo->GetCount() + << ", But out edges sum has been " << outCount << ".\n"; + CHECK_FATAL_FALSE("find bad frequency"); + } /* set the only unknown edge frequency */ SetEdgeCount(*useInfo->GetOnlyUnknownOutEdges(), total); change = true; @@ -147,7 +152,12 @@ void CGProfUse::ComputeEdgeFreq() { if (useInfo->GetCount() > inCount) { total = useInfo->GetCount() - inCount; } - CHECK_FATAL(useInfo->GetCount() >= inCount, "find bad frequency"); + if (useInfo->GetCount() < inCount) { + LogInfo::MapleLogger() << "Error Function: " << f.GetName() << "\n"; + LogInfo::MapleLogger() << "BB" << curbb->GetId() << " freq is " << useInfo->GetCount() + << ", But in edges sum has been " << inCount << ".\n"; + CHECK_FATAL_FALSE("find bad frequency"); + } SetEdgeCount(*useInfo->GetOnlyUnknownInEdges(), total); change = true; } @@ -255,7 +265,9 @@ void CGProfUse::LayoutBBwithProfile() { chainLayout.SetHasRealProfile(true); chainLayout.SetConsiderBetterPred(true); FOR_ALL_BB(bb, &f) { - if (bb->IsWontExit() && !(bb->GetPreds().empty() && bb->GetSuccs().empty())) { + // When it comes to infinite loop, the function will not run pgouse. + // The conditions back are won`t exit but are not infinite loops, so we exclude them. + if (bb->IsWontExit() && !(bb->GetPreds().empty() && bb->GetSuccs().empty()) && (bb->GetKind() != BB::kBBNoReturn)) { chainLayout.SetMarkNeverExe(false); break; } @@ -326,9 +338,11 @@ void CGProfUse::LayoutBBwithProfile() { } bool CgPgoUse::PhaseRun(maplebe::CGFunc &f) { + if (Globals::GetInstance()->GetOptimLevel() < CGOptions::kLevel2) { + return false; + } CHECK_FATAL(f.NumBBs() < LiteProfile::GetBBNoThreshold(), "stop ! bb out of range!"); if (!LiteProfile::IsInWhiteList(f.GetName())) { - CGOptions::DisableLiteProfUse(); return false; } @@ -337,7 +351,6 @@ bool CgPgoUse::PhaseRun(maplebe::CGFunc &f) { * Currently, If all the counters of the function are 0, the bbInfo will not be recorded in pgo data. * skip this case. However, it cannot distinguish which is not genereated correct. Need to be improved */ if (!bbInfo) { - CGOptions::DisableLiteProfUse(); return false; } @@ -361,10 +374,8 @@ bool CgPgoUse::PhaseRun(maplebe::CGFunc &f) { const bool debug = CG_DEBUG_FUNC(f); CGProfUse pUse(f, *memPool, *domInfo, *loopInfo, newbbinsplit, debug); if (pUse.ApplyPGOData()) { - CGOptions::EnableLiteProfUse(); pUse.LayoutBBwithProfile(); - } else { - CGOptions::DisableLiteProfUse(); + f.SetHasLaidOutByPgoUse(); } uint64 count = 0; LogInfo::MapleLogger() << f.GetName() << " Final Layout : "; @@ -391,7 +402,10 @@ MAPLE_TRANSFORM_PHASE_REGISTER(CgPgoUse, cgpgouse) void CGProfUse::AddBBProf(BB &bb) { if (layoutBBs.empty()) { - f.SetFirstBB(bb); + if (&bb != f.GetFirstBB()) { + f.SetFirstBB(bb); + f.SetIsEntryCold(); + } AddBB(bb); return; } diff --git a/src/mapleall/maple_be/src/cg/cg_phasemanager.cpp b/src/mapleall/maple_be/src/cg/cg_phasemanager.cpp index d0ba3b4ab59c80c2d736b146f7cc59c06b092d35..bc1afb0da39dc880c397074da2344df028f0c397 100644 --- a/src/mapleall/maple_be/src/cg/cg_phasemanager.cpp +++ b/src/mapleall/maple_be/src/cg/cg_phasemanager.cpp @@ -69,19 +69,23 @@ void DumpMIRFunc(MIRFunction &func, const char *msg, bool printAlways = false, c // a tricky implementation of accessing TLS symbol // call to __tls_get_addr has been arranged at init_array of specific so/exec -// the TLSLD entry of the module will be recorded in a global accessable symbol -void PrepareForWarmupDynamicTLS(MIRModule &m) { +// the addres of tls sections (.tbss & .tdata) will be recorded in global accessable symbols (anchors) +// Here we store the anchor in the .data section of the object file, which is only copy in the vitual space. +// Therefor this scheme is only feasible in one thread programe. +void PrepareForWarmupDynamicTlsSingleThread(MIRModule &m) { if (m.GetTdataVarOffset().empty() && m.GetTbssVarOffset().empty()) { return; } + auto *ptrType = GlobalTables::GetTypeTable().GetTypeFromTyIdx(TyIdx(PTY_ptr)); - auto *anchorMirConst = m.GetMemPool()->New(0, *ptrType); + auto *anchorMirConstVar = m.GetMemPool()->New(0, *ptrType); - ArgVector formals(m.GetMPAllocator().Adapter()); + ArgVector formalsWarmup(m.GetMPAllocator().Adapter()); MIRType *voidTy = GlobalTables::GetTypeTable().GetVoid(); auto *tlsWarmup = m.GetMIRBuilder()->CreateFunction("__tls_address_warmup_" + m.GetTlsAnchorHashString(), - *voidTy, formals); - auto *warmupBody = tlsWarmup->GetCodeMempool()->New(); + *voidTy, formalsWarmup); + tlsWarmup->SetWithSrc(false); + auto *warmupFuncBody = tlsWarmup->GetCodeMempool()->New(); MIRSymbol *tempAnchorSym = nullptr; AddrofNode *tlsAddrNode = nullptr; DassignNode *dassignNode = nullptr; @@ -89,7 +93,7 @@ void PrepareForWarmupDynamicTLS(MIRModule &m) { if (!m.GetTdataVarOffset().empty()) { auto *tdataAnchorSym = m.GetMIRBuilder()->GetOrCreateGlobalDecl("tdata_addr_" + m.GetTlsAnchorHashString(), *ptrType); - tdataAnchorSym->SetKonst(anchorMirConst); + tdataAnchorSym->SetKonst(anchorMirConstVar); tempAnchorSym = m.GetMIRBuilder()->GetOrCreateGlobalDecl(".tdata_start_" + m.GetTlsAnchorHashString(), *ptrType); tempAnchorSym->SetIsDeleted(); tlsAddrNode = tlsWarmup->GetCodeMempool()->New(OP_addrof, PTY_ptr, tempAnchorSym->GetStIdx(), 0); @@ -97,12 +101,12 @@ void PrepareForWarmupDynamicTLS(MIRModule &m) { dassignNode->SetStIdx(tdataAnchorSym->GetStIdx()); dassignNode->SetFieldID(0); dassignNode->SetOpnd(tlsAddrNode, 0); - warmupBody->AddStatement(dassignNode); + warmupFuncBody->AddStatement(dassignNode); } if (!m.GetTbssVarOffset().empty()) { auto *tbssAnchorSym = m.GetMIRBuilder()->GetOrCreateGlobalDecl("tbss_addr_" + m.GetTlsAnchorHashString(), *ptrType); - tbssAnchorSym->SetKonst(anchorMirConst); + tbssAnchorSym->SetKonst(anchorMirConstVar); tempAnchorSym = m.GetMIRBuilder()->GetOrCreateGlobalDecl(".tbss_start_" + m.GetTlsAnchorHashString(), *ptrType); tempAnchorSym->SetIsDeleted(); tlsAddrNode = tlsWarmup->GetCodeMempool()->New(OP_addrof, PTY_ptr, tempAnchorSym->GetStIdx(), 0); @@ -110,13 +114,164 @@ void PrepareForWarmupDynamicTLS(MIRModule &m) { dassignNode->SetStIdx(tbssAnchorSym->GetStIdx()); dassignNode->SetFieldID(0); dassignNode->SetOpnd(tlsAddrNode, 0); - warmupBody->AddStatement(dassignNode); + warmupFuncBody->AddStatement(dassignNode); } - tlsWarmup->SetBody(warmupBody); - tlsWarmup->SetAttr(FUNCATTR_section); - tlsWarmup->GetFuncAttrs().SetPrefixSectionName(".init_array"); - m.AddFunction(tlsWarmup); + if (opts::aggressiveTlsWarmupFunction.IsEnabledByUser()) { + tlsWarmup->SetBody(warmupFuncBody); + m.AddFunction(tlsWarmup); + auto *tarFunc = m.GetMIRBuilder()->GetFunctionFromName(m.GetTlsWarmupFunction()); + CHECK_FATAL(tarFunc != nullptr, "Tls Warmup Function does not exist in the module!"); + MapleVector arg(m.GetMIRBuilder()->GetCurrentFuncCodeMpAllocator()->Adapter()); + CallNode *callWarmup = m.GetMIRBuilder()->CreateStmtCall("__tls_address_warmup_" + m.GetTlsAnchorHashString(), arg); + tarFunc->GetBody()->InsertFirst(callWarmup); + } else { + // put warmup func into .init_array for common testcase + tlsWarmup->SetBody(warmupFuncBody); + tlsWarmup->SetAttr(FUNCATTR_section); + tlsWarmup->GetFuncAttrs().SetPrefixSectionName(".init_array"); + m.AddFunction(tlsWarmup); + } +} + +// Another tricky implementation of accessing TLS symbol +// This scheme is only feasible for lto module. +// There is only one anchor for each thread, which is store in a "thread pointer related" position. +// The actual position depends on the underlying implemention of system tls lib. +// Now We choose to put the anchor in a reserved space of TBC struct, for elibc. + +// offsetTbcReservedForX86 is the offset from X86 dtv (reserved space in aarch64) to aarch64 dtv in elibc +// in elibc, the position of X86 dtv can be used to store TLS anchor for each thread. +// The TBC struct is defined in cbf/task/task_base/include/task_base_pub.h, the layout as below +// TBC_AARCH64 +// {self_ptr X86_dtv(null for aarch64) prev_dtv .............................................. aarch64_dtv} +// | | +// | | +// v-------------------------------224B-------------------------------------------v + +// TBC_RESERVED_FOR_X86 dtv is not safe for it could be used by other hack. +// If We could put a tls symbol in the first(?) module of system, +// We could also get a safe anchor which could produce simple tls access pattern. +// offsetManualAnchorSymbol is the offset from dtv[0] to the artifical anchor. +// Now this implementation is not accurate yet, so here is just a preliminary work. +// Const defined in cg_option.h + +void PrepareForWarmupDynamicTlsMutiThread(MIRModule &m) { + if (m.GetTlsVarOffset().empty()) { + return; + } + auto *ptrType = GlobalTables::GetTypeTable().GetTypeFromTyIdx(TyIdx(PTY_ptr)); + auto *anchorMirConst = m.GetMemPool()->New(0, *ptrType); + + ArgVector formals(m.GetMPAllocator().Adapter()); + MIRType *voidTy = GlobalTables::GetTypeTable().GetVoid(); + auto *tlsWarmup = m.GetMIRBuilder()->CreateFunction("__tls_address_warmup_" + m.GetTlsAnchorHashString(), + *voidTy, formals); + tlsWarmup->SetWithSrc(false); + auto *warmupBody = tlsWarmup->GetCodeMempool()->New(); + MIRSymbol *tempWarmupSym = nullptr; + AddrofNode *tlsAddrNode = nullptr; + DassignNode *dassignNode = nullptr; + + MIRBuilder *mirBuilder = m.GetMIRBuilder(); + MemPool *memPool = tlsWarmup->GetCodeMempool(); + TypeTable& tab = GlobalTables::GetTypeTable(); + uint32 oldTypeTableSize = tab.GetTypeTableSize(); + MIRType *u64Type = tab.GetPrimType(PTY_u64); + MIRType *singlePtrType = tab.GetOrCreatePointerType(*u64Type); + MIRType *doublePtrType = tab.GetOrCreatePointerType(*singlePtrType); + + MIRSymbol *tempAnchorSym = nullptr; + ConstvalNode *gotOffset = nullptr; + ConstvalNode *dtvPtrSize = nullptr; + ConstvalNode *anchorOffset = nullptr; + MIRSymbol *idx = nullptr; + MIRSymbol *base = nullptr; + + MIRSymbol *tempVal = m.GetMIRBuilder()->GetOrCreateGlobalDecl("tls_addr_" + m.GetTlsAnchorHashString(), *ptrType); + tempVal->SetKonst(anchorMirConst); + tempWarmupSym = m.GetMIRBuilder()->GetOrCreateGlobalDecl(".tls_start_" + m.GetTlsAnchorHashString(), *ptrType); + tempWarmupSym->SetIsDeleted(); + tlsAddrNode = tlsWarmup->GetCodeMempool()->New(OP_addrof, PTY_ptr, tempWarmupSym->GetStIdx(), 0); + dassignNode = tlsWarmup->GetCodeMempool()->New(); + dassignNode->SetStIdx(tempVal->GetStIdx()); + dassignNode->SetFieldID(0); + dassignNode->SetOpnd(tlsAddrNode, 0); + warmupBody->AddStatement(dassignNode); + + tempAnchorSym = mirBuilder->GetOrCreateGlobalDecl(".tls_start_" + m.GetTlsAnchorHashString(), *ptrType); + tempAnchorSym->SetIsDeleted(); + DreadNode *warmupNode = memPool->New(OP_dread, PTY_u64, tempAnchorSym->GetStIdx(), 0); + gotOffset = mirBuilder->CreateIntConst(offsetTlsParamEntry, PTY_u64); + BinaryNode *addNode = memPool->New(OP_add, PTY_u64, warmupNode, gotOffset); + TypeCvtNode *cvtNode = memPool->New(OP_cvt, PTY_ptr, PTY_u64, addNode); + IreadNode *ireadNode = memPool->New(OP_iread, PTY_ptr, doublePtrType->GetTypeIndex(), 0, cvtNode); + IreadNode *ireadNode1 = memPool->New(OP_iread, PTY_u64, singlePtrType->GetTypeIndex(), 0, ireadNode); + idx = mirBuilder->GetOrCreateGlobalDecl(".tls_idx_" + m.GetTlsAnchorHashString(), *u64Type); + + DassignNode *dassignNode1 = memPool->New(ireadNode1, idx->GetStIdx(), 0); + warmupBody->AddStatement(dassignNode1); + + BinaryNode *addNode3 = memPool->New(OP_add, PTY_u64, ireadNode, gotOffset); + TypeCvtNode *cvtNode4 = memPool->New(OP_cvt, PTY_ptr, PTY_u64, addNode3); + IreadNode *ireadNode5 = memPool->New(OP_iread, PTY_u64, singlePtrType->GetTypeIndex(), 0, cvtNode4); + + DreadNode *dreadNode1 = memPool->New(OP_dread, PTY_u64, idx->GetStIdx(), 0); + dtvPtrSize = mirBuilder->CreateIntConst(lslDtvEntrySize, PTY_u64); + BinaryNode *shlNode = memPool->New(OP_shl, PTY_u64, dreadNode1, dtvPtrSize); + MapleVector args0(mirBuilder->GetCurrentFuncCodeMpAllocator()->Adapter()); + IntrinsicopNode *threadPtr = + mirBuilder->CreateExprIntrinsicop(maple::INTRN_C___tls_get_thread_pointer, OP_intrinsicop, *u64Type, args0); + TypeCvtNode *cvtNode1 = memPool->New(OP_cvt, PTY_ptr, PTY_u64, threadPtr); + IreadNode *ireadNode2 = memPool->New(OP_iread, PTY_u64, singlePtrType->GetTypeIndex(), 0, cvtNode1); + BinaryNode *addNode2 = memPool->New(OP_add, PTY_u64, ireadNode2, shlNode); + TypeCvtNode *cvtNode2 = memPool->New(OP_cvt, PTY_ptr, PTY_u64, addNode2); + IreadNode *ireadNode3 = memPool->New(OP_iread, PTY_u64, singlePtrType->GetTypeIndex(), 0, cvtNode2); + BinaryNode *addNode4 = memPool->New(OP_add, PTY_u64, ireadNode3, ireadNode5); + base = mirBuilder->GetOrCreateGlobalDecl(".tls_base_" + m.GetTlsAnchorHashString(), *u64Type); + DassignNode *dassignNode2 = memPool->New(addNode4, base->GetStIdx(), 0); + warmupBody->AddStatement(dassignNode2); + + if (opts::aggressiveTlsSafeAnchor) { + TypeCvtNode *cvtNode3 = memPool->New(OP_cvt, PTY_ptr, PTY_u64, threadPtr); + IreadNode *ireadNode4 = memPool->New(OP_iread, PTY_u64, singlePtrType->GetTypeIndex(), 0, cvtNode3); + anchorOffset = mirBuilder->CreateIntConst(offsetManualAnchorSymbol, PTY_u64); + BinaryNode *addNode1 = memPool->New(OP_add, PTY_u64, ireadNode4, anchorOffset); + TypeCvtNode *cvtNode5 = memPool->New(OP_cvt, PTY_ptr, PTY_u64, addNode1); + DreadNode *dreadNode2 = memPool->New(OP_dread, PTY_u64, base->GetStIdx(), 0); + IassignNode *iassignNode = memPool->New(singlePtrType->GetTypeIndex(), 0, cvtNode5, dreadNode2); + warmupBody->AddStatement(iassignNode); + } else { + anchorOffset = mirBuilder->CreateIntConst(offsetTbcReservedForX86, PTY_u64); + BinaryNode *subNode = memPool->New(OP_sub, PTY_u64, threadPtr, anchorOffset); + TypeCvtNode *cvtNode3 = memPool->New(OP_cvt, PTY_ptr, PTY_u64, subNode); + DreadNode *dreadNode2 = memPool->New(OP_dread, PTY_u64, base->GetStIdx(), 0); + IassignNode *iassignNode = memPool->New(singlePtrType->GetTypeIndex(), 0, cvtNode3, dreadNode2); + warmupBody->AddStatement(iassignNode); + } + +if (opts::aggressiveTlsWarmupFunction.IsEnabledByUser()) { + tlsWarmup->SetBody(warmupBody); + m.AddFunction(tlsWarmup); + auto *tarFunc = m.GetMIRBuilder()->GetFunctionFromName(m.GetTlsWarmupFunction()); + CHECK_FATAL(tarFunc != nullptr, "Tls Warmup Function does not exist in the module!"); + MapleVector arg(m.GetMIRBuilder()->GetCurrentFuncCodeMpAllocator()->Adapter()); + CallNode *callWarmup = m.GetMIRBuilder()->CreateStmtCall("__tls_address_warmup_" + m.GetTlsAnchorHashString(), arg); + tarFunc->GetBody()->InsertFirst(callWarmup); + } else { + // put warmup func into .init_array for common testcase + tlsWarmup->SetBody(warmupBody); + tlsWarmup->SetAttr(FUNCATTR_section); + tlsWarmup->GetFuncAttrs().SetPrefixSectionName(".init_array"); + m.AddFunction(tlsWarmup); + } + + uint32 newTypeTableSize = tab.GetTypeTableSize(); + if (newTypeTableSize != oldTypeTableSize) { + if (Globals::GetInstance() && Globals::GetInstance()->GetBECommon()) { + Globals::GetInstance()->GetBECommon()->AddNewTypeAfterBecommon(oldTypeTableSize, newTypeTableSize); + } + } } @@ -449,7 +604,10 @@ bool CgFuncPM::PhaseRun(MIRModule &m) { if (opts::aggressiveTlsLocalDynamicOpt) { m.SetTlsAnchorHashString(); - PrepareForWarmupDynamicTLS(m); + PrepareForWarmupDynamicTlsSingleThread(m); + } else if (opts::aggressiveTlsLocalDynamicOptMultiThread) { + m.SetTlsAnchorHashString(); + PrepareForWarmupDynamicTlsMutiThread(m); } uint32 countFuncId = 0; @@ -532,6 +690,7 @@ bool CgFuncPM::PhaseRun(MIRModule &m) { } RELEASE(cg); RELEASE(beCommon); + RELEASE(cgLower); return changed; } @@ -625,7 +784,7 @@ void CgFuncPM::CreateCGAndBeCommon(MIRModule &m) { void CgFuncPM::PrepareLower(MIRModule &m) { mirLower = GetManagerMemPool()->New(m, nullptr); mirLower->Init(); - cgLower = GetManagerMemPool()->New(m, + cgLower = new CGLowerer(m, *beCommon, *GetPhaseMemPool(), cg->GenerateExceptionHandlingCode(), cg->GenerateVerboseCG()); cgLower->RegisterBuiltIns(); if (m.IsJavaModule()) { diff --git a/src/mapleall/maple_be/src/cg/cg_phi_elimination.cpp b/src/mapleall/maple_be/src/cg/cg_phi_elimination.cpp index d9a3d15a7fdb42bb0713b634cb17656fe5ad7a79..b0b24d2aaac4e7d80a07cd1a913689eb672fe892 100644 --- a/src/mapleall/maple_be/src/cg/cg_phi_elimination.cpp +++ b/src/mapleall/maple_be/src/cg/cg_phi_elimination.cpp @@ -19,7 +19,6 @@ namespace maplebe { void PhiEliminate::TranslateTSSAToCSSA() { FOR_ALL_BB(bb, cgFunc) { - eliminatedBB.emplace(bb->GetId()); for (auto phiInsnIt : bb->GetPhiInsns()) { /* Method I create a temp move for phi-node */ auto &destReg = static_cast(phiInsnIt.second->GetOperand(kInsnFirstOpnd)); @@ -50,7 +49,7 @@ void PhiEliminate::TranslateTSSAToCSSA() { FOR_ALL_BB(bb, cgFunc) { FOR_BB_INSNS(insn, bb) { - CHECK_FATAL(eliminatedBB.count(bb->GetId()) != 0, "still have phi"); + CHECK_FATAL(!insn->IsPhi(), "still have phi insn"); if (!insn->IsMachineInstruction()) { continue; } diff --git a/src/mapleall/maple_be/src/cg/cg_predict.cpp b/src/mapleall/maple_be/src/cg/cg_predict.cpp index 2250aacb07bc532f2ce827e5270684e5d41f324d..84d7a602fcbe682a605b208698239ff136bd8b07 100644 --- a/src/mapleall/maple_be/src/cg/cg_predict.cpp +++ b/src/mapleall/maple_be/src/cg/cg_predict.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) [2023] Huawei Technologies Co.,Ltd.All rights reserved. + * Copyright (c) [2020-2022] Huawei Technologies Co.,Ltd.All rights reserved. * * OpenArkCompiler is licensed under Mulan PSL v2. * You can use this software according to the terms and conditions of the Mulan PSL v2. @@ -49,15 +49,14 @@ bool CgPrediction::IsBackEdge(const Edge &edge) const { return false; } -void CgPrediction::Verify() { +void CgPrediction::Verify() const { for (auto *bb : cgFunc->GetAllBBs()) { if (bb == nullptr) { continue; } for (auto *it : bb->GetSuccs()) { - if (bb->GetEdgeProb(*it) < 0 || bb->GetEdgeProb(*it) > 10000) { + if (bb->GetEdgeProb(*it) < 0 || bb->GetEdgeProb(*it) > kProbAll) { CHECK_FATAL_FALSE("error prob"); - } else { } } } @@ -66,55 +65,55 @@ void CgPrediction::Verify() { void CgPrediction::FixRedundantSuccsPreds() { BB *firstBB = cgFunc->GetFirstBB(); for (BB *curBB = firstBB; curBB != nullptr; curBB = curBB->GetNext()) { - RemoveRedundantSuccsPreds(curBB); + RemoveRedundantSuccsPreds(*curBB); } } -void CgPrediction::RemoveRedundantSuccsPreds(BB *bb) { - auto &succs = bb->GetSuccs(); +void CgPrediction::RemoveRedundantSuccsPreds(BB &bb) { + auto &succs = bb.GetSuccs(); for (BB *succBB : succs) { int count = 0; - for (auto it = succs.begin(); it != succs.end(); it++) { + for (auto it = succs.begin(); it != succs.end(); ++it) { if (*it == succBB) { count++; } } - for (auto it = succs.begin(); it != succs.end(); it++) { + for (auto it = succs.begin(); it != succs.end(); ++it) { if (*it == succBB && count > 1) { - bb->EraseSuccs(it); + bb.EraseSuccs(it); count--; } } } - auto &preds = bb->GetPreds(); + auto &preds = bb.GetPreds(); for (BB *predBB : preds) { int count = 0; - for (auto it = preds.begin(); it != preds.end(); it++) { + for (auto it = preds.begin(); it != preds.end(); ++it) { if (*it == predBB) { count++; } } - for (auto it = preds.begin(); it != preds.end(); it++) { + for (auto it = preds.begin(); it != preds.end(); ++it) { if (*it == predBB && count > 1) { - bb->ErasePreds(it); + bb.ErasePreds(it); count--; } } } } -void CgPrediction::NormallizeCFGProb() { - BB *firstBB = cgFunc->GetFirstBB(); +void CgPrediction::NormallizeCFGProb() const { + BB *firstBB = cgFunc->GetFirstBB(); for (BB *curBB = firstBB; curBB != nullptr; curBB = curBB->GetNext()) { - NormallizeBBProb(curBB); + NormallizeBBProb(*curBB); } } -void CgPrediction::NormallizeBBProb(BB *bb) { +void CgPrediction::NormallizeBBProb(BB &bb) const { std::vector unknownProbBBs; int32 knownProbSum = 0; - for (BB *succBB : bb->GetSuccs()) { - int32 bbToSuccProb = bb->GetEdgeProb(*succBB); + for (BB *succBB : bb.GetSuccs()) { + int32 bbToSuccProb = bb.GetEdgeProb(*succBB); if (bbToSuccProb == BB::kUnknownProb) { unknownProbBBs.push_back(succBB); } else { @@ -124,16 +123,17 @@ void CgPrediction::NormallizeBBProb(BB *bb) { if (unknownProbBBs.size() == 0) { return; } - int32 probForUnknown = (kProbAll - knownProbSum) / unknownProbBBs.size(); + int32 probForUnknown = (kProbAll - knownProbSum) / static_cast(unknownProbBBs.size()); for (BB* unknownBB : unknownProbBBs) { - bb->SetEdgeProb(*unknownBB, probForUnknown); + bb.SetEdgeProb(*unknownBB, probForUnknown); } } -void CgPrediction::VerifyFreq(CGFunc &cgFunc) { - FOR_ALL_BB(bb, &cgFunc) { // skip common entry and common exit +void CgPrediction::VerifyFreq(const CGFunc &cgFunc) { + FOR_ALL_BB_CONST(bb, &cgFunc) { // skip common entry and common exit // cfi bb we can not prop to this bb - if (bb == nullptr || bb->GetKind() == BB::kBBReturn || bb->GetKind() == BB::kBBNoReturn || bb->GetSuccsSize() == 0) { + if (bb == nullptr || bb->GetKind() == BB::kBBReturn || + bb->GetKind() == BB::kBBNoReturn || bb->GetSuccsSize() == 0) { continue; } // bb freq == sum(out edge freq) @@ -188,7 +188,7 @@ bool CgPrediction::DoPropFreq(const BB *head, std::vector *headers, BB &bb) LogInfo::MapleLogger() << "Set Header Frequency BB" << bb.GetId() << ": " << bb.GetFrequency() << std::endl; } } else if (headers != nullptr && std::find(headers->begin(), headers->end(), &bb) != headers->end()) { - bb.SetFrequency(static_cast(kFreqBase / headers->size())); + bb.SetFrequency(static_cast(kFreqBase / headers->size())); if (predictDebug) { LogInfo::MapleLogger() << "Set Header Frequency BB" << bb.GetId() << ": " << bb.GetFrequency() << std::endl; } @@ -227,7 +227,7 @@ bool CgPrediction::DoPropFreq(const BB *head, std::vector *headers, BB &bb) LogInfo::MapleLogger() << "Estimate Frequency of BB" << bb.GetId() << "\n"; } bbVisited[bb.GetId()] = true; - uint32 tmp = 0; + int32 tmp = 0; uint64 total = 0; Edge *bestEdge = nullptr; size_t i = 0; @@ -243,7 +243,7 @@ bool CgPrediction::DoPropFreq(const BB *head, std::vector *headers, BB &bb) bestEdge = edge; } } - edge->frequency = bb.GetFrequency() * 1.0 * edge->probability / kProbBase; + edge->frequency = static_cast(bb.GetFrequency() * 1.0 * edge->probability / kProbBase); total += static_cast(edge->frequency); bool isBackEdge = headers != nullptr ? std::find(headers->begin(), headers->end(), &edge->dest) != headers->end() : &edge->dest == head; @@ -254,7 +254,7 @@ bool CgPrediction::DoPropFreq(const BB *head, std::vector *headers, BB &bb) } // To ensure that the sum of out edge frequency is equal to bb frequency if (bestEdge != nullptr && static_cast(total) != bb.GetFrequency()) { - bestEdge->frequency += bb.GetFrequency() - static_cast(total); + bestEdge->frequency += static_cast(bb.GetFrequency()) - static_cast(total); } return true; } @@ -327,13 +327,6 @@ void Edge::Dump(bool dumpNext) const { } } -void CgPrediction::PrintAllEdges() { - for (auto *edge : edges) { - if (edge == nullptr) continue; - edge->Dump(true); - } -} - void CgPrediction::SavePredictResultIntoCfg() { // Init bb succFreq if needed for (auto *bb : cgFunc->GetAllBBs()) { @@ -349,7 +342,7 @@ void CgPrediction::SavePredictResultIntoCfg() { while (edge != nullptr) { BB &srcBB = edge->src; BB &destBB = edge->dest; - srcBB.SetEdgeFreq(destBB, edge->frequency); + srcBB.SetEdgeFreq(destBB, static_cast(edge->frequency)); edge = edge->next; } } @@ -395,10 +388,10 @@ void CgPrediction::Run() { } return; } - // do not generate freq info for white list function. - if (LiteProfile::IsInWhiteList(cgFunc->GetName()) && CGOptions::DoLiteProfUse()) { + // function has valid profile data, do not generate freq info. + if (cgFunc->HasLaidOutByPgoUse()) { if (predictDebug) { - LogInfo::MapleLogger() << "white list function, do not run prediction" << std::endl; + LogInfo::MapleLogger() << "function has valid profile data, do not run prediction" << std::endl; } return; } @@ -416,12 +409,11 @@ bool CgPredict::PhaseRun(maplebe::CGFunc &f) { CHECK_NULL_FATAL(pdomInfo); LoopAnalysis *loopInfo = GET_ANALYSIS(CgLoopAnalysis, f); CHECK_NULL_FATAL(loopInfo); - + MemPool *cgPredMp = GetPhaseMemPool(); auto *cgPredict = cgPredMp->New(*cgPredMp, *ApplyTempMemPool(), f, *domInfo, *pdomInfo, *loopInfo); cgPredict->Run(); - if (!f.HasIrrScc() && f.GetAllBBs().size() <= kMaxNumBBToPredict && - !(LiteProfile::IsInWhiteList(f.GetName()) && CGOptions::DoLiteProfUse())) { + if (!f.HasIrrScc() && f.GetAllBBs().size() <= kMaxNumBBToPredict && !f.HasLaidOutByPgoUse()) { CgPrediction::VerifyFreq(f); } diff --git a/src/mapleall/maple_be/src/cg/cg_sink.cpp b/src/mapleall/maple_be/src/cg/cg_sink.cpp new file mode 100644 index 0000000000000000000000000000000000000000..9eda26e53f594f74b5c7d4d20c892dcb2b0cd015 --- /dev/null +++ b/src/mapleall/maple_be/src/cg/cg_sink.cpp @@ -0,0 +1,220 @@ +/* + * Copyright (c) [2023] Huawei Technologies Co.,Ltd.All rights reserved. + * + * OpenArkCompiler is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * + * http://license.coscl.org.cn/MulanPSL2 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ + +#include "cg_sink.h" +#include "live.h" + +namespace maplebe { +#define SINK_DUMP CG_DEBUG_FUNC(cgFunc) + +static void CollectInsnOpnds(const Insn &insn, std::vector &defOpnds, std::vector &useOpnds) { + const InsnDesc *md = insn.GetDesc(); + for (uint32 i = 0; i < insn.GetOperandSize(); ++i) { + auto &opnd = insn.GetOperand(i); + const auto *opndDesc = md->GetOpndDes(i); + if (opnd.IsRegister()) { + auto ®Opnd = static_cast(opnd); + if (opndDesc->IsDef()) { + defOpnds.push_back(regOpnd.GetRegisterNumber()); + } + if (opndDesc->IsUse()) { + useOpnds.push_back(regOpnd.GetRegisterNumber()); + } + } else if (opnd.IsMemoryAccessOperand()) { + auto &memOpnd = static_cast(opnd); + if (memOpnd.GetBaseRegister() != nullptr) { + useOpnds.push_back(memOpnd.GetBaseRegister()->GetRegisterNumber()); + if (memOpnd.GetAddrMode() == MemOperand::kPreIndex || memOpnd.GetAddrMode() == MemOperand::kPostIndex) { + defOpnds.push_back(memOpnd.GetBaseRegister()->GetRegisterNumber()); + } + } + if (memOpnd.GetIndexRegister() != nullptr) { + useOpnds.push_back(memOpnd.GetIndexRegister()->GetRegisterNumber()); + } + } else if (opnd.IsList()) { + auto &listOpnd = static_cast(opnd); + for (auto *regOpnd : std::as_const(listOpnd.GetOperands())) { + if (opndDesc->IsDef()) { + defOpnds.push_back(regOpnd->GetRegisterNumber()); + } + if (opndDesc->IsUse()) { + useOpnds.push_back(regOpnd->GetRegisterNumber()); + } + } + } + } +} + +static bool IsInsnReadOrModifyMemory(const Insn &insn) { + for (uint32 i = 0; i < insn.GetOperandSize(); ++i) { + if (insn.GetOperand(i).IsMemoryAccessOperand()) { + return true; + } + } + return false; +} + +bool PostRASink::HasRegisterDependency(const std::vector &defRegs, + const std::vector &useRegs) const { + for (auto defRegNO : defRegs) { + if (modifiedRegs.count(defRegNO) != 0 || usedRegs.count(defRegNO) != 0) { + return true; + } + } + for (auto useRegNO : useRegs) { + if (modifiedRegs.count(useRegNO) != 0) { + return true; + } + } + return false; +} + +void PostRASink::UpdateRegsUsedDefed(const std::vector &defRegs, const std::vector &useRegs) { + for (auto defRegNO : defRegs) { + modifiedRegs.insert(defRegNO); + } + for (auto useRegNO : useRegs) { + usedRegs.insert(useRegNO); + } +} + +BB *PostRASink::GetSingleLiveInSuccBB(const BB &curBB, const std::set &sinkableBBs, + const std::vector &defRegs) const { + BB *singleBB = nullptr; + for (auto defReg : defRegs) { + // check if any register is live-in in other successors + for (auto *succ : curBB.GetSuccs()) { + if (sinkableBBs.count(succ) == 0 && succ->GetLiveInRegNO().count(defReg) != 0) { + return nullptr; + } + } + for (auto *sinkBB : sinkableBBs) { + if (sinkBB->GetLiveInRegNO().count(defReg) == 0) { + continue; + } + if (singleBB != nullptr && singleBB != sinkBB) { + return nullptr; + } + singleBB = sinkBB; + } + } + return singleBB; +} + +void PostRASink::SinkInsn(Insn &insn, BB &sinkBB) const { + if (SINK_DUMP) { + LogInfo::MapleLogger() << "Sink insn : "; + insn.Dump(); + LogInfo::MapleLogger() << "\t into BB " << sinkBB.GetId(); + } + insn.GetBB()->RemoveInsn(insn); + sinkBB.InsertInsnBegin(insn); +} + +void PostRASink::UpdateLiveIn(BB &sinkBB, const std::vector &defRegs, + const std::vector &useRegs) const { + for (auto defRegNO : defRegs) { + sinkBB.GetLiveInRegNO().erase(defRegNO); + } + for (auto useRegNO : useRegs) { + sinkBB.GetLiveInRegNO().insert(useRegNO); + } +} + +bool PostRASink::TryToSink(BB &bb) { + std::set sinkableBBs; + for (auto *succ : bb.GetSuccs()) { + if (!succ->GetLiveInRegNO().empty() && succ->GetPreds().size() == 1) { + sinkableBBs.insert(succ); + } + } + if (sinkableBBs.empty()) { // no bb can sink + return false; + } + + bool changed = false; + + modifiedRegs.clear(); + usedRegs.clear(); + FOR_BB_INSNS_REV(insn, &bb) { + if (insn->IsImmaterialInsn() || !insn->IsMachineInstruction()) { + continue; + } + if (insn->IsCall()) { // not sink insn cross call + return changed; + } + + std::vector defedRegsInInsn; + std::vector usedRegsInInsn; + CollectInsnOpnds(*insn, defedRegsInInsn, usedRegsInInsn); + + // Don't sink the insn that will read or modify memory + if (IsInsnReadOrModifyMemory(*insn)) { + UpdateRegsUsedDefed(defedRegsInInsn, usedRegsInInsn); + continue; + } + + // Don't sink the insn that does not define any register and violates the register dependency + if (defedRegsInInsn.empty() || HasRegisterDependency(defedRegsInInsn, usedRegsInInsn)) { + UpdateRegsUsedDefed(defedRegsInInsn, usedRegsInInsn); + continue; + } + + auto *sinkBB = GetSingleLiveInSuccBB(bb, sinkableBBs, defedRegsInInsn); + // Don't sink if we cannot find a single sinkable successor in which Reg is live-in. + if (sinkBB == nullptr || sinkBB->GetKind() == BB::kBBReturn) { + UpdateRegsUsedDefed(defedRegsInInsn, usedRegsInInsn); + continue; + } + ASSERT(sinkBB->GetPreds().size() == 1 && *sinkBB->GetPredsBegin() == &bb, "NIY, unexpected sinkBB"); + + SinkInsn(*insn, *sinkBB); + UpdateLiveIn(*sinkBB, defedRegsInInsn, usedRegsInInsn); + changed = true; + } + return changed; +} + +void PostRASink::Run() { + bool changed = false; + do { + changed = false; + FOR_ALL_BB(bb, &cgFunc) { + if (TryToSink(*bb)) { + changed = true; + } + } + } while (changed); +} + +void CgPostRASink::GetAnalysisDependence(AnalysisDep &aDep) const { + aDep.AddRequired(); + aDep.PreservedAllExcept(); +} + +bool CgPostRASink::PhaseRun(maplebe::CGFunc &f) { + auto *live = GET_ANALYSIS(CgLiveAnalysis, f); + CHECK_FATAL(live != nullptr, "null ptr check"); + live->ResetLiveSet(); + + PostRASink sink(f, *GetPhaseMemPool()); + sink.Run(); + + return false; +} + +MAPLE_TRANSFORM_PHASE_REGISTER_CANSKIP(CgPostRASink, postrasink) +} // namespace maplebe + diff --git a/src/mapleall/maple_be/src/cg/cg_ssa.cpp b/src/mapleall/maple_be/src/cg/cg_ssa.cpp index a083f876876ed9b479a82a627fd6648a3a2cb68f..3e39339e10505c2f70c0259c4230054c496e650d 100644 --- a/src/mapleall/maple_be/src/cg/cg_ssa.cpp +++ b/src/mapleall/maple_be/src/cg/cg_ssa.cpp @@ -150,13 +150,17 @@ void CGSSAInfo::RenameBB(BB &bb) { } void CGSSAInfo::RenamePhi(BB &bb) { + std::map newPhiInsns; for (auto phiInsnIt : bb.GetPhiInsns()) { Insn *phiInsn = phiInsnIt.second; CHECK_FATAL(phiInsn != nullptr, "get phi insn failed"); auto *phiDefOpnd = static_cast(&phiInsn->GetOperand(kInsnFirstOpnd)); VRegVersion *newVst = CreateNewVersion(*phiDefOpnd, *phiInsn, kInsnFirstOpnd, true); phiInsn->SetOperand(kInsnFirstOpnd, *newVst->GetSSAvRegOpnd()); + newPhiInsns.emplace(newVst->GetSSAvRegOpnd()->GetRegisterNumber(), phiInsn); } + bb.GetPhiInsns().clear(); + bb.GetPhiInsns().insert(newPhiInsns.begin(), newPhiInsns.end()); } void CGSSAInfo::RenameSuccPhiUse(const BB &bb) { diff --git a/src/mapleall/maple_be/src/cg/cg_validbit_opt.cpp b/src/mapleall/maple_be/src/cg/cg_validbit_opt.cpp index 095a991d6bff1104a1a08bb5874220653be231dd..c3057d8ea894bb2faee130437335a30fc0927b14 100644 --- a/src/mapleall/maple_be/src/cg/cg_validbit_opt.cpp +++ b/src/mapleall/maple_be/src/cg/cg_validbit_opt.cpp @@ -73,30 +73,38 @@ void ValidBitPattern::DumpAfterPattern(std::vector &prevInsns, const Insn } } -void ValidBitOpt::RectifyValidBitNum() { +void ValidBitOpt::SetPhiInsnZeroValidBit() { FOR_ALL_BB(bb, cgFunc) { FOR_BB_INSNS(insn, bb) { - if (!insn->IsMachineInstruction()) { + if (!insn->IsPhi()) { continue; } - SetValidBits(*insn); + for (uint32 i = 0; i < insn->GetOperandSize(); ++i) { + Operand &opnd = insn->GetOperand(i); + if (!opnd.IsRegister() || !insn->OpndIsDef(i)) { + continue; + } + static_cast(opnd).SetValidBitsNum(k0BitSize); + } } } +} + +void ValidBitOpt::RectifyValidBitNum() { + // Set validbit of phiDef opnd to 0 and modify it in next + SetPhiInsnZeroValidBit(); + bool iterate; - /* Use reverse postorder to converge with minimal iterations */ + // Use reverse postorder to converge with minimal iterations do { iterate = false; MapleVector reversePostOrder = ssaInfo->GetReversePostOrder(); for (uint32 bbId : reversePostOrder) { BB *bb = cgFunc->GetBBFromID(bbId); FOR_BB_INSNS(insn, bb) { - if (!insn->IsPhi()) { - continue; - } - bool change = SetPhiValidBits(*insn); - if (change) { - /* if vb changes once, iterate. */ - iterate = true; + if ((insn->IsPhi() && SetPhiValidBits(*insn)) || + (insn->IsMachineInstruction() && SetValidBits(*insn))) { + iterate = true; // if vb changes once, iterate } } } diff --git a/src/mapleall/maple_be/src/cg/cgbb.cpp b/src/mapleall/maple_be/src/cg/cgbb.cpp index 5b93a5beed686b6153206d38d5b76d08171c9980..b7b535e9b947dd75b1de01ef4a3a5b2fe55366fe 100644 --- a/src/mapleall/maple_be/src/cg/cgbb.cpp +++ b/src/mapleall/maple_be/src/cg/cgbb.cpp @@ -56,7 +56,9 @@ Insn *BB::InsertInsnAfter(Insn &existing, Insn &newInsn) { newInsn.GetNext()->SetPrev(&newInsn); } newInsn.SetBB(this); - internalFlag1++; + if (newInsn.IsMachineInstruction()) { + internalFlag1++; + } return &newInsn; } diff --git a/src/mapleall/maple_be/src/cg/cgfunc.cpp b/src/mapleall/maple_be/src/cg/cgfunc.cpp index 1787fbf3806f8c57b67bf4357464e9c9eccdf7b0..19f80fffd88c885a9b03e5de211f6f9fc1357f0b 100644 --- a/src/mapleall/maple_be/src/cg/cgfunc.cpp +++ b/src/mapleall/maple_be/src/cg/cgfunc.cpp @@ -791,10 +791,11 @@ Operand *HandleIntrinOp(const BaseNode &parent, BaseNode &expr, CGFunc &cgFunc) return cgFunc.SelectCAtomicCompareExchange(intrinsicopNode); case INTRN_C___atomic_test_and_set: return cgFunc.SelectCAtomicTestAndSet(intrinsicopNode); - case INTRN_C__builtin_return_address: case INTRN_C__builtin_extract_return_addr: return cgFunc.SelectCReturnAddress(intrinsicopNode); + case INTRN_C_alloca_with_align: + return cgFunc.SelectCAllocaWithAlign(intrinsicopNode); case INTRN_vector_abs_v8i8: case INTRN_vector_abs_v4i16: case INTRN_vector_abs_v2i32: case INTRN_vector_abs_v1i64: @@ -982,7 +983,9 @@ Operand *HandleIntrinOp(const BaseNode &parent, BaseNode &expr, CGFunc &cgFunc) case INTRN_vector_mov_narrow_v8i16: case INTRN_vector_mov_narrow_v8u16: return HandleVectorMovNarrow(intrinsicopNode, cgFunc); - case INTRN_C___tls_get_tbss_anchor: case INTRN_C___tls_get_tdata_anchor: + case INTRN_C___tls_get_tbss_anchor: + case INTRN_C___tls_get_tdata_anchor: + case INTRN_C___tls_get_thread_pointer: return cgFunc.SelectIntrinsicOpLoadTlsAnchor(intrinsicopNode, parent); default: { @@ -1241,7 +1244,7 @@ void HandleDassign(StmtNode &stmt, CGFunc &cgFunc) { BaseNode *rhs = dassignNode.GetRHS(); ASSERT(rhs != nullptr, "get rhs of dassignNode failed"); if (rhs->GetOpCode() == OP_malloc || rhs->GetOpCode() == OP_alloca) { - UnaryStmtNode &uNode = static_cast(stmt); + auto &uNode = static_cast(stmt); Operand *opnd0 = cgFunc.HandleExpr(dassignNode, *(uNode.Opnd())); cgFunc.SelectDassign(dassignNode, *opnd0); return; @@ -2098,9 +2101,19 @@ void CGFunc::UpdateCallBBFrequency() { } } +void CGFunc::ClearUnreachableBB() { + FOR_ALL_BB(bb, this) { + if (bb->IsUnreachable()) { + bb->ClearInsns(); + bb->SetKind(BB::kBBFallthru); + } + } +} + void CGFunc::HandleFunction() { /* select instruction */ GenerateInstruction(); + ClearUnreachableBB(); ProcessExitBBVec(); LmbcGenSaveSpForAlloca(); @@ -2126,12 +2139,10 @@ void CGFunc::HandleFunction() { if (mirModule.GetSrcLang() == kSrcLangC) { theCFG->WontExitAnalysis(); } + AddPseudoRetInsnsInExitBBs(); if (CGOptions::IsLazyBinding() && !GetCG()->IsLibcore()) { ProcessLazyBinding(); } - if (GetCG()->DoPatchLongBranch()) { - PatchLongBranch(); - } NeedStackProtect(); } @@ -2263,28 +2274,6 @@ void CGFunc::DumpCFGToDot(const std::string &fileNamePrefix) { file << "}" << std::endl; } -void CGFunc::PatchLongBranch() { - for (BB *bb = firstBB->GetNext(); bb != nullptr; bb = bb->GetNext()) { - bb->SetInternalFlag1(bb->GetInternalFlag1() + bb->GetPrev()->GetInternalFlag1()); - } - BB *next = nullptr; - for (BB *bb = firstBB; bb != nullptr; bb = next) { - next = bb->GetNext(); - if (bb->GetKind() != BB::kBBIf && bb->GetKind() != BB::kBBGoto) { - continue; - } - Insn *insn = bb->GetLastMachineInsn(); - while (insn->IsImmaterialInsn()) { - insn = insn->GetPrev(); - } - BB *tbb = GetBBFromLab2BBMap(GetLabelInInsn(*insn)); - if ((tbb->GetInternalFlag1() - bb->GetInternalFlag1()) < MaxCondBranchDistance()) { - continue; - } - InsertJumpPad(insn); - } -} - // Cgirverify phase function: all insns will be verified before cgemit. void CGFunc::VerifyAllInsn() { FOR_ALL_BB(bb, this) { @@ -2347,15 +2336,6 @@ bool CgHandleFunction::PhaseRun(maplebe::CGFunc &f) { } MAPLE_TRANSFORM_PHASE_REGISTER(CgHandleFunction, handlefunction) -bool CgPatchLongBranch::PhaseRun(maplebe::CGFunc &f) { - f.PatchLongBranch(); - if (!f.GetCG()->GetCGOptions().DoEmitCode() || f.GetCG()->GetCGOptions().DoDumpCFG()) { - f.DumpCFG(); - } - return false; -} -MAPLE_TRANSFORM_PHASE_REGISTER(CgPatchLongBranch, patchlongbranch) - bool CgFixCFLocOsft::PhaseRun(maplebe::CGFunc &f) { if (f.GetCG()->GetCGOptions().WithDwarf() && f.GetWithSrc()) { f.DBGFixCallFrameLocationOffsets(); diff --git a/src/mapleall/maple_be/src/cg/control_dep_analysis.cpp b/src/mapleall/maple_be/src/cg/control_dep_analysis.cpp index 947125fe76e8cb3536a68e3a21587ea1c1e64426..18f9d7d30d89ca25e3d1095ca5be127a3e430903 100644 --- a/src/mapleall/maple_be/src/cg/control_dep_analysis.cpp +++ b/src/mapleall/maple_be/src/cg/control_dep_analysis.cpp @@ -18,7 +18,8 @@ namespace maplebe { void ControlDepAnalysis::Run() { - if (CONTROL_DEP_ANALYSIS_DUMP) { + // Local-scheduler(after RA) does not need pdom-analysis + if (CONTROL_DEP_ANALYSIS_DUMP && phaseName != "localschedule") { pdom->GeneratePdomTreeDot(); } if (cgFunc.IsAfterRegAlloc() || isSingleBB) { @@ -646,8 +647,7 @@ void ControlDepAnalysis::GenerateFCDGDot() const { (void)fileName.append(cgFunc.GetName()); (void)fileName.append(".dot"); - char absPath[PATH_MAX]; - fcdgFile.open(realpath(fileName.c_str(), absPath), std::ios::trunc); + fcdgFile.open(fileName, std::ios::trunc); if (!fcdgFile.is_open()) { LogInfo::MapleLogger(kLlWarn) << "fileName:" << fileName << " open failed.\n"; return; @@ -718,8 +718,7 @@ void ControlDepAnalysis::GenerateCFGDot() const { (void)fileName.append(cgFunc.GetName()); (void)fileName.append(".dot"); - char absPath[PATH_MAX]; - cfgFile.open(realpath(fileName.c_str(), absPath), std::ios::trunc); + cfgFile.open(fileName, std::ios::trunc); if (!cfgFile.is_open()) { LogInfo::MapleLogger(kLlWarn) << "fileName:" << fileName << " open failed.\n"; return; diff --git a/src/mapleall/maple_be/src/cg/data_dep_analysis.cpp b/src/mapleall/maple_be/src/cg/data_dep_analysis.cpp index 9dffb7709a21fd718197df498d74cab207aa1db2..4d4e420f3aa0d031e821f00da672eeeddc3a53e8 100644 --- a/src/mapleall/maple_be/src/cg/data_dep_analysis.cpp +++ b/src/mapleall/maple_be/src/cg/data_dep_analysis.cpp @@ -74,7 +74,7 @@ void DataDepAnalysis::InitInfoInCDGNode(MemPool ®ionMp, MapleAllocator ®io ddb.SetCDGNode(&cdgNode); ddb.InitCDGNodeDataInfo(regionMp, regionAlloc, cdgNode); if (cgFunc.GetMirModule().IsJavaModule()) { - /* Analysis live-in registers in catch BB */ + // Analysis live-in registers in catch BB ddb.AnalysisAmbiInsns(bb); } } @@ -132,7 +132,7 @@ void DataDepAnalysis::UpdateRegUseAndDef(Insn &insn, const DepNode &depNode, CDG // Update reg def const auto &defRegNos = depNode.GetDefRegnos(); for (const auto regNO : defRegNos) { - /* Update reg def for cur depInfo */ + // Update reg def for cur depInfo cdgNode.SetLatestDefInsn(regNO, &insn); cdgNode.ClearUseInsnChain(regNO); } @@ -146,7 +146,7 @@ void DataDepAnalysis::UpdateReadyNodesInfo(CDGNode &cdgNode, const CDGNode &root CHECK_FATAL(succNode != nullptr, "get cdgNode from bb failed"); if (succNode != &root && succNode->GetRegion() == cdgNode.GetRegion()) { succNode->SetNodeSum(std::max(cdgNode.GetNodeSum(), succNode->GetNodeSum())); - /* Successor nodes in region record nodeIds that have been visited in topology order */ + // Successor nodes in region record nodeIds that have been visited in topology order for (const auto &nodeId : cdgNode.GetTopoPredInRegion()) { succNode->InsertVisitedTopoPredInRegion(nodeId); } @@ -171,7 +171,7 @@ void DataDepAnalysis::GenerateDataDepGraphDotOfRegion(CDGRegion ®ion) { std::streambuf *fileBuf = iddgFile.rdbuf(); (void)std::cout.rdbuf(fileBuf); - /* Define the output file name */ + // Define the output file name std::string fileName; (void)fileName.append("interDDG_"); (void)fileName.append(cgFunc.GetName()); @@ -191,7 +191,7 @@ void DataDepAnalysis::GenerateDataDepGraphDotOfRegion(CDGRegion ®ion) { iddgFile << " node [shape=box];\n\n"; for (auto cdgNode : region.GetRegionNodes()) { - /* Dump nodes style */ + // Dump nodes style for (auto depNode : cdgNode->GetAllDataNodes()) { ddb.DumpNodeStyleInDot(iddgFile, *depNode); } @@ -240,7 +240,7 @@ void DataDepAnalysis::GenerateDataDepGraphDotOfRegion(CDGRegion ®ion) { } iddgFile << "\n"; - /* Dump BB cluster */ + // Dump BB cluster BB *bb = cdgNode->GetBB(); CHECK_FATAL(bb != nullptr, "get bb from cdgNode failed"); iddgFile << " subgraph cluster_" << bb->GetId() << " {\n"; @@ -257,4 +257,4 @@ void DataDepAnalysis::GenerateDataDepGraphDotOfRegion(CDGRegion ®ion) { iddgFile.close(); (void)std::cout.rdbuf(coutBuf); } -} /* namespace maplebe */ +} // namespace maplebe diff --git a/src/mapleall/maple_be/src/cg/data_dep_base.cpp b/src/mapleall/maple_be/src/cg/data_dep_base.cpp index c4aebf471e3dddedb39c1524c0eb083206db461d..3516d2d362249a73f89bf97910aa25eee539da4b 100644 --- a/src/mapleall/maple_be/src/cg/data_dep_base.cpp +++ b/src/mapleall/maple_be/src/cg/data_dep_base.cpp @@ -37,10 +37,12 @@ void DataDepBase::BuildDepsLastCallInsn(Insn &insn) { if (lastCallInsn != nullptr && lastCallInsn->GetMachineOpcode() != MOP_tls_desc_call) { AddDependence(*lastCallInsn->GetDepNode(), *insn.GetDepNode(), kDependenceTypeControl); } - curCDGNode->SetLastCallInsn(&insn); + if (insn.IsCall() || insn.IsTailCall()) { + curCDGNode->SetLastCallInsn(&insn); + } } -/* Build dependency for may throw insn */ +// Build dependency for may throw insn void DataDepBase::BuildMayThrowInsnDependency(DepNode &depNode, Insn &insn, const Insn &locInsn) { if (!insn.MayThrow() || !cgFunc.GetMirModule().IsJavaModule()) { return; @@ -84,11 +86,9 @@ void DataDepBase::BuildAmbiInsnDependency(Insn &insn) { } } -/* - * Build data dependence between control register and last call instruction. - * insn : instruction that with control register operand. - * isDest : if the control register operand is a destination operand. - */ +// Build data dependence between control register and last call instruction. +// insn : instruction that with control register operand. +// isDest : if the control register operand is a destination operand. void DataDepBase::BuildDepsBetweenControlRegAndCall(Insn &insn, bool isDest) { Insn *lastCallInsn = curCDGNode->GetLastCallInsn(); if (lastCallInsn == nullptr) { @@ -101,29 +101,17 @@ void DataDepBase::BuildDepsBetweenControlRegAndCall(Insn &insn, bool isDest) { AddDependence(*lastCallInsn->GetDepNode(), *insn.GetDepNode(), kDependenceTypeAnti); } -/* Build control data dependence for branch/ret instructions */ +// Build control data dependence for branch/ret instructions void DataDepBase::BuildDepsControlAll(Insn &insn, const MapleVector &nodes) { DepNode *depNode = insn.GetDepNode(); - // For write/read mem instructions, we build output dependency between them and branch instructions - for (auto *heapDef : curCDGNode->GetHeapDefInsns()) { - AddDependence(*heapDef->GetDepNode(), *depNode, kDependenceTypeOutput); - } - for (auto *heapUse : curCDGNode->GetHeapUseInsns()) { - AddDependence(*heapUse->GetDepNode(), *depNode, kDependenceTypeOutput); - } - for (auto *stackDef : curCDGNode->GetStackDefInsns()) { - AddDependence(*stackDef->GetDepNode(), *depNode, kDependenceTypeOutput); - } // For rest instructions, we build control dependency for (auto *dataNode : nodes) { AddDependence(*dataNode, *depNode, kDependenceTypeControl); } } -/* - * Build data dependence of ambiguous instruction. - * ambiguous instruction: instructions that can not across may throw instructions - */ +// Build data dependence of ambiguous instruction. +// ambiguous instruction: instructions that can not across may throw instructions void DataDepBase::BuildDepsAmbiInsn(Insn &insn) { if (!cgFunc.GetMirModule().IsJavaModule()) { return; @@ -137,15 +125,13 @@ void DataDepBase::BuildDepsAmbiInsn(Insn &insn) { curCDGNode->AddAmbiguousInsn(&insn); } -/* Build data dependence of destination register operand */ +// Build data dependence of destination register operand void DataDepBase::BuildDepsDefReg(Insn &insn, regno_t regNO) { DepNode *node = insn.GetDepNode(); node->AddDefReg(regNO); - /* - * 1. For building intra-block data dependence, only require the data flow info of the curBB(cur CDGNode) - * 2. For building inter-block data dependence, require the data flow info of all BBs on the pred path in CFG - */ - /* Build anti dependence */ + // 1. For building intra-block data dependence, only require the data flow info of the curBB(cur CDGNode) + // 2. For building inter-block data dependence, require the data flow info of all BBs on the pred path in CFG + // Build anti dependence if (isIntra || curRegion->GetRegionNodeSize() == 1 || curRegion->GetRegionRoot() == curCDGNode) { RegList *regList = curCDGNode->GetUseInsnChain(regNO); while (regList != nullptr) { @@ -157,7 +143,7 @@ void DataDepBase::BuildDepsDefReg(Insn &insn, regno_t regNO) { BuildInterBlockDefUseDependency(*node, regNO, kDependenceTypeAnti, false); } - /* Build output dependence */ + // Build output dependence // Build intra block data dependence Insn *defInsn = curCDGNode->GetLatestDefInsn(regNO); if (defInsn != nullptr) { @@ -168,7 +154,7 @@ void DataDepBase::BuildDepsDefReg(Insn &insn, regno_t regNO) { } } -/* Build data dependence of source register operand */ +// Build data dependence of source register operand void DataDepBase::BuildDepsUseReg(Insn &insn, regno_t regNO) { DepNode *node = insn.GetDepNode(); node->AddUseReg(regNO); @@ -183,7 +169,7 @@ void DataDepBase::BuildDepsUseReg(Insn &insn, regno_t regNO) { } } -/* For inter data dependence analysis */ +// For inter data dependence analysis void DataDepBase::BuildInterBlockDefUseDependency(DepNode &curDepNode, regno_t regNO, DepType depType, bool isDef) { CHECK_FATAL(!isIntra, "must be inter block data dependence analysis"); @@ -270,13 +256,11 @@ void DataDepBase::BuildInterBlockSpecialDataInfoDependency(DepNode &curDepNode, BuildPredPathSpecialDataInfoDependencyDFS(*curBB, visited, needCmp, curDepNode, depType, infoType); } -/* - * Generate a data depNode. - * insn : create depNode for the instruction. - * nodes : a vector to store depNode. - * nodeSum : the new depNode's index. - * comments : those comment insn between last no-comment's insn and insn. - */ +// Generate a data depNode. +// insn : create depNode for the instruction. +// nodes : a vector to store depNode. +// nodeSum : the new depNode's index. +// comments : those comment insn between last no-comment's insn and insn. DepNode *DataDepBase::GenerateDepNode(Insn &insn, MapleVector &nodes, uint32 &nodeSum, MapleVector &comments) { Reservation *rev = mad.FindReservation(insn); @@ -407,14 +391,12 @@ void DataDepBase::BuildPredPathSpecialDataInfoDependencyDFS(BB &curBB, std::vect } } -/* - * Build data dependency edge from FromNode to ToNode: - * Two data dependency node has a unique edge. - * These two dependencies will set the latency on the dependency edge: - * 1. True data dependency overwrites other dependency; - * 2. Output data dependency overwrites other dependency except true dependency; - * The latency of the other dependencies is 0. - */ +// Build data dependency edge from FromNode to ToNode: +// Two data dependency node has a unique edge. +// These two dependencies will set the latency on the dependency edge: +// 1. True data dependency overwrites other dependency; +// 2. Output data dependency overwrites other dependency except true dependency; +// The latency of the other dependencies is 0. void DataDepBase::AddDependence(DepNode &fromNode, DepNode &toNode, DepType depType) { // Can not build a self loop dependence if (&fromNode == &toNode) { @@ -469,7 +451,7 @@ void DataDepBase::AddDependence4InsnInVectorByTypeAndCmp(MapleVector &ins } } -/* Remove self data dependence (self loop) in data dependence graph. */ +// Remove self data dependence (self loop) in data dependence graph. void DataDepBase::RemoveSelfDeps(Insn &insn) { DepNode *node = insn.GetDepNode(); ASSERT(node->GetSuccs().back()->GetTo().GetInsn() == &insn, "Is not a self dependence."); @@ -478,7 +460,7 @@ void DataDepBase::RemoveSelfDeps(Insn &insn) { node->RemovePred(); } -/* Check if regNO is in ehInRegs. */ +// Check if regNO is in ehInRegs. bool DataDepBase::IfInAmbiRegs(regno_t regNO) const { if (!curCDGNode->HasAmbiRegs() || !cgFunc.GetMirModule().IsJavaModule()) { return false; @@ -490,9 +472,9 @@ bool DataDepBase::IfInAmbiRegs(regno_t regNO) const { return false; } -/* Return data dependence type name */ +// Return data dependence type name const std::string &DataDepBase::GetDepTypeName(DepType depType) const { ASSERT(depType <= kDependenceTypeNone, "array boundary check failed"); return kDepTypeName[depType]; } -} /* namespace maplebe */ +} // namespace maplebe diff --git a/src/mapleall/maple_be/src/cg/dup_tail.cpp b/src/mapleall/maple_be/src/cg/dup_tail.cpp index bd27765dacfe3fd5a972893dfcb47d2900cf99fa..b4015f6a024344a86a6698887f3351d14964e35d 100644 --- a/src/mapleall/maple_be/src/cg/dup_tail.cpp +++ b/src/mapleall/maple_be/src/cg/dup_tail.cpp @@ -94,8 +94,9 @@ bool DupPattern::Optimize(BB &curBB) { return false; } -uint32 DupPattern::GetFreqThreshold() { - if (LiteProfile::IsInWhiteList(cgFunc->GetName()) && CGOptions::DoLiteProfUse()) { +uint32 DupPattern::GetFreqThreshold() const { + // kFreqThresholdPgo， freqThresholdStatic ramge (0, 100] + if (cgFunc->HasLaidOutByPgoUse()) { return cgFunc->GetFirstBB()->GetFrequency() * kFreqThresholdPgo / 100; } else { uint32 freqThresholdStatic = CGOptions::GetDupFreqThreshold(); diff --git a/src/mapleall/maple_be/src/cg/ebo.cpp b/src/mapleall/maple_be/src/cg/ebo.cpp index 971d23243bece95c0ca51db1fb143572ff896413..284f2e32803374f1ad1f9e5f5f38b8cdcec018e6 100644 --- a/src/mapleall/maple_be/src/cg/ebo.cpp +++ b/src/mapleall/maple_be/src/cg/ebo.cpp @@ -176,7 +176,13 @@ bool Ebo::ForwardPropCheck(const Operand *opndReplace, const OpndInfo &opndInfo, } bool Ebo::RegForwardCheck(Insn &insn, const Operand &opnd, const Operand *opndReplace, Operand &oldOpnd, - const OpndInfo *tmpInfo) const { + const uint32 oldOpndIndex, const OpndInfo *tmpInfo) const { + if (tmpInfo == nullptr) { + return false; + } + uint32 replacementOpndIndex = tmpInfo->replacementIndex; + Insn *replacementOpndInsn = tmpInfo->insn; + if (IsConstantImmOrReg(opnd)) { return false; } @@ -200,8 +206,10 @@ bool Ebo::RegForwardCheck(Insn &insn, const Operand &opnd, const Operand *opndRe return false; } - return ((IsOfSameClass(oldOpnd, *opndReplace) && (oldOpnd.GetSize() <= opndReplace->GetSize())) || - ((tmpInfo != nullptr) && IsMovToSIMDVmov(insn, *tmpInfo->insn))); + return (IsOfSameClass(oldOpnd, *opndReplace) && + (insn.GetDesc()->GetOpndDes(oldOpndIndex)->GetSize() <= + replacementOpndInsn->GetDesc()->GetOpndDes(replacementOpndIndex)->GetSize())) || + ((tmpInfo != nullptr) && IsMovToSIMDVmov(insn, *replacementOpndInsn)); } /* For Memory Operand, its info was stored in a hash table, this function is to compute its hash value. */ @@ -598,7 +606,7 @@ bool Ebo::ForwardPropagateOpnd(Insn &insn, Operand *&opnd, uint32 opndIndex, } #endif /* forward prop for registers. */ - if (!RegForwardCheck(insn, *opnd, opndReplace, *oldOpnd, origInfos.at(opndIndex))) { + if (!RegForwardCheck(insn, *opnd, opndReplace, *oldOpnd, opndIndex, origInfos.at(opndIndex))) { return false; } /* Copies to and from the same register are not needed. */ @@ -714,6 +722,7 @@ void Ebo::FindRedundantInsns(BB &bb, Insn *&insn, const Insn *prev, bool insnRep if (Globals::GetInstance()->GetTarget()->IsEffectiveCopy(*insn) && (opndInfo != nullptr) && !IsFmov(*insn)) { CHECK_FATAL(!opnds.empty(), "null container!"); opndInfo->replacementOpnd = opnds[kInsnSecondOpnd]; + opndInfo->replacementIndex = kInsnSecondOpnd; opndInfo->replacementInfo = opndInfos[kInsnSecondOpnd]; } else if (insn->GetBothDefUseOpnd() != kInsnMaxOpnd && (opndInfo != nullptr)) { opndInfo->replacementOpnd = nullptr; diff --git a/src/mapleall/maple_be/src/cg/emit.cpp b/src/mapleall/maple_be/src/cg/emit.cpp index 8a45bbabb3ed8281ba870a2c4cc321cadf27e430..74d1b1126256c91047b51bd00940cd65c57182fb 100644 --- a/src/mapleall/maple_be/src/cg/emit.cpp +++ b/src/mapleall/maple_be/src/cg/emit.cpp @@ -292,6 +292,22 @@ void Emitter::EmitFileInfo(const std::string &fileName) { #endif /* TARGARM32 */ } +void Emitter::EmitDataSection(const std::string §ionName, const std::string &symbolName, const std::string §ionSuffix) { + // Remove the dot at the beginning of the symbolName + std::string tmpSymName = symbolName; + while (tmpSymName.size() > 1 && tmpSymName[0] == '.') { + tmpSymName = tmpSymName.substr(1); + } + CHECK_FATAL(tmpSymName[0] != '.', "invalid symbol name"); + // e.g. + // asmInfo->GetSection(): "\t.section\t" + // sectionName: ".data" + // "." + // symbolName: "AI" + // sectionSuffix: ",\"aw\",@progbits\n" || ",\"aw\"," + (void)Emit(asmInfo->GetSection()).Emit(sectionName).Emit(".").Emit(tmpSymName).Emit(sectionSuffix); +} + void Emitter::EmitInlineAsmSection() { MapleVector &asmSections = cg->GetMIRModule()->GetAsmDecls(); if (!asmSections.empty()) { @@ -557,7 +573,7 @@ void Emitter::EmitCombineBfldValue(StructEmitInfo &structEmitInfo, bool finished } } -void Emitter::EmitBitFieldConstant(StructEmitInfo &structEmitInfo, MIRConst &mirConst, const MIRType *nextType, +void Emitter::EmitBitFieldConstant(StructEmitInfo &structEmitInfo, MIRConst &mirConst, bool combineNextField, uint64 fieldOffset) { MIRType &mirType = mirConst.GetType(); if (fieldOffset > structEmitInfo.GetNextFieldOffset()) { @@ -598,7 +614,7 @@ void Emitter::EmitBitFieldConstant(StructEmitInfo &structEmitInfo, MIRConst &mir structEmitInfo.SetCombineBitFieldValue((~(~0ULL << structEmitInfo.GetCombineBitFieldWidth())) & structEmitInfo.GetCombineBitFieldValue()); } - if ((nextType == nullptr) || (nextType->GetKind() != kTypeBitField)) { + if (!combineNextField) { /* emit structEmitInfo->combineBitFieldValue */ EmitCombineBfldValue(structEmitInfo, true); } @@ -1790,52 +1806,42 @@ void Emitter::EmitVectorConstant(MIRConst &mirConst) { } void Emitter::EmitStructConstant(MIRConst &mirConst) { - uint32 subStructFieldCounts = 0; - EmitStructConstant(mirConst, subStructFieldCounts); -} - -void Emitter::EmitStructConstant(MIRConst &mirConst, uint32 &subStructFieldCounts) { StructEmitInfo *sEmitInfo = cg->GetMIRModule()->GetMemPool()->New(); CHECK_FATAL(sEmitInfo != nullptr, "create a new struct emit info failed in Emitter::EmitStructConstant"); MIRType &mirType = mirConst.GetType(); MIRAggConst &structCt = static_cast(mirConst); MIRStructType &structType = static_cast(mirType); - auto structPack = static_cast(structType.GetTypeAttrs().GetPack()); - /* all elements of struct. */ - uint8 num; + // all elements of struct + uint32 num = (structType.GetKind() == kTypeUnion) ? 1 : static_cast(structType.GetFieldsSize()); + auto *beCommon = Globals::GetInstance()->GetBECommon(); + FieldID fieldIdx = FieldID(1); if (structType.GetKind() == kTypeUnion) { - num = 1; - } else { - num = static_cast(structType.GetFieldsSize()); - } - BECommon *beCommon = Globals::GetInstance()->GetBECommon(); - /* total size of emitted elements size. */ - size_t size = structType.GetSize(); - uint32 fieldIdx = 1; - if (structType.GetKind() == kTypeUnion) { - fieldIdx = structCt.GetFieldIdItem(0); + fieldIdx = static_cast(structCt.GetFieldIdItem(0)); } for (uint32 i = 0; i < num; ++i) { - if (((i + 1) == num) && cg->GetMIRModule()->GetSrcLang() == kSrcLangC) { + if ((i + 1) == num && cg->GetMIRModule()->GetSrcLang() == kSrcLangC) { isFlexibleArray = beCommon->GetHasFlexibleArray(mirType.GetTypeIndex().GetIdx()); arraySize = 0; } MIRConst *elemConst; if (structType.GetKind() == kTypeStruct) { - elemConst = structCt.GetAggConstElement(i + 1); + elemConst = structCt.GetAggConstElement(i + 1); // element start with 1 } else { - elemConst = structCt.GetAggConstElement(fieldIdx); + elemConst = structCt.GetAggConstElement(static_cast(fieldIdx)); } - MIRType *elemType = structType.GetElemType(i); + auto *elemType = structType.GetElemType(i); if (structType.GetKind() == kTypeUnion) { elemType = &(elemConst->GetType()); } MIRType *nextElemType = nullptr; + FieldID nextFieldIdx = FieldID(0); if (i != static_cast(num - 1)) { nextElemType = structType.GetElemType(i + 1); + nextFieldIdx = static_cast(static_cast(fieldIdx) + elemType->NumberOfFieldIDs() + 1); } uint64 elemSize = elemType->GetSize(); - uint8 charBitWidth = GetPrimTypeSize(PTY_i8) * kBitsPerByte; + const uint32 charBitWidth = GetPrimTypeBitSize(PTY_i8); + bool combineNextField = false; if (elemType->GetKind() == kTypeBitField) { if (elemConst == nullptr) { MIRIntConst *zeroFill = GlobalTables::GetIntConstTable().GetOrCreateIntConst(0, *elemType); @@ -1844,7 +1850,11 @@ void Emitter::EmitStructConstant(MIRConst &mirConst, uint32 &subStructFieldCount OffsetPair offsetPair = structType.GetFieldOffsetFromBaseAddr(static_cast(fieldIdx)); uint64 fieldOffset = static_cast(offsetPair.byteOffset) * static_cast(charBitWidth) + static_cast(offsetPair.bitOffset); - EmitBitFieldConstant(*sEmitInfo, *elemConst, nextElemType, fieldOffset); + if (nextElemType != nullptr && nextElemType->GetKind() == kTypeBitField && + structType.GetFieldOffsetFromBaseAddr(static_cast(nextFieldIdx)).bitOffset != 0) { + combineNextField = true; + } + EmitBitFieldConstant(*sEmitInfo, *elemConst, combineNextField, fieldOffset); } else { if (elemConst != nullptr) { if (IsPrimitiveVector(elemType->GetPrimType())) { @@ -1857,8 +1867,7 @@ void Emitter::EmitStructConstant(MIRConst &mirConst, uint32 &subStructFieldCount } } else if ((elemType->GetKind() == kTypeStruct) || (elemType->GetKind() == kTypeClass) || (elemType->GetKind() == kTypeUnion)) { - EmitStructConstant(*elemConst, subStructFieldCounts); - fieldIdx += subStructFieldCounts; + EmitStructConstant(*elemConst); } else { ASSERT(false, "should not run here"); } @@ -1869,36 +1878,21 @@ void Emitter::EmitStructConstant(MIRConst &mirConst, uint32 &subStructFieldCount sEmitInfo->SetNextFieldOffset(sEmitInfo->GetTotalSize() * charBitWidth); } - if (nextElemType != nullptr && nextElemType->GetKind() != kTypeBitField) { - ASSERT(i < static_cast(num - 1), "NYI"); - uint8 nextAlign = static_cast(nextElemType->GetAlign()); - auto fieldAttr = structType.GetFields()[i + 1].second.second; - nextAlign = std::max(nextAlign, static_cast(fieldAttr.GetAlign())); - nextAlign = fieldAttr.IsPacked() ? 1 : std::min(nextAlign, structPack); - ASSERT(nextAlign != 0, "expect non-zero"); - /* append size, append 0 when align need. */ - uint64 totalSize = sEmitInfo->GetTotalSize(); - uint64 psize = (totalSize % nextAlign == 0) ? 0 : (nextAlign - (totalSize % nextAlign)); - if (psize != 0) { + if (nextElemType != nullptr) { + auto nextOffsetPair = structType.GetFieldOffsetFromBaseAddr(nextFieldIdx); + if (nextOffsetPair.byteOffset > sEmitInfo->GetTotalSize() && !combineNextField) { + uint64 psize = nextOffsetPair.byteOffset - sEmitInfo->GetTotalSize(); EmitNullConstant(psize); sEmitInfo->IncreaseTotalSize(psize); sEmitInfo->SetNextFieldOffset(sEmitInfo->GetTotalSize() * charBitWidth); } - /* element is uninitialized, emit null constant. */ } - fieldIdx++; + fieldIdx = nextFieldIdx; } - if (structType.GetKind() == kTypeStruct) { - /* The reason of subtracting one is that fieldIdx adds one at the end of the cycle. */ - subStructFieldCounts = fieldIdx - 1; - } else if (structType.GetKind() == kTypeUnion) { - subStructFieldCounts = static_cast(beCommon->GetStructFieldCount(structType.GetTypeIndex())); - } - if (isFlexibleArray) { return; } - uint64 opSize = size - sEmitInfo->GetTotalSize(); + uint64 opSize = structType.GetSize() - sEmitInfo->GetTotalSize(); if (opSize != 0) { EmitNullConstant(opSize); } @@ -2191,7 +2185,7 @@ void Emitter::EmitStringPointers() { } uint32 strId = idx.GetIdx(); std::string str = GlobalTables::GetUStrTable().GetStringFromStrIdx(idx); - bool isTermByZero = str[str.size() - 1] == '\0'; + bool isTermByZero = str.find('\0') != std::string::npos; EmitStringSectionAndAlign(isTermByZero); (void)Emit(".LUstr_").Emit(strId).Emit(":\n"); std::string mplstr(str); @@ -2203,7 +2197,7 @@ void Emitter::EmitStringPointers() { } uint32 strId = idx.GetIdx(); std::string str = GlobalTables::GetUStrTable().GetStringFromStrIdx(idx); - bool isTermByZero = str[str.size() - 1] == '\0'; + bool isTermByZero = str.find('\0') != std::string::npos; EmitStringSectionAndAlign(isTermByZero); #if (defined(TARGX86) && TARGX86) || (defined(TARGX86_64) && TARGX86_64) Emit(asmInfo->GetAlign()); @@ -2262,11 +2256,13 @@ void Emitter::EmitLocalVariable(const CGFunc &cgFunc) { /* [cgFunc.GetLSymSize(), lSymTab->GetSymbolTableSize()) -> cg created symbol */ if (i < cgFunc.GetLSymSize()) { if (st->IsThreadLocal()) { - (void)Emit("\t.section\t.tdata,\"awT\",@progbits\n"); + CGOptions::IsDataSections() ? + EmitDataSection(".tdata", st->GetName(), ",\"awT\",@progbits\n") : + (void)Emit("\t.section\t.tdata,\"awT\",@progbits\n"); } else { - Emit(asmInfo->GetSection()); - Emit(asmInfo->GetData()); - Emit("\n"); + CGOptions::IsDataSections() ? + EmitDataSection(".data", st->GetName(), ",\"aw\",@progbits\n") : + (void)Emit("\t.data\n"); } } else { CHECK_FATAL(st->GetStorageClass() == kScPstatic && st->GetSKind() == kStConst, "cg should create constant!"); @@ -2371,9 +2367,10 @@ void Emitter::EmitGlobalVars(std::vector> &globalVar void Emitter::EmitUninitializedSymbolsWithPrefixSection(const MIRSymbol &symbol, const std::string §ionName) { EmitAsmLabel(symbol, kAsmType); - Emit(asmInfo->GetSection()); auto sectionConstrains = symbol.IsThreadLocal() ? ",\"awT\"," : ",\"aw\","; - (void)Emit(sectionName).Emit(sectionConstrains); + CGOptions::IsDataSections() ? + EmitDataSection(sectionName, symbol.GetName(), sectionConstrains) : + (void)Emit(asmInfo->GetSection()).Emit(sectionName).Emit(sectionConstrains); if (sectionName == ".bss" || StringUtils::StartsWith(sectionName, ".bss.") || sectionName == ".tbss" || StringUtils::StartsWith(sectionName, ".tbss.")) { Emit("%nobits\n"); @@ -2689,20 +2686,29 @@ void Emitter::EmitGlobalVariable() { /* remove leading "__" in sec name. */ secName.erase(0, 2); Emit("\t.section\t." + secName + ",\"a\",%progbits\n"); + } else if (cg->GetMIRModule()->IsJavaModule()) { + (void)Emit("\t.section\t." + std::string(kMapleGlobalVariable) + ",\"aw\", @progbits\n"); } else { bool isThreadLocal = mirSymbol->IsThreadLocal(); - if (cg->GetMIRModule()->IsJavaModule()) { - (void)Emit("\t.section\t." + std::string(kMapleGlobalVariable) + ",\"aw\", @progbits\n"); - } else if (mirSymbol->sectionAttr != UStrIdx(0)) { - auto §ionName = GlobalTables::GetUStrTable().GetStringFromStrIdx(mirSymbol->sectionAttr); + if (mirSymbol->sectionAttr != UStrIdx(0)) { + auto sectionName = GlobalTables::GetUStrTable().GetStringFromStrIdx(mirSymbol->sectionAttr); auto sectionConstrains = isThreadLocal ? ",\"awT\"," : ",\"aw\","; - (void)Emit("\t.section\t" + sectionName + sectionConstrains + "@progbits\n"); + CGOptions::IsDataSections() ? + EmitDataSection(sectionName, mirSymbol->GetName(), sectionConstrains) : + (void)Emit("\t.section\t").Emit(sectionName).Emit(sectionConstrains); + (void)Emit("@progbits\n"); } else if (isThreadLocal) { - (void)Emit("\t.section\t.tdata,\"awT\",@progbits\n"); + CGOptions::IsDataSections() ? + EmitDataSection(".tdata", mirSymbol->GetName(), ",\"awT\",@progbits\n") : + (void)Emit("\t.section\t.tdata,\"awT\",@progbits\n"); } else if (mirSymbol->GetAttr(ATTR_const) && mirSymbol->IsConst()) { - (void)Emit("\t.section\t.rodata\n"); + CGOptions::IsDataSections() ? + EmitDataSection(".rodata", mirSymbol->GetName(), ",\"a\",@progbits\n") : + (void)Emit("\t.section\t.rodata\n"); } else { - (void)Emit("\t.data\n"); + CGOptions::IsDataSections() ? + EmitDataSection(".data", mirSymbol->GetName(), ",\"aw\",@progbits\n") : + (void)Emit("\t.data\n"); } } /* Emit size and align by type */ @@ -2774,7 +2780,9 @@ void Emitter::EmitGlobalVariable() { localStrPtr.push_back(strCt->GetValue()); } else { EmitAsmLabel(*mirSymbol, kAsmType); - (void)Emit(asmInfo->GetSection()).Emit(asmInfo->GetRodata()).Emit("\n"); + CGOptions::IsDataSections() ? + EmitDataSection(".rodata", mirSymbol->GetName(), ",\"a\",@progbits\n") : + (void)Emit(asmInfo->GetSection()).Emit(asmInfo->GetRodata()).Emit("\n"); if (!CGOptions::OptimizeForSize()) { EmitAsmLabel(*mirSymbol, kAsmAlign); } @@ -2783,9 +2791,9 @@ void Emitter::EmitGlobalVariable() { } } else if (mirSymbol->GetStorageClass() == kScPstatic) { EmitAsmLabel(*mirSymbol, kAsmType); - Emit(asmInfo->GetSection()); - Emit(asmInfo->GetData()); - Emit("\n"); + CGOptions::IsDataSections() ? + EmitDataSection(".data", mirSymbol->GetName(), ",\"aw\",@progbits\n") : + (void)Emit(asmInfo->GetSection()).Emit(asmInfo->GetData()).Emit("\n"); EmitAsmLabel(*mirSymbol, kAsmAlign); EmitAsmLabel(*mirSymbol, kAsmLocal); MIRConst *ct = mirSymbol->GetKonst(); @@ -2805,7 +2813,7 @@ void Emitter::EmitGlobalVariable() { CHECK_FATAL(0, "Unknown type in Global pstatic"); } } - } /* end proccess all mirSymbols. */ + } // end process all mirSymbols EmitTLSBlock(globalTlsDataVec, globalTlsBssVec); EmitStringPointers(); /* emit global var */ @@ -3142,66 +3150,86 @@ void Emitter::EmitMethodFieldSequential(const MIRSymbol &mirSymbol, Emit(symbolName + "\n"); } -// tdata anchor (tdata not implement yet) -// tdata symbols -// tbss anchor -// tbss symbols -void Emitter::EmitTLSBlock(const MapleVector &tdataVec, const MapleVector &tbssVec) { - if (!tdataVec.empty()) { - Emit("\t.section\t.tdata,\"awT\",@progbits\n"); - Emit(asmInfo->GetAlign()).Emit(4).Emit("\n"); +void Emitter::EmitTLSBlockTdata(const MapleVector &tdataVec) { + Emit("\t.section\t.tdata,\"awT\",@progbits\n"); + Emit(asmInfo->GetAlign()).Emit(kOffsetAlignmentOf128Bit).Emit("\n"); + if (opts::aggressiveTlsLocalDynamicOptMultiThread) { + InsertAnchor("tls_start_" + GetCG()->GetMIRModule()->GetTlsAnchorHashString(), 0); + } else { InsertAnchor("tdata_start_" + GetCG()->GetMIRModule()->GetTlsAnchorHashString(), 0); - for (const auto tdataSym : tdataVec) { - if (tdataSym->GetAttr(ATTR_weak)) { - EmitAsmLabel(*tdataSym, kAsmWeak); - } else { - EmitAsmLabel(*tdataSym, kAsmGlbl); - } - EmitAsmLabel(*tdataSym, kAsmAlign); - EmitAsmLabel(*tdataSym, kAsmSyname); - MIRConst *mirConst = tdataSym->GetKonst(); - MIRType *mirType = tdataSym->GetType(); - if (IsPrimitiveVector(mirType->GetPrimType())) { - EmitVectorConstant(*mirConst); - } else if (IsPrimitiveScalar(mirType->GetPrimType())) { - if (!CGOptions::IsArm64ilp32()) { - if (IsAddress(mirType->GetPrimType())) { - uint32 sizeinbits = GetPrimTypeBitSize(mirConst->GetType().GetPrimType()); - CHECK_FATAL(sizeinbits == k64BitSize, "EmitGlobalVariable: pointer must be of size 8"); - } - } - if (cg->GetMIRModule()->IsCModule()) { - EmitScalarConstant(*mirConst, true, false, true); - } else { - EmitScalarConstant(*mirConst); + } + for (const auto tdataSym : tdataVec) { + if (tdataSym->GetAttr(ATTR_weak)) { + EmitAsmLabel(*tdataSym, kAsmWeak); + } else { + EmitAsmLabel(*tdataSym, kAsmGlbl); + } + EmitAsmLabel(*tdataSym, kAsmAlign); + EmitAsmLabel(*tdataSym, kAsmSyname); + MIRConst *mirConst = tdataSym->GetKonst(); + MIRType *mirType = tdataSym->GetType(); + if (IsPrimitiveVector(mirType->GetPrimType())) { + EmitVectorConstant(*mirConst); + } else if (IsPrimitiveScalar(mirType->GetPrimType())) { + if (!CGOptions::IsArm64ilp32()) { + if (IsAddress(mirType->GetPrimType())) { + uint32 sizeinbits = GetPrimTypeBitSize(mirConst->GetType().GetPrimType()); + CHECK_FATAL(sizeinbits == k64BitSize, "EmitGlobalVariable: pointer must be of size 8"); } - } else if (mirType->GetKind() == kTypeArray) { - EmitArrayConstant(*mirConst); - } else if (mirType->GetKind() == kTypeStruct || mirType->GetKind() == kTypeClass || - mirType->GetKind() == kTypeUnion) { - EmitStructConstant(*mirConst); + } + if (cg->GetMIRModule()->IsCModule()) { + EmitScalarConstant(*mirConst, true, false, true); } else { - ASSERT(false, "NYI"); + EmitScalarConstant(*mirConst); } - EmitAsmLabel(*tdataSym, kAsmSize); + } else if (mirType->GetKind() == kTypeArray) { + EmitArrayConstant(*mirConst); + } else if (mirType->GetKind() == kTypeStruct || mirType->GetKind() == kTypeClass || + mirType->GetKind() == kTypeUnion) { + EmitStructConstant(*mirConst); + } else { + ASSERT(false, "NYI"); } + EmitAsmLabel(*tdataSym, kAsmSize); } - if (!tbssVec.empty()) { - Emit("\t.section\t.tbss,\"awT\",@nobits\n"); - Emit(asmInfo->GetAlign()).Emit(4).Emit("\n"); +} + +void Emitter::EmitTLSBlockTbss(const MapleVector &tbssVec, bool tdataExist) { + Emit("\t.section\t.tbss,\"awT\",@nobits\n"); + Emit(asmInfo->GetAlign()).Emit(kOffsetAlignmentOf128Bit).Emit("\n"); + if (opts::aggressiveTlsLocalDynamicOptMultiThread) { + if (!tdataExist) { + InsertAnchor("tls_start_" + GetCG()->GetMIRModule()->GetTlsAnchorHashString(), 0); + } + } else { InsertAnchor("tbss_start_" + GetCG()->GetMIRModule()->GetTlsAnchorHashString(), 0); - for (auto *tbssSym : tbssVec) { - if (tbssSym->GetAttr(ATTR_weak)) { - EmitAsmLabel(*tbssSym, kAsmWeak); - } else if (tbssSym->GetStorageClass() == kScGlobal) { - EmitAsmLabel(*tbssSym, kAsmGlbl); - } - EmitAsmLabel(*tbssSym, kAsmType); - EmitAsmLabel(*tbssSym, kAsmAlign); - EmitAsmLabel(*tbssSym, kAsmSyname); - EmitAsmLabel(*tbssSym, kAsmZero); - EmitAsmLabel(*tbssSym, kAsmSize); + } + + for (auto *tbssSym : tbssVec) { + if (tbssSym->GetAttr(ATTR_weak)) { + EmitAsmLabel(*tbssSym, kAsmWeak); + } else if (tbssSym->GetStorageClass() == kScGlobal) { + EmitAsmLabel(*tbssSym, kAsmGlbl); } + EmitAsmLabel(*tbssSym, kAsmType); + EmitAsmLabel(*tbssSym, kAsmAlign); + EmitAsmLabel(*tbssSym, kAsmSyname); + EmitAsmLabel(*tbssSym, kAsmZero); + EmitAsmLabel(*tbssSym, kAsmSize); + } +} +// tdata anchor (tdata not implement yet) +// tdata symbols +// tbss anchor +// tbss symbols +void Emitter::EmitTLSBlock(const MapleVector &tdataVec, const MapleVector &tbssVec) { + bool tdataExist = false; + if (!tdataVec.empty()) { + tdataExist = true; + EmitTLSBlockTdata(tdataVec); + } + if (!tbssVec.empty()) { + EmitTLSBlockTbss(tbssVec, tdataExist); } return; } @@ -3417,7 +3445,7 @@ void Emitter::EmitDIAttrValue(DBGDie *die, DBGDieAttr *attr, DwAt attrName, DwTa } else if (tagName == DW_TAG_subprogram) { MIRFunction *mfunc = GetDwTagSubprogram(attrvec, *di); lastMIRFunc = mfunc; - MapleMap >::iterator it = + MapleMap >::iterator it = CG::GetFuncWrapLabels().find(mfunc); if (it != CG::GetFuncWrapLabels().end()) { EmitLabelForFunc(mfunc, (*it).second.second); /* end label */ @@ -3457,7 +3485,7 @@ void Emitter::EmitDIAttrValue(DBGDie *die, DBGDieAttr *attr, DwAt attrName, DwTa } else if (tagName == DW_TAG_subprogram) { /* if decl, name should be found; if def, we try DW_AT_specification */ MIRFunction *mfunc = GetDwTagSubprogram(attrvec, *di); - MapleMap >::iterator + MapleMap >::iterator it = CG::GetFuncWrapLabels().find(mfunc); if (it != CG::GetFuncWrapLabels().end()) { EmitLabelForFunc(mfunc, (*it).second.first); /* it is a */ diff --git a/src/mapleall/maple_be/src/cg/global_schedule.cpp b/src/mapleall/maple_be/src/cg/global_schedule.cpp index ae71cec4716e3b4799232cd6ec4d5d440af0ec26..703655353a1ee9b49eee291a9d6634a1c76466b6 100644 --- a/src/mapleall/maple_be/src/cg/global_schedule.cpp +++ b/src/mapleall/maple_be/src/cg/global_schedule.cpp @@ -62,15 +62,13 @@ bool GlobalSchedule::CheckCondition(CDGRegion ®ion) { return insnSum <= kMaxInsnNum; } -/* - * The entry of global scheduling - */ +// The entry of global scheduling void GlobalSchedule::DoGlobalSchedule(CDGRegion ®ion) { if (GLOBAL_SCHEDULE_DUMP) { DumpRegionInfoBeforeSchedule(region); } - listScheduler = schedMP.New(schedMP, cgFunc, false, "globalschedule"); - /* Process nodes in a region by the topology sequence */ + listScheduler = schedMP.New(schedMP, cgFunc, true, "globalschedule"); + // Process nodes in a region by the topology sequence for (auto cdgNode : region.GetRegionNodes()) { BB *bb = cdgNode->GetBB(); ASSERT(bb != nullptr, "get bb from cdgNode failed"); @@ -85,15 +83,15 @@ void GlobalSchedule::DoGlobalSchedule(CDGRegion ®ion) { } MemPool *cdgNodeMp = memPoolCtrler.NewMemPool("global-scheduler cdgNode memPool", true); - /* Collect candidate instructions of current cdgNode */ - InitInCDGNode(region, *cdgNode, cdgNodeMp); + // Collect candidate instructions of current cdgNode + InitInCDGNode(region, *cdgNode, *cdgNodeMp); - /* Execute list scheduling */ + // Execute list scheduling listScheduler->SetCDGRegion(region); listScheduler->SetCDGNode(*cdgNode); listScheduler->DoListScheduling(); - /* Reorder instructions in the current BB based on the scheduling result */ + // Reorder instructions in the current BB based on the scheduling result FinishScheduling(*cdgNode); if (GLOBAL_SCHEDULE_DUMP) { @@ -104,11 +102,54 @@ void GlobalSchedule::DoGlobalSchedule(CDGRegion ®ion) { } } +void GlobalSchedule::InitInCDGNode(CDGRegion ®ion, CDGNode &cdgNode, MemPool &cdgNodeMp) { + PrepareCommonSchedInfo(region, cdgNode, cdgNodeMp); + + // Init insnNum of curCDGNode + InitMachineInsnNum(cdgNode); + + if (GLOBAL_SCHEDULE_DUMP) { + DumpCDGNodeInfoBeforeSchedule(cdgNode); + } +} + +void GlobalSchedule::PrepareCommonSchedInfo(CDGRegion ®ion, CDGNode &cdgNode, MemPool &cdgNodeMp) { + commonSchedInfo = cdgNodeMp.New(cdgNodeMp); + // 1. The instructions of the current node + MapleVector &curDataNodes = cdgNode.GetAllDataNodes(); + // For verify, the node is stored in reverse order and for global, the node is stored in sequence + for (auto *depNode : curDataNodes) { + commonSchedInfo->AddCandidates(depNode); + depNode->SetState(kCandidate); + } + // 2. The instructions of the equivalent candidate nodes of the current node + std::vector equivalentNodes; + cda.GetEquivalentNodesInRegion(region, cdgNode, equivalentNodes); + for (auto *equivNode : equivalentNodes) { + BB *equivBB = equivNode->GetBB(); + ASSERT(equivBB != nullptr, "get bb from cdgNode failed"); + if (equivBB->IsAtomicBuiltInBB()) { + continue; + } + for (auto *depNode : equivNode->GetAllDataNodes()) { + Insn *insn = depNode->GetInsn(); + CHECK_FATAL(insn != nullptr, "get insn from depNode failed"); + // call & branch insns cannot be moved across BB + if (insn->IsBranch() || insn->IsCall()) { + continue; + } + commonSchedInfo->AddCandidates(depNode); + depNode->SetState(kCandidate); + } + } + listScheduler->SetCommonSchedInfo(*commonSchedInfo); +} + void GlobalSchedule::ClearCDGNodeInfo(CDGRegion ®ion, CDGNode &cdgNode, MemPool *cdgNodeMp) { std::vector equivalentNodes; cda.GetEquivalentNodesInRegion(region, cdgNode, equivalentNodes); - for (auto equivNode : equivalentNodes) { - for (auto depNode : equivNode->GetAllDataNodes()) { + for (auto *equivNode : equivalentNodes) { + for (auto *depNode : equivNode->GetAllDataNodes()) { ASSERT(depNode->GetState() != kScheduled, "update state of depNode failed in finishScheduling"); depNode->SetState(kNormal); } @@ -133,4 +174,4 @@ bool CgGlobalSchedule::PhaseRun(maplebe::CGFunc &f) { return true; } MAPLE_TRANSFORM_PHASE_REGISTER_CANSKIP(CgGlobalSchedule, globalschedule) -} /* namespace maplebe */ +} // namespace maplebe diff --git a/src/mapleall/maple_be/src/cg/insn.cpp b/src/mapleall/maple_be/src/cg/insn.cpp index 61d5faf396c848fc0d026eaf4b4c7e1afae97f9b..61b7c19a3c199d64670e7a553108828af62281d5 100644 --- a/src/mapleall/maple_be/src/cg/insn.cpp +++ b/src/mapleall/maple_be/src/cg/insn.cpp @@ -72,6 +72,9 @@ bool Insn::IsDMBInsn() const { bool Insn::IsAtomic() const { return md ? md->IsAtomic() : false; } +bool Insn::IsCondDef() const { + return md ? md->IsCondDef() : false; +} bool Insn::IsVolatile() const { return md ? md->IsVolatile() : false; } @@ -348,6 +351,23 @@ void Insn::Dump() const { if (GetNumOfRegSpec() != 0) { LogInfo::MapleLogger() << " (vecSpec: " << GetNumOfRegSpec() << ")"; } + + if (referenceOsts != nullptr) { + LogInfo::MapleLogger() << " ["; + for (auto iter = referenceOsts->GetDefSet().begin(); iter != referenceOsts->GetDefSet().end(); ++iter) { + if (iter == referenceOsts->GetDefSet().begin()) { + LogInfo::MapleLogger() << "memDefSet: "; + } + LogInfo::MapleLogger() << *iter << " "; + } + for (auto iter = referenceOsts->GetUseSet().begin(); iter != referenceOsts->GetUseSet().end(); ++iter) { + if (iter == referenceOsts->GetUseSet().begin()) { + LogInfo::MapleLogger() << "memUseSet: "; + } + LogInfo::MapleLogger() << *iter << " "; + } + LogInfo::MapleLogger() << "]"; + } LogInfo::MapleLogger() << "\n"; } diff --git a/src/mapleall/maple_be/src/cg/isel.cpp b/src/mapleall/maple_be/src/cg/isel.cpp index 0b0b6ae1fa00bcef814570640aa02100cc48a80c..d8013d920680f91c72f775f5a2e1f5fa6470f560 100644 --- a/src/mapleall/maple_be/src/cg/isel.cpp +++ b/src/mapleall/maple_be/src/cg/isel.cpp @@ -754,7 +754,7 @@ MirTypeInfo MPISel::GetMirTypeInfoFromMirNode(const BaseNode &node) { return GetMirTypeInfoFormFieldIdAndMirType(fieldId, mirType); } -void MPISel::SelectDassign(const DassignNode &stmt, Operand &opndRhs) { +void MPISel::SelectDassign(DassignNode &stmt, Operand &opndRhs) { /* mirSymbol info */ MIRSymbol *symbol = cgFunc->GetFunction().GetLocalOrGlobalSymbol(stmt.GetStIdx()); MirTypeInfo symbolInfo = GetMirTypeInfoFromMirNode(stmt); diff --git a/src/mapleall/maple_be/src/cg/list_scheduler.cpp b/src/mapleall/maple_be/src/cg/list_scheduler.cpp index 761ac4438a28cf910fdeb4f7f293f4f9861eae88..86d038470b3109ea6566ffc10cd83d8e1911e320 100644 --- a/src/mapleall/maple_be/src/cg/list_scheduler.cpp +++ b/src/mapleall/maple_be/src/cg/list_scheduler.cpp @@ -34,12 +34,12 @@ void ListScheduler::DoListScheduling() { LogInfo::MapleLogger() << " >> dependencies resolved: "; } - /* Push depNodes whose dependencies resolved into waitingQueue */ + // Push depNodes whose dependencies resolved into waitingQueue CandidateToWaitingQueue(); ComputeEStart(currCycle); - /* Iterate until the instructions in the current BB are scheduled */ + // Iterate until the instructions in the current BB are scheduled while (scheduledNodeNum < curCDGNode->GetInsnNum()) { UpdateInfoBeforeSelectNode(); @@ -48,7 +48,7 @@ void ListScheduler::DoListScheduling() { DumpWaitingQueue(); } - /* Push depNodes whose resources are free from waitingQueue into readyList */ + // Push depNodes whose resources are free from waitingQueue into readyList WaitingQueueToReadyList(); if (LIST_SCHEDULE_DUMP || isUnitTest) { @@ -65,7 +65,7 @@ void ListScheduler::DoListScheduling() { CalculateMostUsedUnitKindCount(); if (!doDelayHeuristics) { - /* Update LStart */ + // Update LStart ComputeLStart(); if (LIST_SCHEDULE_DUMP || isUnitTest) { DumpEStartLStartOfAllNodes(); @@ -111,7 +111,7 @@ void ListScheduler::Init() { scheduledNodeNum = 0; MapleVector &candidates = commonSchedInfo->GetCandidates(); - /* Set the initial earliest time of all nodes to 0 */ + // Set the initial earliest time of all nodes to 0 for (auto *depNode : candidates) { depNode->SetEStart(0); } @@ -144,7 +144,8 @@ void ListScheduler::WaitingQueueToReadyList() { DepNode *waitingNode = *waitingIter; // Just check whether the current cycle is free, because // the rightmost bit of occupyTable always indicates curCycle - if (waitingNode->IsResourceFree(1) && waitingNode->GetEStart() <= currCycle) { + if (((cgFunc.IsAfterRegAlloc() && waitingNode->IsResourceIdle()) || !cgFunc.IsAfterRegAlloc()) && + waitingNode->GetEStart() <= currCycle) { (void)readyList.emplace_back(waitingNode); waitingNode->SetState(kReady); waitingIter = EraseIterFromWaitingQueue(waitingIter); @@ -155,10 +156,8 @@ void ListScheduler::WaitingQueueToReadyList() { } static uint32 kMaxUnitIdx = 0; - /* - * Sort by priority in descending order, which use LStart as algorithm of computing priority, - * that is the first node in list has the highest priority - */ +// Sort by priority in descending order, which use LStart as algorithm of computing priority, +// that is the first node in list has the highest priority bool ListScheduler::CriticalPathRankScheduleInsns(const DepNode *node1, const DepNode *node2) { // p as an acronym for priority CompareLStart compareLStart; @@ -211,7 +210,7 @@ void ListScheduler::UpdateInfoBeforeSelectNode() { while (advancedCycle > 0) { currCycle++; // Update the occupation of cpu units - mad->AdvanceCycle(); + mad->AdvanceOneCycleForAll(); advancedCycle--; } // Fall back to the waitingQueue if the depNode in readyList has resources conflict @@ -256,8 +255,9 @@ void ListScheduler::UpdateEStart(DepNode &schedNode) { void ListScheduler::UpdateInfoAfterSelectNode(DepNode &schedNode) { schedNode.SetState(kScheduled); schedNode.SetSchedCycle(currCycle); - auto cost = static_cast(schedNode.GetReservation()->GetLatency()); - schedNode.OccupyUnits(cost); + if (cgFunc.IsAfterRegAlloc()) { + schedNode.OccupyRequiredUnits(); + } schedNode.SetEStart(currCycle); commonSchedInfo->AddSchedResults(&schedNode); lastSchedInsnId = schedNode.GetInsn()->GetId(); @@ -287,7 +287,9 @@ void ListScheduler::UpdateInfoAfterSelectNode(DepNode &schedNode) { if (LIST_SCHEDULE_DUMP || isUnitTest) { LogInfo::MapleLogger() << "}\n\n"; DumpScheduledResult(); - LogInfo::MapleLogger() << "'' issue insn_" << schedNode.GetInsn()->GetId() << " at cycle " << currCycle << "\n\n"; + LogInfo::MapleLogger() << "'' issue insn_" << schedNode.GetInsn()->GetId() << " [ "; + schedNode.GetInsn()->Dump(); + LogInfo::MapleLogger() << " ] " << " at cycle " << currCycle << "\n\n"; } // Add comment @@ -305,7 +307,12 @@ void ListScheduler::UpdateNodesInReadyList() { while (readyIter != readyList.end()) { DepNode *readyNode = *readyIter; CHECK_NULL_FATAL(lastSchedNode); - if (!readyNode->IsResourceFree(1) || readyNode->GetEStart() > currCycle) { + // In globalSchedule before RA, we do not consider resource conflict in pipeline + if ((cgFunc.IsAfterRegAlloc() && !readyNode->IsResourceIdle()) || readyNode->GetEStart() > currCycle) { + if (LIST_SCHEDULE_DUMP || isUnitTest) { + LogInfo::MapleLogger() << " >> ReadyList -> WaitingQueue: insn_" << readyNode->GetInsn()->GetId() << + " (resource conflict)\n\n"; + } (void)waitingQueue.emplace_back(readyNode); readyNode->SetState(kWaiting); readyIter = EraseIterFromReadyList(readyIter); @@ -335,10 +342,8 @@ void ListScheduler::UpdateAdvanceCycle(const DepNode &schedNode) { } } -/* - * Compute the delay of the depNode by postorder, which is calculated only once before scheduling, - * and the delay of the leaf node is initially set to 0 or execTime - */ +// Compute the delay of the depNode by postorder, which is calculated only once before scheduling, +// and the delay of the leaf node is initially set to 0 or execTime void ListScheduler::ComputeDelayPriority() { std::vector traversalList; MapleVector &candidates = commonSchedInfo->GetCandidates(); @@ -383,16 +388,14 @@ void ListScheduler::InitInfoBeforeCompEStart(uint32 cycle, std::vector } } -/* - * Compute the earliest start cycle of the instruction. - * Regardless of whether the LStart heuristic is used, EStart always needs to be calculated, - * which indicates the cycles required for an insn to wait because of the resource conflict. - */ +// Compute the earliest start cycle of the instruction. +// Regardless of whether the LStart heuristic is used, EStart always needs to be calculated, +// which indicates the cycles required for an insn to wait because of the resource conflict. void ListScheduler::ComputeEStart(uint32 cycle) { std::vector traversalList; InitInfoBeforeCompEStart(cycle, traversalList); - /* Compute the eStart of each depNode in the topology sequence */ + // Compute the eStart of each depNode in the topology sequence while (!traversalList.empty()) { DepNode *depNode = traversalList.front(); traversalList.erase(traversalList.begin()); @@ -430,10 +433,8 @@ void ListScheduler::InitInfoBeforeCompLStart(std::vector &traversalLis } } -/* - * Compute the latest start cycle of the instruction, which - * is dynamically recalculated based on the current maxEStart during scheduling. - */ +// Compute the latest start cycle of the instruction, which +// is dynamically recalculated based on the current maxEStart during scheduling. void ListScheduler::ComputeLStart() { maxLStart = maxEStart; @@ -446,7 +447,7 @@ void ListScheduler::ComputeLStart() { std::vector traversalList; InitInfoBeforeCompLStart(traversalList); - /* Compute the lStart of all nodes in the topology sequence */ + // Compute the lStart of all nodes in the topology sequence while (!traversalList.empty()) { DepNode *depNode = traversalList.front(); traversalList.erase(traversalList.begin()); @@ -467,7 +468,7 @@ void ListScheduler::ComputeLStart() { } } -/* Calculate the most used unitKind index */ +// Calculate the most used unitKind index void ListScheduler::CalculateMostUsedUnitKindCount() { std::array unitKindCount = { 0 }; for (auto *depNode : readyList) { @@ -484,7 +485,7 @@ void ListScheduler::CalculateMostUsedUnitKindCount() { } } -/* The index of unitKindCount is unitKind, the element of unitKindCount is count of the unitKind */ +// The index of unitKindCount is unitKind, the element of unitKindCount is count of the unitKind void ListScheduler::CountUnitKind(const DepNode &depNode, std::array &unitKindCount) const { uint32 unitKind = depNode.GetUnitKind(); auto index = static_cast(__builtin_ffs(static_cast(unitKind))); @@ -544,6 +545,7 @@ void ListScheduler::DumpDelay() const { ASSERT(curBB != nullptr, "get bb from cdgNode failed"); LogInfo::MapleLogger() << " >> Delay priority of readyList in bb_" << curBB->GetId() << "\n"; LogInfo::MapleLogger() << " --------------------------------------------------------\n"; + (void)LogInfo::MapleLogger().fill(' '); LogInfo::MapleLogger() << " " << std::setiosflags(std::ios::left) << std::setw(8) << "insn" << std::resetiosflags(std::ios::left) << std::setiosflags(std::ios::right) << std::setw(4) << "bb" << std::resetiosflags(std::ios::right) << @@ -555,9 +557,10 @@ void ListScheduler::DumpDelay() const { LogInfo::MapleLogger() << " --------------------------------------------------------\n"; for (auto depNode : commonSchedInfo->GetCandidates()) { Insn *insn = depNode->GetInsn(); - ASSERT(insn != nullptr, "get insn from depNode failed"); + ASSERT_NOT_NULL(insn); uint32 predSize = depNode->GetValidPredsSize(); uint32 delay = depNode->GetDelay(); + ASSERT_NOT_NULL(mad); ASSERT_NOT_NULL(mad->FindReservation(*insn)); int latency = mad->FindReservation(*insn)->GetLatency(); LogInfo::MapleLogger() << " " << @@ -570,7 +573,7 @@ void ListScheduler::DumpDelay() const { DumpReservation(*depNode); LogInfo::MapleLogger() << std::resetiosflags(std::ios::right) << "\n"; } - LogInfo::MapleLogger() << " --------------------------------------------------------\n"; + LogInfo::MapleLogger() << " --------------------------------------------------------\n\n"; } void ListScheduler::DumpEStartLStartOfAllNodes() { @@ -579,6 +582,7 @@ void ListScheduler::DumpEStartLStartOfAllNodes() { LogInfo::MapleLogger() << " >> max EStart: " << maxEStart << "\n\n"; LogInfo::MapleLogger() << " >> CP priority of readyList in bb_" << curBB->GetId() << "\n"; LogInfo::MapleLogger() << " --------------------------------------------------------------------------\n"; + (void)LogInfo::MapleLogger().fill(' '); LogInfo::MapleLogger() << " " << std::setiosflags(std::ios::left) << std::setw(8) << "insn" << std::resetiosflags(std::ios::left) << std::setiosflags(std::ios::right) << std::setw(4) << "bb" << std::resetiosflags(std::ios::right) << @@ -605,6 +609,7 @@ void ListScheduler::DumpDepNodeInfo(const BB &curBB, MapleVector &node uint32 lStart = depNode->GetLStart(); ASSERT_NOT_NULL(mad->FindReservation(*insn)); int latency = mad->FindReservation(*insn)->GetLatency(); + (void)LogInfo::MapleLogger().fill(' '); LogInfo::MapleLogger() << " " << std::setiosflags(std::ios::left) << std::setw(8) << insn->GetId() << std::resetiosflags(std::ios::left) << std::setiosflags(std::ios::right) << std::setw(4) << curBB.GetId() << std::resetiosflags(std::ios::right) << @@ -725,4 +730,4 @@ void ListScheduler::DumpReservation(const DepNode &depNode) const { } } } -} /* namespace maplebe */ +} // namespace maplebe diff --git a/src/mapleall/maple_be/src/cg/local_schedule.cpp b/src/mapleall/maple_be/src/cg/local_schedule.cpp index 53cdb6dac46448fe18ff644c549b3a7d0dabf1b0..3966588f7cfda632166bf85ad6087b79aaa1df82 100644 --- a/src/mapleall/maple_be/src/cg/local_schedule.cpp +++ b/src/mapleall/maple_be/src/cg/local_schedule.cpp @@ -19,7 +19,6 @@ #include "cg.h" #include "optimize_common.h" - namespace maplebe { void LocalSchedule::Run() { FCDG *fcdg = cda.GetFCDG(); @@ -75,9 +74,6 @@ void LocalSchedule::DoLocalScheduleForRegion(CDGRegion ®ion) { } void LocalSchedule::DoLocalSchedule(CDGNode &cdgNode) { - if (LOCAL_SCHEDULE_DUMP || isUnitTest) { - DumpCDGNodeInfoBeforeSchedule(cdgNode); - } listScheduler = schedMP.New(schedMP, cgFunc, true, "localschedule"); InitInCDGNode(cdgNode); listScheduler->SetCDGRegion(*cdgNode.GetRegion()); @@ -98,17 +94,9 @@ void LocalSchedule::InitInCDGNode(CDGNode &cdgNode) { } listScheduler->SetCommonSchedInfo(*commonSchedInfo); - uint32 insnNum = 0; - BB *curBB = cdgNode.GetBB(); - CHECK_FATAL(curBB != nullptr, "get bb from cdgNode failed"); - FOR_BB_INSNS_CONST(insn, curBB) { - if (insn->IsMachineInstruction()) { - insnNum++; - } - } - cdgNode.SetInsnNum(insnNum); + InitMachineInsnNum(cdgNode); - if (LOCAL_SCHEDULE_DUMP) { + if (LOCAL_SCHEDULE_DUMP || isUnitTest) { DumpCDGNodeInfoBeforeSchedule(cdgNode); } } @@ -125,4 +113,4 @@ bool CgLocalSchedule::PhaseRun(maplebe::CGFunc &f) { return true; } MAPLE_TRANSFORM_PHASE_REGISTER_CANSKIP(CgLocalSchedule, localschedule) -} /* namespace maplebe */ +} // namespace maplebe diff --git a/src/mapleall/maple_be/src/cg/peep.cpp b/src/mapleall/maple_be/src/cg/peep.cpp index f6600f604e9e2538a08daf4f91305d0b35bf41f6..a7f8392c16c106f2f87baf316e58b55ffb263584 100644 --- a/src/mapleall/maple_be/src/cg/peep.cpp +++ b/src/mapleall/maple_be/src/cg/peep.cpp @@ -694,11 +694,25 @@ bool CgPrePeepHole1::PhaseRun(maplebe::CGFunc &f) { MAPLE_TRANSFORM_PHASE_REGISTER_CANSKIP(CgPrePeepHole1, prepeephole1) bool CgPeepHole0::PhaseRun(maplebe::CGFunc &f) { + ReachingDefinition *reachingDef = nullptr; + if (Globals::GetInstance()->GetOptimLevel() >= CGOptions::kLevel2) { + reachingDef = GET_ANALYSIS(CgReachingDefinition, f); + } + if (reachingDef == nullptr || !f.GetRDStatus()) { + GetAnalysisInfoHook()->ForceEraseAnalysisPhase(f.GetUniqueID(), &CgReachingDefinition::id); + return false; + } + auto *peep = GetPhaseMemPool()->New(&f); CHECK_FATAL(peep != nullptr, "PeepHoleOptimizer instance create failure"); peep->Peephole0(); return false; } + +void CgPeepHole0::GetAnalysisDependence(AnalysisDep &aDep) const { + aDep.AddRequired(); + aDep.SetPreservedAll(); // CgReachingDefinition must be preserved before clearrdinfo phase +} MAPLE_TRANSFORM_PHASE_REGISTER_CANSKIP(CgPeepHole0, peephole0) #endif diff --git a/src/mapleall/maple_be/src/cg/proepilog.cpp b/src/mapleall/maple_be/src/cg/proepilog.cpp index cfced35ed0a2b9bc98211b8dc29b9954745e3e8b..0b49e261b71fd8f90de8746c443ac891df6e32a3 100644 --- a/src/mapleall/maple_be/src/cg/proepilog.cpp +++ b/src/mapleall/maple_be/src/cg/proepilog.cpp @@ -161,7 +161,9 @@ void ProEpilogAnalysis::Analysis() { saveInfo.Clear(); return; } - saveInfo.epilogBBs.insert(bbId); + if (cgFunc.GetBBFromID(bbId)->GetKind() != BB::kBBNoReturn) { + saveInfo.epilogBBs.insert(bbId); + } } for (auto bbId : swkCand.restoreAtExitBBs) { // saveBB post dom firstBB, it's no benefit @@ -175,7 +177,9 @@ void ProEpilogAnalysis::Analysis() { saveInfo.Clear(); return; } - saveInfo.epilogBBs.insert(bbId); + if (cgFunc.GetBBFromID(bbId)->GetKind() != BB::kBBNoReturn) { + saveInfo.epilogBBs.insert(bbId); + } } if (CG_DEBUG_FUNC(cgFunc)) { @@ -192,7 +196,7 @@ void CgProEpilogAnalysis::GetAnalysisDependence(AnalysisDep &aDep) const { } bool CgProEpilogAnalysis::PhaseRun(maplebe::CGFunc &f) { - if (f.GetMirModule().GetSrcLang() != kSrcLangC || f.GetFunction().IsVarargs()) { + if (f.GetMirModule().GetSrcLang() != kSrcLangC || f.GetFunction().IsVarargs()) { return false; } @@ -222,9 +226,15 @@ bool CgGenProEpiLog::PhaseRun(maplebe::CGFunc &f) { #if (defined(TARGAARCH64) && TARGAARCH64) || (defined(TARGRISCV64) && TARGRISCV64) const ProEpilogSaveInfo *saveInfo = nullptr; if (Globals::GetInstance()->GetOptimLevel() > CGOptions::kLevel0 && !CGOptions::OptimizeForSize()) { - MaplePhase *it = GetAnalysisInfoHook()->ForceRunAnalysisPhase, CGFunc>( + auto *proepilogIt = GetAnalysisInfoHook()->ForceRunAnalysisPhase, CGFunc>( &CgProEpilogAnalysis::id, f); - saveInfo = static_cast(it)->GetResult(); + saveInfo = static_cast(proepilogIt)->GetResult(); + + auto *liveIt = GetAnalysisInfoHook()->ForceRunAnalysisPhase, CGFunc>( + &CgLiveAnalysis::id, f); + auto *live = static_cast(liveIt)->GetResult(); + CHECK_FATAL(live != nullptr, "null ptr check"); + live->ResetLiveSet(); } genPE = GetPhaseAllocator()->New(f, *ApplyTempMemPool(), saveInfo); #endif diff --git a/src/mapleall/maple_be/src/cg/ra_opt.cpp b/src/mapleall/maple_be/src/cg/ra_opt.cpp index 97bec72fe9876ecf5b18db0b87c96a7450acc6cd..11f56a3b088bc0a56bef4e954171a6483800f359 100644 --- a/src/mapleall/maple_be/src/cg/ra_opt.cpp +++ b/src/mapleall/maple_be/src/cg/ra_opt.cpp @@ -88,7 +88,7 @@ void LRSplitForSink::ColletSplitRegRefs() { } } if (dumpInfo) { - for (const auto &[regno, refsInfo] : splitRegRefs) { + for (const auto &[regno, refsInfo] : std::as_const(splitRegRefs)) { LogInfo::MapleLogger() << "R" << regno << " : D" << refsInfo->defInsns.size() << "U" << refsInfo->useInsns.size() << " After Call BB :"; for (auto bb : refsInfo->afterCallBBs) { @@ -157,9 +157,9 @@ BB *LRSplitForSink::SearchSplitBB(const RefsInfo &refsInfo) { void LRSplitForSink::TryToSplitLiveRanges() { ColletSplitRegRefs(); - for (auto &[regno, refsInfo] : splitRegRefs) { + for (auto &[regno, refsInfo] : std::as_const(splitRegRefs)) { // def point more than 1 or not cross call, there's no need to split it - if (refsInfo->defInsns.size() > 1 || refsInfo->afterCallBBs.size() <= 0) { + if (refsInfo->defInsns.size() > 1 || refsInfo->afterCallBBs.empty()) { continue; } if (dumpInfo) { @@ -216,9 +216,7 @@ bool CgRaOpt::PhaseRun(maplebe::CGFunc &f) { raOpt->InitializePatterns(); raOpt->Run(); // the live range info may changed, so invalid the info. - if (live != nullptr) { - live->ClearInOutDataInfo(); - } + live->ClearInOutDataInfo(); return false; } diff --git a/src/mapleall/maple_be/src/cg/reaching.cpp b/src/mapleall/maple_be/src/cg/reaching.cpp index 82cd40eb696d0f3964d0e6c66cb545c341095b22..76a3bfe5fa078e1217afc449cbd169c1cf415cac 100644 --- a/src/mapleall/maple_be/src/cg/reaching.cpp +++ b/src/mapleall/maple_be/src/cg/reaching.cpp @@ -556,10 +556,10 @@ void ReachingDefinition::InitRegAndMemInfo(const BB &bb) { } } -/* insert pseudoInsns for function parameters, ehBB, and return R0/V0. init bb->gen, bb->use, bb->out */ +// Insert pseudoInsns for function parameters, ehBB, and return R0/V0. init bb->gen, bb->use, bb->out. +// We already insert pseudo-ret-insns in exit BBs in handleFunction. void ReachingDefinition::Initialize() { InitDataSize(); - AddRetPseudoInsns(); FOR_ALL_BB(bb, cgFunc) { InitRegAndMemInfo(*bb); } diff --git a/src/mapleall/maple_be/src/cg/reg_alloc_basic.cpp b/src/mapleall/maple_be/src/cg/reg_alloc_basic.cpp index cd1d02450f5a4c59e68afde605d0bb855929f02b..569b3d1cb782bd1d24b35d4e8b2fc6e14deafe5f 100644 --- a/src/mapleall/maple_be/src/cg/reg_alloc_basic.cpp +++ b/src/mapleall/maple_be/src/cg/reg_alloc_basic.cpp @@ -126,10 +126,8 @@ void DefaultO0RegAllocator::CheckLiveAndReleaseReg(regno_t preg, regno_t vreg, c /* record defined register number in this insn */ multiDefForInsn.emplace(preg); uint32 id = GetRegLivenessId(vreg); - if (!cInsn.IsCondDef()) { - if (id != 0 && id <= cInsn.GetId()) { - ReleaseReg(preg); - } + if (id != 0 && id <= cInsn.GetId()) { + ReleaseReg(preg); } } diff --git a/src/mapleall/maple_be/src/cg/reg_alloc_color_ra.cpp b/src/mapleall/maple_be/src/cg/reg_alloc_color_ra.cpp index 00a61559abfe17634f63315133b4cc539da26813..c7a4eda17e2d9f0a0e63dba04dcd27598c9742ee 100644 --- a/src/mapleall/maple_be/src/cg/reg_alloc_color_ra.cpp +++ b/src/mapleall/maple_be/src/cg/reg_alloc_color_ra.cpp @@ -2557,7 +2557,7 @@ void GraphColorRegAllocator::SpillOperandForSpillPre(Insn &insn, const Operand & insn.GetBB()->InsertInsnBefore(insn, stInsn); } -void GraphColorRegAllocator::SpillOperandForSpillPost(Insn &insn, const Operand &opnd, bool isDef, RegOperand &phyOpnd, +void GraphColorRegAllocator::SpillOperandForSpillPost(Insn &insn, const Operand &opnd, RegOperand &phyOpnd, uint32 spillIdx, bool needSpill) { if (!needSpill) { return; @@ -2571,27 +2571,6 @@ void GraphColorRegAllocator::SpillOperandForSpillPost(Insn &insn, const Operand isLastInsn = true; } - if (lr->GetRematLevel() != kRematOff && !isDef) { - std::string comment = " REMATERIALIZE for spill vreg: " + - std::to_string(regNO); - if (isLastInsn) { - for (auto tgtBB : insn.GetBB()->GetSuccs()) { - std::vector rematInsns = lr->Rematerialize(*cgFunc, phyOpnd); - for (auto &&remat : rematInsns) { - remat->SetComment(comment); - tgtBB->InsertInsnBegin(*remat); - } - } - } else { - std::vector rematInsns = lr->Rematerialize(*cgFunc, phyOpnd); - for (auto &&remat : rematInsns) { - remat->SetComment(comment); - insn.GetBB()->InsertInsnAfter(insn, *remat); - } - } - return; - } - MemOperand *spillMem = CreateSpillMem(spillIdx, regOpnd.GetRegisterType(), kSpillMemPost); ASSERT(spillMem != nullptr, "spillMem nullptr check"); @@ -2914,7 +2893,7 @@ RegOperand *GraphColorRegAllocator::GetReplaceOpndForLRA(Insn &insn, const Opera SpillOperandForSpillPre(insn, regOpnd, phyOpnd, spillIdx, needSpillLr); Insn *spill = SpillOperand(insn, regOpnd, isDef, phyOpnd); if (spill != nullptr) { - SpillOperandForSpillPost(*spill, regOpnd, isDef, phyOpnd, spillIdx, needSpillLr); + SpillOperandForSpillPost(*spill, regOpnd, phyOpnd, spillIdx, needSpillLr); } ++spillIdx; return &phyOpnd; @@ -2958,7 +2937,7 @@ RegOperand *GraphColorRegAllocator::GetReplaceUseDefOpndForLRA(Insn &insn, const SpillOperandForSpillPre(insn, regOpnd, phyOpnd, spillIdx, needSpillLr); Insn *defSpill = SpillOperand(insn, regOpnd, true, phyOpnd); if (defSpill != nullptr) { - SpillOperandForSpillPost(*defSpill, regOpnd, true, phyOpnd, spillIdx, needSpillLr); + SpillOperandForSpillPost(*defSpill, regOpnd, phyOpnd, spillIdx, needSpillLr); } (void)SpillOperand(insn, regOpnd, false, phyOpnd); ++spillIdx; @@ -3167,20 +3146,20 @@ RegOperand *GraphColorRegAllocator::GetReplaceOpnd(Insn &insn, const Operand &op } bool needCallerSave = regInfo->IsCallerSavePartRegister(regNO, lr->GetSpillSize()); - if ((lr->GetNumCall() > 0) && !isCalleeReg) { + if ((lr->GetNumCall() > 0) && !isCalleeReg && !needCallerSave) { if (isDef) { - needCallerSave |= (NeedCallerSave(insn, *lr, isDef) && lr->GetRematLevel() == kRematOff); + needCallerSave = NeedCallerSave(insn, *lr, isDef) && lr->GetRematLevel() == kRematOff; } else { - needCallerSave |= (!lr->GetProcessed()); + needCallerSave = !lr->GetProcessed(); } } if (lr->IsSpilled() || (isSplitPart && (lr->GetSplitLr()->GetNumCall() != 0)) || needCallerSave || (!isSplitPart && !(lr->IsSpilled()) && lr->GetLiveUnitFromLuMap(insn.GetBB()->GetId())->NeedReload())) { SpillOperandForSpillPre(insn, regOpnd, phyOpnd, spillIdx, needSpillLr); - Insn *spill = SpillOperand(insn, opnd, isDef, phyOpnd); + Insn *spill = SpillOperand(insn, regOpnd, isDef, phyOpnd); if (spill != nullptr) { - SpillOperandForSpillPost(*spill, regOpnd, isDef, phyOpnd, spillIdx, needSpillLr); + SpillOperandForSpillPost(*spill, regOpnd, phyOpnd, spillIdx, needSpillLr); } ++spillIdx; } @@ -3249,8 +3228,8 @@ RegOperand *GraphColorRegAllocator::GetReplaceUseDefOpnd(Insn &insn, const Opera } bool needCallerSave = regInfo->IsCallerSavePartRegister(regNO, lr->GetSpillSize()); - if ((lr->GetNumCall() > 0) && !isCalleeReg) { - needCallerSave |= (NeedCallerSave(insn, *lr, true) && lr->GetRematLevel() == kRematOff); + if ((lr->GetNumCall() > 0) && !isCalleeReg && !needCallerSave) { + needCallerSave = NeedCallerSave(insn, *lr, true) && lr->GetRematLevel() == kRematOff; } if (lr->IsSpilled() || (isSplitPart && (lr->GetSplitLr()->GetNumCall() != 0)) || needCallerSave || @@ -3259,7 +3238,7 @@ RegOperand *GraphColorRegAllocator::GetReplaceUseDefOpnd(Insn &insn, const Opera SpillOperandForSpillPre(insn, regOpnd, phyOpnd, spillIdx, needSpillLr); Insn *defSpill = SpillOperand(insn, opnd, true, phyOpnd); if (defSpill != nullptr) { - SpillOperandForSpillPost(*defSpill, regOpnd, true, phyOpnd, spillIdx, needSpillLr); + SpillOperandForSpillPost(*defSpill, regOpnd, phyOpnd, spillIdx, needSpillLr); } (void)SpillOperand(insn, opnd, false, phyOpnd); ++spillIdx; @@ -4149,7 +4128,7 @@ void GraphColorRegAllocator::OptCallerSave() { } void GraphColorRegAllocator::SplitVregAroundLoop(const LoopDesc &loop, const std::vector &lrs, - BB &headerPred, BB &exitSucc, const std::set &cands) { + BB &storeBB, BB &reloadBB, const std::set &cands) { size_t maxSplitCount = lrs.size() - intCalleeRegSet.size(); maxSplitCount = maxSplitCount > kMaxSplitCount ? kMaxSplitCount : maxSplitCount; uint32 splitCount = 0; @@ -4167,12 +4146,20 @@ void GraphColorRegAllocator::SplitVregAroundLoop(const LoopDesc &loop, const std continue; } bool hasRef = false; - for (auto bbId : loop.GetLoopBBs()) { - LiveUnit *lu = lr->GetLiveUnitFromLuMap(bbId); - if (lu != nullptr && (lu->GetDefNum() != 0 || lu->GetUseNum() != 0)) { - hasRef = true; - break; + + auto checkHasRefInBBs = [&hasRef, &lr](const MapleSet &bbSet) { + for (auto bbId : bbSet) { + auto *lu = lr->GetLiveUnitFromLuMap(bbId); + if (lu != nullptr && (lu->GetDefNum() != 0 || lu->GetUseNum() != 0)) { + hasRef = true; + return; + } } + }; + checkHasRefInBBs(loop.GetLoopBBs()); + // reloadBB is not exitBB, need check lr has ref in exitBB + if (loop.GetExitBBs().count(reloadBB.GetId()) == 0) { + checkHasRefInBBs(loop.GetExitBBs()); } if (!hasRef) { splitCount++; @@ -4181,14 +4168,14 @@ void GraphColorRegAllocator::SplitVregAroundLoop(const LoopDesc &loop, const std RegOperand &phyOpnd = cgFunc->GetOpndBuilder()->CreatePReg(lr->GetAssignedRegNO(), lr->GetSpillSize(), lr->GetRegType()); - auto &headerCom = cgFunc->GetOpndBuilder()->CreateComment("split around loop begin"); - headerPred.AppendInsn(cgFunc->GetInsnBuilder()->BuildCommentInsn(headerCom)); - Insn *last = headerPred.GetLastInsn(); + auto &storeCom = cgFunc->GetOpndBuilder()->CreateComment("split around loop begin"); + storeBB.AppendInsn(cgFunc->GetInsnBuilder()->BuildCommentInsn(storeCom)); + Insn *last = storeBB.GetLastInsn(); (void)SpillOperand(*last, ropnd, true, static_cast(phyOpnd)); - auto &exitCom = cgFunc->GetOpndBuilder()->CreateComment("split around loop end"); - exitSucc.InsertInsnBegin(cgFunc->GetInsnBuilder()->BuildCommentInsn(exitCom)); - Insn *first = exitSucc.GetFirstInsn(); + auto &reloadCom = cgFunc->GetOpndBuilder()->CreateComment("split around loop end"); + reloadBB.InsertInsnBegin(cgFunc->GetInsnBuilder()->BuildCommentInsn(reloadCom)); + Insn *first = reloadBB.GetFirstInsn(); (void)SpillOperand(*first, ropnd, false, static_cast(phyOpnd)); LiveRange *replacedLr = lrMap[*it]; @@ -4315,46 +4302,58 @@ void GraphColorRegAllocator::AnalysisLoop(const LoopDesc &loop) { return; } - std::set loopExitSuccs; - for (auto bbId: loop.GetExitBBs()) { - auto *bb = cgFunc->GetBBFromID(bbId); - for (auto &succ: bb->GetSuccs()) { - if (loop.GetLoopBBs().count(succ->GetId()) != 0) { - continue; - } - if (succ->IsSoloGoto() || succ->IsEmpty()) { - BB *realSucc = CGCFG::GetTargetSuc(*succ); - if (realSucc != nullptr) { - loopExitSuccs.insert(realSucc); - } - } else { - loopExitSuccs.insert(succ); - } - } - } - std::set loopEntra; + BB *storeBB = nullptr; // unique loop entrance, which is used to generate storage insn for (auto &pred: loop.GetHeader().GetPreds()) { if (loop.GetBackEdges().count(pred->GetId()) != 0) { continue; } - loopEntra.insert(pred); - } - if (loopEntra.size() != 1 || loopExitSuccs.size() != 1) { - return; - } - BB *headerPred = *loopEntra.begin(); - if (headerPred->GetKind() != BB::kBBFallthru) { - return; + if (storeBB != nullptr) { + return; + } + storeBB = pred; } - BB *exitSucc = *loopExitSuccs.begin(); - if (exitSucc->GetPreds().size() != loop.GetExitBBs().size()) { + if (storeBB == nullptr || storeBB->GetKind() != BB::kBBFallthru) { return; } - for (auto *pred : exitSucc->GetPreds()) { - if (loop.GetExitBBs().count(pred->GetId()) == 0) { + + // it is used to generate the reload insn. + // 1) when the loop has only one ExitBB, it is the ExitBB. + // 2) when there are multiple ExitBBs in the loop, it is the only common successor of ExitBBs. + BB *reloadBB = nullptr; + if (loop.GetExitBBs().size() == 1) { + reloadBB = cgFunc->GetBBFromID(*loop.GetExitBBs().begin()); + } else { + std::set loopExitSuccs; + for (auto bbId: loop.GetExitBBs()) { + for (auto &succ: cgFunc->GetBBFromID(bbId)->GetSuccs()) { + if (loop.GetLoopBBs().count(succ->GetId()) != 0) { + continue; + } + if (succ->IsSoloGoto() || succ->IsEmpty()) { + BB *realSucc = CGCFG::GetTargetSuc(*succ); + if (realSucc != nullptr) { + loopExitSuccs.insert(realSucc); + } + } else { + loopExitSuccs.insert(succ); + } + } + } + if (loopExitSuccs.size() != 1) { + return; + } + reloadBB = *loopExitSuccs.begin(); + if (reloadBB->GetPreds().size() != loop.GetExitBBs().size()) { return; } + // check reloadBB is the only common successor of ExitBBs + for (auto *pred : reloadBB->GetPreds()) { + if (loop.GetExitBBs().count(pred->GetId()) == 0) { + return; + } + } } + std::set cands; if (!LoopNeedSplit(loop, cands)) { return; @@ -4364,7 +4363,7 @@ void GraphColorRegAllocator::AnalysisLoop(const LoopDesc &loop) { return lr1->GetPriority() < lr2->GetPriority(); }; std::sort(lrs.begin(), lrs.end(), comparator); - SplitVregAroundLoop(loop, lrs, *headerPred, *exitSucc, cands); + SplitVregAroundLoop(loop, lrs, *storeBB, *reloadBB, cands); } void GraphColorRegAllocator::AnalysisLoopPressureAndSplit(const LoopDesc &loop) { diff --git a/src/mapleall/maple_be/src/cg/x86_64/x64_MPIsel.cpp b/src/mapleall/maple_be/src/cg/x86_64/x64_MPIsel.cpp index c3af80cf273911b13cff63a4a8dd09ead080694c..712e5bb61d5028c310167416166778701eeed187 100644 --- a/src/mapleall/maple_be/src/cg/x86_64/x64_MPIsel.cpp +++ b/src/mapleall/maple_be/src/cg/x86_64/x64_MPIsel.cpp @@ -492,8 +492,7 @@ RegOperand *X64MPIsel::PrepareMemcpyParm(uint64 copySize) { return ®Result; } -void X64MPIsel::SelectAggDassign(MirTypeInfo &lhsInfo, MemOperand &symbolMem, Operand &opndRhs, - const DassignNode &stmt) { +void X64MPIsel::SelectAggDassign(MirTypeInfo &lhsInfo, MemOperand &symbolMem, Operand &opndRhs, DassignNode &stmt) { (void)stmt; /* rhs is Func Return, it must be from Regread */ if (opndRhs.IsRegister()) { @@ -763,6 +762,10 @@ void X64MPIsel::SelectIntrinCall(IntrinsiccallNode &intrinsiccallNode) { if (intrinsic == INTRN_C_stack_save || intrinsic == INTRN_C_stack_restore) { return; } + if (intrinsic == INTRN_C_prefetch) { + SelectCprefetch(intrinsiccallNode); + return; + } CHECK_FATAL(false, "Intrinsic %d: %s not implemented by the X64 CG.", intrinsic, GetIntrinsicName(intrinsic)); } @@ -1296,6 +1299,35 @@ Operand *X64MPIsel::SelectCclz(IntrinsicopNode &node, Operand &opnd0, const Base return &destReg; } +void X64MPIsel::SelectCprefetch(IntrinsiccallNode &intrinsiccallNode) { + MOperator mOp = MOP_prefetch; + std::vector intrnOpnds; + auto opndNum = intrinsiccallNode.NumOpnds(); + constexpr int32 opnd0Default = 0; // 0: default value of opnd0 + constexpr int32 opnd1Default = 3; // 3: default value of opnd1 + + CHECK_FATAL(opndNum >= kOperandNumUnary && opndNum <= kOperandNumTernary, "wrong opndnum"); + intrnOpnds.emplace_back(HandleExpr(intrinsiccallNode, *intrinsiccallNode.Opnd(kInsnFirstOpnd))); + if (opndNum == kOperandNumUnary) { + ImmOperand &imm0 = cgFunc->GetOpndBuilder()->CreateImm(GetPrimTypeBitSize(PTY_u32), opnd0Default); + ImmOperand &imm1 = cgFunc->GetOpndBuilder()->CreateImm(GetPrimTypeBitSize(PTY_u32), opnd1Default); + intrnOpnds.emplace_back(&imm0); + intrnOpnds.emplace_back(&imm1); + } + if (opndNum == kOperandNumBinary) { + ImmOperand &imm0 = cgFunc->GetOpndBuilder()->CreateImm(GetPrimTypeBitSize(PTY_u32), opnd1Default); + intrnOpnds.emplace_back(HandleExpr(intrinsiccallNode, *intrinsiccallNode.Opnd(kInsnSecondOpnd))); + intrnOpnds.emplace_back(&imm0); + } + if (opndNum == kOperandNumTernary) { + intrnOpnds.emplace_back(HandleExpr(intrinsiccallNode, *intrinsiccallNode.Opnd(kInsnSecondOpnd))); + intrnOpnds.emplace_back(HandleExpr(intrinsiccallNode, *intrinsiccallNode.Opnd(kInsnThirdOpnd))); + } + + Insn &prefetchInsn = cgFunc->GetInsnBuilder()->BuildInsn(mOp, intrnOpnds); + cgFunc->GetCurBB()->AppendInsn(prefetchInsn); +} + Operand *X64MPIsel::SelectBswap(IntrinsicopNode &node, Operand &opnd0, const BaseNode &parent) { PrimType dtype = node.GetPrimType(); auto bitWidth = GetPrimTypeBitSize(dtype); diff --git a/src/mapleall/maple_be/src/cg/x86_64/x64_cgfunc.cpp b/src/mapleall/maple_be/src/cg/x86_64/x64_cgfunc.cpp index f0233f0138985fcbb2ce8f98d7a7fc94b0bdff74..199bcfbc92f5a7af9c871bafe2426b0465515bf1 100644 --- a/src/mapleall/maple_be/src/cg/x86_64/x64_cgfunc.cpp +++ b/src/mapleall/maple_be/src/cg/x86_64/x64_cgfunc.cpp @@ -20,6 +20,12 @@ namespace maplebe { /* null implementation yet */ +void X64CGFunc::AddPseudoRetInsns(BB &bb) { + CHECK_FATAL(false, "NIY"); +} +void X64CGFunc::AddPseudoRetInsnsInExitBBs() { + CHECK_FATAL(false, "NIY"); +} void X64CGFunc::GenSaveMethodInfoCode(BB &bb) { CHECK_FATAL(false, "NIY"); } @@ -73,7 +79,7 @@ void X64CGFunc::SelectAssertNull(UnaryStmtNode &stmt) { void X64CGFunc::SelectAsm(AsmNode &node) { CHECK_FATAL(false, "NIY"); } -void X64CGFunc::SelectAggDassign(const DassignNode &stmt) { +void X64CGFunc::SelectAggDassign(DassignNode &stmt) { CHECK_FATAL(false, "NIY"); } void X64CGFunc::SelectIassign(IassignNode &stmt) { @@ -172,6 +178,12 @@ Operand *X64CGFunc::SelectCSyncLockTestSet(IntrinsicopNode &intrinopNode, PrimTy CHECK_FATAL(false, "NIY"); return nullptr; } +void X64CGFunc::SelectCprefetch(IntrinsiccallNode &intrinsiccallNode) { + CHECK_FATAL(false, "NIY"); +} +void X64CGFunc::SelectCclearCache(IntrinsiccallNode &intrinsiccallNode) { + CHECK_FATAL(false, "NIY"); +} Operand *X64CGFunc::SelectBswap(IntrinsicopNode &node, Operand &opnd0, const BaseNode &parent) { CHECK_FATAL(false, "NIY"); return nullptr; @@ -200,6 +212,10 @@ Operand *X64CGFunc::SelectCReturnAddress(IntrinsicopNode &intrinopNode) { CHECK_FATAL(false, "NIY"); return nullptr; } +Operand *X64CGFunc::SelectCAllocaWithAlign(IntrinsicopNode &intrinsicopNode) { + CHECK_FATAL(false, "NIY"); + return nullptr; +} void X64CGFunc::SelectCAtomicExchange(const IntrinsiccallNode &intrinsiccallNode) { CHECK_FATAL(false, "NIY"); } diff --git a/src/mapleall/maple_be/src/cg/x86_64/x64_emitter.cpp b/src/mapleall/maple_be/src/cg/x86_64/x64_emitter.cpp index 2cd4ecc6893d7b39246301c1b60ea693c0bce80d..7638dbe2148c66b97d3e35791f11af64b621a344 100644 --- a/src/mapleall/maple_be/src/cg/x86_64/x64_emitter.cpp +++ b/src/mapleall/maple_be/src/cg/x86_64/x64_emitter.cpp @@ -175,9 +175,19 @@ void X64OpndEmitVisitor::Visit(maplebe::OfstOperand *v) { CHECK_FATAL(false, "do not run here"); } -void DumpTargetASM(Emitter &emitter, Insn &insn) { +void X64Emitter::DumpTargetASM(Emitter &emitter, Insn &insn) { emitter.Emit("\t"); - const InsnDesc &curMd = X64CG::kMd[insn.GetMachineOpcode()]; + MOperator mOp = insn.GetMachineOpcode(); + const InsnDesc &curMd = X64CG::kMd[mOp]; + + switch (mOp) { + case MOP_prefetch: { + EmitPrefetch(emitter, insn); + return; + } + default: + break; + } /* Get Operands Number */ size_t size = 0; @@ -270,6 +280,25 @@ void EmitJmpTable(Emitter &emitter, CGFunc &cgFunc) { } } +void X64Emitter::EmitPrefetch(Emitter &emitter, const Insn &insn) const { + constexpr int32 rwLimit = 2; // 2: the value of opnd1 cannot exceed 2 + constexpr int32 localityLimit = 4; // 4: the value of opnd2 cannot exceed 4 + static const std::string PRFOP[rwLimit][localityLimit] = {{"prefetchnta", "prefetcht2", "prefetcht1", "prefetcht0"}, + {"prefetchnta", "prefetcht2", "prefetcht1", "prefetcht0"}}; + const InsnDesc *md = &X64CG::kMd[insn.GetMachineOpcode()]; + auto *addr = &insn.GetOperand(kInsnFirstOpnd); + auto *rw = &insn.GetOperand(kInsnSecondOpnd); + auto *locality = &insn.GetOperand(kInsnThirdOpnd); + X64OpndEmitVisitor addrVisitor(emitter, md->opndMD[kInsnFirstOpnd]); + int64 rwConstVal = static_cast(rw)->GetValue(); + int64 localityConstVal = static_cast(locality)->GetValue(); + CHECK_FATAL((rwConstVal < rwLimit) && (rwConstVal >= 0) && + (localityConstVal < localityLimit) && (localityConstVal >= 0), "wrong opnd"); + (void)emitter.Emit(PRFOP[rwConstVal][localityConstVal]).Emit("\t("); + addr->Accept(addrVisitor); + (void)emitter.Emit(")\n"); +} + void X64Emitter::Run(FuncEmitInfo &funcEmitInfo) { CGFunc &cgFunc = funcEmitInfo.GetCGFunc(); X64CGFunc &x64CGFunc = static_cast(cgFunc); diff --git a/src/mapleall/maple_be/src/cg/x86_64/x64_optimize_common.cpp b/src/mapleall/maple_be/src/cg/x86_64/x64_optimize_common.cpp index 975ef4de6f10c03289db6fe67f43819166258f38..162d046ae958f8e0ca724ac546c6c117b1a1f997 100644 --- a/src/mapleall/maple_be/src/cg/x86_64/x64_optimize_common.cpp +++ b/src/mapleall/maple_be/src/cg/x86_64/x64_optimize_common.cpp @@ -101,6 +101,10 @@ bool X64InsnVisitor::IsCompareAndBranchInsn(const Insn &insn) const { return false; } +bool X64InsnVisitor::IsTestAndBranchInsn(const Insn &insn) const { + return false; +} + bool X64InsnVisitor::IsAddOrSubInsn(const Insn &insn) const { switch (insn.GetMachineOpcode()) { case x64::MOP_addb_r_r: diff --git a/src/mapleall/maple_be/src/cg/x86_64/x64_reaching.cpp b/src/mapleall/maple_be/src/cg/x86_64/x64_reaching.cpp index ba9d9dbb9793f1357d10517a76db6daab5749cf6..fbadca164a5fae046c1547aede15361ab7e50c9b 100644 --- a/src/mapleall/maple_be/src/cg/x86_64/x64_reaching.cpp +++ b/src/mapleall/maple_be/src/cg/x86_64/x64_reaching.cpp @@ -183,11 +183,6 @@ bool X64ReachingDefinition::KilledByCallBetweenInsnInSameBB(const Insn &startIns return false; } -void X64ReachingDefinition::AddRetPseudoInsn(BB &bb) { - CHECK_FATAL(false, "x64_reaching analysis not implemented yet!"); - return; -} - bool X64ReachingDefinition::IsCallerSavedReg(uint32 regNO) const { CHECK_FATAL(false, "x64_reaching analysis not implemented yet!"); return false; @@ -220,11 +215,6 @@ int32 X64ReachingDefinition::GetStackSize() const { return 0; }; -void X64ReachingDefinition::AddRetPseudoInsns() { - CHECK_FATAL(false, "x64_reaching analysis not implemented yet!"); - return; -}; - /* reg killed killed by call insn */ bool X64ReachingDefinition::IsRegKilledByCallInsn(const Insn &insn, regno_t regNO) const { return x64::IsCallerSaveReg((X64reg)regNO); diff --git a/src/mapleall/maple_driver/BUILD.gn b/src/mapleall/maple_driver/BUILD.gn index 43d4319f40694eb5c4c9df0c515495628cbc7232..7e670db7c57b32d3637f39429554a44f0bf6a32f 100644 --- a/src/mapleall/maple_driver/BUILD.gn +++ b/src/mapleall/maple_driver/BUILD.gn @@ -92,7 +92,14 @@ static_library("libmaple_driver") { } static_library("libdriver_option") { - sources = [ "src/driver_options.cpp" ] + sources = [ + "src/driver_options.cpp", + "src/unsupport_bool.cpp", + "src/unsupport_bool2.cpp", + "src/unsupport_bool3.cpp", + "src/unsupport_string.cpp", + "src/warning_option.cpp", + ] include_dirs = [ "${MAPLEALL_ROOT}/maple_driver/include", "${MAPLEALL_ROOT}/maple_util/include" diff --git a/src/mapleall/maple_driver/CMakeLists.txt b/src/mapleall/maple_driver/CMakeLists.txt index bc015d45e7f7f72a01f743f1cf6856407f484a1c..33ebbed56959015fa84d2bff05f405f73451844d 100755 --- a/src/mapleall/maple_driver/CMakeLists.txt +++ b/src/mapleall/maple_driver/CMakeLists.txt @@ -85,6 +85,11 @@ set_target_properties(libmaple_driver PROPERTIES ) set(src_libdriver_option + src/unsupport_bool.cpp + src/unsupport_bool2.cpp + src/unsupport_bool3.cpp + src/unsupport_string.cpp + src/warning_option.cpp src/driver_options.cpp ) diff --git a/src/mapleall/maple_driver/include/driver_options.h b/src/mapleall/maple_driver/include/driver_options.h index 295ccbdcdeb5a1be1d6cebf5d89c4cccc3d47957..663278e42b2f0c681d33638e4309e89652492fe1 100644 --- a/src/mapleall/maple_driver/include/driver_options.h +++ b/src/mapleall/maple_driver/include/driver_options.h @@ -37,6 +37,20 @@ static maplecl::OptionCategory &unSupCategory = maplecl::CommandLine::GetCommand namespace opts { +constexpr maplecl::OptType kOptNone = maplecl::OptType::KOptNone; +constexpr maplecl::OptType kOptDriver = maplecl::OptType::KOptDriver; +constexpr maplecl::OptType kOptCommon = maplecl::OptType::KOptCommon; +constexpr maplecl::OptType kOptFront = maplecl::OptType::KOptFront; +constexpr maplecl::OptType kOptOptimization = maplecl::OptType::KOptOptimization; +constexpr maplecl::OptType kOptLd = maplecl::OptType::KOptLd; +constexpr maplecl::OptType kOptAs = maplecl::OptType::KOptAs; +constexpr maplecl::OptType kOptHir2mpl = maplecl::OptType::KOptHir2mpl; +constexpr maplecl::OptType kOptMe = maplecl::OptType::KOptMe; +constexpr maplecl::OptType kOptMpl2mpl = maplecl::OptType::KOptMpl2mpl; +constexpr maplecl::OptType kOptAsOptMplcg = maplecl::OptType::KOptMplcg; +constexpr maplecl::OptType kOptMaple = maplecl::OptType::KOptMaple; +constexpr maplecl::OptType kOptNotFiltering = maplecl::OptType::KOptNotFiltering; + /* ##################### BOOL Options ############################################################### */ extern maplecl::Option version; @@ -48,7 +62,6 @@ extern maplecl::Option o3; extern maplecl::Option os; extern maplecl::Option verify; extern maplecl::Option decoupleStatic; -extern maplecl::Option bigEndian; extern maplecl::Option gcOnly; extern maplecl::Option timePhase; extern maplecl::Option genMeMpl; @@ -115,12 +128,13 @@ extern maplecl::Option wpaa; extern maplecl::Option fm; extern maplecl::Option dumpTime; extern maplecl::Option aggressiveTlsLocalDynamicOpt; +extern maplecl::Option aggressiveTlsLocalDynamicOptMultiThread; +extern maplecl::Option aggressiveTlsSafeAnchor; extern maplecl::Option oDumpversion; extern maplecl::Option oWnounusedcommandlineargument; extern maplecl::Option oWnoconstantconversion; extern maplecl::Option oWnounknownwarningoption; extern maplecl::Option oW; -extern maplecl::Option oWabi; extern maplecl::Option oWabiTag; extern maplecl::Option oWaddrSpaceConvert; extern maplecl::Option oWaddress; @@ -726,13 +740,11 @@ extern maplecl::Option oFssaPhiopt; extern maplecl::Option oFssoStruct; extern maplecl::Option oFstackCheck; extern maplecl::Option oFstackProtector; -extern maplecl::Option oFstackProtectorAll; extern maplecl::Option oFstackProtectorExplicit; extern maplecl::Option oFstackUsage; extern maplecl::Option oFstats; extern maplecl::Option oFstdargOpt; extern maplecl::Option oFstoreMerging; -extern maplecl::Option oFstrictAliasing; extern maplecl::Option oFstrictEnums; extern maplecl::Option oFstrictOverflow; extern maplecl::Option oFstrictVolatileBitfields; @@ -1482,7 +1494,6 @@ extern maplecl::Option oMprologueEpilogue; extern maplecl::Option oMprototype; extern maplecl::Option oMpureCode; extern maplecl::Option oMpushArgs; -extern maplecl::Option oMQ; extern maplecl::Option oMqClass; extern maplecl::Option oMquadMemory; extern maplecl::Option oMquadMemoryAtomic; @@ -1870,6 +1881,13 @@ extern maplecl::Option tlsAggressiveOpt; extern maplecl::Option staticLibmplpgo; extern maplecl::Option oFnoExtendedIdentifiers; extern maplecl::Option oFnoPchPreprocess; +extern maplecl::Option fpie; +extern maplecl::Option fpic; +extern maplecl::Option fPIE; +extern maplecl::Option fPIC; +extern maplecl::Option ignoreUnsupOpt; +extern maplecl::Option exportMpltInline; +extern maplecl::Option importMpltInline; /* ##################### STRING Options ############################################################### */ @@ -2071,6 +2089,10 @@ extern maplecl::Option functionReorderAlgorithm; extern maplecl::Option functionReorderProfile; extern maplecl::Option oA; extern maplecl::Option oWeakReferenceMismatches; +extern maplecl::Option rootPath; +extern maplecl::Option aggressiveTlsWarmupFunction; +extern maplecl::Option oMQ; +extern maplecl::Option inlineMpltDir; /* ##################### DIGITAL Options ############################################################### */ diff --git a/src/mapleall/maple_driver/include/mpl_options.h b/src/mapleall/maple_driver/include/mpl_options.h index d8b45765b47147b7acdaa52366b2bcff42f4c27e..cf808276af34ff1cc803940524f86f73561a005a 100644 --- a/src/mapleall/maple_driver/include/mpl_options.h +++ b/src/mapleall/maple_driver/include/mpl_options.h @@ -63,7 +63,7 @@ class InputInfo { inputFolder = FileUtils::GetFileFolder(inputFile); outputFolder = (inputFileType == InputFileType::kFileTypeDex || inputFileType == InputFileType::kFileTypeClass || inputFileType == InputFileType::kFileTypeCpp || inputFileType == InputFileType::kFileTypeJar) ? inputFolder : - opts::saveTempOpt.IsEnabledByUser() ? FileUtils::GetOutPutDir() : FileUtils::GetInstance().GetTmpFolder(); + opts::saveTempOpt.IsEnabledByUser() ? FileUtils::GetOutPutDir() : FileUtils::GetOutPutDirInTmp(inputFile); outputName = FileUtils::GetFileName(inputFile, false); fullOutput = outputFolder + outputName; } @@ -109,6 +109,10 @@ class InputInfo { return fullOutput; } + const void SetInputFileType(InputFileType type) { + inputFileType = type; + } + private: std::string inputFile = ""; InputFileType inputFileType = InputFileType::kFileTypeNone; @@ -137,6 +141,8 @@ class Action { for (auto &inAction : inActions) { if (inAction->GetInputFileType() == InputFileType::kFileTypeObj) { linkInputFiles.push_back(inAction->GetInputFolder() + inAction->GetOutputName() + ".o"); + } else if (inAction->GetInputFileType() == InputFileType::kFileTypeNone) { + linkInputFiles.push_back(inAction->GetInputFile()); } else { linkInputFiles.push_back(inAction->GetOutputFolder() + inAction->GetOutputName() + ".o"); } @@ -331,6 +337,14 @@ class MplOptions { return isAllAst; } + bool GetIsLto() const { + return isLto; + } + + const std::string &GetOptString() const { + return optString; + } + maplecl::OptionCategory *GetCategory(const std::string &tool) const; ErrorCode AppendCombOptions(MIRSrcLang srcLang); ErrorCode AppendMplcgOptions(MIRSrcLang srcLang); @@ -345,9 +359,18 @@ class MplOptions { private: ErrorCode CheckInputFiles(); + ErrorCode CheckStaticLib(); + ErrorCode InitInputFiles(const std::string &filename); ErrorCode HandleOptions(); + ErrorCode LtoWriteOptions(); + ErrorCode LtoMergeOptions(int &argc, char **argv, char ***argv1, bool &isNeedParse); + ErrorCode MergeOptions(std::vector> optVec, std::vector &finalOptVec) const; + void LtoWritePicPie(const std::string &optName, std::string <oOptString, bool &pic, bool &pie) const; + void AddOptions(int argc, char **argv, std::vector &finalOptVec) const; void HandleSafeOptions(); void HandleExtraOptions(); + void EarlyHandlePicPie() const; + void WarnUnsupportOptions() const; ErrorCode HandleEarlyOptions() const; ErrorCode HandleOptimizationLevelOptions(); ErrorCode DecideRunningPhases(); @@ -384,6 +407,8 @@ class MplOptions { bool hasPrinted = false; bool generalRegOnly = false; bool isAllAst = false; + bool isLto = false; + std::string optString = ""; SafetyCheckMode npeCheckMode = SafetyCheckMode::kNoCheck; SafetyCheckMode boundaryCheckMode = SafetyCheckMode::kNoCheck; diff --git a/src/mapleall/maple_driver/include/parse_spec.h b/src/mapleall/maple_driver/include/parse_spec.h index e54e62081e586376e00a1922d0e9a1670c5ee54a..87cadeea0c127dbf6590045e1490d5204c817d10 100644 --- a/src/mapleall/maple_driver/include/parse_spec.h +++ b/src/mapleall/maple_driver/include/parse_spec.h @@ -23,7 +23,7 @@ class ParseSpec { ParseSpec() {} ~ParseSpec() = default; - static std::vector GetOpt(const std::string &cmd, const std::string &args); + static std::vector GetOpt(const std::vector args); static ErrorCode GetOptFromSpecsByGcc(int argc, char **argv, const MplOptions &mplOptions); }; diff --git a/src/mapleall/maple_driver/include/safe_exe.h b/src/mapleall/maple_driver/include/safe_exe.h index 026a95214bb53bcd80210d2f54a9b390d5070203..7c45d01fcccbaa030094a754320893198eff1061 100644 --- a/src/mapleall/maple_driver/include/safe_exe.h +++ b/src/mapleall/maple_driver/include/safe_exe.h @@ -92,8 +92,8 @@ class SafeExe { return ret; } - static ErrorCode HandleCommand(const std::string &cmd, const std::string &args, std::string &result) { - std::vector vectorArgs = ParseArgsVector(cmd, args); + static ErrorCode HandleCommand(const std::vector vectorArgs, const std::string &cmd, + std::string &result) { // extra space for exe name and args char **argv = new char *[vectorArgs.size() + 1]; // argv[0] is program name @@ -118,7 +118,7 @@ class SafeExe { fflush(nullptr); (void)close(pipefd[0]); (void)dup2(pipefd[1], STDERR_FILENO); - if (execv(cmd.c_str(), argv) < 0) { + if (execv(vectorArgs[0].c_str(), argv) < 0) { for (size_t j = 0; j < vectorArgs.size(); ++j) { delete [] argv[j]; } @@ -144,7 +144,7 @@ class SafeExe { waitpid(pid, &status, 0); auto exitStatus = static_cast(status); if (!WIFEXITED(exitStatus) || WEXITSTATUS(exitStatus) != 0) { - LogInfo::MapleLogger() << "Error while Exe, cmd: " << cmd << " args: " << args << '\n'; + LogInfo::MapleLogger() << "Error while Exe, cmd: " << cmd << '\n'; ret = kErrorCompileFail; } } @@ -341,15 +341,19 @@ class SafeExe { return ret; } - static ErrorCode Exe(const std::string &cmd, const std::string &args, std::string &result) { + static ErrorCode Exe(const std::vector args, std::string &result) { + std::string cmd = ""; + for (auto opt : args) { + cmd += opt + " "; + } if (opts::debug) { - LogInfo::MapleLogger() << "Starting:" << cmd << " " << args << '\n'; + LogInfo::MapleLogger() << "Starting:" << cmd << '\n'; } - if (StringUtils::HasCommandInjectionChar(cmd) || StringUtils::HasCommandInjectionChar(args)) { - LogInfo::MapleLogger() << "Error while Exe, cmd: " << cmd << " args: " << args << '\n'; + if (StringUtils::HasCommandInjectionChar(cmd)) { + LogInfo::MapleLogger() << "Error while Exe, cmd: " << cmd << '\n'; return kErrorCompileFail; } - ErrorCode ret = HandleCommand(cmd, args, result); + ErrorCode ret = HandleCommand(args, cmd, result); return ret; } diff --git a/src/mapleall/maple_driver/src/clang_compiler.cpp b/src/mapleall/maple_driver/src/clang_compiler.cpp index d13d1fce16d0d3cfae7c53158231fbec53f6b725..44f368f0b2ed7917261a3c9f38a3a7bbb4706eb6 100644 --- a/src/mapleall/maple_driver/src/clang_compiler.cpp +++ b/src/mapleall/maple_driver/src/clang_compiler.cpp @@ -120,6 +120,9 @@ static uint32_t FillSpecialDefaulOpt(std::unique_ptr &opt, if (opts::oMD.IsEnabledByUser() && (opts::compileWOLink.IsEnabledByUser() || opts::onlyCompile.IsEnabledByUser())) { additionalLen += 1; } + if (options.GetIsLto()) { + additionalLen += 1; + } opt = std::make_unique(additionalLen); auto setMplOption = [&opt](const std::string &key, const std::string &value, uint32_t index) { @@ -154,7 +157,10 @@ static uint32_t FillSpecialDefaulOpt(std::unique_ptr &opt, } else { setMplOption("-o", "./" + action.GetOutputName() + ".o", index++); } - setMplOption("-emit-ast", "", index); + setMplOption("-emit-ast", "", index++); + } + if (options.GetIsLto()) { + setMplOption("-opt-string=" + options.GetOptString(), "", index); } return additionalLen; diff --git a/src/mapleall/maple_driver/src/compiler.cpp b/src/mapleall/maple_driver/src/compiler.cpp index 8da04615048e3d5e6c2b95026b062520f8468d65..f182ecda9055242798923b576155bd584bc6a944 100644 --- a/src/mapleall/maple_driver/src/compiler.cpp +++ b/src/mapleall/maple_driver/src/compiler.cpp @@ -126,11 +126,14 @@ void Compiler::AppendExtraOptions(std::vector &finalOptions, const Mp if (toolName == "maplecombwrp" && (opt->GetName() == "-o")) { continue; } + if (binName == kLdFlag) { + continue; + } for (const auto &val : opt->GetRawValues()) { std::string optName = ""; if (opt->GetEqualType() == maplecl::EqualType::kWithEqual) { - optName = StringUtils::GetStrBeforeFirst(opt->rawKey, "=", true) == opt->GetName() ? opt->GetName() : - StringUtils::GetStrBeforeLast(opt->rawKey, "=", true); + optName = StringUtils::GetStrBeforeFirst(opt->rawKey, "=") == opt->GetName() ? opt->GetName() : + StringUtils::GetStrBeforeLast(opt->rawKey, "="); (void)finalOptions.emplace_back(optName + "=" + val, ""); } else { optName = opt->GetName(); diff --git a/src/mapleall/maple_driver/src/cpp2mpl_compiler.cpp b/src/mapleall/maple_driver/src/cpp2mpl_compiler.cpp index 189e5ea6fd7ce669a726ec10d3a21c96692afc2b..391f5e0905b64a534966459ea43424b270bb8228 100644 --- a/src/mapleall/maple_driver/src/cpp2mpl_compiler.cpp +++ b/src/mapleall/maple_driver/src/cpp2mpl_compiler.cpp @@ -44,8 +44,8 @@ bool IsUseNpeOption() { DefaultOption Cpp2MplCompiler::GetDefaultOptions(const MplOptions &options, const Action &action [[maybe_unused]]) const { uint32_t len = sizeof(kCpp2MplDefaultOptionsForAst) / sizeof(MplOption); - // 1 for option -p - uint32_t length = len + 1; + // 2 for option -p and -rootPath + uint32_t length = len + 2; if (options.GetIsAllAst()) { length += options.GetHirInputFiles().size(); @@ -86,6 +86,12 @@ DefaultOption Cpp2MplCompiler::GetDefaultOptions(const MplOptions &options, defaultOptions.mplOptions[len].SetKey("--output"); defaultOptions.mplOptions[len++].SetValue(action.GetOutputFolder()); + defaultOptions.mplOptions[len].SetKey("-rootPath"); + if (opts::saveTempOpt.IsEnabledByUser()) { + defaultOptions.mplOptions[len++].SetValue("./"); + } else { + defaultOptions.mplOptions[len++].SetValue(FileUtils::GetInstance().GetTmpFolder()); + } if (IsUseBoundaryOption()) { defaultOptions.mplOptions[len].SetKey("--boundary-check-dynamic"); defaultOptions.mplOptions[len].SetValue(""); diff --git a/src/mapleall/maple_driver/src/driver_options.cpp b/src/mapleall/maple_driver/src/driver_options.cpp index 8f6f77840feec011781eff29e44b9f6df38b5eba..d1ad25f7675f0fceb8263f63260df79b49d08635 100644 --- a/src/mapleall/maple_driver/src/driver_options.cpp +++ b/src/mapleall/maple_driver/src/driver_options.cpp @@ -20,554 +20,340 @@ namespace opts { /* ##################### BOOL Options ############################################################### */ -maplecl::Option version({"--version", "-v"}, - " --version [command] \tPrint version and exit.\n", - {driverCategory}); - maplecl::Option ignoreUnkOpt({"--ignore-unknown-options"}, " --ignore-unknown-options \tIgnore unknown compilation options\n", - {driverCategory}); + {driverCategory}, kOptDriver | kOptMaple); + +maplecl::Option ignoreUnsupOpt({"--ignore-unsupport-option"}, + " --ignore-unsupport-option \tIgnore unsupport compilation options\n", + {driverCategory, meCategory, mpl2mplCategory, cgCategory}, kOptDriver | kOptMaple); maplecl::Option o0({"-O0", "--O0"}, " -O0 \tNo optimization. (Default)\n", - {driverCategory}); + {driverCategory}, kOptCommon | kOptOptimization); maplecl::Option o1({"-O1", "--O1"}, " -O1 \tDo some optimization.\n", - {driverCategory}, maplecl::kHide); + {driverCategory}, kOptCommon | kOptOptimization, maplecl::kHide); maplecl::Option o2({"-O2", "--O2"}, " -O2 \tDo more optimization.\n", - {driverCategory, hir2mplCategory}); + {driverCategory, hir2mplCategory}, kOptCommon | kOptOptimization); maplecl::Option o3({"-O3", "--O3"}, " -O3 \tDo more optimization.\n", - {driverCategory}, maplecl::kHide); + {driverCategory}, kOptCommon | kOptOptimization, maplecl::kHide); maplecl::Option os({"-Os", "--Os"}, " -Os \tOptimize for size, based on O2.\n", - {driverCategory}); + {driverCategory}, kOptCommon | kOptOptimization); maplecl::Option verify({"--verify"}, " --verify \tVerify mpl file\n", - {driverCategory, dex2mplCategory, mpl2mplCategory}); + {driverCategory, dex2mplCategory, mpl2mplCategory}, kOptMaple); maplecl::Option decoupleStatic({"--decouple-static", "-decouple-static"}, " --decouple-static \tDecouple the static method and field.\n" " --no-decouple-static \tDon't decouple the static method and field.\n", {driverCategory, dex2mplCategory, meCategory, mpl2mplCategory}, - maplecl::DisableWith("--no-decouple-static"), maplecl::kHide); + maplecl::DisableWith("--no-decouple-static"), kOptMaple, maplecl::kHide); maplecl::Option gcOnly({"--gconly", "-gconly"}, " --gconly \tMake gconly is enable.\n" " --no-gconly \tDon't make gconly is enable.\n", {driverCategory, dex2mplCategory, meCategory, mpl2mplCategory, cgCategory}, - maplecl::DisableWith("--no-gconly"), maplecl::kHide); + maplecl::DisableWith("--no-gconly"), kOptMaple, maplecl::kHide); -maplecl::Option timePhase({"--time-phases", "-time-phases"}, - " --time-phases \tTiming phases and print percentages.\n", - {driverCategory}); +maplecl::Option timePhase({"-time-phases"}, + " -time-phases \tTiming phases and print percentages.\n", + {driverCategory}, kOptMaple); maplecl::Option genMeMpl({"--genmempl"}, " --genmempl \tGenerate me.mpl file.\n", - {driverCategory}, maplecl::kHide); + {driverCategory}, kOptMaple, maplecl::kHide); maplecl::Option compileWOLink({"-c"}, " -c \tCompile the source files without linking.\n", - {driverCategory}); + {driverCategory}, kOptDriver); maplecl::Option genVtable({"--genVtableImpl"}, " --genVtableImpl \tGenerate VtableImpl.mpl file.\n", - {driverCategory}, maplecl::kHide); + {driverCategory}, kOptMaple, maplecl::kHide); -maplecl::Option verbose({"-verbose"}, +maplecl::Option verbose({"--verbose", "-verbose"}, " -verbose \tPrint informations.\n", - {driverCategory, jbc2mplCategory, hir2mplCategory, meCategory, mpl2mplCategory, cgCategory}); + {driverCategory, jbc2mplCategory, hir2mplCategory, meCategory, mpl2mplCategory, cgCategory}, + kOptDriver | kOptCommon); maplecl::Option debug({"--debug"}, " --debug \tPrint debug info.\n", - {driverCategory}); + {driverCategory}, kOptCommon); + +maplecl::Option withDwarf({"-g", "-g1", "-g2", "-g3"}, + " -g \tPrint debug info.\n", + {driverCategory, hir2mplCategory}, kOptCommon); -maplecl::Option withDwarf({"-g"}, - " --debug \tPrint debug info.\n", - {driverCategory, hir2mplCategory}); maplecl::Option noOptO0({"-no-opt-O0"}, " -no-opt-O0 \tDonot do O0 opt which will interference debug.\n", - {driverCategory}); + {driverCategory}, kOptMaple); maplecl::Option withIpa({"--with-ipa"}, " --with-ipa \tRun IPA when building.\n" " --no-with-ipa \n", - {driverCategory}, maplecl::DisableWith("--no-with-ipa")); + {driverCategory}, kOptMaple, maplecl::DisableWith("--no-with-ipa")); maplecl::Option npeNoCheck({"--no-npe-check"}, " --no-npe-check \tDisable null pointer check (Default).\n", - {driverCategory}); + {driverCategory}, kOptMaple); maplecl::Option npeStaticCheck({"--npe-check-static"}, " --npe-check-static \tEnable null pointer static check only.\n", - {driverCategory}); + {driverCategory}, kOptMaple); maplecl::Option npeDynamicCheck({"--npe-check-dynamic", "-npe-check-dynamic"}, " --npe-check-dynamic \tEnable null pointer dynamic check with static warning.\n", - {driverCategory, hir2mplCategory}); + {driverCategory, hir2mplCategory}, kOptMaple); maplecl::Option npeDynamicCheckSilent({"--npe-check-dynamic-silent"}, " --npe-check-dynamic-silent \tEnable null pointer dynamic without static warning.\n", - {driverCategory}); + {driverCategory}, kOptMaple); maplecl::Option npeDynamicCheckAll({"--npe-check-dynamic-all"}, " --npe-check-dynamic-all \tKeep dynamic check before dereference, used with --npe-check-dynamic* options\n", - {driverCategory}); + {driverCategory}, kOptMaple); maplecl::Option boundaryNoCheck({"--no-boundary-check"}, " --no-boundary-check \tDisable boundary check (Default).\n", - {driverCategory}); + {driverCategory}, kOptMaple); maplecl::Option boundaryStaticCheck({"--boundary-check-static"}, " --boundary-check-static \tEnable boundary static check.\n", - {driverCategory}); + {driverCategory}, kOptMaple); maplecl::Option boundaryDynamicCheck({"--boundary-check-dynamic", "-boundary-check-dynamic"}, " --boundary-check-dynamic \tEnable boundary dynamic check with static warning.\n", - {driverCategory, hir2mplCategory}); + {driverCategory, hir2mplCategory}, kOptMaple); maplecl::Option boundaryDynamicCheckSilent({"--boundary-check-dynamic-silent"}, " --boundary-check-dynamic-silent\n" " \tEnable boundary dynamic check without static warning\n", - {driverCategory}); + {driverCategory}, kOptMaple); maplecl::Option safeRegionOption({"--safe-region", "-safe-region"}, " --safe-region \tEnable safe region.\n", - {driverCategory, hir2mplCategory}); + {driverCategory, hir2mplCategory}, kOptMaple); maplecl::Option enableArithCheck({"--boundary-arith-check"}, " --boundary-arith-check \tEnable pointer arithmetic check.\n", - {driverCategory}); + {driverCategory}, kOptMaple); maplecl::Option enableCallFflush({"--boudary-dynamic-call-fflush"}, " --boudary-dynamic-call-fflush\tEnable call fflush function to flush boundary-dynamic-check error " "message to the STDOUT\n", - {driverCategory}); + {driverCategory}, kOptMaple); maplecl::Option onlyCompile({"-S"}, " -S \tOnly run preprocess and compilation steps.\n", - {driverCategory}); + {driverCategory}, kOptDriver); maplecl::Option printDriverPhases({"--print-driver-phases"}, " --print-driver-phases \tPrint Driver Phases.\n", - {driverCategory}); + {driverCategory}, kOptMaple, maplecl::kHide); maplecl::Option ldStatic({"-static", "--static"}, " -static \tForce the linker to link a program statically.\n", - {driverCategory, ldCategory}); + {driverCategory, ldCategory}, kOptDriver | kOptLd); maplecl::Option maplePhase({"--maple-phase"}, " --maple-phase \tRun maple phase only\n --no-maple-phase\n", - {driverCategory}, maplecl::DisableWith("--maple-toolchain"), maplecl::Init(true)); + {driverCategory}, kOptMaple, maplecl::DisableWith("--maple-toolchain"), maplecl::Init(true)); maplecl::Option genMapleBC({"--genmaplebc"}, " --genmaplebc \tGenerate .mbc file.\n", - {driverCategory}); + {driverCategory}, kOptMaple, maplecl::kHide); maplecl::Option genLMBC({"--genlmbc"}, " --genlmbc \tGenerate .lmbc file.\n", - {driverCategory, mpl2mplCategory}, maplecl::kHide); + {driverCategory, mpl2mplCategory}, kOptMaple, maplecl::kHide); maplecl::Option profileGen({"--profileGen"}, " --profileGen \tGenerate profile data for static languages.\n", - {driverCategory, meCategory, mpl2mplCategory, cgCategory}, maplecl::kHide); + {driverCategory, meCategory, mpl2mplCategory, cgCategory}, kOptMaple, maplecl::kHide); maplecl::Option profileUse({"--profileUse"}, " --profileUse \tOptimize static languages with profile data.\n", - {driverCategory, mpl2mplCategory}); + {driverCategory, mpl2mplCategory}, kOptMaple, maplecl::kHide); maplecl::Option missingProfDataIsError({"--missing-profdata-is-error"}, " --missing-profdata-is-error \tTreat missing profile data file as error.\n" " --no-missing-profdata-is-error\n" " \tOnly warn on missing profile data file.\n", - {driverCategory}, maplecl::DisableWith("--no-missing-profdata-is-error"), maplecl::Init(true)); + {driverCategory}, kOptMaple, maplecl::DisableWith("--no-missing-profdata-is-error"), maplecl::Init(true), + maplecl::kHide); -maplecl::Option stackProtectorStrong({"--stack-protector-strong", "-fstack-protector-strong"}, - " --stack-protector-strong \tAdd stack guard for some function.\n", - {driverCategory, meCategory, cgCategory}); +maplecl::Option stackProtectorStrong({"-fstack-protector-strong", "--stack-protector-strong"}, + " -fstack-protector-strong \tAdd stack guard for some function.\n", + {driverCategory, meCategory, cgCategory}, kOptCommon | kOptOptimization); -maplecl::Option stackProtectorAll({"--stack-protector-all"}, - " --stack-protector-all \tAdd stack guard for all functions.\n", - {driverCategory, meCategory, cgCategory}); +maplecl::Option stackProtectorAll({"-fstack-protector-all", "--stack-protector-all"}, + " -fstack-protector-all \tAdd stack guard for all functions.\n", + {driverCategory, meCategory, cgCategory}, kOptCommon | kOptOptimization, + maplecl::DisableWith("-fno-stack-protector-all")); maplecl::Option inlineAsWeak({"-inline-as-weak", "--inline-as-weak"}, " --inline-as-weak \tSet inline functions as weak symbols as it's in C++\n", - {driverCategory, hir2mplCategory}); + {driverCategory, hir2mplCategory}, kOptMaple); maplecl::Option legalizeNumericTypes({"--legalize-numeric-types"}, " --legalize-numeric-types \tEnable legalize-numeric-types pass\n", - {driverCategory}, maplecl::DisableWith("--no-exp nd128floats"), maplecl::kHide, maplecl::Init(true)); + {driverCategory}, kOptMaple, maplecl::DisableWith("--no-exp nd128floats"), maplecl::kHide, maplecl::Init(true)); maplecl::Option oMD({"-MD"}, " -MD \tWrite a depfile containing user and system headers.\n", - {driverCategory, clangCategory}); + {driverCategory, clangCategory}, kOptFront); maplecl::Option fNoPlt({"-fno-plt"}, " -fno-plt \tDo not use the PLT to make function calls.\n", {driverCategory}); -maplecl::Option usePipe({"-pipe"}, - " -pipe \tUse pipes between commands, when possible.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option fDataSections({"-fdata-sections"}, - " -fdata-sections \tPlace each data in its own section (ELF Only).\n", - {driverCategory, unSupCategory}, maplecl::kHide); - maplecl::Option fRegStructReturn({"-freg-struct-return"}, " -freg-struct-return \tOverride the default ABI to return small structs in registers.\n", - {driverCategory}); + {driverCategory}, kOptCommon | kOptOptimization); maplecl::Option fTreeVectorize({"-ftree-vectorize"}, " -ftree-vectorize \tEnable vectorization on trees.\n", - {driverCategory}); + {driverCategory}, kOptCommon | kOptOptimization); maplecl::Option gcSections({"--gc-sections"}, " -gc-sections \tDiscard all sections that are not accessed in the final elf.\n", - {driverCategory, ldCategory}, maplecl::kHide); + {driverCategory, ldCategory}, kOptMaple | kOptLd, maplecl::kHide); maplecl::Option copyDtNeededEntries({"--copy-dt-needed-entries"}, " --copy-dt-needed-entries \tGenerate a DT_NEEDED entry for each lib that is present in the link command.\n", - {driverCategory, ldCategory}, maplecl::kHide); + {driverCategory, ldCategory}, kOptMaple | kOptLd, maplecl::kHide); maplecl::Option sOpt({"-s"}, " -s \tRemove all symbol table and relocation information from the executable\n", - {driverCategory, ldCategory}); + {driverCategory, ldCategory}, kOptDriver | kOptLd); maplecl::Option noStdinc({"-nostdinc"}, " -nostdinc \tDo not search standard system include directories(those specified with " "-isystem will still be used).\n", - {driverCategory, clangCategory}); + {driverCategory, clangCategory}, kOptFront); maplecl::Option pie({"-pie"}, " -pie \tCreate a position independent executable.\n", - {driverCategory, ldCategory}); - -maplecl::Option fStrongEvalOrder({"-fstrong-eval-order"}, - " -fstrong-eval-order \tFollow the C++17 evaluation order requirements for assignment expressions," - " shift, member function calls, etc.\n", - {driverCategory, unSupCategory}, maplecl::kHide); + {driverCategory, ldCategory}, kOptDriver | kOptLd); maplecl::Option linkerTimeOpt({"-flto"}, " -flto \tEnable LTO in 'full' mode.\n", - {driverCategory, cgCategory}); + {driverCategory, cgCategory}, kOptCommon); maplecl::Option shared({"-shared"}, " -shared \tCreate a shared library.\n", - {driverCategory, ldCategory}); + {driverCategory, ldCategory}, kOptDriver | kOptLd); maplecl::Option rdynamic({"-rdynamic"}, " -rdynamic \tPass the flag '-export-dynamic' to the ELF linker, on targets that support it. " "This instructs the linker to add all symbols, not only used ones, to the dynamic symbol table.\n", - {driverCategory, ldCategory}); + {driverCategory, ldCategory}, kOptDriver | kOptLd); maplecl::Option dndebug({"-DNDEBUG"}, " -DNDEBUG \t\n", - {driverCategory, ldCategory, clangCategory}); + {driverCategory, ldCategory, clangCategory}, kOptFront | kOptLd); maplecl::Option useSignedChar({"-fsigned-char", "-usesignedchar", "--usesignedchar"}, " -fsigned-char \tuse signed char\n", - {driverCategory, clangCategory, hir2mplCategory}, maplecl::DisableWith("-funsigned-char")); + {driverCategory, clangCategory, hir2mplCategory}, kOptFront | kOptNotFiltering, + maplecl::DisableWith("-funsigned-char")); maplecl::Option pthread({"-pthread"}, " -pthread \tDefine additional macros required for using the POSIX threads library.\n", - {driverCategory, clangCategory, asCategory, ldCategory}); + {driverCategory, clangCategory, asCategory, ldCategory}, kOptFront | kOptDriver | kOptLd); maplecl::Option passO2ToClang({"-pO2ToCl"}, - " -pthread \tTmp for option -D_FORTIFY_SOURCE=1.\n", - {clangCategory}, maplecl::kHide); + " -pthread \tTmp for option -D_FORTIFY_SOURCE=2.\n", + {clangCategory}, kOptMaple, maplecl::kHide); maplecl::Option defaultSafe({"-defaultSafe", "--defaultSafe"}, " --defaultSafe \tTreat unmarked function or blocks as safe region by default.\n", - {driverCategory, hir2mplCategory}); + {driverCategory, hir2mplCategory}, kOptMaple); maplecl::Option onlyPreprocess({"-E"}, " -E \tPreprocess only; do not compile, assemble or link.\n", - {driverCategory, clangCategory}); + {driverCategory, clangCategory}, kOptDriver | kOptFront); -maplecl::Option tailcall({"--tailcall", "-foptimize-sibling-calls"}, +maplecl::Option tailcall({"-foptimize-sibling-calls", "--tailcall"}, " --tailcall/-foptimize-sibling-calls\n" " \tDo tail call optimization.\n" " --no-tailcall/-fno-optimize-sibling-calls\n", - {cgCategory, driverCategory}, maplecl::DisableEvery({"-fno-optimize-sibling-calls", "--no-tailcall"})); + {cgCategory, driverCategory}, kOptCommon | kOptOptimization, + maplecl::DisableEvery({"-fno-optimize-sibling-calls", "--no-tailcall"})); maplecl::Option noStdLib({"-nostdlib"}, " -nostdlib \tDo not look for object files in standard path.\n", - {driverCategory, ldCategory}); + {driverCategory, ldCategory}, kOptDriver | kOptLd); maplecl::Option r({"-r"}, " -r \tProduce a relocatable object as output. This is also known as partial linking.\n", - {driverCategory, ldCategory}); + {driverCategory, ldCategory}, kOptDriver | kOptLd); maplecl::Option wCCompat({"-Wc++-compat"}, " -Wc++-compat \tWarn about C constructs that are not in the common subset of C and C++.\n", - {driverCategory, asCategory, ldCategory}); + {driverCategory, asCategory, ldCategory}, kOptLd | kOptAs); maplecl::Option wpaa({"-wpaa", "--wpaa"}, " --wpaa \tEnable whole program ailas analysis.\n", - {driverCategory, hir2mplCategory}); + {driverCategory, hir2mplCategory}, kOptMaple); maplecl::Option fm({"-fm", "--fm"}, " -fm \tStatic function merge will be enabled only when wpaa is enabled " "at the same time.\n", - {driverCategory, hir2mplCategory}, maplecl::DisableEvery({"-no-fm", "--no-fm"})); + {driverCategory, hir2mplCategory}, kOptMaple, maplecl::DisableEvery({"-no-fm", "--no-fm"})); maplecl::Option dumpTime({"--dump-time", "-dump-time"}, " --dump-time \tDump time.\n", - {driverCategory, hir2mplCategory}); + {driverCategory, hir2mplCategory}, kOptMaple); maplecl::Option aggressiveTlsLocalDynamicOpt({"--tls-local-dynamic-opt"}, " --tls-local-dynamic-opt \tDo aggressive tls local dynamic opt.\n", - {driverCategory}); - -/* ##################### STRING Options ############################################################### */ - -maplecl::Option help({"--help", "-h"}, - " --help \tPrint help\n", - {driverCategory}, maplecl::kOptionalValue); - -maplecl::Option infile({"--infile"}, - " --infile file1,file2,file3 \tInput files.\n", - {driverCategory}); - -maplecl::Option mplt({"--mplt", "-mplt"}, - " --mplt=file1,file2,file3 \tImport mplt files.\n", - {driverCategory, dex2mplCategory, jbc2mplCategory}, maplecl::kHide); + {driverCategory}, kOptMaple); -maplecl::Option partO2({"--partO2"}, - " --partO2 \tSet func list for O2.\n", +maplecl::Option aggressiveTlsLocalDynamicOptMultiThread({"--tls-local-dynamic-opt-multi-thread"}, + " --tls-local-dynamic-opt-multi-thread \tDo aggressive tls local dynamic opt for multi thread.\n", {driverCategory}); -maplecl::List jbc2mplOpt({"--jbc2mpl-opt"}, - " --jbc2mpl-opt \tSet options for jbc2mpl.\n", - {driverCategory}, maplecl::kHide); - -maplecl::List hir2mplOpt({"--hir2mpl-opt"}, - " --hir2mpl-opt \tSet options for hir2mpl.\n", - {driverCategory}, maplecl::kHide); - -maplecl::List clangOpt({"--clang-opt"}, - " --clang-opt \tSet options for clang as AST generator.\n", - {driverCategory}, maplecl::kHide); - -maplecl::List asOpt({"--as-opt"}, - " --as-opt \tSet options for as.\n", - {driverCategory}, maplecl::kHide); - -maplecl::List ldOpt({"--ld-opt"}, - " --ld-opt \tSet options for ld.\n", - {driverCategory}, maplecl::kHide); - -maplecl::List dex2mplOpt({"--dex2mpl-opt"}, - " --dex2mpl-opt \tSet options for dex2mpl.\n", - {driverCategory}, maplecl::kHide); - -maplecl::List mplipaOpt({"--mplipa-opt"}, - " --mplipa-opt \tSet options for mplipa.\n", - {driverCategory}, maplecl::kHide); - -maplecl::List mplcgOpt({"--mplcg-opt"}, - " --mplcg-opt \tSet options for mplcg.\n", - {driverCategory}, maplecl::kHide); - -maplecl::List meOpt({"--me-opt"}, - " --me-opt \tSet options for me.\n", - {driverCategory}, maplecl::kHide); - -maplecl::List mpl2mplOpt({"--mpl2mpl-opt"}, - " --mpl2mpl-opt \tSet options for mpl2mpl.\n", - {driverCategory}, maplecl::kHide); - -maplecl::Option profile({"--profile"}, - " --profile \tFor PGO optimization. eg: --profile=list_file.\n", - {driverCategory, dex2mplCategory, mpl2mplCategory, cgCategory}); - -maplecl::Option run({"--run"}, - " --run=cmd1:cmd2 \tThe name of executables that are going to execute. IN SEQUENCE.\nSeparated " - "by \":\".Available exe names: jbc2mpl, me, mpl2mpl, mplcg. Input file must match the tool can handle.\n", - {driverCategory}, maplecl::kHide); - -maplecl::Option optionOpt({"--option"}, - " --option=\"opt1:opt2\" \tOptions for each executable, separated by \":\". The sequence must match the " - "sequence in --run.\n", - {driverCategory}, maplecl::kHide); - -maplecl::List ldLib({"-l"}, - " -l \tLinks with a library file.\n", - {driverCategory, ldCategory}, maplecl::kJoinedValue); - -maplecl::List ldLibPath({"-L"}, - " -L \tAdd directory to library search path.\n", - {driverCategory, ldCategory}, maplecl::kJoinedValue); - -maplecl::List enableMacro({"-D"}, - " -D = \tDefine to (or 1 if omitted).\n", - {driverCategory, clangCategory}, maplecl::kJoinedValue); - -maplecl::List disableMacro({"-U"}, - " -U \tUndefine macro .\n", - {driverCategory, clangCategory}, maplecl::kJoinedValue); - -maplecl::List includeDir({"-I"}, - " -I \tAdd directory to include search path.\n", - {driverCategory, clangCategory}, maplecl::kJoinedValue); - -maplecl::List includeSystem({"-isystem"}, - " -isystem \tAdd directory to SYSTEM include search path.\n", - {driverCategory, clangCategory}, maplecl::kJoinedValue); - -maplecl::Option output({"-o"}, - " -o \tPlace the output into .\n", - {driverCategory}, maplecl::kJoinedValue, maplecl::Init("a.out")); - -maplecl::Option saveTempOpt({"--save-temps"}, - " --save-temps \tDo not delete intermediate files. --save-temps Save all intermediate files.\n" - " \t--save-temps=file1,file2,file3 Save the target files.\n", - {driverCategory, clangCategory}, maplecl::kOptionalValue); - -maplecl::Option target({"--target", "-target"}, - " --target= \tDescribe target platform. Example: --target=aarch64-gnu or " - "--target=aarch64_be-gnuilp32\n", - {driverCategory, clangCategory, hir2mplCategory, dex2mplCategory, ipaCategory}); - -maplecl::Option oMT({"-MT"}, - " -MT \tSpecify name of main file output in depfile.\n", - {driverCategory, clangCategory}, maplecl::kJoinedValue); - -maplecl::Option oMF({"-MF"}, - " -MF \tWrite depfile output from -MD, -M to .\n", - {driverCategory, clangCategory}, maplecl::kJoinedValue); - -maplecl::Option oWl({"-Wl"}, - " -Wl, \tPass the comma separated arguments in to the linker.\n", - {driverCategory, ldCategory}, maplecl::kJoinedValue); - -maplecl::Option linkerTimeOptE({"-flto="}, - " -flto= \tSet LTO mode to either 'full' or 'thin'.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option fVisibility({"-fvisibility"}, - " -fvisibility=[default|hidden|protected|internal]\n" - " \tSet the default symbol visibility for every global " - "declaration unless overridden within the code.\n", +maplecl::Option aggressiveTlsSafeAnchor({"--tls-safe-anchor"}, + " --tls-safe-anchor \taggressive tls local dynamic opt use safe site for saving anchor\n", {driverCategory}); -maplecl::Option fStrongEvalOrderE({"-fstrong-eval-order="}, - " -fstrong-eval-order \tFollow the C++17 evaluation order requirementsfor assignment expressions, " - "shift, member function calls, etc.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option marchE({"-march="}, - " -march= \tGenerate code for given CPU.\n", - {driverCategory, clangCategory, asCategory, ldCategory, unSupCategory}, maplecl::kHide); - maplecl::Option marchArmV8({"-march=armv8-a"}, " -march=armv8-a \tGenerate code for armv8-a.\n", - {driverCategory, clangCategory, asCategory, ldCategory}); + {driverCategory, clangCategory, asCategory, ldCategory}, kOptFront | kOptLd | kOptNotFiltering); maplecl::Option marchArmV8Crc({"-march=armv8-a+crc"}, " -march=armv8-a+crc \tGenerate code for armv8-a+crc.\n", - {driverCategory, clangCategory, asCategory, ldCategory}); - -maplecl::Option sysRoot({"--sysroot"}, - " --sysroot \tSet the root directory of the target platform.\n" - " --sysroot= \tSet the root directory of the target platform.\n", - {driverCategory, clangCategory, ldCategory}); - -maplecl::Option specs({"-specs"}, - " -specs \tOverride built-in specs with the contents of .\n", - {driverCategory, asCategory, ldCategory}); - -maplecl::Option folder({"-tmp-folder"}, - " -tmp-folder \tsave former folder when generating multiple output.\n", - {driverCategory}, maplecl::kHide); - -maplecl::Option imacros({"-imacros", "--imacros"}, - " -imacros \tExactly like '-include', except that any output produced by scanning FILE is " - "thrown away.\n", - {driverCategory, clangCategory}); - -maplecl::Option fdiagnosticsColor({"-fdiagnostics-color"}, - " -fdiagnostics-color \tUse color in diagnostics. WHEN is 'never', 'always', or 'auto'.\n", - {driverCategory, clangCategory, asCategory, ldCategory}); - -maplecl::Option mtlsSize({"-mtls-size"}, - " -mtls-size \tSpecify bit size of immediate TLS offsets. Valid values are 12, 24, 32, 48. " - "This option requires binutils 2.26 or newer.\n", - {driverCategory, asCategory, ldCategory}); - -maplecl::Option ftlsModel({"-ftls-model"}, - " -ftls-model=[global-dynamic|local-dynamic|initial-exec|local-exec|warmup-dynamic]\n" - " \tAlter the thread-local storage model to be used.\n", - {driverCategory}); - -maplecl::Option functionReorderAlgorithm({"--function-reorder-algorithm"}, - " --function-reorder-algorithm=[call-chain-clustering]\n" - " \tChoose function reorder algorithm\n", - {driverCategory, cgCategory}); - -maplecl::Option functionReorderProfile({"--function-reorder-profile"}, - " --function-reorder-profile=filepath\n" - " \tProfile for function reorder\n", - {driverCategory, cgCategory}); - -#ifdef ENABLE_MAPLE_SAN -maplecl::Option sanitizer({"-fsanitizer"}, - " -fsanitizer=address \tEnable AddressSanitizer.\n", - {driverCategory, meCategory}); -#endif -/* ##################### DIGITAL Options ############################################################### */ - -maplecl::Option helpLevel({"--level"}, - " --level=NUM \tPrint the help info of specified level.\n" - " \tNUM=0: All options (Default)\n" - " \tNUM=1: Product options\n" - " \tNUM=2: Experimental options\n" - " \tNUM=3: Debug options\n", - {driverCategory}, maplecl::kHide); - -maplecl::Option funcInliceSize({"-func-inline-size", "--func-inline-size"}, - " --func-inline-size \tSet func inline size.\n", - {driverCategory, hir2mplCategory}); - -maplecl::Option initOptNum({"-initOptNum", "--initOptNum"}, - " -initOptNum \tif initNum > 10000, hir2mpl will Make optimization for initListElements, " - "default value is 10000.\n", - {driverCategory, hir2mplCategory}, maplecl::Init(10000)); - -/* ##################### maple Options ############################################################### */ - -maplecl::Option oFmaxErrors({"-fmax-errors"}, - " -fmax-errors \tLimits the maximum number of error messages to n, If n is 0 (the default), " - "there is no limit on the number of error messages produced. If -Wfatal-errors is also specified, then " - "-Wfatal-errors takes precedence over this option.\n", - {driverCategory, unSupCategory}, maplecl::kHide); + {driverCategory, clangCategory, asCategory, ldCategory}, kOptFront | kOptLd | kOptNotFiltering); maplecl::Option oStaticLibasan({"-static-libasan"}, " -static-libasan \tThe -static-libasan option directs the MAPLE driver to link libasan statically," " without necessarily linking other libraries statically.\n", - {driverCategory, ldCategory}); + {driverCategory, ldCategory}, kOptDriver | kOptLd); maplecl::Option oStaticLiblsan({"-static-liblsan"}, " -static-liblsan \tThe -static-liblsan option directs the MAPLE driver to link liblsan statically," " without necessarily linking other libraries statically.\n", - {driverCategory, ldCategory}); + {driverCategory, ldCategory}, kOptDriver | kOptLd); maplecl::Option oStaticLibtsan({"-static-libtsan"}, " -static-libtsan \tThe -static-libtsan option directs the MAPLE driver to link libtsan statically, " "without necessarily linking other libraries statically.\n", - {driverCategory, ldCategory}); + {driverCategory, ldCategory}, kOptDriver | kOptLd); maplecl::Option oStaticLibubsan({"-static-libubsan"}, " -static-libubsan \tThe -static-libubsan option directs the MAPLE driver to link libubsan statically," " without necessarily linking other libraries statically.\n", - {driverCategory, ldCategory}); + {driverCategory, ldCategory}, kOptDriver | kOptLd); maplecl::Option oStaticLibmpx({"-static-libmpx"}, " -static-libmpx \tThe -static-libmpx option directs the MAPLE driver to link libmpx statically," @@ -582,3005 +368,597 @@ maplecl::Option oStaticLibmpxwrappers({"-static-libmpxwrappers"}, maplecl::Option oSymbolic({"-symbolic"}, " -symbolic \tWarn about any unresolved references (unless overridden by the link editor " "option -Xlinker -z -Xlinker defs).\n", - {driverCategory, ldCategory}); + {driverCategory, ldCategory}, kOptDriver | kOptLd); -maplecl::Option oFipaBitCp({"-fipa-bit-cp"}, - " -fipa-bit-cp \tWhen enabled, perform interprocedural bitwise constant propagation. This " - "flag is enabled by default at -O2. It requires that -fipa-cp is enabled.\n", - {driverCategory, unSupCategory}, maplecl::kHide); +maplecl::Option oNoPie({"-no-pie"}, + " -no-pie \tDon't create a position independent executable.\n", + {driverCategory, ldCategory}, kOptDriver | kOptLd); -maplecl::Option oFipaVrp({"-fipa-vrp"}, - " -fipa-vrp \tWhen enabled, perform interprocedural propagation of value ranges. This " - "flag is enabled by default at -O2. It requires that -fipa-cp is enabled.\n", - {driverCategory, unSupCategory}, maplecl::kHide); +maplecl::Option staticLibmplpgo({"--static-libmplpgo"}, + " --static-libmplpgo \tStatic link using libmplpgo\n", + {driverCategory, cgCategory}, kOptMaple); -maplecl::Option oMindirectBranchRegister({"-mindirect-branch-register"}, - " -mindirect-branch-register \tForce indirect call and jump via register.\n", - {driverCategory, unSupCategory}, maplecl::kHide); +maplecl::Option fPIE({"-fPIE", "--fPIE"}, + " --fPIE \tGenerate position-independent executable in large mode.\n" + " --no-pie/-fno-pie \n", + {cgCategory, driverCategory, ldCategory}, kOptCommon | kOptLd | kOptNotFiltering); -maplecl::Option oMlowPrecisionDiv({"-mlow-precision-div"}, - " -mlow-precision-div \tEnable the division approximation. Enabling this reduces precision of " - "division results to about 16 bits for single precision and to 32 bits for double precision.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-low-precision-div"), maplecl::kHide); +maplecl::Option oUndef({"-undef"}, + " -undef \tDo not predefine system-specific and GCC-specific macros.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::kHide); -maplecl::Option oMlowPrecisionSqrt({"-mlow-precision-sqrt"}, - " -mlow-precision-sqrt \tEnable the reciprocal square root approximation. Enabling this reduces precision" - " of reciprocal square root results to about 16 bits for single precision and to 32 bits for double precision.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-low-precision-sqrt"), maplecl::kHide); +maplecl::Option oTrigraphs({"-trigraphs"}, + " -trigraphs \t-trigraphs Support ISO C trigraphs.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::kHide); -maplecl::Option oM80387({"-m80387"}, - " -m80387 \tGenerate output containing 80387 instructions for floating point.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-80387"), maplecl::kHide); +maplecl::Option oStd03({"-std=c++03"}, + " -std=c++03 \tConform to the ISO 1998 C++ standard revised by the 2003 technical corrigendum.\n", + {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); -maplecl::Option oAllowable_client({"-allowable_client"}, - " -allowable_client \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); +maplecl::Option oStd0x({"-std=c++0x"}, + " -std=c++0x \tDeprecated in favor of -std=c++11.\n", + {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); -maplecl::Option oAll_load({"-all_load"}, - " -all_load \tLoads all members of static archive libraries.\n", - {driverCategory, unSupCategory}, maplecl::kHide); +maplecl::Option oStd11({"-std=c++11"}, + " -std=c++11 \tConform to the ISO 2011 C++ standard.\n", + {driverCategory, ldCategory, clangCategory, unSupCategory}, kOptLd, maplecl::kHide); -maplecl::Option oAnsi({"-ansi", "--ansi"}, - " -ansi \tIn C mode, this is equivalent to -std=c90. In C++ mode, it is equivalent " - "to -std=c++98.\n", - {driverCategory, unSupCategory, hir2mplCategory}, maplecl::kHide); +maplecl::Option oStd14({"-std=c++14"}, + " -std=c++14 \tConform to the ISO 2014 C++ standard.\n", + {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); -maplecl::Option oArch_errors_fatal({"-arch_errors_fatal"}, - " -arch_errors_fatal \tCause the errors having to do with files that have the wrong architecture " - "to be fatal.\n", - {driverCategory, unSupCategory}, maplecl::kHide); +maplecl::Option oStd17({"-std=c++17"}, + " -std=c++17 \tConform to the ISO 2017 C++ standard.\n", + {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); -maplecl::Option oAuxInfo({"-aux-info"}, - " -aux-info \tEmit declaration information into .\n", - {driverCategory, unSupCategory}, maplecl::kHide); +maplecl::Option oStd1y({"-std=c++1y"}, + " -std=c++1y \tDeprecated in favor of -std=c++14.\n", + {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); -maplecl::Option oBdynamic({"-Bdynamic"}, - " -Bdynamic \tDefined for compatibility with Diab.\n", - {driverCategory, unSupCategory}, maplecl::kHide); +maplecl::Option oStd1z({"-std=c++1z"}, + " -std=c++1z \tConform to the ISO 2017(?) C++ draft standard (experimental and incomplete " + "support).\n", + {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); -maplecl::Option oBind_at_load({"-bind_at_load"}, - " -bind_at_load \tCauses the output file to be marked such that the dynamic linker will bind " - "all undefined references when the file is loaded or launched.\n", - {driverCategory, unSupCategory}, maplecl::kHide); +maplecl::Option oStd98({"-std=c++98"}, + " -std=c++98 \tConform to the ISO 1998 C++ standard revised by the 2003 technical corrigendum.\n", + {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); -maplecl::Option oBstatic({"-Bstatic"}, - " -Bstatic \tdefined for compatibility with Diab.\n", - {driverCategory, unSupCategory}, maplecl::kHide); +maplecl::Option oStd11p({"-std=c11"}, + " -std=c11 \tConform to the ISO 2011 C standard.\n", + {driverCategory, clangCategory}, kOptFront); -maplecl::Option oBundle({"-bundle"}, - " -bundle \tProduce a Mach-o bundle format file. \n", - {driverCategory, unSupCategory}, maplecl::kHide); +maplecl::Option oStdc1x({"-std=c1x"}, + " -std=c1x \tDeprecated in favor of -std=c11.\n", + {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); -maplecl::Option oBundle_loader({"-bundle_loader"}, - " -bundle_loader \tThis option specifies the executable that will load the build output file " - "being linked.\n", - {driverCategory, unSupCategory}, maplecl::kHide); +maplecl::Option oStd89({"-std=c89"}, + " -std=c89 \tConform to the ISO 1990 C standard.\n", + {driverCategory, clangCategory, unSupCategory, hir2mplCategory}, maplecl::kHide); -maplecl::Option oC({"-C"}, - " -C \tDo not discard comments.\n", - {driverCategory, unSupCategory}, maplecl::kHide); +maplecl::Option oStd90({"-std=c90"}, + " -std \tConform to the ISO 1998 C++ standard revised by the 2003 technical corrigendum.\n", + {driverCategory, clangCategory, unSupCategory, hir2mplCategory}, maplecl::kHide); -maplecl::Option oCC({"-CC"}, - " -CC \tDo not discard comments in macro expansions.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oClient_name({"-client_name"}, - " -client_name \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); +maplecl::Option oStd99({"-std=c99"}, + " -std=c99 \tConform to the ISO 1999 C standard.\n", + {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); -maplecl::Option oCompatibility_version({"-compatibility_version"}, - " -compatibility_version \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); +maplecl::Option oStd9x({"-std=c9x"}, + " -std=c9x \tDeprecated in favor of -std=c99.\n", + {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); -maplecl::Option oCoverage({"-coverage"}, - " -coverage \tThe option is a synonym for -fprofile-arcs -ftest-coverage (when compiling) " - "and -lgcov (when linking). \n", - {driverCategory, unSupCategory}, maplecl::kHide); +maplecl::Option oStd2003({"-std=f2003"}, + " -std=f2003 \tConform to the ISO Fortran 2003 standard.\n", + {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); -maplecl::Option oCurrent_version({"-current_version"}, - " -current_version \t\n", +maplecl::Option oStd2008({"-std=f2008"}, + " -std=f2008 \tConform to the ISO Fortran 2008 standard.\n", {driverCategory, unSupCategory}, maplecl::kHide); -maplecl::Option oDa({"-da"}, - " -da \tProduce all the dumps listed above.\n", +maplecl::Option oStd2008ts({"-std=f2008ts"}, + " -std=f2008ts \tConform to the ISO Fortran 2008 standard including TS 29113.\n", {driverCategory, unSupCategory}, maplecl::kHide); -maplecl::Option oDA({"-dA"}, - " -dA \tAnnotate the assembler output with miscellaneous debugging information.\n", +maplecl::Option oStdf95({"-std=f95"}, + " -std=f95 \tConform to the ISO Fortran 95 standard.\n", {driverCategory, unSupCategory}, maplecl::kHide); -maplecl::Option oDD({"-dD"}, - " -dD \tDump all macro definitions, at the end of preprocessing, in addition to " - "normal output.\n", +maplecl::Option oStdgnu({"-std=gnu"}, + " -std=gnu \tConform to nothing in particular.\n", {driverCategory, unSupCategory}, maplecl::kHide); -maplecl::Option oDead_strip({"-dead_strip"}, - " -dead_strip \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); +maplecl::Option oStdgnu03p({"-std=gnu++03"}, + " -std=gnu++03 \tConform to the ISO 1998 C++ standard revised by the 2003 technical corrigendum " + "with GNU extensions.\n", + {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); -maplecl::Option oDependencyFile({"-dependency-file"}, - " -dependency-file \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); +maplecl::Option oStdgnuoxp({"-std=gnu++0x"}, + " -std=gnu++0x \tDeprecated in favor of -std=gnu++11.\n", + {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); -maplecl::Option oDH({"-dH"}, - " -dH \tProduce a core dump whenever an error occurs.\n", - {driverCategory, unSupCategory}, maplecl::kHide); +maplecl::Option oStdgnu11p({"-std=gnu++11"}, + " -std=gnu++11 \tConform to the ISO 2011 C++ standard with GNU extensions.\n", + {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); -maplecl::Option oDI({"-dI"}, - " -dI \tOutput '#include' directives in addition to the result of preprocessing.\n", - {driverCategory, clangCategory}); +maplecl::Option oStdgnu14p({"-std=gnu++14"}, + " -std=gnu++14 \tConform to the ISO 2014 C++ standard with GNU extensions.\n", + {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); -maplecl::Option oDM({"-dM"}, - " -dM \tInstead of the normal output, generate a list of '#define' directives for all " - "the macros defined during the execution of the preprocessor, including predefined macros. \n", - {driverCategory, clangCategory}); +maplecl::Option oStdgnu17p({"-std=gnu++17"}, + " -std=gnu++17 \tConform to the ISO 2017 C++ standard with GNU extensions.\n", + {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); -maplecl::Option oDN({"-dN"}, - " -dN \tLike -dD, but emit only the macro names, not their expansions.\n", - {driverCategory, clangCategory}); +maplecl::Option oStdgnu1yp({"-std=gnu++1y"}, + " -std=gnu++1y \tDeprecated in favor of -std=gnu++14.\n", + {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); -maplecl::Option oDp({"-dp"}, - " -dp \tAnnotate the assembler output with a comment indicating which pattern and " - "alternative is used. The length of each instruction is also printed.\n", - {driverCategory, unSupCategory}, maplecl::kHide); +maplecl::Option oStdgnu1zp({"-std=gnu++1z"}, + " -std=gnu++1z \tConform to the ISO 201z(7?) C++ draft standard with GNU extensions " + "(experimental and incomplete support).\n", + {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); -maplecl::Option oDP({"-dP"}, - " -dP \tDump the RTL in the assembler output as a comment before each instruction. " - "Also turns on -dp annotation.\n", - {driverCategory, unSupCategory}, maplecl::kHide); +maplecl::Option oStdgnu98p({"-std=gnu++98"}, + " -std=gnu++98 \tConform to the ISO 1998 C++ standard revised by the 2003 technical corrigendum " + "with GNU extensions.\n", + {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); -maplecl::Option oDU({"-dU"}, - " -dU \tLike -dD except that only macros that are expanded.\n", - {driverCategory, clangCategory}); +maplecl::Option oStdgnu11({"-std=gnu11"}, + " -std=gnu11 \tConform to the ISO 2011 C standard with GNU extensions.\n", + {driverCategory, clangCategory}, kOptFront); -maplecl::Option oDumpfullversion({"-dumpfullversion"}, - " -dumpfullversion \tPrint the full compiler version, always 3 numbers separated by dots, major," - " minor and patchlevel version.\n", - {driverCategory, unSupCategory}, maplecl::kHide); +maplecl::Option oStdgnu1x({"-std=gnu1x"}, + " -std=gnu1x \tDeprecated in favor of -std=gnu11.\n", + {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); -maplecl::Option oDumpmachine({"-dumpmachine"}, - " -dumpmachine \tPrint the compiler's target machine (for example, 'i686-pc-linux-gnu') and " - "don't do anything else.\n", - {driverCategory, unSupCategory}, maplecl::kHide); +maplecl::Option oStdgnu89({"-std=gnu89"}, + " -std=gnu89 \tConform to the ISO 1990 C standard with GNU extensions.\n", + {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); -maplecl::Option oDumpspecs({"-dumpspecs"}, - " -dumpspecs \tPrint the compiler's built-in specs—and don't do anything else. (This is " - "used when MAPLE itself is being built.)\n", - {driverCategory, unSupCategory}, maplecl::kHide); +maplecl::Option oStdgnu90({"-std=gnu90"}, + " -std=gnu90 \tConform to the ISO 1990 C standard with GNU extensions.\n", + {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); -maplecl::Option oDumpversion({"-dumpversion"}, - " -dumpversion \tPrint the compiler version (for example, 3.0, 6.3.0 or 7) and don't do" - " anything else.\n", - {driverCategory, unSupCategory}, maplecl::kHide); +maplecl::Option oStdgnu99({"-std=gnu99"}, + " -std=gnu99 \tConform to the ISO 1999 C standard with GNU extensions.\n", + {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); -maplecl::Option oDx({"-dx"}, - " -dx \tJust generate RTL for a function instead of compiling it. Usually used " - "with -fdump-rtl-expand.\n", - {driverCategory, unSupCategory}, maplecl::kHide); +maplecl::Option oStdgnu9x({"-std=gnu9x"}, + " -std=gnu9x \tDeprecated in favor of -std=gnu99.\n", + {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); -maplecl::Option oDylib_file({"-dylib_file"}, - " -dylib_file \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); +maplecl::Option oStd1990({"-std=iso9899:1990"}, + " -std=iso9899:1990 \tConform to the ISO 1990 C standard.\n", + {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); -maplecl::Option oDylinker_install_name({"-dylinker_install_name"}, - " -dylinker_install_name \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); +maplecl::Option oStd1994({"-std=iso9899:199409"}, + " -std=iso9899:199409 \tConform to the ISO 1990 C standard as amended in 1994.\n", + {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); -maplecl::Option oDynamic({"-dynamic"}, - " -dynamic \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); +maplecl::Option oStd1999({"-std=iso9899:1999"}, + " -std=iso9899:1999 \tConform to the ISO 1999 C standard.\n", + {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); -maplecl::Option oDynamiclib({"-dynamiclib"}, - " -dynamiclib \tWhen passed this option, GCC produces a dynamic library instead of an " - "executable when linking, using the Darwin libtool command.\n", - {driverCategory, unSupCategory}, maplecl::kHide); +maplecl::Option oStd199x({"-std=iso9899:199x"}, + " -std=iso9899:199x \tDeprecated in favor of -std=iso9899:1999.\n", + {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); -maplecl::Option oEB({"-EB"}, - " -EB \tCompile code for big-endian targets.\n", - {driverCategory, unSupCategory}, maplecl::kHide); +maplecl::Option oStd2011({"-std=iso9899:2011"}, + " -std=iso9899:2011 \tConform to the ISO 2011 C standard.\n", + {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); -maplecl::Option oEL({"-EL"}, - " -EL \tCompile code for little-endian targets. \n", +maplecl::Option oStdlegacy({"-std=legacy"}, + " -std=legacy \tAccept extensions to support legacy code.\n", {driverCategory, unSupCategory}, maplecl::kHide); -maplecl::Option oExported_symbols_list({"-exported_symbols_list"}, - " -exported_symbols_list \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); +maplecl::Option oH({"-H"}, + " -H \tPrint the name of header files as they are used.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::kHide); -maplecl::Option oFabiCompatVersion({"-fabi-compat-version="}, - " -fabi-compat-version= \tThe version of the C++ ABI in use.\n", - {driverCategory, unSupCategory}, maplecl::kHide); +maplecl::Option oM({"-M"}, + " -M \tGenerate make dependencies.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::kHide); -maplecl::Option oFabiVersion({"-fabi-version="}, - " -fabi-version= \tUse version n of the C++ ABI. The default is version 0.\n", - {driverCategory, unSupCategory}, maplecl::kHide); +maplecl::Option oDI({"-dI"}, + " -dI \tOutput '#include' directives in addition to the result of preprocessing.\n", + {driverCategory, clangCategory}, kOptFront); -maplecl::Option oFadaSpecParent({"-fada-spec-parent="}, - " -fada-spec-parent= \tIn conjunction with -fdump-ada-spec[-slim] above, generate Ada specs as " - "child units of parent unit.\n", - {driverCategory, unSupCategory}, maplecl::kHide); +maplecl::Option oDM({"-dM"}, + " -dM \tInstead of the normal output, generate a list of '#define' directives for all " + "the macros defined during the execution of the preprocessor, including predefined macros. \n", + {driverCategory, clangCategory}, kOptFront); -maplecl::Option oFaggressiveLoopOptimizations({"-faggressive-loop-optimizations"}, - " -faggressive-loop-optimizations \tThis option tells the loop optimizer to use language constraints to " - "derive bounds for the number of iterations of a loop.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-aggressive-loop-optimizations"), maplecl::kHide); +maplecl::Option oDN({"-dN"}, + " -dN \tLike -dD, but emit only the macro names, not their expansions.\n", + {driverCategory, clangCategory}, kOptFront); -maplecl::Option oFchkpFlexibleStructTrailingArrays({"-fchkp-flexible-struct-trailing-arrays"}, - " -fchkp-flexible-struct-trailing-arrays \tForces Pointer Bounds Checker to treat all trailing arrays in " - "structures as possibly flexible.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-chkp-flexible-struct-trailing-arrays"), maplecl::kHide); +maplecl::Option oDU({"-dU"}, + " -dU \tLike -dD except that only macros that are expanded.\n", + {driverCategory, clangCategory}, kOptFront); -maplecl::Option oFchkpInstrumentCalls({"-fchkp-instrument-calls"}, - " -fchkp-instrument-calls \tInstructs Pointer Bounds Checker to pass pointer bounds to calls." - " Enabled by default.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-chkp-instrument-calls"), maplecl::kHide); +maplecl::Option oFdollarsInIdentifiers({"-fdollars-in-identifiers"}, + " -fdollars-in-identifiers \tPermit '$' as an identifier character.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-fno-dollars-in-identifiers")); -maplecl::Option oFchkpInstrumentMarkedOnly({"-fchkp-instrument-marked-only"}, - " -fchkp-instrument-marked-only \tInstructs Pointer Bounds Checker to instrument only functions marked with " - "the bnd_instrument attribute \n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-chkp-instrument-marked-only"), maplecl::kHide); +maplecl::Option oFextendedIdentifiers({"-fextended-identifiers"}, + " -fextended-identifiers \tPermit universal character names (\\u and \\U) in identifiers.\n", + {driverCategory, clangCategory}, kOptFront); -maplecl::Option oFchkpNarrowBounds({"-fchkp-narrow-bounds"}, - " -fchkp-narrow-bounds \tControls bounds used by Pointer Bounds Checker for pointers to object fields.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-chkp-narrow-bounds"), maplecl::kHide); +maplecl::Option oFpchPreprocess({"-fpch-preprocess"}, + " -fpch-preprocess \tLook for and use PCH files even when preprocessing.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::kHide); -maplecl::Option oFchkpNarrowToInnermostArray({"-fchkp-narrow-to-innermost-array"}, - " -fchkp-narrow-to-innermost-array \tForces Pointer Bounds Checker to use bounds of the innermost arrays in " - "case of nested static array access.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-chkp-narrow-to-innermost-array"), maplecl::kHide); +maplecl::Option oLargeP({"-P"}, + " -P \tDo not generate #line directives.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::kHide); -maplecl::Option oFchkpOptimize({"-fchkp-optimize"}, - " -fchkp-optimize \tEnables Pointer Bounds Checker optimizations.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-chkp-optimize"), maplecl::kHide); +maplecl::Option oMfixCortexA53835769({"-mfix-cortex-a53-835769"}, + " -mfix-cortex-a53-835769 \tWorkaround for ARM Cortex-A53 Erratum number 835769.\n", + {driverCategory, ldCategory}, kOptLd, maplecl::DisableWith("-mno-fix-cortex-a53-835769")); -maplecl::Option oFchkpStoreBounds({"-fchkp-store-bounds"}, - " -fchkp-store-bounds tInstructs Pointer Bounds Checker to generate bounds tores for pointer writes.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-chkp-store-bounds"), maplecl::kHide); +maplecl::Option oMfixCortexA53843419({"-mfix-cortex-a53-843419"}, + " -mfix-cortex-a53-843419 \tWorkaround for ARM Cortex-A53 Erratum number 843419.\n", + {driverCategory, ldCategory}, kOptLd, maplecl::DisableWith("-mno-fix-cortex-a53-843419")); -maplecl::Option oFchkpTreatZeroDynamicSizeAsInfinite({"-fchkp-treat-zero-dynamic-size-as-infinite"}, - " -fchkp-treat-zero-dynamic-size-as-infinite \tWith this option, objects with incomplete type whose " - "dynamically-obtained size is zero are treated as having infinite size instead by Pointer Bounds Checker. \n", - {driverCategory, unSupCategory}, - maplecl::DisableWith("-fno-chkp-treat-zero-dynamic-size-as-infinite"), maplecl::kHide); +maplecl::Option oFuseLdBfd({"-fuse-ld=bfd"}, + " -fuse-ld=bfd \tUse the bfd linker instead of the default linker.\n", + {driverCategory, ldCategory}, kOptCommon | kOptDriver | kOptLd, maplecl::kHide); -maplecl::Option oFchkpUseFastStringFunctions({"-fchkp-use-fast-string-functions"}, - " -fchkp-use-fast-string-functions \tEnables use of *_nobnd versions of string functions (not copying bounds) " - "by Pointer Bounds Checker. \n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-chkp-use-fast-string-functions"), maplecl::kHide); +maplecl::Option oFuseLdGold({"-fuse-ld=gold"}, + " -fuse-ld=gold \tUse the gold linker instead of the default linker.\n", + {driverCategory, ldCategory}, kOptCommon | kOptDriver | kOptLd, maplecl::kHide); -maplecl::Option oFchkpUseNochkStringFunctions({"-fchkp-use-nochk-string-functions"}, - " -fchkp-use-nochk-string-functions \tEnables use of *_nochk versions of string functions (not checking bounds) " - "by Pointer Bounds Checker. \n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-chkp-use-nochk-string-functions"), maplecl::kHide); +maplecl::Option oNodefaultlibs({"-nodefaultlibs"}, + " -nodefaultlibs \tDo not use the standard system libraries when linking. \n", + {driverCategory, ldCategory}, kOptDriver | kOptLd, maplecl::kHide); -maplecl::Option oFchkpUseStaticBounds({"-fchkp-use-static-bounds"}, - " -fchkp-use-static-bounds \tAllow Pointer Bounds Checker to generate static bounds holding bounds of " - "static variables. \n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-chkp-use-static-bounds"), maplecl::kHide); +maplecl::Option oNostartfiles({"-nostartfiles"}, + " -nostartfiles \tDo not use the standard system startup files when linking. \n", + {driverCategory, ldCategory}, kOptDriver | kOptLd, maplecl::kHide); -maplecl::Option oFchkpUseStaticConstBounds({"-fchkp-use-static-const-bounds"}, - " -fchkp-use-static-const-bounds \tUse statically-initialized bounds for constant bounds instead of generating" - " them each time they are required.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-chkp-use-static-const-bounds"), maplecl::kHide); +maplecl::Option oSharedLibgcc({"-shared-libgcc"}, + " -shared-libgcc \tOn systems that provide libgcc as a shared library, these options force the use" + " of either the shared or static version, respectively.\n", + {driverCategory, ldCategory}, kOptDriver | kOptLd, maplecl::kHide); -maplecl::Option oFchkpUseWrappers({"-fchkp-use-wrappers"}, - " -fchkp-use-wrappers \tAllows Pointer Bounds Checker to replace calls to built-in functions with calls" - " to wrapper functions.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-chkp-use-wrappers"), maplecl::kHide); +maplecl::Option oStaticLibgcc({"-static-libgcc"}, + " -static-libgcc \tOn systems that provide libgcc as a shared library, these options " + "force the use of either the shared or static version, respectively.\n", + {driverCategory, ldCategory}, kOptDriver | kOptLd, maplecl::kHide); -maplecl::Option oFcilkplus({"-fcilkplus"}, - " -fcilkplus \tEnable Cilk Plus.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-cilkplus"), maplecl::kHide); +maplecl::Option oStaticLibstdc({"-static-libstdc++"}, + " -static-libstdc++ \tWhen the g++ program is used to link a C++ program, it normally automatically " + "links against libstdc++. \n", + {driverCategory, ldCategory}, kOptDriver | kOptLd, maplecl::kHide); -maplecl::Option oFcodeHoisting({"-fcode-hoisting"}, - " -fcode-hoisting \tPerform code hoisting. \n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-code-hoisting"), maplecl::kHide); +maplecl::Option oMG({"-MG"}, + " -MG \tTreat missing header files as generated files.\n", + {driverCategory, clangCategory}, kOptFront); -maplecl::Option oFcombineStackAdjustments({"-fcombine-stack-adjustments"}, - " -fcombine-stack-adjustments \tTracks stack adjustments (pushes and pops) and stack memory references and " - "then tries to find ways to combine them.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-combine-stack-adjustments"), maplecl::kHide); +maplecl::Option oMM({"-MM"}, + " -MM \tLike -M but ignore system header files.\n", + {driverCategory, clangCategory}, kOptFront); -maplecl::Option oFcompareDebug({"-fcompare-debug"}, - " -fcompare-debug \tCompile with and without e.g. -gtoggle, and compare the final-insns dump.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-compare-debug"), maplecl::kHide); +maplecl::Option oMMD({"-MMD"}, + " -MMD \tLike -MD but ignore system header files.\n", + {driverCategory, clangCategory}, kOptFront); -maplecl::Option oFcompareDebugE({"-fcompare-debug="}, - " -fcompare-debug= \tCompile with and without e.g. -gtoggle, and compare the final-insns dump.\n", - {driverCategory, unSupCategory}, maplecl::kHide); +maplecl::Option oMP({"-MP"}, + " -MP \tGenerate phony targets for all headers.\n", + {driverCategory, clangCategory}, kOptFront); -maplecl::Option oFcompareDebugSecond({"-fcompare-debug-second"}, - " -fcompare-debug-second tRun only the second compilation of -fcompare-debug.\n", - {driverCategory, unSupCategory}, maplecl::kHide); +maplecl::Option oFgnu89Inline({"-fgnu89-inline"}, + " -fgnu89-inline \tUse traditional GNU semantics for inline functions.\n", + {driverCategory, unSupCategory, hir2mplCategory}, maplecl::DisableWith("-fno-gnu89-inline"), maplecl::kHide); -maplecl::Option oFcompareElim({"-fcompare-elim"}, - " -fcompare-elim \tPerform comparison elimination after register allocation has finished.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-compare-elim"), maplecl::kHide); +maplecl::Option oAnsi({"-ansi", "--ansi"}, + " -ansi \tIn C mode, this is equivalent to -std=c90. In C++ mode, it is equivalent " + "to -std=c++98.\n", + {driverCategory, unSupCategory, hir2mplCategory}, maplecl::kHide); -maplecl::Option oFconcepts({"-fconcepts"}, - " -fconcepts \tEnable support for C++ concepts.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-concepts"), maplecl::kHide); +maplecl::Option oFnoBuiltin({"-fno-builtin", "-fno-builtin-function"}, + " -fno-builtin \tDon't recognize built-in functions that do not begin with '__builtin_' as" + " prefix.\n", + {driverCategory, hir2mplCategory}, kOptCommon | kOptOptimization | kOptMaple); -maplecl::Option oFcondMismatch({"-fcond-mismatch"}, - " -fcond-mismatch \tAllow the arguments of the '?' operator to have different types.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-cond-mismatch"), maplecl::kHide); +maplecl::Option exportMpltInline({"-fexport-inline-mplt"}, + " -fexport-inline-mplt \tExport mplt for cross module inline.\n", + {driverCategory, hir2mplCategory}, kOptCommon | kOptOptimization | kOptMaple, + maplecl::DisableWith("-fno-export-inline-mplt"), maplecl::Init(false)); -maplecl::Option oFconserveStack({"-fconserve-stack"}, - " -fconserve-stack \tDo not perform optimizations increasing noticeably stack usage.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-conserve-stack"), maplecl::kHide); +maplecl::Option importMpltInline({"-fimport-inline-mplt"}, + " -fimport-inline-mplt \tImport mplt for cross module inline.\n", + {driverCategory, mpl2mplCategory}, kOptCommon | kOptOptimization | kOptMaple, + maplecl::DisableWith("-fno-import-inline-mplt"), maplecl::Init(false)); -maplecl::Option oFconstantStringClass({"-fconstant-string-class="}, - " -fconstant-string-class= \tUse class ofor constant strings. No class name specified with %qs\n", - {driverCategory, unSupCategory}, maplecl::kHide); +/* ##################### STRING Options ############################################################### */ -maplecl::Option oFconstexprDepth({"-fconstexpr-depth="}, - " -fconstexpr-depth= \tpecify maximum constexpr recursion depth.\n", - {driverCategory, unSupCategory}, maplecl::kHide); +maplecl::Option help({"--help", "-h"}, + " --help \tPrint help\n", + {driverCategory}, kOptCommon | kOptDriver, maplecl::kOptionalValue); -maplecl::Option oFconstexprLoopLimit({"-fconstexpr-loop-limit="}, - " -fconstexpr-loop-limit= \tSpecify maximum constexpr loop iteration count.\n", - {driverCategory, unSupCategory}, maplecl::kHide); +maplecl::Option infile({"--infile"}, + " --infile file1,file2,file3 \tInput files.\n", + {driverCategory}, kOptMaple); -maplecl::Option oFcpropRegisters({"-fcprop-registers"}, - " -fcprop-registers \tPerform a register copy-propagation optimization pass.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-cprop-registers"), maplecl::kHide); +maplecl::Option mplt({"--mplt", "-mplt"}, + " --mplt=file1,file2,file3 \tImport mplt files.\n", + {driverCategory, dex2mplCategory, jbc2mplCategory}, kOptMaple, maplecl::kHide); -maplecl::Option oFcrossjumping({"-fcrossjumping"}, - " -fcrossjumping \tPerform cross-jumping transformation. This transformation unifies equivalent " - "code and saves code size.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-crossjumping"), maplecl::kHide); +maplecl::Option partO2({"--partO2"}, + " --partO2 \tSet func list for O2.\n", + {driverCategory}, kOptMaple); -maplecl::Option oFcseFollowJumps({"-fcse-follow-jumps"}, - " -fcse-follow-jumps \tWhen running CSE, follow jumps to their targets.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-cse-follow-jumps"), maplecl::kHide); +maplecl::List jbc2mplOpt({"--jbc2mpl-opt"}, + " --jbc2mpl-opt \tSet options for jbc2mpl.\n", + {driverCategory}, kOptMaple, maplecl::kHide); -maplecl::Option oFcseSkipBlocks({"-fcse-skip-blocks"}, - " -fcse-skip-blocks \tDoes nothing. Preserved for backward compatibility.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-cse-skip-blocks"), maplecl::kHide); +maplecl::List hir2mplOpt({"--hir2mpl-opt"}, + " --hir2mpl-opt \tSet options for hir2mpl.\n", + {driverCategory}, kOptMaple, maplecl::kHide); -maplecl::Option oFcxFortranRules({"-fcx-fortran-rules"}, - " -fcx-fortran-rules \tComplex multiplication and division follow Fortran rules.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-cx-fortran-rules"), maplecl::kHide); +maplecl::List clangOpt({"--clang-opt"}, + " --clang-opt \tSet options for clang as AST generator.\n", + {driverCategory}, kOptMaple, maplecl::kHide); -maplecl::Option oFcxLimitedRange({"-fcx-limited-range"}, - " -fcx-limited-range \tOmit range reduction step when performing complex division.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-cx-limited-range"), maplecl::kHide); +maplecl::List asOpt({"--as-opt"}, + " --as-opt \tSet options for as.\n", + {driverCategory}, kOptMaple, maplecl::kHide); -maplecl::Option oFdbgCnt({"-fdbg-cnt"}, - " -fdbg-cnt \tPlace data items into their own section.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dbg-cnt"), maplecl::kHide); +maplecl::List ldOpt({"--ld-opt"}, + " --ld-opt \tSet options for ld.\n", + {driverCategory}, kOptMaple, maplecl::kHide); -maplecl::Option oFdbgCntList({"-fdbg-cnt-list"}, - " -fdbg-cnt-list \tList all available debugging counters with their limits and counts.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dbg-cnt-list"), maplecl::kHide); +maplecl::List dex2mplOpt({"--dex2mpl-opt"}, + " --dex2mpl-opt \tSet options for dex2mpl.\n", + {driverCategory}, kOptMaple, maplecl::kHide); -maplecl::Option oFdce({"-fdce"}, - " -fdce \tUse the RTL dead code elimination pass.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dce"), maplecl::kHide); +maplecl::List mplipaOpt({"--mplipa-opt"}, + " --mplipa-opt \tSet options for mplipa.\n", + {driverCategory}, kOptMaple, maplecl::kHide); -maplecl::Option oFdebugCpp({"-fdebug-cpp"}, - " -fdebug-cpp \tEmit debug annotations during preprocessing.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-debug-cpp"), maplecl::kHide); +maplecl::List mplcgOpt({"--mplcg-opt"}, + " --mplcg-opt \tSet options for mplcg.\n", + {driverCategory}, kOptMaple, maplecl::kHide); -maplecl::Option oFdebugPrefixMap({"-fdebug-prefix-map"}, - " -fdebug-prefix-map \tMap one directory name to another in debug information.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-debug-prefix-map"), maplecl::kHide); +maplecl::List meOpt({"--me-opt"}, + " --me-opt \tSet options for me.\n", + {driverCategory}, kOptMaple, maplecl::kHide); -maplecl::Option oFdebugTypesSection({"-fdebug-types-section"}, - " -fdebug-types-section \tOutput .debug_types section when using DWARF v4 debuginfo.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-debug-types-section"), maplecl::kHide); +maplecl::List mpl2mplOpt({"--mpl2mpl-opt"}, + " --mpl2mpl-opt \tSet options for mpl2mpl.\n", + {driverCategory}, kOptMaple, maplecl::kHide); -maplecl::Option oFdecloneCtorDtor({"-fdeclone-ctor-dtor"}, - " -fdeclone-ctor-dtor \tFactor complex constructors and destructors to favor space over speed.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-declone-ctor-dtor"), maplecl::kHide); +maplecl::Option profile({"--profile"}, + " --profile \tFor PGO optimization. eg: --profile=list_file.\n", + {driverCategory, dex2mplCategory, mpl2mplCategory, cgCategory}, kOptCommon); -maplecl::Option oFdeduceInitList({"-fdeduce-init-list"}, - " -fdeduce-init-list \tenable deduction of std::initializer_list for a template type parameter " - "from a brace-enclosed initializer-list.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-deduce-init-list"), maplecl::kHide); +maplecl::Option run({"--run"}, + " --run=cmd1:cmd2 \tThe name of executables that are going to execute. IN SEQUENCE.\nSeparated " + "by \":\".Available exe names: jbc2mpl, me, mpl2mpl, mplcg. Input file must match the tool can handle.\n", + {driverCategory}, kOptMaple, maplecl::kHide); -maplecl::Option oFdelayedBranch({"-fdelayed-branch"}, - " -fdelayed-branch \tAttempt to fill delay slots of branch instructions.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-delayed-branch"), maplecl::kHide); +maplecl::Option optionOpt({"--option"}, + " --option=\"opt1:opt2\" \tOptions for each executable, separated by \":\". The sequence must match the " + "sequence in --run.\n", + {driverCategory}, kOptMaple, maplecl::kHide); -maplecl::Option oFdeleteDeadExceptions({"-fdelete-dead-exceptions"}, - " -fdelete-dead-exceptions \tDelete dead instructions that may throw exceptions.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-delete-dead-exceptions"), maplecl::kHide); +maplecl::List ldLib({"-l"}, + " -l \tLinks with a library file.\n", + {driverCategory, ldCategory}, kOptDriver | kOptLd, maplecl::kJoinedValue); -maplecl::Option oFdeleteNullPointerChecks({"-fdelete-null-pointer-checks"}, - " -fdelete-null-pointer-checks \tDelete useless null pointer checks.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-delete-null-pointer-checks"), maplecl::kHide); +maplecl::List ldLibPath({"-L"}, + " -L \tAdd directory to library search path.\n", + {driverCategory, ldCategory}, kOptDriver | kOptLd, maplecl::kJoinedValue); -maplecl::Option oFdevirtualize({"-fdevirtualize"}, - " -fdevirtualize \tTry to convert virtual calls to direct ones.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-devirtualize"), maplecl::kHide); +maplecl::List enableMacro({"-D"}, + " -D = \tDefine to (or 1 if omitted).\n", + {driverCategory, clangCategory}, kOptFront, maplecl::kJoinedValue); -maplecl::Option oFdevirtualizeAtLtrans({"-fdevirtualize-at-ltrans"}, - " -fdevirtualize-at-ltrans \tStream extra data to support more aggressive devirtualization in LTO local " - "transformation mode.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-devirtualize-at-ltrans"), maplecl::kHide); +maplecl::List disableMacro({"-U"}, + " -U \tUndefine macro .\n", + {driverCategory, clangCategory}, kOptFront, maplecl::kJoinedValue); -maplecl::Option oFdevirtualizeSpeculatively({"-fdevirtualize-speculatively"}, - " -fdevirtualize-speculatively \tPerform speculative devirtualization.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-devirtualize-speculatively"), maplecl::kHide); +maplecl::List includeDir({"-I"}, + " -I \tAdd directory to include search path.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::kJoinedValue); -maplecl::Option oFdiagnosticsGeneratePatch({"-fdiagnostics-generate-patch"}, - " -fdiagnostics-generate-patch \tPrint fix-it hints to stderr in unified diff format.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-diagnostics-generate-patch"), maplecl::kHide); +maplecl::List includeSystem({"-isystem"}, + " -isystem \tAdd directory to SYSTEM include search path.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::kJoinedValue); -maplecl::Option oFdiagnosticsParseableFixits({"-fdiagnostics-parseable-fixits"}, - " -fdiagnostics-parseable-fixits \tPrint fixit hints in machine-readable form.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-diagnostics-parseable-fixits"), maplecl::kHide); +maplecl::Option output({"-o"}, + " -o \tPlace the output into .\n", + {driverCategory}, kOptMaple | kOptDriver | kOptCommon, maplecl::kJoinedValue, maplecl::Init("a.out")); -maplecl::Option oFdiagnosticsShowCaret({"-fdiagnostics-show-caret"}, - " -fdiagnostics-show-caret \tShow the source line with a caret indicating the column.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-diagnostics-show-caret"), maplecl::kHide); +maplecl::Option saveTempOpt({"--save-temps"}, + " --save-temps \tDo not delete intermediate files. --save-temps Save all intermediate files.\n" + " \t--save-temps=file1,file2,file3 Save the target files.\n", + {driverCategory}, kOptDriver, maplecl::kOptionalValue); -maplecl::Option oFdiagnosticsShowLocation({"-fdiagnostics-show-location"}, - " -fdiagnostics-show-location \tHow often to emit source location at the beginning of line-wrapped diagnostics.\n", - {driverCategory, unSupCategory}, maplecl::kHide); +maplecl::Option target({"--target", "-target"}, + " --target= \tDescribe target platform. Example: --target=aarch64-gnu or " + "--target=aarch64_be-gnuilp32\n", + {driverCategory, clangCategory, hir2mplCategory, dex2mplCategory, ipaCategory}, kOptFront | kOptNotFiltering); -maplecl::Option oFdiagnosticsShowOption({"-fdiagnostics-show-option"}, - " -fdiagnostics-show-option \tAmend appropriate diagnostic messages with the command line option that " - "controls them.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--fno-diagnostics-show-option"), maplecl::kHide); +maplecl::Option oMT({"-MT"}, + " -MT \tSpecify name of main file output in depfile.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::kJoinedValue); -maplecl::Option oFdirectivesOnly({"-fdirectives-only"}, - " -fdirectives-only \tPreprocess directives only.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-fdirectives-only"), maplecl::kHide); +maplecl::Option oMF({"-MF"}, + " -MF \tWrite depfile output from -MD, -M to .\n", + {driverCategory, clangCategory}, kOptFront, maplecl::kJoinedValue); -maplecl::Option oFdisable({"-fdisable-"}, - " -fdisable- \t-fdisable-[tree|rtl|ipa]-=range1+range2 disables an optimization pass.\n", - {driverCategory, unSupCategory}, maplecl::kHide); +maplecl::Option oWl({"-Wl"}, + " -Wl, \tPass the comma separated arguments in to the linker.\n", + {driverCategory, ldCategory}, kOptDriver | kOptLd, maplecl::kJoinedValue); -maplecl::Option oFdollarsInIdentifiers({"-fdollars-in-identifiers"}, - " -fdollars-in-identifiers \tPermit '$' as an identifier character.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-fno-dollars-in-identifiers")); +maplecl::Option fVisibility({"-fvisibility"}, + " -fvisibility=[default|hidden|protected|internal]\n" + " \tSet the default symbol visibility for every global declaration unless " + "overridden within the code.\n", {driverCategory}, kOptCommon); -maplecl::Option oFdse({"-fdse"}, - " -fdse \tUse the RTL dead store elimination pass.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dse"), maplecl::kHide); +maplecl::Option aggressiveTlsWarmupFunction({"--tls-warmup-function"}, + " --tls-warmup-function \taggressive tls warmup function\n", + {driverCategory}); -maplecl::Option oFdumpAdaSpec({"-fdump-ada-spec"}, - " -fdump-ada-spec \tWrite all declarations as Ada code transitively.\n", - {driverCategory, unSupCategory}, maplecl::kHide); +maplecl::Option sysRoot({"--sysroot"}, + " --sysroot \tSet the root directory of the target platform.\n" + " --sysroot= \tSet the root directory of the target platform.\n", + {driverCategory, clangCategory, ldCategory}, kOptFront | kOptDriver | kOptLd | kOptNotFiltering); -maplecl::Option oFdumpClassHierarchy({"-fdump-class-hierarchy"}, - " -fdump-class-hierarchy \tC++ only.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-class-hierarchy"), maplecl::kHide); +maplecl::Option specs({"-specs"}, + " -specs \tOverride built-in specs with the contents of .\n", + {driverCategory, asCategory, ldCategory}, kOptDriver | kOptLd); -maplecl::Option oFdumpFinalInsns({"-fdump-final-insns"}, - " -fdump-final-insns \tDump the final internal representation (RTL) to file.\n", - {driverCategory, unSupCategory}, maplecl::kHide); +maplecl::Option folder({"-tmp-folder"}, + " -tmp-folder \tsave former folder when generating multiple output.\n", + {driverCategory}, kOptMaple, maplecl::kHide); -maplecl::Option oFdumpGoSpec({"-fdump-go-spec="}, - " -fdump-go-spec \tWrite all declarations to file as Go code.\n", - {driverCategory, unSupCategory}, maplecl::kHide); +maplecl::Option imacros({"-imacros", "--imacros"}, + " -imacros \tExactly like '-include', except that any output produced by scanning FILE is " + "thrown away.\n", + {driverCategory, clangCategory}, kOptFront); -maplecl::Option oFdumpIpa({"-fdump-ipa"}, - " -fdump-ipa \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); +maplecl::Option fdiagnosticsColor({"-fdiagnostics-color"}, + " -fdiagnostics-color \tUse color in diagnostics. WHEN is 'never', 'always', or 'auto'.\n", + {driverCategory, clangCategory, asCategory, ldCategory}, kOptFront | kOptCommon | kOptLd | kOptNotFiltering); -maplecl::Option oFdumpNoaddr({"-fdump-noaddr"}, - " -fdump-noaddr \tSuppress output of addresses in debugging dumps.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-noaddr"), maplecl::kHide); +maplecl::Option mtlsSize({"-mtls-size"}, + " -mtls-size \tSpecify bit size of immediate TLS offsets. Valid values are 12, 24, 32, 48. " + "This option requires binutils 2.26 or newer.\n", + {driverCategory, asCategory, ldCategory}); -maplecl::Option oFdumpPasses({"-fdump-passes"}, - " -fdump-passes \tDump optimization passes.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-passes"), maplecl::kHide); +maplecl::Option ftlsModel({"-ftls-model"}, + " -ftls-model=[global-dynamic|local-dynamic|initial-exec|local-exec|warmup-dynamic]\n" + " \tAlter the thread-local storage model to be used.\n", + {driverCategory}, kOptCommon); -maplecl::Option oFdumpRtlAlignments({"-fdump-rtl-alignments"}, - " -fdump-rtl-alignments \tDump after branch alignments have been computed.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oFdumpRtlAll({"-fdump-rtl-all"}, - " -fdump-rtl-all \tProduce all the dumps listed above.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-all"), maplecl::kHide); - -maplecl::Option oFdumpRtlAsmcons({"-fdump-rtl-asmcons"}, - " -fdump-rtl-asmcons \tDump after fixing rtl statements that have unsatisfied in/out constraints.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-asmcons"), maplecl::kHide); - -maplecl::Option oFdumpRtlAuto_inc_dec({"-fdump-rtl-auto_inc_dec"}, - " -fdump-rtl-auto_inc_dec \tDump after auto-inc-dec discovery. \n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-auto_inc_dec"), maplecl::kHide); - -maplecl::Option oFdumpRtlBarriers({"-fdump-rtl-barriers"}, - " -fdump-rtl-barriers \tDump after cleaning up the barrier instructions.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-barriers"), maplecl::kHide); - -maplecl::Option oFdumpRtlBbpart({"-fdump-rtl-bbpart"}, - " -fdump-rtl-bbpart \tDump after partitioning hot and cold basic blocks.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-bbpart"), maplecl::kHide); - -maplecl::Option oFdumpRtlBbro({"-fdump-rtl-bbro"}, - " -fdump-rtl-bbro \tDump after block reordering.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-bbro"), maplecl::kHide); - -maplecl::Option oFdumpRtlBtl2({"-fdump-rtl-btl2"}, - " -fdump-rtl-btl2 \t-fdump-rtl-btl1 and -fdump-rtl-btl2 enable dumping after the two branch target " - "load optimization passes.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-btl2"), maplecl::kHide); - -maplecl::Option oFdumpRtlBypass({"-fdump-rtl-bypass"}, - " -fdump-rtl-bypass \tDump after jump bypassing and control flow optimizations.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-bypass"), maplecl::kHide); - -maplecl::Option oFdumpRtlCe1({"-fdump-rtl-ce1"}, - " -fdump-rtl-ce1 \tEnable dumping after the three if conversion passes.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-ce1"), maplecl::kHide); - -maplecl::Option oFdumpRtlCe2({"-fdump-rtl-ce2"}, - " -fdump-rtl-ce2 \tEnable dumping after the three if conversion passes.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-ce2"), maplecl::kHide); - -maplecl::Option oFdumpRtlCe3({"-fdump-rtl-ce3"}, - " -fdump-rtl-ce3 \tEnable dumping after the three if conversion passes.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-ce3"), maplecl::kHide); - -maplecl::Option oFdumpRtlCombine({"-fdump-rtl-combine"}, - " -fdump-rtl-combine \tDump after the RTL instruction combination pass.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-combine"), maplecl::kHide); - -maplecl::Option oFdumpRtlCompgotos({"-fdump-rtl-compgotos"}, - " -fdump-rtl-compgotos \tDump after duplicating the computed gotos.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-compgotos"), maplecl::kHide); - -maplecl::Option oFdumpRtlCprop_hardreg({"-fdump-rtl-cprop_hardreg"}, - " -fdump-rtl-cprop_hardreg \tDump after hard register copy propagation.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-cprop_hardreg"), maplecl::kHide); - -maplecl::Option oFdumpRtlCsa({"-fdump-rtl-csa"}, - " -fdump-rtl-csa \tDump after combining stack adjustments.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-csa"), maplecl::kHide); - -maplecl::Option oFdumpRtlCse1({"-fdump-rtl-cse1"}, - " -fdump-rtl-cse1 \tEnable dumping after the two common subexpression elimination passes.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-cse1"), maplecl::kHide); - -maplecl::Option oFdumpRtlCse2({"-fdump-rtl-cse2"}, - " -fdump-rtl-cse2 \tEnable dumping after the two common subexpression elimination passes.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-cse2"), maplecl::kHide); - -maplecl::Option oFdumpRtlDbr({"-fdump-rtl-dbr"}, - " -fdump-rtl-dbr \tDump after delayed branch scheduling.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-dbr"), maplecl::kHide); - -maplecl::Option oFdumpRtlDce({"-fdump-rtl-dce"}, - " -fdump-rtl-dce \tDump after the standalone dead code elimination passes.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-fdump-rtl-dce"), maplecl::kHide); - -maplecl::Option oFdumpRtlDce1({"-fdump-rtl-dce1"}, - " -fdump-rtl-dce1 \tenable dumping after the two dead store elimination passes.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-dce1"), maplecl::kHide); - -maplecl::Option oFdumpRtlDce2({"-fdump-rtl-dce2"}, - " -fdump-rtl-dce2 \tenable dumping after the two dead store elimination passes.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-dce2"), maplecl::kHide); - -maplecl::Option oFdumpRtlDfinish({"-fdump-rtl-dfinish"}, - " -fdump-rtl-dfinish \tThis dump is defined but always produce empty files.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-dfinish"), maplecl::kHide); - -maplecl::Option oFdumpRtlDfinit({"-fdump-rtl-dfinit"}, - " -fdump-rtl-dfinit \tThis dump is defined but always produce empty files.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-dfinit"), maplecl::kHide); - -maplecl::Option oFdumpRtlEh({"-fdump-rtl-eh"}, - " -fdump-rtl-eh \tDump after finalization of EH handling code.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-eh"), maplecl::kHide); - -maplecl::Option oFdumpRtlEh_ranges({"-fdump-rtl-eh_ranges"}, - " -fdump-rtl-eh_ranges \tDump after conversion of EH handling range regions.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-eh_ranges"), maplecl::kHide); - -maplecl::Option oFdumpRtlExpand({"-fdump-rtl-expand"}, - " -fdump-rtl-expand \tDump after RTL generation.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-expand"), maplecl::kHide); - -maplecl::Option oFdumpRtlFwprop1({"-fdump-rtl-fwprop1"}, - " -fdump-rtl-fwprop1 \tenable dumping after the two forward propagation passes.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-fwprop1"), maplecl::kHide); - -maplecl::Option oFdumpRtlFwprop2({"-fdump-rtl-fwprop2"}, - " -fdump-rtl-fwprop2 \tenable dumping after the two forward propagation passes.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-fwprop2"), maplecl::kHide); - -maplecl::Option oFdumpRtlGcse1({"-fdump-rtl-gcse1"}, - " -fdump-rtl-gcse1 \tenable dumping after global common subexpression elimination.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-gcse1"), maplecl::kHide); - -maplecl::Option oFdumpRtlGcse2({"-fdump-rtl-gcse2"}, - " -fdump-rtl-gcse2 \tenable dumping after global common subexpression elimination.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-gcse2"), maplecl::kHide); - -maplecl::Option oFdumpRtlInitRegs({"-fdump-rtl-init-regs"}, - " -fdump-rtl-init-regs \tDump after the initialization of the registers.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tedump-rtl-init-regsst"), maplecl::kHide); - -maplecl::Option oFdumpRtlInitvals({"-fdump-rtl-initvals"}, - " -fdump-rtl-initvals \tDump after the computation of the initial value sets.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-initvals"), maplecl::kHide); - -maplecl::Option oFdumpRtlInto_cfglayout({"-fdump-rtl-into_cfglayout"}, - " -fdump-rtl-into_cfglayout \tDump after converting to cfglayout mode.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-into_cfglayout"), maplecl::kHide); - -maplecl::Option oFdumpRtlIra({"-fdump-rtl-ira"}, - " -fdump-rtl-ira \tDump after iterated register allocation.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-ira"), maplecl::kHide); - -maplecl::Option oFdumpRtlJump({"-fdump-rtl-jump"}, - " -fdump-rtl-jump \tDump after the second jump optimization.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-jump"), maplecl::kHide); - -maplecl::Option oFdumpRtlLoop2({"-fdump-rtl-loop2"}, - " -fdump-rtl-loop2 \tenables dumping after the rtl loop optimization passes.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-loop2"), maplecl::kHide); - -maplecl::Option oFdumpRtlMach({"-fdump-rtl-mach"}, - " -fdump-rtl-mach \tDump after performing the machine dependent reorganization pass, " - "if that pass exists.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-mach"), maplecl::kHide); - -maplecl::Option oFdumpRtlMode_sw({"-fdump-rtl-mode_sw"}, - " -fdump-rtl-mode_sw \tDump after removing redundant mode switches.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-mode_sw"), maplecl::kHide); - -maplecl::Option oFdumpRtlOutof_cfglayout({"-fdump-rtl-outof_cfglayout"}, - " -fdump-rtl-outof_cfglayout \tDump after converting from cfglayout mode.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-outof_cfglayout"), maplecl::kHide); - -maplecl::Option oFdumpRtlPass({"-fdump-rtl-pass"}, - " -fdump-rtl-pass \tSays to make debugging dumps during compilation at times specified by letters.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oFdumpRtlPeephole2({"-fdump-rtl-peephole2"}, - " -fdump-rtl-peephole2 \tDump after the peephole pass.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-peephole2"), maplecl::kHide); - -maplecl::Option oFdumpRtlPostreload({"-fdump-rtl-postreload"}, - " -fdump-rtl-postreload \tDump after post-reload optimizations.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-postreload"), maplecl::kHide); - -maplecl::Option oFdumpRtlPro_and_epilogue({"-fdump-rtl-pro_and_epilogue"}, - " -fdump-rtl-pro_and_epilogue \tDump after generating the function prologues and epilogues.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-pro_and_epilogue"), maplecl::kHide); - -maplecl::Option oFdumpRtlRee({"-fdump-rtl-ree"}, - " -fdump-rtl-ree \tDump after sign/zero extension elimination.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-ree"), maplecl::kHide); - -maplecl::Option oFdumpRtlRegclass({"-fdump-rtl-regclass"}, - " -fdump-rtl-regclass \tThis dump is defined but always produce empty files.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-regclass"), maplecl::kHide); - -maplecl::Option oFdumpRtlRnreg({"-fdump-rtl-rnreg"}, - " -fdump-rtl-rnreg \tDump after register renumbering.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-rnreg"), maplecl::kHide); - -maplecl::Option oFdumpRtlSched1({"-fdump-rtl-sched1"}, - " -fdump-rtl-sched1 \tnable dumping after the basic block scheduling passes.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-sched1"), maplecl::kHide); - -maplecl::Option oFdumpRtlSched2({"-fdump-rtl-sched2"}, - " -fdump-rtl-sched2 \tnable dumping after the basic block scheduling passes.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-sched2"), maplecl::kHide); - -maplecl::Option oFdumpRtlSeqabstr({"-fdump-rtl-seqabstr"}, - " -fdump-rtl-seqabstr \tDump after common sequence discovery.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-seqabstr"), maplecl::kHide); - -maplecl::Option oFdumpRtlShorten({"-fdump-rtl-shorten"}, - " -fdump-rtl-shorten \tDump after shortening branches.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-shorten"), maplecl::kHide); - -maplecl::Option oFdumpRtlSibling({"-fdump-rtl-sibling"}, - " -fdump-rtl-sibling \tDump after sibling call optimizations.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-sibling"), maplecl::kHide); - -maplecl::Option oFdumpRtlSms({"-fdump-rtl-sms"}, - " -fdump-rtl-sms \tDump after modulo scheduling. This pass is only run on some architectures.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-sms"), maplecl::kHide); - -maplecl::Option oFdumpRtlSplit1({"-fdump-rtl-split1"}, - " -fdump-rtl-split1 \tThis option enable dumping after five rounds of instruction splitting.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-split1"), maplecl::kHide); - -maplecl::Option oFdumpRtlSplit2({"-fdump-rtl-split2"}, - " -fdump-rtl-split2 \tThis option enable dumping after five rounds of instruction splitting.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-split2"), maplecl::kHide); - -maplecl::Option oFdumpRtlSplit3({"-fdump-rtl-split3"}, - " -fdump-rtl-split3 \tThis option enable dumping after five rounds of instruction splitting.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-split3"), maplecl::kHide); - -maplecl::Option oFdumpRtlSplit4({"-fdump-rtl-split4"}, - " -fdump-rtl-split4 \tThis option enable dumping after five rounds of instruction splitting.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-split4"), maplecl::kHide); - -maplecl::Option oFdumpRtlSplit5({"-fdump-rtl-split5"}, - " -fdump-rtl-split5 \tThis option enable dumping after five rounds of instruction splitting.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-split5"), maplecl::kHide); - -maplecl::Option oFdumpRtlStack({"-fdump-rtl-stack"}, - " -fdump-rtl-stack \tDump after conversion from GCC's 'flat register file' registers to the x87's " - "stack-like registers. This pass is only run on x86 variants.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-stack"), maplecl::kHide); - -maplecl::Option oFdumpRtlSubreg1({"-fdump-rtl-subreg1"}, - " -fdump-rtl-subreg1 \tenable dumping after the two subreg expansion passes.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-subreg1"), maplecl::kHide); - -maplecl::Option oFdumpRtlSubreg2({"-fdump-rtl-subreg2"}, - " -fdump-rtl-subreg2 \tenable dumping after the two subreg expansion passes.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-subreg2"), maplecl::kHide); - -maplecl::Option oFdumpRtlSubregs_of_mode_finish({"-fdump-rtl-subregs_of_mode_finish"}, - " -fdump-rtl-subregs_of_mode_finish \tThis dump is defined but always produce empty files.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-subregs_of_mode_finish"), maplecl::kHide); - -maplecl::Option oFdumpRtlSubregs_of_mode_init({"-fdump-rtl-subregs_of_mode_init"}, - " -fdump-rtl-subregs_of_mode_init \tThis dump is defined but always produce empty files.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-subregs_of_mode_init"), maplecl::kHide); - -maplecl::Option oFdumpRtlUnshare({"-fdump-rtl-unshare"}, - " -fdump-rtl-unshare \tDump after all rtl has been unshared.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-unshare"), maplecl::kHide); - -maplecl::Option oFdumpRtlVartrack({"-fdump-rtl-vartrack"}, - " -fdump-rtl-vartrack \tDump after variable tracking.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-vartrack"), maplecl::kHide); - -maplecl::Option oFdumpRtlVregs({"-fdump-rtl-vregs"}, - " -fdump-rtl-vregs \tDump after converting virtual registers to hard registers.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-vregs"), maplecl::kHide); - -maplecl::Option oFdumpRtlWeb({"-fdump-rtl-web"}, - " -fdump-rtl-web \tDump after live range splitting.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-web"), maplecl::kHide); - -maplecl::Option oFdumpStatistics({"-fdump-statistics"}, - " -fdump-statistics \tEnable and control dumping of pass statistics in a separate file.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-statistics"), maplecl::kHide); - -maplecl::Option oFdumpTranslationUnit({"-fdump-translation-unit"}, - " -fdump-translation-unit \tC++ only\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-translation-unit"), maplecl::kHide); - -maplecl::Option oFdumpTree({"-fdump-tree"}, - " -fdump-tree \tControl the dumping at various stages of processing the intermediate language " - "tree to a file.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-tree"), maplecl::kHide); - -maplecl::Option oFdumpTreeAll({"-fdump-tree-all"}, - " -fdump-tree-all \tControl the dumping at various stages of processing the intermediate " - "language tree to a file.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-tree-all"), maplecl::kHide); - -maplecl::Option oFdumpUnnumbered({"-fdump-unnumbered"}, - " -fdump-unnumbered \tWhen doing debugging dumps, suppress instruction numbers and address output. \n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-unnumbered"), maplecl::kHide); - -maplecl::Option oFdumpUnnumberedLinks({"-fdump-unnumbered-links"}, - " -fdump-unnumbered-links \tWhen doing debugging dumps (see -d option above), suppress instruction numbers " - "for the links to the previous and next instructions in a sequence.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-unnumbered-links"), maplecl::kHide); - -maplecl::Option oFdwarf2CfiAsm({"-fdwarf2-cfi-asm"}, - " -fdwarf2-cfi-asm \tEnable CFI tables via GAS assembler directives.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dwarf2-cfi-asm"), maplecl::kHide); - -maplecl::Option oFearlyInlining({"-fearly-inlining"}, - " -fearly-inlining \tPerform early inlining.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-early-inlining"), maplecl::kHide); - -maplecl::Option oFeliminateDwarf2Dups({"-feliminate-dwarf2-dups"}, - " -feliminate-dwarf2-dups \tPerform DWARF duplicate elimination.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-eliminate-dwarf2-dups"), maplecl::kHide); - -maplecl::Option oFeliminateUnusedDebugSymbols({"-feliminate-unused-debug-symbols"}, - " -feliminate-unused-debug-symbols \tPerform unused symbol elimination in debug info.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-feliminate-unused-debug-symbols"), maplecl::kHide); - -maplecl::Option oFeliminateUnusedDebugTypes({"-feliminate-unused-debug-types"}, - " -feliminate-unused-debug-types \tPerform unused type elimination in debug info.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-eliminate-unused-debug-types"), maplecl::kHide); - -maplecl::Option oFemitClassDebugAlways({"-femit-class-debug-always"}, - " -femit-class-debug-always \tDo not suppress C++ class debug information.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-emit-class-debug-always"), maplecl::kHide); - -maplecl::Option oFemitStructDebugBaseonly({"-femit-struct-debug-baseonly"}, - " -femit-struct-debug-baseonly \tAggressive reduced debug info for structs.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-emit-struct-debug-baseonly"), maplecl::kHide); - -maplecl::Option oFemitStructDebugDetailedE({"-femit-struct-debug-detailed="}, - " -femit-struct-debug-detailed \t-femit-struct-debug-detailed= oDetailed reduced debug info for " - "structs.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oFemitStructDebugReduced({"-femit-struct-debug-reduced"}, - " -femit-struct-debug-reduced \tConservative reduced debug info for structs.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-emit-struct-debug-reduced"), maplecl::kHide); - -maplecl::Option oFenable({"-fenable-"}, - " -fenable- \t-fenable-[tree|rtl|ipa]-=range1+range2 enables an optimization pass.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oFexceptions({"-fexceptions"}, - " -fexceptions \tEnable exception handling.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-exceptions"), maplecl::kHide); - -maplecl::Option oFexcessPrecision({"-fexcess-precision="}, - " -fexcess-precision= \tSpecify handling of excess floating-point precision.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oFexecCharset({"-fexec-charset="}, - " -fexec-charset= \tConvert all strings and character constants to character set .\n", - {driverCategory, clangCategory}); - -maplecl::Option oFexpensiveOptimizations({"-fexpensive-optimizations"}, - " -fexpensive-optimizations \tPerform a number of minor, expensive optimizations.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-expensive-optimizations"), maplecl::kHide); - -maplecl::Option oFextNumericLiterals({"-fext-numeric-literals"}, - " -fext-numeric-literals \tInterpret imaginary, fixed-point, or other gnu number suffix as the " - "corresponding number literal rather than a user-defined number literal.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-ext-numeric-literals"), maplecl::kHide); - -maplecl::Option oFextendedIdentifiers({"-fextended-identifiers"}, - " -fextended-identifiers \tPermit universal character names (\\u and \\U) in identifiers.\n", - {driverCategory, clangCategory}); - -maplecl::Option oFnoExtendedIdentifiers({"-fno-extended-identifiers"}, - " -fno-extended-identifiers \tDon't ermit universal character names (\\u and \\U) in identifiers.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oFexternTlsInit({"-fextern-tls-init"}, - " -fextern-tls-init \tSupport dynamic initialization of thread-local variables in a different " - "translation unit.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-extern-tls-init"), maplecl::kHide); - -maplecl::Option oFfastMath({"-ffast-math"}, - " -ffast-math \tThis option causes the preprocessor macro __FAST_MATH__ to be defined.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-fast-math"), maplecl::kHide); - -maplecl::Option oFfatLtoObjects({"-ffat-lto-objects"}, - " -ffat-lto-objects \tOutput lto objects containing both the intermediate language and binary output.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-fat-lto-objects"), maplecl::kHide); - -maplecl::Option oFfiniteMathOnly({"-ffinite-math-only"}, - " -ffinite-math-only \tAssume no NaNs or infinities are generated.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-finite-math-only"), maplecl::kHide); - -maplecl::Option oFfixAndContinue({"-ffix-and-continue"}, - " -ffix-and-continue \tGenerate code suitable for fast turnaround development, such as to allow GDB" - " to dynamically load .o files into already-running programs.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-fix-and-continue"), maplecl::kHide); - -maplecl::Option oFfixed({"-ffixed-"}, - " -ffixed- \t-ffixed- Mark oas being unavailable to the compiler.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oFfloatStore({"-ffloat-store"}, - " -ffloat-store \ton't allocate floats and doubles in extended-precision registers.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-float-store"), maplecl::kHide); - -maplecl::Option oFforScope({"-ffor-scope"}, - " -ffor-scope \tScope of for-init-statement variables is local to the loop.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-for-scope"), maplecl::kHide); - -maplecl::Option oFforwardPropagate({"-fforward-propagate"}, - " -fforward-propagate \tPerform a forward propagation pass on RTL.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oFfpContract ({"-ffp-contract="}, - " -ffp-contract= \tPerform floating-point expression contraction.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oFfreestanding({"-ffreestanding"}, - " -ffreestanding \tDo not assume that standard C libraries and 'main' exist.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-freestanding"), maplecl::kHide); - -maplecl::Option oFfriendInjection({"-ffriend-injection"}, - " -ffriend-injection \tInject friend functions into enclosing namespace.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-friend-injection"), maplecl::kHide); - -maplecl::Option oFgcse({"-fgcse"}, - " -fgcse \tPerform global common subexpression elimination.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-gcse"), maplecl::kHide); - -maplecl::Option oFgcseAfterReload({"-fgcse-after-reload"}, - " -fgcse-after-reload \t-fgcse-after-reload\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-gcse-after-reload"), maplecl::kHide); - -maplecl::Option oFgcseLas({"-fgcse-las"}, - " -fgcse-las \tPerform redundant load after store elimination in global common subexpression " - "elimination.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-gcse-las"), maplecl::kHide); - -maplecl::Option oFgcseLm({"-fgcse-lm"}, - " -fgcse-lm \tPerform enhanced load motion during global common subexpression elimination.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-gcse-lm"), maplecl::kHide); - -maplecl::Option oFgcseSm({"-fgcse-sm"}, - " -fgcse-sm \tPerform store motion after global common subexpression elimination.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-gcse-sm"), maplecl::kHide); - -maplecl::Option oFgimple({"-fgimple"}, - " -fgimple \tEnable parsing GIMPLE.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-gimple"), maplecl::kHide); - -maplecl::Option oFgnuRuntime({"-fgnu-runtime"}, - " -fgnu-runtime \tGenerate code for GNU runtime environment.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-gnu-runtime"), maplecl::kHide); - -maplecl::Option oFgnuTm({"-fgnu-tm"}, - " -fgnu-tm \tEnable support for GNU transactional memory.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-gnu-tm"), maplecl::kHide); - -maplecl::Option oFgnu89Inline({"-fgnu89-inline"}, - " -fgnu89-inline \tUse traditional GNU semantics for inline functions.\n", - {driverCategory, unSupCategory, hir2mplCategory}, maplecl::DisableWith("-fno-gnu89-inline"), maplecl::kHide); - -maplecl::Option oFgraphiteIdentity({"-fgraphite-identity"}, - " -fgraphite-identity \tEnable Graphite Identity transformation.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-graphite-identity"), maplecl::kHide); - -maplecl::Option oFhoistAdjacentLoads({"-fhoist-adjacent-loads"}, - " -fhoist-adjacent-loads \tEnable hoisting adjacent loads to encourage generating conditional move" - " instructions.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-hoist-adjacent-loads"), maplecl::kHide); - -maplecl::Option oFhosted({"-fhosted"}, - " -fhosted \tAssume normal C execution environment.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-hosted"), maplecl::kHide); - -maplecl::Option oFifConversion({"-fif-conversion"}, - " -fif-conversion \tPerform conversion of conditional jumps to branchless equivalents.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-if-conversion"), maplecl::kHide); - -maplecl::Option oFifConversion2({"-fif-conversion2"}, - " -fif-conversion2 \tPerform conversion of conditional jumps to conditional execution.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-if-conversion2"), maplecl::kHide); - -maplecl::Option oFilelist({"-filelist"}, - " -filelist \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oFindirectData({"-findirect-data"}, - " -findirect-data \tGenerate code suitable for fast turnaround development, such as to allow " - "GDB to dynamically load .o files into already-running programs\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-indirect-data"), maplecl::kHide); - -maplecl::Option oFindirectInlining({"-findirect-inlining"}, - " -findirect-inlining tPerform indirect inlining.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-indirect-inlining"), maplecl::kHide); - -maplecl::Option oFinhibitSizeDirective({"-finhibit-size-directive"}, - " -finhibit-size-directive \tDo not generate .size directives.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-inhibit-size-directive"), maplecl::kHide); - -maplecl::Option oFinlineFunctions({"-finline-functions"}, - " -finline-functions \tIntegrate functions not declared 'inline' into their callers when profitable.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-inline-functions"), maplecl::kHide); - -maplecl::Option oFinlineFunctionsCalledOnce({"-finline-functions-called-once"}, - " -finline-functions-called-once \tIntegrate functions only required by their single caller.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-inline-functions-called-once"), maplecl::kHide); - -maplecl::Option oFinlineLimit({"-finline-limit-"}, - " -finline-limit- \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oFinlineLimitE({"-finline-limit="}, - " -finline-limit= \tLimit the size of inlined functions to .\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oFinlineMatmulLimitE({"-finline-matmul-limit="}, - " -finline-matmul-limit= \tecify the size of the largest matrix for which matmul will be inlined.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oFinlineSmallFunctions({"-finline-small-functions"}, - " -finline-small-functions \tIntegrate functions into their callers when code size is known not to grow.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-inline-small-functions"), maplecl::kHide); - -maplecl::Option oFinputCharset({"-finput-charset="}, - " -finput-charset= \tSpecify the default character set for source files.\n", - {driverCategory, clangCategory}); - -maplecl::Option oFinstrumentFunctions({"-finstrument-functions"}, - " -finstrument-functions \tInstrument function entry and exit with profiling calls.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-instrument-functions"), maplecl::kHide); - -maplecl::Option oFinstrumentFunctionsExcludeFileList({"-finstrument-functions-exclude-file-list="}, - " -finstrument-functions-exclude-file-list= \tDo not instrument functions listed in files.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oFinstrumentFunctionsExcludeFunctionList({"-finstrument-functions-exclude-function-list="}, - " -finstrument-functions-exclude-function-list= \tDo not instrument listed functions.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oFipaCp({"-fipa-cp"}, - " -fipa-cp \tPerform interprocedural constant propagation.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-ipa-cp"), maplecl::kHide); - -maplecl::Option oFipaCpClone({"-fipa-cp-clone"}, - " -fipa-cp-clone \tPerform cloning to make Interprocedural constant propagation stronger.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-ipa-cp-clone"), maplecl::kHide); - -maplecl::Option oFipaIcf({"-fipa-icf"}, - " -fipa-icf \tPerform Identical Code Folding for functions and read-only variables.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-ipa-icf"), maplecl::kHide); - -maplecl::Option oFipaProfile({"-fipa-profile"}, - " -fipa-profile \tPerform interprocedural profile propagation.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-ipa-profile"), maplecl::kHide); - -maplecl::Option oFipaPta({"-fipa-pta"}, - " -fipa-pta \tPerform interprocedural points-to analysis.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-ipa-pta"), maplecl::kHide); - -maplecl::Option oFipaPureConst({"-fipa-pure-const"}, - " -fipa-pure-const \tDiscover pure and const functions.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-ipa-pure-const"), maplecl::kHide); - -maplecl::Option oFipaRa({"-fipa-ra"}, - " -fipa-ra \tUse caller save register across calls if possible.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-ipa-ra"), maplecl::kHide); - -maplecl::Option oFipaReference({"-fipa-reference"}, - " -fipa-reference \tDiscover readonly and non addressable static variables.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-ipa-reference"), maplecl::kHide); - -maplecl::Option oFipaSra({"-fipa-sra"}, - " -fipa-sra \tPerform interprocedural reduction of aggregates.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-ipa-sra"), maplecl::kHide); - -maplecl::Option oFiraAlgorithmE({"-fira-algorithm="}, - " -fira-algorithm= \tSet the used IRA algorithm.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oFiraHoistPressure({"-fira-hoist-pressure"}, - " -fira-hoist-pressure \tUse IRA based register pressure calculation in RTL hoist optimizations.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-ira-hoist-pressure"), maplecl::kHide); - -maplecl::Option oFiraLoopPressure({"-fira-loop-pressure"}, - " -fira-loop-pressure \tUse IRA based register pressure calculation in RTL loop optimizations.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-ira-loop-pressure"), maplecl::kHide); - -maplecl::Option oFiraRegion({"-fira-region="}, - " -fira-region= \tSet regions for IRA.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oFiraVerbose({"-fira-verbose="}, - " -fira-verbose= \tControl IRA's level of diagnostic messages.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oFisolateErroneousPathsAttribute({"-fisolate-erroneous-paths-attribute"}, - " -fisolate-erroneous-paths-attribute \tDetect paths that trigger erroneous or undefined behavior due to a " - "null value being used in a way forbidden by a returns_nonnull or nonnull attribute. Isolate those paths from " - "the main control flow and turn the statement with erroneous or undefined behavior into a trap.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-isolate-erroneous-paths-attribute"), maplecl::kHide); - -maplecl::Option oFisolateErroneousPathsDereference({"-fisolate-erroneous-paths-dereference"}, - " -fisolate-erroneous-paths-dereference \tDetect paths that trigger erroneous or undefined behavior due to " - "dereferencing a null pointer. Isolate those paths from the main control flow and turn the statement with " - "erroneous or undefined behavior into a trap.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-isolate-erroneous-paths-dereference"), maplecl::kHide); - -maplecl::Option oFivarVisibility({"-fivar-visibility="}, - " -fivar-visibility= \tSet the default symbol visibility.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oFivopts({"-fivopts"}, - " -fivopts \tOptimize induction variables on trees.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-ivopts"), maplecl::kHide); - -maplecl::Option oFkeepInlineFunctions({"-fkeep-inline-functions"}, - " -fkeep-inline-functions \tGenerate code for functions even if they are fully inlined.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-keep-inline-functions"), maplecl::kHide); - -maplecl::Option oFkeepStaticConsts({"-fkeep-static-consts"}, - " -fkeep-static-consts \tEmit static const variables even if they are not used.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-keep-static-consts"), maplecl::kHide); - -maplecl::Option oFkeepStaticFunctions({"-fkeep-static-functions"}, - " -fkeep-static-functions \tGenerate code for static functions even if they are never called.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-keep-static-functions"), maplecl::kHide); - -maplecl::Option oFlat_namespace({"-flat_namespace"}, - " -flat_namespace \t\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-lat_namespace"), maplecl::kHide); - -maplecl::Option oFlaxVectorConversions({"-flax-vector-conversions"}, - " -flax-vector-conversions \tAllow implicit conversions between vectors with differing numbers of subparts " - "and/or differing element types.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-lax-vector-conversions"), maplecl::kHide); - -maplecl::Option oFleadingUnderscore({"-fleading-underscore"}, - " -fleading-underscore \tGive external symbols a leading underscore.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-leading-underscore"), maplecl::kHide); - -maplecl::Option oFliveRangeShrinkage({"-flive-range-shrinkage"}, - " -flive-range-shrinkage \tRelief of register pressure through live range shrinkage\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-live-range-shrinkage"), maplecl::kHide); - -maplecl::Option oFlocalIvars({"-flocal-ivars"}, - " -flocal-ivars \tAllow access to instance variables as if they were local declarations within " - "instance method implementations.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-local-ivars"), maplecl::kHide); - -maplecl::Option oFloopBlock({"-floop-block"}, - " -floop-block \tEnable loop nest transforms. Same as -floop-nest-optimize.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-loop-block"), maplecl::kHide); - -maplecl::Option oFloopInterchange({"-floop-interchange"}, - " -floop-interchange \tEnable loop nest transforms. Same as -floop-nest-optimize.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-loop-interchange"), maplecl::kHide); - -maplecl::Option oFloopNestOptimize({"-floop-nest-optimize"}, - " -floop-nest-optimize \tEnable the loop nest optimizer.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-loop-nest-optimize"), maplecl::kHide); - -maplecl::Option oFloopParallelizeAll({"-floop-parallelize-all"}, - " -floop-parallelize-all \tMark all loops as parallel.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-loop-parallelize-all"), maplecl::kHide); - -maplecl::Option oFloopStripMine({"-floop-strip-mine"}, - " -floop-strip-mine \tEnable loop nest transforms. Same as -floop-nest-optimize.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-loop-strip-mine"), maplecl::kHide); - -maplecl::Option oFloopUnrollAndJam({"-floop-unroll-and-jam"}, - " -floop-unroll-and-jam \tEnable loop nest transforms. Same as -floop-nest-optimize.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-loop-unroll-and-jam"), maplecl::kHide); - -maplecl::Option oFlraRemat({"-flra-remat"}, - " -flra-remat \tDo CFG-sensitive rematerialization in LRA.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-lra-remat"), maplecl::kHide); - -maplecl::Option oFltoCompressionLevel({"-flto-compression-level="}, - " -flto-compression-level= \tUse zlib compression level ofor IL.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oFltoOdrTypeMerging({"-flto-odr-type-merging"}, - " -flto-odr-type-merging \tMerge C++ types using One Definition Rule.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-lto-odr-type-merging"), maplecl::kHide); - -maplecl::Option oFltoPartition({"-flto-partition="}, - " -flto-partition= \tSpecify the algorithm to partition symbols and vars at linktime.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oFltoReport({"-flto-report"}, - " -flto-report \tReport various link-time optimization statistics.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-lto-report"), maplecl::kHide); - -maplecl::Option oFltoReportWpa({"-flto-report-wpa"}, - " -flto-report-wpa \tReport various link-time optimization statistics for WPA only.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-lto-report-wpa"), maplecl::kHide); - -maplecl::Option oFmemReport({"-fmem-report"}, - " -fmem-report \tReport on permanent memory allocation.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-mem-report"), maplecl::kHide); - -maplecl::Option oFmemReportWpa({"-fmem-report-wpa"}, - " -fmem-report-wpa \tReport on permanent memory allocation in WPA only.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-mem-report-wpa"), maplecl::kHide); - -maplecl::Option oFmergeAllConstants({"-fmerge-all-constants"}, - " -fmerge-all-constants \tAttempt to merge identical constants and constantvariables.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-merge-all-constants"), maplecl::kHide); - -maplecl::Option oFmergeConstants({"-fmerge-constants"}, - " -fmerge-constants \tAttempt to merge identical constants across compilation units.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-merge-constants"), maplecl::kHide); - -maplecl::Option oFmergeDebugStrings({"-fmerge-debug-strings"}, - " -fmerge-debug-strings \tAttempt to merge identical debug strings across compilation units.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-merge-debug-strings"), maplecl::kHide); - -maplecl::Option oFmessageLength({"-fmessage-length="}, - " -fmessage-length= \t-fmessage-length= o Limit diagnostics to ocharacters per " - "line. 0 suppresses line-wrapping.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oFmoduloSched({"-fmodulo-sched"}, - " -fmodulo-sched \tPerform SMS based modulo scheduling before the first scheduling pass.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-modulo-sched"), maplecl::kHide); - -maplecl::Option oFmoduloSchedAllowRegmoves({"-fmodulo-sched-allow-regmoves"}, - " -fmodulo-sched-allow-regmoves \tPerform SMS based modulo scheduling with register moves allowed.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-modulo-sched-allow-regmoves"), maplecl::kHide); - -maplecl::Option oFmoveLoopInvariants({"-fmove-loop-invariants"}, - " -fmove-loop-invariants \tMove loop invariant computations out of loops.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-move-loop-invariants"), maplecl::kHide); - -maplecl::Option oFmsExtensions({"-fms-extensions"}, - " -fms-extensions \tDon't warn about uses of Microsoft extensions.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-ms-extensions"), maplecl::kHide); - -maplecl::Option oFnewInheritingCtors({"-fnew-inheriting-ctors"}, - " -fnew-inheriting-ctors \tImplement C++17 inheriting constructor semantics.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-new-inheriting-ctors"), maplecl::kHide); - -maplecl::Option oFnewTtpMatching({"-fnew-ttp-matching"}, - " -fnew-ttp-matching \tImplement resolution of DR 150 for matching of template template arguments.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-new-ttp-matching"), maplecl::kHide); - -maplecl::Option oFnextRuntime({"-fnext-runtime"}, - " -fnext-runtime \tGenerate code for NeXT (Apple Mac OS X) runtime environment.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oFnoAccessControl({"-fno-access-control"}, - " -fno-access-control \tTurn off all access checking.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oFnoAsm({"-fno-asm"}, - " -fno-asm \tDo not recognize asm, inline or typeof as a keyword, so that code can use these " - "words as identifiers. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oFnoBranchCountReg({"-fno-branch-count-reg"}, - " -fno-branch-count-reg \tAvoid running a pass scanning for opportunities to use \"decrement and branch\" " - "instructions on a count register instead of generating sequences of instructions that decrement a register, " - "compare it against zero, and then branch based upon the result.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oFnoBuiltin({"-fno-builtin", "-fno-builtin-function"}, - " -fno-builtin \tDon't recognize built-in functions that do not begin with '__builtin_' as" - " prefix.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oFnoCanonicalSystemHeaders({"-fno-canonical-system-headers"}, - " -fno-canonical-system-headers \tWhen preprocessing, do not shorten system header paths with " - "canonicalization.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oFCheckPointerBounds({"-fcheck-pointer-bounds"}, - " -fcheck-pointer-bounds \tEnable Pointer Bounds Checker instrumentation.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-check-pointer-bounds"), maplecl::kHide); - -maplecl::Option oFChecking({"-fchecking"}, - " -fchecking \tPerform internal consistency checkings.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-checking"), maplecl::kHide); - -maplecl::Option oFCheckingE({"-fchecking="}, - " -fchecking= \tPerform internal consistency checkings.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oFChkpCheckIncompleteType({"-fchkp-check-incomplete-type"}, - " -fchkp-check-incomplete-type \tGenerate pointer bounds checks for variables with incomplete type.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-chkp-check-incomplete-type"), maplecl::kHide); - -maplecl::Option oFChkpCheckRead({"-fchkp-check-read"}, - " -fchkp-check-read \tGenerate checks for all read accesses to memory.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-chkp-check-read"), maplecl::kHide); - -maplecl::Option oFChkpCheckWrite({"-fchkp-check-write"}, - " -fchkp-check-write \tGenerate checks for all write accesses to memory.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-chkp-check-write"), maplecl::kHide); - -maplecl::Option oFChkpFirstFieldHasOwnBounds({"-fchkp-first-field-has-own-bounds"}, - " -fchkp-first-field-has-own-bounds \tForces Pointer Bounds Checker to use narrowed bounds for address of " - "the first field in the structure. By default pointer to the first field has the same bounds as pointer to the " - "whole structure.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-chkp-first-field-has-own-bounds"), maplecl::kHide); - -maplecl::Option oFDefaultInline({"-fdefault-inline"}, - " -fdefault-inline \tDoes nothing. Preserved for backward compatibility.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-default-inline"), maplecl::kHide); - -maplecl::Option oFdefaultInteger8({"-fdefault-integer-8"}, - " -fdefault-integer-8 \tSet the default integer kind to an 8 byte wide type.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-default-integer-8"), maplecl::kHide); - -maplecl::Option oFdefaultReal8({"-fdefault-real-8"}, - " -fdefault-real-8 \tSet the default real kind to an 8 byte wide type.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-default-real-8"), maplecl::kHide); - -maplecl::Option oFDeferPop({"-fdefer-pop"}, - " -fdefer-pop \tDefer popping functions args from stack until later.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-defer-pop"), maplecl::kHide); - -maplecl::Option oFElideConstructors({"-felide-constructors"}, - " -felide-constructors \t\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("fno-elide-constructors"), maplecl::kHide); - -maplecl::Option oFEnforceEhSpecs({"-fenforce-eh-specs"}, - " -fenforce-eh-specs \tGenerate code to check exception specifications.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-enforce-eh-specs"), maplecl::kHide); - -maplecl::Option oFFpIntBuiltinInexact({"-ffp-int-builtin-inexact"}, - " -ffp-int-builtin-inexact \tAllow built-in functions ceil, floor, round, trunc to raise 'inexact' " - "exceptions.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-fp-int-builtin-inexact"), maplecl::kHide); - -maplecl::Option oFFunctionCse({"-ffunction-cse"}, - " -ffunction-cse \tAllow function addresses to be held in registers.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-function-cse"), maplecl::kHide); - -maplecl::Option oFGnuKeywords({"-fgnu-keywords"}, - " -fgnu-keywords \tRecognize GNU-defined keywords.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-gnu-keywords"), maplecl::kHide); - -maplecl::Option oFGnuUnique({"-fgnu-unique"}, - " -fgnu-unique \tUse STB_GNU_UNIQUE if supported by the assembler.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-gnu-unique"), maplecl::kHide); - -maplecl::Option oFGuessBranchProbability({"-fguess-branch-probability"}, - " -fguess-branch-probability \tEnable guessing of branch probabilities.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-guess-branch-probability"), maplecl::kHide); - -maplecl::Option oFIdent({"-fident"}, - " -fident \tProcess #ident directives.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-ident"), maplecl::kHide); - -maplecl::Option oFImplementInlines({"-fimplement-inlines"}, - " -fimplement-inlines \tExport functions even if they can be inlined.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-implement-inlines"), maplecl::kHide); - -maplecl::Option oFImplicitInlineTemplates({"-fimplicit-inline-templates"}, - " -fimplicit-inline-templates \tEmit implicit instantiations of inline templates.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-implicit-inline-templates"), maplecl::kHide); - -maplecl::Option oFImplicitTemplates({"-fimplicit-templates"}, - " -fimplicit-templates \tEmit implicit instantiations of templates.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("no-implicit-templates"), maplecl::kHide); - -maplecl::Option oFIraShareSaveSlots({"-fira-share-save-slots"}, - " -fira-share-save-slots \tShare slots for saving different hard registers.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-ira-share-save-slots"), maplecl::kHide); - -maplecl::Option oFIraShareSpillSlots({"-fira-share-spill-slots"}, - " -fira-share-spill-slots \tShare stack slots for spilled pseudo-registers.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-ira-share-spill-slots"), maplecl::kHide); - -maplecl::Option oFJumpTables({"-fjump-tables"}, - " -fjump-tables \tUse jump tables for sufficiently large switch statements.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-jump-tables"), maplecl::kHide); - -maplecl::Option oFKeepInlineDllexport({"-fkeep-inline-dllexport"}, - " -fkeep-inline-dllexport \tDon't emit dllexported inline functions unless needed.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-keep-inline-dllexport"), maplecl::kHide); - -maplecl::Option oFLifetimeDse({"-flifetime-dse"}, - " -flifetime-dse \tTell DSE that the storage for a C++ object is dead when the constructor" - " starts and when the destructor finishes.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-lifetime-dse"), maplecl::kHide); - -maplecl::Option oFMathErrno({"-fmath-errno"}, - " -fmath-errno \tSet errno after built-in math functions.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-math-errno"), maplecl::kHide); - -maplecl::Option oFNilReceivers({"-fnil-receivers"}, - " -fnil-receivers \tAssume that receivers of Objective-C messages may be nil.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-nil-receivers"), maplecl::kHide); - -maplecl::Option oFNonansiBuiltins({"-fnonansi-builtins"}, - " -fnonansi-builtins \t\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-nonansi-builtins"), maplecl::kHide); - -maplecl::Option oFOperatorNames({"-foperator-names"}, - " -foperator-names \tRecognize C++ keywords like 'compl' and 'xor'.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-operator-names"), maplecl::kHide); - -maplecl::Option oFOptionalDiags({"-foptional-diags"}, - " -foptional-diags \t\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-optional-diags"), maplecl::kHide); - -maplecl::Option oFPeephole({"-fpeephole"}, - " -fpeephole \tEnable machine specific peephole optimizations.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-peephole"), maplecl::kHide); - -maplecl::Option oFPeephole2({"-fpeephole2"}, - " -fpeephole2 \tEnable an RTL peephole pass before sched2.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-peephole2"), maplecl::kHide); - -maplecl::Option oFPrettyTemplates({"-fpretty-templates"}, - " -fpretty-templates \tpretty-print template specializations as the template signature followed " - "by the arguments.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-pretty-templates"), maplecl::kHide); - -maplecl::Option oFPrintfReturnValue({"-fprintf-return-value"}, - " -fprintf-return-value \tTreat known sprintf return values as constants.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-printf-return-value"), maplecl::kHide); - -maplecl::Option oFRtti({"-frtti"}, - " -frtti \tGenerate run time type descriptor information.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-rtti"), maplecl::kHide); - -maplecl::Option oFnoSanitizeAll({"-fno-sanitize=all"}, - " -fno-sanitize=all \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oFSchedInterblock({"-fsched-interblock"}, - " -fsched-interblock \tEnable scheduling across basic blocks.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-sched-interblock"), maplecl::kHide); - -maplecl::Option oFSchedSpec({"-fsched-spec"}, - " -fsched-spec \tAllow speculative motion of non-loads.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-sched-spec"), maplecl::kHide); - -maplecl::Option oFnoSetStackExecutable({"-fno-set-stack-executable"}, - " -fno-set-stack-executable \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oFShowColumn({"-fshow-column"}, - " -fshow-column \tShow column numbers in diagnostics, when available. Default on.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-show-column"), maplecl::kHide); - -maplecl::Option oFSignedZeros({"-fsigned-zeros"}, - " -fsigned-zeros \tDisable floating point optimizations that ignore the IEEE signedness of zero.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-signed-zeros"), maplecl::kHide); - -maplecl::Option oFStackLimit({"-fstack-limit"}, - " -fstack-limit \t\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-stack-limit"), maplecl::kHide); - -maplecl::Option oFThreadsafeStatics({"-fthreadsafe-statics"}, - " -fthreadsafe-statics \tDo not generate thread-safe code for initializing local statics.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-threadsafe-statics"), maplecl::kHide); - -maplecl::Option oFToplevelReorder({"-ftoplevel-reorder"}, - " -ftoplevel-reorder \tReorder top level functions, variables, and asms.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-toplevel-reorder"), maplecl::kHide); - -maplecl::Option oFTrappingMath({"-ftrapping-math"}, - " -ftrapping-math \tAssume floating-point operations can trap.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-trapping-math"), maplecl::kHide); - -maplecl::Option oFUseCxaGetExceptionPtr({"-fuse-cxa-get-exception-ptr"}, - " -fuse-cxa-get-exception-ptr \tUse __cxa_get_exception_ptr in exception handling.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-use-cxa-get-exception-ptr"), maplecl::kHide); - -maplecl::Option oFWeak({"-fweak"}, - " -fweak \tEmit common-like symbols as weak symbols.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-weak"), maplecl::kHide); - -maplecl::Option oFnoWritableRelocatedRdata({"-fno-writable-relocated-rdata"}, - " -fno-writable-relocated-rdata \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oFZeroInitializedInBss({"-fzero-initialized-in-bss"}, - " -fzero-initialized-in-bss \tPut zero initialized data in the bss section.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-zero-initialized-in-bss"), maplecl::kHide); - -maplecl::Option oFnonCallExceptions({"-fnon-call-exceptions"}, - " -fnon-call-exceptions \tSupport synchronous non-call exceptions.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-non-call-exceptions"), maplecl::kHide); - -maplecl::Option oFnothrowOpt({"-fnothrow-opt"}, - " -fnothrow-opt \tTreat a throw() exception specification as noexcept to improve code size.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-nothrow-opt"), maplecl::kHide); - -maplecl::Option oFobjcAbiVersion({"-fobjc-abi-version="}, - " -fobjc-abi-version= \tSpecify which ABI to use for Objective-C family code and meta-data generation.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oFobjcCallCxxCdtors({"-fobjc-call-cxx-cdtors"}, - " -fobjc-call-cxx-cdtors \tGenerate special Objective-C methods to initialize/destroy non-POD C++ ivars\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-objc-call-cxx-cdtors"), maplecl::kHide); - -maplecl::Option oFobjcDirectDispatch({"-fobjc-direct-dispatch"}, - " -fobjc-direct-dispatch \tAllow fast jumps to the message dispatcher.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-objc-direct-dispatch"), maplecl::kHide); - -maplecl::Option oFobjcExceptions({"-fobjc-exceptions"}, - " -fobjc-exceptions \tEnable Objective-C exception and synchronization syntax.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-objc-exceptions"), maplecl::kHide); - -maplecl::Option oFobjcGc({"-fobjc-gc"}, - " -fobjc-gc \tEnable garbage collection (GC) in Objective-C/Objective-C++ programs.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-objc-gc"), maplecl::kHide); - -maplecl::Option oFobjcNilcheck({"-fobjc-nilcheck"}, - " -fobjc-nilcheck \tEnable inline checks for nil receivers with the NeXT runtime and ABI version 2.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-fobjc-nilcheck"), maplecl::kHide); - -maplecl::Option oFobjcSjljExceptions({"-fobjc-sjlj-exceptions"}, - " -fobjc-sjlj-exceptions \tEnable Objective-C setjmp exception handling runtime.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-objc-sjlj-exceptions"), maplecl::kHide); - -maplecl::Option oFobjcStd({"-fobjc-std=objc1"}, - " -fobjc-std \tConform to the Objective-C 1.0 language as implemented in GCC 4.0.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oFoffloadAbi({"-foffload-abi="}, - " -foffload-abi= \tSet the ABI to use in an offload compiler.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oFoffload({"-foffload="}, - " -foffload= \tSpecify offloading targets and options for them.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oFopenacc({"-fopenacc"}, - " -fopenacc \tEnable OpenACC.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-openacc"), maplecl::kHide); - -maplecl::Option oFopenaccDim({"-fopenacc-dim="}, - " -fopenacc-dim= \tSpecify default OpenACC compute dimensions.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oFopenmp({"-fopenmp"}, - " -fopenmp \tEnable OpenMP (implies -frecursive in Fortran).\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-openmp"), maplecl::kHide); - -maplecl::Option oFopenmpSimd({"-fopenmp-simd"}, - " -fopenmp-simd \tEnable OpenMP's SIMD directives.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-openmp-simd"), maplecl::kHide); - -maplecl::Option oFoptInfo({"-fopt-info"}, - " -fopt-info \tEnable all optimization info dumps on stderr.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-opt-info"), maplecl::kHide); - -maplecl::Option oFoptimizeStrlen({"-foptimize-strlen"}, - " -foptimize-strlen \tEnable string length optimizations on trees.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-foptimize-strlen"), maplecl::kHide); - -maplecl::Option oForce_cpusubtype_ALL({"-force_cpusubtype_ALL"}, - " -force_cpusubtype_ALL \tThis causes GCC's output file to have the 'ALL' subtype, instead of one " - "controlled by the -mcpu or -march option.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oForce_flat_namespace({"-force_flat_namespace"}, - " -force_flat_namespace \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oFpackStruct({"-fpack-struct"}, - " -fpack-struct \tPack structure members together without holes.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-pack-struct"), maplecl::kHide); - -maplecl::Option oFpartialInlining({"-fpartial-inlining"}, - " -fpartial-inlining \tPerform partial inlining.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-partial-inlining"), maplecl::kHide); - -maplecl::Option oFpccStructReturn({"-fpcc-struct-return"}, - " -fpcc-struct-return \tReturn small aggregates in memory\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-pcc-struct-return"), maplecl::kHide); - -maplecl::Option oFpchDeps({"-fpch-deps"}, - " -fpch-deps \tWhen using precompiled headers (see Precompiled Headers), this flag causes " - "the dependency-output flags to also list the files from the precompiled header's dependencies.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-pch-deps"), maplecl::kHide); - -maplecl::Option oFpchPreprocess({"-fpch-preprocess"}, - " -fpch-preprocess \tLook for and use PCH files even when preprocessing.\n", - {driverCategory, clangCategory}, maplecl::kHide); - -maplecl::Option oFnoPchPreprocess({"-fno-pch-preprocess"}, - " -fno-pch-preprocess \tLook for and use PCH files even when preprocessing.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oFpeelLoops({"-fpeel-loops"}, - " -fpeel-loops \tPerform loop peeling.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-peel-loops"), maplecl::kHide); - -maplecl::Option oFpermissive({"-fpermissive"}, - " -fpermissive \tDowngrade conformance errors to warnings.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-permissive"), maplecl::kHide); - -maplecl::Option oFpermittedFltEvalMethods({"-fpermitted-flt-eval-methods="}, - " -fpermitted-flt-eval-methods= \tSpecify which values of FLT_EVAL_METHOD are permitted.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oFplan9Extensions({"-fplan9-extensions"}, - " -fplan9-extensions \tEnable Plan 9 language extensions.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-fplan9-extensions"), maplecl::kHide); - -maplecl::Option oFplugin({"-fplugin="}, - " -fplugin= \tSpecify a plugin to load.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oFpluginArg({"-fplugin-arg-"}, - " -fplugin-arg- \tSpecify argument = ofor plugin .\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oFpostIpaMemReport({"-fpost-ipa-mem-report"}, - " -fpost-ipa-mem-report \tReport on memory allocation before interprocedural optimization.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-post-ipa-mem-report"), maplecl::kHide); - -maplecl::Option oFpreIpaMemReport({"-fpre-ipa-mem-report"}, - " -fpre-ipa-mem-report \tReport on memory allocation before interprocedural optimization.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-pre-ipa-mem-report"), maplecl::kHide); - -maplecl::Option oFpredictiveCommoning({"-fpredictive-commoning"}, - " -fpredictive-commoning \tRun predictive commoning optimization.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-fpredictive-commoning"), maplecl::kHide); - -maplecl::Option oFprefetchLoopArrays({"-fprefetch-loop-arrays"}, - " -fprefetch-loop-arrays \tGenerate prefetch instructions\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-prefetch-loop-arrays"), maplecl::kHide); - -maplecl::Option oFpreprocessed({"-fpreprocessed"}, - " -fpreprocessed \tTreat the input file as already preprocessed.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-preprocessed"), maplecl::kHide); - -maplecl::Option oFprofileArcs({"-fprofile-arcs"}, - " -fprofile-arcs \tInsert arc-based program profiling code.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-profile-arcs"), maplecl::kHide); - -maplecl::Option oFprofileCorrection({"-fprofile-correction"}, - " -fprofile-correction \tEnable correction of flow inconsistent profile data input.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-profile-correction"), maplecl::kHide); - -maplecl::Option oFprofileDir({"-fprofile-dir="}, - " -fprofile-dir= \tSet the top-level directory for storing the profile data. The default is 'pwd'.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oFprofileGenerate({"-fprofile-generate"}, - " -fprofile-generate \tEnable common options for generating profile info for profile feedback directed " - "optimizations.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-profile-generate"), maplecl::kHide); - -maplecl::Option oFprofileReorderFunctions({"-fprofile-reorder-functions"}, - " -fprofile-reorder-functions \tEnable function reordering that improves code placement.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-profile-reorder-functions"), maplecl::kHide); - -maplecl::Option oFprofileReport({"-fprofile-report"}, - " -fprofile-report \tReport on consistency of profile.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-profile-report"), maplecl::kHide); - -maplecl::Option oFprofileUpdate({"-fprofile-update="}, - " -fprofile-update= \tSet the profile update method.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oFprofileUse({"-fprofile-use"}, - " -fprofile-use \tEnable common options for performing profile feedback directed optimizations.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-profile-use"), maplecl::kHide); - -maplecl::Option oFprofileUseE({"-fprofile-use="}, - " -fprofile-use= \tEnable common options for performing profile feedback directed optimizations, " - "and set -fprofile-dir=.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oFprofileValues({"-fprofile-values"}, - " -fprofile-values \tInsert code to profile values of expressions.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-profile-values"), maplecl::kHide); - -maplecl::Option oFpu({"-fpu"}, - " -fpu \tEnables (-fpu) or disables (-nofpu) the use of RX floating-point hardware. \n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-nofpu"), maplecl::kHide); - -maplecl::Option oFrandomSeed({"-frandom-seed"}, - " -frandom-seed \tMake compile reproducible using .\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-random-seed"), maplecl::kHide); - -maplecl::Option oFrandomSeedE({"-frandom-seed="}, - " -frandom-seed= \tMake compile reproducible using .\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oFreciprocalMath({"-freciprocal-math"}, - " -freciprocal-math \tSame as -fassociative-math for expressions which include division.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-reciprocal-math"), maplecl::kHide); - -maplecl::Option oFrecordGccSwitches({"-frecord-gcc-switches"}, - " -frecord-gcc-switches \tRecord gcc command line switches in the object file.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-record-gcc-switches"), maplecl::kHide); - -maplecl::Option oFree({"-free"}, - " -free \tTurn on Redundant Extensions Elimination pass.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-ree"), maplecl::kHide); - -maplecl::Option oFrenameRegisters({"-frename-registers"}, - " -frename-registers \tPerform a register renaming optimization pass.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-rename-registers"), maplecl::kHide); - -maplecl::Option oFreorderBlocks({"-freorder-blocks"}, - " -freorder-blocks \tReorder basic blocks to improve code placement.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-reorder-blocks"), maplecl::kHide); - -maplecl::Option oFreorderBlocksAlgorithm({"-freorder-blocks-algorithm="}, - " -freorder-blocks-algorithm= \tSet the used basic block reordering algorithm.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oFreorderBlocksAndPartition({"-freorder-blocks-and-partition"}, - " -freorder-blocks-and-partition \tReorder basic blocks and partition into hot and cold sections.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-reorder-blocks-and-partition"), maplecl::kHide); - -maplecl::Option oFreorderFunctions({"-freorder-functions"}, - " -freorder-functions \tReorder functions to improve code placement.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-reorder-functions"), maplecl::kHide); - -maplecl::Option oFreplaceObjcClasses({"-freplace-objc-classes"}, - " -freplace-objc-classes \tUsed in Fix-and-Continue mode to indicate that object files may be swapped in " - "at runtime.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-replace-objc-classes"), maplecl::kHide); - -maplecl::Option oFrepo({"-frepo"}, - " -frepo \tEnable automatic template instantiation.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-repo"), maplecl::kHide); - -maplecl::Option oFreportBug({"-freport-bug"}, - " -freport-bug \tCollect and dump debug information into temporary file if ICE in C/C++ " - "compiler occurred.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-report-bug"), maplecl::kHide); - -maplecl::Option oFrerunCseAfterLoop({"-frerun-cse-after-loop"}, - " -frerun-cse-after-loop \tAdd a common subexpression elimination pass after loop optimizations.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-rerun-cse-after-loop"), maplecl::kHide); - -maplecl::Option oFrescheduleModuloScheduledLoops({"-freschedule-modulo-scheduled-loops"}, - " -freschedule-modulo-scheduled-loops \tEnable/Disable the traditional scheduling in loops that already " - "passed modulo scheduling.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-reschedule-modulo-scheduled-loops"), maplecl::kHide); - -maplecl::Option oFroundingMath({"-frounding-math"}, - " -frounding-math \tDisable optimizations that assume default FP rounding behavior.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-rounding-math"), maplecl::kHide); - -maplecl::Option oFsanitizeAddressUseAfterScope({"-fsanitize-address-use-after-scope"}, - " -fsanitize-address-use-after-scope \tEnable sanitization of local variables to detect use-after-scope bugs.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-sanitize-address-use-after-scope"), maplecl::kHide); - -maplecl::Option oFsanitizeCoverageTracePc({"-fsanitize-coverage=trace-pc"}, - " -fsanitize-coverage=trace-pc \tEnable coverage-guided fuzzing code instrumentation. Inserts call to " - "__sanitizer_cov_trace_pc into every basic block.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-sanitize-coverage=trace-pc"), maplecl::kHide); - -maplecl::Option oFsanitizeRecover({"-fsanitize-recover"}, - " -fsanitize-recover \tAfter diagnosing undefined behavior attempt to continue execution.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-sanitize-recover"), maplecl::kHide); - -maplecl::Option oFsanitizeRecoverE({"-fsanitize-recover="}, - " -fsanitize-recover= \tAfter diagnosing undefined behavior attempt to continue execution.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oFsanitizeSections({"-fsanitize-sections="}, - " -fsanitize-sections= \tSanitize global variables in user-defined sections.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oFsanitizeUndefinedTrapOnError({"-fsanitize-undefined-trap-on-error"}, - " -fsanitize-undefined-trap-on-error \tUse trap instead of a library function for undefined behavior " - "sanitization.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-sanitize-undefined-trap-on-error"), maplecl::kHide); - -maplecl::Option oFsanitize({"-fsanitize"}, - " -fsanitize \tSelect what to sanitize.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-sanitize"), maplecl::kHide); - -maplecl::Option oFschedCriticalPathHeuristic({"-fsched-critical-path-heuristic"}, - " -fsched-critical-path-heuristic \tEnable the critical path heuristic in the scheduler.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-sched-critical-path-heuristic"), maplecl::kHide); - -maplecl::Option oFschedDepCountHeuristic({"-fsched-dep-count-heuristic"}, - " -fsched-dep-count-heuristic \tEnable the dependent count heuristic in the scheduler.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-sched-dep-count-heuristic"), maplecl::kHide); - -maplecl::Option oFschedGroupHeuristic({"-fsched-group-heuristic"}, - " -fsched-group-heuristic \tEnable the group heuristic in the scheduler.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-sched-group-heuristic"), maplecl::kHide); - -maplecl::Option oFschedLastInsnHeuristic({"-fsched-last-insn-heuristic"}, - " -fsched-last-insn-heuristic \tEnable the last instruction heuristic in the scheduler.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-sched-last-insn-heuristic"), maplecl::kHide); - -maplecl::Option oFschedPressure({"-fsched-pressure"}, - " -fsched-pressure \tEnable register pressure sensitive insn scheduling.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-sched-pressure"), maplecl::kHide); - -maplecl::Option oFschedRankHeuristic({"-fsched-rank-heuristic"}, - " -fsched-rank-heuristic \tEnable the rank heuristic in the scheduler.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-sched-rank-heuristic"), maplecl::kHide); - -maplecl::Option oFschedSpecInsnHeuristic({"-fsched-spec-insn-heuristic"}, - " -fsched-spec-insn-heuristic \tEnable the speculative instruction heuristic in the scheduler.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-sched-spec-insn-heuristic"), maplecl::kHide); - -maplecl::Option oFschedSpecLoad({"-fsched-spec-load"}, - " -fsched-spec-load \tAllow speculative motion of some loads.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-sched-spec-load"), maplecl::kHide); - -maplecl::Option oFschedSpecLoadDangerous({"-fsched-spec-load-dangerous"}, - " -fsched-spec-load-dangerous \tAllow speculative motion of more loads.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-sched-spec-load-dangerous"), maplecl::kHide); - -maplecl::Option oFschedStalledInsns({"-fsched-stalled-insns"}, - " -fsched-stalled-insns \tAllow premature scheduling of queued insns.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-sched-stalled-insns"), maplecl::kHide); - -maplecl::Option oFschedStalledInsnsDep({"-fsched-stalled-insns-dep"}, - " -fsched-stalled-insns-dep \tSet dependence distance checking in premature scheduling of queued insns.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-sched-stalled-insns-dep"), maplecl::kHide); - -maplecl::Option oFschedVerbose({"-fsched-verbose"}, - " -fsched-verbose \tSet the verbosity level of the scheduler.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-sched-verbose"), maplecl::kHide); - -maplecl::Option oFsched2UseSuperblocks({"-fsched2-use-superblocks"}, - " -fsched2-use-superblocks \tIf scheduling post reload\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-sched2-use-superblocks"), maplecl::kHide); - -maplecl::Option oFscheduleFusion({"-fschedule-fusion"}, - " -fschedule-fusion \tPerform a target dependent instruction fusion optimization pass.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-schedule-fusion"), maplecl::kHide); - -maplecl::Option oFscheduleInsns({"-fschedule-insns"}, - " -fschedule-insns \tReschedule instructions before register allocation.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-schedule-insns"), maplecl::kHide); - -maplecl::Option oFscheduleInsns2({"-fschedule-insns2"}, - " -fschedule-insns2 \tReschedule instructions after register allocation.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-schedule-insns2"), maplecl::kHide); - -maplecl::Option oFsectionAnchors({"-fsection-anchors"}, - " -fsection-anchors \tAccess data in the same section from shared anchor points.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-fsection-anchors"), maplecl::kHide); - -maplecl::Option oFselSchedPipelining({"-fsel-sched-pipelining"}, - " -fsel-sched-pipelining \tPerform software pipelining of inner loops during selective scheduling.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-sel-sched-pipelining"), maplecl::kHide); - -maplecl::Option oFselSchedPipeliningOuterLoops({"-fsel-sched-pipelining-outer-loops"}, - " -fsel-sched-pipelining-outer-loops \tPerform software pipelining of outer loops during selective scheduling.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-sel-sched-pipelining-outer-loops"), maplecl::kHide); - -maplecl::Option oFselectiveScheduling({"-fselective-scheduling"}, - " -fselective-scheduling \tSchedule instructions using selective scheduling algorithm.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-selective-scheduling"), maplecl::kHide); - -maplecl::Option oFselectiveScheduling2({"-fselective-scheduling2"}, - " -fselective-scheduling2 \tRun selective scheduling after reload.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-selective-scheduling2"), maplecl::kHide); - -maplecl::Option oFshortEnums({"-fshort-enums"}, - " -fshort-enums \tUse the narrowest integer type possible for enumeration types.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-short-enums"), maplecl::kHide); - -maplecl::Option oFshortWchar({"-fshort-wchar"}, - " -fshort-wchar \tForce the underlying type for 'wchar_t' to be 'unsigned short'.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-short-wchar"), maplecl::kHide); - -maplecl::Option oFshrinkWrap({"-fshrink-wrap"}, - " -fshrink-wrap \tEmit function prologues only before parts of the function that need it\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-shrink-wrap"), maplecl::kHide); - -maplecl::Option oFshrinkWrapSeparate({"-fshrink-wrap-separate"}, - " -fshrink-wrap-separate \tShrink-wrap parts of the prologue and epilogue separately.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-shrink-wrap-separate"), maplecl::kHide); - -maplecl::Option oFsignalingNans({"-fsignaling-nans"}, - " -fsignaling-nans \tDisable optimizations observable by IEEE signaling NaNs.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-signaling-nans"), maplecl::kHide); - -maplecl::Option oFsignedBitfields({"-fsigned-bitfields"}, - " -fsigned-bitfields \tWhen 'signed' or 'unsigned' is not given make the bitfield signed.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-signed-bitfields"), maplecl::kHide); - -maplecl::Option oFsimdCostModel({"-fsimd-cost-model"}, - " -fsimd-cost-model \t\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-simd-cost-model"), maplecl::kHide); - -maplecl::Option oFsinglePrecisionConstant({"-fsingle-precision-constant"}, - " -fsingle-precision-constant \tConvert floating point constants to single precision constants.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-single-precision-constant"), maplecl::kHide); - -maplecl::Option oFsizedDeallocation({"-fsized-deallocation"}, - " -fsized-deallocation \tEnable C++14 sized deallocation support.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-sized-deallocation"), maplecl::kHide); - -maplecl::Option oFsplitIvsInUnroller({"-fsplit-ivs-in-unroller"}, - " -fsplit-ivs-in-unroller \tSplit lifetimes of induction variables when loops are unrolled.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-split-ivs-in-unroller"), maplecl::kHide); - -maplecl::Option oFsplitLoops({"-fsplit-loops"}, - " -fsplit-loops \tPerform loop splitting.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-split-loops"), maplecl::kHide); - -maplecl::Option oFsplitPaths({"-fsplit-paths"}, - " -fsplit-paths \tSplit paths leading to loop backedges.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-split-paths"), maplecl::kHide); - -maplecl::Option oFsplitStack({"-fsplit-stack"}, - " -fsplit-stack \tGenerate discontiguous stack frames.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-split-stack"), maplecl::kHide); - -maplecl::Option oFsplitWideTypes({"-fsplit-wide-types"}, - " -fsplit-wide-types \tSplit wide types into independent registers.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-split-wide-types"), maplecl::kHide); - -maplecl::Option oFssaBackprop({"-fssa-backprop"}, - " -fssa-backprop \tEnable backward propagation of use properties at the SSA level.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-ssa-backprop"), maplecl::kHide); - -maplecl::Option oFssaPhiopt({"-fssa-phiopt"}, - " -fssa-phiopt \tOptimize conditional patterns using SSA PHI nodes.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-ssa-phiopt"), maplecl::kHide); - -maplecl::Option oFssoStruct({"-fsso-struct"}, - " -fsso-struct \tSet the default scalar storage order.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-sso-struct"), maplecl::kHide); - -maplecl::Option oFstackCheck({"-fstack-check"}, - " -fstack-check \tInsert stack checking code into the program. Same as -fstack-check=specific.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-stack-check"), maplecl::kHide); - -maplecl::Option oFstackCheckE({"-fstack-check="}, - " -fstack-check= \t-fstack-check=[no|generic|specific] Insert stack checking code into " - "the program.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oFstackLimitRegister({"-fstack-limit-register="}, - " -fstack-limit-register= \tTrap if the stack goes past \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oFstackLimitSymbol({"-fstack-limit-symbol="}, - " -fstack-limit-symbol= \tTrap if the stack goes past symbol .\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oFstackProtector({"-fstack-protector"}, - " -fstack-protector \tUse propolice as a stack protection method.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-stack-protector"), maplecl::kHide); - -maplecl::Option oFstackProtectorAll({"-fstack-protector-all"}, - " -fstack-protector-all \tUse a stack protection method for every function.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-stack-protector-all"), maplecl::kHide); - -maplecl::Option oFstackProtectorExplicit({"-fstack-protector-explicit"}, - " -fstack-protector-explicit \tUse stack protection method only for functions with the stack_protect " - "attribute.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-stack-protector-explicit"), maplecl::kHide); - -maplecl::Option oFstackUsage({"-fstack-usage"}, - " -fstack-usage \tOutput stack usage information on a per-function basis.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-stack-usage"), maplecl::kHide); - -maplecl::Option oFstack_reuse({"-fstack-reuse="}, - " -fstack_reuse= \tSet stack reuse level for local variables.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oFstats({"-fstats"}, - " -fstats \tDisplay statistics accumulated during compilation.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-stats"), maplecl::kHide); - -maplecl::Option oFstdargOpt({"-fstdarg-opt"}, - " -fstdarg-opt \tOptimize amount of stdarg registers saved to stack at start of function.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-stdarg-opt"), maplecl::kHide); - -maplecl::Option oFstoreMerging({"-fstore-merging"}, - " -fstore-merging \tMerge adjacent stores.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-store-merging"), maplecl::kHide); - -maplecl::Option oFstrictAliasing({"-fstrict-aliasing"}, - " -fstrict-aliasing \tAssume strict aliasing rules apply.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oFstrictEnums({"-fstrict-enums"}, - " -fstrict-enums \tAssume that values of enumeration type are always within the minimum range " - "of that type.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-strict-enums"), maplecl::kHide); - -maplecl::Option oFstrictOverflow({"-fstrict-overflow"}, - " -fstrict-overflow \tTreat signed overflow as undefined.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-strict-overflow"), maplecl::kHide); - -maplecl::Option oFstrictVolatileBitfields({"-fstrict-volatile-bitfields"}, - " -fstrict-volatile-bitfields \tForce bitfield accesses to match their type width.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-strict-volatile-bitfields"), maplecl::kHide); - -maplecl::Option oFsyncLibcalls({"-fsync-libcalls"}, - " -fsync-libcalls \tImplement __atomic operations via libcalls to legacy __sync functions.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-sync-libcalls"), maplecl::kHide); - -maplecl::Option oFsyntaxOnly({"-fsyntax-only"}, - " -fsyntax-only \tCheck for syntax errors\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-syntax-only"), maplecl::kHide); - -maplecl::Option oFtabstop({"-ftabstop="}, - " -ftabstop= \tSet the distance between tab stops.\n", - {driverCategory, clangCategory}, maplecl::kHide); - -maplecl::Option oFtemplateBacktraceLimit({"-ftemplate-backtrace-limit="}, - " -ftemplate-backtrace-limit= \tSet the maximum number of template instantiation notes for a single warning " - "or error to n.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oFtemplateDepth({"-ftemplate-depth-"}, - " -ftemplate-depth- \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oFtemplateDepthE({"-ftemplate-depth="}, - " -ftemplate-depth= \tSpecify maximum template instantiation depth.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oFtestCoverage({"-ftest-coverage"}, - " -ftest-coverage \tCreate data files needed by \"gcov\".\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-test-coverage"), maplecl::kHide); - -maplecl::Option oFthreadJumps({"-fthread-jumps"}, - " -fthread-jumps \tPerform jump threading optimizations.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-thread-jumps"), maplecl::kHide); - -maplecl::Option oFtimeReport({"-ftime-report"}, - " -ftime-report \tReport the time taken by each compiler pass.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-time-report"), maplecl::kHide); - -maplecl::Option oFtimeReportDetails({"-ftime-report-details"}, - " -ftime-report-details \tRecord times taken by sub-phases separately.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-time-report-details"), maplecl::kHide); - -maplecl::Option oFtracer({"-ftracer"}, - " -ftracer \tPerform superblock formation via tail duplication.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tracer"), maplecl::kHide); - -maplecl::Option oFtrackMacroExpansion({"-ftrack-macro-expansion"}, - " -ftrack-macro-expansion \tTrack locations of tokens across macro expansions.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-track-macro-expansion"), maplecl::kHide); - -maplecl::Option oFtrackMacroExpansionE({"-ftrack-macro-expansion="}, - " -ftrack-macro-expansion= \tTrack locations of tokens across macro expansions.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oFtrampolines({"-ftrampolines"}, - " -ftrampolines \tFor targets that normally need trampolines for nested functions\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-trampolines"), maplecl::kHide); - -maplecl::Option oFtrapv({"-ftrapv"}, - " -ftrapv \tTrap for signed overflow in addition\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-trapv"), maplecl::kHide); - -maplecl::Option oFtreeBitCcp({"-ftree-bit-ccp"}, - " -ftree-bit-ccp \tEnable SSA-BIT-CCP optimization on trees.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-bit-ccp"), maplecl::kHide); - -maplecl::Option oFtreeBuiltinCallDce({"-ftree-builtin-call-dce"}, - " -ftree-builtin-call-dce \tEnable conditional dead code elimination for builtin calls.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-builtin-call-dce"), maplecl::kHide); - -maplecl::Option oFtreeCcp({"-ftree-ccp"}, - " -ftree-ccp \tEnable SSA-CCP optimization on trees.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-ccp"), maplecl::kHide); - -maplecl::Option oFtreeCh({"-ftree-ch"}, - " -ftree-ch \tEnable loop header copying on trees.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-ch"), maplecl::kHide); - -maplecl::Option oFtreeCoalesceVars({"-ftree-coalesce-vars"}, - " -ftree-coalesce-vars \tEnable SSA coalescing of user variables.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-coalesce-vars"), maplecl::kHide); - -maplecl::Option oFtreeCopyProp({"-ftree-copy-prop"}, - " -ftree-copy-prop \tEnable copy propagation on trees.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-copy-prop"), maplecl::kHide); - -maplecl::Option oFtreeDce({"-ftree-dce"}, - " -ftree-dce \tEnable SSA dead code elimination optimization on trees.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-dce"), maplecl::kHide); - -maplecl::Option oFtreeDominatorOpts({"-ftree-dominator-opts"}, - " -ftree-dominator-opts \tEnable dominator optimizations.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-dominator-opts"), maplecl::kHide); - -maplecl::Option oFtreeDse({"-ftree-dse"}, - " -ftree-dse \tEnable dead store elimination.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-dse"), maplecl::kHide); - -maplecl::Option oFtreeForwprop({"-ftree-forwprop"}, - " -ftree-forwprop \tEnable forward propagation on trees.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-forwprop"), maplecl::kHide); - -maplecl::Option oFtreeFre({"-ftree-fre"}, - " -ftree-fre \tEnable Full Redundancy Elimination (FRE) on trees.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-fre"), maplecl::kHide); - -maplecl::Option oFtreeLoopDistributePatterns({"-ftree-loop-distribute-patterns"}, - " -ftree-loop-distribute-patterns \tEnable loop distribution for patterns transformed into a library call.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-loop-distribute-patterns"), maplecl::kHide); - -maplecl::Option oFtreeLoopDistribution({"-ftree-loop-distribution"}, - " -ftree-loop-distribution \tEnable loop distribution on trees.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-loop-distribution"), maplecl::kHide); - -maplecl::Option oFtreeLoopIfConvert({"-ftree-loop-if-convert"}, - " -ftree-loop-if-convert \tConvert conditional jumps in innermost loops to branchless equivalents.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-loop-if-convert"), maplecl::kHide); - -maplecl::Option oFtreeLoopIm({"-ftree-loop-im"}, - " -ftree-loop-im \tEnable loop invariant motion on trees.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-loop-im"), maplecl::kHide); - -maplecl::Option oFtreeLoopIvcanon({"-ftree-loop-ivcanon"}, - " -ftree-loop-ivcanon \tCreate canonical induction variables in loops.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-loop-ivcanon"), maplecl::kHide); - -maplecl::Option oFtreeLoopLinear({"-ftree-loop-linear"}, - " -ftree-loop-linear \tEnable loop nest transforms. Same as -floop-nest-optimize.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-loop-linear"), maplecl::kHide); - -maplecl::Option oFtreeLoopOptimize({"-ftree-loop-optimize"}, - " -ftree-loop-optimize \tEnable loop optimizations on tree level.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-loop-optimize"), maplecl::kHide); - -maplecl::Option oFtreeLoopVectorize({"-ftree-loop-vectorize"}, - " -ftree-loop-vectorize \tEnable loop vectorization on trees.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-loop-vectorize"), maplecl::kHide); - -maplecl::Option oFtreeParallelizeLoops({"-ftree-parallelize-loops"}, - " -ftree-parallelize-loops \t\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-parallelize-loops"), maplecl::kHide); - -maplecl::Option oFtreePartialPre({"-ftree-partial-pre"}, - " -ftree-partial-pre \tIn SSA-PRE optimization on trees\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-partial-pre"), maplecl::kHide); - -maplecl::Option oFtreePhiprop({"-ftree-phiprop"}, - " -ftree-phiprop \tEnable hoisting loads from conditional pointers.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-phiprop"), maplecl::kHide); - -maplecl::Option oFtreePre({"-ftree-pre"}, - " -ftree-pre \tEnable SSA-PRE optimization on trees.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-pre"), maplecl::kHide); - -maplecl::Option oFtreePta({"-ftree-pta"}, - " -ftree-pta \tPerform function-local points-to analysis on trees.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-pta"), maplecl::kHide); - -maplecl::Option oFtreeReassoc({"-ftree-reassoc"}, - " -ftree-reassoc \tEnable reassociation on tree level.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-reassoc"), maplecl::kHide); - -maplecl::Option oFtreeSink({"-ftree-sink"}, - " -ftree-sink \tEnable SSA code sinking on trees.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-sink"), maplecl::kHide); - -maplecl::Option oFtreeSlpVectorize({"-ftree-slp-vectorize"}, - " -ftree-slp-vectorize \tEnable basic block vectorization (SLP) on trees.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-slp-vectorize"), maplecl::kHide); - -maplecl::Option oFtreeSlsr({"-ftree-slsr"}, - " -ftree-slsr \tPerform straight-line strength reduction.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-slsr"), maplecl::kHide); - -maplecl::Option oFtreeSra({"-ftree-sra"}, - " -ftree-sra \tPerform scalar replacement of aggregates.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-sra"), maplecl::kHide); - -maplecl::Option oFtreeSwitchConversion({"-ftree-switch-conversion"}, - " -ftree-switch-conversion \tPerform conversions of switch initializations.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-switch-conversion"), maplecl::kHide); - -maplecl::Option oFtreeTailMerge({"-ftree-tail-merge"}, - " -ftree-tail-merge \tEnable tail merging on trees.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-tail-merge"), maplecl::kHide); - -maplecl::Option oFtreeTer({"-ftree-ter"}, - " -ftree-ter \tReplace temporary expressions in the SSA->normal pass.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-ter"), maplecl::kHide); - -maplecl::Option oFtreeVrp({"-ftree-vrp"}, - " -ftree-vrp \tPerform Value Range Propagation on trees.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-vrp"), maplecl::kHide); - -maplecl::Option oFunconstrainedCommons({"-funconstrained-commons"}, - " -funconstrained-commons \tAssume common declarations may be overridden with ones with a larger " - "trailing array.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-unconstrained-commons"), maplecl::kHide); - -maplecl::Option oFunitAtATime({"-funit-at-a-time"}, - " -funit-at-a-time \tCompile whole compilation unit at a time.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-unit-at-a-time"), maplecl::kHide); - -maplecl::Option oFunrollAllLoops({"-funroll-all-loops"}, - " -funroll-all-loops \tPerform loop unrolling for all loops.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-unroll-all-loops"), maplecl::kHide); - -maplecl::Option oFunrollLoops({"-funroll-loops"}, - " -funroll-loops \tPerform loop unrolling when iteration count is known.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-unroll-loops"), maplecl::kHide); - -maplecl::Option oFunsafeMathOptimizations({"-funsafe-math-optimizations"}, - " -funsafe-math-optimizations \tAllow math optimizations that may violate IEEE or ISO standards.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-unsafe-math-optimizations"), maplecl::kHide); - -maplecl::Option oFunsignedBitfields({"-funsigned-bitfields"}, - " -funsigned-bitfields \tWhen \"signed\" or \"unsigned\" is not given make the bitfield unsigned.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-unsigned-bitfields"), maplecl::kHide); - -maplecl::Option oFunswitchLoops({"-funswitch-loops"}, - " -funswitch-loops \tPerform loop unswitching.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-unswitch-loops"), maplecl::kHide); - -maplecl::Option oFunwindTables({"-funwind-tables"}, - " -funwind-tables \tJust generate unwind tables for exception handling.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-unwind-tables"), maplecl::kHide); - -maplecl::Option oFuseCxaAtexit({"-fuse-cxa-atexit"}, - " -fuse-cxa-atexit \tUse __cxa_atexit to register destructors.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-use-cxa-atexit"), maplecl::kHide); - -maplecl::Option oFuseLdBfd({"-fuse-ld=bfd"}, - " -fuse-ld=bfd \tUse the bfd linker instead of the default linker.\n", - {driverCategory, ldCategory}, maplecl::kHide); - -maplecl::Option oFuseLdGold({"-fuse-ld=gold"}, - " -fuse-ld=gold \tUse the gold linker instead of the default linker.\n", - {driverCategory, ldCategory}, maplecl::kHide); - -maplecl::Option oFuseLinkerPlugin({"-fuse-linker-plugin"}, - " -fuse-linker-plugin \tEnables the use of a linker plugin during link-time optimization.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-use-linker-plugin"), maplecl::kHide); - -maplecl::Option oFvarTracking({"-fvar-tracking"}, - " -fvar-tracking \tPerform variable tracking.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-var-tracking"), maplecl::kHide); - -maplecl::Option oFvarTrackingAssignments({"-fvar-tracking-assignments"}, - " -fvar-tracking-assignments \tPerform variable tracking by annotating assignments.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-var-tracking-assignments"), maplecl::kHide); - -maplecl::Option oFvarTrackingAssignmentsToggle({"-fvar-tracking-assignments-toggle"}, - " -fvar-tracking-assignments-toggle \tToggle -fvar-tracking-assignments.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-var-tracking-assignments-toggle"), maplecl::kHide); - -maplecl::Option oFvariableExpansionInUnroller({"-fvariable-expansion-in-unroller"}, - " -fvariable-expansion-in-unroller \tApply variable expansion when loops are unrolled.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-variable-expansion-in-unroller"), maplecl::kHide); - -maplecl::Option oFvectCostModel({"-fvect-cost-model"}, - " -fvect-cost-model \tEnables the dynamic vectorizer cost model. Preserved for backward " - "compatibility.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-vect-cost-model"), maplecl::kHide); - -maplecl::Option oFverboseAsm({"-fverbose-asm"}, - " -fverbose-asm \tAdd extra commentary to assembler output.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-verbose-asm"), maplecl::kHide); - -maplecl::Option oFvisibilityInlinesHidden({"-fvisibility-inlines-hidden"}, - " -fvisibility-inlines-hidden \tMarks all inlined functions and methods as having hidden visibility.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-visibility-inlines-hidden"), maplecl::kHide); - -maplecl::Option oFvisibilityMsCompat({"-fvisibility-ms-compat"}, - " -fvisibility-ms-compat \tChanges visibility to match Microsoft Visual Studio by default.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-visibility-ms-compat"), maplecl::kHide); - -maplecl::Option oFvpt({"-fvpt"}, - " -fvpt \tUse expression value profiles in optimizations.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-vpt"), maplecl::kHide); - -maplecl::Option oFvtableVerify({"-fvtable-verify"}, - " -fvtable-verify \t\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-vtable-verify"), maplecl::kHide); - -maplecl::Option oFvtvCounts({"-fvtv-counts"}, - " -fvtv-counts \tOutput vtable verification counters.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-vtv-counts"), maplecl::kHide); - -maplecl::Option oFvtvDebug({"-fvtv-debug"}, - " -fvtv-debug \tOutput vtable verification pointer sets information.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-vtv-debug"), maplecl::kHide); - -maplecl::Option oFweb({"-fweb"}, - " -fweb \tConstruct webs and split unrelated uses of single variable.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-web"), maplecl::kHide); - -maplecl::Option oFwholeProgram({"-fwhole-program"}, - " -fwhole-program \tPerform whole program optimizations.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-whole-program"), maplecl::kHide); - -maplecl::Option oFwideExecCharset({"-fwide-exec-charset="}, - " -fwide-exec-charset= \tConvert all wide strings and character constants to character set .\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMwarnDynamicstack({"-mwarn-dynamicstack"}, - " -mwarn-dynamicstack \tEmit a warning if the function calls alloca or uses dynamically-sized arrays.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMwarnFramesize({"-mwarn-framesize"}, - " -mwarn-framesize \tEmit a warning if the current function exceeds the given frame size.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMwarnMcu({"-mwarn-mcu"}, - " -mwarn-mcu \tThis option enables or disables warnings about conflicts between the MCU name " - "specified by the -mmcu option and the ISA set by the -mcpu option and/or the hardware multiply support set by " - "the -mhwmult option.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-warn-mcu"), maplecl::kHide); - -maplecl::Option oMwarnMultipleFastInterrupts({"-mwarn-multiple-fast-interrupts"}, - " -mwarn-multiple-fast-interrupts \t\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-warn-multiple-fast-interrupts"), maplecl::kHide); - -maplecl::Option oMwarnReloc({"-mwarn-reloc"}, - " -mwarn-reloc \t-mwarn-reloc generates a warning instead.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-merror-reloc"), maplecl::kHide); - -maplecl::Option oMwideBitfields({"-mwide-bitfields"}, - " -mwide-bitfields \t\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-wide-bitfields"), maplecl::kHide); - -maplecl::Option oMwin32({"-mwin32"}, - " -mwin32 \tThis option is available for Cygwin and MinGW targets.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMwindows({"-mwindows"}, - " -mwindows \tThis option is available for MinGW targets.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMwordRelocations({"-mword-relocations"}, - " -mword-relocations \tOnly generate absolute relocations on word-sized values (i.e. R_ARM_ABS32).\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMx32({"-mx32"}, - " -mx32 \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMxgot({"-mxgot"}, - " -mxgot \tLift (do not lift) the usual restrictions on the size of the global offset " - "table.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-xgot"), maplecl::kHide); - -maplecl::Option oMxilinxFpu({"-mxilinx-fpu"}, - " -mxilinx-fpu \tPerform optimizations for the floating-point unit on Xilinx PPC 405/440.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMxlBarrelShift({"-mxl-barrel-shift"}, - " -mxl-barrel-shift \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMxlCompat({"-mxl-compat"}, - " -mxl-compat \tProduce code that conforms more closely to IBM XL compiler semantics when " - "using AIX-compatible ABI. \n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-xl-compat"), maplecl::kHide); - -maplecl::Option oMxlFloatConvert({"-mxl-float-convert"}, - " -mxl-float-convert \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMxlFloatSqrt({"-mxl-float-sqrt"}, - " -mxl-float-sqrt \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMxlGpOpt({"-mxl-gp-opt"}, - " -mxl-gp-opt \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMxlMultiplyHigh({"-mxl-multiply-high"}, - " -mxl-multiply-high \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMxlPatternCompare({"-mxl-pattern-compare"}, - " -mxl-pattern-compare \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMxlReorder({"-mxl-reorder"}, - " -mxl-reorder \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMxlSoftDiv({"-mxl-soft-div"}, - " -mxl-soft-div \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMxlSoftMul({"-mxl-soft-mul"}, - " -mxl-soft-mul \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMxlStackCheck({"-mxl-stack-check"}, - " -mxl-stack-check \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMxop({"-mxop"}, - " -mxop \tThese switches enable the use of instructions in the mxop.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMxpa({"-mxpa"}, - " -mxpa \tUse the MIPS eXtended Physical Address (XPA) instructions.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-xpa"), maplecl::kHide); - -maplecl::Option oMxsave({"-mxsave"}, - " -mxsave \tThese switches enable the use of instructions in the mxsave.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMxsavec({"-mxsavec"}, - " -mxsavec \tThese switches enable the use of instructions in the mxsavec.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMxsaveopt({"-mxsaveopt"}, - " -mxsaveopt \tThese switches enable the use of instructions in the mxsaveopt.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMxsaves({"-mxsaves"}, - " -mxsaves \tThese switches enable the use of instructions in the mxsaves.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMxy({"-mxy"}, - " -mxy \tPassed down to the assembler to enable the XY memory extension. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMyellowknife({"-myellowknife"}, - " -myellowknife \tOn embedded PowerPC systems, assume that the startup module is called crt0.o " - "and the standard C libraries are libyk.a and libc.a.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMzarch({"-mzarch"}, - " -mzarch \tWhen -mzarch is specified, generate code using the instructions available on " - "z/Architecture.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMzda({"-mzda"}, - " -mzda \tPut static or global variables whose size is n bytes or less into the first 32" - " kilobytes of memory.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMzdcbranch({"-mzdcbranch"}, - " -mzdcbranch \tAssume (do not assume) that zero displacement conditional branch instructions " - "bt and bf are fast. \n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-zdcbranch"), maplecl::kHide); - -maplecl::Option oMzeroExtend({"-mzero-extend"}, - " -mzero-extend \tWhen reading data from memory in sizes shorter than 64 bits, use zero-extending" - " load instructions by default, rather than sign-extending ones.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-zero-extend"), maplecl::kHide); - -maplecl::Option oMzvector({"-mzvector"}, - " -mzvector \tThe -mzvector option enables vector language extensions and builtins using " - "instructions available with the vector extension facility introduced with the IBM z13 machine generation. \n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-zvector"), maplecl::kHide); - -maplecl::Option oNo80387({"-no-80387"}, - " -no-80387 \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oNoCanonicalPrefixes({"-no-canonical-prefixes"}, - " -no-canonical-prefixes \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oNoIntegratedCpp({"-no-integrated-cpp"}, - " -no-integrated-cpp \tPerform preprocessing as a separate pass before compilation.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oNoSysrootSuffix({"-no-sysroot-suffix"}, - " -no-sysroot-suffix \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oNoall_load({"-noall_load"}, - " -noall_load \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oNocpp({"-nocpp"}, - " -nocpp \tDisable preprocessing.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oNodefaultlibs({"-nodefaultlibs"}, - " -nodefaultlibs \tDo not use the standard system libraries when linking. \n", - {driverCategory, ldCategory}, maplecl::kHide); - -maplecl::Option oNodevicelib({"-nodevicelib"}, - " -nodevicelib \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oNofixprebinding({"-nofixprebinding"}, - " -nofixprebinding \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oNolibdld({"-nolibdld"}, - " -nolibdld \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oNomultidefs({"-nomultidefs"}, - " -nomultidefs \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oNonStatic({"-non-static"}, - " -non-static \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oNoprebind({"-noprebind"}, - " -noprebind \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oNoseglinkedit({"-noseglinkedit"}, - " -noseglinkedit \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oNostartfiles({"-nostartfiles"}, - " -nostartfiles \tDo not use the standard system startup files when linking. \n", - {driverCategory, ldCategory}, maplecl::kHide); - -maplecl::Option oNostdinc({"-nostdinc++"}, - " -nostdinc++ \tDo not search standard system include directories for C++.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oNo_dead_strip_inits_and_terms({"-no_dead_strip_inits_and_terms"}, - " -no_dead_strip_inits_and_terms \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oOfast({"-Ofast"}, - " -Ofast \tOptimize for speed disregarding exact standards compliance.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oOg({"-Og"}, - " -Og \tOptimize for debugging experience rather than speed or size.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oP({"-p"}, - " -p \tEnable function profiling.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oLargeP({"-P"}, - " -P \tDo not generate #line directives.\n", - {driverCategory, clangCategory}, maplecl::kHide); - -maplecl::Option oPagezero_size({"-pagezero_size"}, - " -pagezero_size \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oParam({"--param"}, - " --param = \tSet parameter to value. See below for a complete list of parameters.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oPassExitCodes({"-pass-exit-codes"}, - " -pass-exit-codes \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oPedantic({"-pedantic"}, - " -pedantic \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oPedanticErrors({"-pedantic-errors"}, - " -pedantic-errors \tLike -pedantic but issue them as errors.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oPg({"-pg"}, - " -pg \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oPlt({"-plt"}, - " -plt \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oPrebind({"-prebind"}, - " -prebind \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oPrebind_all_twolevel_modules({"-prebind_all_twolevel_modules"}, - " -prebind_all_twolevel_modules \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oPrintFileName({"-print-file-name"}, - " -print-file-name \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oPrintLibgccFileName({"-print-libgcc-file-name"}, - " -print-libgcc-file-name \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oPrintMultiDirectory({"-print-multi-directory"}, - " -print-multi-directory \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oPrintMultiLib({"-print-multi-lib"}, - " -print-multi-lib \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oPrintMultiOsDirectory({"-print-multi-os-directory"}, - " -print-multi-os-directory \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oPrintMultiarch({"-print-multiarch"}, - " -print-multiarch \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oPrintObjcRuntimeInfo({"-print-objc-runtime-info"}, - " -print-objc-runtime-info \tGenerate C header of platform-specific features.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oPrintProgName({"-print-prog-name"}, - " -print-prog-name \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oPrintSearchDirs({"-print-search-dirs"}, - " -print-search-dirs \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oPrintSysroot({"-print-sysroot"}, - " -print-sysroot \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oPrintSysrootHeadersSuffix({"-print-sysroot-headers-suffix"}, - " -print-sysroot-headers-suffix \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oPrivate_bundle({"-private_bundle"}, - " -private_bundle \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oPthreads({"-pthreads"}, - " -pthreads \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oQ({"-Q"}, - " -Q \tMakes the compiler print out each function name as it is compiled, and print " - "some statistics about each pass when it finishes.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oQn({"-Qn"}, - " -Qn \tRefrain from adding .ident directives to the output file (this is the default).\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oQy({"-Qy"}, - " -Qy \tIdentify the versions of each tool used by the compiler, in a .ident assembler " - "directive in the output.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oRead_only_relocs({"-read_only_relocs"}, - " -read_only_relocs \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oRemap({"-remap"}, - " -remap \tRemap file names when including files.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oSectalign({"-sectalign"}, - " -sectalign \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oSectcreate({"-sectcreate"}, - " -sectcreate \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oSectobjectsymbols({"-sectobjectsymbols"}, - " -sectobjectsymbols \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oSectorder({"-sectorder"}, - " -sectorder \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oSeg1addr({"-seg1addr"}, - " -seg1addr \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oSegaddr({"-segaddr"}, - " -segaddr \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oSeglinkedit({"-seglinkedit"}, - " -seglinkedit \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oSegprot({"-segprot"}, - " -segprot \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oSegs_read_only_addr({"-segs_read_only_addr"}, - " -segs_read_only_addr \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oSegs_read_write_addr({"-segs_read_write_addr"}, - " -segs_read_write_addr \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oSeg_addr_table({"-seg_addr_table"}, - " -seg_addr_table \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oSeg_addr_table_filename({"-seg_addr_table_filename"}, - " -seg_addr_table_filename \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oSharedLibgcc({"-shared-libgcc"}, - " -shared-libgcc \tOn systems that provide libgcc as a shared library, these options force the use" - " of either the shared or static version, respectively.\n", - {driverCategory, ldCategory}, maplecl::kHide); - -maplecl::Option oSim({"-sim"}, - " -sim \tThis option, recognized for the cris-axis-elf, arranges to link with " - "input-output functions from a simulator library\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oSim2({"-sim2"}, - " -sim2 \tLike -sim, but pass linker options to locate initialized data at " - "s0x40000000 and zero-initialized data at 0x80000000.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oSingle_module({"-single_module"}, - " -single_module \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oStaticLibgcc({"-static-libgcc"}, - " -static-libgcc \tOn systems that provide libgcc as a shared library, these options " - "force the use of either the shared or static version, respectively.\n", - {driverCategory, ldCategory}, maplecl::kHide); - -maplecl::Option oStaticLibstdc({"-static-libstdc++"}, - " -static-libstdc++ \tWhen the g++ program is used to link a C++ program, it normally automatically " - "links against libstdc++. \n", - {driverCategory, ldCategory}, maplecl::kHide); - -maplecl::Option oSub_library({"-sub_library"}, - " -sub_library \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oSub_umbrella({"-sub_umbrella"}, - " -sub_umbrella \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oT({"-T"}, - " -T \tUse script as the linker script. This option is supported by most systems " - "using the GNU linker\n", - {driverCategory, ldCategory}, maplecl::kHide); - -maplecl::Option oTargetHelp({"-target-help"}, - " -target-help \tPrint (on the standard output) a description of target-specific command-line " - "options for each tool.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oThreads({"-threads"}, - " -threads \tAdd support for multithreading with the dce thread library under HP-UX. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oTime({"-time"}, - " -time \tReport the CPU time taken by each subprocess in the compilation sequence. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oTnoAndroidCc({"-tno-android-cc"}, - " -tno-android-cc \tDisable compilation effects of -mandroid, i.e., do not enable -mbionic, -fPIC," - " -fno-exceptions and -fno-rtti by default.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oTnoAndroidLd({"-tno-android-ld"}, - " -tno-android-ld \tDisable linking effects of -mandroid, i.e., pass standard Linux linking options" - " to the linker.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oTraditional({"-traditional"}, - " -traditional \tEnable traditional preprocessing. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oTraditionalCpp({"-traditional-cpp"}, - " -traditional-cpp \tEnable traditional preprocessing.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oTrigraphs({"-trigraphs"}, - " -trigraphs \t-trigraphs Support ISO C trigraphs.\n", - {driverCategory, clangCategory}, maplecl::kHide); - -maplecl::Option oTwolevel_namespace({"-twolevel_namespace"}, - " -twolevel_namespace \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oUmbrella({"-umbrella"}, - " -umbrella \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oUndef({"-undef"}, - " -undef \tDo not predefine system-specific and GCC-specific macros.\n", - {driverCategory, clangCategory}, maplecl::kHide); - -maplecl::Option oUndefined({"-undefined"}, - " -undefined \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oUnexported_symbols_list({"-unexported_symbols_list"}, - " -unexported_symbols_list \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oWa({"-Wa"}, - " -Wa \tPass option as an option to the assembler. If option contains commas, it is " - "split into multiple options at the commas.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oWhatsloaded({"-whatsloaded"}, - " -whatsloaded \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oWhyload({"-whyload"}, - " -whyload \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oWLtoTypeMismatch({"-Wlto-type-mismatch"}, - " -Wno-lto-type-mismatch \tDuring the link-time optimization warn about type mismatches in global " - "declarations from different compilation units. \n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-Wno-lto-type-mismatch"), maplecl::kHide); - -maplecl::Option oWmisspelledIsr({"-Wmisspelled-isr"}, - " -Wmisspelled-isr \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oWp({"-Wp"}, - " -Wp \tYou can use -Wp,option to bypass the compiler driver and pass " - "option directly through to the preprocessor.\n", - {driverCategory, clangCategory}, maplecl::kJoinedValue); +maplecl::Option functionReorderAlgorithm({"--function-reorder-algorithm"}, + " --function-reorder-algorithm=[call-chain-clustering]\n" + " \tChoose function reorder algorithm\n", + {driverCategory, cgCategory}, kOptMaple); -maplecl::Option oWrapper({"-wrapper"}, - " -wrapper \tInvoke all subcommands under a wrapper program. \n", - {driverCategory, unSupCategory}, maplecl::kHide); +maplecl::Option functionReorderProfile({"--function-reorder-profile"}, + " --function-reorder-profile=filepath\n" + " \tProfile for function reorder\n", + {driverCategory, cgCategory}, kOptMaple); -maplecl::Option oXassembler({"-Xassembler"}, - " -Xassembler \tPass option as an option to the assembler. \n", - {driverCategory, unSupCategory}, maplecl::kHide); +#ifdef ENABLE_MAPLE_SAN +maplecl::Option sanitizer({"-fsanitizer"}, + " -fsanitizer=address \tEnable AddressSanitizer.\n", + {driverCategory, meCategory}, kOptMaple); +#endif -maplecl::Option oXbindLazy({"-Xbind-lazy"}, - " -Xbind-lazy \tEnable lazy binding of function calls. \n", - {driverCategory, unSupCategory}, maplecl::kHide); +maplecl::Option rootPath({"-rootPath"}, + " -rootPath \tPass tmp root path to hir2mpl\n", + {driverCategory, hir2mplCategory}, kOptMaple, maplecl::kHide); -maplecl::Option oXbindNow({"-Xbind-now"}, - " -Xbind-now \tDisable lazy binding of function calls. \n", - {driverCategory, unSupCategory}, maplecl::kHide); +maplecl::Option oMQ({"-MQ"}, + " -MQ \t-MQ o Add a MAKE-quoted target.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::kJoinedValue); maplecl::Option oXlinker({"-Xlinker"}, " -Xlinker \tPass option as an option to the linker. \n", - {driverCategory, ldCategory}, maplecl::kHide); + {driverCategory, ldCategory}, kOptDriver | kOptLd, maplecl::kHide); maplecl::Option oXpreprocessor({"-Xpreprocessor"}, " -Xpreprocessor \tPass option as an option to the preprocessor. \n", - {driverCategory, clangCategory}, maplecl::kHide); - -maplecl::Option oYm({"-Ym"}, - " -Ym \tLook in the directory dir to find the M4 preprocessor. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oYP({"-YP"}, - " -YP \tSearch the directories dirs, and no others, for libraries specified with -l.\n", - {driverCategory, unSupCategory}, maplecl::kHide); + {driverCategory, clangCategory}, kOptFront, maplecl::kHide); maplecl::Option oZ({"-z"}, " -z \tPassed directly on to the linker along with the keyword keyword.\n", - {driverCategory, ldCategory}, maplecl::kHide); + {driverCategory, ldCategory}, kOptDriver | kOptLd, maplecl::kHide); maplecl::Option oU({"-u"}, " -u \tPretend the symbol symbol is undefined, to force linking of library modules " "to define it. \n", - {driverCategory, ldCategory}, maplecl::kHide); - -maplecl::Option oStd03({"-std=c++03"}, - " -std=c++03 \tConform to the ISO 1998 C++ standard revised by the 2003 technical corrigendum.\n", - {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oStd0x({"-std=c++0x"}, - " -std=c++0x \tDeprecated in favor of -std=c++11.\n", - {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); + {driverCategory, ldCategory}, kOptDriver | kOptLd, maplecl::kHide); -maplecl::Option oStd11({"-std=c++11"}, - " -std=c++11 \tConform to the ISO 2011 C++ standard.\n", - {driverCategory, ldCategory, clangCategory, unSupCategory}, maplecl::kHide); +maplecl::Option oWp({"-Wp"}, + " -Wp \tYou can use -Wp,option to bypass the compiler driver and pass " + "option directly through to the preprocessor.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::kJoinedValue); -maplecl::Option oStd14({"-std=c++14"}, - " -std=c++14 \tConform to the ISO 2014 C++ standard.\n", - {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); +maplecl::Option oT({"-T"}, + " -T \tUse script as the linker script. This option is supported by most systems " + "using the GNU linker\n", + {driverCategory, ldCategory}, kOptDriver | kOptLd, maplecl::kHide); -maplecl::Option oStd17({"-std=c++17"}, - " -std=c++17 \tConform to the ISO 2017 C++ standard.\n", - {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); +maplecl::Option oFtabstop({"-ftabstop="}, + " -ftabstop= \tSet the distance between tab stops.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::kHide); -maplecl::Option oStd1y({"-std=c++1y"}, - " -std=c++1y \tDeprecated in favor of -std=c++14.\n", - {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); +maplecl::Option oFinputCharset({"-finput-charset="}, + " -finput-charset= \tSpecify the default character set for source files.\n", + {driverCategory, clangCategory}, kOptFront); -maplecl::Option oStd1z({"-std=c++1z"}, - " -std=c++1z \tConform to the ISO 2017(?) C++ draft standard (experimental and incomplete " - "support).\n", - {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); +maplecl::Option oFexecCharset({"-fexec-charset="}, + " -fexec-charset= \tConvert all strings and character constants to character set .\n", + {driverCategory, clangCategory}, kOptFront); -maplecl::Option oStd98({"-std=c++98"}, - " -std=c++98 \tConform to the ISO 1998 C++ standard revised by the 2003 technical corrigendum.\n", - {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); +maplecl::Option marchE({"-march="}, + " -march= \tGenerate code for given CPU.\n", + {driverCategory, clangCategory, asCategory, ldCategory, unSupCategory}, + kOptFront | kOptLd | kOptNotFiltering, maplecl::kHide); -maplecl::Option oStd11p({"-std=c11"}, - " -std=c11 \tConform to the ISO 2011 C standard.\n", - {driverCategory, clangCategory}); +maplecl::Option oA({"-A"}, + " -A= \tAssert the to . Putting '-' before disables " + "the to assertion missing after %qs.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::kJoinedValue); -maplecl::Option oStdc1x({"-std=c1x"}, - " -std=c1x \tDeprecated in favor of -std=c11.\n", - {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); +maplecl::Option inlineMpltDir({"-finline-mplt-dir="}, + " -finline-mplt-dir= \tSpecify the inline mplt directory for exporting and importing.\n", + {driverCategory, hir2mplCategory, mpl2mplCategory}, kOptCommon | kOptOptimization | kOptMaple, maplecl::Init("")); -maplecl::Option oStd89({"-std=c89"}, - " -std=c89 \tConform to the ISO 1990 C standard.\n", - {driverCategory, clangCategory, unSupCategory, hir2mplCategory}, maplecl::kHide); +/* ##################### DIGITAL Options ############################################################### */ -maplecl::Option oStd90({"-std=c90"}, - " -std \tConform to the ISO 1998 C++ standard revised by the 2003 technical corrigendum.\n", - {driverCategory, clangCategory, unSupCategory, hir2mplCategory}, maplecl::kHide); +maplecl::Option helpLevel({"--level"}, + " --level=NUM \tPrint the help info of specified level.\n" + " \tNUM=0: All options (Default)\n" + " \tNUM=1: Product options\n" + " \tNUM=2: Experimental options\n" + " \tNUM=3: Debug options\n", + {driverCategory}, kOptMaple, maplecl::kHide); -maplecl::Option oStd99({"-std=c99"}, - " -std=c99 \tConform to the ISO 1999 C standard.\n", - {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); +maplecl::Option funcInliceSize({"-func-inline-size", "--func-inline-size"}, + " --func-inline-size \tSet func inline size.\n", + {driverCategory, hir2mplCategory}, kOptMaple); -maplecl::Option oStd9x({"-std=c9x"}, - " -std=c9x \tDeprecated in favor of -std=c99.\n", - {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); +maplecl::Option initOptNum({"-initOptNum", "--initOptNum"}, + " -initOptNum \tif initNum > 10000, hir2mpl will Make optimization for initListElements, " + "default value is 10000.\n", + {driverCategory, hir2mplCategory}, kOptMaple, maplecl::Init(10000)); -maplecl::Option oStd2003({"-std=f2003"}, - " -std=f2003 \tConform to the ISO Fortran 2003 standard.\n", - {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); +/* ##################### unsupport Options ############################################################### */ -maplecl::Option oStd2008({"-std=f2008"}, - " -std=f2008 \tConform to the ISO Fortran 2008 standard.\n", +maplecl::Option oWhatsloaded({"-whatsloaded"}, + " -whatsloaded \t\n", {driverCategory, unSupCategory}, maplecl::kHide); -maplecl::Option oStd2008ts({"-std=f2008ts"}, - " -std=f2008ts \tConform to the ISO Fortran 2008 standard including TS 29113.\n", +maplecl::Option oWhyload({"-whyload"}, + " -whyload \t\n", {driverCategory, unSupCategory}, maplecl::kHide); -maplecl::Option oStdf95({"-std=f95"}, - " -std=f95 \tConform to the ISO Fortran 95 standard.\n", - {driverCategory, unSupCategory}, maplecl::kHide); +maplecl::Option oWLtoTypeMismatch({"-Wlto-type-mismatch"}, + " -Wno-lto-type-mismatch \tDuring the link-time optimization warn about type mismatches in global " + "declarations from different compilation units. \n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-Wno-lto-type-mismatch"), maplecl::kHide); -maplecl::Option oStdgnu({"-std=gnu"}, - " -std=gnu \tConform to nothing in particular.\n", +maplecl::Option oWmisspelledIsr({"-Wmisspelled-isr"}, + " -Wmisspelled-isr \t\n", {driverCategory, unSupCategory}, maplecl::kHide); -maplecl::Option oStdgnu03p({"-std=gnu++03"}, - " -std=gnu++03 \tConform to the ISO 1998 C++ standard revised by the 2003 technical corrigendum " - "with GNU extensions.\n", - {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oStdgnuoxp({"-std=gnu++0x"}, - " -std=gnu++0x \tDeprecated in favor of -std=gnu++11.\n", - {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oStdgnu11p({"-std=gnu++11"}, - " -std=gnu++11 \tConform to the ISO 2011 C++ standard with GNU extensions.\n", - {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oStdgnu14p({"-std=gnu++14"}, - " -std=gnu++14 \tConform to the ISO 2014 C++ standard with GNU extensions.\n", - {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oStdgnu17p({"-std=gnu++17"}, - " -std=gnu++17 \tConform to the ISO 2017 C++ standard with GNU extensions.\n", - {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oStdgnu1yp({"-std=gnu++1y"}, - " -std=gnu++1y \tDeprecated in favor of -std=gnu++14.\n", - {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oStdgnu1zp({"-std=gnu++1z"}, - " -std=gnu++1z \tConform to the ISO 201z(7?) C++ draft standard with GNU extensions " - "(experimental and incomplete support).\n", - {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oStdgnu98p({"-std=gnu++98"}, - " -std=gnu++98 \tConform to the ISO 1998 C++ standard revised by the 2003 technical corrigendum " - "with GNU extensions.\n", - {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oStdgnu11({"-std=gnu11"}, - " -std=gnu11 \tConform to the ISO 2011 C standard with GNU extensions.\n", - {driverCategory, clangCategory}); - -maplecl::Option oStdgnu1x({"-std=gnu1x"}, - " -std=gnu1x \tDeprecated in favor of -std=gnu11.\n", - {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oStdgnu89({"-std=gnu89"}, - " -std=gnu89 \tConform to the ISO 1990 C standard with GNU extensions.\n", - {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oStdgnu90({"-std=gnu90"}, - " -std=gnu90 \tConform to the ISO 1990 C standard with GNU extensions.\n", - {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oStdgnu99({"-std=gnu99"}, - " -std=gnu99 \tConform to the ISO 1999 C standard with GNU extensions.\n", - {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oStdgnu9x({"-std=gnu9x"}, - " -std=gnu9x \tDeprecated in favor of -std=gnu99.\n", - {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oStd1990({"-std=iso9899:1990"}, - " -std=iso9899:1990 \tConform to the ISO 1990 C standard.\n", - {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oStd1994({"-std=iso9899:199409"}, - " -std=iso9899:199409 \tConform to the ISO 1990 C standard as amended in 1994.\n", - {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oStd1999({"-std=iso9899:1999"}, - " -std=iso9899:1999 \tConform to the ISO 1999 C standard.\n", - {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oStd199x({"-std=iso9899:199x"}, - " -std=iso9899:199x \tDeprecated in favor of -std=iso9899:1999.\n", - {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); +maplecl::Option oWrapper({"-wrapper"}, + " -wrapper \tInvoke all subcommands under a wrapper program. \n", + {driverCategory, unSupCategory}, maplecl::kHide); -maplecl::Option oStd2011({"-std=iso9899:2011"}, - " -std=iso9899:2011 \tConform to the ISO 2011 C standard.\n", - {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); +maplecl::Option oXbindLazy({"-Xbind-lazy"}, + " -Xbind-lazy \tEnable lazy binding of function calls. \n", + {driverCategory, unSupCategory}, maplecl::kHide); -maplecl::Option oStdlegacy({"-std=legacy"}, - " -std=legacy \tAccept extensions to support legacy code.\n", +maplecl::Option oXbindNow({"-Xbind-now"}, + " -Xbind-now \tDisable lazy binding of function calls. \n", {driverCategory, unSupCategory}, maplecl::kHide); maplecl::Option oFworkingDirectory({"-fworking-directory"}, @@ -3595,11 +973,6 @@ maplecl::Option oFzeroLink({"-fzero-link"}, " -fzero-link \tGenerate lazy class lookup (via objc_getClass()) for use inZero-Link mode.\n", {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-zero-link"), maplecl::kHide); -maplecl::Option oG({"-G"}, - " -G \tOn embedded PowerPC systems, put global and static items less than or equal " - "to num bytes into the small data or BSS sections instead of the normal data or BSS section. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - maplecl::Option oGcoff({"-gcoff"}, " -gcoff \tGenerate debug information in COFF format.\n", {driverCategory, unSupCategory}, maplecl::kHide); @@ -3688,10 +1061,6 @@ maplecl::Option oGz({"-gz"}, " -gz \tGenerate compressed debug sections.\n", {driverCategory, unSupCategory}, maplecl::kHide); -maplecl::Option oH({"-H"}, - " -H \tPrint the name of header files as they are used.\n", - {driverCategory, clangCategory}, maplecl::kHide); - maplecl::Option oHeaderpad_max_install_names({"-headerpad_max_install_names"}, " -headerpad_max_install_names \t\n", {driverCategory, unSupCategory}, maplecl::kHide); @@ -3704,22 +1073,10 @@ maplecl::Option oIdirafter({"-idirafter"}, " -idirafter \t-idirafter o Add oto the end of the system include path.\n", {driverCategory, unSupCategory}, maplecl::kHide); -maplecl::Option oIframework({"-iframework"}, - " -iframework \tLike -F except the directory is a treated as a system directory. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - maplecl::Option oImage_base({"-image_base"}, " -image_base \t\n", {driverCategory, unSupCategory}, maplecl::kHide); -maplecl::Option oImultilib({"-imultilib"}, - " -imultilib \t-imultilib o Set oto be the multilib include subdirectory.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oInclude({"-include"}, - " -include \t-include o Include the contents of obefore other files.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - maplecl::Option oInit({"-init"}, " -init \t\n", {driverCategory, unSupCategory}, maplecl::kHide); @@ -3728,38 +1085,10 @@ maplecl::Option oInstall_name({"-install_name"}, " -install_name \t\n", {driverCategory, unSupCategory}, maplecl::kHide); -maplecl::Option oIplugindir({"-iplugindir="}, - " -iplugindir= \t-iplugindir= o Set oto be the default plugin directory.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oIprefix({"-iprefix"}, - " -iprefix \t-iprefix o Specify oas a prefix for next two options.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oIquote({"-iquote"}, - " -iquote \t-iquote o Add oto the end of the quote include path.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oIsysroot({"-isysroot"}, - " -isysroot \t-isysroot o Set oto be the system root directory.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oIwithprefix({"-iwithprefix"}, - " -iwithprefix \t-iwithprefix oAdd oto the end of the system include path.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oIwithprefixbefore({"-iwithprefixbefore"}, - " -iwithprefixbefore \t-iwithprefixbefore o Add oto the end ofthe main include path.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - maplecl::Option oKeep_private_externs({"-keep_private_externs"}, " -keep_private_externs \t\n", {driverCategory, unSupCategory}, maplecl::kHide); -maplecl::Option oM({"-M"}, - " -M \tGenerate make dependencies.\n", - {driverCategory, clangCategory}, maplecl::kHide); - maplecl::Option oM1({"-m1"}, " -m1 \tGenerate code for the SH1.\n", {driverCategory, unSupCategory}, maplecl::kHide); @@ -3826,8 +1155,7 @@ maplecl::Option oM32({"-m32"}, {driverCategory, unSupCategory}, maplecl::kHide); maplecl::Option oM32Bit({"-m32-bit"}, - " -m32-bit \tArrange for stack frame, writable data and constants to all be " - "32-bit.\n", + " -m32-bit \tArrange for stack frame, writable data and constants to all be 32-bit.\n", {driverCategory, unSupCategory}, maplecl::kHide); maplecl::Option oM32bitDoubles({"-m32bit-doubles"}, @@ -4034,10 +1362,6 @@ maplecl::Option oMTLS({"-mTLS"}, " -mTLS \tAssume a large TLS segment when generating thread-local code.\n", {driverCategory, unSupCategory}, maplecl::DisableWith("-mtls"), maplecl::kHide); -maplecl::Option oMtlsDialect({"-mtls-dialect"}, - " -mtls-dialect \tSpecify TLS dialect.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - maplecl::Option oMtlsDirectSegRefs({"-mtls-direct-seg-refs"}, " -mtls-direct-seg-refs \t\n", {driverCategory, unSupCategory}, maplecl::kHide); @@ -4061,14 +1385,6 @@ maplecl::Option oMtoplevelSymbols({"-mtoplevel-symbols"}, "can be used with the PREFIX assembly directive.\n", {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-toplevel-symbols"), maplecl::kHide); -maplecl::Option oMtp({"-mtp"}, - " -mtp \tSpecify the access model for the thread local storage pointer. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMtpRegno({"-mtp-regno"}, - " -mtp-regno \tSpecify thread pointer register number.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - maplecl::Option oMtpcsFrame({"-mtpcs-frame"}, " -mtpcs-frame \tGenerate a stack frame that is compliant with the Thumb Procedure Call " "Standard for all non-leaf functions.\n", @@ -4084,14 +1400,6 @@ maplecl::Option oMtpfTrace({"-mtpf-trace"}, "in the operating system. \n", {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-tpf-trace"), maplecl::kHide); -maplecl::Option oMtrapPrecision({"-mtrap-precision"}, - " -mtrap-precision \tIn the Alpha architecture, floating-point traps are imprecise.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMtune({"-mtune="}, - " -mtune= \tOptimize for CPU. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - maplecl::Option oMtuneCtrlFeatureList({"-mtune-ctrl=feature-list"}, " -mtune-ctrl=feature-list \tThis option is used to do fine grain control of x86 code generation features.\n", {driverCategory, unSupCategory}, maplecl::kHide); @@ -4104,10 +1412,6 @@ maplecl::Option oMuls({"-muls"}, " -muls \t\n", {driverCategory, unSupCategory}, maplecl::kHide); -maplecl::Option oMultcost({"-multcost"}, - " -multcost \tReplaced by -mmultcost.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - maplecl::Option oMultcostNumber({"-multcost=number"}, " -multcost=number \tSet the cost to assume for a multiply insn.\n", {driverCategory, unSupCategory}, maplecl::kHide); @@ -4157,11 +1461,6 @@ maplecl::Option oMuninitConstInRodata({"-muninit-const-in-rodata"}, " -muninit-const-in-rodata \tPut uninitialized const variables in the read-only data section. \n", {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-uninit-const-in-rodata"), maplecl::kHide); -maplecl::Option oMunix({"-munix"}, - " -munix \tGenerate compiler predefines and select a startfile for the specified " - "UNIX standard. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - maplecl::Option oMunixAsm({"-munix-asm"}, " -munix-asm \tUse Unix assembler syntax. \n", {driverCategory, unSupCategory}, maplecl::kHide); @@ -4246,11 +1545,6 @@ maplecl::Option oMv8plus({"-mv8plus"}, " -mv8plus \tWith -mv8plus, Maple generates code for the SPARC-V8+ ABI.\n", {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-v8plus"), maplecl::kHide); -maplecl::Option oMveclibabi({"-mveclibabi"}, - " -mveclibabi \tSpecifies the ABI type to use for vectorizing intrinsics using an external l" - "ibrary. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - maplecl::Option oMvect8RetInMem({"-mvect8-ret-in-mem"}, " -mvect8-ret-in-mem \t\n", {driverCategory, unSupCategory}, maplecl::kHide); @@ -4333,24 +1627,11 @@ maplecl::Option oMwarnCellMicrocode({"-mwarn-cell-microcode"}, " -mwarn-cell-microcode \tWarn when a Cell microcode instruction is emitted. \n", {driverCategory, unSupCategory}, maplecl::kHide); -maplecl::Option oA({"-A"}, - " -A= \tAssert the to . Putting '-' before disables " - "the to assertion missing after %qs.\n", - {driverCategory, clangCategory}, maplecl::kJoinedValue); - maplecl::Option oO({"-O"}, " -O \tReduce code size and execution time, without performing any optimizations " "that take a great deal of compilation time.\n", {driverCategory, unSupCategory}, maplecl::kHide); -maplecl::Option oNoPie({"-no-pie"}, - " -no-pie \tDon't create a position independent executable.\n", - {driverCategory, ldCategory}); - -maplecl::Option staticLibmplpgo({"--static-libmplpgo"}, - " --static-libmplpgo \tStatic link using libmplpgo\n", - {driverCategory, cgCategory}); - /* #################################################################################################### */ } /* namespace opts */ diff --git a/src/mapleall/maple_driver/src/driver_runner.cpp b/src/mapleall/maple_driver/src/driver_runner.cpp index 95b5308982725456ad770a9917a7324fa0afc77f..61f90137a2626c189a62bbf39243ccf78e639e1e 100644 --- a/src/mapleall/maple_driver/src/driver_runner.cpp +++ b/src/mapleall/maple_driver/src/driver_runner.cpp @@ -13,6 +13,8 @@ * See the Mulan PSL v2 for more details. */ #include "driver_runner.h" +#include +#include #include "compiler.h" #include "mpl_timer.h" #include "mir_function.h" @@ -128,7 +130,7 @@ static void TrimString(std::string &str) { void DriverRunner::SolveCrossModuleInJava(MIRParser &parser) const { if (MeOption::optLevel < kLevelO2 || Options::lazyBinding || Options::skipPhase == "inline" || Options::buildApp != 0 || - !Options::useInline || !Options::useCrossModuleInline) { + !Options::useInline || !Options::importInlineMplt) { return; } std::string originBaseName = baseName; @@ -172,37 +174,78 @@ static std::string GetSingleFileName(const std::string input) { return input.substr(pos + 1); } +static void GetFiles(const std::string &path, std::set &fileSet) { + auto dir = opendir(path.c_str()); + if (!dir) { + LogInfo::MapleLogger(kLlErr) << "Error: Cannot open inline mplt dir " << Options::inlineMpltDir << '\n'; + CHECK_FATAL_FALSE("open dir failed!"); + } + auto file = readdir(dir); + while (file) { + if (strcmp(file->d_name, ".") == 0 || strcmp(file->d_name, "..") == 0) { + file = readdir(dir); + continue; + } + + auto fileName = path + kFileSeperatorChar + file->d_name; + + if (file->d_type == DT_DIR) { + GetFiles(fileName, fileSet); + } + + std::string keyWords = ".mplt_inline"; + if (file->d_type == DT_REG && fileName.size() > keyWords.size() && + fileName.substr(fileName.size() - keyWords.size()) == keyWords) { + (void)fileSet.emplace(fileName); + } + + file = readdir(dir); + } + if (closedir(dir) != 0) { + CHECK_FATAL_FALSE("close dir failed!"); + } +} + +static std::string GetPureName(const std::string &pathName) { + size_t posDot = pathName.find_last_of('.'); + if (posDot != std::string::npos) { + return pathName.substr(0, posDot); + } else { + return pathName; + } +} + void DriverRunner::SolveCrossModuleInC(MIRParser &parser) const { if (MeOption::optLevel < kLevelO2 || !Options::useInline || - !Options::useCrossModuleInline || Options::skipPhase == "inline" || - Options::importFileList == "") { + !Options::importInlineMplt || Options::skipPhase == "inline" || + Options::inlineMpltDir.empty()) { return; } - std::string fileName = GetSingleFileName(theModule->GetFileName()); - std::ifstream infile(Options::importFileList); - if (!infile.is_open()) { - LogInfo::MapleLogger(kLlErr) << "Cannot open importfilelist file " << Options::importFileList << '\n'; - } - LogInfo::MapleLogger() << "[CROSS_MODULE] read importfile from list: " << Options::importFileList << '\n'; - std::string input; - while (getline(infile, input)) { - TrimString(input); + + // find all inline mplt files from dir + std::set files; + GetFiles(Options::inlineMpltDir, files); + std::string curPath = FileUtils::GetCurDirPath(); + auto identPart = FileUtils::GetFileNameHashStr(curPath + kFileSeperatorChar + GetPureName(theModule->GetFileName())); + + LogInfo::MapleLogger() << "[CROSS_MODULE] read inline mplt files from: " << Options::inlineMpltDir << '\n'; + for (auto file : files) { + TrimString(file); // skip the mplt_inline file of this mirmodule to avoid duplicate definition. - if (input.empty() || GetSingleFileName(input).find(fileName) != std::string::npos) { + if (file.empty() || GetSingleFileName(file).find(identPart) != std::string::npos) { continue; } - std::ifstream optFile(input); + std::ifstream optFile(file); if (!optFile.is_open()) { abort(); } - LogInfo::MapleLogger() << "Starting parse " << input << '\n'; + LogInfo::MapleLogger() << "Starting parse " << file << '\n'; bool parsed = parser.ParseInlineFuncBody(optFile); if (!parsed) { parser.EmitError(actualInput); } optFile.close(); } - infile.close(); } ErrorCode DriverRunner::ParseInput() const { diff --git a/src/mapleall/maple_driver/src/ld_compiler.cpp b/src/mapleall/maple_driver/src/ld_compiler.cpp index 0a8a3b564e07411e982ac417f73fd800d438a6dd..7e9919c3fbd5d80c687c2593673902f0f4d50369 100644 --- a/src/mapleall/maple_driver/src/ld_compiler.cpp +++ b/src/mapleall/maple_driver/src/ld_compiler.cpp @@ -94,8 +94,7 @@ std::string LdCompiler::GetInputFileName(const MplOptions &options [[maybe_unuse } else { files += " "; } - - files += StringUtils::GetStrBeforeLast(file, ".") + ".o"; + files += file; } return files; } diff --git a/src/mapleall/maple_driver/src/mpl_options.cpp b/src/mapleall/maple_driver/src/mpl_options.cpp index f99db4f1bb9da862a9061f3f09cea06bbcc9169c..edd7d6a77ba8d63777ef1912c59d859d12348385 100644 --- a/src/mapleall/maple_driver/src/mpl_options.cpp +++ b/src/mapleall/maple_driver/src/mpl_options.cpp @@ -62,6 +62,7 @@ const std::vector kMapleCompilers = { "jbc2mpl", "hir2mpl", ErrorCode MplOptions::Parse(int argc, char **argv) { (void)maplecl::CommandLine::GetCommandLine().Parse(argc, argv); + EarlyHandlePicPie(); // Check -version -h option ErrorCode ret = HandleEarlyOptions(); if (ret != kErrorNoError) { @@ -69,9 +70,28 @@ ErrorCode MplOptions::Parse(int argc, char **argv) { } // Check whether the input files were valid ret = CheckInputFiles(); + if (!opts::ignoreUnsupOpt.IsEnabledByUser()) { + WarnUnsupportOptions(); + } + if (ret != kErrorNoError) { + return ret; + } + bool isNeedParse = false; + char **argv1 = nullptr; + ret = LtoMergeOptions(argc, argv, &argv1, isNeedParse); if (ret != kErrorNoError) { return ret; } + if (isNeedParse) { + driverCategory.ClearOpt(); + (void)maplecl::CommandLine::GetCommandLine().Parse(argc, argv1); + for (int i = 0; i < argc; i++) { + delete argv1[i]; + } + delete []argv1; + argv1 = nullptr; + EarlyHandlePicPie(); + } // We should recognize O0, O2 and run options firstly to decide the real options ret = HandleOptimizationLevelOptions(); if (ret != kErrorNoError) { @@ -84,10 +104,10 @@ ErrorCode MplOptions::Parse(int argc, char **argv) { std::string pgoLibPath = ""; if (FileUtils::SafeGetenv(kMapleRoot) != "" && FileUtils::SafeGetenv(kGetOsVersion) != "") { pgoLibPath = FileUtils::SafeGetenv(kMapleRoot) + "/libpgo/lib_" + - FileUtils::SafeGetenv(kGetOsVersion) + "/" + libpgoName; + FileUtils::SafeGetenv(kGetOsVersion) + kFileSeperatorStr + libpgoName; } else { - std::string tmpFilePath = maple::StringUtils::GetStrBeforeLast(exeFolder, "/"); - pgoLibPath = maple::StringUtils::GetStrBeforeLast(tmpFilePath, "/") + "/lib/libc_pgo/" + libpgoName; + std::string tmpFilePath = maple::StringUtils::GetStrBeforeLast(exeFolder, kFileSeperatorStr); + pgoLibPath = maple::StringUtils::GetStrBeforeLast(tmpFilePath, kFileSeperatorStr) + "/lib/libc_pgo/" + libpgoName; } CHECK_FATAL(FileUtils::IsFileExists(pgoLibPath), "%s not exit.", pgoLibPath.c_str()); std::string threadLibPath = "-lpthread"; @@ -118,9 +138,269 @@ ErrorCode MplOptions::Parse(int argc, char **argv) { return ret; } + ret = LtoWriteOptions(); return ret; } +void MplOptions::EarlyHandlePicPie() const { + if (opts::fpic.IsEnabledByUser() || opts::fPIC.IsEnabledByUser()) { + // To avoid fpic mode being modified twice, need to ensure fpie is not opened. + if (!opts::fpie && !opts::fpie.IsEnabledByUser() && !opts::fPIE.IsEnabledByUser() && !opts::fPIE) { + if (opts::fPIC && opts::fPIC.IsEnabledByUser()) { + CGOptions::SetPICOptionHelper(maplebe::CGOptions::kLargeMode); + CGOptions::SetPIEMode(maplebe::CGOptions::kClose); + } else if (opts::fpic && opts::fpic.IsEnabledByUser()) { + CGOptions::SetPICOptionHelper(maplebe::CGOptions::kSmallMode); + CGOptions::SetPIEMode(maplebe::CGOptions::kClose); + } else { + CGOptions::SetPICMode(maplebe::CGOptions::kClose); + } + } + } + if (opts::fpie.IsEnabledByUser() || opts::fPIE.IsEnabledByUser()) { + if (opts::fPIE && opts::fPIE.IsEnabledByUser()) { + CGOptions::SetPIEOptionHelper(maplebe::CGOptions::kLargeMode); + } else if (opts::fpie && opts::fpie.IsEnabledByUser()) { + CGOptions::SetPIEOptionHelper(maplebe::CGOptions::kSmallMode); + } else { + CGOptions::SetPIEMode(maplebe::CGOptions::kClose); + } + } +} + +// 4 > item->second means Compilation Optimization Options +// 4 =< item->second < 7 means pic opt +// 7 =< item->second < 10 means pie opt +// 6 = item->second means -fno-pic +// 9 = item->second means -fno-pie +constexpr int compileLevelOptEnd = 4; +constexpr int picOpt = 7; +constexpr int pieOpt = 10; +constexpr int fNoPicOpt = 6; +constexpr int fNoPieOpt = 9; + +// 1. Combination of optimization options: +// The highest optimization level involved in compilation prevails. For example, +// if -O1 and -O2 occur at the same time, -O2 takes effect. The OS and O2 are the same. +// 2. Other options, such as -mplcg-opt and -mtls-size, take effect only when they are +// the same in all option files corresponding to fake.o. +// 3. The merged option set is added before the command line parameter. + +ErrorCode MplOptions::MergeOptions(std::vector> optVec, + std::vector &finalOptVec) const { + size_t size = optVec.size(); + std::unordered_map needMergeOp = {{"-fpic", 4}, {"-fPIC", 5}, {"-O0", 0}, {"-O1", 1}, {"-O2", 2}, + {"-O3", 3}, {"-Os", 2}, {"-fpie", 7}, {"-fPIE", 8}, {"-fno-pie", 9}, {"-fno-pic", 6}}; + bool picOrPie = false; + for (size_t i = 0; i < optVec[0].size(); ++i) { + std::string opt = optVec[0][i]; + auto item = needMergeOp.find(opt); + if (item != needMergeOp.end()) { + if (item->second >= compileLevelOptEnd && item->second < pieOpt) { + picOrPie = true; + } + finalOptVec.push_back(opt); + continue; + } + for (size_t idx = 1; idx < size; ++idx) { + if (std::find(optVec[idx].begin(), optVec[idx].end(), opt) == optVec[idx].end()) { + return kErrorLtoInvalidParameter; + } + } + finalOptVec.push_back(opt); + } + if (!picOrPie) { + finalOptVec.emplace_back("-fno-pie"); + } + for (size_t i = 1; i < optVec.size(); ++i) { + picOrPie = false; + std::string pic = ""; + std::string pie = ""; + for (size_t optIdx = 0; optIdx < optVec[i].size(); ++optIdx) { + auto item = needMergeOp.find(optVec[i][optIdx]); + if (item != needMergeOp.end()) { + if (item->second < compileLevelOptEnd) { + bool isExit = false; + for (size_t optIndex = 0; optIndex < finalOptVec.size(); ++optIndex) { + auto item1 = needMergeOp.find(finalOptVec[optIndex]); + if (item1 != needMergeOp.end() && item1->second < compileLevelOptEnd) { + int level = std::max(item->second, item1->second); + finalOptVec[optIndex] = "-O" + std::to_string(level); + isExit = true; + } + } + if (!isExit) { + finalOptVec.push_back(optVec[i][optIdx]); + } + } else if (item->second < picOpt) { + pic = optVec[i][optIdx]; + picOrPie = true; + } else if (item->second < pieOpt) { + pie = optVec[i][optIdx]; + picOrPie = true; + } + } + } + if (!picOrPie) { + optVec[i].emplace_back("-fno-pie"); + pie = "-fno-pie"; + } + // Merge PIC options: -fPIC + -fpic = -fpic + // -fPIC/-fpic + -fno-pic = -fno-pic + // -fpic/-fPIC + nothing = nothing + // Merge PIE options: -fpic/-fPIC + -fPIE = -fpie + // -fPIC/-fpic + -fpie = -fpie + // -fPIE + -fpie = -fpie + // -fpie/-fPIE + nothing = nothing + // -fpie/-fPIE + fno-pie = -fno-pie + for (size_t optIdx = 0; optIdx < finalOptVec.size(); ++optIdx) { + auto item = needMergeOp.find(finalOptVec[optIdx]); + if (item != needMergeOp.end() && item->second >= compileLevelOptEnd && item->second < pieOpt) { + if (item->second == fNoPicOpt || item->second == fNoPieOpt) { + continue; + } else if (item->second < picOpt) { + if (pic == "-fno-pic" || pic == "") { + if (pie != "") { + bool big = item->first == "-fPIC" && pie == "-fPIE"; + finalOptVec[optIdx] = pie == "-fno-pie" ? "-fno-pie" : big ? "-fPIE" : "-fpie"; + } else if (pic != "") { + finalOptVec[optIdx] = pic; + } else { + (void)finalOptVec.erase(std::remove(finalOptVec.begin(), finalOptVec.end(), finalOptVec[optIdx]), + finalOptVec.end()); + } + } else if (pic == "-fpic" && finalOptVec[optIdx] == "-fPIC") { + finalOptVec[optIdx] = pic; + } + } else { + if (pie == "-fno-pie" || pie == "") { + if (pic != "") { + if ((pic == "-fpic" || pic == "-fno-pic") && finalOptVec[optIdx] == "-fPIE") { + finalOptVec[optIdx] = pic == "-fno-pic" ? "-fno-pie" : "-fpie"; + } else if (pic == "-fno-pic") { + finalOptVec[optIdx] = "-fno-pie"; + } + } else if (pie != "") { + finalOptVec[optIdx] = pie; + } else { + (void)finalOptVec.erase(std::remove(finalOptVec.begin(), finalOptVec.end(), finalOptVec[optIdx]), + finalOptVec.end()); + } + } else if (pie == "-fpie" && finalOptVec[optIdx] == "-fPIE") { + finalOptVec[optIdx] = pie; + } + } + } + } + } + return kErrorNoError; +} + +void MplOptions::AddOptions(int argc, char **argv, std::vector &finalOptVec) const { + for (int i = 1; i < argc; i++) { + finalOptVec.push_back(std::string(*(argv + i))); + } +} + +ErrorCode MplOptions::LtoMergeOptions(int &argc, char **argv, char ***argv1, bool &isNeedParse) { + if (!isAllAst) { + return kErrorNoError; + } + std::vector> optVec; + std::vector finalOptVec; + finalOptVec.push_back(std::string(*argv)); + for (auto &inputFile : inputInfos) { + finalOptVec.push_back(inputFile->GetInputFile()); + std::string filePath = FileUtils::GetRealPath(inputFile->GetInputFile()); + if (inputFile->GetInputFileType() != InputFileType::kFileTypeOast) { + continue; + } + filePath = FileUtils::GetRealPath(inputFile->GetInputFile()); + std::vector optionVec; + std::string optLine = FileUtils::GetClangAstOptString(filePath); + if (StringUtils::StartsWith(optLine, "\"") && StringUtils::EndsWith(optLine, "\"")) { + (void)optLine.erase(optLine.begin()); + optLine.pop_back(); + } + StringUtils::Split(optLine, optionVec, kWhitespaceChar); + optVec.push_back(optionVec); + } + if (optVec.empty()) { + return kErrorNoError; + } + isNeedParse = true; + ErrorCode ret = MergeOptions(optVec, finalOptVec); + if (ret != kErrorNoError) { + return ret; + } + AddOptions(argc, argv, finalOptVec); + argc = static_cast(finalOptVec.size()); + char **p = new char *[argc]; + for (size_t i = 0; i < finalOptVec.size(); ++i) { + size_t len = finalOptVec[i].size() + 1; + p[i] = new char[static_cast(len)]; + strcpy_s(p[i], len, finalOptVec[i].c_str()); + } + *argv1 = p; + return kErrorNoError; +} + +void MplOptions::LtoWritePicPie(const std::string &optName, std::string <oOptString, bool &pic, bool &pie) const { + std::string optName1 = ""; + bool isPic = false; + if (!pic && (optName == "-fpic" || optName == "-fPIC")) { + pic = true; + isPic = true; + } else if (!pie && (optName == "-fpie" || optName == "-fPIE")) { + pie = true; + } else { + ltoOptString += optName + kWhitespaceStr; + return; + } + if (CGOptions::GetPICMode() == maplebe::CGOptions::kClose) { + optName1 = isPic ? "-fno-pic" : "-fno-pie"; + } else if (CGOptions::GetPICMode() == maplebe::CGOptions::kSmallMode) { + optName1 = isPic ? "-fpic" : "-fpie"; + } else { + optName1 = isPic ? "-fPIC" : "-fPIE"; + } + ltoOptString += optName1 + kWhitespaceStr; +} + +ErrorCode MplOptions::LtoWriteOptions() { + if (!(opts::linkerTimeOpt.IsEnabledByUser() && opts::compileWOLink.IsEnabledByUser())) { + return kErrorNoError; + } + optString = "\""; + isLto = true; + bool pic = false; + bool pie = false; + for (size_t i = 0; i < driverCategory.GetEnabledOption().size(); ++i) { + auto option = driverCategory.GetEnabledOption()[i]; + std::string optName = option->GetName(); + if (((option->GetOptType() & (opts::kOptFront | opts::kOptDriver | opts::kOptLd)) != 0) && + ((option->GetOptType() & opts::kOptNotFiltering) == 0)) { + continue; + } + if (((option->GetOptType() & opts::kOptNone) != 0) && optName != "-foffload-options") { + continue; + } + if (option->ExpectedVal() == maplecl::ValueExpectedType::kValueRequired) { + size_t len = option->GetRawValues().size() - 1; + if (option->IsJoinedValPermitted() || StringUtils::EndsWith(optName, "=")) { + optString = optString + kWhitespaceStr + optName + option->GetRawValues()[len] + kWhitespaceStr; + } else { + optString = optString + kWhitespaceStr + optName + "=" + option->GetRawValues()[len] + kWhitespaceStr; + } + } else { + LtoWritePicPie(optName, optString, pic, pie); + } + } + optString.pop_back(); + optString += "\""; + return kErrorNoError; +} + ErrorCode MplOptions::HandleOptions() { if (opts::output.IsEnabledByUser() && inputInfos.size() > 1 && (opts::onlyCompile.IsEnabledByUser() || opts::compileWOLink.IsEnabledByUser())) { @@ -336,12 +616,11 @@ std::unique_ptr MplOptions::DecideRunningPhasesByType(const InputInfo *c case InputFileType::kFileTypeBpl: break; case InputFileType::kFileTypeObj: + case InputFileType::kFileTypeNone: isNeedMplcg = false; isNeedMapleComb = false; isNeedAs = false; break; - case InputFileType::kFileTypeNone: - return nullptr; default: return nullptr; } @@ -404,7 +683,10 @@ ErrorCode MplOptions::DecideRunningPhases() { tmpInputInfos.clear(); auto frontOastInfo = hirInputFiles.front(); (void)hirInputFiles.erase(hirInputFiles.begin()); - inputInfos.push_back(std::make_unique(frontOastInfo)); + ret = InitInputFiles(frontOastInfo); + if (ret != kErrorNoError) { + return ret; + } inputInfos.push_back(std::make_unique(InputInfo(inputInfos.back()->GetOutputFolder() + "tmp.mpl", InputFileType::kFileTypeMpl, "tmp.mpl", inputInfos.back()->GetOutputFolder(), inputInfos.back()->GetOutputFolder(), "tmp", inputInfos.back()->GetOutputFolder() + "tmp"))); @@ -427,8 +709,9 @@ ErrorCode MplOptions::DecideRunningPhases() { " linker input file unused because linking not done " << std::endl; } if ((lastAction->GetTool() == kAsFlag && !opts::compileWOLink) || - (inputInfo->GetInputFileType() == InputFileType::kFileTypeObj && (!opts::compileWOLink.IsEnabledByUser() && - !opts::onlyCompile.IsEnabledByUser()))) { + ((inputInfo->GetInputFileType() == InputFileType::kFileTypeObj || + inputInfo->GetInputFileType() == InputFileType::kFileTypeNone) && + (!opts::compileWOLink.IsEnabledByUser() && !opts::onlyCompile.IsEnabledByUser()))) { /* 1. For linking step, inputActions are all assembly actions; * 2. If we try to link with maple driver, inputActions are all kInputPhase objects; */ @@ -587,6 +870,7 @@ InputInfo *MplOptions::AllocateInputInfo(const std::string &inputFile) { } ErrorCode MplOptions::CheckInputFiles() { + ErrorCode ret = kErrorNoError; auto &badArgs = maplecl::CommandLine::GetCommandLine().badCLArgs; /* Set input files with --infile="file1 file2" option */ @@ -600,21 +884,26 @@ ErrorCode MplOptions::CheckInputFiles() { /* inputInfo describes each input file for driver */ for (auto &inFile : splitsInputFiles) { - if (FileUtils::IsFileExists(inFile)) { - inputFiles.push_back(inFile); - inputInfos.push_back(std::make_unique(inFile)); - } else { + if (!FileUtils::IsFileExists(inFile)) { LogInfo::MapleLogger(kLlErr) << "File does not exist: " << inFile << "\n"; return kErrorFileNotFound; } + ret = InitInputFiles(inFile); + if (ret != kErrorNoError) { + return ret; + } + (void)inputFiles.emplace_back(inFile); } } /* Set input files directly: maple file1 file2 */ for (auto &arg : badArgs) { if (FileUtils::IsFileExists(arg.first)) { - inputFiles.push_back(arg.first); - inputInfos.push_back(std::make_unique(arg.first)); + ret = InitInputFiles(arg.first); + if (ret != kErrorNoError) { + return ret; + } + (void)inputFiles.emplace_back(arg.first); } else { LogInfo::MapleLogger(kLlErr) << "Unknown option or non-existent input file: " << arg.first << "\n"; if (!opts::ignoreUnkOpt) { @@ -642,10 +931,38 @@ ErrorCode MplOptions::CheckInputFiles() { if (inputFiles.empty()) { return kErrorFileNotFound; } + return kErrorNoError; +} +ErrorCode MplOptions::InitInputFiles(const std::string &filename) { + auto inputFile = std::make_unique(filename); + if (inputFile->GetInputFileType() == InputFileType::kFileTypeNone && + FileUtils::GetFileTypeByMagicNumber(filename) == InputFileType::kFileTypeOast) { + if (opts::linkerTimeOpt.IsEnabledByUser()) { + inputFile->SetInputFileType(InputFileType::kFileTypeOast); + } else { + return kErrorNeedLtoOption; + } + } + if (!FileUtils::IsSupportFileType(inputFile->GetInputFileType())) { + return kErrorUnKnownFileType; + } + (void)inputInfos.emplace_back(std::move(inputFile)); return kErrorNoError; } +void MplOptions::WarnUnsupportOptions() const { + auto &unsupportOptions = maplecl::CommandLine::GetCommandLine().unsupportOptions; + for (auto tmp : unsupportOptions) { + if (tmp == "-march=armv8-a+crc") { + maple::LogInfo::MapleLogger(maple::kLlWarn) << "Warning: " + << "The crc instruction is not fully implemented!" << '\n'; + continue; + } + maple::LogInfo::MapleLogger() << "Warning: " << tmp << " has not been support!" << '\n'; + } +} + ErrorCode MplOptions::AppendCombOptions(MIRSrcLang srcLang) { ErrorCode ret = kErrorNoError; if (runMode == RunMode::kCustomRun) { diff --git a/src/mapleall/maple_driver/src/parse_spec.cpp b/src/mapleall/maple_driver/src/parse_spec.cpp index 351503aebdba2c027aa35ab745555e32cc5e7e25..d6161a1a0e7256fa852212a179a8a41ff85da635 100644 --- a/src/mapleall/maple_driver/src/parse_spec.cpp +++ b/src/mapleall/maple_driver/src/parse_spec.cpp @@ -20,17 +20,18 @@ namespace maple { -std::vector ParseSpec::GetOpt(const std::string &cmd, const std::string &args) { +std::vector ParseSpec::GetOpt(const std::vector args) { std::vector res; std::string result = ""; - ErrorCode ret = SafeExe::Exe(cmd, args, result); + ErrorCode ret = SafeExe::Exe(args, result); if (ret != kErrorNoError) { return res; } std::vector gccOutput; StringUtils::Split(result, gccOutput, '\n'); for (size_t index = 0; index < gccOutput.size(); index++) { - if (gccOutput[index].find("cc1") != std::string::npos) { + if (gccOutput[index].find("cc1") != std::string::npos && + gccOutput[index].find("COLLECT_GCC_OPTIONS=") == std::string::npos) { StringUtils::Split(gccOutput[index], res, ' '); break; } @@ -39,19 +40,51 @@ std::vector ParseSpec::GetOpt(const std::string &cmd, const std::st } bool IsMapleOptionOrInputFile(const std::string &opt, const MplOptions &mplOptions, bool &isNeedNext) { - std::vector driverOptAndInputFile = {"--ignore-unknown-options", "--hir2mpl-opt=", "--mpl2mpl-opt=", - "-specs", "-specs=", "--save-temps", "-o", "--maple-phase", "-tmp-folder", "--me-opt=", "--mplcg-opt=", - "--static-libmplpgo", "--lite-pgo-verify", "--lite-pgo-gen", "--lite-pgo-file", "--lite-pgo-file=", "--run=", - "--option=", "--infile", "--quiet", "--lite-pgo-output-func=", "--lite-pgo-white-list=", - "--instrumentation-dir="}; for (auto &inputFile : mplOptions.GetInputInfos()) { - driverOptAndInputFile.push_back(inputFile->GetInputFile()); + if (inputFile->GetInputFile() == opt) { + return true; + } + } + // --save-temps will make -E appear + if (opt == "--save-temps") { + return true; } - driverOptAndInputFile.push_back(opts::output.GetValue()); - if (opt == "-o" || opt == "-tmp-folder" || opt == "-specs" || opt == "--infile" || opt == "--lite-pgo-file") { + if (StringUtils::StartsWith(opt, "-specs=")) { + return true; + } else if (StringUtils::StartsWith(opt, "-specs")) { isNeedNext = false; + return true; + } + maplecl::OptionInterface *option = nullptr; + maplecl::KeyArg keyArg(opt); + auto optMap = driverCategory.options; + auto pos = opt.find('='); + auto item = optMap.find(std::string(opt)); + if (pos != std::string::npos) { + if (item == optMap.end()) { + item = optMap.find(std::string(opt.substr(0, pos + 1))); + if (item == optMap.end()) { + item = optMap.find(std::string(opt.substr(0, pos))); + if (item == optMap.end()) { + option = maplecl::CommandLine::GetCommandLine().CheckJoinedOptions(keyArg, driverCategory); + } + } + } + } else { + if (item == optMap.end()) { + option = maplecl::CommandLine::GetCommandLine().CheckJoinedOptions(keyArg, driverCategory); + } + } + if (option != nullptr) { + isNeedNext = opt.length() == option->GetOptName().length() ? false : true; + return (option->GetOptType() & opts::kOptMaple) != 0; + } else if (item != optMap.end()) { + if ((item->second->GetOptType() & opts::kOptMaple) != 0) { + isNeedNext = opt.length() > item->second->GetOptName().length() ? true : false; + return true; + } } - return std::find(driverOptAndInputFile.begin(), driverOptAndInputFile.end(), opt) != driverOptAndInputFile.end(); + return false; } ErrorCode ParseSpec::GetOptFromSpecsByGcc(int argc, char **argv, const MplOptions &mplOptions) { @@ -62,32 +95,34 @@ ErrorCode ParseSpec::GetOptFromSpecsByGcc(int argc, char **argv, const MplOption if (!FileUtils::CreateFile(fileName)) { return kErrorCreateFile; } - std::string gccBin = FileUtils::GetGccBin(); - std::string arg = "-v -S " + fileName + " -o " + FileUtils::GetInstance().GetTmpFolder() + "maple.s "; - std::vector defaultOptVec = GetOpt(gccBin, arg); + std::vector arg; + arg.emplace_back(FileUtils::GetGccBin()); + arg.emplace_back("-c"); + arg.emplace_back("-v"); + arg.emplace_back(fileName); + arg.emplace_back("-o"); + arg.emplace_back(FileUtils::GetInstance().GetTmpFolder() + "maple"); + std::vector defaultOptVec = GetOpt(arg); if (argc > 0) { --argc; ++argv; // skip program name argv[0] if present } while (argc > 0 && *argv != nullptr) { std::string tmpOpt = *argv; - std::string opt = tmpOpt.find("=") != std::string::npos ? StringUtils::GetStrBeforeFirst(tmpOpt, "=") + "=" : - tmpOpt; bool isNeedNext = true; - if (!IsMapleOptionOrInputFile(opt, mplOptions, isNeedNext)) { - std::string optString = *argv; - arg += optString; - arg += " "; - } - if (!isNeedNext) { - ++argv; - --argc; + if (!IsMapleOptionOrInputFile(tmpOpt, mplOptions, isNeedNext)) { + arg.emplace_back(tmpOpt); + } else { + if (!isNeedNext) { + ++argv; + --argc; + } } ++argv; --argc; } - arg = arg + "-specs=" + opts::specs.GetValue(); - std::vector cmdOptVec = GetOpt(gccBin, arg); + arg.emplace_back("-specs=" + opts::specs.GetValue()); + std::vector cmdOptVec = GetOpt(arg); if (cmdOptVec.size() == 0) { return kErrorInvalidParameter; } diff --git a/src/mapleall/maple_driver/src/triple.cpp b/src/mapleall/maple_driver/src/triple.cpp index d7ead6c8e8762abdb14384b3a7b2fbbdafbcd2a2..0a909489d3da33dc0d6e44625229882f51931d5d 100644 --- a/src/mapleall/maple_driver/src/triple.cpp +++ b/src/mapleall/maple_driver/src/triple.cpp @@ -21,4406 +21,15 @@ namespace opts { const maplecl::Option bigendian({"-Be", "--Be", "--BigEndian", "-be", "--be", "-mbig-endian"}, " --BigEndian/-Be \tUsing BigEndian\n" " --no-BigEndian \tUsing LittleEndian\n", - {driverCategory, hir2mplCategory, dex2mplCategory, ipaCategory}, maplecl::DisableWith("--no-BigEndian")); + {driverCategory, hir2mplCategory, dex2mplCategory, ipaCategory}, kOptMaple, maplecl::DisableWith("--no-BigEndian")); const maplecl::Option ilp32({"--ilp32", "-ilp32", "--arm64-ilp32"}, " --ilp32 \tArm64 with a 32-bit ABI instead of a 64bit ABI\n", - {driverCategory, hir2mplCategory, dex2mplCategory, ipaCategory}); + {driverCategory, hir2mplCategory, dex2mplCategory, ipaCategory}, kOptMaple); const maplecl::Option mabi({"-mabi"}, " -mabi= \tSpecify integer and floating-point calling convention\n", - {driverCategory, hir2mplCategory, dex2mplCategory, ipaCategory}, maplecl::kHide); - -maplecl::Option oM68030({"-m68030"}, - " -m68030 \tGenerate output for a 68030. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oM68040({"-m68040"}, - " -m68040 \tGenerate output for a 68040.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oM68060({"-m68060"}, - " -m68060 \tGenerate output for a 68060.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oM68881({"-m68881"}, - " -m68881 \tGenerate floating-point instructions. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oM8Bit({"-m8-bit"}, - " -m8-bit \tArrange for stack frame, writable data and constants to all 8-bit aligned\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oM8bitIdiv({"-m8bit-idiv"}, - " -m8bit-idiv \tThis option generates a run-time check\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oM8byteAlign({"-m8byte-align"}, - " -m8byte-align \tEnables support for double and long long types to be aligned on " - "8-byte boundaries.\n", - {driverCategory, unSupCategory}, maplecl::kHide, maplecl::DisableWith("-mno-8byte-align")); - -maplecl::Option oM96bitLongDouble({"-m96bit-long-double"}, - " -m96bit-long-double \tControl the size of long double type\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMA6({"-mA6"}, - " -mA6 \tCompile for ARC600.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMA7({"-mA7"}, - " -mA7 \tCompile for ARC700.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMabicalls({"-mabicalls"}, - " -mabicalls \tGenerate (do not generate) code that is suitable for SVR4-style dynamic " - "objects. -mabicalls is the default for SVR4-based systems.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-abicalls"), maplecl::kHide); - -maplecl::Option oMabm({"-mabm"}, - " -mabm \tThese switches enable the use of instructions in the mabm.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMabortOnNoreturn({"-mabort-on-noreturn"}, - " -mabort-on-noreturn \tGenerate a call to the function abort at the end of a noreturn function.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMabs2008({"-mabs=2008"}, - " -mabs=2008 \tThe option selects the IEEE 754-2008 treatment\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMabsLegacy({"-mabs=legacy"}, - " -mabs=legacy \tThe legacy treatment is selected\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMabsdata({"-mabsdata"}, - " -mabsdata \tAssume that all data in static storage can be accessed by LDS/STS instructions.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMabsdiff({"-mabsdiff"}, - " -mabsdiff \tEnables the abs instruction, which is the absolute difference between " - "two registers.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMabshi({"-mabshi"}, - " -mabshi \tUse abshi2 pattern. This is the default.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-abshi"), maplecl::kHide); - -maplecl::Option oMac0({"-mac0"}, - " -mac0 \tReturn floating-point results in ac0 (fr0 in Unix assembler syntax).\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-ac0"), maplecl::kHide); - -maplecl::Option oMacc4({"-macc-4"}, - " -macc-4 \tUse only the first four media accumulator registers.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMacc8({"-macc-8"}, - " -macc-8 \tUse all eight media accumulator registers.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMaccumulateArgs({"-maccumulate-args"}, - " -maccumulate-args \tAccumulate outgoing function arguments and acquire/release the needed stack " - "space for outgoing function arguments once in function prologue/epilogue.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMaccumulateOutgoingArgs({"-maccumulate-outgoing-args"}, - " -maccumulate-outgoing-args \tReserve space once for outgoing arguments in the function prologue rather " - "than around each call. Generally beneficial for performance and size\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMaddressModeLong({"-maddress-mode=long"}, - " -maddress-mode=long \tGenerate code for long address mode.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMaddressModeShort({"-maddress-mode=short"}, - " -maddress-mode=short \tGenerate code for short address mode.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMaddressSpaceConversion({"-maddress-space-conversion"}, - " -maddress-space-conversion \tAllow/disallow treating the __ea address space as superset of the generic " - "address space. \n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-address-space-conversion"), maplecl::kHide); - -maplecl::Option oMads({"-mads"}, - " -mads \tOn embedded PowerPC systems, assume that the startup module is called " - "crt0.o and the standard C libraries are libads.a and libc.a.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMaes({"-maes"}, - " -maes \tThese switches enable the use of instructions in the maes.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMaixStructReturn({"-maix-struct-return"}, - " -maix-struct-return \tReturn all structures in memory (as specified by the AIX ABI).\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMaix32({"-maix32"}, - " -maix32 \tEnable 64-bit AIX ABI and calling convention: 32-bit pointers, 32-bit long " - "type, and the infrastructure needed to support them.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMaix64({"-maix64"}, - " -maix64 \tEnable 64-bit AIX ABI and calling convention: 64-bit pointers, 64-bit " - "long type, and the infrastructure needed to support them.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMalign300({"-malign-300"}, - " -malign-300 \tOn the H8/300H and H8S, use the same alignment rules as for the H8/300\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMalignCall({"-malign-call"}, - " -malign-call \tDo alignment optimizations for call instructions.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMalignData({"-malign-data"}, - " -malign-data \tControl how GCC aligns variables. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMalignDouble({"-malign-double"}, - " -malign-double \tControl whether GCC aligns double, long double, and long long variables " - "on a two-word boundary or a one-word boundary.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-align-double"), maplecl::kHide); - -maplecl::Option oMalignInt({"-malign-int"}, - " -malign-int \tAligning variables on 32-bit boundaries produces code that runs somewhat " - "faster on processors with 32-bit busses at the expense of more memory.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-align-int"), maplecl::kHide); - -maplecl::Option oMalignLabels({"-malign-labels"}, - " -malign-labels \tTry to align labels to an 8-byte boundary by inserting NOPs into the " - "previous packet.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMalignLoops({"-malign-loops"}, - " -malign-loops \tAlign all loops to a 32-byte boundary.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-align-loops"), maplecl::kHide); - -maplecl::Option oMalignNatural({"-malign-natural"}, - " -malign-natural \tThe option -malign-natural overrides the ABI-defined alignment of larger types\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMalignPower({"-malign-power"}, - " -malign-power \tThe option -malign-power instructs Maple to follow the ABI-specified alignment " - "rules.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMallOpts({"-mall-opts"}, - " -mall-opts \tEnables all the optional instructions—average, multiply, divide, bit " - "operations, leading zero, absolute difference, min/max, clip, and saturation.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-opts"), maplecl::kHide); - -maplecl::Option oMallocCc({"-malloc-cc"}, - " -malloc-cc \tDynamically allocate condition code registers.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMallowStringInsns({"-mallow-string-insns"}, - " -mallow-string-insns \tEnables or disables the use of the string manipulation instructions SMOVF, " - "SCMPU, SMOVB, SMOVU, SUNTIL SWHILE and also the RMPA instruction.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-allow-string-insns"), maplecl::kHide); - -maplecl::Option oMallregs({"-mallregs"}, - " -mallregs \tAllow the compiler to use all of the available registers.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMaltivec({"-maltivec"}, - " -maltivec \tGenerate code that uses (does not use) AltiVec instructions, and also " - "enable the use of built-in functions that allow more direct access to the AltiVec instruction set. \n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-altivec"), maplecl::kHide); - -maplecl::Option oMaltivecBe({"-maltivec=be"}, - " -maltivec=be \tGenerate AltiVec instructions using big-endian element order, regardless " - "of whether the target is big- or little-endian. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMaltivecLe({"-maltivec=le"}, - " -maltivec=le \tGenerate AltiVec instructions using little-endian element order," - " regardless of whether the target is big- or little-endian.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMam33({"-mam33"}, - " -mam33 \tGenerate code using features specific to the AM33 processor.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-am33"), maplecl::kHide); - -maplecl::Option oMam332({"-mam33-2"}, - " -mam33-2 \tGenerate code using features specific to the AM33/2.0 processor.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMam34({"-mam34"}, - " -mam34 \tGenerate code using features specific to the AM34 processor.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMandroid({"-mandroid"}, - " -mandroid \tCompile code compatible with Android platform.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMannotateAlign({"-mannotate-align"}, - " -mannotate-align \tExplain what alignment considerations lead to the decision to make an " - "instruction short or long.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMapcs({"-mapcs"}, - " -mapcs \tThis is a synonym for -mapcs-frame and is deprecated.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMapcsFrame({"-mapcs-frame"}, - " -mapcs-frame \tGenerate a stack frame that is compliant with the ARM Procedure Call Standard " - "for all functions, even if this is not strictly necessary for correct execution of the code. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMappRegs({"-mapp-regs"}, - " -mapp-regs \tSpecify -mapp-regs to generate output using the global registers 2 through 4, " - "which the SPARC SVR4 ABI reserves for applications. \n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-app-regs"), maplecl::kHide); - -maplecl::Option oMARC600({"-mARC600"}, - " -mARC600 \tCompile for ARC600.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMARC601({"-mARC601"}, - " -mARC601 \tCompile for ARC601.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMARC700({"-mARC700"}, - " -mARC700 \tCompile for ARC700.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMarclinux({"-marclinux"}, - " -marclinux \tPassed through to the linker, to specify use of the arclinux emulation.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMarclinux_prof({"-marclinux_prof"}, - " -marclinux_prof \tPassed through to the linker, to specify use of the arclinux_prof emulation. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMargonaut({"-margonaut"}, - " -margonaut \tObsolete FPX.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMarm({"-marm"}, - " -marm \tSelect between generating code that executes in ARM and Thumb states. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMas100Syntax({"-mas100-syntax"}, - " -mas100-syntax \tWhen generating assembler output use a syntax that is compatible with " - "Renesas's AS100 assembler. \n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-as100-syntax"), maplecl::kHide); - -maplecl::Option oMasmHex({"-masm-hex"}, - " -masm-hex \tForce assembly output to always use hex constants.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMasmSyntaxUnified({"-masm-syntax-unified"}, - " -masm-syntax-unified \tAssume inline assembler is using unified asm syntax. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMasmDialect({"-masm=dialect"}, - " -masm=dialect \tOutput assembly instructions using selected dialect. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMatomic({"-matomic"}, - " -matomic \tThis enables use of the locked load/store conditional extension to implement " - "atomic memory built-in functions.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMatomicModel({"-matomic-model"}, - " -matomic-model \tSets the model of atomic operations and additional parameters as a comma " - "separated list. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMatomicUpdates({"-matomic-updates"}, - " -matomic-updates \tThis option controls the version of libgcc that the compiler links to " - "an executable and selects whether atomic updates to the software-managed cache of PPU-side variables are used.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-atomic-updates"), maplecl::kHide); - -maplecl::Option oMautoLitpools({"-mauto-litpools"}, - " -mauto-litpools \tControl the treatment of literal pools.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-auto-litpools"), maplecl::kHide); - -maplecl::Option oMautoModifyReg({"-mauto-modify-reg"}, - " -mauto-modify-reg \tEnable the use of pre/post modify with register displacement.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMautoPic({"-mauto-pic"}, - " -mauto-pic \tGenerate code that is self-relocatable. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMaverage({"-maverage"}, - " -maverage \tEnables the ave instruction, which computes the average of two registers.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMavoidIndexedAddresses({"-mavoid-indexed-addresses"}, - " -mavoid-indexed-addresses \tGenerate code that tries to avoid (not avoid) the use of indexed load or " - "store instructions.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-avoid-indexed-addresses"), maplecl::kHide); - -maplecl::Option oMavx({"-mavx"}, - " -mavx \tMaple depresses SSEx instructions when -mavx is used. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMavx2({"-mavx2"}, - " -mavx2 \tEnable the use of instructions in the mavx2.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMavx256SplitUnalignedLoad({"-mavx256-split-unaligned-load"}, - " -mavx256-split-unaligned-load \tSplit 32-byte AVX unaligned load .\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMavx256SplitUnalignedStore({"-mavx256-split-unaligned-store"}, - " -mavx256-split-unaligned-store \tSplit 32-byte AVX unaligned store.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMavx512bw({"-mavx512bw"}, - " -mavx512bw \tEnable the use of instructions in the mavx512bw.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMavx512cd({"-mavx512cd"}, - " -mavx512cd \tEnable the use of instructions in the mavx512cd.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMavx512dq({"-mavx512dq"}, - " -mavx512dq \tEnable the use of instructions in the mavx512dq.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMavx512er({"-mavx512er"}, - " -mavx512er \tEnable the use of instructions in the mavx512er.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMavx512f({"-mavx512f"}, - " -mavx512f \tEnable the use of instructions in the mavx512f.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMavx512ifma({"-mavx512ifma"}, - " -mavx512ifma \tEnable the use of instructions in the mavx512ifma.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMavx512pf({"-mavx512pf"}, - " -mavx512pf \tEnable the use of instructions in the mavx512pf.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMavx512vbmi({"-mavx512vbmi"}, - " -mavx512vbmi \tEnable the use of instructions in the mavx512vbmi.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMavx512vl({"-mavx512vl"}, - " -mavx512vl \tEnable the use of instructions in the mavx512vl.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMaxVectAlign({"-max-vect-align"}, - " -max-vect-align \tThe maximum alignment for SIMD vector mode types.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMb({"-mb"}, - " -mb \tCompile code for the processor in big-endian mode.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMbackchain({"-mbackchain"}, - " -mbackchain \tStore (do not store) the address of the caller's frame as backchain " - "pointer into the callee's stack frame.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-backchain"), maplecl::kHide); - -maplecl::Option oMbarrelShiftEnabled({"-mbarrel-shift-enabled"}, - " -mbarrel-shift-enabled \tEnable barrel-shift instructions.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMbarrelShifter({"-mbarrel-shifter"}, - " -mbarrel-shifter \tGenerate instructions supported by barrel shifter.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMbarrel_shifter({"-mbarrel_shifter"}, - " -mbarrel_shifter \tReplaced by -mbarrel-shifter.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMbaseAddresses({"-mbase-addresses"}, - " -mbase-addresses \tGenerate code that uses base addresses.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-base-addresses"), maplecl::kHide); - -maplecl::Option oMbased({"-mbased"}, - " -mbased \tVariables of size n bytes or smaller are placed in the .based " - "section by default\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMbbitPeephole({"-mbbit-peephole"}, - " -mbbit-peephole \tEnable bbit peephole2.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMbcopy({"-mbcopy"}, - " -mbcopy \tDo not use inline movmemhi patterns for copying memory.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMbcopyBuiltin({"-mbcopy-builtin"}, - " -mbcopy-builtin \tUse inline movmemhi patterns for copying memory.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMbig({"-mbig"}, - " -mbig \tCompile code for big-endian targets.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMbigEndianData({"-mbig-endian-data"}, - " -mbig-endian-data \tStore data (but not code) in the big-endian format.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMbigSwitch({"-mbig-switch"}, - " -mbig-switch \tGenerate code suitable for big switch tables.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMbigtable({"-mbigtable"}, - " -mbigtable \tUse 32-bit offsets in switch tables.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMbionic({"-mbionic"}, - " -mbionic \tUse Bionic C library.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMbitAlign({"-mbit-align"}, - " -mbit-align \tOn System V.4 and embedded PowerPC systems do not force structures and " - "unions that contain bit-fields to be aligned to the base type of the bit-field.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-bit-align"), maplecl::kHide); - -maplecl::Option oMbitOps({"-mbit-ops"}, - " -mbit-ops \tGenerates sbit/cbit instructions for bit manipulations.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMbitfield({"-mbitfield"}, - " -mbitfield \tDo use the bit-field instructions.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-bitfield"), maplecl::kHide); - -maplecl::Option oMbitops({"-mbitops"}, - " -mbitops \tEnables the bit operation instructions—bit test (btstm), set (bsetm), " - "clear (bclrm), invert (bnotm), and test-and-set (tas).\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMblockMoveInlineLimit({"-mblock-move-inline-limit"}, - " -mblock-move-inline-limit \tInline all block moves (such as calls to memcpy or structure copies) " - "less than or equal to num bytes. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMbmi({"-mbmi"}, - " -mbmi \tThese switches enable the use of instructions in the mbmi.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMbranchCheap({"-mbranch-cheap"}, - " -mbranch-cheap \tDo not pretend that branches are expensive.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMbranchCost({"-mbranch-cost"}, - " -mbranch-cost \tSet the cost of branches to roughly num 'simple' instructions.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMbranchExpensive({"-mbranch-expensive"}, - " -mbranch-expensive \tPretend that branches are expensive.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMbranchHints({"-mbranch-hints"}, - " -mbranch-hints \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMbranchLikely({"-mbranch-likely"}, - " -mbranch-likely \tEnable or disable use of Branch Likely instructions, regardless of " - "the default for the selected architecture.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-branch-likely"), maplecl::kHide); - -maplecl::Option oMbranchPredict({"-mbranch-predict"}, - " -mbranch-predict \tUse the probable-branch instructions, when static branch prediction indicates " - "a probable branch.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-branch-predict"), maplecl::kHide); - -maplecl::Option oMbssPlt({"-mbss-plt"}, - " -mbss-plt \tGenerate code that uses a BSS .plt section that ld.so fills in, and requires " - ".plt and .got sections that are both writable and executable.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMbuildConstants({"-mbuild-constants"}, - " -mbuild-constants \tConstruct all integer constants using code, even if it takes more " - "instructions (the maximum is six).\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMbwx({"-mbwx"}, - " -mbwx \tGenerate code to use the optional BWX instruction sets.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-bwx"), maplecl::kHide); - -maplecl::Option oMbypassCache({"-mbypass-cache"}, - " -mbypass-cache \t\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-bypass-cache"), maplecl::kHide); - -maplecl::Option oMc68000({"-mc68000"}, - " -mc68000 \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMc68020({"-mc68020"}, - " -mc68020 \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMc({"-mc"}, - " -mc \tSelects which section constant data is placed in. name may be 'tiny', " - "'near', or 'far'.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMcacheBlockSize({"-mcache-block-size"}, - " -mcache-block-size \tSpecify the size of each cache block, which must be a power of 2 " - "between 4 and 512.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMcacheSize({"-mcache-size"}, - " -mcache-size \tThis option controls the version of libgcc that the compiler links to an " - "executable and selects a software-managed cache for accessing variables in the __ea address space with a " - "particular cache size.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMcacheVolatile({"-mcache-volatile"}, - " -mcache-volatile \t\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-cache-volatile"), maplecl::kHide); - -maplecl::Option oMcallEabi({"-mcall-eabi"}, - " -mcall-eabi \tSpecify both -mcall-sysv and -meabi options.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMcallAixdesc({"-mcall-aixdesc"}, - " -mcall-aixdesc \tOn System V.4 and embedded PowerPC systems compile code for the AIX " - "operating system.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMcallFreebsd({"-mcall-freebsd"}, - " -mcall-freebsd \tOn System V.4 and embedded PowerPC systems compile code for the FreeBSD " - "operating system.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMcallLinux({"-mcall-linux"}, - " -mcall-linux \tOn System V.4 and embedded PowerPC systems compile code for the " - "Linux-based GNU system.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMcallOpenbsd({"-mcall-openbsd"}, - " -mcall-openbsd \tOn System V.4 and embedded PowerPC systems compile code for the " - "OpenBSD operating system.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMcallNetbsd({"-mcall-netbsd"}, - " -mcall-netbsd \tOn System V.4 and embedded PowerPC systems compile code for the " - "NetBSD operating system.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMcallPrologues({"-mcall-prologues"}, - " -mcall-prologues \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMcallSysv({"-mcall-sysv"}, - " -mcall-sysv \tOn System V.4 and embedded PowerPC systems compile code using calling conventions" - " that adhere to the March 1995 draft of the System V Application Binary Interface, PowerPC processor " - "supplement.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMcallSysvEabi({"-mcall-sysv-eabi"}, - " -mcall-sysv-eabi \tSpecify both -mcall-sysv and -meabi options.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMcallSysvNoeabi({"-mcall-sysv-noeabi"}, - " -mcall-sysv-noeabi \tSpecify both -mcall-sysv and -mno-eabi options.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMcalleeSuperInterworking({"-mcallee-super-interworking"}, - " -mcallee-super-interworking \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMcallerCopies({"-mcaller-copies"}, - " -mcaller-copies \tThe caller copies function arguments passed by hidden reference.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMcallerSuperInterworking({"-mcaller-super-interworking"}, - " -mcaller-super-interworking \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMcallgraphData({"-mcallgraph-data"}, - " -mcallgraph-data \t\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-callgraph-data"), maplecl::kHide); - -maplecl::Option oMcaseVectorPcrel({"-mcase-vector-pcrel"}, - " -mcase-vector-pcrel \tUse PC-relative switch case tables to enable case table shortening. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMcbcond({"-mcbcond"}, - " -mcbcond \tWith -mcbcond, Maple generates code that takes advantage of the UltraSPARC " - "Compare-and-Branch-on-Condition instructions. \n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-cbcond"), maplecl::kHide); - -maplecl::Option oMcbranchForceDelaySlot({"-mcbranch-force-delay-slot"}, - " -mcbranch-force-delay-slot \tForce the usage of delay slots for conditional branches, which stuffs the " - "delay slot with a nop if a suitable instruction cannot be found. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMccInit({"-mcc-init"}, - " -mcc-init \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMcfv4e({"-mcfv4e"}, - " -mcfv4e \tGenerate output for a ColdFire V4e family CPU (e.g. 547x/548x).\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMcheckZeroDivision({"-mcheck-zero-division"}, - " -mcheck-zero-division \tTrap (do not trap) on integer division by zero.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-check-zero-division"), maplecl::kHide); - -maplecl::Option oMcix({"-mcix"}, - " -mcix \tGenerate code to use the optional CIX instruction sets.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-cix"), maplecl::kHide); - -maplecl::Option oMcld({"-mcld"}, - " -mcld \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMclearHwcap({"-mclear-hwcap"}, - " -mclear-hwcap \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMclflushopt({"-mclflushopt"}, - " -mclflushopt \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMclip({"-mclip"}, - " -mclip \tEnables the clip instruction.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMclzero({"-mclzero"}, - " -mclzero \tThese switches enable the use of instructions in the mclzero.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMcmodel({"-mcmodel"}, - " -mcmodel \tSpecify the code model.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMcmov({"-mcmov"}, - " -mcmov \tGenerate conditional move instructions.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-cmov"), maplecl::kHide); - -maplecl::Option oMcmove({"-mcmove"}, - " -mcmove \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMcmpb({"-mcmpb"}, - " -mcmpb \tSpecify which instructions are available on the processor you are using. \n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-cmpb"), maplecl::kHide); - -maplecl::Option oMcmse({"-mcmse"}, - " -mcmse \tGenerate secure code as per the ARMv8-M Security Extensions.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMcodeDensity({"-mcode-density"}, - " -mcode-density \tEnable code density instructions for ARC EM. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMcodeReadable({"-mcode-readable"}, - " -mcode-readable \tSpecify whether Maple may generate code that reads from executable sections.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMcodeRegion({"-mcode-region"}, - " -mcode-region \tThe compiler where to place functions and data that do not have one of the " - "lower, upper, either or section attributes.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMcompactBranchesAlways({"-mcompact-branches=always"}, - " -mcompact-branches=always \tThe -mcompact-branches=always option ensures that a compact branch instruction " - "will be generated if available. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMcompactBranchesNever({"-mcompact-branches=never"}, - " -mcompact-branches=never \tThe -mcompact-branches=never option ensures that compact branch instructions " - "will never be generated.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMcompactBranchesOptimal({"-mcompact-branches=optimal"}, - " -mcompact-branches=optimal \tThe -mcompact-branches=optimal option will cause a delay slot branch to be " - "used if one is available in the current ISA and the delay slot is successfully filled.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMcompactCasesi({"-mcompact-casesi"}, - " -mcompact-casesi \tEnable compact casesi pattern.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMcompatAlignParm({"-mcompat-align-parm"}, - " -mcompat-align-parm \tGenerate code to pass structure parameters with a maximum alignment of 64 bits, " - "for compatibility with older versions of maple.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMcondExec({"-mcond-exec"}, - " -mcond-exec \tEnable the use of conditional execution (default).\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-cond-exec"), maplecl::kHide); - -maplecl::Option oMcondMove({"-mcond-move"}, - " -mcond-move \tEnable the use of conditional-move instructions (default).\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-cond-move"), maplecl::kHide); - -maplecl::Option oMconfig({"-mconfig"}, - " -mconfig \tSelects one of the built-in core configurations. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMconsole({"-mconsole"}, - " -mconsole \tThis option specifies that a console application is to be generated, by " - "instructing the linker to set the PE header subsystem type required for console applications.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMconstAlign({"-mconst-align"}, - " -mconst-align \t\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-const-align"), maplecl::kHide); - -maplecl::Option oMconst16({"-mconst16"}, - " -mconst16 \t\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-const16"), maplecl::kHide); - -maplecl::Option oMconstantGp({"-mconstant-gp"}, - " -mconstant-gp \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMcop({"-mcop"}, - " -mcop \tEnables the coprocessor instructions. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMcop32({"-mcop32"}, - " -mcop32 \tEnables the 32-bit coprocessor's instructions.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMcop64({"-mcop64"}, - " -mcop64 \tEnables the 64-bit coprocessor's instructions.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMcorea({"-mcorea"}, - " -mcorea \tBuild a standalone application for Core A of BF561 when using the " - "one-application-per-core programming model.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMcoreb({"-mcoreb"}, - " -mcoreb \tBuild a standalone application for Core B of BF561 when using the " - "one-application-per-core programming model.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMcpu({"-mcpu"}, - " -mcpu \tSpecify the name of the target processor, optionally suffixed by " - "one or more feature modifiers.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMcpu32({"-mcpu32"}, - " -mcpu32 \tGenerate output for a CPU32.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMcr16c({"-mcr16c"}, - " -mcr16c \tGenerate code for CR16C architecture.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMcr16cplus({"-mcr16cplus"}, - " -mcr16cplus \tGenerate code for CR16C+ architecture.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMcrc32({"-mcrc32"}, - " -mcrc32 \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMcrypto({"-mcrypto"}, - " -mcrypto \tEnable the use of the built-in functions that allow direct access to the " - "cryptographic instructions that were added in version 2.07 of the PowerPC ISA.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-crypto"), maplecl::kHide); - -maplecl::Option oMcsyncAnomaly({"-mcsync-anomaly"}, - " -mcsync-anomaly \tWhen enabled, the compiler ensures that the generated code does not contain " - "CSYNC or SSYNC instructions too soon after conditional branches.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-csync-anomaly"), maplecl::kHide); - -maplecl::Option oMctorDtor({"-mctor-dtor"}, - " -mctor-dtor \tEnable constructor/destructor feature.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMcustomFpuCfg({"-mcustom-fpu-cfg"}, - " -mcustom-fpu-cfg \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMcustomInsn({"-mcustom-insn"}, - " -mcustom-insn \t\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-custom-insn"), maplecl::kHide); - -maplecl::Option oMcx16({"-mcx16"}, - " -mcx16 \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMdalign({"-mdalign"}, - " -mdalign \tAlign doubles at 64-bit boundaries.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMdataAlign({"-mdata-align"}, - " -mdata-align \t\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-data-align"), maplecl::kHide); - -maplecl::Option oMdataModel({"-mdata-model"}, - " -mdata-model \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMdataRegion({"-mdata-region"}, - " -mdata-region \ttell the compiler where to place functions and data that do not have one " - "of the lower, upper, either or section attributes.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMdc({"-mdc"}, - " -mdc \tCauses constant variables to be placed in the .near section.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMdebug({"-mdebug"}, - " -mdebug \tPrint additional debug information when compiling. \n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-debug"), maplecl::kHide); - -maplecl::Option oMdebugMainPrefix({"-mdebug-main=prefix"}, - " -mdebug-main=prefix \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMdecAsm({"-mdec-asm"}, - " -mdec-asm \tUse DEC assembler syntax. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMdirectMove({"-mdirect-move"}, - " -mdirect-move \tGenerate code that uses the instructions to move data between the general " - "purpose registers and the vector/scalar (VSX) registers that were added in version 2.07 of the PowerPC ISA.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-direct-move"), maplecl::kHide); - -maplecl::Option oMdisableCallt({"-mdisable-callt"}, - " -mdisable-callt \tThis option suppresses generation of the CALLT instruction for the v850e, " - "v850e1, v850e2, v850e2v3 and v850e3v5 flavors of the v850 architecture.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-disable-callt"), maplecl::kHide); - -maplecl::Option oMdisableFpregs({"-mdisable-fpregs"}, - " -mdisable-fpregs \tPrevent floating-point registers from being used in any manner.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMdisableIndexing({"-mdisable-indexing"}, - " -mdisable-indexing \tPrevent the compiler from using indexing address modes.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMdiv({"-mdiv"}, - " -mdiv \tEnables the div and divu instructions.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-div"), maplecl::kHide); - -maplecl::Option oMdivRem({"-mdiv-rem"}, - " -mdiv-rem \tEnable div and rem instructions for ARCv2 cores.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMdivStrategy({"-mdiv=strategy"}, - " -mdiv=strategy \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMdivideBreaks({"-mdivide-breaks"}, - " -mdivide-breaks \tMIPS systems check for division by zero by generating either a conditional " - "trap or a break instruction.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMdivideEnabled({"-mdivide-enabled"}, - " -mdivide-enabled \tEnable divide and modulus instructions.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMdivideTraps({"-mdivide-traps"}, - " -mdivide-traps \tMIPS systems check for division by zero by generating either a conditional " - "trap or a break instruction.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMdivsi3_libfuncName({"-mdivsi3_libfunc"}, - " -mdivsi3_libfunc \tSet the name of the library function used for 32-bit signed division to name.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMdll({"-mdll"}, - " -mdll \tThis option is available for Cygwin and MinGW targets.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMdlmzb({"-mdlmzb"}, - " -mdlmzb \tGenerate code that uses the string-search 'dlmzb' instruction on the IBM " - "405, 440, 464 and 476 processors. \n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-dlmzb"), maplecl::kHide); - -maplecl::Option oMdmx({"-mdmx"}, - " -mdmx \tUse MIPS Digital Media Extension instructions.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-mdmx"), maplecl::kHide); - -maplecl::Option oMdouble({"-mdouble"}, - " -mdouble \tUse floating-point double instructions.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-double"), maplecl::kHide); - -maplecl::Option oMdoubleFloat({"-mdouble-float"}, - " -mdouble-float \tGenerate code for double-precision floating-point operations.", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMdpfp({"-mdpfp"}, - " -mdpfp \tGenerate double-precision FPX instructions, tuned for the compact " - "implementation.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMdpfpCompact({"-mdpfp-compact"}, - " -mdpfp-compact \tGenerate double-precision FPX instructions, tuned for the compact " - "implementation.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMdpfpFast({"-mdpfp-fast"}, - " -mdpfp-fast \tGenerate double-precision FPX instructions, tuned for the fast implementation.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMdpfp_compact({"-mdpfp_compact"}, - " -mdpfp_compact \tReplaced by -mdpfp-compact.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMdpfp_fast({"-mdpfp_fast"}, - " -mdpfp_fast \tReplaced by -mdpfp-fast.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMdsp({"-mdsp"}, - " -mdsp \t\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-dsp"), maplecl::kHide); - -maplecl::Option oMdspPacka({"-mdsp-packa"}, - " -mdsp-packa \tPassed down to the assembler to enable the DSP Pack A extensions. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMdspr2({"-mdspr2"}, - " -mdspr2 \tUse revision 2 of the MIPS DSP ASE.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-dspr2"), maplecl::kHide); - -maplecl::Option oMdsp_packa({"-mdsp_packa"}, - " -mdsp_packa \tReplaced by -mdsp-packa.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMdualNops({"-mdual-nops"}, - " -mdual-nops \tBy default, GCC inserts NOPs to increase dual issue when it expects it " - "to increase performance.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMdualNopsE({"-mdual-nops="}, - " -mdual-nops= \tBy default, GCC inserts NOPs to increase dual issue when it expects it " - "to increase performance.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMdumpTuneFeatures({"-mdump-tune-features"}, - " -mdump-tune-features \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMdvbf({"-mdvbf"}, - " -mdvbf \tPassed down to the assembler to enable the dual Viterbi butterfly extension.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMdwarf2Asm({"-mdwarf2-asm"}, - " -mdwarf2-asm \t\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-dwarf2-asm"), maplecl::kHide); - -maplecl::Option oMdword({"-mdword"}, - " -mdword \tChange ABI to use double word insns.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-dword"), maplecl::kHide); - -maplecl::Option oMdynamicNoPic({"-mdynamic-no-pic"}, - " -mdynamic-no-pic \tOn Darwin and Mac OS X systems, compile code so that it is not relocatable, " - "but that its external references are relocatable. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMea({"-mea"}, - " -mea \tGenerate extended arithmetic instructions.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMEa({"-mEa"}, - " -mEa \tReplaced by -mea.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMea32({"-mea32"}, - " -mea32 \tCompile code assuming that pointers to the PPU address space accessed via " - "the __ea named address space qualifier are either 32 bits wide. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMea64({"-mea64"}, - " -mea64 \tCompile code assuming that pointers to the PPU address space accessed " - "via the __ea named address space qualifier are either 64 bits wide. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMeabi({"-meabi"}, - " -meabi \tOn System V.4 and embedded PowerPC systems adhere to the Embedded " - "Applications Binary Interface (EABI), which is a set of modifications to the System V.4 specifications. \n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-eabi"), maplecl::kHide); - -maplecl::Option oMearlyCbranchsi({"-mearly-cbranchsi"}, - " -mearly-cbranchsi \tEnable pre-reload use of the cbranchsi pattern.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMearlyStopBits({"-mearly-stop-bits"}, - " -mearly-stop-bits \t\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-early-stop-bits"), maplecl::kHide); - -maplecl::Option oMeb({"-meb"}, - " -meb \tGenerate big-endian code.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMel({"-mel"}, - " -mel \tGenerate little-endian code.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMelf({"-melf"}, - " -melf \tGenerate an executable in the ELF format, rather than the default 'mmo' " - "format used by the mmix simulator.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMemb({"-memb"}, - " -memb \tOn embedded PowerPC systems, set the PPC_EMB bit in the ELF flags header to " - "indicate that 'eabi' extended relocations are used.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMembeddedData({"-membedded-data"}, - " -membedded-data \tAllocate variables to the read-only data section first if possible, then " - "next in the small data section if possible, otherwise in data.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-embedded-data"), maplecl::kHide); - -maplecl::Option oMemregsE({"-memregs="}, - " -memregs= \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMep({"-mep"}, - " -mep \tDo not optimize basic blocks that use the same index pointer 4 or more times " - "to copy pointer into the ep register, and use the shorter sld and sst instructions. \n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-ep"), maplecl::kHide); - -maplecl::Option oMepsilon({"-mepsilon"}, - " -mepsilon \tGenerate floating-point comparison instructions that compare with respect " - "to the rE epsilon register.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-epsilon"), maplecl::kHide); - -maplecl::Option oMesa({"-mesa"}, - " -mesa \tWhen -mesa is specified, generate code using the instructions available on " - "ESA/390.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMetrax100({"-metrax100"}, - " -metrax100 \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMetrax4({"-metrax4"}, - " -metrax4 \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMeva({"-meva"}, - " -meva \tUse the MIPS Enhanced Virtual Addressing instructions.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-eva"), maplecl::kHide); - -maplecl::Option oMexpandAdddi({"-mexpand-adddi"}, - " -mexpand-adddi \tExpand adddi3 and subdi3 at RTL generation time into add.f, adc etc.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMexplicitRelocs({"-mexplicit-relocs"}, - " -mexplicit-relocs \tUse assembler relocation operators when dealing with symbolic addresses.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-explicit-relocs"), maplecl::kHide); - -maplecl::Option oMexr({"-mexr"}, - " -mexr \t\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-exr"), maplecl::kHide); - -maplecl::Option oMexternSdata({"-mextern-sdata"}, - " -mextern-sdata \tAssume (do not assume) that externally-defined data is in a small data section " - "if the size of that data is within the -G limit. -mextern-sdata is the default for all configurations.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-extern-sdata"), maplecl::kHide); - -maplecl::Option oMf16c({"-mf16c"}, - " -mf16c \tThese switches enable the use of instructions in the mf16c.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMfastFp({"-mfast-fp"}, - " -mfast-fp \tLink with the fast floating-point library. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMfastIndirectCalls({"-mfast-indirect-calls"}, - " -mfast-indirect-calls \tGenerate code that assumes calls never cross space boundaries.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMfastSwDiv({"-mfast-sw-div"}, - " -mfast-sw-div \t\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-fast-sw-div"), maplecl::kHide); - -maplecl::Option oMfasterStructs({"-mfaster-structs"}, - " -mfaster-structs \tWith -mfaster-structs, the compiler assumes that structures should have " - "8-byte alignment.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-faster-structs"), maplecl::kHide); - -maplecl::Option oMfdiv({"-mfdiv"}, - " -mfdiv \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMfdpic({"-mfdpic"}, - " -mfdpic \tSelect the FDPIC ABI, which uses function descriptors to represent pointers " - "to functions.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMfentry({"-mfentry"}, - " -mfentry \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMfix({"-mfix"}, - " -mfix \tGenerate code to use the optional FIX instruction sets.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-fix"), maplecl::kHide); - -maplecl::Option oMfix24k({"-mfix-24k"}, - " -mfix-24k \tWork around the 24K E48 (lost data on stores during refill) errata. \n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-fix-24k"), maplecl::kHide); - -maplecl::Option oMfixAndContinue({"-mfix-and-continue"}, - " -mfix-and-continue \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMfixAt697f({"-mfix-at697f"}, - " -mfix-at697f \tEnable the documented workaround for the single erratum of the Atmel AT697F " - "processor (which corresponds to erratum #13 of the AT697E processor).\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMfixCortexA53835769({"-mfix-cortex-a53-835769"}, - " -mfix-cortex-a53-835769 \tWorkaround for ARM Cortex-A53 Erratum number 835769.\n", - {driverCategory, ldCategory}, maplecl::DisableWith("-mno-fix-cortex-a53-835769")); - -maplecl::Option oMfixCortexA53843419({"-mfix-cortex-a53-843419"}, - " -mfix-cortex-a53-843419 \tWorkaround for ARM Cortex-A53 Erratum number 843419.\n", - {driverCategory, ldCategory}, maplecl::DisableWith("-mno-fix-cortex-a53-843419")); - -maplecl::Option oMfixCortexM3Ldrd({"-mfix-cortex-m3-ldrd"}, - " -mfix-cortex-m3-ldrd \tSome Cortex-M3 cores can cause data corruption when ldrd instructions with " - "overlapping destination and base registers are used. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMfixGr712rc({"-mfix-gr712rc"}, - " -mfix-gr712rc \tEnable the documented workaround for the back-to-back store errata of " - "the GR712RC processor.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMfixR10000({"-mfix-r10000"}, - " -mfix-r10000 \tWork around certain R10000 errata\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-fix-r10000"), maplecl::kHide); - -maplecl::Option oMfixR4000({"-mfix-r4000"}, - " -mfix-r4000 \tWork around certain R4000 CPU errata\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-fix-r4000"), maplecl::kHide); - -maplecl::Option oMfixR4400({"-mfix-r4400"}, - " -mfix-r4400 \tWork around certain R4400 CPU errata\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-fix-r4400"), maplecl::kHide); - -maplecl::Option oMfixRm7000({"-mfix-rm7000"}, - " -mfix-rm7000 \tWork around the RM7000 dmult/dmultu errata.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-fix-rm7000"), maplecl::kHide); - -maplecl::Option oMfixSb1({"-mfix-sb1"}, - " -mfix-sb1 \tWork around certain SB-1 CPU core errata.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-fix-sb1"), maplecl::kHide); - -maplecl::Option oMfixUt699({"-mfix-ut699"}, - " -mfix-ut699 \tEnable the documented workarounds for the floating-point errata and the data " - "cache nullify errata of the UT699 processor.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMfixUt700({"-mfix-ut700"}, - " -mfix-ut700 \tEnable the documented workaround for the back-to-back store errata of the " - "UT699E/UT700 processor.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMfixVr4120({"-mfix-vr4120"}, - " -mfix-vr4120 \tWork around certain VR4120 errata\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-fix-vr4120"), maplecl::kHide); - -maplecl::Option oMfixVr4130({"-mfix-vr4130"}, - " -mfix-vr4130 \tWork around the VR4130 mflo/mfhi errata.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMfixedCc({"-mfixed-cc"}, - " -mfixed-cc \tDo not try to dynamically allocate condition code registers, only use " - "icc0 and fcc0.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMfixedRange({"-mfixed-range"}, - " -mfixed-range \tGenerate code treating the given register range as fixed registers.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMflat({"-mflat"}, - " -mflat \tWith -mflat, the compiler does not generate save/restore instructions and " - "uses a 'flat' or single register window model.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-flat"), maplecl::kHide); - -maplecl::Option oMflipMips16({"-mflip-mips16"}, - " -mflip-mips16 \tGenerate MIPS16 code on alternating functions.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMfloatAbi({"-mfloat-abi"}, - " -mfloat-abi \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMfloatGprs({"-mfloat-gprs"}, - " -mfloat-gprs \tThis switch enables the generation of floating-point operations on the " - "general-purpose registers for architectures that support it.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMfloatIeee({"-mfloat-ieee"}, - " -mfloat-ieee \tGenerate code that does not use VAX F and G floating-point arithmetic " - "instead of IEEE single and double precision.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMfloatVax({"-mfloat-vax"}, - " -mfloat-vax \tGenerate code that uses VAX F and G floating-point arithmetic instead " - "of IEEE single and double precision.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMfloat128({"-mfloat128"}, - " -mfloat128 \tEisable the __float128 keyword for IEEE 128-bit floating point and use " - "either software emulation for IEEE 128-bit floating point or hardware instructions.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-float128"), maplecl::kHide); - -maplecl::Option oMfloat128Hardware({"-mfloat128-hardware"}, - " -mfloat128-hardware \tEisable using ISA 3.0 hardware instructions to support the __float128 " - "data type.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-float128-hardware"), maplecl::kHide); - -maplecl::Option oMfloat32({"-mfloat32"}, - " -mfloat32 \tUse 32-bit float.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-float32"), maplecl::kHide); - -maplecl::Option oMfloat64({"-mfloat64"}, - " -mfloat64 \tUse 64-bit float.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-float64"), maplecl::kHide); - -maplecl::Option oMflushFunc({"-mflush-func"}, - " -mflush-func \tSpecifies the function to call to flush the I and D caches, or to not " - "call any such function. \n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-flush-func"), maplecl::kHide); - -maplecl::Option oMflushTrap({"-mflush-trap"}, - " -mflush-trap \t\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-flush-trap"), maplecl::kHide); - -maplecl::Option oMfma({"-mfma"}, - " -mfma \tThese switches enable the use of instructions in the mfma.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-fmaf"), maplecl::kHide); - -maplecl::Option oMfma4({"-mfma4"}, - " -mfma4 \tThese switches enable the use of instructions in the mfma4.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMfmaf({"-mfmaf"}, - " -mfmaf \tWith -mfmaf, Maple generates code that takes advantage of the UltraSPARC " - "Fused Multiply-Add Floating-point instructions.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMfmovd({"-mfmovd"}, - " -mfmovd \tEnable the use of the instruction fmovd.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMforceNoPic({"-mforce-no-pic"}, - " -mforce-no-pic \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMfpExceptions({"-mfp-exceptions"}, - " -mfp-exceptions \tSpecifies whether FP exceptions are enabled. \n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-fp-exceptions"), maplecl::kHide); - -maplecl::Option oMfpMode({"-mfp-mode"}, - " -mfp-mode \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMfpRoundingMode({"-mfp-rounding-mode"}, - " -mfp-rounding-mode \tSelects the IEEE rounding mode.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMfpTrapMode({"-mfp-trap-mode"}, - " -mfp-trap-mode \tThis option controls what floating-point related traps are enabled.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMfp16Format({"-mfp16-format"}, - " -mfp16-format \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMfp32({"-mfp32"}, - " -mfp32 \tAssume that floating-point registers are 32 bits wide.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMfp64({"-mfp64"}, - " -mfp64 \tAssume that floating-point registers are 64 bits wide.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMfpmath({"-mfpmath"}, - " -mfpmath \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMfpr32({"-mfpr-32"}, - " -mfpr-32 \tUse only the first 32 floating-point registers.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMfpr64({"-mfpr-64"}, - " -mfpr-64 \tUse all 64 floating-point registers.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMfprnd({"-mfprnd"}, - " -mfprnd \tSpecify which instructions are available on the processor you are using. \n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-fprnd"), maplecl::kHide); - -maplecl::Option oMfpu({"-mfpu"}, - " -mfpu \tEnables support for specific floating-point hardware extensions for " - "ARCv2 cores.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-fpu"), maplecl::kHide); - -maplecl::Option oMfpxx({"-mfpxx"}, - " -mfpxx \tDo not assume the width of floating-point registers.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMfractConvertTruncate({"-mfract-convert-truncate"}, - " -mfract-convert-truncate \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMframeHeaderOpt({"-mframe-header-opt"}, - " -mframe-header-opt \tEnable (disable) frame header optimization in the o32 ABI.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-frame-header-opt"), maplecl::kHide); - -maplecl::Option oMfriz({"-mfriz"}, - " -mfriz \tGenerate the friz instruction when the -funsafe-math-optimizations option " - "is used to optimize rounding of floating-point values to 64-bit integer and back to floating point. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMfsca({"-mfsca"}, - " -mfsca \tAllow or disallow the compiler to emit the fsca instruction for sine and " - "cosine approximations.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-fsca"), maplecl::kHide); - -maplecl::Option oMfsgsbase({"-mfsgsbase"}, - " -mfsgsbase \tThese switches enable the use of instructions in the mfsgsbase.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMfsmuld({"-mfsmuld"}, - " -mfsmuld \tWith -mfsmuld, Maple generates code that takes advantage of the Floating-point" - " Multiply Single to Double (FsMULd) instruction. \n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-fsmuld"), maplecl::kHide); - -maplecl::Option oMfsrra({"-mfsrra"}, - " -mfsrra \tAllow or disallow the compiler to emit the fsrra instruction for reciprocal " - "square root approximations.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-fsrra"), maplecl::kHide); - -maplecl::Option oMfullRegs({"-mfull-regs"}, - " -mfull-regs \tUse full-set registers for register allocation.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMfullToc({"-mfull-toc"}, - " -mfull-toc \tModify generation of the TOC (Table Of Contents), which is created for every " - "executable file. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMfusedMadd({"-mfused-madd"}, - " -mfused-madd \tGenerate code that uses the floating-point multiply and accumulate " - "instructions. \n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-fused-madd"), maplecl::kHide); - -maplecl::Option oMfxsr({"-mfxsr"}, - " -mfxsr \tThese switches enable the use of instructions in the mfxsr.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMG({"-MG"}, - " -MG \tTreat missing header files as generated files.\n", - {driverCategory, clangCategory}); - -maplecl::Option oMg10({"-mg10"}, - " -mg10 \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMg13({"-mg13"}, - " -mg13 \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMg14({"-mg14"}, - " -mg14 \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMgas({"-mgas"}, - " -mgas \tEnable the use of assembler directives only GAS understands.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMgccAbi({"-mgcc-abi"}, - " -mgcc-abi \tEnables support for the old GCC version of the V850 ABI.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMgenCellMicrocode({"-mgen-cell-microcode"}, - " -mgen-cell-microcode \tGenerate Cell microcode instructions.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMgeneralRegsOnly({"-mgeneral-regs-only"}, - " -mgeneral-regs-only \tGenerate code which uses only the general registers.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMghs({"-mghs"}, - " -mghs \tEnables support for the RH850 version of the V850 ABI.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMglibc({"-mglibc"}, - " -mglibc \tUse GNU C library.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMgnu({"-mgnu"}, - " -mgnu \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMgnuAs({"-mgnu-as"}, - " -mgnu-as \t\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-gnu-as"), maplecl::kHide); - -maplecl::Option oMgnuAttribute({"-mgnu-attribute"}, - " -mgnu-attribute \tEmit .gnu_attribute assembly directives to set tag/value pairs in a " - ".gnu.attributes section that specify ABI variations in function parameters or return values.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-gnu-attribute"), maplecl::kHide); - -maplecl::Option oMgnuLd({"-mgnu-ld"}, - " -mgnu-ld \tUse options specific to GNU ld.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-gnu-ld"), maplecl::kHide); - -maplecl::Option oMgomp({"-mgomp"}, - " -mgomp \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMgotplt({"-mgotplt"}, - " -mgotplt \t\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-gotplt"), maplecl::kHide); - -maplecl::Option oMgp32({"-mgp32"}, - " -mgp32 \tAssume that general-purpose registers are 32 bits wide.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMgp64({"-mgp64"}, - " -mgp64 \tAssume that general-purpose registers are 64 bits wide.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMgpopt({"-mgpopt"}, - " -mgpopt \tUse GP-relative accesses for symbols that are known to be in a small " - "data section.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-gpopt"), maplecl::kHide); - -maplecl::Option oMgpr32({"-mgpr-32"}, - " -mgpr-32 \tOnly use the first 32 general-purpose registers.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMgpr64({"-mgpr-64"}, - " -mgpr-64 \tUse all 64 general-purpose registers.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMgprelRo({"-mgprel-ro"}, - " -mgprel-ro \tEnable the use of GPREL relocations in the FDPIC ABI for data that is " - "known to be in read-only sections.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMh({"-mh"}, - " -mh \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMhal({"-mhal"}, - " -mhal \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMhalfRegFile({"-mhalf-reg-file"}, - " -mhalf-reg-file \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMhardDfp({"-mhard-dfp"}, - " -mhard-dfp \tUse the hardware decimal-floating-point instructions for decimal-floating-point " - "operations. \n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-hard-dfp"), maplecl::kHide); - -maplecl::Option oMhardFloat({"-mhard-float"}, - " -mhard-float \tUse the hardware floating-point instructions and registers for floating-point" - " operations.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMhardQuadFloat({"-mhard-quad-float"}, - " -mhard-quad-float \tGenerate output containing quad-word (long double) floating-point instructions.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMhardlit({"-mhardlit"}, - " -mhardlit \t\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-hardlit"), maplecl::kHide); - -maplecl::Option oMhintMaxDistance({"-mhint-max-distance"}, - " -mhint-max-distance \tThe encoding of the branch hint instruction limits the hint to be within 256 " - "instructions of the branch it is affecting.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMhintMaxNops({"-mhint-max-nops"}, - " -mhint-max-nops \tMaximum number of NOPs to insert for a branch hint.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMhotpatch({"-mhotpatch"}, - " -mhotpatch \tIf the hotpatch option is enabled, a “hot-patching” function prologue is " - "generated for all functions in the compilation unit. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMhpLd({"-mhp-ld"}, - " -mhp-ld \tUse options specific to HP ld.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMhtm({"-mhtm"}, - " -mhtm \tThe -mhtm option enables a set of builtins making use of instructions " - "available with the transactional execution facility introduced with the IBM zEnterprise EC12 machine generation " - "S/390 System z Built-in Functions.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-htm"), maplecl::kHide); - -maplecl::Option oMhwDiv({"-mhw-div"}, - " -mhw-div \t\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-hw-div"), maplecl::kHide); - -maplecl::Option oMhwMul({"-mhw-mul"}, - " -mhw-mul \t\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-hw-mul"), maplecl::kHide); - -maplecl::Option oMhwMulx({"-mhw-mulx"}, - " -mhw-mulx \t\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-hw-mulx"), maplecl::kHide); - -maplecl::Option oMhwmultE({"-mhwmult="}, - " -mhwmult= \tDescribes the type of hardware multiply supported by the target.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMiamcu({"-miamcu"}, - " -miamcu \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMicplb({"-micplb"}, - " -micplb \tAssume that ICPLBs are enabled at run time.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMidSharedLibrary({"-mid-shared-library"}, - " -mid-shared-library \tGenerate code that supports shared libraries via the library ID method.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-id-shared-library"), maplecl::kHide); - -maplecl::Option oMieee({"-mieee"}, - " -mieee \tThis option generates code fully IEEE-compliant code except that the " - "inexact-flag is not maintained (see below).\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-ieee"), maplecl::kHide); - -maplecl::Option oMieeeConformant({"-mieee-conformant"}, - " -mieee-conformant \tThis option marks the generated code as IEEE conformant.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMieeeFp({"-mieee-fp"}, - " -mieee-fp \t\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-ieee-fp"), maplecl::kHide); - -maplecl::Option oMieeeWithInexact({"-mieee-with-inexact"}, - " -mieee-with-inexact \tTurning on this option causes the generated code to implement fully-compliant " - "IEEE math. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMilp32({"-milp32"}, - " -milp32 \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMimadd({"-mimadd"}, - " -mimadd \tEnable (disable) use of the madd and msub integer instructions.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-imadd"), maplecl::kHide); - -maplecl::Option oMimpureText({"-mimpure-text"}, - " -mimpure-text \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMincomingStackBoundary({"-mincoming-stack-boundary"}, - " -mincoming-stack-boundary \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMindexedLoads({"-mindexed-loads"}, - " -mindexed-loads \tEnable the use of indexed loads. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMinlineAllStringops({"-minline-all-stringops"}, - " -minline-all-stringops \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMinlineFloatDivideMaxThroughput({"-minline-float-divide-max-throughput"}, - " -minline-float-divide-max-throughput \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMinlineFloatDivideMinLatency({"-minline-float-divide-min-latency"}, - " -minline-float-divide-min-latency \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMinlineIc_invalidate({"-minline-ic_invalidate"}, - " -minline-ic_invalidate \tInline code to invalidate instruction cache entries after setting up nested " - "function trampolines.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMinlineIntDivideMaxThroughput({"-minline-int-divide-max-throughput"}, - " -minline-int-divide-max-throughput \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMinlineIntDivideMinLatency({"-minline-int-divide-min-latency"}, - " -minline-int-divide-min-latency \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMinlinePlt({"-minline-plt"}, - " -minline-plt \tEnable inlining of PLT entries in function calls to functions that are not " - "known to bind locally.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMinlineSqrtMaxThroughput({"-minline-sqrt-max-throughput"}, - " -minline-sqrt-max-throughput \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMinlineSqrtMinLatency({"-minline-sqrt-min-latency"}, - " -minline-sqrt-min-latency \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMinlineStringopsDynamically({"-minline-stringops-dynamically"}, - " -minline-stringops-dynamically \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMinrt({"-minrt"}, - " -minrt \tEnable the use of a minimum runtime environment - no static initializers or " - "constructors.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMinsertSchedNops({"-minsert-sched-nops"}, - " -minsert-sched-nops \tThis option controls which NOP insertion scheme is used during the second " - "scheduling pass.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMintRegister({"-mint-register"}, - " -mint-register \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMint16({"-mint16"}, - " -mint16 \tUse 16-bit int.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-int16"), maplecl::kHide); - -maplecl::Option oMint32({"-mint32"}, - " -mint32 \tUse 32-bit int.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-int32"), maplecl::kHide); - -maplecl::Option oMint8({"-mint8"}, - " -mint8 \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMinterlinkCompressed({"-minterlink-compressed"}, - " -minterlink-compressed \tRequire that code using the standard (uncompressed) MIPS ISA be " - "link-compatible with MIPS16 and microMIPS code, and vice versa.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-interlink-compressed"), maplecl::kHide); - -maplecl::Option oMinterlinkMips16({"-minterlink-mips16"}, - " -minterlink-mips16 \tPredate the microMIPS ASE and are retained for backwards compatibility.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-interlink-mips16"), maplecl::kHide); - -maplecl::Option oMioVolatile({"-mio-volatile"}, - " -mio-volatile \tTells the compiler that any variable marked with the io attribute is to " - "be considered volatile.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMips1({"-mips1"}, - " -mips1 \tEquivalent to -march=mips1.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMips16({"-mips16"}, - " -mips16 \tGenerate MIPS16 code.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-mips16"), maplecl::kHide); - -maplecl::Option oMips2({"-mips2"}, - " -mips2 \tEquivalent to -march=mips2.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMips3({"-mips3"}, - " -mips3 \tEquivalent to -march=mips3.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMips32({"-mips32"}, - " -mips32 \tEquivalent to -march=mips32.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMips32r3({"-mips32r3"}, - " -mips32r3 \tEquivalent to -march=mips32r3.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMips32r5({"-mips32r5"}, - " -mips32r5 \tEquivalent to -march=mips32r5.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMips32r6({"-mips32r6"}, - " -mips32r6 \tEquivalent to -march=mips32r6.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMips3d({"-mips3d"}, - " -mips3d \tUse (do not use) the MIPS-3D ASE.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-mips3d"), maplecl::kHide); - -maplecl::Option oMips4({"-mips4"}, - " -mips4 \tEquivalent to -march=mips4.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMips64({"-mips64"}, - " -mips64 \tEquivalent to -march=mips64.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMips64r2({"-mips64r2"}, - " -mips64r2 \tEquivalent to -march=mips64r2.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMips64r3({"-mips64r3"}, - " -mips64r3 \tEquivalent to -march=mips64r3.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMips64r5({"-mips64r5"}, - " -mips64r5 \tEquivalent to -march=mips64r5.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMips64r6({"-mips64r6"}, - " -mips64r6 \tEquivalent to -march=mips64r6.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMiselE({"-misel="}, - " -misel= \tThis switch has been deprecated. Use -misel and -mno-isel instead.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMisel({"-misel"}, - " -misel \tThis switch enables or disables the generation of ISEL instructions.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-isel"), maplecl::kHide); - -maplecl::Option oMisize({"-misize"}, - " -misize \tAnnotate assembler instructions with estimated addresses.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMisrVectorSize({"-misr-vector-size"}, - " -misr-vector-size \tSpecify the size of each interrupt vector, which must be 4 or 16.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMissueRateNumber({"-missue-rate=number"}, - " -missue-rate=number \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMivc2({"-mivc2"}, - " -mivc2 \tEnables IVC2 scheduling. IVC2 is a 64-bit VLIW coprocessor.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMjsr({"-mjsr"}, - " -mjsr \t\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-jsr"), maplecl::kHide); - -maplecl::Option oMjumpInDelay({"-mjump-in-delay"}, - " -mjump-in-delay \tThis option is ignored and provided for compatibility purposes only.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMkernel({"-mkernel"}, - " -mkernel \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMknuthdiv({"-mknuthdiv"}, - " -mknuthdiv \tMake the result of a division yielding a remainder have the same sign as " - "the divisor. \n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-knuthdiv"), maplecl::kHide); - -maplecl::Option oMl({"-ml"}, - " -ml \tCauses variables to be assigned to the .far section by default.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMlarge({"-mlarge"}, - " -mlarge \tUse large-model addressing (20-bit pointers, 32-bit size_t).\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMlargeData({"-mlarge-data"}, - " -mlarge-data \tWith this option the data area is limited to just below 2GB.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMlargeDataThreshold({"-mlarge-data-threshold"}, - " -mlarge-data-threshold \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMlargeMem({"-mlarge-mem"}, - " -mlarge-mem \tWith -mlarge-mem code is generated that assumes a full 32-bit address.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMlargeText({"-mlarge-text"}, - " -mlarge-text \tWhen -msmall-data is used, the compiler can assume that all local symbols " - "share the same $gp value, and thus reduce the number of instructions required for a function call from 4 to 1.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMleadz({"-mleadz"}, - " -mleadz \tnables the leadz (leading zero) instruction.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMleafIdSharedLibrary({"-mleaf-id-shared-library"}, - " -mleaf-id-shared-library \tenerate code that supports shared libraries via the library ID method, but " - "assumes that this library or executable won't link against any other ID shared libraries.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-leaf-id-shared-library"), maplecl::kHide); - -maplecl::Option oMlibfuncs({"-mlibfuncs"}, - " -mlibfuncs \tSpecify that intrinsic library functions are being compiled, passing all " - "values in registers, no matter the size.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-libfuncs"), maplecl::kHide); - -maplecl::Option oMlibraryPic({"-mlibrary-pic"}, - " -mlibrary-pic \tGenerate position-independent EABI code.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMlinkedFp({"-mlinked-fp"}, - " -mlinked-fp \tFollow the EABI requirement of always creating a frame pointer whenever a " - "stack frame is allocated.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMlinkerOpt({"-mlinker-opt"}, - " -mlinker-opt \tEnable the optimization pass in the HP-UX linker.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMlinux({"-mlinux"}, - " -mlinux \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMlittle({"-mlittle"}, - " -mlittle \tAssume target CPU is configured as little endian.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMlittleEndian({"-mlittle-endian"}, - " -mlittle-endian \tAssume target CPU is configured as little endian.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMlittleEndianData({"-mlittle-endian-data"}, - " -mlittle-endian-data \tStore data (but not code) in the big-endian format.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMliw({"-mliw"}, - " -mliw \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMll64({"-mll64"}, - " -mll64 \tEnable double load/store operations for ARC HS cores.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMllsc({"-mllsc"}, - " -mllsc \tUse (do not use) 'll', 'sc', and 'sync' instructions to implement atomic " - "memory built-in functions.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-llsc"), maplecl::kHide); - -maplecl::Option oMloadStorePairs({"-mload-store-pairs"}, - " -mload-store-pairs \tEnable (disable) an optimization that pairs consecutive load or store " - "instructions to enable load/store bonding. \n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-load-store-pairs"), maplecl::kHide); - -maplecl::Option oMlocalSdata({"-mlocal-sdata"}, - " -mlocal-sdata \tExtend (do not extend) the -G behavior to local data too, such as to " - "static variables in C. \n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-local-sdata"), maplecl::kHide); - -maplecl::Option oMlock({"-mlock"}, - " -mlock \tPassed down to the assembler to enable the locked load/store conditional " - "extension. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMlongCalls({"-mlong-calls"}, - " -mlong-calls \tGenerate calls as register indirect calls, thus providing access to the " - "full 32-bit address range.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-long-calls"), maplecl::kHide); - -maplecl::Option oMlongDouble128({"-mlong-double-128"}, - " -mlong-double-128 \tControl the size of long double type. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMlongDouble64({"-mlong-double-64"}, - " -mlong-double-64 \tControl the size of long double type.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMlongDouble80({"-mlong-double-80"}, - " -mlong-double-80 \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMlongJumpTableOffsets({"-mlong-jump-table-offsets"}, - " -mlong-jump-table-offsets \tUse 32-bit offsets in switch tables. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMlongJumps({"-mlong-jumps"}, - " -mlong-jumps \tDisable (or re-enable) the generation of PC-relative jump instructions.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-long-jumps"), maplecl::kHide); - -maplecl::Option oMlongLoadStore({"-mlong-load-store"}, - " -mlong-load-store \tGenerate 3-instruction load and store sequences as sometimes required by " - "the HP-UX 10 linker.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMlong32({"-mlong32"}, - " -mlong32 \tForce long, int, and pointer types to be 32 bits wide.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMlong64({"-mlong64"}, - " -mlong64 \tForce long types to be 64 bits wide. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMlongcall({"-mlongcall"}, - " -mlongcall \tBy default assume that all calls are far away so that a longer and more " - "expensive calling sequence is required. \n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-longcall"), maplecl::kHide); - -maplecl::Option oMlongcalls({"-mlongcalls"}, - " -mlongcalls \t\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-longcalls"), maplecl::kHide); - -maplecl::Option oMloop({"-mloop"}, - " -mloop \tEnables the use of the e3v5 LOOP instruction. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMlow64k({"-mlow-64k"}, - " -mlow-64k \tWhen enabled, the compiler is free to take advantage of the knowledge that " - "the entire program fits into the low 64k of memory.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-low-64k"), maplecl::kHide); - -maplecl::Option oMlowPrecisionRecipSqrt({"-mlow-precision-recip-sqrt"}, - " -mlow-precision-recip-sqrt \tEnable the reciprocal square root approximation. Enabling this reduces precision" - " of reciprocal square root results to about 16 bits for single precision and to 32 bits for double precision.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-low-precision-recip-sqrt"), maplecl::kHide); - -maplecl::Option oMlp64({"-mlp64"}, - " -mlp64 \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMlra({"-mlra"}, - " -mlra \tEnable Local Register Allocation. By default the port uses LRA.(i.e. -mno-lra).\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-lra"), maplecl::kHide); - -maplecl::Option oMlraPriorityCompact({"-mlra-priority-compact"}, - " -mlra-priority-compact \tIndicate target register priority for r0..r3 / r12..r15.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMlraPriorityNoncompact({"-mlra-priority-noncompact"}, - " -mlra-priority-noncompact \tReduce target register priority for r0..r3 / r12..r15.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMlraPriorityNone({"-mlra-priority-none"}, - " -mlra-priority-none \tDon't indicate any priority for target registers.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMlwp({"-mlwp"}, - " -mlwp \tThese switches enable the use of instructions in the mlwp.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMlxc1Sxc1({"-mlxc1-sxc1"}, - " -mlxc1-sxc1 \tWhen applicable, enable (disable) the generation of lwxc1, swxc1, ldxc1, " - "sdxc1 instructions.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMlzcnt({"-mlzcnt"}, - " -mlzcnt \these switches enable the use of instructions in the mlzcnt\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMM({"-MM"}, - " -MM \tLike -M but ignore system header files.\n", - {driverCategory, clangCategory}); - -maplecl::Option oMm({"-Mm"}, - " -Mm \tCauses variables to be assigned to the .near section by default.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMmac({"-mmac"}, - " -mmac \tEnable the use of multiply-accumulate instructions.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMmac24({"-mmac-24"}, - " -mmac-24 \tPassed down to the assembler. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMmacD16({"-mmac-d16"}, - " -mmac-d16 \tPassed down to the assembler.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMmac_24({"-mmac_24"}, - " -mmac_24 \tReplaced by -mmac-24.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMmac_d16({"-mmac_d16"}, - " -mmac_d16 \tReplaced by -mmac-d16.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMmad({"-mmad"}, - " -mmad \tEnable (disable) use of the mad, madu and mul instructions, as provided by " - "the R4650 ISA.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-mad"), maplecl::kHide); - -maplecl::Option oMmadd4({"-mmadd4"}, - " -mmadd4 \tWhen applicable, enable (disable) the generation of 4-operand madd.s, madd.d " - "and related instructions.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMmainkernel({"-mmainkernel"}, - " -mmainkernel \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMmalloc64({"-mmalloc64"}, - " -mmalloc64 \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMmax({"-mmax"}, - " -mmax \tGenerate code to use MAX instruction sets.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-max"), maplecl::kHide); - -maplecl::Option oMmaxConstantSize({"-mmax-constant-size"}, - " -mmax-constant-size \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMmaxStackFrame({"-mmax-stack-frame"}, - " -mmax-stack-frame \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMmcountRaAddress({"-mmcount-ra-address"}, - " -mmcount-ra-address \tEmit (do not emit) code that allows _mcount to modify the calling function's " - "return address.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-mcount-ra-address"), maplecl::kHide); - -maplecl::Option oMmcu({"-mmcu"}, - " -mmcu \tUse the MIPS MCU ASE instructions.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-mcu"), maplecl::kHide); - -maplecl::Option oMmcuE({"-mmcu="}, - " -mmcu= \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMMD({"-MMD"}, - " -MMD \tLike -MD but ignore system header files.\n", - {driverCategory, clangCategory}); - -maplecl::Option oMmedia({"-mmedia"}, - " -mmedia \tUse media instructions.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-media"), maplecl::kHide); - -maplecl::Option oMmediumCalls({"-mmedium-calls"}, - " -mmedium-calls \tDon't use less than 25-bit addressing range for calls, which is the offset " - "available for an unconditional branch-and-link instruction. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMmemcpy({"-mmemcpy"}, - " -mmemcpy \tForce (do not force) the use of memcpy for non-trivial block moves.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-memcpy"), maplecl::kHide); - -maplecl::Option oMmemcpyStrategyStrategy({"-mmemcpy-strategy=strategy"}, - " -mmemcpy-strategy=strategy \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMmemoryLatency({"-mmemory-latency"}, - " -mmemory-latency \tSets the latency the scheduler should assume for typical memory references " - "as seen by the application.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMmemoryModel({"-mmemory-model"}, - " -mmemory-model \tSet the memory model in force on the processor to one of.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMmemsetStrategyStrategy({"-mmemset-strategy=strategy"}, - " -mmemset-strategy=strategy \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMmfcrf({"-mmfcrf"}, - " -mmfcrf \tSpecify which instructions are available on the processor you are using. \n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-mfcrf"), maplecl::kHide); - -maplecl::Option oMmfpgpr({"-mmfpgpr"}, - " -mmfpgpr \tSpecify which instructions are available on the processor you are using.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-mfpgpr"), maplecl::kHide); - -maplecl::Option oMmicromips({"-mmicromips"}, - " -mmicromips \tGenerate microMIPS code.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-mmicromips"), maplecl::kHide); - -maplecl::Option oMminimalToc({"-mminimal-toc"}, - " -mminimal-toc \tModify generation of the TOC (Table Of Contents), which is created for " - "every executable file. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMminmax({"-mminmax"}, - " -mminmax \tEnables the min and max instructions.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMmitigateRop({"-mmitigate-rop"}, - " -mmitigate-rop \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMmixedCode({"-mmixed-code"}, - " -mmixed-code \tTweak register allocation to help 16-bit instruction generation.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMmmx({"-mmmx"}, - " -mmmx \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMmodelLarge({"-mmodel=large"}, - " -mmodel=large \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMmodelMedium({"-mmodel=medium"}, - " -mmodel=medium \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMmodelSmall({"-mmodel=small"}, - " -mmodel=small \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMmovbe({"-mmovbe"}, - " -mmovbe \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMmpx({"-mmpx"}, - " -mmpx \tThese switches enable the use of instructions in the mmpx.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMmpyOption({"-mmpy-option"}, - " -mmpy-option \tCompile ARCv2 code with a multiplier design option. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMmsBitfields({"-mms-bitfields"}, - " -mms-bitfields \t\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-ms-bitfields"), maplecl::kHide); - -maplecl::Option oMmt({"-mmt"}, - " -mmt \tUse MT Multithreading instructions.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-mt"), maplecl::kHide); - -maplecl::Option oMmul({"-mmul"}, - " -mmul \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMmulBugWorkaround({"-mmul-bug-workaround"}, - " -mmul-bug-workaround \t\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-mul-bug-workaround"), maplecl::kHide); - -maplecl::Option oMmulx({"-mmul.x"}, - " -mmul.x \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMmul32x16({"-mmul32x16"}, - " -mmul32x16 \tGenerate 32x16-bit multiply and multiply-accumulate instructions.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMmul64({"-mmul64"}, - " -mmul64 \tGenerate mul64 and mulu64 instructions. Only valid for -mcpu=ARC600.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMmuladd({"-mmuladd"}, - " -mmuladd \tUse multiply and add/subtract instructions.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-muladd"), maplecl::kHide); - -maplecl::Option oMmulhw({"-mmulhw"}, - " -mmulhw \tGenerate code that uses the half-word multiply and multiply-accumulate " - "instructions on the IBM 405, 440, 464 and 476 processors.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-mulhw"), maplecl::kHide); - -maplecl::Option oMmult({"-mmult"}, - " -mmult \tEnables the multiplication and multiply-accumulate instructions.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMmultBug({"-mmult-bug"}, - " -mmult-bug \t\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-mult-bug"), maplecl::kHide); - -maplecl::Option oMmultcost({"-mmultcost"}, - " -mmultcost \tCost to assume for a multiply instruction, with '4' being equal to a normal " - "instruction.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMmultiCondExec({"-mmulti-cond-exec"}, - " -mmulti-cond-exec \tEnable optimization of && and || in conditional execution (default).\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-multi-cond-exec"), maplecl::kHide); - -maplecl::Option oMmulticore({"-mmulticore"}, - " -mmulticore \tBuild a standalone application for multicore Blackfin processors. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMmultiple({"-mmultiple"}, - " -mmultiple \tGenerate code that uses (does not use) the load multiple word instructions " - "and the store multiple word instructions. \n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-multiple"), maplecl::kHide); - -maplecl::Option oMmusl({"-mmusl"}, - " -mmusl \tUse musl C library.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMmvcle({"-mmvcle"}, - " -mmvcle \tGenerate code using the mvcle instruction to perform block moves.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-mvcle"), maplecl::kHide); - -maplecl::Option oMmvme({"-mmvme"}, - " -mmvme \tOn embedded PowerPC systems, assume that the startup module is called crt0.o " - "and the standard C libraries are libmvme.a and libc.a.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMmwaitx({"-mmwaitx"}, - " -mmwaitx \tThese switches enable the use of instructions in the mmwaitx.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMn({"-mn"}, - " -mn \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMnFlash({"-mn-flash"}, - " -mn-flash \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMnan2008({"-mnan=2008"}, - " -mnan=2008 \tControl the encoding of the special not-a-number (NaN) IEEE 754 " - "floating-point data.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMnanLegacy({"-mnan=legacy"}, - " -mnan=legacy \tControl the encoding of the special not-a-number (NaN) IEEE 754 " - "floating-point data.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMneonFor64bits({"-mneon-for-64bits"}, - " -mneon-for-64bits \tEnables using Neon to handle scalar 64-bits operations.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMnestedCondExec({"-mnested-cond-exec"}, - " -mnested-cond-exec \tEnable nested conditional execution optimizations (default).\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-nested-cond-exec"), maplecl::kHide); - -maplecl::Option oMnhwloop({"-mnhwloop"}, - " -mnhwloop \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMnoAlignStringops({"-mno-align-stringops"}, - " -mno-align-stringops \tDo not align the destination of inlined string operations.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMnoBrcc({"-mno-brcc"}, - " -mno-brcc \tThis option disables a target-specific pass in arc_reorg to generate " - "compare-and-branch (brcc) instructions. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMnoClearbss({"-mno-clearbss"}, - " -mno-clearbss \tThis option is deprecated. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMnoCrt0({"-mno-crt0"}, - " -mno-crt0 \tDo not link in the C run-time initialization object file.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMnoDefault({"-mno-default"}, - " -mno-default \tThis option instructs Maple to turn off all tunable features.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMnoDpfpLrsr({"-mno-dpfp-lrsr"}, - " -mno-dpfp-lrsr \tDisable lr and sr instructions from using FPX extension aux registers.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMnoEflags({"-mno-eflags"}, - " -mno-eflags \tDo not mark ABI switches in e_flags.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMnoFancyMath387({"-mno-fancy-math-387"}, - " -mno-fancy-math-387 \tSome 387 emulators do not support the sin, cos and sqrt instructions for the " - "387. Specify this option to avoid generating those instructions. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMnoFloat({"-mno-float"}, - " -mno-float \tEquivalent to -msoft-float, but additionally asserts that the program being " - "compiled does not perform any floating-point operations. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMnoFpInToc({"-mno-fp-in-toc"}, - " -mno-fp-in-toc \tModify generation of the TOC (Table Of Contents), which is created for every " - "executable file.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMFpReg({"-mfp-reg"}, - " -mfp-reg \tGenerate code that uses (does not use) the floating-point register set. \n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-fp-regs"), maplecl::kHide); - -maplecl::Option oMnoFpRetIn387({"-mno-fp-ret-in-387"}, - " -mno-fp-ret-in-387 \tDo not use the FPU registers for return values of functions.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMnoInlineFloatDivide({"-mno-inline-float-divide"}, - " -mno-inline-float-divide \tDo not generate inline code for divides of floating-point values.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMnoInlineIntDivide({"-mno-inline-int-divide"}, - " -mno-inline-int-divide \tDo not generate inline code for divides of integer values.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMnoInlineSqrt({"-mno-inline-sqrt"}, - " -mno-inline-sqrt \tDo not generate inline code for sqrt.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMnoInterrupts({"-mno-interrupts"}, - " -mno-interrupts \tGenerated code is not compatible with hardware interrupts.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMnoLsim({"-mno-lsim"}, - " -mno-lsim \tAssume that runtime support has been provided and so there is no need to " - "include the simulator library (libsim.a) on the linker command line.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMnoMillicode({"-mno-millicode"}, - " -mno-millicode \tWhen optimizing for size (using -Os), prologues and epilogues that have to " - "save or restore a large number of registers are often shortened by using call to a special function in libgcc\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMnoMpy({"-mno-mpy"}, - " -mno-mpy \tDo not generate mpy-family instructions for ARC700. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMnoOpts({"-mno-opts"}, - " -mno-opts \tDisables all the optional instructions enabled by -mall-opts.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMnoPic({"-mno-pic"}, - " -mno-pic \tGenerate code that does not use a global pointer register. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMnoPostinc({"-mno-postinc"}, - " -mno-postinc \tCode generation tweaks that disable, respectively, splitting of 32-bit loads, " - "generation of post-increment addresses, and generation of post-modify addresses.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMnoPostmodify({"-mno-postmodify"}, - " -mno-postmodify \tCode generation tweaks that disable, respectively, splitting of 32-bit loads, " - "generation of post-increment addresses, and generation of post-modify addresses. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMnoRedZone({"-mno-red-zone"}, - " -mno-red-zone \tDo not use a so-called “red zone” for x86-64 code.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMnoRoundNearest({"-mno-round-nearest"}, - " -mno-round-nearest \tMake the scheduler assume that the rounding mode has been set to truncating.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMnoSchedProlog({"-mno-sched-prolog"}, - " -mno-sched-prolog \tPrevent the reordering of instructions in the function prologue, or the " - "merging of those instruction with the instructions in the function's body. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMnoSideEffects({"-mno-side-effects"}, - " -mno-side-effects \tDo not emit instructions with side effects in addressing modes other than " - "post-increment.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMnoSoftCmpsf({"-mno-soft-cmpsf"}, - " -mno-soft-cmpsf \tFor single-precision floating-point comparisons, emit an fsub instruction " - "and test the flags. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMnoSpaceRegs({"-mno-space-regs"}, - " -mno-space-regs \tGenerate code that assumes the target has no space registers.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMSpe({"-mspe"}, - " -mspe \tThis switch enables the generation of SPE simd instructions.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-spe"), maplecl::kHide); - -maplecl::Option oMnoSumInToc({"-mno-sum-in-toc"}, - " -mno-sum-in-toc \tModify generation of the TOC (Table Of Contents), which is created for " - "every executable file. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMnoVectDouble({"-mnovect-double"}, - " -mno-vect-double \tChange the preferred SIMD mode to SImode. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMnobitfield({"-mnobitfield"}, - " -mnobitfield \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMnodiv({"-mnodiv"}, - " -mnodiv \tDo not use div and mod instructions.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMnoliw({"-mnoliw"}, - " -mnoliw \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMnomacsave({"-mnomacsave"}, - " -mnomacsave \tMark the MAC register as call-clobbered, even if -mrenesas is given.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMnopFunDllimport({"-mnop-fun-dllimport"}, - " -mnop-fun-dllimport \tThis option is available for Cygwin and MinGW targets.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMnopMcount({"-mnop-mcount"}, - " -mnop-mcount \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMnops({"-mnops"}, - " -mnops \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMnorm({"-mnorm"}, - " -mnorm \tGenerate norm instructions. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMnosetlb({"-mnosetlb"}, - " -mnosetlb \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMnosplitLohi({"-mnosplit-lohi"}, - " -mnosplit-lohi \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oModdSpreg({"-modd-spreg"}, - " -modd-spreg \tEnable the use of odd-numbered single-precision floating-point registers " - "for the o32 ABI.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-odd-spreg"), maplecl::kHide); - -maplecl::Option oMoneByteBool({"-mone-byte-bool"}, - " -mone-byte-bool \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMoptimize({"-moptimize"}, - " -moptimize \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMoptimizeMembar({"-moptimize-membar"}, - " -moptimize-membar \tThis switch removes redundant membar instructions from the compiler-generated " - "code. \n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-optimize-membar"), maplecl::kHide); - -maplecl::Option oMoverrideE({"-moverride="}, - " -moverride= \tPower users only! Override CPU optimization parameters.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMP({"-MP"}, - " -MP \tGenerate phony targets for all headers.\n", - {driverCategory, clangCategory}); - -maplecl::Option oMpaRisc10({"-mpa-risc-1-0"}, - " -mpa-risc-1-0 \tSynonyms for -march=1.0 respectively.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMpaRisc11({"-mpa-risc-1-1"}, - " -mpa-risc-1-1 \tSynonyms for -march=1.1 respectively.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMpaRisc20({"-mpa-risc-2-0"}, - " -mpa-risc-2-0 \tSynonyms for -march=2.0 respectively.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMpack({"-mpack"}, - " -mpack \tPack VLIW instructions.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-pack"), maplecl::kHide); - -maplecl::Option oMpackedStack({"-mpacked-stack"}, - " -mpacked-stack \tUse the packed stack layout.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-packed-stack"), maplecl::kHide); - -maplecl::Option oMpadstruct({"-mpadstruct"}, - " -mpadstruct \tThis option is deprecated.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMpaired({"-mpaired"}, - " -mpaired \tThis switch enables or disables the generation of PAIRED simd instructions.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-paired"), maplecl::kHide); - -maplecl::Option oMpairedSingle({"-mpaired-single"}, - " -mpaired-single \tUse paired-single floating-point instructions.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-paired-single"), maplecl::kHide); - -maplecl::Option oMpcRelativeLiteralLoads({"-mpc-relative-literal-loads"}, - " -mpc-relative-literal-loads \tPC relative literal loads.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-pc-relative-literal-loads"), maplecl::kHide); - -maplecl::Option oMpc32({"-mpc32"}, - " -mpc32 \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMpc64({"-mpc64"}, - " -mpc64 \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMpc80({"-mpc80"}, - " -mpc80 \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMpclmul({"-mpclmul"}, - " -mpclmul \tThese switches enable the use of instructions in the mpclmul.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMpcrel({"-mpcrel"}, - " -mpcrel \tUse the pc-relative addressing mode of the 68000 directly, instead of using " - "a global offset table.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMpdebug({"-mpdebug"}, - " -mpdebug \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMpe({"-mpe"}, - " -mpe \tSupport IBM RS/6000 SP Parallel Environment (PE). \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMpeAlignedCommons({"-mpe-aligned-commons"}, - " -mpe-aligned-commons \tThis option is available for Cygwin and MinGW targets.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMperfExt({"-mperf-ext"}, - " -mperf-ext \tGenerate performance extension instructions.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-perf-ext"), maplecl::kHide); - -maplecl::Option oMpicDataIsTextRelative({"-mpic-data-is-text-relative"}, - " -mpic-data-is-text-relative \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMpicRegister({"-mpic-register"}, - " -mpic-register \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMpid({"-mpid"}, - " -mpid \t\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-pid"), maplecl::kHide); - -maplecl::Option oMpku({"-mpku"}, - " -mpku \tThese switches enable the use of instructions in the mpku.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMpointerSizeSize({"-mpointer-size=size"}, - " -mpointer-size=size \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMpointersToNestedFunctions({"-mpointers-to-nested-functions"}, - " -mpointers-to-nested-functions \tGenerate (do not generate) code to load up the static chain register (r11) " - "when calling through a pointer on AIX and 64-bit Linux systems where a function pointer points to a 3-word " - "descriptor giving the function address, TOC value to be loaded in register r2, and static chain value to be " - "loaded in register r11. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMpokeFunctionName({"-mpoke-function-name"}, - " -mpoke-function-name \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMpopc({"-mpopc"}, - " -mpopc \tWith -mpopc, Maple generates code that takes advantage of the UltraSPARC " - "Population Count instruction.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-popc"), maplecl::kHide); - -maplecl::Option oMpopcnt({"-mpopcnt"}, - " -mpopcnt \tThese switches enable the use of instructions in the mpopcnt.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMpopcntb({"-mpopcntb"}, - " -mpopcntb \tSpecify which instructions are available on the processor you are using. \n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-popcntb"), maplecl::kHide); - -maplecl::Option oMpopcntd({"-mpopcntd"}, - " -mpopcntd \tSpecify which instructions are available on the processor you are using. \n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-popcntd"), maplecl::kHide); - -maplecl::Option oMportableRuntime({"-mportable-runtime"}, - " -mportable-runtime \tUse the portable calling conventions proposed by HP for ELF systems.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMpower8Fusion({"-mpower8-fusion"}, - " -mpower8-fusion \tGenerate code that keeps some integer operations adjacent so that the " - "instructions can be fused together on power8 and later processors.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-power8-fusion"), maplecl::kHide); - -maplecl::Option oMpower8Vector({"-mpower8-vector"}, - " -mpower8-vector \tGenerate code that uses the vector and scalar instructions that were added " - "in version 2.07 of the PowerPC ISA.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-power8-vector"), maplecl::kHide); - -maplecl::Option oMpowerpcGfxopt({"-mpowerpc-gfxopt"}, - " -mpowerpc-gfxopt \tSpecify which instructions are available on the processor you are using\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-powerpc-gfxopt"), maplecl::kHide); - -maplecl::Option oMpowerpcGpopt({"-mpowerpc-gpopt"}, - " -mpowerpc-gpopt \tSpecify which instructions are available on the processor you are using\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-powerpc-gpopt"), maplecl::kHide); - -maplecl::Option oMpowerpc64({"-mpowerpc64"}, - " -mpowerpc64 \tSpecify which instructions are available on the processor you are using\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-powerpc64"), maplecl::kHide); - -maplecl::Option oMpreferAvx128({"-mprefer-avx128"}, - " -mprefer-avx128 \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMpreferShortInsnRegs({"-mprefer-short-insn-regs"}, - " -mprefer-short-insn-regs \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMprefergot({"-mprefergot"}, - " -mprefergot \tWhen generating position-independent code, emit function calls using the " - "Global Offset Table instead of the Procedure Linkage Table.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMpreferredStackBoundary({"-mpreferred-stack-boundary"}, - " -mpreferred-stack-boundary \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMprefetchwt1({"-mprefetchwt1"}, - " -mprefetchwt1 \tThese switches enable the use of instructions in the mprefetchwt1.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMpretendCmove({"-mpretend-cmove"}, - " -mpretend-cmove \tPrefer zero-displacement conditional branches for conditional move " - "instruction patterns.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMprintTuneInfo({"-mprint-tune-info"}, - " -mprint-tune-info \tPrint CPU tuning information as comment in assembler file.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMprioritizeRestrictedInsns({"-mprioritize-restricted-insns"}, - " -mprioritize-restricted-insns \tThis option controls the priority that is assigned to dispatch-slot " - "restricted instructions during the second scheduling pass. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMprologFunction({"-mprolog-function"}, - " -mprolog-function \tDo use external functions to save and restore registers at the prologue " - "and epilogue of a function.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-prolog-function"), maplecl::kHide); - -maplecl::Option oMprologueEpilogue({"-mprologue-epilogue"}, - " -mprologue-epilogue \t\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-prologue-epilogue"), maplecl::kHide); - -maplecl::Option oMprototype({"-mprototype"}, - " -mprototype \tOn System V.4 and embedded PowerPC systems assume that all calls to variable " - "argument functions are properly prototyped. \n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-prototype"), maplecl::kHide); - -maplecl::Option oMpureCode({"-mpure-code"}, - " -mpure-code \tDo not allow constant data to be placed in code sections.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMpushArgs({"-mpush-args"}, - " -mpush-args \t\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-push-args"), maplecl::kHide); - -maplecl::Option oMQ({"-MQ"}, - " -MQ \t-MQ o Add a MAKE-quoted target.\n", - {driverCategory, clangCategory}, maplecl::kJoinedValue); - -maplecl::Option oMqClass({"-mq-class"}, - " -mq-class \tEnable 'q' instruction alternatives.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMquadMemory({"-mquad-memory"}, - " -mquad-memory \tGenerate code that uses the non-atomic quad word memory instructions. \n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-quad-memory"), maplecl::kHide); - -maplecl::Option oMquadMemoryAtomic({"-mquad-memory-atomic"}, - " -mquad-memory-atomic \tGenerate code that uses the atomic quad word memory instructions.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-quad-memory-atomic"), maplecl::kHide); - -maplecl::Option oMr10kCacheBarrier({"-mr10k-cache-barrier"}, - " -mr10k-cache-barrier \tSpecify whether Maple should insert cache barriers to avoid the side-effects " - "of speculation on R10K processors.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMRcq({"-mRcq"}, - " -mRcq \tEnable 'Rcq' constraint handling. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMRcw({"-mRcw"}, - " -mRcw \tEnable 'Rcw' constraint handling. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMrdrnd({"-mrdrnd"}, - " -mrdrnd \tThese switches enable the use of instructions in the mrdrnd.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMreadonlyInSdata({"-mreadonly-in-sdata"}, - " -mreadonly-in-sdata \t\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-readonly-in-sdata"), maplecl::kHide); - -maplecl::Option oMrecip({"-mrecip"}, - " -mrecip \tThis option enables use of the reciprocal estimate and reciprocal square " - "root estimate instructions with additional Newton-Raphson steps to increase precision instead of doing a " - "divide or square root and divide for floating-point arguments.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMrecipPrecision({"-mrecip-precision"}, - " -mrecip-precision \tAssume (do not assume) that the reciprocal estimate instructions provide " - "higher-precision estimates than is mandated by the PowerPC ABI.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMrecipE({"-mrecip="}, - " -mrecip= \tThis option controls which reciprocal estimate instructions may be used.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMrecordMcount({"-mrecord-mcount"}, - " -mrecord-mcount \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMreducedRegs({"-mreduced-regs"}, - " -mreduced-regs \tUse reduced-set registers for register allocation.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMregisterNames({"-mregister-names"}, - " -mregister-names \t\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-register-names"), maplecl::kHide); - -maplecl::Option oMregnames({"-mregnames"}, - " -mregnames \tOn System V.4 and embedded PowerPC systems do emit register names in the " - "assembly language output using symbolic forms.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-regnames"), maplecl::kHide); - -maplecl::Option oMregparm({"-mregparm"}, - " -mregparm \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMrelax({"-mrelax"}, - " -mrelax \tGuide linker to relax instructions.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-relax"), maplecl::kHide); - -maplecl::Option oMrelaxImmediate({"-mrelax-immediate"}, - " -mrelax-immediate \t\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-relax-immediate"), maplecl::kHide); - -maplecl::Option oMrelaxPicCalls({"-mrelax-pic-calls"}, - " -mrelax-pic-calls \tTry to turn PIC calls that are normally dispatched via register $25 " - "into direct calls.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMrelocatable({"-mrelocatable"}, - " -mrelocatable \tGenerate code that allows a static executable to be relocated to a different " - "address at run time. \n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-relocatable"), maplecl::kHide); - -maplecl::Option oMrelocatableLib({"-mrelocatable-lib"}, - " -mrelocatable-lib \tGenerates a .fixup section to allow static executables to be relocated at " - "run time, but -mrelocatable-lib does not use the smaller stack alignment of -mrelocatable.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-relocatable-lib"), maplecl::kHide); - -maplecl::Option oMrenesas({"-mrenesas"}, - " -mrenesas \tComply with the calling conventions defined by Renesas.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-renesas"), maplecl::kHide); - -maplecl::Option oMrepeat({"-mrepeat"}, - " -mrepeat \tEnables the repeat and erepeat instructions, used for low-overhead looping.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMrestrictIt({"-mrestrict-it"}, - " -mrestrict-it \tRestricts generation of IT blocks to conform to the rules of ARMv8.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMreturnPointerOnD0({"-mreturn-pointer-on-d0"}, - " -mreturn-pointer-on-d0 \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMrh850Abi({"-mrh850-abi"}, - " -mrh850-abi \tEnables support for the RH850 version of the V850 ABI.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMrl78({"-mrl78"}, - " -mrl78 \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMrmw({"-mrmw"}, - " -mrmw \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMrtd({"-mrtd"}, - " -mrtd \tUse a different function-calling convention, in which functions that take a " - "fixed number of arguments return with the rtd instruction, which pops their arguments while returning.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-rtd"), maplecl::kHide); - -maplecl::Option oMrtm({"-mrtm"}, - " -mrtm \tThese switches enable the use of instructions in the mrtm.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMrtp({"-mrtp"}, - " -mrtp \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMrtsc({"-mrtsc"}, - " -mrtsc \tPassed down to the assembler to enable the 64-bit time-stamp counter " - "extension instruction.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMs({"-ms"}, - " -ms \tCauses all variables to default to the .tiny section.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMs2600({"-ms2600"}, - " -ms2600 \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMsafeDma({"-msafe-dma"}, - " -msafe-dma \ttell the compiler to treat the DMA instructions as potentially affecting " - "all memory.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-munsafe-dma"), maplecl::kHide); - -maplecl::Option oMsafeHints({"-msafe-hints"}, - " -msafe-hints \tWork around a hardware bug that causes the SPU to stall indefinitely. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMsahf({"-msahf"}, - " -msahf \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMsatur({"-msatur"}, - " -msatur \tEnables the saturation instructions. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMsaveAccInInterrupts({"-msave-acc-in-interrupts"}, - " -msave-acc-in-interrupts \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMsaveMducInInterrupts({"-msave-mduc-in-interrupts"}, - " -msave-mduc-in-interrupts \t\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-save-mduc-in-interrupts"), maplecl::kHide); - -maplecl::Option oMsaveRestore({"-msave-restore"}, - " -msave-restore \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMsaveTocIndirect({"-msave-toc-indirect"}, - " -msave-toc-indirect \tGenerate code to save the TOC value in the reserved stack location in the " - "function prologue if the function calls through a pointer on AIX and 64-bit Linux systems.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMscc({"-mscc"}, - " -mscc \tEnable the use of conditional set instructions (default).\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-scc"), maplecl::kHide); - -maplecl::Option oMschedArDataSpec({"-msched-ar-data-spec"}, - " -msched-ar-data-spec \t\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-sched-ar-data-spec"), maplecl::kHide); - -maplecl::Option oMschedArInDataSpec({"-msched-ar-in-data-spec"}, - " -msched-ar-in-data-spec \t\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-sched-ar-in-data-spec"), maplecl::kHide); - -maplecl::Option oMschedBrDataSpec({"-msched-br-data-spec"}, - " -msched-br-data-spec \t\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-sched-br-data-spec"), maplecl::kHide); - -maplecl::Option oMschedBrInDataSpec({"-msched-br-in-data-spec"}, - " -msched-br-in-data-spec \t\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-sched-br-in-data-spec"), maplecl::kHide); - -maplecl::Option oMschedControlSpec({"-msched-control-spec"}, - " -msched-control-spec \t\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-sched-control-spec"), maplecl::kHide); - -maplecl::Option oMschedCostlyDep({"-msched-costly-dep"}, - " -msched-costly-dep \tThis option controls which dependences are considered costly by the target " - "during instruction scheduling.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMschedCountSpecInCriticalPath({"-msched-count-spec-in-critical-path"}, - " -msched-count-spec-in-critical-path \t\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-sched-count-spec-in-critical-path"), maplecl::kHide); - -maplecl::Option oMschedFpMemDepsZeroCost({"-msched-fp-mem-deps-zero-cost"}, - " -msched-fp-mem-deps-zero-cost \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMschedInControlSpec({"-msched-in-control-spec"}, - " -msched-in-control-spec \t\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-sched-in-control-spec"), maplecl::kHide); - -maplecl::Option oMschedMaxMemoryInsns({"-msched-max-memory-insns"}, - " -msched-max-memory-insns \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMschedMaxMemoryInsnsHardLimit({"-msched-max-memory-insns-hard-limit"}, - " -msched-max-memory-insns-hard-limit \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMschedPreferNonControlSpecInsns({"-msched-prefer-non-control-spec-insns"}, - " -msched-prefer-non-control-spec-insns \t\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-sched-prefer-non-control-spec-insns"), maplecl::kHide); - -maplecl::Option oMschedPreferNonDataSpecInsns({"-msched-prefer-non-data-spec-insns"}, - " -msched-prefer-non-data-spec-insns \t\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-sched-prefer-non-data-spec-insns"), maplecl::kHide); - -maplecl::Option oMschedSpecLdc({"-msched-spec-ldc"}, - " -msched-spec-ldc \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMschedStopBitsAfterEveryCycle({"-msched-stop-bits-after-every-cycle"}, - " -msched-stop-bits-after-every-cycle \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMschedule({"-mschedule"}, - " -mschedule \tSchedule code according to the constraints for the machine type cpu-type. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMscore5({"-mscore5"}, - " -mscore5 \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMscore5u({"-mscore5u"}, - " -mscore5u \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMscore7({"-mscore7"}, - " -mscore7 \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMscore7d({"-mscore7d"}, - " -mscore7d \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMsda({"-msda"}, - " -msda \tPut static or global variables whose size is n bytes or less into the small " - "data area that register gp points to.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMsdata({"-msdata"}, - " -msdata \tOn System V.4 and embedded PowerPC systems, if -meabi is used, compile code " - "the same as -msdata=eabi, otherwise compile code the same as -msdata=sysv.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-sdata"), maplecl::kHide); - -maplecl::Option oMsdataAll({"-msdata=all"}, - " -msdata=all \tPut all data, not just small objects, into the sections reserved for small " - "data, and use addressing relative to the B14 register to access them.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMsdataData({"-msdata=data"}, - " -msdata=data \tOn System V.4 and embedded PowerPC systems, put small global data in the " - ".sdata section.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMsdataDefault({"-msdata=default"}, - " -msdata=default \tOn System V.4 and embedded PowerPC systems, if -meabi is used, compile code " - "the same as -msdata=eabi, otherwise compile code the same as -msdata=sysv.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMsdataEabi({"-msdata=eabi"}, - " -msdata=eabi \tOn System V.4 and embedded PowerPC systems, put small initialized const " - "global and static data in the .sdata2 section, which is pointed to by register r2. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMsdataNone({"-msdata=none"}, - " -msdata=none \tOn embedded PowerPC systems, put all initialized global and static data " - "in the .data section, and all uninitialized data in the .bss section.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMsdataSdata({"-msdata=sdata"}, - " -msdata=sdata \tPut small global and static data in the small data area, but do not generate " - "special code to reference them.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMsdataSysv({"-msdata=sysv"}, - " -msdata=sysv \tOn System V.4 and embedded PowerPC systems, put small global and static data " - "in the .sdata section, which is pointed to by register r13.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMsdataUse({"-msdata=use"}, - " -msdata=use \tPut small global and static data in the small data area, and generate special " - "instructions to reference them.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMsdram({"-msdram"}, - " -msdram \tLink the SDRAM-based runtime instead of the default ROM-based runtime.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMsecurePlt({"-msecure-plt"}, - " -msecure-plt \tenerate code that allows ld and ld.so to build executables and shared libraries " - "with non-executable .plt and .got sections. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMselSchedDontCheckControlSpec({"-msel-sched-dont-check-control-spec"}, - " -msel-sched-dont-check-control-spec \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMsepData({"-msep-data"}, - " -msep-data \tGenerate code that allows the data segment to be located in a different area " - "of memory from the text segment.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-sep-data"), maplecl::kHide); - -maplecl::Option oMserializeVolatile({"-mserialize-volatile"}, - " -mserialize-volatile \t\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-serialize-volatile"), maplecl::kHide); - -maplecl::Option oMsetlb({"-msetlb"}, - " -msetlb \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMsha({"-msha"}, - " -msha \tThese switches enable the use of instructions in the msha.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMsharedLibraryId({"-mshared-library-id"}, - " -mshared-library-id \tSpecifies the identification number of the ID-based shared library being " - "compiled.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMshort({"-mshort"}, - " -mshort \tConsider type int to be 16 bits wide, like short int.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-short"), maplecl::kHide); - -maplecl::Option oMsignExtendEnabled({"-msign-extend-enabled"}, - " -msign-extend-enabled \tEnable sign extend instructions.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMsignReturnAddress({"-msign-return-address"}, - " -msign-return-address \tSelect return address signing scope.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMsiliconErrata({"-msilicon-errata"}, - " -msilicon-errata \tThis option passes on a request to assembler to enable the fixes for the " - "named silicon errata.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMsiliconErrataWarn({"-msilicon-errata-warn"}, - " -msilicon-errata-warn \tThis option passes on a request to the assembler to enable warning messages " - "when a silicon errata might need to be applied.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMsim({"-msim"}, - " -msim \tLink the simulator run-time libraries.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-sim"), maplecl::kHide); - -maplecl::Option oMsimd({"-msimd"}, - " -msimd \tEnable generation of ARC SIMD instructions via target-specific builtins. " - "Only valid for -mcpu=ARC700.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMsimnovec({"-msimnovec"}, - " -msimnovec \tLink the simulator runtime libraries, excluding built-in support for reset " - "and exception vectors and tables.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMsimpleFpu({"-msimple-fpu"}, - " -msimple-fpu \tDo not generate sqrt and div instructions for hardware floating-point unit.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMsingleExit({"-msingle-exit"}, - " -msingle-exit \tForce generated code to have a single exit point in each function.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-single-exit"), maplecl::kHide); - -maplecl::Option oMsingleFloat({"-msingle-float"}, - " -msingle-float \tGenerate code for single-precision floating-point operations. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMsinglePicBase({"-msingle-pic-base"}, - " -msingle-pic-base \tTreat the register used for PIC addressing as read-only, rather than loading " - "it in the prologue for each function.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMsio({"-msio"}, - " -msio \tGenerate the predefine, _SIO, for server IO. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMsizeLevel({"-msize-level"}, - " -msize-level \tFine-tune size optimization with regards to instruction lengths and alignment.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMskipRaxSetup({"-mskip-rax-setup"}, - " -mskip-rax-setup \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMslowBytes({"-mslow-bytes"}, - " -mslow-bytes \t\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-slow-bytes"), maplecl::kHide); - -maplecl::Option oMslowFlashData({"-mslow-flash-data"}, - " -mslow-flash-data \tAssume loading data from flash is slower than fetching instruction.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMsmall({"-msmall"}, - " -msmall \tUse small-model addressing (16-bit pointers, 16-bit size_t).\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMsmallData({"-msmall-data"}, - " -msmall-data \tWhen -msmall-data is used, objects 8 bytes long or smaller are placed in a small" - " data area (the .sdata and .sbss sections) and are accessed via 16-bit relocations off of the $gp register. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMsmallDataLimit({"-msmall-data-limit"}, - " -msmall-data-limit \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMsmallDivides({"-msmall-divides"}, - " -msmall-divides \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMsmallExec({"-msmall-exec"}, - " -msmall-exec \tGenerate code using the bras instruction to do subroutine calls. \n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-small-exec"), maplecl::kHide); - -maplecl::Option oMsmallMem({"-msmall-mem"}, - " -msmall-mem \tBy default, Maple generates code assuming that addresses are never larger " - "than 18 bits.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMsmallModel({"-msmall-model"}, - " -msmall-model \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMsmallText({"-msmall-text"}, - " -msmall-text \tWhen -msmall-text is used, the compiler assumes that the code of the entire" - " program (or shared library) fits in 4MB, and is thus reachable with a branch instruction. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMsmall16({"-msmall16"}, - " -msmall16 \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMsmallc({"-msmallc"}, - " -msmallc \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMsmartmips({"-msmartmips"}, - " -msmartmips \tUse the MIPS SmartMIPS ASE.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-smartmips"), maplecl::kHide); - -maplecl::Option oMsoftFloat({"-msoft-float"}, - " -msoft-float \tThis option ignored; it is provided for compatibility purposes only. \n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-soft-float"), maplecl::kHide); - -maplecl::Option oMsoftQuadFloat({"-msoft-quad-float"}, - " -msoft-quad-float \tGenerate output containing library calls for quad-word (long double) " - "floating-point instructions.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMsoftStack({"-msoft-stack"}, - " -msoft-stack \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMsp8({"-msp8"}, - " -msp8 \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMspace({"-mspace"}, - " -mspace \tTry to make the code as small as possible.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMspe({"-mspe="}, - " -mspe= \tThis option has been deprecated. Use -mspe and -mno-spe instead.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMspecldAnomaly({"-mspecld-anomaly"}, - " -mspecld-anomaly \tWhen enabled, the compiler ensures that the generated code does not contain " - "speculative loads after jump instructions.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-specld-anomaly"), maplecl::kHide); - -maplecl::Option oMspfp({"-mspfp"}, - " -mspfp \tGenerate single-precision FPX instructions, tuned for the compact " - "implementation.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMspfpCompact({"-mspfp-compact"}, - " -mspfp-compact \tGenerate single-precision FPX instructions, tuned for the compact " - "implementation.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMspfpFast({"-mspfp-fast"}, - " -mspfp-fast \tGenerate single-precision FPX instructions, tuned for the fast implementation.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMspfp_compact({"-mspfp_compact"}, - " -mspfp_compact \tReplaced by -mspfp-compact.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMspfp_fast({"-mspfp_fast"}, - " -mspfp_fast \tReplaced by -mspfp-fast.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMsplitAddresses({"-msplit-addresses"}, - " -msplit-addresses \tEnable (disable) use of the %hi() and %lo() assembler relocation operators.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-split-addresses"), maplecl::kHide); - -maplecl::Option oMsplitVecmoveEarly({"-msplit-vecmove-early"}, - " -msplit-vecmove-early \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMsse({"-msse"}, - " -msse \tThese switches enable the use of instructions in the msse.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMsse2({"-msse2"}, - " -msse2 \tThese switches enable the use of instructions in the msse2.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMsse2avx({"-msse2avx"}, - " -msse2avx \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMsse3({"-msse3"}, - " -msse3 \tThese switches enable the use of instructions in the msse2avx.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMsse4({"-msse4"}, - " -msse4 \tThese switches enable the use of instructions in the msse4.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMsse41({"-msse4.1"}, - " -msse4.1 \tThese switches enable the use of instructions in the msse4.1.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMsse42({"-msse4.2"}, - " -msse4.2 \tThese switches enable the use of instructions in the msse4.2.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMsse4a({"-msse4a"}, - " -msse4a \tThese switches enable the use of instructions in the msse4a.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMsseregparm({"-msseregparm"}, - " -msseregparm \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMssse3({"-mssse3"}, - " -mssse3 \tThese switches enable the use of instructions in the mssse3.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMstackAlign({"-mstack-align"}, - " -mstack-align \t\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-stack-align"), maplecl::kHide); - -maplecl::Option oMstackBias({"-mstack-bias"}, - " -mstack-bias \tWith -mstack-bias, GCC assumes that the stack pointer, and frame pointer if " - "present, are offset by -2047 which must be added back when making stack frame references.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-stack-bias"), maplecl::kHide); - -maplecl::Option oMstackCheckL1({"-mstack-check-l1"}, - " -mstack-check-l1 \tDo stack checking using information placed into L1 scratchpad memory by the " - "uClinux kernel.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMstackGuard({"-mstack-guard"}, - " -mstack-guard \tThe S/390 back end emits additional instructions in the function prologue that " - "trigger a trap if the stack size is stack-guard bytes above the stack-size (remember that the stack on S/390 " - "grows downward). \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMstackIncrement({"-mstack-increment"}, - " -mstack-increment \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMstackOffset({"-mstack-offset"}, - " -mstack-offset \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMstackProtectorGuard({"-mstack-protector-guard"}, - " -mstack-protector-guard \tGenerate stack protection code using canary at guard.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMstackProtectorGuardOffset({"-mstack-protector-guard-offset"}, - " -mstack-protector-guard-offset \tWith the latter choice the options -mstack-protector-guard-reg=reg and " - "-mstack-protector-guard-offset=offset furthermore specify which register to use as base register for reading " - "the canary, and from what offset from that base register. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMstackProtectorGuardReg({"-mstack-protector-guard-reg"}, - " -mstack-protector-guard-reg \tWith the latter choice the options -mstack-protector-guard-reg=reg and " - "-mstack-protector-guard-offset=offset furthermore specify which register to use as base register for reading " - "the canary, and from what offset from that base register. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMstackSize({"-mstack-size"}, - " -mstack-size \tThe S/390 back end emits additional instructions in the function prologue that" - " trigger a trap if the stack size is stack-guard bytes above the stack-size (remember that the stack on S/390 " - "grows downward). \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMstackrealign({"-mstackrealign"}, - " -mstackrealign \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMstdStructReturn({"-mstd-struct-return"}, - " -mstd-struct-return \tWith -mstd-struct-return, the compiler generates checking code in functions " - "returning structures or unions to detect size mismatches between the two sides of function calls, as per the " - "32-bit ABI.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-std-struct-return"), maplecl::kHide); - -maplecl::Option oMstdmain({"-mstdmain"}, - " -mstdmain \tWith -mstdmain, Maple links your program against startup code that assumes a " - "C99-style interface to main, including a local copy of argv strings.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMstrictAlign({"-mstrict-align"}, - " -mstrict-align \tDon't assume that unaligned accesses are handled by the system.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-strict-align"), maplecl::kHide); - -maplecl::Option oMstrictX({"-mstrict-X"}, - " -mstrict-X \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMstring({"-mstring"}, - " -mstring \t\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-string"), maplecl::kHide); - -maplecl::Option oMstringopStrategyAlg({"-mstringop-strategy=alg"}, - " -mstringop-strategy=alg \tOverride the internal decision heuristic for the particular algorithm to use " - "for inlining string operations. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMstructureSizeBoundary({"-mstructure-size-boundary"}, - " -mstructure-size-boundary \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMsubxc({"-msubxc"}, - " -msubxc \tWith -msubxc, Maple generates code that takes advantage of the UltraSPARC " - "Subtract-Extended-with-Carry instruction. \n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-subxc"), maplecl::kHide); - -maplecl::Option oMsvMode({"-msv-mode"}, - " -msv-mode \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMsvr4StructReturn({"-msvr4-struct-return"}, - " -msvr4-struct-return \tReturn structures smaller than 8 bytes in registers (as specified by the " - "SVR4 ABI).\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMswap({"-mswap"}, - " -mswap \tGenerate swap instructions.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMswape({"-mswape"}, - " -mswape \tPassed down to the assembler to enable the swap byte ordering extension " - "instruction.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMsym32({"-msym32"}, - " -msym32 \tAssume that all symbols have 32-bit values, regardless of the selected ABI. \n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-sym32"), maplecl::kHide); - -maplecl::Option oMsynci({"-msynci"}, - " -msynci \tEnable (disable) generation of synci instructions on architectures that " - "support it.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-synci"), maplecl::kHide); - -maplecl::Option oMsysCrt0({"-msys-crt0"}, - " -msys-crt0 \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMsysLib({"-msys-lib"}, - " -msys-lib \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMtargetAlign({"-mtarget-align"}, - " -mtarget-align \t\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-target-align"), maplecl::kHide); - -maplecl::Option oMtas({"-mtas"}, - " -mtas \tGenerate the tas.b opcode for __atomic_test_and_set.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMtbm({"-mtbm"}, - " -mtbm \tThese switches enable the use of instructions in the mtbm.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMtda({"-mtda"}, - " -mtda \tPut static or global variables whose size is n bytes or less into the tiny " - "data area that register ep points to.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMtelephony({"-mtelephony"}, - " -mtelephony \tPassed down to the assembler to enable dual- and single-operand instructions " - "for telephony. \n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMtextSectionLiterals({"-mtext-section-literals"}, - " -mtext-section-literals \t\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-text-section-literals"), maplecl::kHide); - -maplecl::Option oMtf({"-mtf"}, - " -mtf \tCauses all functions to default to the .far section.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMthread({"-mthread"}, - " -mthread \tThis option is available for MinGW targets.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMthreads({"-mthreads"}, - " -mthreads \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMthumb({"-mthumb"}, - " -mthumb \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMthumbInterwork({"-mthumb-interwork"}, - " -mthumb-interwork \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMtinyStack({"-mtiny-stack"}, - " -mtiny-stack \t\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oMtiny({"-mtiny"}, - " -mtiny \tVariables that are n bytes or smaller are allocated to the .tiny section.\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -/* ##################### BOOL Options ############################################################### */ - -maplecl::Option wUnusedMacro({"-Wunused-macros"}, - " -Wunused-macros \twarning: macro is not used\n", - {driverCategory, clangCategory}); - -maplecl::Option wBadFunctionCast({"-Wbad-function-cast"}, - " -Wbad-function-cast \twarning: cast from function call of type A to non-matching type B\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-bad-function-cast")); - -maplecl::Option wStrictPrototypes({"-Wstrict-prototypes"}, - " -Wstrict-prototypes \twarning: Warn if a function is declared or defined without specifying the " - "argument types\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-strict-prototypes")); - -maplecl::Option wUndef({"-Wundef"}, - " -Wundef \twarning: Warn if an undefined identifier is evaluated in an #if directive. " - "Such identifiers are replaced with zero\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-undef")); - -maplecl::Option wCastQual({"-Wcast-qual"}, - " -Wcast-qual \twarning: Warn whenever a pointer is cast so as to remove a type qualifier " - "from the target type. For example, warn if a const char * is cast to an ordinary char *\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-cast-qual")); - -maplecl::Option wMissingFieldInitializers({"-Wmissing-field-initializers"}, - " -Wmissing-field-initializers\twarning: Warn if a structure's initializer has some fields missing\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-missing-field-initializers")); - -maplecl::Option wUnusedParameter({"-Wunused-parameter"}, - " -Wunused-parameter \twarning: Warn whenever a function parameter is unused aside from its " - "declaration\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-unused-parameter")); - -maplecl::Option wAll({"-Wall"}, - " -Wall \tThis enables all the warnings about constructions that some users consider " - "questionable\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-all")); - -maplecl::Option wExtra({"-Wextra"}, - " -Wextra \tEnable some extra warning flags that are not enabled by -Wall\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-extra")); - -maplecl::Option wWriteStrings({"-Wwrite-strings"}, - " -Wwrite-strings \tWhen compiling C, give string constants the type const char[length] so that " - "copying the address of one into a non-const char * pointer produces a warning\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-write-strings")); - -maplecl::Option wVla({"-Wvla"}, - " -Wvla \tWarn if a variable-length array is used in the code\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-vla")); - -maplecl::Option wFormatSecurity({"-Wformat-security"}, - " -Wformat-security \tWwarn about uses of format functions that represent possible security problems.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-format-security")); - -maplecl::Option wShadow({"-Wshadow"}, - " -Wshadow \tWarn whenever a local variable or type declaration shadows another variable.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-shadow")); - -maplecl::Option wTypeLimits({"-Wtype-limits"}, - " -Wtype-limits \tWarn if a comparison is always true or always false due to the limited range " - "of the data type.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-type-limits")); - -maplecl::Option wSignCompare({"-Wsign-compare"}, - " -Wsign-compare \tWarn when a comparison between signed and unsigned values could produce an " - "incorrect result when the signed value is converted to unsigned.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-sign-compare")); - -maplecl::Option wShiftNegativeValue({"-Wshift-negative-value"}, - " -Wshift-negative-value \tWarn if left shifting a negative value.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-shift-negative-value")); - -maplecl::Option wPointerArith({"-Wpointer-arith"}, - " -Wpointer-arith \tWarn about anything that depends on the “size of” a function type or of void.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-pointer-arith")); - -maplecl::Option wIgnoredQualifiers({"-Wignored-qualifiers"}, - " -Wignored-qualifiers \tWarn if the return type of a function has a type qualifier such as const.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-ignored-qualifiers")); - -maplecl::Option wFormat({"-Wformat"}, - " -Wformat \tCheck calls to printf and scanf, etc., to make sure that the arguments " - "supplied have types appropriate to the format string specified.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-format")); - -maplecl::Option wFloatEqual({"-Wfloat-equal"}, - " -Wfloat-equal \tWarn if floating-point values are used in equality comparisons.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-float-equal")); - -maplecl::Option wDateTime({"-Wdate-time"}, - " -Wdate-time \tWarn when macros __TIME__, __DATE__ or __TIMESTAMP__ are encountered as " - "they might prevent bit-wise-identical reproducible compilations\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-date-time")); - -maplecl::Option wImplicitFallthrough({"-Wimplicit-fallthrough"}, - " -Wimplicit-fallthrough \tWarn when a switch case falls through\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-implicit-fallthrough")); - -maplecl::Option wShiftOverflow({"-Wshift-overflow"}, - " -Wshift-overflow \tWarn about left shift overflows\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-shift-overflow")); - -maplecl::Option oWnounusedcommandlineargument({"-Wno-unused-command-line-argument"}, - " -Wno-unused-command-line-argument\n" - " \tno unused command line argument\n", - {driverCategory, clangCategory}); - -maplecl::Option oWnoconstantconversion({"-Wno-constant-conversion"}, - " -Wno-constant-conversion \tno constant conversion\n", - {driverCategory, clangCategory}); - -maplecl::Option oWnounknownwarningoption({"-Wno-unknown-warning-option"}, - " -Wno-unknown-warning-option \tno unknown warning option\n", - {driverCategory, clangCategory}); - -maplecl::Option oW({"-W"}, - " -W \tThis switch is deprecated; use -Wextra instead.\n", - {driverCategory, clangCategory}); - -maplecl::Option oWabi({"-Wabi"}, - " -Wabi \tWarn about things that will change when compiling with an ABI-compliant " - "compiler.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-abi")); - -maplecl::Option oWabiTag({"-Wabi-tag"}, - " -Wabi-tag \tWarn if a subobject has an abi_tag attribute that the complete object type " - "does not have.\n", - {driverCategory, clangCategory}); - -maplecl::Option oWaddrSpaceConvert({"-Waddr-space-convert"}, - " -Waddr-space-convert \tWarn about conversions between address spaces in the case where the resulting " - "address space is not contained in the incoming address space.\n", - {driverCategory, clangCategory}); - -maplecl::Option oWaddress({"-Waddress"}, - " -Waddress \tWarn about suspicious uses of memory addresses.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-address")); - -maplecl::Option oWaggregateReturn({"-Waggregate-return"}, - " -Waggregate-return \tWarn about returning structures\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-aggregate-return")); - -maplecl::Option oWaggressiveLoopOptimizations({"-Waggressive-loop-optimizations"}, - " -Waggressive-loop-optimizations\n" - " \tWarn if a loop with constant number of iterations triggers undefined " - "behavior.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-aggressive-loop-optimizations")); - -maplecl::Option oWalignedNew({"-Waligned-new"}, - " -Waligned-new \tWarn about 'new' of type with extended alignment without -faligned-new.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-aligned-new")); - -maplecl::Option oWallocZero({"-Walloc-zero"}, - " -Walloc-zero \t-Walloc-zero Warn for calls to allocation functions that specify zero bytes.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-alloc-zero")); - -maplecl::Option oWalloca({"-Walloca"}, - " -Walloca \tWarn on any use of alloca.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-alloca")); - -maplecl::Option oWarrayBounds({"-Warray-bounds"}, - " -Warray-bounds \tWarn if an array is accessed out of bounds.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-array-bounds")); - -maplecl::Option oWassignIntercept({"-Wassign-intercept"}, - " -Wassign-intercept \tWarn whenever an Objective-C assignment is being intercepted by the garbage " - "collector.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-assign-intercept")); - -maplecl::Option oWattributes({"-Wattributes"}, - " -Wattributes \tWarn about inappropriate attribute usage.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-attributes")); - -maplecl::Option oWboolCompare({"-Wbool-compare"}, - " -Wbool-compare \tWarn about boolean expression compared with an integer value different from " - "true/false.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-bool-compare")); - -maplecl::Option oWboolOperation({"-Wbool-operation"}, - " -Wbool-operation \tWarn about certain operations on boolean expressions.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-bool-operation")); - -maplecl::Option oWbuiltinDeclarationMismatch({"-Wbuiltin-declaration-mismatch"}, - " -Wbuiltin-declaration-mismatch\n" - " \tWarn when a built-in function is declared with the wrong signature.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-builtin-declaration-mismatch")); - -maplecl::Option oWbuiltinMacroRedefined({"-Wbuiltin-macro-redefined"}, - " -Wbuiltin-macro-redefined \tWarn when a built-in preprocessor macro is undefined or redefined.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-builtin-macro-redefined")); - -maplecl::Option oW11Compat({"-Wc++11-compat"}, - " -Wc++11-compat \tWarn about C++ constructs whose meaning differs between ISO C++ 1998 and " - "ISO C++ 2011.\n", - {driverCategory, clangCategory}); - -maplecl::Option oW14Compat({"-Wc++14-compat"}, - " -Wc++14-compat \tWarn about C++ constructs whose meaning differs between ISO C++ 2011 and ISO " - "C++ 2014.\n", - {driverCategory, clangCategory}); - -maplecl::Option oW1zCompat({"-Wc++1z-compat"}, - " -Wc++1z-compat \tWarn about C++ constructs whose meaning differs between ISO C++ 2014 and " - "(forthcoming) ISO C++ 201z(7?).\n", - {driverCategory, clangCategory}); - -maplecl::Option oWc90C99Compat({"-Wc90-c99-compat"}, - " -Wc90-c99-compat \tWarn about features not present in ISO C90\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-c90-c99-compat")); - -maplecl::Option oWc99C11Compat({"-Wc99-c11-compat"}, - " -Wc99-c11-compat \tWarn about features not present in ISO C99\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-c99-c11-compat")); - -maplecl::Option oWcastAlign({"-Wcast-align"}, - " -Wcast-align \tWarn about pointer casts which increase alignment.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-cast-align")); - -maplecl::Option oWcharSubscripts({"-Wchar-subscripts"}, - " -Wchar-subscripts \tWarn about subscripts whose type is \"char\".\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-char-subscripts")); - -maplecl::Option oWchkp({"-Wchkp"}, - " -Wchkp \tWarn about memory access errors found by Pointer Bounds Checker.\n", - {driverCategory, clangCategory}); - -maplecl::Option oWclobbered({"-Wclobbered"}, - " -Wclobbered \tWarn about variables that might be changed by \"longjmp\" or \"vfork\".\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-clobbered")); - -maplecl::Option oWcomment({"-Wcomment"}, - " -Wcomment \tWarn about possibly nested block comments\n", - {driverCategory, clangCategory}); - -maplecl::Option oWcomments({"-Wcomments"}, - " -Wcomments \tSynonym for -Wcomment.\n", - {driverCategory, clangCategory}); - -maplecl::Option oWconditionallySupported({"-Wconditionally-supported"}, - " -Wconditionally-supported \tWarn for conditionally-supported constructs.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-conditionally-supported")); - -maplecl::Option oWconversion({"-Wconversion"}, - " -Wconversion \tWarn for implicit type conversions that may change a value.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-conversion")); - -maplecl::Option oWconversionNull({"-Wconversion-null"}, - " -Wconversion-null \tWarn for converting NULL from/to a non-pointer type.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-conversion-null")); - -maplecl::Option oWctorDtorPrivacy({"-Wctor-dtor-privacy"}, - " -Wctor-dtor-privacy \tWarn when all constructors and destructors are private.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-ctor-dtor-privacy")); - -maplecl::Option oWdanglingElse({"-Wdangling-else"}, - " -Wdangling-else \tWarn about dangling else.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-dangling-else")); - -maplecl::Option oWdeclarationAfterStatement({"-Wdeclaration-after-statement"}, - " -Wdeclaration-after-statement\n" - " \tWarn when a declaration is found after a statement.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-declaration-after-statement")); - -maplecl::Option oWdeleteIncomplete({"-Wdelete-incomplete"}, - " -Wdelete-incomplete \tWarn when deleting a pointer to incomplete type.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-delete-incomplete")); - -maplecl::Option oWdeleteNonVirtualDtor({"-Wdelete-non-virtual-dtor"}, - " -Wdelete-non-virtual-dtor \tWarn about deleting polymorphic objects with non-virtual destructors.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-delete-non-virtual-dtor")); - -maplecl::Option oWdeprecated({"-Wdeprecated"}, - " -Wdeprecated \tWarn if a deprecated compiler feature\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-deprecated")); - -maplecl::Option oWdeprecatedDeclarations({"-Wdeprecated-declarations"}, - " -Wdeprecated-declarations \tWarn about uses of __attribute__((deprecated)) declarations.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-deprecated-declarations")); - -maplecl::Option oWdisabledOptimization({"-Wdisabled-optimization"}, - " -Wdisabled-optimization \tWarn when an optimization pass is disabled.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-disabled-optimization")); - -maplecl::Option oWdiscardedArrayQualifiers({"-Wdiscarded-array-qualifiers"}, - " -Wdiscarded-array-qualifiers\tWarn if qualifiers on arrays which are pointer targets are discarded.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-discarded-array-qualifiers")); - -maplecl::Option oWdiscardedQualifiers({"-Wdiscarded-qualifiers"}, - " -Wdiscarded-qualifiers \tWarn if type qualifiers on pointers are discarded.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-discarded-qualifiers")); - -maplecl::Option oWdivByZero({"-Wdiv-by-zero"}, - " -Wdiv-by-zero \tWarn about compile-time integer division by zero.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-div-by-zero")); - -maplecl::Option oWdoublePromotion({"-Wdouble-promotion"}, - " -Wdouble-promotion \tWarn about implicit conversions from \"float\" to \"double\".\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-double-promotion")); - -maplecl::Option oWduplicateDeclSpecifier({"-Wduplicate-decl-specifier"}, - " -Wduplicate-decl-specifier \tWarn when a declaration has duplicate const\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-duplicate-decl-specifier")); - -maplecl::Option oWduplicatedBranches({"-Wduplicated-branches"}, - " -Wduplicated-branches \tWarn about duplicated branches in if-else statements.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-duplicated-branches")); - -maplecl::Option oWduplicatedCond({"-Wduplicated-cond"}, - " -Wduplicated-cond \tWarn about duplicated conditions in an if-else-if chain.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-duplicated-cond")); - -maplecl::Option oWeffc({"-Weffc++"}, - " -Weffc++ \tWarn about violations of Effective C++ style rules.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-effc++")); - -maplecl::Option oWemptyBody({"-Wempty-body"}, - " -Wempty-body \tWarn about an empty body in an if or else statement.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-empty-body")); - -maplecl::Option oWendifLabels({"-Wendif-labels"}, - " -Wendif-labels \tWarn about stray tokens after #else and #endif.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-endif-labels")); - -maplecl::Option oWenumCompare({"-Wenum-compare"}, - " -Wenum-compare \tWarn about comparison of different enum types.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-enum-compare")); - -maplecl::Option oWerror({"-Werror"}, - " -Werror \tTreat all warnings as errors.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-error")); - -maplecl::Option oWexpansionToDefined({"-Wexpansion-to-defined"}, - " -Wexpansion-to-defined \tWarn if 'defined' is used outside #if.\n", - {driverCategory, clangCategory}); - -maplecl::Option oWfatalErrors({"-Wfatal-errors"}, - " -Wfatal-errors \tExit on the first error occurred.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-fatal-errors")); - -maplecl::Option oWfloatConversion({"-Wfloat-conversion"}, - " -Wfloat-conversion \tWarn for implicit type conversions that cause loss of floating point precision.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-float-conversion")); - -maplecl::Option oWformatContainsNul({"-Wformat-contains-nul"}, - " -Wformat-contains-nul \tWarn about format strings that contain NUL bytes.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-format-contains-nul")); - -maplecl::Option oWformatExtraArgs({"-Wformat-extra-args"}, - " -Wformat-extra-args \tWarn if passing too many arguments to a function for its format string.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-format-extra-args")); - -maplecl::Option oWformatNonliteral({"-Wformat-nonliteral"}, - " -Wformat-nonliteral \tWarn about format strings that are not literals.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-format-nonliteral")); - -maplecl::Option oWformatOverflow({"-Wformat-overflow"}, - " -Wformat-overflow \tWarn about function calls with format strings that write past the end of the " - "destination region. Same as -Wformat-overflow=1.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-format-overflow")); - -maplecl::Option oWformatSignedness({"-Wformat-signedness"}, - " -Wformat-signedness \tWarn about sign differences with format functions.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-format-signedness")); - -maplecl::Option oWformatTruncation({"-Wformat-truncation"}, - " -Wformat-truncation \tWarn about calls to snprintf and similar functions that truncate output. " - "Same as -Wformat-truncation=1.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-format-truncation")); - -maplecl::Option oWformatY2k({"-Wformat-y2k"}, - " -Wformat-y2k \tWarn about strftime formats yielding 2-digit years.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-format-y2k")); - -maplecl::Option oWformatZeroLength({"-Wformat-zero-length"}, - " -Wformat-zero-length \tWarn about zero-length formats.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-format-zero-length")); - -maplecl::Option oWframeAddress({"-Wframe-address"}, - " -Wframe-address \tWarn when __builtin_frame_address or __builtin_return_address is used unsafely.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-frame-address")); - -maplecl::Option oWframeLargerThan({"-Wframe-larger-than="}, - " -Wframe-larger-than= \tWarn if a function's stack frame requires in excess of .\n", - {driverCategory, clangCategory}); - -maplecl::Option oWfreeNonheapObject({"-Wfree-nonheap-object"}, - " -Wfree-nonheap-object \tWarn when attempting to free a non-heap object.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-free-nonheap-object")); - -maplecl::Option oWignoredAttributes({"-Wignored-attributes"}, - " -Wignored-attributes \tWarn whenever attributes are ignored.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-ignored-attributes")); - -maplecl::Option oWimplicit({"-Wimplicit"}, - " -Wimplicit \tWarn about implicit declarations.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-implicit")); - -maplecl::Option oWimplicitFunctionDeclaration({"-Wimplicit-function-declaration"}, - " -Wimplicit-function-declaration\n" - " \tWarn about implicit function declarations.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-implicit-function-declaration")); - -maplecl::Option oWimplicitInt({"-Wimplicit-int"}, - " -Wimplicit-int \tWarn when a declaration does not specify a type.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-implicit-int")); - -maplecl::Option oWincompatiblePointerTypes({"-Wincompatible-pointer-types"}, - " -Wincompatible-pointer-types\tWarn when there is a conversion between pointers that have incompatible types.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-incompatible-pointer-types")); - -maplecl::Option oWinheritedVariadicCtor({"-Winherited-variadic-ctor"}, - " -Winherited-variadic-ctor \tWarn about C++11 inheriting constructors when the base has a variadic " - "constructor.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-inherited-variadic-ctor")); - -maplecl::Option oWinitSelf({"-Winit-self"}, - " -Winit-self \tWarn about variables which are initialized to themselves.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-init-self")); - -maplecl::Option oWinline({"-Winline"}, - " -Winline \tWarn when an inlined function cannot be inlined.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-inline")); - -maplecl::Option oWintConversion({"-Wint-conversion"}, - " -Wint-conversion \tWarn about incompatible integer to pointer and pointer to integer conversions.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-int-conversion")); - -maplecl::Option oWintInBoolContext({"-Wint-in-bool-context"}, - " -Wint-in-bool-context \tWarn for suspicious integer expressions in boolean context.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-int-in-bool-context")); - -maplecl::Option oWintToPointerCast({"-Wint-to-pointer-cast"}, - " -Wint-to-pointer-cast \tWarn when there is a cast to a pointer from an integer of a different size.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-int-to-pointer-cast")); - -maplecl::Option oWinvalidMemoryModel({"-Winvalid-memory-model"}, - " -Winvalid-memory-model \tWarn when an atomic memory model parameter is known to be outside the valid " - "range.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-invalid-memory-model")); - -maplecl::Option oWinvalidOffsetof({"-Winvalid-offsetof"}, - " -Winvalid-offsetof \tWarn about invalid uses of the \"offsetof\" macro.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-invalid-offsetof")); - -maplecl::Option oWLiteralSuffix({"-Wliteral-suffix"}, - " -Wliteral-suffix \tWarn when a string or character literal is followed by a ud-suffix which does " - "not begin with an underscore.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-literal-suffix")); - -maplecl::Option oWLogicalNotParentheses({"-Wlogical-not-parentheses"}, - " -Wlogical-not-parentheses \tWarn about logical not used on the left hand side operand of a comparison.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-logical-not-parentheses")); - -maplecl::Option oWinvalidPch({"-Winvalid-pch"}, - " -Winvalid-pch \tWarn about PCH files that are found but not used.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-invalid-pch")); - -maplecl::Option oWjumpMissesInit({"-Wjump-misses-init"}, - " -Wjump-misses-init \tWarn when a jump misses a variable initialization.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-jump-misses-init")); - -maplecl::Option oWLogicalOp({"-Wlogical-op"}, - " -Wlogical-op \tWarn about suspicious uses of logical operators in expressions. \n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-logical-op")); - -maplecl::Option oWLongLong({"-Wlong-long"}, - " -Wlong-long \tWarn if long long type is used.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-long-long")); - -maplecl::Option oWmain({"-Wmain"}, - " -Wmain \tWarn about suspicious declarations of \"main\".\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-main")); - -maplecl::Option oWmaybeUninitialized({"-Wmaybe-uninitialized"}, - " -Wmaybe-uninitialized \tWarn about maybe uninitialized automatic variables.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-maybe-uninitialized")); - -maplecl::Option oWmemsetEltSize({"-Wmemset-elt-size"}, - " -Wmemset-elt-size \tWarn about suspicious calls to memset where the third argument contains the " - "number of elements not multiplied by the element size.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-memset-elt-size")); - -maplecl::Option oWmemsetTransposedArgs({"-Wmemset-transposed-args"}, - " -Wmemset-transposed-args \tWarn about suspicious calls to memset where the third argument is constant " - "literal zero and the second is not.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-memset-transposed-args")); - -maplecl::Option oWmisleadingIndentation({"-Wmisleading-indentation"}, - " -Wmisleading-indentation \tWarn when the indentation of the code does not reflect the block structure.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-misleading-indentatio")); - -maplecl::Option oWmissingBraces({"-Wmissing-braces"}, - " -Wmissing-braces \tWarn about possibly missing braces around initializers.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-missing-bracesh")); - -maplecl::Option oWmissingDeclarations({"-Wmissing-declarations"}, - " -Wmissing-declarations \tWarn about global functions without previous declarations.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-missing-declarations")); - -maplecl::Option oWmissingFormatAttribute({"-Wmissing-format-attribute"}, - " -Wmissing-format-attribute \t\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-missing-format-attribute")); - -maplecl::Option oWmissingIncludeDirs({"-Wmissing-include-dirs"}, - " -Wmissing-include-dirs \tWarn about user-specified include directories that do not exist.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-missing-include-dirs")); - -maplecl::Option oWmissingParameterType({"-Wmissing-parameter-type"}, - " -Wmissing-parameter-type \tWarn about function parameters declared without a type specifier in K&R-style " - "functions.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-missing-parameter-type")); - -maplecl::Option oWmissingPrototypes({"-Wmissing-prototypes"}, - " -Wmissing-prototypes \tWarn about global functions without prototypes.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-missing-prototypes")); - -maplecl::Option oWmultichar({"-Wmultichar"}, - " -Wmultichar \tWarn about use of multi-character character constants.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-multichar")); - -maplecl::Option oWmultipleInheritance({"-Wmultiple-inheritance"}, - " -Wmultiple-inheritance \tWarn on direct multiple inheritance.\n", - {driverCategory, clangCategory}); - -maplecl::Option oWnamespaces({"-Wnamespaces"}, - " -Wnamespaces \tWarn on namespace definition.\n", - {driverCategory, clangCategory}); - -maplecl::Option oWnarrowing({"-Wnarrowing"}, - " -Wnarrowing \tWarn about narrowing conversions within { } that are ill-formed in C++11.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-narrowing")); - -maplecl::Option oWnestedExterns({"-Wnested-externs"}, - " -Wnested-externs \tWarn about \"extern\" declarations not at file scope.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-nested-externs")); - -maplecl::Option oWnoexcept({"-Wnoexcept"}, - " -Wnoexcept \tWarn when a noexcept expression evaluates to false even though the expression " - "can't actually throw.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-noexcept")); - -maplecl::Option oWnoexceptType({"-Wnoexcept-type"}, - " -Wnoexcept-type \tWarn if C++1z noexcept function type will change the mangled name of a symbol.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-noexcept-type")); - -maplecl::Option oWnonTemplateFriend({"-Wnon-template-friend"}, - " -Wnon-template-friend \tWarn when non-templatized friend functions are declared within a template.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-non-template-friend")); - -maplecl::Option oWnonVirtualDtor({"-Wnon-virtual-dtor"}, - " -Wnon-virtual-dtor \tWarn about non-virtual destructors.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-non-virtual-dtor")); - -maplecl::Option oWnonnull({"-Wnonnull"}, - " -Wnonnull \tWarn about NULL being passed to argument slots marked as requiring non-NULL.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-nonnull")); - -maplecl::Option oWnonnullCompare({"-Wnonnull-compare"}, - " -Wnonnull-compare \tWarn if comparing pointer parameter with nonnull attribute with NULL.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-nonnull-compare")); - -maplecl::Option oWnormalized({"-Wnormalized"}, - " -Wnormalized \tWarn about non-normalized Unicode strings.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-normalized")); - -maplecl::Option oWnullDereference({"-Wnull-dereference"}, - " -Wnull-dereference \tWarn if dereferencing a NULL pointer may lead to erroneous or undefined " - "behavior.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-null-dereference")); - -maplecl::Option oWodr({"-Wodr"}, - " -Wodr \tWarn about some C++ One Definition Rule violations during link time " - "optimization.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-odr")); - -maplecl::Option oWoldStyleCast({"-Wold-style-cast"}, - " -Wold-style-cast \tWarn if a C-style cast is used in a program.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-old-style-cast")); - -maplecl::Option oWoldStyleDeclaration({"-Wold-style-declaration"}, - " -Wold-style-declaration \tWarn for obsolescent usage in a declaration.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-old-style-declaration")); - -maplecl::Option oWoldStyleDefinition({"-Wold-style-definition"}, - " -Wold-style-definition \tWarn if an old-style parameter definition is used.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-old-style-definition")); - -maplecl::Option oWopenmSimd({"-Wopenm-simd"}, - " -Wopenm-simd \tWarn if the vectorizer cost model overrides the OpenMP or the Cilk Plus " - "simd directive set by user. \n", - {driverCategory, clangCategory}); - -maplecl::Option oWoverflow({"-Woverflow"}, - " -Woverflow \tWarn about overflow in arithmetic expressions.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-overflow")); - -maplecl::Option oWoverlengthStrings({"-Woverlength-strings"}, - " -Woverlength-strings \tWarn if a string is longer than the maximum portable length specified by " - "the standard.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-overlength-strings")); - -maplecl::Option oWoverloadedVirtual({"-Woverloaded-virtual"}, - " -Woverloaded-virtual \tWarn about overloaded virtual function names.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-overloaded-virtual")); - -maplecl::Option oWoverrideInit({"-Woverride-init"}, - " -Woverride-init \tWarn about overriding initializers without side effects.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-override-init")); - -maplecl::Option oWoverrideInitSideEffects({"-Woverride-init-side-effects"}, - " -Woverride-init-side-effects\tWarn about overriding initializers with side effects.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-override-init-side-effects")); - -maplecl::Option oWpacked({"-Wpacked"}, - " -Wpacked \tWarn when the packed attribute has no effect on struct layout.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-packed")); - -maplecl::Option oWpackedBitfieldCompat({"-Wpacked-bitfield-compat"}, - " -Wpacked-bitfield-compat \tWarn about packed bit-fields whose offset changed in GCC 4.4.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-packed-bitfield-compat")); - -maplecl::Option oWpadded({"-Wpadded"}, - " -Wpadded \tWarn when padding is required to align structure members.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-padded")); - -maplecl::Option oWparentheses({"-Wparentheses"}, - " -Wparentheses \tWarn about possibly missing parentheses.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-parentheses")); - -maplecl::Option oWpedantic({"-Wpedantic"}, - " -Wpedantic \tIssue warnings needed for strict compliance to the standard.\n", - {driverCategory, clangCategory}); - -maplecl::Option oWpedanticMsFormat({"-Wpedantic-ms-format"}, - " -Wpedantic-ms-format \t\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-pedantic-ms-format")); - -maplecl::Option oWplacementNew({"-Wplacement-new"}, - " -Wplacement-new \tWarn for placement new expressions with undefined behavior.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-placement-new")); - -maplecl::Option oWpmfConversions({"-Wpmf-conversions"}, - " -Wpmf-conversions \tWarn when converting the type of pointers to member functions.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-pmf-conversions")); - -maplecl::Option oWpointerCompare({"-Wpointer-compare"}, - " -Wpointer-compare \tWarn when a pointer is compared with a zero character constant.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-pointer-compare")); - -maplecl::Option oWpointerSign({"-Wpointer-sign"}, - " -Wpointer-sign \tWarn when a pointer differs in signedness in an assignment.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-pointer-sign")); - -maplecl::Option oWpointerToIntCast({"-Wpointer-to-int-cast"}, - " -Wpointer-to-int-cast \tWarn when a pointer is cast to an integer of a different size.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-pointer-to-int-cast")); - -maplecl::Option oWpragmas({"-Wpragmas"}, - " -Wpragmas \tWarn about misuses of pragmas.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-pragmas")); - -maplecl::Option oWprotocol({"-Wprotocol"}, - " -Wprotocol \tWarn if inherited methods are unimplemented.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-protocol")); - -maplecl::Option oWredundantDecls({"-Wredundant-decls"}, - " -Wredundant-decls \tWarn about multiple declarations of the same object.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-redundant-decls")); - -maplecl::Option oWregister({"-Wregister"}, - " -Wregister \tWarn about uses of register storage specifier.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-register")); - -maplecl::Option oWreorder({"-Wreorder"}, - " -Wreorder \tWarn when the compiler reorders code.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-reorder")); - -maplecl::Option oWrestrict({"-Wrestrict"}, - " -Wrestrict \tWarn when an argument passed to a restrict-qualified parameter aliases with " - "another argument.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-restrict")); - -maplecl::Option oWreturnLocalAddr({"-Wreturn-local-addr"}, - " -Wreturn-local-addr \tWarn about returning a pointer/reference to a local or temporary variable.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-return-local-addr")); - -maplecl::Option oWreturnType({"-Wreturn-type"}, - " -Wreturn-type \tWarn whenever a function's return type defaults to \"int\" (C)\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-return-type")); - -maplecl::Option oWselector({"-Wselector"}, - " -Wselector \tWarn if a selector has multiple methods.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-selector")); - -maplecl::Option oWsequencePoint({"-Wsequence-point"}, - " -Wsequence-point \tWarn about possible violations of sequence point rules.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-sequence-point")); - -maplecl::Option oWshadowIvar({"-Wshadow-ivar"}, - " -Wshadow-ivar \tWarn if a local declaration hides an instance variable.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-shadow-ivar")); - -maplecl::Option oWshiftCountNegative({"-Wshift-count-negative"}, - " -Wshift-count-negative \tWarn if shift count is negative.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-shift-count-negative")); - -maplecl::Option oWshiftCountOverflow({"-Wshift-count-overflow"}, - " -Wshift-count-overflow \tWarn if shift count >= width of type.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-shift-count-overflow")); - -maplecl::Option oWsignConversion({"-Wsign-conversion"}, - " -Wsign-conversion \tWarn for implicit type conversions between signed and unsigned integers.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-sign-conversion")); - -maplecl::Option oWsignPromo({"-Wsign-promo"}, - " -Wsign-promo \tWarn when overload promotes from unsigned to signed.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-sign-promo")); - -maplecl::Option oWsizedDeallocation({"-Wsized-deallocation"}, - " -Wsized-deallocation \tWarn about missing sized deallocation functions.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-sized-deallocation")); - -maplecl::Option oWsizeofArrayArgument({"-Wsizeof-array-argument"}, - " -Wsizeof-array-argument \tWarn when sizeof is applied on a parameter declared as an array.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-sizeof-array-argument")); - -maplecl::Option oWsizeofPointerMemaccess({"-Wsizeof-pointer-memaccess"}, - " -Wsizeof-pointer-memaccess \tWarn about suspicious length parameters to certain string functions if the " - "argument uses sizeof.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-sizeof-pointer-memaccess")); - -maplecl::Option oWstackProtector({"-Wstack-protector"}, - " -Wstack-protector \tWarn when not issuing stack smashing protection for some reason.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-stack-protector")); - -maplecl::Option oWstrictAliasing({"-Wstrict-aliasing"}, - " -Wstrict-aliasing \tWarn about code which might break strict aliasing rules.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-strict-aliasing")); - -maplecl::Option oWstrictNullSentinel({"-Wstrict-null-sentinel"}, - " -Wstrict-null-sentinel \tWarn about uncasted NULL used as sentinel.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-strict-null-sentinel")); - -maplecl::Option oWstrictOverflow({"-Wstrict-overflow"}, - " -Wstrict-overflow \tWarn about optimizations that assume that signed overflow is undefined.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-strict-overflow")); - -maplecl::Option oWstrictSelectorMatch({"-Wstrict-selector-match"}, - " -Wstrict-selector-match \tWarn if type signatures of candidate methods do not match exactly.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-strict-selector-match")); - -maplecl::Option oWstringopOverflow({"-Wstringop-overflow"}, - " -Wstringop-overflow \tWarn about buffer overflow in string manipulation functions like memcpy " - "and strcpy.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-stringop-overflow")); - -maplecl::Option oWsubobjectLinkage({"-Wsubobject-linkage"}, - " -Wsubobject-linkage \tWarn if a class type has a base or a field whose type uses the anonymous " - "namespace or depends on a type with no linkage.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-subobject-linkage")); - -maplecl::Option oWsuggestAttributeConst({"-Wsuggest-attribute=const"}, - " -Wsuggest-attribute=const \tWarn about functions which might be candidates for __attribute__((const)).\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-suggest-attribute=const")); - -maplecl::Option oWsuggestAttributeFormat({"-Wsuggest-attribute=format"}, - " -Wsuggest-attribute=format \tWarn about functions which might be candidates for format attributes.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-suggest-attribute=format")); - -maplecl::Option oWsuggestAttributeNoreturn({"-Wsuggest-attribute=noreturn"}, - " -Wsuggest-attribute=noreturn\tWarn about functions which might be candidates for __attribute__((noreturn)).\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-suggest-attribute=noreturn")); - -maplecl::Option oWsuggestAttributePure({"-Wsuggest-attribute=pure"}, - " -Wsuggest-attribute=pure \tWarn about functions which might be candidates for __attribute__((pure)).\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-suggest-attribute=pure")); - -maplecl::Option oWsuggestFinalMethods({"-Wsuggest-final-methods"}, - " -Wsuggest-final-methods \tWarn about C++ virtual methods where adding final keyword would improve " - "code quality.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-suggest-final-methods")); - -maplecl::Option oWsuggestFinalTypes({"-Wsuggest-final-types"}, - " -Wsuggest-final-types \tWarn about C++ polymorphic types where adding final keyword would improve " - "code quality.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-suggest-final-types")); - -maplecl::Option oWswitch({"-Wswitch"}, - " -Wswitch \tWarn about enumerated switches.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-switch")); - -maplecl::Option oWswitchBool({"-Wswitch-bool"}, - " -Wswitch-bool \tWarn about switches with boolean controlling expression.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-switch-bool")); - -maplecl::Option oWswitchDefault({"-Wswitch-default"}, - " -Wswitch-default \tWarn about enumerated switches missing a \"default:\" statement.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-switch-default")); - -maplecl::Option oWswitchEnum({"-Wswitch-enum"}, - " -Wswitch-enum \tWarn about all enumerated switches missing a specific case.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-switch-enum")); - -maplecl::Option oWswitchUnreachable({"-Wswitch-unreachable"}, - " -Wswitch-unreachable \tWarn about statements between switch's controlling expression and the " - "first case.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-switch-unreachable")); - -maplecl::Option oWsyncNand({"-Wsync-nand"}, - " -Wsync-nand \tWarn when __sync_fetch_and_nand and __sync_nand_and_fetch built-in " - "functions are used.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-sync-nand")); - -maplecl::Option oWsystemHeaders({"-Wsystem-headers"}, - " -Wsystem-headers \tDo not suppress warnings from system headers.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-system-headers")); - -maplecl::Option oWtautologicalCompare({"-Wtautological-compare"}, - " -Wtautological-compare \tWarn if a comparison always evaluates to true or false.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-tautological-compare")); - -maplecl::Option oWtemplates({"-Wtemplates"}, - " -Wtemplates \tWarn on primary template declaration.\n", - {driverCategory, clangCategory}); - -maplecl::Option oWterminate({"-Wterminate"}, - " -Wterminate \tWarn if a throw expression will always result in a call to terminate().\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-terminate")); - -maplecl::Option oWtraditional({"-Wtraditional"}, - " -Wtraditional \tWarn about features not present in traditional C. \n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-traditional")); - -maplecl::Option oWtraditionalConversion({"-Wtraditional-conversion"}, - " -Wtraditional-conversion \tWarn of prototypes causing type conversions different from what would " - "happen in the absence of prototype. \n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-traditional-conversion")); - -maplecl::Option oWtrampolines({"-Wtrampolines"}, - " -Wtrampolines \tWarn whenever a trampoline is generated. \n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-trampolines")); - -maplecl::Option oWtrigraphs({"-Wtrigraphs"}, - " -Wtrigraphs \tWarn if trigraphs are encountered that might affect the meaning of the program.\n", - {driverCategory, clangCategory}); - -maplecl::Option oWundeclaredSelector({"-Wundeclared-selector"}, - " -Wundeclared-selector \tWarn about @selector()s without previously declared methods. \n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-undeclared-selector")); - -maplecl::Option oWuninitialized({"-Wuninitialized"}, - " -Wuninitialized \tWarn about uninitialized automatic variables. \n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-uninitialized")); - -maplecl::Option oWunknownPragmas({"-Wunknown-pragmas"}, - " -Wunknown-pragmas \tWarn about unrecognized pragmas. \n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-unknown-pragmas")); - -maplecl::Option oWunsafeLoopOptimizations({"-Wunsafe-loop-optimizations"}, - " -Wunsafe-loop-optimizations \tWarn if the loop cannot be optimized due to nontrivial assumptions. \n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-unsafe-loop-optimizations")); - -maplecl::Option oWunsuffixedFloatConstants({"-Wunsuffixed-float-constants"}, - " -Wunsuffixed-float-constants\tWarn about unsuffixed float constants. \n", - {driverCategory, clangCategory}); - -maplecl::Option oWunused({"-Wunused"}, - " -Wunused \tEnable all -Wunused- warnings. \n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-unused")); - -maplecl::Option oWunusedButSetParameter({"-Wunused-but-set-parameter"}, - " -Wunused-but-set-parameter \tWarn when a function parameter is only set, otherwise unused. \n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-unused-but-set-parameter")); - -maplecl::Option oWunusedButSetVariable({"-Wunused-but-set-variable"}, - " -Wunused-but-set-variable \tWarn when a variable is only set, otherwise unused. \n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-unused-but-set-variable")); - -maplecl::Option oWunusedConstVariable({"-Wunused-const-variable"}, - " -Wunused-const-variable \tWarn when a const variable is unused. \n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-unused-const-variable")); - -maplecl::Option oWunusedFunction({"-Wunused-function"}, - " -Wunused-function \tWarn when a function is unused. \n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-unused-function")); - -maplecl::Option oWunusedLabel({"-Wunused-label"}, - " -Wunused-label \tWarn when a label is unused. \n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-unused-label")); - -maplecl::Option oWunusedLocalTypedefs({"-Wunused-local-typedefs"}, - " -Wunused-local-typedefs \tWarn when typedefs locally defined in a function are not used. \n", - {driverCategory, clangCategory}); - -maplecl::Option oWunusedResult({"-Wunused-result"}, - " -Wunused-result \tWarn if a caller of a function, marked with attribute warn_unused_result," - " does not use its return value. \n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-unused-result")); - -maplecl::Option oWunusedValue({"-Wunused-value"}, - " -Wunused-value \tWarn when an expression value is unused. \n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-unused-value")); - -maplecl::Option oWunusedVariable({"-Wunused-variable"}, - " -Wunused-variable \tWarn when a variable is unused. \n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-unused-variable")); - -maplecl::Option oWuselessCast({"-Wuseless-cast"}, - " -Wuseless-cast \tWarn about useless casts. \n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-useless-cast")); - -maplecl::Option oWvarargs({"-Wvarargs"}, - " -Wvarargs \tWarn about questionable usage of the macros used to retrieve variable " - "arguments.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-varargs")); - -maplecl::Option oWvariadicMacros({"-Wvariadic-macros"}, - " -Wvariadic-macros \tWarn about using variadic macros. \n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-variadic-macros")); - -maplecl::Option oWvectorOperationPerformance({"-Wvector-operation-performance"}, -" -Wvector-operation-performance\n" - " \tWarn when a vector operation is compiled outside the SIMD. \n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-vector-operation-performance")); - -maplecl::Option oWvirtualInheritance({"-Wvirtual-inheritance"}, - " -Wvirtual-inheritance \tWarn on direct virtual inheritance.\n", - {driverCategory, clangCategory}); - -maplecl::Option oWvirtualMoveAssign({"-Wvirtual-move-assign"}, - " -Wvirtual-move-assign \tWarn if a virtual base has a non-trivial move assignment operator. \n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-virtual-move-assign")); - -maplecl::Option oWvolatileRegisterVar({"-Wvolatile-register-var"}, - " -Wvolatile-register-var \tWarn when a register variable is declared volatile. \n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-volatile-register-var")); - -maplecl::Option oWzeroAsNullPointerConstant({"-Wzero-as-null-pointer-constant"}, - " -Wzero-as-null-pointer-constant\n" - " \tWarn when a literal '0' is used as null pointer. \n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-zero-as-null-pointer-constant")); - -maplecl::Option oWnoScalarStorageOrder({"-Wno-scalar-storage-order"}, - " -Wno-scalar-storage-order \tDo not warn on suspicious constructs involving reverse scalar storage order.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("-Wscalar-storage-order"), maplecl::kHide); - -maplecl::Option oWnoReservedIdMacro({"-Wno-reserved-id-macro"}, - " -Wno-reserved-id-macro \tDo not warn when macro name is a reserved identifier.\n", - {driverCategory, clangCategory}); - -maplecl::Option oWnoGnuZeroVariadicMacroArguments({"-Wno-gnu-zero-variadic-macro-arguments"}, - " -Wno-gnu-zero-variadic-macro-arguments\n" - " \tDo not warn when token pasting of ',' and __VA_ARGS__ is a " - "GNU extension.\n", - {driverCategory, clangCategory}); - -maplecl::Option oWnoGnuStatementExpression({"-Wno-gnu-statement-expression"}, - " -Wno-gnu-statement-expression\n" - " \tDo not warn when use of GNU statement expression extension.\n", - {driverCategory, clangCategory}); - -maplecl::Option suppressWarnings({"-w"}, - " -w \tSuppress all warnings.\n", - {driverCategory, clangCategory, asCategory, ldCategory}); - -/* ##################### String Options ############################################################### */ - -maplecl::Option oWeakReferenceMismatches({"-weak_reference_mismatches"}, - " -weak_reference_mismatches \tSpecifies what to do if a symbol import conflicts between file " - "(weak in one and not in another) the default is to treat the symbol as non-weak.\n", - {driverCategory, clangCategory}); - -maplecl::Option oWerrorE({"-Werror="}, - " -Werror= \tTreat specified warning as error.\n", - {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-error=")); - -maplecl::Option oWnormalizedE({"-Wnormalized="}, - " -Wnormalized= \t-Wnormalized=[none|id|nfc|nfkc] Warn about non-normalized Unicode strings.\n", - {driverCategory, clangCategory}); - -maplecl::Option oWplacementNewE({"-Wplacement-new="}, - " -Wplacement-new= \tWarn for placement new expressions with undefined behavior.\n", - {driverCategory, clangCategory}); - -maplecl::Option oWstackUsage({"-Wstack-usage="}, - " -Wstack-usage= \t-Wstack-usage= Warn if stack usage might exceed .\n", - {driverCategory, unSupCategory}, maplecl::kHide); - -maplecl::Option oWstrictAliasingE({"-Wstrict-aliasing="}, - " -Wstrict-aliasing= \tWarn about code which might break strict aliasing rules.\n", - {driverCategory, clangCategory}); - -/* ###################################################################################################### */ + {driverCategory, hir2mplCategory, dex2mplCategory, ipaCategory}, kOptMaple, maplecl::kHide); } diff --git a/src/mapleall/maple_driver/src/unsupport_bool.cpp b/src/mapleall/maple_driver/src/unsupport_bool.cpp new file mode 100644 index 0000000000000000000000000000000000000000..b45c1f771008930d2f6134a61952c269e37cea77 --- /dev/null +++ b/src/mapleall/maple_driver/src/unsupport_bool.cpp @@ -0,0 +1,1533 @@ +/* + * Copyright (c) [2023] Huawei Technologies Co.,Ltd.All rights reserved. + * + * OpenArkCompiler is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * + * http://license.coscl.org.cn/MulanPSL2 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ + +#include "driver_options.h" + +namespace opts { + +maplecl::Option oDumpversion({"-dumpversion"}, + " -dumpversion \tPrint the compiler version (for example, 3.0, 6.3.0 or 7) and don't do" + " anything else.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oM68030({"-m68030"}, + " -m68030 \tGenerate output for a 68030. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oM68040({"-m68040"}, + " -m68040 \tGenerate output for a 68040.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oM68060({"-m68060"}, + " -m68060 \tGenerate output for a 68060.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oM68881({"-m68881"}, + " -m68881 \tGenerate floating-point instructions. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oM8Bit({"-m8-bit"}, + " -m8-bit \tArrange for stack frame, writable data and constants to all 8-bit aligned\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oM8bitIdiv({"-m8bit-idiv"}, + " -m8bit-idiv \tThis option generates a run-time check\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oM8byteAlign({"-m8byte-align"}, + " -m8byte-align \tEnables support for double and long long types to be aligned on " + "8-byte boundaries.\n", + {driverCategory, unSupCategory}, maplecl::kHide, maplecl::DisableWith("-mno-8byte-align")); + +maplecl::Option oM96bitLongDouble({"-m96bit-long-double"}, + " -m96bit-long-double \tControl the size of long double type\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMA6({"-mA6"}, + " -mA6 \tCompile for ARC600.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMA7({"-mA7"}, + " -mA7 \tCompile for ARC700.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMabicalls({"-mabicalls"}, + " -mabicalls \tGenerate (do not generate) code that is suitable for SVR4-style dynamic " + "objects. -mabicalls is the default for SVR4-based systems.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-abicalls"), maplecl::kHide); + +maplecl::Option oMabm({"-mabm"}, + " -mabm \tThese switches enable the use of instructions in the mabm.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMabortOnNoreturn({"-mabort-on-noreturn"}, + " -mabort-on-noreturn \tGenerate a call to the function abort at the end of a noreturn function.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMabs2008({"-mabs=2008"}, + " -mabs=2008 \tThe option selects the IEEE 754-2008 treatment\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMabsLegacy({"-mabs=legacy"}, + " -mabs=legacy \tThe legacy treatment is selected\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMabsdata({"-mabsdata"}, + " -mabsdata \tAssume that all data in static storage can be accessed by LDS/STS instructions.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMabsdiff({"-mabsdiff"}, + " -mabsdiff \tEnables the abs instruction, which is the absolute difference between " + "two registers.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMabshi({"-mabshi"}, + " -mabshi \tUse abshi2 pattern. This is the default.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-abshi"), maplecl::kHide); + +maplecl::Option oMac0({"-mac0"}, + " -mac0 \tReturn floating-point results in ac0 (fr0 in Unix assembler syntax).\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-ac0"), maplecl::kHide); + +maplecl::Option oMacc4({"-macc-4"}, + " -macc-4 \tUse only the first four media accumulator registers.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMacc8({"-macc-8"}, + " -macc-8 \tUse all eight media accumulator registers.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMaccumulateArgs({"-maccumulate-args"}, + " -maccumulate-args \tAccumulate outgoing function arguments and acquire/release the needed stack " + "space for outgoing function arguments once in function prologue/epilogue.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMaccumulateOutgoingArgs({"-maccumulate-outgoing-args"}, + " -maccumulate-outgoing-args \tReserve space once for outgoing arguments in the function prologue rather " + "than around each call. Generally beneficial for performance and size\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMaddressModeLong({"-maddress-mode=long"}, + " -maddress-mode=long \tGenerate code for long address mode.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMaddressModeShort({"-maddress-mode=short"}, + " -maddress-mode=short \tGenerate code for short address mode.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMaddressSpaceConversion({"-maddress-space-conversion"}, + " -maddress-space-conversion \tAllow/disallow treating the __ea address space as superset of the generic " + "address space. \n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-address-space-conversion"), maplecl::kHide); + +maplecl::Option oMads({"-mads"}, + " -mads \tOn embedded PowerPC systems, assume that the startup module is called " + "crt0.o and the standard C libraries are libads.a and libc.a.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMaes({"-maes"}, + " -maes \tThese switches enable the use of instructions in the maes.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMaixStructReturn({"-maix-struct-return"}, + " -maix-struct-return \tReturn all structures in memory (as specified by the AIX ABI).\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMaix32({"-maix32"}, + " -maix32 \tEnable 64-bit AIX ABI and calling convention: 32-bit pointers, 32-bit long " + "type, and the infrastructure needed to support them.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMaix64({"-maix64"}, + " -maix64 \tEnable 64-bit AIX ABI and calling convention: 64-bit pointers, 64-bit " + "long type, and the infrastructure needed to support them.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMalign300({"-malign-300"}, + " -malign-300 \tOn the H8/300H and H8S, use the same alignment rules as for the H8/300\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMalignCall({"-malign-call"}, + " -malign-call \tDo alignment optimizations for call instructions.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMalignDouble({"-malign-double"}, + " -malign-double \tControl whether GCC aligns double, long double, and long long variables " + "on a two-word boundary or a one-word boundary.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-align-double"), maplecl::kHide); + +maplecl::Option oMalignInt({"-malign-int"}, + " -malign-int \tAligning variables on 32-bit boundaries produces code that runs somewhat " + "faster on processors with 32-bit busses at the expense of more memory.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-align-int"), maplecl::kHide); + +maplecl::Option oMalignLabels({"-malign-labels"}, + " -malign-labels \tTry to align labels to an 8-byte boundary by inserting NOPs into the " + "previous packet.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMalignLoops({"-malign-loops"}, + " -malign-loops \tAlign all loops to a 32-byte boundary.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-align-loops"), maplecl::kHide); + +maplecl::Option oMalignNatural({"-malign-natural"}, + " -malign-natural \tThe option -malign-natural overrides the ABI-defined alignment of larger types\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMalignPower({"-malign-power"}, + " -malign-power \tThe option -malign-power instructs Maple to follow the ABI-specified alignment " + "rules.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMallOpts({"-mall-opts"}, + " -mall-opts \tEnables all the optional instructions—average, multiply, divide, bit " + "operations, leading zero, absolute difference, min/max, clip, and saturation.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-opts"), maplecl::kHide); + +maplecl::Option oMallocCc({"-malloc-cc"}, + " -malloc-cc \tDynamically allocate condition code registers.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMallowStringInsns({"-mallow-string-insns"}, + " -mallow-string-insns \tEnables or disables the use of the string manipulation instructions SMOVF, " + "SCMPU, SMOVB, SMOVU, SUNTIL SWHILE and also the RMPA instruction.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-allow-string-insns"), maplecl::kHide); + +maplecl::Option oMallregs({"-mallregs"}, + " -mallregs \tAllow the compiler to use all of the available registers.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMaltivec({"-maltivec"}, + " -maltivec \tGenerate code that uses (does not use) AltiVec instructions, and also " + "enable the use of built-in functions that allow more direct access to the AltiVec instruction set. \n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-altivec"), maplecl::kHide); + +maplecl::Option oMaltivecBe({"-maltivec=be"}, + " -maltivec=be \tGenerate AltiVec instructions using big-endian element order, regardless " + "of whether the target is big- or little-endian. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMaltivecLe({"-maltivec=le"}, + " -maltivec=le \tGenerate AltiVec instructions using little-endian element order," + " regardless of whether the target is big- or little-endian.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMam33({"-mam33"}, + " -mam33 \tGenerate code using features specific to the AM33 processor.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-am33"), maplecl::kHide); + +maplecl::Option oMam332({"-mam33-2"}, + " -mam33-2 \tGenerate code using features specific to the AM33/2.0 processor.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMam34({"-mam34"}, + " -mam34 \tGenerate code using features specific to the AM34 processor.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMandroid({"-mandroid"}, + " -mandroid \tCompile code compatible with Android platform.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMannotateAlign({"-mannotate-align"}, + " -mannotate-align \tExplain what alignment considerations lead to the decision to make an " + "instruction short or long.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMapcs({"-mapcs"}, + " -mapcs \tThis is a synonym for -mapcs-frame and is deprecated.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMapcsFrame({"-mapcs-frame"}, + " -mapcs-frame \tGenerate a stack frame that is compliant with the ARM Procedure Call Standard " + "for all functions, even if this is not strictly necessary for correct execution of the code. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMappRegs({"-mapp-regs"}, + " -mapp-regs \tSpecify -mapp-regs to generate output using the global registers 2 through 4, " + "which the SPARC SVR4 ABI reserves for applications. \n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-app-regs"), maplecl::kHide); + +maplecl::Option oMARC600({"-mARC600"}, + " -mARC600 \tCompile for ARC600.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMARC601({"-mARC601"}, + " -mARC601 \tCompile for ARC601.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMARC700({"-mARC700"}, + " -mARC700 \tCompile for ARC700.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMarclinux({"-marclinux"}, + " -marclinux \tPassed through to the linker, to specify use of the arclinux emulation.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMarclinux_prof({"-marclinux_prof"}, + " -marclinux_prof \tPassed through to the linker, to specify use of the arclinux_prof emulation. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMargonaut({"-margonaut"}, + " -margonaut \tObsolete FPX.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMarm({"-marm"}, + " -marm \tSelect between generating code that executes in ARM and Thumb states. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMas100Syntax({"-mas100-syntax"}, + " -mas100-syntax \tWhen generating assembler output use a syntax that is compatible with " + "Renesas's AS100 assembler. \n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-as100-syntax"), maplecl::kHide); + +maplecl::Option oMasmHex({"-masm-hex"}, + " -masm-hex \tForce assembly output to always use hex constants.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMasmSyntaxUnified({"-masm-syntax-unified"}, + " -masm-syntax-unified \tAssume inline assembler is using unified asm syntax. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMasmDialect({"-masm=dialect"}, + " -masm=dialect \tOutput assembly instructions using selected dialect. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMatomic({"-matomic"}, + " -matomic \tThis enables use of the locked load/store conditional extension to implement " + "atomic memory built-in functions.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMatomicUpdates({"-matomic-updates"}, + " -matomic-updates \tThis option controls the version of libgcc that the compiler links to " + "an executable and selects whether atomic updates to the software-managed cache of PPU-side variables are used.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-atomic-updates"), maplecl::kHide); + +maplecl::Option oMautoLitpools({"-mauto-litpools"}, + " -mauto-litpools \tControl the treatment of literal pools.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-auto-litpools"), maplecl::kHide); + +maplecl::Option oMautoModifyReg({"-mauto-modify-reg"}, + " -mauto-modify-reg \tEnable the use of pre/post modify with register displacement.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMautoPic({"-mauto-pic"}, + " -mauto-pic \tGenerate code that is self-relocatable. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMaverage({"-maverage"}, + " -maverage \tEnables the ave instruction, which computes the average of two registers.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMavoidIndexedAddresses({"-mavoid-indexed-addresses"}, + " -mavoid-indexed-addresses \tGenerate code that tries to avoid (not avoid) the use of indexed load or " + "store instructions.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-avoid-indexed-addresses"), maplecl::kHide); + +maplecl::Option oMavx({"-mavx"}, + " -mavx \tMaple depresses SSEx instructions when -mavx is used. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMavx2({"-mavx2"}, + " -mavx2 \tEnable the use of instructions in the mavx2.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMavx256SplitUnalignedLoad({"-mavx256-split-unaligned-load"}, + " -mavx256-split-unaligned-load \tSplit 32-byte AVX unaligned load .\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMavx256SplitUnalignedStore({"-mavx256-split-unaligned-store"}, + " -mavx256-split-unaligned-store \tSplit 32-byte AVX unaligned store.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMavx512bw({"-mavx512bw"}, + " -mavx512bw \tEnable the use of instructions in the mavx512bw.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMavx512cd({"-mavx512cd"}, + " -mavx512cd \tEnable the use of instructions in the mavx512cd.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMavx512dq({"-mavx512dq"}, + " -mavx512dq \tEnable the use of instructions in the mavx512dq.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMavx512er({"-mavx512er"}, + " -mavx512er \tEnable the use of instructions in the mavx512er.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMavx512f({"-mavx512f"}, + " -mavx512f \tEnable the use of instructions in the mavx512f.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMavx512ifma({"-mavx512ifma"}, + " -mavx512ifma \tEnable the use of instructions in the mavx512ifma.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMavx512pf({"-mavx512pf"}, + " -mavx512pf \tEnable the use of instructions in the mavx512pf.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMavx512vbmi({"-mavx512vbmi"}, + " -mavx512vbmi \tEnable the use of instructions in the mavx512vbmi.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMavx512vl({"-mavx512vl"}, + " -mavx512vl \tEnable the use of instructions in the mavx512vl.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMb({"-mb"}, + " -mb \tCompile code for the processor in big-endian mode.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMbackchain({"-mbackchain"}, + " -mbackchain \tStore (do not store) the address of the caller's frame as backchain " + "pointer into the callee's stack frame.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-backchain"), maplecl::kHide); + +maplecl::Option oMbarrelShiftEnabled({"-mbarrel-shift-enabled"}, + " -mbarrel-shift-enabled \tEnable barrel-shift instructions.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMbarrelShifter({"-mbarrel-shifter"}, + " -mbarrel-shifter \tGenerate instructions supported by barrel shifter.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMbarrel_shifter({"-mbarrel_shifter"}, + " -mbarrel_shifter \tReplaced by -mbarrel-shifter.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMbaseAddresses({"-mbase-addresses"}, + " -mbase-addresses \tGenerate code that uses base addresses.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-base-addresses"), maplecl::kHide); + +maplecl::Option oMbbitPeephole({"-mbbit-peephole"}, + " -mbbit-peephole \tEnable bbit peephole2.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMbcopy({"-mbcopy"}, + " -mbcopy \tDo not use inline movmemhi patterns for copying memory.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMbcopyBuiltin({"-mbcopy-builtin"}, + " -mbcopy-builtin \tUse inline movmemhi patterns for copying memory.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMbig({"-mbig"}, + " -mbig \tCompile code for big-endian targets.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMbigEndianData({"-mbig-endian-data"}, + " -mbig-endian-data \tStore data (but not code) in the big-endian format.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMbigSwitch({"-mbig-switch"}, + " -mbig-switch \tGenerate code suitable for big switch tables.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMbigtable({"-mbigtable"}, + " -mbigtable \tUse 32-bit offsets in switch tables.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMbionic({"-mbionic"}, + " -mbionic \tUse Bionic C library.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMbitAlign({"-mbit-align"}, + " -mbit-align \tOn System V.4 and embedded PowerPC systems do not force structures and " + "unions that contain bit-fields to be aligned to the base type of the bit-field.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-bit-align"), maplecl::kHide); + +maplecl::Option oMbitOps({"-mbit-ops"}, + " -mbit-ops \tGenerates sbit/cbit instructions for bit manipulations.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMbitfield({"-mbitfield"}, + " -mbitfield \tDo use the bit-field instructions.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-bitfield"), maplecl::kHide); + +maplecl::Option oMbitops({"-mbitops"}, + " -mbitops \tEnables the bit operation instructions—bit test (btstm), set (bsetm), " + "clear (bclrm), invert (bnotm), and test-and-set (tas).\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMbmi({"-mbmi"}, + " -mbmi \tThese switches enable the use of instructions in the mbmi.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMbranchCheap({"-mbranch-cheap"}, + " -mbranch-cheap \tDo not pretend that branches are expensive.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMbranchExpensive({"-mbranch-expensive"}, + " -mbranch-expensive \tPretend that branches are expensive.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMbranchHints({"-mbranch-hints"}, + " -mbranch-hints \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMbranchLikely({"-mbranch-likely"}, + " -mbranch-likely \tEnable or disable use of Branch Likely instructions, regardless of " + "the default for the selected architecture.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-branch-likely"), maplecl::kHide); + +maplecl::Option oMbranchPredict({"-mbranch-predict"}, + " -mbranch-predict \tUse the probable-branch instructions, when static branch prediction indicates " + "a probable branch.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-branch-predict"), maplecl::kHide); + +maplecl::Option oMbssPlt({"-mbss-plt"}, + " -mbss-plt \tGenerate code that uses a BSS .plt section that ld.so fills in, and requires " + ".plt and .got sections that are both writable and executable.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMbuildConstants({"-mbuild-constants"}, + " -mbuild-constants \tConstruct all integer constants using code, even if it takes more " + "instructions (the maximum is six).\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMbwx({"-mbwx"}, + " -mbwx \tGenerate code to use the optional BWX instruction sets.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-bwx"), maplecl::kHide); + +maplecl::Option oMbypassCache({"-mbypass-cache"}, + " -mbypass-cache \t\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-bypass-cache"), maplecl::kHide); + +maplecl::Option oMc68000({"-mc68000"}, + " -mc68000 \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMc68020({"-mc68020"}, + " -mc68020 \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMcacheVolatile({"-mcache-volatile"}, + " -mcache-volatile \t\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-cache-volatile"), maplecl::kHide); + +maplecl::Option oMcallEabi({"-mcall-eabi"}, + " -mcall-eabi \tSpecify both -mcall-sysv and -meabi options.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMcallAixdesc({"-mcall-aixdesc"}, + " -mcall-aixdesc \tOn System V.4 and embedded PowerPC systems compile code for the AIX " + "operating system.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMcallFreebsd({"-mcall-freebsd"}, + " -mcall-freebsd \tOn System V.4 and embedded PowerPC systems compile code for the FreeBSD " + "operating system.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMcallLinux({"-mcall-linux"}, + " -mcall-linux \tOn System V.4 and embedded PowerPC systems compile code for the " + "Linux-based GNU system.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMcallOpenbsd({"-mcall-openbsd"}, + " -mcall-openbsd \tOn System V.4 and embedded PowerPC systems compile code for the " + "OpenBSD operating system.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMcallNetbsd({"-mcall-netbsd"}, + " -mcall-netbsd \tOn System V.4 and embedded PowerPC systems compile code for the " + "NetBSD operating system.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMcallPrologues({"-mcall-prologues"}, + " -mcall-prologues \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMcallSysv({"-mcall-sysv"}, + " -mcall-sysv \tOn System V.4 and embedded PowerPC systems compile code using calling conventions" + " that adhere to the March 1995 draft of the System V Application Binary Interface, PowerPC processor " + "supplement.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMcallSysvEabi({"-mcall-sysv-eabi"}, + " -mcall-sysv-eabi \tSpecify both -mcall-sysv and -meabi options.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMcallSysvNoeabi({"-mcall-sysv-noeabi"}, + " -mcall-sysv-noeabi \tSpecify both -mcall-sysv and -mno-eabi options.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMcalleeSuperInterworking({"-mcallee-super-interworking"}, + " -mcallee-super-interworking \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMcallerCopies({"-mcaller-copies"}, + " -mcaller-copies \tThe caller copies function arguments passed by hidden reference.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMcallerSuperInterworking({"-mcaller-super-interworking"}, + " -mcaller-super-interworking \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMcallgraphData({"-mcallgraph-data"}, + " -mcallgraph-data \t\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-callgraph-data"), maplecl::kHide); + +maplecl::Option oMcaseVectorPcrel({"-mcase-vector-pcrel"}, + " -mcase-vector-pcrel \tUse PC-relative switch case tables to enable case table shortening. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMcbcond({"-mcbcond"}, + " -mcbcond \tWith -mcbcond, Maple generates code that takes advantage of the UltraSPARC " + "Compare-and-Branch-on-Condition instructions. \n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-cbcond"), maplecl::kHide); + +maplecl::Option oMcbranchForceDelaySlot({"-mcbranch-force-delay-slot"}, + " -mcbranch-force-delay-slot \tForce the usage of delay slots for conditional branches, which stuffs the " + "delay slot with a nop if a suitable instruction cannot be found. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMccInit({"-mcc-init"}, + " -mcc-init \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMcfv4e({"-mcfv4e"}, + " -mcfv4e \tGenerate output for a ColdFire V4e family CPU (e.g. 547x/548x).\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMcheckZeroDivision({"-mcheck-zero-division"}, + " -mcheck-zero-division \tTrap (do not trap) on integer division by zero.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-check-zero-division"), maplecl::kHide); + +maplecl::Option oMcix({"-mcix"}, + " -mcix \tGenerate code to use the optional CIX instruction sets.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-cix"), maplecl::kHide); + +maplecl::Option oMcld({"-mcld"}, + " -mcld \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMclearHwcap({"-mclear-hwcap"}, + " -mclear-hwcap \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMclflushopt({"-mclflushopt"}, + " -mclflushopt \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMclip({"-mclip"}, + " -mclip \tEnables the clip instruction.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMclzero({"-mclzero"}, + " -mclzero \tThese switches enable the use of instructions in the mclzero.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMcmov({"-mcmov"}, + " -mcmov \tGenerate conditional move instructions.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-cmov"), maplecl::kHide); + +maplecl::Option oMcmove({"-mcmove"}, + " -mcmove \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMcmpb({"-mcmpb"}, + " -mcmpb \tSpecify which instructions are available on the processor you are using. \n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-cmpb"), maplecl::kHide); + +maplecl::Option oMcmse({"-mcmse"}, + " -mcmse \tGenerate secure code as per the ARMv8-M Security Extensions.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMcodeDensity({"-mcode-density"}, + " -mcode-density \tEnable code density instructions for ARC EM. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMcodeRegion({"-mcode-region"}, + " -mcode-region \tThe compiler where to place functions and data that do not have one of the " + "lower, upper, either or section attributes.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMcompactBranchesAlways({"-mcompact-branches=always"}, + " -mcompact-branches=always \tThe -mcompact-branches=always option ensures that a compact branch instruction " + "will be generated if available. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMcompactBranchesNever({"-mcompact-branches=never"}, + " -mcompact-branches=never \tThe -mcompact-branches=never option ensures that compact branch instructions " + "will never be generated.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMcompactBranchesOptimal({"-mcompact-branches=optimal"}, + " -mcompact-branches=optimal \tThe -mcompact-branches=optimal option will cause a delay slot branch to be " + "used if one is available in the current ISA and the delay slot is successfully filled.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMcompactCasesi({"-mcompact-casesi"}, + " -mcompact-casesi \tEnable compact casesi pattern.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMcompatAlignParm({"-mcompat-align-parm"}, + " -mcompat-align-parm \tGenerate code to pass structure parameters with a maximum alignment of 64 bits, " + "for compatibility with older versions of maple.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMcondExec({"-mcond-exec"}, + " -mcond-exec \tEnable the use of conditional execution (default).\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-cond-exec"), maplecl::kHide); + +maplecl::Option oMcondMove({"-mcond-move"}, + " -mcond-move \tEnable the use of conditional-move instructions (default).\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-cond-move"), maplecl::kHide); + +maplecl::Option oMconsole({"-mconsole"}, + " -mconsole \tThis option specifies that a console application is to be generated, by " + "instructing the linker to set the PE header subsystem type required for console applications.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMconstAlign({"-mconst-align"}, + " -mconst-align \t\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-const-align"), maplecl::kHide); + +maplecl::Option oMconst16({"-mconst16"}, + " -mconst16 \t\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-const16"), maplecl::kHide); + +maplecl::Option oMconstantGp({"-mconstant-gp"}, + " -mconstant-gp \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMcop({"-mcop"}, + " -mcop \tEnables the coprocessor instructions. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMcop32({"-mcop32"}, + " -mcop32 \tEnables the 32-bit coprocessor's instructions.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMcop64({"-mcop64"}, + " -mcop64 \tEnables the 64-bit coprocessor's instructions.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMcorea({"-mcorea"}, + " -mcorea \tBuild a standalone application for Core A of BF561 when using the " + "one-application-per-core programming model.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMcoreb({"-mcoreb"}, + " -mcoreb \tBuild a standalone application for Core B of BF561 when using the " + "one-application-per-core programming model.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + + +maplecl::Option oMcpu32({"-mcpu32"}, + " -mcpu32 \tGenerate output for a CPU32.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMcr16c({"-mcr16c"}, + " -mcr16c \tGenerate code for CR16C architecture.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMcr16cplus({"-mcr16cplus"}, + " -mcr16cplus \tGenerate code for CR16C+ architecture.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMcrc32({"-mcrc32"}, + " -mcrc32 \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMcrypto({"-mcrypto"}, + " -mcrypto \tEnable the use of the built-in functions that allow direct access to the " + "cryptographic instructions that were added in version 2.07 of the PowerPC ISA.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-crypto"), maplecl::kHide); + +maplecl::Option oMcsyncAnomaly({"-mcsync-anomaly"}, + " -mcsync-anomaly \tWhen enabled, the compiler ensures that the generated code does not contain " + "CSYNC or SSYNC instructions too soon after conditional branches.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-csync-anomaly"), maplecl::kHide); + +maplecl::Option oMctorDtor({"-mctor-dtor"}, + " -mctor-dtor \tEnable constructor/destructor feature.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMcustomFpuCfg({"-mcustom-fpu-cfg"}, + " -mcustom-fpu-cfg \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMcustomInsn({"-mcustom-insn"}, + " -mcustom-insn \t\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-custom-insn"), maplecl::kHide); + +maplecl::Option oMcx16({"-mcx16"}, + " -mcx16 \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMdalign({"-mdalign"}, + " -mdalign \tAlign doubles at 64-bit boundaries.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMdataAlign({"-mdata-align"}, + " -mdata-align \t\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-data-align"), maplecl::kHide); + +maplecl::Option oMdataModel({"-mdata-model"}, + " -mdata-model \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMdc({"-mdc"}, + " -mdc \tCauses constant variables to be placed in the .near section.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMdebug({"-mdebug"}, + " -mdebug \tPrint additional debug information when compiling. \n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-debug"), maplecl::kHide); + +maplecl::Option oMdebugMainPrefix({"-mdebug-main=prefix"}, + " -mdebug-main=prefix \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMdecAsm({"-mdec-asm"}, + " -mdec-asm \tUse DEC assembler syntax. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMdirectMove({"-mdirect-move"}, + " -mdirect-move \tGenerate code that uses the instructions to move data between the general " + "purpose registers and the vector/scalar (VSX) registers that were added in version 2.07 of the PowerPC ISA.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-direct-move"), maplecl::kHide); + +maplecl::Option oMdisableCallt({"-mdisable-callt"}, + " -mdisable-callt \tThis option suppresses generation of the CALLT instruction for the v850e, " + "v850e1, v850e2, v850e2v3 and v850e3v5 flavors of the v850 architecture.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-disable-callt"), maplecl::kHide); + +maplecl::Option oMdisableFpregs({"-mdisable-fpregs"}, + " -mdisable-fpregs \tPrevent floating-point registers from being used in any manner.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMdisableIndexing({"-mdisable-indexing"}, + " -mdisable-indexing \tPrevent the compiler from using indexing address modes.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMdiv({"-mdiv"}, + " -mdiv \tEnables the div and divu instructions.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-div"), maplecl::kHide); + +maplecl::Option oMdivRem({"-mdiv-rem"}, + " -mdiv-rem \tEnable div and rem instructions for ARCv2 cores.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMdivStrategy({"-mdiv=strategy"}, + " -mdiv=strategy \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMdivideBreaks({"-mdivide-breaks"}, + " -mdivide-breaks \tMIPS systems check for division by zero by generating either a conditional " + "trap or a break instruction.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMdivideEnabled({"-mdivide-enabled"}, + " -mdivide-enabled \tEnable divide and modulus instructions.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMdivideTraps({"-mdivide-traps"}, + " -mdivide-traps \tMIPS systems check for division by zero by generating either a conditional " + "trap or a break instruction.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + + +maplecl::Option oMdll({"-mdll"}, + " -mdll \tThis option is available for Cygwin and MinGW targets.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMdlmzb({"-mdlmzb"}, + " -mdlmzb \tGenerate code that uses the string-search 'dlmzb' instruction on the IBM " + "405, 440, 464 and 476 processors. \n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-dlmzb"), maplecl::kHide); + +maplecl::Option oMdmx({"-mdmx"}, + " -mdmx \tUse MIPS Digital Media Extension instructions.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-mdmx"), maplecl::kHide); + +maplecl::Option oMdouble({"-mdouble"}, + " -mdouble \tUse floating-point double instructions.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-double"), maplecl::kHide); + +maplecl::Option oMdoubleFloat({"-mdouble-float"}, + " -mdouble-float \tGenerate code for double-precision floating-point operations.", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMdpfp({"-mdpfp"}, + " -mdpfp \tGenerate double-precision FPX instructions, tuned for the compact " + "implementation.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMdpfpCompact({"-mdpfp-compact"}, + " -mdpfp-compact \tGenerate double-precision FPX instructions, tuned for the compact " + "implementation.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMdpfpFast({"-mdpfp-fast"}, + " -mdpfp-fast \tGenerate double-precision FPX instructions, tuned for the fast implementation.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMdpfp_compact({"-mdpfp_compact"}, + " -mdpfp_compact \tReplaced by -mdpfp-compact.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMdpfp_fast({"-mdpfp_fast"}, + " -mdpfp_fast \tReplaced by -mdpfp-fast.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMdsp({"-mdsp"}, + " -mdsp \t\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-dsp"), maplecl::kHide); + +maplecl::Option oMdspPacka({"-mdsp-packa"}, + " -mdsp-packa \tPassed down to the assembler to enable the DSP Pack A extensions. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMdspr2({"-mdspr2"}, + " -mdspr2 \tUse revision 2 of the MIPS DSP ASE.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-dspr2"), maplecl::kHide); + +maplecl::Option oMdsp_packa({"-mdsp_packa"}, + " -mdsp_packa \tReplaced by -mdsp-packa.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMdualNops({"-mdual-nops"}, + " -mdual-nops \tBy default, GCC inserts NOPs to increase dual issue when it expects it " + "to increase performance.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMdumpTuneFeatures({"-mdump-tune-features"}, + " -mdump-tune-features \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMdvbf({"-mdvbf"}, + " -mdvbf \tPassed down to the assembler to enable the dual Viterbi butterfly extension.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMdwarf2Asm({"-mdwarf2-asm"}, + " -mdwarf2-asm \t\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-dwarf2-asm"), maplecl::kHide); + +maplecl::Option oMdword({"-mdword"}, + " -mdword \tChange ABI to use double word insns.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-dword"), maplecl::kHide); + +maplecl::Option oMdynamicNoPic({"-mdynamic-no-pic"}, + " -mdynamic-no-pic \tOn Darwin and Mac OS X systems, compile code so that it is not relocatable, " + "but that its external references are relocatable. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMea({"-mea"}, + " -mea \tGenerate extended arithmetic instructions.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMEa({"-mEa"}, + " -mEa \tReplaced by -mea.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMea32({"-mea32"}, + " -mea32 \tCompile code assuming that pointers to the PPU address space accessed via " + "the __ea named address space qualifier are either 32 bits wide. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMea64({"-mea64"}, + " -mea64 \tCompile code assuming that pointers to the PPU address space accessed " + "via the __ea named address space qualifier are either 64 bits wide. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMeabi({"-meabi"}, + " -meabi \tOn System V.4 and embedded PowerPC systems adhere to the Embedded " + "Applications Binary Interface (EABI), which is a set of modifications to the System V.4 specifications. \n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-eabi"), maplecl::kHide); + +maplecl::Option oMearlyCbranchsi({"-mearly-cbranchsi"}, + " -mearly-cbranchsi \tEnable pre-reload use of the cbranchsi pattern.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMearlyStopBits({"-mearly-stop-bits"}, + " -mearly-stop-bits \t\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-early-stop-bits"), maplecl::kHide); + +maplecl::Option oMeb({"-meb"}, + " -meb \tGenerate big-endian code.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMel({"-mel"}, + " -mel \tGenerate little-endian code.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMelf({"-melf"}, + " -melf \tGenerate an executable in the ELF format, rather than the default 'mmo' " + "format used by the mmix simulator.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMemb({"-memb"}, + " -memb \tOn embedded PowerPC systems, set the PPC_EMB bit in the ELF flags header to " + "indicate that 'eabi' extended relocations are used.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMembeddedData({"-membedded-data"}, + " -membedded-data \tAllocate variables to the read-only data section first if possible, then " + "next in the small data section if possible, otherwise in data.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-embedded-data"), maplecl::kHide); + +maplecl::Option oMep({"-mep"}, + " -mep \tDo not optimize basic blocks that use the same index pointer 4 or more times " + "to copy pointer into the ep register, and use the shorter sld and sst instructions. \n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-ep"), maplecl::kHide); + +maplecl::Option oMepsilon({"-mepsilon"}, + " -mepsilon \tGenerate floating-point comparison instructions that compare with respect " + "to the rE epsilon register.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-epsilon"), maplecl::kHide); + +maplecl::Option oMesa({"-mesa"}, + " -mesa \tWhen -mesa is specified, generate code using the instructions available on " + "ESA/390.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMetrax100({"-metrax100"}, + " -metrax100 \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMetrax4({"-metrax4"}, + " -metrax4 \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMeva({"-meva"}, + " -meva \tUse the MIPS Enhanced Virtual Addressing instructions.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-eva"), maplecl::kHide); + +maplecl::Option oMexpandAdddi({"-mexpand-adddi"}, + " -mexpand-adddi \tExpand adddi3 and subdi3 at RTL generation time into add.f, adc etc.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMexplicitRelocs({"-mexplicit-relocs"}, + " -mexplicit-relocs \tUse assembler relocation operators when dealing with symbolic addresses.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-explicit-relocs"), maplecl::kHide); + +maplecl::Option oMexr({"-mexr"}, + " -mexr \t\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-exr"), maplecl::kHide); + +maplecl::Option oMexternSdata({"-mextern-sdata"}, + " -mextern-sdata \tAssume (do not assume) that externally-defined data is in a small data section " + "if the size of that data is within the -G limit. -mextern-sdata is the default for all configurations.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-extern-sdata"), maplecl::kHide); + +maplecl::Option oMf16c({"-mf16c"}, + " -mf16c \tThese switches enable the use of instructions in the mf16c.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMfastFp({"-mfast-fp"}, + " -mfast-fp \tLink with the fast floating-point library. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMfastIndirectCalls({"-mfast-indirect-calls"}, + " -mfast-indirect-calls \tGenerate code that assumes calls never cross space boundaries.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMfastSwDiv({"-mfast-sw-div"}, + " -mfast-sw-div \t\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-fast-sw-div"), maplecl::kHide); + +maplecl::Option oMfasterStructs({"-mfaster-structs"}, + " -mfaster-structs \tWith -mfaster-structs, the compiler assumes that structures should have " + "8-byte alignment.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-faster-structs"), maplecl::kHide); + +maplecl::Option oMfdiv({"-mfdiv"}, + " -mfdiv \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMfdpic({"-mfdpic"}, + " -mfdpic \tSelect the FDPIC ABI, which uses function descriptors to represent pointers " + "to functions.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMfentry({"-mfentry"}, + " -mfentry \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMfix({"-mfix"}, + " -mfix \tGenerate code to use the optional FIX instruction sets.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-fix"), maplecl::kHide); + +maplecl::Option oMfix24k({"-mfix-24k"}, + " -mfix-24k \tWork around the 24K E48 (lost data on stores during refill) errata. \n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-fix-24k"), maplecl::kHide); + +maplecl::Option oMfixAndContinue({"-mfix-and-continue"}, + " -mfix-and-continue \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMfixAt697f({"-mfix-at697f"}, + " -mfix-at697f \tEnable the documented workaround for the single erratum of the Atmel AT697F " + "processor (which corresponds to erratum #13 of the AT697E processor).\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMfixCortexM3Ldrd({"-mfix-cortex-m3-ldrd"}, + " -mfix-cortex-m3-ldrd \tSome Cortex-M3 cores can cause data corruption when ldrd instructions with " + "overlapping destination and base registers are used. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMfixGr712rc({"-mfix-gr712rc"}, + " -mfix-gr712rc \tEnable the documented workaround for the back-to-back store errata of " + "the GR712RC processor.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMfixR10000({"-mfix-r10000"}, + " -mfix-r10000 \tWork around certain R10000 errata\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-fix-r10000"), maplecl::kHide); + +maplecl::Option oMfixR4000({"-mfix-r4000"}, + " -mfix-r4000 \tWork around certain R4000 CPU errata\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-fix-r4000"), maplecl::kHide); + +maplecl::Option oMfixR4400({"-mfix-r4400"}, + " -mfix-r4400 \tWork around certain R4400 CPU errata\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-fix-r4400"), maplecl::kHide); + +maplecl::Option oMfixRm7000({"-mfix-rm7000"}, + " -mfix-rm7000 \tWork around the RM7000 dmult/dmultu errata.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-fix-rm7000"), maplecl::kHide); + +maplecl::Option oMfixSb1({"-mfix-sb1"}, + " -mfix-sb1 \tWork around certain SB-1 CPU core errata.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-fix-sb1"), maplecl::kHide); + +maplecl::Option oMfixUt699({"-mfix-ut699"}, + " -mfix-ut699 \tEnable the documented workarounds for the floating-point errata and the data " + "cache nullify errata of the UT699 processor.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMfixUt700({"-mfix-ut700"}, + " -mfix-ut700 \tEnable the documented workaround for the back-to-back store errata of the " + "UT699E/UT700 processor.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMfixVr4120({"-mfix-vr4120"}, + " -mfix-vr4120 \tWork around certain VR4120 errata\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-fix-vr4120"), maplecl::kHide); + +maplecl::Option oMfixVr4130({"-mfix-vr4130"}, + " -mfix-vr4130 \tWork around the VR4130 mflo/mfhi errata.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMfixedCc({"-mfixed-cc"}, + " -mfixed-cc \tDo not try to dynamically allocate condition code registers, only use " + "icc0 and fcc0.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMflat({"-mflat"}, + " -mflat \tWith -mflat, the compiler does not generate save/restore instructions and " + "uses a 'flat' or single register window model.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-flat"), maplecl::kHide); + +maplecl::Option oMflipMips16({"-mflip-mips16"}, + " -mflip-mips16 \tGenerate MIPS16 code on alternating functions.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMfloatAbi({"-mfloat-abi"}, + " -mfloat-abi \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMfloatIeee({"-mfloat-ieee"}, + " -mfloat-ieee \tGenerate code that does not use VAX F and G floating-point arithmetic " + "instead of IEEE single and double precision.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMfloatVax({"-mfloat-vax"}, + " -mfloat-vax \tGenerate code that uses VAX F and G floating-point arithmetic instead " + "of IEEE single and double precision.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMfloat128({"-mfloat128"}, + " -mfloat128 \tEisable the __float128 keyword for IEEE 128-bit floating point and use " + "either software emulation for IEEE 128-bit floating point or hardware instructions.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-float128"), maplecl::kHide); + +maplecl::Option oMfloat128Hardware({"-mfloat128-hardware"}, + " -mfloat128-hardware \tEisable using ISA 3.0 hardware instructions to support the __float128 " + "data type.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-float128-hardware"), maplecl::kHide); + +maplecl::Option oMfloat32({"-mfloat32"}, + " -mfloat32 \tUse 32-bit float.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-float32"), maplecl::kHide); + +maplecl::Option oMfloat64({"-mfloat64"}, + " -mfloat64 \tUse 64-bit float.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-float64"), maplecl::kHide); + +maplecl::Option oMfma({"-mfma"}, + " -mfma \tThese switches enable the use of instructions in the mfma.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-fmaf"), maplecl::kHide); + +maplecl::Option oMfma4({"-mfma4"}, + " -mfma4 \tThese switches enable the use of instructions in the mfma4.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMfmaf({"-mfmaf"}, + " -mfmaf \tWith -mfmaf, Maple generates code that takes advantage of the UltraSPARC " + "Fused Multiply-Add Floating-point instructions.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMfmovd({"-mfmovd"}, + " -mfmovd \tEnable the use of the instruction fmovd.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMforceNoPic({"-mforce-no-pic"}, + " -mforce-no-pic \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMfpExceptions({"-mfp-exceptions"}, + " -mfp-exceptions \tSpecifies whether FP exceptions are enabled. \n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-fp-exceptions"), maplecl::kHide); + +maplecl::Option oMfpMode({"-mfp-mode"}, + " -mfp-mode \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMfp16Format({"-mfp16-format"}, + " -mfp16-format \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMfp32({"-mfp32"}, + " -mfp32 \tAssume that floating-point registers are 32 bits wide.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMfp64({"-mfp64"}, + " -mfp64 \tAssume that floating-point registers are 64 bits wide.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMfpmath({"-mfpmath"}, + " -mfpmath \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMfpr32({"-mfpr-32"}, + " -mfpr-32 \tUse only the first 32 floating-point registers.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMfpr64({"-mfpr-64"}, + " -mfpr-64 \tUse all 64 floating-point registers.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMfprnd({"-mfprnd"}, + " -mfprnd \tSpecify which instructions are available on the processor you are using. \n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-fprnd"), maplecl::kHide); + +maplecl::Option oMfpxx({"-mfpxx"}, + " -mfpxx \tDo not assume the width of floating-point registers.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMfractConvertTruncate({"-mfract-convert-truncate"}, + " -mfract-convert-truncate \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMframeHeaderOpt({"-mframe-header-opt"}, + " -mframe-header-opt \tEnable (disable) frame header optimization in the o32 ABI.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-frame-header-opt"), maplecl::kHide); + +maplecl::Option oMfriz({"-mfriz"}, + " -mfriz \tGenerate the friz instruction when the -funsafe-math-optimizations option " + "is used to optimize rounding of floating-point values to 64-bit integer and back to floating point. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMfsca({"-mfsca"}, + " -mfsca \tAllow or disallow the compiler to emit the fsca instruction for sine and " + "cosine approximations.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-fsca"), maplecl::kHide); + +maplecl::Option oMfsgsbase({"-mfsgsbase"}, + " -mfsgsbase \tThese switches enable the use of instructions in the mfsgsbase.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMfsmuld({"-mfsmuld"}, + " -mfsmuld \tWith -mfsmuld, Maple generates code that takes advantage of the Floating-point" + " Multiply Single to Double (FsMULd) instruction. \n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-fsmuld"), maplecl::kHide); + +maplecl::Option oMfsrra({"-mfsrra"}, + " -mfsrra \tAllow or disallow the compiler to emit the fsrra instruction for reciprocal " + "square root approximations.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-fsrra"), maplecl::kHide); + +maplecl::Option oMfullRegs({"-mfull-regs"}, + " -mfull-regs \tUse full-set registers for register allocation.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMfullToc({"-mfull-toc"}, + " -mfull-toc \tModify generation of the TOC (Table Of Contents), which is created for every " + "executable file. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMfusedMadd({"-mfused-madd"}, + " -mfused-madd \tGenerate code that uses the floating-point multiply and accumulate " + "instructions. \n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-fused-madd"), maplecl::kHide); + +maplecl::Option oMfxsr({"-mfxsr"}, + " -mfxsr \tThese switches enable the use of instructions in the mfxsr.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMg10({"-mg10"}, + " -mg10 \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMg13({"-mg13"}, + " -mg13 \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMg14({"-mg14"}, + " -mg14 \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMgas({"-mgas"}, + " -mgas \tEnable the use of assembler directives only GAS understands.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMgccAbi({"-mgcc-abi"}, + " -mgcc-abi \tEnables support for the old GCC version of the V850 ABI.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMgenCellMicrocode({"-mgen-cell-microcode"}, + " -mgen-cell-microcode \tGenerate Cell microcode instructions.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMgeneralRegsOnly({"-mgeneral-regs-only"}, + " -mgeneral-regs-only \tGenerate code which uses only the general registers.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMghs({"-mghs"}, + " -mghs \tEnables support for the RH850 version of the V850 ABI.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMglibc({"-mglibc"}, + " -mglibc \tUse GNU C library.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMgnu({"-mgnu"}, + " -mgnu \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMgnuAs({"-mgnu-as"}, + " -mgnu-as \t\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-gnu-as"), maplecl::kHide); + +maplecl::Option oMgnuAttribute({"-mgnu-attribute"}, + " -mgnu-attribute \tEmit .gnu_attribute assembly directives to set tag/value pairs in a " + ".gnu.attributes section that specify ABI variations in function parameters or return values.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-gnu-attribute"), maplecl::kHide); + +maplecl::Option oMgnuLd({"-mgnu-ld"}, + " -mgnu-ld \tUse options specific to GNU ld.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-gnu-ld"), maplecl::kHide); + +maplecl::Option oMgomp({"-mgomp"}, + " -mgomp \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMgotplt({"-mgotplt"}, + " -mgotplt \t\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-gotplt"), maplecl::kHide); + +maplecl::Option oMgp32({"-mgp32"}, + " -mgp32 \tAssume that general-purpose registers are 32 bits wide.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMgp64({"-mgp64"}, + " -mgp64 \tAssume that general-purpose registers are 64 bits wide.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMgpopt({"-mgpopt"}, + " -mgpopt \tUse GP-relative accesses for symbols that are known to be in a small " + "data section.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-gpopt"), maplecl::kHide); + +maplecl::Option oMgpr32({"-mgpr-32"}, + " -mgpr-32 \tOnly use the first 32 general-purpose registers.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMgpr64({"-mgpr-64"}, + " -mgpr-64 \tUse all 64 general-purpose registers.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMgprelRo({"-mgprel-ro"}, + " -mgprel-ro \tEnable the use of GPREL relocations in the FDPIC ABI for data that is " + "known to be in read-only sections.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMh({"-mh"}, + " -mh \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMhal({"-mhal"}, + " -mhal \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMhalfRegFile({"-mhalf-reg-file"}, + " -mhalf-reg-file \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMhardDfp({"-mhard-dfp"}, + " -mhard-dfp \tUse the hardware decimal-floating-point instructions for decimal-floating-point " + "operations. \n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-hard-dfp"), maplecl::kHide); + +maplecl::Option oMhardFloat({"-mhard-float"}, + " -mhard-float \tUse the hardware floating-point instructions and registers for floating-point" + " operations.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMhardQuadFloat({"-mhard-quad-float"}, + " -mhard-quad-float \tGenerate output containing quad-word (long double) floating-point instructions.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMhardlit({"-mhardlit"}, + " -mhardlit \t\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-hardlit"), maplecl::kHide); + +maplecl::Option oMhpLd({"-mhp-ld"}, + " -mhp-ld \tUse options specific to HP ld.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMhtm({"-mhtm"}, + " -mhtm \tThe -mhtm option enables a set of builtins making use of instructions " + "available with the transactional execution facility introduced with the IBM zEnterprise EC12 machine generation " + "S/390 System z Built-in Functions.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-htm"), maplecl::kHide); + +maplecl::Option oMhwDiv({"-mhw-div"}, + " -mhw-div \t\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-hw-div"), maplecl::kHide); + +maplecl::Option oMhwMul({"-mhw-mul"}, + " -mhw-mul \t\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-hw-mul"), maplecl::kHide); + +maplecl::Option oMhwMulx({"-mhw-mulx"}, + " -mhw-mulx \t\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-hw-mulx"), maplecl::kHide); + +maplecl::Option oMiamcu({"-miamcu"}, + " -miamcu \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMicplb({"-micplb"}, + " -micplb \tAssume that ICPLBs are enabled at run time.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMidSharedLibrary({"-mid-shared-library"}, + " -mid-shared-library \tGenerate code that supports shared libraries via the library ID method.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-id-shared-library"), maplecl::kHide); + +maplecl::Option oMieee({"-mieee"}, + " -mieee \tThis option generates code fully IEEE-compliant code except that the " + "inexact-flag is not maintained (see below).\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-ieee"), maplecl::kHide); + +maplecl::Option oMieeeConformant({"-mieee-conformant"}, + " -mieee-conformant \tThis option marks the generated code as IEEE conformant.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMieeeFp({"-mieee-fp"}, + " -mieee-fp \t\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-ieee-fp"), maplecl::kHide); + +maplecl::Option oMieeeWithInexact({"-mieee-with-inexact"}, + " -mieee-with-inexact \tTurning on this option causes the generated code to implement fully-compliant " + "IEEE math. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMilp32({"-milp32"}, + " -milp32 \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMimadd({"-mimadd"}, + " -mimadd \tEnable (disable) use of the madd and msub integer instructions.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-imadd"), maplecl::kHide); + +maplecl::Option oMimpureText({"-mimpure-text"}, + " -mimpure-text \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMincomingStackBoundary({"-mincoming-stack-boundary"}, + " -mincoming-stack-boundary \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMindexedLoads({"-mindexed-loads"}, + " -mindexed-loads \tEnable the use of indexed loads. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMinlineAllStringops({"-minline-all-stringops"}, + " -minline-all-stringops \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMinlineFloatDivideMaxThroughput({"-minline-float-divide-max-throughput"}, + " -minline-float-divide-max-throughput \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMinlineFloatDivideMinLatency({"-minline-float-divide-min-latency"}, + " -minline-float-divide-min-latency \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMinlineIc_invalidate({"-minline-ic_invalidate"}, + " -minline-ic_invalidate \tInline code to invalidate instruction cache entries after setting up nested " + "function trampolines.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMinlineIntDivideMaxThroughput({"-minline-int-divide-max-throughput"}, + " -minline-int-divide-max-throughput \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMinlineIntDivideMinLatency({"-minline-int-divide-min-latency"}, + " -minline-int-divide-min-latency \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMinlinePlt({"-minline-plt"}, + " -minline-plt \tEnable inlining of PLT entries in function calls to functions that are not " + "known to bind locally.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMinlineSqrtMaxThroughput({"-minline-sqrt-max-throughput"}, + " -minline-sqrt-max-throughput \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMinlineSqrtMinLatency({"-minline-sqrt-min-latency"}, + " -minline-sqrt-min-latency \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMinlineStringopsDynamically({"-minline-stringops-dynamically"}, + " -minline-stringops-dynamically \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMinrt({"-minrt"}, + " -minrt \tEnable the use of a minimum runtime environment - no static initializers or " + "constructors.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMintRegister({"-mint-register"}, + " -mint-register \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMint16({"-mint16"}, + " -mint16 \tUse 16-bit int.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-int16"), maplecl::kHide); + +maplecl::Option oMint32({"-mint32"}, + " -mint32 \tUse 32-bit int.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-int32"), maplecl::kHide); + +} diff --git a/src/mapleall/maple_driver/src/unsupport_bool2.cpp b/src/mapleall/maple_driver/src/unsupport_bool2.cpp new file mode 100644 index 0000000000000000000000000000000000000000..70a3f74afc7435f9517e62ee2ef0c708c721addf --- /dev/null +++ b/src/mapleall/maple_driver/src/unsupport_bool2.cpp @@ -0,0 +1,1532 @@ +/* + * Copyright (c) [2023] Huawei Technologies Co.,Ltd.All rights reserved. + * + * OpenArkCompiler is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * + * http://license.coscl.org.cn/MulanPSL2 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ + +#include "driver_options.h" + +namespace opts { + + +maplecl::Option fpie({"-fpie", "--fpie"}, + " --fpie \tGenerate position-independent executable in small mode.\n" + " --no-pie/-fno-pie \n", + {cgCategory, driverCategory, ldCategory}, kOptCommon | kOptLd | kOptNotFiltering, + maplecl::DisableEvery({"-fno-pie", "--no-pie"})); + +maplecl::Option oFipaSra({"-fipa-sra"}, + " -fipa-sra \tPerform interprocedural reduction of aggregates.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-ipa-sra"), maplecl::kHide); + +maplecl::Option oFiraHoistPressure({"-fira-hoist-pressure"}, + " -fira-hoist-pressure \tUse IRA based register pressure calculation in RTL hoist optimizations.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-ira-hoist-pressure"), maplecl::kHide); + +maplecl::Option oFiraLoopPressure({"-fira-loop-pressure"}, + " -fira-loop-pressure \tUse IRA based register pressure calculation in RTL loop optimizations.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-ira-loop-pressure"), maplecl::kHide); + +maplecl::Option oFisolateErroneousPathsAttribute({"-fisolate-erroneous-paths-attribute"}, + " -fisolate-erroneous-paths-attribute \tDetect paths that trigger erroneous or undefined behavior due to a " + "null value being used in a way forbidden by a returns_nonnull or nonnull attribute. Isolate those paths from " + "the main control flow and turn the statement with erroneous or undefined behavior into a trap.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-isolate-erroneous-paths-attribute"), maplecl::kHide); + +maplecl::Option oFisolateErroneousPathsDereference({"-fisolate-erroneous-paths-dereference"}, + " -fisolate-erroneous-paths-dereference \tDetect paths that trigger erroneous or undefined behavior due to " + "dereferencing a null pointer. Isolate those paths from the main control flow and turn the statement with " + "erroneous or undefined behavior into a trap.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-isolate-erroneous-paths-dereference"), maplecl::kHide); + +maplecl::Option oFivopts({"-fivopts"}, + " -fivopts \tOptimize induction variables on trees.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-ivopts"), maplecl::kHide); + +maplecl::Option oFkeepInlineFunctions({"-fkeep-inline-functions"}, + " -fkeep-inline-functions \tGenerate code for functions even if they are fully inlined.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-keep-inline-functions"), maplecl::kHide); + +maplecl::Option oFkeepStaticConsts({"-fkeep-static-consts"}, + " -fkeep-static-consts \tEmit static const variables even if they are not used.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-keep-static-consts"), maplecl::kHide); + +maplecl::Option oFkeepStaticFunctions({"-fkeep-static-functions"}, + " -fkeep-static-functions \tGenerate code for static functions even if they are never called.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-keep-static-functions"), maplecl::kHide); + +maplecl::Option oFlat_namespace({"-flat_namespace"}, + " -flat_namespace \t\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-lat_namespace"), maplecl::kHide); + +maplecl::Option oFlaxVectorConversions({"-flax-vector-conversions"}, + " -flax-vector-conversions \tAllow implicit conversions between vectors with differing numbers of subparts " + "and/or differing element types.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-lax-vector-conversions"), maplecl::kHide); + +maplecl::Option oFleadingUnderscore({"-fleading-underscore"}, + " -fleading-underscore \tGive external symbols a leading underscore.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-leading-underscore"), maplecl::kHide); + +maplecl::Option oFlocalIvars({"-flocal-ivars"}, + " -flocal-ivars \tAllow access to instance variables as if they were local declarations within " + "instance method implementations.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-local-ivars"), maplecl::kHide); + +maplecl::Option oFloopBlock({"-floop-block"}, + " -floop-block \tEnable loop nest transforms. Same as -floop-nest-optimize.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-loop-block"), maplecl::kHide); + +maplecl::Option oFloopInterchange({"-floop-interchange"}, + " -floop-interchange \tEnable loop nest transforms. Same as -floop-nest-optimize.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-loop-interchange"), maplecl::kHide); + +maplecl::Option oFloopNestOptimize({"-floop-nest-optimize"}, + " -floop-nest-optimize \tEnable the loop nest optimizer.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-loop-nest-optimize"), maplecl::kHide); + +maplecl::Option oFloopParallelizeAll({"-floop-parallelize-all"}, + " -floop-parallelize-all \tMark all loops as parallel.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-loop-parallelize-all"), maplecl::kHide); + +maplecl::Option oFloopStripMine({"-floop-strip-mine"}, + " -floop-strip-mine \tEnable loop nest transforms. Same as -floop-nest-optimize.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-loop-strip-mine"), maplecl::kHide); + +maplecl::Option oFloopUnrollAndJam({"-floop-unroll-and-jam"}, + " -floop-unroll-and-jam \tEnable loop nest transforms. Same as -floop-nest-optimize.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-loop-unroll-and-jam"), maplecl::kHide); + +maplecl::Option oFlraRemat({"-flra-remat"}, + " -flra-remat \tDo CFG-sensitive rematerialization in LRA.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-lra-remat"), maplecl::kHide); + +maplecl::Option oFltoOdrTypeMerging({"-flto-odr-type-merging"}, + " -flto-odr-type-merging \tMerge C++ types using One Definition Rule.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-lto-odr-type-merging"), maplecl::kHide); + +maplecl::Option oFltoReport({"-flto-report"}, + " -flto-report \tReport various link-time optimization statistics.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-lto-report"), maplecl::kHide); + +maplecl::Option oFltoReportWpa({"-flto-report-wpa"}, + " -flto-report-wpa \tReport various link-time optimization statistics for WPA only.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-lto-report-wpa"), maplecl::kHide); + +maplecl::Option oFmemReport({"-fmem-report"}, + " -fmem-report \tReport on permanent memory allocation.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-mem-report"), maplecl::kHide); + +maplecl::Option oFmemReportWpa({"-fmem-report-wpa"}, + " -fmem-report-wpa \tReport on permanent memory allocation in WPA only.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-mem-report-wpa"), maplecl::kHide); + +maplecl::Option oFmergeAllConstants({"-fmerge-all-constants"}, + " -fmerge-all-constants \tAttempt to merge identical constants and constantvariables.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-merge-all-constants"), maplecl::kHide); + +maplecl::Option oFmergeConstants({"-fmerge-constants"}, + " -fmerge-constants \tAttempt to merge identical constants across compilation units.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-merge-constants"), maplecl::kHide); + +maplecl::Option oFmergeDebugStrings({"-fmerge-debug-strings"}, + " -fmerge-debug-strings \tAttempt to merge identical debug strings across compilation units.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-merge-debug-strings"), maplecl::kHide); + +maplecl::Option oFmoduloSched({"-fmodulo-sched"}, + " -fmodulo-sched \tPerform SMS based modulo scheduling before the first scheduling pass.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-modulo-sched"), maplecl::kHide); + +maplecl::Option oFmoduloSchedAllowRegmoves({"-fmodulo-sched-allow-regmoves"}, + " -fmodulo-sched-allow-regmoves \tPerform SMS based modulo scheduling with register moves allowed.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-modulo-sched-allow-regmoves"), maplecl::kHide); + +maplecl::Option oFmoveLoopInvariants({"-fmove-loop-invariants"}, + " -fmove-loop-invariants \tMove loop invariant computations out of loops.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-move-loop-invariants"), maplecl::kHide); + +maplecl::Option oFmsExtensions({"-fms-extensions"}, + " -fms-extensions \tDon't warn about uses of Microsoft extensions.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-ms-extensions"), maplecl::kHide); + +maplecl::Option oFnewInheritingCtors({"-fnew-inheriting-ctors"}, + " -fnew-inheriting-ctors \tImplement C++17 inheriting constructor semantics.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-new-inheriting-ctors"), maplecl::kHide); + +maplecl::Option oFnewTtpMatching({"-fnew-ttp-matching"}, + " -fnew-ttp-matching \tImplement resolution of DR 150 for matching of template template arguments.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-new-ttp-matching"), maplecl::kHide); + +maplecl::Option oFnextRuntime({"-fnext-runtime"}, + " -fnext-runtime \tGenerate code for NeXT (Apple Mac OS X) runtime environment.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFnoAccessControl({"-fno-access-control"}, + " -fno-access-control \tTurn off all access checking.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFnoAsm({"-fno-asm"}, + " -fno-asm \tDo not recognize asm, inline or typeof as a keyword, so that code can use these " + "words as identifiers. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFnoBranchCountReg({"-fno-branch-count-reg"}, + " -fno-branch-count-reg \tAvoid running a pass scanning for opportunities to use \"decrement and branch\" " + "instructions on a count register instead of generating sequences of instructions that decrement a register, " + "compare it against zero, and then branch based upon the result.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFnoCanonicalSystemHeaders({"-fno-canonical-system-headers"}, + " -fno-canonical-system-headers \tWhen preprocessing, do not shorten system header paths with " + "canonicalization.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFCheckPointerBounds({"-fcheck-pointer-bounds"}, + " -fcheck-pointer-bounds \tEnable Pointer Bounds Checker instrumentation.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-check-pointer-bounds"), maplecl::kHide); + +maplecl::Option oFChecking({"-fchecking"}, + " -fchecking \tPerform internal consistency checkings.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-checking"), maplecl::kHide); + +maplecl::Option oFChkpCheckIncompleteType({"-fchkp-check-incomplete-type"}, + " -fchkp-check-incomplete-type \tGenerate pointer bounds checks for variables with incomplete type.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-chkp-check-incomplete-type"), maplecl::kHide); + +maplecl::Option oFChkpCheckRead({"-fchkp-check-read"}, + " -fchkp-check-read \tGenerate checks for all read accesses to memory.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-chkp-check-read"), maplecl::kHide); + +maplecl::Option oFChkpCheckWrite({"-fchkp-check-write"}, + " -fchkp-check-write \tGenerate checks for all write accesses to memory.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-chkp-check-write"), maplecl::kHide); + +maplecl::Option oFChkpFirstFieldHasOwnBounds({"-fchkp-first-field-has-own-bounds"}, + " -fchkp-first-field-has-own-bounds \tForces Pointer Bounds Checker to use narrowed bounds for address of " + "the first field in the structure. By default pointer to the first field has the same bounds as pointer to the " + "whole structure.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-chkp-first-field-has-own-bounds"), maplecl::kHide); + +maplecl::Option oFDefaultInline({"-fdefault-inline"}, + " -fdefault-inline \tDoes nothing. Preserved for backward compatibility.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-default-inline"), maplecl::kHide); + +maplecl::Option oFdefaultInteger8({"-fdefault-integer-8"}, + " -fdefault-integer-8 \tSet the default integer kind to an 8 byte wide type.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-default-integer-8"), maplecl::kHide); + +maplecl::Option oFdefaultReal8({"-fdefault-real-8"}, + " -fdefault-real-8 \tSet the default real kind to an 8 byte wide type.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-default-real-8"), maplecl::kHide); + +maplecl::Option oFDeferPop({"-fdefer-pop"}, + " -fdefer-pop \tDefer popping functions args from stack until later.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-defer-pop"), maplecl::kHide); + +maplecl::Option oFElideConstructors({"-felide-constructors"}, + " -felide-constructors \t\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("fno-elide-constructors"), maplecl::kHide); + +maplecl::Option oFEnforceEhSpecs({"-fenforce-eh-specs"}, + " -fenforce-eh-specs \tGenerate code to check exception specifications.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-enforce-eh-specs"), maplecl::kHide); + +maplecl::Option oFFpIntBuiltinInexact({"-ffp-int-builtin-inexact"}, + " -ffp-int-builtin-inexact \tAllow built-in functions ceil, floor, round, trunc to raise 'inexact' " + "exceptions.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-fp-int-builtin-inexact"), maplecl::kHide); + +maplecl::Option oFFunctionCse({"-ffunction-cse"}, + " -ffunction-cse \tAllow function addresses to be held in registers.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-function-cse"), maplecl::kHide); + +maplecl::Option oFGnuKeywords({"-fgnu-keywords"}, + " -fgnu-keywords \tRecognize GNU-defined keywords.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-gnu-keywords"), maplecl::kHide); + +maplecl::Option oFGnuUnique({"-fgnu-unique"}, + " -fgnu-unique \tUse STB_GNU_UNIQUE if supported by the assembler.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-gnu-unique"), maplecl::kHide); + +maplecl::Option oFGuessBranchProbability({"-fguess-branch-probability"}, + " -fguess-branch-probability \tEnable guessing of branch probabilities.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-guess-branch-probability"), maplecl::kHide); + +maplecl::Option oFIdent({"-fident"}, + " -fident \tProcess #ident directives.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-ident"), maplecl::kHide); + +maplecl::Option oFImplementInlines({"-fimplement-inlines"}, + " -fimplement-inlines \tExport functions even if they can be inlined.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-implement-inlines"), maplecl::kHide); + +maplecl::Option oFImplicitInlineTemplates({"-fimplicit-inline-templates"}, + " -fimplicit-inline-templates \tEmit implicit instantiations of inline templates.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-implicit-inline-templates"), maplecl::kHide); + +maplecl::Option oFImplicitTemplates({"-fimplicit-templates"}, + " -fimplicit-templates \tEmit implicit instantiations of templates.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("no-implicit-templates"), maplecl::kHide); + +maplecl::Option oFIraShareSaveSlots({"-fira-share-save-slots"}, + " -fira-share-save-slots \tShare slots for saving different hard registers.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-ira-share-save-slots"), maplecl::kHide); + +maplecl::Option oFIraShareSpillSlots({"-fira-share-spill-slots"}, + " -fira-share-spill-slots \tShare stack slots for spilled pseudo-registers.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-ira-share-spill-slots"), maplecl::kHide); + +maplecl::Option oFJumpTables({"-fjump-tables"}, + " -fjump-tables \tUse jump tables for sufficiently large switch statements.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-jump-tables"), maplecl::kHide); + +maplecl::Option oFKeepInlineDllexport({"-fkeep-inline-dllexport"}, + " -fkeep-inline-dllexport \tDon't emit dllexported inline functions unless needed.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-keep-inline-dllexport"), maplecl::kHide); + +maplecl::Option oFLifetimeDse({"-flifetime-dse"}, + " -flifetime-dse \tTell DSE that the storage for a C++ object is dead when the constructor" + " starts and when the destructor finishes.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-lifetime-dse"), maplecl::kHide); + +maplecl::Option oFMathErrno({"-fmath-errno"}, + " -fmath-errno \tSet errno after built-in math functions.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-math-errno"), maplecl::kHide); + +maplecl::Option oFNilReceivers({"-fnil-receivers"}, + " -fnil-receivers \tAssume that receivers of Objective-C messages may be nil.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-nil-receivers"), maplecl::kHide); + +maplecl::Option oFNonansiBuiltins({"-fnonansi-builtins"}, + " -fnonansi-builtins \t\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-nonansi-builtins"), maplecl::kHide); + +maplecl::Option oFOperatorNames({"-foperator-names"}, + " -foperator-names \tRecognize C++ keywords like 'compl' and 'xor'.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-operator-names"), maplecl::kHide); + +maplecl::Option oFOptionalDiags({"-foptional-diags"}, + " -foptional-diags \t\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-optional-diags"), maplecl::kHide); + +maplecl::Option oFPeephole({"-fpeephole"}, + " -fpeephole \tEnable machine specific peephole optimizations.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-peephole"), maplecl::kHide); + +maplecl::Option oFPeephole2({"-fpeephole2"}, + " -fpeephole2 \tEnable an RTL peephole pass before sched2.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-peephole2"), maplecl::kHide); + +maplecl::Option oFPrettyTemplates({"-fpretty-templates"}, + " -fpretty-templates \tpretty-print template specializations as the template signature followed " + "by the arguments.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-pretty-templates"), maplecl::kHide); + +maplecl::Option oFPrintfReturnValue({"-fprintf-return-value"}, + " -fprintf-return-value \tTreat known sprintf return values as constants.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-printf-return-value"), maplecl::kHide); + +maplecl::Option oFRtti({"-frtti"}, + " -frtti \tGenerate run time type descriptor information.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-rtti"), maplecl::kHide); + +maplecl::Option oFnoSanitizeAll({"-fno-sanitize=all"}, + " -fno-sanitize=all \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFSchedInterblock({"-fsched-interblock"}, + " -fsched-interblock \tEnable scheduling across basic blocks.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-sched-interblock"), maplecl::kHide); + +maplecl::Option oFSchedSpec({"-fsched-spec"}, + " -fsched-spec \tAllow speculative motion of non-loads.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-sched-spec"), maplecl::kHide); + +maplecl::Option oFnoSetStackExecutable({"-fno-set-stack-executable"}, + " -fno-set-stack-executable \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFShowColumn({"-fshow-column"}, + " -fshow-column \tShow column numbers in diagnostics, when available. Default on.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-show-column"), maplecl::kHide); + +maplecl::Option oFSignedZeros({"-fsigned-zeros"}, + " -fsigned-zeros \tDisable floating point optimizations that ignore the IEEE signedness of zero.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-signed-zeros"), maplecl::kHide); + +maplecl::Option oFStackLimit({"-fstack-limit"}, + " -fstack-limit \t\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-stack-limit"), maplecl::kHide); + +maplecl::Option oFThreadsafeStatics({"-fthreadsafe-statics"}, + " -fthreadsafe-statics \tDo not generate thread-safe code for initializing local statics.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-threadsafe-statics"), maplecl::kHide); + +maplecl::Option oFToplevelReorder({"-ftoplevel-reorder"}, + " -ftoplevel-reorder \tReorder top level functions, variables, and asms.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-toplevel-reorder"), maplecl::kHide); + +maplecl::Option oFTrappingMath({"-ftrapping-math"}, + " -ftrapping-math \tAssume floating-point operations can trap.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-trapping-math"), maplecl::kHide); + +maplecl::Option oFUseCxaGetExceptionPtr({"-fuse-cxa-get-exception-ptr"}, + " -fuse-cxa-get-exception-ptr \tUse __cxa_get_exception_ptr in exception handling.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-use-cxa-get-exception-ptr"), maplecl::kHide); + +maplecl::Option oFWeak({"-fweak"}, + " -fweak \tEmit common-like symbols as weak symbols.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-weak"), maplecl::kHide); + +maplecl::Option oFnoWritableRelocatedRdata({"-fno-writable-relocated-rdata"}, + " -fno-writable-relocated-rdata \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFZeroInitializedInBss({"-fzero-initialized-in-bss"}, + " -fzero-initialized-in-bss \tPut zero initialized data in the bss section.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-zero-initialized-in-bss"), maplecl::kHide); + +maplecl::Option oFnonCallExceptions({"-fnon-call-exceptions"}, + " -fnon-call-exceptions \tSupport synchronous non-call exceptions.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-non-call-exceptions"), maplecl::kHide); + +maplecl::Option oFnothrowOpt({"-fnothrow-opt"}, + " -fnothrow-opt \tTreat a throw() exception specification as noexcept to improve code size.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-nothrow-opt"), maplecl::kHide); + +maplecl::Option oFobjcCallCxxCdtors({"-fobjc-call-cxx-cdtors"}, + " -fobjc-call-cxx-cdtors \tGenerate special Objective-C methods to initialize/destroy non-POD C++ ivars\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-objc-call-cxx-cdtors"), maplecl::kHide); + +maplecl::Option oFobjcDirectDispatch({"-fobjc-direct-dispatch"}, + " -fobjc-direct-dispatch \tAllow fast jumps to the message dispatcher.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-objc-direct-dispatch"), maplecl::kHide); + +maplecl::Option oFobjcExceptions({"-fobjc-exceptions"}, + " -fobjc-exceptions \tEnable Objective-C exception and synchronization syntax.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-objc-exceptions"), maplecl::kHide); + +maplecl::Option oFobjcGc({"-fobjc-gc"}, + " -fobjc-gc \tEnable garbage collection (GC) in Objective-C/Objective-C++ programs.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-objc-gc"), maplecl::kHide); + +maplecl::Option oFobjcNilcheck({"-fobjc-nilcheck"}, + " -fobjc-nilcheck \tEnable inline checks for nil receivers with the NeXT runtime and ABI version 2.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-fobjc-nilcheck"), maplecl::kHide); + +maplecl::Option oFobjcSjljExceptions({"-fobjc-sjlj-exceptions"}, + " -fobjc-sjlj-exceptions \tEnable Objective-C setjmp exception handling runtime.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-objc-sjlj-exceptions"), maplecl::kHide); + +maplecl::Option oFobjcStd({"-fobjc-std=objc1"}, + " -fobjc-std \tConform to the Objective-C 1.0 language as implemented in GCC 4.0.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFopenacc({"-fopenacc"}, + " -fopenacc \tEnable OpenACC.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-openacc"), maplecl::kHide); + +maplecl::Option oFopenmp({"-fopenmp"}, + " -fopenmp \tEnable OpenMP (implies -frecursive in Fortran).\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-openmp"), maplecl::kHide); + +maplecl::Option oFopenmpSimd({"-fopenmp-simd"}, + " -fopenmp-simd \tEnable OpenMP's SIMD directives.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-openmp-simd"), maplecl::kHide); + +maplecl::Option oFoptInfo({"-fopt-info"}, + " -fopt-info \tEnable all optimization info dumps on stderr.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-opt-info"), maplecl::kHide); + +maplecl::Option oFoptimizeStrlen({"-foptimize-strlen"}, + " -foptimize-strlen \tEnable string length optimizations on trees.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-foptimize-strlen"), maplecl::kHide); + +maplecl::Option oForce_cpusubtype_ALL({"-force_cpusubtype_ALL"}, + " -force_cpusubtype_ALL \tThis causes GCC's output file to have the 'ALL' subtype, instead of one " + "controlled by the -mcpu or -march option.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oForce_flat_namespace({"-force_flat_namespace"}, + " -force_flat_namespace \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFpackStruct({"-fpack-struct"}, + " -fpack-struct \tPack structure members together without holes.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-pack-struct"), maplecl::kHide); + +maplecl::Option oFpartialInlining({"-fpartial-inlining"}, + " -fpartial-inlining \tPerform partial inlining.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-partial-inlining"), maplecl::kHide); + +maplecl::Option oFpccStructReturn({"-fpcc-struct-return"}, + " -fpcc-struct-return \tReturn small aggregates in memory\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-pcc-struct-return"), maplecl::kHide); + +maplecl::Option oFpchDeps({"-fpch-deps"}, + " -fpch-deps \tWhen using precompiled headers (see Precompiled Headers), this flag causes " + "the dependency-output flags to also list the files from the precompiled header's dependencies.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-pch-deps"), maplecl::kHide); + +maplecl::Option oFnoPchPreprocess({"-fno-pch-preprocess"}, + " -fno-pch-preprocess \tLook for and use PCH files even when preprocessing.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFpeelLoops({"-fpeel-loops"}, + " -fpeel-loops \tPerform loop peeling.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-peel-loops"), maplecl::kHide); + +maplecl::Option oFpermissive({"-fpermissive"}, + " -fpermissive \tDowngrade conformance errors to warnings.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-permissive"), maplecl::kHide); + +maplecl::Option oFplan9Extensions({"-fplan9-extensions"}, + " -fplan9-extensions \tEnable Plan 9 language extensions.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-fplan9-extensions"), maplecl::kHide); + +maplecl::Option oFpostIpaMemReport({"-fpost-ipa-mem-report"}, + " -fpost-ipa-mem-report \tReport on memory allocation before interprocedural optimization.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-post-ipa-mem-report"), maplecl::kHide); + +maplecl::Option oFpreIpaMemReport({"-fpre-ipa-mem-report"}, + " -fpre-ipa-mem-report \tReport on memory allocation before interprocedural optimization.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-pre-ipa-mem-report"), maplecl::kHide); + +maplecl::Option oFpredictiveCommoning({"-fpredictive-commoning"}, + " -fpredictive-commoning \tRun predictive commoning optimization.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-fpredictive-commoning"), maplecl::kHide); + +maplecl::Option oFprefetchLoopArrays({"-fprefetch-loop-arrays"}, + " -fprefetch-loop-arrays \tGenerate prefetch instructions\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-prefetch-loop-arrays"), maplecl::kHide); + +maplecl::Option oFpreprocessed({"-fpreprocessed"}, + " -fpreprocessed \tTreat the input file as already preprocessed.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-preprocessed"), maplecl::kHide); + +maplecl::Option oFprofileArcs({"-fprofile-arcs"}, + " -fprofile-arcs \tInsert arc-based program profiling code.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-profile-arcs"), maplecl::kHide); + +maplecl::Option oFprofileCorrection({"-fprofile-correction"}, + " -fprofile-correction \tEnable correction of flow inconsistent profile data input.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-profile-correction"), maplecl::kHide); + +maplecl::Option oFprofileGenerate({"-fprofile-generate"}, + " -fprofile-generate \tEnable common options for generating profile info for profile feedback directed " + "optimizations.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-profile-generate"), maplecl::kHide); + +maplecl::Option oFprofileReorderFunctions({"-fprofile-reorder-functions"}, + " -fprofile-reorder-functions \tEnable function reordering that improves code placement.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-profile-reorder-functions"), maplecl::kHide); + +maplecl::Option oFprofileReport({"-fprofile-report"}, + " -fprofile-report \tReport on consistency of profile.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-profile-report"), maplecl::kHide); + +maplecl::Option oFprofileUse({"-fprofile-use"}, + " -fprofile-use \tEnable common options for performing profile feedback directed optimizations.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-profile-use"), maplecl::kHide); + +maplecl::Option oFprofileValues({"-fprofile-values"}, + " -fprofile-values \tInsert code to profile values of expressions.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-profile-values"), maplecl::kHide); + +maplecl::Option oFpu({"-fpu"}, + " -fpu \tEnables (-fpu) or disables (-nofpu) the use of RX floating-point hardware. \n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-nofpu"), maplecl::kHide); + +maplecl::Option oFrandomSeed({"-frandom-seed"}, + " -frandom-seed \tMake compile reproducible using .\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-random-seed"), maplecl::kHide); + +maplecl::Option oFreciprocalMath({"-freciprocal-math"}, + " -freciprocal-math \tSame as -fassociative-math for expressions which include division.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-reciprocal-math"), maplecl::kHide); + +maplecl::Option oFrecordGccSwitches({"-frecord-gcc-switches"}, + " -frecord-gcc-switches \tRecord gcc command line switches in the object file.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-record-gcc-switches"), maplecl::kHide); + +maplecl::Option oFree({"-free"}, + " -free \tTurn on Redundant Extensions Elimination pass.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-ree"), maplecl::kHide); + +maplecl::Option oFrenameRegisters({"-frename-registers"}, + " -frename-registers \tPerform a register renaming optimization pass.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-rename-registers"), maplecl::kHide); + +maplecl::Option oFreorderBlocks({"-freorder-blocks"}, + " -freorder-blocks \tReorder basic blocks to improve code placement.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-reorder-blocks"), maplecl::kHide); + + +maplecl::Option oFreorderBlocksAndPartition({"-freorder-blocks-and-partition"}, + " -freorder-blocks-and-partition \tReorder basic blocks and partition into hot and cold sections.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-reorder-blocks-and-partition"), maplecl::kHide); + +maplecl::Option oFreorderFunctions({"-freorder-functions"}, + " -freorder-functions \tReorder functions to improve code placement.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-reorder-functions"), maplecl::kHide); + +maplecl::Option oFreplaceObjcClasses({"-freplace-objc-classes"}, + " -freplace-objc-classes \tUsed in Fix-and-Continue mode to indicate that object files may be swapped in " + "at runtime.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-replace-objc-classes"), maplecl::kHide); + +maplecl::Option oFrepo({"-frepo"}, + " -frepo \tEnable automatic template instantiation.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-repo"), maplecl::kHide); + +maplecl::Option oFreportBug({"-freport-bug"}, + " -freport-bug \tCollect and dump debug information into temporary file if ICE in C/C++ " + "compiler occurred.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-report-bug"), maplecl::kHide); + +maplecl::Option oFrerunCseAfterLoop({"-frerun-cse-after-loop"}, + " -frerun-cse-after-loop \tAdd a common subexpression elimination pass after loop optimizations.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-rerun-cse-after-loop"), maplecl::kHide); + +maplecl::Option oFrescheduleModuloScheduledLoops({"-freschedule-modulo-scheduled-loops"}, + " -freschedule-modulo-scheduled-loops \tEnable/Disable the traditional scheduling in loops that already " + "passed modulo scheduling.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-reschedule-modulo-scheduled-loops"), maplecl::kHide); + +maplecl::Option oFroundingMath({"-frounding-math"}, + " -frounding-math \tDisable optimizations that assume default FP rounding behavior.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-rounding-math"), maplecl::kHide); + +maplecl::Option oFsanitizeAddressUseAfterScope({"-fsanitize-address-use-after-scope"}, + " -fsanitize-address-use-after-scope \tEnable sanitization of local variables to detect use-after-scope bugs.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-sanitize-address-use-after-scope"), maplecl::kHide); + +maplecl::Option oFsanitizeCoverageTracePc({"-fsanitize-coverage=trace-pc"}, + " -fsanitize-coverage=trace-pc \tEnable coverage-guided fuzzing code instrumentation. Inserts call to " + "__sanitizer_cov_trace_pc into every basic block.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-sanitize-coverage=trace-pc"), maplecl::kHide); + +maplecl::Option oFsanitizeRecover({"-fsanitize-recover"}, + " -fsanitize-recover \tAfter diagnosing undefined behavior attempt to continue execution.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-sanitize-recover"), maplecl::kHide); + +maplecl::Option oFsanitizeUndefinedTrapOnError({"-fsanitize-undefined-trap-on-error"}, + " -fsanitize-undefined-trap-on-error \tUse trap instead of a library function for undefined behavior " + "sanitization.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-sanitize-undefined-trap-on-error"), maplecl::kHide); + +maplecl::Option oFschedCriticalPathHeuristic({"-fsched-critical-path-heuristic"}, + " -fsched-critical-path-heuristic \tEnable the critical path heuristic in the scheduler.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-sched-critical-path-heuristic"), maplecl::kHide); + +maplecl::Option oFschedDepCountHeuristic({"-fsched-dep-count-heuristic"}, + " -fsched-dep-count-heuristic \tEnable the dependent count heuristic in the scheduler.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-sched-dep-count-heuristic"), maplecl::kHide); + +maplecl::Option oFschedGroupHeuristic({"-fsched-group-heuristic"}, + " -fsched-group-heuristic \tEnable the group heuristic in the scheduler.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-sched-group-heuristic"), maplecl::kHide); + +maplecl::Option oFschedLastInsnHeuristic({"-fsched-last-insn-heuristic"}, + " -fsched-last-insn-heuristic \tEnable the last instruction heuristic in the scheduler.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-sched-last-insn-heuristic"), maplecl::kHide); + +maplecl::Option oFschedPressure({"-fsched-pressure"}, + " -fsched-pressure \tEnable register pressure sensitive insn scheduling.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-sched-pressure"), maplecl::kHide); + +maplecl::Option oFschedRankHeuristic({"-fsched-rank-heuristic"}, + " -fsched-rank-heuristic \tEnable the rank heuristic in the scheduler.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-sched-rank-heuristic"), maplecl::kHide); + +maplecl::Option oFschedSpecInsnHeuristic({"-fsched-spec-insn-heuristic"}, + " -fsched-spec-insn-heuristic \tEnable the speculative instruction heuristic in the scheduler.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-sched-spec-insn-heuristic"), maplecl::kHide); + +maplecl::Option oFschedSpecLoad({"-fsched-spec-load"}, + " -fsched-spec-load \tAllow speculative motion of some loads.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-sched-spec-load"), maplecl::kHide); + +maplecl::Option oFschedSpecLoadDangerous({"-fsched-spec-load-dangerous"}, + " -fsched-spec-load-dangerous \tAllow speculative motion of more loads.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-sched-spec-load-dangerous"), maplecl::kHide); + +maplecl::Option oFschedStalledInsns({"-fsched-stalled-insns"}, + " -fsched-stalled-insns \tAllow premature scheduling of queued insns.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-sched-stalled-insns"), maplecl::kHide); + +maplecl::Option oFschedStalledInsnsDep({"-fsched-stalled-insns-dep"}, + " -fsched-stalled-insns-dep \tSet dependence distance checking in premature scheduling of queued insns.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-sched-stalled-insns-dep"), maplecl::kHide); + +maplecl::Option oFschedVerbose({"-fsched-verbose"}, + " -fsched-verbose \tSet the verbosity level of the scheduler.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-sched-verbose"), maplecl::kHide); + +maplecl::Option oFsched2UseSuperblocks({"-fsched2-use-superblocks"}, + " -fsched2-use-superblocks \tIf scheduling post reload\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-sched2-use-superblocks"), maplecl::kHide); + +maplecl::Option oFscheduleFusion({"-fschedule-fusion"}, + " -fschedule-fusion \tPerform a target dependent instruction fusion optimization pass.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-schedule-fusion"), maplecl::kHide); + +maplecl::Option oFscheduleInsns({"-fschedule-insns"}, + " -fschedule-insns \tReschedule instructions before register allocation.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-schedule-insns"), maplecl::kHide); + +maplecl::Option oFscheduleInsns2({"-fschedule-insns2"}, + " -fschedule-insns2 \tReschedule instructions after register allocation.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-schedule-insns2"), maplecl::kHide); + +maplecl::Option oFsectionAnchors({"-fsection-anchors"}, + " -fsection-anchors \tAccess data in the same section from shared anchor points.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-fsection-anchors"), maplecl::kHide); + +maplecl::Option oFselSchedPipelining({"-fsel-sched-pipelining"}, + " -fsel-sched-pipelining \tPerform software pipelining of inner loops during selective scheduling.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-sel-sched-pipelining"), maplecl::kHide); + +maplecl::Option oFselSchedPipeliningOuterLoops({"-fsel-sched-pipelining-outer-loops"}, + " -fsel-sched-pipelining-outer-loops \tPerform software pipelining of outer loops during selective scheduling.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-sel-sched-pipelining-outer-loops"), maplecl::kHide); + +maplecl::Option oFselectiveScheduling({"-fselective-scheduling"}, + " -fselective-scheduling \tSchedule instructions using selective scheduling algorithm.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-selective-scheduling"), maplecl::kHide); + +maplecl::Option oFselectiveScheduling2({"-fselective-scheduling2"}, + " -fselective-scheduling2 \tRun selective scheduling after reload.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-selective-scheduling2"), maplecl::kHide); + +maplecl::Option oFshortEnums({"-fshort-enums"}, + " -fshort-enums \tUse the narrowest integer type possible for enumeration types.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-short-enums"), maplecl::kHide); + +maplecl::Option oFshortWchar({"-fshort-wchar"}, + " -fshort-wchar \tForce the underlying type for 'wchar_t' to be 'unsigned short'.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-short-wchar"), maplecl::kHide); + +maplecl::Option oFshrinkWrap({"-fshrink-wrap"}, + " -fshrink-wrap \tEmit function prologues only before parts of the function that need it\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-shrink-wrap"), maplecl::kHide); + +maplecl::Option oFshrinkWrapSeparate({"-fshrink-wrap-separate"}, + " -fshrink-wrap-separate \tShrink-wrap parts of the prologue and epilogue separately.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-shrink-wrap-separate"), maplecl::kHide); + +maplecl::Option oFsignalingNans({"-fsignaling-nans"}, + " -fsignaling-nans \tDisable optimizations observable by IEEE signaling NaNs.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-signaling-nans"), maplecl::kHide); + +maplecl::Option oFsignedBitfields({"-fsigned-bitfields"}, + " -fsigned-bitfields \tWhen 'signed' or 'unsigned' is not given make the bitfield signed.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-signed-bitfields"), maplecl::kHide); + +maplecl::Option oFsimdCostModel({"-fsimd-cost-model"}, + " -fsimd-cost-model \t\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-simd-cost-model"), maplecl::kHide); + +maplecl::Option oFsinglePrecisionConstant({"-fsingle-precision-constant"}, + " -fsingle-precision-constant \tConvert floating point constants to single precision constants.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-single-precision-constant"), maplecl::kHide); + +maplecl::Option oFsizedDeallocation({"-fsized-deallocation"}, + " -fsized-deallocation \tEnable C++14 sized deallocation support.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-sized-deallocation"), maplecl::kHide); + +maplecl::Option oFsplitIvsInUnroller({"-fsplit-ivs-in-unroller"}, + " -fsplit-ivs-in-unroller \tSplit lifetimes of induction variables when loops are unrolled.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-split-ivs-in-unroller"), maplecl::kHide); + +maplecl::Option oFsplitLoops({"-fsplit-loops"}, + " -fsplit-loops \tPerform loop splitting.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-split-loops"), maplecl::kHide); + +maplecl::Option oFsplitPaths({"-fsplit-paths"}, + " -fsplit-paths \tSplit paths leading to loop backedges.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-split-paths"), maplecl::kHide); + +maplecl::Option oFsplitStack({"-fsplit-stack"}, + " -fsplit-stack \tGenerate discontiguous stack frames.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-split-stack"), maplecl::kHide); + +maplecl::Option oFsplitWideTypes({"-fsplit-wide-types"}, + " -fsplit-wide-types \tSplit wide types into independent registers.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-split-wide-types"), maplecl::kHide); + +maplecl::Option oFssaBackprop({"-fssa-backprop"}, + " -fssa-backprop \tEnable backward propagation of use properties at the SSA level.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-ssa-backprop"), maplecl::kHide); + +maplecl::Option oFssaPhiopt({"-fssa-phiopt"}, + " -fssa-phiopt \tOptimize conditional patterns using SSA PHI nodes.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-ssa-phiopt"), maplecl::kHide); + +maplecl::Option oFssoStruct({"-fsso-struct"}, + " -fsso-struct \tSet the default scalar storage order.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-sso-struct"), maplecl::kHide); + +maplecl::Option oFstackCheck({"-fstack-check"}, + " -fstack-check \tInsert stack checking code into the program. Same as -fstack-check=specific.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-stack-check"), maplecl::kHide); + +maplecl::Option oFstackProtector({"-fstack-protector"}, + " -fstack-protector \tUse propolice as a stack protection method.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-stack-protector"), maplecl::kHide); + +maplecl::Option oFstackProtectorExplicit({"-fstack-protector-explicit"}, + " -fstack-protector-explicit \tUse stack protection method only for functions with the stack_protect " + "attribute.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-stack-protector-explicit"), maplecl::kHide); + +maplecl::Option oFstackUsage({"-fstack-usage"}, + " -fstack-usage \tOutput stack usage information on a per-function basis.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-stack-usage"), maplecl::kHide); + +maplecl::Option oFstats({"-fstats"}, + " -fstats \tDisplay statistics accumulated during compilation.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-stats"), maplecl::kHide); + +maplecl::Option oFstdargOpt({"-fstdarg-opt"}, + " -fstdarg-opt \tOptimize amount of stdarg registers saved to stack at start of function.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-stdarg-opt"), maplecl::kHide); + +maplecl::Option oFstoreMerging({"-fstore-merging"}, + " -fstore-merging \tMerge adjacent stores.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-store-merging"), maplecl::kHide); + +maplecl::Option oFstrictEnums({"-fstrict-enums"}, + " -fstrict-enums \tAssume that values of enumeration type are always within the minimum range " + "of that type.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-strict-enums"), maplecl::kHide); + +maplecl::Option oFstrictOverflow({"-fstrict-overflow"}, + " -fstrict-overflow \tTreat signed overflow as undefined.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-strict-overflow"), maplecl::kHide); + +maplecl::Option oFstrictVolatileBitfields({"-fstrict-volatile-bitfields"}, + " -fstrict-volatile-bitfields \tForce bitfield accesses to match their type width.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-strict-volatile-bitfields"), maplecl::kHide); + +maplecl::Option oFsyncLibcalls({"-fsync-libcalls"}, + " -fsync-libcalls \tImplement __atomic operations via libcalls to legacy __sync functions.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-sync-libcalls"), maplecl::kHide); + +maplecl::Option oFsyntaxOnly({"-fsyntax-only"}, + " -fsyntax-only \tCheck for syntax errors\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-syntax-only"), maplecl::kHide); + +maplecl::Option oFtestCoverage({"-ftest-coverage"}, + " -ftest-coverage \tCreate data files needed by \"gcov\".\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-test-coverage"), maplecl::kHide); + +maplecl::Option oFthreadJumps({"-fthread-jumps"}, + " -fthread-jumps \tPerform jump threading optimizations.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-thread-jumps"), maplecl::kHide); + +maplecl::Option oFtimeReport({"-ftime-report"}, + " -ftime-report \tReport the time taken by each compiler pass.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-time-report"), maplecl::kHide); + +maplecl::Option oFtimeReportDetails({"-ftime-report-details"}, + " -ftime-report-details \tRecord times taken by sub-phases separately.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-time-report-details"), maplecl::kHide); + +maplecl::Option oFtracer({"-ftracer"}, + " -ftracer \tPerform superblock formation via tail duplication.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tracer"), maplecl::kHide); + +maplecl::Option oFtrackMacroExpansion({"-ftrack-macro-expansion"}, + " -ftrack-macro-expansion \tTrack locations of tokens across macro expansions.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-track-macro-expansion"), maplecl::kHide); + +maplecl::Option oFtrampolines({"-ftrampolines"}, + " -ftrampolines \tFor targets that normally need trampolines for nested functions\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-trampolines"), maplecl::kHide); + +maplecl::Option oFtrapv({"-ftrapv"}, + " -ftrapv \tTrap for signed overflow in addition\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-trapv"), maplecl::kHide); + +maplecl::Option oFtreeBitCcp({"-ftree-bit-ccp"}, + " -ftree-bit-ccp \tEnable SSA-BIT-CCP optimization on trees.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-bit-ccp"), maplecl::kHide); + +maplecl::Option oFtreeBuiltinCallDce({"-ftree-builtin-call-dce"}, + " -ftree-builtin-call-dce \tEnable conditional dead code elimination for builtin calls.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-builtin-call-dce"), maplecl::kHide); + +maplecl::Option oFtreeCcp({"-ftree-ccp"}, + " -ftree-ccp \tEnable SSA-CCP optimization on trees.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-ccp"), maplecl::kHide); + +maplecl::Option oFtreeCh({"-ftree-ch"}, + " -ftree-ch \tEnable loop header copying on trees.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-ch"), maplecl::kHide); + +maplecl::Option oFtreeCoalesceVars({"-ftree-coalesce-vars"}, + " -ftree-coalesce-vars \tEnable SSA coalescing of user variables.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-coalesce-vars"), maplecl::kHide); + +maplecl::Option oFtreeCopyProp({"-ftree-copy-prop"}, + " -ftree-copy-prop \tEnable copy propagation on trees.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-copy-prop"), maplecl::kHide); + +maplecl::Option oFtreeDce({"-ftree-dce"}, + " -ftree-dce \tEnable SSA dead code elimination optimization on trees.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-dce"), maplecl::kHide); + +maplecl::Option oFtreeDominatorOpts({"-ftree-dominator-opts"}, + " -ftree-dominator-opts \tEnable dominator optimizations.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-dominator-opts"), maplecl::kHide); + +maplecl::Option oFtreeDse({"-ftree-dse"}, + " -ftree-dse \tEnable dead store elimination.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-dse"), maplecl::kHide); + +maplecl::Option oFtreeForwprop({"-ftree-forwprop"}, + " -ftree-forwprop \tEnable forward propagation on trees.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-forwprop"), maplecl::kHide); + +maplecl::Option oFtreeFre({"-ftree-fre"}, + " -ftree-fre \tEnable Full Redundancy Elimination (FRE) on trees.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-fre"), maplecl::kHide); + +maplecl::Option oFtreeLoopDistributePatterns({"-ftree-loop-distribute-patterns"}, + " -ftree-loop-distribute-patterns \tEnable loop distribution for patterns transformed into a library call.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-loop-distribute-patterns"), maplecl::kHide); + +maplecl::Option oFtreeLoopDistribution({"-ftree-loop-distribution"}, + " -ftree-loop-distribution \tEnable loop distribution on trees.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-loop-distribution"), maplecl::kHide); + +maplecl::Option oFtreeLoopIfConvert({"-ftree-loop-if-convert"}, + " -ftree-loop-if-convert \tConvert conditional jumps in innermost loops to branchless equivalents.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-loop-if-convert"), maplecl::kHide); + +maplecl::Option oFtreeLoopIm({"-ftree-loop-im"}, + " -ftree-loop-im \tEnable loop invariant motion on trees.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-loop-im"), maplecl::kHide); + +maplecl::Option oFtreeLoopIvcanon({"-ftree-loop-ivcanon"}, + " -ftree-loop-ivcanon \tCreate canonical induction variables in loops.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-loop-ivcanon"), maplecl::kHide); + +maplecl::Option oFtreeLoopLinear({"-ftree-loop-linear"}, + " -ftree-loop-linear \tEnable loop nest transforms. Same as -floop-nest-optimize.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-loop-linear"), maplecl::kHide); + +maplecl::Option oFtreeLoopOptimize({"-ftree-loop-optimize"}, + " -ftree-loop-optimize \tEnable loop optimizations on tree level.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-loop-optimize"), maplecl::kHide); + +maplecl::Option oFtreeLoopVectorize({"-ftree-loop-vectorize"}, + " -ftree-loop-vectorize \tEnable loop vectorization on trees.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-loop-vectorize"), maplecl::kHide); + +maplecl::Option oFtreeParallelizeLoops({"-ftree-parallelize-loops"}, + " -ftree-parallelize-loops \t\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-parallelize-loops"), maplecl::kHide); + +maplecl::Option oFtreePartialPre({"-ftree-partial-pre"}, + " -ftree-partial-pre \tIn SSA-PRE optimization on trees\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-partial-pre"), maplecl::kHide); + +maplecl::Option oFtreePhiprop({"-ftree-phiprop"}, + " -ftree-phiprop \tEnable hoisting loads from conditional pointers.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-phiprop"), maplecl::kHide); + +maplecl::Option oFtreePre({"-ftree-pre"}, + " -ftree-pre \tEnable SSA-PRE optimization on trees.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-pre"), maplecl::kHide); + +maplecl::Option oFtreePta({"-ftree-pta"}, + " -ftree-pta \tPerform function-local points-to analysis on trees.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-pta"), maplecl::kHide); + +maplecl::Option oFtreeReassoc({"-ftree-reassoc"}, + " -ftree-reassoc \tEnable reassociation on tree level.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-reassoc"), maplecl::kHide); + +maplecl::Option oFtreeSink({"-ftree-sink"}, + " -ftree-sink \tEnable SSA code sinking on trees.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-sink"), maplecl::kHide); + +maplecl::Option oFtreeSlpVectorize({"-ftree-slp-vectorize"}, + " -ftree-slp-vectorize \tEnable basic block vectorization (SLP) on trees.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-slp-vectorize"), maplecl::kHide); + +maplecl::Option oFtreeSlsr({"-ftree-slsr"}, + " -ftree-slsr \tPerform straight-line strength reduction.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-slsr"), maplecl::kHide); + +maplecl::Option oFtreeSra({"-ftree-sra"}, + " -ftree-sra \tPerform scalar replacement of aggregates.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-sra"), maplecl::kHide); + +maplecl::Option oFtreeSwitchConversion({"-ftree-switch-conversion"}, + " -ftree-switch-conversion \tPerform conversions of switch initializations.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-switch-conversion"), maplecl::kHide); + +maplecl::Option oFtreeTailMerge({"-ftree-tail-merge"}, + " -ftree-tail-merge \tEnable tail merging on trees.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-tail-merge"), maplecl::kHide); + +maplecl::Option oFtreeTer({"-ftree-ter"}, + " -ftree-ter \tReplace temporary expressions in the SSA->normal pass.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-ter"), maplecl::kHide); + +maplecl::Option oFtreeVrp({"-ftree-vrp"}, + " -ftree-vrp \tPerform Value Range Propagation on trees.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tree-vrp"), maplecl::kHide); + +maplecl::Option oFunconstrainedCommons({"-funconstrained-commons"}, + " -funconstrained-commons \tAssume common declarations may be overridden with ones with a larger " + "trailing array.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-unconstrained-commons"), maplecl::kHide); + +maplecl::Option oFunitAtATime({"-funit-at-a-time"}, + " -funit-at-a-time \tCompile whole compilation unit at a time.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-unit-at-a-time"), maplecl::kHide); + +maplecl::Option oFunrollAllLoops({"-funroll-all-loops"}, + " -funroll-all-loops \tPerform loop unrolling for all loops.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-unroll-all-loops"), maplecl::kHide); + +maplecl::Option oFunrollLoops({"-funroll-loops"}, + " -funroll-loops \tPerform loop unrolling when iteration count is known.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-unroll-loops"), maplecl::kHide); + +maplecl::Option oFunsafeMathOptimizations({"-funsafe-math-optimizations"}, + " -funsafe-math-optimizations \tAllow math optimizations that may violate IEEE or ISO standards.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-unsafe-math-optimizations"), maplecl::kHide); + +maplecl::Option oFunsignedBitfields({"-funsigned-bitfields"}, + " -funsigned-bitfields \tWhen \"signed\" or \"unsigned\" is not given make the bitfield unsigned.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-unsigned-bitfields"), maplecl::kHide); + +maplecl::Option oFunswitchLoops({"-funswitch-loops"}, + " -funswitch-loops \tPerform loop unswitching.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-unswitch-loops"), maplecl::kHide); + +maplecl::Option oFunwindTables({"-funwind-tables"}, + " -funwind-tables \tJust generate unwind tables for exception handling.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-unwind-tables"), maplecl::kHide); + +maplecl::Option oFuseCxaAtexit({"-fuse-cxa-atexit"}, + " -fuse-cxa-atexit \tUse __cxa_atexit to register destructors.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-use-cxa-atexit"), maplecl::kHide); + +maplecl::Option oFuseLinkerPlugin({"-fuse-linker-plugin"}, + " -fuse-linker-plugin \tEnables the use of a linker plugin during link-time optimization.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-use-linker-plugin"), maplecl::kHide); + +maplecl::Option oFvarTracking({"-fvar-tracking"}, + " -fvar-tracking \tPerform variable tracking.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-var-tracking"), maplecl::kHide); + +maplecl::Option oFvarTrackingAssignments({"-fvar-tracking-assignments"}, + " -fvar-tracking-assignments \tPerform variable tracking by annotating assignments.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-var-tracking-assignments"), maplecl::kHide); + +maplecl::Option oFvarTrackingAssignmentsToggle({"-fvar-tracking-assignments-toggle"}, + " -fvar-tracking-assignments-toggle \tToggle -fvar-tracking-assignments.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-var-tracking-assignments-toggle"), maplecl::kHide); + +maplecl::Option oFvariableExpansionInUnroller({"-fvariable-expansion-in-unroller"}, + " -fvariable-expansion-in-unroller \tApply variable expansion when loops are unrolled.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-variable-expansion-in-unroller"), maplecl::kHide); + +maplecl::Option oFvectCostModel({"-fvect-cost-model"}, + " -fvect-cost-model \tEnables the dynamic vectorizer cost model. Preserved for backward " + "compatibility.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-vect-cost-model"), maplecl::kHide); + +maplecl::Option oFverboseAsm({"-fverbose-asm"}, + " -fverbose-asm \tAdd extra commentary to assembler output.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-verbose-asm"), maplecl::kHide); + +maplecl::Option oFvisibilityInlinesHidden({"-fvisibility-inlines-hidden"}, + " -fvisibility-inlines-hidden \tMarks all inlined functions and methods as having hidden visibility.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-visibility-inlines-hidden"), maplecl::kHide); + +maplecl::Option oFvisibilityMsCompat({"-fvisibility-ms-compat"}, + " -fvisibility-ms-compat \tChanges visibility to match Microsoft Visual Studio by default.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-visibility-ms-compat"), maplecl::kHide); + +maplecl::Option oFvpt({"-fvpt"}, + " -fvpt \tUse expression value profiles in optimizations.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-vpt"), maplecl::kHide); + +maplecl::Option oFvtableVerify({"-fvtable-verify"}, + " -fvtable-verify \t\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-vtable-verify"), maplecl::kHide); + +maplecl::Option oFvtvCounts({"-fvtv-counts"}, + " -fvtv-counts \tOutput vtable verification counters.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-vtv-counts"), maplecl::kHide); + +maplecl::Option oFvtvDebug({"-fvtv-debug"}, + " -fvtv-debug \tOutput vtable verification pointer sets information.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-vtv-debug"), maplecl::kHide); + +maplecl::Option oFweb({"-fweb"}, + " -fweb \tConstruct webs and split unrelated uses of single variable.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-web"), maplecl::kHide); + +maplecl::Option oFwholeProgram({"-fwhole-program"}, + " -fwhole-program \tPerform whole program optimizations.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-whole-program"), maplecl::kHide); + +maplecl::Option oMwarnDynamicstack({"-mwarn-dynamicstack"}, + " -mwarn-dynamicstack \tEmit a warning if the function calls alloca or uses dynamically-sized arrays.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMwarnMcu({"-mwarn-mcu"}, + " -mwarn-mcu \tThis option enables or disables warnings about conflicts between the MCU name " + "specified by the -mmcu option and the ISA set by the -mcpu option and/or the hardware multiply support set by " + "the -mhwmult option.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-warn-mcu"), maplecl::kHide); + +maplecl::Option oMwarnMultipleFastInterrupts({"-mwarn-multiple-fast-interrupts"}, + " -mwarn-multiple-fast-interrupts \t\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-warn-multiple-fast-interrupts"), maplecl::kHide); + +maplecl::Option oMwarnReloc({"-mwarn-reloc"}, + " -mwarn-reloc \t-mwarn-reloc generates a warning instead.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-merror-reloc"), maplecl::kHide); + +maplecl::Option oMwideBitfields({"-mwide-bitfields"}, + " -mwide-bitfields \t\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-wide-bitfields"), maplecl::kHide); + +maplecl::Option oMwin32({"-mwin32"}, + " -mwin32 \tThis option is available for Cygwin and MinGW targets.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMwindows({"-mwindows"}, + " -mwindows \tThis option is available for MinGW targets.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMwordRelocations({"-mword-relocations"}, + " -mword-relocations \tOnly generate absolute relocations on word-sized values (i.e. R_ARM_ABS32).\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMx32({"-mx32"}, + " -mx32 \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMxgot({"-mxgot"}, + " -mxgot \tLift (do not lift) the usual restrictions on the size of the global offset " + "table.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-xgot"), maplecl::kHide); + +maplecl::Option oMxilinxFpu({"-mxilinx-fpu"}, + " -mxilinx-fpu \tPerform optimizations for the floating-point unit on Xilinx PPC 405/440.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMxlBarrelShift({"-mxl-barrel-shift"}, + " -mxl-barrel-shift \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMxlCompat({"-mxl-compat"}, + " -mxl-compat \tProduce code that conforms more closely to IBM XL compiler semantics when " + "using AIX-compatible ABI. \n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-xl-compat"), maplecl::kHide); + +maplecl::Option oMxlFloatConvert({"-mxl-float-convert"}, + " -mxl-float-convert \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMxlFloatSqrt({"-mxl-float-sqrt"}, + " -mxl-float-sqrt \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMxlGpOpt({"-mxl-gp-opt"}, + " -mxl-gp-opt \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMxlMultiplyHigh({"-mxl-multiply-high"}, + " -mxl-multiply-high \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMxlPatternCompare({"-mxl-pattern-compare"}, + " -mxl-pattern-compare \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMxlReorder({"-mxl-reorder"}, + " -mxl-reorder \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMxlSoftDiv({"-mxl-soft-div"}, + " -mxl-soft-div \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMxlSoftMul({"-mxl-soft-mul"}, + " -mxl-soft-mul \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMxlStackCheck({"-mxl-stack-check"}, + " -mxl-stack-check \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMxop({"-mxop"}, + " -mxop \tThese switches enable the use of instructions in the mxop.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMxpa({"-mxpa"}, + " -mxpa \tUse the MIPS eXtended Physical Address (XPA) instructions.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-xpa"), maplecl::kHide); + +maplecl::Option oMxsave({"-mxsave"}, + " -mxsave \tThese switches enable the use of instructions in the mxsave.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMxsavec({"-mxsavec"}, + " -mxsavec \tThese switches enable the use of instructions in the mxsavec.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMxsaveopt({"-mxsaveopt"}, + " -mxsaveopt \tThese switches enable the use of instructions in the mxsaveopt.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMxsaves({"-mxsaves"}, + " -mxsaves \tThese switches enable the use of instructions in the mxsaves.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMxy({"-mxy"}, + " -mxy \tPassed down to the assembler to enable the XY memory extension. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMyellowknife({"-myellowknife"}, + " -myellowknife \tOn embedded PowerPC systems, assume that the startup module is called crt0.o " + "and the standard C libraries are libyk.a and libc.a.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMzarch({"-mzarch"}, + " -mzarch \tWhen -mzarch is specified, generate code using the instructions available on " + "z/Architecture.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + + +maplecl::Option oMzdcbranch({"-mzdcbranch"}, + " -mzdcbranch \tAssume (do not assume) that zero displacement conditional branch instructions " + "bt and bf are fast. \n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-zdcbranch"), maplecl::kHide); + +maplecl::Option oMzeroExtend({"-mzero-extend"}, + " -mzero-extend \tWhen reading data from memory in sizes shorter than 64 bits, use zero-extending" + " load instructions by default, rather than sign-extending ones.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-zero-extend"), maplecl::kHide); + +maplecl::Option oMzvector({"-mzvector"}, + " -mzvector \tThe -mzvector option enables vector language extensions and builtins using " + "instructions available with the vector extension facility introduced with the IBM z13 machine generation. \n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-zvector"), maplecl::kHide); + +maplecl::Option oNo80387({"-no-80387"}, + " -no-80387 \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oNoCanonicalPrefixes({"-no-canonical-prefixes"}, + " -no-canonical-prefixes \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oNoIntegratedCpp({"-no-integrated-cpp"}, + " -no-integrated-cpp \tPerform preprocessing as a separate pass before compilation.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oNoSysrootSuffix({"-no-sysroot-suffix"}, + " -no-sysroot-suffix \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oNoall_load({"-noall_load"}, + " -noall_load \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oNocpp({"-nocpp"}, + " -nocpp \tDisable preprocessing.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oNodevicelib({"-nodevicelib"}, + " -nodevicelib \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oNofixprebinding({"-nofixprebinding"}, + " -nofixprebinding \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oNolibdld({"-nolibdld"}, + " -nolibdld \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oNomultidefs({"-nomultidefs"}, + " -nomultidefs \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oNonStatic({"-non-static"}, + " -non-static \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oNoprebind({"-noprebind"}, + " -noprebind \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oNoseglinkedit({"-noseglinkedit"}, + " -noseglinkedit \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oNostdinc({"-nostdinc++"}, + " -nostdinc++ \tDo not search standard system include directories for C++.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oNo_dead_strip_inits_and_terms({"-no_dead_strip_inits_and_terms"}, + " -no_dead_strip_inits_and_terms \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oOfast({"-Ofast"}, + " -Ofast \tOptimize for speed disregarding exact standards compliance.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oOg({"-Og"}, + " -Og \tOptimize for debugging experience rather than speed or size.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oP({"-p"}, + " -p \tEnable function profiling.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oPagezero_size({"-pagezero_size"}, + " -pagezero_size \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oParam({"--param"}, + " --param = \tSet parameter to value. See below for a complete list of parameters.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oPassExitCodes({"-pass-exit-codes"}, + " -pass-exit-codes \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oPedantic({"-pedantic"}, + " -pedantic \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oPedanticErrors({"-pedantic-errors"}, + " -pedantic-errors \tLike -pedantic but issue them as errors.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oPg({"-pg"}, + " -pg \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oPlt({"-plt"}, + " -plt \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oPrebind({"-prebind"}, + " -prebind \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oPrebind_all_twolevel_modules({"-prebind_all_twolevel_modules"}, + " -prebind_all_twolevel_modules \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oPrintFileName({"-print-file-name"}, + " -print-file-name \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oPrintLibgccFileName({"-print-libgcc-file-name"}, + " -print-libgcc-file-name \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oPrintMultiDirectory({"-print-multi-directory"}, + " -print-multi-directory \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oPrintMultiLib({"-print-multi-lib"}, + " -print-multi-lib \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oPrintMultiOsDirectory({"-print-multi-os-directory"}, + " -print-multi-os-directory \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oPrintMultiarch({"-print-multiarch"}, + " -print-multiarch \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oPrintObjcRuntimeInfo({"-print-objc-runtime-info"}, + " -print-objc-runtime-info \tGenerate C header of platform-specific features.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oPrintProgName({"-print-prog-name"}, + " -print-prog-name \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oPrintSearchDirs({"-print-search-dirs"}, + " -print-search-dirs \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oPrintSysroot({"-print-sysroot"}, + " -print-sysroot \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oPrintSysrootHeadersSuffix({"-print-sysroot-headers-suffix"}, + " -print-sysroot-headers-suffix \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oPrivate_bundle({"-private_bundle"}, + " -private_bundle \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oPthreads({"-pthreads"}, + " -pthreads \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oQ({"-Q"}, + " -Q \tMakes the compiler print out each function name as it is compiled, and print " + "some statistics about each pass when it finishes.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oQn({"-Qn"}, + " -Qn \tRefrain from adding .ident directives to the output file (this is the default).\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oQy({"-Qy"}, + " -Qy \tIdentify the versions of each tool used by the compiler, in a .ident assembler " + "directive in the output.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oRead_only_relocs({"-read_only_relocs"}, + " -read_only_relocs \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oRemap({"-remap"}, + " -remap \tRemap file names when including files.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oSectalign({"-sectalign"}, + " -sectalign \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oSectcreate({"-sectcreate"}, + " -sectcreate \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oSectobjectsymbols({"-sectobjectsymbols"}, + " -sectobjectsymbols \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oSectorder({"-sectorder"}, + " -sectorder \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oSeg1addr({"-seg1addr"}, + " -seg1addr \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oSegaddr({"-segaddr"}, + " -segaddr \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oSeglinkedit({"-seglinkedit"}, + " -seglinkedit \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oSegprot({"-segprot"}, + " -segprot \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oSegs_read_only_addr({"-segs_read_only_addr"}, + " -segs_read_only_addr \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oSegs_read_write_addr({"-segs_read_write_addr"}, + " -segs_read_write_addr \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oSeg_addr_table({"-seg_addr_table"}, + " -seg_addr_table \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oSeg_addr_table_filename({"-seg_addr_table_filename"}, + " -seg_addr_table_filename \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oSim({"-sim"}, + " -sim \tThis option, recognized for the cris-axis-elf, arranges to link with " + "input-output functions from a simulator library\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oSim2({"-sim2"}, + " -sim2 \tLike -sim, but pass linker options to locate initialized data at " + "s0x40000000 and zero-initialized data at 0x80000000.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oSingle_module({"-single_module"}, + " -single_module \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oSub_library({"-sub_library"}, + " -sub_library \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oSub_umbrella({"-sub_umbrella"}, + " -sub_umbrella \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oTargetHelp({"-target-help"}, + " -target-help \tPrint (on the standard output) a description of target-specific command-line " + "options for each tool.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oThreads({"-threads"}, + " -threads \tAdd support for multithreading with the dce thread library under HP-UX. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oTnoAndroidCc({"-tno-android-cc"}, + " -tno-android-cc \tDisable compilation effects of -mandroid, i.e., do not enable -mbionic, -fPIC," + " -fno-exceptions and -fno-rtti by default.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oTnoAndroidLd({"-tno-android-ld"}, + " -tno-android-ld \tDisable linking effects of -mandroid, i.e., pass standard Linux linking options" + " to the linker.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oTraditional({"-traditional"}, + " -traditional \tEnable traditional preprocessing. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oTraditionalCpp({"-traditional-cpp"}, + " -traditional-cpp \tEnable traditional preprocessing.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oTwolevel_namespace({"-twolevel_namespace"}, + " -twolevel_namespace \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oUmbrella({"-umbrella"}, + " -umbrella \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oUndefined({"-undefined"}, + " -undefined \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oUnexported_symbols_list({"-unexported_symbols_list"}, + " -unexported_symbols_list \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +} \ No newline at end of file diff --git a/src/mapleall/maple_driver/src/unsupport_bool3.cpp b/src/mapleall/maple_driver/src/unsupport_bool3.cpp new file mode 100644 index 0000000000000000000000000000000000000000..2874ec7e12fe49c0a0765be51fe6580f2acb10e5 --- /dev/null +++ b/src/mapleall/maple_driver/src/unsupport_bool3.cpp @@ -0,0 +1,1641 @@ +/* + * Copyright (c) [2023] Huawei Technologies Co.,Ltd.All rights reserved. + * + * OpenArkCompiler is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * + * http://license.coscl.org.cn/MulanPSL2 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ + +#include "driver_options.h" + +namespace opts { + +maplecl::Option fPIC({"-fPIC", "--fPIC"}, + " --fPIC \tGenerate position-independent shared library in large mode.\n" + " --no-pic/-fno-pic \n", + {cgCategory, driverCategory, ldCategory}, kOptCommon | kOptLd | kOptNotFiltering); + +maplecl::Option oMint8({"-mint8"}, + " -mint8 \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMinterlinkCompressed({"-minterlink-compressed"}, + " -minterlink-compressed \tRequire that code using the standard (uncompressed) MIPS ISA be " + "link-compatible with MIPS16 and microMIPS code, and vice versa.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-interlink-compressed"), maplecl::kHide); + +maplecl::Option oMinterlinkMips16({"-minterlink-mips16"}, + " -minterlink-mips16 \tPredate the microMIPS ASE and are retained for backwards compatibility.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-interlink-mips16"), maplecl::kHide); + +maplecl::Option oMioVolatile({"-mio-volatile"}, + " -mio-volatile \tTells the compiler that any variable marked with the io attribute is to " + "be considered volatile.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMips1({"-mips1"}, + " -mips1 \tEquivalent to -march=mips1.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMips16({"-mips16"}, + " -mips16 \tGenerate MIPS16 code.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-mips16"), maplecl::kHide); + +maplecl::Option oMips2({"-mips2"}, + " -mips2 \tEquivalent to -march=mips2.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMips3({"-mips3"}, + " -mips3 \tEquivalent to -march=mips3.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMips32({"-mips32"}, + " -mips32 \tEquivalent to -march=mips32.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMips32r3({"-mips32r3"}, + " -mips32r3 \tEquivalent to -march=mips32r3.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMips32r5({"-mips32r5"}, + " -mips32r5 \tEquivalent to -march=mips32r5.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMips32r6({"-mips32r6"}, + " -mips32r6 \tEquivalent to -march=mips32r6.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMips3d({"-mips3d"}, + " -mips3d \tUse (do not use) the MIPS-3D ASE.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-mips3d"), maplecl::kHide); + +maplecl::Option oMips4({"-mips4"}, + " -mips4 \tEquivalent to -march=mips4.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMips64({"-mips64"}, + " -mips64 \tEquivalent to -march=mips64.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMips64r2({"-mips64r2"}, + " -mips64r2 \tEquivalent to -march=mips64r2.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMips64r3({"-mips64r3"}, + " -mips64r3 \tEquivalent to -march=mips64r3.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMips64r5({"-mips64r5"}, + " -mips64r5 \tEquivalent to -march=mips64r5.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMips64r6({"-mips64r6"}, + " -mips64r6 \tEquivalent to -march=mips64r6.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMisize({"-misize"}, + " -misize \tAnnotate assembler instructions with estimated addresses.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMissueRateNumber({"-missue-rate=number"}, + " -missue-rate=number \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMivc2({"-mivc2"}, + " -mivc2 \tEnables IVC2 scheduling. IVC2 is a 64-bit VLIW coprocessor.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMjsr({"-mjsr"}, + " -mjsr \t\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-jsr"), maplecl::kHide); + +maplecl::Option oMjumpInDelay({"-mjump-in-delay"}, + " -mjump-in-delay \tThis option is ignored and provided for compatibility purposes only.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMkernel({"-mkernel"}, + " -mkernel \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMknuthdiv({"-mknuthdiv"}, + " -mknuthdiv \tMake the result of a division yielding a remainder have the same sign as " + "the divisor. \n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-knuthdiv"), maplecl::kHide); + +maplecl::Option oMl({"-ml"}, + " -ml \tCauses variables to be assigned to the .far section by default.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMlarge({"-mlarge"}, + " -mlarge \tUse large-model addressing (20-bit pointers, 32-bit size_t).\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMlargeData({"-mlarge-data"}, + " -mlarge-data \tWith this option the data area is limited to just below 2GB.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMlargeDataThreshold({"-mlarge-data-threshold"}, + " -mlarge-data-threshold \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMlargeMem({"-mlarge-mem"}, + " -mlarge-mem \tWith -mlarge-mem code is generated that assumes a full 32-bit address.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMlargeText({"-mlarge-text"}, + " -mlarge-text \tWhen -msmall-data is used, the compiler can assume that all local symbols " + "share the same $gp value, and thus reduce the number of instructions required for a function call from 4 to 1.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMleadz({"-mleadz"}, + " -mleadz \tnables the leadz (leading zero) instruction.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMleafIdSharedLibrary({"-mleaf-id-shared-library"}, + " -mleaf-id-shared-library \tenerate code that supports shared libraries via the library ID method, but " + "assumes that this library or executable won't link against any other ID shared libraries.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-leaf-id-shared-library"), maplecl::kHide); + +maplecl::Option oMlibfuncs({"-mlibfuncs"}, + " -mlibfuncs \tSpecify that intrinsic library functions are being compiled, passing all " + "values in registers, no matter the size.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-libfuncs"), maplecl::kHide); + +maplecl::Option oMlibraryPic({"-mlibrary-pic"}, + " -mlibrary-pic \tGenerate position-independent EABI code.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMlinkedFp({"-mlinked-fp"}, + " -mlinked-fp \tFollow the EABI requirement of always creating a frame pointer whenever a " + "stack frame is allocated.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMlinkerOpt({"-mlinker-opt"}, + " -mlinker-opt \tEnable the optimization pass in the HP-UX linker.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMlinux({"-mlinux"}, + " -mlinux \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMlittle({"-mlittle"}, + " -mlittle \tAssume target CPU is configured as little endian.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMlittleEndian({"-mlittle-endian"}, + " -mlittle-endian \tAssume target CPU is configured as little endian.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMlittleEndianData({"-mlittle-endian-data"}, + " -mlittle-endian-data \tStore data (but not code) in the big-endian format.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMliw({"-mliw"}, + " -mliw \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMll64({"-mll64"}, + " -mll64 \tEnable double load/store operations for ARC HS cores.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMllsc({"-mllsc"}, + " -mllsc \tUse (do not use) 'll', 'sc', and 'sync' instructions to implement atomic " + "memory built-in functions.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-llsc"), maplecl::kHide); + +maplecl::Option oMloadStorePairs({"-mload-store-pairs"}, + " -mload-store-pairs \tEnable (disable) an optimization that pairs consecutive load or store " + "instructions to enable load/store bonding. \n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-load-store-pairs"), maplecl::kHide); + +maplecl::Option oMlocalSdata({"-mlocal-sdata"}, + " -mlocal-sdata \tExtend (do not extend) the -G behavior to local data too, such as to " + "static variables in C. \n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-local-sdata"), maplecl::kHide); + +maplecl::Option oMlock({"-mlock"}, + " -mlock \tPassed down to the assembler to enable the locked load/store conditional " + "extension. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMlongCalls({"-mlong-calls"}, + " -mlong-calls \tGenerate calls as register indirect calls, thus providing access to the " + "full 32-bit address range.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-long-calls"), maplecl::kHide); + +maplecl::Option oMlongDouble128({"-mlong-double-128"}, + " -mlong-double-128 \tControl the size of long double type. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMlongDouble64({"-mlong-double-64"}, + " -mlong-double-64 \tControl the size of long double type.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMlongDouble80({"-mlong-double-80"}, + " -mlong-double-80 \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMlongJumpTableOffsets({"-mlong-jump-table-offsets"}, + " -mlong-jump-table-offsets \tUse 32-bit offsets in switch tables. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMlongJumps({"-mlong-jumps"}, + " -mlong-jumps \tDisable (or re-enable) the generation of PC-relative jump instructions.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-long-jumps"), maplecl::kHide); + +maplecl::Option oMlongLoadStore({"-mlong-load-store"}, + " -mlong-load-store \tGenerate 3-instruction load and store sequences as sometimes required by " + "the HP-UX 10 linker.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMlong32({"-mlong32"}, + " -mlong32 \tForce long, int, and pointer types to be 32 bits wide.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMlong64({"-mlong64"}, + " -mlong64 \tForce long types to be 64 bits wide. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMlongcall({"-mlongcall"}, + " -mlongcall \tBy default assume that all calls are far away so that a longer and more " + "expensive calling sequence is required. \n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-longcall"), maplecl::kHide); + +maplecl::Option oMlongcalls({"-mlongcalls"}, + " -mlongcalls \t\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-longcalls"), maplecl::kHide); + +maplecl::Option oMloop({"-mloop"}, + " -mloop \tEnables the use of the e3v5 LOOP instruction. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMlow64k({"-mlow-64k"}, + " -mlow-64k \tWhen enabled, the compiler is free to take advantage of the knowledge that " + "the entire program fits into the low 64k of memory.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-low-64k"), maplecl::kHide); + +maplecl::Option oMlowPrecisionRecipSqrt({"-mlow-precision-recip-sqrt"}, + " -mlow-precision-recip-sqrt \tEnable the reciprocal square root approximation. Enabling this reduces precision" + " of reciprocal square root results to about 16 bits for single precision and to 32 bits for double precision.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-low-precision-recip-sqrt"), maplecl::kHide); + +maplecl::Option oMlp64({"-mlp64"}, + " -mlp64 \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMlra({"-mlra"}, + " -mlra \tEnable Local Register Allocation. By default the port uses LRA.(i.e. -mno-lra).\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-lra"), maplecl::kHide); + +maplecl::Option oMlraPriorityCompact({"-mlra-priority-compact"}, + " -mlra-priority-compact \tIndicate target register priority for r0..r3 / r12..r15.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMlraPriorityNoncompact({"-mlra-priority-noncompact"}, + " -mlra-priority-noncompact \tReduce target register priority for r0..r3 / r12..r15.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMlraPriorityNone({"-mlra-priority-none"}, + " -mlra-priority-none \tDon't indicate any priority for target registers.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMlwp({"-mlwp"}, + " -mlwp \tThese switches enable the use of instructions in the mlwp.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMlxc1Sxc1({"-mlxc1-sxc1"}, + " -mlxc1-sxc1 \tWhen applicable, enable (disable) the generation of lwxc1, swxc1, ldxc1, " + "sdxc1 instructions.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMlzcnt({"-mlzcnt"}, + " -mlzcnt \these switches enable the use of instructions in the mlzcnt\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMm({"-Mm"}, + " -Mm \tCauses variables to be assigned to the .near section by default.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMmac({"-mmac"}, + " -mmac \tEnable the use of multiply-accumulate instructions.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMmac24({"-mmac-24"}, + " -mmac-24 \tPassed down to the assembler. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMmacD16({"-mmac-d16"}, + " -mmac-d16 \tPassed down to the assembler.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMmac_24({"-mmac_24"}, + " -mmac_24 \tReplaced by -mmac-24.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMmac_d16({"-mmac_d16"}, + " -mmac_d16 \tReplaced by -mmac-d16.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMmad({"-mmad"}, + " -mmad \tEnable (disable) use of the mad, madu and mul instructions, as provided by " + "the R4650 ISA.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-mad"), maplecl::kHide); + +maplecl::Option oMmadd4({"-mmadd4"}, + " -mmadd4 \tWhen applicable, enable (disable) the generation of 4-operand madd.s, madd.d " + "and related instructions.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMmainkernel({"-mmainkernel"}, + " -mmainkernel \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMmalloc64({"-mmalloc64"}, + " -mmalloc64 \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMmax({"-mmax"}, + " -mmax \tGenerate code to use MAX instruction sets.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-max"), maplecl::kHide); + +maplecl::Option oMmaxConstantSize({"-mmax-constant-size"}, + " -mmax-constant-size \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMmaxStackFrame({"-mmax-stack-frame"}, + " -mmax-stack-frame \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMmcountRaAddress({"-mmcount-ra-address"}, + " -mmcount-ra-address \tEmit (do not emit) code that allows _mcount to modify the calling function's " + "return address.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-mcount-ra-address"), maplecl::kHide); + +maplecl::Option oMmcu({"-mmcu"}, + " -mmcu \tUse the MIPS MCU ASE instructions.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-mcu"), maplecl::kHide); + +maplecl::Option oMmedia({"-mmedia"}, + " -mmedia \tUse media instructions.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-media"), maplecl::kHide); + +maplecl::Option oMmediumCalls({"-mmedium-calls"}, + " -mmedium-calls \tDon't use less than 25-bit addressing range for calls, which is the offset " + "available for an unconditional branch-and-link instruction. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMmemcpy({"-mmemcpy"}, + " -mmemcpy \tForce (do not force) the use of memcpy for non-trivial block moves.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-memcpy"), maplecl::kHide); + +maplecl::Option oMmemcpyStrategyStrategy({"-mmemcpy-strategy=strategy"}, + " -mmemcpy-strategy=strategy \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMmemsetStrategyStrategy({"-mmemset-strategy=strategy"}, + " -mmemset-strategy=strategy \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMmfcrf({"-mmfcrf"}, + " -mmfcrf \tSpecify which instructions are available on the processor you are using. \n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-mfcrf"), maplecl::kHide); + +maplecl::Option oMmfpgpr({"-mmfpgpr"}, + " -mmfpgpr \tSpecify which instructions are available on the processor you are using.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-mfpgpr"), maplecl::kHide); + +maplecl::Option oMmicromips({"-mmicromips"}, + " -mmicromips \tGenerate microMIPS code.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-mmicromips"), maplecl::kHide); + +maplecl::Option oMminimalToc({"-mminimal-toc"}, + " -mminimal-toc \tModify generation of the TOC (Table Of Contents), which is created for " + "every executable file. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMminmax({"-mminmax"}, + " -mminmax \tEnables the min and max instructions.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMmitigateRop({"-mmitigate-rop"}, + " -mmitigate-rop \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMmixedCode({"-mmixed-code"}, + " -mmixed-code \tTweak register allocation to help 16-bit instruction generation.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMmmx({"-mmmx"}, + " -mmmx \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMmodelLarge({"-mmodel=large"}, + " -mmodel=large \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMmodelMedium({"-mmodel=medium"}, + " -mmodel=medium \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMmodelSmall({"-mmodel=small"}, + " -mmodel=small \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMmovbe({"-mmovbe"}, + " -mmovbe \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMmpx({"-mmpx"}, + " -mmpx \tThese switches enable the use of instructions in the mmpx.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMmpyOption({"-mmpy-option"}, + " -mmpy-option \tCompile ARCv2 code with a multiplier design option. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMmsBitfields({"-mms-bitfields"}, + " -mms-bitfields \t\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-ms-bitfields"), maplecl::kHide); + +maplecl::Option oMmt({"-mmt"}, + " -mmt \tUse MT Multithreading instructions.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-mt"), maplecl::kHide); + +maplecl::Option oMmul({"-mmul"}, + " -mmul \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMmulBugWorkaround({"-mmul-bug-workaround"}, + " -mmul-bug-workaround \t\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-mul-bug-workaround"), maplecl::kHide); + +maplecl::Option oMmulx({"-mmul.x"}, + " -mmul.x \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMmul32x16({"-mmul32x16"}, + " -mmul32x16 \tGenerate 32x16-bit multiply and multiply-accumulate instructions.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMmul64({"-mmul64"}, + " -mmul64 \tGenerate mul64 and mulu64 instructions. Only valid for -mcpu=ARC600.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMmuladd({"-mmuladd"}, + " -mmuladd \tUse multiply and add/subtract instructions.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-muladd"), maplecl::kHide); + +maplecl::Option oMmulhw({"-mmulhw"}, + " -mmulhw \tGenerate code that uses the half-word multiply and multiply-accumulate " + "instructions on the IBM 405, 440, 464 and 476 processors.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-mulhw"), maplecl::kHide); + +maplecl::Option oMmult({"-mmult"}, + " -mmult \tEnables the multiplication and multiply-accumulate instructions.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMmultBug({"-mmult-bug"}, + " -mmult-bug \t\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-mult-bug"), maplecl::kHide); + +maplecl::Option oMmultcost({"-mmultcost"}, + " -mmultcost \tCost to assume for a multiply instruction, with '4' being equal to a normal " + "instruction.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMmultiCondExec({"-mmulti-cond-exec"}, + " -mmulti-cond-exec \tEnable optimization of && and || in conditional execution (default).\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-multi-cond-exec"), maplecl::kHide); + +maplecl::Option oMmulticore({"-mmulticore"}, + " -mmulticore \tBuild a standalone application for multicore Blackfin processors. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMmultiple({"-mmultiple"}, + " -mmultiple \tGenerate code that uses (does not use) the load multiple word instructions " + "and the store multiple word instructions. \n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-multiple"), maplecl::kHide); + +maplecl::Option oMmusl({"-mmusl"}, + " -mmusl \tUse musl C library.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMmvcle({"-mmvcle"}, + " -mmvcle \tGenerate code using the mvcle instruction to perform block moves.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-mvcle"), maplecl::kHide); + +maplecl::Option oMmvme({"-mmvme"}, + " -mmvme \tOn embedded PowerPC systems, assume that the startup module is called crt0.o " + "and the standard C libraries are libmvme.a and libc.a.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMmwaitx({"-mmwaitx"}, + " -mmwaitx \tThese switches enable the use of instructions in the mmwaitx.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMn({"-mn"}, + " -mn \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMnFlash({"-mn-flash"}, + " -mn-flash \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMnan2008({"-mnan=2008"}, + " -mnan=2008 \tControl the encoding of the special not-a-number (NaN) IEEE 754 " + "floating-point data.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMnanLegacy({"-mnan=legacy"}, + " -mnan=legacy \tControl the encoding of the special not-a-number (NaN) IEEE 754 " + "floating-point data.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMneonFor64bits({"-mneon-for-64bits"}, + " -mneon-for-64bits \tEnables using Neon to handle scalar 64-bits operations.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMnestedCondExec({"-mnested-cond-exec"}, + " -mnested-cond-exec \tEnable nested conditional execution optimizations (default).\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-nested-cond-exec"), maplecl::kHide); + +maplecl::Option oMnhwloop({"-mnhwloop"}, + " -mnhwloop \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMnoAlignStringops({"-mno-align-stringops"}, + " -mno-align-stringops \tDo not align the destination of inlined string operations.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMnoBrcc({"-mno-brcc"}, + " -mno-brcc \tThis option disables a target-specific pass in arc_reorg to generate " + "compare-and-branch (brcc) instructions. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMnoClearbss({"-mno-clearbss"}, + " -mno-clearbss \tThis option is deprecated. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMnoCrt0({"-mno-crt0"}, + " -mno-crt0 \tDo not link in the C run-time initialization object file.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMnoDefault({"-mno-default"}, + " -mno-default \tThis option instructs Maple to turn off all tunable features.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMnoDpfpLrsr({"-mno-dpfp-lrsr"}, + " -mno-dpfp-lrsr \tDisable lr and sr instructions from using FPX extension aux registers.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMnoEflags({"-mno-eflags"}, + " -mno-eflags \tDo not mark ABI switches in e_flags.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMnoFancyMath387({"-mno-fancy-math-387"}, + " -mno-fancy-math-387 \tSome 387 emulators do not support the sin, cos and sqrt instructions for the " + "387. Specify this option to avoid generating those instructions. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMnoFloat({"-mno-float"}, + " -mno-float \tEquivalent to -msoft-float, but additionally asserts that the program being " + "compiled does not perform any floating-point operations. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMnoFpInToc({"-mno-fp-in-toc"}, + " -mno-fp-in-toc \tModify generation of the TOC (Table Of Contents), which is created for every " + "executable file.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMFpReg({"-mfp-reg"}, + " -mfp-reg \tGenerate code that uses (does not use) the floating-point register set. \n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-fp-regs"), maplecl::kHide); + +maplecl::Option oMnoFpRetIn387({"-mno-fp-ret-in-387"}, + " -mno-fp-ret-in-387 \tDo not use the FPU registers for return values of functions.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMnoInlineFloatDivide({"-mno-inline-float-divide"}, + " -mno-inline-float-divide \tDo not generate inline code for divides of floating-point values.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMnoInlineIntDivide({"-mno-inline-int-divide"}, + " -mno-inline-int-divide \tDo not generate inline code for divides of integer values.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMnoInlineSqrt({"-mno-inline-sqrt"}, + " -mno-inline-sqrt \tDo not generate inline code for sqrt.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMnoInterrupts({"-mno-interrupts"}, + " -mno-interrupts \tGenerated code is not compatible with hardware interrupts.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMnoLsim({"-mno-lsim"}, + " -mno-lsim \tAssume that runtime support has been provided and so there is no need to " + "include the simulator library (libsim.a) on the linker command line.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMnoMillicode({"-mno-millicode"}, + " -mno-millicode \tWhen optimizing for size (using -Os), prologues and epilogues that have to " + "save or restore a large number of registers are often shortened by using call to a special function in libgcc\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMnoMpy({"-mno-mpy"}, + " -mno-mpy \tDo not generate mpy-family instructions for ARC700. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMnoOpts({"-mno-opts"}, + " -mno-opts \tDisables all the optional instructions enabled by -mall-opts.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMnoPic({"-mno-pic"}, + " -mno-pic \tGenerate code that does not use a global pointer register. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMnoPostinc({"-mno-postinc"}, + " -mno-postinc \tCode generation tweaks that disable, respectively, splitting of 32-bit loads, " + "generation of post-increment addresses, and generation of post-modify addresses.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMnoPostmodify({"-mno-postmodify"}, + " -mno-postmodify \tCode generation tweaks that disable, respectively, splitting of 32-bit loads, " + "generation of post-increment addresses, and generation of post-modify addresses. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMnoRedZone({"-mno-red-zone"}, + " -mno-red-zone \tDo not use a so-called “red zone” for x86-64 code.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMnoRoundNearest({"-mno-round-nearest"}, + " -mno-round-nearest \tMake the scheduler assume that the rounding mode has been set to truncating.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMnoSchedProlog({"-mno-sched-prolog"}, + " -mno-sched-prolog \tPrevent the reordering of instructions in the function prologue, or the " + "merging of those instruction with the instructions in the function's body. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMnoSideEffects({"-mno-side-effects"}, + " -mno-side-effects \tDo not emit instructions with side effects in addressing modes other than " + "post-increment.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMnoSoftCmpsf({"-mno-soft-cmpsf"}, + " -mno-soft-cmpsf \tFor single-precision floating-point comparisons, emit an fsub instruction " + "and test the flags. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMnoSpaceRegs({"-mno-space-regs"}, + " -mno-space-regs \tGenerate code that assumes the target has no space registers.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMSpe({"-mspe"}, + " -mspe \tThis switch enables the generation of SPE simd instructions.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-spe"), maplecl::kHide); + +maplecl::Option oMnoSumInToc({"-mno-sum-in-toc"}, + " -mno-sum-in-toc \tModify generation of the TOC (Table Of Contents), which is created for " + "every executable file. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMnoVectDouble({"-mnovect-double"}, + " -mno-vect-double \tChange the preferred SIMD mode to SImode. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMnobitfield({"-mnobitfield"}, + " -mnobitfield \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMnodiv({"-mnodiv"}, + " -mnodiv \tDo not use div and mod instructions.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMnoliw({"-mnoliw"}, + " -mnoliw \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMnomacsave({"-mnomacsave"}, + " -mnomacsave \tMark the MAC register as call-clobbered, even if -mrenesas is given.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMnopFunDllimport({"-mnop-fun-dllimport"}, + " -mnop-fun-dllimport \tThis option is available for Cygwin and MinGW targets.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMnopMcount({"-mnop-mcount"}, + " -mnop-mcount \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMnops({"-mnops"}, + " -mnops \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMnorm({"-mnorm"}, + " -mnorm \tGenerate norm instructions. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMnosetlb({"-mnosetlb"}, + " -mnosetlb \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMnosplitLohi({"-mnosplit-lohi"}, + " -mnosplit-lohi \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oModdSpreg({"-modd-spreg"}, + " -modd-spreg \tEnable the use of odd-numbered single-precision floating-point registers " + "for the o32 ABI.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-odd-spreg"), maplecl::kHide); + +maplecl::Option oMoneByteBool({"-mone-byte-bool"}, + " -mone-byte-bool \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMoptimize({"-moptimize"}, + " -moptimize \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMoptimizeMembar({"-moptimize-membar"}, + " -moptimize-membar \tThis switch removes redundant membar instructions from the compiler-generated " + "code. \n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-optimize-membar"), maplecl::kHide); + +maplecl::Option oMpaRisc10({"-mpa-risc-1-0"}, + " -mpa-risc-1-0 \tSynonyms for -march=1.0 respectively.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMpaRisc11({"-mpa-risc-1-1"}, + " -mpa-risc-1-1 \tSynonyms for -march=1.1 respectively.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMpaRisc20({"-mpa-risc-2-0"}, + " -mpa-risc-2-0 \tSynonyms for -march=2.0 respectively.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMpack({"-mpack"}, + " -mpack \tPack VLIW instructions.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-pack"), maplecl::kHide); + +maplecl::Option oMpackedStack({"-mpacked-stack"}, + " -mpacked-stack \tUse the packed stack layout.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-packed-stack"), maplecl::kHide); + +maplecl::Option oMpadstruct({"-mpadstruct"}, + " -mpadstruct \tThis option is deprecated.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMpaired({"-mpaired"}, + " -mpaired \tThis switch enables or disables the generation of PAIRED simd instructions.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-paired"), maplecl::kHide); + +maplecl::Option oMpairedSingle({"-mpaired-single"}, + " -mpaired-single \tUse paired-single floating-point instructions.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-paired-single"), maplecl::kHide); + +maplecl::Option oMpcRelativeLiteralLoads({"-mpc-relative-literal-loads"}, + " -mpc-relative-literal-loads \tPC relative literal loads.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-pc-relative-literal-loads"), maplecl::kHide); + +maplecl::Option oMpc32({"-mpc32"}, + " -mpc32 \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMpc64({"-mpc64"}, + " -mpc64 \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMpc80({"-mpc80"}, + " -mpc80 \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMpclmul({"-mpclmul"}, + " -mpclmul \tThese switches enable the use of instructions in the mpclmul.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMpcrel({"-mpcrel"}, + " -mpcrel \tUse the pc-relative addressing mode of the 68000 directly, instead of using " + "a global offset table.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMpdebug({"-mpdebug"}, + " -mpdebug \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMpe({"-mpe"}, + " -mpe \tSupport IBM RS/6000 SP Parallel Environment (PE). \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMpeAlignedCommons({"-mpe-aligned-commons"}, + " -mpe-aligned-commons \tThis option is available for Cygwin and MinGW targets.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMperfExt({"-mperf-ext"}, + " -mperf-ext \tGenerate performance extension instructions.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-perf-ext"), maplecl::kHide); + +maplecl::Option oMpicDataIsTextRelative({"-mpic-data-is-text-relative"}, + " -mpic-data-is-text-relative \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMpicRegister({"-mpic-register"}, + " -mpic-register \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMpid({"-mpid"}, + " -mpid \t\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-pid"), maplecl::kHide); + +maplecl::Option oMpku({"-mpku"}, + " -mpku \tThese switches enable the use of instructions in the mpku.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMpointerSizeSize({"-mpointer-size=size"}, + " -mpointer-size=size \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMpointersToNestedFunctions({"-mpointers-to-nested-functions"}, + " -mpointers-to-nested-functions \tGenerate (do not generate) code to load up the static chain register (r11) " + "when calling through a pointer on AIX and 64-bit Linux systems where a function pointer points to a 3-word " + "descriptor giving the function address, TOC value to be loaded in register r2, and static chain value to be " + "loaded in register r11. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMpokeFunctionName({"-mpoke-function-name"}, + " -mpoke-function-name \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMpopc({"-mpopc"}, + " -mpopc \tWith -mpopc, Maple generates code that takes advantage of the UltraSPARC " + "Population Count instruction.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-popc"), maplecl::kHide); + +maplecl::Option oMpopcnt({"-mpopcnt"}, + " -mpopcnt \tThese switches enable the use of instructions in the mpopcnt.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMpopcntb({"-mpopcntb"}, + " -mpopcntb \tSpecify which instructions are available on the processor you are using. \n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-popcntb"), maplecl::kHide); + +maplecl::Option oMpopcntd({"-mpopcntd"}, + " -mpopcntd \tSpecify which instructions are available on the processor you are using. \n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-popcntd"), maplecl::kHide); + +maplecl::Option oMportableRuntime({"-mportable-runtime"}, + " -mportable-runtime \tUse the portable calling conventions proposed by HP for ELF systems.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMpower8Fusion({"-mpower8-fusion"}, + " -mpower8-fusion \tGenerate code that keeps some integer operations adjacent so that the " + "instructions can be fused together on power8 and later processors.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-power8-fusion"), maplecl::kHide); + +maplecl::Option oMpower8Vector({"-mpower8-vector"}, + " -mpower8-vector \tGenerate code that uses the vector and scalar instructions that were added " + "in version 2.07 of the PowerPC ISA.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-power8-vector"), maplecl::kHide); + +maplecl::Option oMpowerpcGfxopt({"-mpowerpc-gfxopt"}, + " -mpowerpc-gfxopt \tSpecify which instructions are available on the processor you are using\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-powerpc-gfxopt"), maplecl::kHide); + +maplecl::Option oMpowerpcGpopt({"-mpowerpc-gpopt"}, + " -mpowerpc-gpopt \tSpecify which instructions are available on the processor you are using\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-powerpc-gpopt"), maplecl::kHide); + +maplecl::Option oMpowerpc64({"-mpowerpc64"}, + " -mpowerpc64 \tSpecify which instructions are available on the processor you are using\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-powerpc64"), maplecl::kHide); + +maplecl::Option oMpreferAvx128({"-mprefer-avx128"}, + " -mprefer-avx128 \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMpreferShortInsnRegs({"-mprefer-short-insn-regs"}, + " -mprefer-short-insn-regs \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMprefergot({"-mprefergot"}, + " -mprefergot \tWhen generating position-independent code, emit function calls using the " + "Global Offset Table instead of the Procedure Linkage Table.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMpreferredStackBoundary({"-mpreferred-stack-boundary"}, + " -mpreferred-stack-boundary \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMprefetchwt1({"-mprefetchwt1"}, + " -mprefetchwt1 \tThese switches enable the use of instructions in the mprefetchwt1.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMpretendCmove({"-mpretend-cmove"}, + " -mpretend-cmove \tPrefer zero-displacement conditional branches for conditional move " + "instruction patterns.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMprintTuneInfo({"-mprint-tune-info"}, + " -mprint-tune-info \tPrint CPU tuning information as comment in assembler file.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMprologFunction({"-mprolog-function"}, + " -mprolog-function \tDo use external functions to save and restore registers at the prologue " + "and epilogue of a function.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-prolog-function"), maplecl::kHide); + +maplecl::Option oMprologueEpilogue({"-mprologue-epilogue"}, + " -mprologue-epilogue \t\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-prologue-epilogue"), maplecl::kHide); + +maplecl::Option oMprototype({"-mprototype"}, + " -mprototype \tOn System V.4 and embedded PowerPC systems assume that all calls to variable " + "argument functions are properly prototyped. \n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-prototype"), maplecl::kHide); + +maplecl::Option oMpureCode({"-mpure-code"}, + " -mpure-code \tDo not allow constant data to be placed in code sections.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMpushArgs({"-mpush-args"}, + " -mpush-args \t\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-push-args"), maplecl::kHide); + +maplecl::Option oMqClass({"-mq-class"}, + " -mq-class \tEnable 'q' instruction alternatives.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMquadMemory({"-mquad-memory"}, + " -mquad-memory \tGenerate code that uses the non-atomic quad word memory instructions. \n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-quad-memory"), maplecl::kHide); + +maplecl::Option oMquadMemoryAtomic({"-mquad-memory-atomic"}, + " -mquad-memory-atomic \tGenerate code that uses the atomic quad word memory instructions.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-quad-memory-atomic"), maplecl::kHide); + +maplecl::Option oMr10kCacheBarrier({"-mr10k-cache-barrier"}, + " -mr10k-cache-barrier \tSpecify whether Maple should insert cache barriers to avoid the side-effects " + "of speculation on R10K processors.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMRcq({"-mRcq"}, + " -mRcq \tEnable 'Rcq' constraint handling. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMRcw({"-mRcw"}, + " -mRcw \tEnable 'Rcw' constraint handling. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMrdrnd({"-mrdrnd"}, + " -mrdrnd \tThese switches enable the use of instructions in the mrdrnd.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMreadonlyInSdata({"-mreadonly-in-sdata"}, + " -mreadonly-in-sdata \t\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-readonly-in-sdata"), maplecl::kHide); + +maplecl::Option oMrecipPrecision({"-mrecip-precision"}, + " -mrecip-precision \tAssume (do not assume) that the reciprocal estimate instructions provide " + "higher-precision estimates than is mandated by the PowerPC ABI.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMrecordMcount({"-mrecord-mcount"}, + " -mrecord-mcount \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMreducedRegs({"-mreduced-regs"}, + " -mreduced-regs \tUse reduced-set registers for register allocation.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMregisterNames({"-mregister-names"}, + " -mregister-names \t\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-register-names"), maplecl::kHide); + +maplecl::Option oMregnames({"-mregnames"}, + " -mregnames \tOn System V.4 and embedded PowerPC systems do emit register names in the " + "assembly language output using symbolic forms.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-regnames"), maplecl::kHide); + +maplecl::Option oMregparm({"-mregparm"}, + " -mregparm \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMrelax({"-mrelax"}, + " -mrelax \tGuide linker to relax instructions.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-relax"), maplecl::kHide); + +maplecl::Option oMrelaxImmediate({"-mrelax-immediate"}, + " -mrelax-immediate \t\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-relax-immediate"), maplecl::kHide); + +maplecl::Option oMrelaxPicCalls({"-mrelax-pic-calls"}, + " -mrelax-pic-calls \tTry to turn PIC calls that are normally dispatched via register $25 " + "into direct calls.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMrelocatable({"-mrelocatable"}, + " -mrelocatable \tGenerate code that allows a static executable to be relocated to a different " + "address at run time. \n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-relocatable"), maplecl::kHide); + +maplecl::Option oMrelocatableLib({"-mrelocatable-lib"}, + " -mrelocatable-lib \tGenerates a .fixup section to allow static executables to be relocated at " + "run time, but -mrelocatable-lib does not use the smaller stack alignment of -mrelocatable.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-relocatable-lib"), maplecl::kHide); + +maplecl::Option oMrenesas({"-mrenesas"}, + " -mrenesas \tComply with the calling conventions defined by Renesas.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-renesas"), maplecl::kHide); + +maplecl::Option oMrepeat({"-mrepeat"}, + " -mrepeat \tEnables the repeat and erepeat instructions, used for low-overhead looping.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMrestrictIt({"-mrestrict-it"}, + " -mrestrict-it \tRestricts generation of IT blocks to conform to the rules of ARMv8.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMreturnPointerOnD0({"-mreturn-pointer-on-d0"}, + " -mreturn-pointer-on-d0 \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMrh850Abi({"-mrh850-abi"}, + " -mrh850-abi \tEnables support for the RH850 version of the V850 ABI.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMrl78({"-mrl78"}, + " -mrl78 \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMrmw({"-mrmw"}, + " -mrmw \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMrtd({"-mrtd"}, + " -mrtd \tUse a different function-calling convention, in which functions that take a " + "fixed number of arguments return with the rtd instruction, which pops their arguments while returning.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-rtd"), maplecl::kHide); + +maplecl::Option oMrtm({"-mrtm"}, + " -mrtm \tThese switches enable the use of instructions in the mrtm.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMrtp({"-mrtp"}, + " -mrtp \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMrtsc({"-mrtsc"}, + " -mrtsc \tPassed down to the assembler to enable the 64-bit time-stamp counter " + "extension instruction.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMs({"-ms"}, + " -ms \tCauses all variables to default to the .tiny section.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMs2600({"-ms2600"}, + " -ms2600 \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMsafeDma({"-msafe-dma"}, + " -msafe-dma \ttell the compiler to treat the DMA instructions as potentially affecting " + "all memory.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-munsafe-dma"), maplecl::kHide); + +maplecl::Option oMsafeHints({"-msafe-hints"}, + " -msafe-hints \tWork around a hardware bug that causes the SPU to stall indefinitely. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMsahf({"-msahf"}, + " -msahf \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMsatur({"-msatur"}, + " -msatur \tEnables the saturation instructions. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMsaveAccInInterrupts({"-msave-acc-in-interrupts"}, + " -msave-acc-in-interrupts \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMsaveMducInInterrupts({"-msave-mduc-in-interrupts"}, + " -msave-mduc-in-interrupts \t\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-save-mduc-in-interrupts"), maplecl::kHide); + +maplecl::Option oMsaveRestore({"-msave-restore"}, + " -msave-restore \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMsaveTocIndirect({"-msave-toc-indirect"}, + " -msave-toc-indirect \tGenerate code to save the TOC value in the reserved stack location in the " + "function prologue if the function calls through a pointer on AIX and 64-bit Linux systems.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMscc({"-mscc"}, + " -mscc \tEnable the use of conditional set instructions (default).\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-scc"), maplecl::kHide); + +maplecl::Option oMschedArDataSpec({"-msched-ar-data-spec"}, + " -msched-ar-data-spec \t\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-sched-ar-data-spec"), maplecl::kHide); + +maplecl::Option oMschedArInDataSpec({"-msched-ar-in-data-spec"}, + " -msched-ar-in-data-spec \t\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-sched-ar-in-data-spec"), maplecl::kHide); + +maplecl::Option oMschedBrDataSpec({"-msched-br-data-spec"}, + " -msched-br-data-spec \t\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-sched-br-data-spec"), maplecl::kHide); + +maplecl::Option oMschedBrInDataSpec({"-msched-br-in-data-spec"}, + " -msched-br-in-data-spec \t\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-sched-br-in-data-spec"), maplecl::kHide); + +maplecl::Option oMschedControlSpec({"-msched-control-spec"}, + " -msched-control-spec \t\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-sched-control-spec"), maplecl::kHide); + +maplecl::Option oMschedCountSpecInCriticalPath({"-msched-count-spec-in-critical-path"}, + " -msched-count-spec-in-critical-path \t\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-sched-count-spec-in-critical-path"), maplecl::kHide); + +maplecl::Option oMschedFpMemDepsZeroCost({"-msched-fp-mem-deps-zero-cost"}, + " -msched-fp-mem-deps-zero-cost \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMschedInControlSpec({"-msched-in-control-spec"}, + " -msched-in-control-spec \t\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-sched-in-control-spec"), maplecl::kHide); + +maplecl::Option oMschedMaxMemoryInsns({"-msched-max-memory-insns"}, + " -msched-max-memory-insns \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMschedMaxMemoryInsnsHardLimit({"-msched-max-memory-insns-hard-limit"}, + " -msched-max-memory-insns-hard-limit \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMschedPreferNonControlSpecInsns({"-msched-prefer-non-control-spec-insns"}, + " -msched-prefer-non-control-spec-insns \t\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-sched-prefer-non-control-spec-insns"), maplecl::kHide); + +maplecl::Option oMschedPreferNonDataSpecInsns({"-msched-prefer-non-data-spec-insns"}, + " -msched-prefer-non-data-spec-insns \t\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-sched-prefer-non-data-spec-insns"), maplecl::kHide); + +maplecl::Option oMschedSpecLdc({"-msched-spec-ldc"}, + " -msched-spec-ldc \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMschedStopBitsAfterEveryCycle({"-msched-stop-bits-after-every-cycle"}, + " -msched-stop-bits-after-every-cycle \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMscore5({"-mscore5"}, + " -mscore5 \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMscore5u({"-mscore5u"}, + " -mscore5u \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMscore7({"-mscore7"}, + " -mscore7 \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMscore7d({"-mscore7d"}, + " -mscore7d \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMsdata({"-msdata"}, + " -msdata \tOn System V.4 and embedded PowerPC systems, if -meabi is used, compile code " + "the same as -msdata=eabi, otherwise compile code the same as -msdata=sysv.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-sdata"), maplecl::kHide); + +maplecl::Option oMsdataAll({"-msdata=all"}, + " -msdata=all \tPut all data, not just small objects, into the sections reserved for small " + "data, and use addressing relative to the B14 register to access them.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMsdataData({"-msdata=data"}, + " -msdata=data \tOn System V.4 and embedded PowerPC systems, put small global data in the " + ".sdata section.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMsdataDefault({"-msdata=default"}, + " -msdata=default \tOn System V.4 and embedded PowerPC systems, if -meabi is used, compile code " + "the same as -msdata=eabi, otherwise compile code the same as -msdata=sysv.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMsdataEabi({"-msdata=eabi"}, + " -msdata=eabi \tOn System V.4 and embedded PowerPC systems, put small initialized const " + "global and static data in the .sdata2 section, which is pointed to by register r2. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMsdataNone({"-msdata=none"}, + " -msdata=none \tOn embedded PowerPC systems, put all initialized global and static data " + "in the .data section, and all uninitialized data in the .bss section.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMsdataSdata({"-msdata=sdata"}, + " -msdata=sdata \tPut small global and static data in the small data area, but do not generate " + "special code to reference them.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMsdataSysv({"-msdata=sysv"}, + " -msdata=sysv \tOn System V.4 and embedded PowerPC systems, put small global and static data " + "in the .sdata section, which is pointed to by register r13.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMsdataUse({"-msdata=use"}, + " -msdata=use \tPut small global and static data in the small data area, and generate special " + "instructions to reference them.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMsdram({"-msdram"}, + " -msdram \tLink the SDRAM-based runtime instead of the default ROM-based runtime.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMsecurePlt({"-msecure-plt"}, + " -msecure-plt \tenerate code that allows ld and ld.so to build executables and shared libraries " + "with non-executable .plt and .got sections. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMselSchedDontCheckControlSpec({"-msel-sched-dont-check-control-spec"}, + " -msel-sched-dont-check-control-spec \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMsepData({"-msep-data"}, + " -msep-data \tGenerate code that allows the data segment to be located in a different area " + "of memory from the text segment.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-sep-data"), maplecl::kHide); + +maplecl::Option oMserializeVolatile({"-mserialize-volatile"}, + " -mserialize-volatile \t\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-serialize-volatile"), maplecl::kHide); + +maplecl::Option oMsetlb({"-msetlb"}, + " -msetlb \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMsha({"-msha"}, + " -msha \tThese switches enable the use of instructions in the msha.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMshort({"-mshort"}, + " -mshort \tConsider type int to be 16 bits wide, like short int.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-short"), maplecl::kHide); + +maplecl::Option oMsignExtendEnabled({"-msign-extend-enabled"}, + " -msign-extend-enabled \tEnable sign extend instructions.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMsim({"-msim"}, + " -msim \tLink the simulator run-time libraries.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-sim"), maplecl::kHide); + +maplecl::Option oMsimd({"-msimd"}, + " -msimd \tEnable generation of ARC SIMD instructions via target-specific builtins. " + "Only valid for -mcpu=ARC700.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMsimnovec({"-msimnovec"}, + " -msimnovec \tLink the simulator runtime libraries, excluding built-in support for reset " + "and exception vectors and tables.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMsimpleFpu({"-msimple-fpu"}, + " -msimple-fpu \tDo not generate sqrt and div instructions for hardware floating-point unit.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMsingleExit({"-msingle-exit"}, + " -msingle-exit \tForce generated code to have a single exit point in each function.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-single-exit"), maplecl::kHide); + +maplecl::Option oMsingleFloat({"-msingle-float"}, + " -msingle-float \tGenerate code for single-precision floating-point operations. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMsinglePicBase({"-msingle-pic-base"}, + " -msingle-pic-base \tTreat the register used for PIC addressing as read-only, rather than loading " + "it in the prologue for each function.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMsio({"-msio"}, + " -msio \tGenerate the predefine, _SIO, for server IO. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMskipRaxSetup({"-mskip-rax-setup"}, + " -mskip-rax-setup \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMslowBytes({"-mslow-bytes"}, + " -mslow-bytes \t\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-slow-bytes"), maplecl::kHide); + +maplecl::Option oMslowFlashData({"-mslow-flash-data"}, + " -mslow-flash-data \tAssume loading data from flash is slower than fetching instruction.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMsmall({"-msmall"}, + " -msmall \tUse small-model addressing (16-bit pointers, 16-bit size_t).\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMsmallData({"-msmall-data"}, + " -msmall-data \tWhen -msmall-data is used, objects 8 bytes long or smaller are placed in a small" + " data area (the .sdata and .sbss sections) and are accessed via 16-bit relocations off of the $gp register. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMsmallDataLimit({"-msmall-data-limit"}, + " -msmall-data-limit \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMsmallDivides({"-msmall-divides"}, + " -msmall-divides \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMsmallExec({"-msmall-exec"}, + " -msmall-exec \tGenerate code using the bras instruction to do subroutine calls. \n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-small-exec"), maplecl::kHide); + +maplecl::Option oMsmallMem({"-msmall-mem"}, + " -msmall-mem \tBy default, Maple generates code assuming that addresses are never larger " + "than 18 bits.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMsmallModel({"-msmall-model"}, + " -msmall-model \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMsmallText({"-msmall-text"}, + " -msmall-text \tWhen -msmall-text is used, the compiler assumes that the code of the entire" + " program (or shared library) fits in 4MB, and is thus reachable with a branch instruction. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMsmall16({"-msmall16"}, + " -msmall16 \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMsmallc({"-msmallc"}, + " -msmallc \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMsmartmips({"-msmartmips"}, + " -msmartmips \tUse the MIPS SmartMIPS ASE.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-smartmips"), maplecl::kHide); + +maplecl::Option oMsoftFloat({"-msoft-float"}, + " -msoft-float \tThis option ignored; it is provided for compatibility purposes only. \n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-soft-float"), maplecl::kHide); + +maplecl::Option oMsoftQuadFloat({"-msoft-quad-float"}, + " -msoft-quad-float \tGenerate output containing library calls for quad-word (long double) " + "floating-point instructions.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMsoftStack({"-msoft-stack"}, + " -msoft-stack \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMsp8({"-msp8"}, + " -msp8 \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMspace({"-mspace"}, + " -mspace \tTry to make the code as small as possible.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMspecldAnomaly({"-mspecld-anomaly"}, + " -mspecld-anomaly \tWhen enabled, the compiler ensures that the generated code does not contain " + "speculative loads after jump instructions.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-specld-anomaly"), maplecl::kHide); + +maplecl::Option oMspfp({"-mspfp"}, + " -mspfp \tGenerate single-precision FPX instructions, tuned for the compact " + "implementation.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMspfpCompact({"-mspfp-compact"}, + " -mspfp-compact \tGenerate single-precision FPX instructions, tuned for the compact " + "implementation.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMspfpFast({"-mspfp-fast"}, + " -mspfp-fast \tGenerate single-precision FPX instructions, tuned for the fast implementation.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMspfp_compact({"-mspfp_compact"}, + " -mspfp_compact \tReplaced by -mspfp-compact.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMspfp_fast({"-mspfp_fast"}, + " -mspfp_fast \tReplaced by -mspfp-fast.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMsplitAddresses({"-msplit-addresses"}, + " -msplit-addresses \tEnable (disable) use of the %hi() and %lo() assembler relocation operators.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-split-addresses"), maplecl::kHide); + +maplecl::Option oMsplitVecmoveEarly({"-msplit-vecmove-early"}, + " -msplit-vecmove-early \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMsse({"-msse"}, + " -msse \tThese switches enable the use of instructions in the msse.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMsse2({"-msse2"}, + " -msse2 \tThese switches enable the use of instructions in the msse2.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMsse2avx({"-msse2avx"}, + " -msse2avx \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMsse3({"-msse3"}, + " -msse3 \tThese switches enable the use of instructions in the msse2avx.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMsse4({"-msse4"}, + " -msse4 \tThese switches enable the use of instructions in the msse4.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMsse41({"-msse4.1"}, + " -msse4.1 \tThese switches enable the use of instructions in the msse4.1.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMsse42({"-msse4.2"}, + " -msse4.2 \tThese switches enable the use of instructions in the msse4.2.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMsse4a({"-msse4a"}, + " -msse4a \tThese switches enable the use of instructions in the msse4a.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMsseregparm({"-msseregparm"}, + " -msseregparm \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMssse3({"-mssse3"}, + " -mssse3 \tThese switches enable the use of instructions in the mssse3.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMstackAlign({"-mstack-align"}, + " -mstack-align \t\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-stack-align"), maplecl::kHide); + +maplecl::Option oMstackBias({"-mstack-bias"}, + " -mstack-bias \tWith -mstack-bias, GCC assumes that the stack pointer, and frame pointer if " + "present, are offset by -2047 which must be added back when making stack frame references.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-stack-bias"), maplecl::kHide); + +maplecl::Option oMstackCheckL1({"-mstack-check-l1"}, + " -mstack-check-l1 \tDo stack checking using information placed into L1 scratchpad memory by the " + "uClinux kernel.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMstackIncrement({"-mstack-increment"}, + " -mstack-increment \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMstackOffset({"-mstack-offset"}, + " -mstack-offset \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMstackrealign({"-mstackrealign"}, + " -mstackrealign \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMstdStructReturn({"-mstd-struct-return"}, + " -mstd-struct-return \tWith -mstd-struct-return, the compiler generates checking code in functions " + "returning structures or unions to detect size mismatches between the two sides of function calls, as per the " + "32-bit ABI.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-std-struct-return"), maplecl::kHide); + +maplecl::Option oMstdmain({"-mstdmain"}, + " -mstdmain \tWith -mstdmain, Maple links your program against startup code that assumes a " + "C99-style interface to main, including a local copy of argv strings.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMstrictAlign({"-mstrict-align"}, + " -mstrict-align \tDon't assume that unaligned accesses are handled by the system.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-strict-align"), maplecl::kHide); + +maplecl::Option oMstrictX({"-mstrict-X"}, + " -mstrict-X \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMstring({"-mstring"}, + " -mstring \t\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-string"), maplecl::kHide); + +maplecl::Option oMstringopStrategyAlg({"-mstringop-strategy=alg"}, + " -mstringop-strategy=alg \tOverride the internal decision heuristic for the particular algorithm to use " + "for inlining string operations. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMstructureSizeBoundary({"-mstructure-size-boundary"}, + " -mstructure-size-boundary \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMsubxc({"-msubxc"}, + " -msubxc \tWith -msubxc, Maple generates code that takes advantage of the UltraSPARC " + "Subtract-Extended-with-Carry instruction. \n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-subxc"), maplecl::kHide); + +maplecl::Option oMsvMode({"-msv-mode"}, + " -msv-mode \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMsvr4StructReturn({"-msvr4-struct-return"}, + " -msvr4-struct-return \tReturn structures smaller than 8 bytes in registers (as specified by the " + "SVR4 ABI).\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMswap({"-mswap"}, + " -mswap \tGenerate swap instructions.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMswape({"-mswape"}, + " -mswape \tPassed down to the assembler to enable the swap byte ordering extension " + "instruction.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMsym32({"-msym32"}, + " -msym32 \tAssume that all symbols have 32-bit values, regardless of the selected ABI.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-sym32"), maplecl::kHide); + +maplecl::Option oMsynci({"-msynci"}, + " -msynci \tEnable (disable) generation of synci instructions on architectures that " + "support it.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-synci"), maplecl::kHide); + +maplecl::Option oMsysCrt0({"-msys-crt0"}, + " -msys-crt0 \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMsysLib({"-msys-lib"}, + " -msys-lib \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMtargetAlign({"-mtarget-align"}, + " -mtarget-align \t\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-target-align"), maplecl::kHide); + +maplecl::Option oMtas({"-mtas"}, + " -mtas \tGenerate the tas.b opcode for __atomic_test_and_set.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMtbm({"-mtbm"}, + " -mtbm \tThese switches enable the use of instructions in the mtbm.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMtelephony({"-mtelephony"}, + " -mtelephony \tPassed down to the assembler to enable dual- and single-operand instructions " + "for telephony. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMtextSectionLiterals({"-mtext-section-literals"}, + " -mtext-section-literals \t\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-text-section-literals"), maplecl::kHide); + +maplecl::Option oMtf({"-mtf"}, + " -mtf \tCauses all functions to default to the .far section.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMthread({"-mthread"}, + " -mthread \tThis option is available for MinGW targets.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMthreads({"-mthreads"}, + " -mthreads \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMthumb({"-mthumb"}, + " -mthumb \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMthumbInterwork({"-mthumb-interwork"}, + " -mthumb-interwork \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMtinyStack({"-mtiny-stack"}, + " -mtiny-stack \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option usePipe({"-pipe"}, + " -pipe \tUse pipes between commands, when possible.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option fStrongEvalOrder({"-fstrong-eval-order"}, + " -fstrong-eval-order \tFollow the C++17 evaluation order requirements for assignment expressions," + " shift, member function calls, etc.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +} \ No newline at end of file diff --git a/src/mapleall/maple_driver/src/unsupport_string.cpp b/src/mapleall/maple_driver/src/unsupport_string.cpp new file mode 100644 index 0000000000000000000000000000000000000000..4beda7f6da97d28dc7ce04b990efc12f3040aa52 --- /dev/null +++ b/src/mapleall/maple_driver/src/unsupport_string.cpp @@ -0,0 +1,1548 @@ +/* + * Copyright (c) [2023] Huawei Technologies Co.,Ltd.All rights reserved. + * + * OpenArkCompiler is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * + * http://license.coscl.org.cn/MulanPSL2 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ + +#include "driver_options.h" + +namespace opts { + +maplecl::Option fpic({"-fpic", "--fpic"}, + " --fpic \tGenerate position-independent shared library in small mode.\n" + " --no-pic/-fno-pic \n", + {cgCategory, driverCategory, ldCategory}, kOptCommon | kOptLd | kOptNotFiltering, + maplecl::DisableEvery({"-fno-pic", "--no-pic"})); + +/* ##################### STRING Options ############################################################### */ + +maplecl::Option foffloadOptions({"-foffload-options="}, + " -foffload-options= \t-foffload-options== Specify options for the offloading targets." + " options or targets=options missing after %qs\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option linkerTimeOptE({"-flto="}, + " -flto= \tSet LTO mode to either 'full' or 'thin'.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option fStrongEvalOrderE({"-fstrong-eval-order="}, + " -fstrong-eval-order \tFollow the C++17 evaluation order requirementsfor assignment expressions, " + "shift, member function calls, etc.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFmaxErrors({"-fmax-errors"}, + " -fmax-errors \tLimits the maximum number of error messages to n, If n is 0 (the default), " + "there is no limit on the number of error messages produced. If -Wfatal-errors is also specified, then " + "-Wfatal-errors takes precedence over this option.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMalignData({"-malign-data"}, + " -malign-data \tControl how GCC aligns variables. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMatomicModel({"-matomic-model"}, + " -matomic-model \tSets the model of atomic operations and additional parameters as a comma " + "separated list. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMaxVectAlign({"-max-vect-align"}, + " -max-vect-align \tThe maximum alignment for SIMD vector mode types.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMbased({"-mbased"}, + " -mbased \tVariables of size n bytes or smaller are placed in the .based " + "section by default\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMblockMoveInlineLimit({"-mblock-move-inline-limit"}, + " -mblock-move-inline-limit \tInline all block moves (such as calls to memcpy or structure copies) " + "less than or equal to num bytes. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMbranchCost({"-mbranch-cost"}, + " -mbranch-cost \tSet the cost of branches to roughly num 'simple' instructions.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMc({"-mc"}, + " -mc \tSelects which section constant data is placed in. name may be 'tiny', " + "'near', or 'far'.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMcacheBlockSize({"-mcache-block-size"}, + " -mcache-block-size \tSpecify the size of each cache block, which must be a power of 2 " + "between 4 and 512.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMcacheSize({"-mcache-size"}, + " -mcache-size \tThis option controls the version of libgcc that the compiler links to an " + "executable and selects a software-managed cache for accessing variables in the __ea address space with a " + "particular cache size.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMcmodel({"-mcmodel"}, + " -mcmodel \tSpecify the code model.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMcodeReadable({"-mcode-readable"}, + " -mcode-readable \tSpecify whether Maple may generate code that reads from executable sections.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMconfig({"-mconfig"}, + " -mconfig \tSelects one of the built-in core configurations. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMcpu({"-mcpu"}, + " -mcpu \tSpecify the name of the target processor, optionally suffixed by " + "one or more feature modifiers.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMdataRegion({"-mdata-region"}, + " -mdata-region \ttell the compiler where to place functions and data that do not have one " + "of the lower, upper, either or section attributes.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMdivsi3_libfuncName({"-mdivsi3_libfunc"}, + " -mdivsi3_libfunc \tSet the name of the library function used for 32-bit signed division to name.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMdualNopsE({"-mdual-nops="}, + " -mdual-nops= \tBy default, GCC inserts NOPs to increase dual issue when it expects it " + "to increase performance.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMemregsE({"-memregs="}, + " -memregs= \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMfixedRange({"-mfixed-range"}, + " -mfixed-range \tGenerate code treating the given register range as fixed registers.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMfloatGprs({"-mfloat-gprs"}, + " -mfloat-gprs \tThis switch enables the generation of floating-point operations on the " + "general-purpose registers for architectures that support it.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMflushFunc({"-mflush-func"}, + " -mflush-func \tSpecifies the function to call to flush the I and D caches, or to not " + "call any such function. \n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-flush-func"), maplecl::kHide); + +maplecl::Option oMflushTrap({"-mflush-trap"}, + " -mflush-trap \t\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-flush-trap"), maplecl::kHide); + +maplecl::Option oMfpRoundingMode({"-mfp-rounding-mode"}, + " -mfp-rounding-mode \tSelects the IEEE rounding mode.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMfpTrapMode({"-mfp-trap-mode"}, + " -mfp-trap-mode \tThis option controls what floating-point related traps are enabled.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMfpu({"-mfpu"}, + " -mfpu \tEnables support for specific floating-point hardware extensions for " + "ARCv2 cores.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-fpu"), maplecl::kHide); + +maplecl::Option oMhintMaxDistance({"-mhint-max-distance"}, + " -mhint-max-distance \tThe encoding of the branch hint instruction limits the hint to be within 256 " + "instructions of the branch it is affecting.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMhintMaxNops({"-mhint-max-nops"}, + " -mhint-max-nops \tMaximum number of NOPs to insert for a branch hint.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMhotpatch({"-mhotpatch"}, + " -mhotpatch \tIf the hotpatch option is enabled, a “hot-patching” function prologue is " + "generated for all functions in the compilation unit. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMhwmultE({"-mhwmult="}, + " -mhwmult= \tDescribes the type of hardware multiply supported by the target.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMinsertSchedNops({"-minsert-sched-nops"}, + " -minsert-sched-nops \tThis option controls which NOP insertion scheme is used during the second " + "scheduling pass.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMiselE({"-misel="}, + " -misel= \tThis switch has been deprecated. Use -misel and -mno-isel instead.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMisel({"-misel"}, + " -misel \tThis switch enables or disables the generation of ISEL instructions.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-isel"), maplecl::kHide); + +maplecl::Option oMisrVectorSize({"-misr-vector-size"}, + " -misr-vector-size \tSpecify the size of each interrupt vector, which must be 4 or 16.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMmcuE({"-mmcu="}, + " -mmcu= \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMmemoryLatency({"-mmemory-latency"}, + " -mmemory-latency \tSets the latency the scheduler should assume for typical memory references " + "as seen by the application.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMmemoryModel({"-mmemory-model"}, + " -mmemory-model \tSet the memory model in force on the processor to one of.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMoverrideE({"-moverride="}, + " -moverride= \tPower users only! Override CPU optimization parameters.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMprioritizeRestrictedInsns({"-mprioritize-restricted-insns"}, + " -mprioritize-restricted-insns \tThis option controls the priority that is assigned to dispatch-slot " + "restricted instructions during the second scheduling pass. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMrecip({"-mrecip"}, + " -mrecip \tThis option enables use of the reciprocal estimate and reciprocal square " + "root estimate instructions with additional Newton-Raphson steps to increase precision instead of doing a " + "divide or square root and divide for floating-point arguments.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMrecipE({"-mrecip="}, + " -mrecip= \tThis option controls which reciprocal estimate instructions may be used.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMschedCostlyDep({"-msched-costly-dep"}, + " -msched-costly-dep \tThis option controls which dependences are considered costly by the target " + "during instruction scheduling.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMschedule({"-mschedule"}, + " -mschedule \tSchedule code according to the constraints for the machine type cpu-type. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMsda({"-msda"}, + " -msda \tPut static or global variables whose size is n bytes or less into the small " + "data area that register gp points to.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMsharedLibraryId({"-mshared-library-id"}, + " -mshared-library-id \tSpecifies the identification number of the ID-based shared library being " + "compiled.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMsignReturnAddress({"-msign-return-address"}, + " -msign-return-address \tSelect return address signing scope.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMsiliconErrata({"-msilicon-errata"}, + " -msilicon-errata \tThis option passes on a request to assembler to enable the fixes for the " + "named silicon errata.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMsiliconErrataWarn({"-msilicon-errata-warn"}, + " -msilicon-errata-warn \tThis option passes on a request to the assembler to enable warning messages " + "when a silicon errata might need to be applied.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMsizeLevel({"-msize-level"}, + " -msize-level \tFine-tune size optimization with regards to instruction lengths and alignment.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMspe({"-mspe="}, + " -mspe= \tThis option has been deprecated. Use -mspe and -mno-spe instead.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMstackGuard({"-mstack-guard"}, + " -mstack-guard \tThe S/390 back end emits additional instructions in the function prologue that " + "trigger a trap if the stack size is stack-guard bytes above the stack-size (remember that the stack on S/390 " + "grows downward). \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMstackProtectorGuard({"-mstack-protector-guard"}, + " -mstack-protector-guard \tGenerate stack protection code using canary at guard.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMstackProtectorGuardOffset({"-mstack-protector-guard-offset"}, + " -mstack-protector-guard-offset \tWith the latter choice the options -mstack-protector-guard-reg=reg and " + "-mstack-protector-guard-offset=offset furthermore specify which register to use as base register for reading " + "the canary, and from what offset from that base register. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMstackProtectorGuardReg({"-mstack-protector-guard-reg"}, + " -mstack-protector-guard-reg \tWith the latter choice the options -mstack-protector-guard-reg=reg and " + "-mstack-protector-guard-offset=offset furthermore specify which register to use as base register for reading " + "the canary, and from what offset from that base register. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMstackSize({"-mstack-size"}, + " -mstack-size \tThe S/390 back end emits additional instructions in the function prologue that" + " trigger a trap if the stack size is stack-guard bytes above the stack-size (remember that the stack on S/390 " + "grows downward). \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMtda({"-mtda"}, + " -mtda \tPut static or global variables whose size is n bytes or less into the tiny " + "data area that register ep points to.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMtiny({"-mtiny"}, + " -mtiny \tVariables that are n bytes or smaller are allocated to the .tiny section.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMveclibabi({"-mveclibabi"}, + " -mveclibabi \tSpecifies the ABI type to use for vectorizing intrinsics using an external " + "library. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMunix({"-munix"}, + " -munix \tGenerate compiler predefines and select a startfile for the specified " + "UNIX standard. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMtrapPrecision({"-mtrap-precision"}, + " -mtrap-precision \tIn the Alpha architecture, floating-point traps are imprecise.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMtune({"-mtune="}, + " -mtune= \tOptimize for CPU. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMultcost({"-multcost"}, + " -multcost \tReplaced by -mmultcost.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMtp({"-mtp"}, + " -mtp \tSpecify the access model for the thread local storage pointer. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMtpRegno({"-mtp-regno"}, + " -mtp-regno \tSpecify thread pointer register number.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMtlsDialect({"-mtls-dialect"}, + " -mtls-dialect \tSpecify TLS dialect.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oIplugindir({"-iplugindir="}, + " -iplugindir= \t-iplugindir= o Set oto be the default plugin directory.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oIprefix({"-iprefix"}, + " -iprefix \t-iprefix o Specify oas a prefix for next two options.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oIquote({"-iquote"}, + " -iquote \t-iquote o Add oto the end of the quote include path.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oIsysroot({"-isysroot"}, + " -isysroot \t-isysroot o Set oto be the system root directory.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oIwithprefix({"-iwithprefix"}, + " -iwithprefix \t-iwithprefix oAdd oto the end of the system include path.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oIwithprefixbefore({"-iwithprefixbefore"}, + " -iwithprefixbefore \t-iwithprefixbefore o Add oto the end ofthe main include path.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oImultilib({"-imultilib"}, + " -imultilib \t-imultilib o Set oto be the multilib include subdirectory.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oInclude({"-include"}, + " -include \t-include o Include the contents of obefore other files.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oIframework({"-iframework"}, + " -iframework \tLike -F except the directory is a treated as a system directory. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oG({"-G"}, + " -G \tOn embedded PowerPC systems, put global and static items less than or equal " + "to num bytes into the small data or BSS sections instead of the normal data or BSS section. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oYm({"-Ym"}, + " -Ym \tLook in the directory dir to find the M4 preprocessor. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oYP({"-YP"}, + " -YP \tSearch the directories dirs, and no others, for libraries specified with -l.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oXassembler({"-Xassembler"}, + " -Xassembler \tPass option as an option to the assembler. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oWa({"-Wa"}, + " -Wa \tPass option as an option to the assembler. If option contains commas, it is " + "split into multiple options at the commas.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oTime({"-time"}, + " -time \tReport the CPU time taken by each subprocess in the compilation sequence. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMzda({"-mzda"}, + " -mzda \tPut static or global variables whose size is n bytes or less into the first 32" + " kilobytes of memory.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFwideExecCharset({"-fwide-exec-charset="}, + " -fwide-exec-charset= \tConvert all wide strings and character constants to character set .\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMwarnFramesize({"-mwarn-framesize"}, + " -mwarn-framesize \tEmit a warning if the current function exceeds the given frame size.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFtrackMacroExpansionE({"-ftrack-macro-expansion="}, + " -ftrack-macro-expansion= \tTrack locations of tokens across macro expansions.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFtemplateBacktraceLimit({"-ftemplate-backtrace-limit="}, + " -ftemplate-backtrace-limit= \tSet the maximum number of template instantiation notes for a single warning " + "or error to n.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFtemplateDepth({"-ftemplate-depth-"}, + " -ftemplate-depth- \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFtemplateDepthE({"-ftemplate-depth="}, + " -ftemplate-depth= \tSpecify maximum template instantiation depth.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFstack_reuse({"-fstack-reuse="}, + " -fstack_reuse= \tSet stack reuse level for local variables.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFstackCheckE({"-fstack-check="}, + " -fstack-check= \t-fstack-check=[no|generic|specific] Insert stack checking code into " + "the program.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFstackLimitRegister({"-fstack-limit-register="}, + " -fstack-limit-register= \tTrap if the stack goes past \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFstackLimitSymbol({"-fstack-limit-symbol="}, + " -fstack-limit-symbol= \tTrap if the stack goes past symbol .\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFsanitize({"-fsanitize"}, + " -fsanitize \tSelect what to sanitize.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-sanitize"), maplecl::kHide); + +maplecl::Option oFsanitizeRecoverE({"-fsanitize-recover="}, + " -fsanitize-recover= \tAfter diagnosing undefined behavior attempt to continue execution.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFsanitizeSections({"-fsanitize-sections="}, + " -fsanitize-sections= \tSanitize global variables in user-defined sections.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFrandomSeedE({"-frandom-seed="}, + " -frandom-seed= \tMake compile reproducible using .\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFreorderBlocksAlgorithm({"-freorder-blocks-algorithm="}, + " -freorder-blocks-algorithm= \tSet the used basic block reordering algorithm.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFprofileUseE({"-fprofile-use="}, + " -fprofile-use= \tEnable common options for performing profile feedback directed optimizations, " + "and set -fprofile-dir=.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFprofileDir({"-fprofile-dir="}, + " -fprofile-dir= \tSet the top-level directory for storing the profile data. The default is 'pwd'.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFprofileUpdate({"-fprofile-update="}, + " -fprofile-update= \tSet the profile update method.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFplugin({"-fplugin="}, + " -fplugin= \tSpecify a plugin to load.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFpluginArg({"-fplugin-arg-"}, + " -fplugin-arg- \tSpecify argument = ofor plugin .\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFpermittedFltEvalMethods({"-fpermitted-flt-eval-methods="}, + " -fpermitted-flt-eval-methods= \tSpecify which values of FLT_EVAL_METHOD are permitted.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFobjcAbiVersion({"-fobjc-abi-version="}, + " -fobjc-abi-version= \tSpecify which ABI to use for Objective-C family code and meta-data generation.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFoffloadAbi({"-foffload-abi="}, + " -foffload-abi= \tSet the ABI to use in an offload compiler.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFoffload({"-foffload="}, + " -foffload= \tSpecify offloading targets and options for them.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFopenaccDim({"-fopenacc-dim="}, + " -fopenacc-dim= \tSpecify default OpenACC compute dimensions.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFCheckingE({"-fchecking="}, + " -fchecking= \tPerform internal consistency checkings.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFmessageLength({"-fmessage-length="}, + " -fmessage-length= \t-fmessage-length= o Limit diagnostics to ocharacters per " + "line. 0 suppresses line-wrapping.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFltoPartition({"-flto-partition="}, + " -flto-partition= \tSpecify the algorithm to partition symbols and vars at linktime.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFltoCompressionLevel({"-flto-compression-level="}, + " -flto-compression-level= \tUse zlib compression level ofor IL.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFivarVisibility({"-fivar-visibility="}, + " -fivar-visibility= \tSet the default symbol visibility.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFliveRangeShrinkage({"-flive-range-shrinkage"}, + " -flive-range-shrinkage \tRelief of register pressure through live range shrinkage\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-live-range-shrinkage"), maplecl::kHide); + +maplecl::Option oFiraRegion({"-fira-region="}, + " -fira-region= \tSet regions for IRA.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFiraVerbose({"-fira-verbose="}, + " -fira-verbose= \tControl IRA's level of diagnostic messages.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFiraAlgorithmE({"-fira-algorithm="}, + " -fira-algorithm= \tSet the used IRA algorithm.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFinstrumentFunctionsExcludeFileList({"-finstrument-functions-exclude-file-list="}, + " -finstrument-functions-exclude-file-list= \tDo not instrument functions listed in files.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFinstrumentFunctionsExcludeFunctionList({"-finstrument-functions-exclude-function-list="}, + " -finstrument-functions-exclude-function-list= \tDo not instrument listed functions.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFinlineLimit({"-finline-limit-"}, + " -finline-limit- \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFinlineLimitE({"-finline-limit="}, + " -finline-limit= \tLimit the size of inlined functions to .\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFinlineMatmulLimitE({"-finline-matmul-limit="}, + " -finline-matmul-limit= \tecify the size of the largest matrix for which matmul will be inlined.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFfpContract ({"-ffp-contract="}, + " -ffp-contract= \tPerform floating-point expression contraction.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFfixed({"-ffixed-"}, + " -ffixed- \t-ffixed- Mark oas being unavailable to the compiler.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFexcessPrecision({"-fexcess-precision="}, + " -fexcess-precision= \tSpecify handling of excess floating-point precision.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFenable({"-fenable-"}, + " -fenable- \t-fenable-[tree|rtl|ipa]-=range1+range2 enables an optimization pass.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFemitStructDebugDetailedE({"-femit-struct-debug-detailed="}, + " -femit-struct-debug-detailed \t-femit-struct-debug-detailed= oDetailed reduced debug info for " + "structs.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFdumpRtlPass({"-fdump-rtl-pass"}, + " -fdump-rtl-pass \tSays to make debugging dumps during compilation at times specified by letters.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFdumpFinalInsns({"-fdump-final-insns"}, + " -fdump-final-insns \tDump the final internal representation (RTL) to file.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFdumpGoSpec({"-fdump-go-spec="}, + " -fdump-go-spec \tWrite all declarations to file as Go code.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFdisable({"-fdisable-"}, + " -fdisable- \t-fdisable-[tree|rtl|ipa]-=range1+range2 disables an optimization pass.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFdiagnosticsShowLocation({"-fdiagnostics-show-location"}, + " -fdiagnostics-show-location \tHow often to emit source location at the beginning of line-wrapped diagnostics.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFcompareDebugE({"-fcompare-debug="}, + " -fcompare-debug= \tCompile with and without e.g. -gtoggle, and compare the final-insns dump.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFconstantStringClass({"-fconstant-string-class="}, + " -fconstant-string-class= \tUse class ofor constant strings. No class name specified with %qs\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFconstexprDepth({"-fconstexpr-depth="}, + " -fconstexpr-depth= \tpecify maximum constexpr recursion depth.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFconstexprLoopLimit({"-fconstexpr-loop-limit="}, + " -fconstexpr-loop-limit= \tSpecify maximum constexpr loop iteration count.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFabiCompatVersion({"-fabi-compat-version="}, + " -fabi-compat-version= \tThe version of the C++ ABI in use.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFabiVersion({"-fabi-version="}, + " -fabi-version= \tUse version n of the C++ ABI. The default is version 0.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFadaSpecParent({"-fada-spec-parent="}, + " -fada-spec-parent= \tIn conjunction with -fdump-ada-spec[-slim] above, generate Ada specs as " + "child units of parent unit.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oBundle_loader({"-bundle_loader"}, + " -bundle_loader \tThis option specifies the executable that will load the build output file " + "being linked.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +/* ##################### BOOL Options ############################################################### */ + +maplecl::Option oFipaBitCp({"-fipa-bit-cp"}, + " -fipa-bit-cp \tWhen enabled, perform interprocedural bitwise constant propagation. This " + "flag is enabled by default at -O2. It requires that -fipa-cp is enabled.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFipaVrp({"-fipa-vrp"}, + " -fipa-vrp \tWhen enabled, perform interprocedural propagation of value ranges. This " + "flag is enabled by default at -O2. It requires that -fipa-cp is enabled.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMindirectBranchRegister({"-mindirect-branch-register"}, + " -mindirect-branch-register \tForce indirect call and jump via register.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oMlowPrecisionDiv({"-mlow-precision-div"}, + " -mlow-precision-div \tEnable the division approximation. Enabling this reduces precision of " + "division results to about 16 bits for single precision and to 32 bits for double precision.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-low-precision-div"), maplecl::kHide); + +maplecl::Option oMlowPrecisionSqrt({"-mlow-precision-sqrt"}, + " -mlow-precision-sqrt \tEnable the reciprocal square root approximation. Enabling this reduces precision" + " of reciprocal square root results to about 16 bits for single precision and to 32 bits for double precision.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-low-precision-sqrt"), maplecl::kHide); + +maplecl::Option oM80387({"-m80387"}, + " -m80387 \tGenerate output containing 80387 instructions for floating point.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-80387"), maplecl::kHide); + +maplecl::Option oAllowable_client({"-allowable_client"}, + " -allowable_client \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oAll_load({"-all_load"}, + " -all_load \tLoads all members of static archive libraries.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oArch_errors_fatal({"-arch_errors_fatal"}, + " -arch_errors_fatal \tCause the errors having to do with files that have the wrong architecture " + "to be fatal.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oAuxInfo({"-aux-info"}, + " -aux-info \tEmit declaration information into .\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oBdynamic({"-Bdynamic"}, + " -Bdynamic \tDefined for compatibility with Diab.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oBind_at_load({"-bind_at_load"}, + " -bind_at_load \tCauses the output file to be marked such that the dynamic linker will bind " + "all undefined references when the file is loaded or launched.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oBstatic({"-Bstatic"}, + " -Bstatic \tdefined for compatibility with Diab.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oBundle({"-bundle"}, + " -bundle \tProduce a Mach-o bundle format file. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oC({"-C"}, + " -C \tDo not discard comments.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oCC({"-CC"}, + " -CC \tDo not discard comments in macro expansions.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oClient_name({"-client_name"}, + " -client_name \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oCompatibility_version({"-compatibility_version"}, + " -compatibility_version \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oCoverage({"-coverage"}, + " -coverage \tThe option is a synonym for -fprofile-arcs -ftest-coverage (when compiling) " + "and -lgcov (when linking). \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oCurrent_version({"-current_version"}, + " -current_version \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oDa({"-da"}, + " -da \tProduce all the dumps listed above.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oDA({"-dA"}, + " -dA \tAnnotate the assembler output with miscellaneous debugging information.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oDD({"-dD"}, + " -dD \tDump all macro definitions, at the end of preprocessing, in addition to " + "normal output.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oDead_strip({"-dead_strip"}, + " -dead_strip \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oDependencyFile({"-dependency-file"}, + " -dependency-file \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oDH({"-dH"}, + " -dH \tProduce a core dump whenever an error occurs.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oDp({"-dp"}, + " -dp \tAnnotate the assembler output with a comment indicating which pattern and " + "alternative is used. The length of each instruction is also printed.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oDP({"-dP"}, + " -dP \tDump the RTL in the assembler output as a comment before each instruction. " + "Also turns on -dp annotation.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oDumpfullversion({"-dumpfullversion"}, + " -dumpfullversion \tPrint the full compiler version, always 3 numbers separated by dots, major," + " minor and patchlevel version.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oDumpmachine({"-dumpmachine"}, + " -dumpmachine \tPrint the compiler's target machine (for example, 'i686-pc-linux-gnu') and " + "don't do anything else.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oDumpspecs({"-dumpspecs"}, + " -dumpspecs \tPrint the compiler's built-in specs—and don't do anything else. (This is " + "used when MAPLE itself is being built.)\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oDx({"-dx"}, + " -dx \tJust generate RTL for a function instead of compiling it. Usually used " + "with -fdump-rtl-expand.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oDylib_file({"-dylib_file"}, + " -dylib_file \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oDylinker_install_name({"-dylinker_install_name"}, + " -dylinker_install_name \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oDynamic({"-dynamic"}, + " -dynamic \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oDynamiclib({"-dynamiclib"}, + " -dynamiclib \tWhen passed this option, GCC produces a dynamic library instead of an " + "executable when linking, using the Darwin libtool command.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oEB({"-EB"}, + " -EB \tCompile code for big-endian targets.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oEL({"-EL"}, + " -EL \tCompile code for little-endian targets. \n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oExported_symbols_list({"-exported_symbols_list"}, + " -exported_symbols_list \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFaggressiveLoopOptimizations({"-faggressive-loop-optimizations"}, + " -faggressive-loop-optimizations \tThis option tells the loop optimizer to use language constraints to " + "derive bounds for the number of iterations of a loop.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-aggressive-loop-optimizations"), maplecl::kHide); + +maplecl::Option oFchkpFlexibleStructTrailingArrays({"-fchkp-flexible-struct-trailing-arrays"}, + " -fchkp-flexible-struct-trailing-arrays \tForces Pointer Bounds Checker to treat all trailing arrays in " + "structures as possibly flexible.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-chkp-flexible-struct-trailing-arrays"), maplecl::kHide); + +maplecl::Option oFchkpInstrumentCalls({"-fchkp-instrument-calls"}, + " -fchkp-instrument-calls \tInstructs Pointer Bounds Checker to pass pointer bounds to calls." + " Enabled by default.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-chkp-instrument-calls"), maplecl::kHide); + +maplecl::Option oFchkpInstrumentMarkedOnly({"-fchkp-instrument-marked-only"}, + " -fchkp-instrument-marked-only \tInstructs Pointer Bounds Checker to instrument only functions marked with " + "the bnd_instrument attribute \n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-chkp-instrument-marked-only"), maplecl::kHide); + +maplecl::Option oFchkpNarrowBounds({"-fchkp-narrow-bounds"}, + " -fchkp-narrow-bounds \tControls bounds used by Pointer Bounds Checker for pointers to object fields.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-chkp-narrow-bounds"), maplecl::kHide); + +maplecl::Option oFchkpNarrowToInnermostArray({"-fchkp-narrow-to-innermost-array"}, + " -fchkp-narrow-to-innermost-array \tForces Pointer Bounds Checker to use bounds of the innermost arrays in " + "case of nested static array access.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-chkp-narrow-to-innermost-array"), maplecl::kHide); + +maplecl::Option oFchkpOptimize({"-fchkp-optimize"}, + " -fchkp-optimize \tEnables Pointer Bounds Checker optimizations.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-chkp-optimize"), maplecl::kHide); + +maplecl::Option oFchkpStoreBounds({"-fchkp-store-bounds"}, + " -fchkp-store-bounds tInstructs Pointer Bounds Checker to generate bounds tores for pointer writes.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-chkp-store-bounds"), maplecl::kHide); + +maplecl::Option oFchkpTreatZeroDynamicSizeAsInfinite({"-fchkp-treat-zero-dynamic-size-as-infinite"}, + " -fchkp-treat-zero-dynamic-size-as-infinite \tWith this option, objects with incomplete type whose " + "dynamically-obtained size is zero are treated as having infinite size instead by Pointer Bounds Checker. \n", + {driverCategory, unSupCategory}, + maplecl::DisableWith("-fno-chkp-treat-zero-dynamic-size-as-infinite"), maplecl::kHide); + +maplecl::Option oFchkpUseFastStringFunctions({"-fchkp-use-fast-string-functions"}, + " -fchkp-use-fast-string-functions \tEnables use of *_nobnd versions of string functions (not copying bounds) " + "by Pointer Bounds Checker. \n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-chkp-use-fast-string-functions"), maplecl::kHide); + +maplecl::Option oFchkpUseNochkStringFunctions({"-fchkp-use-nochk-string-functions"}, + " -fchkp-use-nochk-string-functions \tEnables use of *_nochk versions of string functions (not checking bounds) " + "by Pointer Bounds Checker. \n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-chkp-use-nochk-string-functions"), maplecl::kHide); + +maplecl::Option oFchkpUseStaticBounds({"-fchkp-use-static-bounds"}, + " -fchkp-use-static-bounds \tAllow Pointer Bounds Checker to generate static bounds holding bounds of " + "static variables. \n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-chkp-use-static-bounds"), maplecl::kHide); + +maplecl::Option oFchkpUseStaticConstBounds({"-fchkp-use-static-const-bounds"}, + " -fchkp-use-static-const-bounds \tUse statically-initialized bounds for constant bounds instead of generating" + " them each time they are required.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-chkp-use-static-const-bounds"), maplecl::kHide); + +maplecl::Option oFchkpUseWrappers({"-fchkp-use-wrappers"}, + " -fchkp-use-wrappers \tAllows Pointer Bounds Checker to replace calls to built-in functions with calls" + " to wrapper functions.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-chkp-use-wrappers"), maplecl::kHide); + +maplecl::Option oFcilkplus({"-fcilkplus"}, + " -fcilkplus \tEnable Cilk Plus.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-cilkplus"), maplecl::kHide); + +maplecl::Option oFcodeHoisting({"-fcode-hoisting"}, + " -fcode-hoisting \tPerform code hoisting. \n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-code-hoisting"), maplecl::kHide); + +maplecl::Option oFcombineStackAdjustments({"-fcombine-stack-adjustments"}, + " -fcombine-stack-adjustments \tTracks stack adjustments (pushes and pops) and stack memory references and " + "then tries to find ways to combine them.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-combine-stack-adjustments"), maplecl::kHide); + +maplecl::Option oFcompareDebug({"-fcompare-debug"}, + " -fcompare-debug \tCompile with and without e.g. -gtoggle, and compare the final-insns dump.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-compare-debug"), maplecl::kHide); + +maplecl::Option oFcompareDebugSecond({"-fcompare-debug-second"}, + " -fcompare-debug-second tRun only the second compilation of -fcompare-debug.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFcompareElim({"-fcompare-elim"}, + " -fcompare-elim \tPerform comparison elimination after register allocation has finished.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-compare-elim"), maplecl::kHide); + +maplecl::Option oFconcepts({"-fconcepts"}, + " -fconcepts \tEnable support for C++ concepts.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-concepts"), maplecl::kHide); + +maplecl::Option oFcondMismatch({"-fcond-mismatch"}, + " -fcond-mismatch \tAllow the arguments of the '?' operator to have different types.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-cond-mismatch"), maplecl::kHide); + +maplecl::Option oFconserveStack({"-fconserve-stack"}, + " -fconserve-stack \tDo not perform optimizations increasing noticeably stack usage.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-conserve-stack"), maplecl::kHide); + +maplecl::Option oFcpropRegisters({"-fcprop-registers"}, + " -fcprop-registers \tPerform a register copy-propagation optimization pass.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-cprop-registers"), maplecl::kHide); + +maplecl::Option oFcrossjumping({"-fcrossjumping"}, + " -fcrossjumping \tPerform cross-jumping transformation. This transformation unifies equivalent " + "code and saves code size.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-crossjumping"), maplecl::kHide); + +maplecl::Option oFcseFollowJumps({"-fcse-follow-jumps"}, + " -fcse-follow-jumps \tWhen running CSE, follow jumps to their targets.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-cse-follow-jumps"), maplecl::kHide); + +maplecl::Option oFcseSkipBlocks({"-fcse-skip-blocks"}, + " -fcse-skip-blocks \tDoes nothing. Preserved for backward compatibility.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-cse-skip-blocks"), maplecl::kHide); + +maplecl::Option oFcxFortranRules({"-fcx-fortran-rules"}, + " -fcx-fortran-rules \tComplex multiplication and division follow Fortran rules.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-cx-fortran-rules"), maplecl::kHide); + +maplecl::Option oFcxLimitedRange({"-fcx-limited-range"}, + " -fcx-limited-range \tOmit range reduction step when performing complex division.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-cx-limited-range"), maplecl::kHide); + +maplecl::Option oFdbgCnt({"-fdbg-cnt"}, + " -fdbg-cnt \tPlace data items into their own section.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dbg-cnt"), maplecl::kHide); + +maplecl::Option oFdbgCntList({"-fdbg-cnt-list"}, + " -fdbg-cnt-list \tList all available debugging counters with their limits and counts.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dbg-cnt-list"), maplecl::kHide); + +maplecl::Option oFdce({"-fdce"}, + " -fdce \tUse the RTL dead code elimination pass.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dce"), maplecl::kHide); + +maplecl::Option oFdebugCpp({"-fdebug-cpp"}, + " -fdebug-cpp \tEmit debug annotations during preprocessing.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-debug-cpp"), maplecl::kHide); + +maplecl::Option oFdebugPrefixMap({"-fdebug-prefix-map"}, + " -fdebug-prefix-map \tMap one directory name to another in debug information.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-debug-prefix-map"), maplecl::kHide); + +maplecl::Option oFdebugTypesSection({"-fdebug-types-section"}, + " -fdebug-types-section \tOutput .debug_types section when using DWARF v4 debuginfo.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-debug-types-section"), maplecl::kHide); + +maplecl::Option oFdecloneCtorDtor({"-fdeclone-ctor-dtor"}, + " -fdeclone-ctor-dtor \tFactor complex constructors and destructors to favor space over speed.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-declone-ctor-dtor"), maplecl::kHide); + +maplecl::Option oFdeduceInitList({"-fdeduce-init-list"}, + " -fdeduce-init-list \tenable deduction of std::initializer_list for a template type parameter " + "from a brace-enclosed initializer-list.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-deduce-init-list"), maplecl::kHide); + +maplecl::Option oFdelayedBranch({"-fdelayed-branch"}, + " -fdelayed-branch \tAttempt to fill delay slots of branch instructions.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-delayed-branch"), maplecl::kHide); + +maplecl::Option oFdeleteDeadExceptions({"-fdelete-dead-exceptions"}, + " -fdelete-dead-exceptions \tDelete dead instructions that may throw exceptions.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-delete-dead-exceptions"), maplecl::kHide); + +maplecl::Option oFdeleteNullPointerChecks({"-fdelete-null-pointer-checks"}, + " -fdelete-null-pointer-checks \tDelete useless null pointer checks.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-delete-null-pointer-checks"), maplecl::kHide); + +maplecl::Option oFdevirtualize({"-fdevirtualize"}, + " -fdevirtualize \tTry to convert virtual calls to direct ones.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-devirtualize"), maplecl::kHide); + +maplecl::Option oFdevirtualizeAtLtrans({"-fdevirtualize-at-ltrans"}, + " -fdevirtualize-at-ltrans \tStream extra data to support more aggressive devirtualization in LTO local " + "transformation mode.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-devirtualize-at-ltrans"), maplecl::kHide); + +maplecl::Option oFdevirtualizeSpeculatively({"-fdevirtualize-speculatively"}, + " -fdevirtualize-speculatively \tPerform speculative devirtualization.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-devirtualize-speculatively"), maplecl::kHide); + +maplecl::Option oFdiagnosticsGeneratePatch({"-fdiagnostics-generate-patch"}, + " -fdiagnostics-generate-patch \tPrint fix-it hints to stderr in unified diff format.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-diagnostics-generate-patch"), maplecl::kHide); + +maplecl::Option oFdiagnosticsParseableFixits({"-fdiagnostics-parseable-fixits"}, + " -fdiagnostics-parseable-fixits \tPrint fixit hints in machine-readable form.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-diagnostics-parseable-fixits"), maplecl::kHide); + +maplecl::Option oFdiagnosticsShowCaret({"-fdiagnostics-show-caret"}, + " -fdiagnostics-show-caret \tShow the source line with a caret indicating the column.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-diagnostics-show-caret"), maplecl::kHide); + +maplecl::Option oFdiagnosticsShowOption({"-fdiagnostics-show-option"}, + " -fdiagnostics-show-option \tAmend appropriate diagnostic messages with the command line option that " + "controls them.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("--fno-diagnostics-show-option"), maplecl::kHide); + +maplecl::Option oFdirectivesOnly({"-fdirectives-only"}, + " -fdirectives-only \tPreprocess directives only.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-fdirectives-only"), maplecl::kHide); + +maplecl::Option oFdse({"-fdse"}, + " -fdse \tUse the RTL dead store elimination pass.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dse"), maplecl::kHide); + +maplecl::Option oFdumpAdaSpec({"-fdump-ada-spec"}, + " -fdump-ada-spec \tWrite all declarations as Ada code transitively.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFdumpClassHierarchy({"-fdump-class-hierarchy"}, + " -fdump-class-hierarchy \tC++ only.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-class-hierarchy"), maplecl::kHide); + +maplecl::Option oFdumpIpa({"-fdump-ipa"}, + " -fdump-ipa \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFdumpNoaddr({"-fdump-noaddr"}, + " -fdump-noaddr \tSuppress output of addresses in debugging dumps.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-noaddr"), maplecl::kHide); + +maplecl::Option oFdumpPasses({"-fdump-passes"}, + " -fdump-passes \tDump optimization passes.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-passes"), maplecl::kHide); + +maplecl::Option oFdumpRtlAlignments({"-fdump-rtl-alignments"}, + " -fdump-rtl-alignments \tDump after branch alignments have been computed.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFdumpRtlAll({"-fdump-rtl-all"}, + " -fdump-rtl-all \tProduce all the dumps listed above.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-all"), maplecl::kHide); + +maplecl::Option oFdumpRtlAsmcons({"-fdump-rtl-asmcons"}, + " -fdump-rtl-asmcons \tDump after fixing rtl statements that have unsatisfied in/out constraints.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-asmcons"), maplecl::kHide); + +maplecl::Option oFdumpRtlAuto_inc_dec({"-fdump-rtl-auto_inc_dec"}, + " -fdump-rtl-auto_inc_dec \tDump after auto-inc-dec discovery. \n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-auto_inc_dec"), maplecl::kHide); + +maplecl::Option oFdumpRtlBarriers({"-fdump-rtl-barriers"}, + " -fdump-rtl-barriers \tDump after cleaning up the barrier instructions.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-barriers"), maplecl::kHide); + +maplecl::Option oFdumpRtlBbpart({"-fdump-rtl-bbpart"}, + " -fdump-rtl-bbpart \tDump after partitioning hot and cold basic blocks.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-bbpart"), maplecl::kHide); + +maplecl::Option oFdumpRtlBbro({"-fdump-rtl-bbro"}, + " -fdump-rtl-bbro \tDump after block reordering.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-bbro"), maplecl::kHide); + +maplecl::Option oFdumpRtlBtl2({"-fdump-rtl-btl2"}, + " -fdump-rtl-btl2 \t-fdump-rtl-btl1 and -fdump-rtl-btl2 enable dumping after the two branch target " + "load optimization passes.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-btl2"), maplecl::kHide); + +maplecl::Option oFdumpRtlBypass({"-fdump-rtl-bypass"}, + " -fdump-rtl-bypass \tDump after jump bypassing and control flow optimizations.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-bypass"), maplecl::kHide); + +maplecl::Option oFdumpRtlCe1({"-fdump-rtl-ce1"}, + " -fdump-rtl-ce1 \tEnable dumping after the three if conversion passes.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-ce1"), maplecl::kHide); + +maplecl::Option oFdumpRtlCe2({"-fdump-rtl-ce2"}, + " -fdump-rtl-ce2 \tEnable dumping after the three if conversion passes.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-ce2"), maplecl::kHide); + +maplecl::Option oFdumpRtlCe3({"-fdump-rtl-ce3"}, + " -fdump-rtl-ce3 \tEnable dumping after the three if conversion passes.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-ce3"), maplecl::kHide); + +maplecl::Option oFdumpRtlCombine({"-fdump-rtl-combine"}, + " -fdump-rtl-combine \tDump after the RTL instruction combination pass.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-combine"), maplecl::kHide); + +maplecl::Option oFdumpRtlCompgotos({"-fdump-rtl-compgotos"}, + " -fdump-rtl-compgotos \tDump after duplicating the computed gotos.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-compgotos"), maplecl::kHide); + +maplecl::Option oFdumpRtlCprop_hardreg({"-fdump-rtl-cprop_hardreg"}, + " -fdump-rtl-cprop_hardreg \tDump after hard register copy propagation.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-cprop_hardreg"), maplecl::kHide); + +maplecl::Option oFdumpRtlCsa({"-fdump-rtl-csa"}, + " -fdump-rtl-csa \tDump after combining stack adjustments.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-csa"), maplecl::kHide); + +maplecl::Option oFdumpRtlCse1({"-fdump-rtl-cse1"}, + " -fdump-rtl-cse1 \tEnable dumping after the two common subexpression elimination passes.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-cse1"), maplecl::kHide); + +maplecl::Option oFdumpRtlCse2({"-fdump-rtl-cse2"}, + " -fdump-rtl-cse2 \tEnable dumping after the two common subexpression elimination passes.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-cse2"), maplecl::kHide); + +maplecl::Option oFdumpRtlDbr({"-fdump-rtl-dbr"}, + " -fdump-rtl-dbr \tDump after delayed branch scheduling.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-dbr"), maplecl::kHide); + +maplecl::Option oFdumpRtlDce({"-fdump-rtl-dce"}, + " -fdump-rtl-dce \tDump after the standalone dead code elimination passes.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-fdump-rtl-dce"), maplecl::kHide); + +maplecl::Option oFdumpRtlDce1({"-fdump-rtl-dce1"}, + " -fdump-rtl-dce1 \tenable dumping after the two dead store elimination passes.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-dce1"), maplecl::kHide); + +maplecl::Option oFdumpRtlDce2({"-fdump-rtl-dce2"}, + " -fdump-rtl-dce2 \tenable dumping after the two dead store elimination passes.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-dce2"), maplecl::kHide); + +maplecl::Option oFdumpRtlDfinish({"-fdump-rtl-dfinish"}, + " -fdump-rtl-dfinish \tThis dump is defined but always produce empty files.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-dfinish"), maplecl::kHide); + +maplecl::Option oFdumpRtlDfinit({"-fdump-rtl-dfinit"}, + " -fdump-rtl-dfinit \tThis dump is defined but always produce empty files.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-dfinit"), maplecl::kHide); + +maplecl::Option oFdumpRtlEh({"-fdump-rtl-eh"}, + " -fdump-rtl-eh \tDump after finalization of EH handling code.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-eh"), maplecl::kHide); + +maplecl::Option oFdumpRtlEh_ranges({"-fdump-rtl-eh_ranges"}, + " -fdump-rtl-eh_ranges \tDump after conversion of EH handling range regions.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-eh_ranges"), maplecl::kHide); + +maplecl::Option oFdumpRtlExpand({"-fdump-rtl-expand"}, + " -fdump-rtl-expand \tDump after RTL generation.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-expand"), maplecl::kHide); + +maplecl::Option oFdumpRtlFwprop1({"-fdump-rtl-fwprop1"}, + " -fdump-rtl-fwprop1 \tenable dumping after the two forward propagation passes.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-fwprop1"), maplecl::kHide); + +maplecl::Option oFdumpRtlFwprop2({"-fdump-rtl-fwprop2"}, + " -fdump-rtl-fwprop2 \tenable dumping after the two forward propagation passes.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-fwprop2"), maplecl::kHide); + +maplecl::Option oFdumpRtlGcse1({"-fdump-rtl-gcse1"}, + " -fdump-rtl-gcse1 \tenable dumping after global common subexpression elimination.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-gcse1"), maplecl::kHide); + +maplecl::Option oFdumpRtlGcse2({"-fdump-rtl-gcse2"}, + " -fdump-rtl-gcse2 \tenable dumping after global common subexpression elimination.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-gcse2"), maplecl::kHide); + +maplecl::Option oFdumpRtlInitRegs({"-fdump-rtl-init-regs"}, + " -fdump-rtl-init-regs \tDump after the initialization of the registers.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-tedump-rtl-init-regsst"), maplecl::kHide); + +maplecl::Option oFdumpRtlInitvals({"-fdump-rtl-initvals"}, + " -fdump-rtl-initvals \tDump after the computation of the initial value sets.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-initvals"), maplecl::kHide); + +maplecl::Option oFdumpRtlInto_cfglayout({"-fdump-rtl-into_cfglayout"}, + " -fdump-rtl-into_cfglayout \tDump after converting to cfglayout mode.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-into_cfglayout"), maplecl::kHide); + +maplecl::Option oFdumpRtlIra({"-fdump-rtl-ira"}, + " -fdump-rtl-ira \tDump after iterated register allocation.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-ira"), maplecl::kHide); + +maplecl::Option oFdumpRtlJump({"-fdump-rtl-jump"}, + " -fdump-rtl-jump \tDump after the second jump optimization.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-jump"), maplecl::kHide); + +maplecl::Option oFdumpRtlLoop2({"-fdump-rtl-loop2"}, + " -fdump-rtl-loop2 \tenables dumping after the rtl loop optimization passes.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-loop2"), maplecl::kHide); + +maplecl::Option oFdumpRtlMach({"-fdump-rtl-mach"}, + " -fdump-rtl-mach \tDump after performing the machine dependent reorganization pass, " + "if that pass exists.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-mach"), maplecl::kHide); + +maplecl::Option oFdumpRtlMode_sw({"-fdump-rtl-mode_sw"}, + " -fdump-rtl-mode_sw \tDump after removing redundant mode switches.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-mode_sw"), maplecl::kHide); + +maplecl::Option oFdumpRtlOutof_cfglayout({"-fdump-rtl-outof_cfglayout"}, + " -fdump-rtl-outof_cfglayout \tDump after converting from cfglayout mode.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-outof_cfglayout"), maplecl::kHide); + +maplecl::Option oFdumpRtlPeephole2({"-fdump-rtl-peephole2"}, + " -fdump-rtl-peephole2 \tDump after the peephole pass.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-peephole2"), maplecl::kHide); + +maplecl::Option oFdumpRtlPostreload({"-fdump-rtl-postreload"}, + " -fdump-rtl-postreload \tDump after post-reload optimizations.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-postreload"), maplecl::kHide); + +maplecl::Option oFdumpRtlPro_and_epilogue({"-fdump-rtl-pro_and_epilogue"}, + " -fdump-rtl-pro_and_epilogue \tDump after generating the function prologues and epilogues.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-pro_and_epilogue"), maplecl::kHide); + +maplecl::Option oFdumpRtlRee({"-fdump-rtl-ree"}, + " -fdump-rtl-ree \tDump after sign/zero extension elimination.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-ree"), maplecl::kHide); + +maplecl::Option oFdumpRtlRegclass({"-fdump-rtl-regclass"}, + " -fdump-rtl-regclass \tThis dump is defined but always produce empty files.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-regclass"), maplecl::kHide); + +maplecl::Option oFdumpRtlRnreg({"-fdump-rtl-rnreg"}, + " -fdump-rtl-rnreg \tDump after register renumbering.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-rnreg"), maplecl::kHide); + +maplecl::Option oFdumpRtlSched1({"-fdump-rtl-sched1"}, + " -fdump-rtl-sched1 \tnable dumping after the basic block scheduling passes.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-sched1"), maplecl::kHide); + +maplecl::Option oFdumpRtlSched2({"-fdump-rtl-sched2"}, + " -fdump-rtl-sched2 \tnable dumping after the basic block scheduling passes.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-sched2"), maplecl::kHide); + +maplecl::Option oFdumpRtlSeqabstr({"-fdump-rtl-seqabstr"}, + " -fdump-rtl-seqabstr \tDump after common sequence discovery.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-seqabstr"), maplecl::kHide); + +maplecl::Option oFdumpRtlShorten({"-fdump-rtl-shorten"}, + " -fdump-rtl-shorten \tDump after shortening branches.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-shorten"), maplecl::kHide); + +maplecl::Option oFdumpRtlSibling({"-fdump-rtl-sibling"}, + " -fdump-rtl-sibling \tDump after sibling call optimizations.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-sibling"), maplecl::kHide); + +maplecl::Option oFdumpRtlSms({"-fdump-rtl-sms"}, + " -fdump-rtl-sms \tDump after modulo scheduling. This pass is only run on some architectures.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-sms"), maplecl::kHide); + +maplecl::Option oFdumpRtlSplit1({"-fdump-rtl-split1"}, + " -fdump-rtl-split1 \tThis option enable dumping after five rounds of instruction splitting.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-split1"), maplecl::kHide); + +maplecl::Option oFdumpRtlSplit2({"-fdump-rtl-split2"}, + " -fdump-rtl-split2 \tThis option enable dumping after five rounds of instruction splitting.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-split2"), maplecl::kHide); + +maplecl::Option oFdumpRtlSplit3({"-fdump-rtl-split3"}, + " -fdump-rtl-split3 \tThis option enable dumping after five rounds of instruction splitting.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-split3"), maplecl::kHide); + +maplecl::Option oFdumpRtlSplit4({"-fdump-rtl-split4"}, + " -fdump-rtl-split4 \tThis option enable dumping after five rounds of instruction splitting.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-split4"), maplecl::kHide); + +maplecl::Option oFdumpRtlSplit5({"-fdump-rtl-split5"}, + " -fdump-rtl-split5 \tThis option enable dumping after five rounds of instruction splitting.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-split5"), maplecl::kHide); + +maplecl::Option oFdumpRtlStack({"-fdump-rtl-stack"}, + " -fdump-rtl-stack \tDump after conversion from GCC's 'flat register file' registers to the x87's " + "stack-like registers. This pass is only run on x86 variants.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-stack"), maplecl::kHide); + +maplecl::Option oFdumpRtlSubreg1({"-fdump-rtl-subreg1"}, + " -fdump-rtl-subreg1 \tenable dumping after the two subreg expansion passes.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-subreg1"), maplecl::kHide); + +maplecl::Option oFdumpRtlSubreg2({"-fdump-rtl-subreg2"}, + " -fdump-rtl-subreg2 \tenable dumping after the two subreg expansion passes.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-subreg2"), maplecl::kHide); + +maplecl::Option oFdumpRtlSubregs_of_mode_finish({"-fdump-rtl-subregs_of_mode_finish"}, + " -fdump-rtl-subregs_of_mode_finish \tThis dump is defined but always produce empty files.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-subregs_of_mode_finish"), maplecl::kHide); + +maplecl::Option oFdumpRtlSubregs_of_mode_init({"-fdump-rtl-subregs_of_mode_init"}, + " -fdump-rtl-subregs_of_mode_init \tThis dump is defined but always produce empty files.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-subregs_of_mode_init"), maplecl::kHide); + +maplecl::Option oFdumpRtlUnshare({"-fdump-rtl-unshare"}, + " -fdump-rtl-unshare \tDump after all rtl has been unshared.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-unshare"), maplecl::kHide); + +maplecl::Option oFdumpRtlVartrack({"-fdump-rtl-vartrack"}, + " -fdump-rtl-vartrack \tDump after variable tracking.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-vartrack"), maplecl::kHide); + +maplecl::Option oFdumpRtlVregs({"-fdump-rtl-vregs"}, + " -fdump-rtl-vregs \tDump after converting virtual registers to hard registers.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-vregs"), maplecl::kHide); + +maplecl::Option oFdumpRtlWeb({"-fdump-rtl-web"}, + " -fdump-rtl-web \tDump after live range splitting.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-rtl-web"), maplecl::kHide); + +maplecl::Option oFdumpStatistics({"-fdump-statistics"}, + " -fdump-statistics \tEnable and control dumping of pass statistics in a separate file.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-statistics"), maplecl::kHide); + +maplecl::Option oFdumpTranslationUnit({"-fdump-translation-unit"}, + " -fdump-translation-unit \tC++ only\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-translation-unit"), maplecl::kHide); + +maplecl::Option oFdumpTree({"-fdump-tree"}, + " -fdump-tree \tControl the dumping at various stages of processing the intermediate language " + "tree to a file.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-tree"), maplecl::kHide); + +maplecl::Option oFdumpTreeAll({"-fdump-tree-all"}, + " -fdump-tree-all \tControl the dumping at various stages of processing the intermediate " + "language tree to a file.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-tree-all"), maplecl::kHide); + +maplecl::Option oFdumpUnnumbered({"-fdump-unnumbered"}, + " -fdump-unnumbered \tWhen doing debugging dumps, suppress instruction numbers and address output. \n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-unnumbered"), maplecl::kHide); + +maplecl::Option oFdumpUnnumberedLinks({"-fdump-unnumbered-links"}, + " -fdump-unnumbered-links \tWhen doing debugging dumps (see -d option above), suppress instruction numbers " + "for the links to the previous and next instructions in a sequence.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dump-unnumbered-links"), maplecl::kHide); + +maplecl::Option oFdwarf2CfiAsm({"-fdwarf2-cfi-asm"}, + " -fdwarf2-cfi-asm \tEnable CFI tables via GAS assembler directives.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-dwarf2-cfi-asm"), maplecl::kHide); + +maplecl::Option oFearlyInlining({"-fearly-inlining"}, + " -fearly-inlining \tPerform early inlining.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-early-inlining"), maplecl::kHide); + +maplecl::Option oFeliminateDwarf2Dups({"-feliminate-dwarf2-dups"}, + " -feliminate-dwarf2-dups \tPerform DWARF duplicate elimination.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-eliminate-dwarf2-dups"), maplecl::kHide); + +maplecl::Option oFeliminateUnusedDebugSymbols({"-feliminate-unused-debug-symbols"}, + " -feliminate-unused-debug-symbols \tPerform unused symbol elimination in debug info.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-feliminate-unused-debug-symbols"), maplecl::kHide); + +maplecl::Option oFeliminateUnusedDebugTypes({"-feliminate-unused-debug-types"}, + " -feliminate-unused-debug-types \tPerform unused type elimination in debug info.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-eliminate-unused-debug-types"), maplecl::kHide); + +maplecl::Option oFemitClassDebugAlways({"-femit-class-debug-always"}, + " -femit-class-debug-always \tDo not suppress C++ class debug information.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-emit-class-debug-always"), maplecl::kHide); + +maplecl::Option oFemitStructDebugBaseonly({"-femit-struct-debug-baseonly"}, + " -femit-struct-debug-baseonly \tAggressive reduced debug info for structs.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-emit-struct-debug-baseonly"), maplecl::kHide); + +maplecl::Option oFemitStructDebugReduced({"-femit-struct-debug-reduced"}, + " -femit-struct-debug-reduced \tConservative reduced debug info for structs.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-emit-struct-debug-reduced"), maplecl::kHide); + +maplecl::Option oFexceptions({"-fexceptions"}, + " -fexceptions \tEnable exception handling.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-exceptions"), maplecl::kHide); + +maplecl::Option oFexpensiveOptimizations({"-fexpensive-optimizations"}, + " -fexpensive-optimizations \tPerform a number of minor, expensive optimizations.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-expensive-optimizations"), maplecl::kHide); + +maplecl::Option oFextNumericLiterals({"-fext-numeric-literals"}, + " -fext-numeric-literals \tInterpret imaginary, fixed-point, or other gnu number suffix as the " + "corresponding number literal rather than a user-defined number literal.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-ext-numeric-literals"), maplecl::kHide); + +maplecl::Option oFnoExtendedIdentifiers({"-fno-extended-identifiers"}, + " -fno-extended-identifiers \tDon't ermit universal character names (\\u and \\U) in identifiers.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFexternTlsInit({"-fextern-tls-init"}, + " -fextern-tls-init \tSupport dynamic initialization of thread-local variables in a different " + "translation unit.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-extern-tls-init"), maplecl::kHide); + +maplecl::Option oFfastMath({"-ffast-math"}, + " -ffast-math \tThis option causes the preprocessor macro __FAST_MATH__ to be defined.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-fast-math"), maplecl::kHide); + +maplecl::Option oFfatLtoObjects({"-ffat-lto-objects"}, + " -ffat-lto-objects \tOutput lto objects containing both the intermediate language and binary output.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-fat-lto-objects"), maplecl::kHide); + +maplecl::Option oFfiniteMathOnly({"-ffinite-math-only"}, + " -ffinite-math-only \tAssume no NaNs or infinities are generated.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-finite-math-only"), maplecl::kHide); + +maplecl::Option oFfixAndContinue({"-ffix-and-continue"}, + " -ffix-and-continue \tGenerate code suitable for fast turnaround development, such as to allow GDB" + " to dynamically load .o files into already-running programs.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-fix-and-continue"), maplecl::kHide); + +maplecl::Option oFfloatStore({"-ffloat-store"}, + " -ffloat-store \ton't allocate floats and doubles in extended-precision registers.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-float-store"), maplecl::kHide); + +maplecl::Option oFforScope({"-ffor-scope"}, + " -ffor-scope \tScope of for-init-statement variables is local to the loop.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-for-scope"), maplecl::kHide); + +maplecl::Option oFforwardPropagate({"-fforward-propagate"}, + " -fforward-propagate \tPerform a forward propagation pass on RTL.\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFfreestanding({"-ffreestanding"}, + " -ffreestanding \tDo not assume that standard C libraries and 'main' exist.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-freestanding"), maplecl::kHide); + +maplecl::Option oFfriendInjection({"-ffriend-injection"}, + " -ffriend-injection \tInject friend functions into enclosing namespace.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-friend-injection"), maplecl::kHide); + +maplecl::Option oFgcse({"-fgcse"}, + " -fgcse \tPerform global common subexpression elimination.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-gcse"), maplecl::kHide); + +maplecl::Option oFgcseAfterReload({"-fgcse-after-reload"}, + " -fgcse-after-reload \t-fgcse-after-reload\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-gcse-after-reload"), maplecl::kHide); + +maplecl::Option oFgcseLas({"-fgcse-las"}, + " -fgcse-las \tPerform redundant load after store elimination in global common subexpression " + "elimination.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-gcse-las"), maplecl::kHide); + +maplecl::Option oFgcseLm({"-fgcse-lm"}, + " -fgcse-lm \tPerform enhanced load motion during global common subexpression elimination.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-gcse-lm"), maplecl::kHide); + +maplecl::Option oFgcseSm({"-fgcse-sm"}, + " -fgcse-sm \tPerform store motion after global common subexpression elimination.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-gcse-sm"), maplecl::kHide); + +maplecl::Option oFgimple({"-fgimple"}, + " -fgimple \tEnable parsing GIMPLE.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-gimple"), maplecl::kHide); + +maplecl::Option oFgnuRuntime({"-fgnu-runtime"}, + " -fgnu-runtime \tGenerate code for GNU runtime environment.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-gnu-runtime"), maplecl::kHide); + +maplecl::Option oFgnuTm({"-fgnu-tm"}, + " -fgnu-tm \tEnable support for GNU transactional memory.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-gnu-tm"), maplecl::kHide); + +maplecl::Option oFgraphiteIdentity({"-fgraphite-identity"}, + " -fgraphite-identity \tEnable Graphite Identity transformation.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-graphite-identity"), maplecl::kHide); + +maplecl::Option oFhoistAdjacentLoads({"-fhoist-adjacent-loads"}, + " -fhoist-adjacent-loads \tEnable hoisting adjacent loads to encourage generating conditional move" + " instructions.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-hoist-adjacent-loads"), maplecl::kHide); + +maplecl::Option oFhosted({"-fhosted"}, + " -fhosted \tAssume normal C execution environment.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-hosted"), maplecl::kHide); + +maplecl::Option oFifConversion({"-fif-conversion"}, + " -fif-conversion \tPerform conversion of conditional jumps to branchless equivalents.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-if-conversion"), maplecl::kHide); + +maplecl::Option oFifConversion2({"-fif-conversion2"}, + " -fif-conversion2 \tPerform conversion of conditional jumps to conditional execution.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-if-conversion2"), maplecl::kHide); + +maplecl::Option oFilelist({"-filelist"}, + " -filelist \t\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oFindirectData({"-findirect-data"}, + " -findirect-data \tGenerate code suitable for fast turnaround development, such as to allow " + "GDB to dynamically load .o files into already-running programs\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-indirect-data"), maplecl::kHide); + +maplecl::Option oFindirectInlining({"-findirect-inlining"}, + " -findirect-inlining tPerform indirect inlining.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-indirect-inlining"), maplecl::kHide); + +maplecl::Option oFinhibitSizeDirective({"-finhibit-size-directive"}, + " -finhibit-size-directive \tDo not generate .size directives.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-inhibit-size-directive"), maplecl::kHide); + +maplecl::Option oFinlineFunctions({"-finline-functions"}, + " -finline-functions \tIntegrate functions not declared 'inline' into their callers when profitable.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-inline-functions"), maplecl::kHide); + +maplecl::Option oFinlineFunctionsCalledOnce({"-finline-functions-called-once"}, + " -finline-functions-called-once \tIntegrate functions only required by their single caller.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-inline-functions-called-once"), maplecl::kHide); + +maplecl::Option oFinlineSmallFunctions({"-finline-small-functions"}, + " -finline-small-functions \tIntegrate functions into their callers when code size is known not to grow.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-inline-small-functions"), maplecl::kHide); + +maplecl::Option oFinstrumentFunctions({"-finstrument-functions"}, + " -finstrument-functions \tInstrument function entry and exit with profiling calls.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-instrument-functions"), maplecl::kHide); + +maplecl::Option oFipaCp({"-fipa-cp"}, + " -fipa-cp \tPerform interprocedural constant propagation.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-ipa-cp"), maplecl::kHide); + +maplecl::Option oFipaCpClone({"-fipa-cp-clone"}, + " -fipa-cp-clone \tPerform cloning to make Interprocedural constant propagation stronger.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-ipa-cp-clone"), maplecl::kHide); + +maplecl::Option oFipaIcf({"-fipa-icf"}, + " -fipa-icf \tPerform Identical Code Folding for functions and read-only variables.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-ipa-icf"), maplecl::kHide); + +maplecl::Option oFipaProfile({"-fipa-profile"}, + " -fipa-profile \tPerform interprocedural profile propagation.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-ipa-profile"), maplecl::kHide); + +maplecl::Option oFipaPta({"-fipa-pta"}, + " -fipa-pta \tPerform interprocedural points-to analysis.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-ipa-pta"), maplecl::kHide); + +maplecl::Option oFipaPureConst({"-fipa-pure-const"}, + " -fipa-pure-const \tDiscover pure and const functions.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-ipa-pure-const"), maplecl::kHide); + +maplecl::Option oFipaRa({"-fipa-ra"}, + " -fipa-ra \tUse caller save register across calls if possible.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-ipa-ra"), maplecl::kHide); + +maplecl::Option oFipaReference({"-fipa-reference"}, + " -fipa-reference \tDiscover readonly and non addressable static variables.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-fno-ipa-reference"), maplecl::kHide); + +} \ No newline at end of file diff --git a/src/mapleall/maple_driver/src/warning_option.cpp b/src/mapleall/maple_driver/src/warning_option.cpp new file mode 100644 index 0000000000000000000000000000000000000000..1e6486da2c2ff2646a78e4d54eee22c22660388f --- /dev/null +++ b/src/mapleall/maple_driver/src/warning_option.cpp @@ -0,0 +1,1020 @@ +/* + * Copyright (c) [2023] Huawei Technologies Co.,Ltd.All rights reserved. + * + * OpenArkCompiler is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * + * http://license.coscl.org.cn/MulanPSL2 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ + +#include "driver_options.h" + +namespace opts { + +/* ##################### BOOL Options ############################################################### */ + +maplecl::Option version({"--version", "-v"}, + " --version [command] \tPrint version and exit.\n", + {driverCategory}, kOptDriver | kOptCommon); + +maplecl::Option wUnusedMacro({"-Wunused-macros"}, + " -Wunused-macros \twarning: macro is not used\n", + {driverCategory, clangCategory}, kOptFront); + +maplecl::Option wBadFunctionCast({"-Wbad-function-cast"}, + " -Wbad-function-cast \twarning: cast from function call of type A to non-matching type B\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-bad-function-cast")); + +maplecl::Option wStrictPrototypes({"-Wstrict-prototypes"}, + " -Wstrict-prototypes \twarning: Warn if a function is declared or defined without specifying the " + "argument types\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-strict-prototypes")); + +maplecl::Option wUndef({"-Wundef"}, + " -Wundef \twarning: Warn if an undefined identifier is evaluated in an #if directive. " + "Such identifiers are replaced with zero\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-undef")); + +maplecl::Option wCastQual({"-Wcast-qual"}, + " -Wcast-qual \twarning: Warn whenever a pointer is cast so as to remove a type qualifier " + "from the target type. For example, warn if a const char * is cast to an ordinary char *\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-cast-qual")); + +maplecl::Option wMissingFieldInitializers({"-Wmissing-field-initializers"}, + " -Wmissing-field-initializers\twarning: Warn if a structure's initializer has some fields missing\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-missing-field-initializers")); + +maplecl::Option wUnusedParameter({"-Wunused-parameter"}, + " -Wunused-parameter \twarning: Warn whenever a function parameter is unused aside from its " + "declaration\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-unused-parameter")); + +maplecl::Option wAll({"-Wall"}, + " -Wall \tThis enables all the warnings about constructions that some users consider " + "questionable\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-all")); + +maplecl::Option wExtra({"-Wextra"}, + " -Wextra \tEnable some extra warning flags that are not enabled by -Wall\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-extra")); + +maplecl::Option wWriteStrings({"-Wwrite-strings"}, + " -Wwrite-strings \tWhen compiling C, give string constants the type const char[length] so that " + "copying the address of one into a non-const char * pointer produces a warning\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-write-strings")); + +maplecl::Option wVla({"-Wvla"}, + " -Wvla \tWarn if a variable-length array is used in the code\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-vla")); + +maplecl::Option wFormatSecurity({"-Wformat-security"}, + " -Wformat-security \tWwarn about uses of format functions that represent possible security problems.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-format-security")); + +maplecl::Option wShadow({"-Wshadow"}, + " -Wshadow \tWarn whenever a local variable or type declaration shadows another variable.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-shadow")); + +maplecl::Option wTypeLimits({"-Wtype-limits"}, + " -Wtype-limits \tWarn if a comparison is always true or always false due to the limited range " + "of the data type.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-type-limits")); + +maplecl::Option wSignCompare({"-Wsign-compare"}, + " -Wsign-compare \tWarn when a comparison between signed and unsigned values could produce an " + "incorrect result when the signed value is converted to unsigned.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-sign-compare")); + +maplecl::Option wShiftNegativeValue({"-Wshift-negative-value"}, + " -Wshift-negative-value \tWarn if left shifting a negative value.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-shift-negative-value")); + +maplecl::Option wPointerArith({"-Wpointer-arith"}, + " -Wpointer-arith \tWarn about anything that depends on the “size of” a function type or of void.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-pointer-arith")); + +maplecl::Option wIgnoredQualifiers({"-Wignored-qualifiers"}, + " -Wignored-qualifiers \tWarn if the return type of a function has a type qualifier such as const.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-ignored-qualifiers")); + +maplecl::Option wFormat({"-Wformat"}, + " -Wformat \tCheck calls to printf and scanf, etc., to make sure that the arguments " + "supplied have types appropriate to the format string specified.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-format")); + +maplecl::Option wFloatEqual({"-Wfloat-equal"}, + " -Wfloat-equal \tWarn if floating-point values are used in equality comparisons.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-float-equal")); + +maplecl::Option wDateTime({"-Wdate-time"}, + " -Wdate-time \tWarn when macros __TIME__, __DATE__ or __TIMESTAMP__ are encountered as " + "they might prevent bit-wise-identical reproducible compilations\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-date-time")); + +maplecl::Option wImplicitFallthrough({"-Wimplicit-fallthrough"}, + " -Wimplicit-fallthrough \tWarn when a switch case falls through\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-implicit-fallthrough")); + +maplecl::Option wShiftOverflow({"-Wshift-overflow"}, + " -Wshift-overflow \tWarn about left shift overflows\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-shift-overflow")); + +maplecl::Option oWnounusedcommandlineargument({"-Wno-unused-command-line-argument"}, + " -Wno-unused-command-line-argument\n" + " \tno unused command line argument\n", + {driverCategory, clangCategory}, kOptFront); + +maplecl::Option oWnoconstantconversion({"-Wno-constant-conversion"}, + " -Wno-constant-conversion \tno constant conversion\n", + {driverCategory, clangCategory}, kOptFront); + +maplecl::Option oWnounknownwarningoption({"-Wno-unknown-warning-option"}, + " -Wno-unknown-warning-option \tno unknown warning option\n", + {driverCategory, clangCategory}, kOptFront); + +maplecl::Option oW({"-W"}, + " -W \tThis switch is deprecated; use -Wextra instead.\n", + {driverCategory, clangCategory}, kOptFront); + +maplecl::Option oWabi({"-Wabi"}, + " -Wabi \tWarn about things that will change when compiling with an ABI-compliant " + "compiler.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-abi")); + +maplecl::Option oWabiTag({"-Wabi-tag"}, + " -Wabi-tag \tWarn if a subobject has an abi_tag attribute that the complete object type " + "does not have.\n", + {driverCategory, clangCategory}, kOptFront); + +maplecl::Option oWaddrSpaceConvert({"-Waddr-space-convert"}, + " -Waddr-space-convert \tWarn about conversions between address spaces in the case where the resulting " + "address space is not contained in the incoming address space.\n", + {driverCategory, clangCategory}, kOptFront); + +maplecl::Option oWaddress({"-Waddress"}, + " -Waddress \tWarn about suspicious uses of memory addresses.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-address")); + +maplecl::Option oWaggregateReturn({"-Waggregate-return"}, + " -Waggregate-return \tWarn about returning structures\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-aggregate-return")); + +maplecl::Option oWaggressiveLoopOptimizations({"-Waggressive-loop-optimizations"}, + " -Waggressive-loop-optimizations\n" + " \tWarn if a loop with constant number of iterations triggers undefined " + "behavior.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-aggressive-loop-optimizations")); + +maplecl::Option oWalignedNew({"-Waligned-new"}, + " -Waligned-new \tWarn about 'new' of type with extended alignment without -faligned-new.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-aligned-new")); + +maplecl::Option oWallocZero({"-Walloc-zero"}, + " -Walloc-zero \t-Walloc-zero Warn for calls to allocation functions that specify zero bytes.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-alloc-zero")); + +maplecl::Option oWalloca({"-Walloca"}, + " -Walloca \tWarn on any use of alloca.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-alloca")); + +maplecl::Option oWarrayBounds({"-Warray-bounds"}, + " -Warray-bounds \tWarn if an array is accessed out of bounds.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-array-bounds")); + +maplecl::Option oWassignIntercept({"-Wassign-intercept"}, + " -Wassign-intercept \tWarn whenever an Objective-C assignment is being intercepted by the garbage " + "collector.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-assign-intercept")); + +maplecl::Option oWattributes({"-Wattributes"}, + " -Wattributes \tWarn about inappropriate attribute usage.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-attributes")); + +maplecl::Option oWboolCompare({"-Wbool-compare"}, + " -Wbool-compare \tWarn about boolean expression compared with an integer value different from " + "true/false.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-bool-compare")); + +maplecl::Option oWboolOperation({"-Wbool-operation"}, + " -Wbool-operation \tWarn about certain operations on boolean expressions.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-bool-operation")); + +maplecl::Option oWbuiltinDeclarationMismatch({"-Wbuiltin-declaration-mismatch"}, + " -Wbuiltin-declaration-mismatch\n" + " \tWarn when a built-in function is declared with the wrong signature.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-builtin-declaration-mismatch")); + +maplecl::Option oWbuiltinMacroRedefined({"-Wbuiltin-macro-redefined"}, + " -Wbuiltin-macro-redefined \tWarn when a built-in preprocessor macro is undefined or redefined.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-builtin-macro-redefined")); + +maplecl::Option oW11Compat({"-Wc++11-compat"}, + " -Wc++11-compat \tWarn about C++ constructs whose meaning differs between ISO C++ 1998 and " + "ISO C++ 2011.\n", + {driverCategory, clangCategory}, kOptFront); + +maplecl::Option oW14Compat({"-Wc++14-compat"}, + " -Wc++14-compat \tWarn about C++ constructs whose meaning differs between ISO C++ 2011 and ISO " + "C++ 2014.\n", + {driverCategory, clangCategory}, kOptFront); + +maplecl::Option oW1zCompat({"-Wc++1z-compat"}, + " -Wc++1z-compat \tWarn about C++ constructs whose meaning differs between ISO C++ 2014 and " + "(forthcoming) ISO C++ 201z(7?).\n", + {driverCategory, clangCategory}, kOptFront); + +maplecl::Option oWc90C99Compat({"-Wc90-c99-compat"}, + " -Wc90-c99-compat \tWarn about features not present in ISO C90\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-c90-c99-compat")); + +maplecl::Option oWc99C11Compat({"-Wc99-c11-compat"}, + " -Wc99-c11-compat \tWarn about features not present in ISO C99\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-c99-c11-compat")); + +maplecl::Option oWcastAlign({"-Wcast-align"}, + " -Wcast-align \tWarn about pointer casts which increase alignment.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-cast-align")); + +maplecl::Option oWcharSubscripts({"-Wchar-subscripts"}, + " -Wchar-subscripts \tWarn about subscripts whose type is \"char\".\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-char-subscripts")); + +maplecl::Option oWchkp({"-Wchkp"}, + " -Wchkp \tWarn about memory access errors found by Pointer Bounds Checker.\n", + {driverCategory, clangCategory}, kOptFront); + +maplecl::Option oWclobbered({"-Wclobbered"}, + " -Wclobbered \tWarn about variables that might be changed by \"longjmp\" or \"vfork\".\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-clobbered")); + +maplecl::Option oWcomment({"-Wcomment"}, + " -Wcomment \tWarn about possibly nested block comments\n", + {driverCategory, clangCategory}, kOptFront); + +maplecl::Option oWcomments({"-Wcomments"}, + " -Wcomments \tSynonym for -Wcomment.\n", + {driverCategory, clangCategory}, kOptFront); + +maplecl::Option oWconditionallySupported({"-Wconditionally-supported"}, + " -Wconditionally-supported \tWarn for conditionally-supported constructs.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-conditionally-supported")); + +maplecl::Option oWconversion({"-Wconversion"}, + " -Wconversion \tWarn for implicit type conversions that may change a value.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-conversion")); + +maplecl::Option oWconversionNull({"-Wconversion-null"}, + " -Wconversion-null \tWarn for converting NULL from/to a non-pointer type.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-conversion-null")); + +maplecl::Option oWctorDtorPrivacy({"-Wctor-dtor-privacy"}, + " -Wctor-dtor-privacy \tWarn when all constructors and destructors are private.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-ctor-dtor-privacy")); + +maplecl::Option oWdanglingElse({"-Wdangling-else"}, + " -Wdangling-else \tWarn about dangling else.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-dangling-else")); + +maplecl::Option oWdeclarationAfterStatement({"-Wdeclaration-after-statement"}, + " -Wdeclaration-after-statement\n" + " \tWarn when a declaration is found after a statement.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-declaration-after-statement")); + +maplecl::Option oWdeleteIncomplete({"-Wdelete-incomplete"}, + " -Wdelete-incomplete \tWarn when deleting a pointer to incomplete type.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-delete-incomplete")); + +maplecl::Option oWdeleteNonVirtualDtor({"-Wdelete-non-virtual-dtor"}, + " -Wdelete-non-virtual-dtor \tWarn about deleting polymorphic objects with non-virtual destructors.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-delete-non-virtual-dtor")); + +maplecl::Option oWdeprecated({"-Wdeprecated"}, + " -Wdeprecated \tWarn if a deprecated compiler feature\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-deprecated")); + +maplecl::Option oWdeprecatedDeclarations({"-Wdeprecated-declarations"}, + " -Wdeprecated-declarations \tWarn about uses of __attribute__((deprecated)) declarations.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-deprecated-declarations")); + +maplecl::Option oWdisabledOptimization({"-Wdisabled-optimization"}, + " -Wdisabled-optimization \tWarn when an optimization pass is disabled.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-disabled-optimization")); + +maplecl::Option oWdiscardedArrayQualifiers({"-Wdiscarded-array-qualifiers"}, + " -Wdiscarded-array-qualifiers\tWarn if qualifiers on arrays which are pointer targets are discarded.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-discarded-array-qualifiers")); + +maplecl::Option oWdiscardedQualifiers({"-Wdiscarded-qualifiers"}, + " -Wdiscarded-qualifiers \tWarn if type qualifiers on pointers are discarded.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-discarded-qualifiers")); + +maplecl::Option oWdivByZero({"-Wdiv-by-zero"}, + " -Wdiv-by-zero \tWarn about compile-time integer division by zero.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-div-by-zero")); + +maplecl::Option oWdoublePromotion({"-Wdouble-promotion"}, + " -Wdouble-promotion \tWarn about implicit conversions from \"float\" to \"double\".\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-double-promotion")); + +maplecl::Option oWduplicateDeclSpecifier({"-Wduplicate-decl-specifier"}, + " -Wduplicate-decl-specifier \tWarn when a declaration has duplicate const\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-duplicate-decl-specifier")); + +maplecl::Option oWduplicatedBranches({"-Wduplicated-branches"}, + " -Wduplicated-branches \tWarn about duplicated branches in if-else statements.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-duplicated-branches")); + +maplecl::Option oWduplicatedCond({"-Wduplicated-cond"}, + " -Wduplicated-cond \tWarn about duplicated conditions in an if-else-if chain.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-duplicated-cond")); + +maplecl::Option oWeffc({"-Weffc++"}, + " -Weffc++ \tWarn about violations of Effective C++ style rules.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-effc++")); + +maplecl::Option oWemptyBody({"-Wempty-body"}, + " -Wempty-body \tWarn about an empty body in an if or else statement.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-empty-body")); + +maplecl::Option oWendifLabels({"-Wendif-labels"}, + " -Wendif-labels \tWarn about stray tokens after #else and #endif.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-endif-labels")); + +maplecl::Option oWenumCompare({"-Wenum-compare"}, + " -Wenum-compare \tWarn about comparison of different enum types.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-enum-compare")); + +maplecl::Option oWerror({"-Werror"}, + " -Werror \tTreat all warnings as errors.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-error")); + +maplecl::Option oWexpansionToDefined({"-Wexpansion-to-defined"}, + " -Wexpansion-to-defined \tWarn if 'defined' is used outside #if.\n", + {driverCategory, clangCategory}, kOptFront); + +maplecl::Option oWfatalErrors({"-Wfatal-errors"}, + " -Wfatal-errors \tExit on the first error occurred.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-fatal-errors")); + +maplecl::Option oWfloatConversion({"-Wfloat-conversion"}, + " -Wfloat-conversion \tWarn for implicit type conversions that cause loss of floating point precision.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-float-conversion")); + +maplecl::Option oWformatContainsNul({"-Wformat-contains-nul"}, + " -Wformat-contains-nul \tWarn about format strings that contain NUL bytes.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-format-contains-nul")); + +maplecl::Option oWformatExtraArgs({"-Wformat-extra-args"}, + " -Wformat-extra-args \tWarn if passing too many arguments to a function for its format string.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-format-extra-args")); + +maplecl::Option oWformatNonliteral({"-Wformat-nonliteral"}, + " -Wformat-nonliteral \tWarn about format strings that are not literals.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-format-nonliteral")); + +maplecl::Option oWformatOverflow({"-Wformat-overflow"}, + " -Wformat-overflow \tWarn about function calls with format strings that write past the end of the " + "destination region. Same as -Wformat-overflow=1.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-format-overflow")); + +maplecl::Option oWformatSignedness({"-Wformat-signedness"}, + " -Wformat-signedness \tWarn about sign differences with format functions.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-format-signedness")); + +maplecl::Option oWformatTruncation({"-Wformat-truncation"}, + " -Wformat-truncation \tWarn about calls to snprintf and similar functions that truncate output. " + "Same as -Wformat-truncation=1.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-format-truncation")); + +maplecl::Option oWformatY2k({"-Wformat-y2k"}, + " -Wformat-y2k \tWarn about strftime formats yielding 2-digit years.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-format-y2k")); + +maplecl::Option oWformatZeroLength({"-Wformat-zero-length"}, + " -Wformat-zero-length \tWarn about zero-length formats.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-format-zero-length")); + +maplecl::Option oWframeAddress({"-Wframe-address"}, + " -Wframe-address \tWarn when __builtin_frame_address or __builtin_return_address is used unsafely.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-frame-address")); + +maplecl::Option oWfreeNonheapObject({"-Wfree-nonheap-object"}, + " -Wfree-nonheap-object \tWarn when attempting to free a non-heap object.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-free-nonheap-object")); + +maplecl::Option oWignoredAttributes({"-Wignored-attributes"}, + " -Wignored-attributes \tWarn whenever attributes are ignored.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-ignored-attributes")); + +maplecl::Option oWimplicit({"-Wimplicit"}, + " -Wimplicit \tWarn about implicit declarations.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-implicit")); + +maplecl::Option oWimplicitFunctionDeclaration({"-Wimplicit-function-declaration"}, + " -Wimplicit-function-declaration\n" + " \tWarn about implicit function declarations.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-implicit-function-declaration")); + +maplecl::Option oWimplicitInt({"-Wimplicit-int"}, + " -Wimplicit-int \tWarn when a declaration does not specify a type.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-implicit-int")); + +maplecl::Option oWincompatiblePointerTypes({"-Wincompatible-pointer-types"}, + " -Wincompatible-pointer-types\tWarn when there is a conversion between pointers that have incompatible types.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-incompatible-pointer-types")); + +maplecl::Option oWinheritedVariadicCtor({"-Winherited-variadic-ctor"}, + " -Winherited-variadic-ctor \tWarn about C++11 inheriting constructors when the base has a variadic " + "constructor.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-inherited-variadic-ctor")); + +maplecl::Option oWinitSelf({"-Winit-self"}, + " -Winit-self \tWarn about variables which are initialized to themselves.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-init-self")); + +maplecl::Option oWinline({"-Winline"}, + " -Winline \tWarn when an inlined function cannot be inlined.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-inline")); + +maplecl::Option oWintConversion({"-Wint-conversion"}, + " -Wint-conversion \tWarn about incompatible integer to pointer and pointer to integer conversions.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-int-conversion")); + +maplecl::Option oWintInBoolContext({"-Wint-in-bool-context"}, + " -Wint-in-bool-context \tWarn for suspicious integer expressions in boolean context.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-int-in-bool-context")); + +maplecl::Option oWintToPointerCast({"-Wint-to-pointer-cast"}, + " -Wint-to-pointer-cast \tWarn when there is a cast to a pointer from an integer of a different size.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-int-to-pointer-cast")); + +maplecl::Option oWinvalidMemoryModel({"-Winvalid-memory-model"}, + " -Winvalid-memory-model \tWarn when an atomic memory model parameter is known to be outside the valid " + "range.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-invalid-memory-model")); + +maplecl::Option oWinvalidOffsetof({"-Winvalid-offsetof"}, + " -Winvalid-offsetof \tWarn about invalid uses of the \"offsetof\" macro.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-invalid-offsetof")); + +maplecl::Option oWLiteralSuffix({"-Wliteral-suffix"}, + " -Wliteral-suffix \tWarn when a string or character literal is followed by a ud-suffix which does " + "not begin with an underscore.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-literal-suffix")); + +maplecl::Option oWLogicalNotParentheses({"-Wlogical-not-parentheses"}, + " -Wlogical-not-parentheses \tWarn about logical not used on the left hand side operand of a comparison.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-logical-not-parentheses")); + +maplecl::Option oWinvalidPch({"-Winvalid-pch"}, + " -Winvalid-pch \tWarn about PCH files that are found but not used.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-invalid-pch")); + +maplecl::Option oWjumpMissesInit({"-Wjump-misses-init"}, + " -Wjump-misses-init \tWarn when a jump misses a variable initialization.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-jump-misses-init")); + +maplecl::Option oWLogicalOp({"-Wlogical-op"}, + " -Wlogical-op \tWarn about suspicious uses of logical operators in expressions. \n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-logical-op")); + +maplecl::Option oWLongLong({"-Wlong-long"}, + " -Wlong-long \tWarn if long long type is used.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-long-long")); + +maplecl::Option oWmain({"-Wmain"}, + " -Wmain \tWarn about suspicious declarations of \"main\".\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-main")); + +maplecl::Option oWmaybeUninitialized({"-Wmaybe-uninitialized"}, + " -Wmaybe-uninitialized \tWarn about maybe uninitialized automatic variables.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-maybe-uninitialized")); + +maplecl::Option oWmemsetEltSize({"-Wmemset-elt-size"}, + " -Wmemset-elt-size \tWarn about suspicious calls to memset where the third argument contains the " + "number of elements not multiplied by the element size.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-memset-elt-size")); + +maplecl::Option oWmemsetTransposedArgs({"-Wmemset-transposed-args"}, + " -Wmemset-transposed-args \tWarn about suspicious calls to memset where the third argument is constant " + "literal zero and the second is not.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-memset-transposed-args")); + +maplecl::Option oWmisleadingIndentation({"-Wmisleading-indentation"}, + " -Wmisleading-indentation \tWarn when the indentation of the code does not reflect the block structure.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-misleading-indentatio")); + +maplecl::Option oWmissingBraces({"-Wmissing-braces"}, + " -Wmissing-braces \tWarn about possibly missing braces around initializers.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-missing-braces")); + +maplecl::Option oWmissingDeclarations({"-Wmissing-declarations"}, + " -Wmissing-declarations \tWarn about global functions without previous declarations.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-missing-declarations")); + +maplecl::Option oWmissingFormatAttribute({"-Wmissing-format-attribute"}, + " -Wmissing-format-attribute \t\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-missing-format-attribute")); + +maplecl::Option oWmissingIncludeDirs({"-Wmissing-include-dirs"}, + " -Wmissing-include-dirs \tWarn about user-specified include directories that do not exist.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-missing-include-dirs")); + +maplecl::Option oWmissingParameterType({"-Wmissing-parameter-type"}, + " -Wmissing-parameter-type \tWarn about function parameters declared without a type specifier in K&R-style " + "functions.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-missing-parameter-type")); + +maplecl::Option oWmissingPrototypes({"-Wmissing-prototypes"}, + " -Wmissing-prototypes \tWarn about global functions without prototypes.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-missing-prototypes")); + +maplecl::Option oWmultichar({"-Wmultichar"}, + " -Wmultichar \tWarn about use of multi-character character constants.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-multichar")); + +maplecl::Option oWmultipleInheritance({"-Wmultiple-inheritance"}, + " -Wmultiple-inheritance \tWarn on direct multiple inheritance.\n", + {driverCategory, clangCategory}, kOptFront); + +maplecl::Option oWnamespaces({"-Wnamespaces"}, + " -Wnamespaces \tWarn on namespace definition.\n", + {driverCategory, clangCategory}, kOptFront); + +maplecl::Option oWnarrowing({"-Wnarrowing"}, + " -Wnarrowing \tWarn about narrowing conversions within { } that are ill-formed in C++11.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-narrowing")); + +maplecl::Option oWnestedExterns({"-Wnested-externs"}, + " -Wnested-externs \tWarn about \"extern\" declarations not at file scope.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-nested-externs")); + +maplecl::Option oWnoexcept({"-Wnoexcept"}, + " -Wnoexcept \tWarn when a noexcept expression evaluates to false even though the expression " + "can't actually throw.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-noexcept")); + +maplecl::Option oWnoexceptType({"-Wnoexcept-type"}, + " -Wnoexcept-type \tWarn if C++1z noexcept function type will change the mangled name of a symbol.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-noexcept-type")); + +maplecl::Option oWnonTemplateFriend({"-Wnon-template-friend"}, + " -Wnon-template-friend \tWarn when non-templatized friend functions are declared within a template.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-non-template-friend")); + +maplecl::Option oWnonVirtualDtor({"-Wnon-virtual-dtor"}, + " -Wnon-virtual-dtor \tWarn about non-virtual destructors.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-non-virtual-dtor")); + +maplecl::Option oWnonnull({"-Wnonnull"}, + " -Wnonnull \tWarn about NULL being passed to argument slots marked as requiring non-NULL.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-nonnull")); + +maplecl::Option oWnonnullCompare({"-Wnonnull-compare"}, + " -Wnonnull-compare \tWarn if comparing pointer parameter with nonnull attribute with NULL.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-nonnull-compare")); + +maplecl::Option oWnormalized({"-Wnormalized"}, + " -Wnormalized \tWarn about non-normalized Unicode strings.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-normalized")); + +maplecl::Option oWnullDereference({"-Wnull-dereference"}, + " -Wnull-dereference \tWarn if dereferencing a NULL pointer may lead to erroneous or undefined " + "behavior.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-null-dereference")); + +maplecl::Option oWodr({"-Wodr"}, + " -Wodr \tWarn about some C++ One Definition Rule violations during link time " + "optimization.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-odr")); + +maplecl::Option oWoldStyleCast({"-Wold-style-cast"}, + " -Wold-style-cast \tWarn if a C-style cast is used in a program.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-old-style-cast")); + +maplecl::Option oWoldStyleDeclaration({"-Wold-style-declaration"}, + " -Wold-style-declaration \tWarn for obsolescent usage in a declaration.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-old-style-declaration")); + +maplecl::Option oWoldStyleDefinition({"-Wold-style-definition"}, + " -Wold-style-definition \tWarn if an old-style parameter definition is used.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-old-style-definition")); + +maplecl::Option oWopenmSimd({"-Wopenm-simd"}, + " -Wopenm-simd \tWarn if the vectorizer cost model overrides the OpenMP or the Cilk Plus " + "simd directive set by user. \n", + {driverCategory, clangCategory}, kOptFront); + +maplecl::Option oWoverflow({"-Woverflow"}, + " -Woverflow \tWarn about overflow in arithmetic expressions.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-overflow")); + +maplecl::Option oWoverlengthStrings({"-Woverlength-strings"}, + " -Woverlength-strings \tWarn if a string is longer than the maximum portable length specified by " + "the standard.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-overlength-strings")); + +maplecl::Option oWoverloadedVirtual({"-Woverloaded-virtual"}, + " -Woverloaded-virtual \tWarn about overloaded virtual function names.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-overloaded-virtual")); + +maplecl::Option oWoverrideInit({"-Woverride-init"}, + " -Woverride-init \tWarn about overriding initializers without side effects.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-override-init")); + +maplecl::Option oWoverrideInitSideEffects({"-Woverride-init-side-effects"}, + " -Woverride-init-side-effects\tWarn about overriding initializers with side effects.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-override-init-side-effects")); + +maplecl::Option oWpacked({"-Wpacked"}, + " -Wpacked \tWarn when the packed attribute has no effect on struct layout.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-packed")); + +maplecl::Option oWpackedBitfieldCompat({"-Wpacked-bitfield-compat"}, + " -Wpacked-bitfield-compat \tWarn about packed bit-fields whose offset changed in GCC 4.4.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-packed-bitfield-compat")); + +maplecl::Option oWpadded({"-Wpadded"}, + " -Wpadded \tWarn when padding is required to align structure members.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-padded")); + +maplecl::Option oWparentheses({"-Wparentheses"}, + " -Wparentheses \tWarn about possibly missing parentheses.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-parentheses")); + +maplecl::Option oWpedantic({"-Wpedantic"}, + " -Wpedantic \tIssue warnings needed for strict compliance to the standard.\n", + {driverCategory, clangCategory}, kOptFront); + +maplecl::Option oWpedanticMsFormat({"-Wpedantic-ms-format"}, + " -Wpedantic-ms-format \t\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-pedantic-ms-format")); + +maplecl::Option oWplacementNew({"-Wplacement-new"}, + " -Wplacement-new \tWarn for placement new expressions with undefined behavior.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-placement-new")); + +maplecl::Option oWpmfConversions({"-Wpmf-conversions"}, + " -Wpmf-conversions \tWarn when converting the type of pointers to member functions.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-pmf-conversions")); + +maplecl::Option oWpointerCompare({"-Wpointer-compare"}, + " -Wpointer-compare \tWarn when a pointer is compared with a zero character constant.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-pointer-compare")); + +maplecl::Option oWpointerSign({"-Wpointer-sign"}, + " -Wpointer-sign \tWarn when a pointer differs in signedness in an assignment.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-pointer-sign")); + +maplecl::Option oWpointerToIntCast({"-Wpointer-to-int-cast"}, + " -Wpointer-to-int-cast \tWarn when a pointer is cast to an integer of a different size.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-pointer-to-int-cast")); + +maplecl::Option oWpragmas({"-Wpragmas"}, + " -Wpragmas \tWarn about misuses of pragmas.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-pragmas")); + +maplecl::Option oWprotocol({"-Wprotocol"}, + " -Wprotocol \tWarn if inherited methods are unimplemented.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-protocol")); + +maplecl::Option oWredundantDecls({"-Wredundant-decls"}, + " -Wredundant-decls \tWarn about multiple declarations of the same object.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-redundant-decls")); + +maplecl::Option oWregister({"-Wregister"}, + " -Wregister \tWarn about uses of register storage specifier.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-register")); + +maplecl::Option oWreorder({"-Wreorder"}, + " -Wreorder \tWarn when the compiler reorders code.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-reorder")); + +maplecl::Option oWrestrict({"-Wrestrict"}, + " -Wrestrict \tWarn when an argument passed to a restrict-qualified parameter aliases with " + "another argument.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-restrict")); + +maplecl::Option oWreturnLocalAddr({"-Wreturn-local-addr"}, + " -Wreturn-local-addr \tWarn about returning a pointer/reference to a local or temporary variable.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-return-local-addr")); + +maplecl::Option oWreturnType({"-Wreturn-type"}, + " -Wreturn-type \tWarn whenever a function's return type defaults to \"int\" (C)\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-return-type")); + +maplecl::Option oWselector({"-Wselector"}, + " -Wselector \tWarn if a selector has multiple methods.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-selector")); + +maplecl::Option oWsequencePoint({"-Wsequence-point"}, + " -Wsequence-point \tWarn about possible violations of sequence point rules.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-sequence-point")); + +maplecl::Option oWshadowIvar({"-Wshadow-ivar"}, + " -Wshadow-ivar \tWarn if a local declaration hides an instance variable.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-shadow-ivar")); + +maplecl::Option oWshiftCountNegative({"-Wshift-count-negative"}, + " -Wshift-count-negative \tWarn if shift count is negative.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-shift-count-negative")); + +maplecl::Option oWshiftCountOverflow({"-Wshift-count-overflow"}, + " -Wshift-count-overflow \tWarn if shift count >= width of type.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-shift-count-overflow")); + +maplecl::Option oWsignConversion({"-Wsign-conversion"}, + " -Wsign-conversion \tWarn for implicit type conversions between signed and unsigned integers.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-sign-conversion")); + +maplecl::Option oWsignPromo({"-Wsign-promo"}, + " -Wsign-promo \tWarn when overload promotes from unsigned to signed.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-sign-promo")); + +maplecl::Option oWsizedDeallocation({"-Wsized-deallocation"}, + " -Wsized-deallocation \tWarn about missing sized deallocation functions.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-sized-deallocation")); + +maplecl::Option oWsizeofArrayArgument({"-Wsizeof-array-argument"}, + " -Wsizeof-array-argument \tWarn when sizeof is applied on a parameter declared as an array.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-sizeof-array-argument")); + +maplecl::Option oWsizeofPointerMemaccess({"-Wsizeof-pointer-memaccess"}, + " -Wsizeof-pointer-memaccess \tWarn about suspicious length parameters to certain string functions if the " + "argument uses sizeof.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-sizeof-pointer-memaccess")); + +maplecl::Option oWstackProtector({"-Wstack-protector"}, + " -Wstack-protector \tWarn when not issuing stack smashing protection for some reason.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-stack-protector")); + +maplecl::Option oWstrictAliasing({"-Wstrict-aliasing"}, + " -Wstrict-aliasing \tWarn about code which might break strict aliasing rules.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-strict-aliasing")); + +maplecl::Option oWstrictNullSentinel({"-Wstrict-null-sentinel"}, + " -Wstrict-null-sentinel \tWarn about uncasted NULL used as sentinel.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-strict-null-sentinel")); + +maplecl::Option oWstrictOverflow({"-Wstrict-overflow"}, + " -Wstrict-overflow \tWarn about optimizations that assume that signed overflow is undefined.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-strict-overflow")); + +maplecl::Option oWstrictSelectorMatch({"-Wstrict-selector-match"}, + " -Wstrict-selector-match \tWarn if type signatures of candidate methods do not match exactly.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-strict-selector-match")); + +maplecl::Option oWstringopOverflow({"-Wstringop-overflow"}, + " -Wstringop-overflow \tWarn about buffer overflow in string manipulation functions like memcpy " + "and strcpy.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-stringop-overflow")); + +maplecl::Option oWsubobjectLinkage({"-Wsubobject-linkage"}, + " -Wsubobject-linkage \tWarn if a class type has a base or a field whose type uses the anonymous " + "namespace or depends on a type with no linkage.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-subobject-linkage")); + +maplecl::Option oWsuggestAttributeConst({"-Wsuggest-attribute=const"}, + " -Wsuggest-attribute=const \tWarn about functions which might be candidates for __attribute__((const)).\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-suggest-attribute=const")); + +maplecl::Option oWsuggestAttributeFormat({"-Wsuggest-attribute=format"}, + " -Wsuggest-attribute=format \tWarn about functions which might be candidates for format attributes.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-suggest-attribute=format")); + +maplecl::Option oWsuggestAttributeNoreturn({"-Wsuggest-attribute=noreturn"}, + " -Wsuggest-attribute=noreturn\tWarn about functions which might be candidates for __attribute__((noreturn)).\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-suggest-attribute=noreturn")); + +maplecl::Option oWsuggestAttributePure({"-Wsuggest-attribute=pure"}, + " -Wsuggest-attribute=pure \tWarn about functions which might be candidates for __attribute__((pure)).\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-suggest-attribute=pure")); + +maplecl::Option oWsuggestFinalMethods({"-Wsuggest-final-methods"}, + " -Wsuggest-final-methods \tWarn about C++ virtual methods where adding final keyword would improve " + "code quality.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-suggest-final-methods")); + +maplecl::Option oWsuggestFinalTypes({"-Wsuggest-final-types"}, + " -Wsuggest-final-types \tWarn about C++ polymorphic types where adding final keyword would improve " + "code quality.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-suggest-final-types")); + +maplecl::Option oWswitch({"-Wswitch"}, + " -Wswitch \tWarn about enumerated switches.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-switch")); + +maplecl::Option oWswitchBool({"-Wswitch-bool"}, + " -Wswitch-bool \tWarn about switches with boolean controlling expression.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-switch-bool")); + +maplecl::Option oWswitchDefault({"-Wswitch-default"}, + " -Wswitch-default \tWarn about enumerated switches missing a \"default:\" statement.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-switch-default")); + +maplecl::Option oWswitchEnum({"-Wswitch-enum"}, + " -Wswitch-enum \tWarn about all enumerated switches missing a specific case.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-switch-enum")); + +maplecl::Option oWswitchUnreachable({"-Wswitch-unreachable"}, + " -Wswitch-unreachable \tWarn about statements between switch's controlling expression and the " + "first case.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-switch-unreachable")); + +maplecl::Option oWsyncNand({"-Wsync-nand"}, + " -Wsync-nand \tWarn when __sync_fetch_and_nand and __sync_nand_and_fetch built-in " + "functions are used.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-sync-nand")); + +maplecl::Option oWsystemHeaders({"-Wsystem-headers"}, + " -Wsystem-headers \tDo not suppress warnings from system headers.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-system-headers")); + +maplecl::Option oWtautologicalCompare({"-Wtautological-compare"}, + " -Wtautological-compare \tWarn if a comparison always evaluates to true or false.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-tautological-compare")); + +maplecl::Option oWtemplates({"-Wtemplates"}, + " -Wtemplates \tWarn on primary template declaration.\n", + {driverCategory, clangCategory}, kOptFront); + +maplecl::Option oWterminate({"-Wterminate"}, + " -Wterminate \tWarn if a throw expression will always result in a call to terminate().\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-terminate")); + +maplecl::Option oWtraditional({"-Wtraditional"}, + " -Wtraditional \tWarn about features not present in traditional C. \n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-traditional")); + +maplecl::Option oWtraditionalConversion({"-Wtraditional-conversion"}, + " -Wtraditional-conversion \tWarn of prototypes causing type conversions different from what would " + "happen in the absence of prototype. \n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-traditional-conversion")); + +maplecl::Option oWtrampolines({"-Wtrampolines"}, + " -Wtrampolines \tWarn whenever a trampoline is generated. \n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-trampolines")); + +maplecl::Option oWtrigraphs({"-Wtrigraphs"}, + " -Wtrigraphs \tWarn if trigraphs are encountered that might affect the meaning of the program.\n", + {driverCategory, clangCategory}, kOptFront); + +maplecl::Option oWundeclaredSelector({"-Wundeclared-selector"}, + " -Wundeclared-selector \tWarn about @selector()s without previously declared methods. \n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-undeclared-selector")); + +maplecl::Option oWuninitialized({"-Wuninitialized"}, + " -Wuninitialized \tWarn about uninitialized automatic variables. \n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-uninitialized")); + +maplecl::Option oWunknownPragmas({"-Wunknown-pragmas"}, + " -Wunknown-pragmas \tWarn about unrecognized pragmas. \n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-unknown-pragmas")); + +maplecl::Option oWunsafeLoopOptimizations({"-Wunsafe-loop-optimizations"}, + " -Wunsafe-loop-optimizations \tWarn if the loop cannot be optimized due to nontrivial assumptions. \n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-unsafe-loop-optimizations")); + +maplecl::Option oWunsuffixedFloatConstants({"-Wunsuffixed-float-constants"}, + " -Wunsuffixed-float-constants\tWarn about unsuffixed float constants. \n", + {driverCategory, clangCategory}, kOptFront); + +maplecl::Option oWunused({"-Wunused"}, + " -Wunused \tEnable all -Wunused- warnings. \n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-unused")); + +maplecl::Option oWunusedButSetParameter({"-Wunused-but-set-parameter"}, + " -Wunused-but-set-parameter \tWarn when a function parameter is only set, otherwise unused. \n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-unused-but-set-parameter")); + +maplecl::Option oWunusedButSetVariable({"-Wunused-but-set-variable"}, + " -Wunused-but-set-variable \tWarn when a variable is only set, otherwise unused. \n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-unused-but-set-variable")); + +maplecl::Option oWunusedConstVariable({"-Wunused-const-variable"}, + " -Wunused-const-variable \tWarn when a const variable is unused. \n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-unused-const-variable")); + +maplecl::Option oWunusedFunction({"-Wunused-function"}, + " -Wunused-function \tWarn when a function is unused. \n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-unused-function")); + +maplecl::Option oWunusedLabel({"-Wunused-label"}, + " -Wunused-label \tWarn when a label is unused. \n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-unused-label")); + +maplecl::Option oWunusedLocalTypedefs({"-Wunused-local-typedefs"}, + " -Wunused-local-typedefs \tWarn when typedefs locally defined in a function are not used. \n", + {driverCategory, clangCategory}, kOptFront); + +maplecl::Option oWunusedResult({"-Wunused-result"}, + " -Wunused-result \tWarn if a caller of a function, marked with attribute warn_unused_result," + " does not use its return value. \n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-unused-result")); + +maplecl::Option oWunusedValue({"-Wunused-value"}, + " -Wunused-value \tWarn when an expression value is unused. \n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-unused-value")); + +maplecl::Option oWunusedVariable({"-Wunused-variable"}, + " -Wunused-variable \tWarn when a variable is unused. \n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-unused-variable")); + +maplecl::Option oWuselessCast({"-Wuseless-cast"}, + " -Wuseless-cast \tWarn about useless casts. \n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-useless-cast")); + +maplecl::Option oWvarargs({"-Wvarargs"}, + " -Wvarargs \tWarn about questionable usage of the macros used to retrieve variable " + "arguments.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-varargs")); + +maplecl::Option oWvariadicMacros({"-Wvariadic-macros"}, + " -Wvariadic-macros \tWarn about using variadic macros. \n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-variadic-macros")); + +maplecl::Option oWvectorOperationPerformance({"-Wvector-operation-performance"}, + " -Wvector-operation-performance\n" + " \tWarn when a vector operation is compiled outside the SIMD. \n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-vector-operation-performance")); + +maplecl::Option oWvirtualInheritance({"-Wvirtual-inheritance"}, + " -Wvirtual-inheritance \tWarn on direct virtual inheritance.\n", + {driverCategory, clangCategory}, kOptFront); + +maplecl::Option oWvirtualMoveAssign({"-Wvirtual-move-assign"}, + " -Wvirtual-move-assign \tWarn if a virtual base has a non-trivial move assignment operator. \n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-virtual-move-assign")); + +maplecl::Option oWvolatileRegisterVar({"-Wvolatile-register-var"}, + " -Wvolatile-register-var \tWarn when a register variable is declared volatile. \n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-volatile-register-var")); + +maplecl::Option oWzeroAsNullPointerConstant({"-Wzero-as-null-pointer-constant"}, + " -Wzero-as-null-pointer-constant\n" + " \tWarn when a literal '0' is used as null pointer. \n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-zero-as-null-pointer-constant")); + +maplecl::Option oWnoScalarStorageOrder({"-Wno-scalar-storage-order"}, + " -Wno-scalar-storage-order \tDo not warn on suspicious constructs involving reverse scalar storage order.\n", + {driverCategory, unSupCategory}, maplecl::DisableWith("-Wscalar-storage-order"), maplecl::kHide); + +maplecl::Option oWnoReservedIdMacro({"-Wno-reserved-id-macro"}, + " -Wno-reserved-id-macro \tDo not warn when macro name is a reserved identifier.\n", + {driverCategory, clangCategory}, kOptFront); + +maplecl::Option oWnoGnuZeroVariadicMacroArguments({"-Wno-gnu-zero-variadic-macro-arguments"}, + " -Wno-gnu-zero-variadic-macro-arguments\n" + " \tDo not warn when token pasting of ',' and __VA_ARGS__ is a " + "GNU extension.\n", + {driverCategory, clangCategory}, kOptFront); + +maplecl::Option oWnoGnuStatementExpression({"-Wno-gnu-statement-expression"}, + " -Wno-gnu-statement-expression\n" + " \tDo not warn when use of GNU statement expression extension.\n", + {driverCategory, clangCategory}, kOptFront); + +maplecl::Option suppressWarnings({"-w"}, + " -w \tSuppress all warnings.\n", + {driverCategory, clangCategory, asCategory, ldCategory}, kOptFront); + +/* ##################### String Options ############################################################### */ + +maplecl::Option oWeakReferenceMismatches({"-weak_reference_mismatches"}, + " -weak_reference_mismatches \tSpecifies what to do if a symbol import conflicts between file " + "(weak in one and not in another) the default is to treat the symbol as non-weak.\n", + {driverCategory, clangCategory}, kOptFront); + +maplecl::Option oWerrorE({"-Werror="}, + " -Werror= \tTreat specified warning as error.\n", + {driverCategory, clangCategory}, kOptFront, maplecl::DisableWith("-Wno-error=")); + +maplecl::Option oWnormalizedE({"-Wnormalized="}, + " -Wnormalized= \t-Wnormalized=[none|id|nfc|nfkc] Warn about non-normalized Unicode strings.\n", + {driverCategory, clangCategory}, kOptFront); + +maplecl::Option oWplacementNewE({"-Wplacement-new="}, + " -Wplacement-new= \tWarn for placement new expressions with undefined behavior.\n", + {driverCategory, clangCategory}, kOptFront); + +maplecl::Option oWstackUsage({"-Wstack-usage="}, + " -Wstack-usage= \t-Wstack-usage= Warn if stack usage might exceed .\n", + {driverCategory, unSupCategory}, maplecl::kHide); + +maplecl::Option oWstrictAliasingE({"-Wstrict-aliasing="}, + " -Wstrict-aliasing= \tWarn about code which might break strict aliasing rules.\n", + {driverCategory, clangCategory}, kOptFront); + +/* ##################### DIGITAL Options ############################################################### */ + +maplecl::Option oWframeLargerThan({"-Wframe-larger-than="}, + " -Wframe-larger-than= \tWarn if a function's stack frame requires in excess of .\n", + {driverCategory, clangCategory}, kOptFront); + +} \ No newline at end of file diff --git a/src/mapleall/maple_ipa/include/ipa_clone.h b/src/mapleall/maple_ipa/include/ipa_clone.h index fdd670119489e55ad94a8826d942a8de6eabf02b..907bed8c3daad25b5e90d39bcca1998a28b1b6ee 100644 --- a/src/mapleall/maple_ipa/include/ipa_clone.h +++ b/src/mapleall/maple_ipa/include/ipa_clone.h @@ -60,6 +60,7 @@ class IpaClone : public AnalysisResult { void ModifyParameterSideEffect(MIRFunction *newFunc, uint32 paramIndex) const; private: + std::set InitNoIpaFuncList() const; MIRModule *mirModule; MapleAllocator allocator; MIRBuilder &mirBuilder; diff --git a/src/mapleall/maple_ipa/src/ipa_clone.cpp b/src/mapleall/maple_ipa/src/ipa_clone.cpp index be1ba1be174dc1b49a716ce2fadfdfdab8d6c017..08f0d01984eef4711c3e66af88acb9cbf72237cb 100644 --- a/src/mapleall/maple_ipa/src/ipa_clone.cpp +++ b/src/mapleall/maple_ipa/src/ipa_clone.cpp @@ -554,16 +554,43 @@ bool IpaClone::CheckImportantExprHasBr(const std::vector &exprVec) cons return false; } +std::set IpaClone::InitNoIpaFuncList() const{ + std::set resList; + if (Options::noIpaCloneFuncList.empty()) { + return resList; + } + std::ifstream fs(Options::noIpaCloneFuncList); + if (!fs) { + LogInfo::MapleLogger() << "WARN: failed to open " << Options::noIpaCloneFuncList << '\n'; + return resList; + } + std::string line; + while (std::getline(fs, line)) { + if (line[0] == '#') { + continue; + } + (void)resList.insert(line); + } + return resList; +} + void IpaClone::DoIpaClone() { InitParams(); + auto noIpaFunclist = InitNoIpaFuncList(); for (uint32 i = 0; i < GlobalTables::GetFunctionTable().GetFuncTable().size(); ++i) { MIRFunction *func = GlobalTables::GetFunctionTable().GetFunctionFromPuidx(i); - if (func == nullptr) { + if (func == nullptr || func->IsFromMpltInline()) { continue; } if (Options::stackProtectorStrong && func->GetMayWriteToAddrofStack()) { continue; } + if (noIpaFunclist.count(func->GetName()) == 1) { + continue; + } + if (MayBeOverwritten(*func)) { + continue; + } curFunc = func; std::map> &funcImportantExpr = mirModule->GetFuncImportantExpr(); if (funcImportantExpr.find(func->GetPuidx()) != funcImportantExpr.end() && diff --git a/src/mapleall/maple_ipa/src/ipa_side_effect.cpp b/src/mapleall/maple_ipa/src/ipa_side_effect.cpp index d465a95ab61a326539a933d01ecf8520a9dd233e..9eea34e9f4f13933f73bcefaf5fb530b09f4fb64 100644 --- a/src/mapleall/maple_ipa/src/ipa_side_effect.cpp +++ b/src/mapleall/maple_ipa/src/ipa_side_effect.cpp @@ -15,6 +15,7 @@ #include "ipa_side_effect.h" #include "driver_options.h" #include "func_desc.h" +#include "inline.h" #include "inline_analyzer.h" #include "me_ir.h" #include "opcodes.h" @@ -44,7 +45,7 @@ const FuncDesc &IpaSideEffectAnalyzer::GetFuncDesc(MIRFunction &f) { } const std::map *IpaSideEffectAnalyzer::GetWhiteList() { - if (opts::oFnoBuiltin) { + if (opts::oFnoBuiltin.IsEnabledByUser()) { kFullWhiteList.erase(kFullWhiteList.begin(), kFullWhiteList.end()); return &kFullWhiteList; } @@ -513,6 +514,10 @@ bool SCCSideEffect::PhaseRun(SCCNode &scc) { if (meFunc == nullptr || meFunc->GetCfg()->NumBBs() == 0) { continue; } + if (MayBeOverwritten(*func)) { + func->InitFuncDescToWorst(); + continue; + } auto *phase = map->GetVaildAnalysisPhase(meFunc->GetUniqueID(), &MEDominance::id); Dominance *dom = static_cast(phase)->GetDomResult(); phase = map->GetVaildAnalysisPhase(meFunc->GetUniqueID(), &MEAliasClass::id); diff --git a/src/mapleall/maple_ipa/src/region_identify.cpp b/src/mapleall/maple_ipa/src/region_identify.cpp index e4dfdac89c8a96c650b04909dc24b54eabd56d4b..364c49da81b7a44318b16268a03eb1c41cf37eb7 100644 --- a/src/mapleall/maple_ipa/src/region_identify.cpp +++ b/src/mapleall/maple_ipa/src/region_identify.cpp @@ -269,6 +269,11 @@ bool RegionIdentify::CheckCompatibilifyBetweenSrcs(BaseNode &lhs, BaseNode &rhs) auto rightIdx = static_cast(rhs).GetStIdx(); return CompareSymbolStructure(leftIdx, rightIdx); } + case OP_addroffunc: { + auto leftIdx = static_cast(lhs).GetPUIdx(); + auto rightIdx = static_cast(rhs).GetPUIdx(); + return leftIdx == rightIdx; + } case OP_regread: { auto leftIdx = static_cast(lhs).GetRegIdx(); auto rightIdx = static_cast(rhs).GetRegIdx(); diff --git a/src/mapleall/maple_ir/include/all_attributes.def b/src/mapleall/maple_ir/include/all_attributes.def index 476250bfec1afef9752da970b14ef8fb9716aaed..f083e8dce77d7cee41b0dd6702b7d5d8d37c5236 100644 --- a/src/mapleall/maple_ir/include/all_attributes.def +++ b/src/mapleall/maple_ir/include/all_attributes.def @@ -58,6 +58,9 @@ ATTR(safed) ATTR(unsafed) ATTR(noreturn) + ATTR(like_macro) + ATTR(hot) + ATTR(cold) #endif #if defined(FUNC_ATTR) || defined(TYPE_ATTR) ATTR(abstract) @@ -83,7 +86,6 @@ ATTR(tls_static) ATTR(tls_dynamic) ATTR(packed) - ATTR(aligned) #endif #ifdef TYPE_ATTR ATTR(annotation) @@ -98,6 +100,8 @@ ATTR(initial_exec) ATTR(local_dynamic) ATTR(global_dynamic) + ATTR(shortcc) + ATTR(typedef) #endif #ifdef FUNC_ATTR ATTR(firstarg_return) @@ -106,6 +110,7 @@ #ifdef STMT_ATTR ATTR(insaferegion) ATTR(mayTailcall) + ATTR(ignore_cost) #endif ATTR(oneelem_simd) ATTR(nonnull) @@ -118,4 +123,7 @@ #endif #if (defined(TYPE_ATTR) || defined(FIELD_ATTR)) && !defined(NOCONTENT_ATTR) ATTR(pack) + ATTR(type_alias) + ATTR(type_align) + ATTR(aligned) #endif diff --git a/src/mapleall/maple_ir/include/all_pragmas.def b/src/mapleall/maple_ir/include/all_pragmas.def new file mode 100644 index 0000000000000000000000000000000000000000..e41e637885c3391e42d8ea215f0a654567bb1f8f --- /dev/null +++ b/src/mapleall/maple_ir/include/all_pragmas.def @@ -0,0 +1,16 @@ +/* + * Copyright (c) [2023] Huawei Technologies Co.,Ltd.All rights reserved. + * + * OpenArkCompiler is licensed under the Mulan PSL v1. + * You can use this software according to the terms and conditions of the Mulan PSL v1. + * You may obtain a copy of Mulan PSL v1 at: + * + * http://license.coscl.org.cn/MulanPSL + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v1 for more details. + */ +/* all supported names for designed pragma */ + PRAGMA(prefer_inline) diff --git a/src/mapleall/maple_ir/include/bin_mpl_export.h b/src/mapleall/maple_ir/include/bin_mpl_export.h index facb6f7060726b5c35795837807e6b72609bdee8..5b3e3366ec943642469e3678f9ca88c2f9a6d640 100644 --- a/src/mapleall/maple_ir/include/bin_mpl_export.h +++ b/src/mapleall/maple_ir/include/bin_mpl_export.h @@ -117,7 +117,7 @@ class BinaryMplExport { void OutputPragmaElement(const MIRPragmaElement &e); void OutputPragma(const MIRPragma &p); void OutputFieldPair(const FieldPair &fp); - void OutputMethodPair(const MethodPair &memPool); + void OutputMethodPair(const MethodPair &methodPair); void OutputFieldsOfStruct(const FieldVector &fields); void OutputMethodsOfStruct(const MethodVector &methods); void OutputStructTypeData(const MIRStructType &type); @@ -129,6 +129,7 @@ class BinaryMplExport { void OutputSymbol(MIRSymbol *sym); void OutputEnumeration(const MIREnum *mirEnum); void OutputFunction(PUIdx puIdx); + void OutputFuncAttrFlag(const FuncAttrFlag &attrFlag); void OutputInterfaceTypeData(const MIRInterfaceType &type); void OutputSrcPos(const SrcPosition &pos); void OutputAliasMap(MapleMap &aliasVarMap); diff --git a/src/mapleall/maple_ir/include/bin_mpl_import.h b/src/mapleall/maple_ir/include/bin_mpl_import.h index 42d9ebd1bb291f4a1bb678c0272c9f5df06688ea..fc71a07fa6800bc3b87eea1aef0db2feaccec5f2 100644 --- a/src/mapleall/maple_ir/include/bin_mpl_import.h +++ b/src/mapleall/maple_ir/include/bin_mpl_import.h @@ -122,6 +122,7 @@ class BinaryMplImport { void ImportClassTypeData(MIRClassType &type); void ImportInterfaceTypeData(MIRInterfaceType &type); PUIdx ImportFunction(); + void ImportFuncAttrFlag(FuncAttrFlag &attrFlag); MIRSymbol *InSymbol(MIRFunction *func); void ImportInfoVector(MIRInfoVector &infoVector, MapleVector &infoVectorIsString); void ImportLocalTypeNameTable(MIRTypeNameTable *typeNameTab); diff --git a/src/mapleall/maple_ir/include/cmpl.h b/src/mapleall/maple_ir/include/cmpl.h index c01f2f6af01b6266d349bef9577691da373f1dc5..e90e271f7be1db708700d89734f64b42a7aaabae 100644 --- a/src/mapleall/maple_ir/include/cmpl.h +++ b/src/mapleall/maple_ir/include/cmpl.h @@ -167,7 +167,7 @@ struct BaseNodeT { // 4B Opcode op; PrimType ptyp; uint8 typeFlag; // a flag to speed up type related operations in the VM - uint8 numOpnds; // only used for N-ary operators, switch and rangegoto + uint32 numOpnds; // only used for N-ary operators, switch and rangegoto // operands immediately before each node virtual size_t NumOpnds() const { if (op == OP_switch || op == OP_rangegoto) { @@ -179,7 +179,7 @@ struct BaseNodeT { // 4B virtual uint8 GetNumOpnds() const { return numOpnds; } - virtual void SetNumOpnds(uint8 num) { + virtual void SetNumOpnds(uint32 num) { numOpnds = num; } diff --git a/src/mapleall/maple_ir/include/dwarf.def b/src/mapleall/maple_ir/include/dwarf.def index cc9ff7f5878ba09bb159a7ae46642f3a65eb328e..01d2024b3bbe349c99fad09c385d27ee20298a34 100644 --- a/src/mapleall/maple_ir/include/dwarf.def +++ b/src/mapleall/maple_ir/include/dwarf.def @@ -92,6 +92,7 @@ DW_AT(0x38, data_member_location) DW_AT(0x39, decl_column) DW_AT(0x3a, decl_file) DW_AT(0x3b, decl_line) +DW_AT(0x3c, declaration) DW_AT(0x3e, encoding) DW_AT(0x3f, external) DW_AT(0x40, frame_base) diff --git a/src/mapleall/maple_ir/include/func_desc.h b/src/mapleall/maple_ir/include/func_desc.h index 512a811cd5d33fe0e21ca6d036ffb5bc86f285c0..964e16b300adc529b1ec11d214921850f37467d5 100644 --- a/src/mapleall/maple_ir/include/func_desc.h +++ b/src/mapleall/maple_ir/include/func_desc.h @@ -60,6 +60,14 @@ struct FuncDesc { } } + void InitToWorst() { + funcInfo = FI::kUnknown; + returnInfo = RI::kUnknown; + for (size_t idx = 0; idx < kMaxParamCount; ++idx) { + paramInfo[idx] = PI::kUnknown; + } + } + bool Equals(const FuncDesc &desc) const { if (funcInfo != desc.funcInfo) { return false; diff --git a/src/mapleall/maple_ir/include/global_tables.h b/src/mapleall/maple_ir/include/global_tables.h index 8f5a7a62fe7325314e61e476716f6552ccc8697d..e63a7fdae4a8ba6b7af6fc714cb7b79e7bf43a2e 100644 --- a/src/mapleall/maple_ir/include/global_tables.h +++ b/src/mapleall/maple_ir/include/global_tables.h @@ -827,6 +827,33 @@ class GSymbolTable { std::vector symbolTable; // map symbol idx to symbol node }; +class GPragmaTable { + public: + static CPragma *CreateCPragma(CPragmaKind k, uint32 id, const std::string &content); + + GPragmaTable() { + pragmas.push_back(nullptr); + } + + virtual ~GPragmaTable() = default; + + std::vector &GetPragmaTable() { + return pragmas; + } + + CPragma *GetPragmaFromindex(uint32 idx) const { + CHECK_FATAL(idx < pragmas.size(), "Invalid index"); + return pragmas.at(idx); + } + + void SetPragmaItem(uint32 idx, CPragma *pragma) { + CHECK_FATAL(idx < pragmas.size(), "Invalid index"); + pragmas[idx] = pragma; + } + private: + std::vector pragmas; +}; + class ConstPool { public: std::unordered_map &GetConstU16StringPool() { @@ -889,6 +916,10 @@ class GlobalTables { return globalTables.functionTable; } + static GPragmaTable &GetGPragmaTable() { + return globalTables.gPragmaTable; + } + static GSymbolTable &GetGsymTable() { return globalTables.gSymbolTable; } @@ -924,6 +955,7 @@ class GlobalTables { STypeNameTable typeNameTable; FunctionTable functionTable; GSymbolTable gSymbolTable; + GPragmaTable gPragmaTable; ConstPool constPool; std::unique_ptr fpConstTablePtr; std::unique_ptr intConstTablePtr; diff --git a/src/mapleall/maple_ir/include/intrinsic_c.def b/src/mapleall/maple_ir/include/intrinsic_c.def index cc4b4f07a6f9cb284e14f8b781e9cb25c576201a..b26d9f6b70b90a03952b944434720d685bee4121 100644 --- a/src/mapleall/maple_ir/include/intrinsic_c.def +++ b/src/mapleall/maple_ir/include/intrinsic_c.def @@ -96,7 +96,7 @@ DEF_MIR_INTRINSIC(C_va_start,\ "va_start", 10, INTRNISCBUILTIN | INTRNISPURE | INTRNISSPECIAL, kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory } , kArgTyI32 }) DEF_MIR_INTRINSIC(C_constant_p,\ - "constant_p", 0, 0, kArgTyI32, { kArgTyDynany }) + "constant_p", 0, INTRNISCBUILTIN | INTRNISPURE, kArgTyI32, { kArgTyDynany }) DEF_MIR_INTRINSIC(C_clz32,\ "clz32", 1, INTRNISCBUILTIN | INTRNISPURE, kArgTyI32, { kArgTyU32 }) DEF_MIR_INTRINSIC(C_clz64,\ @@ -350,6 +350,12 @@ DEF_MIR_INTRINSIC(C___builtin_object_size,\ DEF_MIR_INTRINSIC(C___builtin_division_exception,\ "__builtin_division_exception", 0, INTRNISCBUILTIN | INTRNNOSIDEEFFECT | INTRNISPURE | INTRNISSPECIAL, kArgTyVoid, { kArgTyI64 }) +DEF_MIR_INTRINSIC(C_alloca_with_align,\ + "alloca_with_align", 5, INTRNISCBUILTIN, kArgTyPtr, { kArgTyU64, kArgTyU64 }) +DEF_MIR_INTRINSIC(C_prefetch,\ + "prefetch", 1, INTRNISCBUILTIN | INTRNISSPECIAL, kArgTyVoid, { kArgTyPtr, kArgTyI32, kArgTyI32 }) +DEF_MIR_INTRINSIC(C___clear_cache,\ + "__clear_cache", 1, INTRNISCBUILTIN | INTRNISSPECIAL, kArgTyVoid, { kArgTyPtr, kArgTyPtr }) // atomic DEF_MIR_INTRINSIC(C___atomic_load_n,\ "__atomic_load_n", 1, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyDynany, @@ -431,6 +437,8 @@ DEF_MIR_INTRINSIC(C___atomic_compare_exchange,\ { kArgTyPtr, kArgTyPtr, kArgTyPtr, kArgTyU1, kArgTyI32, kArgTyI32 }) +DEF_MIR_INTRINSIC(C___tls_get_thread_pointer,\ + "__tls_get_thread_pointer", DEFAULT_NUM_INSN, INTRNATOMIC , kArgTyU64) DEF_MIR_INTRINSIC(C___tls_get_tbss_anchor,\ "__tls_get_tbss_anchor", 5, INTRNISCBUILTIN | INTRNMEMBARRIER, { kArgTyU64, AliasLevelInfo::kAliasGlobal }, {}) DEF_MIR_INTRINSIC(C___tls_get_tdata_anchor,\ diff --git a/src/mapleall/maple_ir/include/intrinsic_vector_new.def b/src/mapleall/maple_ir/include/intrinsic_vector_new.def index 1d72f8d0514a12343030139f17544ea31fe1002f..30240567cbe25accdb8ae1dc1cf3388123405c6e 100644 --- a/src/mapleall/maple_ir/include/intrinsic_vector_new.def +++ b/src/mapleall/maple_ir/include/intrinsic_vector_new.def @@ -1,5 +1,5 @@ /* - * Copyright (c) [2021] Futurewei Technologies, Inc. + * Copyright (c) [2023] Futurewei Technologies, Inc. * * OpenArkCompiler is licensed under the Mulan Permissive Software License v2. * You can use this software according to the terms and conditions of the @@ -1571,1477 +1571,1477 @@ DEF_MIR_INTRINSIC(vector_trn2q_v4u32, "vector_trn2q_v4u32", 1, DEF_MIR_INTRINSIC(vector_trn2q_v2u64, "vector_trn2q_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, { kArgTyV2U64, kArgTyV2U64 }) -DEF_MIR_INTRINSIC(vector_ld1_i8v8, "vector_ld1_i8v8", 1, +DEF_MIR_INTRINSIC(vector_ld1_v8i8, "vector_ld1_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - { { kArgTyPtr, MemEffect::kLoadMemory } }) -DEF_MIR_INTRINSIC(vector_ld1q_i8v16, "vector_ld1q_i8v16", 1, + { kArgTyPtr }) +DEF_MIR_INTRINSIC(vector_ld1q_v16i8, "vector_ld1q_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - { { kArgTyPtr, MemEffect::kLoadMemory } }) -DEF_MIR_INTRINSIC(vector_ld1_i16v4, "vector_ld1_i16v4", 1, + { kArgTyPtr }) +DEF_MIR_INTRINSIC(vector_ld1_v4i16, "vector_ld1_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - { { kArgTyPtr, MemEffect::kLoadMemory } }) -DEF_MIR_INTRINSIC(vector_ld1q_i16v8, "vector_ld1q_i16v8", 1, + { kArgTyPtr }) +DEF_MIR_INTRINSIC(vector_ld1q_v8i16, "vector_ld1q_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - { { kArgTyPtr, MemEffect::kLoadMemory } }) -DEF_MIR_INTRINSIC(vector_ld1_i32v2, "vector_ld1_i32v2", 1, + { kArgTyPtr }) +DEF_MIR_INTRINSIC(vector_ld1_v2i32, "vector_ld1_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - { { kArgTyPtr, MemEffect::kLoadMemory } }) -DEF_MIR_INTRINSIC(vector_ld1q_i32v4, "vector_ld1q_i32v4", 1, + { kArgTyPtr }) +DEF_MIR_INTRINSIC(vector_ld1q_v4i32, "vector_ld1q_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - { { kArgTyPtr, MemEffect::kLoadMemory } }) -DEF_MIR_INTRINSIC(vector_ld1_i64v1, "vector_ld1_i64v1", 1, + { kArgTyPtr }) +DEF_MIR_INTRINSIC(vector_ld1_v1i64, "vector_ld1_v1i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1I64, - { { kArgTyPtr, MemEffect::kLoadMemory } }) -DEF_MIR_INTRINSIC(vector_ld1q_i64v2, "vector_ld1q_i64v2", 1, + { kArgTyPtr }) +DEF_MIR_INTRINSIC(vector_ld1q_v2i64, "vector_ld1q_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - { { kArgTyPtr, MemEffect::kLoadMemory } }) -DEF_MIR_INTRINSIC(vector_ld1_u8v8, "vector_ld1_u8v8", 1, + { kArgTyPtr }) +DEF_MIR_INTRINSIC(vector_ld1_v8u8, "vector_ld1_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - { { kArgTyPtr, MemEffect::kLoadMemory } }) -DEF_MIR_INTRINSIC(vector_ld1q_u8v16, "vector_ld1q_u8v16", 1, + { kArgTyPtr }) +DEF_MIR_INTRINSIC(vector_ld1q_v16u8, "vector_ld1q_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - { { kArgTyPtr, MemEffect::kLoadMemory } }) -DEF_MIR_INTRINSIC(vector_ld1_u16v4, "vector_ld1_u16v4", 1, + { kArgTyPtr }) +DEF_MIR_INTRINSIC(vector_ld1_v4u16, "vector_ld1_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - { { kArgTyPtr, MemEffect::kLoadMemory } }) -DEF_MIR_INTRINSIC(vector_ld1q_u16v8, "vector_ld1q_u16v8", 1, + { kArgTyPtr }) +DEF_MIR_INTRINSIC(vector_ld1q_v8u16, "vector_ld1q_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - { { kArgTyPtr, MemEffect::kLoadMemory } }) -DEF_MIR_INTRINSIC(vector_ld1_u32v2, "vector_ld1_u32v2", 1, + { kArgTyPtr }) +DEF_MIR_INTRINSIC(vector_ld1_v2u32, "vector_ld1_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - { { kArgTyPtr, MemEffect::kLoadMemory } }) -DEF_MIR_INTRINSIC(vector_ld1q_u32v4, "vector_ld1q_u32v4", 1, + { kArgTyPtr }) +DEF_MIR_INTRINSIC(vector_ld1q_v4u32, "vector_ld1q_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - { { kArgTyPtr, MemEffect::kLoadMemory } }) -DEF_MIR_INTRINSIC(vector_ld1_u64v1, "vector_ld1_u64v1", 1, + { kArgTyPtr }) +DEF_MIR_INTRINSIC(vector_ld1_v1u64, "vector_ld1_v1u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1U64, - { { kArgTyPtr, MemEffect::kLoadMemory } }) -DEF_MIR_INTRINSIC(vector_ld1q_u64v2, "vector_ld1q_u64v2", 1, + { kArgTyPtr }) +DEF_MIR_INTRINSIC(vector_ld1q_v2u64, "vector_ld1q_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - { { kArgTyPtr, MemEffect::kLoadMemory } }) -DEF_MIR_INTRINSIC(vector_ld1_lane_i8v8, "vector_ld1_lane_i8v8", 1, + { kArgTyPtr }) +DEF_MIR_INTRINSIC(vector_ld1_lane_v8i8, "vector_ld1_lane_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - { { kArgTyPtr, MemEffect::kLoadMemory }, kArgTyV8I8, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_ld1q_lane_i8v16, "vector_ld1q_lane_i8v16", 1, + { kArgTyPtr, kArgTyV8I8, kArgTyI32 }) +DEF_MIR_INTRINSIC(vector_ld1q_lane_v16i8, "vector_ld1q_lane_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - { { kArgTyPtr, MemEffect::kLoadMemory }, kArgTyV16I8, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_ld1_lane_i16v4, "vector_ld1_lane_i16v4", 1, + { kArgTyPtr, kArgTyV16I8, kArgTyI32 }) +DEF_MIR_INTRINSIC(vector_ld1_lane_v4i16, "vector_ld1_lane_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - { { kArgTyPtr, MemEffect::kLoadMemory }, kArgTyV4I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_ld1q_lane_i16v8, "vector_ld1q_lane_i16v8", 1, + { kArgTyPtr, kArgTyV4I16, kArgTyI32 }) +DEF_MIR_INTRINSIC(vector_ld1q_lane_v8i16, "vector_ld1q_lane_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - { { kArgTyPtr, MemEffect::kLoadMemory }, kArgTyV8I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_ld1_lane_i32v2, "vector_ld1_lane_i32v2", 1, + { kArgTyPtr, kArgTyV8I16, kArgTyI32 }) +DEF_MIR_INTRINSIC(vector_ld1_lane_v2i32, "vector_ld1_lane_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - { { kArgTyPtr, MemEffect::kLoadMemory }, kArgTyV2I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_ld1q_lane_i32v4, "vector_ld1q_lane_i32v4", 1, + { kArgTyPtr, kArgTyV2I32, kArgTyI32 }) +DEF_MIR_INTRINSIC(vector_ld1q_lane_v4i32, "vector_ld1q_lane_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - { { kArgTyPtr, MemEffect::kLoadMemory }, kArgTyV4I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_ld1_lane_i64v1, "vector_ld1_lane_i64v1", 1, + { kArgTyPtr, kArgTyV4I32, kArgTyI32 }) +DEF_MIR_INTRINSIC(vector_ld1_lane_v1i64, "vector_ld1_lane_v1i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1I64, - { { kArgTyPtr, MemEffect::kLoadMemory }, kArgTyV1I64, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_ld1q_lane_i64v2, "vector_ld1q_lane_i64v2", 1, + { kArgTyPtr, kArgTyV1I64, kArgTyI32 }) +DEF_MIR_INTRINSIC(vector_ld1q_lane_v2i64, "vector_ld1q_lane_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - { { kArgTyPtr, MemEffect::kLoadMemory }, kArgTyV2I64, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_ld1_lane_u8v8, "vector_ld1_lane_u8v8", 1, + { kArgTyPtr, kArgTyV2I64, kArgTyI32 }) +DEF_MIR_INTRINSIC(vector_ld1_lane_v8u8, "vector_ld1_lane_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - { { kArgTyPtr, MemEffect::kLoadMemory }, kArgTyV8U8, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_ld1q_lane_u8v16, "vector_ld1q_lane_u8v16", 1, + { kArgTyPtr, kArgTyV8U8, kArgTyI32 }) +DEF_MIR_INTRINSIC(vector_ld1q_lane_v16u8, "vector_ld1q_lane_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - { { kArgTyPtr, MemEffect::kLoadMemory }, kArgTyV16U8, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_ld1_lane_u16v4, "vector_ld1_lane_u16v4", 1, + { kArgTyPtr, kArgTyV16U8, kArgTyI32 }) +DEF_MIR_INTRINSIC(vector_ld1_lane_v4u16, "vector_ld1_lane_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - { { kArgTyPtr, MemEffect::kLoadMemory }, kArgTyV4U16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_ld1q_lane_u16v8, "vector_ld1q_lane_u16v8", 1, + { kArgTyPtr, kArgTyV4U16, kArgTyI32 }) +DEF_MIR_INTRINSIC(vector_ld1q_lane_v8u16, "vector_ld1q_lane_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - { { kArgTyPtr, MemEffect::kLoadMemory }, kArgTyV8U16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_ld1_lane_u32v2, "vector_ld1_lane_u32v2", 1, + { kArgTyPtr, kArgTyV8U16, kArgTyI32 }) +DEF_MIR_INTRINSIC(vector_ld1_lane_v2u32, "vector_ld1_lane_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - { { kArgTyPtr, MemEffect::kLoadMemory }, kArgTyV2U32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_ld1q_lane_u32v4, "vector_ld1q_lane_u32v4", 1, + { kArgTyPtr, kArgTyV2U32, kArgTyI32 }) +DEF_MIR_INTRINSIC(vector_ld1q_lane_v4u32, "vector_ld1q_lane_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - { { kArgTyPtr, MemEffect::kLoadMemory }, kArgTyV4U32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_ld1_lane_u64v1, "vector_ld1_lane_u64v1", 1, + { kArgTyPtr, kArgTyV4U32, kArgTyI32 }) +DEF_MIR_INTRINSIC(vector_ld1_lane_v1u64, "vector_ld1_lane_v1u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1U64, - { { kArgTyPtr, MemEffect::kLoadMemory }, kArgTyV1U64, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_ld1q_lane_u64v2, "vector_ld1q_lane_u64v2", 1, + { kArgTyPtr, kArgTyV1U64, kArgTyI32 }) +DEF_MIR_INTRINSIC(vector_ld1q_lane_v2u64, "vector_ld1q_lane_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - { { kArgTyPtr, MemEffect::kLoadMemory }, kArgTyV2U64, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_ld1_dup_i8v8, "vector_ld1_dup_i8v8", 1, + { kArgTyPtr, kArgTyV2U64, kArgTyI32 }) +DEF_MIR_INTRINSIC(vector_ld1_dup_v8i8, "vector_ld1_dup_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - { { kArgTyPtr, MemEffect::kLoadMemory } }) -DEF_MIR_INTRINSIC(vector_ld1q_dup_i8v16, "vector_ld1q_dup_i8v16", 1, + { kArgTyPtr }) +DEF_MIR_INTRINSIC(vector_ld1q_dup_v16i8, "vector_ld1q_dup_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - { { kArgTyPtr, MemEffect::kLoadMemory } }) -DEF_MIR_INTRINSIC(vector_ld1_dup_i16v4, "vector_ld1_dup_i16v4", 1, + { kArgTyPtr }) +DEF_MIR_INTRINSIC(vector_ld1_dup_v4i16, "vector_ld1_dup_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - { { kArgTyPtr, MemEffect::kLoadMemory } }) -DEF_MIR_INTRINSIC(vector_ld1q_dup_i16v8, "vector_ld1q_dup_i16v8", 1, + { kArgTyPtr }) +DEF_MIR_INTRINSIC(vector_ld1q_dup_v8i16, "vector_ld1q_dup_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - { { kArgTyPtr, MemEffect::kLoadMemory } }) -DEF_MIR_INTRINSIC(vector_ld1_dup_i32v2, "vector_ld1_dup_i32v2", 1, + { kArgTyPtr }) +DEF_MIR_INTRINSIC(vector_ld1_dup_v2i32, "vector_ld1_dup_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - { { kArgTyPtr, MemEffect::kLoadMemory } }) -DEF_MIR_INTRINSIC(vector_ld1q_dup_i32v4, "vector_ld1q_dup_i32v4", 1, + { kArgTyPtr }) +DEF_MIR_INTRINSIC(vector_ld1q_dup_v4i32, "vector_ld1q_dup_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - { { kArgTyPtr, MemEffect::kLoadMemory } }) -DEF_MIR_INTRINSIC(vector_ld1_dup_i64v1, "vector_ld1_dup_i64v1", 1, + { kArgTyPtr }) +DEF_MIR_INTRINSIC(vector_ld1_dup_v1i64, "vector_ld1_dup_v1i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1I64, - { { kArgTyPtr, MemEffect::kLoadMemory } }) -DEF_MIR_INTRINSIC(vector_ld1q_dup_i64v2, "vector_ld1q_dup_i64v2", 1, + { kArgTyPtr }) +DEF_MIR_INTRINSIC(vector_ld1q_dup_v2i64, "vector_ld1q_dup_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - { { kArgTyPtr, MemEffect::kLoadMemory } }) -DEF_MIR_INTRINSIC(vector_ld1_dup_u8v8, "vector_ld1_dup_u8v8", 1, + { kArgTyPtr }) +DEF_MIR_INTRINSIC(vector_ld1_dup_v8u8, "vector_ld1_dup_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - { { kArgTyPtr, MemEffect::kLoadMemory } }) -DEF_MIR_INTRINSIC(vector_ld1q_dup_u8v16, "vector_ld1q_dup_u8v16", 1, + { kArgTyPtr }) +DEF_MIR_INTRINSIC(vector_ld1q_dup_v16u8, "vector_ld1q_dup_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - { { kArgTyPtr, MemEffect::kLoadMemory } }) -DEF_MIR_INTRINSIC(vector_ld1_dup_u16v4, "vector_ld1_dup_u16v4", 1, + { kArgTyPtr }) +DEF_MIR_INTRINSIC(vector_ld1_dup_v4u16, "vector_ld1_dup_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - { { kArgTyPtr, MemEffect::kLoadMemory } }) -DEF_MIR_INTRINSIC(vector_ld1q_dup_u16v8, "vector_ld1q_dup_u16v8", 1, + { kArgTyPtr }) +DEF_MIR_INTRINSIC(vector_ld1q_dup_v8u16, "vector_ld1q_dup_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - { { kArgTyPtr, MemEffect::kLoadMemory } }) -DEF_MIR_INTRINSIC(vector_ld1_dup_u32v2, "vector_ld1_dup_u32v2", 1, + { kArgTyPtr }) +DEF_MIR_INTRINSIC(vector_ld1_dup_v2u32, "vector_ld1_dup_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - { { kArgTyPtr, MemEffect::kLoadMemory } }) -DEF_MIR_INTRINSIC(vector_ld1q_dup_u32v4, "vector_ld1q_dup_u32v4", 1, + { kArgTyPtr }) +DEF_MIR_INTRINSIC(vector_ld1q_dup_v4u32, "vector_ld1q_dup_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - { { kArgTyPtr, MemEffect::kLoadMemory } }) -DEF_MIR_INTRINSIC(vector_ld1_dup_u64v1, "vector_ld1_dup_u64v1", 1, + { kArgTyPtr }) +DEF_MIR_INTRINSIC(vector_ld1_dup_v1u64, "vector_ld1_dup_v1u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1U64, - { { kArgTyPtr, MemEffect::kLoadMemory } }) -DEF_MIR_INTRINSIC(vector_ld1q_dup_u64v2, "vector_ld1q_dup_u64v2", 1, + { kArgTyPtr }) +DEF_MIR_INTRINSIC(vector_ld1q_dup_v2u64, "vector_ld1q_dup_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - { { kArgTyPtr, MemEffect::kLoadMemory } }) -DEF_MIR_INTRINSIC(vector_tbl1_i8v8, "vector_tbl1_i8v8", 1, + { kArgTyPtr }) +DEF_MIR_INTRINSIC(vector_tbl1_v8i8, "vector_tbl1_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, { kArgTyV16I8, kArgTyV8I8 }) -DEF_MIR_INTRINSIC(vector_tbl1_u8v8, "vector_tbl1_u8v8", 1, +DEF_MIR_INTRINSIC(vector_tbl1_v8u8, "vector_tbl1_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, { kArgTyV16U8, kArgTyV8U8 }) -DEF_MIR_INTRINSIC(vector_qtbl1_i8v8, "vector_qtbl1_i8v8", 1, +DEF_MIR_INTRINSIC(vector_qtbl1_v8i8, "vector_qtbl1_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, { kArgTyV16I8, kArgTyV8U8 }) -DEF_MIR_INTRINSIC(vector_qtbl1q_i8v16, "vector_qtbl1q_i8v16", 1, +DEF_MIR_INTRINSIC(vector_qtbl1q_v16i8, "vector_qtbl1q_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, { kArgTyV16I8, kArgTyV16U8 }) -DEF_MIR_INTRINSIC(vector_qtbl1_u8v8, "vector_qtbl1_u8v8", 1, +DEF_MIR_INTRINSIC(vector_qtbl1_v8u8, "vector_qtbl1_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, { kArgTyV16U8, kArgTyV8U8 }) -DEF_MIR_INTRINSIC(vector_qtbl1q_u8v16, "vector_qtbl1q_u8v16", 1, +DEF_MIR_INTRINSIC(vector_qtbl1q_v16u8, "vector_qtbl1q_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, { kArgTyV16U8, kArgTyV16U8 }) -DEF_MIR_INTRINSIC(vector_qtbx1_i8v8, "vector_qtbx1_i8v8", 1, +DEF_MIR_INTRINSIC(vector_qtbx1_v8i8, "vector_qtbx1_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, { kArgTyV8I8, kArgTyV16I8, kArgTyV8U8 }) -DEF_MIR_INTRINSIC(vector_qtbx1q_i8v16, "vector_qtbx1q_i8v16", 1, +DEF_MIR_INTRINSIC(vector_qtbx1q_v16i8, "vector_qtbx1q_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, { kArgTyV16I8, kArgTyV16I8, kArgTyV16U8 }) -DEF_MIR_INTRINSIC(vector_qtbx1_u8v8, "vector_qtbx1_u8v8", 1, +DEF_MIR_INTRINSIC(vector_qtbx1_v8u8, "vector_qtbx1_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, { kArgTyV8U8, kArgTyV16U8, kArgTyV8U8 }) -DEF_MIR_INTRINSIC(vector_qtbx1q_u8v16, "vector_qtbx1q_u8v16", 1, +DEF_MIR_INTRINSIC(vector_qtbx1q_v16u8, "vector_qtbx1q_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, { kArgTyV16U8, kArgTyV16U8, kArgTyV16U8 }) -DEF_MIR_INTRINSIC(vector_hadd_i8v8, "vector_hadd_i8v8", 1, +DEF_MIR_INTRINSIC(vector_hadd_v8i8, "vector_hadd_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, { kArgTyV8I8, kArgTyV8I8 }) -DEF_MIR_INTRINSIC(vector_haddq_i8v16, "vector_haddq_i8v16", 1, +DEF_MIR_INTRINSIC(vector_haddq_v16i8, "vector_haddq_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, { kArgTyV16I8, kArgTyV16I8 }) -DEF_MIR_INTRINSIC(vector_hadd_i16v4, "vector_hadd_i16v4", 1, +DEF_MIR_INTRINSIC(vector_hadd_v4i16, "vector_hadd_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, { kArgTyV4I16, kArgTyV4I16 }) -DEF_MIR_INTRINSIC(vector_haddq_i16v8, "vector_haddq_i16v8", 1, +DEF_MIR_INTRINSIC(vector_haddq_v8i16, "vector_haddq_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, { kArgTyV8I16, kArgTyV8I16 }) -DEF_MIR_INTRINSIC(vector_hadd_i32v2, "vector_hadd_i32v2", 1, +DEF_MIR_INTRINSIC(vector_hadd_v2i32, "vector_hadd_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, { kArgTyV2I32, kArgTyV2I32 }) -DEF_MIR_INTRINSIC(vector_haddq_i32v4, "vector_haddq_i32v4", 1, +DEF_MIR_INTRINSIC(vector_haddq_v4i32, "vector_haddq_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV4I32 }) -DEF_MIR_INTRINSIC(vector_hadd_u8v8, "vector_hadd_u8v8", 1, +DEF_MIR_INTRINSIC(vector_hadd_v8u8, "vector_hadd_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, { kArgTyV8U8, kArgTyV8U8 }) -DEF_MIR_INTRINSIC(vector_haddq_u8v16, "vector_haddq_u8v16", 1, +DEF_MIR_INTRINSIC(vector_haddq_v16u8, "vector_haddq_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, { kArgTyV16U8, kArgTyV16U8 }) -DEF_MIR_INTRINSIC(vector_hadd_u16v4, "vector_hadd_u16v4", 1, +DEF_MIR_INTRINSIC(vector_hadd_v4u16, "vector_hadd_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, { kArgTyV4U16, kArgTyV4U16 }) -DEF_MIR_INTRINSIC(vector_haddq_u16v8, "vector_haddq_u16v8", 1, +DEF_MIR_INTRINSIC(vector_haddq_v8u16, "vector_haddq_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, { kArgTyV8U16, kArgTyV8U16 }) -DEF_MIR_INTRINSIC(vector_hadd_u32v2, "vector_hadd_u32v2", 1, +DEF_MIR_INTRINSIC(vector_hadd_v2u32, "vector_hadd_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, { kArgTyV2U32, kArgTyV2U32 }) -DEF_MIR_INTRINSIC(vector_haddq_u32v4, "vector_haddq_u32v4", 1, +DEF_MIR_INTRINSIC(vector_haddq_v4u32, "vector_haddq_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, { kArgTyV4U32, kArgTyV4U32 }) -DEF_MIR_INTRINSIC(vector_rhadd_i8v8, "vector_rhadd_i8v8", 1, +DEF_MIR_INTRINSIC(vector_rhadd_v8i8, "vector_rhadd_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, { kArgTyV8I8, kArgTyV8I8 }) -DEF_MIR_INTRINSIC(vector_rhaddq_i8v16, "vector_rhaddq_i8v16", 1, +DEF_MIR_INTRINSIC(vector_rhaddq_v16i8, "vector_rhaddq_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, { kArgTyV16I8, kArgTyV16I8 }) -DEF_MIR_INTRINSIC(vector_rhadd_i16v4, "vector_rhadd_i16v4", 1, +DEF_MIR_INTRINSIC(vector_rhadd_v4i16, "vector_rhadd_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, { kArgTyV4I16, kArgTyV4I16 }) -DEF_MIR_INTRINSIC(vector_rhaddq_i16v8, "vector_rhaddq_i16v8", 1, +DEF_MIR_INTRINSIC(vector_rhaddq_v8i16, "vector_rhaddq_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, { kArgTyV8I16, kArgTyV8I16 }) -DEF_MIR_INTRINSIC(vector_rhadd_i32v2, "vector_rhadd_i32v2", 1, +DEF_MIR_INTRINSIC(vector_rhadd_v2i32, "vector_rhadd_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, { kArgTyV2I32, kArgTyV2I32 }) -DEF_MIR_INTRINSIC(vector_rhaddq_i32v4, "vector_rhaddq_i32v4", 1, +DEF_MIR_INTRINSIC(vector_rhaddq_v4i32, "vector_rhaddq_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV4I32 }) -DEF_MIR_INTRINSIC(vector_rhadd_u8v8, "vector_rhadd_u8v8", 1, +DEF_MIR_INTRINSIC(vector_rhadd_v8u8, "vector_rhadd_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, { kArgTyV8U8, kArgTyV8U8 }) -DEF_MIR_INTRINSIC(vector_rhaddq_u8v16, "vector_rhaddq_u8v16", 1, +DEF_MIR_INTRINSIC(vector_rhaddq_v16u8, "vector_rhaddq_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, { kArgTyV16U8, kArgTyV16U8 }) -DEF_MIR_INTRINSIC(vector_rhadd_u16v4, "vector_rhadd_u16v4", 1, +DEF_MIR_INTRINSIC(vector_rhadd_v4u16, "vector_rhadd_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, { kArgTyV4U16, kArgTyV4U16 }) -DEF_MIR_INTRINSIC(vector_rhaddq_u16v8, "vector_rhaddq_u16v8", 1, +DEF_MIR_INTRINSIC(vector_rhaddq_v8u16, "vector_rhaddq_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, { kArgTyV8U16, kArgTyV8U16 }) -DEF_MIR_INTRINSIC(vector_rhadd_u32v2, "vector_rhadd_u32v2", 1, +DEF_MIR_INTRINSIC(vector_rhadd_v2u32, "vector_rhadd_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, { kArgTyV2U32, kArgTyV2U32 }) -DEF_MIR_INTRINSIC(vector_rhaddq_u32v4, "vector_rhaddq_u32v4", 1, +DEF_MIR_INTRINSIC(vector_rhaddq_v4u32, "vector_rhaddq_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, { kArgTyV4U32, kArgTyV4U32 }) -DEF_MIR_INTRINSIC(vector_addhn_i8v8, "vector_addhn_i8v8", 1, +DEF_MIR_INTRINSIC(vector_addhn_v8i8, "vector_addhn_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, { kArgTyV8I16, kArgTyV8I16 }) -DEF_MIR_INTRINSIC(vector_addhn_i16v4, "vector_addhn_i16v4", 1, +DEF_MIR_INTRINSIC(vector_addhn_v4i16, "vector_addhn_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, { kArgTyV4I32, kArgTyV4I32 }) -DEF_MIR_INTRINSIC(vector_addhn_i32v2, "vector_addhn_i32v2", 1, +DEF_MIR_INTRINSIC(vector_addhn_v2i32, "vector_addhn_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, { kArgTyV2I64, kArgTyV2I64 }) -DEF_MIR_INTRINSIC(vector_addhn_u8v8, "vector_addhn_u8v8", 1, +DEF_MIR_INTRINSIC(vector_addhn_v8u8, "vector_addhn_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, { kArgTyV8U16, kArgTyV8U16 }) -DEF_MIR_INTRINSIC(vector_addhn_u16v4, "vector_addhn_u16v4", 1, +DEF_MIR_INTRINSIC(vector_addhn_v4u16, "vector_addhn_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, { kArgTyV4U32, kArgTyV4U32 }) -DEF_MIR_INTRINSIC(vector_addhn_u32v2, "vector_addhn_u32v2", 1, +DEF_MIR_INTRINSIC(vector_addhn_v2u32, "vector_addhn_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, { kArgTyV2U64, kArgTyV2U64 }) -DEF_MIR_INTRINSIC(vector_addhn_high_i8v16, "vector_addhn_high_i8v16", 1, +DEF_MIR_INTRINSIC(vector_addhn_high_v16i8, "vector_addhn_high_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, { kArgTyV8I8, kArgTyV8I16, kArgTyV8I16 }) -DEF_MIR_INTRINSIC(vector_addhn_high_i16v8, "vector_addhn_high_i16v8", 1, +DEF_MIR_INTRINSIC(vector_addhn_high_v8i16, "vector_addhn_high_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, { kArgTyV4I16, kArgTyV4I32, kArgTyV4I32 }) -DEF_MIR_INTRINSIC(vector_addhn_high_i32v4, "vector_addhn_high_i32v4", 1, +DEF_MIR_INTRINSIC(vector_addhn_high_v4i32, "vector_addhn_high_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV2I32, kArgTyV2I64, kArgTyV2I64 }) -DEF_MIR_INTRINSIC(vector_addhn_high_u8v16, "vector_addhn_high_u8v16", 1, +DEF_MIR_INTRINSIC(vector_addhn_high_v16u8, "vector_addhn_high_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, { kArgTyV8U8, kArgTyV8U16, kArgTyV8U16 }) -DEF_MIR_INTRINSIC(vector_addhn_high_u16v8, "vector_addhn_high_u16v8", 1, +DEF_MIR_INTRINSIC(vector_addhn_high_v8u16, "vector_addhn_high_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, { kArgTyV4U16, kArgTyV4U32, kArgTyV4U32 }) -DEF_MIR_INTRINSIC(vector_addhn_high_u32v4, "vector_addhn_high_u32v4", 1, +DEF_MIR_INTRINSIC(vector_addhn_high_v4u32, "vector_addhn_high_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, { kArgTyV2U32, kArgTyV2U64, kArgTyV2U64 }) -DEF_MIR_INTRINSIC(vector_raddhn_i8v8, "vector_raddhn_i8v8", 1, +DEF_MIR_INTRINSIC(vector_raddhn_v8i8, "vector_raddhn_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, { kArgTyV8I16, kArgTyV8I16 }) -DEF_MIR_INTRINSIC(vector_raddhn_i16v4, "vector_raddhn_i16v4", 1, +DEF_MIR_INTRINSIC(vector_raddhn_v4i16, "vector_raddhn_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, { kArgTyV4I32, kArgTyV4I32 }) -DEF_MIR_INTRINSIC(vector_raddhn_i32v2, "vector_raddhn_i32v2", 1, +DEF_MIR_INTRINSIC(vector_raddhn_v2i32, "vector_raddhn_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, { kArgTyV2I64, kArgTyV2I64 }) -DEF_MIR_INTRINSIC(vector_raddhn_u8v8, "vector_raddhn_u8v8", 1, +DEF_MIR_INTRINSIC(vector_raddhn_v8u8, "vector_raddhn_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, { kArgTyV8U16, kArgTyV8U16 }) -DEF_MIR_INTRINSIC(vector_raddhn_u16v4, "vector_raddhn_u16v4", 1, +DEF_MIR_INTRINSIC(vector_raddhn_v4u16, "vector_raddhn_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, { kArgTyV4U32, kArgTyV4U32 }) -DEF_MIR_INTRINSIC(vector_raddhn_u32v2, "vector_raddhn_u32v2", 1, +DEF_MIR_INTRINSIC(vector_raddhn_v2u32, "vector_raddhn_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, { kArgTyV2U64, kArgTyV2U64 }) -DEF_MIR_INTRINSIC(vector_raddhn_high_i8v16, "vector_raddhn_high_i8v16", 1, +DEF_MIR_INTRINSIC(vector_raddhn_high_v16i8, "vector_raddhn_high_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, { kArgTyV8I8, kArgTyV8I16, kArgTyV8I16 }) -DEF_MIR_INTRINSIC(vector_raddhn_high_i16v8, "vector_raddhn_high_i16v8", 1, +DEF_MIR_INTRINSIC(vector_raddhn_high_v8i16, "vector_raddhn_high_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, { kArgTyV4I16, kArgTyV4I32, kArgTyV4I32 }) -DEF_MIR_INTRINSIC(vector_raddhn_high_i32v4, "vector_raddhn_high_i32v4", 1, +DEF_MIR_INTRINSIC(vector_raddhn_high_v4i32, "vector_raddhn_high_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV2I32, kArgTyV2I64, kArgTyV2I64 }) -DEF_MIR_INTRINSIC(vector_raddhn_high_u8v16, "vector_raddhn_high_u8v16", 1, +DEF_MIR_INTRINSIC(vector_raddhn_high_v16u8, "vector_raddhn_high_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, { kArgTyV8U8, kArgTyV8U16, kArgTyV8U16 }) -DEF_MIR_INTRINSIC(vector_raddhn_high_u16v8, "vector_raddhn_high_u16v8", 1, +DEF_MIR_INTRINSIC(vector_raddhn_high_v8u16, "vector_raddhn_high_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, { kArgTyV4U16, kArgTyV4U32, kArgTyV4U32 }) -DEF_MIR_INTRINSIC(vector_raddhn_high_u32v4, "vector_raddhn_high_u32v4", 1, +DEF_MIR_INTRINSIC(vector_raddhn_high_v4u32, "vector_raddhn_high_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, { kArgTyV2U32, kArgTyV2U64, kArgTyV2U64 }) -DEF_MIR_INTRINSIC(vector_qadd_i8v8, "vector_qadd_i8v8", 1, +DEF_MIR_INTRINSIC(vector_qadd_v8i8, "vector_qadd_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, { kArgTyV8I8, kArgTyV8I8 }) -DEF_MIR_INTRINSIC(vector_qaddq_i8v16, "vector_qaddq_i8v16", 1, +DEF_MIR_INTRINSIC(vector_qaddq_v16i8, "vector_qaddq_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, { kArgTyV16I8, kArgTyV16I8 }) -DEF_MIR_INTRINSIC(vector_qadd_i16v4, "vector_qadd_i16v4", 1, +DEF_MIR_INTRINSIC(vector_qadd_v4i16, "vector_qadd_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, { kArgTyV4I16, kArgTyV4I16 }) -DEF_MIR_INTRINSIC(vector_qaddq_i16v8, "vector_qaddq_i16v8", 1, +DEF_MIR_INTRINSIC(vector_qaddq_v8i16, "vector_qaddq_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, { kArgTyV8I16, kArgTyV8I16 }) -DEF_MIR_INTRINSIC(vector_qadd_i32v2, "vector_qadd_i32v2", 1, +DEF_MIR_INTRINSIC(vector_qadd_v2i32, "vector_qadd_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, { kArgTyV2I32, kArgTyV2I32 }) -DEF_MIR_INTRINSIC(vector_qaddq_i32v4, "vector_qaddq_i32v4", 1, +DEF_MIR_INTRINSIC(vector_qaddq_v4i32, "vector_qaddq_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV4I32 }) -DEF_MIR_INTRINSIC(vector_qadd_i64v1, "vector_qadd_i64v1", 1, +DEF_MIR_INTRINSIC(vector_qadd_v1i64, "vector_qadd_v1i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1I64, { kArgTyV1I64, kArgTyV1I64 }) -DEF_MIR_INTRINSIC(vector_qaddq_i64v2, "vector_qaddq_i64v2", 1, +DEF_MIR_INTRINSIC(vector_qaddq_v2i64, "vector_qaddq_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV2I64, kArgTyV2I64 }) -DEF_MIR_INTRINSIC(vector_qadd_u8v8, "vector_qadd_u8v8", 1, +DEF_MIR_INTRINSIC(vector_qadd_v8u8, "vector_qadd_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, { kArgTyV8U8, kArgTyV8U8 }) -DEF_MIR_INTRINSIC(vector_qaddq_u8v16, "vector_qaddq_u8v16", 1, +DEF_MIR_INTRINSIC(vector_qaddq_v16u8, "vector_qaddq_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, { kArgTyV16U8, kArgTyV16U8 }) -DEF_MIR_INTRINSIC(vector_qadd_u16v4, "vector_qadd_u16v4", 1, +DEF_MIR_INTRINSIC(vector_qadd_v4u16, "vector_qadd_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, { kArgTyV4U16, kArgTyV4U16 }) -DEF_MIR_INTRINSIC(vector_qaddq_u16v8, "vector_qaddq_u16v8", 1, +DEF_MIR_INTRINSIC(vector_qaddq_v8u16, "vector_qaddq_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, { kArgTyV8U16, kArgTyV8U16 }) -DEF_MIR_INTRINSIC(vector_qadd_u32v2, "vector_qadd_u32v2", 1, +DEF_MIR_INTRINSIC(vector_qadd_v2u32, "vector_qadd_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, { kArgTyV2U32, kArgTyV2U32 }) -DEF_MIR_INTRINSIC(vector_qaddq_u32v4, "vector_qaddq_u32v4", 1, +DEF_MIR_INTRINSIC(vector_qaddq_v4u32, "vector_qaddq_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, { kArgTyV4U32, kArgTyV4U32 }) -DEF_MIR_INTRINSIC(vector_qadd_u64v1, "vector_qadd_u64v1", 1, +DEF_MIR_INTRINSIC(vector_qadd_v1u64, "vector_qadd_v1u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1U64, { kArgTyV1U64, kArgTyV1U64 }) -DEF_MIR_INTRINSIC(vector_qaddq_u64v2, "vector_qaddq_u64v2", 1, +DEF_MIR_INTRINSIC(vector_qaddq_v2u64, "vector_qaddq_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, { kArgTyV2U64, kArgTyV2U64 }) -DEF_MIR_INTRINSIC(vector_uqadd_i8v8, "vector_uqadd_i8v8", 1, +DEF_MIR_INTRINSIC(vector_uqadd_v8i8, "vector_uqadd_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, { kArgTyV8I8, kArgTyV8U8 }) -DEF_MIR_INTRINSIC(vector_uqaddq_i8v16, "vector_uqaddq_i8v16", 1, +DEF_MIR_INTRINSIC(vector_uqaddq_v16i8, "vector_uqaddq_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, { kArgTyV16I8, kArgTyV16U8 }) -DEF_MIR_INTRINSIC(vector_uqadd_i16v4, "vector_uqadd_i16v4", 1, +DEF_MIR_INTRINSIC(vector_uqadd_v4i16, "vector_uqadd_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, { kArgTyV4I16, kArgTyV4U16 }) -DEF_MIR_INTRINSIC(vector_uqaddq_i16v8, "vector_uqaddq_i16v8", 1, +DEF_MIR_INTRINSIC(vector_uqaddq_v8i16, "vector_uqaddq_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, { kArgTyV8I16, kArgTyV8U16 }) -DEF_MIR_INTRINSIC(vector_uqadd_i32v2, "vector_uqadd_i32v2", 1, +DEF_MIR_INTRINSIC(vector_uqadd_v2i32, "vector_uqadd_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, { kArgTyV2I32, kArgTyV2U32 }) -DEF_MIR_INTRINSIC(vector_uqaddq_i32v4, "vector_uqaddq_i32v4", 1, +DEF_MIR_INTRINSIC(vector_uqaddq_v4i32, "vector_uqaddq_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV4U32 }) -DEF_MIR_INTRINSIC(vector_uqadd_i64v1, "vector_uqadd_i64v1", 1, +DEF_MIR_INTRINSIC(vector_uqadd_v1i64, "vector_uqadd_v1i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1I64, { kArgTyV1I64, kArgTyV1U64 }) -DEF_MIR_INTRINSIC(vector_uqaddq_i64v2, "vector_uqaddq_i64v2", 1, +DEF_MIR_INTRINSIC(vector_uqaddq_v2i64, "vector_uqaddq_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV2I64, kArgTyV2U64 }) -DEF_MIR_INTRINSIC(vector_sqadd_u8v8, "vector_sqadd_u8v8", 1, +DEF_MIR_INTRINSIC(vector_sqadd_v8u8, "vector_sqadd_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, { kArgTyV8U8, kArgTyV8I8 }) -DEF_MIR_INTRINSIC(vector_sqaddq_u8v16, "vector_sqaddq_u8v16", 1, +DEF_MIR_INTRINSIC(vector_sqaddq_v16u8, "vector_sqaddq_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, { kArgTyV16U8, kArgTyV16I8 }) -DEF_MIR_INTRINSIC(vector_sqadd_u16v4, "vector_sqadd_u16v4", 1, +DEF_MIR_INTRINSIC(vector_sqadd_v4u16, "vector_sqadd_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, { kArgTyV4U16, kArgTyV4I16 }) -DEF_MIR_INTRINSIC(vector_sqaddq_u16v8, "vector_sqaddq_u16v8", 1, +DEF_MIR_INTRINSIC(vector_sqaddq_v8u16, "vector_sqaddq_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, { kArgTyV8U16, kArgTyV8I16 }) -DEF_MIR_INTRINSIC(vector_sqadd_u32v2, "vector_sqadd_u32v2", 1, +DEF_MIR_INTRINSIC(vector_sqadd_v2u32, "vector_sqadd_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, { kArgTyV2U32, kArgTyV2I32 }) -DEF_MIR_INTRINSIC(vector_sqaddq_u32v4, "vector_sqaddq_u32v4", 1, +DEF_MIR_INTRINSIC(vector_sqaddq_v4u32, "vector_sqaddq_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, { kArgTyV4U32, kArgTyV4I32 }) -DEF_MIR_INTRINSIC(vector_sqadd_u64v1, "vector_sqadd_u64v1", 1, +DEF_MIR_INTRINSIC(vector_sqadd_v1u64, "vector_sqadd_v1u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1U64, { kArgTyV1U64, kArgTyV1I64 }) -DEF_MIR_INTRINSIC(vector_sqaddq_u64v2, "vector_sqaddq_u64v2", 1, +DEF_MIR_INTRINSIC(vector_sqaddq_v2u64, "vector_sqaddq_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, { kArgTyV2U64, kArgTyV2I64 }) -DEF_MIR_INTRINSIC(vector_mla_i8v8, "vector_mla_i8v8", 1, +DEF_MIR_INTRINSIC(vector_mla_v8i8, "vector_mla_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, { kArgTyV8I8, kArgTyV8I8, kArgTyV8I8 }) -DEF_MIR_INTRINSIC(vector_mlaq_i8v16, "vector_mlaq_i8v16", 1, +DEF_MIR_INTRINSIC(vector_mlaq_v16i8, "vector_mlaq_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, { kArgTyV16I8, kArgTyV16I8, kArgTyV16I8 }) -DEF_MIR_INTRINSIC(vector_mla_i16v4, "vector_mla_i16v4", 1, +DEF_MIR_INTRINSIC(vector_mla_v4i16, "vector_mla_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, { kArgTyV4I16, kArgTyV4I16, kArgTyV4I16 }) -DEF_MIR_INTRINSIC(vector_mlaq_i16v8, "vector_mlaq_i16v8", 1, +DEF_MIR_INTRINSIC(vector_mlaq_v8i16, "vector_mlaq_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, { kArgTyV8I16, kArgTyV8I16, kArgTyV8I16 }) -DEF_MIR_INTRINSIC(vector_mla_i32v2, "vector_mla_i32v2", 1, +DEF_MIR_INTRINSIC(vector_mla_v2i32, "vector_mla_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, { kArgTyV2I32, kArgTyV2I32, kArgTyV2I32 }) -DEF_MIR_INTRINSIC(vector_mlaq_i32v4, "vector_mlaq_i32v4", 1, +DEF_MIR_INTRINSIC(vector_mlaq_v4i32, "vector_mlaq_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV4I32, kArgTyV4I32 }) -DEF_MIR_INTRINSIC(vector_mla_u8v8, "vector_mla_u8v8", 1, +DEF_MIR_INTRINSIC(vector_mla_v8u8, "vector_mla_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, { kArgTyV8U8, kArgTyV8U8, kArgTyV8U8 }) -DEF_MIR_INTRINSIC(vector_mlaq_u8v16, "vector_mlaq_u8v16", 1, +DEF_MIR_INTRINSIC(vector_mlaq_v16u8, "vector_mlaq_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, { kArgTyV16U8, kArgTyV16U8, kArgTyV16U8 }) -DEF_MIR_INTRINSIC(vector_mla_u16v4, "vector_mla_u16v4", 1, +DEF_MIR_INTRINSIC(vector_mla_v4u16, "vector_mla_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, { kArgTyV4U16, kArgTyV4U16, kArgTyV4U16 }) -DEF_MIR_INTRINSIC(vector_mlaq_u16v8, "vector_mlaq_u16v8", 1, +DEF_MIR_INTRINSIC(vector_mlaq_v8u16, "vector_mlaq_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, { kArgTyV8U16, kArgTyV8U16, kArgTyV8U16 }) -DEF_MIR_INTRINSIC(vector_mla_u32v2, "vector_mla_u32v2", 1, +DEF_MIR_INTRINSIC(vector_mla_v2u32, "vector_mla_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, { kArgTyV2U32, kArgTyV2U32, kArgTyV2U32 }) -DEF_MIR_INTRINSIC(vector_mlaq_u32v4, "vector_mlaq_u32v4", 1, +DEF_MIR_INTRINSIC(vector_mlaq_v4u32, "vector_mlaq_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, { kArgTyV4U32, kArgTyV4U32, kArgTyV4U32 }) -DEF_MIR_INTRINSIC(vector_mls_i8v8, "vector_mls_i8v8", 1, +DEF_MIR_INTRINSIC(vector_mls_v8i8, "vector_mls_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, { kArgTyV8I8, kArgTyV8I8, kArgTyV8I8 }) -DEF_MIR_INTRINSIC(vector_mlsq_i8v16, "vector_mlsq_i8v16", 1, +DEF_MIR_INTRINSIC(vector_mlsq_v16i8, "vector_mlsq_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, { kArgTyV16I8, kArgTyV16I8, kArgTyV16I8 }) -DEF_MIR_INTRINSIC(vector_mls_i16v4, "vector_mls_i16v4", 1, +DEF_MIR_INTRINSIC(vector_mls_v4i16, "vector_mls_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, { kArgTyV4I16, kArgTyV4I16, kArgTyV4I16 }) -DEF_MIR_INTRINSIC(vector_mlsq_i16v8, "vector_mlsq_i16v8", 1, +DEF_MIR_INTRINSIC(vector_mlsq_v8i16, "vector_mlsq_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, { kArgTyV8I16, kArgTyV8I16, kArgTyV8I16 }) -DEF_MIR_INTRINSIC(vector_mls_i32v2, "vector_mls_i32v2", 1, +DEF_MIR_INTRINSIC(vector_mls_v2i32, "vector_mls_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, { kArgTyV2I32, kArgTyV2I32, kArgTyV2I32 }) -DEF_MIR_INTRINSIC(vector_mlsq_i32v4, "vector_mlsq_i32v4", 1, +DEF_MIR_INTRINSIC(vector_mlsq_v4i32, "vector_mlsq_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV4I32, kArgTyV4I32 }) -DEF_MIR_INTRINSIC(vector_mls_u8v8, "vector_mls_u8v8", 1, +DEF_MIR_INTRINSIC(vector_mls_v8u8, "vector_mls_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, { kArgTyV8U8, kArgTyV8U8, kArgTyV8U8 }) -DEF_MIR_INTRINSIC(vector_mlsq_u8v16, "vector_mlsq_u8v16", 1, +DEF_MIR_INTRINSIC(vector_mlsq_v16u8, "vector_mlsq_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, { kArgTyV16U8, kArgTyV16U8, kArgTyV16U8 }) -DEF_MIR_INTRINSIC(vector_mls_u16v4, "vector_mls_u16v4", 1, +DEF_MIR_INTRINSIC(vector_mls_v4u16, "vector_mls_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, { kArgTyV4U16, kArgTyV4U16, kArgTyV4U16 }) -DEF_MIR_INTRINSIC(vector_mlsq_u16v8, "vector_mlsq_u16v8", 1, +DEF_MIR_INTRINSIC(vector_mlsq_v8u16, "vector_mlsq_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, { kArgTyV8U16, kArgTyV8U16, kArgTyV8U16 }) -DEF_MIR_INTRINSIC(vector_mls_u32v2, "vector_mls_u32v2", 1, +DEF_MIR_INTRINSIC(vector_mls_v2u32, "vector_mls_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, { kArgTyV2U32, kArgTyV2U32, kArgTyV2U32 }) -DEF_MIR_INTRINSIC(vector_mlsq_u32v4, "vector_mlsq_u32v4", 1, +DEF_MIR_INTRINSIC(vector_mlsq_v4u32, "vector_mlsq_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, { kArgTyV4U32, kArgTyV4U32, kArgTyV4U32 }) -DEF_MIR_INTRINSIC(vector_mlal_i16v8, "vector_mlal_i16v8", 1, +DEF_MIR_INTRINSIC(vector_mlal_v8i16, "vector_mlal_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, { kArgTyV8I16, kArgTyV8I8, kArgTyV8I8 }) -DEF_MIR_INTRINSIC(vector_mlal_i32v4, "vector_mlal_i32v4", 1, +DEF_MIR_INTRINSIC(vector_mlal_v4i32, "vector_mlal_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV4I16, kArgTyV4I16 }) -DEF_MIR_INTRINSIC(vector_mlal_i64v2, "vector_mlal_i64v2", 1, +DEF_MIR_INTRINSIC(vector_mlal_v2i64, "vector_mlal_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV2I64, kArgTyV2I32, kArgTyV2I32 }) -DEF_MIR_INTRINSIC(vector_mlal_u16v8, "vector_mlal_u16v8", 1, +DEF_MIR_INTRINSIC(vector_mlal_v8u16, "vector_mlal_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, { kArgTyV8U16, kArgTyV8U8, kArgTyV8U8 }) -DEF_MIR_INTRINSIC(vector_mlal_u32v4, "vector_mlal_u32v4", 1, +DEF_MIR_INTRINSIC(vector_mlal_v4u32, "vector_mlal_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, { kArgTyV4U32, kArgTyV4U16, kArgTyV4U16 }) -DEF_MIR_INTRINSIC(vector_mlal_u64v2, "vector_mlal_u64v2", 1, +DEF_MIR_INTRINSIC(vector_mlal_v2u64, "vector_mlal_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, { kArgTyV2U64, kArgTyV2U32, kArgTyV2U32 }) -DEF_MIR_INTRINSIC(vector_mlal_high_i16v8, "vector_mlal_high_i16v8", 1, +DEF_MIR_INTRINSIC(vector_mlal_high_v8i16, "vector_mlal_high_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, { kArgTyV8I16, kArgTyV16I8, kArgTyV16I8 }) -DEF_MIR_INTRINSIC(vector_mlal_high_i32v4, "vector_mlal_high_i32v4", 1, +DEF_MIR_INTRINSIC(vector_mlal_high_v4i32, "vector_mlal_high_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV8I16, kArgTyV8I16 }) -DEF_MIR_INTRINSIC(vector_mlal_high_i64v2, "vector_mlal_high_i64v2", 1, +DEF_MIR_INTRINSIC(vector_mlal_high_v2i64, "vector_mlal_high_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV2I64, kArgTyV4I32, kArgTyV4I32 }) -DEF_MIR_INTRINSIC(vector_mlal_high_u16v8, "vector_mlal_high_u16v8", 1, +DEF_MIR_INTRINSIC(vector_mlal_high_v8u16, "vector_mlal_high_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, { kArgTyV8U16, kArgTyV16U8, kArgTyV16U8 }) -DEF_MIR_INTRINSIC(vector_mlal_high_u32v4, "vector_mlal_high_u32v4", 1, +DEF_MIR_INTRINSIC(vector_mlal_high_v4u32, "vector_mlal_high_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, { kArgTyV4U32, kArgTyV8U16, kArgTyV8U16 }) -DEF_MIR_INTRINSIC(vector_mlal_high_u64v2, "vector_mlal_high_u64v2", 1, +DEF_MIR_INTRINSIC(vector_mlal_high_v2u64, "vector_mlal_high_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, { kArgTyV2U64, kArgTyV4U32, kArgTyV4U32 }) -DEF_MIR_INTRINSIC(vector_mlsl_i16v8, "vector_mlsl_i16v8", 1, +DEF_MIR_INTRINSIC(vector_mlsl_v8i16, "vector_mlsl_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, { kArgTyV8I16, kArgTyV8I8, kArgTyV8I8 }) -DEF_MIR_INTRINSIC(vector_mlsl_i32v4, "vector_mlsl_i32v4", 1, +DEF_MIR_INTRINSIC(vector_mlsl_v4i32, "vector_mlsl_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV4I16, kArgTyV4I16 }) -DEF_MIR_INTRINSIC(vector_mlsl_i64v2, "vector_mlsl_i64v2", 1, +DEF_MIR_INTRINSIC(vector_mlsl_v2i64, "vector_mlsl_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV2I64, kArgTyV2I32, kArgTyV2I32 }) -DEF_MIR_INTRINSIC(vector_mlsl_u16v8, "vector_mlsl_u16v8", 1, +DEF_MIR_INTRINSIC(vector_mlsl_v8u16, "vector_mlsl_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, { kArgTyV8U16, kArgTyV8U8, kArgTyV8U8 }) -DEF_MIR_INTRINSIC(vector_mlsl_u32v4, "vector_mlsl_u32v4", 1, +DEF_MIR_INTRINSIC(vector_mlsl_v4u32, "vector_mlsl_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, { kArgTyV4U32, kArgTyV4U16, kArgTyV4U16 }) -DEF_MIR_INTRINSIC(vector_mlsl_u64v2, "vector_mlsl_u64v2", 1, +DEF_MIR_INTRINSIC(vector_mlsl_v2u64, "vector_mlsl_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, { kArgTyV2U64, kArgTyV2U32, kArgTyV2U32 }) -DEF_MIR_INTRINSIC(vector_mlsl_high_i16v8, "vector_mlsl_high_i16v8", 1, +DEF_MIR_INTRINSIC(vector_mlsl_high_v8i16, "vector_mlsl_high_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, { kArgTyV8I16, kArgTyV16I8, kArgTyV16I8 }) -DEF_MIR_INTRINSIC(vector_mlsl_high_i32v4, "vector_mlsl_high_i32v4", 1, +DEF_MIR_INTRINSIC(vector_mlsl_high_v4i32, "vector_mlsl_high_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV8I16, kArgTyV8I16 }) -DEF_MIR_INTRINSIC(vector_mlsl_high_i64v2, "vector_mlsl_high_i64v2", 1, +DEF_MIR_INTRINSIC(vector_mlsl_high_v2i64, "vector_mlsl_high_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV2I64, kArgTyV4I32, kArgTyV4I32 }) -DEF_MIR_INTRINSIC(vector_mlsl_high_u16v8, "vector_mlsl_high_u16v8", 1, +DEF_MIR_INTRINSIC(vector_mlsl_high_v8u16, "vector_mlsl_high_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, { kArgTyV8U16, kArgTyV16U8, kArgTyV16U8 }) -DEF_MIR_INTRINSIC(vector_mlsl_high_u32v4, "vector_mlsl_high_u32v4", 1, +DEF_MIR_INTRINSIC(vector_mlsl_high_v4u32, "vector_mlsl_high_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, { kArgTyV4U32, kArgTyV8U16, kArgTyV8U16 }) -DEF_MIR_INTRINSIC(vector_mlsl_high_u64v2, "vector_mlsl_high_u64v2", 1, +DEF_MIR_INTRINSIC(vector_mlsl_high_v2u64, "vector_mlsl_high_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, { kArgTyV2U64, kArgTyV4U32, kArgTyV4U32 }) -DEF_MIR_INTRINSIC(vector_qdmulh_i16v4, "vector_qdmulh_i16v4", 1, +DEF_MIR_INTRINSIC(vector_qdmulh_v4i16, "vector_qdmulh_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, { kArgTyV4I16, kArgTyV4I16 }) -DEF_MIR_INTRINSIC(vector_qdmulhq_i16v8, "vector_qdmulhq_i16v8", 1, +DEF_MIR_INTRINSIC(vector_qdmulhq_v8i16, "vector_qdmulhq_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, { kArgTyV8I16, kArgTyV8I16 }) -DEF_MIR_INTRINSIC(vector_qdmulh_i32v2, "vector_qdmulh_i32v2", 1, +DEF_MIR_INTRINSIC(vector_qdmulh_v2i32, "vector_qdmulh_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, { kArgTyV2I32, kArgTyV2I32 }) -DEF_MIR_INTRINSIC(vector_qdmulhq_i32v4, "vector_qdmulhq_i32v4", 1, +DEF_MIR_INTRINSIC(vector_qdmulhq_v4i32, "vector_qdmulhq_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV4I32 }) -DEF_MIR_INTRINSIC(vector_qrdmulh_i16v4, "vector_qrdmulh_i16v4", 1, +DEF_MIR_INTRINSIC(vector_qrdmulh_v4i16, "vector_qrdmulh_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, { kArgTyV4I16, kArgTyV4I16 }) -DEF_MIR_INTRINSIC(vector_qrdmulhq_i16v8, "vector_qrdmulhq_i16v8", 1, +DEF_MIR_INTRINSIC(vector_qrdmulhq_v8i16, "vector_qrdmulhq_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, { kArgTyV8I16, kArgTyV8I16 }) -DEF_MIR_INTRINSIC(vector_qrdmulh_i32v2, "vector_qrdmulh_i32v2", 1, +DEF_MIR_INTRINSIC(vector_qrdmulh_v2i32, "vector_qrdmulh_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, { kArgTyV2I32, kArgTyV2I32 }) -DEF_MIR_INTRINSIC(vector_qrdmulhq_i32v4, "vector_qrdmulhq_i32v4", 1, +DEF_MIR_INTRINSIC(vector_qrdmulhq_v4i32, "vector_qrdmulhq_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV4I32 }) -DEF_MIR_INTRINSIC(vector_qdmull_i32v4, "vector_qdmull_i32v4", 1, +DEF_MIR_INTRINSIC(vector_qdmull_v4i32, "vector_qdmull_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I16, kArgTyV4I16 }) -DEF_MIR_INTRINSIC(vector_qdmull_i64v2, "vector_qdmull_i64v2", 1, +DEF_MIR_INTRINSIC(vector_qdmull_v2i64, "vector_qdmull_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV2I32, kArgTyV2I32 }) -DEF_MIR_INTRINSIC(vector_qdmull_high_i32v4, "vector_qdmull_high_i32v4", 1, +DEF_MIR_INTRINSIC(vector_qdmull_high_v4i32, "vector_qdmull_high_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV8I16, kArgTyV8I16 }) -DEF_MIR_INTRINSIC(vector_qdmull_high_i64v2, "vector_qdmull_high_i64v2", 1, +DEF_MIR_INTRINSIC(vector_qdmull_high_v2i64, "vector_qdmull_high_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV4I32, kArgTyV4I32 }) -DEF_MIR_INTRINSIC(vector_qdmlal_i32v4, "vector_qdmlal_i32v4", 1, +DEF_MIR_INTRINSIC(vector_qdmlal_v4i32, "vector_qdmlal_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV4I16, kArgTyV4I16 }) -DEF_MIR_INTRINSIC(vector_qdmlal_i64v2, "vector_qdmlal_i64v2", 1, +DEF_MIR_INTRINSIC(vector_qdmlal_v2i64, "vector_qdmlal_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV2I64, kArgTyV2I32, kArgTyV2I32 }) -DEF_MIR_INTRINSIC(vector_qdmlal_high_i32v4, "vector_qdmlal_high_i32v4", 1, +DEF_MIR_INTRINSIC(vector_qdmlal_high_v4i32, "vector_qdmlal_high_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV8I16, kArgTyV8I16 }) -DEF_MIR_INTRINSIC(vector_qdmlal_high_i64v2, "vector_qdmlal_high_i64v2", 1, +DEF_MIR_INTRINSIC(vector_qdmlal_high_v2i64, "vector_qdmlal_high_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV2I64, kArgTyV4I32, kArgTyV4I32 }) -DEF_MIR_INTRINSIC(vector_qdmlsl_i32v4, "vector_qdmlsl_i32v4", 1, +DEF_MIR_INTRINSIC(vector_qdmlsl_v4i32, "vector_qdmlsl_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV4I16, kArgTyV4I16 }) -DEF_MIR_INTRINSIC(vector_qdmlsl_i64v2, "vector_qdmlsl_i64v2", 1, +DEF_MIR_INTRINSIC(vector_qdmlsl_v2i64, "vector_qdmlsl_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV2I64, kArgTyV2I32, kArgTyV2I32 }) -DEF_MIR_INTRINSIC(vector_qdmlsl_high_i32v4, "vector_qdmlsl_high_i32v4", 1, +DEF_MIR_INTRINSIC(vector_qdmlsl_high_v4i32, "vector_qdmlsl_high_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV8I16, kArgTyV8I16 }) -DEF_MIR_INTRINSIC(vector_qdmlsl_high_i64v2, "vector_qdmlsl_high_i64v2", 1, +DEF_MIR_INTRINSIC(vector_qdmlsl_high_v2i64, "vector_qdmlsl_high_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV2I64, kArgTyV4I32, kArgTyV4I32 }) -DEF_MIR_INTRINSIC(vector_qdmlal_lane_i32v4, "vector_qdmlal_lane_i32v4", 1, +DEF_MIR_INTRINSIC(vector_qdmlal_lane_v4i32, "vector_qdmlal_lane_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV4I16, kArgTyV4I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qdmlal_lane_i64v2, "vector_qdmlal_lane_i64v2", 1, +DEF_MIR_INTRINSIC(vector_qdmlal_lane_v2i64, "vector_qdmlal_lane_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV2I64, kArgTyV2I32, kArgTyV2I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qdmlal_high_lane_i32v4, "vector_qdmlal_high_lane_i32v4", 1, +DEF_MIR_INTRINSIC(vector_qdmlal_high_lane_v4i32, "vector_qdmlal_high_lane_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV8I16, kArgTyV4I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qdmlal_high_lane_i64v2, "vector_qdmlal_high_lane_i64v2", 1, +DEF_MIR_INTRINSIC(vector_qdmlal_high_lane_v2i64, "vector_qdmlal_high_lane_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV2I64, kArgTyV4I32, kArgTyV2I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qdmlal_laneq_i32v4, "vector_qdmlal_laneq_i32v4", 1, +DEF_MIR_INTRINSIC(vector_qdmlal_laneq_v4i32, "vector_qdmlal_laneq_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV4I16, kArgTyV8I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qdmlal_laneq_i64v2, "vector_qdmlal_laneq_i64v2", 1, +DEF_MIR_INTRINSIC(vector_qdmlal_laneq_v2i64, "vector_qdmlal_laneq_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV2I64, kArgTyV2I32, kArgTyV4I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qdmlal_high_laneq_i32v4, "vector_qdmlal_high_laneq_i32v4", 1, +DEF_MIR_INTRINSIC(vector_qdmlal_high_laneq_v4i32, "vector_qdmlal_high_laneq_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV8I16, kArgTyV8I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qdmlal_high_laneq_i64v2, "vector_qdmlal_high_laneq_i64v2", 1, +DEF_MIR_INTRINSIC(vector_qdmlal_high_laneq_v2i64, "vector_qdmlal_high_laneq_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV2I64, kArgTyV4I32, kArgTyV4I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qdmlsl_lane_i32v4, "vector_qdmlsl_lane_i32v4", 1, +DEF_MIR_INTRINSIC(vector_qdmlsl_lane_v4i32, "vector_qdmlsl_lane_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV4I16, kArgTyV4I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qdmlsl_lane_i64v2, "vector_qdmlsl_lane_i64v2", 1, +DEF_MIR_INTRINSIC(vector_qdmlsl_lane_v2i64, "vector_qdmlsl_lane_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV2I64, kArgTyV2I32, kArgTyV2I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qdmlsl_high_lane_i32v4, "vector_qdmlsl_high_lane_i32v4", 1, +DEF_MIR_INTRINSIC(vector_qdmlsl_high_lane_v4i32, "vector_qdmlsl_high_lane_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV8I16, kArgTyV4I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qdmlsl_high_lane_i64v2, "vector_qdmlsl_high_lane_i64v2", 1, +DEF_MIR_INTRINSIC(vector_qdmlsl_high_lane_v2i64, "vector_qdmlsl_high_lane_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV2I64, kArgTyV4I32, kArgTyV2I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qdmlsl_laneq_i32v4, "vector_qdmlsl_laneq_i32v4", 1, +DEF_MIR_INTRINSIC(vector_qdmlsl_laneq_v4i32, "vector_qdmlsl_laneq_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV4I16, kArgTyV8I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qdmlsl_laneq_i64v2, "vector_qdmlsl_laneq_i64v2", 1, +DEF_MIR_INTRINSIC(vector_qdmlsl_laneq_v2i64, "vector_qdmlsl_laneq_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV2I64, kArgTyV2I32, kArgTyV4I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qdmlsl_high_laneq_i32v4, "vector_qdmlsl_high_laneq_i32v4", 1, +DEF_MIR_INTRINSIC(vector_qdmlsl_high_laneq_v4i32, "vector_qdmlsl_high_laneq_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV8I16, kArgTyV8I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qdmlsl_high_laneq_i64v2, "vector_qdmlsl_high_laneq_i64v2", 1, +DEF_MIR_INTRINSIC(vector_qdmlsl_high_laneq_v2i64, "vector_qdmlsl_high_laneq_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV2I64, kArgTyV4I32, kArgTyV4I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mull_i16v8, "vector_mull_i16v8", 1, +DEF_MIR_INTRINSIC(vector_mull_v8i16, "vector_mull_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, { kArgTyV8I8, kArgTyV8I8 }) -DEF_MIR_INTRINSIC(vector_mull_i32v4, "vector_mull_i32v4", 1, +DEF_MIR_INTRINSIC(vector_mull_v4i32, "vector_mull_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I16, kArgTyV4I16 }) -DEF_MIR_INTRINSIC(vector_mull_i64v2, "vector_mull_i64v2", 1, +DEF_MIR_INTRINSIC(vector_mull_v2i64, "vector_mull_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV2I32, kArgTyV2I32 }) -DEF_MIR_INTRINSIC(vector_mull_u16v8, "vector_mull_u16v8", 1, +DEF_MIR_INTRINSIC(vector_mull_v8u16, "vector_mull_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, { kArgTyV8U8, kArgTyV8U8 }) -DEF_MIR_INTRINSIC(vector_mull_u32v4, "vector_mull_u32v4", 1, +DEF_MIR_INTRINSIC(vector_mull_v4u32, "vector_mull_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, { kArgTyV4U16, kArgTyV4U16 }) -DEF_MIR_INTRINSIC(vector_mull_u64v2, "vector_mull_u64v2", 1, +DEF_MIR_INTRINSIC(vector_mull_v2u64, "vector_mull_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, { kArgTyV2U32, kArgTyV2U32 }) -DEF_MIR_INTRINSIC(vector_mull_high_i16v8, "vector_mull_high_i16v8", 1, +DEF_MIR_INTRINSIC(vector_mull_high_v8i16, "vector_mull_high_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, { kArgTyV16I8, kArgTyV16I8 }) -DEF_MIR_INTRINSIC(vector_mull_high_i32v4, "vector_mull_high_i32v4", 1, +DEF_MIR_INTRINSIC(vector_mull_high_v4i32, "vector_mull_high_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV8I16, kArgTyV8I16 }) -DEF_MIR_INTRINSIC(vector_mull_high_i64v2, "vector_mull_high_i64v2", 1, +DEF_MIR_INTRINSIC(vector_mull_high_v2i64, "vector_mull_high_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV4I32, kArgTyV4I32 }) -DEF_MIR_INTRINSIC(vector_mull_high_u16v8, "vector_mull_high_u16v8", 1, +DEF_MIR_INTRINSIC(vector_mull_high_v8u16, "vector_mull_high_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, { kArgTyV16U8, kArgTyV16U8 }) -DEF_MIR_INTRINSIC(vector_mull_high_u32v4, "vector_mull_high_u32v4", 1, +DEF_MIR_INTRINSIC(vector_mull_high_v4u32, "vector_mull_high_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, { kArgTyV8U16, kArgTyV8U16 }) -DEF_MIR_INTRINSIC(vector_qdmull_n_i32v4, "vector_qdmull_n_i32v4", 1, +DEF_MIR_INTRINSIC(vector_qdmull_n_v4i32, "vector_qdmull_n_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I16, kArgTyV4I16 }) -DEF_MIR_INTRINSIC(vector_qdmull_n_i64v2, "vector_qdmull_n_i64v2", 1, +DEF_MIR_INTRINSIC(vector_qdmull_n_v2i64, "vector_qdmull_n_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV2I32, kArgTyV2I32 }) -DEF_MIR_INTRINSIC(vector_qdmull_high_n_i32v4, "vector_qdmull_high_n_i32v4", 1, +DEF_MIR_INTRINSIC(vector_qdmull_high_n_v4i32, "vector_qdmull_high_n_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV8I16, kArgTyV8I16 }) -DEF_MIR_INTRINSIC(vector_qdmull_high_n_i64v2, "vector_qdmull_high_n_i64v2", 1, +DEF_MIR_INTRINSIC(vector_qdmull_high_n_v2i64, "vector_qdmull_high_n_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV4I32, kArgTyV4I32 }) -DEF_MIR_INTRINSIC(vector_qdmull_lane_i32v4, "vector_qdmull_lane_i32v4", 1, +DEF_MIR_INTRINSIC(vector_qdmull_lane_v4i32, "vector_qdmull_lane_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I16, kArgTyV4I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qdmull_lane_i64v2, "vector_qdmull_lane_i64v2", 1, +DEF_MIR_INTRINSIC(vector_qdmull_lane_v2i64, "vector_qdmull_lane_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV2I32, kArgTyV2I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qdmull_high_lane_i32v4, "vector_qdmull_high_lane_i32v4", 1, +DEF_MIR_INTRINSIC(vector_qdmull_high_lane_v4i32, "vector_qdmull_high_lane_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV8I16, kArgTyV4I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qdmull_high_lane_i64v2, "vector_qdmull_high_lane_i64v2", 1, +DEF_MIR_INTRINSIC(vector_qdmull_high_lane_v2i64, "vector_qdmull_high_lane_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV4I32, kArgTyV2I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qdmull_laneq_i32v4, "vector_qdmull_laneq_i32v4", 1, +DEF_MIR_INTRINSIC(vector_qdmull_laneq_v4i32, "vector_qdmull_laneq_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I16, kArgTyV8I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qdmull_laneq_i64v2, "vector_qdmull_laneq_i64v2", 1, +DEF_MIR_INTRINSIC(vector_qdmull_laneq_v2i64, "vector_qdmull_laneq_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV2I32, kArgTyV4I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qdmull_high_laneq_i32v4, "vector_qdmull_high_laneq_i32v4", 1, +DEF_MIR_INTRINSIC(vector_qdmull_high_laneq_v4i32, "vector_qdmull_high_laneq_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV8I16, kArgTyV8I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qdmull_high_laneq_i64v2, "vector_qdmull_high_laneq_i64v2", 1, +DEF_MIR_INTRINSIC(vector_qdmull_high_laneq_v2i64, "vector_qdmull_high_laneq_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV4I32, kArgTyV4I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qdmulh_n_i16v4, "vector_qdmulh_n_i16v4", 1, +DEF_MIR_INTRINSIC(vector_qdmulh_n_v4i16, "vector_qdmulh_n_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, { kArgTyV4I16, kArgTyV4I16 }) -DEF_MIR_INTRINSIC(vector_qdmulhq_n_i16v8, "vector_qdmulhq_n_i16v8", 1, +DEF_MIR_INTRINSIC(vector_qdmulhq_n_v8i16, "vector_qdmulhq_n_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, { kArgTyV8I16, kArgTyV8I16 }) -DEF_MIR_INTRINSIC(vector_qdmulh_n_i32v2, "vector_qdmulh_n_i32v2", 1, +DEF_MIR_INTRINSIC(vector_qdmulh_n_v2i32, "vector_qdmulh_n_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, { kArgTyV2I32, kArgTyV2I32 }) -DEF_MIR_INTRINSIC(vector_qdmulhq_n_i32v4, "vector_qdmulhq_n_i32v4", 1, +DEF_MIR_INTRINSIC(vector_qdmulhq_n_v4i32, "vector_qdmulhq_n_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV4I32 }) -DEF_MIR_INTRINSIC(vector_qdmulh_lane_i16v4, "vector_qdmulh_lane_i16v4", 1, +DEF_MIR_INTRINSIC(vector_qdmulh_lane_v4i16, "vector_qdmulh_lane_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, { kArgTyV4I16, kArgTyV4I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qdmulhq_lane_i16v8, "vector_qdmulhq_lane_i16v8", 1, +DEF_MIR_INTRINSIC(vector_qdmulhq_lane_v8i16, "vector_qdmulhq_lane_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, { kArgTyV8I16, kArgTyV4I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qdmulh_lane_i32v2, "vector_qdmulh_lane_i32v2", 1, +DEF_MIR_INTRINSIC(vector_qdmulh_lane_v2i32, "vector_qdmulh_lane_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, { kArgTyV2I32, kArgTyV2I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qdmulhq_lane_i32v4, "vector_qdmulhq_lane_i32v4", 1, +DEF_MIR_INTRINSIC(vector_qdmulhq_lane_v4i32, "vector_qdmulhq_lane_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV2I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qdmulh_laneq_i16v4, "vector_qdmulh_laneq_i16v4", 1, +DEF_MIR_INTRINSIC(vector_qdmulh_laneq_v4i16, "vector_qdmulh_laneq_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, { kArgTyV4I16, kArgTyV8I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qdmulhq_laneq_i16v8, "vector_qdmulhq_laneq_i16v8", 1, +DEF_MIR_INTRINSIC(vector_qdmulhq_laneq_v8i16, "vector_qdmulhq_laneq_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, { kArgTyV8I16, kArgTyV8I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qdmulh_laneq_i32v2, "vector_qdmulh_laneq_i32v2", 1, +DEF_MIR_INTRINSIC(vector_qdmulh_laneq_v2i32, "vector_qdmulh_laneq_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, { kArgTyV2I32, kArgTyV4I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qdmulhq_laneq_i32v4, "vector_qdmulhq_laneq_i32v4", 1, +DEF_MIR_INTRINSIC(vector_qdmulhq_laneq_v4i32, "vector_qdmulhq_laneq_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV4I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qrdmulh_n_i16v4, "vector_qrdmulh_n_i16v4", 1, +DEF_MIR_INTRINSIC(vector_qrdmulh_n_v4i16, "vector_qrdmulh_n_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, { kArgTyV4I16, kArgTyV4I16 }) -DEF_MIR_INTRINSIC(vector_qrdmulhq_n_i16v8, "vector_qrdmulhq_n_i16v8", 1, +DEF_MIR_INTRINSIC(vector_qrdmulhq_n_v8i16, "vector_qrdmulhq_n_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, { kArgTyV8I16, kArgTyV8I16 }) -DEF_MIR_INTRINSIC(vector_qrdmulh_n_i32v2, "vector_qrdmulh_n_i32v2", 1, +DEF_MIR_INTRINSIC(vector_qrdmulh_n_v2i32, "vector_qrdmulh_n_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, { kArgTyV2I32, kArgTyV2I32 }) -DEF_MIR_INTRINSIC(vector_qrdmulhq_n_i32v4, "vector_qrdmulhq_n_i32v4", 1, +DEF_MIR_INTRINSIC(vector_qrdmulhq_n_v4i32, "vector_qrdmulhq_n_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV4I32 }) -DEF_MIR_INTRINSIC(vector_qrdmulh_lane_i16v4, "vector_qrdmulh_lane_i16v4", 1, +DEF_MIR_INTRINSIC(vector_qrdmulh_lane_v4i16, "vector_qrdmulh_lane_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, { kArgTyV4I16, kArgTyV4I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qrdmulhq_lane_i16v8, "vector_qrdmulhq_lane_i16v8", 1, +DEF_MIR_INTRINSIC(vector_qrdmulhq_lane_v8i16, "vector_qrdmulhq_lane_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, { kArgTyV8I16, kArgTyV4I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qrdmulh_lane_i32v2, "vector_qrdmulh_lane_i32v2", 1, +DEF_MIR_INTRINSIC(vector_qrdmulh_lane_v2i32, "vector_qrdmulh_lane_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, { kArgTyV2I32, kArgTyV2I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qrdmulhq_lane_i32v4, "vector_qrdmulhq_lane_i32v4", 1, +DEF_MIR_INTRINSIC(vector_qrdmulhq_lane_v4i32, "vector_qrdmulhq_lane_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV2I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qrdmulhh_lane_i16v4, "vector_qrdmulhh_lane_i16v4", 1, +DEF_MIR_INTRINSIC(vector_qrdmulhh_lane_v4i16, "vector_qrdmulhh_lane_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI16, { kArgTyI16, kArgTyV4I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qrdmulhs_lane_i32v2, "vector_qrdmulhs_lane_i32v2", 1, +DEF_MIR_INTRINSIC(vector_qrdmulhs_lane_v2i32, "vector_qrdmulhs_lane_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI32, { kArgTyI32, kArgTyV2I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qrdmulh_laneq_i16v4, "vector_qrdmulh_laneq_i16v4", 1, +DEF_MIR_INTRINSIC(vector_qrdmulh_laneq_v4i16, "vector_qrdmulh_laneq_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, { kArgTyV4I16, kArgTyV8I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qrdmulhq_laneq_i16v8, "vector_qrdmulhq_laneq_i16v8", 1, +DEF_MIR_INTRINSIC(vector_qrdmulhq_laneq_v8i16, "vector_qrdmulhq_laneq_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, { kArgTyV8I16, kArgTyV8I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qrdmulh_laneq_i32v2, "vector_qrdmulh_laneq_i32v2", 1, +DEF_MIR_INTRINSIC(vector_qrdmulh_laneq_v2i32, "vector_qrdmulh_laneq_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, { kArgTyV2I32, kArgTyV4I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qrdmulhq_laneq_i32v4, "vector_qrdmulhq_laneq_i32v4", 1, +DEF_MIR_INTRINSIC(vector_qrdmulhq_laneq_v4i32, "vector_qrdmulhq_laneq_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV4I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qrdmulhh_laneq_i16v8, "vector_qrdmulhh_laneq_i16v8", 1, +DEF_MIR_INTRINSIC(vector_qrdmulhh_laneq_v8i16, "vector_qrdmulhh_laneq_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI16, { kArgTyI16, kArgTyV8I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qrdmulhs_laneq_i32v4, "vector_qrdmulhs_laneq_i32v4", 1, +DEF_MIR_INTRINSIC(vector_qrdmulhs_laneq_v4i32, "vector_qrdmulhs_laneq_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI32, { kArgTyI32, kArgTyV4I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qdmlal_n_i32v4, "vector_qdmlal_n_i32v4", 1, +DEF_MIR_INTRINSIC(vector_qdmlal_n_v4i32, "vector_qdmlal_n_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV4I16, kArgTyV4I16 }) -DEF_MIR_INTRINSIC(vector_qdmlal_n_i64v2, "vector_qdmlal_n_i64v2", 1, +DEF_MIR_INTRINSIC(vector_qdmlal_n_v2i64, "vector_qdmlal_n_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV2I64, kArgTyV2I32, kArgTyV2I32 }) -DEF_MIR_INTRINSIC(vector_qdmlal_high_n_i32v4, "vector_qdmlal_high_n_i32v4", 1, +DEF_MIR_INTRINSIC(vector_qdmlal_high_n_v4i32, "vector_qdmlal_high_n_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV8I16, kArgTyV8I16 }) -DEF_MIR_INTRINSIC(vector_qdmlal_high_n_i64v2, "vector_qdmlal_high_n_i64v2", 1, +DEF_MIR_INTRINSIC(vector_qdmlal_high_n_v2i64, "vector_qdmlal_high_n_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV2I64, kArgTyV4I32, kArgTyV4I32 }) -DEF_MIR_INTRINSIC(vector_qdmlsl_n_i32v4, "vector_qdmlsl_n_i32v4", 1, +DEF_MIR_INTRINSIC(vector_qdmlsl_n_v4i32, "vector_qdmlsl_n_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV4I16, kArgTyV4I16 }) -DEF_MIR_INTRINSIC(vector_qdmlsl_n_i64v2, "vector_qdmlsl_n_i64v2", 1, +DEF_MIR_INTRINSIC(vector_qdmlsl_n_v2i64, "vector_qdmlsl_n_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV2I64, kArgTyV2I32, kArgTyV2I32 }) -DEF_MIR_INTRINSIC(vector_qdmlsl_high_n_i32v4, "vector_qdmlsl_high_n_i32v4", 1, +DEF_MIR_INTRINSIC(vector_qdmlsl_high_n_v4i32, "vector_qdmlsl_high_n_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV8I16, kArgTyV8I16 }) -DEF_MIR_INTRINSIC(vector_qdmlsl_high_n_i64v2, "vector_qdmlsl_high_n_i64v2", 1, +DEF_MIR_INTRINSIC(vector_qdmlsl_high_n_v2i64, "vector_qdmlsl_high_n_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV2I64, kArgTyV4I32, kArgTyV4I32 }) -DEF_MIR_INTRINSIC(vector_hsub_i8v8, "vector_hsub_i8v8", 1, +DEF_MIR_INTRINSIC(vector_hsub_v8i8, "vector_hsub_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, { kArgTyV8I8, kArgTyV8I8 }) -DEF_MIR_INTRINSIC(vector_hsubq_i8v16, "vector_hsubq_i8v16", 1, +DEF_MIR_INTRINSIC(vector_hsubq_v16i8, "vector_hsubq_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, { kArgTyV16I8, kArgTyV16I8 }) -DEF_MIR_INTRINSIC(vector_hsub_i16v4, "vector_hsub_i16v4", 1, +DEF_MIR_INTRINSIC(vector_hsub_v4i16, "vector_hsub_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, { kArgTyV4I16, kArgTyV4I16 }) -DEF_MIR_INTRINSIC(vector_hsubq_i16v8, "vector_hsubq_i16v8", 1, +DEF_MIR_INTRINSIC(vector_hsubq_v8i16, "vector_hsubq_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, { kArgTyV8I16, kArgTyV8I16 }) -DEF_MIR_INTRINSIC(vector_hsub_i32v2, "vector_hsub_i32v2", 1, +DEF_MIR_INTRINSIC(vector_hsub_v2i32, "vector_hsub_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, { kArgTyV2I32, kArgTyV2I32 }) -DEF_MIR_INTRINSIC(vector_hsubq_i32v4, "vector_hsubq_i32v4", 1, +DEF_MIR_INTRINSIC(vector_hsubq_v4i32, "vector_hsubq_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV4I32 }) -DEF_MIR_INTRINSIC(vector_hsub_u8v8, "vector_hsub_u8v8", 1, +DEF_MIR_INTRINSIC(vector_hsub_v8u8, "vector_hsub_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, { kArgTyV8U8, kArgTyV8U8 }) -DEF_MIR_INTRINSIC(vector_hsubq_u8v16, "vector_hsubq_u8v16", 1, +DEF_MIR_INTRINSIC(vector_hsubq_v16u8, "vector_hsubq_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, { kArgTyV16U8, kArgTyV16U8 }) -DEF_MIR_INTRINSIC(vector_hsub_u16v4, "vector_hsub_u16v4", 1, +DEF_MIR_INTRINSIC(vector_hsub_v4u16, "vector_hsub_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, { kArgTyV4U16, kArgTyV4U16 }) -DEF_MIR_INTRINSIC(vector_hsubq_u16v8, "vector_hsubq_u16v8", 1, +DEF_MIR_INTRINSIC(vector_hsubq_v8u16, "vector_hsubq_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, { kArgTyV8U16, kArgTyV8U16 }) -DEF_MIR_INTRINSIC(vector_hsub_u32v2, "vector_hsub_u32v2", 1, +DEF_MIR_INTRINSIC(vector_hsub_v2u32, "vector_hsub_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, { kArgTyV2U32, kArgTyV2U32 }) -DEF_MIR_INTRINSIC(vector_hsubq_u32v4, "vector_hsubq_u32v4", 1, +DEF_MIR_INTRINSIC(vector_hsubq_v4u32, "vector_hsubq_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, { kArgTyV4U32, kArgTyV4U32 }) -DEF_MIR_INTRINSIC(vector_subhn_i8v8, "vector_subhn_i8v8", 1, +DEF_MIR_INTRINSIC(vector_subhn_v8i8, "vector_subhn_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, { kArgTyV8I16, kArgTyV8I16 }) -DEF_MIR_INTRINSIC(vector_subhn_i16v4, "vector_subhn_i16v4", 1, +DEF_MIR_INTRINSIC(vector_subhn_v4i16, "vector_subhn_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, { kArgTyV4I32, kArgTyV4I32 }) -DEF_MIR_INTRINSIC(vector_subhn_i32v2, "vector_subhn_i32v2", 1, +DEF_MIR_INTRINSIC(vector_subhn_v2i32, "vector_subhn_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, { kArgTyV2I64, kArgTyV2I64 }) -DEF_MIR_INTRINSIC(vector_subhn_u8v8, "vector_subhn_u8v8", 1, +DEF_MIR_INTRINSIC(vector_subhn_v8u8, "vector_subhn_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, { kArgTyV8U16, kArgTyV8U16 }) -DEF_MIR_INTRINSIC(vector_subhn_u16v4, "vector_subhn_u16v4", 1, +DEF_MIR_INTRINSIC(vector_subhn_v4u16, "vector_subhn_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, { kArgTyV4U32, kArgTyV4U32 }) -DEF_MIR_INTRINSIC(vector_subhn_u32v2, "vector_subhn_u32v2", 1, +DEF_MIR_INTRINSIC(vector_subhn_v2u32, "vector_subhn_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, { kArgTyV2U64, kArgTyV2U64 }) -DEF_MIR_INTRINSIC(vector_subhn_high_i8v16, "vector_subhn_high_i8v16", 1, +DEF_MIR_INTRINSIC(vector_subhn_high_v16i8, "vector_subhn_high_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, { kArgTyV8I8, kArgTyV8I16, kArgTyV8I16 }) -DEF_MIR_INTRINSIC(vector_subhn_high_i16v8, "vector_subhn_high_i16v8", 1, +DEF_MIR_INTRINSIC(vector_subhn_high_v8i16, "vector_subhn_high_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, { kArgTyV4I16, kArgTyV4I32, kArgTyV4I32 }) -DEF_MIR_INTRINSIC(vector_subhn_high_i32v4, "vector_subhn_high_i32v4", 1, +DEF_MIR_INTRINSIC(vector_subhn_high_v4i32, "vector_subhn_high_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV2I32, kArgTyV2I64, kArgTyV2I64 }) -DEF_MIR_INTRINSIC(vector_subhn_high_u8v16, "vector_subhn_high_u8v16", 1, +DEF_MIR_INTRINSIC(vector_subhn_high_v16u8, "vector_subhn_high_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, { kArgTyV8U8, kArgTyV8U16, kArgTyV8U16 }) -DEF_MIR_INTRINSIC(vector_subhn_high_u16v8, "vector_subhn_high_u16v8", 1, +DEF_MIR_INTRINSIC(vector_subhn_high_v8u16, "vector_subhn_high_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, { kArgTyV4U16, kArgTyV4U32, kArgTyV4U32 }) -DEF_MIR_INTRINSIC(vector_subhn_high_u32v4, "vector_subhn_high_u32v4", 1, +DEF_MIR_INTRINSIC(vector_subhn_high_v4u32, "vector_subhn_high_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, { kArgTyV2U32, kArgTyV2U64, kArgTyV2U64 }) -DEF_MIR_INTRINSIC(vector_rsubhn_i8v8, "vector_rsubhn_i8v8", 1, +DEF_MIR_INTRINSIC(vector_rsubhn_v8i8, "vector_rsubhn_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, { kArgTyV8I16, kArgTyV8I16 }) -DEF_MIR_INTRINSIC(vector_rsubhn_i16v4, "vector_rsubhn_i16v4", 1, +DEF_MIR_INTRINSIC(vector_rsubhn_v4i16, "vector_rsubhn_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, { kArgTyV4I32, kArgTyV4I32 }) -DEF_MIR_INTRINSIC(vector_rsubhn_i32v2, "vector_rsubhn_i32v2", 1, +DEF_MIR_INTRINSIC(vector_rsubhn_v2i32, "vector_rsubhn_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, { kArgTyV2I64, kArgTyV2I64 }) -DEF_MIR_INTRINSIC(vector_rsubhn_u8v8, "vector_rsubhn_u8v8", 1, +DEF_MIR_INTRINSIC(vector_rsubhn_v8u8, "vector_rsubhn_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, { kArgTyV8U16, kArgTyV8U16 }) -DEF_MIR_INTRINSIC(vector_rsubhn_u16v4, "vector_rsubhn_u16v4", 1, +DEF_MIR_INTRINSIC(vector_rsubhn_v4u16, "vector_rsubhn_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, { kArgTyV4U32, kArgTyV4U32 }) -DEF_MIR_INTRINSIC(vector_rsubhn_u32v2, "vector_rsubhn_u32v2", 1, +DEF_MIR_INTRINSIC(vector_rsubhn_v2u32, "vector_rsubhn_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, { kArgTyV2U64, kArgTyV2U64 }) -DEF_MIR_INTRINSIC(vector_rsubhn_high_i8v16, "vector_rsubhn_high_i8v16", 1, +DEF_MIR_INTRINSIC(vector_rsubhn_high_v16i8, "vector_rsubhn_high_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, { kArgTyV8I8, kArgTyV8I16, kArgTyV8I16 }) -DEF_MIR_INTRINSIC(vector_rsubhn_high_i16v8, "vector_rsubhn_high_i16v8", 1, +DEF_MIR_INTRINSIC(vector_rsubhn_high_v8i16, "vector_rsubhn_high_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, { kArgTyV4I16, kArgTyV4I32, kArgTyV4I32 }) -DEF_MIR_INTRINSIC(vector_rsubhn_high_i32v4, "vector_rsubhn_high_i32v4", 1, +DEF_MIR_INTRINSIC(vector_rsubhn_high_v4i32, "vector_rsubhn_high_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV2I32, kArgTyV2I64, kArgTyV2I64 }) -DEF_MIR_INTRINSIC(vector_rsubhn_high_u8v16, "vector_rsubhn_high_u8v16", 1, +DEF_MIR_INTRINSIC(vector_rsubhn_high_v16u8, "vector_rsubhn_high_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, { kArgTyV8U8, kArgTyV8U16, kArgTyV8U16 }) -DEF_MIR_INTRINSIC(vector_rsubhn_high_u16v8, "vector_rsubhn_high_u16v8", 1, +DEF_MIR_INTRINSIC(vector_rsubhn_high_v8u16, "vector_rsubhn_high_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, { kArgTyV4U16, kArgTyV4U32, kArgTyV4U32 }) -DEF_MIR_INTRINSIC(vector_rsubhn_high_u32v4, "vector_rsubhn_high_u32v4", 1, +DEF_MIR_INTRINSIC(vector_rsubhn_high_v4u32, "vector_rsubhn_high_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, { kArgTyV2U32, kArgTyV2U64, kArgTyV2U64 }) -DEF_MIR_INTRINSIC(vector_qsub_i8v8, "vector_qsub_i8v8", 1, +DEF_MIR_INTRINSIC(vector_qsub_v8i8, "vector_qsub_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, { kArgTyV8I8, kArgTyV8I8 }) -DEF_MIR_INTRINSIC(vector_qsubq_i8v16, "vector_qsubq_i8v16", 1, +DEF_MIR_INTRINSIC(vector_qsubq_v16i8, "vector_qsubq_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, { kArgTyV16I8, kArgTyV16I8 }) -DEF_MIR_INTRINSIC(vector_qsub_i16v4, "vector_qsub_i16v4", 1, +DEF_MIR_INTRINSIC(vector_qsub_v4i16, "vector_qsub_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, { kArgTyV4I16, kArgTyV4I16 }) -DEF_MIR_INTRINSIC(vector_qsubq_i16v8, "vector_qsubq_i16v8", 1, +DEF_MIR_INTRINSIC(vector_qsubq_v8i16, "vector_qsubq_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, { kArgTyV8I16, kArgTyV8I16 }) -DEF_MIR_INTRINSIC(vector_qsub_i32v2, "vector_qsub_i32v2", 1, +DEF_MIR_INTRINSIC(vector_qsub_v2i32, "vector_qsub_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, { kArgTyV2I32, kArgTyV2I32 }) -DEF_MIR_INTRINSIC(vector_qsubq_i32v4, "vector_qsubq_i32v4", 1, +DEF_MIR_INTRINSIC(vector_qsubq_v4i32, "vector_qsubq_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV4I32 }) -DEF_MIR_INTRINSIC(vector_qsub_i64v1, "vector_qsub_i64v1", 1, +DEF_MIR_INTRINSIC(vector_qsub_v1i64, "vector_qsub_v1i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1I64, { kArgTyV1I64, kArgTyV1I64 }) -DEF_MIR_INTRINSIC(vector_qsubq_i64v2, "vector_qsubq_i64v2", 1, +DEF_MIR_INTRINSIC(vector_qsubq_v2i64, "vector_qsubq_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV2I64, kArgTyV2I64 }) -DEF_MIR_INTRINSIC(vector_qsub_u8v8, "vector_qsub_u8v8", 1, +DEF_MIR_INTRINSIC(vector_qsub_v8u8, "vector_qsub_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, { kArgTyV8U8, kArgTyV8U8 }) -DEF_MIR_INTRINSIC(vector_qsubq_u8v16, "vector_qsubq_u8v16", 1, +DEF_MIR_INTRINSIC(vector_qsubq_v16u8, "vector_qsubq_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, { kArgTyV16U8, kArgTyV16U8 }) -DEF_MIR_INTRINSIC(vector_qsub_u16v4, "vector_qsub_u16v4", 1, +DEF_MIR_INTRINSIC(vector_qsub_v4u16, "vector_qsub_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, { kArgTyV4U16, kArgTyV4U16 }) -DEF_MIR_INTRINSIC(vector_qsubq_u16v8, "vector_qsubq_u16v8", 1, +DEF_MIR_INTRINSIC(vector_qsubq_v8u16, "vector_qsubq_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, { kArgTyV8U16, kArgTyV8U16 }) -DEF_MIR_INTRINSIC(vector_qsub_u32v2, "vector_qsub_u32v2", 1, +DEF_MIR_INTRINSIC(vector_qsub_v2u32, "vector_qsub_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, { kArgTyV2U32, kArgTyV2U32 }) -DEF_MIR_INTRINSIC(vector_qsubq_u32v4, "vector_qsubq_u32v4", 1, +DEF_MIR_INTRINSIC(vector_qsubq_v4u32, "vector_qsubq_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, { kArgTyV4U32, kArgTyV4U32 }) -DEF_MIR_INTRINSIC(vector_qsub_u64v1, "vector_qsub_u64v1", 1, +DEF_MIR_INTRINSIC(vector_qsub_v1u64, "vector_qsub_v1u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1U64, { kArgTyV1U64, kArgTyV1U64 }) -DEF_MIR_INTRINSIC(vector_qsubq_u64v2, "vector_qsubq_u64v2", 1, +DEF_MIR_INTRINSIC(vector_qsubq_v2u64, "vector_qsubq_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, { kArgTyV2U64, kArgTyV2U64 }) -DEF_MIR_INTRINSIC(vector_aba_i8v8, "vector_aba_i8v8", 1, +DEF_MIR_INTRINSIC(vector_aba_v8i8, "vector_aba_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, { kArgTyV8I8, kArgTyV8I8, kArgTyV8I8 }) -DEF_MIR_INTRINSIC(vector_abaq_i8v16, "vector_abaq_i8v16", 1, +DEF_MIR_INTRINSIC(vector_abaq_v16i8, "vector_abaq_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, { kArgTyV16I8, kArgTyV16I8, kArgTyV16I8 }) -DEF_MIR_INTRINSIC(vector_aba_i16v4, "vector_aba_i16v4", 1, +DEF_MIR_INTRINSIC(vector_aba_v4i16, "vector_aba_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, { kArgTyV4I16, kArgTyV4I16, kArgTyV4I16 }) -DEF_MIR_INTRINSIC(vector_abaq_i16v8, "vector_abaq_i16v8", 1, +DEF_MIR_INTRINSIC(vector_abaq_v8i16, "vector_abaq_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, { kArgTyV8I16, kArgTyV8I16, kArgTyV8I16 }) -DEF_MIR_INTRINSIC(vector_aba_i32v2, "vector_aba_i32v2", 1, +DEF_MIR_INTRINSIC(vector_aba_v2i32, "vector_aba_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, { kArgTyV2I32, kArgTyV2I32, kArgTyV2I32 }) -DEF_MIR_INTRINSIC(vector_abaq_i32v4, "vector_abaq_i32v4", 1, +DEF_MIR_INTRINSIC(vector_abaq_v4i32, "vector_abaq_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV4I32, kArgTyV4I32 }) -DEF_MIR_INTRINSIC(vector_aba_u8v8, "vector_aba_u8v8", 1, +DEF_MIR_INTRINSIC(vector_aba_v8u8, "vector_aba_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, { kArgTyV8U8, kArgTyV8U8, kArgTyV8U8 }) -DEF_MIR_INTRINSIC(vector_abaq_u8v16, "vector_abaq_u8v16", 1, +DEF_MIR_INTRINSIC(vector_abaq_v16u8, "vector_abaq_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, { kArgTyV16U8, kArgTyV16U8, kArgTyV16U8 }) -DEF_MIR_INTRINSIC(vector_aba_u16v4, "vector_aba_u16v4", 1, +DEF_MIR_INTRINSIC(vector_aba_v4u16, "vector_aba_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, { kArgTyV4U16, kArgTyV4U16, kArgTyV4U16 }) -DEF_MIR_INTRINSIC(vector_abaq_u16v8, "vector_abaq_u16v8", 1, +DEF_MIR_INTRINSIC(vector_abaq_v8u16, "vector_abaq_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, { kArgTyV8U16, kArgTyV8U16, kArgTyV8U16 }) -DEF_MIR_INTRINSIC(vector_aba_u32v2, "vector_aba_u32v2", 1, +DEF_MIR_INTRINSIC(vector_aba_v2u32, "vector_aba_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, { kArgTyV2U32, kArgTyV2U32, kArgTyV2U32 }) -DEF_MIR_INTRINSIC(vector_abaq_u32v4, "vector_abaq_u32v4", 1, +DEF_MIR_INTRINSIC(vector_abaq_v4u32, "vector_abaq_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, { kArgTyV4U32, kArgTyV4U32, kArgTyV4U32 }) -DEF_MIR_INTRINSIC(vector_abal_i16v8, "vector_abal_i16v8", 1, +DEF_MIR_INTRINSIC(vector_abal_v8i16, "vector_abal_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, { kArgTyV8I16, kArgTyV8I8, kArgTyV8I8 }) -DEF_MIR_INTRINSIC(vector_abal_i32v4, "vector_abal_i32v4", 1, +DEF_MIR_INTRINSIC(vector_abal_v4i32, "vector_abal_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV4I16, kArgTyV4I16 }) -DEF_MIR_INTRINSIC(vector_abal_i64v2, "vector_abal_i64v2", 1, +DEF_MIR_INTRINSIC(vector_abal_v2i64, "vector_abal_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV2I64, kArgTyV2I32, kArgTyV2I32 }) -DEF_MIR_INTRINSIC(vector_abal_u16v8, "vector_abal_u16v8", 1, +DEF_MIR_INTRINSIC(vector_abal_v8u16, "vector_abal_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, { kArgTyV8U16, kArgTyV8U8, kArgTyV8U8 }) -DEF_MIR_INTRINSIC(vector_abal_u32v4, "vector_abal_u32v4", 1, +DEF_MIR_INTRINSIC(vector_abal_v4u32, "vector_abal_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, { kArgTyV4U32, kArgTyV4U16, kArgTyV4U16 }) -DEF_MIR_INTRINSIC(vector_abal_u64v2, "vector_abal_u64v2", 1, +DEF_MIR_INTRINSIC(vector_abal_v2u64, "vector_abal_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, { kArgTyV2U64, kArgTyV2U32, kArgTyV2U32 }) -DEF_MIR_INTRINSIC(vector_abal_high_i16v8, "vector_abal_high_i16v8", 1, +DEF_MIR_INTRINSIC(vector_abal_high_v8i16, "vector_abal_high_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, { kArgTyV8I16, kArgTyV16I8, kArgTyV16I8 }) -DEF_MIR_INTRINSIC(vector_abal_high_i32v4, "vector_abal_high_i32v4", 1, +DEF_MIR_INTRINSIC(vector_abal_high_v4i32, "vector_abal_high_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV8I16, kArgTyV8I16 }) -DEF_MIR_INTRINSIC(vector_abal_high_i64v2, "vector_abal_high_i64v2", 1, +DEF_MIR_INTRINSIC(vector_abal_high_v2i64, "vector_abal_high_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV2I64, kArgTyV4I32, kArgTyV4I32 }) -DEF_MIR_INTRINSIC(vector_abal_high_u16v8, "vector_abal_high_u16v8", 1, +DEF_MIR_INTRINSIC(vector_abal_high_v8u16, "vector_abal_high_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, { kArgTyV8U16, kArgTyV16U8, kArgTyV16U8 }) -DEF_MIR_INTRINSIC(vector_abal_high_u32v4, "vector_abal_high_u32v4", 1, +DEF_MIR_INTRINSIC(vector_abal_high_v4u32, "vector_abal_high_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, { kArgTyV4U32, kArgTyV8U16, kArgTyV8U16 }) -DEF_MIR_INTRINSIC(vector_abal_high_u64v2, "vector_abal_high_u64v2", 1, +DEF_MIR_INTRINSIC(vector_abal_high_v2u64, "vector_abal_high_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, { kArgTyV2U64, kArgTyV4U32, kArgTyV4U32 }) -DEF_MIR_INTRINSIC(vector_qabs_i8v8, "vector_qabs_i8v8", 1, +DEF_MIR_INTRINSIC(vector_qabs_v8i8, "vector_qabs_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, { kArgTyV8I8 }) -DEF_MIR_INTRINSIC(vector_qabsq_i8v16, "vector_qabsq_i8v16", 1, +DEF_MIR_INTRINSIC(vector_qabsq_v16i8, "vector_qabsq_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, { kArgTyV16I8 }) -DEF_MIR_INTRINSIC(vector_qabs_i16v4, "vector_qabs_i16v4", 1, +DEF_MIR_INTRINSIC(vector_qabs_v4i16, "vector_qabs_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, { kArgTyV4I16 }) -DEF_MIR_INTRINSIC(vector_qabsq_i16v8, "vector_qabsq_i16v8", 1, +DEF_MIR_INTRINSIC(vector_qabsq_v8i16, "vector_qabsq_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, { kArgTyV8I16 }) -DEF_MIR_INTRINSIC(vector_qabs_i32v2, "vector_qabs_i32v2", 1, +DEF_MIR_INTRINSIC(vector_qabs_v2i32, "vector_qabs_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, { kArgTyV2I32 }) -DEF_MIR_INTRINSIC(vector_qabsq_i32v4, "vector_qabsq_i32v4", 1, +DEF_MIR_INTRINSIC(vector_qabsq_v4i32, "vector_qabsq_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32 }) -DEF_MIR_INTRINSIC(vector_qabs_i64v1, "vector_qabs_i64v1", 1, +DEF_MIR_INTRINSIC(vector_qabs_v1i64, "vector_qabs_v1i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1I64, { kArgTyV1I64 }) -DEF_MIR_INTRINSIC(vector_qabsq_i64v2, "vector_qabsq_i64v2", 1, +DEF_MIR_INTRINSIC(vector_qabsq_v2i64, "vector_qabsq_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV2I64 }) -DEF_MIR_INTRINSIC(vector_rsqrte_u32v2, "vector_rsqrte_u32v2", 1, +DEF_MIR_INTRINSIC(vector_rsqrte_v2u32, "vector_rsqrte_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, { kArgTyV2U32 }) -DEF_MIR_INTRINSIC(vector_rsqrteq_u32v4, "vector_rsqrteq_u32v4", 1, +DEF_MIR_INTRINSIC(vector_rsqrteq_v4u32, "vector_rsqrteq_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, { kArgTyV4U32 }) -DEF_MIR_INTRINSIC(vector_addlv_i8v8, "vector_addlv_i8v8", 1, +DEF_MIR_INTRINSIC(vector_addlv_v8i8, "vector_addlv_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI16, { kArgTyV8I8 }) -DEF_MIR_INTRINSIC(vector_addlvq_i8v16, "vector_addlvq_i8v16", 1, +DEF_MIR_INTRINSIC(vector_addlvq_v16i8, "vector_addlvq_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI16, { kArgTyV16I8 }) -DEF_MIR_INTRINSIC(vector_addlv_i16v4, "vector_addlv_i16v4", 1, +DEF_MIR_INTRINSIC(vector_addlv_v4i16, "vector_addlv_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI32, { kArgTyV4I16 }) -DEF_MIR_INTRINSIC(vector_addlvq_i16v8, "vector_addlvq_i16v8", 1, +DEF_MIR_INTRINSIC(vector_addlvq_v8i16, "vector_addlvq_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI32, { kArgTyV8I16 }) -DEF_MIR_INTRINSIC(vector_addlvq_i32v4, "vector_addlvq_i32v4", 1, +DEF_MIR_INTRINSIC(vector_addlvq_v4i32, "vector_addlvq_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI64, { kArgTyV4I32 }) -DEF_MIR_INTRINSIC(vector_addlv_u8v8, "vector_addlv_u8v8", 1, +DEF_MIR_INTRINSIC(vector_addlv_v8u8, "vector_addlv_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU16, { kArgTyV8U8 }) -DEF_MIR_INTRINSIC(vector_addlvq_u8v16, "vector_addlvq_u8v16", 1, +DEF_MIR_INTRINSIC(vector_addlvq_v16u8, "vector_addlvq_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU16, { kArgTyV16U8 }) -DEF_MIR_INTRINSIC(vector_addlv_u16v4, "vector_addlv_u16v4", 1, +DEF_MIR_INTRINSIC(vector_addlv_v4u16, "vector_addlv_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU32, { kArgTyV4U16 }) -DEF_MIR_INTRINSIC(vector_addlvq_u16v8, "vector_addlvq_u16v8", 1, +DEF_MIR_INTRINSIC(vector_addlvq_v8u16, "vector_addlvq_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU32, { kArgTyV8U16 }) -DEF_MIR_INTRINSIC(vector_addlvq_u32v4, "vector_addlvq_u32v4", 1, +DEF_MIR_INTRINSIC(vector_addlvq_v4u32, "vector_addlvq_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU64, { kArgTyV4U32 }) -DEF_MIR_INTRINSIC(vector_qshl_i8v8, "vector_qshl_i8v8", 1, +DEF_MIR_INTRINSIC(vector_qshl_v8i8, "vector_qshl_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, { kArgTyV8I8, kArgTyV8I8 }) -DEF_MIR_INTRINSIC(vector_qshlq_i8v16, "vector_qshlq_i8v16", 1, +DEF_MIR_INTRINSIC(vector_qshlq_v16i8, "vector_qshlq_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, { kArgTyV16I8, kArgTyV16I8 }) -DEF_MIR_INTRINSIC(vector_qshl_i16v4, "vector_qshl_i16v4", 1, +DEF_MIR_INTRINSIC(vector_qshl_v4i16, "vector_qshl_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, { kArgTyV4I16, kArgTyV4I16 }) -DEF_MIR_INTRINSIC(vector_qshlq_i16v8, "vector_qshlq_i16v8", 1, +DEF_MIR_INTRINSIC(vector_qshlq_v8i16, "vector_qshlq_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, { kArgTyV8I16, kArgTyV8I16 }) -DEF_MIR_INTRINSIC(vector_qshl_i32v2, "vector_qshl_i32v2", 1, +DEF_MIR_INTRINSIC(vector_qshl_v2i32, "vector_qshl_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, { kArgTyV2I32, kArgTyV2I32 }) -DEF_MIR_INTRINSIC(vector_qshlq_i32v4, "vector_qshlq_i32v4", 1, +DEF_MIR_INTRINSIC(vector_qshlq_v4i32, "vector_qshlq_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV4I32 }) -DEF_MIR_INTRINSIC(vector_qshl_i64v1, "vector_qshl_i64v1", 1, +DEF_MIR_INTRINSIC(vector_qshl_v1i64, "vector_qshl_v1i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1I64, { kArgTyV1I64, kArgTyV1I64 }) -DEF_MIR_INTRINSIC(vector_qshlq_i64v2, "vector_qshlq_i64v2", 1, +DEF_MIR_INTRINSIC(vector_qshlq_v2i64, "vector_qshlq_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV2I64, kArgTyV2I64 }) -DEF_MIR_INTRINSIC(vector_qshl_u8v8, "vector_qshl_u8v8", 1, +DEF_MIR_INTRINSIC(vector_qshl_v8u8, "vector_qshl_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, { kArgTyV8U8, kArgTyV8I8 }) -DEF_MIR_INTRINSIC(vector_qshlq_u8v16, "vector_qshlq_u8v16", 1, +DEF_MIR_INTRINSIC(vector_qshlq_v16u8, "vector_qshlq_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, { kArgTyV16U8, kArgTyV16I8 }) -DEF_MIR_INTRINSIC(vector_qshl_u16v4, "vector_qshl_u16v4", 1, +DEF_MIR_INTRINSIC(vector_qshl_v4u16, "vector_qshl_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, { kArgTyV4U16, kArgTyV4I16 }) -DEF_MIR_INTRINSIC(vector_qshlq_u16v8, "vector_qshlq_u16v8", 1, +DEF_MIR_INTRINSIC(vector_qshlq_v8u16, "vector_qshlq_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, { kArgTyV8U16, kArgTyV8I16 }) -DEF_MIR_INTRINSIC(vector_qshl_u32v2, "vector_qshl_u32v2", 1, +DEF_MIR_INTRINSIC(vector_qshl_v2u32, "vector_qshl_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, { kArgTyV2U32, kArgTyV2I32 }) -DEF_MIR_INTRINSIC(vector_qshlq_u32v4, "vector_qshlq_u32v4", 1, +DEF_MIR_INTRINSIC(vector_qshlq_v4u32, "vector_qshlq_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, { kArgTyV4U32, kArgTyV4I32 }) -DEF_MIR_INTRINSIC(vector_qshl_u64v1, "vector_qshl_u64v1", 1, +DEF_MIR_INTRINSIC(vector_qshl_v1u64, "vector_qshl_v1u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1U64, { kArgTyV1U64, kArgTyV1I64 }) -DEF_MIR_INTRINSIC(vector_qshlq_u64v2, "vector_qshlq_u64v2", 1, +DEF_MIR_INTRINSIC(vector_qshlq_v2u64, "vector_qshlq_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, { kArgTyV2U64, kArgTyV2I64 }) -DEF_MIR_INTRINSIC(vector_qshl_n_i8v8, "vector_qshl_n_i8v8", 1, +DEF_MIR_INTRINSIC(vector_qshl_n_v8i8, "vector_qshl_n_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, { kArgTyV8I8, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qshlq_n_i8v16, "vector_qshlq_n_i8v16", 1, +DEF_MIR_INTRINSIC(vector_qshlq_n_v16i8, "vector_qshlq_n_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, { kArgTyV16I8, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qshl_n_i16v4, "vector_qshl_n_i16v4", 1, +DEF_MIR_INTRINSIC(vector_qshl_n_v4i16, "vector_qshl_n_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, { kArgTyV4I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qshlq_n_i16v8, "vector_qshlq_n_i16v8", 1, +DEF_MIR_INTRINSIC(vector_qshlq_n_v8i16, "vector_qshlq_n_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, { kArgTyV8I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qshl_n_i32v2, "vector_qshl_n_i32v2", 1, +DEF_MIR_INTRINSIC(vector_qshl_n_v2i32, "vector_qshl_n_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, { kArgTyV2I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qshlq_n_i32v4, "vector_qshlq_n_i32v4", 1, +DEF_MIR_INTRINSIC(vector_qshlq_n_v4i32, "vector_qshlq_n_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qshl_n_i64v1, "vector_qshl_n_i64v1", 1, +DEF_MIR_INTRINSIC(vector_qshl_n_v1i64, "vector_qshl_n_v1i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1I64, { kArgTyV1I64, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qshlq_n_i64v2, "vector_qshlq_n_i64v2", 1, +DEF_MIR_INTRINSIC(vector_qshlq_n_v2i64, "vector_qshlq_n_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV2I64, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qshl_n_u8v8, "vector_qshl_n_u8v8", 1, +DEF_MIR_INTRINSIC(vector_qshl_n_v8u8, "vector_qshl_n_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, { kArgTyV8U8, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qshlq_n_u8v16, "vector_qshlq_n_u8v16", 1, +DEF_MIR_INTRINSIC(vector_qshlq_n_v16u8, "vector_qshlq_n_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, { kArgTyV16U8, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qshl_n_u16v4, "vector_qshl_n_u16v4", 1, +DEF_MIR_INTRINSIC(vector_qshl_n_v4u16, "vector_qshl_n_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, { kArgTyV4U16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qshlq_n_u16v8, "vector_qshlq_n_u16v8", 1, +DEF_MIR_INTRINSIC(vector_qshlq_n_v8u16, "vector_qshlq_n_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, { kArgTyV8U16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qshl_n_u32v2, "vector_qshl_n_u32v2", 1, +DEF_MIR_INTRINSIC(vector_qshl_n_v2u32, "vector_qshl_n_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, { kArgTyV2U32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qshlq_n_u32v4, "vector_qshlq_n_u32v4", 1, +DEF_MIR_INTRINSIC(vector_qshlq_n_v4u32, "vector_qshlq_n_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, { kArgTyV4U32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qshl_n_u64v1, "vector_qshl_n_u64v1", 1, +DEF_MIR_INTRINSIC(vector_qshl_n_v1u64, "vector_qshl_n_v1u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1U64, { kArgTyV1U64, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qshlq_n_u64v2, "vector_qshlq_n_u64v2", 1, +DEF_MIR_INTRINSIC(vector_qshlq_n_v2u64, "vector_qshlq_n_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, { kArgTyV2U64, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qshlu_n_u8v8, "vector_qshlu_n_u8v8", 1, +DEF_MIR_INTRINSIC(vector_qshlu_n_v8u8, "vector_qshlu_n_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, { kArgTyV8I8, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qshluq_n_u8v16, "vector_qshluq_n_u8v16", 1, +DEF_MIR_INTRINSIC(vector_qshluq_n_v16u8, "vector_qshluq_n_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, { kArgTyV16I8, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qshlu_n_u16v4, "vector_qshlu_n_u16v4", 1, +DEF_MIR_INTRINSIC(vector_qshlu_n_v4u16, "vector_qshlu_n_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, { kArgTyV4I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qshluq_n_u16v8, "vector_qshluq_n_u16v8", 1, +DEF_MIR_INTRINSIC(vector_qshluq_n_v8u16, "vector_qshluq_n_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, { kArgTyV8I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qshlu_n_u32v2, "vector_qshlu_n_u32v2", 1, +DEF_MIR_INTRINSIC(vector_qshlu_n_v2u32, "vector_qshlu_n_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, { kArgTyV2I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qshluq_n_u32v4, "vector_qshluq_n_u32v4", 1, +DEF_MIR_INTRINSIC(vector_qshluq_n_v4u32, "vector_qshluq_n_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, { kArgTyV4I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qshlu_n_u64v1, "vector_qshlu_n_u64v1", 1, +DEF_MIR_INTRINSIC(vector_qshlu_n_v1u64, "vector_qshlu_n_v1u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1U64, { kArgTyV1I64, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qshluq_n_u64v2, "vector_qshluq_n_u64v2", 1, +DEF_MIR_INTRINSIC(vector_qshluq_n_v2u64, "vector_qshluq_n_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, { kArgTyV2I64, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_rshl_i8v8, "vector_rshl_i8v8", 1, +DEF_MIR_INTRINSIC(vector_rshl_v8i8, "vector_rshl_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, { kArgTyV8I8, kArgTyV8I8 }) -DEF_MIR_INTRINSIC(vector_rshlq_i8v16, "vector_rshlq_i8v16", 1, +DEF_MIR_INTRINSIC(vector_rshlq_v16i8, "vector_rshlq_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, { kArgTyV16I8, kArgTyV16I8 }) -DEF_MIR_INTRINSIC(vector_rshl_i16v4, "vector_rshl_i16v4", 1, +DEF_MIR_INTRINSIC(vector_rshl_v4i16, "vector_rshl_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, { kArgTyV4I16, kArgTyV4I16 }) -DEF_MIR_INTRINSIC(vector_rshlq_i16v8, "vector_rshlq_i16v8", 1, +DEF_MIR_INTRINSIC(vector_rshlq_v8i16, "vector_rshlq_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, { kArgTyV8I16, kArgTyV8I16 }) -DEF_MIR_INTRINSIC(vector_rshl_i32v2, "vector_rshl_i32v2", 1, +DEF_MIR_INTRINSIC(vector_rshl_v2i32, "vector_rshl_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, { kArgTyV2I32, kArgTyV2I32 }) -DEF_MIR_INTRINSIC(vector_rshlq_i32v4, "vector_rshlq_i32v4", 1, +DEF_MIR_INTRINSIC(vector_rshlq_v4i32, "vector_rshlq_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV4I32 }) -DEF_MIR_INTRINSIC(vector_rshl_i64v1, "vector_rshl_i64v1", 1, +DEF_MIR_INTRINSIC(vector_rshl_v1i64, "vector_rshl_v1i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1I64, { kArgTyV1I64, kArgTyV1I64 }) -DEF_MIR_INTRINSIC(vector_rshlq_i64v2, "vector_rshlq_i64v2", 1, +DEF_MIR_INTRINSIC(vector_rshlq_v2i64, "vector_rshlq_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV2I64, kArgTyV2I64 }) -DEF_MIR_INTRINSIC(vector_rshl_u8v8, "vector_rshl_u8v8", 1, +DEF_MIR_INTRINSIC(vector_rshl_v8u8, "vector_rshl_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, { kArgTyV8U8, kArgTyV8I8 }) -DEF_MIR_INTRINSIC(vector_rshlq_u8v16, "vector_rshlq_u8v16", 1, +DEF_MIR_INTRINSIC(vector_rshlq_v16u8, "vector_rshlq_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, { kArgTyV16U8, kArgTyV16I8 }) -DEF_MIR_INTRINSIC(vector_rshl_u16v4, "vector_rshl_u16v4", 1, +DEF_MIR_INTRINSIC(vector_rshl_v4u16, "vector_rshl_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, { kArgTyV4U16, kArgTyV4I16 }) -DEF_MIR_INTRINSIC(vector_rshlq_u16v8, "vector_rshlq_u16v8", 1, +DEF_MIR_INTRINSIC(vector_rshlq_v8u16, "vector_rshlq_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, { kArgTyV8U16, kArgTyV8I16 }) -DEF_MIR_INTRINSIC(vector_rshl_u32v2, "vector_rshl_u32v2", 1, +DEF_MIR_INTRINSIC(vector_rshl_v2u32, "vector_rshl_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, { kArgTyV2U32, kArgTyV2I32 }) -DEF_MIR_INTRINSIC(vector_rshlq_u32v4, "vector_rshlq_u32v4", 1, +DEF_MIR_INTRINSIC(vector_rshlq_v4u32, "vector_rshlq_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, { kArgTyV4U32, kArgTyV4I32 }) -DEF_MIR_INTRINSIC(vector_rshl_u64v1, "vector_rshl_u64v1", 1, +DEF_MIR_INTRINSIC(vector_rshl_v1u64, "vector_rshl_v1u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1U64, { kArgTyV1U64, kArgTyV1I64 }) -DEF_MIR_INTRINSIC(vector_rshlq_u64v2, "vector_rshlq_u64v2", 1, +DEF_MIR_INTRINSIC(vector_rshlq_v2u64, "vector_rshlq_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, { kArgTyV2U64, kArgTyV2I64 }) -DEF_MIR_INTRINSIC(vector_qrshl_i8v8, "vector_qrshl_i8v8", 1, +DEF_MIR_INTRINSIC(vector_qrshl_v8i8, "vector_qrshl_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, { kArgTyV8I8, kArgTyV8I8 }) -DEF_MIR_INTRINSIC(vector_qrshlq_i8v16, "vector_qrshlq_i8v16", 1, +DEF_MIR_INTRINSIC(vector_qrshlq_v16i8, "vector_qrshlq_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, { kArgTyV16I8, kArgTyV16I8 }) -DEF_MIR_INTRINSIC(vector_qrshl_i16v4, "vector_qrshl_i16v4", 1, +DEF_MIR_INTRINSIC(vector_qrshl_v4i16, "vector_qrshl_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, { kArgTyV4I16, kArgTyV4I16 }) -DEF_MIR_INTRINSIC(vector_qrshlq_i16v8, "vector_qrshlq_i16v8", 1, +DEF_MIR_INTRINSIC(vector_qrshlq_v8i16, "vector_qrshlq_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, { kArgTyV8I16, kArgTyV8I16 }) -DEF_MIR_INTRINSIC(vector_qrshl_i32v2, "vector_qrshl_i32v2", 1, +DEF_MIR_INTRINSIC(vector_qrshl_v2i32, "vector_qrshl_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, { kArgTyV2I32, kArgTyV2I32 }) -DEF_MIR_INTRINSIC(vector_qrshlq_i32v4, "vector_qrshlq_i32v4", 1, +DEF_MIR_INTRINSIC(vector_qrshlq_v4i32, "vector_qrshlq_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV4I32 }) -DEF_MIR_INTRINSIC(vector_qrshl_i64v1, "vector_qrshl_i64v1", 1, +DEF_MIR_INTRINSIC(vector_qrshl_v1i64, "vector_qrshl_v1i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1I64, { kArgTyV1I64, kArgTyV1I64 }) -DEF_MIR_INTRINSIC(vector_qrshlq_i64v2, "vector_qrshlq_i64v2", 1, +DEF_MIR_INTRINSIC(vector_qrshlq_v2i64, "vector_qrshlq_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV2I64, kArgTyV2I64 }) -DEF_MIR_INTRINSIC(vector_qrshl_u8v8, "vector_qrshl_u8v8", 1, +DEF_MIR_INTRINSIC(vector_qrshl_v8u8, "vector_qrshl_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, { kArgTyV8U8, kArgTyV8I8 }) -DEF_MIR_INTRINSIC(vector_qrshlq_u8v16, "vector_qrshlq_u8v16", 1, +DEF_MIR_INTRINSIC(vector_qrshlq_v16u8, "vector_qrshlq_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, { kArgTyV16U8, kArgTyV16I8 }) -DEF_MIR_INTRINSIC(vector_qrshl_u16v4, "vector_qrshl_u16v4", 1, +DEF_MIR_INTRINSIC(vector_qrshl_v4u16, "vector_qrshl_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, { kArgTyV4U16, kArgTyV4I16 }) -DEF_MIR_INTRINSIC(vector_qrshlq_u16v8, "vector_qrshlq_u16v8", 1, +DEF_MIR_INTRINSIC(vector_qrshlq_v8u16, "vector_qrshlq_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, { kArgTyV8U16, kArgTyV8I16 }) -DEF_MIR_INTRINSIC(vector_qrshl_u32v2, "vector_qrshl_u32v2", 1, +DEF_MIR_INTRINSIC(vector_qrshl_v2u32, "vector_qrshl_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, { kArgTyV2U32, kArgTyV2I32 }) -DEF_MIR_INTRINSIC(vector_qrshlq_u32v4, "vector_qrshlq_u32v4", 1, +DEF_MIR_INTRINSIC(vector_qrshlq_v4u32, "vector_qrshlq_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, { kArgTyV4U32, kArgTyV4I32 }) -DEF_MIR_INTRINSIC(vector_qrshl_u64v1, "vector_qrshl_u64v1", 1, +DEF_MIR_INTRINSIC(vector_qrshl_v1u64, "vector_qrshl_v1u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1U64, { kArgTyV1U64, kArgTyV1I64 }) -DEF_MIR_INTRINSIC(vector_qrshlq_u64v2, "vector_qrshlq_u64v2", 1, +DEF_MIR_INTRINSIC(vector_qrshlq_v2u64, "vector_qrshlq_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, { kArgTyV2U64, kArgTyV2I64 }) -DEF_MIR_INTRINSIC(vector_shll_n_i16v8, "vector_shll_n_i16v8", 1, +DEF_MIR_INTRINSIC(vector_shll_n_v8i16, "vector_shll_n_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, { kArgTyV8I8, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_shll_n_i32v4, "vector_shll_n_i32v4", 1, +DEF_MIR_INTRINSIC(vector_shll_n_v4i32, "vector_shll_n_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_shll_n_i64v2, "vector_shll_n_i64v2", 1, +DEF_MIR_INTRINSIC(vector_shll_n_v2i64, "vector_shll_n_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV2I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_shll_n_u16v8, "vector_shll_n_u16v8", 1, +DEF_MIR_INTRINSIC(vector_shll_n_v8u16, "vector_shll_n_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, { kArgTyV8U8, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_shll_n_u32v4, "vector_shll_n_u32v4", 1, +DEF_MIR_INTRINSIC(vector_shll_n_v4u32, "vector_shll_n_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, { kArgTyV4U16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_shll_n_u64v2, "vector_shll_n_u64v2", 1, +DEF_MIR_INTRINSIC(vector_shll_n_v2u64, "vector_shll_n_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, { kArgTyV2U32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_shll_high_n_i16v8, "vector_shll_high_n_i16v8", 1, +DEF_MIR_INTRINSIC(vector_shll_high_n_v8i16, "vector_shll_high_n_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, { kArgTyV16I8, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_shll_high_n_i32v4, "vector_shll_high_n_i32v4", 1, +DEF_MIR_INTRINSIC(vector_shll_high_n_v4i32, "vector_shll_high_n_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV8I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_shll_high_n_i64v2, "vector_shll_high_n_i64v2", 1, +DEF_MIR_INTRINSIC(vector_shll_high_n_v2i64, "vector_shll_high_n_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV4I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_shll_high_n_u16v8, "vector_shll_high_n_u16v8", 1, +DEF_MIR_INTRINSIC(vector_shll_high_n_v8u16, "vector_shll_high_n_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, { kArgTyV16U8, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_shll_high_n_u32v4, "vector_shll_high_n_u32v4", 1, +DEF_MIR_INTRINSIC(vector_shll_high_n_v4u32, "vector_shll_high_n_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, { kArgTyV8U16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_shll_high_n_u64v2, "vector_shll_high_n_u64v2", 1, +DEF_MIR_INTRINSIC(vector_shll_high_n_v2u64, "vector_shll_high_n_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, { kArgTyV4U32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_sli_n_i8v8, "vector_sli_n_i8v8", 1, +DEF_MIR_INTRINSIC(vector_sli_n_v8i8, "vector_sli_n_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, { kArgTyV8I8, kArgTyV8I8, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_sliq_n_i8v16, "vector_sliq_n_i8v16", 1, +DEF_MIR_INTRINSIC(vector_sliq_n_v16i8, "vector_sliq_n_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, { kArgTyV16I8, kArgTyV16I8, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_sli_n_i16v4, "vector_sli_n_i16v4", 1, +DEF_MIR_INTRINSIC(vector_sli_n_v4i16, "vector_sli_n_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, { kArgTyV4I16, kArgTyV4I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_sliq_n_i16v8, "vector_sliq_n_i16v8", 1, +DEF_MIR_INTRINSIC(vector_sliq_n_v8i16, "vector_sliq_n_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, { kArgTyV8I16, kArgTyV8I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_sli_n_i32v2, "vector_sli_n_i32v2", 1, +DEF_MIR_INTRINSIC(vector_sli_n_v2i32, "vector_sli_n_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, { kArgTyV2I32, kArgTyV2I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_sliq_n_i32v4, "vector_sliq_n_i32v4", 1, +DEF_MIR_INTRINSIC(vector_sliq_n_v4i32, "vector_sliq_n_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV4I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_sli_n_i64v1, "vector_sli_n_i64v1", 1, +DEF_MIR_INTRINSIC(vector_sli_n_v1i64, "vector_sli_n_v1i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1I64, { kArgTyV1I64, kArgTyV1I64, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_sliq_n_i64v2, "vector_sliq_n_i64v2", 1, +DEF_MIR_INTRINSIC(vector_sliq_n_v2i64, "vector_sliq_n_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV2I64, kArgTyV2I64, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_sli_n_u8v8, "vector_sli_n_u8v8", 1, +DEF_MIR_INTRINSIC(vector_sli_n_v8u8, "vector_sli_n_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, { kArgTyV8U8, kArgTyV8U8, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_sliq_n_u8v16, "vector_sliq_n_u8v16", 1, +DEF_MIR_INTRINSIC(vector_sliq_n_v16u8, "vector_sliq_n_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, { kArgTyV16U8, kArgTyV16U8, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_sli_n_u16v4, "vector_sli_n_u16v4", 1, +DEF_MIR_INTRINSIC(vector_sli_n_v4u16, "vector_sli_n_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, { kArgTyV4U16, kArgTyV4U16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_sliq_n_u16v8, "vector_sliq_n_u16v8", 1, +DEF_MIR_INTRINSIC(vector_sliq_n_v8u16, "vector_sliq_n_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, { kArgTyV8U16, kArgTyV8U16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_sli_n_u32v2, "vector_sli_n_u32v2", 1, +DEF_MIR_INTRINSIC(vector_sli_n_v2u32, "vector_sli_n_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, { kArgTyV2U32, kArgTyV2U32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_sliq_n_u32v4, "vector_sliq_n_u32v4", 1, +DEF_MIR_INTRINSIC(vector_sliq_n_v4u32, "vector_sliq_n_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, { kArgTyV4U32, kArgTyV4U32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_sli_n_u64v1, "vector_sli_n_u64v1", 1, +DEF_MIR_INTRINSIC(vector_sli_n_v1u64, "vector_sli_n_v1u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1U64, { kArgTyV1U64, kArgTyV1U64, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_sliq_n_u64v2, "vector_sliq_n_u64v2", 1, +DEF_MIR_INTRINSIC(vector_sliq_n_v2u64, "vector_sliq_n_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, { kArgTyV2U64, kArgTyV2U64, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_rshr_n_i8v8, "vector_rshr_n_i8v8", 1, +DEF_MIR_INTRINSIC(vector_rshr_n_v8i8, "vector_rshr_n_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, { kArgTyV8I8, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_rshrq_n_i8v16, "vector_rshrq_n_i8v16", 1, +DEF_MIR_INTRINSIC(vector_rshrq_n_v16i8, "vector_rshrq_n_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, { kArgTyV16I8, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_rshr_n_i16v4, "vector_rshr_n_i16v4", 1, +DEF_MIR_INTRINSIC(vector_rshr_n_v4i16, "vector_rshr_n_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, { kArgTyV4I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_rshrq_n_i16v8, "vector_rshrq_n_i16v8", 1, +DEF_MIR_INTRINSIC(vector_rshrq_n_v8i16, "vector_rshrq_n_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, { kArgTyV8I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_rshr_n_i32v2, "vector_rshr_n_i32v2", 1, +DEF_MIR_INTRINSIC(vector_rshr_n_v2i32, "vector_rshr_n_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, { kArgTyV2I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_rshrq_n_i32v4, "vector_rshrq_n_i32v4", 1, +DEF_MIR_INTRINSIC(vector_rshrq_n_v4i32, "vector_rshrq_n_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_rshrq_n_i64v2, "vector_rshrq_n_i64v2", 1, +DEF_MIR_INTRINSIC(vector_rshrq_n_v2i64, "vector_rshrq_n_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV2I64, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_rshr_n_u8v8, "vector_rshr_n_u8v8", 1, +DEF_MIR_INTRINSIC(vector_rshr_n_v8u8, "vector_rshr_n_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, { kArgTyV8U8, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_rshrq_n_u8v16, "vector_rshrq_n_u8v16", 1, +DEF_MIR_INTRINSIC(vector_rshrq_n_v16u8, "vector_rshrq_n_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, { kArgTyV16U8, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_rshr_n_u16v4, "vector_rshr_n_u16v4", 1, +DEF_MIR_INTRINSIC(vector_rshr_n_v4u16, "vector_rshr_n_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, { kArgTyV4U16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_rshrq_n_u16v8, "vector_rshrq_n_u16v8", 1, +DEF_MIR_INTRINSIC(vector_rshrq_n_v8u16, "vector_rshrq_n_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, { kArgTyV8U16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_rshr_n_u32v2, "vector_rshr_n_u32v2", 1, +DEF_MIR_INTRINSIC(vector_rshr_n_v2u32, "vector_rshr_n_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, { kArgTyV2U32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_rshrq_n_u32v4, "vector_rshrq_n_u32v4", 1, +DEF_MIR_INTRINSIC(vector_rshrq_n_v4u32, "vector_rshrq_n_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, { kArgTyV4U32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_rshrq_n_u64v2, "vector_rshrq_n_u64v2", 1, +DEF_MIR_INTRINSIC(vector_rshrq_n_v2u64, "vector_rshrq_n_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, { kArgTyV2U64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_rshrd_n_i64, "vector_rshrd_n_i64", 1, @@ -3050,46 +3050,46 @@ DEF_MIR_INTRINSIC(vector_rshrd_n_i64, "vector_rshrd_n_i64", 1, DEF_MIR_INTRINSIC(vector_rshrd_n_u64, "vector_rshrd_n_u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU64, { kArgTyU64, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_sra_n_i8v8, "vector_sra_n_i8v8", 1, +DEF_MIR_INTRINSIC(vector_sra_n_v8i8, "vector_sra_n_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, { kArgTyV8I8, kArgTyV8I8, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_sraq_n_i8v16, "vector_sraq_n_i8v16", 1, +DEF_MIR_INTRINSIC(vector_sraq_n_v16i8, "vector_sraq_n_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, { kArgTyV16I8, kArgTyV16I8, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_sra_n_i16v4, "vector_sra_n_i16v4", 1, +DEF_MIR_INTRINSIC(vector_sra_n_v4i16, "vector_sra_n_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, { kArgTyV4I16, kArgTyV4I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_sraq_n_i16v8, "vector_sraq_n_i16v8", 1, +DEF_MIR_INTRINSIC(vector_sraq_n_v8i16, "vector_sraq_n_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, { kArgTyV8I16, kArgTyV8I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_sra_n_i32v2, "vector_sra_n_i32v2", 1, +DEF_MIR_INTRINSIC(vector_sra_n_v2i32, "vector_sra_n_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, { kArgTyV2I32, kArgTyV2I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_sraq_n_i32v4, "vector_sraq_n_i32v4", 1, +DEF_MIR_INTRINSIC(vector_sraq_n_v4i32, "vector_sraq_n_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV4I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_sraq_n_i64v2, "vector_sraq_n_i64v2", 1, +DEF_MIR_INTRINSIC(vector_sraq_n_v2i64, "vector_sraq_n_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV2I64, kArgTyV2I64, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_sra_n_u8v8, "vector_sra_n_u8v8", 1, +DEF_MIR_INTRINSIC(vector_sra_n_v8u8, "vector_sra_n_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, { kArgTyV8U8, kArgTyV8U8, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_sraq_n_u8v16, "vector_sraq_n_u8v16", 1, +DEF_MIR_INTRINSIC(vector_sraq_n_v16u8, "vector_sraq_n_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, { kArgTyV16U8, kArgTyV16U8, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_sra_n_u16v4, "vector_sra_n_u16v4", 1, +DEF_MIR_INTRINSIC(vector_sra_n_v4u16, "vector_sra_n_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, { kArgTyV4U16, kArgTyV4U16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_sraq_n_u16v8, "vector_sraq_n_u16v8", 1, +DEF_MIR_INTRINSIC(vector_sraq_n_v8u16, "vector_sraq_n_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, { kArgTyV8U16, kArgTyV8U16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_sra_n_u32v2, "vector_sra_n_u32v2", 1, +DEF_MIR_INTRINSIC(vector_sra_n_v2u32, "vector_sra_n_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, { kArgTyV2U32, kArgTyV2U32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_sraq_n_u32v4, "vector_sraq_n_u32v4", 1, +DEF_MIR_INTRINSIC(vector_sraq_n_v4u32, "vector_sraq_n_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, { kArgTyV4U32, kArgTyV4U32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_sraq_n_u64v2, "vector_sraq_n_u64v2", 1, +DEF_MIR_INTRINSIC(vector_sraq_n_v2u64, "vector_sraq_n_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, { kArgTyV2U64, kArgTyV2U64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_srad_n_i64, "vector_srad_n_i64", 1, @@ -3098,46 +3098,46 @@ DEF_MIR_INTRINSIC(vector_srad_n_i64, "vector_srad_n_i64", 1, DEF_MIR_INTRINSIC(vector_srad_n_u64, "vector_srad_n_u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU64, { kArgTyU64, kArgTyU64, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_rsra_n_i8v8, "vector_rsra_n_i8v8", 1, +DEF_MIR_INTRINSIC(vector_rsra_n_v8i8, "vector_rsra_n_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, { kArgTyV8I8, kArgTyV8I8, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_rsraq_n_i8v16, "vector_rsraq_n_i8v16", 1, +DEF_MIR_INTRINSIC(vector_rsraq_n_v16i8, "vector_rsraq_n_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, { kArgTyV16I8, kArgTyV16I8, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_rsra_n_i16v4, "vector_rsra_n_i16v4", 1, +DEF_MIR_INTRINSIC(vector_rsra_n_v4i16, "vector_rsra_n_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, { kArgTyV4I16, kArgTyV4I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_rsraq_n_i16v8, "vector_rsraq_n_i16v8", 1, +DEF_MIR_INTRINSIC(vector_rsraq_n_v8i16, "vector_rsraq_n_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, { kArgTyV8I16, kArgTyV8I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_rsra_n_i32v2, "vector_rsra_n_i32v2", 1, +DEF_MIR_INTRINSIC(vector_rsra_n_v2i32, "vector_rsra_n_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, { kArgTyV2I32, kArgTyV2I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_rsraq_n_i32v4, "vector_rsraq_n_i32v4", 1, +DEF_MIR_INTRINSIC(vector_rsraq_n_v4i32, "vector_rsraq_n_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV4I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_rsraq_n_i64v2, "vector_rsraq_n_i64v2", 1, +DEF_MIR_INTRINSIC(vector_rsraq_n_v2i64, "vector_rsraq_n_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV2I64, kArgTyV2I64, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_rsra_n_u8v8, "vector_rsra_n_u8v8", 1, +DEF_MIR_INTRINSIC(vector_rsra_n_v8u8, "vector_rsra_n_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, { kArgTyV8U8, kArgTyV8U8, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_rsraq_n_u8v16, "vector_rsraq_n_u8v16", 1, +DEF_MIR_INTRINSIC(vector_rsraq_n_v16u8, "vector_rsraq_n_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, { kArgTyV16U8, kArgTyV16U8, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_rsra_n_u16v4, "vector_rsra_n_u16v4", 1, +DEF_MIR_INTRINSIC(vector_rsra_n_v4u16, "vector_rsra_n_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, { kArgTyV4U16, kArgTyV4U16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_rsraq_n_u16v8, "vector_rsraq_n_u16v8", 1, +DEF_MIR_INTRINSIC(vector_rsraq_n_v8u16, "vector_rsraq_n_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, { kArgTyV8U16, kArgTyV8U16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_rsra_n_u32v2, "vector_rsra_n_u32v2", 1, +DEF_MIR_INTRINSIC(vector_rsra_n_v2u32, "vector_rsra_n_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, { kArgTyV2U32, kArgTyV2U32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_rsraq_n_u32v4, "vector_rsraq_n_u32v4", 1, +DEF_MIR_INTRINSIC(vector_rsraq_n_v4u32, "vector_rsraq_n_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, { kArgTyV4U32, kArgTyV4U32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_rsraq_n_u64v2, "vector_rsraq_n_u64v2", 1, +DEF_MIR_INTRINSIC(vector_rsraq_n_v2u64, "vector_rsraq_n_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, { kArgTyV2U64, kArgTyV2U64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_rsrad_n_i64, "vector_rsrad_n_i64", 1, @@ -3146,226 +3146,226 @@ DEF_MIR_INTRINSIC(vector_rsrad_n_i64, "vector_rsrad_n_i64", 1, DEF_MIR_INTRINSIC(vector_rsrad_n_u64, "vector_rsrad_n_u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU64, { kArgTyU64, kArgTyU64, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_shrn_n_i8v8, "vector_shrn_n_i8v8", 1, +DEF_MIR_INTRINSIC(vector_shrn_n_v8i8, "vector_shrn_n_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, { kArgTyV8I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_shrn_n_i16v4, "vector_shrn_n_i16v4", 1, +DEF_MIR_INTRINSIC(vector_shrn_n_v4i16, "vector_shrn_n_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, { kArgTyV4I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_shrn_n_i32v2, "vector_shrn_n_i32v2", 1, +DEF_MIR_INTRINSIC(vector_shrn_n_v2i32, "vector_shrn_n_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, { kArgTyV2I64, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_shrn_n_u8v8, "vector_shrn_n_u8v8", 1, +DEF_MIR_INTRINSIC(vector_shrn_n_v8u8, "vector_shrn_n_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, { kArgTyV8U16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_shrn_n_u16v4, "vector_shrn_n_u16v4", 1, +DEF_MIR_INTRINSIC(vector_shrn_n_v4u16, "vector_shrn_n_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, { kArgTyV4U32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_shrn_n_u32v2, "vector_shrn_n_u32v2", 1, +DEF_MIR_INTRINSIC(vector_shrn_n_v2u32, "vector_shrn_n_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, { kArgTyV2U64, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_shrn_high_n_i8v16, "vector_shrn_high_n_i8v16", 1, +DEF_MIR_INTRINSIC(vector_shrn_high_n_v16i8, "vector_shrn_high_n_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, { kArgTyV8I8, kArgTyV8I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_shrn_high_n_i16v8, "vector_shrn_high_n_i16v8", 1, +DEF_MIR_INTRINSIC(vector_shrn_high_n_v8i16, "vector_shrn_high_n_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, { kArgTyV4I16, kArgTyV4I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_shrn_high_n_i32v4, "vector_shrn_high_n_i32v4", 1, +DEF_MIR_INTRINSIC(vector_shrn_high_n_v4i32, "vector_shrn_high_n_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV2I32, kArgTyV2I64, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_shrn_high_n_u8v16, "vector_shrn_high_n_u8v16", 1, +DEF_MIR_INTRINSIC(vector_shrn_high_n_v16u8, "vector_shrn_high_n_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, { kArgTyV8U8, kArgTyV8U16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_shrn_high_n_u16v8, "vector_shrn_high_n_u16v8", 1, +DEF_MIR_INTRINSIC(vector_shrn_high_n_v8u16, "vector_shrn_high_n_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, { kArgTyV4U16, kArgTyV4U32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_shrn_high_n_u32v4, "vector_shrn_high_n_u32v4", 1, +DEF_MIR_INTRINSIC(vector_shrn_high_n_v4u32, "vector_shrn_high_n_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, { kArgTyV2U32, kArgTyV2U64, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qshrun_n_u8v8, "vector_qshrun_n_u8v8", 1, +DEF_MIR_INTRINSIC(vector_qshrun_n_v8u8, "vector_qshrun_n_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, { kArgTyV8I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qshrun_n_u16v4, "vector_qshrun_n_u16v4", 1, +DEF_MIR_INTRINSIC(vector_qshrun_n_v4u16, "vector_qshrun_n_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, { kArgTyV4I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qshrun_n_u32v2, "vector_qshrun_n_u32v2", 1, +DEF_MIR_INTRINSIC(vector_qshrun_n_v2u32, "vector_qshrun_n_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, { kArgTyV2I64, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qshrun_high_n_u8v16, "vector_qshrun_high_n_u8v16", 1, +DEF_MIR_INTRINSIC(vector_qshrun_high_n_v16u8, "vector_qshrun_high_n_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, { kArgTyV8U8, kArgTyV8I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qshrun_high_n_u16v8, "vector_qshrun_high_n_u16v8", 1, +DEF_MIR_INTRINSIC(vector_qshrun_high_n_v8u16, "vector_qshrun_high_n_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, { kArgTyV4U16, kArgTyV4I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qshrun_high_n_u32v4, "vector_qshrun_high_n_u32v4", 1, +DEF_MIR_INTRINSIC(vector_qshrun_high_n_v4u32, "vector_qshrun_high_n_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, { kArgTyV2U32, kArgTyV2I64, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qshrn_n_i8v8, "vector_qshrn_n_i8v8", 1, +DEF_MIR_INTRINSIC(vector_qshrn_n_v8i8, "vector_qshrn_n_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, { kArgTyV8I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qshrn_n_i16v4, "vector_qshrn_n_i16v4", 1, +DEF_MIR_INTRINSIC(vector_qshrn_n_v4i16, "vector_qshrn_n_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, { kArgTyV4I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qshrn_n_i32v2, "vector_qshrn_n_i32v2", 1, +DEF_MIR_INTRINSIC(vector_qshrn_n_v2i32, "vector_qshrn_n_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, { kArgTyV2I64, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qshrn_n_u8v8, "vector_qshrn_n_u8v8", 1, +DEF_MIR_INTRINSIC(vector_qshrn_n_v8u8, "vector_qshrn_n_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, { kArgTyV8U16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qshrn_n_u16v4, "vector_qshrn_n_u16v4", 1, +DEF_MIR_INTRINSIC(vector_qshrn_n_v4u16, "vector_qshrn_n_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, { kArgTyV4U32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qshrn_n_u32v2, "vector_qshrn_n_u32v2", 1, +DEF_MIR_INTRINSIC(vector_qshrn_n_v2u32, "vector_qshrn_n_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, { kArgTyV2U64, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qshrn_high_n_i8v16, "vector_qshrn_high_n_i8v16", 1, +DEF_MIR_INTRINSIC(vector_qshrn_high_n_v16i8, "vector_qshrn_high_n_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, { kArgTyV8I8, kArgTyV8I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qshrn_high_n_i16v8, "vector_qshrn_high_n_i16v8", 1, +DEF_MIR_INTRINSIC(vector_qshrn_high_n_v8i16, "vector_qshrn_high_n_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, { kArgTyV4I16, kArgTyV4I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qshrn_high_n_i32v4, "vector_qshrn_high_n_i32v4", 1, +DEF_MIR_INTRINSIC(vector_qshrn_high_n_v4i32, "vector_qshrn_high_n_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV2I32, kArgTyV2I64, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qshrn_high_n_u8v16, "vector_qshrn_high_n_u8v16", 1, +DEF_MIR_INTRINSIC(vector_qshrn_high_n_v16u8, "vector_qshrn_high_n_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, { kArgTyV8U8, kArgTyV8U16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qshrn_high_n_u16v8, "vector_qshrn_high_n_u16v8", 1, +DEF_MIR_INTRINSIC(vector_qshrn_high_n_v8u16, "vector_qshrn_high_n_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, { kArgTyV4U16, kArgTyV4U32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qshrn_high_n_u32v4, "vector_qshrn_high_n_u32v4", 1, +DEF_MIR_INTRINSIC(vector_qshrn_high_n_v4u32, "vector_qshrn_high_n_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, { kArgTyV2U32, kArgTyV2U64, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qrshrun_n_u8v8, "vector_qrshrun_n_u8v8", 1, +DEF_MIR_INTRINSIC(vector_qrshrun_n_v8u8, "vector_qrshrun_n_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, { kArgTyV8I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qrshrun_n_u16v4, "vector_qrshrun_n_u16v4", 1, +DEF_MIR_INTRINSIC(vector_qrshrun_n_v4u16, "vector_qrshrun_n_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, { kArgTyV4I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qrshrun_n_u32v2, "vector_qrshrun_n_u32v2", 1, +DEF_MIR_INTRINSIC(vector_qrshrun_n_v2u32, "vector_qrshrun_n_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, { kArgTyV2I64, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qrshrun_high_n_u8v16, "vector_qrshrun_high_n_u8v16", 1, +DEF_MIR_INTRINSIC(vector_qrshrun_high_n_v16u8, "vector_qrshrun_high_n_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, { kArgTyV8U8, kArgTyV8I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qrshrun_high_n_u16v8, "vector_qrshrun_high_n_u16v8", 1, +DEF_MIR_INTRINSIC(vector_qrshrun_high_n_v8u16, "vector_qrshrun_high_n_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, { kArgTyV4U16, kArgTyV4I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qrshrun_high_n_u32v4, "vector_qrshrun_high_n_u32v4", 1, +DEF_MIR_INTRINSIC(vector_qrshrun_high_n_v4u32, "vector_qrshrun_high_n_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, { kArgTyV2U32, kArgTyV2I64, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qrshrn_n_i8v8, "vector_qrshrn_n_i8v8", 1, +DEF_MIR_INTRINSIC(vector_qrshrn_n_v8i8, "vector_qrshrn_n_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, { kArgTyV8I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qrshrn_n_i16v4, "vector_qrshrn_n_i16v4", 1, +DEF_MIR_INTRINSIC(vector_qrshrn_n_v4i16, "vector_qrshrn_n_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, { kArgTyV4I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qrshrn_n_i32v2, "vector_qrshrn_n_i32v2", 1, +DEF_MIR_INTRINSIC(vector_qrshrn_n_v2i32, "vector_qrshrn_n_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, { kArgTyV2I64, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qrshrn_n_u8v8, "vector_qrshrn_n_u8v8", 1, +DEF_MIR_INTRINSIC(vector_qrshrn_n_v8u8, "vector_qrshrn_n_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, { kArgTyV8U16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qrshrn_n_u16v4, "vector_qrshrn_n_u16v4", 1, +DEF_MIR_INTRINSIC(vector_qrshrn_n_v4u16, "vector_qrshrn_n_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, { kArgTyV4U32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qrshrn_n_u32v2, "vector_qrshrn_n_u32v2", 1, +DEF_MIR_INTRINSIC(vector_qrshrn_n_v2u32, "vector_qrshrn_n_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, { kArgTyV2U64, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qrshrn_high_n_i8v16, "vector_qrshrn_high_n_i8v16", 1, +DEF_MIR_INTRINSIC(vector_qrshrn_high_n_v16i8, "vector_qrshrn_high_n_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, { kArgTyV8I8, kArgTyV8I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qrshrn_high_n_i16v8, "vector_qrshrn_high_n_i16v8", 1, +DEF_MIR_INTRINSIC(vector_qrshrn_high_n_v8i16, "vector_qrshrn_high_n_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, { kArgTyV4I16, kArgTyV4I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qrshrn_high_n_i32v4, "vector_qrshrn_high_n_i32v4", 1, +DEF_MIR_INTRINSIC(vector_qrshrn_high_n_v4i32, "vector_qrshrn_high_n_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV2I32, kArgTyV2I64, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qrshrn_high_n_u8v16, "vector_qrshrn_high_n_u8v16", 1, +DEF_MIR_INTRINSIC(vector_qrshrn_high_n_v16u8, "vector_qrshrn_high_n_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, { kArgTyV8U8, kArgTyV8U16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qrshrn_high_n_u16v8, "vector_qrshrn_high_n_u16v8", 1, +DEF_MIR_INTRINSIC(vector_qrshrn_high_n_v8u16, "vector_qrshrn_high_n_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, { kArgTyV4U16, kArgTyV4U32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_qrshrn_high_n_u32v4, "vector_qrshrn_high_n_u32v4", 1, +DEF_MIR_INTRINSIC(vector_qrshrn_high_n_v4u32, "vector_qrshrn_high_n_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, { kArgTyV2U32, kArgTyV2U64, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_rshrn_n_i8v8, "vector_rshrn_n_i8v8", 1, +DEF_MIR_INTRINSIC(vector_rshrn_n_v8i8, "vector_rshrn_n_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, { kArgTyV8I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_rshrn_n_i16v4, "vector_rshrn_n_i16v4", 1, +DEF_MIR_INTRINSIC(vector_rshrn_n_v4i16, "vector_rshrn_n_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, { kArgTyV4I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_rshrn_n_i32v2, "vector_rshrn_n_i32v2", 1, +DEF_MIR_INTRINSIC(vector_rshrn_n_v2i32, "vector_rshrn_n_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, { kArgTyV2I64, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_rshrn_n_u8v8, "vector_rshrn_n_u8v8", 1, +DEF_MIR_INTRINSIC(vector_rshrn_n_v8u8, "vector_rshrn_n_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, { kArgTyV8U16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_rshrn_n_u16v4, "vector_rshrn_n_u16v4", 1, +DEF_MIR_INTRINSIC(vector_rshrn_n_v4u16, "vector_rshrn_n_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, { kArgTyV4U32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_rshrn_n_u32v2, "vector_rshrn_n_u32v2", 1, +DEF_MIR_INTRINSIC(vector_rshrn_n_v2u32, "vector_rshrn_n_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, { kArgTyV2U64, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_rshrn_high_n_i8v16, "vector_rshrn_high_n_i8v16", 1, +DEF_MIR_INTRINSIC(vector_rshrn_high_n_v16i8, "vector_rshrn_high_n_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, { kArgTyV8I8, kArgTyV8I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_rshrn_high_n_i16v8, "vector_rshrn_high_n_i16v8", 1, +DEF_MIR_INTRINSIC(vector_rshrn_high_n_v8i16, "vector_rshrn_high_n_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, { kArgTyV4I16, kArgTyV4I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_rshrn_high_n_i32v4, "vector_rshrn_high_n_i32v4", 1, +DEF_MIR_INTRINSIC(vector_rshrn_high_n_v4i32, "vector_rshrn_high_n_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV2I32, kArgTyV2I64, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_rshrn_high_n_u8v16, "vector_rshrn_high_n_u8v16", 1, +DEF_MIR_INTRINSIC(vector_rshrn_high_n_v16u8, "vector_rshrn_high_n_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, { kArgTyV8U8, kArgTyV8U16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_rshrn_high_n_u16v8, "vector_rshrn_high_n_u16v8", 1, +DEF_MIR_INTRINSIC(vector_rshrn_high_n_v8u16, "vector_rshrn_high_n_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, { kArgTyV4U16, kArgTyV4U32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_rshrn_high_n_u32v4, "vector_rshrn_high_n_u32v4", 1, +DEF_MIR_INTRINSIC(vector_rshrn_high_n_v4u32, "vector_rshrn_high_n_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, { kArgTyV2U32, kArgTyV2U64, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_sri_n_i8v8, "vector_sri_n_i8v8", 1, +DEF_MIR_INTRINSIC(vector_sri_n_v8i8, "vector_sri_n_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, { kArgTyV8I8, kArgTyV8I8, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_sriq_n_i8v16, "vector_sriq_n_i8v16", 1, +DEF_MIR_INTRINSIC(vector_sriq_n_v16i8, "vector_sriq_n_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, { kArgTyV16I8, kArgTyV16I8, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_sri_n_i16v4, "vector_sri_n_i16v4", 1, +DEF_MIR_INTRINSIC(vector_sri_n_v4i16, "vector_sri_n_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, { kArgTyV4I16, kArgTyV4I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_sriq_n_i16v8, "vector_sriq_n_i16v8", 1, +DEF_MIR_INTRINSIC(vector_sriq_n_v8i16, "vector_sriq_n_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, { kArgTyV8I16, kArgTyV8I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_sri_n_i32v2, "vector_sri_n_i32v2", 1, +DEF_MIR_INTRINSIC(vector_sri_n_v2i32, "vector_sri_n_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, { kArgTyV2I32, kArgTyV2I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_sriq_n_i32v4, "vector_sriq_n_i32v4", 1, +DEF_MIR_INTRINSIC(vector_sriq_n_v4i32, "vector_sriq_n_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV4I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_sriq_n_i64v2, "vector_sriq_n_i64v2", 1, +DEF_MIR_INTRINSIC(vector_sriq_n_v2i64, "vector_sriq_n_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV2I64, kArgTyV2I64, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_sri_n_u8v8, "vector_sri_n_u8v8", 1, +DEF_MIR_INTRINSIC(vector_sri_n_v8u8, "vector_sri_n_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, { kArgTyV8U8, kArgTyV8U8, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_sriq_n_u8v16, "vector_sriq_n_u8v16", 1, +DEF_MIR_INTRINSIC(vector_sriq_n_v16u8, "vector_sriq_n_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, { kArgTyV16U8, kArgTyV16U8, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_sri_n_u16v4, "vector_sri_n_u16v4", 1, +DEF_MIR_INTRINSIC(vector_sri_n_v4u16, "vector_sri_n_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, { kArgTyV4U16, kArgTyV4U16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_sriq_n_u16v8, "vector_sriq_n_u16v8", 1, +DEF_MIR_INTRINSIC(vector_sriq_n_v8u16, "vector_sriq_n_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, { kArgTyV8U16, kArgTyV8U16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_sri_n_u32v2, "vector_sri_n_u32v2", 1, +DEF_MIR_INTRINSIC(vector_sri_n_v2u32, "vector_sri_n_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, { kArgTyV2U32, kArgTyV2U32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_sriq_n_u32v4, "vector_sriq_n_u32v4", 1, +DEF_MIR_INTRINSIC(vector_sriq_n_v4u32, "vector_sriq_n_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, { kArgTyV4U32, kArgTyV4U32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_sriq_n_u64v2, "vector_sriq_n_u64v2", 1, +DEF_MIR_INTRINSIC(vector_sriq_n_v2u64, "vector_sriq_n_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, { kArgTyV2U64, kArgTyV2U64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_srid_n_i64, "vector_srid_n_i64", 1, @@ -3374,315 +3374,315 @@ DEF_MIR_INTRINSIC(vector_srid_n_i64, "vector_srid_n_i64", 1, DEF_MIR_INTRINSIC(vector_srid_n_u64, "vector_srid_n_u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU64, { kArgTyU64, kArgTyU64, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mla_lane_i16v4, "vector_mla_lane_i16v4", 1, +DEF_MIR_INTRINSIC(vector_mla_lane_v4i16, "vector_mla_lane_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, { kArgTyV4I16, kArgTyV4I16, kArgTyV4I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mlaq_lane_i16v8, "vector_mlaq_lane_i16v8", 1, +DEF_MIR_INTRINSIC(vector_mlaq_lane_v8i16, "vector_mlaq_lane_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, { kArgTyV8I16, kArgTyV8I16, kArgTyV4I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mla_lane_i32v2, "vector_mla_lane_i32v2", 1, +DEF_MIR_INTRINSIC(vector_mla_lane_v2i32, "vector_mla_lane_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, { kArgTyV2I32, kArgTyV2I32, kArgTyV2I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mlaq_lane_i32v4, "vector_mlaq_lane_i32v4", 1, +DEF_MIR_INTRINSIC(vector_mlaq_lane_v4i32, "vector_mlaq_lane_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV4I32, kArgTyV2I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mla_lane_u16v4, "vector_mla_lane_u16v4", 1, +DEF_MIR_INTRINSIC(vector_mla_lane_v4u16, "vector_mla_lane_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, { kArgTyV4U16, kArgTyV4U16, kArgTyV4U16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mlaq_lane_u16v8, "vector_mlaq_lane_u16v8", 1, +DEF_MIR_INTRINSIC(vector_mlaq_lane_v8u16, "vector_mlaq_lane_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, { kArgTyV8U16, kArgTyV8U16, kArgTyV4U16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mla_lane_u32v2, "vector_mla_lane_u32v2", 1, +DEF_MIR_INTRINSIC(vector_mla_lane_v2u32, "vector_mla_lane_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, { kArgTyV2U32, kArgTyV2U32, kArgTyV2U32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mlaq_lane_u32v4, "vector_mlaq_lane_u32v4", 1, +DEF_MIR_INTRINSIC(vector_mlaq_lane_v4u32, "vector_mlaq_lane_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, { kArgTyV4U32, kArgTyV4U32, kArgTyV2U32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mla_laneq_i16v4, "vector_mla_laneq_i16v4", 1, +DEF_MIR_INTRINSIC(vector_mla_laneq_v4i16, "vector_mla_laneq_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, { kArgTyV4I16, kArgTyV4I16, kArgTyV8I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mlaq_laneq_i16v8, "vector_mlaq_laneq_i16v8", 1, +DEF_MIR_INTRINSIC(vector_mlaq_laneq_v8i16, "vector_mlaq_laneq_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, { kArgTyV8I16, kArgTyV8I16, kArgTyV8I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mla_laneq_i32v2, "vector_mla_laneq_i32v2", 1, +DEF_MIR_INTRINSIC(vector_mla_laneq_v2i32, "vector_mla_laneq_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, { kArgTyV2I32, kArgTyV2I32, kArgTyV4I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mlaq_laneq_i32v4, "vector_mlaq_laneq_i32v4", 1, +DEF_MIR_INTRINSIC(vector_mlaq_laneq_v4i32, "vector_mlaq_laneq_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV4I32, kArgTyV4I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mla_laneq_u16v4, "vector_mla_laneq_u16v4", 1, +DEF_MIR_INTRINSIC(vector_mla_laneq_v4u16, "vector_mla_laneq_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, { kArgTyV4U16, kArgTyV4U16, kArgTyV8U16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mlaq_laneq_u16v8, "vector_mlaq_laneq_u16v8", 1, +DEF_MIR_INTRINSIC(vector_mlaq_laneq_v8u16, "vector_mlaq_laneq_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, { kArgTyV8U16, kArgTyV8U16, kArgTyV8U16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mla_laneq_u32v2, "vector_mla_laneq_u32v2", 1, +DEF_MIR_INTRINSIC(vector_mla_laneq_v2u32, "vector_mla_laneq_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, { kArgTyV2U32, kArgTyV2U32, kArgTyV4U32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mlaq_laneq_u32v4, "vector_mlaq_laneq_u32v4", 1, +DEF_MIR_INTRINSIC(vector_mlaq_laneq_v4u32, "vector_mlaq_laneq_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, { kArgTyV4U32, kArgTyV4U32, kArgTyV4U32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mlal_lane_i32v4, "vector_mlal_lane_i32v4", 1, +DEF_MIR_INTRINSIC(vector_mlal_lane_v4i32, "vector_mlal_lane_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV4I16, kArgTyV4I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mlal_lane_i64v2, "vector_mlal_lane_i64v2", 1, +DEF_MIR_INTRINSIC(vector_mlal_lane_v2i64, "vector_mlal_lane_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV2I64, kArgTyV2I32, kArgTyV2I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mlal_lane_u32v4, "vector_mlal_lane_u32v4", 1, +DEF_MIR_INTRINSIC(vector_mlal_lane_v4u32, "vector_mlal_lane_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, { kArgTyV4U32, kArgTyV4U16, kArgTyV4U16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mlal_lane_u64v2, "vector_mlal_lane_u64v2", 1, +DEF_MIR_INTRINSIC(vector_mlal_lane_v2u64, "vector_mlal_lane_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, { kArgTyV2U64, kArgTyV2U32, kArgTyV2U32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mlal_high_lane_i32v4, "vector_mlal_high_lane_i32v4", 1, +DEF_MIR_INTRINSIC(vector_mlal_high_lane_v4i32, "vector_mlal_high_lane_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV8I16, kArgTyV4I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mlal_high_lane_i64v2, "vector_mlal_high_lane_i64v2", 1, +DEF_MIR_INTRINSIC(vector_mlal_high_lane_v2i64, "vector_mlal_high_lane_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV2I64, kArgTyV4I32, kArgTyV2I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mlal_high_lane_u32v4, "vector_mlal_high_lane_u32v4", 1, +DEF_MIR_INTRINSIC(vector_mlal_high_lane_v4u32, "vector_mlal_high_lane_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, { kArgTyV4U32, kArgTyV8U16, kArgTyV4U16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mlal_high_lane_u64v2, "vector_mlal_high_lane_u64v2", 1, +DEF_MIR_INTRINSIC(vector_mlal_high_lane_v2u64, "vector_mlal_high_lane_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, { kArgTyV2U64, kArgTyV4U32, kArgTyV2U32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mlal_laneq_i32v4, "vector_mlal_laneq_i32v4", 1, +DEF_MIR_INTRINSIC(vector_mlal_laneq_v4i32, "vector_mlal_laneq_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV4I16, kArgTyV8I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mlal_laneq_i64v2, "vector_mlal_laneq_i64v2", 1, +DEF_MIR_INTRINSIC(vector_mlal_laneq_v2i64, "vector_mlal_laneq_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV2I64, kArgTyV2I32, kArgTyV4I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mlal_laneq_u32v4, "vector_mlal_laneq_u32v4", 1, +DEF_MIR_INTRINSIC(vector_mlal_laneq_v4u32, "vector_mlal_laneq_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, { kArgTyV4U32, kArgTyV4U16, kArgTyV8U16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mlal_laneq_u64v2, "vector_mlal_laneq_u64v2", 1, +DEF_MIR_INTRINSIC(vector_mlal_laneq_v2u64, "vector_mlal_laneq_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, { kArgTyV2U64, kArgTyV2U32, kArgTyV4U32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mlal_high_laneq_i32v4, "vector_mlal_high_laneq_i32v4", 1, +DEF_MIR_INTRINSIC(vector_mlal_high_laneq_v4i32, "vector_mlal_high_laneq_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV8I16, kArgTyV8I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mlal_high_laneq_i64v2, "vector_mlal_high_laneq_i64v2", 1, +DEF_MIR_INTRINSIC(vector_mlal_high_laneq_v2i64, "vector_mlal_high_laneq_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV2I64, kArgTyV4I32, kArgTyV4I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mlal_high_laneq_u32v4, "vector_mlal_high_laneq_u32v4", 1, +DEF_MIR_INTRINSIC(vector_mlal_high_laneq_v4u32, "vector_mlal_high_laneq_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, { kArgTyV4U32, kArgTyV8U16, kArgTyV8U16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mlal_high_laneq_u64v2, "vector_mlal_high_laneq_u64v2", 1, +DEF_MIR_INTRINSIC(vector_mlal_high_laneq_v2u64, "vector_mlal_high_laneq_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, { kArgTyV2U64, kArgTyV4U32, kArgTyV4U32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mla_n_i16v4, "vector_mla_n_i16v4", 1, +DEF_MIR_INTRINSIC(vector_mla_n_v4i16, "vector_mla_n_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, { kArgTyV4I16, kArgTyV4I16, kArgTyI16 }) -DEF_MIR_INTRINSIC(vector_mlaq_n_i16v8, "vector_mlaq_n_i16v8", 1, +DEF_MIR_INTRINSIC(vector_mlaq_n_v8i16, "vector_mlaq_n_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, { kArgTyV8I16, kArgTyV8I16, kArgTyI16 }) -DEF_MIR_INTRINSIC(vector_mla_n_i32v2, "vector_mla_n_i32v2", 1, +DEF_MIR_INTRINSIC(vector_mla_n_v2i32, "vector_mla_n_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, { kArgTyV2I32, kArgTyV2I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mlaq_n_i32v4, "vector_mlaq_n_i32v4", 1, +DEF_MIR_INTRINSIC(vector_mlaq_n_v4i32, "vector_mlaq_n_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV4I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mla_n_u16v4, "vector_mla_n_u16v4", 1, +DEF_MIR_INTRINSIC(vector_mla_n_v4u16, "vector_mla_n_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, { kArgTyV4U16, kArgTyV4U16, kArgTyU16 }) -DEF_MIR_INTRINSIC(vector_mlaq_n_u16v8, "vector_mlaq_n_u16v8", 1, +DEF_MIR_INTRINSIC(vector_mlaq_n_v8u16, "vector_mlaq_n_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, { kArgTyV8U16, kArgTyV8U16, kArgTyU16 }) -DEF_MIR_INTRINSIC(vector_mla_n_u32v2, "vector_mla_n_u32v2", 1, +DEF_MIR_INTRINSIC(vector_mla_n_v2u32, "vector_mla_n_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, { kArgTyV2U32, kArgTyV2U32, kArgTyU32 }) -DEF_MIR_INTRINSIC(vector_mlaq_n_u32v4, "vector_mlaq_n_u32v4", 1, +DEF_MIR_INTRINSIC(vector_mlaq_n_v4u32, "vector_mlaq_n_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, { kArgTyV4U32, kArgTyV4U32, kArgTyU32 }) -DEF_MIR_INTRINSIC(vector_mls_lane_i16v4, "vector_mls_lane_i16v4", 1, +DEF_MIR_INTRINSIC(vector_mls_lane_v4i16, "vector_mls_lane_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, { kArgTyV4I16, kArgTyV4I16, kArgTyV4I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mlsq_lane_i16v8, "vector_mlsq_lane_i16v8", 1, +DEF_MIR_INTRINSIC(vector_mlsq_lane_v8i16, "vector_mlsq_lane_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, { kArgTyV8I16, kArgTyV8I16, kArgTyV4I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mls_lane_i32v2, "vector_mls_lane_i32v2", 1, +DEF_MIR_INTRINSIC(vector_mls_lane_v2i32, "vector_mls_lane_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, { kArgTyV2I32, kArgTyV2I32, kArgTyV2I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mlsq_lane_i32v4, "vector_mlsq_lane_i32v4", 1, +DEF_MIR_INTRINSIC(vector_mlsq_lane_v4i32, "vector_mlsq_lane_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV4I32, kArgTyV2I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mls_lane_u16v4, "vector_mls_lane_u16v4", 1, +DEF_MIR_INTRINSIC(vector_mls_lane_v4u16, "vector_mls_lane_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, { kArgTyV4U16, kArgTyV4U16, kArgTyV4U16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mlsq_lane_u16v8, "vector_mlsq_lane_u16v8", 1, +DEF_MIR_INTRINSIC(vector_mlsq_lane_v8u16, "vector_mlsq_lane_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, { kArgTyV8U16, kArgTyV8U16, kArgTyV4U16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mls_lane_u32v2, "vector_mls_lane_u32v2", 1, +DEF_MIR_INTRINSIC(vector_mls_lane_v2u32, "vector_mls_lane_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, { kArgTyV2U32, kArgTyV2U32, kArgTyV2U32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mlsq_lane_u32v4, "vector_mlsq_lane_u32v4", 1, +DEF_MIR_INTRINSIC(vector_mlsq_lane_v4u32, "vector_mlsq_lane_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, { kArgTyV4U32, kArgTyV4U32, kArgTyV2U32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mls_laneq_i16v4, "vector_mls_laneq_i16v4", 1, +DEF_MIR_INTRINSIC(vector_mls_laneq_v4i16, "vector_mls_laneq_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, { kArgTyV4I16, kArgTyV4I16, kArgTyV8I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mlsq_laneq_i16v8, "vector_mlsq_laneq_i16v8", 1, +DEF_MIR_INTRINSIC(vector_mlsq_laneq_v8i16, "vector_mlsq_laneq_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, { kArgTyV8I16, kArgTyV8I16, kArgTyV8I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mls_laneq_i32v2, "vector_mls_laneq_i32v2", 1, +DEF_MIR_INTRINSIC(vector_mls_laneq_v2i32, "vector_mls_laneq_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, { kArgTyV2I32, kArgTyV2I32, kArgTyV4I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mlsq_laneq_i32v4, "vector_mlsq_laneq_i32v4", 1, +DEF_MIR_INTRINSIC(vector_mlsq_laneq_v4i32, "vector_mlsq_laneq_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV4I32, kArgTyV4I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mls_laneq_u16v4, "vector_mls_laneq_u16v4", 1, +DEF_MIR_INTRINSIC(vector_mls_laneq_v4u16, "vector_mls_laneq_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, { kArgTyV4U16, kArgTyV4U16, kArgTyV8U16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mlsq_laneq_u16v8, "vector_mlsq_laneq_u16v8", 1, +DEF_MIR_INTRINSIC(vector_mlsq_laneq_v8u16, "vector_mlsq_laneq_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, { kArgTyV8U16, kArgTyV8U16, kArgTyV8U16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mls_laneq_u32v2, "vector_mls_laneq_u32v2", 1, +DEF_MIR_INTRINSIC(vector_mls_laneq_v2u32, "vector_mls_laneq_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, { kArgTyV2U32, kArgTyV2U32, kArgTyV4U32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mlsq_laneq_u32v4, "vector_mlsq_laneq_u32v4", 1, +DEF_MIR_INTRINSIC(vector_mlsq_laneq_v4u32, "vector_mlsq_laneq_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, { kArgTyV4U32, kArgTyV4U32, kArgTyV4U32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mlsl_lane_i32v4, "vector_mlsl_lane_i32v4", 1, +DEF_MIR_INTRINSIC(vector_mlsl_lane_v4i32, "vector_mlsl_lane_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV4I16, kArgTyV4I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mlsl_lane_i64v2, "vector_mlsl_lane_i64v2", 1, +DEF_MIR_INTRINSIC(vector_mlsl_lane_v2i64, "vector_mlsl_lane_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV2I64, kArgTyV2I32, kArgTyV2I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mlsl_lane_u32v4, "vector_mlsl_lane_u32v4", 1, +DEF_MIR_INTRINSIC(vector_mlsl_lane_v4u32, "vector_mlsl_lane_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, { kArgTyV4U32, kArgTyV4U16, kArgTyV4U16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mlsl_lane_u64v2, "vector_mlsl_lane_u64v2", 1, +DEF_MIR_INTRINSIC(vector_mlsl_lane_v2u64, "vector_mlsl_lane_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, { kArgTyV2U64, kArgTyV2U32, kArgTyV2U32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mlsl_high_lane_i32v4, "vector_mlsl_high_lane_i32v4", 1, +DEF_MIR_INTRINSIC(vector_mlsl_high_lane_v4i32, "vector_mlsl_high_lane_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV8I16, kArgTyV4I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mlsl_high_lane_i64v2, "vector_mlsl_high_lane_i64v2", 1, +DEF_MIR_INTRINSIC(vector_mlsl_high_lane_v2i64, "vector_mlsl_high_lane_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV2I64, kArgTyV4I32, kArgTyV2I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mlsl_high_lane_u32v4, "vector_mlsl_high_lane_u32v4", 1, +DEF_MIR_INTRINSIC(vector_mlsl_high_lane_v4u32, "vector_mlsl_high_lane_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, { kArgTyV4U32, kArgTyV8U16, kArgTyV4U16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mlsl_high_lane_u64v2, "vector_mlsl_high_lane_u64v2", 1, +DEF_MIR_INTRINSIC(vector_mlsl_high_lane_v2u64, "vector_mlsl_high_lane_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, { kArgTyV2U64, kArgTyV4U32, kArgTyV2U32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mlsl_laneq_i32v4, "vector_mlsl_laneq_i32v4", 1, +DEF_MIR_INTRINSIC(vector_mlsl_laneq_v4i32, "vector_mlsl_laneq_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV4I16, kArgTyV8I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mlsl_laneq_i64v2, "vector_mlsl_laneq_i64v2", 1, +DEF_MIR_INTRINSIC(vector_mlsl_laneq_v2i64, "vector_mlsl_laneq_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV2I64, kArgTyV2I32, kArgTyV4I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mlsl_laneq_u32v4, "vector_mlsl_laneq_u32v4", 1, +DEF_MIR_INTRINSIC(vector_mlsl_laneq_v4u32, "vector_mlsl_laneq_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, { kArgTyV4U32, kArgTyV4U16, kArgTyV8U16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mlsl_laneq_u64v2, "vector_mlsl_laneq_u64v2", 1, +DEF_MIR_INTRINSIC(vector_mlsl_laneq_v2u64, "vector_mlsl_laneq_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, { kArgTyV2U64, kArgTyV2U32, kArgTyV4U32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mlsl_high_laneq_i32v4, "vector_mlsl_high_laneq_i32v4", 1, +DEF_MIR_INTRINSIC(vector_mlsl_high_laneq_v4i32, "vector_mlsl_high_laneq_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV8I16, kArgTyV8I16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mlsl_high_laneq_i64v2, "vector_mlsl_high_laneq_i64v2", 1, +DEF_MIR_INTRINSIC(vector_mlsl_high_laneq_v2i64, "vector_mlsl_high_laneq_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV2I64, kArgTyV4I32, kArgTyV4I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mlsl_high_laneq_u32v4, "vector_mlsl_high_laneq_u32v4", 1, +DEF_MIR_INTRINSIC(vector_mlsl_high_laneq_v4u32, "vector_mlsl_high_laneq_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, { kArgTyV4U32, kArgTyV8U16, kArgTyV8U16, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mlsl_high_laneq_u64v2, "vector_mlsl_high_laneq_u64v2", 1, +DEF_MIR_INTRINSIC(vector_mlsl_high_laneq_v2u64, "vector_mlsl_high_laneq_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, { kArgTyV2U64, kArgTyV4U32, kArgTyV4U32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mlal_n_i32v4, "vector_mlal_n_i32v4", 1, +DEF_MIR_INTRINSIC(vector_mlal_n_v4i32, "vector_mlal_n_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV4I16, kArgTyI16 }) -DEF_MIR_INTRINSIC(vector_mlal_n_i64v2, "vector_mlal_n_i64v2", 1, +DEF_MIR_INTRINSIC(vector_mlal_n_v2i64, "vector_mlal_n_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV2I64, kArgTyV2I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mlal_n_u32v4, "vector_mlal_n_u32v4", 1, +DEF_MIR_INTRINSIC(vector_mlal_n_v4u32, "vector_mlal_n_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, { kArgTyV4U32, kArgTyV4U16, kArgTyU16 }) -DEF_MIR_INTRINSIC(vector_mlal_n_u64v2, "vector_mlal_n_u64v2", 1, +DEF_MIR_INTRINSIC(vector_mlal_n_v2u64, "vector_mlal_n_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, { kArgTyV2U64, kArgTyV2U32, kArgTyU32 }) -DEF_MIR_INTRINSIC(vector_mlal_high_n_i32v4, "vector_mlal_high_n_i32v4", 1, +DEF_MIR_INTRINSIC(vector_mlal_high_n_v4i32, "vector_mlal_high_n_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV8I16, kArgTyI16 }) -DEF_MIR_INTRINSIC(vector_mlal_high_n_i64v2, "vector_mlal_high_n_i64v2", 1, +DEF_MIR_INTRINSIC(vector_mlal_high_n_v2i64, "vector_mlal_high_n_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV2I64, kArgTyV4I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mlal_high_n_u32v4, "vector_mlal_high_n_u32v4", 1, +DEF_MIR_INTRINSIC(vector_mlal_high_n_v4u32, "vector_mlal_high_n_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, { kArgTyV4U32, kArgTyV8U16, kArgTyU16 }) -DEF_MIR_INTRINSIC(vector_mlal_high_n_u64v2, "vector_mlal_high_n_u64v2", 1, +DEF_MIR_INTRINSIC(vector_mlal_high_n_v2u64, "vector_mlal_high_n_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, { kArgTyV2U64, kArgTyV4U32, kArgTyU32 }) -DEF_MIR_INTRINSIC(vector_mls_n_i16v4, "vector_mls_n_i16v4", 1, +DEF_MIR_INTRINSIC(vector_mls_n_v4i16, "vector_mls_n_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, { kArgTyV4I16, kArgTyV4I16, kArgTyI16 }) -DEF_MIR_INTRINSIC(vector_mlsq_n_i16v8, "vector_mlsq_n_i16v8", 1, +DEF_MIR_INTRINSIC(vector_mlsq_n_v8i16, "vector_mlsq_n_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, { kArgTyV8I16, kArgTyV8I16, kArgTyI16 }) -DEF_MIR_INTRINSIC(vector_mls_n_i32v2, "vector_mls_n_i32v2", 1, +DEF_MIR_INTRINSIC(vector_mls_n_v2i32, "vector_mls_n_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, { kArgTyV2I32, kArgTyV2I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mlsq_n_i32v4, "vector_mlsq_n_i32v4", 1, +DEF_MIR_INTRINSIC(vector_mlsq_n_v4i32, "vector_mlsq_n_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV4I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mls_n_u16v4, "vector_mls_n_u16v4", 1, +DEF_MIR_INTRINSIC(vector_mls_n_v4u16, "vector_mls_n_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, { kArgTyV4U16, kArgTyV4U16, kArgTyU16 }) -DEF_MIR_INTRINSIC(vector_mlsq_n_u16v8, "vector_mlsq_n_u16v8", 1, +DEF_MIR_INTRINSIC(vector_mlsq_n_v8u16, "vector_mlsq_n_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, { kArgTyV8U16, kArgTyV8U16, kArgTyU16 }) -DEF_MIR_INTRINSIC(vector_mls_n_u32v2, "vector_mls_n_u32v2", 1, +DEF_MIR_INTRINSIC(vector_mls_n_v2u32, "vector_mls_n_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, { kArgTyV2U32, kArgTyV2U32, kArgTyU32 }) -DEF_MIR_INTRINSIC(vector_mlsq_n_u32v4, "vector_mlsq_n_u32v4", 1, +DEF_MIR_INTRINSIC(vector_mlsq_n_v4u32, "vector_mlsq_n_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, { kArgTyV4U32, kArgTyV4U32, kArgTyU32 }) -DEF_MIR_INTRINSIC(vector_mlsl_n_i32v4, "vector_mlsl_n_i32v4", 1, +DEF_MIR_INTRINSIC(vector_mlsl_n_v4i32, "vector_mlsl_n_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV4I16, kArgTyI16 }) -DEF_MIR_INTRINSIC(vector_mlsl_n_i64v2, "vector_mlsl_n_i64v2", 1, +DEF_MIR_INTRINSIC(vector_mlsl_n_v2i64, "vector_mlsl_n_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV2I64, kArgTyV2I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mlsl_n_u32v4, "vector_mlsl_n_u32v4", 1, +DEF_MIR_INTRINSIC(vector_mlsl_n_v4u32, "vector_mlsl_n_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, { kArgTyV4U32, kArgTyV4U16, kArgTyU16 }) -DEF_MIR_INTRINSIC(vector_mlsl_n_u64v2, "vector_mlsl_n_u64v2", 1, +DEF_MIR_INTRINSIC(vector_mlsl_n_v2u64, "vector_mlsl_n_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, { kArgTyV2U64, kArgTyV2U32, kArgTyU32 }) -DEF_MIR_INTRINSIC(vector_mlsl_high_n_i32v4, "vector_mlsl_high_n_i32v4", 1, +DEF_MIR_INTRINSIC(vector_mlsl_high_n_v4i32, "vector_mlsl_high_n_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32, kArgTyV8I16, kArgTyI16 }) -DEF_MIR_INTRINSIC(vector_mlsl_high_n_i64v2, "vector_mlsl_high_n_i64v2", 1, +DEF_MIR_INTRINSIC(vector_mlsl_high_n_v2i64, "vector_mlsl_high_n_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV2I64, kArgTyV4I32, kArgTyI32 }) -DEF_MIR_INTRINSIC(vector_mlsl_high_n_u32v4, "vector_mlsl_high_n_u32v4", 1, +DEF_MIR_INTRINSIC(vector_mlsl_high_n_v4u32, "vector_mlsl_high_n_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, { kArgTyV4U32, kArgTyV8U16, kArgTyU16 }) -DEF_MIR_INTRINSIC(vector_mlsl_high_n_u64v2, "vector_mlsl_high_n_u64v2", 1, +DEF_MIR_INTRINSIC(vector_mlsl_high_n_v2u64, "vector_mlsl_high_n_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, { kArgTyV2U64, kArgTyV4U32, kArgTyU32 }) -DEF_MIR_INTRINSIC(vector_qneg_i8v8, "vector_qneg_i8v8", 1, +DEF_MIR_INTRINSIC(vector_qneg_v8i8, "vector_qneg_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, { kArgTyV8I8 }) -DEF_MIR_INTRINSIC(vector_qnegq_i8v16, "vector_qnegq_i8v16", 1, +DEF_MIR_INTRINSIC(vector_qnegq_v16i8, "vector_qnegq_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, { kArgTyV16I8 }) -DEF_MIR_INTRINSIC(vector_qneg_i16v4, "vector_qneg_i16v4", 1, +DEF_MIR_INTRINSIC(vector_qneg_v4i16, "vector_qneg_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, { kArgTyV4I16 }) -DEF_MIR_INTRINSIC(vector_qnegq_i16v8, "vector_qnegq_i16v8", 1, +DEF_MIR_INTRINSIC(vector_qnegq_v8i16, "vector_qnegq_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, { kArgTyV8I16 }) -DEF_MIR_INTRINSIC(vector_qneg_i32v2, "vector_qneg_i32v2", 1, +DEF_MIR_INTRINSIC(vector_qneg_v2i32, "vector_qneg_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, { kArgTyV2I32 }) -DEF_MIR_INTRINSIC(vector_qnegq_i32v4, "vector_qnegq_i32v4", 1, +DEF_MIR_INTRINSIC(vector_qnegq_v4i32, "vector_qnegq_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, { kArgTyV4I32 }) -DEF_MIR_INTRINSIC(vector_qneg_i64v1, "vector_qneg_i64v1", 1, +DEF_MIR_INTRINSIC(vector_qneg_v1i64, "vector_qneg_v1i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1I64, { kArgTyV1I64 }) -DEF_MIR_INTRINSIC(vector_qnegq_i64v2, "vector_qnegq_i64v2", 1, +DEF_MIR_INTRINSIC(vector_qnegq_v2i64, "vector_qnegq_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, { kArgTyV2I64 }) diff --git a/src/mapleall/maple_ir/include/keywords.def b/src/mapleall/maple_ir/include/keywords.def index 14c906656fa9038ba5477726b305ce102dd1773d..56b1e1aef0b6f2a707b779c55ae29e95dc7cdfef 100644 --- a/src/mapleall/maple_ir/include/keywords.def +++ b/src/mapleall/maple_ir/include/keywords.def @@ -52,6 +52,10 @@ #undef TYPE_ATTR #undef FIELD_ATTR KEYWORD(align) + // pragma kind keywords +#define PRAGMA(X) KEYWORD(X) +#include "all_pragmas.def" +#undef PRAGMA // per-function declaration keywords KEYWORD(framesize) KEYWORD(upformalsize) diff --git a/src/mapleall/maple_ir/include/mir_function.h b/src/mapleall/maple_ir/include/mir_function.h index 54991e7f97e2bd0b816c578278f76b4333e2bdaf..a5d00bbdc937728d01610b034eff9e8ffb99e316 100644 --- a/src/mapleall/maple_ir/include/mir_function.h +++ b/src/mapleall/maple_ir/include/mir_function.h @@ -346,6 +346,12 @@ class MIRFunction { return !funcAttrs.GetAttr(FUNCATTR_visibility_hidden) && !funcAttrs.GetAttr(FUNCATTR_visibility_protected); } + // for checking a function need PLT for relocation or can do no-plt + // if any functionality needs to check this usage, + // should use this function && check if option -fno-plt is enabled + // e.g. + // if (CGOptions::IsNoPlt() && mirFunc && mirFunc->CanDoNoPlt(CGOptions::IsShlib(), CGOptions::IsPIE())) + // ...... bool CanDoNoPlt(bool isShlib, bool isPIE) const { if (IsDefaultVisibility() && ((isPIE && !GetBody()) || (isShlib && !IsStatic()))) { return true; @@ -705,7 +711,12 @@ class MIRFunction { void SetFuncAttrs(const FuncAttrs &attrs) { funcAttrs = attrs; } - void SetFuncAttrs(uint64 attrFlag) { + + // The template is to DISABLE any implicit type conversion to FuncAttrFlag (e.g. int64 to FuncAttrFlag). + // Type `T` must be FuncAttrFlag, otherwise the static_assert below will complain. + template + void SetFuncAttrFlag(const T &attrFlag) { + static_assert(std::is_same::value, "type mismatch"); funcAttrs.SetAttrFlag(attrFlag); } @@ -1264,6 +1275,10 @@ class MIRFunction { funcDesc.InitToBest(); } + void InitFuncDescToWorst() { + funcDesc.InitToWorst(); + } + const FuncDesc &GetFuncDesc() const { return funcDesc; } diff --git a/src/mapleall/maple_ir/include/mir_module.h b/src/mapleall/maple_ir/include/mir_module.h index ed755c29c7979b46f714d209562e4624664c4abc..aafbd4c6444598fb85afde882369e976abe130a0 100644 --- a/src/mapleall/maple_ir/include/mir_module.h +++ b/src/mapleall/maple_ir/include/mir_module.h @@ -355,12 +355,13 @@ class MIRModule { const std::string &GetFileName() const { return fileName; } + const std::string &GetFileNameExceptRootPath() const { + return fltoFileName; + } std::string GetFileNameAsPostfix() const; std::string GetFileNameWithPath() const; - void SetFileName(const std::string &name) { - fileName = name; - } + void SetFileName(const std::string &name); bool IsJavaModule() const { return srcLang == kSrcLangJava; @@ -718,12 +719,26 @@ class MIRModule { return tlsAnchorHashString; } + void SetTlsWarmupFunction(const std::string &s) { + tlsWarmupFunction = s; + } + + const std::string &GetTlsWarmupFunction() const { + return tlsWarmupFunction; + } + MapleMap &GetTdataVarOffset() { return tdataVarOffset; } MapleMap &GetTbssVarOffset() { return tbssVarOffset; } + const MapleMap &GetTlsVarOffset() const { + return tlsVarOffset; + } + void SetTlsVarOffset(const MIRSymbol *sym, uint64 offset) { + tlsVarOffset[sym] = offset; + } MIRSymbol *GetTdataAnchor() { return tdataAnchor; @@ -765,6 +780,7 @@ class MIRModule { MIRBuilder *mirBuilder; std::string entryFuncName = ""; // name of the entry function std::string fileName; + std::string fltoFileName; // filename without rootpath TyIdx throwableTyIdx{0}; // a special type that is the base of java exception type. only used for java bool withProfileInfo = false; @@ -836,10 +852,15 @@ class MIRModule { std::map> funcImportantExpr; std::string tlsAnchorHashString = ""; + // Where tls warmup func is inserted + std::string tlsWarmupFunction = ""; + // for local dynamic, since .tdata and .tbss in one module will be seperate by the linker MapleMap tdataVarOffset; MapleMap tbssVarOffset; MIRSymbol *tdataAnchor = nullptr; MIRSymbol *tbssAnchor = nullptr; + // for warmup local dynamic + flto + MapleMap tlsVarOffset; }; #endif // MIR_FEATURE_FULL } // namespace maple diff --git a/src/mapleall/maple_ir/include/mir_nodes.h b/src/mapleall/maple_ir/include/mir_nodes.h index 4efa3845bd88b30acedf3a38c7d1f183866625d1..6daa24be7d01c44a232a250bb5867730ff5a0b56 100644 --- a/src/mapleall/maple_ir/include/mir_nodes.h +++ b/src/mapleall/maple_ir/include/mir_nodes.h @@ -1581,6 +1581,14 @@ class StmtNode : public BaseNode, public PtrListNodeBase { return stmtAttrs.GetAttr(STMTATTR_mayTailcall); } + void SetIgnoreCost() { + stmtAttrs.SetAttr(STMTATTR_ignore_cost); + } + + bool IsIgnoreCost() const { + return stmtAttrs.GetAttr(STMTATTR_ignore_cost); + } + const StmtAttrs &GetStmtAttrs() const { return stmtAttrs; } @@ -1597,6 +1605,14 @@ class StmtNode : public BaseNode, public PtrListNodeBase { return this == &rhs; } + virtual MapleSet *GetPragmas() { + return nullptr; + } + + virtual const MapleSet *GetPragmas() const { + return nullptr; + } + protected: SrcPosition srcPosition; @@ -3356,12 +3372,14 @@ class CallAssertBoundaryStmtNode : public NaryStmtNode, public SafetyCallCheckSt // polymorphiccallassigned class CallNode : public NaryStmtNode { public: - CallNode(MapleAllocator &allocator, Opcode o) : NaryStmtNode(allocator, o), returnValues(allocator.Adapter()) {} + CallNode(MapleAllocator &allocator, Opcode o) + : NaryStmtNode(allocator, o), returnValues(allocator.Adapter()), pragmas(allocator.Adapter()) {} CallNode(MapleAllocator &allocator, Opcode o, PUIdx idx) : CallNode(allocator, o, idx, TyIdx()) {} CallNode(MapleAllocator &allocator, Opcode o, PUIdx idx, TyIdx tdx) - : NaryStmtNode(allocator, o), puIdx(idx), tyIdx(tdx), returnValues(allocator.Adapter()) {} + : NaryStmtNode(allocator, o), puIdx(idx), tyIdx(tdx), + returnValues(allocator.Adapter()), pragmas(allocator.Adapter()) {} CallNode(const MIRModule &mod, Opcode o) : CallNode(mod.GetCurFuncCodeMPAllocator(), o) {} @@ -3369,7 +3387,8 @@ class CallNode : public NaryStmtNode { : CallNode(mod.GetCurFuncCodeMPAllocator(), o, idx, tdx) {} CallNode(MapleAllocator &allocator, const CallNode &node) - : NaryStmtNode(allocator, node), puIdx(node.GetPUIdx()), tyIdx(node.tyIdx), returnValues(allocator.Adapter()) {} + : NaryStmtNode(allocator, node), puIdx(node.GetPUIdx()), tyIdx(node.tyIdx), + returnValues(allocator.Adapter()), pragmas(allocator.Adapter()) {} CallNode(const MIRModule &mod, const CallNode &node) : CallNode(mod.GetCurFuncCodeMPAllocator(), node) {} @@ -3392,9 +3411,22 @@ class CallNode : public NaryStmtNode { node->GetReturnVec().push_back(returnValues[i]); } node->SetNumOpnds(GetNopndSize()); + node->CopyPragmas(*GetPragmas()); return node; } + MapleSet *GetPragmas() override { + return &pragmas; + } + + const MapleSet *GetPragmas() const override { + return &pragmas; + } + + void CopyPragmas(const MapleSet &newPragmas) { + pragmas = newPragmas; + } + PUIdx GetPUIdx() const { return puIdx; } @@ -3468,6 +3500,7 @@ class CallNode : public NaryStmtNode { TyIdx tyIdx = TyIdx(0); CallReturnVector returnValues; BlockNode *enclosingBlk = nullptr; + MapleSet pragmas; }; // icall, icallassigned, icallproto and icallprotoassigned diff --git a/src/mapleall/maple_ir/include/mir_parser.h b/src/mapleall/maple_ir/include/mir_parser.h index 42b483c2132c4e6da7df26fae1140d4c9b337103..01b84df3850eb0abd549e29eb1adad9392acf9ed 100644 --- a/src/mapleall/maple_ir/include/mir_parser.h +++ b/src/mapleall/maple_ir/include/mir_parser.h @@ -61,6 +61,7 @@ class MIRParser { bool ParseExprNaryOperand(MapleVector &opndVec); bool IsDelimitationTK(TokenKind tk) const; Opcode GetOpFromToken(TokenKind tk) const; + CPragmaKind GetCPragmaKindFromToken(TokenKind tk) const; bool IsStatement(TokenKind tk) const; PrimType GetPrimitiveType(TokenKind tk) const; MIRIntrinsicID GetIntrinsicID(TokenKind tk) const; @@ -75,6 +76,7 @@ class MIRParser { bool CheckAlignTk(); bool ParseAlignAttrs(TypeAttrs &tA); bool ParsePackAttrs(); + bool ParseTypeAliasAttrs(TypeAttrs &tA); bool ParsePackedAttrs(); bool ParseFieldAttrs(FieldAttrs &attrs); bool ParseFuncAttrs(FuncAttrs &attrs); @@ -228,6 +230,9 @@ class MIRParser { bool ParseExprIntrinsicop(BaseNodePtr &expr); bool ParseNaryExpr(NaryStmtNode &stmtNode); + // Pragma Parser + bool ParseCPragma(); + // funcName and paramIndex is out parameter bool ParseCallAssertInfo(std::string &funcName, int *paramIndex, std::string &stmtFuncName); bool ParseAssertInfo(std::string &funcName); diff --git a/src/mapleall/maple_ir/include/mir_pragma.h b/src/mapleall/maple_ir/include/mir_pragma.h index ac0c8566a8df296280b816d24671a70015c5ce61..f70e7bdbffb9c99f2aaeb3f969e563bf9b9c6496 100644 --- a/src/mapleall/maple_ir/include/mir_pragma.h +++ b/src/mapleall/maple_ir/include/mir_pragma.h @@ -265,5 +265,74 @@ class MIRPragma { int32 paramNum = -1; // paramNum th param in function, -1 not for param annotation MapleVector elementVec; }; + +// compiler pragma design +enum class CPragmaKind { +#define PRAGMA(STR) PRAGMA_##STR, +#include "all_pragmas.def" +#undef PRAGMA + PRAGMA_undef +}; + +class CPragma { + public: + CPragma(CPragmaKind k, uint32 id) : kind(k), index(id) {} + virtual ~CPragma() = default; + virtual void Dump() {}; + + uint32 GetIndex() const { + return index; + } + + CPragmaKind GetKind() const { + return kind; + } + + private: + CPragmaKind kind; + uint32 index; +}; + +class PreferInlinePragma : public CPragma { + public: + static bool IsValid(const std::string &content) { + return (content == "ON" || content == "OFF"); + } + + static PreferInlinePragma *CreatePIP(uint32 id, const std::string &content) { + if (content == "ON") { + static PreferInlinePragma onVersion(id, true); + return &onVersion; + } else if (content == "OFF") { + static PreferInlinePragma offVersion(id, false); + return &offVersion; + } else { + CHECK_FATAL_FALSE("Invalid Parameter for Pragma prefer_inline"); + } + } + + PreferInlinePragma(uint32 id, bool cond) : CPragma(CPragmaKind::PRAGMA_prefer_inline, id) { + status = cond; + } + + ~PreferInlinePragma() override = default; + + // Syntax like ` pragma !1 prefer_inline "ON" ` + void Dump() override { + LogInfo::MapleLogger() << "pragma !" << GetIndex() << " "; + LogInfo::MapleLogger() << "prefer_inline" << " "; + LogInfo::MapleLogger() << "\""; + LogInfo::MapleLogger() << (status ? "ON" : "OFF"); + LogInfo::MapleLogger() << "\""; + LogInfo::MapleLogger() << "\n"; + } + + bool GetStatus() const { + return status; + } + + private: + bool status = false; +}; } // namespace maple #endif // MAPLE_IR_INCLUDE_MIR_PRAGMA_H diff --git a/src/mapleall/maple_ir/include/mir_symbol.h b/src/mapleall/maple_ir/include/mir_symbol.h index d13f8694bd9bca856ed828edef9f4c7e62e70af3..6e5173f803c5924b9bce69b4dcc4b06b1b6531f2 100644 --- a/src/mapleall/maple_ir/include/mir_symbol.h +++ b/src/mapleall/maple_ir/include/mir_symbol.h @@ -219,6 +219,8 @@ class MIRSymbol { bool IsTypeVolatile(int fieldID) const; + // for checking if a symbol need GOT for relocation or not + // if any functionality needs to check GOT usage, should use this function bool NeedGOT(bool isPIC, bool isPIE) const; bool IsThreadLocal() const { diff --git a/src/mapleall/maple_ir/include/mir_type.h b/src/mapleall/maple_ir/include/mir_type.h index df3f12b60f56bf2e82ce532d7986088a53c5dc93..f5fce8b6a9e6cbb0d975ac2fdec4e4683be981f4 100644 --- a/src/mapleall/maple_ir/include/mir_type.h +++ b/src/mapleall/maple_ir/include/mir_type.h @@ -16,9 +16,11 @@ #define MAPLE_IR_INCLUDE_MIR_TYPE_H #include #include +#include #include "prim_types.h" #include "mir_pragma.h" #include "mpl_logging.h" +#include "simple_bit_set.h" #if MIR_FEATURE_FULL #include "mempool.h" #include "mempool_allocator.h" @@ -71,6 +73,7 @@ constexpr uint32 k10BitSize = 10; constexpr uint32 k16BitSize = 16; constexpr uint32 k32BitSize = 32; constexpr uint32 k64BitSize = 64; +constexpr uint32 k128BitSize = 128; // size in bytes constexpr uint32 k0ByteSize = 0; constexpr uint32 k1ByteSize = 1; @@ -267,14 +270,6 @@ enum MIRTypeKind : std::uint8_t { kTypeGenericInstant, // type to be formed by instantiation of a generic type }; -enum AttrKind : unsigned { -#define TYPE_ATTR -#define ATTR(STR) ATTR_##STR, -#include "all_attributes.def" -#undef ATTR -#undef TYPE_ATTR -}; - class AttrBoundary { public: AttrBoundary() = default; @@ -329,6 +324,17 @@ class AttrBoundary { uint32 lenExprHash = 0; }; +enum AttrKind : unsigned { +#define TYPE_ATTR +#define ATTR(STR) ATTR_##STR, +#include "all_attributes.def" +#undef ATTR +#undef TYPE_ATTR + kTypeAttrNum +}; + +constexpr size_t kTypeAttrFlagNum = ALIGN(kTypeAttrNum, k64BitSize); + class TypeAttrs { public: TypeAttrs() = default; @@ -344,24 +350,32 @@ class TypeAttrs { return attrAlign; } - void SetAttrFlag(uint64 flag) { + void SetAttrFlag(SimpleBitSet flag) { attrFlag = flag; } - uint64 GetAttrFlag() const { + void SetTypeAlignValue(uint8 align) { + attrTypeAlign = align; + } + + uint8 GetTypeAlignValue() const { + return attrTypeAlign; + } + + SimpleBitSet GetAttrFlag() const { return attrFlag; } void SetAttr(AttrKind x) { - attrFlag |= (1ULL << static_cast(x)); + attrFlag.Set(x); } void ResetAttr(AttrKind x) { - attrFlag &= ~(1ULL << static_cast(x)); + attrFlag.Reset(x); } bool GetAttr(AttrKind x) const { - return (attrFlag & (1ULL << static_cast(x))) != 0; + return (attrFlag[x] != 0); } void SetAlign(uint32 x) { @@ -386,6 +400,28 @@ class TypeAttrs { return res; } + void SetTypeAlign(uint32 x) { + ASSERT((~(x - 1) & x) == x, "SetTypeAlign called with non-power-of-2"); + attrTypeAlign = 0; + while (x != kAlignBase) { + x >>= 1; + ++attrTypeAlign; + } + } + + uint32 GetTypeAlign() const { + if (attrTypeAlign == 1) { // align(1) + return 1; + } + uint32 res = 1; + uint32 exp = attrTypeAlign; + while (exp > 1) { // calculate align(x) + --exp; + res *= 2; // square of two + } + return res; + } + bool operator==(const TypeAttrs &tA) const { return attrFlag == tA.attrFlag && attrAlign == tA.attrAlign && attrBoundary == tA.attrBoundary; } @@ -432,10 +468,24 @@ class TypeAttrs { return GetAttr(ATTR_pack); } + bool IsTypedef() const { + return GetAttr(ATTR_typedef); + } + + void SetTypeAlias(std::string aliasList) { + typeAliasList = aliasList; + } + + std::string GetTypeAlias() const { + return typeAliasList; + } + private: - uint64 attrFlag = 0; + SimpleBitSet attrFlag; uint8 attrAlign = 0; // alignment in bytes is 2 to the power of attrAlign + uint8 attrTypeAlign = 0; // alignment in bytes is 2 to the power of attrTypeAlign uint32 attrPack = -1; // -1 means inactive + std::string typeAliasList; AttrBoundary attrBoundary; // boundary attr for EnhanceC }; @@ -445,8 +495,11 @@ enum FieldAttrKind { #include "all_attributes.def" #undef ATTR #undef FIELD_ATTR + kFieldAttrNum }; +constexpr size_t kFieldAttrFlagNum = ALIGN(kFieldAttrNum, k64BitSize); + class FieldAttrs { public: FieldAttrs() = default; @@ -462,20 +515,28 @@ class FieldAttrs { return attrAlign; } - void SetAttrFlag(uint32 flag) { + void SetAttrFlag(SimpleBitSet flag) { attrFlag = flag; } - uint32 GetAttrFlag() const { + SimpleBitSet GetAttrFlag() const { return attrFlag; } + uint8 GetTypeAlignValue() const { + return attrTypeAlign; + } + + void SetAttrFlag(uint64 flag) { + attrFlag = flag; + } + void SetAttr(FieldAttrKind x) { - attrFlag |= (1U << static_cast(x)); + attrFlag.Set(x); } bool GetAttr(FieldAttrKind x) const { - return (attrFlag & (1U << static_cast(x))) != 0; + return (attrFlag[x] != 0); } void SetAlign(uint32 x) { @@ -500,6 +561,28 @@ class FieldAttrs { return res; } + void SetTypeAlign(uint32 x) { + ASSERT((~(x - 1) & x) == x, "SetTypeAlign called with non-power-of-2"); + attrTypeAlign = 0; + while (x != kAlignBase) { + x >>= 1; + ++attrTypeAlign; + } + } + + uint32 GetTypeAlign() const { + if (attrTypeAlign == 1) { // align(1) + return 1; + } + uint32 res = 1; + uint32 exp = attrTypeAlign; + while (exp > 1) { // calculate align(x) + --exp; + res *= 2; // square of two + } + return res; + } + bool operator==(const FieldAttrs &tA) const { return attrFlag == tA.attrFlag && attrAlign == tA.attrAlign && attrBoundary == tA.attrBoundary; } @@ -534,11 +617,12 @@ class FieldAttrs { } bool HasAligned() const { - return GetAttr(FLDATTR_aligned) || attrAlign != 0; + return GetAttr(FLDATTR_aligned) || GetAlign() != 1; } private: - uint8 attrAlign = 0; // alignment in bytes is 2 to the power of attrAlign - uint32 attrFlag = 0; + SimpleBitSet attrFlag = 0; + uint8 attrAlign = 0; // alignment in bytes is 2 to the power of attrAlign + uint8 attrTypeAlign = 0; // alignment in bytes is 2 to the power of attrTypeAlign AttrBoundary attrBoundary; }; @@ -548,8 +632,11 @@ enum StmtAttrKind : unsigned { #include "all_attributes.def" #undef ATTR #undef STMT_ATTR + kStmtAttrNum }; +constexpr size_t kStmtAttrFlagNum = ALIGN(kStmtAttrNum, k64BitSize); + class StmtAttrs { public: StmtAttrs() = default; @@ -559,25 +646,25 @@ class StmtAttrs { void SetAttr(StmtAttrKind x, bool flag = true) { if (flag) { - attrFlag |= (1u << static_cast(x)); + attrFlag.Set(x); } else { - attrFlag &= ~(1u << static_cast(x)); + attrFlag.Reset(x); } } bool GetAttr(StmtAttrKind x) const { - return (attrFlag & (1u << static_cast(x))) != 0; + return attrFlag[x] != 0; } - uint32 GetTargetAttrFlag(StmtAttrKind x) const { - return attrFlag & (1u << static_cast(x)); + SimpleBitSet GetTargetAttrFlag(StmtAttrKind x) const { + return attrFlag & SimpleBitSet(1ULL << static_cast(x)); } - uint32 GetAttrFlag() const { + SimpleBitSet GetAttrFlag() const { return attrFlag; } - void AppendAttr(uint32 flag) { + void AppendAttr(SimpleBitSet flag) { attrFlag |= flag; } @@ -588,7 +675,7 @@ class StmtAttrs { void DumpAttributes() const; private: - uint32 attrFlag = 0; + SimpleBitSet attrFlag = 0; }; enum FuncAttrKind : unsigned { @@ -600,20 +687,40 @@ enum FuncAttrKind : unsigned { FUNCATTR_Undef }; +constexpr uint32 kBitsOfU64 = std::numeric_limits::digits; +constexpr uint32 kNumU64InFuncAttr = 2; +constexpr uint32 kNumBitInFuncAttr = kNumU64InFuncAttr * kBitsOfU64; +static_assert(FUNCATTR_Undef <= kNumBitInFuncAttr, "function attr out of range"); + +using FuncAttrFlag = std::bitset; + +// Get the index-th U64 element from attrFlag +inline uint64 ExtractAttrFlagElement(const FuncAttrFlag &attrFlag, uint32 index) { + CHECK_FATAL(index < kNumU64InFuncAttr, "out of range"); + static constexpr FuncAttrFlag mask(std::numeric_limits::max()); + return ((attrFlag >> (index * kBitsOfU64)) & mask).to_ullong(); +} + +// Init attrFlag with dataArr +inline void InitAttrFlag(FuncAttrFlag &attrFlag, const std::array &dataArr) { + attrFlag.reset(); + for (size_t i = 0; i < dataArr.size(); ++i) { + attrFlag |= (FuncAttrFlag(dataArr[i]) << (i * kBitsOfU64)); + } +} + class FuncAttrs { public: - FuncAttrs() { - ASSERT(FUNCATTR_Undef <= (sizeof(uint64) << 3u), "function attr out of range"); - } + FuncAttrs() = default; FuncAttrs(const FuncAttrs &ta) = default; FuncAttrs &operator=(const FuncAttrs &p) = default; ~FuncAttrs() = default; void SetAttr(FuncAttrKind x, bool unSet = false) { if (!unSet) { - attrFlag |= (1ULL << x); + attrFlag[x] = true; } else { - attrFlag &= ~(1ULL << x); + attrFlag[x] = false; } } @@ -633,16 +740,20 @@ class FuncAttrs { return prefixSectionName; } - void SetAttrFlag(uint64 flag) { + // The template is to DISABLE any implicit type conversion to FuncAttrFlag (e.g. int64 to FuncAttrFlag). + // Type `T` must be FuncAttrFlag, otherwise the static_assert below will complain. + template + void SetAttrFlag(const T &flag) { + static_assert(std::is_same::value, "type mismatch"); attrFlag = flag; } - uint64 GetAttrFlag() const { + const FuncAttrFlag &GetAttrFlag() const { return attrFlag; } bool GetAttr(FuncAttrKind x) const { - return (attrFlag & (1ULL << x)) != 0; + return attrFlag[x]; } bool operator==(const FuncAttrs &tA) const { @@ -680,7 +791,7 @@ class FuncAttrs { } private: - uint64 attrFlag = 0; + FuncAttrFlag attrFlag; std::string aliasFuncName; std::string prefixSectionName; AttrBoundary attrBoundary; // ret boundary for EnhanceC @@ -776,10 +887,10 @@ class MIRType { : typeKind(kind), primType(pType), nameStrIdx(strIdx) {} virtual ~MIRType() = default; - virtual void Dump(int indent, bool dontUseName = false) const; virtual void DumpAsCxx(int indent) const; virtual bool EqualTo(const MIRType &mirType) const; + bool EqualToWithAttr(const MIRType &mirType) const; virtual bool IsStructType() const { return false; } @@ -994,7 +1105,12 @@ class MIRPtrType : public MIRType { constexpr uint8 idxShift = 4; constexpr uint8 attrShift = 3; size_t hIdx = (static_cast(pointedTyIdx) << idxShift) + (typeKind << kShiftNumOfTypeKind); - hIdx += (typeAttrs.GetAttrFlag() << attrShift) + typeAttrs.GetAlignValue(); + size_t typeAttrsFlagSize = typeAttrs.GetAttrFlag().GetWordSize(); + if (typeAttrsFlagSize == 1) { + hIdx += (typeAttrs.GetAttrFlag().GetWord(0) << attrShift) + typeAttrs.GetAlignValue(); + } else { + hIdx += typeAttrs.GetAttrFlag().GetHashOfbitset() + typeAttrs.GetAlignValue(); + } return hIdx % kTypeHashLength; } bool IsFunctionPtr() const { @@ -1090,7 +1206,12 @@ class MIRArrayType : public MIRType { hIdx += (sizeArray[i] << i); } constexpr uint8 attrShift = 3; - hIdx += (typeAttrs.GetAttrFlag() << attrShift) + typeAttrs.GetAlignValue(); + size_t typeAttrsFlagSize = typeAttrs.GetAttrFlag().GetWordSize(); + if (typeAttrsFlagSize == 1) { + hIdx += (typeAttrs.GetAttrFlag().GetWord(0) << attrShift) + typeAttrs.GetAlignValue(); + } else { + hIdx += typeAttrs.GetAttrFlag().GetHashOfbitset() + typeAttrs.GetAlignValue(); + } return hIdx % kTypeHashLength; } @@ -1446,8 +1567,14 @@ class MIRStructType : public MIRType { size_t GetHashIndex() const override { constexpr uint8 attrShift = 3; - return ((static_cast(nameStrIdx) << kShiftNumOfNameStrIdx) + (typeKind << kShiftNumOfTypeKind) + - ((typeAttrs.GetAttrFlag() << attrShift) + typeAttrs.GetAlignValue())) % kTypeHashLength; + size_t hIdx = (static_cast(nameStrIdx) << kShiftNumOfNameStrIdx) + (typeKind << kShiftNumOfTypeKind); + size_t typeAttrsFlagSize = typeAttrs.GetAttrFlag().GetWordSize(); + if (typeAttrsFlagSize == 1) { + hIdx += (typeAttrs.GetAttrFlag().GetWord(0) << attrShift) + typeAttrs.GetAlignValue(); + } else { + hIdx += typeAttrs.GetAttrFlag().GetHashOfbitset() + typeAttrs.GetAlignValue(); + } + return (hIdx % kTypeHashLength); } virtual void ClearContents() { diff --git a/src/mapleall/maple_ir/include/mpl2mpl_options.h b/src/mapleall/maple_ir/include/mpl2mpl_options.h index e600dd30712b263f639b4ade1bdc2f2f9e394cd2..067664b156b7993a0d9aa4f90f527803d8f42ece 100644 --- a/src/mapleall/maple_ir/include/mpl2mpl_options.h +++ b/src/mapleall/maple_ir/include/mpl2mpl_options.h @@ -34,8 +34,10 @@ extern maplecl::Option inlineOpt; extern maplecl::Option ipaClone; extern maplecl::Option ginlineOpt; extern maplecl::Option noInlineFunc; +extern maplecl::Option noIpaCloneFunc; extern maplecl::Option importFileList; extern maplecl::Option crossModuleInline; +extern maplecl::Option ignorePreferInline; extern maplecl::Option inlineSmallFunctionThreshold; extern maplecl::Option inlineHotFunctionThreshold; extern maplecl::Option inlineRecursiveFunctionThreshold; @@ -43,6 +45,8 @@ extern maplecl::Option inlineDepth; extern maplecl::Option inlineModuleGrow; extern maplecl::Option inlineColdFuncThresh; extern maplecl::Option respectAlwaysInline; +extern maplecl::Option symbolInterposition; +extern maplecl::Option ignoreHotAttr; extern maplecl::Option ginlineMaxNondeclaredInlineCallee; extern maplecl::Option ginlineMaxDepthIgnoreGrowthLimit; extern maplecl::Option ginlineSmallFunc; diff --git a/src/mapleall/maple_ir/include/opcodes.def b/src/mapleall/maple_ir/include/opcodes.def index a038adf61f3e68795299ea30db04d79d08c5b76e..9c02721444c00e0007dd5bc211379e60992940d4 100644 --- a/src/mapleall/maple_ir/include/opcodes.def +++ b/src/mapleall/maple_ir/include/opcodes.def @@ -38,7 +38,7 @@ OPCODE(callassertle, CallAssertBoundaryStmtNode, (OPCODEISSTMT | OPCODENOTMMPL | OPCODEASSERTUPPERBOUNDARY), 8) OPCODE(returnassertle, AssertBoundaryStmtNode, (OPCODEISSTMT | OPCODENOTMMPL | OPCODEASSERTUPPERBOUNDARY), 8) OPCODE(assignassertle, AssertBoundaryStmtNode, (OPCODEISSTMT | OPCODENOTMMPL | OPCODEASSERTUPPERBOUNDARY), 8) - OPCODE(abort, UnaryStmtNode, (OPCODEISSTMT | OPCODENOTMMPL), 8) + OPCODE(abort, NaryStmtNode, (OPCODEISSTMT | OPCODENOTMMPL), 8) OPCODE(assertnonnull, UnaryStmtNode, (OPCODEISSTMT | OPCODENOTMMPL | OPCODEASSERTNONNULL), 8) OPCODE(assignassertnonnull, AssignAssertNonnullStmtNode, (OPCODEISSTMT | OPCODENOTMMPL | OPCODEASSERTNONNULL), 8) OPCODE(callassertnonnull, CallAssertNonnullStmtNode, (OPCODEISSTMT | OPCODENOTMMPL | OPCODEASSERTNONNULL), 8) diff --git a/src/mapleall/maple_ir/include/option.h b/src/mapleall/maple_ir/include/option.h index 1b9af761833837a4fa3b3f99966b8ec96df5667c..c193615126802d3bfbf30e59faa8f550f0f12041 100644 --- a/src/mapleall/maple_ir/include/option.h +++ b/src/mapleall/maple_ir/include/option.h @@ -87,8 +87,12 @@ class Options { static bool enableIPAClone; static bool enableGInline; static std::string noInlineFuncList; + static std::string noIpaCloneFuncList; static std::string importFileList; static bool useCrossModuleInline; + static std::string inlineMpltDir; + static bool importInlineMplt; + static bool ignorePreferInline; static uint32 numOfCloneVersions; static uint32 numOfImpExprLowBound; static uint32 numOfImpExprHighBound; @@ -102,6 +106,8 @@ class Options { static uint32 inlineModuleGrowth; static uint32 inlineColdFunctionThreshold; static bool respectAlwaysInline; + static bool symbolInterposition; + static bool ignoreHotAttr; static bool inlineToAllCallers; static uint32 ginlineMaxNondeclaredInlineCallee; static bool ginlineAllowNondeclaredInlineSizeGrow; diff --git a/src/mapleall/maple_ir/include/tokens.h b/src/mapleall/maple_ir/include/tokens.h index f78767e13b7191c58815a085a0e9d38f4d4ab251..61fdcfa84947d867817805f1f40f7b6882bae311 100644 --- a/src/mapleall/maple_ir/include/tokens.h +++ b/src/mapleall/maple_ir/include/tokens.h @@ -56,6 +56,7 @@ enum TokenKind { TK_dotdotdot, // ... TK_colon, // : TK_asterisk, // * + TK_exclamation, // ! TK_string, // a literal string enclosed between " TK_eof }; diff --git a/src/mapleall/maple_ir/src/bin_mpl_export.cpp b/src/mapleall/maple_ir/src/bin_mpl_export.cpp index cd734903bc6205797f96d6724515f1b23a1889cb..593a208717758dd3ab41149327f70c7d0bd62f1b 100644 --- a/src/mapleall/maple_ir/src/bin_mpl_export.cpp +++ b/src/mapleall/maple_ir/src/bin_mpl_export.cpp @@ -208,7 +208,7 @@ void OutputTypeFunction(const MIRType &ty, BinaryMplExport &mplExport) { mplExport.WriteNum(kBinKindTypeFunction); mplExport.OutputTypeBase(type); mplExport.OutputType(type.GetRetTyIdx()); - mplExport.WriteNum(static_cast(type.funcAttrs.GetAttrFlag())); + mplExport.OutputFuncAttrFlag(type.funcAttrs.GetAttrFlag()); size_t size = type.GetParamTypeList().size(); mplExport.WriteNum(size); for (size_t i = 0; i < size; ++i) { @@ -508,7 +508,9 @@ void BinaryMplExport::OutputFieldPair(const FieldPair &fp) { OutputStr(fp.first); // GStrIdx OutputType(fp.second.first); // TyIdx FieldAttrs fa = fp.second.second; - WriteNum(static_cast(fa.GetAttrFlag())); + for (size_t i = 0; i < fa.GetAttrFlag().GetWordSize(); ++i) { + WriteNum(static_cast(fa.GetAttrFlag().GetWord(i))); + } WriteNum(fa.GetAlignValue()); if (fa.GetAttr(FLDATTR_static) && fa.GetAttr(FLDATTR_final) && (fa.GetAttr(FLDATTR_public) || fa.GetAttr(FLDATTR_protected))) { @@ -524,13 +526,13 @@ void BinaryMplExport::OutputFieldPair(const FieldPair &fp) { } } -void BinaryMplExport::OutputMethodPair(const MethodPair &memPool) { +void BinaryMplExport::OutputMethodPair(const MethodPair &methodPair) { // use GStrIdx instead, StIdx will be created by ImportMethodPair - MIRSymbol *funcSt = GlobalTables::GetGsymTable().GetSymbolFromStidx(memPool.first.Idx()); + MIRSymbol *funcSt = GlobalTables::GetGsymTable().GetSymbolFromStidx(methodPair.first.Idx()); CHECK_FATAL(funcSt != nullptr, "Pointer funcSt is nullptr, can't get symbol! Check it!"); WriteAsciiStr(GlobalTables::GetStrTable().GetStringFromStrIdx(funcSt->GetNameStrIdx())); - OutputType(memPool.second.first); // TyIdx - WriteNum(memPool.second.second.GetAttrFlag()); // FuncAttrs + OutputType(methodPair.second.first); // TyIdx + OutputFuncAttrFlag(methodPair.second.second.GetAttrFlag()); // FuncAttrs } void BinaryMplExport::OutputFieldsOfStruct(const FieldVector &fields) { @@ -691,7 +693,7 @@ void BinaryMplExport::OutputFunction(PUIdx puIdx) { CHECK_FATAL(funcSt != nullptr, "Pointer funcSt is nullptr, cannot get symbol! Check it!"); OutputSymbol(funcSt); OutputType(func->GetMIRFuncType()->GetTypeIndex()); - WriteNum(func->GetFuncAttrs().GetAttrFlag()); + OutputFuncAttrFlag(func->GetFuncAttrs().GetAttrFlag()); auto &attributes = func->GetFuncAttrs(); if (attributes.GetAttr(FUNCATTR_constructor_priority)) { @@ -709,7 +711,10 @@ void BinaryMplExport::OutputFunction(PUIdx puIdx) { for (FormalDef formalDef : func->GetFormalDefVec()) { OutputStr(formalDef.formalStrIdx); OutputType(formalDef.formalTyIdx); - WriteNum(static_cast(formalDef.formalAttrs.GetAttrFlag())); + auto tmpTypeAttrFlag = formalDef.formalAttrs.GetAttrFlag(); + for (size_t i = 0; i < tmpTypeAttrFlag.GetWordSize(); ++i) { + WriteNum(static_cast(tmpTypeAttrFlag.GetWord(i))); + } } // store Side Effect for each func if (func2SEMap) { @@ -739,6 +744,13 @@ void BinaryMplExport::OutputFunction(PUIdx puIdx) { mod.SetCurFunction(savedFunc); } +void BinaryMplExport::OutputFuncAttrFlag(const FuncAttrFlag &attrFlag) { + for (uint32 i = 0; i < kNumU64InFuncAttr; ++i) { + uint64 flagItem = ExtractAttrFlagElement(attrFlag, i); + WriteNum(static_cast(flagItem)); + } +} + void BinaryMplExport::WriteStrField(uint64 contentIdx) { Fixup(contentIdx, buf.size()); WriteNum(kBinStrStart); @@ -1300,7 +1312,10 @@ void BinaryMplExport::OutputTypePairs(const MIRInstantVectorType &type) { } void BinaryMplExport::OutputTypeAttrs(const TypeAttrs &ta) { - WriteNum(ta.GetAttrFlag()); + auto tmpTypeAttrFlag = ta.GetAttrFlag(); + for (size_t i = 0; i < tmpTypeAttrFlag.GetWordSize(); ++i) { + WriteNum(static_cast(tmpTypeAttrFlag.GetWord(i))); + } WriteNum(ta.GetAlignValue()); WriteNum(ta.GetPack()); } diff --git a/src/mapleall/maple_ir/src/bin_mpl_import.cpp b/src/mapleall/maple_ir/src/bin_mpl_import.cpp index b972dfc62a19b56a37e9f691366a498ccf8d6e3f..148c07e8882bea56ed2b5fbb6651d1a484424ef9 100644 --- a/src/mapleall/maple_ir/src/bin_mpl_import.cpp +++ b/src/mapleall/maple_ir/src/bin_mpl_import.cpp @@ -303,9 +303,8 @@ void BinaryMplImport::ImportMethodPair(MethodPair &memPool) { std::string funcName; ReadAsciiStr(funcName); TyIdx funcTyIdx = ImportType(); - int64 x = ReadNum(); - CHECK_FATAL(x >= 0, "ReadNum error, x: %d", x); - auto attrFlag = static_cast(x); + FuncAttrFlag attrFlag; + ImportFuncAttrFlag(attrFlag); GStrIdx strIdx = GlobalTables::GetStrTable().GetOrCreateStrIdxFromName(funcName); MIRSymbol *prevFuncSt = GlobalTables::GetGsymTable().GetSymbolFromStrIdx(strIdx); @@ -334,7 +333,7 @@ void BinaryMplImport::ImportMethodPair(MethodPair &memPool) { fn->SetMIRFuncType(funcType); fn->SetFileIndex(0); fn->SetBaseClassFuncNames(funcSt->GetNameStrIdx()); - fn->SetFuncAttrs(attrFlag); + fn->SetFuncAttrFlag(attrFlag); } memPool.first.SetFullIdx(funcSt->GetStIdx().FullIdx()); memPool.second.first.reset(funcTyIdx); @@ -500,7 +499,11 @@ void BinaryMplImport::Reset() { TypeAttrs BinaryMplImport::ImportTypeAttrs() { TypeAttrs ta; - ta.SetAttrFlag(static_cast(ReadNum())); + SimpleBitSet tmpTypeFlag; + for (size_t i = 0; i < ta.GetAttrFlag().GetWordSize(); ++i) { + tmpTypeFlag.SetWord(i, static_cast(ReadNum())); + } + ta.SetAttrFlag(tmpTypeFlag); ta.SetAlignValue(static_cast(ReadNum())); ta.SetPack(static_cast(ReadNum())); return ta; @@ -619,7 +622,9 @@ TyIdx BinaryMplImport::ImportType(bool forPointedType) { size_t idx = typTab.size(); typTab.push_back(TyIdx(0)); type.SetRetTyIdx(ImportType()); - type.funcAttrs.SetAttrFlag(static_cast(ReadNum())); + FuncAttrFlag attrFlag; + ImportFuncAttrFlag(attrFlag); + type.funcAttrs.SetAttrFlag(attrFlag); int64 size = ReadNum(); for (int64 i = 0; i < size; ++i) { type.GetParamTypeList().push_back(ImportType()); @@ -779,7 +784,9 @@ TyIdx BinaryMplImport::ImportTypeNonJava() { MIRFuncType type(strIdx); type.SetNameIsLocal(nameIsLocal); type.SetRetTyIdx(ImportTypeNonJava()); - type.funcAttrs.SetAttrFlag(static_cast(ReadNum())); + FuncAttrFlag attrFlag; + ImportFuncAttrFlag(attrFlag); + type.funcAttrs.SetAttrFlag(attrFlag); int64 size = ReadNum(); for (int64 i = 0; i < size; ++i) { type.GetParamTypeList().push_back(ImportTypeNonJava()); @@ -1034,14 +1041,20 @@ PUIdx BinaryMplImport::ImportFunction() { func->SetStIdx(funcSt->GetStIdx()); if (!inCG) { - func->SetFuncAttrs(ReadNum()); // merge side effect + FuncAttrFlag attrFlag; + ImportFuncAttrFlag(attrFlag); + func->SetFuncAttrFlag(attrFlag); // merge side effect } else { if (!func->IsDirty()) { func->SetDirty(true); - func->SetFuncAttrs(ReadNum()); // merge side effect + FuncAttrFlag attrFlag; + ImportFuncAttrFlag(attrFlag); + func->SetFuncAttrFlag(attrFlag); // merge side effect } else { + FuncAttrFlag attrFlag; + ImportFuncAttrFlag(attrFlag); FuncAttrs tmp; - tmp.SetAttrFlag(ReadNum()); + tmp.SetAttrFlag(attrFlag); if (func->IsNoDefArgEffect() != tmp.GetAttr(FUNCATTR_nodefargeffect)) { tmp.SetAttr(FUNCATTR_nodefargeffect, true); } @@ -1090,7 +1103,11 @@ PUIdx BinaryMplImport::ImportFunction() { GStrIdx strIdx = ImportStr(); TyIdx tyIdx = mod.IsJavaModule() ? ImportType() : ImportTypeNonJava(); FormalDef formalDef(strIdx, nullptr, tyIdx, TypeAttrs()); - formalDef.formalAttrs.SetAttrFlag(static_cast(ReadNum())); + SimpleBitSet tmpTypeFlag; + for (size_t j = 0; j < formalDef.formalAttrs.GetAttrFlag().GetWordSize(); ++j) { + tmpTypeFlag.SetWord(j, static_cast(ReadNum())); + } + formalDef.formalAttrs.SetAttrFlag(tmpTypeFlag); func->GetFormalDefVec().push_back(formalDef); } } else { @@ -1098,7 +1115,11 @@ PUIdx BinaryMplImport::ImportFunction() { for (size_t i = 0; i < size; i++) { func->GetFormalDefVec()[i].formalStrIdx = ImportStr(); func->GetFormalDefVec()[i].formalTyIdx = mod.IsJavaModule() ? ImportType() : ImportTypeNonJava(); - func->GetFormalDefVec()[i].formalAttrs.SetAttrFlag(static_cast(ReadNum())); + SimpleBitSet tmpTypeFlag; + for (size_t j = 0; j < func->GetFormalDefVec()[i].formalAttrs.GetAttrFlag().GetWordSize(); ++j) { + tmpTypeFlag.SetWord(j, static_cast(ReadNum())); + } + func->GetFormalDefVec()[i].formalAttrs.SetAttrFlag(tmpTypeFlag); } } @@ -1106,6 +1127,14 @@ PUIdx BinaryMplImport::ImportFunction() { return func->GetPuidx(); } +void BinaryMplImport::ImportFuncAttrFlag(FuncAttrFlag &attrFlag) { + std::array dataArr; + for (uint32 i = 0; i < kNumU64InFuncAttr; ++i) { + dataArr[i] = static_cast(ReadNum()); + } + InitAttrFlag(attrFlag, dataArr); +} + inline void BinaryMplImport::SkipTotalSize() { ReadInt(); } diff --git a/src/mapleall/maple_ir/src/debug_info.cpp b/src/mapleall/maple_ir/src/debug_info.cpp index 618e5fa8b10c76cfe53a13dc18e8fb10281a44b2..780608ba97dee05cb1092bd2be8dec4423a217da 100644 --- a/src/mapleall/maple_ir/src/debug_info.cpp +++ b/src/mapleall/maple_ir/src/debug_info.cpp @@ -617,8 +617,8 @@ void DebugInfo::BuildDebugInfoFunctions() { SetCurFunction(func); // function decl if (stridxDieIdMap.find(func->GetNameStrIdx().GetIdx()) == stridxDieIdMap.end()) { - DBGDie *funcDie = GetOrCreateFuncDeclDie(func); if (func->GetClassTyIdx().GetIdx() == 0 && func->GetBody()) { + DBGDie *funcDie = GetOrCreateFuncDeclDie(func); compUnit->AddSubVec(funcDie); } } @@ -836,8 +836,10 @@ DBGDie *DebugInfo::CreateVarDie(MIRSymbol *sym, const GStrIdx &strIdx) { die->AddAttr(DW_AT_decl_column, DW_FORM_data4, sym->GetSrcPosition().Column()); bool isLocal = sym->IsLocal(); + // TLS do not need normal DW_AT_location + bool isThreadLocal = sym->IsThreadLocal(); if (isLocal) { - if (sym->IsPUStatic()) { + if (sym->IsPUStatic() && !isThreadLocal) { // Use actual internal sym by cg PUIdx pIdx = GetCurFunction()->GetPuidx(); std::string ptrName = sym->GetName() + std::to_string(pIdx); @@ -846,7 +848,7 @@ DBGDie *DebugInfo::CreateVarDie(MIRSymbol *sym, const GStrIdx &strIdx) { } else { die->AddSimpLocAttr(DW_AT_location, DW_FORM_exprloc, DW_OP_fbreg, kDbgDefaultVal); } - } else { + } else if (!isThreadLocal) { // global var just use its name as address in .s uint64 idx = strIdx.GetIdx(); if ((sym->IsReflectionClassInfo() && !sym->IsReflectionArrayClassInfo()) || sym->IsStatic()) { @@ -1497,7 +1499,7 @@ DBGDie *DebugInfo::CreateStructTypeDie(const GStrIdx &strIdx, const MIRStructTyp die = idDieMap[id]; ASSERT(die, "update type die not exist"); } else { - DwTag tag = structType->GetKind() == kTypeStruct ? DW_TAG_structure_type : DW_TAG_union_type; + DwTag tag = structType->GetKind() == kTypeUnion ? DW_TAG_union_type : DW_TAG_structure_type; die = module->GetMemPool()->New(module, tag); tyIdxDieIdMap[tid] = die->GetId(); } @@ -1511,11 +1513,16 @@ DBGDie *DebugInfo::CreateStructTypeDie(const GStrIdx &strIdx, const MIRStructTyp const std::string &name = GlobalTables::GetStrTable().GetStringFromStrIdx(strIdx); bool keep = (name.find("unnamed.") == std::string::npos); - - die->AddAttr(DW_AT_decl_line, DW_FORM_data4, kStructDBGSize); - die->AddAttr(DW_AT_name, DW_FORM_strp, strIdx.GetIdx(), keep); - die->AddAttr(DW_AT_byte_size, DW_FORM_data4, kDbgDefaultVal); - die->AddAttr(DW_AT_decl_file, DW_FORM_data4, mplSrcIdx.GetIdx()); + if (structType->GetKind() == kTypeStructIncomplete) { + die->AddAttr(DW_AT_name, DW_FORM_strp, strIdx.GetIdx(), keep); + die->AddAttr(DW_AT_declaration, DW_FORM_data4, 1); + } else { + die->AddAttr(DW_AT_decl_line, DW_FORM_data4, kStructDBGSize); + die->AddAttr(DW_AT_name, DW_FORM_strp, strIdx.GetIdx(), keep); + die->AddAttr(DW_AT_byte_size, DW_FORM_data4, kDbgDefaultVal); + die->AddAttr(DW_AT_decl_file, DW_FORM_data4, mplSrcIdx.GetIdx()); + } + // store tid for cg emitter die->AddAttr(DW_AT_type, DW_FORM_data4, tid, false); diff --git a/src/mapleall/maple_ir/src/global_tables.cpp b/src/mapleall/maple_ir/src/global_tables.cpp index e15d9da0a5ec015b93ebcf77c8b4648300ae0709..abd8004b306b4bf557ef80313fa4d741bdffa380 100644 --- a/src/mapleall/maple_ir/src/global_tables.cpp +++ b/src/mapleall/maple_ir/src/global_tables.cpp @@ -290,6 +290,17 @@ void TypeTable::AddFieldToStructType(MIRStructType &structType, const std::strin structType.GetFields().push_back(FieldPair(strIdx, TyIdxFieldAttrPair(fieldType.GetTypeIndex(), fieldAttrs))); } +CPragma *GPragmaTable::CreateCPragma(CPragmaKind k, uint32 id, const std::string &content) { + switch (k) { + case CPragmaKind::PRAGMA_prefer_inline: { + return PreferInlinePragma::CreatePIP(id, content); + } + default: { + CHECK_FATAL_FALSE("Unsupported Pragma!"); + } + } +} + void FPConstTable::PostInit() { MIRType &typeFloat = *GlobalTables::GetTypeTable().GetPrimType(PTY_f32); nanFloatConst = new MIRFloatConst(NAN, typeFloat); diff --git a/src/mapleall/maple_ir/src/lexer.cpp b/src/mapleall/maple_ir/src/lexer.cpp index 201f5d577ec22076fdf58f6986ba3046414290c5..c549b7784023bdd7519dbfca429b795acb4f8add 100644 --- a/src/mapleall/maple_ir/src/lexer.cpp +++ b/src/mapleall/maple_ir/src/lexer.cpp @@ -435,6 +435,10 @@ TokenKind MIRLexer::GetTokenWithPrefixExclamation() { GenName(); return TK_typeparam; } + if (utils::IsDigit(c)) { + (void)GetConstVal(); + return TK_exclamation; + } // for error reporting. const uint32 printLength = 2; name = line.substr(curIdx - 1, printLength); @@ -660,6 +664,9 @@ TokenKind MIRLexer::LexToken() { case '^': return GetTokenWithPrefixAtOrCircumflex(curChar); case '!': + if (kind == TK_pragma) { + return TK_exclamation; + } return GetTokenWithPrefixExclamation(); case '\'': return GetTokenWithPrefixQuotation(); diff --git a/src/mapleall/maple_ir/src/mir_module.cpp b/src/mapleall/maple_ir/src/mir_module.cpp index 4336e4828f4fc8c92090da31bb90f91cc2108200..aae1dcd698d52412d8e3e9d697e5e766b6de96f8 100644 --- a/src/mapleall/maple_ir/src/mir_module.cpp +++ b/src/mapleall/maple_ir/src/mir_module.cpp @@ -13,6 +13,7 @@ * See the Mulan PSL v2 for more details. */ #include "mir_module.h" +#include #include "mir_const.h" #include "mir_preg.h" #include "mir_function.h" @@ -53,7 +54,8 @@ MIRModule::MIRModule(const std::string &fn) partO2FuncList(memPoolAllocator.Adapter()), safetyWarningMap(memPoolAllocator.Adapter()), tdataVarOffset(memPoolAllocator.Adapter()), - tbssVarOffset(memPoolAllocator.Adapter()) { + tbssVarOffset(memPoolAllocator.Adapter()), + tlsVarOffset(memPoolAllocator.Adapter()) { GlobalTables::GetGsymTable().SetModule(this); typeNameTab = memPool->New(memPoolAllocator); mirBuilder = memPool->New(this); @@ -61,6 +63,9 @@ MIRModule::MIRModule(const std::string &fn) scope = memPool->New(this, nullptr); scope->SetIsLocal(false); IntrinDesc::InitMIRModule(this); + if (opts::aggressiveTlsWarmupFunction.IsEnabledByUser()) { + SetTlsWarmupFunction(opts::aggressiveTlsWarmupFunction.GetValue()); + } } MIRModule::~MIRModule() { @@ -306,6 +311,14 @@ void MIRModule::DumpGlobals(bool emitStructureType) const { scope->Dump(0); } } + auto pragmaVector = GlobalTables::GetGPragmaTable().GetPragmaTable(); + if (pragmaVector.size() != 0) { + for (CPragma *pragma : pragmaVector) { + if (pragma != nullptr) { + pragma->Dump(); + } + } + } } void MIRModule::Dump(bool emitStructureType, const std::unordered_set *dumpFuncSet) const { @@ -712,6 +725,16 @@ void MIRModule::OutputAsciiMpl(const char *phaseName, const char *suffix, mplFile.close(); } +void MIRModule::SetFileName(const std::string &name) { + fileName = name; + fltoFileName = name; + std::string rootPath = opts::rootPath.GetValue(); + uint8_t strNum = count(rootPath.begin(), rootPath.end(), '/'); + if (strNum > 1) { + fltoFileName = fltoFileName.replace(0, rootPath.size(), "/"); + } +} + uint32 MIRModule::GetFileinfo(GStrIdx strIdx) const { for (auto &infoElem : fileInfo) { if (infoElem.first == strIdx) { diff --git a/src/mapleall/maple_ir/src/mir_nodes.cpp b/src/mapleall/maple_ir/src/mir_nodes.cpp index 8c73dbbeee677a212fa7bc78a63993e623b11e05..929b2eb06f59b845a46ab035d6e95e67fe11c9af 100644 --- a/src/mapleall/maple_ir/src/mir_nodes.cpp +++ b/src/mapleall/maple_ir/src/mir_nodes.cpp @@ -1126,7 +1126,7 @@ void CallAssertBoundaryStmtNode::Dump(int32 indent) const { void DumpCallReturns(const MIRModule &mod, CallReturnVector nrets, int32 indent) { const MIRFunction *mirFunc = mod.CurFunction(); if (nrets.empty()) { - LogInfo::MapleLogger() << " {}\n"; + LogInfo::MapleLogger() << " {}"; return; } else if (nrets.size() == 1) { StIdx stIdx = nrets.begin()->first; @@ -1137,7 +1137,7 @@ void DumpCallReturns(const MIRModule &mod, CallReturnVector nrets, int32 indent) FieldID fieldID = regFieldPair.GetFieldID(); LogInfo::MapleLogger() << " { dassign "; LogInfo::MapleLogger() << (stIdx.Islocal() ? "%" : "$"); - LogInfo::MapleLogger() << st->GetName() << " " << fieldID << " }\n"; + LogInfo::MapleLogger() << st->GetName() << " " << fieldID << " }"; return; } else { PregIdx regIdx = regFieldPair.GetPregIdx(); @@ -1145,7 +1145,7 @@ void DumpCallReturns(const MIRModule &mod, CallReturnVector nrets, int32 indent) ASSERT(mirPreg != nullptr, "mirPreg is null"); LogInfo::MapleLogger() << " { regassign"; LogInfo::MapleLogger() << " " << GetPrimTypeName(mirPreg->GetPrimType()); - LogInfo::MapleLogger() << " %" << mirPreg->GetPregNo() << "}\n"; + LogInfo::MapleLogger() << " %" << mirPreg->GetPregNo() << "}"; return; } } @@ -1171,7 +1171,7 @@ void DumpCallReturns(const MIRModule &mod, CallReturnVector nrets, int32 indent) } } PrintIndentation(indent + 1); - LogInfo::MapleLogger() << "}\n"; + LogInfo::MapleLogger() << "}"; } // iread expr has sideeffect, may cause derefference error @@ -1239,11 +1239,17 @@ void CallNode::Dump(int32 indent, bool newline) const { MIRFunction *func = GlobalTables::GetFunctionTable().GetFunctionFromPuidx(puIdx); LogInfo::MapleLogger() << " &" << func->GetName(); NaryOpnds::Dump(indent); + bool addNewLine = false; if (kOpcodeInfo.IsCallAssigned(GetOpCode())) { DumpCallReturns(*theMIRModule, this->GetReturnVec(), indent); + addNewLine = true; } else if (newline) { - LogInfo::MapleLogger() << '\n'; + addNewLine = true; + } + for (auto pragmaId : *GetPragmas()) { + LogInfo::MapleLogger() << " !" << pragmaId; } + LogInfo::MapleLogger() << (addNewLine ? "\n" : " "); } MIRType *IcallNode::GetCallReturnType() { @@ -1275,6 +1281,7 @@ void IcallNode::Dump(int32 indent, bool newline) const { NaryOpnds::Dump(indent); if (kOpcodeInfo.IsCallAssigned(GetOpCode())) { DumpCallReturns(*theMIRModule, this->returnValues, indent); + LogInfo::MapleLogger() << "\n"; } else if (newline) { LogInfo::MapleLogger() << '\n'; } @@ -1301,6 +1308,7 @@ void IntrinsiccallNode::Dump(int32 indent, bool newline) const { NaryOpnds::Dump(indent); if (kOpcodeInfo.IsCallAssigned(GetOpCode())) { DumpCallReturns(*theMIRModule, this->GetReturnVec(), indent); + LogInfo::MapleLogger() << "\n"; } else if (newline) { LogInfo::MapleLogger() << '\n'; } @@ -1318,6 +1326,7 @@ void CallinstantNode::Dump(int32 indent, bool newline) const { NaryOpnds::Dump(indent); if (kOpcodeInfo.IsCallAssigned(GetOpCode())) { DumpCallReturns(*theMIRModule, this->GetReturnVec(), indent); + LogInfo::MapleLogger() << "\n"; } else if (newline) { LogInfo::MapleLogger() << '\n'; } diff --git a/src/mapleall/maple_ir/src/mir_parser.cpp b/src/mapleall/maple_ir/src/mir_parser.cpp index 7f78fe1c8aa624e91440605c1c070b7a98e40ee2..3db4670bae34501c36a2aa73175616e950bdc903 100644 --- a/src/mapleall/maple_ir/src/mir_parser.cpp +++ b/src/mapleall/maple_ir/src/mir_parser.cpp @@ -985,7 +985,7 @@ bool MIRParser::SetDataForIntrinsiccallNode(IntrinsiccallNode &intrnCallNode, bo return false; } intrnCallNode.SetNOpnd(opndsVec); - intrnCallNode.SetNumOpnds(opndsVec.size()); + intrnCallNode.SetNumOpnds(static_cast(opndsVec.size())); if (isAssigned) { CallReturnVector retsVec(mod.CurFuncCodeMemPoolAllocator()->Adapter()); if (!ParseCallReturns(retsVec)) { @@ -1826,6 +1826,18 @@ bool MIRParser::ParseStatement(StmtNodePtr &stmt) { if (safeRegionFlag.top()) { stmt->SetInSafeRegion(); } + while (lexer.GetTokenKind() == TK_exclamation) { + auto pragmaIndex = static_cast(lexer.theIntVal); + if (pragmaIndex >= GlobalTables::GetGPragmaTable().GetPragmaTable().size()) { + Error("expect defined pragma but get "); + return false; + } + auto *pragmas = stmt->GetPragmas(); + if (pragmas) { + (void)pragmas->emplace(static_cast(pragmaIndex)); + } + (void)lexer.NextToken(); + } } return true; } diff --git a/src/mapleall/maple_ir/src/mir_scope.cpp b/src/mapleall/maple_ir/src/mir_scope.cpp index 4a67f837dddb0076a4530a822ca6cf620b7a562f..8f2f88b3ee2138fca41ae07b6bfd76ed7e67b4c2 100644 --- a/src/mapleall/maple_ir/src/mir_scope.cpp +++ b/src/mapleall/maple_ir/src/mir_scope.cpp @@ -104,12 +104,15 @@ bool MIRScope::IsSubScope(const MIRScope *scp) const { // s1 and s2 has join // (s1.low (s2.low s1.high] s2.high] // (s2.low (s1.low s2.high] s1.high] +// Notice that the included macro stmt will lost its exact column, +// so compound stmts could have the same line and the same column. bool MIRScope::HasJoinScope(const MIRScope *scp1, const MIRScope *scp2) const { auto &l1 = scp1->GetRangeLow(); auto &h1 = scp1->GetRangeHigh(); auto &l2 = scp2->GetRangeLow(); auto &h2 = scp2->GetRangeHigh(); - return (l1.IsBfOrEq(l2) && l2.IsBfOrEq(h1)) || (l2.IsBfOrEq(l1) && l1.IsBfOrEq(h2)); + return (l1.IsEq(l2) && l1.IsBf(h1) && l2.IsBf(h2)) || (h1.IsEq(h2) && l1.IsBf(h1) && l2.IsBf(h2)) || + (l1.IsBf(l2) && l2.IsBf(h1)) || (l2.IsBf(l1) && l1.IsBf(h2)); } // scope range of s1 and s2 may be completly same when macro calling macro expand @@ -155,11 +158,15 @@ SrcPosition MIRScope::GetScopeEndPos(const SrcPosition &pos) { bool MIRScope::AddScope(MIRScope *scope) { // check first if it is valid with parent scope and sibling sub scopes - CHECK_FATAL(IsSubScope(scope), "<%s %s> is not a subscope of scope <%s %s>", - scope->GetRangeLow().DumpLocWithColToString().c_str(), - scope->GetRangeHigh().DumpLocWithColToString().c_str(), - GetRangeLow().DumpLocWithColToString().c_str(), - GetRangeHigh().DumpLocWithColToString().c_str()); + // if parent scope is a result of gnu line markers, we do not need to check. + // GDB testsuits do not cover this case for now. + if (GetRangeLow().FileNum() == GetRangeHigh().FileNum()) { + CHECK_FATAL(IsSubScope(scope), "<%s %s> is not a subscope of scope <%s %s>", + scope->GetRangeLow().DumpLocWithColToString().c_str(), + scope->GetRangeHigh().DumpLocWithColToString().c_str(), + GetRangeLow().DumpLocWithColToString().c_str(), + GetRangeHigh().DumpLocWithColToString().c_str()); + } for (auto *s : subScopes) { if (!HasSameRange(s, scope) && HasJoinScope(s, scope)) { CHECK_FATAL(false, "<%s %s> has join range with another subscope <%s %s>", diff --git a/src/mapleall/maple_ir/src/mir_type.cpp b/src/mapleall/maple_ir/src/mir_type.cpp index cdf787991335d9f0990c846ce7cc7955139871f8..a55b367a2397a2f42838a9a66319c34a56d4e5f0 100644 --- a/src/mapleall/maple_ir/src/mir_type.cpp +++ b/src/mapleall/maple_ir/src/mir_type.cpp @@ -601,12 +601,18 @@ void TypeAttrs::DumpAttributes() const { #undef NOCONTENT_ATTR #undef TYPE_ATTR // dump attr with content + if (GetAttr(ATTR_type_alias) && GetTypeAlias() != "") { + LogInfo::MapleLogger() << " type_alias(" << GetTypeAlias() << ")"; + } if (attrAlign != 0) { LogInfo::MapleLogger() << " align(" << GetAlign() << ")"; } if (GetAttr(ATTR_pack) && GetPack() != 0) { LogInfo::MapleLogger() << " pack(" << GetPack() << ")"; } + if (attrTypeAlign != 0) { + LogInfo::MapleLogger() << " type_align(" << GetTypeAlign() << ")"; + } } void FieldAttrs::DumpAttributes() const { @@ -622,6 +628,9 @@ void FieldAttrs::DumpAttributes() const { #undef NOCONTENT_ATTR #undef FIELD_ATTR // dump attr with content + if (attrTypeAlign != 0) { + LogInfo::MapleLogger() << " type_align(" << GetTypeAlign() << ")"; + } if (attrAlign != 0) { LogInfo::MapleLogger() << " align(" << GetAlign() << ")"; } @@ -839,6 +848,9 @@ size_t MIRArrayType::GetSize() const { numelems *= sizeArray[i]; } size = elemsize * numelems; + if (GetElemType()->GetTypeAttrs().IsTypedef()) { + size = RoundUp(size, GetElemType()->GetAlign()); + } return size; } @@ -1585,6 +1597,10 @@ bool MIRType::EqualTo(const MIRType &mirType) const { return typeKind == mirType.typeKind && primType == mirType.primType; } +bool MIRType::EqualToWithAttr(const MIRType &mirType) const { + return (EqualTo(mirType) && + (typeAttrs.GetAttr(maple::AttrKind::ATTR_const) == mirType.typeAttrs.GetAttr(maple::AttrKind::ATTR_const))); +} bool MIRPtrType::EqualTo(const MIRType &type) const { if (typeKind != type.GetKind() || GetPrimType() != type.GetPrimType()) { return false; @@ -2380,9 +2396,8 @@ uint32 MIRStructType::NumberOfFieldIDs() const { TypeAttrs FieldAttrs::ConvertToTypeAttrs() const { TypeAttrs attr; - constexpr uint32 maxAttrNum = 64; - for (uint32 i = 0; i < maxAttrNum; ++i) { - if ((attrFlag & (1ULL << i)) == 0) { + for (uint32 i = 0; i < kFieldAttrNum; ++i) { + if (attrFlag[i] == 0) { continue; } auto attrKind = static_cast(i); diff --git a/src/mapleall/maple_ir/src/mpl2mpl_options.cpp b/src/mapleall/maple_ir/src/mpl2mpl_options.cpp index 42e7ecbb5738d1819702d955662e506c15149093..74d8920146c13e324e2005f5e5b5831d62d578ec 100644 --- a/src/mapleall/maple_ir/src/mpl2mpl_options.cpp +++ b/src/mapleall/maple_ir/src/mpl2mpl_options.cpp @@ -70,24 +70,25 @@ maplecl::Option inlineWithProfile({"--inline-with-profile"}, maplecl::Option inlineOpt({"--inline"}, " --inline \tEnable function inlining\n" " --no-inline \tDisable function inlining\n", - {driverCategory, mpl2mplCategory}, - maplecl::DisableEvery({"-fno-inline", "--no-inline"})); + {driverCategory, mpl2mplCategory}, kOptMaple, maplecl::DisableEvery({"-fno-inline", "--no-inline"})); maplecl::Option ipaClone({"--ipa-clone"}, " --ipa-clone \tEnable ipa constant_prop and clone\n" " --no-ipa-clone \tDisable ipa constant_prop and clone\n", - {mpl2mplCategory}, - maplecl::DisableWith("--no-ipa-clone")); + {mpl2mplCategory}, maplecl::DisableWith("--no-ipa-clone")); maplecl::Option ginlineOpt({"--ginline"}, " --ginline \tEnable greedy inline\n" " --no-ginline \tDisable greedy inline\n", - {mpl2mplCategory}, - maplecl::DisableWith("--no-ginline")); + {mpl2mplCategory}, maplecl::DisableWith("--no-ginline")); maplecl::Option noInlineFunc({"--no-inlinefunclist"}, " --no-inlinefunclist=list \tDo not inline function in this list\n", - {mpl2mplCategory}); + {mpl2mplCategory, driverCategory}, kOptMaple); + +maplecl::Option noIpaCloneFunc({"--no-ipaclone-funclist"}, + " --no-ipaclone-funclist=list \tDo not inline function in this list\n", + {mpl2mplCategory, driverCategory}, kOptMaple); maplecl::Option importFileList({"--importfilelist"}, " --importfilelist=list \tImport there files to do cross module analysis\n", @@ -96,8 +97,12 @@ maplecl::Option importFileList({"--importfilelist"}, maplecl::Option crossModuleInline({"--cross-module-inline"}, " --cross-module-inline \tEnable cross-module inlining\n" " --no-cross-module-inline \tDisable cross-module inlining\n", - {mpl2mplCategory}, - maplecl::DisableWith("--no-cross-module-inline")); + {mpl2mplCategory}, maplecl::DisableWith("--no-cross-module-inline")); + +maplecl::Option ignorePreferInline({"--ignorepreferinline"}, + " --ignorepreferinline \tIgnore the pragma of perfer inline\n" + " --no-ignorepreferinline \tDo ignore the pragma of prefer inline, by default\n", + {mpl2mplCategory}, maplecl::DisableWith("--no-ignorepreferinline")); maplecl::Option inlineSmallFunctionThreshold({"--inline-small-function-threshold"}, " --inline-small-function-threshold=15 \tThreshold for inlining small function\n", @@ -128,6 +133,17 @@ maplecl::Option respectAlwaysInline({"--respect-always-inline"}, " --no-respect-always-inline \tDisable always_inline\n", {mpl2mplCategory}, maplecl::DisableWith("--no-respect-always-inline")); +maplecl::Option symbolInterposition({"--symbol-interposition"}, + " --symbol-interposition \tEnable symbol interposition\n" + " --no-symbol-interposition \tDisable symbol interposition\n", + {driverCategory, mpl2mplCategory}, kOptMaple, maplecl::DisableWith("--no-symbol-interposition")); + +maplecl::Option ignoreHotAttr({"--ignore-hot-attr"}, + " --ignore-hot-attr \tIgnore source code hot attribute\n" + " --no-ignore-hot-attr \tDo not ignore source code hot attribute\n", + {mpl2mplCategory}, + maplecl::DisableWith("--no-ignore-hot-attr")); + maplecl::Option ginlineMaxNondeclaredInlineCallee({"--ginline-max-nondeclared-inline-callee"}, "" "", @@ -194,14 +210,12 @@ maplecl::Option nativeWrapper({"--nativewrapper"}, {mpl2mplCategory}, maplecl::DisableWith("--no-nativewrapper")); maplecl::Option regNativeDynamicOnly({"--regnative-dynamic-only"}, - " --regnative-dynamic-only \tOnly Generate dynamic register code," - " Report Fatal Msg if no implemented\n" + " --regnative-dynamic-only \tOnly Generate dynamic register code, Report Fatal Msg if no implemented\n" " --no-regnative-dynamic-only \tDisable regnative-dynamic-only\n", {mpl2mplCategory}, maplecl::DisableWith("--no-regnative-dynamic-only")); maplecl::Option staticBindingList({"--static-binding-list"}, - " --static-bindig-list \tOnly Generate static binding" - " function in file configure list\n" + " --static-bindig-list \tOnly Generate static binding function in file configure list\n" " \t--static-bindig-list=file\n", {mpl2mplCategory}); @@ -238,8 +252,7 @@ maplecl::Option userc({"--userc"}, {mpl2mplCategory}, maplecl::DisableWith("--no-userc")); maplecl::Option strictNaiveRc({"--strict-naiverc"}, - " --strict-naiverc \tStrict Naive RC mode," - " assume no unsafe multi-thread read/write racing\n" + " --strict-naiverc \tStrict Naive RC mode, assume no unsafe multi-thread read/write racing\n" " --no-strict-naiverc \tDisable strict-naiverc\n", {mpl2mplCategory}, maplecl::DisableWith("--no-strict-naiverc")); @@ -265,7 +278,7 @@ maplecl::Option os({"-Os", "--Os"}, {mpl2mplCategory}); maplecl::Option criticalNative({"--CriticalNative"}, - " --CriticalNative \tFor CriticalNative optimization\n" + " --CriticalNative \tFor CriticalNative optimization.\n" " \t--CriticalNative=list_file\n", {mpl2mplCategory}); @@ -305,11 +318,11 @@ maplecl::Option mapleLinkerNolocal({"--maplelinker-nolocal"}, {mpl2mplCategory}, maplecl::DisableWith("--no-maplelinker-nolocal")); maplecl::Option buildApp({"--build-app"}, - " --build-app[=0,1,2] \tbuild the app dex 0:off, 1:method1, 2:method2, ignore:method1\n", + " --build-app[=0,1,2] \tBuild the app dex 0:off, 1:method1, 2:method2, ignore:method1\n", {mpl2mplCategory}, maplecl::kOptionalValue, maplecl::Init(1)); maplecl::Option partialAot({"--partialAot"}, - " --partialAot \tenerate the detailed information for the partialAot\n", + " --partialAot \tEnerate the detailed information for the partialAot\n", {mpl2mplCategory}, maplecl::kOptionalValue); maplecl::Option decoupleInit({"--decouple-init"}, @@ -351,8 +364,8 @@ maplecl::Option dumpDevirtual({"--dump-devirtual-list"}, {mpl2mplCategory}); maplecl::Option readDevirtual({"--read-devirtual-list"}, - " --read-devirtual-list \tRead in candidates of devirtualization from\n" - " \t a specified file and perform devirtualizatin\n" + " --read-devirtual-list \tRead in candidates of devirtualization from a specified file and " + "perform devirtualizatin\n" " \t--read-devirtual-list=\n", {mpl2mplCategory}); @@ -372,9 +385,9 @@ maplecl::Option checkClInvocation({"--check_cl_invocation"}, {mpl2mplCategory}); maplecl::Option dumpClInvocation({"--dump_cl_invocation"}, - " --dump_cl_invocation \tFor classloader invocation dumping.\n" - " \tWork only if already set --check_cl_invocation\n" - " --no-dump_cl_invocation \tDisable dump_cl_invocation\n", + " --dump_cl_invocation \tFor classloader invocation dumping. Work only if already " + "set --check_cl_invocation.\n" + " --no-dump_cl_invocation \tDisable dump_cl_invocation.\n", {mpl2mplCategory}, maplecl::DisableWith("--no-dump_cl_invocation")); maplecl::Option warning({"--warning"}, @@ -382,47 +395,47 @@ maplecl::Option warning({"--warning"}, {mpl2mplCategory}); maplecl::Option lazyBinding({"--lazy-binding"}, - " --lazy-binding \tBind class symbols lazily[default off]\n" - " --no-lazy-binding \tDon't bind class symbols lazily\n", + " --lazy-binding \tBind class symbols lazily[default off].\n" + " --no-lazy-binding \tDon't bind class symbols lazily.\n", {mpl2mplCategory}, maplecl::DisableWith("--no-lazy-binding")); maplecl::Option hotFix({"--hot-fix"}, - " --hot-fix \tOpen for App hot fix[default off]\n" - " --no-hot-fix \tDon't open for App hot fix\n", + " --hot-fix \tOpen for App hot fix[default off].\n" + " --no-hot-fix \tDon't open for App hot fix.\n", {mpl2mplCategory}, maplecl::DisableWith("--no-hot-fix")); maplecl::Option compactMeta({"--compact-meta"}, - " --compact-meta \tEnable compact method and field meta\n" - " --no-compact-meta \tDisable compact method and field meta\n", + " --compact-meta \tEnable compact method and field meta.\n" + " --no-compact-meta \tDisable compact method and field meta.\n", {mpl2mplCategory}, maplecl::DisableWith("--no-compact-meta")); maplecl::Option genPGOReport({"--gen-pgo-report"}, - " --gen-pgo-report \tDisplay pgo report\n" + " --gen-pgo-report \tDisplay pgo report.\n" " --no-gen-pgo-report \n", {mpl2mplCategory}, maplecl::DisableWith("--no-gen-pgo-report")); maplecl::Option inlineCache({"--inlineCache"}, - " --inlineCache \tbuild inlineCache 0,1,2,3\n", + " --inlineCache \tbuild inlineCache 0,1,2,3.\n", {mpl2mplCategory}, maplecl::kOptionalValue, maplecl::Init(0)); maplecl::Option noComment({"--no-comment"}, - " --no-comment \tbuild inlineCache 0:off, 1:open\n", + " --no-comment \tbuild inlineCache 0:off, 1:open.\n", {mpl2mplCategory}); maplecl::Option rmNouseFunc({"--rmnousefunc"}, - " --rmnousefunc \tEnable remove no-used file-static function\n" - " --no-rmnousefunc \tDisable remove no-used file-static function\n", + " --rmnousefunc \tEnable remove no-used file-static function.\n" + " --no-rmnousefunc \tDisable remove no-used file-static function.\n", {mpl2mplCategory}, maplecl::DisableWith("--no-rmnousefunc")); maplecl::Option sideEffect({"--side-effect"}, - " --side-effect \tIPA: analysis side-effect\n" + " --side-effect \tIPA: analysis side-effect.\n" " --no-side-effect \n", {mpl2mplCategory}, maplecl::DisableWith("--no-side-effect")); maplecl::Option sideEffectWhiteList({"--side-effect-white-list"}, - " --side-effect-white-list \tIPA side-effect: using function white list\n" + " --side-effect-white-list \tIPA side-effect: using function white list.\n" " --side-effect-no-white-list \n", - {driverCategory, mpl2mplCategory}, maplecl::DisableWith("--side-effect-no-white-list")); + {driverCategory, mpl2mplCategory}, kOptMaple, maplecl::DisableWith("--side-effect-no-white-list")); maplecl::Option dumpIPA({"--dump-ipa"}, " --dump-ipa \tIPA: dump\n" diff --git a/src/mapleall/maple_ir/src/option.cpp b/src/mapleall/maple_ir/src/option.cpp index 3d31e583f222db06f8ee056646d74a6191d7f416..283785f44209eb025851f48fd94c721379dae079 100644 --- a/src/mapleall/maple_ir/src/option.cpp +++ b/src/mapleall/maple_ir/src/option.cpp @@ -41,8 +41,12 @@ bool Options::inlineWithProfile = false; bool Options::useInline = true; // Enabled by default bool Options::enableGInline = true; bool Options::useCrossModuleInline = true; // Enabled by default +bool Options::importInlineMplt = false; // Disabled by default +bool Options::ignorePreferInline = false; // Disabled by default std::string Options::noInlineFuncList = ""; +std::string Options::noIpaCloneFuncList = ""; std::string Options::importFileList = ""; +std::string Options::inlineMpltDir = ""; // These two thresholds will be scaled down if new cost module was used uint32 Options::inlineSmallFunctionThreshold = 80; // Only for srcLangC, value will be reset later for other srcLang uint32 Options::inlineHotFunctionThreshold = 100; // Only for srcLangC, value will be reset later for other srcLang @@ -51,6 +55,8 @@ uint32 Options::inlineDepth = 8; uint32 Options::inlineModuleGrowth = 10; uint32 Options::inlineColdFunctionThreshold = 3; bool Options::respectAlwaysInline = true; +bool Options::symbolInterposition = false; +bool Options::ignoreHotAttr = false; bool Options::inlineToAllCallers = true; uint32 Options::ginlineMaxNondeclaredInlineCallee = 400; bool Options::ginlineAllowNondeclaredInlineSizeGrow = false; @@ -206,7 +212,10 @@ bool Options::SolveOptions(bool isDebug) const { maplecl::CopyIfEnabled(enableIPAClone, opts::mpl2mpl::ipaClone); maplecl::CopyIfEnabled(enableGInline, opts::mpl2mpl::ginlineOpt); maplecl::CopyIfEnabled(noInlineFuncList, opts::mpl2mpl::noInlineFunc); + maplecl::CopyIfEnabled(noIpaCloneFuncList, opts::mpl2mpl::noIpaCloneFunc); maplecl::CopyIfEnabled(importFileList, opts::mpl2mpl::importFileList); + maplecl::CopyIfEnabled(inlineMpltDir, opts::inlineMpltDir); + maplecl::CopyIfEnabled(ignorePreferInline, opts::mpl2mpl::ignorePreferInline); maplecl::CopyIfEnabled(numOfCloneVersions, opts::mpl2mpl::numOfCloneVersions); maplecl::CopyIfEnabled(numOfImpExprLowBound, opts::mpl2mpl::numOfImpExprLowBound); maplecl::CopyIfEnabled(numOfImpExprHighBound, opts::mpl2mpl::numOfImpExprHighBound); @@ -214,6 +223,7 @@ bool Options::SolveOptions(bool isDebug) const { maplecl::CopyIfEnabled(numOfCallSiteUpBound, opts::mpl2mpl::numOfCallSiteUpBound); maplecl::CopyIfEnabled(numOfConstpropValue, opts::mpl2mpl::numOfConstpropValue); maplecl::CopyIfEnabled(useCrossModuleInline, opts::mpl2mpl::crossModuleInline); + maplecl::CopyIfEnabled(importInlineMplt, opts::importMpltInline); maplecl::CopyIfEnabled(inlineSmallFunctionThreshold, opts::mpl2mpl::inlineSmallFunctionThreshold); maplecl::CopyIfEnabled(inlineHotFunctionThreshold, opts::mpl2mpl::inlineHotFunctionThreshold); maplecl::CopyIfEnabled(inlineRecursiveFunctionThreshold, opts::mpl2mpl::inlineRecursiveFunctionThreshold); @@ -221,6 +231,8 @@ bool Options::SolveOptions(bool isDebug) const { maplecl::CopyIfEnabled(inlineModuleGrowth, opts::mpl2mpl::inlineModuleGrow); maplecl::CopyIfEnabled(inlineColdFunctionThreshold, opts::mpl2mpl::inlineColdFuncThresh); maplecl::CopyIfEnabled(respectAlwaysInline, opts::mpl2mpl::respectAlwaysInline); + maplecl::CopyIfEnabled(symbolInterposition, opts::mpl2mpl::symbolInterposition); + maplecl::CopyIfEnabled(ignoreHotAttr, opts::mpl2mpl::ignoreHotAttr); maplecl::CopyIfEnabled(inlineToAllCallers, opts::mpl2mpl::inlineToAllCallers); maplecl::CopyIfEnabled(ginlineMaxNondeclaredInlineCallee, opts::mpl2mpl::ginlineMaxNondeclaredInlineCallee); diff --git a/src/mapleall/maple_ir/src/parser.cpp b/src/mapleall/maple_ir/src/parser.cpp index f7d2cba855d5e829f48f4857e5db2432ba3fe54d..0043e2f5697d9985b8de3d67cd81e7c5eb4b110f 100644 --- a/src/mapleall/maple_ir/src/parser.cpp +++ b/src/mapleall/maple_ir/src/parser.cpp @@ -119,6 +119,18 @@ Opcode MIRParser::GetOpFromToken(TokenKind tk) const { } } +CPragmaKind MIRParser::GetCPragmaKindFromToken(TokenKind tk) const { + switch (tk) { +#define PRAGMA(STR) \ + case TK_##STR: \ + return CPragmaKind::PRAGMA_##STR; +#include "all_pragmas.def" +#undef PRAGMA + default: + return CPragmaKind::PRAGMA_undef; + } +} + static bool IsClassInterfaceTypeName(const std::string &nameStr) { return (!nameStr.empty() && nameStr.front() == 'L' && StringUtils::EndsWith(nameStr, "_3B")); } @@ -1003,6 +1015,24 @@ bool MIRParser::ParsePackAttrs() { return true; } +bool MIRParser::ParseTypeAliasAttrs(TypeAttrs &tA) { + if (lexer.GetTokenKind() != TK_type_alias) { + Error("wrong TK kind taken from file"); + return false; + } + std::string aliasList = lexer.GetTokenString(); + (void)lexer.NextToken(); + while (lexer.GetTokenKind() != TK_rparen) { + if (lexer.GetTokenKind() == TK_gname) { + (void)aliasList.append(lexer.GetTokenString()); + } else if (lexer.GetTokenKind() == TK_coma) { + (void)aliasList.append(","); + } + (void)lexer.NextToken(); + } + tA.SetTypeAlias(aliasList); + return true; +} // for variable declaration type attribute specification // it has also storage-class qualifier. bool MIRParser::ParseVarTypeAttrs(MIRSymbol &st) { @@ -1026,6 +1056,13 @@ bool MIRParser::ParseVarTypeAttrs(MIRSymbol &st) { } break; } + case TK_type_align: { + if (!CheckAlignTk()) { + return false; + } + st.GetAttrs().SetTypeAlign(static_cast(lexer.GetTheIntVal())); + break; + } default: return true; } // switch @@ -1064,6 +1101,13 @@ bool MIRParser::ParseTypeAttrs(TypeAttrs &attrs) { attrs.SetPack(static_cast(lexer.GetTheIntVal())); break; } + case TK_type_alias: { + attrs.SetAttr(ATTR_type_alias); + if (!ParseTypeAliasAttrs(attrs)) { + return false; + } + break; + } default: return true; } // switch @@ -1094,6 +1138,14 @@ bool MIRParser::ParseFieldAttrs(FieldAttrs &attrs) { attrs.SetAlign(lexer.GetTheIntVal()); break; } + case TK_type_align: { + if (!CheckAlignTk()) { + return false; + } + attrs.SetAttr(FLDATTR_type_align); + attrs.SetTypeAlign(static_cast(lexer.GetTheIntVal())); + break; + } default: return true; } // switch @@ -1575,6 +1627,43 @@ void MIRParser::FixupForwardReferencedTypeByMap() { } } +bool MIRParser::ParseCPragma() { + if (lexer.GetTokenKind() != TK_pragma) { + Error("expect type but get "); + return false; + } + TokenKind tokenKind = lexer.NextToken(); + if (tokenKind != TK_exclamation) { + Error("expect pragma index but get "); + return false; + } + tokenKind = lexer.NextToken(); + if (tokenKind != TK_intconst) { + Error("expect pragma index but get "); + return false; + } + auto index = static_cast(lexer.theIntVal); + auto &pragmas = GlobalTables::GetGPragmaTable().GetPragmaTable(); + if (index >= pragmas.size()) { + pragmas.resize(index + 1); + } + tokenKind = lexer.NextToken(); + auto pragmakind = GetCPragmaKindFromToken(tokenKind); + if (pragmakind == CPragmaKind::PRAGMA_undef) { + Error("expect pragma kind but get "); + return false; + } + tokenKind = lexer.NextToken(); + if (tokenKind != TK_string) { + Error("expect string content but get "); + return false; + } + auto *pragma = GPragmaTable::CreateCPragma(pragmakind, static_cast(index), lexer.name); + pragmas[index] = pragma; + (void)lexer.NextToken(); + return true; +} + bool MIRParser::ParseTypeDefine() { bool isLocal = paramParseLocalType; if (lexer.GetTokenKind() != TK_type) { @@ -2916,6 +3005,7 @@ std::map MIRParser::InitFuncPtrMap funcPtrMap[TK_ALIAS] = &MIRParser::ParseAlias; funcPtrMap[TK_SCOPE] = &MIRParser::ParseScope; funcPtrMap[TK_ENUMERATION] = &MIRParser::ParseEnumeration; + funcPtrMap[TK_pragma] = &MIRParser::ParseCPragma; return funcPtrMap; } diff --git a/src/mapleall/maple_me/include/alias_class.h b/src/mapleall/maple_me/include/alias_class.h index 75abe5de7b33f470453a15b7ffe208327ff88c0f..7547002660217721e6117ff8e84edaf3f6639531 100644 --- a/src/mapleall/maple_me/include/alias_class.h +++ b/src/mapleall/maple_me/include/alias_class.h @@ -20,6 +20,8 @@ #include "union_find.h" namespace maple { +class Klass; +class KlassHierarchy; constexpr int64 kBitsPerByte = 8; inline bool IsMemoryOverlap(OffsetType startA, int64 sizeA, OffsetType startB, int64 sizeB) { diff --git a/src/mapleall/maple_me/include/bb.h b/src/mapleall/maple_me/include/bb.h index 462fca7c27c32057f44adc52b1d9b8d54cd500e1..be1449f8666e9b38a340fcef6ae0d0ee502fb9cc 100644 --- a/src/mapleall/maple_me/include/bb.h +++ b/src/mapleall/maple_me/include/bb.h @@ -327,8 +327,9 @@ class BB : public BaseGraphNode { return kind == kBBReturn && !stmtNodeList.empty() && stmtNodeList.back().GetOpCode() == OP_return; } - // Whether the BB is the first BB of UNLIKELY path (inferred from __builtin_expect) and it has only 1 predecessor. - bool IsImmediateUnlikelyBB() const; + // Whether the BB is the first BB of UNLIKELY path (inferred from __builtin_expect). + // If dom is provided, more accurate information will be obtained. + bool IsImmediateUnlikelyBB(const Dominance *dom = nullptr) const; // Whether the BB is the first BB of LIKELY path (inferred from __builtin_expect) and it has only 1 predecessor. bool IsImmediateLikelyBB() const; diff --git a/src/mapleall/maple_me/include/me_function.h b/src/mapleall/maple_me/include/me_function.h index 781347754e7cceb32e90927fde9030aba4dda693..bec86659046f09bcf3befab9beccd6a9d8085fc6 100644 --- a/src/mapleall/maple_me/include/me_function.h +++ b/src/mapleall/maple_me/include/me_function.h @@ -73,13 +73,15 @@ class FilterIterator { } FilterIterator &operator++() { - ++iterator; - return func(iterator) ? *this : ++(*this); + while (!func(++iterator)) { + } + return *this; } FilterIterator &operator--() { - --iterator; - return func(iterator) ? *this : --(*this); + while (!func(--iterator)) { + } + return *this; } const FilterIterator operator++(int) { diff --git a/src/mapleall/maple_me/include/me_ir.h b/src/mapleall/maple_me/include/me_ir.h index 5974671da5839cef8c28e939a9f77f363710f760..b7fff6ba0bd47ca915379859688307befe9dce75 100644 --- a/src/mapleall/maple_me/include/me_ir.h +++ b/src/mapleall/maple_me/include/me_ir.h @@ -2277,25 +2277,28 @@ class CallMeStmt : public NaryMeStmt, public MuChiMePart, public AssignedPart { AssignedPart(alloc), puIdx(static_cast(stt)->GetPUIdx()), stmtID(stt->GetStmtID()), - tyIdx(static_cast(stt)->GetTyIdx()) {} + tyIdx(static_cast(stt)->GetTyIdx()), + pragmas(*static_cast(stt)->GetPragmas(), alloc->Adapter()) {} CallMeStmt(MapleAllocator *alloc, Opcode op) - : NaryMeStmt(alloc, op), MuChiMePart(alloc), AssignedPart(alloc) {} + : NaryMeStmt(alloc, op), MuChiMePart(alloc), AssignedPart(alloc), pragmas(alloc->Adapter()) {} CallMeStmt(MapleAllocator *alloc, Opcode op, PUIdx idx) - : NaryMeStmt(alloc, op), MuChiMePart(alloc), AssignedPart(alloc), puIdx(idx) {} + : NaryMeStmt(alloc, op), MuChiMePart(alloc), AssignedPart(alloc), puIdx(idx), pragmas(alloc->Adapter()) {} CallMeStmt(MapleAllocator *alloc, const NaryMeStmt *cstmt, PUIdx idx) : NaryMeStmt(alloc, cstmt), MuChiMePart(alloc), AssignedPart(alloc), - puIdx(idx) {} + puIdx(idx), + pragmas(alloc->Adapter()) {} CallMeStmt(MapleAllocator *alloc, const CallMeStmt *cstmt) : NaryMeStmt(alloc, cstmt), MuChiMePart(alloc), AssignedPart(alloc, this, cstmt->mustDefList), - puIdx(cstmt->GetPUIdx()) {} + puIdx(cstmt->GetPUIdx()), + pragmas(cstmt->pragmas, alloc->Adapter()) {} ~CallMeStmt() override = default; @@ -2399,6 +2402,10 @@ class CallMeStmt : public NaryMeStmt, public MuChiMePart, public AssignedPart { needIncref = false; } + const MapleSet &GetPragmas() const { + return pragmas; + } + MIRType *GetReturnType() const override { MIRFunction *callee = GlobalTables::GetFunctionTable().GetFunctionFromPuidx(puIdx); return callee->GetReturnType(); @@ -2415,6 +2422,7 @@ class CallMeStmt : public NaryMeStmt, public MuChiMePart, public AssignedPart { // Used in trim call graph uint32 stmtID = 0; TyIdx tyIdx; + MapleSet pragmas; }; class IcallMeStmt : public NaryMeStmt, public MuChiMePart, public AssignedPart { diff --git a/src/mapleall/maple_me/include/me_jump_threading.h b/src/mapleall/maple_me/include/me_jump_threading.h index 035181ddd4d56cae5e3143941612ff7669aa8fc7..4d46d9b7767b41fff1847fd6259ef83ed54c7ab1 100644 --- a/src/mapleall/maple_me/include/me_jump_threading.h +++ b/src/mapleall/maple_me/include/me_jump_threading.h @@ -62,6 +62,7 @@ class JumpThreading { bool CanJumpThreadingWithCondGoto(BB &bb, MeExpr *opnd, ValueRange *vrOfOpnd0); void FindPathWhenDefPointInCurrBB(BB &defBB, BB &predBB, MeExpr &opnd0, MeExpr *opnd1 = nullptr); void FindPathWhenDefPointIsNotInCurrBB(BB &defBB, BB &useBB, MeExpr &opnd0, MeExpr *opnd1 = nullptr); + void FindPathWhenDefBBDomPredBB(BB &bb, BB &pred, CompareOpnds &cmpOpnds, const BB &defBB); void FindPathWhenDefByIsNotStmtAndPhi(BB &defBB, BB &predBB, CompareOpnds &cmpOpnds); void FindPathFromUse2DefWhenOneOpndIsDefByPhi(BB &bb, BB &pred, CompareOpnds &cmpOpnds, size_t i, bool theFirstCmpOpndIsDefByPhi); @@ -92,6 +93,7 @@ class JumpThreading { LoopDesc *currLoop = nullptr; static int64 codeSizeOfCopy; static size_t pathSize; + bool registPath = true; }; MAPLE_FUNC_PHASE_DECLARE(MEJumpThreading, MeFunction) diff --git a/src/mapleall/maple_me/include/me_obj_size.h b/src/mapleall/maple_me/include/me_obj_size.h index b6a66bf3aa1090a4244754214335973e77cb6c79..c3a3aa648893a42d58a3d95503b210d8c1563562 100644 --- a/src/mapleall/maple_me/include/me_obj_size.h +++ b/src/mapleall/maple_me/include/me_obj_size.h @@ -46,13 +46,13 @@ class OBJSize { void ComputeObjectSize(MeStmt &meStmt); void ERRWhenSizeTypeIsInvalid(const MeStmt &meStmt) const; void DealWithBuiltinObjectSize(BB &bb, MeStmt &meStmt); - size_t ComputeObjectSizeWithType(MeExpr &opnd, int64 type) const; + size_t ComputeObjectSizeWithType(MeExpr &opnd, bool getSizeOfWholeVar, bool getMaxSizeOfObjs) const; void ReplaceStmt(CallMeStmt &callMeStmt, const std::string &str); size_t DealWithSprintfAndVsprintf(const CallMeStmt &callMeStmt, const MIRFunction &calleeFunc); - size_t DealWithArray(const MeExpr &opnd, int64 type) const; + size_t DealWithArray(const MeExpr &opnd, bool getSizeOfWholeVar, bool getMaxSizeOfObjs) const; size_t DealWithAddrof(const MeExpr &opnd, bool getSizeOfWholeVar) const; - size_t DealWithDread(MeExpr &opnd, int64 type, bool getMaxSizeOfObjs) const; - size_t DealWithIaddrof(const MeExpr &opnd, int64 type, bool getSizeOfWholeVar) const; + size_t DealWithDread(MeExpr &opnd, bool getSizeOfWholeVar, bool getMaxSizeOfObjs) const; + size_t DealWithIaddrof(const MeExpr &opnd, bool getSizeOfWholeVar, bool getMaxSizeOfObjs) const; bool DealWithOpnd(MeExpr &opnd, std::set &visitedPhi) const; bool PhiOpndIsDefPointOfOtherPhi(MeExpr& expr, std::set& visitedPhi) const; diff --git a/src/mapleall/maple_me/include/me_safety_warning.h b/src/mapleall/maple_me/include/me_safety_warning.h index a2c44ba63f14b2420a1c970e57ad91d74e35cd41..cbe2276afb06d1d4200583de7bed85d956bfd069 100644 --- a/src/mapleall/maple_me/include/me_safety_warning.h +++ b/src/mapleall/maple_me/include/me_safety_warning.h @@ -17,7 +17,6 @@ #include "me_function.h" #include "opcodes.h" namespace maple { -std::string GetNthStr(size_t index); // param: assert stmt, mir module, caller function // return True --- delete assert stmt. using SafetyWarningHandler = std::function; diff --git a/src/mapleall/maple_me/include/me_value_range_prop.h b/src/mapleall/maple_me/include/me_value_range_prop.h index 7e3d47b1d94333217b170a5b2190c6ff62a80db2..e42d4d234dfeba0c29c9e7b8fde0da796d0c8d74 100644 --- a/src/mapleall/maple_me/include/me_value_range_prop.h +++ b/src/mapleall/maple_me/include/me_value_range_prop.h @@ -114,44 +114,51 @@ class Bound { primType = pType; } + bool LowerAndUpperIsEqualAfterCVT(const Bound &lower, const Bound &upper, PrimType pType) const { + return lower.IsEqualAfterCVT(lower.GetPrimType(), pType) && upper.IsEqualAfterCVT(upper.GetPrimType(), pType); + } + bool IsGreaterThan(const Bound rightBound, PrimType pType) const { CHECK_FATAL(IsNeededPrimType(pType), "must not be here"); + if (!LowerAndUpperIsEqualAfterCVT(*this, rightBound, pType)) { + return false; + } return IsPrimTypeUint64(pType) ? static_cast(constant) > static_cast(rightBound.GetConstant()) : GetRealValue(constant, pType) > GetRealValue(rightBound.GetConstant(), pType); } - bool IsLessThanOrEqualToMax(PrimType pType) const { - CHECK_FATAL(IsNeededPrimType(pType), "must not be here"); - return IsPrimTypeUint64(pType) ? static_cast(constant) <= static_cast(GetMaxNumber(pType)) : - GetRealValue(constant, pType) <= GetRealValue(GetMaxNumber(pType), pType); - } - - bool IsGreaterThanOrEqualToMin(PrimType pType) const { - CHECK_FATAL(IsNeededPrimType(pType), "must not be here"); - return IsPrimTypeUint64(pType) ? static_cast(constant) >= static_cast(GetMinNumber(pType)) : - GetRealValue(constant, pType) >= GetRealValue(GetMinNumber(pType), pType); - } - bool IsLessThanOrEqualTo(const Bound rightBound, PrimType pType) const { CHECK_FATAL(IsNeededPrimType(pType), "must not be here"); + if (!LowerAndUpperIsEqualAfterCVT(*this, rightBound, pType)) { + return false; + } return IsPrimTypeUint64(pType) ? static_cast(constant) <= static_cast(rightBound.GetConstant()) : GetRealValue(constant, pType) <= GetRealValue(rightBound.GetConstant(), pType); } bool IsLessThan(const Bound rightBound, PrimType pType) const { CHECK_FATAL(IsNeededPrimType(pType), "must not be here"); + if (!LowerAndUpperIsEqualAfterCVT(*this, rightBound, pType)) { + return false; + } return IsPrimTypeUint64(pType) ? static_cast(constant) < static_cast(rightBound.GetConstant()) : GetRealValue(constant, pType) < GetRealValue(rightBound.GetConstant(), pType); } bool IsGreaterThanOrEqualTo(const Bound rightBound, PrimType pType) const { CHECK_FATAL(IsNeededPrimType(pType), "must not be here"); + if (!LowerAndUpperIsEqualAfterCVT(*this, rightBound, pType)) { + return false; + } return IsPrimTypeUint64(pType) ? static_cast(constant) >= static_cast(rightBound.GetConstant()) : GetRealValue(constant, pType) >= GetRealValue(rightBound.GetConstant(), pType); } bool IsEqual(const Bound rightBound, PrimType pType) const { CHECK_FATAL(IsNeededPrimType(pType), "must not be here"); + if (!LowerAndUpperIsEqualAfterCVT(*this, rightBound, pType)) { + return false; + } return IsPrimTypeUint64(pType) ? static_cast(constant) == static_cast(rightBound.GetConstant()) : GetRealValue(constant, pType) == GetRealValue(rightBound.GetConstant(), pType); } @@ -174,12 +181,18 @@ class Bound { bool IsEqualToMax(PrimType pType) const { CHECK_FATAL(IsNeededPrimType(pType), "must not be here"); + if (!this->IsEqualAfterCVT(primType, pType)) { + return false; + } return IsPrimTypeUint64(pType) ? static_cast(constant) == static_cast(GetMaxNumber(pType)) : GetRealValue(constant, pType) == GetRealValue(GetMaxNumber(pType), pType); } bool IsEqualToMin(PrimType pType) const { CHECK_FATAL(IsNeededPrimType(pType), "must not be here"); + if (!this->IsEqualAfterCVT(primType, pType)) { + return false; + } return IsPrimTypeUint64(pType) ? static_cast(constant) == static_cast(GetMinNumber(pType)) : GetRealValue(constant, pType) == GetRealValue(GetMinNumber(pType), pType); } @@ -453,6 +466,13 @@ class ValueRange { range.pair.upper.GetVar() == nullptr); } + bool IsConstantBoundOrLowerAndUpper() const { + return (rangeType == kEqual && range.bound.GetVar() == nullptr) || + (rangeType == kNotEqual && range.bound.GetVar() == nullptr) || + (rangeType == kLowerAndUpper && range.pair.lower.GetVar() == nullptr && + range.pair.upper.GetVar() == nullptr); + } + bool IsGreaterThanOrEqualToZero() const { auto pType = GetPrimType(); Bound zeroBound(nullptr, 0, pType); @@ -503,6 +523,14 @@ class ValueRange { bool IsEqual(ValueRange *valueRangeRight) const; + bool IsUniversalSet() const { + return GetLower().IsEqualToMin(GetPrimType()) && GetUpper().IsEqualToMax(GetPrimType()); + } + + bool IsInvalidVR() const { + return GetLower().IsGreaterThan(GetUpper(), GetPrimType()); + } + private: Range range; int64 stride = 0; @@ -554,6 +582,7 @@ class ValueRangePropagation { void JudgeTheConsistencyOfDefPointsOfBoundaryCheck( BB &bb, MeExpr &expr, std::set &visitedLHS, std::vector &stmts, bool &crossPhiNode); bool TheValueOfOpndIsInvaliedInABCO(const BB &bb, const MeStmt *meStmt, MeExpr &boundOpnd, bool updateCaches = true); + ValueRange *GetMinimumRange(ValueRange *vr1, ValueRange *vr2, PrimType pTy) const; ValueRange *FindValueRange(const BB &bb, MeExpr &expr, uint32 &numberOfRecursionsArg, std::unordered_set &foundExprs, uint32 maxThreshold); bool BrStmtInRange(const BB &bb, const ValueRange &leftRange, const ValueRange &rightRange, Opcode op, @@ -582,7 +611,15 @@ class ValueRangePropagation { const BB &bb, MeExpr &expr, uint32 maxThreshold = kRecursionThreshold) { uint32 numOfRecursion = 0; std::unordered_set foundExprs{expr.GetExprID()}; - return FindValueRange(bb, expr, numOfRecursion, foundExprs, maxThreshold); + auto res = FindValueRange(bb, expr, numOfRecursion, foundExprs, maxThreshold); + if (res == nullptr) { + return res; + } + if (res->IsEqualAfterCVT(res->GetPrimType(), expr.GetPrimType())) { + return res; + } + return (res->GetRangeType() == kNotEqual && res->IsConstantBoundOrLowerAndUpper() && + res->GetBound().IsEqualAfterCVT(res->GetPrimType(), expr.GetPrimType())) ? res : nullptr; } private: @@ -693,6 +730,9 @@ class ValueRangePropagation { if (lhs.IsVolatile() || rhs.IsVolatile() || lhs.GetMeOp() == kMeOpConst || rhs.GetMeOp() == kMeOpConst) { return; } + if (GetPrimTypeSize(lhs.GetPrimType()) != GetPrimTypeSize(rhs.GetPrimType())) { + return; + } auto it = pairOfExprs.find(&lhs); if (it == pairOfExprs.end()) { std::map, CompareBB> valueOfPairOfExprs{ @@ -761,6 +801,7 @@ class ValueRangePropagation { Bound Max(Bound leftBound, Bound rightBound); Bound Min(Bound leftBound, Bound rightBound); InRangeType InRange(const BB &bb, const ValueRange &rangeTemp, const ValueRange &range, bool lowerIsZero = false); + bool CanNotCombineVRs(const Bound &resLower, const Bound &resUpper, PrimType primType) const; std::unique_ptr CombineTwoValueRange(const ValueRange &leftRange, const ValueRange &rightRange, bool merge = false); void DealWithArrayLength(const BB &bb, MeExpr &lhs, MeExpr &rhs); @@ -769,12 +810,6 @@ class ValueRangePropagation { bool IfAnalysisedBefore(const BB &bb, const MeStmt &stmt); std::unique_ptr MergeValueRangeOfPhiOperands(const BB &bb, MePhiNode &mePhiNode); void ReplaceBoundForSpecialLoopRangeValue(LoopDesc &loop, ValueRange &valueRangeOfIndex, bool upperIsSpecial); - std::unique_ptr CreateValueRangeForMonotonicIncreaseVar( - const LoopDesc &loop, BB &exitBB, const BB &bb, const OpMeExpr &opMeExpr, - MeExpr &opnd1, Bound &initBound, int64 stride); - std::unique_ptr CreateValueRangeForMonotonicDecreaseVar( - const LoopDesc &loop, BB &exitBB, const BB &bb, const OpMeExpr &opMeExpr, - MeExpr &opnd1, Bound &initBound, int64 stride); void CreateValueRangeForLeOrLt(const MeExpr &opnd, const ValueRange *leftRange, Bound newRightUpper, Bound newRightLower, const BB &trueBranch, const BB &falseBranch, bool isAccurate); void CreateValueRangeForGeOrGt(const MeExpr &opnd, const ValueRange *leftRange, Bound newRightUpper, @@ -834,7 +869,7 @@ class ValueRangePropagation { ValueRange *rightRange, BB &falseBranch, BB &trueBranch, PrimType opndType, Opcode op, BB &condGoto); void CreateLabelForTargetBB(BB &pred, BB &newBB); size_t FindBBInSuccs(const BB &bb, const BB &succBB) const; - void DealWithOperand(const BB &bb, MeStmt &stmt, MeExpr &meExpr); + void DealWithOperand(BB &bb, MeStmt &stmt, MeExpr &meExpr); void CollectMeExpr(const BB &bb, MeStmt &stmt, MeExpr &meExpr, std::map> &expr2ConstantValue); void ReplaceOpndWithConstMeExpr(const BB &bb, MeStmt &stmt); @@ -886,7 +921,6 @@ class ValueRangePropagation { bool AnalysisUnreachableForLeOrLt(BB &bb, const CondGotoMeStmt &brMeStmt, const ValueRange &leftRange); bool AnalysisUnreachableForEqOrNe(BB &bb, const CondGotoMeStmt &brMeStmt, const ValueRange &leftRange); bool DealWithVariableRange(BB &bb, const CondGotoMeStmt &brMeStmt, const ValueRange &leftRange); - std::unique_ptr MergeValuerangeOfPhi(std::vector> &valueRangeOfPhi); std::unique_ptr MakeMonotonicIncreaseOrDecreaseValueRangeForPhi(int stride, Bound &initBound) const; void CreateVRForPhi(const LoopDesc &loop); void TravelBBs(std::vector &reversePostOrderOfLoopBBs); @@ -919,6 +953,15 @@ class ValueRangePropagation { bool HasDefPointInPred(const BB &begin, const BB &end, const ScalarMeExpr &opnd) const; bool CanIgnoreTheDefPoint(const MeStmt &stmt, const BB &end, const ScalarMeExpr &expr) const; bool GetVROfBandOpnd(const BB &bb, const OpMeExpr &opMeExpr, MeExpr &opnd); + bool IsNotNeededVRType(const ValueRange &vrLeft, const ValueRange &vrRight) const; + + bool IsInvalidVR(const ValueRange &vr) const { + return vr.GetLower().IsGreaterThan(vr.GetUpper(), vr.GetPrimType()); + } + + bool CanCreateVRForExpr(const MeExpr &expr) const { + return !expr.IsVolatile() && IsNeededPrimType(expr.GetPrimType()); + } MeFunction &func; MeIRMap &irMap; diff --git a/src/mapleall/maple_me/include/ssa_tab.h b/src/mapleall/maple_me/include/ssa_tab.h index b56896627ac271643e600b680df88cf4af85cf74..6c3d1e2aeee67f4c5e18778869004791e0ac6620 100644 --- a/src/mapleall/maple_me/include/ssa_tab.h +++ b/src/mapleall/maple_me/include/ssa_tab.h @@ -18,6 +18,7 @@ #include "mempool_allocator.h" #include "ver_symbol.h" #include "ssa_mir_nodes.h" +#include "maple_phase.h" namespace maple { diff --git a/src/mapleall/maple_me/src/alias_class.cpp b/src/mapleall/maple_me/src/alias_class.cpp index cd9ca23205afa1ffa90a0a720d7712ab03b3300f..53e36349a2ada4c729f1356c61ff6f26a3b4b5e7 100644 --- a/src/mapleall/maple_me/src/alias_class.cpp +++ b/src/mapleall/maple_me/src/alias_class.cpp @@ -21,6 +21,7 @@ #include "mir_builder.h" #include "ipa_side_effect.h" #include "type_based_alias_analysis.h" +#include "class_hierarchy.h" namespace { using namespace maple; diff --git a/src/mapleall/maple_me/src/bb.cpp b/src/mapleall/maple_me/src/bb.cpp index 29bb154e9314a83e3c76f2ae11c5fbde3eb66e84..2046e17a172be74a22680f2f2af00e5dc6e91085 100644 --- a/src/mapleall/maple_me/src/bb.cpp +++ b/src/mapleall/maple_me/src/bb.cpp @@ -346,13 +346,25 @@ void BB::MoveAllSuccToPred(BB *newPred, BB *commonExit) { } } -bool BB::IsImmediateUnlikelyBB() const { - if (pred.size() != 1 || pred[0]->GetKind() != kBBCondGoto) { +bool BB::IsImmediateUnlikelyBB(const Dominance *dom) const { + if (pred.empty()) { return false; } - auto *condBB = pred[0]; - auto *unlikelySucc = condBB->GetUnlikelySuccOfCondBB(); - return unlikelySucc == this; + for (auto *curPred : pred) { + // Skip the predecessor dominated by current BB. + if (dom != nullptr && dom->Dominate(*this, *curPred)) { + continue; + } + if (curPred->GetKind() != kBBCondGoto) { + return false; + } + // Only all incoming edges are unlikely, the BB is unlikely. + auto *unlikelySucc = curPred->GetUnlikelySuccOfCondBB(); + if (unlikelySucc != this) { + return false; + } + } + return true; } bool BB::IsImmediateLikelyBB() const { @@ -404,9 +416,18 @@ void BB::FindReachableBBs(std::vector &visitedBBs) const { if (visitedBBs[GetBBId()]) { return; } - visitedBBs[GetBBId()] = true; - for (const BB *bb : succ) { - bb->FindReachableBBs(visitedBBs); + std::deque queue; + queue.push_back(this); + while (!queue.empty()) { + auto bb = queue.front(); + queue.pop_front(); + if (visitedBBs[bb->GetID()]) { + continue; + } + visitedBBs[bb->GetID()] = true; + for (const BB *succBB : bb->GetSucc()) { + queue.push_back(succBB); + } } } diff --git a/src/mapleall/maple_me/src/irmap.cpp b/src/mapleall/maple_me/src/irmap.cpp index 40dd2c858f84c937cfde0341d89dfe585621387f..20bd9a5606287f2d6acdbd5205285c7c48cd7250 100644 --- a/src/mapleall/maple_me/src/irmap.cpp +++ b/src/mapleall/maple_me/src/irmap.cpp @@ -1018,18 +1018,29 @@ MeExpr *IRMap::SimplifyCompareSameExpr(const OpMeExpr *opmeexpr) { // cmpl/cmpg is special for cases that any of opnd is NaN auto opndType = opmeexpr->GetOpndType(); if (IsPrimitiveFloat(opndType) || IsPrimitiveDynFloat(opndType)) { - if (opmeexpr->GetOpnd(0)->GetMeOp() == kMeOpConst) { - double dVal = - static_cast(static_cast(opmeexpr->GetOpnd(0))->GetConstVal())->GetValue(); - if (std::isnan(dVal)) { + // other case, return nullptr because it is not sure whether any of opnd is nan. + if (opmeexpr->GetOpnd(0)->GetMeOp() != kMeOpConst) { + return nullptr; + } + double dVal = 0; + if (GetPrimTypeActualBitSize(opndType) == k32BitSize) { + dVal = + static_cast(static_cast(opmeexpr->GetOpnd(0))->GetConstVal())->GetValue(); + } else if (GetPrimTypeActualBitSize(opndType) == k64BitSize) { + dVal = static_cast(static_cast(opmeexpr->GetOpnd(0))->GetConstVal()) + ->GetValue(); + } else { + CHECK_FATAL(GetPrimTypeActualBitSize(opndType) == k128BitSize, "must be"); + if (static_cast(static_cast(opmeexpr->GetOpnd(0))->GetConstVal()) + ->IsNan()) { val = (opop == OP_cmpl) ? -1 : 1; - } else { - val = 0; + break; } + } + if (std::isnan(dVal)) { + val = (opop == OP_cmpl) ? -1 : 1; break; } - // other case, return nullptr because it is not sure whether any of opnd is nan. - return nullptr; } val = 0; break; @@ -1189,20 +1200,26 @@ static MeExpr *PullOutZext(IRMap &irMap, const OpMeExpr &meExpr) { MeExpr *opnd1 = meExpr.GetOpnd(1); if (opnd0->GetOp() == OP_zext && opnd1->GetMeOp() == kMeOpConst) { auto subExpr1 = opnd0->GetOpnd(0); + if (static_cast(opnd0)->GetBitsSize() < GetPrimTypeBitSize(subExpr1->GetPrimType())) { + return nullptr; + } + auto fromType = subExpr1->GetPrimType(); auto op0 = static_cast(opnd0); - if (op0->GetBitsSize() < GetPrimTypeBitSize(subExpr1->GetPrimType())) { + if (op0->GetBitsSize() < GetPrimTypeBitSize(fromType)) { return nullptr; } auto c1 = static_cast(opnd1)->GetIntValue(); // It is undefined behavior when shift num not less than bit size of primtype - if (IsLogicalShift(meExpr.GetOp()) && GetAlignedPrimTypeBitSize(subExpr1->GetPrimType()) <= c1.GetZXTValue()) { + if (IsLogicalShift(meExpr.GetOp()) && GetAlignedPrimTypeBitSize(fromType) <= c1.GetZXTValue()) { return nullptr; } - // if c1 == zext(trunc(c1)), we can pull zext out - if (c1.GetZXTValue() == c1.Trunc(subExpr1->GetPrimType()).GetZXTValue()) { - auto newConst = irMap.CreateIntConstMeExpr(c1.Trunc(subExpr1->GetPrimType()), subExpr1->GetPrimType()); - auto newExpr = irMap.CreateMeExprBinary(meExpr.GetOp(), subExpr1->GetPrimType(), *subExpr1, *newConst); + auto newInt = GetPrimTypeSize(opnd1->GetPrimType()) < GetPrimTypeSize(fromType) ? + c1.Extend(fromType) : c1.Trunc(fromType); + // if c1 == zext(c1), we can pull zext out + if (c1.GetZXTValue() == newInt.GetZXTValue()) { + auto newConst = irMap.CreateIntConstMeExpr(newInt, fromType); + auto newExpr = irMap.CreateMeExprBinary(meExpr.GetOp(), fromType, *subExpr1, *newConst); auto res = irMap.CreateMeExprUnary(OP_zext, meExpr.GetPrimType(), *newExpr); static_cast(res)->SetBitsSize(op0->GetBitsSize()); return res; @@ -1473,6 +1490,12 @@ MeExpr *IRMap::SimplifySubExpr(const OpMeExpr *subExpr) { return nullptr; } +static bool ConstantOverFlow(const ConstMeExpr &opnd1, const ConstMeExpr &opnd2, Opcode op) { + auto const1 = opnd1.GetExtIntValue(); + auto const2 = opnd2.GetExtIntValue(); + return ConstantFold::IntegerOpIsOverflow(op, opnd1.GetPrimType(), const1, const2); +} + MeExpr *IRMap::SimplifyAddExpr(const OpMeExpr *addExpr) { if (IsPrimitiveVector(addExpr->GetPrimType())) { return nullptr; @@ -1542,6 +1565,10 @@ MeExpr *IRMap::SimplifyAddExpr(const OpMeExpr *addExpr) { if (opndA->GetMeOp() == kMeOpConst) { // (constA + constB) + opnd1 if (opndB->GetMeOp() == kMeOpConst) { + if (IsSignedInteger(addExpr->GetPrimType()) && + ConstantOverFlow(static_cast(*opndA), static_cast(*opndB), OP_add)) { + return nullptr; + } retOpMeExpr = static_cast(CreateCanonicalizedMeExpr(addExpr->GetPrimType(), OP_add, opnd1, OP_add, opndA, opndB)); if (addExpr->hasAddressValue) { @@ -1551,6 +1578,10 @@ MeExpr *IRMap::SimplifyAddExpr(const OpMeExpr *addExpr) { } // (constA + a) + constB --> a + (constA + constB) if (opnd1->GetMeOp() == kMeOpConst) { + if (IsSignedInteger(addExpr->GetPrimType()) && + ConstantOverFlow(static_cast(*opndA), static_cast(*opnd1), OP_add)) { + return nullptr; + } retOpMeExpr = static_cast(CreateCanonicalizedMeExpr(addExpr->GetPrimType(), OP_add, opndB, OP_add, opndA, opnd1)); if (addExpr->hasAddressValue) { @@ -1573,6 +1604,10 @@ MeExpr *IRMap::SimplifyAddExpr(const OpMeExpr *addExpr) { if (opndB->GetMeOp() == kMeOpConst) { // (a + constA) + constB --> a + (constA + constB) if (opnd1->GetMeOp() == kMeOpConst) { + if (IsSignedInteger(addExpr->GetPrimType()) && + ConstantOverFlow(static_cast(*opndB), static_cast(*opnd1), OP_add)) { + return nullptr; + } retOpMeExpr = static_cast(CreateCanonicalizedMeExpr(addExpr->GetPrimType(), OP_add, opndA, OP_add, opndB, opnd1)); if (addExpr->hasAddressValue) { @@ -1611,9 +1646,7 @@ MeExpr *IRMap::SimplifyAddExpr(const OpMeExpr *addExpr) { } // (constA - a) + constB --> (constA + constB) - a if (opnd1->GetMeOp() == kMeOpConst) { - auto constA = static_cast(opndA)->GetExtIntValue(); - auto constB = static_cast(opnd1)->GetExtIntValue(); - if (ConstantFold::IntegerOpIsOverflow(OP_add, opndA->GetPrimType(), constA, constB)) { + if (ConstantOverFlow(static_cast(*opndA), static_cast(*opnd1), OP_add)) { return nullptr; } retOpMeExpr = static_cast(CreateCanonicalizedMeExpr(addExpr->GetPrimType(), OP_sub, OP_add, @@ -1638,9 +1671,7 @@ MeExpr *IRMap::SimplifyAddExpr(const OpMeExpr *addExpr) { if (opndB->GetMeOp() == kMeOpConst && static_cast(opndB)->GetExtIntValue() != INT_MIN) { // (a - constA) + constB --> a + (constB - constA) if (opnd1->GetMeOp() == kMeOpConst) { - auto constA = static_cast(opnd1)->GetExtIntValue(); - auto constB = static_cast(opndB)->GetExtIntValue(); - if (ConstantFold::IntegerOpIsOverflow(OP_sub, opndA->GetPrimType(), constA, constB)) { + if (ConstantOverFlow(static_cast(*opnd1), static_cast(*opndB), OP_sub)) { return nullptr; } retOpMeExpr = static_cast(CreateCanonicalizedMeExpr(addExpr->GetPrimType(), OP_add, opndA, @@ -2288,7 +2319,7 @@ bool IRMap::DealWithIaddrofWhenGetInfoOfIvar(IreadPairInfo &info) const { // base = OP iaddrof a64 kPtyInvalid (field)15 mx433 // opnd[0] = REGINDX:15 a64 %15 mx388 // - MU: {VAR %retVar_4031{offset:0}<0>[idx:10](vstIdx:22)->{15/288}[idx:28] (field)15 mx163} - auto iaddrofMeExpr = static_cast(info.ivar->GetBase()); + auto iaddrofMeExpr = static_cast(info.base); if (!iaddrofMeExpr->GetOpnd(0)->IsLeaf()) { return false; } @@ -2324,9 +2355,13 @@ bool IRMap::GetInfoOfIvar(MeExpr &expr, IreadPairInfo &info) const { } // convert byte size to bit size. info.bitOffset = info.ivar->GetOffset() * static_cast(k8BitSize); - if (info.ivar->GetBase()->GetOp() == OP_add) { - auto opnd0 = info.ivar->GetBase()->GetOpnd(0); - auto opnd1 = info.ivar->GetBase()->GetOpnd(1); + info.base = info.ivar->GetBase(); + if (info.base->GetOp() == OP_add) { + if (info.base->IsScalar() && static_cast(info.base)->GetDefBy() == kDefByStmt) { + info.base = static_cast(info.base)->GetDefStmt()->GetRHS(); + } + auto opnd0 = info.base->GetOpnd(0); + auto opnd1 = info.base->GetOpnd(1); if (opnd1->GetMeOp() != kMeOpConst) { return false; } @@ -2338,13 +2373,13 @@ bool IRMap::GetInfoOfIvar(MeExpr &expr, IreadPairInfo &info) const { info.ivar->GetType()->GetSize()); return true; } - if (info.ivar->GetBase()->GetOp() == OP_iaddrof) { + if (info.base->GetOp() == OP_iaddrof) { return DealWithIaddrofWhenGetInfoOfIvar(info); } auto baseType = GlobalTables::GetTypeTable().GetTypeFromTyIdx(info.ivar->GetTyIdx()); ASSERT(baseType->IsMIRPtrType(), "type of iread must be ptr type"); auto pointedTy = static_cast(baseType)->GetPointedType(); - info.SetInfoOfIvar(*info.ivar->GetBase(), pointedTy->GetBitOffsetFromBaseAddr(info.ivar->GetFieldID()), + info.SetInfoOfIvar(*info.base, pointedTy->GetBitOffsetFromBaseAddr(info.ivar->GetFieldID()), info.ivar->GetType()->GetSize()); return true; } diff --git a/src/mapleall/maple_me/src/irmap_emit.cpp b/src/mapleall/maple_me/src/irmap_emit.cpp index 8235da9942b6f0377f3061d1fdeab5f05268dea2..5bf4a5a7704d0df7f6e708b0c75bb7583290ac1a 100644 --- a/src/mapleall/maple_me/src/irmap_emit.cpp +++ b/src/mapleall/maple_me/src/irmap_emit.cpp @@ -41,6 +41,9 @@ static void CollectMemDefUseInfo(StmtNode &stmt, MeStmt &meStmt) { (void)memDefUse->GetDefSet().insert(pair.first); } } + if (meStmt.GetVarLHS()) { + (void)memDefUse->GetDefSet().insert(meStmt.GetVarLHS()->GetOstIdx()); + } } static void CollectMemMu(IreadNode &iread, IvarMeExpr &ivar) { diff --git a/src/mapleall/maple_me/src/me_combine_expr.cpp b/src/mapleall/maple_me/src/me_combine_expr.cpp index 2bd3e25bd793c93b2bbf5b44ab7e96d18118d491..bcac9fa1d5681a7fa1f33a9deebff4f9ec45caef 100644 --- a/src/mapleall/maple_me/src/me_combine_expr.cpp +++ b/src/mapleall/maple_me/src/me_combine_expr.cpp @@ -17,7 +17,10 @@ #include "cast_opt.h" #include "me_expr_utils.h" +#include "me_ir.h" #include "me_irmap_build.h" +#include "mir_type.h" +#include "opcodes.h" namespace maple { @@ -177,10 +180,23 @@ bool IsEqualByTrunc(const IntVal &c, PrimType type) { return c.Trunc(type).GetZXTValue() == c.GetZXTValue(); } +bool IsCvtNeedTrunc(const OpMeExpr& expr) { + if (expr.GetOp() == OP_cvt) { + return GetPrimTypeActualBitSize(expr.GetPrimType()) < GetPrimTypeActualBitSize(expr.GetOpndType()); + } + if (expr.GetOp() == OP_zext) { + return GetPrimTypeActualBitSize(expr.GetOpnd(0)->GetPrimType()) > expr.GetBitsSize(); + } + return false; +} + // fold cmp(and(sh(a, c3), c2), c1) static MeExpr *FoldCmpAndShift(IRMap &irMap, Opcode cmpOp, const MeExpr &andOpnd0, IntVal c1, const IntVal &c2) { auto shiftOp = andOpnd0.GetOp(); if (shiftOp == OP_cvt || shiftOp == OP_zext) { + if (IsCvtNeedTrunc(static_cast(andOpnd0))) { + return nullptr; + } auto opnd0 = andOpnd0.GetOpnd(0); if (IsEqualByTrunc(c1, opnd0->GetPrimType()) && IsEqualByTrunc(c2, opnd0->GetPrimType())) { return FoldCmpAndShift(irMap, cmpOp, *opnd0, c1.Trunc(opnd0->GetPrimType()), c2.Trunc(opnd0->GetPrimType())); @@ -259,6 +275,9 @@ MeExpr *ExprCombiner::FoldCmpBinOpWithConst(OpMeExpr &cmpExpr, const MeExpr &bin auto op = binOpExpr.GetOp(); auto opnd0 = binOpExpr.GetOpnd(0); if (op == OP_cvt || op == OP_zext) { + if (IsCvtNeedTrunc(static_cast(binOpExpr))) { + return nullptr; + } if (IsEqualByTrunc(c1, opnd0->GetPrimType())) { return FoldCmpBinOpWithConst(cmpExpr, *opnd0, c1.Trunc(opnd0->GetPrimType())); } diff --git a/src/mapleall/maple_me/src/me_ir.cpp b/src/mapleall/maple_me/src/me_ir.cpp index 50e03b57a39b9d4dd021e2e1eecdf1c54b670b4b..c74ea661da0273a82b8681f238d8a1f7971ed6f1 100644 --- a/src/mapleall/maple_me/src/me_ir.cpp +++ b/src/mapleall/maple_me/src/me_ir.cpp @@ -867,7 +867,12 @@ MeExpr *NaryMeExpr::GetIdenticalExpr(MeExpr &expr, bool /* isConstructor */) con while (naryExpr != nullptr) { bool isPureIntrinsic = naryExpr->GetOp() == OP_intrinsicop && IntrinDesc::intrinTable[naryExpr->GetIntrinsic()].IsPure(); - if ((naryExpr->GetOp() == OP_array || isPureIntrinsic) && IsIdentical(*naryExpr)) { + // temp implement since now there is no accurate attr for tls_anchor + bool isTlsAnchor = (naryExpr->GetOp() == OP_intrinsicop && + (naryExpr->GetIntrinsic() == INTRN_C___tls_get_tbss_anchor || + naryExpr->GetIntrinsic() == INTRN_C___tls_get_tdata_anchor || + naryExpr->GetIntrinsic() == INTRN_C___tls_get_thread_pointer)); + if ((naryExpr->GetOp() == OP_array || isPureIntrinsic || isTlsAnchor) && IsIdentical(*naryExpr)) { return naryExpr; } naryExpr = static_cast(naryExpr->GetNext()); diff --git a/src/mapleall/maple_me/src/me_ivopts.cpp b/src/mapleall/maple_me/src/me_ivopts.cpp index 23f829fd7cf2572f4acc1d438b31c5968923f49e..10c391665a0353887f2abd2759874a6d1a2c1366 100644 --- a/src/mapleall/maple_me/src/me_ivopts.cpp +++ b/src/mapleall/maple_me/src/me_ivopts.cpp @@ -1655,7 +1655,7 @@ void FindScalarFactor(MeExpr &expr, OpMeExpr *parentCvt, std::unordered_mapGetPrimType())) { + if (parentCvt && GetPrimTypeSize(expr.GetPrimType()) < GetPrimTypeSize(parentCvt->GetOpndType())) { needSext = IsSignedInteger(expr.GetPrimType()); } int64 constVal = needSext ? static_cast(expr).GetSXTIntValue() : @@ -1898,7 +1898,9 @@ static bool CheckOverflow(const MeExpr *opnd0, const MeExpr *opnd1, Opcode op, P } if (op == OP_sub) { if (IsUnsignedInteger(ptyp)) { - return const0 < const1; + auto shiftNum = k64BitSize - GetPrimTypeBitSize(ptyp); + return (static_cast(const0) << shiftNum) >> shiftNum < + (static_cast(const1) << shiftNum) >> shiftNum; } int64 res = static_cast(static_cast(const0) - static_cast(const1)); auto rightShiftNumToGetSignFlag = GetPrimTypeBitSize(ptyp) - 1; @@ -2416,8 +2418,7 @@ bool IVOptimizer::PrepareCompareUse(int64 &ratio, IVUse *use, IVCand *cand, cons if (data->realIterNum == static_cast(-1)) { mayOverflow = true; } else { - mayOverflow = CheckOverflow(use->comparedExpr, extraExpr, OP_sub, - extraExpr->GetPrimType()); + mayOverflow = CheckOverflow(use->comparedExpr, extraExpr, OP_sub, opndType); if (!mayOverflow) { auto *candBase = cand->iv->base; auto *candStep = cand->iv->step; diff --git a/src/mapleall/maple_me/src/me_jump_threading.cpp b/src/mapleall/maple_me/src/me_jump_threading.cpp index 28769738d189fe0f0536348b410c81e3355c1962..b4a2f0c4b302e7092ca6809da7820c2ec50c262e 100644 --- a/src/mapleall/maple_me/src/me_jump_threading.cpp +++ b/src/mapleall/maple_me/src/me_jump_threading.cpp @@ -460,7 +460,9 @@ bool JumpThreading::CanJump2SuccOfCurrBB( if (!valueRanges.BrStmtInRange(bb, *vrOfOpnd0, *vrOfOpnd1, op, pType)) { return false; } - RegisterPath(bb, toBeJumpedBB); + if (registPath) { + RegisterPath(bb, toBeJumpedBB); + } return true; } @@ -503,7 +505,7 @@ bool JumpThreading::CanJumpThreadingWithSwitch(BB &bb, ValueRange *vrOfOpnd0) { if (defalutBB == nullptr) { return false; } - if (vrOfOpnd0->IsConstantLowerAndUpper() && vrOfOpnd0->GetRangeType() == kEqual) { + if (vrOfOpnd0->IsConstantLowerAndUpper() && vrOfOpnd0->GetRangeType() == kEqual && registPath) { RegisterPath(bb, *defalutBB); return true; } @@ -575,6 +577,19 @@ void JumpThreading::FindPathWhenDefByStmt(BB &useBB, CompareOpnds &cmpOpnds, boo ResizePath(lengthOfSubPath); } +void JumpThreading::FindPathWhenDefBBDomPredBB(BB &bb, BB &pred, CompareOpnds &cmpOpnds, const BB &defBB) { + registPath = false; + if (dom.Dominate(defBB, pred) && (pred.GetKind() == kBBFallthru || pred.GetKind() == kBBGoto) && + CanJumpThreading(pred, *cmpOpnds.first, cmpOpnds.second)) { + registPath = true; + path->push_back(&bb); + FindPath(pred, cmpOpnds); + path->pop_back(); + return; + } + registPath = true; +} + void JumpThreading::FindPathFromUse2DefWhenOneOpndIsDefByPhi(BB &bb, BB &pred, CompareOpnds &cmpOpnds, size_t i, bool theFirstCmpOpndIsDefByPhi) { ScalarMeExpr *scalarMeExpr = theFirstCmpOpndIsDefByPhi ? static_cast(cmpOpnds.first) : @@ -582,6 +597,7 @@ void JumpThreading::FindPathFromUse2DefWhenOneOpndIsDefByPhi(BB &bb, BB &pred, C auto *defPhi = &scalarMeExpr->GetDefPhi(); auto *defBB = defPhi->GetDefBB(); if (defBB != &bb) { + FindPathWhenDefBBDomPredBB(bb, pred, cmpOpnds, *defBB); FindPathWhenDefPointIsNotInCurrBB(*defBB, bb, *cmpOpnds.first, cmpOpnds.second); return; } diff --git a/src/mapleall/maple_me/src/me_merge_stmts.cpp b/src/mapleall/maple_me/src/me_merge_stmts.cpp index 190b1cb064d006d0aded69a1c870f4d0588474b9..957a97f5df25c9dccc610ac1e1b50d43bba5634d 100644 --- a/src/mapleall/maple_me/src/me_merge_stmts.cpp +++ b/src/mapleall/maple_me/src/me_merge_stmts.cpp @@ -150,6 +150,16 @@ void MergeStmts::MergeIassigns(VOffsetStmt& iassignCandidates) { firstIassignStmt->SetRHS(newVal); firstIassignStmt->SetEmitIassignoff(true); firstIassignStmt->SetOmitEmit(false); + // Merge the chiList of the to be removed iassignStmts into firstIassignStmt + for (size_t canIdx = startCandidate + 1; canIdx <= endIdx; canIdx++) { + IassignMeStmt *removedIassignStmt = static_cast(iassignCandidates[canIdx].second); + auto *chiList = removedIassignStmt->GetChiList(); + if (chiList != nullptr) { + for (const auto &chiPair : *std::as_const(chiList)) { + (void)firstIassignStmt->GetChiList()->emplace(chiPair.first, chiPair.second); + } + } + } // Mark deletion on the rest of merged stmts BB *bb = firstIassignStmt->GetBB(); for (size_t canIdx = startCandidate + 1; canIdx <= endIdx; canIdx++) { @@ -260,6 +270,16 @@ void MergeStmts::MergeDassigns(VOffsetStmt& dassignCandidates) { firstDassignStmt->SetRHS(newVal); firstDassignStmt->SetEmitDassignoff(true); firstDassignStmt->SetOmitEmit(false); + // Merge the chiList of the to be removed dassignStmts into firstDassignStmt + for (size_t canIdx = startCandidate + 1; canIdx <= endIdx; canIdx++) { + DassignMeStmt *removedDassignStmt = static_cast(dassignCandidates[canIdx].second); + auto *chiList = removedDassignStmt->GetChiList(); + if (chiList != nullptr) { + for (const auto &chiPair : *std::as_const(chiList)) { + (void)firstDassignStmt->GetChiList()->emplace(chiPair.first, chiPair.second); + } + } + } // Mark deletion on the rest of merged stmts BB *bb = firstDassignStmt->GetBB(); for (size_t canIdx = startCandidate + 1; canIdx <= endIdx; canIdx++) { diff --git a/src/mapleall/maple_me/src/me_obj_size.cpp b/src/mapleall/maple_me/src/me_obj_size.cpp index 0eb18990cae6b50cd50ff8ad4995bab5a3216904..543fe6b2692c0631c7bbfd853df9b0d19b8fed3e 100644 --- a/src/mapleall/maple_me/src/me_obj_size.cpp +++ b/src/mapleall/maple_me/src/me_obj_size.cpp @@ -29,6 +29,7 @@ const std::map kReplacedFuncPairs { {"__memset_chk", "memset"}, {"__strncpy_chk", "strncpy"}, {"__strcpy_chk", "strcpy"}, + {"__stpncpy_chk", "stpncpy"}, {"__stpcpy_chk", "stpcpy"}, {"__strcat_chk", "strcat"}, {"__strncat_chk", "strncat"}, @@ -156,7 +157,13 @@ void OBJSize::DealWithBuiltinObjectSize(BB &bb, MeStmt &meStmt) { ERRWhenSizeTypeIsInvalid(meStmt); } auto *opnd0 = intrinsiccall.GetOpnd(0); - auto size = ComputeObjectSizeWithType(*opnd0, type); + // If the least significant bit is clear, objects are whole variables, if it is set, + // a closest surrounding subobject is considered the object a pointer points to. + bool getSizeOfWholeVar = (type == kTypeZero || type == kTypeTwo); + // If the pointer points to multiple objects at compile time, + // The second bit determines whether computes the maximum or minimum of the remaining byte counts in those objects. + bool getMaxSizeOfObjs = (type == kTypeZero || type == kTypeOne); + auto size = ComputeObjectSizeWithType(*opnd0, getSizeOfWholeVar, getMaxSizeOfObjs); if (IsInvalidSize(size)) { // __builtin_object_size // inputType = 0 or 1 return -1 @@ -208,7 +215,7 @@ size_t OBJSize::DealWithSprintfAndVsprintf(const CallMeStmt &callMeStmt, const M auto *src = callMeStmt.GetOpnd(4); src = GetStrMeExpr(*src); if (src != nullptr) { - return ComputeObjectSizeWithType(*src, 0); + return ComputeObjectSizeWithType(*src, true, true); } } return kInvalidDestSize; @@ -270,8 +277,7 @@ void OBJSize::ComputeObjectSize(MeStmt &meStmt) { } auto *destSizeOpnd = callMeStmt.GetOpnd(itOfIndex->second.second); size_t destSize = 0; - int type = 0; - destSize = ComputeObjectSizeWithType(*destSizeOpnd, type); + destSize = ComputeObjectSizeWithType(*destSizeOpnd, true, true); if (destSize == 0 || destSize == kInvalidDestSize) { // The length information of dest is unknown during compilation. ReplaceStmt(callMeStmt, it->second); @@ -282,7 +288,7 @@ void OBJSize::ComputeObjectSize(MeStmt &meStmt) { srcSize = DealWithSprintfAndVsprintf(callMeStmt, *calleeFunc); } else { MeExpr *srcSizeOpnd = callMeStmt.GetOpnd(itOfIndex->second.first); - srcSize = ComputeObjectSizeWithType(*srcSizeOpnd, 0); + srcSize = ComputeObjectSizeWithType(*srcSizeOpnd, true, true); } if (IsInvalidSize(srcSize)) { // The length information of src is unknown during compilation. @@ -321,7 +327,7 @@ size_t OBJSize::DealWithAddrof(const MeExpr &opnd, bool getSizeOfWholeVar) const return structMIRType->GetSize() - static_cast(offset / kBitsPerByte); } -size_t OBJSize::DealWithIaddrof(const MeExpr &opnd, int64 type, bool getSizeOfWholeVar) const { +size_t OBJSize::DealWithIaddrof(const MeExpr &opnd, bool getSizeOfWholeVar, bool getMaxSizeOfObjs) const { auto &iaddrofMeExpr = static_cast(opnd); auto fieldIDOfIaddrof = iaddrofMeExpr.GetFieldID(); auto *typeOfBase = GlobalTables::GetTypeTable().GetTypeFromTyIdx(iaddrofMeExpr.GetTyIdx()); @@ -331,14 +337,14 @@ size_t OBJSize::DealWithIaddrof(const MeExpr &opnd, int64 type, bool getSizeOfWh if (typeOfBase->GetKind() == kTypePointer) { typeOfBase = static_cast(typeOfBase)->GetPointedType(); } - if (typeOfBase->GetKind() != kTypeStruct) { + if (typeOfBase->GetKind() != kTypeStruct && typeOfBase->GetKind() != kTypeUnion) { return kInvalidDestSize; } if (!getSizeOfWholeVar) { // When an array is the last field of a struct, when calculating the size, // you cannot only calculate the length of the array, but use the array as a pointer to calculate the size // between the start address of the array and the end address of the struct object. - if (fieldIDOfIaddrof != static_cast(static_cast(typeOfBase)->GetFieldsSize()) || + if (fieldIDOfIaddrof != static_cast(static_cast(typeOfBase)->NumberOfFieldIDs()) || static_cast(typeOfBase)->GetFieldType(fieldIDOfIaddrof)->GetKind() != kTypeArray || !iaddrofMeExpr.GetOpnd(0)->IsLeaf()) { return static_cast(typeOfBase)->GetFieldType(fieldIDOfIaddrof)->GetSize(); @@ -348,7 +354,7 @@ size_t OBJSize::DealWithIaddrof(const MeExpr &opnd, int64 type, bool getSizeOfWh return kInvalidDestSize; } auto *iaddrofOpnd0 = iaddrofMeExpr.GetOpnd(0); - auto sizeOfIaddrofOpnd0 = ComputeObjectSizeWithType(*iaddrofOpnd0, type); + auto sizeOfIaddrofOpnd0 = ComputeObjectSizeWithType(*iaddrofOpnd0, true, getMaxSizeOfObjs); if (IsInvalidSize(sizeOfIaddrofOpnd0)) { return kInvalidDestSize; } @@ -406,7 +412,7 @@ bool OBJSize::PhiOpndIsDefPointOfOtherPhi(MeExpr &expr, std::set &vi return false; } -size_t OBJSize::DealWithDread(MeExpr &opnd, int64 type, bool getMaxSizeOfObjs) const { +size_t OBJSize::DealWithDread(MeExpr &opnd, bool getSizeOfWholeVar, bool getMaxSizeOfObjs) const { if (!opnd.IsScalar()) { return kInvalidDestSize; } @@ -419,8 +425,9 @@ size_t OBJSize::DealWithDread(MeExpr &opnd, int64 type, bool getMaxSizeOfObjs) c auto &phi = scalarMeExpr.GetDefPhi(); size_t size = getMaxSizeOfObjs ? 0 : std::numeric_limits::max(); for (size_t i = 0; i < phi.GetOpnds().size(); ++i) { - size = getMaxSizeOfObjs ? std::max(ComputeObjectSizeWithType(*phi.GetOpnd(i), type), size) : - std::min(ComputeObjectSizeWithType(*phi.GetOpnd(i), type), size); + size = getMaxSizeOfObjs ? + std::max(ComputeObjectSizeWithType(*phi.GetOpnd(i), getSizeOfWholeVar, getMaxSizeOfObjs), size) : + std::min(ComputeObjectSizeWithType(*phi.GetOpnd(i), getSizeOfWholeVar, getMaxSizeOfObjs), size); } return size; } @@ -440,7 +447,7 @@ size_t OBJSize::DealWithDread(MeExpr &opnd, int64 type, bool getMaxSizeOfObjs) c } } if (scalarMeExpr.GetDefBy() == kDefByStmt) { - return ComputeObjectSizeWithType(*scalarMeExpr.GetDefStmt()->GetRHS(), type); + return ComputeObjectSizeWithType(*scalarMeExpr.GetDefStmt()->GetRHS(), getSizeOfWholeVar, getMaxSizeOfObjs); } auto *mirType = scalarMeExpr.GetOst()->GetType(); if (mirType->IsMIRPtrType()) { @@ -455,7 +462,7 @@ size_t OBJSize::DealWithDread(MeExpr &opnd, int64 type, bool getMaxSizeOfObjs) c return size; } -size_t OBJSize::DealWithArray(const MeExpr &opnd, int64 type) const { +size_t OBJSize::DealWithArray(const MeExpr &opnd, bool getSizeOfWholeVar, bool getMaxSizeOfObjs) const { if (opnd.GetNumOpnds() != kNumOperands) { return kInvalidDestSize; } @@ -465,8 +472,8 @@ size_t OBJSize::DealWithArray(const MeExpr &opnd, int64 type) const { if (elemType == nullptr) { return kInvalidDestSize; } - auto size1 = ComputeObjectSizeWithType(*opnd0, type); - auto size2 = ComputeObjectSizeWithType(*opnd1, type); + auto size1 = ComputeObjectSizeWithType(*opnd0, getSizeOfWholeVar, getMaxSizeOfObjs); + auto size2 = ComputeObjectSizeWithType(*opnd1, getSizeOfWholeVar, getMaxSizeOfObjs); if (IsInvalidSize(size1) || IsInvalidSize(size2)) { return kInvalidDestSize; } @@ -476,38 +483,31 @@ size_t OBJSize::DealWithArray(const MeExpr &opnd, int64 type) const { // This function returns the size of object and // If it is not possible to determine which objects ptr points to at compile time, // should return (size_t) -1 for type 0 or 1 and (size_t) 0 for type 2 or 3. -size_t OBJSize::ComputeObjectSizeWithType(MeExpr &opnd, int64 type) const { - // If the least significant bit is clear, objects are whole variables, if it is set, - // a closest surrounding subobject is considered the object a pointer points to. - bool getSizeOfWholeVar = (type == kTypeZero || type == kTypeTwo); - // If the pointer points to multiple objects at compile time, - // The second bit determines whether computes the maximum or minimum of the remaining byte counts in those objects. - bool getMaxSizeOfObjs = (type == kTypeZero || type == kTypeOne); - +size_t OBJSize::ComputeObjectSizeWithType(MeExpr &opnd, bool getSizeOfWholeVar, bool getMaxSizeOfObjs) const { switch (opnd.GetOp()) { case OP_addrof: { return DealWithAddrof(opnd, getSizeOfWholeVar); } case OP_iaddrof: { - return DealWithIaddrof(opnd, type, getSizeOfWholeVar); + return DealWithIaddrof(opnd, getSizeOfWholeVar, getMaxSizeOfObjs); } case OP_dread: { - return DealWithDread(opnd, type, getMaxSizeOfObjs); + return DealWithDread(opnd, getSizeOfWholeVar, getMaxSizeOfObjs); } case OP_add: case OP_sub: { if (opnd.GetNumOpnds() != kNumOperands) { return kInvalidDestSize; } - auto size1 = ComputeObjectSizeWithType(*opnd.GetOpnd(0), type); - auto size2 = ComputeObjectSizeWithType(*opnd.GetOpnd(1), type); + auto size1 = ComputeObjectSizeWithType(*opnd.GetOpnd(0), getSizeOfWholeVar, getMaxSizeOfObjs); + auto size2 = ComputeObjectSizeWithType(*opnd.GetOpnd(1), getSizeOfWholeVar, getMaxSizeOfObjs); if (IsInvalidSize(size1) || IsInvalidSize(size2)) { return kInvalidDestSize; } return (opnd.GetOp() == OP_add || opnd.GetOp() == OP_array) ? (size1 - size2) : (size1 + size2); } case OP_array: { - return DealWithArray(opnd, type); + return DealWithArray(opnd, getSizeOfWholeVar, getMaxSizeOfObjs); } case OP_constval: { auto &constMeExpr = static_cast(opnd); diff --git a/src/mapleall/maple_me/src/me_option.cpp b/src/mapleall/maple_me/src/me_option.cpp index de43259b388d8cc90006745da056030b5b40c21c..bbcae0faeb51e156694735ba074cbe9812b270db 100644 --- a/src/mapleall/maple_me/src/me_option.cpp +++ b/src/mapleall/maple_me/src/me_option.cpp @@ -178,6 +178,9 @@ void MeOption::DecideMeRealLevel() const { placementRC = true; subsumRC = true; epreIncludeRef = true; + if (opts::linkerTimeOpt.IsEnabledByUser()) { + optLevel = kLevelTwo; + } } } @@ -456,15 +459,15 @@ bool MeOption::SolveOptions(bool isDebug) { // Now some tls and pic related logic have been moved me, // so we need pic related options processed in me in advance, to make me and cg coherent. // When tls moved to cg as normal, these could be deleted. - if (opts::cg::fpic.IsEnabledByUser() || opts::cg::fPIC.IsEnabledByUser()) { - if (!opts::cg::fpie && !opts::cg::fpie.IsEnabledByUser() && - !opts::cg::fPIE.IsEnabledByUser() && !opts::cg::fPIE) { - if (opts::cg::fPIC && opts::cg::fPIC.IsEnabledByUser()) { - maplebe::CGOptions::GetInstance().SetPICOptionHelper(maplebe::CGOptions::kLargeMode); + if (opts::fpic.IsEnabledByUser() || opts::fPIC.IsEnabledByUser()) { + if (!opts::fpie && !opts::fpie.IsEnabledByUser() && + !opts::fPIE.IsEnabledByUser() && !opts::fPIE) { + if (opts::fPIC && opts::fPIC.IsEnabledByUser()) { + maplebe::CGOptions::SetPICOptionHelper(maplebe::CGOptions::kLargeMode); maplebe::CGOptions::SetPIEMode(maplebe::CGOptions::kClose); maplebe::CGOptions::GetInstance().ClearOption(maplebe::CGOptions::kGenPie); - } else if (opts::cg::fpic && opts::cg::fpic.IsEnabledByUser()) { - maplebe::CGOptions::GetInstance().SetPICOptionHelper(maplebe::CGOptions::kSmallMode); + } else if (opts::fpic && opts::fpic.IsEnabledByUser()) { + maplebe::CGOptions::SetPICOptionHelper(maplebe::CGOptions::kSmallMode); maplebe::CGOptions::SetPIEMode(maplebe::CGOptions::kClose); maplebe::CGOptions::GetInstance().ClearOption(maplebe::CGOptions::kGenPie); } else { diff --git a/src/mapleall/maple_me/src/me_options.cpp b/src/mapleall/maple_me/src/me_options.cpp index 2be7a160bf33c3923ebecea2fc0fe8141c39c544..a68bc496621c4b7db2c362be7e9ee00ff5d4f1e8 100644 --- a/src/mapleall/maple_me/src/me_options.cpp +++ b/src/mapleall/maple_me/src/me_options.cpp @@ -108,10 +108,11 @@ maplecl::Option ubaa({"--ubaa"}, " --no-ubaa \tDisable UnionBased alias analysis\n", {meCategory}, maplecl::DisableWith("--no-ubaa")); -maplecl::Option tbaa({"--tbaa"}, - " --tbaa \tEnable type-based alias analysis\n" +maplecl::Option tbaa({"-fstrict-aliasing", "--tbaa"}, + " -fstrict-aliasing/--tbaa \tEnable type-based alias analysis\n" " --no-tbaa \tDisable type-based alias analysis\n", - {driverCategory, meCategory}, maplecl::DisableWith("--no-tbaa"), maplecl::DisableWith("-fno-strict-aliasing")); + {driverCategory, meCategory}, kOptCommon | kOptOptimization, + maplecl::DisableEvery({"-fno-strict-aliasing", "--no-tbaa"})); maplecl::Option ddaa({"--ddaa"}, " --ddaa \tEnable demand driven alias analysis\n" @@ -340,7 +341,7 @@ maplecl::Option strengthreduction({"--strengthreduction"}, maplecl::Option sradd({"--sradd"}, " --sradd \tPerform strength reduction for OP_add/sub\n" " --no-sradd \tDisable strength reduction for OP_add/sub\n", - {driverCategory, meCategory}, maplecl::DisableWith("--no-sradd")); + {driverCategory, meCategory}, kOptMaple, maplecl::DisableWith("--no-sradd")); maplecl::Option lftr({"--lftr"}, " --lftr \tPerform linear function test replacement\n" diff --git a/src/mapleall/maple_me/src/me_safety_warning.cpp b/src/mapleall/maple_me/src/me_safety_warning.cpp index fc5e64b4e49f0541f21ba18eb87fef80d5cc129b..8bd5d42347e060b43d77866df6508a81a65d7cc1 100644 --- a/src/mapleall/maple_me/src/me_safety_warning.cpp +++ b/src/mapleall/maple_me/src/me_safety_warning.cpp @@ -24,22 +24,6 @@ #include "opcode_info.h" namespace maple { -std::string GetNthStr(size_t index) { - switch (index) { - case 0: - return "1st"; - case 1: - return "2nd"; - case 2: - return "3rd"; - default: { - std::ostringstream oss; - oss << index + 1 << "th"; - return oss.str(); - } - } -} - inline static bool HandleAssertNonnull(const MeStmt &stmt, const MIRModule &mod, const MeFunction &func) { auto srcPosition = stmt.GetSrcPosition(); auto &newStmt = static_cast(stmt); diff --git a/src/mapleall/maple_me/src/me_scalar_analysis.cpp b/src/mapleall/maple_me/src/me_scalar_analysis.cpp index 7cb359c8c7142957a8e4150c6787efc4b132a18c..1249520477fc94be8db5a3299b2ed3ead473829f 100644 --- a/src/mapleall/maple_me/src/me_scalar_analysis.cpp +++ b/src/mapleall/maple_me/src/me_scalar_analysis.cpp @@ -1487,6 +1487,10 @@ bool LoopScalarAnalysisResult::CanComputeTripCountWithCvtOpnd( auto &cvtOpnd = static_cast(opnd); auto toType = cvtOpnd.GetPrimType(); auto fromType = cvtOpnd.GetOpndType(); + if (IsUnsignedInteger(toType) && IsUnsignedInteger(fromType) && + GetPrimTypeBitSize(toType) > GetPrimTypeBitSize(fromType)) { + return true; + } if (!Bound(initConst, toType).IsEqual(Bound(initConst, fromType), toType) || !Bound(strideConst, toType).IsEqual(Bound(strideConst, fromType), toType) || !Bound(exitConst, toType).IsEqual(Bound(exitConst, fromType), toType) || diff --git a/src/mapleall/maple_me/src/me_sink.cpp b/src/mapleall/maple_me/src/me_sink.cpp index 9cb998f5e974d952e3bccaf7b602e70c5a812f04..bc969a95fa91099415a9b67e56e2608e48727720 100644 --- a/src/mapleall/maple_me/src/me_sink.cpp +++ b/src/mapleall/maple_me/src/me_sink.cpp @@ -696,7 +696,7 @@ bool MeSink::ExprsHasSameValue(const MeExpr *exprA, const MeExpr *exprB) { } MeExpr *MeSink::ConstructExpr(MeExpr *expr, const BB *predBB, const BB *phiBB) { - if (expr == nullptr) { + if (expr == nullptr || expr->IsVolatile()) { return nullptr; } diff --git a/src/mapleall/maple_me/src/me_value_range_prop.cpp b/src/mapleall/maple_me/src/me_value_range_prop.cpp index 0eb60db37ff2f523939f4e91f2b3d2c870b804e7..1aa6cca0f8849fd0e028b16b261f328f45da30c2 100644 --- a/src/mapleall/maple_me/src/me_value_range_prop.cpp +++ b/src/mapleall/maple_me/src/me_value_range_prop.cpp @@ -95,6 +95,10 @@ ValueRange *ValueRangePropagation::GetVRAfterCvt(ValueRange &vr, PrimType pty) c if (pty == ptyOfVR) { return &vr; } + if (!vr.GetUpper().IsEqualAfterCVT(ptyOfVR, pty) || + !vr.GetLower().IsEqualAfterCVT(ptyOfVR, pty)) { + return nullptr; + } auto ptyIsUnsigned = IsUnsignedInteger(pty); auto ptyOfVRIsUnsigned = IsUnsignedInteger(ptyOfVR); auto sizeOfVRPty = GetPrimTypeSize(ptyOfVR); @@ -169,7 +173,7 @@ void ValueRangePropagation::Execute() { if (!onlyPropVR) { ReplaceOpndWithConstMeExpr(*curBB, *it); } - if (it->GetLHS() != nullptr && it->GetLHS()->ContainsVolatile()) { + if (it->GetLHS() != nullptr && !CanCreateVRForExpr(*it->GetLHS())) { ++it; continue; } @@ -205,7 +209,7 @@ void ValueRangePropagation::Execute() { case OP_dassign: case OP_maydassign: case OP_regassign: { - if (it->GetLHS() != nullptr && it->GetLHS()->IsVolatile()) { + if (it->GetLHS() != nullptr && !CanCreateVRForExpr(*it->GetLHS())) { break; } DealWithAssign(*curBB, *it); @@ -1076,7 +1080,7 @@ void ValueRangePropagation::GetValueRangeOfCRNode( return; } auto valueRangOfOpnd = FindValueRangeInCurrBBOrDominateBBs(bb, *opndOfCRNode.GetExpr()); - if (valueRangOfOpnd == nullptr) { + if (valueRangOfOpnd == nullptr || valueRangOfOpnd->IsUniversalSet()) { valueRangOfOpnd = std::make_unique( Bound(opndOfCRNode.GetExpr(), opndOfCRNode.GetExpr()->GetPrimType()), kEqual); if (resValueRange == nullptr) { @@ -1596,7 +1600,10 @@ void ValueRangePropagation::CreateVRWithBitsSize(const BB &bb, const OpMeExpr &o } } -void ValueRangePropagation::DealWithOperand(const BB &bb, MeStmt &stmt, MeExpr &meExpr) { +void ValueRangePropagation::DealWithOperand(BB &bb, MeStmt &stmt, MeExpr &meExpr) { + if (!IsNeededPrimType(meExpr.GetPrimType())) { + return; + } switch (meExpr.GetMeOp()) { case kMeOpConst: { if (static_cast(meExpr).GetConstVal()->GetKind() == kConstInt) { @@ -1625,6 +1632,14 @@ void ValueRangePropagation::DealWithOperand(const BB &bb, MeStmt &stmt, MeExpr & static_cast(ptrType->GetPointedType())->GetFieldAttrs(filedID).GetAttr(FLDATTR_nonnull)) { (void)Insert2Caches(bb.GetBBId(), meExpr.GetExprID(), CreateValueRangeOfNotEqualZero(meExpr.GetPrimType())); } + auto filedPTy = ivarMeExpr.GetType()->GetPrimType(); + auto ivarPTy = ivarMeExpr.GetPrimType(); + if (GetPrimTypeSize(filedPTy) < GetPrimTypeSize(ivarPTy) && + IsPrimitiveUnsigned(filedPTy) == IsPrimitiveUnsigned(ivarPTy)) { + // There is an implicit conversion here, for example, field's primtype is u16 and ivar's primtype is u32. + (void)Insert2Caches(bb.GetBBId(), ivarMeExpr.GetExprID(), std::make_unique(Bound(nullptr, + GetMinNumber(filedPTy), ivarPTy), Bound(nullptr, GetMaxNumber(filedPTy), ivarPTy), kLowerAndUpper)); + } break; } case kMeOpVar: { @@ -1672,6 +1687,24 @@ void ValueRangePropagation::DealWithOperand(const BB &bb, MeStmt &stmt, MeExpr & if (valueRange->IsEqualAfterCVT(valueRange->GetLower().GetPrimType(), pTypeOpnd) && valueRange->GetUpper().IsLessThanOrEqualTo(Bound(maxNumber, PTY_u64), PTY_u64)) { (void) Insert2Caches(bb.GetBBId(), opMeExpr.GetExprID(), CopyValueRange(*valueRange)); + auto vrPTy = valueRange->GetPrimType(); + if (GetRealValue(valueRange->GetLower().GetConstant(), vrPTy) == 0 && + static_cast(GetRealValue(valueRange->GetUpper().GetConstant(), vrPTy)) == maxNumber) { + // If the vr of opnd before and after zext is equal and is the complete set + // of the corresponding primtype's range, then opnd and opmeexpr are considered equivalent exprs. + // Such as: + // ||MEIR|| regassign REGINDX:7 u32 %7 mx187 + // rhs = IVAR mx178 u32 TYIDX:198<* <$TbmFwdTbl>> (field)3 + // base = REGINDX:6 a64 %6 mx176 + // - MU: {} + // ||MEIR|| regassign REGINDX:8 i32 %8 mx196 + // rhs = OP zext i32 16 kPtyInvalid mx188 + // opnd[0] = REGINDX:7 u32 %7 mx187 + // Primtype of ivar's field 3 is u16, ivar's primtype is u32, + // so mx187 and mx188 are considered equivalent exprs. + Insert2PairOfExprs(opMeExpr, *opnd, bb); + Insert2PairOfExprs(*opnd, opMeExpr, bb); + } break; } } @@ -2099,12 +2132,16 @@ bool ValueRangePropagation::IsConstant(const BB &bb, MeExpr &expr, int64 &value, return false; } +bool ValueRangePropagation::IsNotNeededVRType(const ValueRange &vrLeft, const ValueRange &vrRight) const { + return vrLeft.GetRangeType() == kNotEqual || vrRight.GetRangeType() == kNotEqual || + vrLeft.GetRangeType() == kOnlyHasLowerBound || vrRight.GetRangeType() == kOnlyHasLowerBound || + vrLeft.GetRangeType() == kOnlyHasUpperBound || vrRight.GetRangeType() == kOnlyHasUpperBound; +} + // Create new valueRange when old valueRange add or sub with a valuerange. std::unique_ptr ValueRangePropagation::AddOrSubWithValueRange( Opcode op, ValueRange &valueRangeLeft, ValueRange &valueRangeRight) const { - if (valueRangeLeft.GetRangeType() == kNotEqual || valueRangeRight.GetRangeType() == kNotEqual || - valueRangeLeft.GetRangeType() == kOnlyHasLowerBound || valueRangeRight.GetRangeType() == kOnlyHasLowerBound || - valueRangeLeft.GetRangeType() == kOnlyHasUpperBound || valueRangeRight.GetRangeType() == kOnlyHasUpperBound) { + if (IsNotNeededVRType(valueRangeLeft, valueRangeRight)) { return nullptr; } // Deal with the case like : @@ -2124,8 +2161,10 @@ std::unique_ptr ValueRangePropagation::AddOrSubWithValueRange( } } } - if (valueRangeLeft.GetLower().GetVar() != valueRangeRight.GetLower().GetVar() || - valueRangeLeft.GetUpper().GetVar() != valueRangeRight.GetUpper().GetVar()) { + if (valueRangeLeft.IsNotConstantVR() || valueRangeRight.IsNotConstantVR()) { + return nullptr; + } + if (IsInvalidVR(valueRangeLeft) || IsInvalidVR(valueRangeRight)) { return nullptr; } int64 rhsLowerConst = valueRangeRight.GetLower().GetConstant(); @@ -2161,7 +2200,7 @@ std::unique_ptr ValueRangePropagation::AddOrSubWithValueRange( PrimType pTy, Opcode op, ValueRange &valueRange, int64 rhsConstant) const { if (valueRange.GetRangeType() == kLowerAndUpper) { if (valueRange.IsConstantLowerAndUpper() && - valueRange.GetLower().IsGreaterThan(valueRange.GetUpper(), valueRange.GetPrimType())) { + valueRange.IsInvalidVR()) { return nullptr; } Bound lower; @@ -2210,7 +2249,7 @@ std::unique_ptr ValueRangePropagation::RemWithRhsValueRange( } else { return nullptr; } - } else { + } else if (Bound(rhsConstant, pType).IsLessThanOrEqualTo(Bound(nullptr, 0, pType), pType)) { if (AddOrSubWithConstant(opMeExpr.GetPrimType(), OP_add, 1, rhsConstant, res)) { lowerRes = res; } else { @@ -2221,6 +2260,8 @@ std::unique_ptr ValueRangePropagation::RemWithRhsValueRange( } else { return nullptr; } + } else { + return nullptr; } Bound lower = Bound(nullptr, lowerRes, opMeExpr.GetPrimType()); Bound upper = Bound(nullptr, upperRes, opMeExpr.GetPrimType()); @@ -2241,7 +2282,8 @@ std::unique_ptr ValueRangePropagation::RemWithValueRange(const BB &b if (!valueRange->IsConstantLowerAndUpper()) { return remValueRange; } else if (valueRange->GetRangeType() == kEqual) { - if (valueRange->GetBound().IsEqualToMin(opMeExpr.GetPrimType())) { + if (!valueRange->GetBound().IsEqualAfterCVT(valueRange->GetBound().GetPrimType(), opMeExpr.GetPrimType()) || + valueRange->GetBound().IsEqualToMin(opMeExpr.GetPrimType())) { return nullptr; } int64 res = Bound::GetRemResult(valueRange->GetBound().GetConstant(), rhsConstant, opMeExpr.GetPrimType()); @@ -2253,6 +2295,9 @@ std::unique_ptr ValueRangePropagation::RemWithValueRange(const BB &b return remValueRange; } std::unique_ptr combineRes = CombineTwoValueRange(*remValueRange, *valueRange); + if (combineRes == nullptr) { + return nullptr; + } int64 lowerRes = combineRes->GetLower().GetConstant(); int64 upperRes = combineRes->GetUpper().GetConstant(); if (upperRes <= lowerRes) { @@ -2498,7 +2543,14 @@ void ValueRangePropagation::DealWithAssign(BB &bb, const MeStmt &stmt) { } else { Insert2Caches(bb.GetBBId(), lhs->GetExprID(), nullptr); } + return; } + auto pType = lhs->GetPrimType(); + if (!IsPrimitivePureScalar(pType)) { + return; + } + (void)Insert2Caches(bb.GetBBId(), lhs->GetExprID(), std::make_unique( + Bound(nullptr, GetMinNumber(pType), pType), Bound(nullptr, GetMaxNumber(pType), pType), kLowerAndUpper)); } // Analysis the stride of loop induction var, like this pattern: @@ -2542,130 +2594,6 @@ bool ValueRangePropagation::CanComputeLoopIndVar(const MeExpr &phiLHS, MeExpr &e return false; } -// Create new value range when the loop induction var is monotonic increase. -std::unique_ptr ValueRangePropagation::CreateValueRangeForMonotonicIncreaseVar( - const LoopDesc &loop, BB &exitBB, const BB &bb, const OpMeExpr &opMeExpr, MeExpr &opnd1, - Bound &initBound, int64 stride) { - BB *inLoopBB = nullptr; - BB *outLoopBB = nullptr; - if (loop.Has(*exitBB.GetSucc(0))) { - inLoopBB = exitBB.GetSucc(0); - outLoopBB = exitBB.GetSucc(1); - CHECK_FATAL(!loop.Has(*exitBB.GetSucc(1)), "must not in loop"); - } else { - inLoopBB = exitBB.GetSucc(1); - outLoopBB = exitBB.GetSucc(0); - CHECK_FATAL(!loop.Has(*exitBB.GetSucc(0)), "must not in loop"); - } - int64 rightConstant = 0; - if (opMeExpr.GetOp() == OP_lt || opMeExpr.GetOp() == OP_ge || - opMeExpr.GetOp() == OP_ne || opMeExpr.GetOp() == OP_eq) { - rightConstant = -stride; - } - Bound upperBound; - int64 constantValue = 0; - if (IsConstant(bb, opnd1, constantValue)) { - int64 res = 0; - if (AddOrSubWithConstant(opnd1.GetPrimType(), OP_add, constantValue, rightConstant, res)) { - upperBound = Bound(res, opnd1.GetPrimType()); - } else { - return nullptr; - } - if (initBound.GetVar() == upperBound.GetVar() && initBound.IsGreaterThan(upperBound, opMeExpr.GetOpndType())) { - if (opMeExpr.GetOp() != OP_ne && opMeExpr.GetOp() != OP_eq) { - AnalysisUnreachableBBOrEdge(exitBB, *inLoopBB, *outLoopBB); - } - return nullptr; - } - if (initBound.GetVar() != nullptr) { - return std::make_unique(initBound, upperBound, kSpecialLowerForLoop); - } else { - return std::make_unique(initBound, upperBound, kLowerAndUpper); - } - } else if (opnd1.GetOp() == OP_add || opnd1.GetOp() == OP_sub) { - auto valueRangeOfUpper = DealWithAddOrSub(bb, static_cast(opnd1)); - if (valueRangeOfUpper != nullptr) { - int64 res = 0; - if (AddOrSubWithConstant(opnd1.GetPrimType(), OP_add, valueRangeOfUpper->GetUpper().GetConstant(), - rightConstant, res)) { - upperBound = Bound(valueRangeOfUpper->GetUpper().GetVar(), res, opnd1.GetPrimType()); - } - if (initBound.GetVar() == nullptr) { - if (valueRangeOfUpper->GetRangeType() == kLowerAndUpper || valueRangeOfUpper->GetRangeType() == kEqual) { - if (valueRangeOfUpper->GetUpper().GetVar() == nullptr) { - return std::make_unique(initBound, upperBound, kLowerAndUpper); - } else { - return std::make_unique(initBound, upperBound, kSpecialUpperForLoop); - } - } - } else if ((valueRangeOfUpper->GetRangeType() == kLowerAndUpper || valueRangeOfUpper->GetRangeType() == kEqual) && - valueRangeOfUpper->GetUpper().GetVar() == nullptr) { - return std::make_unique(initBound, upperBound, kSpecialLowerForLoop); - } - } - } - if (initBound.GetVar() == nullptr) { - return std::make_unique( - initBound, Bound(&opnd1, rightConstant, initBound.GetPrimType()), kSpecialUpperForLoop); - } - return nullptr; -} - -// Create new value range when the loop induction var is monotonic decrease. -std::unique_ptr ValueRangePropagation::CreateValueRangeForMonotonicDecreaseVar( - const LoopDesc &loop, BB &exitBB, const BB &bb, const OpMeExpr &opMeExpr, MeExpr &opnd1, - Bound &initBound, int64 stride) { - BB *inLoopBB = nullptr; - BB *outLoopBB = nullptr; - if (loop.Has(*exitBB.GetSucc(0))) { - inLoopBB = exitBB.GetSucc(0); - outLoopBB = exitBB.GetSucc(1); - CHECK_FATAL(!loop.Has(*exitBB.GetSucc(1)), "must not in loop"); - } else { - inLoopBB = exitBB.GetSucc(1); - outLoopBB = exitBB.GetSucc(0); - CHECK_FATAL(!loop.Has(*exitBB.GetSucc(0)), "must not in loop"); - } - int64 rightConstant = 0; - if (opMeExpr.GetOp() == OP_le || opMeExpr.GetOp() == OP_gt || - opMeExpr.GetOp() == OP_ne || opMeExpr.GetOp() == OP_eq) { - rightConstant = -stride; - } - Bound lowerBound; - int64 constantValue = 0; - if (IsConstant(bb, opnd1, constantValue)) { - int64 res = 0; - if (AddOrSubWithConstant(opnd1.GetPrimType(), OP_add, constantValue, rightConstant, res)) { - lowerBound = Bound(res, opnd1.GetPrimType()); - } else { - return nullptr; - } - if (lowerBound.GetVar() == initBound.GetVar() && lowerBound.IsGreaterThan(initBound, opMeExpr.GetOpndType())) { - if (opMeExpr.GetOp() != OP_ne && opMeExpr.GetOp() != OP_eq) { - AnalysisUnreachableBBOrEdge(exitBB, *inLoopBB, *outLoopBB); - } - return nullptr; - } - return initBound.GetVar() == nullptr ? std::make_unique(lowerBound, initBound, kLowerAndUpper) : - std::make_unique(lowerBound, initBound, kSpecialUpperForLoop); - } else { - if (initBound.GetVar() == nullptr) { - return std::make_unique( - Bound(&opnd1, rightConstant, opnd1.GetPrimType()), initBound, kSpecialLowerForLoop); - } - } - return nullptr; -} - -std::unique_ptr ValueRangePropagation::MergeValuerangeOfPhi( - std::vector> &valueRangeOfPhi) { - std::unique_ptr res = std::move(valueRangeOfPhi.at(0)); - for (size_t i = 1; i < valueRangeOfPhi.size(); ++i) { - res = CombineTwoValueRange(*res, *valueRangeOfPhi[i]); - } - return res; -} - std::unique_ptr ValueRangePropagation::MakeMonotonicIncreaseOrDecreaseValueRangeForPhi( int64 stride, Bound &initBound) const { if (stride > 0) { @@ -2695,7 +2623,7 @@ void ValueRangePropagation::TravelBBs(std::vector &reversePostOrderOfLoopBB case OP_dassign: case OP_maydassign: case OP_regassign: { - if (it->GetLHS() != nullptr && it->GetLHS()->IsVolatile()) { + if (it->GetLHS() != nullptr && !CanCreateVRForExpr(*it->GetLHS())) { break; } DealWithAssign(*bb, *it); @@ -2746,7 +2674,7 @@ void ValueRangePropagation::CreateVRForPhi(const LoopDesc &loop) { std::unique_ptr ValueRangePropagation::MergeValueRangeOfPhiOperands(const BB &bb, MePhiNode &mePhiNode) { auto *resValueRange = FindValueRangeAndInitNumOfRecursion( *bb.GetPred(0), *mePhiNode.GetOpnd(0), kRecursionThresholdOfFindVROfPhi); - if (resValueRange == nullptr || !resValueRange->IsConstant()) { + if (resValueRange == nullptr || !resValueRange->IsConstantBoundOrLowerAndUpper()) { return nullptr; } bool theRangeTypeIsNotEqual = (resValueRange->GetRangeType() == kNotEqual); @@ -2756,7 +2684,7 @@ std::unique_ptr ValueRangePropagation::MergeValueRangeOfPhiOperands( auto *valueRange = FindValueRangeAndInitNumOfRecursion(*bb.GetPred(i), *operand, kRecursionThresholdOfFindVROfPhi); // If one valuerange is nullptr, the result is nullptr. - if (valueRange == nullptr || !valueRange->IsConstant()) { + if (valueRange == nullptr || !valueRange->IsConstantBoundOrLowerAndUpper()) { return nullptr; } theRangeTypeIsNotEqual = (valueRange->GetRangeType() == kNotEqual) || theRangeTypeIsNotEqual; @@ -2771,6 +2699,9 @@ std::unique_ptr ValueRangePropagation::MergeValueRangeOfPhiOperands( return nullptr; } resValueRangePtr = CombineTwoValueRange(*resValueRangePtr, *valueRange, true); + if (resValueRangePtr == nullptr) { + return nullptr; + } } return resValueRangePtr; } @@ -2783,14 +2714,14 @@ bool ValueRangePropagation::MergeVrOrInitAndBackedge(const MePhiNode &mePhiNode, auto lowerBound = isOnlyHasLowerBound ? vrOfInitExpr.GetBound() : valueRange.GetBound(); if (valueRange.GetRangeType() == kNotEqual) { if (vrOfInitExpr.GetBound().IsConstantBound() && valueRange.IsConstantRange()) { - if (lowerBound.IsGreaterThan(upperBound, pType)) { + if (!lowerBound.IsLessThanOrEqualTo(upperBound, pType)) { return false; } int64 res = 0; if (!AddOrSubWithConstant(pType, OP_sub, upperBound.GetConstant(), lowerBound.GetConstant(), res)) { return false; } - if (Bound(res, pType).IsLessThanOrEqualTo(Bound(vrOfInitExpr.GetStride(), pType), pType)) { + if (!Bound(res, pType).IsGreaterThan(Bound(vrOfInitExpr.GetStride(), pType), pType)) { return false; } } @@ -2847,6 +2778,25 @@ void ValueRangePropagation::MergeValueRangeOfPhiOperands(const LoopDesc &loop, c vrCanBeComputed = false; break; } + // The loop variable overflow or underflow during iteration, can not recorded vr of the loop variable. such as: + // label1: + // a1 = phi(a0, a2), + // a2 = a1 +/- 1, + // goto label1, + // If the step of loop var a is greater than 0 and the lower bound of a2 is less than the lower bound of a0, + // the loop variable overflow during iteration. + // If the step of loop var a is less than 0 and the lower bound of a2 is greater than the upper bound of a0, + // the loop variable underflow during iteration. + if (valueRange->GetRangeType() == kLowerAndUpper && + valueRange->IsConstantRange() && + vrOfInitExpr->GetBound().IsConstantBound() && + ((vrOfInitExpr->GetRangeType() == kOnlyHasLowerBound && + valueRange->GetLower().IsLessThanOrEqualTo(vrOfInitExpr->GetLower(), vrOfInitExpr->GetPrimType())) || + (vrOfInitExpr->GetRangeType() == kOnlyHasUpperBound && + valueRange->GetUpper().IsGreaterThanOrEqualTo(vrOfInitExpr->GetUpper(), vrOfInitExpr->GetPrimType())))) { + vrCanBeComputed = false; + break; + } isAccurateBound = valueRange->IsAccurate() || valueRange->GetRangeType() == kEqual || valueRange->GetRangeType() == kNotEqual; } @@ -2944,6 +2894,9 @@ bool ValueRangePropagation::Insert2Caches( if (onlyRecordValueRangeInTempCache.top()) { tempCaches[bbID][exprID] = std::move(valueRange); } else { + if (valueRange->IsConstantLowerAndUpper() && IsInvalidVR(*valueRange)) { + return false; + } caches.at(bbID)[exprID] = std::move(valueRange); } if (opnd != nullptr) { @@ -2990,9 +2943,9 @@ void ValueRangePropagation::JudgeEqual(const MeExpr &expr, ValueRange &vrOfLHS, valueRangePtr = (op == OP_eq) ? CreateValueRangeOfEqualZero(resPType) : CreateValueRangeOfNotEqualZero(resPType); } } else if (vrOfLHS.GetRangeType() == kLowerAndUpper) { - if (!vrOfLHS.GetLower().IsGreaterThan(vrOfLHS.GetUpper(), primType) && + if (!vrOfLHS.IsInvalidVR() && vrOfLHS.IsEqualAfterCVT(vrOfLHS.GetPrimType(), primType) && (vrOfLHS.GetLower().IsGreaterThan(vrOfRHS.GetBound(), primType) || - vrOfRHS.GetBound().IsGreaterThan(vrOfLHS.GetUpper(), primType))) { + vrOfRHS.GetBound().IsGreaterThan(vrOfLHS.GetUpper(), primType))) { // dealwith this case: // a = (b == c) // valueRange(b): kLowerAndUpper (1, Max) @@ -3032,7 +2985,9 @@ ValueRange *ValueRangePropagation::DealWithNegWhenFindValueRange(const BB &bb, c return nullptr; } auto *resValueRange = valueRangePtr.get(); - (void)Insert2Caches(bb.GetBBId(), expr.GetExprID(), std::move(valueRangePtr)); + if (!Insert2Caches(bb.GetBBId(), expr.GetExprID(), std::move(valueRangePtr))) { + return nullptr; + } return resValueRange; } @@ -3084,7 +3039,9 @@ ValueRange *ValueRangePropagation::FindValueRangeWithCompareOp(const BB &bb, con } if (valueRangePtr != nullptr) { resValueRange = valueRangePtr.get(); - (void)Insert2Caches(bb.GetBBId(), expr.GetExprID(), std::move(valueRangePtr)); + if (!Insert2Caches(bb.GetBBId(), expr.GetExprID(), std::move(valueRangePtr))) { + return nullptr; + } } return resValueRange; } @@ -3101,6 +3058,25 @@ bool ValueRangePropagation::IsSubOpndOfExpr(const MeExpr &expr, const MeExpr &su return false; } +ValueRange *ValueRangePropagation::GetMinimumRange(ValueRange *vr1, ValueRange *vr2, PrimType pTy) const { + if (vr1 == nullptr) { + return vr2; + } + if (vr2 == nullptr) { + return vr1; + } + if (!vr1->IsConstantRange() || !vr2->IsConstantRange()) { + return vr2; + } + if (!vr1->IsEqualAfterCVT(vr1->GetPrimType(), pTy) || !vr2->IsEqualAfterCVT(vr2->GetPrimType(), pTy)) { + return vr2; + } + return (vr1->GetLower().IsGreaterThanOrEqualTo(vr2->GetLower(), pTy) && + vr1->GetUpper().IsLessThan(vr2->GetUpper(), pTy)) || + (vr1->GetLower().IsGreaterThan(vr2->GetLower(), pTy) && + vr1->GetUpper().IsLessThanOrEqualTo(vr2->GetUpper(), pTy)) ? vr1 : vr2; +} + // When the valueRange of expr is not exist, need find the valueRange of the def point or use points. ValueRange *ValueRangePropagation::FindValueRange(const BB &bb, MeExpr &expr, uint32 &numberOfRecursionsArg, std::unordered_set &foundExprs, uint32 maxThreshold) { @@ -3108,18 +3084,17 @@ ValueRange *ValueRangePropagation::FindValueRange(const BB &bb, MeExpr &expr, ui return nullptr; } uint32 recursions = 0; + ValueRange *resVR = nullptr; auto *valueRange = FindValueRangeInCaches( bb.GetBBId(), expr.GetExprID(), recursions, maxThreshold, expr.GetPrimType()); - if (valueRange != nullptr) { - return valueRange; - } - valueRange = FindValueRangeWithCompareOp(bb, expr, numberOfRecursionsArg, foundExprs, maxThreshold); - if (valueRange != nullptr) { - return valueRange; + resVR = GetMinimumRange(valueRange, resVR, expr.GetPrimType()); + if (resVR == nullptr) { + valueRange = FindValueRangeWithCompareOp(bb, expr, numberOfRecursionsArg, foundExprs, maxThreshold); } + resVR = GetMinimumRange(valueRange, resVR, expr.GetPrimType()); auto it = pairOfExprs.find(&expr); if (it == pairOfExprs.end()) { - return nullptr; + return resVR; } for (auto itOfValueMap = it->second.begin(); itOfValueMap != it->second.end(); ++itOfValueMap) { auto bbOfPair = itOfValueMap->first; @@ -3129,13 +3104,11 @@ ValueRange *ValueRangePropagation::FindValueRange(const BB &bb, MeExpr &expr, ui } for (auto itOfExprs = exprs.begin(); itOfExprs != exprs.end(); ++itOfExprs) { if (!foundExprs.insert((*itOfExprs)->GetExprID()).second) { - return nullptr; + continue; } - recursions = 0; - valueRange = FindValueRangeInCaches( - bb.GetBBId(), (*itOfExprs)->GetExprID(), recursions, maxThreshold, (*itOfExprs)->GetPrimType()); + valueRange = FindValueRange(bb, **itOfExprs, numberOfRecursionsArg, foundExprs, maxThreshold); if (valueRange != nullptr && valueRange->IsEqualAfterCVT(expr.GetPrimType(), (*itOfExprs)->GetPrimType())) { - return valueRange; + resVR = GetMinimumRange(valueRange, resVR, expr.GetPrimType()); } if (IsSubOpndOfExpr(**itOfExprs, expr)) { // When the condition is true, mx1297 and mx553 are equivalent. When the vr of mx533 cannot be found, @@ -3147,13 +3120,13 @@ ValueRange *ValueRangePropagation::FindValueRange(const BB &bb, MeExpr &expr, ui // opnd[1] = OP cvt i32 i64 mx553 continue; } - valueRange = FindValueRangeWithCompareOp(bb, **itOfExprs, numberOfRecursionsArg, foundExprs, maxThreshold); - if (valueRange != nullptr) { - return valueRange; + if (resVR == nullptr) { + valueRange = FindValueRangeWithCompareOp(bb, **itOfExprs, numberOfRecursionsArg, foundExprs, maxThreshold); } + resVR = GetMinimumRange(valueRange, resVR, expr.GetPrimType()); } } - return nullptr; + return resVR; } std::unique_ptr ValueRangePropagation::CreateInitVRForPhi(LoopDesc &loop, @@ -3279,7 +3252,7 @@ void ValueRangePropagation::DealWithPhi(const BB &bb) { // Return the max of leftBound or rightBound. Bound ValueRangePropagation::Max(Bound leftBound, Bound rightBound) { if (leftBound.GetVar() == rightBound.GetVar()) { - return (leftBound.GetConstant() > rightBound.GetConstant()) ? leftBound : rightBound; + return (leftBound.IsGreaterThan(rightBound, leftBound.GetPrimType())) ? leftBound : rightBound; } else { if (leftBound.GetVar() == nullptr && leftBound.IsEqualToMin(leftBound.GetPrimType()) && rightBound.GetConstant() < 1 && lengthSet.find(rightBound.GetVar()) != lengthSet.end()) { @@ -3296,7 +3269,7 @@ Bound ValueRangePropagation::Max(Bound leftBound, Bound rightBound) { // Return the min of leftBound or rightBound. Bound ValueRangePropagation::Min(Bound leftBound, Bound rightBound) { if (leftBound.GetVar() == rightBound.GetVar()) { - return (leftBound.GetConstant() < rightBound.GetConstant()) ? leftBound : rightBound; + return (leftBound.IsLessThan(rightBound, leftBound.GetPrimType())) ? leftBound : rightBound; } else { if (leftBound.GetVar() == nullptr && leftBound.IsEqualToMax(leftBound.GetPrimType()) && rightBound.GetConstant() < 1 && lengthSet.find(rightBound.GetVar()) != lengthSet.end()) { @@ -3406,6 +3379,20 @@ InRangeType ValueRangePropagation::InRange(const BB &bb, const ValueRange &range } } +bool ValueRangePropagation::CanNotCombineVRs(const Bound &resLower, const Bound &resUpper, PrimType primType) const { + // C: for (int j = 4; j < 5; j++) + // meir: j0=4; + // j1=phi(j0,j2) + // j2=j1+1 + // if: j2 < 5 + // When dealwith phi, compute vr of j0 first, the vr of j0 is [4,kOnlyHasLowerBound] and + // vr of j1 is [5,kOnlyHasLowerBound] + // when deal with the stmt if (j2 < 5), the vr of j2 is [5,4] in ture branch, if abandon the vr, can not compute the + // vr of j1, so keep the vr in tempCaches. + return (!onlyRecordValueRangeInTempCache.top() && resLower.IsConstantBound() && resUpper.IsConstantBound() && + resLower.IsGreaterThan(resUpper, primType)); +} + std::unique_ptr ValueRangePropagation::CombineTwoValueRange( const ValueRange &leftRange, const ValueRange &rightRange, bool merge) { if (merge) { @@ -3502,6 +3489,15 @@ bool ValueRangePropagation::BrStmtInRange(const BB &bb, const ValueRange &leftRa rightRange.GetRangeType() == kOnlyHasUpperBound) { return false; } + if (leftRange.IsInvalidVR() || rightRange.IsInvalidVR()) { + return false; + } + if (!leftLower.IsEqualAfterCVT(leftLower.GetPrimType(), opndType) || + !leftUpper.IsEqualAfterCVT(leftUpper.GetPrimType(), opndType) || + !rightLower.IsEqualAfterCVT(rightLower.GetPrimType(), opndType) || + !rightUpper.IsEqualAfterCVT(rightUpper.GetPrimType(), opndType)) { + return false; + } if (judgeNotInRange) { if (leftLower.GetVar() != nullptr) { return false; @@ -3608,12 +3604,16 @@ void ValueRangePropagation::CreateValueRangeForLeOrLt(const MeExpr &opnd, const std::unique_ptr newRightRange = std::make_unique( ValueRange::MinBound(newRightUpper.GetPrimType()), newRightUpper, kLowerAndUpper, isAccurate); auto resTrueBranchVR = CombineTwoValueRange(*leftRange, *newRightRange); - (void)Insert2Caches(trueBranch.GetBBId(), opnd.GetExprID(), CopyValueRange(*resTrueBranchVR), &opnd); + if (resTrueBranchVR != nullptr) { + (void)Insert2Caches(trueBranch.GetBBId(), opnd.GetExprID(), CopyValueRange(*resTrueBranchVR), &opnd); + } newRightRange = std::make_unique( newRightLower, ValueRange::MaxBound(newRightUpper.GetPrimType()), kLowerAndUpper, isAccurate); auto resFalseBranchVR = CombineTwoValueRange(*leftRange, *newRightRange); - (void)Insert2Caches(falseBranch.GetBBId(), opnd.GetExprID(), CopyValueRange(*resFalseBranchVR), &opnd); - if (leftRange->IsConstantLowerAndUpper()) { + if (resFalseBranchVR != nullptr) { + (void)Insert2Caches(falseBranch.GetBBId(), opnd.GetExprID(), CopyValueRange(*resFalseBranchVR), &opnd); + } + if (leftRange->IsConstantLowerAndUpper() && resTrueBranchVR != nullptr && resFalseBranchVR != nullptr) { CreateValueRangeForSubOpnd(opnd, trueBranch, falseBranch, *resTrueBranchVR, *resFalseBranchVR); } } @@ -4645,14 +4645,16 @@ bool ValueRangePropagation::AnalysisValueRangeInPredsOfCondGotoBB( updateSSAExceptTheScalarExpr = exprOnlyUsedByCondMeStmt; } else { auto *useListOfPredOpnd = useInfo->GetUseSitesOfExpr(predOpnd); - if (useListOfPredOpnd != nullptr && useListOfPredOpnd->size() == 1) { + if (predOpnd->GetMeOp() == kMeOpVar && + static_cast(predOpnd)->GetOst()->GetMIRSymbol()->GetAttr(ATTR_shortcc) && + useListOfPredOpnd != nullptr && useListOfPredOpnd->size() == 1) { if (useListOfPredOpnd->front().IsUseByPhi() && useListOfPredOpnd->front().GetPhi() == phi) { auto *useListOfPhi = useInfo->GetUseSitesOfExpr(phi->GetLHS()); if (useListOfPhi != nullptr && useListOfPhi->size() == 1 && useListOfPhi->front().IsUseByStmt() && !useListOfPhi->front().GetStmt()->GetBB()->GetAttributes(kBBAttrIsInLoop)) { auto *useStmt = useListOfPhi->front().GetStmt(); - if (condGoto.GetKind() == kBBCondGoto && condGoto.GetLastMe()->IsCondBr() && - condGoto.GetLastMe() == useStmt && predOpnd->IsScalar()) { + if (condGoto.GetKind() == kBBCondGoto && condGoto.GetLastMe() != nullptr && + condGoto.GetLastMe()->IsCondBr() && condGoto.GetLastMe() == useStmt && predOpnd->IsScalar()) { // PredOpnd is only used be the phi and condGoto stmt, if the pred edge can be opt, need not update ssa // of predOpnd and the def point of predOpnd can be deleted. updateSSAExceptTheScalarExpr = static_cast(predOpnd); @@ -5435,7 +5437,7 @@ void ValueRangePropagation::DealWithCondGoto(BB &bb, MeStmt &stmt) { if (!GetValueRangeOfCondGotoOpnd(bb, *opMeExpr, *opnd1, rightRange, rightRangePtr)) { return; } - if (rightRange == nullptr) { + if (rightRange == nullptr || rightRange->IsUniversalSet()) { if (!ConditionEdgeCanBeDeleted(bb, *opnd0, rightRange, opMeExpr->GetOpndType(), opMeExpr->GetOp())) { DealWithCondGotoWhenRightRangeIsNotExist(bb, *opMeExpr, brMeStmt.GetOp(), leftRange); } diff --git a/src/mapleall/maple_me/src/me_verify.cpp b/src/mapleall/maple_me/src/me_verify.cpp index ba732812b819071138d7d46df56e62b66eadf689..0254d134ff891a263faeb78751efe84e3e5cea21 100644 --- a/src/mapleall/maple_me/src/me_verify.cpp +++ b/src/mapleall/maple_me/src/me_verify.cpp @@ -60,7 +60,7 @@ void DealWithFuncType(const MIRType &type, std::string &str) { str += "_" + std::to_string(item.GetIdx()); } for (auto &item : funcType.GetParamAttrsList()) { - str += "_" + std::to_string(item.GetAttrFlag()) + std::to_string(item.GetAlignValue()); + str += "_" + item.GetAttrFlag().ToBitset().to_string() + std::to_string(item.GetAlignValue()); } } @@ -117,7 +117,7 @@ void GetAttrOfType(const MIRType &type, std::string &str) { void DealWithPoninterType(const MIRType &type, std::string &str) { auto ptrType = static_cast(type); str += "_" + std::to_string(ptrType.GetTypeAttrs().GetAlignValue()) + "_" + - std::to_string(ptrType.GetTypeAttrs().GetAttrFlag()); + ptrType.GetTypeAttrs().GetAttrFlag().ToBitset().to_string(); GetAttrOfType(*ptrType.GetPointedType(), str); } diff --git a/src/mapleall/maple_me/src/optimizeCFG.cpp b/src/mapleall/maple_me/src/optimizeCFG.cpp index c115a6aa2e77a1ec9c5baf645002a6115e7d8e5e..52c5f3bb8b555b73bd604666720709bd097f80fa 100644 --- a/src/mapleall/maple_me/src/optimizeCFG.cpp +++ b/src/mapleall/maple_me/src/optimizeCFG.cpp @@ -889,6 +889,9 @@ class OptimizeBB { bool CanFoldCondBranch(BB &predBB, BB &succBB, ContinuousCondBrInfo &brInfo) const; bool FoldCondBranchWithAdjacentIread(BB &predBB, BB &succBB, ContinuousCondBrInfo &brInfo, MeExpr &foldExpr1, MeExpr &foldExpr2) const; + MeExpr *IsZeroConstMeExpr(MeExpr &opnd0, const MeExpr &opnd1) const; + MeExpr *GetMergedOpnd(MeExpr &opnd0, MeExpr &opnd1) const; + bool CanCompareWithDiffPrimConstant(const MeExpr &opnd0, const MeExpr &opnd1) const; bool FoldCondBranchWithSuccAdjacentIread(); bool FoldCondBranchWithPredAdjacentIread(); // for OptimizeUncondBB @@ -1606,18 +1609,6 @@ bool OptimizeBB::CondBranchToSelect() { // we should create a new version resLHS = irmap->CreateRegOrVarMeExprVersion(ftLHS->GetOstIdx()); } - // It is profitable for instruction selection if select opnd is a compare expression - // select condExpr, trueExpr, falseExpr => select cmpExpr, trueExpr, falseExpr - if (condExpr->IsScalar() && condExpr->GetPrimType() != PTY_u1) { - auto *scalarExpr = static_cast(condExpr); - if (scalarExpr->GetDefBy() == kDefByStmt) { - MeStmt *defStmt = scalarExpr->GetDefStmt(); - MeExpr *rhs = defStmt->GetRHS(); - if (rhs != nullptr && kOpcodeInfo.IsCompare(rhs->GetOp())) { - condExpr = rhs; - } - } - } MeExpr *selExpr = irmap->CreateMeExprSelect(resLHS->GetPrimType(), *condExpr, *trueExpr, *falseExpr); MeExpr *simplifiedSel = irmap->SimplifyMeExpr(selExpr); AssignMeStmt *newAssStmt = irmap->CreateAssignMeStmt(*resLHS, *simplifiedSel, *currBB); @@ -1782,6 +1773,41 @@ bool OptimizeBB::CanFoldCondBranch(BB &predBB, BB &succBB, ContinuousCondBrInfo if (opMeExpr1->GetNumOpnds() != kOperandNumBinary) { return false; } + // Can not opt the pattern: if a == 0 || b == 0 then + // predBB + // if a == 0 + // | \ + // | \ + // succBB \ + // if a == 0 \ + // | \ | + // | \ | + // | \| + // falseBr trueBr + // Can opt the pattern: if a == 0 then b == 0 then + // predBB + // if a == 0 + // | \ + // | \ + // succBB \ + // if a == 0 \ + // | \ | + // | \ | + // | \| + // trueBr falseBr + if (currBB->GetLastMe() != nullptr && (IsZeroConstMeExpr(*opMeExpr1->GetOpnd(0), *opMeExpr2->GetOpnd(0)) || + IsZeroConstMeExpr(*opMeExpr1->GetOpnd(1), *opMeExpr2->GetOpnd(1)))) { + Opcode op = currBB->GetLastMe()->GetOpnd(0)->GetOp(); + if (op != OP_ne && op != OP_eq) { + return false; + } + if (op == OP_eq && (predBB.GetSucc(0) != &succBB)) { + return false; + } + if (op == OP_ne && predBB.GetSucc(1) != &succBB) { + return false; + } + } brInfo = ContinuousCondBrInfo(*stmt1, *stmt2, *opMeExpr1, *opMeExpr2); return true; } @@ -1807,6 +1833,30 @@ bool OptimizeBB::FoldCondBranchWithAdjacentIread(BB &predBB, BB &succBB, Continu return true; } +MeExpr *OptimizeBB::IsZeroConstMeExpr(MeExpr &opnd0, const MeExpr &opnd1) const { + if (!opnd0.IsIntZero() || !opnd1.IsIntZero()) { + return nullptr; + } + return &opnd0; +} + +MeExpr *OptimizeBB::GetMergedOpnd(MeExpr &opnd0, MeExpr &opnd1) const { + auto foldExpr1 = irmap->MergeAdjacentIread(opnd0, opnd1); + if (foldExpr1 == nullptr) { + foldExpr1 = IsZeroConstMeExpr(opnd0, opnd1); + } + return foldExpr1; +} + +bool OptimizeBB::CanCompareWithDiffPrimConstant(const MeExpr &opnd0, const MeExpr &opnd1) const { + if (opnd0.GetPrimType() == opnd1.GetPrimType()) { + return true; + } + // If compared with constant, the prim of constant is not equal, but the values of constant are equal + // under different prims, optimization can continue. + return opnd0.GetMeOp() == kMeOpConst || opnd1.GetMeOp() == kMeOpConst; +} + // fold 2 sequential condbranch if they are semantically logical and/or // cond1 cond1 // | \ |\ @@ -1821,9 +1871,15 @@ bool OptimizeBB::FoldCondBranchWithSuccAdjacentIread() { if (!CanFoldCondBranch(*currBB, *currBB->GetSucc(0), brInfo)) { return false; } - auto foldExpr1 = irmap->MergeAdjacentIread(*brInfo.opMeExpr1->GetOpnd(0), *brInfo.opMeExpr2->GetOpnd(0)); - auto foldExpr2 = irmap->MergeAdjacentIread(*brInfo.opMeExpr1->GetOpnd(1), *brInfo.opMeExpr2->GetOpnd(1)); - if (foldExpr1 == nullptr || foldExpr2 == nullptr || foldExpr1->GetPrimType() != foldExpr2->GetPrimType()) { + if (brInfo.opMeExpr1 == nullptr || brInfo.opMeExpr2 == nullptr) { + return false; + } + auto foldExpr1 = GetMergedOpnd(*brInfo.opMeExpr1->GetOpnd(0), *brInfo.opMeExpr2->GetOpnd(0)); + auto foldExpr2 = GetMergedOpnd(*brInfo.opMeExpr1->GetOpnd(1), *brInfo.opMeExpr2->GetOpnd(1)); + if (foldExpr1 == nullptr || foldExpr2 == nullptr) { + return false; + } + if (!CanCompareWithDiffPrimConstant(*foldExpr1, *foldExpr2)) { return false; } FoldCondBranchWithAdjacentIread(*currBB, *succBB, brInfo, *foldExpr1, *foldExpr2); @@ -1847,9 +1903,12 @@ bool OptimizeBB::FoldCondBranchWithPredAdjacentIread() { if (!CanFoldCondBranch(*predBB, *currBB, brInfo)) { return false; } - auto foldExpr1 = irmap->MergeAdjacentIread(*brInfo.opMeExpr1->GetOpnd(0), *brInfo.opMeExpr2->GetOpnd(0)); - auto foldExpr2 = irmap->MergeAdjacentIread(*brInfo.opMeExpr1->GetOpnd(1), *brInfo.opMeExpr2->GetOpnd(1)); - if (foldExpr1 == nullptr || foldExpr2 == nullptr || foldExpr1->GetPrimType() != foldExpr2->GetPrimType()) { + if (brInfo.opMeExpr1 == nullptr || brInfo.opMeExpr2 == nullptr) { + return false; + } + auto foldExpr1 = GetMergedOpnd(*brInfo.opMeExpr1->GetOpnd(0), *brInfo.opMeExpr2->GetOpnd(0)); + auto foldExpr2 = GetMergedOpnd(*brInfo.opMeExpr1->GetOpnd(1), *brInfo.opMeExpr2->GetOpnd(1)); + if (foldExpr1 == nullptr || foldExpr2 == nullptr || !CanCompareWithDiffPrimConstant(*foldExpr1, *foldExpr2)) { auto optBand1 = irmap->OptBandWithIread(*brInfo.opMeExpr1->GetOpnd(0), *brInfo.opMeExpr2->GetOpnd(0)); auto optBand2 = irmap->OptBandWithIread(*brInfo.opMeExpr1->GetOpnd(1), *brInfo.opMeExpr2->GetOpnd(1)); if (optBand1 == nullptr || optBand2 == nullptr || optBand1->GetPrimType() != optBand2->GetPrimType()) { diff --git a/src/mapleall/maple_me/src/pme_emit.cpp b/src/mapleall/maple_me/src/pme_emit.cpp index 895a7c7e366280d2d4ebe2279a7ac943dceab132..f5886e8efa79e0c1e1688f5b2b11c659eb50fbcf 100644 --- a/src/mapleall/maple_me/src/pme_emit.cpp +++ b/src/mapleall/maple_me/src/pme_emit.cpp @@ -502,6 +502,7 @@ StmtNode* PreMeEmitter::EmitPreMeStmt(MeStmt &meStmt, BaseNode *parent) { callnode->SetMeStmtID(callMeStmt->GetMeStmtId()); preMeStmtExtensionMap[callnode->GetStmtID()] = pmeExt; callnode->SetEnclosingBlock(static_cast(parent)); + callnode->CopyPragmas(callMeStmt->GetPragmas()); return callnode; } case OP_icall: @@ -897,7 +898,12 @@ uint32 PreMeEmitter::Raise2PreMeWhile(uint32 curJ, BlockNode *curBlk) { BlockNode *dobody = nullptr; StmtNode *loop = nullptr; ++curJ; - if (whileInfo->canConvertDoloop) { // emit doloop + auto *lastMe = curbb->GetLastMe(); + ASSERT_NOT_NULL(lastMe); + // Compare expr of doloop may be optimized into a const expr by Prop, resulting in validation of whileInfo. + // So we check condition expr here: only compare expr can be converted into a doloop. + bool isCondExprCmp = kOpcodeInfo.IsCompare(lastMe->GetOpnd(0)->GetOp()); + if (whileInfo->canConvertDoloop && isCondExprCmp) { // emit doloop auto *doloopNode = EmitPreMeDoloop(*curbb, *curBlk, *whileInfo); loop = doloopNode; dobody = doloopNode->GetDoBody(); diff --git a/src/mapleall/maple_me/src/ssa_epre.cpp b/src/mapleall/maple_me/src/ssa_epre.cpp index abbd6c57d42a841d9411e5e2c701d9cd0be48f2b..05c63bfa3a998002d0f35f93f02af1fb01495fa5 100644 --- a/src/mapleall/maple_me/src/ssa_epre.cpp +++ b/src/mapleall/maple_me/src/ssa_epre.cpp @@ -449,6 +449,12 @@ void SSAEPre::BuildWorkListExpr(MeStmt &meStmt, int32 seqStmt, MeExpr &meExpr, b MeExpr *base = ivarMeExpr->GetBase(); if (!base->IsLeaf()) { BuildWorkListExpr(meStmt, seqStmt, *ivarMeExpr->GetBase(), isRebuild, tempVar, false, insertSorted); + } else if (base->GetOp() == OP_intrinsicop && + (static_cast(base)->GetIntrinsic() == INTRN_C___tls_get_tbss_anchor || + static_cast(base)->GetIntrinsic() == INTRN_C___tls_get_tdata_anchor || + static_cast(base)->GetIntrinsic() == INTRN_C___tls_get_thread_pointer + )) { + BuildWorkListExpr(meStmt, seqStmt, *ivarMeExpr->GetBase(), isRebuild, tempVar, false, insertSorted); } else if (meExpr.GetPrimType() == PTY_agg) { break; } else if (ivarMeExpr->IsVolatile()) { diff --git a/src/mapleall/maple_me/src/type_based_alias_analysis.cpp b/src/mapleall/maple_me/src/type_based_alias_analysis.cpp index 2934089ec649c4e8fc90672f2ed65a886a58cbab..3ced9ecfb8fdffe05790062fed249b1372c9c9b0 100644 --- a/src/mapleall/maple_me/src/type_based_alias_analysis.cpp +++ b/src/mapleall/maple_me/src/type_based_alias_analysis.cpp @@ -829,6 +829,17 @@ bool TypeBasedAliasAnalysis::MayAliasTBAAForC(const OriginalSt *ostA, const Orig ostA->GetIndirectLev() == 0 && ostB->GetIndirectLev() == 0) { return MayMemoryOverlap(*ostA, *ostB, aggTypeA, aggTypeB); } + // deal with may alias type + auto memMayAlias = [](const OriginalSt &ost) { + if (ost.GetPointerTyIdx() == 0) { + return false; + } + auto *ptrType = ost.GetPrevLevelPointerType(); + return ptrType && ptrType->GetTypeAttrs().GetAttr(ATTR_may_alias); + }; + if (memMayAlias(*ostA) || memMayAlias(*ostB)) { + return true; + } // using an lvalue expression (typically, dereferencing a pointer) of character type is legal // which means an object derefereced from (char *) may alias with any other type auto dereferencedByteType = [](const OriginalSt &ost) { diff --git a/src/mapleall/maple_pgo/pgo_lib/CMakeLists.txt b/src/mapleall/maple_pgo/pgo_lib/CMakeLists.txt index 6d9502ec32b3446eba975a7da4dc8f9ca9d7fe2c..4cde48b485b3ff7b740dc37f596fc274283100e7 100644 --- a/src/mapleall/maple_pgo/pgo_lib/CMakeLists.txt +++ b/src/mapleall/maple_pgo/pgo_lib/CMakeLists.txt @@ -6,12 +6,17 @@ set(CMAKE_C_STANDARD 99) set(MAPLE_ROOT $ENV{MAPLE_ROOT}) set(SYS_NAME $ENV{BISHENGC_GET_OS_VERSION}) set(GCC_LINARO_PATH ${MAPLE_ROOT}/tools/gcc-linaro-7.5.0) -set(CMAKE_C_COMPILER ${GCC_LINARO_PATH}/bin/aarch64-linux-gnu-gcc) - -add_compile_options(-fpic -O2) +set(ENV_PGO $ENV{TEST_ENV}) +add_compile_options(-fpic -O2 -fstack-protector-strong -D_FORTIFY_SOURCE=2) if (SYS_NAME STREQUAL "SUSE") - set(CMAKE_C_COMPILER aarch64-hpe-gcc) + if (EXISTS /opt/buildtools/bisheng_embedded_cpu-301.0.0/hcc_arm64le/bin/aarch64-target-linux-gnu-gcc) + if (ENV_PGO STREQUAL "TEST") + set(CMAKE_C_COMPILER /opt/buildtools/bisheng_embedded_cpu-301.0.0/hcc_arm64le/bin/aarch64-target-linux-gnu-gcc) + endif() + else () + set(CMAKE_C_COMPILER aarch64-hpe-gcc) +endif() elseif (SYS_NAME STREQUAL "Ubuntu") set(CMAKE_C_COMPILER ${GCC_LINARO_PATH}/bin/aarch64-linux-gnu-gcc) else () @@ -25,6 +30,8 @@ SET_TARGET_PROPERTIES(mplpgo_static PROPERTIES OUTPUT_NAME mplpgo) SET_TARGET_PROPERTIES(mplpgo_static PROPERTIES CLEAN_DIRECT_OUTPUT 1) SET_TARGET_PROPERTIES(mplpgo PROPERTIES CLEAN_DIRECT_OUTPUT 1) +SET_TARGET_PROPERTIES(mplpgo_static PROPERTIES LINK_OPTIONS "-Wl,-s,-z,relro,-z,now") +SET_TARGET_PROPERTIES(mplpgo PROPERTIES LINK_OPTIONS "-Wl,-s,-z,relro,-z,now") # set output directory -SET(LIBRARY_OUTPUT_PATH ${MAPLE_ROOT}/libpgo/lib_${SYS_NAME}) +SET(LIBRARY_OUTPUT_PATH ${MAPLE_ROOT}/libpgo/lib_${SYS_NAME}) \ No newline at end of file diff --git a/src/mapleall/maple_pgo/pgo_lib/mplpgo.c b/src/mapleall/maple_pgo/pgo_lib/mplpgo.c index 4ff0cca59e5648eaa1ed9c019c67f60162317532..ae937aca9058112f06849c8fee6a1713b83383bf 100644 --- a/src/mapleall/maple_pgo/pgo_lib/mplpgo.c +++ b/src/mapleall/maple_pgo/pgo_lib/mplpgo.c @@ -2,9 +2,9 @@ #include struct Mpl_Lite_Pgo_ProfileInfoRoot __mpl_pgo_info_root __attribute__ ((__visibility__ ("hidden"))) = {0, 0, 0}; -extern uint32_t __mpl_pgo_sleep_time; -extern char __mpl_pgo_wait_forks; -extern char *__mpl_pgo_dump_filename; +__attribute__((weak)) uint32_t __mpl_pgo_sleep_time = 0; +__attribute__((weak)) char __mpl_pgo_wait_forks = 0; +__attribute__((weak)) char *__mpl_pgo_dump_filename = "./"; pthread_rwlock_t rwlock; static inline int CheckAllZero(const struct Mpl_Lite_Pgo_FuncInfo *funcPtr) { @@ -205,4 +205,4 @@ void __mpl_pgo_flush_counter() { FlushCounters(__mpl_pgo_info_root.ofileInfoList); pthread_rwlock_destroy(&rwlock); asm volatile ( RESTORE_ALL :::); -} \ No newline at end of file +} diff --git a/src/mapleall/maple_util/include/bit_value.h b/src/mapleall/maple_util/include/bit_value.h index 50ee8d01e6cccd4ae5763e9dc097b1e5b755ea10..9dce63bf5ffa547a32339aed18c5a964c56240c8 100644 --- a/src/mapleall/maple_util/include/bit_value.h +++ b/src/mapleall/maple_util/include/bit_value.h @@ -73,7 +73,6 @@ class BitValue { BitValue operator|(const BitValue &rhs) const; BitValue operator^(const BitValue &rhs) const; - public: IntVal zeroBits; IntVal oneBits; }; diff --git a/src/mapleall/maple_util/include/cl_option.h b/src/mapleall/maple_util/include/cl_option.h index 448e44c0dfc866af1305a4117797e92f7711cc8d..f0461421bc59c9470d299031c292b8bc91a5a6c6 100644 --- a/src/mapleall/maple_util/include/cl_option.h +++ b/src/mapleall/maple_util/include/cl_option.h @@ -84,6 +84,22 @@ constexpr ValueJoinedType kSeparatedValue = ValueJoinedType::kValueSeparated; constexpr OptionVisibilityType kVisible = OptionVisibilityType::kVisibleOption; constexpr OptionVisibilityType kHide = OptionVisibilityType::kHidedOption; +enum OptType : std::uint32_t { + KOptNone = 1U << 1, + KOptDriver = 1U << 2, // Driver option. + KOptCommon = 1U << 3, // Language-independent. + KOptFront = 1U << 4, // Front Option. + KOptOptimization = 1U << 5, // Enables an (optional) optimization. + KOptLd = 1U << 6, // Ld Option. + KOptAs = 1U << 7, // As Option. + KOptHir2mpl = 1U << 8, // Hir2mpl Option. + KOptMe = 1U << 9, // Me Option. + KOptMpl2mpl = 1U << 10, // Mpl2mpl Option. + KOptMplcg = 1U << 11, // Mplcg Option. + KOptMaple = 1U << 12, // Maple Option. + KOptNotFiltering = 1U << 13, // Front Option NeedN't Filtering. +}; + /* Initializer is used to set default value for an option */ template struct Init { const T &defaultVal; @@ -146,6 +162,10 @@ class OptionInterface { return valueExpected; } + void SetExpectedVal(ValueExpectedType value) { + valueExpected = value; + } + bool IsJoinedValPermitted() const { return (valueJoined == ValueJoinedType::kValueJoined); } @@ -181,6 +201,13 @@ class OptionInterface { equalSign = equal; } + bool HasMultipleName() const { + return names.size() > 1; + } + const std::uint32_t GetOptType() const { + return optType; + } + std::string rawKey; std::vector optCategories; // The option is registred in these categories @@ -194,6 +221,7 @@ class OptionInterface { ValueExpectedType valueExpected = ValueExpectedType::kValueRequired; // whether the value is expected ValueJoinedType valueJoined = ValueJoinedType::kValueSeparated; // Joined option like -DMACRO OptionVisibilityType visibleOption = OptionVisibilityType::kVisibleOption; // Visible in Help + std::uint32_t optType = OptType::KOptNone; EqualType equalSign = EqualType::kWithoutEqual; }; @@ -356,6 +384,10 @@ class Option : public OptionInterface { SetDisablingAttribute(arg); } else if constexpr (std::is_same_v) { SetDisablingAttribute(arg); + } else if constexpr (std::is_same_v) { + SetOptType(arg); + } else if constexpr (std::is_same_v) { + SetOptType(arg); } else { SetDefaultAttribute(arg); } @@ -395,6 +427,14 @@ class Option : public OptionInterface { } } + void SetOptType(const std::uint32_t optionType) { + optType = optionType; + } + + void SetOptType(const OptType optionType) { + optType = optionType; + } + T value; }; diff --git a/src/mapleall/maple_util/include/cl_parser.h b/src/mapleall/maple_util/include/cl_parser.h index bbd98242e87aece1f0e8abf00ba5783e5641d434..a87fb85aff15da962c01ef4d1886a1cc4d16ae00 100644 --- a/src/mapleall/maple_util/include/cl_parser.h +++ b/src/mapleall/maple_util/include/cl_parser.h @@ -73,6 +73,7 @@ struct OptionCategory { } void ClearJoinedOpt(); + void ClearOpt(); const std::vector &GetEnabledOptions() { return enabledOptions; } @@ -85,6 +86,10 @@ struct OptionCategory { } } + std::vector GetEnabledOption() const { + return enabledOptions; + } + private: std::unordered_set enabledOptionsSet; std::vector enabledOptions; @@ -148,11 +153,15 @@ class CommandLine { void SetHasPgoLib(bool flag) { hasPgoLib = flag; } + OptionInterface *CheckJoinedOptions(KeyArg &keyArg, OptionCategory &optCategory) const { + return CheckJoinedOption(keyArg, optCategory); + } void CloseOptimize(const OptionCategory &optCategory) const; void DeleteEnabledOptions(size_t &argsIndex, const std::deque &args, const OptionCategory &optCategory) const; std::vector> badCLArgs; + std::vector unsupportOptions; OptionCategory defaultCategory; /* NOTE: categories must be constructed before options. @@ -179,7 +188,7 @@ class CommandLine { private: bool useLitePgoGen = false; bool hasPgoLib = false; - OptionInterface *CheckJoinedOption(KeyArg &keyArg, OptionCategory &optCategory); + OptionInterface *CheckJoinedOption(KeyArg &keyArg, OptionCategory &optCategory) const; RetCode ParseJoinedOption(size_t &argsIndex, const std::deque &args, KeyArg &keyArg, OptionCategory &optCategory); @@ -195,6 +204,7 @@ class CommandLine { const std::deque &args, KeyArg &keyArg, OptionCategory &optCategory, const OptionsMapType &optMap); + void AddLinkOption(const OptionInterface &opt, const KeyArg &keyArg); }; } diff --git a/src/mapleall/maple_util/include/dominance.h b/src/mapleall/maple_util/include/dominance.h index 058680c1615211122b7d949a75c5fb6c9ad8db3e..b073c1334150e126b6049bfec94c8e6e7cb6bce3 100644 --- a/src/mapleall/maple_util/include/dominance.h +++ b/src/mapleall/maple_util/include/dominance.h @@ -348,20 +348,34 @@ class Dominance { return false; } - void PostOrderWalk(const BaseGraphNode &node, size_t &pid, std::vector &visitedMap) { - auto nodeId = node.GetID(); - ASSERT(nodeId < visitedMap.size(), "index out of range"); - if (nodeVec[nodeId] == nullptr || visitedMap[nodeId]) { - return; - } - visitedMap[nodeId] = true; - std::vector succNodes; - GetNextNodesToVisit(node, succNodes); - for (const auto &suc : succNodes) { - PostOrderWalk(*suc, pid, visitedMap); + void PostOrderWalk(const BaseGraphNode &root, size_t &pid, std::vector &visitedMap) { + std::stack s; + s.push(&root); + visitedMap[root.GetID()] = true; + while (!s.empty()) { + auto node = s.top(); + auto nodeId = node->GetID(); + if (nodeVec[nodeId] == nullptr) { + s.pop(); + continue; + } + ASSERT(nodeId < visitedMap.size() && nodeId < postOrderIDVec.size(), "index out of range"); + bool tail = true; + std::vector succNodes; + GetNextNodesToVisit(*node, succNodes); + for (auto succ : succNodes) { + if (!visitedMap[succ->GetID()]) { + tail = false; + visitedMap[succ->GetID()] = true; + s.push(succ); + break; + } + } + if (tail) { + s.pop(); + postOrderIDVec[nodeId] = static_cast(pid++); + } } - ASSERT(nodeId < postOrderIDVec.size(), "index out of range"); - postOrderIDVec[nodeId] = static_cast(pid++); } void ComputeDtPreorder(const BaseGraphNode &node, size_t &num) { diff --git a/src/mapleall/maple_util/include/error_code.h b/src/mapleall/maple_util/include/error_code.h index 97b1cf6a9037ef6db55426546e6daf4127d58d5d..dd6c6d9bdc5f57ef0dadcb9ad405ebf81a05e8fb 100644 --- a/src/mapleall/maple_util/include/error_code.h +++ b/src/mapleall/maple_util/include/error_code.h @@ -27,7 +27,10 @@ enum ErrorCode { kErrorCompileFail, kErrorNotImplement, kErrorUnKnownFileType, - kErrorCreateFile + kErrorCreateFile, + kErrorNeedLtoOption, + kErrorNoOptionFile, + kErrorLtoInvalidParameter }; void PrintErrorMessage(int ret); diff --git a/src/mapleall/maple_util/include/file_utils.h b/src/mapleall/maple_util/include/file_utils.h index a6e06ab8f983445432c6dbe264d0cf53e2d9db7c..5bd670cbe0d929edfd6baa5755996143158ee5ea 100644 --- a/src/mapleall/maple_util/include/file_utils.h +++ b/src/mapleall/maple_util/include/file_utils.h @@ -21,29 +21,23 @@ #include "string_utils.h" namespace maple { - enum class InputFileType { +enum class InputFileType { kFileTypeNone, - kFileTypeClass, - kFileTypeJar, - kFileTypeAst, - kFileTypeCpp, - kFileTypeC, - kFileTypeDex, - kFileTypeMpl, - kFileTypeVtableImplMpl, - kFileTypeS, - kFileTypeObj, - kFileTypeBpl, - kFileTypeMeMpl, - kFileTypeMbc, - kFileTypeLmbc, - kFileTypeH, - kFileTypeI, - kFileTypeOast, +#define TYPE(ID, SUPPORT, ...) kFileType##ID, +#include "type.def" +#undef TYPE +}; + +struct TypeInfo { + InputFileType fileType; + bool support; + const std::unordered_set tmpSuffix; }; extern const std::string kFileSeperatorStr; extern const char kFileSeperatorChar; +extern const std::string kWhitespaceStr; +extern const char kWhitespaceChar; // Use char[] since getenv receives char* as parameter constexpr char kMapleRoot[] = "MAPLE_ROOT"; constexpr char kClangPath[] = "BiShengC_Clang_Path"; @@ -67,7 +61,7 @@ class FileUtils { static std::string SafeGetenv(const char *envVar); static std::string SafeGetPath(const char *envVar, const char *name); static void CheckGCCVersion(const char *cmd); - static std::string GetRealPath(const std::string &filePath); + static std::string GetRealPath(const std::string &filePath, const bool isCheck = true); static std::string GetFileName(const std::string &filePath, bool isWithExtension); static std::string GetFileExtension(const std::string &filePath); static std::string GetFileFolder(const std::string &filePath); @@ -79,10 +73,35 @@ class FileUtils { static InputFileType GetFileType(const std::string &filePath); static InputFileType GetFileTypeByMagicNumber(const std::string &pathName); static std::string ExecuteShell(const char *cmd); + static std::string ExecuteShell(const char *cmd, std::string workspace); + static void GetFileNames(const std::string path, std::vector &filenames); static bool GetAstFromLib(const std::string libPath, std::vector &astInputs); static bool CreateFile(const std::string &file); static std::string GetGccBin(); static bool Rmdirs(const std::string &dirPath); + static std::string GetOutPutDirInTmp(const std::string &inputFile); + static void Mkdirs(const std::string &path, mode_t mode); + static bool IsStaticLibOrDynamicLib(const std::string &pathName); + static InputFileType GetFileTypeByExtension(const std::string &extensionName); + static bool IsSupportFileType(InputFileType type); + static void RemoveFile(const std::string &pathName) { + auto path = GetRealPath(pathName); + CHECK_FATAL(std::remove(path.c_str()) == 0, "remove file failed, filename: %s.", path.c_str()); + }; + static std::string GetCurDirPath(); + static std::string GetClangAstOptString(const std::string astFilePath); + static size_t GetIntegerFromMem(std::ifstream &fs, char *buffer, std::streamsize bufferSize, + bool isNeedChkOptStrId); + static void GetOptString(std::ifstream &fs, std::string &optString); + + static std::string GetFileNameHashStr(const std::string &str) { + uint32 hash = 0; + uint32 seed = 211; + for (auto name : str) { + hash = hash * seed + static_cast(name); + } + return std::to_string(hash); + } const std::string &GetTmpFolder() const { return tmpFolderPath; @@ -101,6 +120,32 @@ class FileUtils { } static const uint32 kMagicAST = 0x48435043; static const uint32 kMagicELF = 0x464c457f; + static const uint32 kMagicStaicLib = 0x72613c21; +}; + +class FileReader { + public: + explicit FileReader(const std::string &s) { + mName = s; + mDefFile.open(s.c_str(), std::ifstream::in); + if (!mDefFile.good()) { + ERR(kLncErr, "unable to read from file %s\n", s.c_str()); + } + } + ~FileReader() noexcept { + mDefFile.close(); + } + bool EndOfFile() const { + return mDefFile.eof(); + } + + std::string GetLine(const std::string keyWord); + bool ReadLine(); // the single entry to directly read from file + private: + std::string mName; + std::ifstream mDefFile; + std::string mCurLine = ""; + unsigned mLineNo = 0; }; } // namespace maple #endif // MAPLE_DRIVER_INCLUDE_FILE_UTILS_H diff --git a/src/mapleall/maple_util/include/mem_reference_table.h b/src/mapleall/maple_util/include/mem_reference_table.h index 22f02cb81fb6babdf99e66c3234d50a16d7ae6a9..e555454c70542bbd5ee7c08be428f684b7924dd2 100644 --- a/src/mapleall/maple_util/include/mem_reference_table.h +++ b/src/mapleall/maple_util/include/mem_reference_table.h @@ -30,17 +30,36 @@ class MemDefUse { useSet(allocator.Adapter()) {} ~MemDefUse(); + const MemDefUseSet &GetDefSet() const { + return defSet; + } + MemDefUseSet &GetDefSet() { return defSet; } + const MemDefUseSet &GetUseSet() const { + return useSet; + } + MemDefUseSet &GetUseSet() { return useSet; } + void SetIndependent() { + isIndependent = true; + } + + const bool IsIndependent() const { + return isIndependent; + } + private: MemDefUseSet defSet; MemDefUseSet useSet; + // The field is set TRUE to indicate that the callee-save and callee-reload instructions do not + // conflict with any other memory access instructions. + bool isIndependent = false; }; using MemDefUsePart = MapleUnorderedMap; diff --git a/src/mapleall/maple_util/include/mpl_logging.h b/src/mapleall/maple_util/include/mpl_logging.h index 1ac7ba03edade7dd853b3427757e7502d9976aed..68aaf4d54517652840b1a42c1eeee7eb64c60195 100644 --- a/src/mapleall/maple_util/include/mpl_logging.h +++ b/src/mapleall/maple_util/include/mpl_logging.h @@ -121,6 +121,8 @@ // developer to print stack trace and peruse the program environment at the point // of the assertion. namespace maple { +std::string GetNthStr(size_t index); + extern class LogInfo logInfo; extern class LogInfo &log; diff --git a/src/mapleall/maple_util/include/orig_symbol.h b/src/mapleall/maple_util/include/orig_symbol.h index 6dc582c7a05e775d262c571cb5c2996d201adcfc..e4c48711a22d15303cddec72cd709c26fd88f3f5 100644 --- a/src/mapleall/maple_util/include/orig_symbol.h +++ b/src/mapleall/maple_util/include/orig_symbol.h @@ -18,7 +18,7 @@ #include "mir_symbol.h" #include "mir_preg.h" #include "mpl_number.h" -#include "class_hierarchy.h" +#include "mir_function.h" // This file defines the data structure OriginalSt that represents a program // symbol occurring in the code of the program being optimized. diff --git a/src/mapleall/maple_util/include/simple_bit_set.h b/src/mapleall/maple_util/include/simple_bit_set.h new file mode 100644 index 0000000000000000000000000000000000000000..9475ba91b64d953b3dc769a094922dae3ec02098 --- /dev/null +++ b/src/mapleall/maple_util/include/simple_bit_set.h @@ -0,0 +1,372 @@ +/* + * Copyright (c) [2023] Huawei Technologies Co.,Ltd.All rights reserved. + * + * OpenArkCompiler is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * + * http://license.coscl.org.cn/MulanPSL2 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ + +#ifndef SIMPLE_BIT_SET_H +#define SIMPLE_BIT_SET_H + +#include +#include +#include +#include +#include "mpl_logging.h" + +namespace maple { +#ifndef likely +#define likely(x) __builtin_expect(!!(x), 1) +#endif +#ifndef unlikely +#define unlikely(x) __builtin_expect(!!(x), 0) +#endif + +#define ALIGN(number, alignSize) \ + (((number) + (alignSize) - 1) & ~((alignSize) - 1)) + +constexpr size_t kSimpleBitSetAligned = 64; // 64 bit(8 Byte) alignment + +template = true> +class SimpleBitSet { + using WordT = uint64_t; // bit size should be same as kSimpleBitSetAligned + static constexpr size_t kSimpleBitSetSize = ((NB - 1) / kSimpleBitSetAligned) + 1; + static constexpr uint64_t kAllOnes = 0xFFFFFFFFFFFFFFFF; + + public: + SimpleBitSet() = default; + + virtual ~SimpleBitSet() = default; + + SimpleBitSet(const SimpleBitSet &) = default; + + SimpleBitSet &operator=(const SimpleBitSet &) = default; + + // no need explicit + template , bool> = true> + SimpleBitSet(const T &input) { + memcpy_s(bitSet, sizeof(bitSet), &input, sizeof(T)); + } + + template , bool> = true> + SimpleBitSet &operator=(const T &input) { + memcpy_s(bitSet, sizeof(bitSet), &input, sizeof(T)); + return *this; + } + + template , bool> = true> + bool operator==(const T &input) const { + if (*this == SimpleBitSet(input)) { + return true; + } + return false; + } + + template , bool> = true> + bool operator!=(const T &input) const { + if (*this == SimpleBitSet(input)) { + return false; + } + return true; + } + + bool operator==(const SimpleBitSet &input) const { + if (input.GetWordSize() == kSimpleBitSetSize) { + for (size_t i = 0; i < kSimpleBitSetSize; ++i) { + if (bitSet[i] != input.GetWord(i)) { + return false; + } + } + return true; + } + return false; + } + + bool operator!=(const SimpleBitSet &input) const { + if (*this == input) { + return false; + } + return true; + } + + bool operator<(const SimpleBitSet &input) const { + if (input.GetWordSize() == kSimpleBitSetSize) { + for (int i = (kSimpleBitSetSize - 1); i >= 0 ; --i) { + if (bitSet[i] > input.GetWord(i)) { + return false; + } else if (bitSet[i] < input.GetWord(i)) { + return true; + } + } + return false; + } + CHECK_FATAL_FALSE("size should be same"); + } + +#define CALC_INDEX_AND_BIT(pos, index, bit) \ + size_t (index) = (pos) / kSimpleBitSetAligned; \ + size_t (bit) = (pos) % kSimpleBitSetAligned + + template , bool> = true> + SimpleBitSet &operator<<(const T &input) { + for (size_t i = 0; i < kSimpleBitSetSize; ++i) { + bitSet[i] <<= input; + } + return *this; + } + + template , bool> = true> + SimpleBitSet &operator>>(const T &input) { + for (size_t i = 0; i < kSimpleBitSetSize; ++i) { + bitSet[i] >>= input; + } + return *this; + } + + template , bool> = true> + SimpleBitSet &operator&=(const T &input) { + CheckAndSet( + input, [](WordT &dst, T src) { dst &= src; }, + [this](WordT &dst, T &src, size_t bit) { dst &= BitMask(src, bit); }); + return *this; + } + + template , bool> = true> + SimpleBitSet operator&(const T &input) const { + SimpleBitSet ret(*this); + ret &= input; + return ret; + } + + template , bool> = true> + SimpleBitSet &operator|=(const T &input) { + CheckAndSet( + input, [](WordT &dst, T src) { dst |= src; }, + [this](WordT &dst, T &src, size_t bit) { dst |= BitMask(src, bit); }); + return *this; + } + + template , bool> = true> + SimpleBitSet operator|(const T &input) { + SimpleBitSet ret(*this); + ret |= input; + return ret; + } + + template , bool> = true> + SimpleBitSet &operator^=(const T &input) { + CheckAndSet( + input, [](WordT &dst, T src) { dst ^= src; }, + [this](WordT &dst, T &src, size_t bit) { dst ^= BitMask(src, bit); }); + return *this; + } + + template , bool> = true> + SimpleBitSet operator^(const T &input) { + SimpleBitSet ret(*this); + ret ^= input; + return ret; + } + + // flip all bits + SimpleBitSet &operator~() { + for (size_t i = 0; i < kSimpleBitSetSize; ++i) { + bitSet[i] = ~bitSet[i]; + } + return *this; + } + + SimpleBitSet &operator&=(const SimpleBitSet &input) { + Set( + input, [](WordT &dst, WordT src) { dst &= src; }, + // fast path set high bits to 0 + [](WordT *startPos, size_t leftSize) { + memset_s(startPos, leftSize * sizeof(WordT), 0, leftSize * sizeof(WordT)); }); + return *this; + } + + SimpleBitSet operator&(const SimpleBitSet &input) const { + SimpleBitSet ret(*this); + ret &= input; + return ret; + } + + SimpleBitSet &operator|=(const SimpleBitSet &input) { + Set( + input, [](WordT &dst, WordT src) { dst |= src; }, [](WordT *startPos, size_t leftSize) { /* do nothing */ }); + return *this; + } + + SimpleBitSet operator|(const SimpleBitSet &input) const { + SimpleBitSet ret(*this); + ret |= input; + return ret; + } + + SimpleBitSet &operator^=(const SimpleBitSet &input) { + Set( + input, [](WordT &dst, WordT src) { dst ^= src; }, + [](WordT *startPos, size_t leftSize) { + for (size_t i = 0; i < leftSize; ++i) { + startPos[0] ^= 0ULL; + } + }); + return *this; + } + + SimpleBitSet operator^(const SimpleBitSet &input) const { + SimpleBitSet ret(*this); + ret &= input; + return ret; + } + +#define POS_CHECK(pos, index, bit, fail) \ + CALC_INDEX_AND_BIT(pos, index, bit); \ + if (unlikely((index >= kSimpleBitSetSize))) { \ + return fail; \ + } \ + (void)0 // avoid warning + + /** + * reset pos bit to 0 + * @param pos + * @return true if reset success, false if overflow + */ + bool Reset(size_t pos) { + POS_CHECK(pos, index, bit, false); + bitSet[index] &= ~(1ULL << bit); + return true; + } + + /** + * reset all bits to 0 + * @return + */ + void Reset() { + memset_s(bitSet, sizeof(WordT) * kSimpleBitSetSize, 0, sizeof(WordT) * kSimpleBitSetSize); + } + + /** + * set pos bit to 1 + * @param pos + * @return true if reset success, false if overflow + */ + bool Set(size_t pos) { + POS_CHECK(pos, index, bit, false); + bitSet[index] |= 1ULL << bit; + return true; + } + + /** + * check pos is 1 + * @param pos + * @return 1 if pos is 1, 0 false if pos is 0, -1 if overflow + */ + int operator[](size_t pos) const { + POS_CHECK(pos, index, bit, -1); + return static_cast((bitSet[index] & (1ULL << bit)) != 0); + } + +#undef POS_CHECK + + WordT GetWord(size_t index) const { + if (unlikely(index >= kSimpleBitSetSize)) { + CHECK_FATAL_FALSE("index out of range"); + } + return bitSet[index]; + } + + template , bool> = true> + void SetWord(size_t index, const T &input) { + if (unlikely(index >= kSimpleBitSetSize)) { + CHECK_FATAL_FALSE("index out of range"); + } + bitSet[index] = input; +} + + size_t GetWordSize() const { + return kSimpleBitSetSize; + } + + inline std::bitset ToBitset() const { + std::bitset bs; + std::bitset tmp; + for (size_t i = 0; i < kSimpleBitSetSize; ++i) { + tmp = this->GetWord(i); + tmp <<= (i * kSimpleBitSetAligned); + bs |= tmp; + } + return bs; + } + + inline size_t GetHashOfbitset() const { + std::hash> hashFn; + return hashFn(this->ToBitset()); + } + + private: + template + T &BitMask(T &input, size_t bit) { // retrive input's $bit bits + if (bit != 0) { + input &= (~(kAllOnes << bit)); + } + return input; + } + + // @param2 is used to avoid shift count >= width of type [-Werror,-Wshift-count-overflow] + template = true> // 8 bits + inline void CheckAndSet(const T &input, std::function set, + std::function lastSet) { + size_t inputBitSize = sizeof(input) * 8; // 8 bits + CALC_INDEX_AND_BIT(inputBitSize, index, bit); + if (unlikely(index >= kSimpleBitSetSize)) { + index = kSimpleBitSetSize - 1; + bit = 0; + } + T tmp = input; + if (sizeof(T) == sizeof(WordT)) { + set(bitSet[0], tmp); + } else { + for (size_t i = 0; i < index; ++i) { + set(bitSet[i], tmp); + tmp >>= kSimpleBitSetAligned; + } + lastSet(bitSet[index], tmp, bit); + } + } + + /** + * + * @param input + * @param normalSet handle (input size <= this size) part + * @param overflowSet handle (this size - input size) part + */ + inline void Set(const SimpleBitSet &input, std::function normalSet, + std::function overflowSet) { + if (input.GetWordSize() <= kSimpleBitSetSize) { + size_t i = 0; + for (; i < input.GetWordSize(); ++i) { + normalSet(bitSet[i], input.GetWord(i)); + } + overflowSet(&bitSet[i], (kSimpleBitSetSize - i)); + } else if (input.GetWordSize() > kSimpleBitSetSize) { + // ignore overflow part + for (size_t i = 0; i < kSimpleBitSetSize; ++i) { + normalSet(bitSet[i], input.GetWord(i)); + } + } + } + +#undef CALC_INDEX_AND_BIT + WordT bitSet[kSimpleBitSetSize]{}; +}; +} // namespace maple +#endif // SIMPLE_BIT_SET_H \ No newline at end of file diff --git a/src/mapleall/maple_util/include/string_utils.h b/src/mapleall/maple_util/include/string_utils.h index 4cfc8887e9c44c4164c043ce246b0493315ad3e5..3840d064d03d68a95aeaf7fde18401e206603a31 100644 --- a/src/mapleall/maple_util/include/string_utils.h +++ b/src/mapleall/maple_util/include/string_utils.h @@ -65,12 +65,10 @@ class StringUtils { static std::string TrimWhitespace(const std::string &src); static std::string Replace(const std::string &src, const std::string &target, const std::string &replacement); static std::string Append(const std::string &src, const std::string &target, const std::string &spliter); - static std::string GetStrAfterLast(const std::string &src, const std::string &target, - bool isReturnEmpty = false); - static std::string GetStrBeforeLast(const std::string &src, const std::string &target, - bool isReturnEmpty = false); - static std::string GetStrBeforeFirst(const std::string &src, const std::string &target, - bool isReturnEmpty = false); + static std::string GetStrAfterLast(const std::string &src, const std::string &target, bool isReturnEmpty = false); + static std::string GetStrBeforeLast(const std::string &src, const std::string &target, bool isReturnEmpty = false); + static std::string GetStrBeforeFirst(const std::string &src, const std::string &target, bool isReturnEmpty = false); + static std::string GetStrAfterFirst(const std::string &src, const std::string &target, bool isReturnEmpty = false); static bool HasCommandInjectionChar(const std::string &s) { return std::regex_search(s, kCommandInjectionRegex); } @@ -91,6 +89,10 @@ class StringUtils { return std::equal(start.cbegin(), start.cend(), str.cbegin()); } + static bool IsMatchAtEnd(const std::string &str, const std::string &pattern) { + std::regex regex(pattern); + return std::regex_search(str, regex); + } private: static std::regex kCommandInjectionRegex; }; diff --git a/src/mapleall/maple_util/include/type.def b/src/mapleall/maple_util/include/type.def new file mode 100644 index 0000000000000000000000000000000000000000..aa1cbc7e16685c3bbf39b44d7664e9bdbb803b46 --- /dev/null +++ b/src/mapleall/maple_util/include/type.def @@ -0,0 +1,52 @@ +/* + * Copyright (c) [2023] Huawei Technologies Co.,Ltd.All rights reserved. + * + * OpenArkCompiler is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * + * http://license.coscl.org.cn/MulanPSL2 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ + +TYPE(C, true, "c" ) +TYPE(Mpl, true, "mpl" ) +TYPE(S, true, "s", "S" ) +TYPE(I, true, "i" ) +TYPE(H, true, "h" ) + +TYPE(Class, true, "class" ) +TYPE(Dex, true, "dex" ) +TYPE(Ast, true, "ast" ) +TYPE(Jar, true, "jar" ) +TYPE(Bpl, true, "bpl" ) +TYPE(MeMpl, true, "me.mpl" ) +TYPE(VtableImplMpl, true, "VtableImpl.mpl") +TYPE(Obj, true, "o" ) +TYPE(Mbc, true, "mbc" ) +TYPE(Lmbc, true, "lmbc" ) +TYPE(Oast, true, "oast" ) +TYPE(Lib, true, "a","so" ) + +TYPE(II, false, "ii" ) +TYPE(Obj_C, false, "m" ) +TYPE(Obj_C_I, false, "mi" ) +TYPE(Obj_Cpp, false, "mm", "M" ) +TYPE(Obj_Cpp_I, false, "mii" ) +TYPE(Cpp, false, "cpp", "cc", "cp", "cxx", "cpp", "CPP", "c++", "C" ) +TYPE(CppHeader, false, "hpp", "hh", "H", "hp", "hxx", "hpp", "HPP", "h++", "tcc" ) +TYPE(Fortran, false, "f", "for", "ftn" ) +TYPE(PR_Fortran, false, "F", "FOR", "fpp", "FPP", "FTN") +TYPE(Free_Fortran, false, "f90", "f95", "f03", "f08" ) +TYPE(PR_Free_Fortran, false, "F90", "F95", "F03", "F08" ) +TYPE(GO, false, "go" ) +TYPE(D, false, "d" ) +TYPE(DI, false, "di" ) +TYPE(DD, false, "dd" ) +TYPE(ADS, false, "ads" ) +TYPE(ADB, false, "adb" ) +TYPE(PR_S, false, "sx" ) diff --git a/src/mapleall/maple_util/src/cl_option_parser.cpp b/src/mapleall/maple_util/src/cl_option_parser.cpp index f38cdb085ece7bcc862b2c334f7686db68d99a8e..0eaf0b7895117b5b006b342953e343543c5259b3 100644 --- a/src/mapleall/maple_util/src/cl_option_parser.cpp +++ b/src/mapleall/maple_util/src/cl_option_parser.cpp @@ -74,7 +74,7 @@ std::pair ExtractValue(size_t argsIndex, RetCode::kValueEmpty : RetCode::kNoError; return {ret, 0}; } - + keyArg.key = keyArg.rawArg; keyArg.val = args[localArgsIndex]; return {RetCode::kNoError, 1}; } @@ -92,6 +92,7 @@ template <> RetCode Option::ParseBool(size_t &argsIndex, auto disabledNames = GetDisabledName(); auto it = std::find(disabledNames.begin(), disabledNames.end(), args[argsIndex]); SetValue(it == disabledNames.end()); + SetExpectedVal(kDisallowedValue); ++argsIndex; return RetCode::kNoError; diff --git a/src/mapleall/maple_util/src/cl_parser.cpp b/src/mapleall/maple_util/src/cl_parser.cpp index 985031225035ba04f5d045aacff6bea61e9b0be5..c5daedefd9cebebb7926fcb61ccb42a1a751d3c8 100644 --- a/src/mapleall/maple_util/src/cl_parser.cpp +++ b/src/mapleall/maple_util/src/cl_parser.cpp @@ -36,47 +36,32 @@ void OptionCategory::ClearJoinedOpt() { } } +void OptionCategory::ClearOpt() { + std::vector enabledOptionsBak = enabledOptions; + for (size_t index = 0; index < enabledOptionsBak.size(); index++) { + enabledOptionsBak[index]->Clear(); + } + maplecl::CommandLine::GetCommandLine().GetLinkOptions().clear(); +} + CommandLine &CommandLine::GetCommandLine() { static CommandLine cl; return cl; } -OptionInterface *CommandLine::CheckJoinedOption(KeyArg &keyArg, OptionCategory &optCategory) { +OptionInterface *CommandLine::CheckJoinedOption(KeyArg &keyArg, OptionCategory &optCategory) const { auto &str = keyArg.rawArg; for (auto joinedOption : optCategory.joinedOptions) { /* Joined Option (like -DMACRO) can be detected as substring (-D) in the option string */ if (str.find(joinedOption.first) == 0) { - size_t keySize; - if (joinedOption.first != "-Wl" && joinedOption.first != "-l") { - keySize = joinedOption.first.size(); - keyArg.key = str.substr(0, keySize); - keyArg.val = str.substr(keySize); - } else { - std::string tmp(str); - linkOptions.push_back(tmp); - keySize = 0; - if (joinedOption.first == "-Wl") { - keyArg.key = "-Wl"; - } else { - keyArg.key = "-l"; - } - } - + size_t keySize = joinedOption.first.size(); + keyArg.key = str.substr(0, keySize); + keyArg.val = str.substr(keySize); keyArg.isJoinedOpt = true; return joinedOption.second; } } - std::string tempStr(str); - std::string tmp = maple::StringUtils::GetStrAfterLast(tempStr, "."); - if (tmp == "a" || tmp == "so") { - if (maple::StringUtils::GetStrAfterLast(tempStr, "/") == "libmplpgo.so" || - maple::StringUtils::GetStrAfterLast(tempStr, "/") == "libmplpgo.a") { - SetHasPgoLib(true); - } - linkOptions.push_back(tempStr); - } - return nullptr; } @@ -85,12 +70,12 @@ RetCode CommandLine::ParseJoinedOption(size_t &argsIndex, KeyArg &keyArg, OptionCategory &optCategory) { OptionInterface *option = CheckJoinedOption(keyArg, optCategory); if (option != nullptr) { - if (keyArg.key != "-Wl" && keyArg.key != "-l") { + AddLinkOption(*option, keyArg); + if (keyArg.key != "-Wl") { RetCode err = option->Parse(argsIndex, args, keyArg); if (err != RetCode::kNoError) { return err; } - /* Set Option in all categories registering for this option */ for (auto &category : option->optCategories) { category->AddEnabledOption(option); @@ -99,12 +84,6 @@ RetCode CommandLine::ParseJoinedOption(size_t &argsIndex, argsIndex++; } } else { - std::string tempStr(keyArg.rawArg); - std::string tmp = maple::StringUtils::GetStrAfterLast(tempStr, "."); - if (tmp == "a" || tmp == "so") { - argsIndex++; - return RetCode::kNoError; - } return RetCode::kNotRegistered; } @@ -113,19 +92,19 @@ RetCode CommandLine::ParseJoinedOption(size_t &argsIndex, void CommandLine::CloseOptimize(const OptionCategory &optCategory) const { if (optCategory.options.find("-O0") != optCategory.options.end()) { - optCategory.options.find("-O0")->second->UnSetEnabledByUser(); + optCategory.options.find("-O0")->second->Clear(); } if (optCategory.options.find("-O1") != optCategory.options.end()) { - optCategory.options.find("-O1")->second->UnSetEnabledByUser(); + optCategory.options.find("-O1")->second->Clear(); } if (optCategory.options.find("-O2") != optCategory.options.end()) { - optCategory.options.find("-O2")->second->UnSetEnabledByUser(); + optCategory.options.find("-O2")->second->Clear(); } if (optCategory.options.find("-O3") != optCategory.options.end()) { - optCategory.options.find("-O3")->second->UnSetEnabledByUser(); + optCategory.options.find("-O3")->second->Clear(); } if (optCategory.options.find("-Os") != optCategory.options.end()) { - optCategory.options.find("-Os")->second->UnSetEnabledByUser(); + optCategory.options.find("-Os")->second->Clear(); } } @@ -165,6 +144,7 @@ RetCode CommandLine::ParseOption(size_t &argsIndex, DeleteEnabledOptions(argsIndex, args, optCategory); } + // if fpie/fPIE entered before fpic/fPIC, fpie/fPIE should be disabled if (args[argsIndex] == "-fpic" || args[argsIndex] == "--fpic" || args[argsIndex] == "-fPIC" || args[argsIndex] == "--fPIC") { auto item = optCategory.options.find("-fPIE"); @@ -177,6 +157,14 @@ RetCode CommandLine::ParseOption(size_t &argsIndex, } } + // if fPIE entered before fpie, fPIE should be disabled + if (args[argsIndex] == "-fpie" || args[argsIndex] == "--fpie") { + auto item = optCategory.options.find("-fPIE"); + if (item != optCategory.options.end()) { + item->second->UnSetEnabledByUser(); + } + } + if (args[argsIndex] == "--O0" || args[argsIndex] == "-O0" || args[argsIndex] == "--O1" || args[argsIndex] == "-O1" || args[argsIndex] == "--O2" || args[argsIndex] == "-O2" || args[argsIndex] == "--O3" || args[argsIndex] == "-O3" || args[argsIndex] == "--Os" || args[argsIndex] == "-Os") { @@ -188,14 +176,10 @@ RetCode CommandLine::ParseOption(size_t &argsIndex, return err; } - if (keyArg.rawArg == "-Xlinker") { - linkOptions.push_back(std::string(keyArg.rawArg)); - linkOptions.push_back(std::string(keyArg.val)); - } else { - /* Set Option in all categories registering for this option */ - for (auto &category : opt.optCategories) { - category->AddEnabledOption(&opt); - } + AddLinkOption(opt, keyArg); + /* Set Option in all categories registering for this option */ + for (auto &category : opt.optCategories) { + category->AddEnabledOption(&opt); } return RetCode::kNoError; @@ -270,9 +254,8 @@ RetCode CommandLine::HandleInputArgs(const std::deque &args, continue; } - if (arg == "-march=armv8-a+crc") { - maple::LogInfo::MapleLogger(maple::kLlWarn) << "Warning: " - << "The crc instruction is not fully implemented!" << '\n'; + if (arg == "-march=armv8-a+crc" || arg == "-g1" || arg == "-g3") { + unsupportOptions.emplace_back(arg); } if (arg.find("_FORTIFY_SOURCE") != std::string::npos) { @@ -287,29 +270,32 @@ RetCode CommandLine::HandleInputArgs(const std::deque &args, if (pos != std::string::npos) { ASSERT(pos > 0, "CG internal error, composite unit with less than 2 unit elements."); err = ParseEqualOption(argsIndex, args, keyArg, optCategory, optCategory.options, pos); - if (err != RetCode::kNoError) { - (void)badCLArgs.emplace_back(args[argsIndex], err); - ++argsIndex; - wasError = true; - } - continue; } /* option like "--key value" or "--key" */ else { err = ParseSimpleOption(argsIndex, args, keyArg, optCategory, optCategory.options); - if (err != RetCode::kNoError) { + } + if (err != RetCode::kNoError) { + std::string tmp = std::string(args[argsIndex]); + if (maple::FileUtils::GetFileType(tmp) == maple::InputFileType::kFileTypeLib) { + linkOptions.push_back(tmp); + if (maple::StringUtils::GetStrAfterLast(tmp, "/") == "libmplpgo.so" || + maple::StringUtils::GetStrAfterLast(tmp, "/") == "libmplpgo.a") { + SetHasPgoLib(true); + } + } else { (void)badCLArgs.emplace_back(args[argsIndex], err); - ++argsIndex; - wasError = true; } - continue; + ++argsIndex; + wasError = true; } + continue; } if (&optCategory == &defaultCategory) { for (const auto &opt : unSupCategory.GetEnabledOptions()) { - maple::LogInfo::MapleLogger() << "Warning: " << opt->GetName() << " has not been support!" << '\n'; + unsupportOptions.emplace_back(opt->GetName()); } } @@ -410,3 +396,23 @@ void CommandLine::HelpPrinter(OptionCategory &optCategory) const { } } } + +void CommandLine::AddLinkOption(const OptionInterface &opt, const KeyArg &keyArg) { + if ((opt.GetOptType() & KOptLd) == 0) { + return; + } + if (keyArg.key == "-specs" && std::find(linkOptions.begin(), linkOptions.end(), keyArg.val) != linkOptions.end()) { + return; + } + if (keyArg.key != "-Wl" && (keyArg.isJoinedOpt || (!keyArg.key.empty() && !keyArg.val.empty())) && + !keyArg.isEqualOpt) { + linkOptions.push_back(std::string(keyArg.key)); + linkOptions.push_back(std::string(keyArg.val)); + } else { + std::string optName = std::string(keyArg.rawArg); + if (opt.HasMultipleName()) { + optName = maple::StringUtils::Replace(optName, opt.rawKey, opt.GetName()); + } + linkOptions.push_back(optName); + } +} diff --git a/src/mapleall/maple_util/src/error_code.cpp b/src/mapleall/maple_util/src/error_code.cpp index c31d1613be216d703a748b41dc8f1e9987d535cf..8e2e8d7292815718724082a767b3d4bbef873170 100644 --- a/src/mapleall/maple_util/src/error_code.cpp +++ b/src/mapleall/maple_util/src/error_code.cpp @@ -46,7 +46,16 @@ void PrintErrorMessage(int ret) { ERR(kLncErr, "File Format Not Recognized!"); break; case kErrorCreateFile: - ERR(kLncErr, "Fail To Create File Under Tmpdir!"); + ERR(kLncErr, "Fail To Create File!"); + break; + case kErrorNeedLtoOption: + ERR(kLncErr, "Must enter -flto option!"); + break; + case kErrorNoOptionFile: + ERR(kLncErr, "Fail To Find Option File Under Lto!"); + break; + case kErrorLtoInvalidParameter: + ERR(kLncErr, "The lto compilation options must be consistent.!"); break; default: break; diff --git a/src/mapleall/maple_util/src/file_utils.cpp b/src/mapleall/maple_util/src/file_utils.cpp index c6083f31dc15aff2211b5abb109420f522fd2f62..a7cc14232036a0aba86d59d44a05fb488ec1252a 100644 --- a/src/mapleall/maple_util/src/file_utils.cpp +++ b/src/mapleall/maple_util/src/file_utils.cpp @@ -16,10 +16,12 @@ #include #include #include +#include #include #include #include #include "mpl_logging.h" +#include "securec.h" #include "file_utils.h" #ifdef _WIN32 @@ -46,6 +48,15 @@ const std::string kFileSeperatorStr = kFileSeperatorWindowsStyleStr; const std::string kFileSeperatorStr = kFileSeperatorLinuxStyleStr; #endif +const static TypeInfo kTypeInfos[] = { +#define TYPE(ID, SUPPORT, ...) \ + {InputFileType::kFileType##ID, SUPPORT, {__VA_ARGS__}}, +#include "type.def" +#undef TYPE +}; +const char kWhitespaceChar = ' '; +const std::string kWhitespaceStr = std::string(1, kWhitespaceChar); + std::string FileUtils::SafeGetenv(const char *envVar) { const char *tmpEnvPtr = std::getenv(envVar); if (tmpEnvPtr == nullptr) { @@ -55,6 +66,20 @@ std::string FileUtils::SafeGetenv(const char *envVar) { return tmpStr; } +std::string FileUtils::ExecuteShell(const char *cmd, std::string workspace) { + if (!workspace.empty()) { + char buffer[PATH_MAX]; + CHECK_FATAL(getcwd(buffer, sizeof(buffer)) != nullptr, "get current path failed"); + CHECK_FATAL(chdir(workspace.c_str()) == 0, "change workspace failed"); + workspace = buffer; + } + std::string result = ExecuteShell(cmd); + if (!workspace.empty()) { + CHECK_FATAL(chdir(workspace.c_str()) == 0, "change workspace failed"); + } + return result; +} + std::string FileUtils::ExecuteShell(const char *cmd) { const int size = 1024; FILE *fp = nullptr; @@ -107,21 +132,45 @@ std::string FileUtils::GetTmpFolderPath() const { std::string tmp = "\n"; size_t index = path.find(tmp) == std::string::npos ? path.length() : path.find(tmp); path = path.substr(0, index); - return path + "/"; + return path + kFileSeperatorStr; } -std::string FileUtils::GetRealPath(const std::string &filePath) { -#ifdef _WIN32 - char *path = nullptr; - if (filePath.size() > PATH_MAX || !PathCanonicalize(path, filePath.c_str())) { +void FileUtils::Mkdirs(const std::string &path, mode_t mode) { + size_t pos = 0; + while ((pos = path.find_first_of(kFileSeperatorStr, pos + 1)) != std::string::npos) { + std::string dir = path.substr(0, pos); + if (access(dir.c_str(), W_OK | R_OK) != 0) { + CHECK_FATAL(mkdir(dir.c_str(), mode) == 0, "Failed to create tmp folder"); + } + } +} + +std::string FileUtils::GetOutPutDirInTmp(const std::string &inputFile) { + std::string tmpDir = FileUtils::GetInstance().GetTmpFolder(); + if (inputFile.find(kFileSeperatorStr) == std::string::npos) { + return tmpDir; + } + tmpDir.pop_back(); + std::string realFilePath = FileUtils::GetRealPath(inputFile); + std::string fileDir = StringUtils::GetStrBeforeLast(realFilePath, kFileSeperatorStr, true) + kFileSeperatorStr; + std::string dirToMake = tmpDir + fileDir; + mode_t mode = S_IRWXU | S_IRGRP | S_IXGRP | S_IROTH | S_IXOTH; + Mkdirs(dirToMake, mode); + return dirToMake; +} + +std::string FileUtils::GetRealPath(const std::string &filePath, const bool isCheck) { + if (filePath.size() > PATH_MAX) { CHECK_FATAL(false, "invalid file path"); } +#ifdef _WIN32 + char *path = nullptr; + bool isReal = PathCanonicalize(path, filePath.c_str(); #else char path[PATH_MAX] = {0}; - if (filePath.size() > PATH_MAX || realpath(filePath.c_str(), path) == nullptr) { - CHECK_FATAL(false, "invalid file path"); - } + bool isReal = realpath(filePath.c_str(), path) != nullptr; #endif + CHECK_FATAL(!(isCheck && !isReal), "invalid file path %s", filePath.c_str()); std::string result(path, path + strlen(path)); return result; } @@ -142,48 +191,39 @@ std::string FileUtils::GetFileExtension(const std::string &filePath) { return fileExtension; } +InputFileType FileUtils::GetFileTypeByExtension(const std::string &extensionName) { + for (auto item : kTypeInfos) { + for (auto ext : item.tmpSuffix) { + if (ext == extensionName) { + return item.fileType; + } + } + } + return InputFileType::kFileTypeNone; +} + InputFileType FileUtils::GetFileType(const std::string &filePath) { - InputFileType fileType = InputFileType::kFileTypeNone; std::string extensionName = GetFileExtension(filePath); - if (extensionName == "class") { - fileType = InputFileType::kFileTypeClass; - } else if (extensionName == "dex") { - fileType = InputFileType::kFileTypeDex; - } else if (extensionName == "c") { - fileType = InputFileType::kFileTypeC; - } else if (extensionName == "cpp") { - fileType = InputFileType::kFileTypeCpp; - } else if (extensionName == "ast") { - fileType = InputFileType::kFileTypeAst; - } else if (extensionName == "jar") { - fileType = InputFileType::kFileTypeJar; - } else if (extensionName == "mpl" || extensionName == "bpl") { + InputFileType type = GetFileTypeByExtension(extensionName); + if (type == InputFileType::kFileTypeObj) { + type = GetFileTypeByMagicNumber(filePath); + } else if (type == InputFileType::kFileTypeMpl || type == InputFileType::kFileTypeBpl) { if (filePath.find("VtableImpl") == std::string::npos) { if (filePath.find(".me.mpl") != std::string::npos) { - fileType = InputFileType::kFileTypeMeMpl; + type = InputFileType::kFileTypeMeMpl; } else { - fileType = extensionName == "mpl" ? InputFileType::kFileTypeMpl : InputFileType::kFileTypeBpl; + type = extensionName == "mpl" ? InputFileType::kFileTypeMpl : InputFileType::kFileTypeBpl; } } else { - fileType = InputFileType::kFileTypeVtableImplMpl; + type = InputFileType::kFileTypeVtableImplMpl; + } + } else if (type == InputFileType::kFileTypeNone) { + std::string regexPattern = R"(\.(so|a)+((?:\.\d+)*)$)"; + if (StringUtils::IsMatchAtEnd(filePath, regexPattern)) { + type = InputFileType::kFileTypeLib; } - } else if (extensionName == "s" || extensionName == "S") { - fileType = InputFileType::kFileTypeS; - } else if (extensionName == "o") { - fileType = GetFileTypeByMagicNumber(filePath); - } else if (extensionName == "mbc") { - fileType = InputFileType::kFileTypeMbc; - } else if (extensionName == "lmbc") { - fileType = InputFileType::kFileTypeLmbc; - } else if (extensionName == "h") { - fileType = InputFileType::kFileTypeH; - } else if (extensionName == "i") { - fileType = InputFileType::kFileTypeI; - } else if (extensionName == "oast") { - fileType = InputFileType::kFileTypeOast; } - - return fileType; + return type; } std::string FileUtils::GetExecutable() { @@ -249,8 +289,11 @@ bool FileUtils::CreateFile(const std::string &file) { } std::ofstream fileCreate; fileCreate.open(file); + if (!fileCreate) { + return false; + } fileCreate.close(); - return IsFileExists(file); + return true; } std::string FileUtils::AppendMapleRootIfNeeded(bool needRootPath, const std::string &path, @@ -284,11 +327,49 @@ InputFileType FileUtils::GetFileTypeByMagicNumber(const std::string &pathName) { int length = static_cast(sizeof(uint32)); (void)file.read(reinterpret_cast(&magic), length); file.close(); - return magic == kMagicAST ? InputFileType::kFileTypeOast : magic == kMagicELF ? InputFileType::kFileTypeObj : - InputFileType::kFileTypeNone; + switch (magic) { + case kMagicAST: + return InputFileType::kFileTypeOast; + case kMagicELF: + return InputFileType::kFileTypeObj; + default: + return InputFileType::kFileTypeNone; + } +} + +bool FileUtils::IsSupportFileType(InputFileType type) { + for (auto item : kTypeInfos) { + if (item.fileType == type) { + return item.support; + } + } + return true; +} + +void FileUtils::GetFileNames(const std::string path, std::vector &filenames) { + DIR *pDir = nullptr; + struct dirent *ptr; + if (!(pDir = opendir(path.c_str()))) { + return; + } + struct stat s; + while ((ptr = readdir(pDir)) != nullptr) { + std::string filename = path + ptr->d_name; + if (stat(filename.c_str(), &s) == 0) { + if ((s.st_mode & S_IFREG) != 0) { + filenames.push_back(filename); + } + } + } + CHECK_FATAL(closedir(pDir) == 0, "close dir failed"); } +std::unordered_map libName; + bool FileUtils::GetAstFromLib(const std::string libPath, std::vector &astInputs) { + if (libName.count(libPath) > 0) { + return libName[libPath]; + } bool elfFlag = false; std::string binAr = ""; std::string cmd = "which ar"; @@ -302,23 +383,25 @@ bool FileUtils::GetAstFromLib(const std::string libPath, std::vector astVec; + std::vector filenames; result = ExecuteShell(cmd.c_str()); - StringUtils::Split(result, astVec, '\n'); - for (auto tmp : astVec) { - if (tmp.empty()) { - continue; - } - cmd = binAr + " x " + realLibPath + " " + tmp; - CHECK_FATAL((ExecuteShell(cmd.c_str()) == ""), "Failed to execute %s.", cmd.c_str()); - result = GetFileExtension(GetRealPath(tmp)); - if (result == "o" && GetFileTypeByMagicNumber(GetRealPath(tmp)) == InputFileType::kFileTypeOast) { - cmd = binAr + " d " + realLibPath + " " + tmp; - astInputs.push_back(GetRealPath(tmp)); + StringUtils::Split(result, filenames, '\n'); + std::random_device rd; + std::mt19937 gen(rd()); + std::string tmpLibFolder = GetInstance().GetTmpFolder() + std::to_string(gen()) + kFileSeperatorStr; + mode_t mode = S_IRWXU | S_IRGRP | S_IXGRP | S_IROTH | S_IXOTH; + Mkdirs(tmpLibFolder, mode); + cmd = binAr + " x " + realLibPath; + CHECK_FATAL(ExecuteShell(cmd.c_str(), tmpLibFolder) == "", "Failed to execute %s.", cmd.c_str()); + for (const auto &file : filenames) { + std::string tmpPath = tmpLibFolder + file; + if (GetFileTypeByMagicNumber(tmpPath) == InputFileType::kFileTypeOast) { + astInputs.push_back(tmpPath); } else { elfFlag = true; } } + libName.emplace(std::pair(libPath, elfFlag)); return elfFlag; } @@ -369,4 +452,105 @@ bool FileUtils::Rmdirs(const std::string &dirPath) { return true; } +std::string FileUtils::GetCurDirPath() { + char *cwd = get_current_dir_name(); + std::string path(cwd); + free(cwd); + cwd = nullptr; + return path; +} + +static constexpr std::streamsize kASTHeaderSize = 4; +static constexpr std::streamsize kBlockSize = 4; +static constexpr std::streamsize kWordSize = 4; +static constexpr std::streamsize koptStringIdSize = 3; +static constexpr std::streamsize kmagicNumberSize = 4; +static constexpr std::streamsize kControlBlockHeadSize = 8; +static constexpr std::streamsize kOptStringHeader = 5; +static constexpr std::streamsize kOptStringInfoSize = 4; +static constexpr std::streamsize kOptStringId = 0x5442; +static constexpr char kClangASTMagicNum[] = "CPCH"; +size_t FileUtils::GetIntegerFromMem(std::ifstream &fs, char *buffer, std::streamsize bufferSize, + bool isNeedChkOptStrId) { + (void)fs.read(buffer, bufferSize); + if (isNeedChkOptStrId) { + // we use optStringId first byte and second byte with last byte low 3bits(0x7U) to compare + buffer[bufferSize - 1] = static_cast(buffer[bufferSize - 1]) & 0x7U; + } + size_t integerSize = 0; + errno_t ret = memcpy_s(&integerSize, sizeof(integerSize), buffer, static_cast(bufferSize)); + CHECK_FATAL(ret == EOK, "get Integer From Memory failed"); + return integerSize; +} + +void FileUtils::GetOptString(std::ifstream &fs, std::string &optString) { + (void)fs.seekg(kOptStringHeader, std::ios::cur); + char optStringInfo[kOptStringInfoSize]; + std::streamsize index = kOptStringInfoSize; + while (index == kOptStringInfoSize) { + (void)fs.read(optStringInfo, static_cast(sizeof(optStringInfo))); + index = 0; + while (index < kOptStringInfoSize && optStringInfo[index] != '\0') { + optString += optStringInfo[index]; + index++; + } + } +} + +std::string FileUtils::GetClangAstOptString(const std::string astFilePath) { + std::string optString; + std::ifstream fs(astFilePath); + if (!fs.is_open()) { + return ""; + } + char magicNumber[kmagicNumberSize]; + (void)fs.read(magicNumber, static_cast(sizeof(magicNumber))); + if (memcmp(magicNumber, kClangASTMagicNum, sizeof(magicNumber)) == 0) { + (void)fs.seekg(kASTHeaderSize, std::ios::cur); + char blockInfoBlockSizeInfo[kBlockSize]; + size_t blockInfoBlockSize = GetIntegerFromMem(fs, blockInfoBlockSizeInfo, kBlockSize, false); + (void)fs.seekg(static_cast(blockInfoBlockSize * kWordSize) + kControlBlockHeadSize, std::ios::cur); + char optStringId[koptStringIdSize]; + std::streamsize optStringIdInfo = + static_cast(GetIntegerFromMem(fs, optStringId, koptStringIdSize, true)); + if (optStringIdInfo == kOptStringId) { + GetOptString(fs, optString); + } + } + + fs.close(); + return optString; +} + +// Just read a line from the file. It doesn't do anything more. +// The reason for this wrapper function is to provide a single entry to +// read file. Thus we can easily manipulate the line number, column number, +// cursor, etc. +// Returns true : if file is good() +// false : if file is not good() +bool FileReader::ReadLine() { + (void)std::getline(mDefFile, mCurLine); + mLineNo++; + if (mDefFile.good()) { + return true; + } else { + return false; + } +} + +std::string FileReader::GetLine(const std::string keyWord) { + while (ReadLine()) { + if (mCurLine.length() == 0) { + continue; + } + if (mCurLine.find(keyWord) != std::string::npos) { + return StringUtils::TrimWhitespace(mCurLine); + } + if (EndOfFile()) { + break; + } + } + return ""; +} + } // namespace maple diff --git a/src/mapleall/maple_util/src/mpl_logging.cpp b/src/mapleall/maple_util/src/mpl_logging.cpp index 6bee17e716b3219d513d785c45a678cbf81eef3d..00c4539bf630bda04fafe4fb43ce3179a08f0545 100644 --- a/src/mapleall/maple_util/src/mpl_logging.cpp +++ b/src/mapleall/maple_util/src/mpl_logging.cpp @@ -238,4 +238,20 @@ void LogInfo::PrintUserErrorMessages() { userErrsMap.clear(); } } + +std::string GetNthStr(size_t index) { + switch (index) { + case 0: + return "1st"; + case 1: + return "2nd"; + case 2: + return "3rd"; + default: { + std::ostringstream oss; + oss << (index + 1) << "th"; + return oss.str(); + } + } +} } // namespace maple diff --git a/src/mapleall/maple_util/src/string_utils.cpp b/src/mapleall/maple_util/src/string_utils.cpp index bee9b2585e1fdf260e7c9485504150d30379695b..1c12518399baf5b9ef0905420edeac76417085df 100644 --- a/src/mapleall/maple_util/src/string_utils.cpp +++ b/src/mapleall/maple_util/src/string_utils.cpp @@ -53,8 +53,7 @@ std::string StringUtils::Append(const std::string &src, const std::string &targe return src + spliter + target; } -std::string StringUtils::GetStrAfterLast(const std::string &src, const std::string &target, - bool isReturnEmpty) { +std::string StringUtils::GetStrAfterLast(const std::string &src, const std::string &target, bool isReturnEmpty) { size_t pos = src.find_last_of(target); if (pos == std::string::npos) { return isReturnEmpty ? "" : src; @@ -70,6 +69,14 @@ std::string StringUtils::GetStrBeforeLast(const std::string &src, const std::str return src.substr(0, pos); } +std::string StringUtils::GetStrAfterFirst(const std::string &src, const std::string &target, bool isReturnEmpty) { + size_t pos = src.find_first_of(target); + if (pos == std::string::npos) { + return isReturnEmpty ? "" : src; + } + return src.substr(pos + 1); +} + std::string StringUtils::GetStrBeforeFirst(const std::string &src, const std::string &target, bool isReturnEmpty) { size_t pos = src.find_first_of(target); if (pos == std::string::npos) { diff --git a/src/mapleall/mpl2mpl/include/call_graph.h b/src/mapleall/mpl2mpl/include/call_graph.h index 282f516966d194a09acd60020414135a91936339..f86fad457a4b1ac36654c7db9ca61d23d5047583 100644 --- a/src/mapleall/mpl2mpl/include/call_graph.h +++ b/src/mapleall/mpl2mpl/include/call_graph.h @@ -96,6 +96,24 @@ struct Comparator { } }; +// Temperature for callgraph node (CGNode) and callgraph edge (CallInfo). +// The temperature is initialized by function attr, and will be propagated across the callgraph. +enum class CGTemp { + kCold, // Unlikely executed, set it according to `cold` attr + kExecOnce, // Only executed once, such as main, constructor, destructor + kNormal, // The default temperature + kHot, // Frequently executed, set it according to `hot` attr +}; + +enum class CallsiteAttrKind { + kUnlikely, // callsite is in unlikely path, inferred from __builtin_expect + kMax +}; + +constexpr uint32 kNumBitInCallInfoAttr = 32; +static_assert(static_cast(CallsiteAttrKind::kMax) <= kNumBitInCallInfoAttr, "callInfo attr out of range"); +using CallsiteAttrFlag = std::bitset; + // Information description of each callsite class CallInfo { public: @@ -127,6 +145,18 @@ class CallInfo { return loopDepth; } + void SetLoopDepth(uint32 depth) { + loopDepth = depth; + } + + CGTemp GetCallTemp() const { + return callTemp; + } + + void SetCallTemp(CGTemp temp) { + callTemp = temp; + } + const std::string GetCallTypeName() const; const StmtNode *GetCallStmt() const { return callStmt; @@ -151,8 +181,8 @@ class CallInfo { return caller; } - MIRFunction &GetCallee() const { - return *callee; + const MIRFunction *GetCallee() const { + return callee; } MIRFunction *GetCallee() { @@ -186,6 +216,7 @@ class CallInfo { StmtNode *callStmt = nullptr; // Call statement uint32 loopDepth = 0; uint32 id = 0; + CGTemp callTemp = CGTemp::kNormal; // Callsite temperature }; // Node in callgraph @@ -220,7 +251,15 @@ class CGNode : public BaseGraphNode { stmtCount(0), nodeCount(0), mustNotBeInlined(false), - vcallCands(alloc->Adapter()) {} + vcallCands(alloc->Adapter()) { + if (mirFunc != nullptr) { + if (mirFunc->GetAttr(FUNCATTR_hot)) { + SetFuncTemp(CGTemp::kHot); + } else if (mirFunc->GetAttr(FUNCATTR_cold)) { + SetFuncTemp(CGTemp::kCold); + } + } + } ~CGNode() override { alloc = nullptr; @@ -236,6 +275,14 @@ class CGNode : public BaseGraphNode { return mirFunc; } + CGTemp GetFuncTemp() const { + return funcTemp; + } + + void SetFuncTemp(CGTemp temp) { + funcTemp = temp; + } + void AddCallsite(CallInfo &ci, CGNode *node); void AddCallsite(CallInfo *ci, MapleSet> *callee); void RemoveCallsite(const CallInfo *ci); @@ -523,6 +570,7 @@ class CGNode : public BaseGraphNode { uint32 inlinedTimes = 0; uint32 recursiveLevel = 0; // the inlined level when this func is a self-recursive func. BlockNode *originBody = nullptr; // the originnal body of the func when it's a self-recursive func. + CGTemp funcTemp = CGTemp::kNormal; bool addrTaken = false; // whether this function is taken address }; @@ -643,6 +691,7 @@ class CallGraph : public AnalysisResult { private: void GenCallGraph(); + void PropTempAcrossCallGraph(); void ReadCallGraphFromMplt(); void GenCallGraphFromFunctionBody(); void FixIcallCallee(); diff --git a/src/mapleall/mpl2mpl/include/ginline.h b/src/mapleall/mpl2mpl/include/ginline.h index 083f85f6e47fbe77a5fba29873136509489d8ea7..2ef9fd29ab77bb6dc7982652f6e7472e08b4e682 100644 --- a/src/mapleall/mpl2mpl/include/ginline.h +++ b/src/mapleall/mpl2mpl/include/ginline.h @@ -134,6 +134,10 @@ class GInline { void TryInlineToAllCallers(); void TryInlineToAllCallers(const CGNode &calleeCgNode); + void DoExpandFunc(MIRFunction &origCaller, const std::vector &infoVec, + uint32 curDepth, std::unordered_set &context); + void ExpandFunc(MIRFunction &func); + void RunExpandStage(); bool ConsiderInlineCallsite(CallInfo &info, uint32 depth); void AddNewEdge(const std::vector &newCallInfo, uint32 depth); MapleSet::iterator FindCallsiteInSet(uint32 callId) const; @@ -144,7 +148,7 @@ class GInline { BadnessInfo *CalcBadness(CallInfo &info); void InsertNewCallSite(CallInfo &info, uint32 depth); void UpdateCallSite(CallInfo &info); - bool CanIgnoreGrowthLimit(const CallSiteNode &callSiteNode) const; + bool CanIgnoreGrowthLimit(CallSiteNode &callSiteNode) const; void PrintGInlineReport() const; MapleSet funcsToBeRemoved; diff --git a/src/mapleall/mpl2mpl/include/inline.h b/src/mapleall/mpl2mpl/include/inline.h index 7840a91ce87841cf3a3df422b8509745518fabcd..54ac39b93b604e0d82ba55106c8012fdd0dc9096 100644 --- a/src/mapleall/mpl2mpl/include/inline.h +++ b/src/mapleall/mpl2mpl/include/inline.h @@ -31,6 +31,8 @@ enum ThresholdType { kHotAndRecursiveFuncThreshold }; +bool MayBeOverwritten(const MIRFunction &func); + class MInline { public: MInline(MIRModule &mod, MemPool *memPool, CallGraph *cg = nullptr, bool onlyAlwaysInline = false) @@ -82,8 +84,10 @@ class MInline { void PostInline(MIRFunction &caller); void InlineCallsBlock(MIRFunction &func, BlockNode &enclosingBlk, BaseNode &baseNode, bool &changed, BaseNode &prevStmt); - void InlineCallsBlockInternal(MIRFunction &func, BaseNode &baseNode, bool &changed); + void InlineCallsBlockInternal(MIRFunction &func, BaseNode &baseNode, bool &changed, BaseNode &prevStmt); void AlwaysInlineCallsBlockInternal(MIRFunction &func, BaseNode &baseNode, bool &changed); + void EndsInliningWithFailure(const std::string &failReason, const MIRFunction &caller, + const MIRFunction &callee, const CallNode &callStmt) const; GotoNode *UpdateReturnStmts(const MIRFunction&, BlockNode&, LabelIdx, const CallReturnVector&, int&) const; void ComputeTotalSize(); void MarkSymbolUsed(const StIdx &symbolIdx) const; @@ -102,6 +106,8 @@ class MInline { const bool performEarlyInline; // open it only if ginline is enabled and srcLang is C uint32 maxRecursiveLevel = 4; // for recursive function, allow inline 4 levels at most. uint32 currInlineDepth = 0; + bool isCurrCallerTooBig = false; // If the caller is too big, we wont't inline callsites except the ones that + // must be inlined }; MAPLE_MODULE_PHASE_DECLARE(M2MInline) diff --git a/src/mapleall/mpl2mpl/include/inline_analyzer.h b/src/mapleall/mpl2mpl/include/inline_analyzer.h index c590b926769e82832a2b59169609d15105062607..53cefb06951d4632617ceec7666f0d7cc3242a08 100644 --- a/src/mapleall/mpl2mpl/include/inline_analyzer.h +++ b/src/mapleall/mpl2mpl/include/inline_analyzer.h @@ -28,7 +28,7 @@ #include "string_utils.h" namespace maple { -bool CalleeCanBeRemovedIfInlined(const CallInfo &info, const CallGraph &cg); +bool CalleeCanBeRemovedIfInlined(CallInfo &info, const CallGraph &cg); bool CanCGNodeBeRemovedIfNoDirectCalls(const CGNode &cgNode); bool ShouldBeInlinedToAllCallers(const CGNode &calleeCgNode, std::vector &callInfos, const CallGraph &cg); std::pair EstimateGrowthIfInlinedToAllCallers(const CGNode &calleeCgNode, const CallGraph &cg, @@ -36,6 +36,7 @@ std::pair EstimateGrowthIfInlinedToAllCallers(const CGNode &calleeC bool IsFuncForbiddenToCopy(const MIRFunction &func); std::optional GetFuncSize(const MIRFunction &func); double GetCallFreqPercent(const CallInfo &info); +bool IsUnlikelyCallsite(const CallInfo &callInfo); // All kinds of information related to callsite badness calculation struct BadnessInfo { @@ -111,10 +112,13 @@ class InlineAnalyzer { const CallNode &callStmt, const CallGraph &cg, uint32 depth, bool earlyInline); static bool WantInline(CallInfo &callInfo, const CallGraph &cg, uint32 depth); static std::pair WantInlineImpl(CallInfo &callInfo, const CallGraph &cg, uint32 depth); + static bool MustInline(const MIRFunction &caller, const MIRFunction &callee, + uint32 depth = 0, bool earlyInline = false); private: static bool FuncInlinable(const MIRFunction &func); static bool SizeWillGrow(const CGNode &calleeNode, const CallGraph &cg); static bool IsSafeToInline(const MIRFunction &callee, const CallNode &callStmt); + static bool CheckPreferInline(const CallNode &callStmt, bool &status); }; } // namespace maple #endif // MPL2MPL_INCLUDE_INLINE_ANALYZER_H diff --git a/src/mapleall/mpl2mpl/include/inline_failed.def b/src/mapleall/mpl2mpl/include/inline_failed.def index fe8aa7e61f1e53040fa694807768ff7d7a6ffdbb..4232aeb09c7e3cf487f8e03c9d26d77c9b81f182 100644 --- a/src/mapleall/mpl2mpl/include/inline_failed.def +++ b/src/mapleall/mpl2mpl/include/inline_failed.def @@ -26,6 +26,8 @@ DEF_IF(kIfcInlineList, kIFT_FinalOk, "[ok] callee is in the inline list") DEF_IF(kIfcInlineListCallsite, kIFT_FinalOk, "[ok] callsite is in the inline list") +DEF_IF(kIfcPreferInlineOn, kIFT_FinalOk, "[ok] callsite is marked with '#pragma prefer_inline ON'") + DEF_IF(kIfcProfileHotCallsite, kIFT_FinalOk, "[ok] profile shows this is a hot callsite") DEF_IF(kIfcExternGnuInlineCalleeDepth0, kIFT_FinalOk, "[ok] depth == 0 'extern gnu_inline' should always be inlined") @@ -46,6 +48,8 @@ DEF_IF(kIfcOutOfGreedyInline, kIFT_Mutable, "greedy inlining is not responsible // final fail DEF_IF(kIfcEmptyCallee, kIFT_FinalFail, "callee's body is not available") +DEF_IF(kIfcPreemptable, kIFT_FinalFail, "callee's body may be replaced at link time") + DEF_IF(kIfcProfileColdCallsite, kIFT_FinalFail, "profile shows this is a cold callsite") DEF_IF(kIfcUnsafe, kIFT_FinalFail, "unsafe inline") @@ -85,6 +89,8 @@ DEF_IF(kIfcNoinlineList, kIFT_FinalFail, "callee is in the noinline list") DEF_IF(kIfcNoinlineListCallsite, kIFT_FinalFail, "callsite is in the noinline list") +DEF_IF(kIfcPreferInlineOff, kIFT_FinalFail, "callsite is marked with '#pragma prefer_inline OFF'") + DEF_IF(kIfcIndirectCall, kIFT_FinalFail, "inlining indirect call is not supported") DEF_IF(kIfcNotInCallgraph, kIFT_FinalFail, "callee is not in the callgraph") diff --git a/src/mapleall/mpl2mpl/include/inline_mplt.h b/src/mapleall/mpl2mpl/include/inline_mplt.h index cb797ffe8e7088c922dfde108f718dcb5be2c7f4..396d9ed4b935356de09bbe69c0c097380a123168 100644 --- a/src/mapleall/mpl2mpl/include/inline_mplt.h +++ b/src/mapleall/mpl2mpl/include/inline_mplt.h @@ -35,7 +35,7 @@ class InlineMplt { // level: the max level that we export static function. // 1 means that if a small global function invokes a static leaf function // or a static function which never invoke other static fucntions, we will export this static function too. - bool CollectInlineInfo(uint32 inlineSize, uint32 level = 1); + bool CollectInlineInfo(uint32 inlineSize, uint32 level = 2); bool Forbidden(BaseNode *node, const std::pair &inlineConditions, std::vector &staticFuncs, std::set &globalSymbols); void CollectStructOrUnionTypes(const MIRType *baseType); diff --git a/src/mapleall/mpl2mpl/include/inline_summary.h b/src/mapleall/mpl2mpl/include/inline_summary.h index 13cb0f040823d6b043ff9c54712ead2a73593ed2..30424fb9211bc1283a24925df672d4791807fffa 100644 --- a/src/mapleall/mpl2mpl/include/inline_summary.h +++ b/src/mapleall/mpl2mpl/include/inline_summary.h @@ -67,10 +67,16 @@ class InlineCost { void AddInsns(NumInsns detInsns) { insns += detInsns; + if (insns < 0) { + insns = 0; + } } void AddCycles(NumCycles detCycles) { cycles += detCycles; + if (cycles < 0) { + cycles = 0; + } } void Add(NumInsns detInsns, NumCycles detCycles) { @@ -562,9 +568,25 @@ class Predicate { struct InlineEdgeSummary { InlineEdgeSummary(const Predicate *pred, int32 freq, int32 stmtSz, int32 stmtTm) : predicate(pred), frequency(freq), callCost(stmtSz, stmtTm) {} + + bool GetAttr(CallsiteAttrKind attrKind) const { + uint32 attrIndex = static_cast(attrKind); + return attrFlag[attrIndex]; + } + + void SetAttr(CallsiteAttrKind attrKind, bool unSet = false) { + uint32 attrIndex = static_cast(attrKind); + if (!unSet) { + attrFlag[attrIndex] = true; + } else { + attrFlag[attrIndex] = false; + } + } + const Predicate *predicate = nullptr; // predicate of the bb that contains the callStmt int32 frequency = -1; // frequency of the bb that contains the callStmt, -1 means invalid frequency InlineCost callCost; + CallsiteAttrFlag attrFlag; }; class InlineSummary { @@ -706,12 +728,16 @@ class InlineSummary { argInfoVec[argIndex] = argInfo; } - void AddEdgeSummary(uint32 callStmtId, const Predicate *bbPredicate, int32 frequency, + // Return new generated edgeSummary, otherwise return nullptr + InlineEdgeSummary *AddEdgeSummary(uint32 callStmtId, const Predicate *bbPredicate, int32 frequency, int32 insns, int32 cycles) { const auto &res = edgeSummaryMap.try_emplace(callStmtId, nullptr); if (res.second) { - res.first->second = summaryAlloc.New(bbPredicate, frequency, insns, cycles); + auto *edgeSummary = summaryAlloc.New(bbPredicate, frequency, insns, cycles); + res.first->second = edgeSummary; + return edgeSummary; } + return nullptr; } void RemoveEdgeSummary(uint32 callStmtId) { @@ -907,7 +933,8 @@ class InlineSummaryCollector { dom(dominance), pdom(postDominance), meLoop(loop), - allBBPred(tmpAlloc.Adapter()) {} + allBBPred(tmpAlloc.Adapter()), + unlikelyBBs(tmpAlloc.Adapter()) {} ~InlineSummaryCollector() { memPoolCtrler.DeleteMemPool(tmpAlloc.GetMemPool()); @@ -935,11 +962,12 @@ class InlineSummaryCollector { } } + void InitUnlikelyBBs(); void ComputeEdgePredicate(); void PropBBPredicate(); void ComputeConditionalCost(); std::pair AnalyzeCondCostForStmt(MeStmt &stmt, int32 callFrequency, const Predicate *bbPredClone, - const BBPredicate &bbPredicate); + const BBPredicate &bbPredicate, bool isUnlikelyBB); void CollectInlineSummary() { InlineSummaryCollector::CollectArgInfo(*func); @@ -947,6 +975,7 @@ class InlineSummaryCollector { if (!Options::profileUse) { // If there is real profile, no need to predict freq MePrediction::RebuildFreq(*func, dom, pdom, meLoop, &savedExpectInfo); // ipa prepare should rebuild freq before } + InitUnlikelyBBs(); PrepareSummary(); if (debug) { LogInfo::MapleLogger() << "Collect inline summary for function: " << func->GetName() << "/" << @@ -991,6 +1020,7 @@ class InlineSummaryCollector { InlineSummary *inlineSummary = nullptr; // All bb predicates are allocated in tmpAlloc, necessary predicates will be cloned into summaryAlloc MapleVector allBBPred; + MapleUnorderedSet unlikelyBBs; // We use `exprCache` to avoid build multiple different liteExpr for a single meExpr // key: meExpr, value: liteExpr and paramsUsed std::unordered_map> exprCache; diff --git a/src/mapleall/mpl2mpl/include/inline_transformer.h b/src/mapleall/mpl2mpl/include/inline_transformer.h index ff95862d7e512150537a9d8a92c73d0cc3a9f69b..52f6bbfe7af8120b1d5507a6d7c173c281b105a5 100644 --- a/src/mapleall/mpl2mpl/include/inline_transformer.h +++ b/src/mapleall/mpl2mpl/include/inline_transformer.h @@ -54,7 +54,8 @@ enum class RealArgPropCandKind { kUnknown, kConst, kVar, - kPreg + kPreg, + kExpr, }; // The candidate of real argument that can be propagated to callee's formal. @@ -65,9 +66,10 @@ struct RealArgPropCand { union { MIRSymbol *symbol = nullptr; MIRConst *mirConst; + BaseNode *expr; } data; - void Parse(MIRFunction &caller, BaseNode &argExpr); + void Parse(MIRFunction &caller, bool calleeIsLikeMacro, BaseNode &argExpr); PrimType GetPrimType() const { if (kind == RealArgPropCandKind::kConst) { @@ -76,6 +78,9 @@ struct RealArgPropCand { } else if (kind == RealArgPropCandKind::kVar || kind == RealArgPropCandKind::kPreg) { ASSERT_NOT_NULL(data.symbol); return data.symbol->GetType()->GetPrimType(); + } else if (kind == RealArgPropCandKind::kExpr) { + ASSERT_NOT_NULL(data.expr); + return data.expr->GetPrimType(); } return PTY_unknown; } @@ -103,7 +108,7 @@ class InlineTransformer { } bool PerformInline(BlockNode &enclosingBlk); - bool PerformInline(std::vector *newCallInfo = nullptr); + bool PerformInline(CallInfo *callInfo = nullptr, std::vector *newCallInfo = nullptr); static void ReplaceSymbols(BaseNode *baseNode, uint32 stIdxOff, const std::vector *oldStIdx2New); static void ConvertPStaticToFStatic(MIRFunction &func); void SetDumpDetail(bool value) { @@ -120,7 +125,8 @@ class InlineTransformer { void ReplaceLabels(BaseNode &baseNode, uint32 labIdxOff) const; void ReplacePregs(BaseNode *baseNode, std::unordered_map &pregOld2New) const; void UpdateEnclosingBlock(BlockNode &body) const; - void CollectNewCallInfo(BaseNode *node, std::vector *newCallInfo) const; + void CollectNewCallInfo(BaseNode *node, std::vector *newCallInfo, + const std::map &reverseCallIdMap) const; void AssignActualsToFormals(BlockNode &newBody, uint32 stIdxOff, uint32 regIdxOff); void AssignActualToFormal(BlockNode& newBody, uint32 stIdxOff, uint32 regIdxOff, BaseNode &oldActual, const MIRSymbol &formal); diff --git a/src/mapleall/mpl2mpl/include/scc.h b/src/mapleall/mpl2mpl/include/scc.h index 47ba72b98e71bc71b5b5eabf5cf75cc501a24dd7..c92ffedfed2c2d1e28a28017a6262f093d843ba0 100644 --- a/src/mapleall/mpl2mpl/include/scc.h +++ b/src/mapleall/mpl2mpl/include/scc.h @@ -191,54 +191,67 @@ void BuildSCCDFS(T &rootNode, uint32 &visitIndex, MapleVector*> &sccN std::vector &nodes, std::vector &visitedOrder, std::vector &lowestOrder, std::vector &inStack, std::vector &visitStack, uint32 &numOfSccs, MapleAllocator &cgAlloc) { - uint32 id = rootNode.GetID(); - nodes.at(id) = &rootNode; - visitedOrder.at(id) = visitIndex; - lowestOrder.at(id) = visitIndex; - ++visitIndex; - inStack.at(id) = true; - - std::vector outNodes; - rootNode.GetOutNodes(outNodes); - for (auto outIt : outNodes) { - auto outNode = static_cast(outIt); - if (outNode == nullptr) { - continue; - } - uint32 outNodeId = outNode->GetID(); - if (visitedOrder.at(outNodeId) == 0) { - // callee has not been processed yet - BuildSCCDFS(*outNode, visitIndex, sccNodes, nodes, visitedOrder, lowestOrder, inStack, - visitStack, numOfSccs, cgAlloc); - if (lowestOrder.at(outNodeId) < lowestOrder.at(id)) { - lowestOrder.at(id) = lowestOrder.at(outNodeId); + std::stack s; + std::stack parent; + s.push(&rootNode); + parent.push(nullptr); + // every node pushed in s should be visited twice, one is forward and another is backward + // we marked it to avoid visit the same node repeatly + std::vector secondTimeVisited(nodes.size(), false); + while (!s.empty()) { + auto node = s.top(); + uint32 id = node->GetID(); + if (visitedOrder.at(id) == 0) { + nodes.at(id) = node; + ++visitIndex; + visitedOrder.at(id) = visitIndex; + lowestOrder.at(id) = visitIndex; + std::vector outNodes; + node->GetOutNodes(outNodes); + inStack[id] = true; + for (auto citer = outNodes.rbegin(); citer != outNodes.rend(); ++citer) { + auto succId = (*citer)->GetID(); + // succ node already in stack, we can set parents's lowestOrder + if (inStack[succId]) { + lowestOrder.at(id) = std::min(lowestOrder.at(id), visitedOrder.at(succId)); + } else if (visitedOrder.at(succId) == 0) { + s.push(static_cast(*citer)); + parent.push(node); + } } - } else if (inStack.at(outNodeId) && (visitedOrder.at(outNodeId) < lowestOrder.at(id))) { - // back edge - lowestOrder.at(id) = visitedOrder.at(outNodeId); - } - } - - if (visitedOrder.at(id) == lowestOrder.at(id)) { - SCCNode *sccNode = cgAlloc.GetMemPool()->New>(numOfSccs++, cgAlloc); - inStack.at(id) = false; - T *node = nodes.at(id); - node->SetSCCNode(sccNode); - sccNode->AddNode(node); - while (!visitStack.empty()) { - auto stackTopId = visitStack.back(); - if (visitedOrder.at(stackTopId) < visitedOrder.at(id)) { - break; + } else { + auto parentNode = parent.top(); + s.pop(); + parent.pop(); + if (secondTimeVisited[id]) { + continue; + } + secondTimeVisited[id] = true; + if (parentNode) { + auto parentId = parentNode->GetID(); + lowestOrder.at(parentId) = std::min(lowestOrder.at(parentId), lowestOrder.at(id)); + } + if (lowestOrder.at(id) == visitedOrder.at(id)) { + SCCNode *sccNode = cgAlloc.GetMemPool()->New>(numOfSccs++, cgAlloc); + node->SetSCCNode(sccNode); + sccNode->AddNode(node); + inStack[id] = false; + while (!visitStack.empty()) { + auto stackTopId = visitStack.back(); + if (visitedOrder.at(stackTopId) < visitedOrder.at(id)) { + break; + } + inStack[stackTopId] = false; + visitStack.pop_back(); + T *topNode = static_cast(nodes.at(stackTopId)); + topNode->SetSCCNode(sccNode); + sccNode->AddNode(topNode); + } + sccNodes.push_back(sccNode); + } else { + visitStack.push_back(id); } - visitStack.pop_back(); - inStack.at(stackTopId) = false; - T *topNode = nodes.at(stackTopId); - topNode->SetSCCNode(sccNode); - sccNode->AddNode(topNode); } - sccNodes.push_back(sccNode); - } else { - visitStack.push_back(id); } } diff --git a/src/mapleall/mpl2mpl/src/call_graph.cpp b/src/mapleall/mpl2mpl/src/call_graph.cpp index cf122f39209adca6521a00d015fb85f5222f8b2b..41d7cbb990fde0d493eb22ba156951300eea5909 100644 --- a/src/mapleall/mpl2mpl/src/call_graph.cpp +++ b/src/mapleall/mpl2mpl/src/call_graph.cpp @@ -79,6 +79,9 @@ void CallInfo::Dump() const { LogInfo::MapleLogger() << "<" << callee->GetInlineSummary()->GetStaticInsns() << ">"; } LogInfo::MapleLogger() << "/id:" << id; + if (callTemp == CGTemp::kHot) { + LogInfo::MapleLogger() << "(hot)"; + } } const char *GetInlineFailedStr(InlineFailedCode code) { @@ -171,8 +174,8 @@ bool FuncMustBeEmitted(const MIRFunction &func) { const std::string CallInfo::GetCalleeName() const { if ((cType >= kCallTypeCall) && (cType <= kCallTypeInterfaceCall)) { - MIRFunction &mirf = GetCallee(); - return mirf.GetName(); + const MIRFunction *mirf = GetCallee(); + return mirf->GetName(); } else if (cType == kCallTypeIcall) { return "IcallUnknown"; } else if ((cType >= kCallTypeIntrinsicCall) && (cType <= kCallTypeIntrinsicCallWithType)) { @@ -1786,6 +1789,88 @@ void CallGraph::FixIcallCallee() { } } +static constexpr uint32 kMaxPropTempDepth = 10; // Fine tuning is possible here + +// Propagate the temperature with `cgNode` as the starting point +void PropTempForCGNode(CGNode &cgNode, uint32 curPropTempDepth, double exeCnt, uint32 indent, bool debug) { + if (curPropTempDepth > kMaxPropTempDepth) { + return; + } + auto *caller = cgNode.GetMIRFunction(); + auto *inlineSummary = caller->GetInlineSummary(); + if (inlineSummary == nullptr) { + return; + } + bool hasHotAttr = caller->GetAttr(FUNCATTR_hot); + auto &calleeMap = cgNode.GetCallee(); + for (auto pair : calleeMap) { + auto *callInfo = pair.first; + auto *calleeCands = pair.second; + if (callInfo->GetCallType() != kCallTypeCall) { + continue; // Only consider direct call + } + if (calleeCands == nullptr || calleeCands->size() != 1) { + continue; // Skip it if there are multiple call target candidates + } + CGNode *calleeNode = *calleeCands->begin(); + auto *calleeFunc = calleeNode->GetMIRFunction(); + if (calleeFunc->IsEmpty()) { + continue; // Skip external function + } + if (caller == calleeFunc) { + continue; // Skip self-recursive callsite to avoid infinite loop + } + auto *edgeSummary = inlineSummary->GetEdgeSummary(callInfo->GetID()); + if (edgeSummary == nullptr) { + continue; // No edge summary, frequency is not available, So skip it + } + bool isUnlikely = edgeSummary->GetAttr(CallsiteAttrKind::kUnlikely); + if (isUnlikely) { + continue; // Skip unlikely callsite inferred from __builtin_expect + } + double freqPercent = (edgeSummary->frequency * 1.0 / kCallFreqBase); + double calleeExeCnt = exeCnt * freqPercent; + if (debug) { + for (uint32 i = 0; i < indent; ++i) { + LogInfo::MapleLogger() << ' '; + } + callInfo->Dump(); + LogInfo::MapleLogger() << ", freq: " << freqPercent << ", exeCnt: " << calleeExeCnt << std::endl; + } + // The TOP LEVEL hot callsites have higher priority, so lower threshold is used. + double threshold = hasHotAttr ? 1.0 : 3.0; // Fine tuning is possible here + if (calleeExeCnt < threshold) { + continue; + } + // Mark hot callgraph nodes and callgraph edges + callInfo->SetCallTemp(CGTemp::kHot); + cgNode.SetFuncTemp(CGTemp::kHot); + calleeNode->SetFuncTemp(CGTemp::kHot); + constexpr uint32 numSpaces = 2; + PropTempForCGNode(*calleeNode, curPropTempDepth + 1, calleeExeCnt, indent + numSpaces, debug); + } +} + +// Propagate the temperature across call graph +void CallGraph::PropTempAcrossCallGraph() { + const std::vector &funcTable = GlobalTables::GetFunctionTable().GetFuncTable(); + for (size_t index = 0; index < funcTable.size(); ++index) { + MIRFunction *mirFunc = funcTable.at(index); + if (mirFunc == nullptr || mirFunc->GetBody() == nullptr) { + continue; + } + auto *cgNode = GetCGNode(mirFunc); + if (cgNode == nullptr) { + continue; + } + if (cgNode->GetFuncTemp() == CGTemp::kNormal) { + continue; + } + constexpr double exeCntForHotFunc = 1.0; // can tuning further + PropTempForCGNode(*cgNode, 0, exeCntForHotFunc, 0, debugFlag); + } +} + void CallGraph::GenCallGraph() { ReadCallGraphFromMplt(); GenCallGraphFromFunctionBody(); diff --git a/src/mapleall/mpl2mpl/src/constantfold.cpp b/src/mapleall/mpl2mpl/src/constantfold.cpp index 02093ac01261f7938d2352a1bc33c4d7c36deb5f..3c08236d4e46929bf3039f705ca3e935a5874758 100644 --- a/src/mapleall/mpl2mpl/src/constantfold.cpp +++ b/src/mapleall/mpl2mpl/src/constantfold.cpp @@ -1019,7 +1019,9 @@ std::pair> ConstantFold::FoldUnary(UnaryNode *n } else { if (GetPrimTypeSize(newPtyp) != GetPrimTypeSize(origPtyp)) { // do not fold explicit cvt - return std::make_pair(node, std::nullopt); + result = NewUnaryNode(node, node->GetOpCode(), node->GetPrimType(), + PairToExpr(node->Opnd(0)->GetPrimType(), p)); + return std::make_pair(result, std::nullopt); } else { result->SetPrimType(origPtyp); } diff --git a/src/mapleall/mpl2mpl/src/ginline.cpp b/src/mapleall/mpl2mpl/src/ginline.cpp index b38dccc13ca32d276c278a5ce0bba4d82141c3e9..f165edd0a0aadf6e28634a53a19f1d7fbb4adda6 100644 --- a/src/mapleall/mpl2mpl/src/ginline.cpp +++ b/src/mapleall/mpl2mpl/src/ginline.cpp @@ -220,7 +220,7 @@ void GInline::PrintGInlineReport() const { } // We try to inline shallow small callee (especially with inline attr), ignoring overall growth limit -bool GInline::CanIgnoreGrowthLimit(const CallSiteNode &callSiteNode) const { +bool GInline::CanIgnoreGrowthLimit(CallSiteNode &callSiteNode) const { auto ifCode = callSiteNode.GetCallInfo()->GetInlineFailedCode(); if (ifCode == kIfcInlineList || ifCode == kIfcInlineListCallsite || ifCode == kIfcHardCoded || ifCode == kIfcProfileHotCallsite) { @@ -233,12 +233,12 @@ bool GInline::CanIgnoreGrowthLimit(const CallSiteNode &callSiteNode) const { if (depth > Options::ginlineMaxDepthIgnoreGrowthLimit) { return false; } - auto &callee = callSiteNode.GetCallInfo()->GetCallee(); + auto *callee = callSiteNode.GetCallInfo()->GetCallee(); uint32 thresholdSmallFunc = Options::ginlineSmallFunc; uint32 relaxThreshold = 1; if (CalleeCanBeRemovedIfInlined(*callSiteNode.GetCallInfo(), *cg)) { relaxThreshold = Options::ginlineRelaxSmallFuncCanbeRemoved; - } else if (callee.IsInline()) { + } else if (callee->IsInline()) { constexpr uint32 defaultRelaxForInlineNormalFreq = 2; relaxThreshold = callSiteNode.GetCallFreqPercent() >= 1 ? Options::ginlineRelaxSmallFuncDecalredInline : defaultRelaxForInlineNormalFreq; @@ -259,11 +259,15 @@ void GInline::PrepareCallsiteSet() { for (auto it = cg->CBegin(); it != cg->CEnd(); ++it) { CGNode *node = it->second; for (auto edgeIter = node->GetCallee().cbegin(); edgeIter != node->GetCallee().cend(); ++edgeIter) { + auto numCalleeCands = edgeIter->second->size(); + if (numCalleeCands == 0) { + continue; + } CallInfo *info = edgeIter->first; if (!ConsiderInlineCallsite(*info, 0)) { continue; } - CHECK_FATAL(edgeIter->second->size() == 1, "Call stmt has only one candidate."); + CHECK_FATAL(numCalleeCands == 1, "Call stmt has only one candidate."); InsertNewCallSite(*info, 0); } } @@ -334,7 +338,7 @@ void GInline::InlineCallsiteSet() { } auto *transformer = alloc.New(kGreedyInline, *caller, *callee, *callNode, dumpDetail, cg); std::vector newCallInfo; - bool inlined = transformer->PerformInline(&newCallInfo); + bool inlined = transformer->PerformInline(callsite, &newCallInfo); if (dumpDetail && !newCallInfo.empty()) { LogInfo::MapleLogger() << "new call info:" << std::endl; for (auto *callInfo : newCallInfo) { @@ -353,6 +357,9 @@ void GInline::Inline() { LogInfo::MapleLogger() << "===== ginline begin =====" << std::endl; } BlockCallBackMgr::AddCallBack(UpdateEnclosingBlockCallback, nullptr); + if (!Options::ignoreHotAttr) { + RunExpandStage(); + } initSize = ComputeTotalSize(); curSize = initSize; maxSize = ComputeMaxSize(); @@ -370,6 +377,123 @@ void GInline::Inline() { } } +static constexpr uint32 kMaxExpandDepth = 5; +static constexpr uint32 kMaxCallerSize = 6000; + +uint32 GetThreshCalleeSize(uint32 depth) { + constexpr int32 maxThresh = 400; + constexpr int32 minThresh = 200; + constexpr int32 step = 100; + int32 adjusted = maxThresh - static_cast(depth) * step; + if (adjusted < minThresh) { + adjusted = minThresh; + } + return static_cast(adjusted); +} + +void PrintIndent(uint32 depth) { + uint32 indent = 2; + for (uint32 i = 0; i < depth * indent; ++i) { + LogInfo::MapleLogger() << ' '; + } +} + +void GInline::DoExpandFunc(MIRFunction &origCaller, const std::vector &infoVec, uint32 curDepth, + std::unordered_set &context) { + if (curDepth > kMaxExpandDepth) { + if (dumpDetail) { + LogInfo::MapleLogger() << "== reach max depth ==" << std::endl; + } + return; + } + if (infoVec.empty()) { + return; + } + (void)context.insert(&origCaller); + for (auto *callInfo : infoVec) { + auto *caller = callInfo->GetCaller(); + auto *callee = callInfo->GetCallee(); + if (dumpDetail) { + PrintIndent(curDepth); + callInfo->Dump(); + LogInfo::MapleLogger() << ", depth: " << curDepth; + } + auto calleeSize = GetFunctionStaticInsns(*callee); + auto maxCalleeSize = GetThreshCalleeSize(curDepth); + if (calleeSize > maxCalleeSize) { + if (dumpDetail) { + LogInfo::MapleLogger() << " [callee too big, size > " << maxCalleeSize << "]" << std::endl; + } + continue; + } + auto callerSize = GetFunctionStaticInsns(*caller); + if (callerSize > kMaxCallerSize) { + if (dumpDetail) { + LogInfo::MapleLogger() << " [caller too big, size > " << kMaxCallerSize << "]" << std::endl; + } + continue; + } + if (context.find(callee) != context.end()) { + // found cycle + if (dumpDetail) { + LogInfo::MapleLogger() << " [cycle]" << std::endl; + } + continue; + } + bool isUnlikelyCall = IsUnlikelyCallsite(*callInfo); + if (isUnlikelyCall) { + if (dumpDetail) { + LogInfo::MapleLogger() << " [unlikely]" << std::endl; + } + continue; + } + bool canInline = InlineAnalyzer::CanInline(*callInfo, *cg, 0); + if (!canInline) { + if (dumpDetail) { + const char *failedStr = GetInlineFailedStr(callInfo->GetInlineFailedCode()); + LogInfo::MapleLogger() << " [can not inline] " << failedStr << std::endl; + } + continue; + } + if (dumpDetail) { + LogInfo::MapleLogger() << " [OK]" << std::endl; + } + CallNode *callNode = static_cast(callInfo->GetCallStmt()); + InlineTransformer transformer(kGreedyInline, *caller, *callee, *callNode, true, cg); + std::vector newCallInfos; + (void)transformer.PerformInline(callInfo, &newCallInfos); + DoExpandFunc(*callee, newCallInfos, curDepth + 1, context); + } + (void)context.erase(&origCaller); +} + +void GInline::ExpandFunc(MIRFunction &func) { + if (dumpDetail) { + LogInfo::MapleLogger() << "Expand func " << func.GetName() << std::endl; + } + CGNode *node = cg->GetCGNode(&func); + CHECK_NULL_FATAL(node); + std::vector infoVec; + for (const auto &pair : node->GetCallee()) { + infoVec.push_back(pair.first); + } + std::unordered_set context; + DoExpandFunc(func, infoVec, 0, context); +} + +void GInline::RunExpandStage() { + const MapleVector*> &topVec = cg->GetSCCTopVec(); + for (auto it = topVec.begin(); it != topVec.end(); ++it) { + for (CGNode *node : (*it)->GetNodes()) { + auto *func = node->GetMIRFunction(); + if (!func->GetAttr(FUNCATTR_hot)) { + continue; + } + ExpandFunc(*func); + } + } +} + void GInline::TryInlineToAllCallers() { const MapleVector*> &topVec = cg->GetSCCTopVec(); for (auto it = topVec.rbegin(); it != topVec.rend(); ++it) { @@ -399,7 +523,7 @@ void GInline::TryInlineToAllCallers(const CGNode &calleeCgNode) { CallNode *callNode = static_cast(callInfo->GetCallStmt()); auto *transformer = alloc.New(kGreedyInline, *caller, *callee, *callNode, true, cg); std::vector newCallInfos; - (void)transformer->PerformInline(&newCallInfos); + (void)transformer->PerformInline(callInfo, &newCallInfos); } } diff --git a/src/mapleall/mpl2mpl/src/inline.cpp b/src/mapleall/mpl2mpl/src/inline.cpp index 50ac42ef00360033dec66ad99658d5ddbe33bbd6..48b41a30fd0938947bfdfe8bd6d02717c9a42481 100644 --- a/src/mapleall/mpl2mpl/src/inline.cpp +++ b/src/mapleall/mpl2mpl/src/inline.cpp @@ -47,6 +47,35 @@ static uint32 GetNumStmtsOfFunc(const MIRFunction &func) { return stmtNodes.back().GetStmtID() - stmtNodes.front().GetStmtID(); } +bool MayBeOverwritten(const MIRFunction &func) { + if (!Options::symbolInterposition) { + return false; + } + if (func.IsStatic()) { + return false; + } + if (func.GetAttr(FUNCATTR_always_inline)) { + return false; + } + if (IsInlineDefinition(func) || IsExternGnuInline(func)) { + return false; + } + // for now, we only take pic&pie into account. + if (opts::fpic.IsEnabledByUser() || opts::fPIC.IsEnabledByUser()) { + /* To avoid fpie mode being modified twice, need to ensure fpie is not opened. */ + if (!opts::fpie && !opts::fpie.IsEnabledByUser() && !opts::fPIE.IsEnabledByUser() && !opts::fPIE) { + if (opts::fPIC && opts::fPIC.IsEnabledByUser()) { + return true; + } else if (opts::fpic && opts::fpic.IsEnabledByUser()) { + return true; + } else { + return false; + } + } + } + return false; +} + void MInline::Init() { InitParams(); if (inlineWithProfile) { @@ -311,10 +340,7 @@ void MInline::InlineCalls(CGNode &node) { if (func == nullptr || func->GetBody() == nullptr || func->IsFromMpltInline()) { return; } - // The caller is big enough, we don't inline any callees more - if (GetNumStmtsOfFunc(*func) > kBigFuncNumStmts) { - return; - } + isCurrCallerTooBig = GetNumStmtsOfFunc(*func) > kBigFuncNumStmts; bool changed = false; do { changed = false; @@ -376,17 +402,11 @@ void MInline::InlineCallsBlock(MIRFunction &func, BlockNode &enclosingBlk, BaseN } else if (baseNode.GetOpCode() == OP_callassigned || baseNode.GetOpCode() == OP_call || baseNode.GetOpCode() == OP_virtualcallassigned || baseNode.GetOpCode() == OP_superclasscallassigned || baseNode.GetOpCode() == OP_interfacecallassigned) { - CallNode &callStmt = static_cast(baseNode); if (onlyForAlwaysInline) { AlwaysInlineCallsBlockInternal(func, baseNode, changed); return; } - MIRFunction *callee = GlobalTables::GetFunctionTable().GetFunctionFromPuidx(callStmt.GetPUIdx()); - // tail call opt should not prevent inlinings that must be performed (such as extern gnu_inline). - if (!IsExternGnuInline(*callee) && SuitableForTailCallOpt(prevStmt, static_cast(baseNode), callStmt)) { - return; - } - InlineCallsBlockInternal(func, baseNode, changed); + InlineCallsBlockInternal(func, baseNode, changed, prevStmt); } else if (baseNode.GetOpCode() == OP_doloop) { BlockNode *blk = static_cast(baseNode).GetDoBody(); InlineCallsBlock(func, enclosingBlk, *blk, changed, baseNode); @@ -531,12 +551,18 @@ static inline void DumpCallsiteAndLoc(const MIRFunction &caller, const MIRFuncti LogInfo::MapleLogger() << callee.GetName() << " to " << caller.GetName() << " (line " << lineNum << ")\n"; } +void MInline::EndsInliningWithFailure(const std::string &failReason, const MIRFunction &caller, + const MIRFunction &callee, const CallNode &callStmt) const { + if (dumpDetail) { + LogInfo::MapleLogger() << "[INLINE_FAILED] " << "[" << failReason << "] "; + DumpCallsiteAndLoc(caller, callee, callStmt); + } +} + void MInline::AlwaysInlineCallsBlockInternal(MIRFunction &func, BaseNode &baseNode, bool &changed) { CallNode &callStmt = static_cast(baseNode); MIRFunction *callee = GlobalTables::GetFunctionTable().GetFunctionFromPuidx(callStmt.GetPUIdx()); - // For performance reasons, we only inline functions marked as always_inline that must be deleted. - if (callee->GetAttr(FUNCATTR_always_inline) && FuncMustBeDeleted(*callee) && - callee != &func) { // "self-recursive always_inline" won't be performed + if (InlineAnalyzer::MustInline(func, *callee)) { module.SetCurFunction(&func); if (dumpDetail && dumpFunc == func.GetName()) { LogInfo::MapleLogger() << "[always_inline] "; @@ -551,9 +577,20 @@ void MInline::AlwaysInlineCallsBlockInternal(MIRFunction &func, BaseNode &baseNo } } -void MInline::InlineCallsBlockInternal(MIRFunction &func, BaseNode &baseNode, bool &changed) { +void MInline::InlineCallsBlockInternal(MIRFunction &func, BaseNode &baseNode, bool &changed, BaseNode &prevStmt) { CallNode &callStmt = static_cast(baseNode); MIRFunction *callee = GlobalTables::GetFunctionTable().GetFunctionFromPuidx(callStmt.GetPUIdx()); + // In some cases we obviously don't want to inline, but should never violate the "MUST INLINE" rule + if (!InlineAnalyzer::MustInline(func, *callee, currInlineDepth, true)) { + if (isCurrCallerTooBig) { + EndsInliningWithFailure("caller is big enough", func, *callee, callStmt); + return; + } + if (SuitableForTailCallOpt(prevStmt, static_cast(baseNode), callStmt)) { + EndsInliningWithFailure("callee is suitable for tailcall opt", func, *callee, callStmt); + return; + } + } CGNode *cgNode = cg->GetCGNode(&func); CHECK_NULL_FATAL(cgNode); CallInfo *callInfo = cgNode->GetCallInfo(callStmt); @@ -610,10 +647,7 @@ void MInline::InlineCallsBlockInternal(MIRFunction &func, BaseNode &baseNode, bo } } } else { - if (dumpDetail) { - LogInfo::MapleLogger() << "[INLINE_FAILED] " << "[" << result.reason << "] "; - DumpCallsiteAndLoc(func, *callee, callStmt); - } + EndsInliningWithFailure(result.reason, func, *callee, callStmt); } } diff --git a/src/mapleall/mpl2mpl/src/inline_analyzer.cpp b/src/mapleall/mpl2mpl/src/inline_analyzer.cpp index b77f6533bac4b9596644e7e7f455bba4e2c62f1d..e42a6d95278621fd3a262e99067e2045fdb95107 100644 --- a/src/mapleall/mpl2mpl/src/inline_analyzer.cpp +++ b/src/mapleall/mpl2mpl/src/inline_analyzer.cpp @@ -22,6 +22,7 @@ #include "inline_transformer.h" #include "inline_summary.h" #include "inline.h" +#include "driver_options.h" namespace maple { static bool IsOrContainsAddrofLabel(const MIRConst &mirConst) { @@ -476,6 +477,42 @@ bool InlineAnalyzer::SizeWillGrow(const CGNode &calleeNode, const CallGraph &cg) return EstimateGrowthIfInlinedToAllCallers(calleeNode, cg, nullptr).second > 0; } +bool InlineAnalyzer::CheckPreferInline(const CallNode &callStmt, bool &status) { + if (callStmt.GetPragmas()->empty()) { + return false; + } + auto &pragmas = GlobalTables::GetGPragmaTable().GetPragmaTable(); + for (auto pragmaId : *callStmt.GetPragmas()) { + auto *pragma = pragmas[pragmaId]; + if (pragma->GetKind() != CPragmaKind::PRAGMA_prefer_inline) { + continue; + } + status = static_cast(pragma)->GetStatus(); + return true; + } + return false; +} + +// To be improved: Move more must inline scenarios from `CanInlineImpl` to here +bool InlineAnalyzer::MustInline(const MIRFunction &caller, const MIRFunction &callee, uint32 depth, bool earlyInline) { + // "self-recursive always_inline" won't be performed + if (&callee == &caller) { + return false; + } + + // func with always_inline & must be deleted, should do inline + if (callee.GetAttr(FUNCATTR_always_inline) && FuncMustBeDeleted(callee)) { + return true; + } + + // kIfcExternGnuInlineCalleeDepth0 also should be inlined for improving performance + if (Options::O2 && IsExternGnuInline(callee) && earlyInline && depth == 0) { + return true; + } + + return false; +} + std::pair InlineAnalyzer::CanInlineImpl(std::pair callPair, const CallNode &callStmt, const CallGraph &cg, uint32 depth, bool earlyInline) { const MIRFunction &caller = *callPair.first; @@ -483,6 +520,9 @@ std::pair InlineAnalyzer::CanInlineImpl(std::pair InlineAnalyzer::CanInlineImpl(std::pairGetInlineFailedCode(); auto codeType = GetInlineFailedType(codeFromSummary); @@ -625,12 +675,42 @@ bool InlineAnalyzer::CanInline(CallInfo &callInfo, const CallGraph &cg, uint32 d return canInline; } -static bool ObviouselyNotInline(const MIRFunction &caller, const MIRFunction &callee) { +bool IsUnlikelyCallsite(const CallInfo &callInfo) { + if (callInfo.GetCallTemp() == CGTemp::kCold) { + return true; + } + auto *callerSummary = callInfo.GetCaller()->GetInlineSummary(); + if (callerSummary == nullptr) { + return false; + } + auto *edgeSummary = callerSummary->GetEdgeSummary(callInfo.GetCallStmt()->GetStmtID()); + if (edgeSummary == nullptr) { + return false; + } + return edgeSummary->GetAttr(CallsiteAttrKind::kUnlikely); +} + +static constexpr double bigFreq = 14.0; +static constexpr uint32 callerThreshBigFreq = 800; +static constexpr uint32 calleeThreshBigFreq = 65; + +static void MayAdjustThreshold(double freq, uint32 &callerThresh, uint32 &calleeThresh, uint32 &nonStaticThresh) { + if (freq <= bigFreq) { + return; + } + callerThresh = callerThreshBigFreq; + calleeThresh = calleeThreshBigFreq; + nonStaticThresh = calleeThresh; +} + +static bool ObviouslyNotInline(const MIRFunction &caller, const MIRFunction &callee, double freq) { if (caller.IsInline() || &caller == &callee) { return true; } - constexpr int32 callerThresh = 170; - constexpr int32 calleeThresh = 40; + uint32 callerThresh = 170; + uint32 calleeThresh = 40; + uint32 nonStaticThresh = 10; + MayAdjustThreshold(freq, callerThresh, calleeThresh, nonStaticThresh); auto callerSize = GetFuncSize(caller); auto calleeSize = GetFuncSize(callee); if (!callerSize || callerSize > callerThresh) { @@ -639,8 +719,7 @@ static bool ObviouselyNotInline(const MIRFunction &caller, const MIRFunction &ca if (!calleeSize || calleeSize > calleeThresh) { return true; } - constexpr int32 nonStaticThresh = 10; - if (!callee.IsStatic() && callerSize >= nonStaticThresh) { + if (!callee.IsStatic() && calleeSize >= nonStaticThresh) { return true; } // callee with big switch will introduce too many control dependencies @@ -665,11 +744,22 @@ static int32 GetAllowedMaxScore(const BadnessInfo &badInfo) { return allowedMaxScore; } +constexpr uint32 kCallerSizeNeverIgnoreGrow = 2000; // Fine tuning is possible here + // If input badInfo is null, badInfo will be recomputed bool IgnoreNonDeclaredInlineSizeGrow(CallInfo &callInfo, const CallGraph &cg, const BadnessInfo *inputBadInfo) { auto *caller = callInfo.GetCaller(); + auto callerSize = GetFuncSize(*caller); + if (callerSize && callerSize > kCallerSizeNeverIgnoreGrow) { + // Never ignore size grow for so huge caller, even for callsites with hot temperature + return false; + } + if (callInfo.GetCallTemp() == CGTemp::kHot) { + return true; // Ignore size grow for hot callsites + } auto *callee = callInfo.GetCallee(); - if (ObviouselyNotInline(*caller, *callee)) { + auto freq = GetCallFreqPercent(callInfo); + if (ObviouslyNotInline(*caller, *callee, freq)) { return false; } @@ -677,6 +767,7 @@ bool IgnoreNonDeclaredInlineSizeGrow(CallInfo &callInfo, const CallGraph &cg, co constexpr double bigSpeedup = 0.09; constexpr double maxAllowBadness = -1.0e-8; constexpr double freqLimit = 0.4; + constexpr double freqBonus = 10.0; // recompute badInfo if needed BadnessInfo tmpBadInfo; @@ -688,8 +779,10 @@ bool IgnoreNonDeclaredInlineSizeGrow(CallInfo &callInfo, const CallGraph &cg, co int32 score = 0; // the higher the score, the less inclined to inline int32 allowedMaxScore = GetAllowedMaxScore(*badInfo); - if (GetCallFreqPercent(callInfo) < freqLimit) { + if (freq < freqLimit) { ++score; + } else if (freq > freqBonus) { + --score; } if (badInfo->growth > growthLimit) { ++score; @@ -823,22 +916,22 @@ std::optional GetFuncSize(const MIRFunction &func) { } // called before performing inline -bool CalleeCanBeRemovedIfInlined(const CallInfo &info, const CallGraph &cg) { - auto &callee = info.GetCallee(); - auto *calleeNode = cg.GetCGNode(&callee); +bool CalleeCanBeRemovedIfInlined(CallInfo &info, const CallGraph &cg) { + auto *callee = info.GetCallee(); + auto *calleeNode = cg.GetCGNode(callee); CHECK_NULL_FATAL(calleeNode); bool calledOnce = calleeNode->NumberOfUses() == 1 && calleeNode->NumReferences() == 1 && !calleeNode->IsAddrTaken(); if (!calledOnce) { return false; } - bool localAccess = callee.IsStatic() || (callee.IsInline() && !callee.IsExtern()); + bool localAccess = callee->IsStatic() || (callee->IsInline() && !callee->IsExtern()); return localAccess; } double ComputeUninlinedTimeCost(const CallInfo &callInfo, double callFreqPercent) { auto *callerSummary = callInfo.GetCaller()->GetInlineSummary(); CHECK_NULL_FATAL(callerSummary); - auto *calleeSummary = callInfo.GetCallee().GetInlineSummary(); + auto *calleeSummary = callInfo.GetCallee()->GetInlineSummary(); CHECK_NULL_FATAL(calleeSummary); // `callerTime` includes time for preparing call const double callerTime = callerSummary->GetStaticCycles(); @@ -868,7 +961,7 @@ double ComputeInlinedTimeCost(CallInfo &callInfo, NumCycles inlinedCalleeTime) { } double result = callerTime + inlinedCalleeTime * CallFreqPercent(callFreq) - callStmtCycles * CallFreqPercent(callFreq); - CHECK_FATAL(result >= 0, "overflow?"); + CHECK_FATAL(inlinedCalleeTime < callStmtCycles || result >= 0, "overflow?"); return result; } @@ -896,6 +989,26 @@ static int32 ComputeOverallFactor(int32 overallGrowth) { return overallFactor; } +static inline double DoScaleBadness(double badness, uint32 factor, bool scaleDown) { + if (factor == 0) { + return badness; // Avoid dividing badness by 0 + } + if (scaleDown) { + badness = (badness > 0 ? badness / factor : badness * factor); + } else { + badness = (badness > 0 ? badness * factor : badness / factor); + } + return badness; +} + +static inline double ScaleDownBadness(double badness, uint32 factor) { + return DoScaleBadness(badness, factor, true); +} + +static inline double ScaleUpBadness(double badness, uint32 factor) { + return DoScaleBadness(badness, factor, false); +} + // + callee cost; - callstmt cost. void CalcBadnessImpl(CallInfo &info, const CallGraph &cg, BadnessInfo &outBadInfo) { BadnessInfo *badInfo = &outBadInfo; @@ -923,20 +1036,26 @@ void CalcBadnessImpl(CallInfo &info, const CallGraph &cg, BadnessInfo &outBadInf CHECK_FATAL(timeSaved >= 0, "should be"); double scaledTimeSaved = ScaleTimeSaved(timeSaved); - auto *calleeNode = cg.GetCGNode(info.GetCallee()); + MIRFunction *calleeFunc = info.GetCallee(); + auto *calleeNode = cg.GetCGNode(calleeFunc); int32 overallGrowth = EstimateGrowthIfInlinedToAllCallers(*calleeNode, cg, nullptr).second; int32 overallFactor = ComputeOverallFactor(overallGrowth); auto badness = -scaledTimeSaved / (static_cast(sizeGrowth) * combinedSize * overallFactor); badInfo->origBadness = badness; badInfo->overallGrowth = overallGrowth; - if (info.GetCallee()->GetAttr(FUNCATTR_inline)) { - // decrease badness for decalared_inline callee - constexpr int32 factor = 4; - if (badness > 0) { - badness /= factor; - } else { - badness *= factor; - } + if (calleeFunc->GetAttr(FUNCATTR_inline)) { + // Scale down badness for decalared_inline callee + constexpr uint32 factor = 4; + badness = ScaleDownBadness(badness, factor); + } + if (info.GetCallTemp() == CGTemp::kHot) { + // Scale down badness for hot callsites + constexpr uint32 factorForHot = 2000; // Fine tuning for the threshold is possible + badness = ScaleDownBadness(badness, factorForHot); + } + if (IsUnlikelyCallsite(info)) { + constexpr uint32 factorForUnlikely = 10; + badness = ScaleUpBadness(badness, factorForUnlikely); } badInfo->badness = badness; } diff --git a/src/mapleall/mpl2mpl/src/inline_summary.cpp b/src/mapleall/mpl2mpl/src/inline_summary.cpp index e93b15bbc01a0071110f5c152e97273d357f89c4..c89ac5abd95f6d372d0ae8a17356a7ab2df6affb 100644 --- a/src/mapleall/mpl2mpl/src/inline_summary.cpp +++ b/src/mapleall/mpl2mpl/src/inline_summary.cpp @@ -687,7 +687,7 @@ void InlineSummary::MergeEdgeSummary(const InlineSummary &fromSummary, if (newFrequency == -1 || callBBFreq == -1) { newFrequency = -1; } else { - newFrequency = static_cast(callBBFreq * newFrequency / static_cast(kFreqBase)); + newFrequency = static_cast(callBBFreq * newFrequency / static_cast(kCallFreqBase)); if (newFrequency > kCallFreqMax) { newFrequency = kCallFreqMax; } @@ -870,6 +870,34 @@ void InlineSummaryCollector::CollectArgInfo(MeFunction &meFunc) { } } +static void GetAllDomChildren(Dominance &dom, uint32 bbId, std::vector &allChildren) { + const auto &children = dom.GetDomChildren(bbId); + for (auto id : children) { + allChildren.push_back(id); + GetAllDomChildren(dom, id, allChildren); + } +} + +void InlineSummaryCollector::InitUnlikelyBBs() { + const auto &rpoBBs = dom.GetReversePostOrder(); + for (auto *node : rpoBBs) { + if (node == nullptr || node->GetID() <= 1) { + continue; + } + auto *bb = func->GetCfg()->GetBBFromID(BBId(node->GetID())); + if (!bb->IsImmediateUnlikelyBB(&dom)) { + continue; + } + (void)unlikelyBBs.insert(bb); + std::vector allChildren; + GetAllDomChildren(dom, bb->GetID(), allChildren); + for (auto id : allChildren) { + auto *child = func->GetCfg()->GetBBFromID(BBId(id)); + (void)unlikelyBBs.insert(child); + } + } +} + // First iteration: compute succ edge predicate for condgoto bb and switch bb void InlineSummaryCollector::ComputeEdgePredicate() { uint32 numBBs = func->GetCfg()->NumBBs(); @@ -997,7 +1025,7 @@ static void InlineAnalysisForCallStmt(const CallMeStmt &callStmt, const MIRFunct } std::pair InlineSummaryCollector::AnalyzeCondCostForStmt(MeStmt &stmt, int32 callFrequency, - const Predicate *bbPredClone, const BBPredicate &bbPredicate) { + const Predicate *bbPredClone, const BBPredicate &bbPredicate, bool isUnlikelyBB) { Opcode op = stmt.GetOp(); const auto stmtInsns = stmtCostAnalyzer.EstimateNumInsns(&stmt); // Estimated number of instructions const auto stmtCycles = stmtCostAnalyzer.EstimateNumCycles(&stmt); @@ -1016,11 +1044,15 @@ std::pair InlineSummaryCollector::AnalyzeCondCostForStmt(MeStmt & } // Init inline edge summary // Does edge summary need loop depth info of callBB? - inlineSummary->AddEdgeSummary(stmt.GetMeStmtId(), bbPredClone, callFrequency, stmtInsns, stmtCycles); + auto newEdgeSummary = + inlineSummary->AddEdgeSummary(stmt.GetMeStmtId(), bbPredClone, callFrequency, stmtInsns, stmtCycles); + if (newEdgeSummary != nullptr && isUnlikelyBB) { + newEdgeSummary->SetAttr(CallsiteAttrKind::kUnlikely); + } InlineAnalysisForCallStmt(static_cast(stmt), *func->GetMirFunc(), *inlineSummary); } else if (op == OP_switch) { auto &switchStmt = static_cast(stmt); - constexpr size_t numSwitchCases = 4; + constexpr size_t numSwitchCases = 8; if (switchStmt.GetSwitchTable().size() >= numSwitchCases) { inlineSummary->SetHasBigSwitch(true); } @@ -1051,6 +1083,7 @@ void InlineSummaryCollector::ComputeConditionalCost() { continue; } auto bb = func->GetCfg()->GetBBFromID(BBId(node->GetID())); + bool isUnlikelyBB = (unlikelyBBs.find(bb) != unlikelyBBs.end()); BBPredicate *bbPredicate = allBBPred[bb->GetBBId()]; const Predicate *bbPredClone = nullptr; if (debug) { @@ -1067,7 +1100,7 @@ void InlineSummaryCollector::ComputeConditionalCost() { stmt = next; continue; } - auto cost = AnalyzeCondCostForStmt(*stmt, callFrequency, bbPredClone, *bbPredicate); + auto cost = AnalyzeCondCostForStmt(*stmt, callFrequency, bbPredClone, *bbPredicate, isUnlikelyBB); // Record static cost const auto stmtInsns = cost.first; const auto stmtCyclesWithFreq = cost.second; diff --git a/src/mapleall/mpl2mpl/src/inline_transformer.cpp b/src/mapleall/mpl2mpl/src/inline_transformer.cpp index e285d72cb32894b9403d4123ccaea418a4c941e4..a7ba2e69ed057d0ab9efd5aa8199de5d50d302ad 100644 --- a/src/mapleall/mpl2mpl/src/inline_transformer.cpp +++ b/src/mapleall/mpl2mpl/src/inline_transformer.cpp @@ -21,6 +21,7 @@ #include "global_tables.h" #include "mpl_logging.h" #include "inline_summary.h" +#include "inline_analyzer.h" namespace maple { // This phase replaces a function call site with the body of the called function. @@ -39,6 +40,7 @@ namespace maple { struct CallStmtIdMap : public CallBackData { // we did not override CallBackData::Free() because callIdMap is managed by caller std::map callIdMap; + std::map reverseCallIdMap; }; void RecordCallStmtIdMap(const BlockNode &oldBlock, BlockNode &newBlock, const StmtNode &oldStmt, @@ -51,6 +53,8 @@ void RecordCallStmtIdMap(const BlockNode &oldBlock, BlockNode &newBlock, const S CHECK_NULL_FATAL(data); auto &callIdMap = static_cast(data)->callIdMap; (void)callIdMap.emplace(oldStmt.GetStmtID(), newStmt.GetStmtID()); + auto &reverseCallIdMap = static_cast(data)->reverseCallIdMap; + (void)reverseCallIdMap.emplace(newStmt.GetStmtID(), oldStmt.GetStmtID()); } void UpdateEnclosingBlockCallback(const BlockNode &oldBlock, BlockNode &newBlock, const StmtNode &oldStmt, @@ -565,6 +569,14 @@ void DoReplaceConstFormal(const MIRFunction &caller, BaseNode &parent, uint32 op auto *constExpr = theMIRModule->CurFuncCodeMemPool()->New(mirConst->GetType().GetPrimType(), mirConst); parent.SetOpnd(constExpr, opndIdx); + } else if (realArg.kind == RealArgPropCandKind::kExpr) { + if (expr.GetOpCode() == OP_addrof) { + auto &addrOf = static_cast(expr); + auto stFullIdx = static_cast(realArg.data.expr)->GetStIdx().FullIdx(); + addrOf.SetStFullIdx(stFullIdx); + } else { + parent.SetOpnd(realArg.data.expr, opndIdx); + } } } @@ -589,6 +601,12 @@ void InlineTransformer::TryReplaceConstFormalWithRealArg(BaseNode &parent, uint3 if (regread.GetRegIdx() == newIdx) { DoReplaceConstFormal(caller, parent, opndIdx, expr, realArg); } + } else if (op == OP_addrof && formal.IsVar() && callee.GetAttr(FUNCATTR_like_macro)) { + auto &addrOf = static_cast(expr); + uint32 newIdx = formal.GetStIndex() + stIdxOff; + if (addrOf.GetStIdx().Islocal() && addrOf.GetStIdx().Idx() == newIdx) { + DoReplaceConstFormal(caller, parent, opndIdx, expr, realArg); + } } } @@ -609,22 +627,26 @@ void InlineTransformer::PropConstFormalInBlock(BlockNode &newBody, MIRSymbol &fo for (auto &stmt : newBody.GetStmtNodes()) { switch (stmt.GetOpCode()) { case OP_foreachelem: { + PropConstFormalInNode(stmt, formal, realArg, stIdxOff, regIdxOff); auto *subBody = static_cast(stmt).GetLoopBody(); PropConstFormalInBlock(*subBody, formal, realArg, stIdxOff, regIdxOff); break; } case OP_doloop: { + PropConstFormalInNode(stmt, formal, realArg, stIdxOff, regIdxOff); auto *subBody = static_cast(stmt).GetDoBody(); PropConstFormalInBlock(*subBody, formal, realArg, stIdxOff, regIdxOff); break; } case OP_dowhile: case OP_while: { + PropConstFormalInNode(stmt, formal, realArg, stIdxOff, regIdxOff); auto *subBody = static_cast(stmt).GetBody(); PropConstFormalInBlock(*subBody, formal, realArg, stIdxOff, regIdxOff); break; } case OP_if: { + PropConstFormalInNode(stmt, formal, realArg, stIdxOff, regIdxOff); IfStmtNode &ifStmt = static_cast(stmt); PropConstFormalInBlock(*ifStmt.GetThenPart(), formal, realArg, stIdxOff, regIdxOff); if (ifStmt.GetElsePart() != nullptr) { @@ -680,10 +702,13 @@ void InlineTransformer::AssignActualToFormal(BlockNode &newBody, uint32 stIdxOff // The parameter `argExpr` is a real argument of a callStmt in the `caller`. // This function checks whether `argExpr` is a candidate of propagable argument. -void RealArgPropCand::Parse(MIRFunction &caller, BaseNode &argExpr) { +void RealArgPropCand::Parse(MIRFunction &caller, bool calleeIsLikeMacro, BaseNode &argExpr) { kind = RealArgPropCandKind::kUnknown; // reset kind Opcode op = argExpr.GetOpCode(); - if (op == OP_constval) { + if (calleeIsLikeMacro) { + kind = RealArgPropCandKind::kExpr; + data.expr = &argExpr; + } else if (op == OP_constval) { auto *constVal = static_cast(argExpr).GetConstVal(); kind = RealArgPropCandKind::kConst; data.mirConst = constVal; @@ -719,13 +744,21 @@ void InlineTransformer::AssignActualsToFormals(BlockNode &newBody, uint32 stIdxO CHECK_NULL_FATAL(formal); // Try to prop const value/symbol of real argument to const formal RealArgPropCand realArg; - realArg.Parse(caller, *currBaseNode); - if (formal->GetAttr(ATTR_const) && realArg.kind != RealArgPropCandKind::kUnknown && + bool calleeIsLikeMacro = callee.GetAttr(FUNCATTR_like_macro); + realArg.Parse(caller, calleeIsLikeMacro, *currBaseNode); + bool needSecondAssign = true; + if ((formal->GetAttr(ATTR_const) || calleeIsLikeMacro) && + realArg.kind != RealArgPropCandKind::kUnknown && // Type consistency check can be relaxed further formal->GetType()->GetPrimType() == realArg.GetPrimType()) { PropConstFormalInBlock(newBody, *formal, realArg, stIdxOff, regIdxOff); + } else { + AssignActualToFormal(newBody, stIdxOff, regIdxOff, *currBaseNode, *formal); + needSecondAssign = false; + } + if (needSecondAssign && !calleeIsLikeMacro) { + AssignActualToFormal(newBody, stIdxOff, regIdxOff, *currBaseNode, *formal); } - AssignActualToFormal(newBody, stIdxOff, regIdxOff, *currBaseNode, *formal); if (updateFreq) { caller.GetFuncProfData()->CopyStmtFreq(newBody.GetFirst()->GetStmtID(), callStmt.GetStmtID()); } @@ -778,6 +811,20 @@ void InlineTransformer::HandleReturn(BlockNode &newBody) { void InlineTransformer::ReplaceCalleeBody(BlockNode &enclosingBlock, BlockNode &newBody) { // begin inlining function if (!Options::noComment) { + if (callee.GetAttr(FUNCATTR_like_macro) && callStmt.GetNext()->GetOpCode() == OP_dassign) { + DassignNode *dassignNode = static_cast(callStmt.GetNext()); + if (dassignNode->GetRHS()->GetOpCode() == OP_dread) { + DreadNode *dreadNode = static_cast(dassignNode->GetRHS()); + StIdx idx = dreadNode->GetStIdx(); + if (idx.Islocal()) { + MIRSymbol *symbol = builder.GetMirModule().CurFunction()->GetLocalOrGlobalSymbol(idx); + CHECK_FATAL(symbol != nullptr, "symbol is nullptr."); + if (symbol->IsReturnVar()) { + callStmt.GetNext()->SetIgnoreCost(); + } + } + } + } MapleString beginCmt(theMIRModule->CurFuncCodeMemPool()); if (theMIRModule->firstInline) { beginCmt += kInlineBeginComment; @@ -865,8 +912,23 @@ void RecordCallId(BaseNode &baseNode, std::map &callMeStmtIdMap) } } +void UpdateNewCallInfo(CallInfo *callInfo, std::vector *newCallInfo) { + if (newCallInfo == nullptr) { + return; + } + CHECK_NULL_FATAL(callInfo); + auto newDepth = callInfo->GetLoopDepth() + 1; + bool isOldEdgeUnlikely = IsUnlikelyCallsite(*callInfo); + for (auto *newInfo : *newCallInfo) { + if (isOldEdgeUnlikely) { + newInfo->SetCallTemp(CGTemp::kCold); + } + newInfo->SetLoopDepth(newDepth); + } +} + // Inline CALLEE into CALLER. -bool InlineTransformer::PerformInline(std::vector *newCallInfo) { +bool InlineTransformer::PerformInline(CallInfo *callInfo, std::vector *newCallInfo) { if (callee.IsEmpty()) { enclosingBlk.RemoveStmt(&callStmt); return false; @@ -882,12 +944,14 @@ bool InlineTransformer::PerformInline(std::vector *newCallInfo) { // multiple definition for these static symbols ConvertPStaticToFStatic(callee); // Step 1: Clone CALLEE's body. - // Record callStmtId mapping from callee orig body to callee cloned body for merging inline summary + // callIdMap: mapping from callee orig body to callee cloned body for merging inline summary + // reverseCallIdMap: mapping from callee cloned body to callee orig body CallStmtIdMap mapWrapper; if (stage == kGreedyInline) { BlockCallBackMgr::AddCallBack(RecordCallStmtIdMap, &mapWrapper); } const std::map &callIdMap = mapWrapper.callIdMap; + const std::map &reverseCallIdMap = mapWrapper.reverseCallIdMap; BlockNode *newBody = GetClonedCalleeBody(); CHECK_NULL_FATAL(newBody); if (stage == kGreedyInline) { @@ -916,7 +980,8 @@ bool InlineTransformer::PerformInline(std::vector *newCallInfo) { UpdateEnclosingBlock(*newBody); if (stage == kGreedyInline) { // Create new edges - CollectNewCallInfo(newBody, newCallInfo); + CollectNewCallInfo(newBody, newCallInfo, reverseCallIdMap); + UpdateNewCallInfo(callInfo, newCallInfo); // and delete the inlined edge. auto *callerNode = cg->GetCGNode(&caller); CHECK_NULL_FATAL(callerNode); @@ -940,14 +1005,15 @@ bool InlineTransformer::PerformInline(std::vector *newCallInfo) { return true; } -void InlineTransformer::CollectNewCallInfo(BaseNode *node, std::vector *newCallInfo) const { +void InlineTransformer::CollectNewCallInfo(BaseNode *node, std::vector *newCallInfo, + const std::map &reverseCallIdMap) const { if (node == nullptr) { return; } if (node->GetOpCode() == OP_block) { auto *block = static_cast(node); for (auto &stmt : block->GetStmtNodes()) { - CollectNewCallInfo(&stmt, newCallInfo); + CollectNewCallInfo(&stmt, newCallInfo, reverseCallIdMap); } } else if (node->GetOpCode() == OP_callassigned || node->GetOpCode() == OP_call) { CallNode *callNode = static_cast(node); @@ -955,7 +1021,19 @@ void InlineTransformer::CollectNewCallInfo(BaseNode *node, std::vectorGetPUIdx()); CGNode *cgCallee = cg->GetCGNode(newCallee); CGNode *cgCaller = cg->GetCGNode(&caller); + CGNode *oldCgCallee = cg->GetCGNode(&callee); + auto it = reverseCallIdMap.find(callNode->GetStmtID()); + CHECK_FATAL(it != reverseCallIdMap.end(), "error map"); + auto oldCallInfo = oldCgCallee->GetCallInfoByStmtId(it->second); + CHECK_NULL_FATAL(oldCallInfo); auto *callInfo = cg->AddCallsite(kCallTypeCall, *cgCaller, *cgCallee, *callNode); + if (IsUnlikelyCallsite(*oldCallInfo)) { + callInfo->SetCallTemp(CGTemp::kCold); + } + // Update hot callsites + if (cgCaller->GetFuncTemp() == CGTemp::kHot && cgCallee->GetFuncTemp() == CGTemp::kHot) { + callInfo->SetCallTemp(CGTemp::kHot); + } if (newCallInfo != nullptr) { newCallInfo->push_back(callInfo); } @@ -963,7 +1041,7 @@ void InlineTransformer::CollectNewCallInfo(BaseNode *node, std::vectorNumOpnds(); ++i) { - CollectNewCallInfo(node->Opnd(i), newCallInfo); + CollectNewCallInfo(node->Opnd(i), newCallInfo, reverseCallIdMap); } } diff --git a/src/mapleall/mpl2mpl/src/module_phase_manager.cpp b/src/mapleall/mpl2mpl/src/module_phase_manager.cpp index a14504b582539ad44cbe517cb9f58d11fb46ad24..0b262c018273df9d05726b036231c2f82725e2d5 100644 --- a/src/mapleall/mpl2mpl/src/module_phase_manager.cpp +++ b/src/mapleall/mpl2mpl/src/module_phase_manager.cpp @@ -83,6 +83,7 @@ void MEBETopLevelManager::Run(maple::MIRModule &mod) { if (mod.IsJavaModule()) { Options::sideEffectWhiteList = true; } + InitFuncDescWithWhiteList(mod); auto admMempool = AllocateMemPoolInPhaseManager("MEBETopLevelManager's Analysis Data Manager mempool"); auto *serialADM = GetManagerMemPool()->New(*(admMempool.get())); diff --git a/src/mapleall/mpl2mpl/src/simplify.cpp b/src/mapleall/mpl2mpl/src/simplify.cpp index c4791a038b1f3da75f750106f8bf967ba80aa07c..29c7de3c8b9c21dab89b669141e4b8668ff6444b 100644 --- a/src/mapleall/mpl2mpl/src/simplify.cpp +++ b/src/mapleall/mpl2mpl/src/simplify.cpp @@ -130,8 +130,9 @@ bool Simplify::IsMathSqrt(const std::string funcName) { } bool Simplify::IsMathAbs(const std::string funcName) { - return (mirMod.IsCModule() && (strcmp(funcName.c_str(), kFuncNameOfMathAbs) == 0)) || - (mirMod.IsJavaModule() && (strcmp(funcName.c_str(), kFuncNamePrefixOfMathAbs) == 0)); + return !opts::oFnoBuiltin.IsEnabledByUser() && + ((mirMod.IsCModule() && (strcmp(funcName.c_str(), kFuncNameOfMathAbs) == 0)) || + (mirMod.IsJavaModule() && (strcmp(funcName.c_str(), kFuncNamePrefixOfMathAbs) == 0))); } bool Simplify::IsMathMax(const std::string funcName) { @@ -459,6 +460,13 @@ StmtNode *Simplify::SimplifyBitFieldWrite(const IassignNode &iass) const { } CHECK_NULL_FATAL(bfe.extractType); auto *newIvarType = GlobalTables::GetTypeTable().GetOrCreatePointerType(*bfe.extractType); + if (bfe.extractType->GetSize() != iass.GetLHSType()->GetSize()) { + auto tempType = MIRPtrType(bfe.extractType->GetTypeIndex(), bfe.extractType->GetPrimType()); + tempType.SetTypeAttrs(bfe.extractType->GetTypeAttrs()); + tempType.GetTypeAttrs().SetAttr(ATTR_may_alias); + auto newIvarTyIdx = GlobalTables::GetTypeTable().GetOrCreateMIRType(&tempType); + newIvarType = GlobalTables::GetTypeTable().GetTypeFromTyIdx(newIvarTyIdx); + } auto *base = iass.Opnd(0); MIRBuilder *mirBuiler = currFunc->GetModule()->GetMIRBuilder(); if (bfe.byteOffset != 0) { @@ -480,23 +488,64 @@ StmtNode *Simplify::SimplifyBitFieldWrite(const IassignNode &iass) const { return newIass; } +IreadNode *GetUnsafeAnchor(MIRBuilder &mirBuilder) { + MIRType *addrsType = GlobalTables::GetTypeTable().GetUInt64(); + MapleVector args0(mirBuilder.GetCurrentFuncCodeMpAllocator()->Adapter()); + IntrinsicopNode *threadPtr = nullptr; + threadPtr = mirBuilder.CreateExprIntrinsicop(INTRN_C___tls_get_thread_pointer, OP_intrinsicop, *addrsType, args0); + ConstvalNode *anchorOffset = mirBuilder.CreateIntConst(maplebe::offsetTbcReservedForX86, PTY_u64); + BinaryNode *subNode = mirBuilder.CreateExprBinary(OP_sub, PTY_u64, threadPtr, anchorOffset); + TypeCvtNode *cvtNode = mirBuilder.CreateExprTypeCvt(OP_cvt, PTY_ptr, PTY_u64, *subNode); + IreadNode *ireadNode = mirBuilder.CreateExprIread( + *addrsType, *(GlobalTables::GetTypeTable().GetOrCreatePointerType(*addrsType)), 0, cvtNode); + return ireadNode; +} + +IreadNode *GetSafeAnchor(MIRBuilder &mirBuilder) { + TypeTable &tab = GlobalTables::GetTypeTable(); + MIRType *addrsType = tab.GetUInt64(); + MapleVector args0(mirBuilder.GetCurrentFuncCodeMpAllocator()->Adapter()); + IntrinsicopNode *threadPtr = nullptr; + threadPtr = mirBuilder.CreateExprIntrinsicop(INTRN_C___tls_get_thread_pointer, OP_intrinsicop, *addrsType, args0); + TypeCvtNode *cvtNode = mirBuilder.CreateExprTypeCvt(OP_cvt, PTY_ptr, PTY_u64, *threadPtr); + IreadNode *ireadNode = mirBuilder.CreateExprIread( + PTY_u64, tab.GetOrCreatePointerType(*addrsType)->GetTypeIndex(), 0, cvtNode); + ConstvalNode *anchorOffset = mirBuilder.CreateIntConst(maplebe::offsetManualAnchorSymbol, PTY_u64); + BinaryNode *addNode = mirBuilder.CreateExprBinary(OP_add, PTY_u64, ireadNode, anchorOffset); + TypeCvtNode *cvtNode1 = mirBuilder.CreateExprTypeCvt(OP_cvt, PTY_ptr, PTY_u64, *addNode); + IreadNode *ireadNode1 = mirBuilder.CreateExprIread( + *addrsType, *(tab.GetOrCreatePointerType(*addrsType)), 0, cvtNode1); + return ireadNode1; +} + + uint64 GetTLSVarOffset(MIRModule &m, const MIRSymbol &st) { uint64 offset = 0; - if (!st.IsConst()) { - MapleMap &tbssVarOffset = m.GetTbssVarOffset(); - if (tbssVarOffset.find(&st) != tbssVarOffset.end()) { - offset = tbssVarOffset.at(&st); + if (opts::aggressiveTlsLocalDynamicOptMultiThread) { + const MapleMap &tlsVarOffset = m.GetTlsVarOffset(); + if (tlsVarOffset.find(&st) != tlsVarOffset.end()) { + offset = tlsVarOffset.at(&st); } else { - CHECK_FATAL_FALSE("All uninitialized TLS should be in tbssVarOffset"); + CHECK_FATAL_FALSE("All uninitialized TLS should be in tlsVarOffset"); } } else { - MapleMap &tdataVarOffset = m.GetTdataVarOffset(); - if (tdataVarOffset.find(&st) != tdataVarOffset.end()) { - offset = tdataVarOffset.at(&st); + if (!st.IsConst()) { + MapleMap &tbssVarOffset = m.GetTbssVarOffset(); + if (tbssVarOffset.find(&st) != tbssVarOffset.end()) { + offset = tbssVarOffset.at(&st); + } else { + CHECK_FATAL_FALSE("All uninitialized TLS should be in tbssVarOffset"); + } } else { - CHECK_FATAL_FALSE("All initialized TLS should be in tdataVarOffset"); + MapleMap &tdataVarOffset = m.GetTdataVarOffset(); + if (tdataVarOffset.find(&st) != tdataVarOffset.end()) { + offset = tdataVarOffset.at(&st); + } else { + CHECK_FATAL_FALSE("All initialized TLS should be in tdataVarOffset"); + } } } + return offset; } @@ -510,21 +559,35 @@ StmtNode *LocalDynamicTLSOptDassign(const DassignNode &dassign, BlockNode &block } MIRType *lhsPtrType = GlobalTables::GetTypeTable().GetOrCreatePointerType(*lhsType); ConstvalNode *offset = mirBuilder->CreateIntConst(GetTLSVarOffset(*func.GetModule(), *lhsSymbol), PTY_u64); - MIRType *addrsType = GlobalTables::GetTypeTable().GetUInt64(); - - MapleVector args0(mirBuilder->GetCurrentFuncCodeMpAllocator()->Adapter()); - IntrinsicopNode *tlsAnchor = nullptr; - if (!lhsSymbol->IsConst()) { - tlsAnchor = mirBuilder->CreateExprIntrinsicop(INTRN_C___tls_get_tbss_anchor, OP_intrinsicop, *addrsType, args0); + if (opts::aggressiveTlsLocalDynamicOptMultiThread) { + IreadNode *ireadNode = nullptr; + if (opts::aggressiveTlsSafeAnchor) { + ireadNode = GetSafeAnchor(*mirBuilder); + } else { + ireadNode = GetUnsafeAnchor(*mirBuilder); + } + BaseNode *addTlsGlobalOffset = mirBuilder->CreateExprBinary(OP_add, *GlobalTables::GetTypeTable().GetPtr(), + ireadNode, offset); + StmtNode *newAssign = nullptr; + newAssign = mirBuilder->CreateStmtIassign(*lhsPtrType, dassign.GetFieldID(), addTlsGlobalOffset, rhs); + block.ReplaceStmt1WithStmt2(&dassign, newAssign); + return newAssign; } else { - tlsAnchor = mirBuilder->CreateExprIntrinsicop(INTRN_C___tls_get_tdata_anchor, OP_intrinsicop, *addrsType, args0); + MIRType *addrsType = GlobalTables::GetTypeTable().GetUInt64(); + MapleVector args0(mirBuilder->GetCurrentFuncCodeMpAllocator()->Adapter()); + IntrinsicopNode *tlsAnchor = nullptr; + if (!lhsSymbol->IsConst()) { + tlsAnchor = mirBuilder->CreateExprIntrinsicop(INTRN_C___tls_get_tbss_anchor, OP_intrinsicop, *addrsType, args0); + } else { + tlsAnchor = mirBuilder->CreateExprIntrinsicop(INTRN_C___tls_get_tdata_anchor, OP_intrinsicop, *addrsType, args0); + } + BaseNode *addTlsGlobalOffset = mirBuilder->CreateExprBinary(OP_add, *GlobalTables::GetTypeTable().GetPtr(), + tlsAnchor, offset); + StmtNode *newAssign = nullptr; + newAssign = mirBuilder->CreateStmtIassign(*lhsPtrType, dassign.GetFieldID(), addTlsGlobalOffset, rhs); + block.ReplaceStmt1WithStmt2(&dassign, newAssign); + return newAssign; } - BaseNode *addTlsGlobalOffset = mirBuilder->CreateExprBinary(OP_add, *GlobalTables::GetTypeTable().GetPtr(), - tlsAnchor, offset); - StmtNode *newAssign = nullptr; - newAssign = mirBuilder->CreateStmtIassign(*lhsPtrType, dassign.GetFieldID(), addTlsGlobalOffset, rhs); - block.ReplaceStmt1WithStmt2(&dassign, newAssign); - return newAssign; } BaseNode *LocalDynamicTLSOptDread(const DreadNode &dread, MIRFunction &func) { @@ -543,20 +606,33 @@ BaseNode *LocalDynamicTLSOptDread(const DreadNode &dread, MIRFunction &func) { MIRType *lhsPtrType = GlobalTables::GetTypeTable().GetOrCreatePointerType(*lhsType); ConstvalNode *offset = mirBuilder->CreateIntConst(GetTLSVarOffset(*func.GetModule(), *lhsSymbol), PTY_u64); - MIRType *addrsType = GlobalTables::GetTypeTable().GetUInt64(); - - MapleVector args0(mirBuilder->GetCurrentFuncCodeMpAllocator()->Adapter()); - IntrinsicopNode *tlsAnchor = nullptr; - if (!lhsSymbol->IsConst()) { - tlsAnchor = mirBuilder->CreateExprIntrinsicop(INTRN_C___tls_get_tbss_anchor, OP_intrinsicop, *addrsType, args0); + if (opts::aggressiveTlsLocalDynamicOptMultiThread) { + IreadNode *ireadNode = nullptr; + if (opts::aggressiveTlsSafeAnchor) { + ireadNode = GetSafeAnchor(*mirBuilder); + } else { + ireadNode = GetUnsafeAnchor(*mirBuilder); + } + BaseNode *addTlsGlobalOffset = mirBuilder->CreateExprBinary(OP_add, *GlobalTables::GetTypeTable().GetPtr(), + ireadNode, offset); + IreadNode *newRead = nullptr; + newRead = mirBuilder->CreateExprIread(*varType, *lhsPtrType, dread.GetFieldID(), addTlsGlobalOffset); + return newRead; } else { - tlsAnchor = mirBuilder->CreateExprIntrinsicop(INTRN_C___tls_get_tdata_anchor, OP_intrinsicop, *addrsType, args0); + MIRType *addrsType = GlobalTables::GetTypeTable().GetUInt64(); + MapleVector args0(mirBuilder->GetCurrentFuncCodeMpAllocator()->Adapter()); + IntrinsicopNode *tlsAnchor = nullptr; + if (!lhsSymbol->IsConst()) { + tlsAnchor = mirBuilder->CreateExprIntrinsicop(INTRN_C___tls_get_tbss_anchor, OP_intrinsicop, *addrsType, args0); + } else { + tlsAnchor = mirBuilder->CreateExprIntrinsicop(INTRN_C___tls_get_tdata_anchor, OP_intrinsicop, *addrsType, args0); + } + BaseNode *addTlsGlobalOffset = mirBuilder->CreateExprBinary(OP_add, *GlobalTables::GetTypeTable().GetPtr(), + tlsAnchor, offset); + IreadNode *newRead = nullptr; + newRead = mirBuilder->CreateExprIread(*varType, *lhsPtrType, dread.GetFieldID(), addTlsGlobalOffset); + return newRead; } - BaseNode *addTlsGlobalOffset = mirBuilder->CreateExprBinary(OP_add, *GlobalTables::GetTypeTable().GetPtr(), - tlsAnchor, offset); - IreadNode *newRead = nullptr; - newRead = mirBuilder->CreateExprIread(*varType, *lhsPtrType, dread.GetFieldID(), addTlsGlobalOffset); - return newRead; } BaseNode *LocalDynamicTLSOptAddrof(const AddrofNode &addrofNode, MIRFunction &func) { @@ -570,19 +646,30 @@ BaseNode *LocalDynamicTLSOptAddrof(const AddrofNode &addrofNode, MIRFunction &fu } ConstvalNode *offset = mirBuilder->CreateIntConst(GetTLSVarOffset(*func.GetModule(), *lhsSymbol) + fieldOffset, PTY_u64); - MIRType *addrsType = GlobalTables::GetTypeTable().GetUInt64(); - - MapleVector args0(mirBuilder->GetCurrentFuncCodeMpAllocator()->Adapter()); - IntrinsicopNode *tlsAnchor = nullptr; - if (!lhsSymbol->IsConst()) { - tlsAnchor = mirBuilder->CreateExprIntrinsicop(INTRN_C___tls_get_tbss_anchor, OP_intrinsicop, *addrsType, args0); + if (opts::aggressiveTlsLocalDynamicOptMultiThread) { + IreadNode *ireadNode = nullptr; + if (opts::aggressiveTlsSafeAnchor) { + ireadNode = GetSafeAnchor(*mirBuilder); + } else { + ireadNode = GetUnsafeAnchor(*mirBuilder); + } + BaseNode *addTlsGlobalOffset = mirBuilder->CreateExprBinary(OP_add, *GlobalTables::GetTypeTable().GetPtr(), + ireadNode, offset); + return addTlsGlobalOffset; } else { - tlsAnchor = mirBuilder->CreateExprIntrinsicop(INTRN_C___tls_get_tdata_anchor, OP_intrinsicop, *addrsType, args0); - } - BaseNode *addTlsGlobalOffset = mirBuilder->CreateExprBinary(OP_add, *GlobalTables::GetTypeTable().GetPtr(), - tlsAnchor, offset); + MIRType *addrsType = GlobalTables::GetTypeTable().GetUInt64(); - return addTlsGlobalOffset; + MapleVector args0(mirBuilder->GetCurrentFuncCodeMpAllocator()->Adapter()); + IntrinsicopNode *tlsAnchor = nullptr; + if (!lhsSymbol->IsConst()) { + tlsAnchor = mirBuilder->CreateExprIntrinsicop(INTRN_C___tls_get_tbss_anchor, OP_intrinsicop, *addrsType, args0); + } else { + tlsAnchor = mirBuilder->CreateExprIntrinsicop(INTRN_C___tls_get_tdata_anchor, OP_intrinsicop, *addrsType, args0); + } + BaseNode *addTlsGlobalOffset = mirBuilder->CreateExprBinary(OP_add, *GlobalTables::GetTypeTable().GetPtr(), + tlsAnchor, offset); + return addTlsGlobalOffset; + } } void Simplify::ProcessStmt(StmtNode &stmt) { @@ -598,10 +685,12 @@ void Simplify::ProcessStmt(StmtNode &stmt) { break; } case OP_dassign: { - if (opts::aggressiveTlsLocalDynamicOpt || maplebe::CGOptions::IsShlib()) { + if (opts::aggressiveTlsLocalDynamicOpt || opts::aggressiveTlsLocalDynamicOptMultiThread || + maplebe::CGOptions::IsShlib()) { MIRSymbol *symbol = currFunc->GetLocalOrGlobalSymbol(static_cast(&stmt)->GetStIdx()); if (symbol && symbol->IsThreadLocal() && symbol->GetStorageClass() != kScExtern && - (opts::aggressiveTlsLocalDynamicOpt || symbol->IsHiddenVisibility())) { + (opts::aggressiveTlsLocalDynamicOpt || opts::aggressiveTlsLocalDynamicOptMultiThread || + symbol->IsHiddenVisibility())) { StmtNode *newStmtTLS = LocalDynamicTLSOptDassign(static_cast(stmt), *currBlock, *currFunc); ProcessStmt(*newStmtTLS); } @@ -642,10 +731,13 @@ BaseNode *Simplify::SimplifyExpr(BaseNode &expr) { case OP_dread: { auto &dread = static_cast(expr); BaseNode &tmpNode = *ReplaceExprWithConst(dread); - if (tmpNode.GetOpCode() == OP_dread && (opts::aggressiveTlsLocalDynamicOpt || maplebe::CGOptions::IsShlib())) { + if (tmpNode.GetOpCode() == OP_dread && + (opts::aggressiveTlsLocalDynamicOpt || opts::aggressiveTlsLocalDynamicOptMultiThread || + maplebe::CGOptions::IsShlib())) { MIRSymbol *symbol = currFunc->GetLocalOrGlobalSymbol(static_cast(tmpNode).GetStIdx()); if (symbol && symbol->IsThreadLocal() && symbol->GetStorageClass() != kScExtern && - (opts::aggressiveTlsLocalDynamicOpt || symbol->IsHiddenVisibility())) { + (opts::aggressiveTlsLocalDynamicOpt || opts::aggressiveTlsLocalDynamicOptMultiThread || + symbol->IsHiddenVisibility())) { BaseNode *newNode = LocalDynamicTLSOptDread(static_cast(tmpNode), *currFunc); return newNode; } @@ -662,11 +754,13 @@ BaseNode *Simplify::SimplifyExpr(BaseNode &expr) { return tmpNode; } case OP_addrof: { - if (opts::aggressiveTlsLocalDynamicOpt || maplebe::CGOptions::IsShlib()) { + if (opts::aggressiveTlsLocalDynamicOpt || opts::aggressiveTlsLocalDynamicOptMultiThread || + maplebe::CGOptions::IsShlib()) { AddrofNode &addrofNode = static_cast(expr); MIRSymbol *symbol = currFunc->GetLocalOrGlobalSymbol(addrofNode.GetStIdx()); if (symbol && symbol->IsThreadLocal() && symbol->GetStorageClass() != kScExtern && - (opts::aggressiveTlsLocalDynamicOpt || symbol->IsHiddenVisibility())) { + (opts::aggressiveTlsLocalDynamicOpt || opts::aggressiveTlsLocalDynamicOptMultiThread || + symbol->IsHiddenVisibility())) { BaseNode *newNode = LocalDynamicTLSOptAddrof(addrofNode, *currFunc); return newNode; } @@ -2579,13 +2673,148 @@ static void CalculateLocalDynamicTLS(MIRModule &m) { } } +static void CalculateWarmupLocalDynamicTlsSingleAnchor(MIRModule &m) { + size_t size = GlobalTables::GetGsymTable().GetSymbolTableSize(); + MIRType *mirType = nullptr; + uint64 tlsOffset = 0; + bool tbssSectionAligned = false; + + // tdata offset + for (auto it = m.GetFunctionList().cbegin(); it != m.GetFunctionList().cend(); ++it) { + const MIRFunction *mirFunc = *it; + if (mirFunc->GetBody() == nullptr) { + continue; + } + const MIRSymbolTable *lSymTab = mirFunc->GetSymTab(); + if (lSymTab == nullptr) { + continue; + } + size_t lsize = lSymTab->GetSymbolTableSize(); + for (size_t i = 0; i < lsize; i++) { + MIRSymbol *mirSymbol = lSymTab->GetSymbolFromStIdx(static_cast(i)); + if (mirSymbol == nullptr || mirSymbol->GetStorageClass() != kScPstatic) { + continue; + } + uint32 align = 0; + mirType = mirSymbol->GetType(); + if (mirType->GetKind() == kTypeStruct || mirType->GetKind() == kTypeClass || + mirType->GetKind() == kTypeArray || mirType->GetKind() == kTypeUnion) { + align = std::max(k8ByteSize, mirType->GetAlign()); + } else { + align = mirType->GetAlign(); + } + if (mirSymbol->IsThreadLocal()) { + mirSymbol->SetAccessByMem(true); + mirType = mirSymbol->GetType(); + if (mirSymbol->IsConst()) { + tlsOffset = RoundUp(tlsOffset, align); + m.SetTlsVarOffset(mirSymbol, tlsOffset); + tlsOffset += mirType->GetSize(); + } + } + } + } + + for (size_t i = 0; i < size; ++i) { + MIRSymbol *mirSymbol = GlobalTables::GetGsymTable().GetSymbolFromStidx(static_cast(i)); + if (mirSymbol == nullptr || mirSymbol->GetStorageClass() == kScExtern) { + continue; + } + if (mirSymbol->IsThreadLocal() && (opts::aggressiveTlsLocalDynamicOptMultiThread)) { + mirSymbol->SetAccessByMem(true); + mirType = mirSymbol->GetType(); + uint32 align = 0; + if (mirType->GetKind() == kTypeStruct || mirType->GetKind() == kTypeClass || + mirType->GetKind() == kTypeArray || mirType->GetKind() == kTypeUnion) { + align = std::max(k8ByteSize, mirType->GetAlign()); + } else { + align = mirType->GetAlign(); + } + if (mirSymbol->IsConst()) { + tlsOffset = RoundUp(tlsOffset, align); + m.SetTlsVarOffset(mirSymbol, tlsOffset); + tlsOffset += mirType->GetSize(); + } + } + } + + // tbss data + for (auto it = m.GetFunctionList().cbegin(); it != m.GetFunctionList().cend(); ++it) { + const MIRFunction *mirFunc = *it; + if (mirFunc->GetBody() == nullptr) { + continue; + } + const MIRSymbolTable *lSymTab = mirFunc->GetSymTab(); + if (lSymTab == nullptr) { + continue; + } + size_t lsize = lSymTab->GetSymbolTableSize(); + for (size_t i = 0; i < lsize; i++) { + MIRSymbol *mirSymbol = lSymTab->GetSymbolFromStIdx(static_cast(i)); + if (mirSymbol == nullptr || mirSymbol->GetStorageClass() != kScPstatic) { + continue; + } + uint32 align = 0; + mirType = mirSymbol->GetType(); + if (mirType->GetKind() == kTypeStruct || mirType->GetKind() == kTypeClass || + mirType->GetKind() == kTypeArray || mirType->GetKind() == kTypeUnion) { + align = std::max(k8ByteSize, mirType->GetAlign()); + } else { + align = mirType->GetAlign(); + } + if (!tbssSectionAligned) { + tbssSectionAligned = true; + align = std::max(k16ByteSize, align); + } + if (mirSymbol->IsThreadLocal()) { + mirSymbol->SetAccessByMem(true); + mirType = mirSymbol->GetType(); + if (!mirSymbol->IsConst()) { + tlsOffset = RoundUp(tlsOffset, align); + m.SetTlsVarOffset(mirSymbol, tlsOffset); + tlsOffset += mirType->GetSize(); + } + } + } + } + + for (size_t i = 0; i < size; ++i) { + MIRSymbol *mirSymbol = GlobalTables::GetGsymTable().GetSymbolFromStidx(static_cast(i)); + if (mirSymbol == nullptr || mirSymbol->GetStorageClass() == kScExtern) { + continue; + } + if (mirSymbol->IsThreadLocal() && opts::aggressiveTlsLocalDynamicOptMultiThread) { + mirSymbol->SetAccessByMem(true); + mirType = mirSymbol->GetType(); + uint32 align = 0; + if (mirType->GetKind() == kTypeStruct || mirType->GetKind() == kTypeClass || + mirType->GetKind() == kTypeArray || mirType->GetKind() == kTypeUnion) { + align = std::max(k8ByteSize, mirType->GetAlign()); + } else { + align = mirType->GetAlign(); + } + if (!tbssSectionAligned) { + tbssSectionAligned = true; + align = std::max(k16ByteSize, align); + } + if (!mirSymbol->IsConst()) { + tlsOffset = RoundUp(tlsOffset, align); + m.SetTlsVarOffset(mirSymbol, tlsOffset); + tlsOffset += mirType->GetSize(); + } + } + } +} + bool M2MSimplify::PhaseRun(maple::MIRModule &m) { auto *kh = GET_ANALYSIS(M2MKlassHierarchy, m); ASSERT_NOT_NULL((kh)); std::unique_ptr funcOptImpl = std::make_unique(m, kh, *GetPhaseMemPool(), TRACE_MAPLE_PHASE); ASSERT_NOT_NULL(funcOptImpl); - if (opts::aggressiveTlsLocalDynamicOpt || maplebe::CGOptions::IsShlib()) { + if (opts::aggressiveTlsLocalDynamicOptMultiThread) { + CalculateWarmupLocalDynamicTlsSingleAnchor(m); + } else if (opts::aggressiveTlsLocalDynamicOpt || maplebe::CGOptions::IsShlib()) { CalculateLocalDynamicTLS(m); } FuncOptimizeIterator opt(PhaseName(), std::move(funcOptImpl)); diff --git a/src/mapleall/mpl2mpl/src/stmt_cost_analyzer.cpp b/src/mapleall/mpl2mpl/src/stmt_cost_analyzer.cpp index 6f1d50ba9f0e7ead86dfb753f5ba9c7d55409c92..f8e8e6eb010f202ec71633f4e5b4f6af92d4067c 100644 --- a/src/mapleall/mpl2mpl/src/stmt_cost_analyzer.cpp +++ b/src/mapleall/mpl2mpl/src/stmt_cost_analyzer.cpp @@ -401,7 +401,7 @@ MIRType *StmtCostAnalyzer::GetMIRTypeFromStIdxAndField(const StIdx idx, FieldID } int64 StmtCostAnalyzer::GetStmtCost(StmtNode *stmt) { - if (stmt == nullptr) { + if (stmt == nullptr || stmt->IsIgnoreCost()) { return 0; } Opcode op = stmt->GetOpCode(); diff --git a/src/mapleall/test/BUILD.gn b/src/mapleall/test/BUILD.gn index 9fe0ed76fa57aac33a70c346b1d7b37f5c5d51a8..5ad7c1ac6b1ce48e2a05490fcb4b3acf5e8f1915 100644 --- a/src/mapleall/test/BUILD.gn +++ b/src/mapleall/test/BUILD.gn @@ -46,6 +46,7 @@ src_mapleallUT = [ "int128_val_test.cpp", "int128_lexer.cpp", "float128_ut_test.cpp", + "simple_bit_set_utest.cpp", ] executable("mapleallUT") { diff --git a/src/mapleall/test/CMakeLists.txt b/src/mapleall/test/CMakeLists.txt index 6189be2fb75114810b63d41250dc6d1317286372..2b1607d9e8ad3b28dc7fa9048754b5b06a3a9ae6 100644 --- a/src/mapleall/test/CMakeLists.txt +++ b/src/mapleall/test/CMakeLists.txt @@ -44,6 +44,7 @@ set(src_mapleallUT int128_val_test.cpp int128_lexer.cpp float128_ut_test.cpp + simple_bit_set_utest.cpp ) set(deps diff --git a/src/mapleall/test/list_scheduling_test.cpp b/src/mapleall/test/list_scheduling_test.cpp index d0a2a5215824bd98a4da51b2632c746f752f633b..00f001740f371a2e3f16916b143dc24ead928dd0 100644 --- a/src/mapleall/test/list_scheduling_test.cpp +++ b/src/mapleall/test/list_scheduling_test.cpp @@ -119,9 +119,8 @@ private: AArch64GlobalSchedule *aarGS = nullptr; }; -/* -* Test process of list scheduling in local BB -*/ +/* 1.0 old version */ +// Test process of list scheduling in local BB TEST(listSchedule, testListSchedulingInLocalBB1) { Triple::GetTriple().Init(); auto *memPool = new MemPool(memPoolCtrler, "ut_list_schedule_mp"); @@ -219,9 +218,6 @@ TEST(listSchedule, testListSchedulingInLocalBB1) { delete alloc; } -/* -* Test process of list scheduling in local BB -*/ TEST(listSchedule, testListSchedulingInLocalBB2) { Triple::GetTriple().Init(); auto *memPool = new MemPool(memPoolCtrler, "ut_list_schedule_mp"); @@ -751,6 +747,619 @@ TEST(listSchedule, testListSchedulingInLocalBB3) { aarLS->SetUnitTest(true); aarLS->DoLocalSchedule(*cdgNode); + delete memPool; + delete alloc; +} + +/* 1.0 new version */ +// HpfRecvDirectOther block5 after RA +TEST(listSchedule, testListSchedulingInLocalBlock5Sched2) { + Triple::GetTriple().Init(); + auto *memPool = new MemPool(memPoolCtrler, "ut_list_schedule_mp"); + auto *alloc = new MapleAllocator(memPool); + MockListScheduler mock(memPool, alloc); + AArch64CGFunc *aarFunc = mock.GetAArch64CGFunc(); + + // Mock maple BB info using gcc BB info before gcc scheduling + auto *curBB = memPool->New(0, *alloc); + aarFunc->SetCurBB(*curBB); + aarFunc->SetFirstBB(*curBB); + + // x19=[x20] (cortex_a53_slot_any+cortex_a53_ls_agen),cortex_a53_load + MOperator mop1 = MOP_xldr; + RegOperand &r19 = aarFunc->GetOrCreatePhysicalRegisterOperand(R19, maplebe::k64BitSize, kRegTyInt); + RegOperand &r20 = aarFunc->GetOrCreatePhysicalRegisterOperand(R20, maplebe::k64BitSize, kRegTyInt); + maple::int64 offset1 = 0; + MemOperand &memOpnd1 = aarFunc->CreateMemOpnd(r20, offset1, maplebe::k64BitSize); + maplebe::Insn &insn1 = aarFunc->GetInsnBuilder()->BuildInsn(mop1, r19, memOpnd1); + insn1.SetId(61); + curBB->AppendInsn(insn1); + + // x1=x19 cortex_a53_slot_any + MOperator mop2 = MOP_xmovrr; + RegOperand &r1 = aarFunc->GetOrCreatePhysicalRegisterOperand(R1, maplebe::k64BitSize, kRegTyInt); + maplebe::Insn &insn2 = aarFunc->GetInsnBuilder()->BuildInsn(mop2, r1, r19); + insn2.SetId(330); + curBB->AppendInsn(insn2); + + // x0=zxn([x19+0x16]) (cortex_a53_slot_any+cortex_a53_ls_agen),cortex_a53_load + MOperator mop3 = MOP_wldrh; + RegOperand &r0 = aarFunc->GetOrCreatePhysicalRegisterOperand(R0, maplebe::k32BitSize, kRegTyInt); + maple::int64 offset3 = 22; + MemOperand &memOpnd3 = aarFunc->CreateMemOpnd(r19, offset3, maplebe::k64BitSize); + maplebe::Insn &insn3 = aarFunc->GetInsnBuilder()->BuildInsn(mop3, r0, memOpnd3); + insn3.SetId(62); + curBB->AppendInsn(insn3); + + // x0=x0+0xc0 cortex_a53_slot_any + MOperator mop4 = MOP_xaddrri12; + ImmOperand &immOpnd4 = aarFunc->CreateImmOperand(192, maplebe::k64BitSize, false); + maplebe::Insn &insn4 = aarFunc->GetInsnBuilder()->BuildInsn(mop4, r0, r0, immOpnd4); + insn4.SetId(63); + curBB->AppendInsn(insn4); + + // x0=x19+x0 cortex_a53_slot_any + MOperator mop5 = MOP_xaddrrr; + maplebe::Insn &insn5 = aarFunc->GetInsnBuilder()->BuildInsn(mop5, r0, r19, r0); + insn5.SetId(64); + curBB->AppendInsn(insn5); + + // x2=[x19+0x40] (cortex_a53_slot_any+cortex_a53_ls_agen),cortex_a53_load + MOperator mop6 = MOP_xldr; + RegOperand &r2 = aarFunc->GetOrCreatePhysicalRegisterOperand(R2, maplebe::k64BitSize, kRegTyInt); + maple::int64 offset6 = 64; + MemOperand &memOpnd6 = aarFunc->CreateMemOpnd(r19, offset6, maplebe::k64BitSize); + maplebe::Insn &insn6 = aarFunc->GetInsnBuilder()->BuildInsn(mop6, r2, memOpnd6); + insn6.SetId(65); + curBB->AppendInsn(insn6); + + // cc=cmp(x2,x0) cortex_a53_slot_any + MOperator mop7 = MOP_xcmprr; + Operand &ccReg = aarFunc->GetOrCreateRflag(); + maplebe::Insn &insn7 = aarFunc->GetInsnBuilder()->BuildInsn(mop7, ccReg, r2, r0); + insn7.SetId(66); + curBB->AppendInsn(insn7); + + // pc={(cc!=0)?L189:pc} (cortex_a53_slot_any+cortex_a53_branch) + MOperator mop8 = MOP_bne; + auto &labelOpnd = aarFunc->GetOrCreateLabelOperand(1); + maplebe::Insn &insn8 = aarFunc->GetInsnBuilder()->BuildInsn(mop8, ccReg, labelOpnd); + insn8.SetId(67); + curBB->AppendInsn(insn8); + + aarFunc->SetIsAfterRegAlloc(); + + // Prepare data for list scheduling + CDGNode *cdgNode = mock.CreateCDGNode(*curBB); + + // Execute local schedule using list scheduling algorithm on mock BB + mock.DoLocalScheduleForMockBB(*cdgNode); + + delete memPool; + delete alloc; +} + +// HpfRecvDirectOther block4 after RA +TEST(listSchedule, testListSchedulingInLocalBlock4Sched2) { + Triple::GetTriple().Init(); + auto *memPool = new MemPool(memPoolCtrler, "ut_list_schedule_mp"); + auto *alloc = new MapleAllocator(memPool); + MockListScheduler mock(memPool, alloc); + AArch64CGFunc *aarFunc = mock.GetAArch64CGFunc(); + + // Mock maple BB info using gcc BB info before gcc scheduling + auto *curBB = memPool->New(0, *alloc); + aarFunc->SetCurBB(*curBB); + aarFunc->SetFirstBB(*curBB); + + // {asm_operands;clobber [scratch];} nothing + MOperator mop1 = MOP_asm; + Operand &asmString1 = aarFunc->CreateStringOperand(""); + ListOperand *listInputOpnd1 = aarFunc->CreateListOpnd(*alloc); + ListOperand *listOutputOpnd1 = aarFunc->CreateListOpnd(*alloc); + ListOperand *listClobber1 = aarFunc->CreateListOpnd(*alloc); + auto *listInConstraint1 = memPool->New(*alloc); + auto *listOutConstraint1 = memPool->New(*alloc); + auto *listInRegPrefix1 = memPool->New(*alloc); + auto *listOutRegPrefix1 = memPool->New(*alloc); + std::vector intrnOpnds1; + intrnOpnds1.emplace_back(&asmString1); + intrnOpnds1.emplace_back(listOutputOpnd1); + intrnOpnds1.emplace_back(listClobber1); + intrnOpnds1.emplace_back(listInputOpnd1); + intrnOpnds1.emplace_back(listOutConstraint1); + intrnOpnds1.emplace_back(listInConstraint1); + intrnOpnds1.emplace_back(listOutRegPrefix1); + intrnOpnds1.emplace_back(listInRegPrefix1); + maplebe::Insn &insn1 = aarFunc->GetInsnBuilder()->BuildInsn(mop1, intrnOpnds1); + insn1.SetId(191); + curBB->AppendInsn(insn1); + + // x0=[x1+0x40] (cortex_a53_slot_any+cortex_a53_ls_agen),cortex_a53_load + MOperator mop2 = MOP_xldr; + RegOperand &r0 = aarFunc->GetOrCreatePhysicalRegisterOperand(R0, maplebe::k32BitSize, kRegTyInt); + RegOperand &r1 = aarFunc->GetOrCreatePhysicalRegisterOperand(R1, maplebe::k64BitSize, kRegTyInt); + maple::int64 offset2 = 64; + MemOperand &memOpnd2 = aarFunc->CreateMemOpnd(r1, offset2, maplebe::k64BitSize); + maplebe::Insn &insn2 = aarFunc->GetInsnBuilder()->BuildInsn(mop2, r0, memOpnd2); + insn2.SetId(192); + curBB->AppendInsn(insn2); + + // asm_operands nothing + MOperator mop3 = MOP_asm; + Operand &asmString2 = aarFunc->CreateStringOperand(""); + ListOperand *listInputOpnd2 = aarFunc->CreateListOpnd(*alloc); + listInputOpnd2->PushOpnd(r0); + ListOperand *listOutputOpnd2 = aarFunc->CreateListOpnd(*alloc); + ListOperand *listClobber2 = aarFunc->CreateListOpnd(*alloc); + auto *listInConstraint2 = memPool->New(*alloc); + auto *listOutConstraint2 = memPool->New(*alloc); + auto *listInRegPrefix2 = memPool->New(*alloc); + auto *listOutRegPrefix2 = memPool->New(*alloc); + std::vector intrnOpnds2; + intrnOpnds2.emplace_back(&asmString2); + intrnOpnds2.emplace_back(listOutputOpnd2); + intrnOpnds2.emplace_back(listClobber2); + intrnOpnds2.emplace_back(listInputOpnd2); + intrnOpnds2.emplace_back(listOutConstraint2); + intrnOpnds2.emplace_back(listInConstraint2); + intrnOpnds2.emplace_back(listOutRegPrefix2); + intrnOpnds2.emplace_back(listInRegPrefix2); + maplebe::Insn &insn3 = aarFunc->GetInsnBuilder()->BuildInsn(mop3, intrnOpnds2); + insn3.SetId(193); + curBB->AppendInsn(insn3); + + // x0=x0+0x40 cortex_a53_slot_any + MOperator mop4 = MOP_xaddrri12; + ImmOperand &immOpnd4 = aarFunc->CreateImmOperand(64, maplebe::k64BitSize, false); + maplebe::Insn &insn4 = aarFunc->GetInsnBuilder()->BuildInsn(mop4, r0, r0, immOpnd4); + insn4.SetId(194); + curBB->AppendInsn(insn4); + + // asm_operands nothing + MOperator mop5 = MOP_asm; + maplebe::Insn &insn5 = aarFunc->GetInsnBuilder()->BuildInsn(mop5, intrnOpnds2); + insn5.SetId(195); + curBB->AppendInsn(insn5); + + // x2=[x20++] (cortex_a53_slot_any+cortex_a53_ls_agen),cortex_a53_load + MOperator mop6 = MOP_xldr; + RegOperand &r2 = aarFunc->GetOrCreatePhysicalRegisterOperand(R2, maplebe::k64BitSize, kRegTyInt); + RegOperand &r20 = aarFunc->GetOrCreatePhysicalRegisterOperand(R20, maplebe::k64BitSize, kRegTyInt); + maple::int64 offset6 = 8; + MemOperand &memOpnd6 = aarFunc->CreateMemOpnd(r20, offset6, maplebe::k64BitSize); + memOpnd6.SetAddrMode(maplebe::MemOperand::kPostIndex); + maplebe::Insn &insn6 = aarFunc->GetInsnBuilder()->BuildInsn(mop6, r2, memOpnd6); + insn6.SetId(196); + curBB->AppendInsn(insn6); + + // cc=cmp(x20,x22) cortex_a53_slot_any + MOperator mop7 = MOP_xcmprr; + Operand &ccReg = aarFunc->GetOrCreateRflag(); + RegOperand &r22 = aarFunc->GetOrCreatePhysicalRegisterOperand(R22, maplebe::k64BitSize, kRegTyInt); + maplebe::Insn &insn7 = aarFunc->GetInsnBuilder()->BuildInsn(mop7, ccReg, r20, r22); + insn7.SetId(207); + curBB->AppendInsn(insn7); + + // x0=zxn([x2+0x12]) (cortex_a53_slot_any+cortex_a53_ls_agen),cortex_a53_load + MOperator mop8 = MOP_wldrh; + maple::int64 offset8 = 18; + MemOperand &memOpnd8 = aarFunc->CreateMemOpnd(r2, offset8, maplebe::k64BitSize); + maplebe::Insn &insn8 = aarFunc->GetInsnBuilder()->BuildInsn(mop8, r0, memOpnd8); + insn8.SetId(197); + curBB->AppendInsn(insn8); + + // x0=x0<<0x7&0x7f80 cortex_a53_slot_any + MOperator mop9 = MOP_wubfizrri5i5; + ImmOperand &lsbOpnd9 = aarFunc->CreateImmOperand(7, maplebe::k32BitSize, false); + ImmOperand &widthOpnd9 = aarFunc->CreateImmOperand(8, maplebe::k32BitSize, false); + maplebe::Insn &insn9 = aarFunc->GetInsnBuilder()->BuildInsn(mop9, r0, r0, lsbOpnd9, widthOpnd9); + insn9.SetId(199); + curBB->AppendInsn(insn9); + + // x1=[x2+0x40] (cortex_a53_slot_any+cortex_a53_ls_agen),cortex_a53_load + MOperator mop10 = MOP_xldr; + maple::int64 offset10 = 64; + MemOperand &memOpnd10 = aarFunc->CreateMemOpnd(r2, offset10, maplebe::k64BitSize); + maplebe::Insn &insn10 = aarFunc->GetInsnBuilder()->BuildInsn(mop10, r1, memOpnd10); + insn10.SetId(200); + curBB->AppendInsn(insn10); + + // x2=zxn([x2+0x10]) (cortex_a53_slot_any+cortex_a53_ls_agen),cortex_a53_load + MOperator mop11 = MOP_wldrh; + maple::int64 offset11 = 16; + MemOperand &memOpnd11 = aarFunc->CreateMemOpnd(r2, offset11, maplebe::k64BitSize); + maplebe::Insn &insn11 = aarFunc->GetInsnBuilder()->BuildInsn(mop11, r2, memOpnd11); + insn11.SetId(203); + curBB->AppendInsn(insn11); + + // [x1+0x8e]=x2 (cortex_a53_slot_any+cortex_a53_ls_agen),cortex_a53_store + MOperator mop12 = MOP_wstrh; + maple::int64 offset12 = 142; + MemOperand &memOpnd12 = aarFunc->CreateMemOpnd(r1, offset12, maplebe::k64BitSize); + maplebe::Insn &insn12 = aarFunc->GetInsnBuilder()->BuildInsn(mop12, r2, memOpnd12); + insn12.SetId(204); + curBB->AppendInsn(insn12); + + // [x1+0x10]=x0 (cortex_a53_slot_any+cortex_a53_ls_agen),cortex_a53_store + MOperator mop13 = MOP_wstr; + maple::int64 offset13 = 16; + MemOperand &memOpnd13 = aarFunc->CreateMemOpnd(r1, offset13, maplebe::k64BitSize); + maplebe::Insn &insn13 = aarFunc->GetInsnBuilder()->BuildInsn(mop13, r0, memOpnd13); + insn13.SetId(201); + curBB->AppendInsn(insn13); + + // [x1+0x78]=x0 (cortex_a53_slot_any+cortex_a53_ls_agen),cortex_a53_store + MOperator mop14 = MOP_wstr; + maple::int64 offset14 = 120; + MemOperand &memOpnd14 = aarFunc->CreateMemOpnd(r1, offset14, maplebe::k64BitSize); + maplebe::Insn &insn14 = aarFunc->GetInsnBuilder()->BuildInsn(mop14, r0, memOpnd14); + insn14.SetId(202); + curBB->AppendInsn(insn14); + + // pc={(cc==0)?L489:pc} (cortex_a53_slot_any+cortex_a53_branch) + MOperator mop15 = MOP_beq; + auto &labelOpnd = aarFunc->GetOrCreateLabelOperand(1); + maplebe::Insn &insn15 = aarFunc->GetInsnBuilder()->BuildInsn(mop15, ccReg, labelOpnd); + insn15.SetId(208); + curBB->AppendInsn(insn15); + + aarFunc->SetIsAfterRegAlloc(); + aarFunc->SetHasAsm(); + + // Prepare data for list scheduling + CDGNode *cdgNode = mock.CreateCDGNode(*curBB); + + DataDepAnalysis *dda = mock.GetDataDepAnalysis(); + dda->Run(*cdgNode->GetRegion()); + + for (auto *depNode : cdgNode->GetAllDataNodes()) { + Insn *insn = depNode->GetInsn(); + if (insn->GetId() == 192) { + auto sucLinkIt = insn->GetDepNode()->GetSuccsBegin(); + while (sucLinkIt != insn->GetDepNode()->GetSuccsEnd()) { + DepNode &succNode = (*sucLinkIt)->GetTo(); + Insn *succInsn = succNode.GetInsn(); + if (succInsn->GetId() == 194 || succInsn->GetId() == 195 || succInsn->GetId() == 200) { + sucLinkIt = insn->GetDepNode()->EraseSucc(sucLinkIt); + DepLink *succLink = *sucLinkIt; + succNode.ErasePred(*succLink); + } else { + ++sucLinkIt; + } + } + } else if (insn->GetId() == 194) { + auto sucLinkIt = insn->GetDepNode()->GetSuccsBegin(); + while (sucLinkIt != insn->GetDepNode()->GetSuccsEnd()) { + DepNode &succNode = (*sucLinkIt)->GetTo(); + Insn *succInsn = succNode.GetInsn(); + if (succInsn->GetId() == 197) { + sucLinkIt = insn->GetDepNode()->EraseSucc(sucLinkIt); + DepLink *succLink = *sucLinkIt; + succNode.ErasePred(*succLink); + } else { + ++sucLinkIt; + } + } + } else if (insn->GetId() == 195) { + auto sucLinkIt = insn->GetDepNode()->GetSuccsBegin(); + while (sucLinkIt != insn->GetDepNode()->GetSuccsEnd()) { + DepNode &succNode = (*sucLinkIt)->GetTo(); + Insn *succInsn = succNode.GetInsn(); + if (succInsn->GetId() == 199) { + sucLinkIt = insn->GetDepNode()->EraseSucc(sucLinkIt); + DepLink *succLink = *sucLinkIt; + succNode.ErasePred(*succLink); + } else { + ++sucLinkIt; + } + } + } + } + + // Init in region + AArch64LocalSchedule *aarLS = mock.GetAArch64LocalSchedule(); + aarLS->InitInRegion(*cdgNode->GetRegion()); + // Do list scheduling + aarLS->SetUnitTest(true); + aarLS->DoLocalSchedule(*cdgNode); + + delete memPool; + delete alloc; +} + +// HpfRecvDirectOther block3 after RA +TEST(listSchedule, testListSchedulingInLocalBlock3Sched2) { + Triple::GetTriple().Init(); + auto *memPool = new MemPool(memPoolCtrler, "ut_list_schedule_mp"); + auto *alloc = new MapleAllocator(memPool); + MockListScheduler mock(memPool, alloc); + AArch64CGFunc *aarFunc = mock.GetAArch64CGFunc(); + + // Mock maple BB info using gcc BB info before gcc scheduling + auto *curBB = memPool->New(0, *alloc); + aarFunc->SetCurBB(*curBB); + aarFunc->SetFirstBB(*curBB); + + // {[sp+0x10]=x19;[sp+0x18]=x20;} (cortex_a53_slot_any+cortex_a53_ls_agen),cortex_a53_store + MOperator mop1 = MOP_xstp; + RegOperand &sp = aarFunc->GetOrCreatePhysicalRegisterOperand(RSP, maplebe::k64BitSize, kRegTyInt); + RegOperand &r19 = aarFunc->GetOrCreatePhysicalRegisterOperand(R19, maplebe::k64BitSize, kRegTyInt); + RegOperand &r20 = aarFunc->GetOrCreatePhysicalRegisterOperand(R20, maplebe::k64BitSize, kRegTyInt); + maple::int64 offset1 = 16; + MemOperand &memOpnd1 = aarFunc->CreateMemOpnd(sp, offset1, maplebe::k64BitSize); + maplebe::Insn &insn1 = aarFunc->GetInsnBuilder()->BuildInsn(mop1, r19, r20, memOpnd1); + insn1.SetId(414); + curBB->AppendInsn(insn1); + + // {[x29+0x38]=x24;[x29+0x40]=x25;} (cortex_a53_slot_any+cortex_a53_ls_agen),cortex_a53_store + MOperator mop2 = MOP_xstp; + RegOperand &r24 = aarFunc->GetOrCreatePhysicalRegisterOperand(R24, maplebe::k64BitSize, kRegTyInt); + RegOperand &r25 = aarFunc->GetOrCreatePhysicalRegisterOperand(R25, maplebe::k64BitSize, kRegTyInt); + maple::int64 offset2 = 56; + MemOperand &memOpnd2 = aarFunc->CreateMemOpnd(sp, offset2, maplebe::k64BitSize); + maplebe::Insn &insn2 = aarFunc->GetInsnBuilder()->BuildInsn(mop2, r24, r25, memOpnd2); + insn2.SetId(416); + curBB->AppendInsn(insn2); + + // {[x29+0x48]=x26;[x29+0x50]=x27;} (cortex_a53_slot_any+cortex_a53_ls_agen),cortex_a53_store + MOperator mop3 = MOP_xstp; + RegOperand &r26 = aarFunc->GetOrCreatePhysicalRegisterOperand(R26, maplebe::k64BitSize, kRegTyInt); + RegOperand &r27 = aarFunc->GetOrCreatePhysicalRegisterOperand(R27, maplebe::k64BitSize, kRegTyInt); + maple::int64 offset3 = 72; + MemOperand &memOpnd3 = aarFunc->CreateMemOpnd(sp, offset3, maplebe::k64BitSize); + maplebe::Insn &insn3 = aarFunc->GetInsnBuilder()->BuildInsn(mop3, r26, r27, memOpnd3); + insn3.SetId(417); + curBB->AppendInsn(insn3); + + // x24=high(`g_contextPool') cortex_a53_slot_any + MOperator mop4 = MOP_xadrp; + MIRSymbol scg4(0, kScopeGlobal); + scg4.SetStorageClass(kScGlobal); + scg4.SetSKind(kStVar); + std::string strSCG4("g_contextPool"); + scg4.SetNameStrIdx(strSCG4); + StImmOperand &stImmOpnd4 = aarFunc->CreateStImmOperand(scg4, 0, 0); + maplebe::Insn &insn4 = aarFunc->GetInsnBuilder()->BuildInsn(mop4, r24, stImmOpnd4); + insn4.SetId(76); + curBB->AppendInsn(insn4); + + // x25=high(`g_mpOpsTable') cortex_a53_slot_any + MOperator mop5 = MOP_xadrp; + MIRSymbol scg5(0, kScopeGlobal); + scg5.SetStorageClass(kScGlobal); + scg5.SetSKind(kStVar); + std::string strSCG5("g_mpOpsTable"); + scg5.SetNameStrIdx(strSCG5); + StImmOperand &stImmOpnd5 = aarFunc->CreateStImmOperand(scg5, 0, 0); + maplebe::Insn &insn5 = aarFunc->GetInsnBuilder()->BuildInsn(mop5, r25, stImmOpnd5); + insn5.SetId(158); + curBB->AppendInsn(insn5); + + // x27=zxn(x1-0x1) cortex_a53_slot_any + MOperator mop6 = MOP_wsubrri12; + RegOperand &r1 = aarFunc->GetOrCreatePhysicalRegisterOperand(R1, maplebe::k32BitSize, kRegTyInt); + ImmOperand &immOpnd6 = aarFunc->CreateImmOperand(1, maplebe::k32BitSize, false); + maplebe::Insn &insn6 = aarFunc->GetInsnBuilder()->BuildInsn(mop6, r27, r1, immOpnd6); + insn6.SetId(54); + curBB->AppendInsn(insn6); + + // x24=unspec[[x24+low(`g_contextPool')]] 24 (cortex_a53_slot_any+cortex_a53_ls_agen),cortex_a53_load + MOperator mop7 = MOP_xldr; + OfstOperand &ofstOpnd7 = aarFunc->CreateOfstOpnd(*stImmOpnd4.GetSymbol(), stImmOpnd4.GetOffset(), stImmOpnd4.GetRelocs()); + MemOperand *memOpnd7 = aarFunc->CreateMemOperand(maplebe::k64BitSize, r24, ofstOpnd7, *stImmOpnd4.GetSymbol()); + maplebe::Insn &insn7 = aarFunc->GetInsnBuilder()->BuildInsn(mop7, r24, *memOpnd7); + insn7.SetId(77); + curBB->AppendInsn(insn7); + + // x26=unspec[[x25+low(`g_mpOpsTable')]] 24 (cortex_a53_slot_any+cortex_a53_ls_agen),cortex_a53_load + MOperator mop8 = MOP_xldr; + OfstOperand &ofstOpnd8 = aarFunc->CreateOfstOpnd(*stImmOpnd5.GetSymbol(), stImmOpnd5.GetOffset(), stImmOpnd5.GetRelocs()); + MemOperand *memOpnd8 = aarFunc->CreateMemOperand(maplebe::k64BitSize, r25, ofstOpnd8, *stImmOpnd5.GetSymbol()); + maplebe::Insn &insn8 = aarFunc->GetInsnBuilder()->BuildInsn(mop8, r26, *memOpnd8); + insn8.SetId(159); + curBB->AppendInsn(insn8); + + // x20=x21 cortex_a53_slot_any + MOperator mop9 = MOP_xmovrr; + RegOperand &r21 = aarFunc->GetOrCreatePhysicalRegisterOperand(R21, maplebe::k64BitSize, kRegTyInt); + maplebe::Insn &insn9 = aarFunc->GetInsnBuilder()->BuildInsn(mop9, r20, r21); + insn9.SetId(53); + curBB->AppendInsn(insn9); + + // [x29+0x28]=x22 (cortex_a53_slot_any+cortex_a53_ls_agen),cortex_a53_store + MOperator mop10 = MOP_xstr; + RegOperand &r22 = aarFunc->GetOrCreatePhysicalRegisterOperand(R22, maplebe::k64BitSize, kRegTyInt); + int offset10 = 40; + MemOperand &memOpnd10 = aarFunc->CreateMemOpnd(sp, offset10, maplebe::k64BitSize); + memOpnd10.SetAddrMode(maplebe::MemOperand::kBOI); + maplebe::Insn &insn10 = aarFunc->GetInsnBuilder()->BuildInsn(mop10, r22, memOpnd10); + insn10.SetId(415); + curBB->AppendInsn(insn10); + + // x22=x21+0x8 cortex_a53_slot_any + MOperator mop11 = MOP_xaddrri12; + ImmOperand &immOpnd11 = aarFunc->CreateImmOperand(8, maplebe::k64BitSize, false); + maplebe::Insn &insn11 = aarFunc->GetInsnBuilder()->BuildInsn(mop11, r22, r21, immOpnd11); + insn11.SetId(56); + curBB->AppendInsn(insn11); + + // x22=zxn(x27)<<0x3+x22 cortex_a53_slot_any + MOperator mop12 = MOP_xxwaddrrre; + ExtendShiftOperand &uxtwOpnd = aarFunc->CreateExtendShiftOperand(ExtendShiftOperand::kUXTW, 3, maplebe::k3BitSize); + maplebe::Insn &insn12 = aarFunc->GetInsnBuilder()->BuildInsn(mop12, r22, r22, r27, uxtwOpnd); + insn12.SetId(58); + curBB->AppendInsn(insn12); + + // pc=L206 (cortex_a53_slot_any+cortex_a53_branch) + MOperator mop13 = MOP_xuncond; + std::string label = "ut_test_ls"; + auto *target = memPool->New(label.c_str(), 1, *memPool); + maplebe::Insn &insn13 = aarFunc->GetInsnBuilder()->BuildInsn(mop13, *target); + insn13.SetId(487); + curBB->AppendInsn(insn13); + + // Prepare data for list scheduling + CDGNode *cdgNode = mock.CreateCDGNode(*curBB); + + DataDepAnalysis *dda = mock.GetDataDepAnalysis(); + dda->Run(*cdgNode->GetRegion()); + + // mock mem dependency from 77 to 415 + for (auto *depNode : cdgNode->GetAllDataNodes()) { + Insn *insn = depNode->GetInsn(); + if (insn->GetId() == 77) { + auto sucLinkIt = insn->GetDepNode()->GetSuccsBegin(); + while (sucLinkIt != insn->GetDepNode()->GetSuccsEnd()) { + DepNode &succNode = (*sucLinkIt)->GetTo(); + Insn *succInsn = succNode.GetInsn(); + if (succInsn->GetId() == 415) { + sucLinkIt = insn->GetDepNode()->EraseSucc(sucLinkIt); + DepLink *succLink = *sucLinkIt; + succNode.ErasePred(*succLink); + } else { + ++sucLinkIt; + } + } + break; + } + } + + insn3.SetId(12); + insn10.SetId(19); + insn7.SetId(16); + insn8.SetId(17); + insn12.SetId(21); + insn9.SetId(18); + + // Init in region + AArch64LocalSchedule *aarLS = mock.GetAArch64LocalSchedule(); + aarLS->InitInRegion(*cdgNode->GetRegion()); + // Do list scheduling + aarLS->SetUnitTest(true); + aarLS->DoLocalSchedule(*cdgNode); + + delete memPool; + delete alloc; +} + +// HpfRecvDirectOther block3 before RA +TEST(listSchedule, testListSchedulingInLocalBlock3Sched1) { + Triple::GetTriple().Init(); + auto *memPool = new MemPool(memPoolCtrler, "ut_list_schedule_mp"); + auto *alloc = new MapleAllocator(memPool); + MockListScheduler mock(memPool, alloc); + AArch64CGFunc *aarFunc = mock.GetAArch64CGFunc(); + + // Mock maple BB info using gcc BB info before gcc scheduling + auto *curBB = memPool->New(0, *alloc); + aarFunc->SetCurBB(*curBB); + aarFunc->SetFirstBB(*curBB); + + // r171=r186 cortex_a53_slot_any + MOperator mop1 = MOP_xmovrr; + auto R186 = static_cast(186); + RegOperand *reg186 = aarFunc->CreateVirtualRegisterOperand(R186, maplebe::k64BitSize, kRegTyInt); + auto R171 = static_cast(171); + RegOperand *reg171 = aarFunc->CreateVirtualRegisterOperand(R171, maplebe::k64BitSize, kRegTyInt); + maplebe::Insn &insn1 = aarFunc->GetInsnBuilder()->BuildInsn(mop1, *reg171, *reg186); + insn1.SetId(53); + curBB->AppendInsn(insn1); + + // r132=r187-0x1 cortex_a53_slot_any + MOperator mop2 = MOP_wsubrri12; + auto R187 = static_cast(187); + RegOperand *reg187 = aarFunc->CreateVirtualRegisterOperand(R187, maplebe::k64BitSize, kRegTyInt); + auto R132 = static_cast(132); + RegOperand *reg132 = aarFunc->CreateVirtualRegisterOperand(R132, maplebe::k32BitSize, kRegTyInt); + ImmOperand &immOpnd2 = aarFunc->CreateImmOperand(1, maplebe::k32BitSize, false); + maplebe::Insn &insn2 = aarFunc->GetInsnBuilder()->BuildInsn(mop2, *reg132, *reg187, immOpnd2); + insn2.SetId(54); + curBB->AppendInsn(insn2); + + // r131=zxn(r132) cortex_a53_slot_any + MOperator mop3 = MOP_xuxtw64; + auto R131 = static_cast(131); + RegOperand *reg131 = aarFunc->CreateVirtualRegisterOperand(R131, maplebe::k64BitSize, kRegTyInt); + maplebe::Insn &insn3 = aarFunc->GetInsnBuilder()->BuildInsn(mop3, *reg131, *reg132); + insn3.SetId(55); + curBB->AppendInsn(insn3); + + // r188=r186+0x8 cortex_a53_slot_any + MOperator mop4 = MOP_xaddrri12; + auto R188 = static_cast(188); + RegOperand *reg188 = aarFunc->CreateVirtualRegisterOperand(R188, maplebe::k64BitSize, kRegTyInt); + ImmOperand &immOpnd4 = aarFunc->CreateImmOperand(8, maplebe::k64BitSize, false); + maplebe::Insn &insn4 = aarFunc->GetInsnBuilder()->BuildInsn(mop4, *reg188, *reg186, immOpnd4); + insn4.SetId(56); + curBB->AppendInsn(insn4); + + // r180=zxn(r132)<<0x3+r188 cortex_a53_slot_any + MOperator mop5 = MOP_xxwaddrrre; + auto R180 = static_cast(180); + RegOperand *reg180 = aarFunc->CreateVirtualRegisterOperand(R180, maplebe::k64BitSize, kRegTyInt); + ExtendShiftOperand &uxtwOpnd = aarFunc->CreateExtendShiftOperand(ExtendShiftOperand::kUXTW, 3, maplebe::k3BitSize); + maplebe::Insn &insn5 = aarFunc->GetInsnBuilder()->BuildInsn(mop5, *reg180, *reg188, *reg132, uxtwOpnd); + insn5.SetId(58); + curBB->AppendInsn(insn5); + + // r266=high(`g_contextPool') cortex_a53_slot_any + MOperator mop6 = MOP_xadrp; + auto R266 = static_cast(266); + RegOperand *reg266 = aarFunc->CreateVirtualRegisterOperand(R266, maplebe::k64BitSize, kRegTyInt); + MIRSymbol scg6(0, kScopeGlobal); + scg6.SetStorageClass(kScGlobal); + scg6.SetSKind(kStVar); + std::string strSCG6("g_contextPool"); + scg6.SetNameStrIdx(strSCG6); + StImmOperand &stImmOpnd6 = aarFunc->CreateStImmOperand(scg6, 0, 0); + maplebe::Insn &insn6 = aarFunc->GetInsnBuilder()->BuildInsn(mop6, *reg266, stImmOpnd6); + insn6.SetId(76); + curBB->AppendInsn(insn6); + + // r267=unspec[[r266+low(`g_contextPool')]] 24 (cortex_a53_slot_any+cortex_a53_ls_agen),cortex_a53_load + MOperator mop7 = MOP_xldr; + auto R267 = static_cast(267); + RegOperand *reg267 = aarFunc->CreateVirtualRegisterOperand(R267, maplebe::k64BitSize, kRegTyInt); + OfstOperand &ofstOpnd7 = aarFunc->CreateOfstOpnd(*stImmOpnd6.GetSymbol(), stImmOpnd6.GetOffset(), stImmOpnd6.GetRelocs()); + MemOperand *memOpnd7 = aarFunc->CreateMemOperand(maplebe::k64BitSize, *reg266, ofstOpnd7, *stImmOpnd6.GetSymbol()); + maplebe::Insn &insn7 = aarFunc->GetInsnBuilder()->BuildInsn(mop7, *reg267, *memOpnd7); + insn7.SetId(77); + curBB->AppendInsn(insn7); + + // r268=high(`g_mpOpsTable') cortex_a53_slot_any + MOperator mop8 = MOP_xadrp; + auto R268 = static_cast(268); + RegOperand *reg268 = aarFunc->CreateVirtualRegisterOperand(R268, maplebe::k64BitSize, kRegTyInt); + MIRSymbol scg8(0, kScopeGlobal); + scg8.SetStorageClass(kScGlobal); + scg8.SetSKind(kStVar); + std::string strSCG8("g_mpOpsTable"); + scg8.SetNameStrIdx(strSCG8); + StImmOperand &stImmOpnd8 = aarFunc->CreateStImmOperand(scg8, 0, 0); + maplebe::Insn &insn8 = aarFunc->GetInsnBuilder()->BuildInsn(mop8, *reg268, stImmOpnd8); + insn8.SetId(158); + curBB->AppendInsn(insn8); + + // r269=unspec[[r268+low(`g_mpOpsTable')]] 24 (cortex_a53_slot_any+cortex_a53_ls_agen),cortex_a53_load + MOperator mop9 = MOP_xldr; + auto R269 = static_cast(269); + RegOperand *reg269 = aarFunc->CreateVirtualRegisterOperand(R269, maplebe::k64BitSize, kRegTyInt); + OfstOperand &ofstOpnd9 = aarFunc->CreateOfstOpnd(*stImmOpnd6.GetSymbol(), stImmOpnd8.GetOffset(), stImmOpnd8.GetRelocs()); + MemOperand *memOpnd8 = aarFunc->CreateMemOperand(maplebe::k64BitSize, *reg268, ofstOpnd9, *stImmOpnd8.GetSymbol()); + maplebe::Insn &insn9 = aarFunc->GetInsnBuilder()->BuildInsn(mop9, *reg269, *memOpnd8); + insn9.SetId(159); + curBB->AppendInsn(insn9); + + // Set max VRegNO + aarFunc->SetMaxVReg(270); + + // Prepare data for list scheduling + CDGNode *cdgNode = mock.CreateCDGNode(*curBB); + + // Execute local schedule using list scheduling algorithm on mock BB + mock.DoLocalScheduleForMockBB(*cdgNode); + delete memPool; delete alloc; } \ No newline at end of file diff --git a/src/mapleall/test/simple_bit_set_utest.cpp b/src/mapleall/test/simple_bit_set_utest.cpp new file mode 100644 index 0000000000000000000000000000000000000000..7517d63e90ff6f0ea6132b90e4f7435d4fe1ca81 --- /dev/null +++ b/src/mapleall/test/simple_bit_set_utest.cpp @@ -0,0 +1,161 @@ +/* + * Copyright (c) [2023] Huawei Technologies Co.,Ltd.All rights reserved. + * + * OpenArkCompiler is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * + * http://license.coscl.org.cn/MulanPSL2 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ +#include "gtest/gtest.h" +#include "simple_bit_set.h" +#include +#include +#include +#include +#include "mpl_logging.h" +#include "common_utils.h" +#include "mir_type.h" + +using namespace maple; +constexpr uint64_t kAllOnes64 = 0xFFFFFFFFFFFFFFFFULL; + +SimpleBitSet bitset64; +SimpleBitSet bitset128; +SimpleBitSet bitset256; +SimpleBitSet bitset128copy(bitset128); +SimpleBitSet bitset128const256Init(256UL); + +TEST(SimpleBitSetAll, GetWordSize) { + ASSERT_EQ(bitset64.GetWordSize(), 1); + ASSERT_EQ(bitset128.GetWordSize(), 2); + ASSERT_EQ(bitset256.GetWordSize(), 4); +} + + // bitset128 test +TEST(SimpleBitSet128, Method_LogicalOperator_And_GetWord) { + bitset128 = bitset128 | 64ULL; + ASSERT_EQ(bitset128, SimpleBitSet(64)); // 64 = 0100 0000 + ASSERT_EQ(bitset128.GetWord(0), 64UL); + ASSERT_EQ(bitset128.GetWord(1), 0UL); + + bitset128 = bitset128 | 65535ULL; + ASSERT_EQ(bitset128, SimpleBitSet(65535)); // 0xffff + ASSERT_EQ(bitset128.GetWord(0), 65535); + ASSERT_EQ(bitset128.GetWord(1), 0UL); + + bitset128 = bitset128 & 0xfULL; + ASSERT_EQ(bitset128, SimpleBitSet(0xf)); + ASSERT_EQ(bitset128.GetWord(0), 0xf); + ASSERT_EQ(bitset128.GetWord(1), 0UL); + + ASSERT_EQ((~bitset128), ~(SimpleBitSet(0xf))); + ASSERT_EQ((~bitset128).GetWord(0), 0xfULL); + ASSERT_EQ((~bitset128).GetWord(1), kAllOnes64); +} + +TEST(SimpleBitSet128, Method_Set_Reset_ToBitset_And_GetWord) { + bitset128.Reset(); + ASSERT_EQ(bitset128.Set(0), true); + ASSERT_EQ(bitset128.GetWord(0), 0x1ULL); + ASSERT_EQ(bitset128.Reset(64), true); + ASSERT_EQ(bitset128.GetWord(1), 0ULL); + ASSERT_EQ(bitset128.Reset(65), true); + ASSERT_EQ(bitset128.GetWord(1), 0ULL); + + bitset128.Reset(); + ASSERT_EQ(bitset128, SimpleBitSet()); + ASSERT_EQ(bitset128.GetWord(0), 0); + ASSERT_EQ(bitset128.GetWord(1), 0); + + ASSERT_EQ(bitset128.ToBitset(), std::bitset(0)); + + ASSERT_EQ(bitset128.Set(0), true); + ASSERT_EQ(bitset128, SimpleBitSet(1)); + ASSERT_EQ(bitset128.GetWord(0), 1); + ASSERT_EQ(bitset128.GetWord(1), 0); + + ASSERT_EQ(bitset128.ToBitset(), std::bitset(1)); + + ASSERT_EQ(bitset128.Set(3), true); + ASSERT_EQ(bitset128, SimpleBitSet(9)); + ASSERT_EQ(bitset128.GetWord(0), 9); + ASSERT_EQ(bitset128.GetWord(1), 0); + + ASSERT_EQ(bitset128.ToBitset(), std::bitset(9)); + + ASSERT_EQ(bitset128[0], 1); + ASSERT_EQ(bitset128[1], 0); + ASSERT_EQ(bitset128[2], 0); + ASSERT_EQ(bitset128[3], 1); + ASSERT_EQ(bitset128[63], 0); + ASSERT_EQ(bitset128[64], 0); + ASSERT_EQ(bitset128[65], 0); + ASSERT_EQ(bitset128[66], 0); + ASSERT_EQ(bitset128[88], 0); + ASSERT_EQ(bitset128[166], -1); +} + + // bitset64 test +TEST(SimpleBitSet64, LogicalOperator_And_GetWord) { + bitset64 = bitset64 | 64ULL; + ASSERT_EQ(bitset64, SimpleBitSet(64UL)); + ASSERT_EQ(bitset64.GetWord(0), 64UL); + + bitset64 = bitset64 | kAllOnes64; + ASSERT_EQ(bitset64, SimpleBitSet(kAllOnes64)); + ASSERT_EQ(bitset64.GetWord(0), kAllOnes64); + + bitset64 = bitset64 & 0ULL; + ASSERT_EQ(bitset64, SimpleBitSet()); + ASSERT_EQ(bitset64, SimpleBitSet(0)); + ASSERT_EQ(bitset64.GetWord(0), 0UL); + + ASSERT_EQ((~bitset64), SimpleBitSet(~0UL)); + + bitset64 = bitset64 & SimpleBitSet(0xf); + ASSERT_EQ(bitset64, SimpleBitSet(0xf)); + ASSERT_EQ(bitset64.GetWord(0), 15); + + bitset64 = bitset64 | SimpleBitSet(0xffff); + ASSERT_EQ(bitset64, SimpleBitSet(0xffff)); + ASSERT_EQ(bitset64.GetWord(0), 65535); +} + +TEST(SimpleBitSet64, Set_Reset_ToBitset_And_GetWord) { + ASSERT_EQ(bitset64.Reset(0), true); + ASSERT_EQ(bitset64, SimpleBitSet(0xfffe)); + ASSERT_EQ(bitset64.GetWord(0), 65534); + + ASSERT_EQ(bitset64.ToBitset(), std::bitset(65534)); + + bitset64.Reset(); + ASSERT_EQ(bitset64, SimpleBitSet()); + ASSERT_EQ(bitset64.GetWord(0), 0); + + ASSERT_EQ(bitset64.ToBitset(), std::bitset(0)); + + ASSERT_EQ(bitset64.Set(0), true); + ASSERT_EQ(bitset64, SimpleBitSet(1)); + ASSERT_EQ(bitset64.GetWord(0), 1); + + ASSERT_EQ(bitset64.ToBitset(), std::bitset(1)); + + ASSERT_EQ(bitset64.Set(3), true); + ASSERT_EQ(bitset64, SimpleBitSet(9)); + ASSERT_EQ(bitset64.GetWord(0), 9); + + ASSERT_EQ(bitset64.ToBitset(), std::bitset(9)); + + ASSERT_EQ(bitset64[0], 1); + ASSERT_EQ(bitset64[1], 0); + ASSERT_EQ(bitset64[2], 0); + ASSERT_EQ(bitset64[3], 1); + ASSERT_EQ(bitset64[63], 0); + ASSERT_EQ(bitset64[64], -1); +} diff --git a/testsuite/c_test/ast_test/AST0077-InlineOptimize/InlineOptimize.c b/testsuite/c_test/ast_test/AST0077-InlineOptimize/InlineOptimize.c index db6d07469f4e21c07fb7f2b8e923a7397a9dda8a..ca7b6df6c4513ff2c1d89d25b2fcee676ed67b97 100644 --- a/testsuite/c_test/ast_test/AST0077-InlineOptimize/InlineOptimize.c +++ b/testsuite/c_test/ast_test/AST0077-InlineOptimize/InlineOptimize.c @@ -16,12 +16,12 @@ typedef void (*func)(); // CHECK: type $TypeC_MNO[[# IDX:]] asmattr}> +// CHECK-NEXT: @b <$TypeB_MNO[[# IDX:]]>}> // CHECK-NEXT:type $TypeB_MNO[[# IDX:]] asmattr}> +// CHECK-NEXT: @a <$TypeA_MNO[[# IDX:]]>}> // CHECK-NEXT:type $TypeA_MNO[[# IDX:]] +// CHECK-NEXT: @a i32}> // CHECK: func &func5 public used noinline () void struct TypeA { int a; diff --git a/testsuite/c_test/ast_test/AST0077-InlineOptimize/test.cfg b/testsuite/c_test/ast_test/AST0077-InlineOptimize/test.cfg index 5348a9a9c2a87bcd6b04f06441789ddbef8a6053..ae8da43e3c7f5cdc551e81d3db1facefdd7c9ff8 100644 --- a/testsuite/c_test/ast_test/AST0077-InlineOptimize/test.cfg +++ b/testsuite/c_test/ast_test/AST0077-InlineOptimize/test.cfg @@ -1,4 +1,3 @@ ASTO2: -compile(InlineOptimize) -run(InlineOptimize) -cat InlineOptimize.mplt_inline | ${MAPLE_ROOT}/tools/bin/FileCheck InlineOptimize.c +${MAPLE_BUILD_OUTPUT}/bin/maple -O2 InlineOptimize.c -S -finline-mplt-dir=./ -fexport-inline-mplt +cat *.mplt_inline | ${MAPLE_ROOT}/tools/bin/FileCheck InlineOptimize.c diff --git a/testsuite/c_test/ast_test/AST0084-PackedAttr/PackedAttr.c b/testsuite/c_test/ast_test/AST0084-PackedAttr/PackedAttr.c index 1541014c4414a4de75fbaaa996a7c77a9bd8aaf6..198e07e7937e72b7b509f82c521b2a0e37aa81ce 100644 --- a/testsuite/c_test/ast_test/AST0084-PackedAttr/PackedAttr.c +++ b/testsuite/c_test/ast_test/AST0084-PackedAttr/PackedAttr.c @@ -15,7 +15,7 @@ #include // CHECK: [[# FILENUM:]] "{{.*}}/PackedAttr.c" -// CHECK: type {{.*}} struct FOO1; void test1(struct FOO1 foo); -// CHECK: type $FOO2{{.*}} // CHECK-NOT: type $FOO2{{.*}} // CHECK-NOT: type $FOO3{{.*}} struct FOO4; typedef struct FOO4 foo4; void test5(foo4 foo); - -// CHECK: type $FOO6{{.*}} // CHECK-NOT: type $FOO6{{.*}} +// CHECK: type $FOO5{{.*}} struct FOO5; extern struct FOO5 foo5; struct FOO6{}; diff --git a/testsuite/c_test/ast_test/AST0098-UnionCast/HelloWorld.c b/testsuite/c_test/ast_test/AST0098-UnionCast/HelloWorld.c index 184c2581d72038216772ca50f6b5af7537d05878..f41bcafe2f69e3ae3582657900fd62d533a7b145 100644 --- a/testsuite/c_test/ast_test/AST0098-UnionCast/HelloWorld.c +++ b/testsuite/c_test/ast_test/AST0098-UnionCast/HelloWorld.c @@ -35,7 +35,7 @@ char *Foo (char *str) char *Foo1 (union tree_node * num_string) { // CHECK: LOC {{.*}} 39 16 - // CHECK-NEXT: dassign %anon.union.80 1 (iaddrof ptr <* <$tree_node_MNO2304581391>> 2 (dread ptr %__t_40_63)) + // CHECK-NEXT: dassign %anon.union.80 1 (iaddrof ptr <* <$tree_node{{.*}}>> 2 (dread ptr %__t_40_63)) char *str = ((union {const char * _q; char * _nq;}) ((const char *)(({ __typeof (num_string) const __t = num_string; __t; }) diff --git a/testsuite/c_test/ast_test/AST0130-Int128/test.cfg b/testsuite/c_test/ast_test/AST0130-Int128/test.cfg index 2394ca20f3954824fdfadf20ded16856d21ea705..76900f5517cb9a4ee3d26ea0c4061e163efdbe88 100644 --- a/testsuite/c_test/ast_test/AST0130-Int128/test.cfg +++ b/testsuite/c_test/ast_test/AST0130-Int128/test.cfg @@ -1,4 +1,5 @@ -compile(Int128andUInt128) +${ENHANCED_CLANG_PATH}/bin/clang Int128andUInt128.c -target aarch64-linux-gnu -U __SIZEOF_INT128__ -o ./Int128andUInt128.ast -emit-ast +${MAPLE_BUILD_OUTPUT}/bin/hir2mpl ./Int128andUInt128.ast --dump-level=1 --enable-variable-array --output ./ -rootPath ./ -g 2>&1 | tee compile.log cat compile.log sort compile.log -t ':' -k 3 -n -o compile.log cat compile.log | ${MAPLE_ROOT}/tools/bin/FileCheck Int128andUInt128.c diff --git a/testsuite/c_test/ast_test/AST0136-AlignedandPragmaattribute/AlignedandPragmaattribute.c b/testsuite/c_test/ast_test/AST0136-AlignedandPragmaattribute/AlignedandPragmaattribute.c index 6a68a9989d55a0034e5250356c4efdc2ccc56370..27598b09a2e24b257908dc96373dd4f28f3c0e3b 100644 --- a/testsuite/c_test/ast_test/AST0136-AlignedandPragmaattribute/AlignedandPragmaattribute.c +++ b/testsuite/c_test/ast_test/AST0136-AlignedandPragmaattribute/AlignedandPragmaattribute.c @@ -2,7 +2,7 @@ struct A { // CHECK: type $A +#include + +enum { + RED = 0, + BLUE = 1, + GREEN = 2, +}; + +int main() { + int n; + // CHECK: if (constval u1 1) + if(__builtin_constant_p("abc")) {} + // CHECK: dassign %intrinsicop_var_{{.*}} 0 (intrinsicop i32 C_constant_p (dread i32 %n_{{.*}})) + // CHECK: if (ne u1 i32 (dread i32 %intrinsicop_var_{{.*}}, constval i32 0)) + if(__builtin_constant_p(n)) {} + // CHECK: if (constval u1 1) + if(__builtin_constant_p(1)) {} + // CHECK: if (constval u1 1) + if(__builtin_constant_p(1 + I)) {} + // CHECK: if (constval u1 1) + if(__builtin_constant_p(RED)) {} + // CHECK: if (constval u1 1) + if(__builtin_constant_p(1.0)) {} + // CHECK: dassign %intrinsicop_var_{{.*}} 0 (intrinsicop i32 C_constant_p (dread i32 %n_{{.*}})) + // CHECK: brtrue @shortCircuit_{{.*}} (eq u1 i32 (dread i32 %intrinsicop_var_{{.*}}, constval i32 0)) + if(!__builtin_constant_p(n) || n < 0) {} + + int i=0; + // CHECK: if (constval u1 0) + if(__builtin_constant_p(i++)) {} + // CHECK: dassign %intrinsicop_var_{{.*}} 0 (intrinsicop i32 C_constant_p (dread i32 %i_{{.*}})) + if(1.0 * __builtin_constant_p(i)) {} + // CHECK: mul f64 ( + // CHECK: constval f64 1 + // CHECK: cvt f64 i32 (constval i32 1)) + if(1.0 * __builtin_constant_p(1)) {} + return 0; +} diff --git a/testsuite/c_test/ast_test/AST0143-ConstantP/test.cfg b/testsuite/c_test/ast_test/AST0143-ConstantP/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..d57b4347d081f14d2d8f824af41fcd099a070d43 --- /dev/null +++ b/testsuite/c_test/ast_test/AST0143-ConstantP/test.cfg @@ -0,0 +1,3 @@ +ASTO0: +compile(HelloWorld) +cat HelloWorld.mpl | ${MAPLE_ROOT}/tools/bin/FileCheck HelloWorld.c diff --git a/testsuite/c_test/ast_test/AST0143-PragmaPreferInline/HelloWorld.c b/testsuite/c_test/ast_test/AST0143-PragmaPreferInline/HelloWorld.c new file mode 100644 index 0000000000000000000000000000000000000000..f6297c628b4fe9b527fab6a05b7cba387701fb99 --- /dev/null +++ b/testsuite/c_test/ast_test/AST0143-PragmaPreferInline/HelloWorld.c @@ -0,0 +1,152 @@ +// CHECK: [[# FILENUM:]] "{{.*}}/HelloWorld.c" + +// CHECK: LOC {{.*}} 147 5 +// CHECK-NEXT: func &main public () i32 +// CHECK-NEXT: pragma !1 prefer_inline "ON" +// CHECK-NEXT: pragma !2 prefer_inline "OFF" +struct A { + int a; + int b; +}; + +int outScope(int a) { + return a - 1; +} + +int inScope(int a) { + return a + 1; +} + +int funcA() { + int d = 0; + #pragma prefer_inline ON + // CHECK: LOC {{.*}} 27 7 + // CHECK-NEXT: callassigned &inScope (constval i32 1) { dassign %retVar_3 0 } !1 + // CHECK: LOC {{.*}} 27 19 + // CHECK-NEXT: callassigned &outScope (constval i32 1) { dassign %retVar_4 0 } + d = inScope(1); outScope(1); + #pragma prefer_inline OFF + { + #pragma prefer_inline ON + // CHECK: LOC {{.*}} 33 13 + // CHECK-NEXT: callassigned &inScope (constval i32 2) { dassign %retVar_5 0 } !1 + int e = inScope(2); + // CHECK: LOC {{.*}} 36 5 + // CHECK-NEXT: callassigned &outScope (constval i32 2) { dassign %retVar_6 0 } + outScope(2); + } + #pragma prefer_inline ON + // CHECK: LOC {{.*}} 41 9 + // CHECK-NEXT: callassigned &inScope (constval i32 3) { dassign %retVar_7 0 } !1 + (long)inScope(3); + #pragma prefer_inline OFF + // CHECK: LOC {{.*}} 47 19 + // CHECK-NEXT: callassigned &inScope (constval i32 4) { dassign %retVar_9 0 } !2 + // CHECK: LOC {{.*}} 47 11 + // CHECK-NEXT: callassigned &inScope (dread i32 %retVar_9) { dassign %retVar_8 0 } !2 + int c = inScope(inScope(4)); + #pragma prefer_inline ON + { + // CHECK: LOC {{.*}} 52 13 + // CHECK-NEXT: callassigned &outScope (constval i32 5) { dassign %retVar_10 0 } + int f = outScope(5); + // CHECK: LOC {{.*}} 55 5 + // CHECK-NEXT: callassigned &outScope (constval i32 5) { dassign %retVar_11 0 } + outScope(5); + } + #pragma prefer_inline OFF + // CHECK: LOC {{.*}} 60 9 + // CHECK-NEXT: callassigned &inScope (constval i32 6) { dassign %retVar_12 0 } !2 + while(inScope(6)) { + // CHECK: LOC {{.*}} 63 5 + // CHECK-NEXT: callassigned &outScope (constval i32 6) { dassign %retVar_13 0 } + outScope(6); + } + #pragma prefer_inline ON + // CHECK: LOC {{.*}} 70 15 + // CHECK-NEXT: callassigned &inScope (constval i32 7) { dassign %retVar_14 0 } !1 + // CHECK: LOC {{.*}} 70 27 + // CHECK-NEXT: callassigned &inScope (constval i32 8) { dassign %retVar_15 0 } !1 + int b[2] = {inScope(7), inScope(8)}; + #pragma prefer_inline OFF + struct A Aa = { + // CHECK: LOC {{.*}} 77 13 + // CHECK-NEXT: callassigned &inScope (constval i32 8) { dassign %retVar_17 0 } !2 + // CHECK: LOC {{.*}} 78 5 + // CHECK-NEXT: callassigned &inScope (constval i32 9) { dassign %retVar_18 0 } !2 + inScope(inScope(8)), + inScope(9) + }; + #pragma prefer_inline ON + // CHECK: LOC {{.*}} 83 10 + // CHECK-NEXT: callassigned &inScope (constval i32 10) { dassign %retVar_19 0 } !1 + switch(inScope(10)) { + case 1: + // CHECK: LOC {{.*}} 87 7 + // CHECK: callassigned &outScope (constval i32 10) { dassign %retVar_20 0 } + outScope(10); + break; + case 2: + break; + default: + break; + } + #pragma prefer_inline OFF + do { + // CHECK: LOC {{.*}} 98 5 + // CHECK-NEXT: callassigned &outScope (constval i32 11) { dassign %retVar_22 0 } + outScope(11); + // CHECK: LOC {{.*}} 101 11 + // CHECK-NEXT: callassigned &inScope (constval i32 11) { dassign %retVar_21 0 } !2 + } while(inScope(11)); + #pragma prefer_inline ON + do { + #pragma prefer_inline OFF + // CHECK: LOC {{.*}} 107 5 + // CHECK-NEXT: callassigned &inScope (constval i32 12) { dassign %retVar_24 0 } !2 + inScope(12); + // CHECK: LOC {{.*}} 110 11 + // CHECK-NEXT: callassigned &inScope (constval i32 12) { dassign %retVar_23 0 } !1 + } while(inScope(12)); + #pragma prefer_inline ON + // CHECK: LOC {{.*}} 114 7 + // CHECK-NEXT: callassigned &inScope (constval i32 13) { dassign %retVar_25 0 } !1 + if (inScope(13)) { + // CHECK: LOC {{.*}} 117 5 + // CHECK-NEXT: callassigned &outScope (constval i32 13) { dassign %retVar_26 0 } + outScope(13); + } + #pragma prefer_inline OFF + // CHECK: LOC {{.*}} 122 7 + // CHECK-NEXT: callassigned &inScope (constval i32 14) { dassign %retVar_27 0 } !2 + if (inScope(14)) { + // CHECK: LOC {{.*}} 125 5 + // CHECK-NEXT: callassigned &outScope (constval i32 14) { dassign %retVar_28 0 } + outScope(14); + // CHECK: LOC {{.*}} 128 14 + // CHECK-NEXT: callassigned &outScope (constval i32 15) { dassign %retVar_29 0 } + } else if (outScope(15)) { + #pragma prefer_inline ON + // CHECK: LOC {{.*}} 132 5 + // CHECK-NEXT: callassigned &inScope (constval i32 15) { dassign %retVar_30 0 } !1 + inScope(15); + } + #pragma prefer_inline OFF + // CHECK: LOC {{.*}} 139 7 + // CHECK-NEXT: callassigned &inScope (constval i32 16) { dassign %retVar_33 0 } !2 + // CHECK: LOC {{.*}} 139 19 + // CHECK: callassigned &inScope (constval i32 17) { dassign %retVar_32 0 } !2 + if (inScope(16) || inScope(17)) { + // CHECK: LOC {{.*}} 142 5 + // CHECK-NEXT: callassigned &outScope (constval i32 16) { dassign %retVar_34 0 } + outScope(16); + } + return 0; +} + +int main() { + #pragma prefer_inline OFF + // CHECK: LOC {{.*}} 151 10 + // CHECK-NEXT: callassigned &funcA () { dassign %retVar_35 0 } !2 + return funcA(); +} \ No newline at end of file diff --git a/testsuite/c_test/ast_test/AST0143-PragmaPreferInline/test.cfg b/testsuite/c_test/ast_test/AST0143-PragmaPreferInline/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..80e564f577509c4764d22ddd51c66e2c6c8becb6 --- /dev/null +++ b/testsuite/c_test/ast_test/AST0143-PragmaPreferInline/test.cfg @@ -0,0 +1,3 @@ +ASTO0: +compile(HelloWorld) +cat HelloWorld.mpl | ${MAPLE_ROOT}/tools/bin/FileCheck HelloWorld.c \ No newline at end of file diff --git a/testsuite/c_test/ast_test/AST0144-Typedef/HelloWorld.c b/testsuite/c_test/ast_test/AST0144-Typedef/HelloWorld.c new file mode 100644 index 0000000000000000000000000000000000000000..63547f385692cd997a6fd0210dc060f0de3581c7 --- /dev/null +++ b/testsuite/c_test/ast_test/AST0144-Typedef/HelloWorld.c @@ -0,0 +1,47 @@ +// CHECK: [[# FILENUM:]] "{{.*}}/HelloWorld.c" + +// CHECK: type $A + myint c __attribute__((aligned(128))); +}; + +// CHECK: type $C + +enum { + RED = 0, + BLUE = 1, + GREEN = 2, +}; + +struct __attribute__((aligned(1))) S { + char a; +}; + +void func1(); +void func2(); +void Test() { + unsigned char a; + //CHECK: call &func1 (cvt i32 u32 (dread u32 %a + func1(a); + unsigned int b; + //CHECK: call &func1 (dread u32 %b + func1(b); + unsigned long c; + //CHECK: call &func1 (dread u64 %c + func1(c); + char d; + //CHECK: call &func1 (cvt i32 u32 (dread u32 %d + func1(d); + int e; + //CHECK: call &func1 (dread i32 %e + func1(e); + long g; + //CHECK: call &func1 (dread i64 %g + func1(g); + float f; + //CHECK: call &func1 (cvt f64 f32 (dread f32 %f + func1(f); + double h; + //CHECK: call &func1 (dread f64 %h + func1(h); + //CHECK: call &func2 (cvt i32 u32 (dread u32 %a + func2(a); + //CHECK: call &func2 ( + //CHECK-NEXT: cvt i32 u32 (dread u32 %a + //CHECK-NEXT: dread u32 %b + //CHECK-NEXT: dread u64 %c + //CHECK-NEXT: cvt i32 u32 (dread u32 %d + func2(a, b, c, d); + struct S s; + //CHECK: call &func2 (dread agg %s + func2(s); + int *p; + //CHECK: call &func2 (dread ptr %p + func2(p); + //CHECK: call &func2 (constval i32 0) + func2(RED); + //CHECK: call &func2 (dread agg %Complex + func2(1 + I); + //CHECK: call &func2 (cvt i32 u32 (dread u32 %postinc + func2(a++); + //CHECK: call &func2 (conststr ptr "abc") + func2("abc"); +} + +void func1(int a) {} +void func2(a, b, c) {} + +int main() { + return 0; +} diff --git a/testsuite/c_test/ast_test/AST0144-emptyParentheses/test.cfg b/testsuite/c_test/ast_test/AST0144-emptyParentheses/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..d57b4347d081f14d2d8f824af41fcd099a070d43 --- /dev/null +++ b/testsuite/c_test/ast_test/AST0144-emptyParentheses/test.cfg @@ -0,0 +1,3 @@ +ASTO0: +compile(HelloWorld) +cat HelloWorld.mpl | ${MAPLE_ROOT}/tools/bin/FileCheck HelloWorld.c diff --git a/testsuite/c_test/ast_test/AST0145-SignBit/HelloWorld.c b/testsuite/c_test/ast_test/AST0145-SignBit/HelloWorld.c new file mode 100644 index 0000000000000000000000000000000000000000..027ff3317bac9dccb859b665e566b657b8f80913 --- /dev/null +++ b/testsuite/c_test/ast_test/AST0145-SignBit/HelloWorld.c @@ -0,0 +1,19 @@ +// CHECK: [[# FILENUM:]] "{{.*}}/HelloWorld.c" +#include + +int main() +{ + float fn = -1.0; + double dn = -11.00; + // CHECK: LOC {{.*}} 10 10 + // CHECK: callassigned &__signbitf (dread f32 %fn_6_11) { dassign %retVar_323 0 } + if ((__builtin_signbit(fn)) == 0) { + printf("error\n"); + } + // CHECK: LOC {{.*}} 15 10 + // CHECK: callassigned &__signbitf (cvt f32 f64 (dread f64 %dn_7_12)) { dassign %retVar_327 0 } + if ((__builtin_signbitf(dn)) == 0) { + printf("error\n"); + } + return 0; +} \ No newline at end of file diff --git a/testsuite/c_test/ast_test/AST0145-SignBit/test.cfg b/testsuite/c_test/ast_test/AST0145-SignBit/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..80e564f577509c4764d22ddd51c66e2c6c8becb6 --- /dev/null +++ b/testsuite/c_test/ast_test/AST0145-SignBit/test.cfg @@ -0,0 +1,3 @@ +ASTO0: +compile(HelloWorld) +cat HelloWorld.mpl | ${MAPLE_ROOT}/tools/bin/FileCheck HelloWorld.c \ No newline at end of file diff --git a/testsuite/c_test/driver_test/DRIVER0028-specsopt/test.cfg b/testsuite/c_test/driver_test/DRIVER0028-specsopt/test.cfg index ec48b4aeffaa79c4d0d7745b9007a52bcf1f20bc..f8c7a88d4799a5894ac0be8e8f8e8e924ad92dd4 100644 --- a/testsuite/c_test/driver_test/DRIVER0028-specsopt/test.cfg +++ b/testsuite/c_test/driver_test/DRIVER0028-specsopt/test.cfg @@ -1,2 +1,2 @@ -compile(APP=main.c,OPTION="-O0 -specs=./maple.specs") +compile(APP=main.c,OPTION="-O0 --quiet -DAC="\"qwe qwe\"" -specs=./maple.specs --save-temps") run(a) diff --git a/testsuite/c_test/driver_test/DRIVER0033-number-so/expected.txt b/testsuite/c_test/driver_test/DRIVER0033-number-so/expected.txt new file mode 100644 index 0000000000000000000000000000000000000000..037580f34b612519e62d8159f609c6de908c313d --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0033-number-so/expected.txt @@ -0,0 +1,3 @@ +foo +hello world!???(y/n) +long double type size is 16 16 diff --git a/testsuite/c_test/driver_test/DRIVER0033-number-so/foo.c b/testsuite/c_test/driver_test/DRIVER0033-number-so/foo.c new file mode 100644 index 0000000000000000000000000000000000000000..ab0e907eba4ab8796bcbdca954094460dbd97f73 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0033-number-so/foo.c @@ -0,0 +1,9 @@ + +#include +#include +#include +#include + +extern void foo(){ + printf("foo\n"); +} diff --git a/testsuite/c_test/driver_test/DRIVER0033-number-so/main.c b/testsuite/c_test/driver_test/DRIVER0033-number-so/main.c new file mode 100644 index 0000000000000000000000000000000000000000..b2becaaa1b003e6ab0799a8dac3f50b08a492753 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0033-number-so/main.c @@ -0,0 +1,14 @@ + +#include +#include +#include +#include + +int main(void) +{ + long double ld = 10000.2222L; + foo(); + puts("hello world!???(y/n)"); + printf("long double type size is %lu %lu\n",sizeof(long double),sizeof ld); + return 0; +} diff --git a/testsuite/c_test/driver_test/DRIVER0033-number-so/test.cfg b/testsuite/c_test/driver_test/DRIVER0033-number-so/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..6aab020ec69ee595dbb875bb25937ee1939d8bf5 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0033-number-so/test.cfg @@ -0,0 +1,4 @@ +compile(APP=foo.c,OPTION="-shared -o libfoo.so.2.1") +compile(APP=main.c,OPTION="-c") +compile(APP=main.o,OPTION="./libfoo.so.2.1") +run(a) diff --git a/testsuite/c_test/driver_test/DRIVER0035-targetprop-fpie/main.c b/testsuite/c_test/driver_test/DRIVER0035-targetprop-fpie/main.c index 09cae66c92404cab90776289d5c6beeff29e8832..6ae6b31acd9243cc745d24f3b3c96d376a244c91 100644 --- a/testsuite/c_test/driver_test/DRIVER0035-targetprop-fpie/main.c +++ b/testsuite/c_test/driver_test/DRIVER0035-targetprop-fpie/main.c @@ -4,10 +4,9 @@ a = 208, b = 5; c() { int8_t *d = &b; // CHECK: adrp {{x[0-9]}}, b - // CHECK: add {{x[0-9]}}, {{x[0-9]}}, :lo12:b - // CHECK-NEXT: ldr {{x[0-9]}}, [{{x[0-9]}}] + // CHECK-NOT: ldr {{x[0-9]}}, [{{x[0-9]}}, #:lo12:b] // CHECK: str {{x[0-9]}}, [{{x[0-9]}}] uint64_t *e; __atomic_compare_exchange_n(e, d, 0, 0, 0, 0); } -main() {} \ No newline at end of file +main() {} diff --git a/testsuite/c_test/driver_test/DRIVER0037-strldr-fpie/main.c b/testsuite/c_test/driver_test/DRIVER0037-strldr-fpie/main.c index af8941a81a3e920751b4b31e0edd4e21cad6dc34..42e24bf6dc609461ff51c90e6342304a9602b01f 100644 --- a/testsuite/c_test/driver_test/DRIVER0037-strldr-fpie/main.c +++ b/testsuite/c_test/driver_test/DRIVER0037-strldr-fpie/main.c @@ -5,11 +5,10 @@ c() { uint64_t d; uint64_t *e; // CHECK: adrp {{x[0-9]}}, b - // CHECK: add {{x[0-9]}}, {{x[0-9]}}, :lo12:b - // CHECK-NEXT: ldr {{x[0-9]}}, [{{x[0-9]}}] + // CHECK-NOT: ldr {{x[0-9]}}, [{{x[0-9]}}, #:lo12:b] int32_t *f = &b; __atomic_compare_exchange_n(e, f, 0, a, d, 0); uint64_t *g; f + *g &&c; } -main() {} \ No newline at end of file +main() {} diff --git a/testsuite/c_test/driver_test/DRIVER0038-link-lib/expected.txt b/testsuite/c_test/driver_test/DRIVER0038-link-lib/expected.txt new file mode 100644 index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391 diff --git a/testsuite/c_test/driver_test/DRIVER0038-link-lib/foo.c b/testsuite/c_test/driver_test/DRIVER0038-link-lib/foo.c new file mode 100644 index 0000000000000000000000000000000000000000..3354c854b1f42861a35799b3c55ed4eed76eb6ae --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0038-link-lib/foo.c @@ -0,0 +1,3 @@ +int foo(int a, int b) { + return a + b; +} \ No newline at end of file diff --git a/testsuite/c_test/driver_test/DRIVER0038-link-lib/main.c b/testsuite/c_test/driver_test/DRIVER0038-link-lib/main.c new file mode 100644 index 0000000000000000000000000000000000000000..f94f26f8ea1579d30890213633c9593777fdd216 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0038-link-lib/main.c @@ -0,0 +1,12 @@ +#include + +int foo(int a, int b); +int main() { + int a = sin(1); + int b = cos(2); + foo(a, b); +} + +// CHECK: Shared library: [libfoo.so.1] +// CHECK: Shared library: [libm.so.6] +// CHECK-NEXT: Shared library: [libpthread.so.0] \ No newline at end of file diff --git a/testsuite/c_test/driver_test/DRIVER0038-link-lib/test.cfg b/testsuite/c_test/driver_test/DRIVER0038-link-lib/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..fa66b3bf84d4b4ee26efe1eb20b7449ebc58d237 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0038-link-lib/test.cfg @@ -0,0 +1,5 @@ +compile(APP=main.c,OPTION="-c -o main.o") +compile(APP=foo.c,OPTION="-shared -o libfoo.so.1") +compile(APP=main.o,OPTION="libfoo.so.1 -lm -l pthread") +readelf -d a.out | ${MAPLE_ROOT}/tools/bin/FileCheck main.c +run(a) \ No newline at end of file diff --git a/testsuite/c_test/driver_test/DRIVER0039-libfake/expected.txt b/testsuite/c_test/driver_test/DRIVER0039-libfake/expected.txt new file mode 100644 index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391 diff --git a/testsuite/c_test/driver_test/DRIVER0039-libfake/foo.c b/testsuite/c_test/driver_test/DRIVER0039-libfake/foo.c new file mode 100644 index 0000000000000000000000000000000000000000..af16dfdb1754b39bfea40240fefb654ce2475a35 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0039-libfake/foo.c @@ -0,0 +1,3 @@ +int foo() { + return 0; +} \ No newline at end of file diff --git a/testsuite/c_test/driver_test/DRIVER0039-libfake/function.c b/testsuite/c_test/driver_test/DRIVER0039-libfake/function.c new file mode 100644 index 0000000000000000000000000000000000000000..69bd7b3c479e5ebaddb7d6c675b5cab6d65e7639 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0039-libfake/function.c @@ -0,0 +1,5 @@ +extern int foo(); +int function() +{ + return foo(); +} \ No newline at end of file diff --git a/testsuite/c_test/driver_test/DRIVER0039-libfake/main.c b/testsuite/c_test/driver_test/DRIVER0039-libfake/main.c new file mode 100644 index 0000000000000000000000000000000000000000..9644589ad0e271beba4676345ac724bb54cbaa57 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0039-libfake/main.c @@ -0,0 +1,8 @@ +extern int function(); + +int main() +{ + int a; + a = function(); + return a; +} \ No newline at end of file diff --git a/testsuite/c_test/driver_test/DRIVER0039-libfake/test.cfg b/testsuite/c_test/driver_test/DRIVER0039-libfake/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..675d7c9410c73e75406086762d47923c8acd4275 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0039-libfake/test.cfg @@ -0,0 +1,6 @@ +compile(APP=main.c,OPTION="-c -o main.o") +compile(APP=foo.c,OPTION="-c -o foo.o") +compile(APP=function.c,OPTION="-flto -c") +ar r libfoo.a foo.o +compile(main.o foo.o function.o libfoo.a,OPTION="-flto") +run(a) \ No newline at end of file diff --git a/testsuite/c_test/driver_test/DRIVER0039-link-option/expected.txt b/testsuite/c_test/driver_test/DRIVER0039-link-option/expected.txt new file mode 100644 index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391 diff --git a/testsuite/c_test/driver_test/DRIVER0039-link-option/foo.c b/testsuite/c_test/driver_test/DRIVER0039-link-option/foo.c new file mode 100644 index 0000000000000000000000000000000000000000..3354c854b1f42861a35799b3c55ed4eed76eb6ae --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0039-link-option/foo.c @@ -0,0 +1,3 @@ +int foo(int a, int b) { + return a + b; +} \ No newline at end of file diff --git a/testsuite/c_test/driver_test/DRIVER0039-link-option/main.c b/testsuite/c_test/driver_test/DRIVER0039-link-option/main.c new file mode 100644 index 0000000000000000000000000000000000000000..f94f26f8ea1579d30890213633c9593777fdd216 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0039-link-option/main.c @@ -0,0 +1,12 @@ +#include + +int foo(int a, int b); +int main() { + int a = sin(1); + int b = cos(2); + foo(a, b); +} + +// CHECK: Shared library: [libfoo.so.1] +// CHECK: Shared library: [libm.so.6] +// CHECK-NEXT: Shared library: [libpthread.so.0] \ No newline at end of file diff --git a/testsuite/c_test/driver_test/DRIVER0039-link-option/test.cfg b/testsuite/c_test/driver_test/DRIVER0039-link-option/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..5ccf88dae8a9714f72ca4e76932800430be31e1d --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0039-link-option/test.cfg @@ -0,0 +1,4 @@ +compile(APP=main.c,OPTION="-c -o main.o") +compile(APP=foo.c,OPTION="-c -o foo.o") +compile(APP=main.o foo.o,OPTION="--fpic --fPIE -lm") +run(a) \ No newline at end of file diff --git a/testsuite/c_test/driver_test/DRIVER0040-lto-fpic/helper.c b/testsuite/c_test/driver_test/DRIVER0040-lto-fpic/helper.c new file mode 100644 index 0000000000000000000000000000000000000000..d7b676ce7cac71417de1fb1657ba33c5808b0f51 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0040-lto-fpic/helper.c @@ -0,0 +1,24 @@ +/* + * Copyright (C) [2021] Futurewei Technologies, Inc. All rights reverved. + * + * Licensed under the Mulan Permissive Software License v2. + * You can use this software according to the terms and conditions of the MulanPSL - 2.0. + * You may obtain a copy of MulanPSL - 2.0 at: + * + * https://opensource.org/licenses/MulanPSL-2.0 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the MulanPSL - 2.0 for more details. + */ + +#include +#include + +int helper(int in) +{ + printf("HELPER\n"); + return in * 2; +} + diff --git a/testsuite/c_test/driver_test/DRIVER0040-lto-fpic/main.c b/testsuite/c_test/driver_test/DRIVER0040-lto-fpic/main.c new file mode 100644 index 0000000000000000000000000000000000000000..aeb14bbc600b180bc8d1e8d3f5ca9de9221c3802 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0040-lto-fpic/main.c @@ -0,0 +1,28 @@ +/* + * Copyright (C) [2021] Futurewei Technologies, Inc. All rights reverved. + * + * Licensed under the Mulan Permissive Software License v2. + * You can use this software according to the terms and conditions of the MulanPSL - 2.0. + * You may obtain a copy of MulanPSL - 2.0 at: + * + * https://opensource.org/licenses/MulanPSL-2.0 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the MulanPSL - 2.0 for more details. + */ + +#include +#include + +int helper(int in); + +int main(void) +{ + printf("MAIN\n"); + int res = helper(10); + printf("RES: %d\n", res); + return 0; +} +// CHECK: -fpic diff --git a/testsuite/c_test/driver_test/DRIVER0040-lto-fpic/test.cfg b/testsuite/c_test/driver_test/DRIVER0040-lto-fpic/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..c7cc39a2a525920eddc57f1977d4dd4ee1574c57 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0040-lto-fpic/test.cfg @@ -0,0 +1,5 @@ +LTO_TEST: +compile(APP="main.c",option="-c -flto -O1 -fPIC") +compile(APP="helper.c",option="-c -flto -O2 -fpic") +link(BPP="main.o helper.o",linkoption="--debug -flto &> 1.txt") +cat 1.txt | ${MAPLE_ROOT}/tools/bin/FileCheck main.c diff --git a/testsuite/c_test/driver_test/DRIVER0041-lto-fnopic/helper.c b/testsuite/c_test/driver_test/DRIVER0041-lto-fnopic/helper.c new file mode 100644 index 0000000000000000000000000000000000000000..63fa322ab7965893ccd9e527a874bf3cbd272e36 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0041-lto-fnopic/helper.c @@ -0,0 +1,24 @@ +/* + * Copyright (C) [2021] Futurewei Technologies, Inc. All rights reverved. + * + * Licensed under the Mulan Permissive Software License v2. + * You can use this software according to the terms and conditions of the MulanPSL - 2.0. + * You may obtain a copy of MulanPSL - 2.0 at: + * + * https://opensource.org/licenses/MulanPSL-2.0 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the MulanPSL - 2.0 for more details. + */ + +#include +#include + +int helper(int in) +{ + printf("HELPER\n"); + return in * 2; +} +// CHECK: -fno-pie diff --git a/testsuite/c_test/driver_test/DRIVER0041-lto-fnopic/main.c b/testsuite/c_test/driver_test/DRIVER0041-lto-fnopic/main.c new file mode 100644 index 0000000000000000000000000000000000000000..bf349d029dd8a8244fdbf95c5ad9242eb18ff3ff --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0041-lto-fnopic/main.c @@ -0,0 +1,28 @@ +/* + * Copyright (C) [2021] Futurewei Technologies, Inc. All rights reverved. + * + * Licensed under the Mulan Permissive Software License v2. + * You can use this software according to the terms and conditions of the MulanPSL - 2.0. + * You may obtain a copy of MulanPSL - 2.0 at: + * + * https://opensource.org/licenses/MulanPSL-2.0 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the MulanPSL - 2.0 for more details. + */ + +#include +#include + +int helper(int in); + +int main(void) +{ + printf("MAIN\n"); + int res = helper(10); + printf("RES: %d\n", res); + return 0; +} +// CHECK: -fno-pic diff --git a/testsuite/c_test/driver_test/DRIVER0041-lto-fnopic/test.cfg b/testsuite/c_test/driver_test/DRIVER0041-lto-fnopic/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..6e542de54cb35e9d22c968b33677cd84a0d58e43 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0041-lto-fnopic/test.cfg @@ -0,0 +1,17 @@ +LTO_TEST: +compile(APP="main.c",option="-c -flto -O1 -fPIC") +compile(APP="helper.c",option="-c -flto -O2 -fno-pic") +link(BPP="main.o helper.o",linkoption="--debug -flto &> 1.txt") +cat 1.txt | ${MAPLE_ROOT}/tools/bin/FileCheck main.c +compile(APP="main.c",option="-c -flto -O1 -fpic") +compile(APP="helper.c",option="-c -flto -O2 -fno-pic") +link(BPP="main.o helper.o",linkoption="--debug -flto &> 1.txt") +cat 1.txt | ${MAPLE_ROOT}/tools/bin/FileCheck main.c +compile(APP="main.c",option="-c -flto -O1 -fno-pic") +compile(APP="helper.c",option="-c -flto -O2") +link(BPP="main.o helper.o",linkoption="--debug -flto &> 1.txt") +cat 1.txt | ${MAPLE_ROOT}/tools/bin/FileCheck main.c +compile(APP="main.c",option="-c -flto -O1") +compile(APP="helper.c",option="-c -flto -O2 -fno-pic") +link(BPP="main.o helper.o",linkoption="--debug -flto &> 1.txt") +cat 1.txt | ${MAPLE_ROOT}/tools/bin/FileCheck helper.c diff --git a/testsuite/c_test/driver_test/DRIVER0042-lto-O1O2/helper.c b/testsuite/c_test/driver_test/DRIVER0042-lto-O1O2/helper.c new file mode 100644 index 0000000000000000000000000000000000000000..d7b676ce7cac71417de1fb1657ba33c5808b0f51 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0042-lto-O1O2/helper.c @@ -0,0 +1,24 @@ +/* + * Copyright (C) [2021] Futurewei Technologies, Inc. All rights reverved. + * + * Licensed under the Mulan Permissive Software License v2. + * You can use this software according to the terms and conditions of the MulanPSL - 2.0. + * You may obtain a copy of MulanPSL - 2.0 at: + * + * https://opensource.org/licenses/MulanPSL-2.0 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the MulanPSL - 2.0 for more details. + */ + +#include +#include + +int helper(int in) +{ + printf("HELPER\n"); + return in * 2; +} + diff --git a/testsuite/c_test/driver_test/DRIVER0042-lto-O1O2/main.c b/testsuite/c_test/driver_test/DRIVER0042-lto-O1O2/main.c new file mode 100644 index 0000000000000000000000000000000000000000..25d543ea53deec8c70063d930cbc533a2351a052 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0042-lto-O1O2/main.c @@ -0,0 +1,28 @@ +/* + * Copyright (C) [2021] Futurewei Technologies, Inc. All rights reverved. + * + * Licensed under the Mulan Permissive Software License v2. + * You can use this software according to the terms and conditions of the MulanPSL - 2.0. + * You may obtain a copy of MulanPSL - 2.0 at: + * + * https://opensource.org/licenses/MulanPSL-2.0 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the MulanPSL - 2.0 for more details. + */ + +#include +#include + +int helper(int in); + +int main(void) +{ + printf("MAIN\n"); + int res = helper(10); + printf("RES: %d\n", res); + return 0; +} +// CHECK: -O2 diff --git a/testsuite/c_test/driver_test/DRIVER0042-lto-O1O2/test.cfg b/testsuite/c_test/driver_test/DRIVER0042-lto-O1O2/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..64bd6e4a539038dd5b63e5216403a2c3e1bc92bd --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0042-lto-O1O2/test.cfg @@ -0,0 +1,5 @@ +LTO_TEST: +compile(APP="main.c",option="-c -flto -O1 -fPIC") +compile(APP="helper.c",option="-c -flto -O2") +link(BPP="main.o helper.o",linkoption="--debug -flto &> 1.txt") +cat 1.txt | ${MAPLE_ROOT}/tools/bin/FileCheck main.c diff --git a/testsuite/c_test/driver_test/DRIVER0043-lto-fpicfPIE/helper.c b/testsuite/c_test/driver_test/DRIVER0043-lto-fpicfPIE/helper.c new file mode 100644 index 0000000000000000000000000000000000000000..d7b676ce7cac71417de1fb1657ba33c5808b0f51 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0043-lto-fpicfPIE/helper.c @@ -0,0 +1,24 @@ +/* + * Copyright (C) [2021] Futurewei Technologies, Inc. All rights reverved. + * + * Licensed under the Mulan Permissive Software License v2. + * You can use this software according to the terms and conditions of the MulanPSL - 2.0. + * You may obtain a copy of MulanPSL - 2.0 at: + * + * https://opensource.org/licenses/MulanPSL-2.0 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the MulanPSL - 2.0 for more details. + */ + +#include +#include + +int helper(int in) +{ + printf("HELPER\n"); + return in * 2; +} + diff --git a/testsuite/c_test/driver_test/DRIVER0043-lto-fpicfPIE/main.c b/testsuite/c_test/driver_test/DRIVER0043-lto-fpicfPIE/main.c new file mode 100644 index 0000000000000000000000000000000000000000..80af2d95e2ea832a455cb59106fffce0d8c54bcc --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0043-lto-fpicfPIE/main.c @@ -0,0 +1,28 @@ +/* + * Copyright (C) [2021] Futurewei Technologies, Inc. All rights reverved. + * + * Licensed under the Mulan Permissive Software License v2. + * You can use this software according to the terms and conditions of the MulanPSL - 2.0. + * You may obtain a copy of MulanPSL - 2.0 at: + * + * https://opensource.org/licenses/MulanPSL-2.0 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the MulanPSL - 2.0 for more details. + */ + +#include +#include + +int helper(int in); + +int main(void) +{ + printf("MAIN\n"); + int res = helper(10); + printf("RES: %d\n", res); + return 0; +} +// CHECK: -fpie diff --git a/testsuite/c_test/driver_test/DRIVER0043-lto-fpicfPIE/test.cfg b/testsuite/c_test/driver_test/DRIVER0043-lto-fpicfPIE/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..3b5cb8caf994fd2f892046fe593ad927e4464681 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0043-lto-fpicfPIE/test.cfg @@ -0,0 +1,5 @@ +LTO_TEST: +compile(APP="main.c",option="-c -flto -O1 -fPIE") +compile(APP="helper.c",option="-c -flto -O2 -fpic") +link(BPP="main.o helper.o",linkoption="--debug -flto &> 1.txt") +cat 1.txt | ${MAPLE_ROOT}/tools/bin/FileCheck main.c diff --git a/testsuite/c_test/driver_test/DRIVER0044-lto-fpie/helper.c b/testsuite/c_test/driver_test/DRIVER0044-lto-fpie/helper.c new file mode 100644 index 0000000000000000000000000000000000000000..d7b676ce7cac71417de1fb1657ba33c5808b0f51 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0044-lto-fpie/helper.c @@ -0,0 +1,24 @@ +/* + * Copyright (C) [2021] Futurewei Technologies, Inc. All rights reverved. + * + * Licensed under the Mulan Permissive Software License v2. + * You can use this software according to the terms and conditions of the MulanPSL - 2.0. + * You may obtain a copy of MulanPSL - 2.0 at: + * + * https://opensource.org/licenses/MulanPSL-2.0 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the MulanPSL - 2.0 for more details. + */ + +#include +#include + +int helper(int in) +{ + printf("HELPER\n"); + return in * 2; +} + diff --git a/testsuite/c_test/driver_test/DRIVER0044-lto-fpie/main.c b/testsuite/c_test/driver_test/DRIVER0044-lto-fpie/main.c new file mode 100644 index 0000000000000000000000000000000000000000..80af2d95e2ea832a455cb59106fffce0d8c54bcc --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0044-lto-fpie/main.c @@ -0,0 +1,28 @@ +/* + * Copyright (C) [2021] Futurewei Technologies, Inc. All rights reverved. + * + * Licensed under the Mulan Permissive Software License v2. + * You can use this software according to the terms and conditions of the MulanPSL - 2.0. + * You may obtain a copy of MulanPSL - 2.0 at: + * + * https://opensource.org/licenses/MulanPSL-2.0 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the MulanPSL - 2.0 for more details. + */ + +#include +#include + +int helper(int in); + +int main(void) +{ + printf("MAIN\n"); + int res = helper(10); + printf("RES: %d\n", res); + return 0; +} +// CHECK: -fpie diff --git a/testsuite/c_test/driver_test/DRIVER0044-lto-fpie/test.cfg b/testsuite/c_test/driver_test/DRIVER0044-lto-fpie/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..a93974f8681e0b8229a9c8f18a1dcbdda15531d6 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0044-lto-fpie/test.cfg @@ -0,0 +1,5 @@ +LTO_TEST: +compile(APP="main.c",option="-c -flto -O1 -fPIE") +compile(APP="helper.c",option="-c -flto -O2 -fpie") +link(BPP="main.o helper.o",linkoption="--debug -flto &> 1.txt") +cat 1.txt | ${MAPLE_ROOT}/tools/bin/FileCheck main.c diff --git a/testsuite/c_test/driver_test/DRIVER0045-lto-fno-pie/helper.c b/testsuite/c_test/driver_test/DRIVER0045-lto-fno-pie/helper.c new file mode 100644 index 0000000000000000000000000000000000000000..d7b676ce7cac71417de1fb1657ba33c5808b0f51 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0045-lto-fno-pie/helper.c @@ -0,0 +1,24 @@ +/* + * Copyright (C) [2021] Futurewei Technologies, Inc. All rights reverved. + * + * Licensed under the Mulan Permissive Software License v2. + * You can use this software according to the terms and conditions of the MulanPSL - 2.0. + * You may obtain a copy of MulanPSL - 2.0 at: + * + * https://opensource.org/licenses/MulanPSL-2.0 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the MulanPSL - 2.0 for more details. + */ + +#include +#include + +int helper(int in) +{ + printf("HELPER\n"); + return in * 2; +} + diff --git a/testsuite/c_test/driver_test/DRIVER0045-lto-fno-pie/main.c b/testsuite/c_test/driver_test/DRIVER0045-lto-fno-pie/main.c new file mode 100644 index 0000000000000000000000000000000000000000..0324e54bb86297b2d530c0dcb18e174c6692c2d7 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0045-lto-fno-pie/main.c @@ -0,0 +1,28 @@ +/* + * Copyright (C) [2021] Futurewei Technologies, Inc. All rights reverved. + * + * Licensed under the Mulan Permissive Software License v2. + * You can use this software according to the terms and conditions of the MulanPSL - 2.0. + * You may obtain a copy of MulanPSL - 2.0 at: + * + * https://opensource.org/licenses/MulanPSL-2.0 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the MulanPSL - 2.0 for more details. + */ + +#include +#include + +int helper(int in); + +int main(void) +{ + printf("MAIN\n"); + int res = helper(10); + printf("RES: %d\n", res); + return 0; +} +// CHECK: -fno-pie diff --git a/testsuite/c_test/driver_test/DRIVER0045-lto-fno-pie/test.cfg b/testsuite/c_test/driver_test/DRIVER0045-lto-fno-pie/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..248c00f356d23e3b6b5380fced36fd82e09eeba8 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0045-lto-fno-pie/test.cfg @@ -0,0 +1,17 @@ +LTO_TEST: +compile(APP="main.c",option="-c -flto -O1 -fno-pie") +compile(APP="helper.c",option="-c -flto -O2 -fpie") +link(BPP="main.o helper.o",linkoption="--debug -flto &> 1.txt") +cat 1.txt | ${MAPLE_ROOT}/tools/bin/FileCheck main.c +compile(APP="main.c",option="-c -flto -O1 -fno-pie") +compile(APP="helper.c",option="-c -flto -O2 -fPIE") +link(BPP="main.o helper.o",linkoption="--debug -flto &> 1.txt") +cat 1.txt | ${MAPLE_ROOT}/tools/bin/FileCheck main.c +compile(APP="main.c",option="-c -flto -O1") +compile(APP="helper.c",option="-c -flto -O2 -fno-pie") +link(BPP="main.o helper.o",linkoption="--debug -flto &> 1.txt") +cat 1.txt | ${MAPLE_ROOT}/tools/bin/FileCheck main.c +compile(APP="main.c",option="-c -flto -O1 -fno-pie") +compile(APP="helper.c",option="-c -flto -O2") +link(BPP="main.o helper.o",linkoption="--debug -flto &> 1.txt") +cat 1.txt | ${MAPLE_ROOT}/tools/bin/FileCheck main.c diff --git a/testsuite/c_test/driver_test/DRIVER0046-lto-O1O2O1/helper.c b/testsuite/c_test/driver_test/DRIVER0046-lto-O1O2O1/helper.c new file mode 100644 index 0000000000000000000000000000000000000000..d7b676ce7cac71417de1fb1657ba33c5808b0f51 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0046-lto-O1O2O1/helper.c @@ -0,0 +1,24 @@ +/* + * Copyright (C) [2021] Futurewei Technologies, Inc. All rights reverved. + * + * Licensed under the Mulan Permissive Software License v2. + * You can use this software according to the terms and conditions of the MulanPSL - 2.0. + * You may obtain a copy of MulanPSL - 2.0 at: + * + * https://opensource.org/licenses/MulanPSL-2.0 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the MulanPSL - 2.0 for more details. + */ + +#include +#include + +int helper(int in) +{ + printf("HELPER\n"); + return in * 2; +} + diff --git a/testsuite/c_test/driver_test/DRIVER0046-lto-O1O2O1/main.c b/testsuite/c_test/driver_test/DRIVER0046-lto-O1O2O1/main.c new file mode 100644 index 0000000000000000000000000000000000000000..c465a94cf14af5fe314273c580c30c348e9ef400 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0046-lto-O1O2O1/main.c @@ -0,0 +1,28 @@ +/* + * Copyright (C) [2021] Futurewei Technologies, Inc. All rights reverved. + * + * Licensed under the Mulan Permissive Software License v2. + * You can use this software according to the terms and conditions of the MulanPSL - 2.0. + * You may obtain a copy of MulanPSL - 2.0 at: + * + * https://opensource.org/licenses/MulanPSL-2.0 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the MulanPSL - 2.0 for more details. + */ + +#include +#include + +int helper(int in); + +int main(void) +{ + printf("MAIN\n"); + int res = helper(10); + printf("RES: %d\n", res); + return 0; +} +// CHECK: -O1 diff --git a/testsuite/c_test/driver_test/DRIVER0046-lto-O1O2O1/test.cfg b/testsuite/c_test/driver_test/DRIVER0046-lto-O1O2O1/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..a3784411f6c37b2a882a7c3a4d11a791a9c3ed06 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0046-lto-O1O2O1/test.cfg @@ -0,0 +1,5 @@ +LTO_TEST: +compile(APP="main.c",option="-c -flto -O1 -fPIE") +compile(APP="helper.c",option="-c -flto -O2") +link(BPP="main.o helper.o",linkoption="-O1 --debug -flto &> 1.txt") +cat 1.txt | ${MAPLE_ROOT}/tools/bin/FileCheck main.c diff --git a/testsuite/c_test/driver_test/DRIVER0047-fPIEfpie-comb/main.c b/testsuite/c_test/driver_test/DRIVER0047-fPIEfpie-comb/main.c new file mode 100644 index 0000000000000000000000000000000000000000..5acd3062adbe280262667e912eac5a0202b8cc3f --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0047-fPIEfpie-comb/main.c @@ -0,0 +1,17 @@ +#include + +extern uint64_t a; +int8_t b = 5; + +void c() { + // CHECK: adrp x0, b + // CHECK-NEXT: add x0, x0, :lo12:b + int8_t *d = &b; + // CHECK: adrp x0, _GLOBAL_OFFSET_TABLE_ + // CHECK-NEXT: ldr x0, [x0, #:gotpage_lo15:a] + uint64_t *e = &a; + __atomic_compare_exchange_n(e, d, 0, 0, 0, 0); +} +int main() { + return 0; +} \ No newline at end of file diff --git a/testsuite/c_test/driver_test/DRIVER0047-fPIEfpie-comb/test.cfg b/testsuite/c_test/driver_test/DRIVER0047-fPIEfpie-comb/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..e8534972c10bfab16d97f54db95746078155b26b --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0047-fPIEfpie-comb/test.cfg @@ -0,0 +1,2 @@ +compile(APP=main.c,OPTION="-O0 -fPIE -fpie -w -S") +cat main.s | ${MAPLE_ROOT}/tools/bin/FileCheck main.c \ No newline at end of file diff --git a/testsuite/c_test/driver_test/DRIVER0047-lto-fpicfpie/helper.c b/testsuite/c_test/driver_test/DRIVER0047-lto-fpicfpie/helper.c new file mode 100644 index 0000000000000000000000000000000000000000..d7b676ce7cac71417de1fb1657ba33c5808b0f51 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0047-lto-fpicfpie/helper.c @@ -0,0 +1,24 @@ +/* + * Copyright (C) [2021] Futurewei Technologies, Inc. All rights reverved. + * + * Licensed under the Mulan Permissive Software License v2. + * You can use this software according to the terms and conditions of the MulanPSL - 2.0. + * You may obtain a copy of MulanPSL - 2.0 at: + * + * https://opensource.org/licenses/MulanPSL-2.0 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the MulanPSL - 2.0 for more details. + */ + +#include +#include + +int helper(int in) +{ + printf("HELPER\n"); + return in * 2; +} + diff --git a/testsuite/c_test/driver_test/DRIVER0047-lto-fpicfpie/main.c b/testsuite/c_test/driver_test/DRIVER0047-lto-fpicfpie/main.c new file mode 100644 index 0000000000000000000000000000000000000000..80af2d95e2ea832a455cb59106fffce0d8c54bcc --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0047-lto-fpicfpie/main.c @@ -0,0 +1,28 @@ +/* + * Copyright (C) [2021] Futurewei Technologies, Inc. All rights reverved. + * + * Licensed under the Mulan Permissive Software License v2. + * You can use this software according to the terms and conditions of the MulanPSL - 2.0. + * You may obtain a copy of MulanPSL - 2.0 at: + * + * https://opensource.org/licenses/MulanPSL-2.0 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the MulanPSL - 2.0 for more details. + */ + +#include +#include + +int helper(int in); + +int main(void) +{ + printf("MAIN\n"); + int res = helper(10); + printf("RES: %d\n", res); + return 0; +} +// CHECK: -fpie diff --git a/testsuite/c_test/driver_test/DRIVER0047-lto-fpicfpie/test.cfg b/testsuite/c_test/driver_test/DRIVER0047-lto-fpicfpie/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..b3837d2f76b085e6eadbf0d04bfc3e12a319b48b --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0047-lto-fpicfpie/test.cfg @@ -0,0 +1,9 @@ +LTO_TEST: +compile(APP="main.c",option="-c -flto -O1 -fpic") +compile(APP="helper.c",option="-c -flto -O2 -fpie") +link(BPP="main.o helper.o",linkoption="-O1 --debug -flto &> 1.txt") +cat 1.txt | ${MAPLE_ROOT}/tools/bin/FileCheck main.c +compile(APP="main.c",option="-c -flto -O1 -fPIC") +compile(APP="helper.c",option="-c -flto -O2 -fpie") +link(BPP="main.o helper.o",linkoption="-O1 --debug -flto &> 1.txt") +cat 1.txt | ${MAPLE_ROOT}/tools/bin/FileCheck main.c diff --git a/testsuite/c_test/driver_test/DRIVER0047-onlyfakea/expected.txt b/testsuite/c_test/driver_test/DRIVER0047-onlyfakea/expected.txt new file mode 100644 index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391 diff --git a/testsuite/c_test/driver_test/DRIVER0047-onlyfakea/foo.c b/testsuite/c_test/driver_test/DRIVER0047-onlyfakea/foo.c new file mode 100644 index 0000000000000000000000000000000000000000..af16dfdb1754b39bfea40240fefb654ce2475a35 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0047-onlyfakea/foo.c @@ -0,0 +1,3 @@ +int foo() { + return 0; +} \ No newline at end of file diff --git a/testsuite/c_test/driver_test/DRIVER0047-onlyfakea/function.c b/testsuite/c_test/driver_test/DRIVER0047-onlyfakea/function.c new file mode 100644 index 0000000000000000000000000000000000000000..69bd7b3c479e5ebaddb7d6c675b5cab6d65e7639 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0047-onlyfakea/function.c @@ -0,0 +1,5 @@ +extern int foo(); +int function() +{ + return foo(); +} \ No newline at end of file diff --git a/testsuite/c_test/driver_test/DRIVER0047-onlyfakea/main.c b/testsuite/c_test/driver_test/DRIVER0047-onlyfakea/main.c new file mode 100644 index 0000000000000000000000000000000000000000..9644589ad0e271beba4676345ac724bb54cbaa57 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0047-onlyfakea/main.c @@ -0,0 +1,8 @@ +extern int function(); + +int main() +{ + int a; + a = function(); + return a; +} \ No newline at end of file diff --git a/testsuite/c_test/driver_test/DRIVER0047-onlyfakea/test.cfg b/testsuite/c_test/driver_test/DRIVER0047-onlyfakea/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..b90b40c06523828ebd05c568f42437180332e2df --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0047-onlyfakea/test.cfg @@ -0,0 +1,6 @@ +compile(APP=main.c,OPTION="-c -o main.o") +compile(APP=foo.c,OPTION="-c -o foo.o") +compile(APP=function.c,OPTION="-flto -c") +ar r libfunction.a function.o +compile(main.o foo.o libfunction.a,OPTION="-flto") +run(a) \ No newline at end of file diff --git a/testsuite/c_test/driver_test/DRIVER0048-lto-fPICfPIE/helper.c b/testsuite/c_test/driver_test/DRIVER0048-lto-fPICfPIE/helper.c new file mode 100644 index 0000000000000000000000000000000000000000..d7b676ce7cac71417de1fb1657ba33c5808b0f51 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0048-lto-fPICfPIE/helper.c @@ -0,0 +1,24 @@ +/* + * Copyright (C) [2021] Futurewei Technologies, Inc. All rights reverved. + * + * Licensed under the Mulan Permissive Software License v2. + * You can use this software according to the terms and conditions of the MulanPSL - 2.0. + * You may obtain a copy of MulanPSL - 2.0 at: + * + * https://opensource.org/licenses/MulanPSL-2.0 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the MulanPSL - 2.0 for more details. + */ + +#include +#include + +int helper(int in) +{ + printf("HELPER\n"); + return in * 2; +} + diff --git a/testsuite/c_test/driver_test/DRIVER0048-lto-fPICfPIE/main.c b/testsuite/c_test/driver_test/DRIVER0048-lto-fPICfPIE/main.c new file mode 100644 index 0000000000000000000000000000000000000000..10bb3bac8cb5dc703ab3f0da04ccaa6e23ce48d5 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0048-lto-fPICfPIE/main.c @@ -0,0 +1,28 @@ +/* + * Copyright (C) [2021] Futurewei Technologies, Inc. All rights reverved. + * + * Licensed under the Mulan Permissive Software License v2. + * You can use this software according to the terms and conditions of the MulanPSL - 2.0. + * You may obtain a copy of MulanPSL - 2.0 at: + * + * https://opensource.org/licenses/MulanPSL-2.0 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the MulanPSL - 2.0 for more details. + */ + +#include +#include + +int helper(int in); + +int main(void) +{ + printf("MAIN\n"); + int res = helper(10); + printf("RES: %d\n", res); + return 0; +} +// CHECK: -fPIE diff --git a/testsuite/c_test/driver_test/DRIVER0048-lto-fPICfPIE/test.cfg b/testsuite/c_test/driver_test/DRIVER0048-lto-fPICfPIE/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..b5ec5bc162a3d89adbb0667df8be124895dea5e5 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0048-lto-fPICfPIE/test.cfg @@ -0,0 +1,5 @@ +LTO_TEST: +compile(APP="main.c",option="-c -flto -O1 -fPIE") +compile(APP="helper.c",option="-c -flto -O2 -fPIC") +link(BPP="main.o helper.o",linkoption="--debug -flto &> 1.txt") +cat 1.txt | ${MAPLE_ROOT}/tools/bin/FileCheck main.c diff --git a/testsuite/c_test/driver_test/DRIVER0049-lto-OsO3/helper.c b/testsuite/c_test/driver_test/DRIVER0049-lto-OsO3/helper.c new file mode 100644 index 0000000000000000000000000000000000000000..d7b676ce7cac71417de1fb1657ba33c5808b0f51 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0049-lto-OsO3/helper.c @@ -0,0 +1,24 @@ +/* + * Copyright (C) [2021] Futurewei Technologies, Inc. All rights reverved. + * + * Licensed under the Mulan Permissive Software License v2. + * You can use this software according to the terms and conditions of the MulanPSL - 2.0. + * You may obtain a copy of MulanPSL - 2.0 at: + * + * https://opensource.org/licenses/MulanPSL-2.0 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the MulanPSL - 2.0 for more details. + */ + +#include +#include + +int helper(int in) +{ + printf("HELPER\n"); + return in * 2; +} + diff --git a/testsuite/c_test/driver_test/DRIVER0049-lto-OsO3/main.c b/testsuite/c_test/driver_test/DRIVER0049-lto-OsO3/main.c new file mode 100644 index 0000000000000000000000000000000000000000..ede55cd2dfee69b4af0392cf7a37a4237c8fc012 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0049-lto-OsO3/main.c @@ -0,0 +1,28 @@ +/* + * Copyright (C) [2021] Futurewei Technologies, Inc. All rights reverved. + * + * Licensed under the Mulan Permissive Software License v2. + * You can use this software according to the terms and conditions of the MulanPSL - 2.0. + * You may obtain a copy of MulanPSL - 2.0 at: + * + * https://opensource.org/licenses/MulanPSL-2.0 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the MulanPSL - 2.0 for more details. + */ + +#include +#include + +int helper(int in); + +int main(void) +{ + printf("MAIN\n"); + int res = helper(10); + printf("RES: %d\n", res); + return 0; +} +// CHECK: -O3 diff --git a/testsuite/c_test/driver_test/DRIVER0049-lto-OsO3/test.cfg b/testsuite/c_test/driver_test/DRIVER0049-lto-OsO3/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..e39d82129213addccbf57177d9e3f0941f7125e8 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0049-lto-OsO3/test.cfg @@ -0,0 +1,5 @@ +LTO_TEST: +compile(APP="main.c",option="-c -flto -Os -fPIC") +compile(APP="helper.c",option="-c -flto -O3") +link(BPP="main.o helper.o",linkoption="--debug -flto &> 1.txt") +cat 1.txt | ${MAPLE_ROOT}/tools/bin/FileCheck main.c diff --git a/testsuite/c_test/driver_test/DRIVER0050-lto-OsO1/helper.c b/testsuite/c_test/driver_test/DRIVER0050-lto-OsO1/helper.c new file mode 100644 index 0000000000000000000000000000000000000000..d7b676ce7cac71417de1fb1657ba33c5808b0f51 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0050-lto-OsO1/helper.c @@ -0,0 +1,24 @@ +/* + * Copyright (C) [2021] Futurewei Technologies, Inc. All rights reverved. + * + * Licensed under the Mulan Permissive Software License v2. + * You can use this software according to the terms and conditions of the MulanPSL - 2.0. + * You may obtain a copy of MulanPSL - 2.0 at: + * + * https://opensource.org/licenses/MulanPSL-2.0 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the MulanPSL - 2.0 for more details. + */ + +#include +#include + +int helper(int in) +{ + printf("HELPER\n"); + return in * 2; +} + diff --git a/testsuite/c_test/driver_test/DRIVER0050-lto-OsO1/main.c b/testsuite/c_test/driver_test/DRIVER0050-lto-OsO1/main.c new file mode 100644 index 0000000000000000000000000000000000000000..25d543ea53deec8c70063d930cbc533a2351a052 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0050-lto-OsO1/main.c @@ -0,0 +1,28 @@ +/* + * Copyright (C) [2021] Futurewei Technologies, Inc. All rights reverved. + * + * Licensed under the Mulan Permissive Software License v2. + * You can use this software according to the terms and conditions of the MulanPSL - 2.0. + * You may obtain a copy of MulanPSL - 2.0 at: + * + * https://opensource.org/licenses/MulanPSL-2.0 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the MulanPSL - 2.0 for more details. + */ + +#include +#include + +int helper(int in); + +int main(void) +{ + printf("MAIN\n"); + int res = helper(10); + printf("RES: %d\n", res); + return 0; +} +// CHECK: -O2 diff --git a/testsuite/c_test/driver_test/DRIVER0050-lto-OsO1/test.cfg b/testsuite/c_test/driver_test/DRIVER0050-lto-OsO1/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..ce304778e59f0604ac84053341ba93451f1d8dc2 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0050-lto-OsO1/test.cfg @@ -0,0 +1,5 @@ +LTO_TEST: +compile(APP="main.c",option="-c -flto -Os -fPIC") +compile(APP="helper.c",option="-c -flto -O1") +link(BPP="main.o helper.o",linkoption="--debug -flto &> 1.txt") +cat 1.txt | ${MAPLE_ROOT}/tools/bin/FileCheck main.c diff --git a/testsuite/c_test/driver_test/DRIVER0051-lto_optFile/expected.txt b/testsuite/c_test/driver_test/DRIVER0051-lto_optFile/expected.txt new file mode 100644 index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391 diff --git a/testsuite/c_test/driver_test/DRIVER0051-lto_optFile/same_type_1.c b/testsuite/c_test/driver_test/DRIVER0051-lto_optFile/same_type_1.c new file mode 100644 index 0000000000000000000000000000000000000000..db92634ce6a854ff16c38abe85d72659456f66eb --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0051-lto_optFile/same_type_1.c @@ -0,0 +1,33 @@ +/* + * Copyright (c) Huawei Technologies Co., Ltd. 1987-2022. All rights reserved. + * Description: + * - @TestCaseID: same_type_1.c + * - @TestCaseName: same_type_1.c + * - @TestCaseType: Function Testing + * - @RequirementID: AR.SR.IREQ4925321e.013.001 + * - @RequirementName: LTO特性支持 + * - @DesignDescription: Two type var have same name which in two files and -flto into a ELF + * - #two type: struct with basic type member + * - #member: same member + * - #qualifier: blank + * - @Condition: Lit test environment ready + * - @Brief: Test boundary attribute -- function + * - #step1: Call Function + * - #step2: Check whether behavior of compilation or execution is expected + * - @Expect: Lit exit 0. + * - @Priority: Level 1 + */ + +struct Test { + int x; + int y; +}; + +int main() +{ + struct Test test1 = {1, 2}; + return 0; +} +// RUN: %CC %CFLAGS %s %S/flto/same_type_1b.c -flto -c +// RUN: %CC %CFLAGS same_type_1.o same_type_1b.o -flto -o %t +// RUN: %SIMULATOR %SIM_OPTS %t diff --git a/testsuite/c_test/driver_test/DRIVER0051-lto_optFile/test.cfg b/testsuite/c_test/driver_test/DRIVER0051-lto_optFile/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..ce6953599be658434ebf596f060f597978b20542 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0051-lto_optFile/test.cfg @@ -0,0 +1,4 @@ +LTO_TEST: +compile(APP="same_type_1.c tmp/same_type_1b.c",option="-c -flto -Os -fPIC") +link(BPP="same_type_1.o same_type_1b.o",linkoption="-flto") +run(a) diff --git a/testsuite/c_test/driver_test/DRIVER0051-lto_optFile/tmp/same_type_1b.c b/testsuite/c_test/driver_test/DRIVER0051-lto_optFile/tmp/same_type_1b.c new file mode 100644 index 0000000000000000000000000000000000000000..cd1d50096d1914a520b74d68a468b5fb8e9c72f3 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0051-lto_optFile/tmp/same_type_1b.c @@ -0,0 +1,6 @@ +struct Test { + int x; + int y; +}; + +struct Test test2 = {3, 4}; diff --git a/testsuite/c_test/driver_test/DRIVER0052-joinedOpt/expected.txt b/testsuite/c_test/driver_test/DRIVER0052-joinedOpt/expected.txt new file mode 100644 index 0000000000000000000000000000000000000000..e46b08d9eeb384bfad4b7c84f431a0cbb5ec7eb7 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0052-joinedOpt/expected.txt @@ -0,0 +1 @@ +16,65536 diff --git a/testsuite/c_test/driver_test/DRIVER0052-joinedOpt/main.c b/testsuite/c_test/driver_test/DRIVER0052-joinedOpt/main.c new file mode 100644 index 0000000000000000000000000000000000000000..2003d7a2e668116c23a847557a10d3f2927bd9ef --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0052-joinedOpt/main.c @@ -0,0 +1,8 @@ +int main() { + int a = 1; + int b = a << 4; + int c = a << b; + printf("%d,%d\n", b, c); + return 0; +} + diff --git a/testsuite/c_test/driver_test/DRIVER0052-joinedOpt/maple.specs b/testsuite/c_test/driver_test/DRIVER0052-joinedOpt/maple.specs new file mode 100644 index 0000000000000000000000000000000000000000..6471bfca62009946cfc24533cc1a417a8febd0fa --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0052-joinedOpt/maple.specs @@ -0,0 +1,9 @@ +%rename cpp_options old_cpp_options + + +*cpp_options: +-nostdinc %(old_cpp_options) + +*cc1: +%(cc1_cpu) -nostdinc + diff --git a/testsuite/c_test/driver_test/DRIVER0052-joinedOpt/test.cfg b/testsuite/c_test/driver_test/DRIVER0052-joinedOpt/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..a40731a28adcdff7256664cea8cc416fcfbf0dcf --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0052-joinedOpt/test.cfg @@ -0,0 +1,6 @@ +compile(APP=main.c,OPTION="-O0 --quiet -specs=./maple.specs --save-temps") +run(a) +compile(APP=main.c,OPTION="-O0 --quiet -specs=./maple.specs -I 456 -I123") +run(a) +compile(APP=main.c,OPTION="-O0 --quiet -specs=./maple.specs -I=123 -I =456") +run(a) diff --git a/testsuite/c_test/driver_test/DRIVER0053-equalOpt/expected.txt b/testsuite/c_test/driver_test/DRIVER0053-equalOpt/expected.txt new file mode 100644 index 0000000000000000000000000000000000000000..e46b08d9eeb384bfad4b7c84f431a0cbb5ec7eb7 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0053-equalOpt/expected.txt @@ -0,0 +1 @@ +16,65536 diff --git a/testsuite/c_test/driver_test/DRIVER0053-equalOpt/main.c b/testsuite/c_test/driver_test/DRIVER0053-equalOpt/main.c new file mode 100644 index 0000000000000000000000000000000000000000..2003d7a2e668116c23a847557a10d3f2927bd9ef --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0053-equalOpt/main.c @@ -0,0 +1,8 @@ +int main() { + int a = 1; + int b = a << 4; + int c = a << b; + printf("%d,%d\n", b, c); + return 0; +} + diff --git a/testsuite/c_test/driver_test/DRIVER0053-equalOpt/maple.specs b/testsuite/c_test/driver_test/DRIVER0053-equalOpt/maple.specs new file mode 100644 index 0000000000000000000000000000000000000000..6471bfca62009946cfc24533cc1a417a8febd0fa --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0053-equalOpt/maple.specs @@ -0,0 +1,9 @@ +%rename cpp_options old_cpp_options + + +*cpp_options: +-nostdinc %(old_cpp_options) + +*cc1: +%(cc1_cpu) -nostdinc + diff --git a/testsuite/c_test/driver_test/DRIVER0053-equalOpt/test.cfg b/testsuite/c_test/driver_test/DRIVER0053-equalOpt/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..9fd2d6eb922607882507c1ab40e694d6d3f8e243 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0053-equalOpt/test.cfg @@ -0,0 +1,2 @@ +compile(APP=main.c,OPTION="-O0 --quiet -specs=./maple.specs -fvisibility=default") +run(a) diff --git a/testsuite/c_test/driver_test/DRIVER0054-lto-fakea/helper.c b/testsuite/c_test/driver_test/DRIVER0054-lto-fakea/helper.c new file mode 100644 index 0000000000000000000000000000000000000000..d7b676ce7cac71417de1fb1657ba33c5808b0f51 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0054-lto-fakea/helper.c @@ -0,0 +1,24 @@ +/* + * Copyright (C) [2021] Futurewei Technologies, Inc. All rights reverved. + * + * Licensed under the Mulan Permissive Software License v2. + * You can use this software according to the terms and conditions of the MulanPSL - 2.0. + * You may obtain a copy of MulanPSL - 2.0 at: + * + * https://opensource.org/licenses/MulanPSL-2.0 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the MulanPSL - 2.0 for more details. + */ + +#include +#include + +int helper(int in) +{ + printf("HELPER\n"); + return in * 2; +} + diff --git a/testsuite/c_test/driver_test/DRIVER0054-lto-fakea/main.c b/testsuite/c_test/driver_test/DRIVER0054-lto-fakea/main.c new file mode 100644 index 0000000000000000000000000000000000000000..25d543ea53deec8c70063d930cbc533a2351a052 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0054-lto-fakea/main.c @@ -0,0 +1,28 @@ +/* + * Copyright (C) [2021] Futurewei Technologies, Inc. All rights reverved. + * + * Licensed under the Mulan Permissive Software License v2. + * You can use this software according to the terms and conditions of the MulanPSL - 2.0. + * You may obtain a copy of MulanPSL - 2.0 at: + * + * https://opensource.org/licenses/MulanPSL-2.0 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the MulanPSL - 2.0 for more details. + */ + +#include +#include + +int helper(int in); + +int main(void) +{ + printf("MAIN\n"); + int res = helper(10); + printf("RES: %d\n", res); + return 0; +} +// CHECK: -O2 diff --git a/testsuite/c_test/driver_test/DRIVER0054-lto-fakea/test.cfg b/testsuite/c_test/driver_test/DRIVER0054-lto-fakea/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..bc5618ba8497928b077b88a5f87fad49332c7536 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0054-lto-fakea/test.cfg @@ -0,0 +1,6 @@ +LTO_TEST: +compile(APP="main.c",option="-c -flto -fPIC -O1") +compile(APP="helper.c",option="-c -flto -fPIC -O2") +run1(helper) +link(BPP="main.o",linkoption="--debug libhelper.a -flto &> 1.txt") +cat 1.txt | ${MAPLE_ROOT}/tools/bin/FileCheck main.c diff --git a/testsuite/c_test/driver_test/DRIVER0055-lto-OnlyO1/helper.c b/testsuite/c_test/driver_test/DRIVER0055-lto-OnlyO1/helper.c new file mode 100644 index 0000000000000000000000000000000000000000..d7b676ce7cac71417de1fb1657ba33c5808b0f51 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0055-lto-OnlyO1/helper.c @@ -0,0 +1,24 @@ +/* + * Copyright (C) [2021] Futurewei Technologies, Inc. All rights reverved. + * + * Licensed under the Mulan Permissive Software License v2. + * You can use this software according to the terms and conditions of the MulanPSL - 2.0. + * You may obtain a copy of MulanPSL - 2.0 at: + * + * https://opensource.org/licenses/MulanPSL-2.0 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the MulanPSL - 2.0 for more details. + */ + +#include +#include + +int helper(int in) +{ + printf("HELPER\n"); + return in * 2; +} + diff --git a/testsuite/c_test/driver_test/DRIVER0055-lto-OnlyO1/main.c b/testsuite/c_test/driver_test/DRIVER0055-lto-OnlyO1/main.c new file mode 100644 index 0000000000000000000000000000000000000000..25d543ea53deec8c70063d930cbc533a2351a052 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0055-lto-OnlyO1/main.c @@ -0,0 +1,28 @@ +/* + * Copyright (C) [2021] Futurewei Technologies, Inc. All rights reverved. + * + * Licensed under the Mulan Permissive Software License v2. + * You can use this software according to the terms and conditions of the MulanPSL - 2.0. + * You may obtain a copy of MulanPSL - 2.0 at: + * + * https://opensource.org/licenses/MulanPSL-2.0 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the MulanPSL - 2.0 for more details. + */ + +#include +#include + +int helper(int in); + +int main(void) +{ + printf("MAIN\n"); + int res = helper(10); + printf("RES: %d\n", res); + return 0; +} +// CHECK: -O2 diff --git a/testsuite/c_test/driver_test/DRIVER0055-lto-OnlyO1/test.cfg b/testsuite/c_test/driver_test/DRIVER0055-lto-OnlyO1/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..295b49bfc74b8c2aa60c7d5334f624512ce03259 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0055-lto-OnlyO1/test.cfg @@ -0,0 +1,6 @@ +LTO_TEST: +compile(APP="main.c",option="-c -flto -fPIC") +compile(APP="helper.c",option="-c -flto -fPIC -O2") +run1(helper) +link(BPP="main.o",linkoption="--debug libhelper.a -flto &> 1.txt") +cat 1.txt | ${MAPLE_ROOT}/tools/bin/FileCheck main.c diff --git a/testsuite/c_test/driver_test/DRIVER0056-lto-nopie/option_merge_13.c b/testsuite/c_test/driver_test/DRIVER0056-lto-nopie/option_merge_13.c new file mode 100644 index 0000000000000000000000000000000000000000..cd1ab92fa2512b0621ae4655b4e72e41f1d73d46 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0056-lto-nopie/option_merge_13.c @@ -0,0 +1,7 @@ +int main() +{ + int a; + a = function(); + return a; +} +// CHECK: -fno-pie diff --git a/testsuite/c_test/driver_test/DRIVER0056-lto-nopie/option_merge_13b.c b/testsuite/c_test/driver_test/DRIVER0056-lto-nopie/option_merge_13b.c new file mode 100644 index 0000000000000000000000000000000000000000..8c065f2a9f501bb15ca75ff79e8db47a54cd2035 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0056-lto-nopie/option_merge_13b.c @@ -0,0 +1,3 @@ +int function() { + return foo(); +} diff --git a/testsuite/c_test/driver_test/DRIVER0056-lto-nopie/option_merge_13c.c b/testsuite/c_test/driver_test/DRIVER0056-lto-nopie/option_merge_13c.c new file mode 100644 index 0000000000000000000000000000000000000000..402c89527c1694fe6ed1262c19bb27739d2d8cbd --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0056-lto-nopie/option_merge_13c.c @@ -0,0 +1,3 @@ +int foo() { + return 0; +} diff --git a/testsuite/c_test/driver_test/DRIVER0056-lto-nopie/test.cfg b/testsuite/c_test/driver_test/DRIVER0056-lto-nopie/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..35c212e59a8601ca3b926bf2a4fa10bed6611c55 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0056-lto-nopie/test.cfg @@ -0,0 +1,16 @@ +LTO_TEST: +compile(APP="option_merge_13.c",option="-c -flto -O1") +compile(APP="option_merge_13b.c",option="-c -flto -O2 -fno-pie") +compile(APP="option_merge_13c.c",option="-c -flto -O2 -fpic") +link(BPP="option_merge_13.o option_merge_13b.o option_merge_13c.o",linkoption="--debug -flto &> 1.txt") +cat 1.txt | ${MAPLE_ROOT}/tools/bin/FileCheck option_merge_13.c +compile(APP="option_merge_13.c",option="-c -flto -O1 -fno-pie") +compile(APP="option_merge_13b.c",option="-c -flto -O2") +compile(APP="option_merge_13c.c",option="-c -flto -O2 -fpie") +link(BPP="option_merge_13.o option_merge_13b.o option_merge_13c.o",linkoption="--debug -flto &> 1.txt") +cat 1.txt | ${MAPLE_ROOT}/tools/bin/FileCheck option_merge_13.c +compile(APP="option_merge_13.c",option="-c -flto -O1 -fpie") +compile(APP="option_merge_13b.c",option="-c -flto -O2") +compile(APP="option_merge_13c.c",option="-c -flto -O2 -fno-pie") +link(BPP="option_merge_13.o option_merge_13b.o option_merge_13c.o",linkoption="--debug -flto &> 1.txt") +cat 1.txt | ${MAPLE_ROOT}/tools/bin/FileCheck option_merge_13.c diff --git a/testsuite/c_test/driver_test/DRIVER0057-lto-nopie/option_merge_13.c b/testsuite/c_test/driver_test/DRIVER0057-lto-nopie/option_merge_13.c new file mode 100644 index 0000000000000000000000000000000000000000..cd1ab92fa2512b0621ae4655b4e72e41f1d73d46 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0057-lto-nopie/option_merge_13.c @@ -0,0 +1,7 @@ +int main() +{ + int a; + a = function(); + return a; +} +// CHECK: -fno-pie diff --git a/testsuite/c_test/driver_test/DRIVER0057-lto-nopie/option_merge_13b.c b/testsuite/c_test/driver_test/DRIVER0057-lto-nopie/option_merge_13b.c new file mode 100644 index 0000000000000000000000000000000000000000..8c065f2a9f501bb15ca75ff79e8db47a54cd2035 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0057-lto-nopie/option_merge_13b.c @@ -0,0 +1,3 @@ +int function() { + return foo(); +} diff --git a/testsuite/c_test/driver_test/DRIVER0057-lto-nopie/option_merge_13c.c b/testsuite/c_test/driver_test/DRIVER0057-lto-nopie/option_merge_13c.c new file mode 100644 index 0000000000000000000000000000000000000000..402c89527c1694fe6ed1262c19bb27739d2d8cbd --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0057-lto-nopie/option_merge_13c.c @@ -0,0 +1,3 @@ +int foo() { + return 0; +} diff --git a/testsuite/c_test/driver_test/DRIVER0057-lto-nopie/test.cfg b/testsuite/c_test/driver_test/DRIVER0057-lto-nopie/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..2bfbcedda22689229cfa3cb7b267a79824b4793c --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0057-lto-nopie/test.cfg @@ -0,0 +1,6 @@ +LTO_TEST: +compile(APP="option_merge_13.c",option="-c -flto -O1 -fno-pie") +compile(APP="option_merge_13b.c",option="-c -flto -O2 -fpic") +compile(APP="option_merge_13c.c",option="-c -flto -O2 -fno-pic") +link(BPP="option_merge_13.o option_merge_13b.o option_merge_13c.o",linkoption="--debug -flto &> 1.txt") +cat 1.txt | ${MAPLE_ROOT}/tools/bin/FileCheck option_merge_13.c diff --git a/testsuite/c_test/driver_test/DRIVER0058-lto-nopie/option_merge_13.c b/testsuite/c_test/driver_test/DRIVER0058-lto-nopie/option_merge_13.c new file mode 100644 index 0000000000000000000000000000000000000000..cd1ab92fa2512b0621ae4655b4e72e41f1d73d46 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0058-lto-nopie/option_merge_13.c @@ -0,0 +1,7 @@ +int main() +{ + int a; + a = function(); + return a; +} +// CHECK: -fno-pie diff --git a/testsuite/c_test/driver_test/DRIVER0058-lto-nopie/option_merge_13b.c b/testsuite/c_test/driver_test/DRIVER0058-lto-nopie/option_merge_13b.c new file mode 100644 index 0000000000000000000000000000000000000000..8c065f2a9f501bb15ca75ff79e8db47a54cd2035 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0058-lto-nopie/option_merge_13b.c @@ -0,0 +1,3 @@ +int function() { + return foo(); +} diff --git a/testsuite/c_test/driver_test/DRIVER0058-lto-nopie/option_merge_13c.c b/testsuite/c_test/driver_test/DRIVER0058-lto-nopie/option_merge_13c.c new file mode 100644 index 0000000000000000000000000000000000000000..402c89527c1694fe6ed1262c19bb27739d2d8cbd --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0058-lto-nopie/option_merge_13c.c @@ -0,0 +1,3 @@ +int foo() { + return 0; +} diff --git a/testsuite/c_test/driver_test/DRIVER0058-lto-nopie/test.cfg b/testsuite/c_test/driver_test/DRIVER0058-lto-nopie/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..e05f43e01f887d983704e9aa356840128fe75dcd --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0058-lto-nopie/test.cfg @@ -0,0 +1,6 @@ +LTO_TEST: +compile(APP="option_merge_13.c",option="-c -flto -O1") +compile(APP="option_merge_13b.c",option="-c -flto -O2 -fPIE") +compile(APP="option_merge_13c.c",option="-c -flto -O2 -fno-pic") +link(BPP="option_merge_13.o option_merge_13b.o option_merge_13c.o",linkoption="--debug -flto &> 1.txt") +cat 1.txt | ${MAPLE_ROOT}/tools/bin/FileCheck option_merge_13.c diff --git a/testsuite/c_test/driver_test/DRIVER0059-lto-nopie/option_merge_13.c b/testsuite/c_test/driver_test/DRIVER0059-lto-nopie/option_merge_13.c new file mode 100644 index 0000000000000000000000000000000000000000..cdb316bcf9ce4d1dd49c8c09b9646d1323a11c2a --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0059-lto-nopie/option_merge_13.c @@ -0,0 +1,7 @@ +int main() +{ + int a; + a = function(); + return a; +} +// CHECK: -fno-pic diff --git a/testsuite/c_test/driver_test/DRIVER0059-lto-nopie/option_merge_13b.c b/testsuite/c_test/driver_test/DRIVER0059-lto-nopie/option_merge_13b.c new file mode 100644 index 0000000000000000000000000000000000000000..8c065f2a9f501bb15ca75ff79e8db47a54cd2035 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0059-lto-nopie/option_merge_13b.c @@ -0,0 +1,3 @@ +int function() { + return foo(); +} diff --git a/testsuite/c_test/driver_test/DRIVER0059-lto-nopie/option_merge_13c.c b/testsuite/c_test/driver_test/DRIVER0059-lto-nopie/option_merge_13c.c new file mode 100644 index 0000000000000000000000000000000000000000..402c89527c1694fe6ed1262c19bb27739d2d8cbd --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0059-lto-nopie/option_merge_13c.c @@ -0,0 +1,3 @@ +int foo() { + return 0; +} diff --git a/testsuite/c_test/driver_test/DRIVER0059-lto-nopie/test.cfg b/testsuite/c_test/driver_test/DRIVER0059-lto-nopie/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..c324b5d0933e5eba786e1b666311b9f5277c505f --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0059-lto-nopie/test.cfg @@ -0,0 +1,6 @@ +LTO_TEST: +compile(APP="option_merge_13.c",option="-c -flto -O1 -fno-pic") +compile(APP="option_merge_13b.c",option="-c -flto -O2 -fPIE") +compile(APP="option_merge_13c.c",option="-c -flto -O2 -fpie") +link(BPP="option_merge_13.o option_merge_13b.o option_merge_13c.o",linkoption="--debug -flto &> 1.txt") +cat 1.txt | ${MAPLE_ROOT}/tools/bin/FileCheck option_merge_13.c diff --git a/testsuite/c_test/driver_test/DRIVER0060-lto-fpic/helper.c b/testsuite/c_test/driver_test/DRIVER0060-lto-fpic/helper.c new file mode 100644 index 0000000000000000000000000000000000000000..63fa322ab7965893ccd9e527a874bf3cbd272e36 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0060-lto-fpic/helper.c @@ -0,0 +1,24 @@ +/* + * Copyright (C) [2021] Futurewei Technologies, Inc. All rights reverved. + * + * Licensed under the Mulan Permissive Software License v2. + * You can use this software according to the terms and conditions of the MulanPSL - 2.0. + * You may obtain a copy of MulanPSL - 2.0 at: + * + * https://opensource.org/licenses/MulanPSL-2.0 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the MulanPSL - 2.0 for more details. + */ + +#include +#include + +int helper(int in) +{ + printf("HELPER\n"); + return in * 2; +} +// CHECK: -fno-pie diff --git a/testsuite/c_test/driver_test/DRIVER0060-lto-fpic/main.c b/testsuite/c_test/driver_test/DRIVER0060-lto-fpic/main.c new file mode 100644 index 0000000000000000000000000000000000000000..bf349d029dd8a8244fdbf95c5ad9242eb18ff3ff --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0060-lto-fpic/main.c @@ -0,0 +1,28 @@ +/* + * Copyright (C) [2021] Futurewei Technologies, Inc. All rights reverved. + * + * Licensed under the Mulan Permissive Software License v2. + * You can use this software according to the terms and conditions of the MulanPSL - 2.0. + * You may obtain a copy of MulanPSL - 2.0 at: + * + * https://opensource.org/licenses/MulanPSL-2.0 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the MulanPSL - 2.0 for more details. + */ + +#include +#include + +int helper(int in); + +int main(void) +{ + printf("MAIN\n"); + int res = helper(10); + printf("RES: %d\n", res); + return 0; +} +// CHECK: -fno-pic diff --git a/testsuite/c_test/driver_test/DRIVER0060-lto-fpic/test.cfg b/testsuite/c_test/driver_test/DRIVER0060-lto-fpic/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..0268c3d3c3f6d3f7a3009b606a62f8654b88f81e --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0060-lto-fpic/test.cfg @@ -0,0 +1,9 @@ +LTO_TEST: +compile(APP="main.c",option="-c -flto -O1 -fno-pic") +compile(APP="helper.c",option="-c -flto -O2 -fpie") +link(BPP="main.o helper.o",linkoption="--debug -flto &> 1.txt") +cat 1.txt | ${MAPLE_ROOT}/tools/bin/FileCheck main.c +compile(APP="main.c",option="-c -flto -O1 -fpie") +compile(APP="helper.c",option="-c -flto -O2 -fno-pic") +link(BPP="main.o helper.o",linkoption="--debug -flto &> 1.txt") +cat 1.txt | ${MAPLE_ROOT}/tools/bin/FileCheck helper.c diff --git a/testsuite/c_test/driver_test/DRIVER0061-lto-fpic/helper.c b/testsuite/c_test/driver_test/DRIVER0061-lto-fpic/helper.c new file mode 100644 index 0000000000000000000000000000000000000000..63fa322ab7965893ccd9e527a874bf3cbd272e36 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0061-lto-fpic/helper.c @@ -0,0 +1,24 @@ +/* + * Copyright (C) [2021] Futurewei Technologies, Inc. All rights reverved. + * + * Licensed under the Mulan Permissive Software License v2. + * You can use this software according to the terms and conditions of the MulanPSL - 2.0. + * You may obtain a copy of MulanPSL - 2.0 at: + * + * https://opensource.org/licenses/MulanPSL-2.0 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the MulanPSL - 2.0 for more details. + */ + +#include +#include + +int helper(int in) +{ + printf("HELPER\n"); + return in * 2; +} +// CHECK: -fno-pie diff --git a/testsuite/c_test/driver_test/DRIVER0061-lto-fpic/main.c b/testsuite/c_test/driver_test/DRIVER0061-lto-fpic/main.c new file mode 100644 index 0000000000000000000000000000000000000000..bf349d029dd8a8244fdbf95c5ad9242eb18ff3ff --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0061-lto-fpic/main.c @@ -0,0 +1,28 @@ +/* + * Copyright (C) [2021] Futurewei Technologies, Inc. All rights reverved. + * + * Licensed under the Mulan Permissive Software License v2. + * You can use this software according to the terms and conditions of the MulanPSL - 2.0. + * You may obtain a copy of MulanPSL - 2.0 at: + * + * https://opensource.org/licenses/MulanPSL-2.0 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the MulanPSL - 2.0 for more details. + */ + +#include +#include + +int helper(int in); + +int main(void) +{ + printf("MAIN\n"); + int res = helper(10); + printf("RES: %d\n", res); + return 0; +} +// CHECK: -fno-pic diff --git a/testsuite/c_test/driver_test/DRIVER0061-lto-fpic/test.cfg b/testsuite/c_test/driver_test/DRIVER0061-lto-fpic/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..a748a2c8504de5db409b1afedf43a1fa707028f6 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0061-lto-fpic/test.cfg @@ -0,0 +1,9 @@ +LTO_TEST: +compile(APP="main.c",option="-c -flto -O1 -fno-pic") +compile(APP="helper.c",option="-c -flto -O2 -fno-pie") +link(BPP="main.o helper.o",linkoption="--debug -flto &> 1.txt") +cat 1.txt | ${MAPLE_ROOT}/tools/bin/FileCheck main.c +compile(APP="main.c",option="-c -flto -O1") +compile(APP="helper.c",option="-c -flto -O2 -fno-pic") +link(BPP="main.o helper.o",linkoption="--debug -flto &> 1.txt") +cat 1.txt | ${MAPLE_ROOT}/tools/bin/FileCheck helper.c diff --git a/testsuite/c_test/gdb_test/GD0335-gdb-opaque/opaque.exp b/testsuite/c_test/gdb_test/GD0335-gdb-opaque/opaque.exp new file mode 100644 index 0000000000000000000000000000000000000000..7a2512d2d84025c4aa23c591383e62ab9b1e354e --- /dev/null +++ b/testsuite/c_test/gdb_test/GD0335-gdb-opaque/opaque.exp @@ -0,0 +1,220 @@ +# Copyright 1992, 1994-1997, 1999, 2002, 2007-2012 Free Software +# Foundation, Inc. + +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# This file was written by Fred Fish. (fnf@cygnus.com) + + +set testfile "opaque" +set binfile ${objdir}/${subdir}/opaque + +if { [gdb_compile "${srcdir}/${subdir}/opaque0.c" "${binfile}0.o" object {debug nowarnings}] != "" } { + untested opaque.exp + return -1 +} + +if { [gdb_compile "${srcdir}/${subdir}/opaque1.c" "${binfile}1.o" object {debug nowarnings}] != "" } { + untested opaque.exp + return -1 +} + +if { [gdb_compile "${binfile}0.o ${binfile}1.o" ${binfile} executable {debug nowarnings}] != "" } { + untested opaque.exp + return -1 +} + + +# Create and source the file that provides information about the compiler +# used to compile the test case. +if [get_compiler_info] { + return -1; +} + +# Start with a fresh gdb. + +gdb_exit +gdb_start +gdb_reinitialize_dir $srcdir/$subdir +gdb_load ${binfile} + +# +# Test basic opaque structure handling (statically). +# The ordering of the tests is significant. We first try the things that +# might fail if gdb fails to connect the uses of opaque structures to +# the actual opaque structure definition. + +# When we start up, gdb sets the file containing main() as the current +# source file. The actual structure foo is defined in a different file. +# A pointer (foop) to an instance of the opaque struct is defined in the same +# source file as main(). Ensure that gdb correctly "connected" the definition +# in the other file with the pointer to the opaque struct in the file containing +# "foop". + +# Define a procedure to set up an xfail for all targets that do not support +# this sort of cross reference. +# Any target gcc that has a DBX_NO_XREFS definition in its config file will +# not support it (FIXME: Is this still true; I suspect maybe not). + +# Native alpha ecoff doesn't support it either. +# I don't think this type of cross reference works for any COFF target +# either. + +proc setup_xfail_on_opaque_pointer {} { + global gcc_compiled + + setup_xfail "vax-*-*" "i*86-sequent-bsd*" + if {!$gcc_compiled} then { + setup_xfail "alpha-*-*" "mips-sgi-irix5*" + } +} + +# This seems easier than trying to track different versions of xlc; I'm +# not sure there is much rhyme or reason regarding which tests it fails +# and which ones it passes. +if {[istarget "rs6000-*-aix*"] && !$gcc_compiled} then { + warning "xfails in opaque.exp may not be set up correctly for xlc" +} + +setup_xfail_on_opaque_pointer +gdb_test "whatis foop" \ + "type = struct foo \[*\]+" \ + "whatis on opaque struct pointer (statically)" + + +# Ensure that we know the form of the structure that foop points to. + +setup_xfail_on_opaque_pointer +if {!$gcc_compiled} then { setup_xfail "rs6000-*-*" } +gdb_test "ptype foop" \ + "type = struct foo \{\[\r\n\]+ int a;\[\r\n\]+ int b;\[\r\n\]+\} \[*\]+" \ + "ptype on opaque struct pointer (statically)" + + +# An instance of the opaque structure (afoo) is defined in a different file. +# Ensure that we can locate afoo and the structure definition. + +gdb_test "whatis afoo" \ + "type = struct foo" \ + "whatis on opaque struct instance (statically)" + + +# Ensure that we know the form of "afoo". + +gdb_test "ptype afoo" \ + "type = struct foo \{\[\r\n\]+ int a;\[\r\n\]+ int b;\[\r\n\]+\}" \ + "ptype on opaque struct instance (statically)" + + +# Ensure that we know what a struct foo looks like. + +gdb_test "ptype struct foo" \ + "type = struct foo \{\[\r\n\]+ int a;\[\r\n\]+ int b;\[\r\n\]+\}" \ + "ptype on opaque struct tagname (statically)" + + +# +# Done with static tests, now test dynamic opaque structure handling. +# We reload the symbol table so we forget about anything we might +# have learned during the static tests. +# + +gdb_reinitialize_dir $srcdir/$subdir + +# Run to main, where struct foo is incomplete. +if ![runto_main] { + perror "cannot run to breakpoint at main" +} + + +# The current source file is now the one containing main(). The structure foo +# is defined in a different file, but we have a pointer to an instance of +# the opaque structure in the current file. Ensure we know it's type. + +setup_xfail_on_opaque_pointer +gdb_test "whatis foop" \ + "type = struct foo \[*\]+" \ + "whatis on opaque struct pointer (dynamically)" + + +# Ensure that we know the form of the thing foop points to. + +setup_xfail_on_opaque_pointer +if {!$gcc_compiled} then { setup_xfail "rs6000-*-*" } +gdb_test "ptype foop" \ + "type = struct foo \{\[\r\n\]+ int a;\[\r\n\]+ int b;\[\r\n\]+\} \[*\]+" \ + "ptype on opaque struct pointer (dynamically) 1" + +gdb_test "whatis afoo" \ + "type = struct foo" \ + "whatis on opaque struct instance (dynamically) 1" + + +# Ensure that we know the form of afoo, an instance of a struct foo. + +gdb_test "ptype afoo" \ + "type = struct foo \{\[\r\n\]+ int a;\[\r\n\]+ int b;\[\r\n\]+\}" \ + "ptype on opaque struct instance (dynamically) 1" + + +# Ensure that we know the form of an explicit struct foo. + +if {!$gcc_compiled} then { setup_xfail "rs6000-*-*" } +gdb_test "ptype struct foo" \ + "type = struct foo \{\[\r\n\]+ int a;\[\r\n\]+ int b;\[\r\n\]+\}" \ + "ptype on opaque struct tagname (dynamically) 1" + +# Now reload the symbols again so we forget about anything we might +# have learned reading the symbols during the previous tests. + +gdb_reinitialize_dir $srcdir/$subdir + +# Run to getfoo, where struct foo is complete. +if ![runto getfoo] { + perror "cannot run to breakpoint at getfoo" +} + + +# Ensure that we know what foop is. + +setup_xfail_on_opaque_pointer +gdb_test "whatis foop" \ + "type = struct foo \[*\]+" \ + "whatis on opaque struct pointer (dynamically) 1" + + +# Ensure that we know the form of the thing foop points to. + +setup_xfail_on_opaque_pointer +gdb_test "ptype foop" \ + "type = struct foo \{\[\r\n\]+ int a;\[\r\n\]+ int b;\[\r\n\]+\} \[*\]+" \ + "ptype on opaque struct pointer (dynamically) 2" + +gdb_test "whatis afoo" \ + "type = struct foo" \ + "whatis on opaque struct instance (dynamically) 2" + + +# Ensure that we know the form of afoo, an instance of a struct foo. + +gdb_test "ptype afoo" \ + "type = struct foo \{\[\r\n\]+ int a;\[\r\n\]+ int b;\[\r\n\]+\}" \ + "ptype on opaque struct instance (dynamically) 2" + + +# Ensure that we know the form of an explicit struct foo. + +gdb_test "ptype struct foo" \ + "type = struct foo \{\[\r\n\]+ int a;\[\r\n\]+ int b;\[\r\n\]+\}" \ + "ptype on opaque struct tagname (dynamically) 2" \ No newline at end of file diff --git a/testsuite/c_test/gdb_test/GD0335-gdb-opaque/opaque0.c b/testsuite/c_test/gdb_test/GD0335-gdb-opaque/opaque0.c new file mode 100644 index 0000000000000000000000000000000000000000..e44d477ac4dba93ddda64d8f8a3822d7f9da352a --- /dev/null +++ b/testsuite/c_test/gdb_test/GD0335-gdb-opaque/opaque0.c @@ -0,0 +1,19 @@ +/* Note that struct foo is opaque (never defined) in this file. This + is allowed by C since this file does not reference any members of + the structure. The debugger needs to be able to associate this + opaque structure definition with the full definition in another + file. +*/ + +struct foo *foop; +extern struct foo *getfoo (); +#ifdef PROTOTYPES +extern void putfoo (struct foo *foop); +#endif + +int main () +{ + foop = getfoo (); + putfoo (foop); + return 0; +} diff --git a/testsuite/c_test/gdb_test/GD0335-gdb-opaque/opaque1.c b/testsuite/c_test/gdb_test/GD0335-gdb-opaque/opaque1.c new file mode 100644 index 0000000000000000000000000000000000000000..7fb6b54f05af5bdd8f5685d12638261457c130a6 --- /dev/null +++ b/testsuite/c_test/gdb_test/GD0335-gdb-opaque/opaque1.c @@ -0,0 +1,18 @@ +struct foo { + int a; + int b; +} afoo = { 1, 2}; + +struct foo *getfoo () +{ + return (&afoo); +} + +#ifdef PROTOTYPES +void putfoo (struct foo *foop) +#else +void putfoo (foop) + struct foo *foop; +#endif +{ +} diff --git a/testsuite/c_test/gdb_test/GD0335-gdb-opaque/test.cfg b/testsuite/c_test/gdb_test/GD0335-gdb-opaque/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..79bbb12fde05ac944ef37167e32630d893c3c351 --- /dev/null +++ b/testsuite/c_test/gdb_test/GD0335-gdb-opaque/test.cfg @@ -0,0 +1,2 @@ +prepare() +run(opaque.exp) diff --git a/testsuite/c_test/gtorture_test/GCC00030-g.torture.execute-20000603-1/test.cfg b/testsuite/c_test/gtorture_test/GCC00030-g.torture.execute-20000603-1/test.cfg index a3f1cf19bd02403640c026740d48fedf19a50b97..282e6e4763e735bae697f1a20d4ab6c6261c5258 100644 --- a/testsuite/c_test/gtorture_test/GCC00030-g.torture.execute-20000603-1/test.cfg +++ b/testsuite/c_test/gtorture_test/GCC00030-g.torture.execute-20000603-1/test.cfg @@ -1,2 +1,11 @@ compile(20000603-1) run(20000603-1) + +CO3_NOINLINE: +rm -rf 20000603-1.i good.s me.ir 20000603-1.mpl a.out CO3_NOINLINE_run.log 20000603-1.o output.log bad.s rebuild-f.dot .raw_file_list.txt 20000603-1.me.mpl cg.ir comb.me.mpl 20000603-1.out 20000603-1.ast 20000603-1.s + +${MAPLE_BUILD_OUTPUT}/bin/maple 20000603-1.c -o 20000603-1.out -isystem ${MAPLE_BUILD_OUTPUT}/lib/include -isystem ${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc/usr/include -isystem ${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/lib/gcc/aarch64-linux-gnu/7.5.0/include -isystem ../lib/include -O3 -fPIC --no-inline -fno-strict-aliasing --sradd -lm -Wno-error=int-conversion + +${MAPLE_ROOT}/tools/bin/qemu-aarch64 -L ${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc 20000603-1.out > output.log 2>&1 + +diff output.log expected.txt diff --git a/testsuite/c_test/stackprotect_test/SP0009-stackprotected-sink/stackprotected-sink.c b/testsuite/c_test/stackprotect_test/SP0009-stackprotected-sink/stackprotected-sink.c new file mode 100644 index 0000000000000000000000000000000000000000..1259b5979f00b7521799655ecf71b9082db40ca0 --- /dev/null +++ b/testsuite/c_test/stackprotect_test/SP0009-stackprotected-sink/stackprotected-sink.c @@ -0,0 +1,43 @@ +long a, b, m, r; +unsigned char c, e, l, n, s; +union U2 { + int f0; + unsigned long f1 +} d, p __attribute__(()); +extern unsigned long w, z, w = 4073709551615, z = 4073709551615; +extern int x, o = 0, x = -5L; +extern short y, y = 1; +unsigned short j = 7; +unsigned char *k = {&e, &e}; +short q; +int *u; +void(fn1)(short p1) {} +static unsigned char(fn2)(unsigned char p1) { + return p1 * c; +} +static unsigned short(fn3)(unsigned short p1, unsigned short p2) { + return p1 - p2; +} +void fn4(); +void main() { + fn4(); +} +int *const fn5(int *p1) { + n = fn2(0 ? 0 : ~*p1 << 0); + r = 5 > 0 && w > 0 && 5 > 0 || 0; + if (fn3(0 || l, j) < 9) + ; + else { + union U2 t = {3}; + m = a * b; + s = m * c; + q = j == 0 || 0 / j; + o = 0 ^ z && (fn1(fn2(*k = *p1 >= q != s == l && 5)), p, j); + o = l & l | 0; + y = (w || 0) & t.f0; + } +} +void fn4() { + int v = x; + u = fn5(&v); +} diff --git a/testsuite/c_test/stackprotect_test/SP0009-stackprotected-sink/test.cfg b/testsuite/c_test/stackprotect_test/SP0009-stackprotected-sink/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..f09a615fcf12b4bf653fddacebdd59fb2d569ec7 --- /dev/null +++ b/testsuite/c_test/stackprotect_test/SP0009-stackprotected-sink/test.cfg @@ -0,0 +1,2 @@ +compile(stackprotected-sink) +run(stackprotected-sink) diff --git a/testsuite/c_test/struct_test/STRUCT0019-typedef/expected.txt b/testsuite/c_test/struct_test/STRUCT0019-typedef/expected.txt new file mode 100644 index 0000000000000000000000000000000000000000..9ec384f015e38bcfe20c9e436f4b1f141fbee939 --- /dev/null +++ b/testsuite/c_test/struct_test/STRUCT0019-typedef/expected.txt @@ -0,0 +1,5 @@ +Aa size = 1400 +Bb size = 1408 +Cc size = 1400 +Dd size = 1408 +Ee size = 2560 diff --git a/testsuite/c_test/struct_test/STRUCT0019-typedef/test.c b/testsuite/c_test/struct_test/STRUCT0019-typedef/test.c new file mode 100644 index 0000000000000000000000000000000000000000..a59b2eb90bf788358c9c4d780dc647ab45a653e2 --- /dev/null +++ b/testsuite/c_test/struct_test/STRUCT0019-typedef/test.c @@ -0,0 +1,32 @@ +typedef struct A { + int a; + char b[129]; + int c; +} B __attribute__ ((aligned(128))); + +typedef struct C { + int a; + char b[129]; + int c; +}D __attribute__ ((aligned(128))); + +struct __attribute__ ((aligned(128))) E { + int a; + char b[129]; + int c; +}; + +struct A Aa[10]; +B Bb[10]; +struct C Cc[10]; +D Dd[10]; +struct E Ee[10]; + +int main() { + printf("Aa size = %d\n", sizeof(Aa)); + printf("Bb size = %d\n", sizeof(Bb)); + printf("Cc size = %d\n", sizeof(Cc)); + printf("Dd size = %d\n", sizeof(Dd)); + printf("Ee size = %d\n", sizeof(Ee)); + return 0; +} \ No newline at end of file diff --git a/testsuite/c_test/struct_test/STRUCT0019-typedef/test.cfg b/testsuite/c_test/struct_test/STRUCT0019-typedef/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..afc8503e78c8a320cccc354423160b8c72613720 --- /dev/null +++ b/testsuite/c_test/struct_test/STRUCT0019-typedef/test.cfg @@ -0,0 +1,2 @@ +compile(test) +run(test) \ No newline at end of file diff --git a/testsuite/c_test/struct_test/STRUCT0020-DTS2023071003257/expected.txt b/testsuite/c_test/struct_test/STRUCT0020-DTS2023071003257/expected.txt new file mode 100644 index 0000000000000000000000000000000000000000..573541ac9702dd3969c9bc859d2b91ec1f7e6e56 --- /dev/null +++ b/testsuite/c_test/struct_test/STRUCT0020-DTS2023071003257/expected.txt @@ -0,0 +1 @@ +0 diff --git a/testsuite/c_test/struct_test/STRUCT0020-DTS2023071003257/test.c b/testsuite/c_test/struct_test/STRUCT0020-DTS2023071003257/test.c new file mode 100644 index 0000000000000000000000000000000000000000..a9bbe73c7e83ec58e605a83bfdfa10337a1bbd39 --- /dev/null +++ b/testsuite/c_test/struct_test/STRUCT0020-DTS2023071003257/test.c @@ -0,0 +1,23 @@ +int printf(const char *, ...); +#pragma pack(1) +struct a { + unsigned : 3; + short b; +} __attribute__((aligned(32))); +struct c { + struct a d; +} e; +struct { + unsigned : 4; + struct c f; +} g, h; +struct a *l = &e.d; +struct a m() { + g = g; + return h.f.d; +} +void n() { *l = m(); } +int main() { + n(); + printf("%d\n", e.d.b); +} \ No newline at end of file diff --git a/testsuite/c_test/struct_test/STRUCT0020-DTS2023071003257/test.cfg b/testsuite/c_test/struct_test/STRUCT0020-DTS2023071003257/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..afc8503e78c8a320cccc354423160b8c72613720 --- /dev/null +++ b/testsuite/c_test/struct_test/STRUCT0020-DTS2023071003257/test.cfg @@ -0,0 +1,2 @@ +compile(test) +run(test) \ No newline at end of file diff --git a/testsuite/c_test/struct_test/STRUCT0021-EmitBitField/expected.txt b/testsuite/c_test/struct_test/STRUCT0021-EmitBitField/expected.txt new file mode 100644 index 0000000000000000000000000000000000000000..81d4bfc98e6e049117af77319a7c6873d0ae6e14 --- /dev/null +++ b/testsuite/c_test/struct_test/STRUCT0021-EmitBitField/expected.txt @@ -0,0 +1,2 @@ +-110635612 +-243 diff --git a/testsuite/c_test/struct_test/STRUCT0021-EmitBitField/test.c b/testsuite/c_test/struct_test/STRUCT0021-EmitBitField/test.c new file mode 100644 index 0000000000000000000000000000000000000000..9acefeb4ba20492d87cd55d17ab628f88e289c41 --- /dev/null +++ b/testsuite/c_test/struct_test/STRUCT0021-EmitBitField/test.c @@ -0,0 +1,20 @@ +#include + +typedef struct { + int : 30; +} S0; + +typedef struct { + int : 31; + S0 a; + int b : 30; + int c : 9; +} S1; + +S1 s1 = {{}, 963106212U, 269U}; + +int main() { + printf("%d\n", s1.b); + printf("%d\n", s1.c); + return 0; +} \ No newline at end of file diff --git a/testsuite/c_test/struct_test/STRUCT0021-EmitBitField/test.cfg b/testsuite/c_test/struct_test/STRUCT0021-EmitBitField/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..afc8503e78c8a320cccc354423160b8c72613720 --- /dev/null +++ b/testsuite/c_test/struct_test/STRUCT0021-EmitBitField/test.cfg @@ -0,0 +1,2 @@ +compile(test) +run(test) \ No newline at end of file diff --git a/testsuite/c_test/struct_test/STRUCT0022-EmitPaddingZero/expected.txt b/testsuite/c_test/struct_test/STRUCT0022-EmitPaddingZero/expected.txt new file mode 100644 index 0000000000000000000000000000000000000000..118d12e247fdd40a9ed9a59f1aa7a3153bd9767a --- /dev/null +++ b/testsuite/c_test/struct_test/STRUCT0022-EmitPaddingZero/expected.txt @@ -0,0 +1,4 @@ +-560076 +-1305926 +-317877 +1067 diff --git a/testsuite/c_test/struct_test/STRUCT0022-EmitPaddingZero/test.c b/testsuite/c_test/struct_test/STRUCT0022-EmitPaddingZero/test.c new file mode 100644 index 0000000000000000000000000000000000000000..4263fc871eda4f021b86211d89f6d89b42f2e178 --- /dev/null +++ b/testsuite/c_test/struct_test/STRUCT0022-EmitPaddingZero/test.c @@ -0,0 +1,21 @@ +typedef struct { + int : 22; +} S0; + +typedef struct { + S0 a; + int b : 22; + int c : 22; + int d : 22; + int e : 14; +} S1; + +S1 s1 = {{}, -560076, -1305926, -317877, 1067}; + +int main() { + printf("%d\n", s1.b); + printf("%d\n", s1.c); + printf("%d\n", s1.d); + printf("%d\n", s1.e); + return 0; +} diff --git a/testsuite/c_test/struct_test/STRUCT0022-EmitPaddingZero/test.cfg b/testsuite/c_test/struct_test/STRUCT0022-EmitPaddingZero/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..afc8503e78c8a320cccc354423160b8c72613720 --- /dev/null +++ b/testsuite/c_test/struct_test/STRUCT0022-EmitPaddingZero/test.cfg @@ -0,0 +1,2 @@ +compile(test) +run(test) \ No newline at end of file diff --git a/testsuite/c_test/struct_test/STRUCT0023-EmitPaddingZero2/expected.txt b/testsuite/c_test/struct_test/STRUCT0023-EmitPaddingZero2/expected.txt new file mode 100644 index 0000000000000000000000000000000000000000..c2ae7fcc6c3b61c8ec67e2f22dde44a372369ada --- /dev/null +++ b/testsuite/c_test/struct_test/STRUCT0023-EmitPaddingZero2/expected.txt @@ -0,0 +1 @@ +62620, 107956 diff --git a/testsuite/c_test/struct_test/STRUCT0023-EmitPaddingZero2/test.c b/testsuite/c_test/struct_test/STRUCT0023-EmitPaddingZero2/test.c new file mode 100644 index 0000000000000000000000000000000000000000..a8a6ce798928dfe549423a34ebfeaae4e8018b53 --- /dev/null +++ b/testsuite/c_test/struct_test/STRUCT0023-EmitPaddingZero2/test.c @@ -0,0 +1,19 @@ +#include + +typedef struct { + unsigned int : 28; + unsigned int : 30; +} S0; + +typedef struct { + S0 a; + unsigned short b; + unsigned int c : 17; +} S1; + +S1 s1 = {{}, 62620, 107956U}; + +int main() { + printf("%d, %d\n", s1.b, s1.c); + return 0; +} diff --git a/testsuite/c_test/struct_test/STRUCT0023-EmitPaddingZero2/test.cfg b/testsuite/c_test/struct_test/STRUCT0023-EmitPaddingZero2/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..afc8503e78c8a320cccc354423160b8c72613720 --- /dev/null +++ b/testsuite/c_test/struct_test/STRUCT0023-EmitPaddingZero2/test.cfg @@ -0,0 +1,2 @@ +compile(test) +run(test) \ No newline at end of file diff --git a/testsuite/c_test/unit_test/UNIT0021-FORTIFY_O2_StringCheck/fortify_O2_string_check.c b/testsuite/c_test/unit_test/UNIT0021-FORTIFY_O2_StringCheck/fortify_O2_string_check.c index f7825e657e8dcd07f5c1a140521d7d4473f86f55..8396ee417a2ebeff99a70aa2f019ea845328bee4 100644 --- a/testsuite/c_test/unit_test/UNIT0021-FORTIFY_O2_StringCheck/fortify_O2_string_check.c +++ b/testsuite/c_test/unit_test/UNIT0021-FORTIFY_O2_StringCheck/fortify_O2_string_check.c @@ -9,6 +9,10 @@ int x; int test(int arg, ...) { char buf2[20]; va_list ap; + vx = stpncpy (&buf2[18], "a", 2); + vx = stpncpy (&buf2[18], "a", 3); // CHECK:warning: ‘__builtin___stpncpy_chk’ will always overflow; destination buffer has size 2, but size argument is 3 + vx = stpncpy (&buf2[18], "abc", 2); + vx = stpncpy (&buf2[18], "abc", 3); // CHECK:warning: ‘__builtin___stpncpy_chk’ will always overflow; destination buffer has size 2, but size argument is 3 memcpy (&buf2[19], "ab", 1); memcpy (&buf2[19], "ab", 2); // CHECK:warning: ‘__builtin___memcpy_chk’ will always overflow; destination buffer has size 1, but size argument is 2 vx = mempcpy (&buf2[19], "ab", 1); diff --git a/testsuite/c_test/unit_test/UNIT0040-inline-linkage/test.cfg b/testsuite/c_test/unit_test/UNIT0040-inline-linkage/test.cfg index 2c4d5091e5435ccaa1fcb13812c80d7aaa8ad4fe..2cc1be213f8dabb369d59dba9a864eb12ce4da29 100644 --- a/testsuite/c_test/unit_test/UNIT0040-inline-linkage/test.cfg +++ b/testsuite/c_test/unit_test/UNIT0040-inline-linkage/test.cfg @@ -11,3 +11,5 @@ python3 ${TEST_BIN}/check.py --check=num --n=1 --str="efunc5:" --result=main.s python3 ${TEST_BIN}/check.py --check=num --n=1 --str="efunc6:" --result=main.s python3 ${TEST_BIN}/check.py --check=num --n=1 --str="efunc7:" --result=main.s python3 ${TEST_BIN}/check.py --check=num --n=1 --str="efunc8:" --result=main.s + +CO0: diff --git a/testsuite/c_test/unit_test/UNIT0101-MergeAdjacentIread/main.c b/testsuite/c_test/unit_test/UNIT0101-MergeAdjacentIread/main.c index a4385ab5dd08632f233a4a9042d3ded7631c2ec7..4369e04ef6f591df90a56c31e349e21a0f23a527 100644 --- a/testsuite/c_test/unit_test/UNIT0101-MergeAdjacentIread/main.c +++ b/testsuite/c_test/unit_test/UNIT0101-MergeAdjacentIread/main.c @@ -44,8 +44,8 @@ int func4(struct A *aa1, struct A *aa2) { __attribute__((noinline)) int func5(struct A *aa1, struct A *aa2) { - // CHECK: and - // CHECK: cmp + // CHECK: eor + // CHECK: tst // CHECK-NOT: cmp return (aa1->b == aa2->b && aa1->c == aa2->c); } @@ -60,8 +60,8 @@ int func6(struct A *aa1, struct A *aa2) { __attribute__((noinline)) int func7(struct A *aa1, struct A *aa2) { - // CHECK: and - // CHECK: cmp + // CHECK: eor + // CHECK: tst // CHECK-NOT: cmp return (aa1->c == aa2->c && aa1->d == aa2->d && aa1->e == aa2->e); } diff --git a/testsuite/c_test/unit_test/UNIT0111-AggCopy-OffsetVerification/AggCopy.c b/testsuite/c_test/unit_test/UNIT0111-AggCopy-OffsetVerification/AggCopy.c index 1b2af4f95b3253e6b5dd034293441e26d5664146..3f027c3c7b798976dd7336dacfa8c4d181c69274 100644 --- a/testsuite/c_test/unit_test/UNIT0111-AggCopy-OffsetVerification/AggCopy.c +++ b/testsuite/c_test/unit_test/UNIT0111-AggCopy-OffsetVerification/AggCopy.c @@ -5,12 +5,14 @@ typedef struct { } S31; void foo_31(S31 *dst, S31 *src) { - // CHECK: ldp - // CHECK-NEXT: stp - // CHECK-NEXT: ldr x{{.*}}#16 - // CHECK-NEXT: str x{{.*}}#16 - // CHECK-NEXT: ldr x{{.*}}#23 - // CHECK-NEXT: str x{{.*}}#23 + // CHECK: ldr x{{.*}}#23 + // CHECK: str x{{.*}}#23 + // CHECK-NOT: ldr w{{.*}} + // CHECK-NOT: str w{{.*}} + // CHECK-NOT: ldrh w{{.*}} + // CHECK-NOT: strh w{{.*}} + // CHECK-NOT: ldrb w{{.*}} + // CHECK-NOT: strb w{{.*}} *dst = *src; } @@ -19,12 +21,12 @@ typedef struct { } S30; void foo_30(S30 *dst, S30 *src) { - // CHECK: ldp - // CHECK-NEXT: stp - // CHECK-NEXT: ldr x{{.*}}#16 - // CHECK-NEXT: str x{{.*}}#16 - // CHECK-NEXT: ldr x{{.*}}#22 - // CHECK-NEXT: str x{{.*}}#22 + // CHECK: ldr x{{.*}}#22 + // CHECK: str x{{.*}}#22 + // CHECK-NOT: ldr w{{.*}} + // CHECK-NOT: str w{{.*}} + // CHECK-NOT: ldrh w{{.*}} + // CHECK-NOT: strh w{{.*}} *dst = *src; } @@ -33,12 +35,12 @@ typedef struct { } S29; void foo_29(S29 *dst, S29 *src) { - // CHECK: ldp - // CHECK-NEXT: stp - // CHECK-NEXT: ldr x{{.*}}#16 - // CHECK-NEXT: str x{{.*}}#16 - // CHECK-NEXT: ldr x{{.*}}#21 - // CHECK-NEXT: str x{{.*}}#21 + // CHECK: ldr x{{.*}}#21 + // CHECK: str x{{.*}}#21 + // CHECK-NOT: ldr w{{.*}} + // CHECK-NOT: str w{{.*}} + // CHECK-NOT: ldrb w{{.*}} + // CHECK-NOT: strb w{{.*}} *dst = *src; } @@ -47,12 +49,12 @@ typedef struct { } S27; void foo_27(S27 *dst, S27 *src) { - // CHECK: ldp - // CHECK-NEXT: stp - // CHECK-NEXT: ldr x{{.*}}#16 - // CHECK-NEXT: str x{{.*}}#16 - // CHECK-NEXT: ldr w{{.*}}#23 - // CHECK-NEXT: str w{{.*}}#23 + // CHECK: ldr w{{.*}}#23 + // CHECK: str w{{.*}}#23 + // CHECK-NOT: ldrh w{{.*}} + // CHECK-NOT: strh w{{.*}} + // CHECK-NOT: ldrb w{{.*}} + // CHECK-NOT: strb w{{.*}} *dst = *src; } @@ -61,10 +63,14 @@ typedef struct { } S23; void foo_23(S23 *dst, S23 *src) { - // CHECK: ldp - // CHECK-NEXT: stp - // CHECK-NEXT: ldr x{{.*}}#15 - // CHECK-NEXT: str x{{.*}}#15 + // CHECK: ldr x{{.*}}#15 + // CHECK: str x{{.*}}#15 + // CHECK-NOT: ldr w{{.*}} + // CHECK-NOT: str w{{.*}} + // CHECK-NOT: ldrh w{{.*}} + // CHECK-NOT: strh w{{.*}} + // CHECK-NOT: ldrb w{{.*}} + // CHECK-NOT: strb w{{.*}} *dst = *src; } @@ -73,10 +79,12 @@ typedef struct { } S22; void foo_22(S22 *dst, S22 *src) { - // CHECK: ldp - // CHECK-NEXT: stp - // CHECK-NEXT: ldr x{{.*}}#14 - // CHECK-NEXT: str x{{.*}}#14 + // CHECK: ldr x{{.*}}#14 + // CHECK: str x{{.*}}#14 + // CHECK-NOT: ldr w{{.*}} + // CHECK-NOT: str w{{.*}} + // CHECK-NOT: ldrh w{{.*}} + // CHECK-NOT: strh w{{.*}} *dst = *src; } @@ -85,10 +93,12 @@ typedef struct { } S21; void foo_21(S21 *dst, S21 *src) { - // CHECK: ldp - // CHECK-NEXT: stp - // CHECK-NEXT: ldr x{{.*}}#13 - // CHECK-NEXT: str x{{.*}}#13 + // CHECK: ldr x{{.*}}#13 + // CHECK: str x{{.*}}#13 + // CHECK-NOT: ldr w{{.*}} + // CHECK-NOT: str w{{.*}} + // CHECK-NOT: ldrb w{{.*}} + // CHECK-NOT: strb w{{.*}} *dst = *src; } @@ -97,10 +107,12 @@ typedef struct { } S19; void foo_19(S19 *dst, S19 *src) { - // CHECK: ldp - // CHECK-NEXT: stp - // CHECK-NEXT: ldr w{{.*}}#15 - // CHECK-NEXT: str w{{.*}}#15 + // CHECK: ldr w{{.*}}#15 + // CHECK: str w{{.*}}#15 + // CHECK-NOT: ldrh w{{.*}} + // CHECK-NOT: strh w{{.*}} + // CHECK-NOT: ldrb w{{.*}} + // CHECK-NOT: strb w{{.*}} *dst = *src; } @@ -109,10 +121,14 @@ typedef struct { } S15; void foo_15(S15 *dst, S15 *src) { - // CHECK: ldr x - // CHECK-NEXT: str x - // CHECK-NEXT: ldr x{{.*}}#7 - // CHECK-NEXT: str x{{.*}}#7 + // CHECK: ldr x{{.*}}#7 + // CHECK: str x{{.*}}#7 + // CHECK-NOT: ldr w{{.*}} + // CHECK-NOT: str w{{.*}} + // CHECK-NOT: ldrh w{{.*}} + // CHECK-NOT: strh w{{.*}} + // CHECK-NOT: ldrb w{{.*}} + // CHECK-NOT: strb w{{.*}} *dst = *src; } @@ -121,10 +137,12 @@ typedef struct { } S14; void foo_14(S14 *dst, S14 *src) { - // CHECK: ldr x - // CHECK-NEXT: str x - // CHECK-NEXT: ldr x{{.*}}#6 - // CHECK-NEXT: str x{{.*}}#6 + // CHECK: ldr x{{.*}}#6 + // CHECK: str x{{.*}}#6 + // CHECK-NOT: ldr w{{.*}} + // CHECK-NOT: str w{{.*}} + // CHECK-NOT: ldrh w{{.*}} + // CHECK-NOT: strh w{{.*}} *dst = *src; } @@ -133,10 +151,12 @@ typedef struct { } S13; void foo_13(S13 *dst, S13 *src) { - // CHECK: ldr x - // CHECK-NEXT: str x - // CHECK-NEXT: ldr x{{.*}}#5 - // CHECK-NEXT: str x{{.*}}#5 + // CHECK: ldr x{{.*}}#5 + // CHECK: str x{{.*}}#5 + // CHECK-NOT: ldr w{{.*}} + // CHECK-NOT: str w{{.*}} + // CHECK-NOT: ldrb w{{.*}} + // CHECK-NOT: strb w{{.*}} *dst = *src; } @@ -145,20 +165,12 @@ typedef struct { } S11; void foo_11(S11 *dst, S11 *src) { - // CHECK: ldr x - // CHECK-NEXT: str x - // CHECK-NEXT: ldr w{{.*}}#7 - // CHECK-NEXT: str w{{.*}}#7 - *dst = *src; -} - -typedef struct { - uint8_t a[7]; -} S7; - -void foo_7(S7 *dst, S7 *src) { - // CHECK: ldr w - // CHECK-NEXT: str w + // CHECK: ldr w{{.*}}#7 + // CHECK: str w{{.*}}#7 + // CHECK-NOT: ldrh w{{.*}} + // CHECK-NOT: strh w{{.*}} + // CHECK-NOT: ldrb w{{.*}} + // CHECK-NOT: strb w{{.*}} *dst = *src; } diff --git a/testsuite/c_test/unit_test/UNIT0148-add-scope-boundary-condition/head.h b/testsuite/c_test/unit_test/UNIT0148-add-scope-boundary-condition/head.h new file mode 100644 index 0000000000000000000000000000000000000000..6a752eefa846b73ed8692447b2c94ea9586ba64c --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0148-add-scope-boundary-condition/head.h @@ -0,0 +1,21 @@ +#define IF1 \ +int j = 0;\ +if (j< 10)\ +{\ +if (i > 3) \ + {\ + i--;\ + }\ + else if (i < 5)\ + {\ + j++;\ + }\ +} +#define BEGIN for(i = 0; i < 10 ; i++) \ +{ \ + IF1 \ + for ( ;j < 10;j++) { \ + j++; + + +#define END }} diff --git a/testsuite/c_test/unit_test/UNIT0148-add-scope-boundary-condition/main.c b/testsuite/c_test/unit_test/UNIT0148-add-scope-boundary-condition/main.c new file mode 100644 index 0000000000000000000000000000000000000000..98666e9bf480663f7df839bcbe4590b8de114e94 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0148-add-scope-boundary-condition/main.c @@ -0,0 +1,17 @@ +//#define uint_32 int +#include "head.h" +int main() { + int sum = 0; + int i = 3; + + BEGIN + { + int i = 4; + sum += i; + } + END + + sum += i; + return 0; + +} diff --git a/testsuite/c_test/unit_test/UNIT0148-add-scope-boundary-condition/test.cfg b/testsuite/c_test/unit_test/UNIT0148-add-scope-boundary-condition/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..acead20dab13aa2eb9ca53aaa0a638942e67ec42 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0148-add-scope-boundary-condition/test.cfg @@ -0,0 +1 @@ +compile(APP=main.c,OPTION="-O0 -S") diff --git a/testsuite/c_test/unit_test/UNIT0154-mirscope_for_StmtExpr/main.c b/testsuite/c_test/unit_test/UNIT0154-mirscope_for_StmtExpr/main.c new file mode 100644 index 0000000000000000000000000000000000000000..03800296b9f1b372b464c924cad64d952a3a5f66 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0154-mirscope_for_StmtExpr/main.c @@ -0,0 +1,5 @@ +void foo() +{ + ({(({int i;i;}));}) != 0; +} + diff --git a/testsuite/c_test/unit_test/UNIT0154-mirscope_for_StmtExpr/test.cfg b/testsuite/c_test/unit_test/UNIT0154-mirscope_for_StmtExpr/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..af6228abddec9ff551bc0331762e81d3adcc1fe2 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0154-mirscope_for_StmtExpr/test.cfg @@ -0,0 +1 @@ +compile(APP=main.c,OPTION="-O0 -S -g") diff --git a/testsuite/c_test/unit_test/UNIT0155-tls-warmup-func-no-debug-info/main.c b/testsuite/c_test/unit_test/UNIT0155-tls-warmup-func-no-debug-info/main.c new file mode 100644 index 0000000000000000000000000000000000000000..9799ad69fa812efe47ba53b4d49038f3920fda42 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0155-tls-warmup-func-no-debug-info/main.c @@ -0,0 +1,5 @@ +__thread int a = 10; +int foo(int b) { + a = b + 5; + return 0; +} diff --git a/testsuite/c_test/unit_test/UNIT0155-tls-warmup-func-no-debug-info/test.cfg b/testsuite/c_test/unit_test/UNIT0155-tls-warmup-func-no-debug-info/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..08fbe8316d7bbc3049228826de87a2fb239d1648 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0155-tls-warmup-func-no-debug-info/test.cfg @@ -0,0 +1 @@ +compile(APP=main.c,OPTION="-O2 --tls-local-dynamic-opt -S -g") diff --git a/testsuite/c_test/unit_test/UNIT0158-VRP-createVR-for-cmp/main.c b/testsuite/c_test/unit_test/UNIT0158-VRP-createVR-for-cmp/main.c new file mode 100644 index 0000000000000000000000000000000000000000..3b8561b9c53068352247b6ba722da2a9b30a4b50 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0158-VRP-createVR-for-cmp/main.c @@ -0,0 +1,125 @@ +#include +#define bool _Bool +#define true 1 +#define false 0 +// lower and upper of value ranges(var a and var b) are constant +// primitive type of two vrs are equal +// can opt the condition +bool func1(int a, int b) { // test 9, 25 + if (a > 5 && a < 10 && b > 20 && b < 30) { + // CHECK-NOT: cmp + if (a > b) { + return true; + } + } + return false; +} +// lower and upper of value ranges(var a and var b) are constant +// primitive type of two vrs are not equal +// can not opt the condition +bool func2(int a, long b) { // test: 9, 0x100000000 + if (a > 5 && a < 10 && b > 0xffffffff) { + // CHECK: cmp + if (a > b) { + return true; + } + } + return false; +} + +// the value range of a is constant, and the value range of b is not constant +// can not opt the condition +bool func3(int a, int b, int c) { //test: 0x7fffffff, 100 + if (a == 100 && b > c) { + // CHECK: cmp + if (a > b) { + return true; + } + } + return false; +} + +// the value ranges of a and b are not constant, can not opt the condition +bool func4(int a, int b, int c) { // test: 4, 5, 10 + if (a < c && b < c) { + // CHECK: cmp + if (a < b) { + return true; + } + } + return false; +} + + +// the value ranges of a and b are not constant, and the value ranges are equal, can opt the condtition +bool func5(int a, int b, int c) { + if (a == c+10 && b == c+10) { + // CHECK-NOT: cmp + if (a == b) { + return true; + } + } + return false; +} + +// the primtive types of a and b are not equal, can not opt the condtition +bool func6(int a, long b, int c) { + if (a == c+10 && b == c+10) { + // CHECK: cmp + if (a == b) { + return true; + } + } + return false; +} + +// the value range of a is min, and the value range of b is not constant, can opt the condition +bool func7(int a, int b, int c) { + if (a == 0xffffffff && b < c) { + // CHECK-NOT: cmp + if (a < b) { + return true; + } + } + return false; +} + +// the value range of a is min, and the value range of b is not constant, +// the primtive types of a and b are not equal, can not opt the condition +bool func8(int a, long b, int c) { + if (a == 0xffffffff && b < c) { + // CHECK: cmp + if (a < b) { + return true; + } + } + return false; +} + +// the value range of a is max, and the value range of b is not constant, +// the primtive types of a and b are not equal, can not opt the condition +bool func9(int a, int b, int c) { + if (a == 0x7fffffff && b < c) { + // CHECK-NOT: cmp + if (b < a) { + return true; + } + } + return false; +} + +// the value range of a is max, and the value range of b is not constant, +// the primtive types of a and b are not equal, can not opt the condition +bool func10(int a, long b, int c) { + if (a == 0x7fffffff && b < c) { + // CHECK: cmp + if (b < a) { + return true; + } + } + return false; +} + +int main() { + return 0; +} diff --git a/testsuite/c_test/unit_test/UNIT0158-VRP-createVR-for-cmp/test.cfg b/testsuite/c_test/unit_test/UNIT0158-VRP-createVR-for-cmp/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..d48b59ef5fef34d92707c1d63e4000d130fe7272 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0158-VRP-createVR-for-cmp/test.cfg @@ -0,0 +1,3 @@ +CO2: +${MAPLE_BUILD_OUTPUT}/bin/maple main.c -o main.out -isystem ${MAPLE_BUILD_OUTPUT}/lib/include -isystem ${OUT_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc/usr/include -isystem ${OUT_ROOT}/tools/gcc-linaro-7.5.0/lib/gcc/aarch64-linux-gnu/7.5.0/include -isystem ../lib/include -isystem ../../csmith_test/runtime_x86 -O2 -fPIC -lpthread -lm ${option} --debug --save-temps +cat main.s | ${MAPLE_ROOT}/tools/bin/FileCheck main.c diff --git a/testsuite/c_test/unit_test/UNIT0159-InitCharArray/expected.txt b/testsuite/c_test/unit_test/UNIT0159-InitCharArray/expected.txt new file mode 100644 index 0000000000000000000000000000000000000000..bb6af72a211c699154d87b6ee035b42748744292 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0159-InitCharArray/expected.txt @@ -0,0 +1 @@ +98 99 111 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 diff --git a/testsuite/c_test/unit_test/UNIT0159-InitCharArray/main.c b/testsuite/c_test/unit_test/UNIT0159-InitCharArray/main.c new file mode 100644 index 0000000000000000000000000000000000000000..e8e65ff385bafd5d9cb6a053bbe90ea4aaa55a87 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0159-InitCharArray/main.c @@ -0,0 +1,19 @@ +#include +typedef __WCHAR_TYPE__ wchar_t; +extern int memcmp (const void *, const void *, size_t); +extern void abort (void); +extern void exit (int); + +#define N 20 +int main (void) +{ + struct M { + char P[N]; + int L; + } z[] = { { { "foo" }, 1 }, [0].P[0] = 'b', [0].P[1] = 'c', [0].L = 3 }; + for (int i = 0; i < N; i++) { + printf("%d ", z[0].P[i]); + } + printf("\n"); + exit (0); +} diff --git a/testsuite/c_test/unit_test/UNIT0159-InitCharArray/test.cfg b/testsuite/c_test/unit_test/UNIT0159-InitCharArray/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..bfd783d51c73c319ed8c9f8d161f2083af99fe63 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0159-InitCharArray/test.cfg @@ -0,0 +1,2 @@ +compile(main) +run(main) diff --git a/testsuite/c_test/unit_test/UNIT0159-VRP-add-overflow/main.c b/testsuite/c_test/unit_test/UNIT0159-VRP-add-overflow/main.c new file mode 100644 index 0000000000000000000000000000000000000000..4037d120d84443bee19f81b5ad031dd5b763e543 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0159-VRP-add-overflow/main.c @@ -0,0 +1,25 @@ +#include +#include + +__attribute__((__noinline__)) unsigned int GetNum() { + return 22; +} + +int main() { + unsigned int a = GetNum(); + if (a == 20 || a == 21) { + } else { + // CHECK: br + if (a > 15) { + // CHECK: br + if (a < 18) { + // CHECK: printf + printf("succ\n"); + } else { + // CHECK: printf + printf("err\n"); // can not delete this edge in vrp + } + } + } + return 0; +} diff --git a/testsuite/c_test/unit_test/UNIT0159-VRP-add-overflow/test.cfg b/testsuite/c_test/unit_test/UNIT0159-VRP-add-overflow/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..91b881675fc67f8f33b49357d5b68da59fc3a208 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0159-VRP-add-overflow/test.cfg @@ -0,0 +1,4 @@ +FORTIFY_O2: +compile(main) +cat main.me.mpl | ${MAPLE_ROOT}/tools/bin/FileCheck main.c +python3 ${TEST_BIN}/check.py --check=num --n=2 --str="bl\s__printf" --result=main.s diff --git a/testsuite/c_test/unit_test/UNIT0161-cfgo-sel/expected.txt b/testsuite/c_test/unit_test/UNIT0161-cfgo-sel/expected.txt new file mode 100644 index 0000000000000000000000000000000000000000..d00491fd7e5bb6fa28c517a0bb32b8b506539d4d --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0161-cfgo-sel/expected.txt @@ -0,0 +1 @@ +1 diff --git a/testsuite/c_test/unit_test/UNIT0161-cfgo-sel/func.c b/testsuite/c_test/unit_test/UNIT0161-cfgo-sel/func.c new file mode 100644 index 0000000000000000000000000000000000000000..ac9ad5adc387f5e50bf6ce3cf348c2d5461a892f --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0161-cfgo-sel/func.c @@ -0,0 +1,15 @@ +#include + + +int b = 3; +int c = 0; +__attribute__((noinline)) void foo() { + int a = 0 < b; + b = 0; + c = 0 || a; +} + +int main(){ + foo(); + printf("%d\n", c); +} diff --git a/testsuite/c_test/unit_test/UNIT0161-cfgo-sel/test.cfg b/testsuite/c_test/unit_test/UNIT0161-cfgo-sel/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..079b530eb7951f15897b2e5e223203db5c3e29ac --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0161-cfgo-sel/test.cfg @@ -0,0 +1,2 @@ +compile(func) +run(func) diff --git a/testsuite/c_test/unit_test/UNIT0161-ico-add-compare-mop/expected.txt b/testsuite/c_test/unit_test/UNIT0161-ico-add-compare-mop/expected.txt new file mode 100644 index 0000000000000000000000000000000000000000..53fff4028b562bc9ee8fe6d177d86b02b6bebdc0 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0161-ico-add-compare-mop/expected.txt @@ -0,0 +1,2 @@ +var_16 = 40 +15296799641890173208 diff --git a/testsuite/c_test/unit_test/UNIT0161-ico-add-compare-mop/func.c b/testsuite/c_test/unit_test/UNIT0161-ico-add-compare-mop/func.c new file mode 100644 index 0000000000000000000000000000000000000000..a16bccb83befaca2e568357f84016edf6c7ac5ce --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0161-ico-add-compare-mop/func.c @@ -0,0 +1,22 @@ +#include + +#define min(a, b) \ + { \ + __typeof__(a) _a = a; \ + __typeof__(b) _b = 0; \ + _a < _b ? _a : _b; \ + } + +extern unsigned int var_16; + +void test(int var_0, short var_1, unsigned long long int var_2, + long long int var_3, _Bool var_4, short var_5, + unsigned long long int var_13, unsigned char var_14) { + var_16 = 0 + var_13 >= (min(var_5, 0)) ? 0 : var_14; + for (unsigned int a = 0; a < 1; a = 0 + 2) + for (unsigned short b = 0; 0 < 0; b = 0) + for (long long int c = 0; 0 < 8; c = 3) + for (_Bool d = 0; 0 < 0; d = 1) + ; +} + diff --git a/testsuite/c_test/unit_test/UNIT0161-ico-add-compare-mop/main.c b/testsuite/c_test/unit_test/UNIT0161-ico-add-compare-mop/main.c new file mode 100644 index 0000000000000000000000000000000000000000..bf9a97eb28205560d2825d3cc1eec5b14b521771 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0161-ico-add-compare-mop/main.c @@ -0,0 +1,33 @@ +int var_0 = 78205889; +short var_1 = (short)-15260; +unsigned long long int var_2 = 8608153893901660375ULL; +long long int var_3 = -3995671790595460071LL; +_Bool var_4 = (_Bool)1; +short var_5 = (short)-26830; +short var_6 = (short)1423; +unsigned long long int var_7 = 10121301245951723816ULL; +unsigned int var_16 = 2382740467U; + +unsigned long long int seed = 0; +void hash(unsigned long long int *seed, unsigned long long int const v) { + *seed ^= v + 0x9e3779b9 + ((*seed) << 6) + ((*seed) >> 2 ); +} + + +void checksum() { + hash(&seed, var_0); + hash(&seed, var_1); + hash(&seed, var_2); + hash(&seed, var_3); + hash(&seed, var_4); + hash(&seed, var_5); + hash(&seed, var_6); + hash(&seed, var_7); +} + +int main() { + test(var_0, var_1, var_2, var_3, var_4, var_5, var_6, var_7); + checksum(); + printf("var_16 = %d\n", var_16); + printf("%llu\n", seed); +} \ No newline at end of file diff --git a/testsuite/c_test/unit_test/UNIT0161-ico-add-compare-mop/test.cfg b/testsuite/c_test/unit_test/UNIT0161-ico-add-compare-mop/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..1bf9e06d793667b9f11ef6c9137eda36496763c5 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0161-ico-add-compare-mop/test.cfg @@ -0,0 +1,5 @@ +TEST_OS,TEST_O2: +generate_shared_lib(APP1=func,LIB=func) +compile(APP2=main) +link(APP2=main,LIB=func) +run() diff --git a/testsuite/c_test/unit_test/UNIT0161-ivopt-implicitcvt2/expected.txt b/testsuite/c_test/unit_test/UNIT0161-ivopt-implicitcvt2/expected.txt new file mode 100644 index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391 diff --git a/testsuite/c_test/unit_test/UNIT0161-ivopt-implicitcvt2/main.c b/testsuite/c_test/unit_test/UNIT0161-ivopt-implicitcvt2/main.c new file mode 100644 index 0000000000000000000000000000000000000000..a9c0afabbc402fcc483d2752f7a5989418c9c33d --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0161-ivopt-implicitcvt2/main.c @@ -0,0 +1,27 @@ +#define max(a, b) \ + ({ \ + __typeof__(a) _a = (a); \ + __typeof__(b) _b = (b); \ + _a > _b ? _a : _b; \ + }) + +short out[25][22]; + +__attribute__((noinline)) +void test(int start, int cond, long in1[25][22], long in2[25][22]) { + // when promote the type of `step` and `i` to long, be careful with the cvt + int step = ((int)max(!(_Bool)(cond ? 5 : 3), 4294967289U) + 8); + for (int i = start; i < 24; i += step) { + for (unsigned long j = 0; j < 20; j += 1) { + out[i][j] = in2[i][j] <= max(255 | in1[i][j], in1[i][j]); + } + } +} + +long arr1[25][22]; +long arr2[25][22]; + +int main() { + test(8, 8, arr1, arr2); + return 0; +} diff --git a/testsuite/c_test/unit_test/UNIT0161-ivopt-implicitcvt2/test.cfg b/testsuite/c_test/unit_test/UNIT0161-ivopt-implicitcvt2/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..12276add4f3d98bc0bad2447fc23a652d1a88401 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0161-ivopt-implicitcvt2/test.cfg @@ -0,0 +1,3 @@ +CO2: +compile(main) +run(main) diff --git a/testsuite/c_test/unit_test/UNIT0161-ra-loopsplit2/expected.txt b/testsuite/c_test/unit_test/UNIT0161-ra-loopsplit2/expected.txt new file mode 100644 index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391 diff --git a/testsuite/c_test/unit_test/UNIT0161-ra-loopsplit2/main.c b/testsuite/c_test/unit_test/UNIT0161-ra-loopsplit2/main.c new file mode 100644 index 0000000000000000000000000000000000000000..04b8b62b15abb374cd461f79c4d73a05b45e6915 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0161-ra-loopsplit2/main.c @@ -0,0 +1,131 @@ +char m, t, v, w, aa, ab, ac; +int n, p, q, r, s, x, a, c, d, g, k, l, z, ad, y, ae, af, ag, ah, ai, aj, ak, al, am, an, ao, ap, aq, ar, as, at, au, + av, aw; +long long o, u; +int *h; +char *j = &t; +short ax, ay; +int **az = &h; +long ba; +static char(bb)(bc) {} +int(bd)(bc) { + return bc; +} +int(be)(); +static long(bf)() {} +long(bg)(bc, bh) { + return bh < 0 || bh; +} +long(bi)(); +int *bj(int *bc) { + int bk = 0, bl = 1, bm = ak, i = 0; + for (0; 0; i++) c; + for (1;;) { + 0; + 1; + 1; + 0; + an; + 0; + am; + for (1;;) { + 4073709551615; + 8; + char bn[168] = {0, m, 0, m, 0, m, 0, m, 0, m, 0, m, 0, m, 0, m, 0, m, 0, m, 0, m, 0, m, 0, m, 0, m, + 0, m, 0, m, 0, m, 0, m, 0, m, 0, m, 0, m, 0, m, 0, m, 0, m, 0, m, 0, m, 0, m, 0, m, + 0, m, 0, m, 0, m, 0, m, 0, m, 0, m, 0, m, 0, m, 0, m, 0, m, 0, m, 0, m, 0, m, 0, m, + 0, m, 0, m, 0, m, 0, m, 0, m, 0, m, 0, m, 0, m, 0, m, 0, m, 0, m, 0, m, 0, m, 0, m, + 0, m, 0, m, 0, m, 0, m, 0, m, 0, m, 0, m, 0, m, 0, m, 0, m, 0, m, 0, m, 0, m, 0, m}; + m; + char bo = m = x++; + for (1;;) { + 1; + int b[] = {0, 6, 4, 1, 0, 0, 0, 3, 5, 5, 0, 1, 3, 9, 0, 0, 4, 0, 4, 5, 4, 1, 7, 0, 0, 0, 0, 0, 0, 4, + 0, 1, 0, 0, 3, 0, 0, 7, 8, 4, 0, 3, 2, 0, 0, 0, 0, 0, 1, 7, 0, 3, 7, 1, 6, 0, 8, 0, 9, 2, + 0, 0, 0, 0, 7, 0, 0, 7, 8, 0, 0, 0, 5, 0, 4, 0, 0, 9, 0, 7, 1, 6, 3, 1, 0, 1, 8, 5, 0, 8, + 1, 0, 0, 1, 7, 0, 8, 5, 0, 0, 4, 3, 0, 9, 4, 2, 0, 4, 0, 3, 0, 0, 3, 0, 6, 1, 0, 4, 4, 4, + 5, 0, 0, 0, 1, 0, 5, 7, 0, 4, 4, 1, 6, 4, 1, 0, 0, 2, 0, 0, 1, 2, 7, 0, 0, 0, 3, 0, 0, 0, + 8, 0, 4, 1, 0, 0, 1, 7, 0, 5, 1, 5, 0, 2, 1, 6, 0, 8, 0, 4, 0, 0, 7, 0, 5, 0, 4, 0, 5, 4}; + 8; + 0; + 1; + int bp = v = v++; + for (1;;) { + an; + int e[] = {1, 5, 0, 0, 0, 4, 0, 0, 0, 5, 1, 9, 2, 2, 0, 0, 1, 0, 0, 0, 0, 0, 0, 4, 0, 4, 0, 0, 0, 0, 0, 9, + 1, 0, 2, 5, 0, 0, 1, 0, 0, 4, 3, 0, 3, 4, 0, 0, 0, 0, 0, 0, 1, 4, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, + 0, 5, 0, 0, 1, 9, 0, 4, 0, 9, 1, 0, 0, 0, 1, 9, 0, 9, 0, 4, 0, 4, 0, 9, 3, 0, 2, 0, 1, 9, 0, 5, + 0, 9, 1, 0, 0, 4, 0, 0, 3, 4, 0, 0, 0, 0, 0, 0, 0, 4, 2, 4, 0, 0, 0, 0, 0, 9, 1, 0, 0, 5, 0, 0, + 1, 0, 2, 4, 1, 0, 1, 4, 2, 0, 0, 0, 0, 0, 3, 4, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 5, 2, 0, 1, 9}; + 0; + 0; + 0; + int f = bk = ay = 0; + for (b; ay <= 1; ay++) { + 1; + long long *bq = &u, *br = &o; + char *bs = &w; + ag; + ah; + int bt[] = {aj, ao, ao, aj, l, ai, a, a, ai, s, aj, ao, ao, aj, l, ai, a, a, ai, s, aj, ao, ao, + aj, l, ai, a, a, ai, s, aj, ao, ao, aj, l, ai, a, a, ai, s, aj, ao, ao, aj, l, ai, + a, ai, 0, ag, q, aj, aj, q, 1, 0, ai, ai, 0, ag, q, aj, aj, q, 1, 0, ai, ai, 0, + ag, q, aj, aj, q, 1, 0, ai, ai, 0, ag, q, aj, aj, q, 1, 0, ai, ai, 0, ag, q, aj, + aj, q, 1, 0, ai, ai, 0, ag, q, aj, aj, q, 1, 0, ai, ai, 0, ag, q, aj, aj, q, 1, + 0, ai, ai, 0, ag, q, aj, aj, q, 1, 0, ai, ai, 0, ag, q, aj, aj, q, 1}; + 0; + for (0; 0; i++) { + 0; + for (0;; aw++) 0; + } + f; + 1; + *br = ax; + *bs = (*j)++ ^ bb(bg(*br, 8)) <= 1; + bd(g ^ y) || 0; + bl = *bq = bf(); + --aq; + } + 0; + 1; + for (1;;) { + l; + int bu[] = {k, af, d, 0, ap, s, 0, ae, p, 5, ak, l, 5, 0, 0, l, ak, ap, 0, 0, ae, ad, 0, + ag, ak, ak, 0, 0, ag, 0, p, 1, 0, 0, 0, 0, bl, 0, 0, s, k, 1, ak, p, 0, 1, + 0, r, 0, r, ak, ak, 0, ag, 0, l, d, s, bl, k, 0, af, ak, ad, 0, 0, d, 0, 0, + ak, 0, ak, al, af, 0, 0, 0, 0, 0, ak, r, 1, ad, 0, l, ap, bl, 0, p, d, s, 1, + l, d, ae, z, 0, ag, ak, ae, 0, ad, af, ae, ai, 0, ae, af, 8, ae, ae, r, 0, 1, 0, + 0, 0, 0, 1, 1, 0, ag, 0, 0, 0, 0, ae, s, aj, 0, 1, 0, l, d, z, af, d, s, + 0, ak, 0, ag, 0, 0, ak, ak, 1, 0, q, af, 5, ak, 0, 0, 0, al, z, af, 0, l, ak, + 0, s, r, d, k, q, 0, bl, l, k, ai, ad, 0, aj, ak, 5, 0, d, s, al, 0, ak, 0, + ag, 5, p, bl, 0, 0, ak, 0, 0, ak, 0, 0, d, af, 0, q, af, 0, l, s, p, 1, af, + 0, 0, 0, 0, aj, ak, ak, 1, 0, 0, ak, 0, ad, 0, 0, ad, 0, 5}; + return bc; + } + 0; + ak; + for (1;;) 7; + 2; + 0; + 0; + int bv = r = av = bv = bi() && 0; + n; + } + } + } + 0; + aa; + 0; + ba = bg(bb && (at && 1) ^ 0, 1); + 0; + ac; + 0; + au = be(); + ar = bm = 0; + } +} +int main() { + *az = bj(&as); + for (; ab < 1; ab++) + if (*h) break; +} diff --git a/testsuite/c_test/unit_test/UNIT0161-ra-loopsplit2/test.cfg b/testsuite/c_test/unit_test/UNIT0161-ra-loopsplit2/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..665a95d7fd6436f704821da52abc59f091afd240 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0161-ra-loopsplit2/test.cfg @@ -0,0 +1,2 @@ +${MAPLE_BUILD_OUTPUT}/bin/maple -O2 main.c -fno-omit-frame-pointer -w -o main.out +run(main) diff --git a/testsuite/c_test/unit_test/UNIT0161-tls-val-no-debug-info/main.c b/testsuite/c_test/unit_test/UNIT0161-tls-val-no-debug-info/main.c new file mode 100644 index 0000000000000000000000000000000000000000..b37b1d5d30e0d455871de38bbea66f0a3a41b0a2 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0161-tls-val-no-debug-info/main.c @@ -0,0 +1,7 @@ +__thread int a = 0; +int main() { + a++; + printf("no tls val loc emitted.\n"); + return 0; +} +// CHECK-NOT: R_AARCH64_ABS64 used with TLS symbol diff --git a/testsuite/c_test/unit_test/UNIT0161-tls-val-no-debug-info/test.cfg b/testsuite/c_test/unit_test/UNIT0161-tls-val-no-debug-info/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..21e1c6f19e2cc50b1112e809eb232512a664e19f --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0161-tls-val-no-debug-info/test.cfg @@ -0,0 +1,2 @@ +compile(APP=main.c,OPTION="-O0 -g > log.txt 2>&1") +cat log.txt | ${MAPLE_ROOT}/tools/bin/FileCheck main.c diff --git a/testsuite/c_test/unit_test/UNIT0161-vrp-shortCircuit-opt/expected.txt b/testsuite/c_test/unit_test/UNIT0161-vrp-shortCircuit-opt/expected.txt new file mode 100644 index 0000000000000000000000000000000000000000..51993f072d5832f20b98b6bd0cf763fb8b4c8a1b --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0161-vrp-shortCircuit-opt/expected.txt @@ -0,0 +1,2 @@ +2 +2 diff --git a/testsuite/c_test/unit_test/UNIT0161-vrp-shortCircuit-opt/main.c b/testsuite/c_test/unit_test/UNIT0161-vrp-shortCircuit-opt/main.c new file mode 100644 index 0000000000000000000000000000000000000000..ae17f658ff54ca9e22692945d7b193c9894179c8 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0161-vrp-shortCircuit-opt/main.c @@ -0,0 +1,27 @@ +void printf(); +short a, g; +signed char b = 5, h; +signed char *c = &b; +unsigned long d = 4073709551613; +unsigned long *e = &d, *i = &d; +int f, j; +static void fn1() {} +signed char fn2() { return 1; } +void fn3() { f = fn4(); } +int fn4(unsigned long p1) { + p1 = 0; + for (p1; p1 < 2; p1++) + ; + *c = 0 || p1; + h = fn2(0 < (*i = p1) >= 4); + g = a - 8; + for (g; g >= 0; g) + for (1; 1 < 5; 1) + e = &p1; + return 0; +} +int main() { + fn3(); + for (j; j < 2; j++) + printf("%d\n", d); +} diff --git a/testsuite/c_test/unit_test/UNIT0161-vrp-shortCircuit-opt/test.cfg b/testsuite/c_test/unit_test/UNIT0161-vrp-shortCircuit-opt/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..12276add4f3d98bc0bad2447fc23a652d1a88401 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0161-vrp-shortCircuit-opt/test.cfg @@ -0,0 +1,3 @@ +CO2: +compile(main) +run(main) diff --git a/testsuite/c_test/unit_test/UNIT0162-ebo-CombineExtsionAndLoadPattern/driver.c b/testsuite/c_test/unit_test/UNIT0162-ebo-CombineExtsionAndLoadPattern/driver.c new file mode 100644 index 0000000000000000000000000000000000000000..77f51c84792251bcc171d6fc51b714a7c58dd846 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0162-ebo-CombineExtsionAndLoadPattern/driver.c @@ -0,0 +1,372 @@ +#include + +#define hash(seed, v) { \ + printf("%s = %llu\n", #v, v); \ + hash_1(seed, v); \ +} + +unsigned long long int seed = 0; +void hash_1(unsigned long long int *seed, unsigned long long int const v) { + *seed ^= v + 0x9e3779b9 + ((*seed)<<6) + ((*seed)>>2); +} + +long long int var_0 = -4753688147037785570LL; +signed char var_1 = (signed char)12; +int var_2 = 582759849; +int var_3 = 112743781; +int var_4 = -21454109; +signed char var_5 = (signed char)-41; +long long int var_6 = -578566840357553841LL; +signed char var_7 = (signed char)-73; +unsigned char var_8 = (unsigned char)203; +int var_9 = -2130141792; +int var_10 = 1894190780; +short var_11 = (short)-35; +unsigned char var_12 = (unsigned char)44; +long long int var_13 = 3730067208602679636LL; +_Bool var_14 = (_Bool)1; +int var_15 = -841985453; +_Bool var_16 = (_Bool)0; +unsigned long long int var_17 = 7786212152187387573ULL; +unsigned int var_18 = 2533806422U; +unsigned int var_19 = 915729290U; +int var_20 = 2033526117; +unsigned int var_21 = 2273717440U; +unsigned char var_22 = (unsigned char)170; +signed char var_23 = (signed char)8; +int var_24 = 1955346450; +short var_25 = (short)-30839; +unsigned int var_26 = 1606515912U; +int var_27 = -883034743; +unsigned char var_28 = (unsigned char)186; +_Bool var_29 = (_Bool)1; +int var_30 = 1510442985; +__thread signed char var_31 = (signed char)112; +signed char var_32 = (signed char)86; +long long int var_33 = -8566733383752989456LL; +long long int var_34 = 1952303428297929249LL; +__thread short var_35 = (short)-11476; +long long int var_36 = 7939819935467557543LL; +unsigned char var_37 = (unsigned char)206; +long long int var_38 = -6153924745108393649LL; +int var_39 = -1937906963; +signed char var_40 = (signed char)-65; +long long int var_41 = -6672264869491139150LL; +unsigned long long int var_42 = 7471322697117516607ULL; +unsigned long long int var_43 = 11686845892602254690ULL; +__thread _Bool var_44 = (_Bool)1; +unsigned int var_45 = 1591991068U; +_Bool var_46 = (_Bool)0; +_Bool var_47 = (_Bool)1; +signed char var_48 = (signed char)122; +unsigned char arr_3 [20] [19] ; +signed char arr_4 [20] [19] ; +short arr_5 [20] [19] ; +unsigned long long int arr_6 [20] [19] ; +int arr_8 [20] [19] [25] ; +long long int arr_13 [20] [19] [25] [21] [17] ; +unsigned int arr_22 [18] [16] ; +unsigned long long int arr_23 [18] [16] ; +unsigned int arr_24 [18] [16] [24] ; +unsigned char arr_26 [18] [16] [24] ; +long long int arr_28 [18] [16] [24] [22] ; +unsigned int arr_31 [18] [16] [24] [22] [19] ; +unsigned long long int arr_32 [18] [16] [24] [22] [19] ; +signed char arr_33 [18] [16] [24] [22] [19] ; +unsigned long long int arr_45 [18] [12] ; +unsigned short arr_46 [18] [12] ; +unsigned long long int arr_47 [18] [12] ; +_Bool arr_50 [23] ; +_Bool arr_51 [23] ; +unsigned int arr_54 [23] [19] ; +long long int arr_55 [23] [19] [21] ; +long long int arr_57 [23] [19] [21] ; +unsigned int arr_58 [23] [19] [21] [23] ; +unsigned int arr_59 [23] [19] [21] [23] ; +signed char arr_60 [23] [19] [21] [23] ; +short arr_61 [23] [19] [21] [23] ; +int arr_65 [15] ; +_Bool arr_71 [15] [12] [10] ; +int arr_76 [15] [12] [10] [19] [16] ; +int arr_81 [23] ; +long long int arr_82 [23] [14] ; +signed char arr_88 [23] [14] [19] [21] ; +_Bool arr_89 [23] [14] [19] [21] ; +unsigned char arr_7 [20] [19] ; +unsigned char arr_14 [20] [19] [25] [21] [17] ; +unsigned short arr_15 [20] [19] [25] [21] [17] ; +unsigned int arr_16 [20] [19] ; +int arr_17 [20] [19] ; +unsigned int arr_35 [18] [16] [24] [22] [19] ; +unsigned int arr_36 [18] [16] [24] [22] [19] ; +signed char arr_37 [18] [16] ; +unsigned char arr_38 [18] [16] ; +short arr_39 [18] [16] ; +long long int arr_40 [18] [16] ; +short arr_48 [18] [12] ; +_Bool arr_49 [18] [12] ; +long long int arr_62 [23] [19] [21] [23] ; +short arr_63 [23] [19] [21] [23] ; +unsigned int arr_64 [23] [19] ; +short arr_72 [15] [12] [10] ; +long long int arr_77 [15] [12] [10] [19] [16] ; +signed char arr_78 [15] [12] [10] [19] [16] ; +int arr_79 [15] [12] [10] [19] [16] ; +unsigned short arr_90 [23] [14] [19] [21] ; +unsigned int arr_91 [23] [14] [19] [21] ; +int arr_92 [23] [14] [19] [21] ; +_Bool arr_93 [23] [14] [19] [21] ; +unsigned char arr_94 [23] [14] ; +void init() { + for (size_t i_0 = 0; i_0 < 20; ++i_0) + for (size_t i_1 = 0; i_1 < 19; ++i_1) + arr_3 [i_0] [i_1] = (unsigned char)216; + for (size_t i_0 = 0; i_0 < 20; ++i_0) + for (size_t i_1 = 0; i_1 < 19; ++i_1) + arr_4 [i_0] [i_1] = (signed char)-22; + for (size_t i_0 = 0; i_0 < 20; ++i_0) + for (size_t i_1 = 0; i_1 < 19; ++i_1) + arr_5 [i_0] [i_1] = (short)10972; + for (size_t i_0 = 0; i_0 < 20; ++i_0) + for (size_t i_1 = 0; i_1 < 19; ++i_1) + arr_6 [i_0] [i_1] = 7617672066863936399ULL; + for (size_t i_0 = 0; i_0 < 20; ++i_0) + for (size_t i_1 = 0; i_1 < 19; ++i_1) + for (size_t i_2 = 0; i_2 < 25; ++i_2) + arr_8 [i_0] [i_1] [i_2] = -367424557; + for (size_t i_0 = 0; i_0 < 20; ++i_0) + for (size_t i_1 = 0; i_1 < 19; ++i_1) + for (size_t i_2 = 0; i_2 < 25; ++i_2) + for (size_t i_3 = 0; i_3 < 21; ++i_3) + for (size_t i_4 = 0; i_4 < 17; ++i_4) + arr_13 [i_0] [i_1] [i_2] [i_3] [i_4] = 2461092873145119815LL; + for (size_t i_0 = 0; i_0 < 18; ++i_0) + for (size_t i_1 = 0; i_1 < 16; ++i_1) + arr_22 [i_0] [i_1] = 3771521687U; + for (size_t i_0 = 0; i_0 < 18; ++i_0) + for (size_t i_1 = 0; i_1 < 16; ++i_1) + arr_23 [i_0] [i_1] = 10896997290934869152ULL; + for (size_t i_0 = 0; i_0 < 18; ++i_0) + for (size_t i_1 = 0; i_1 < 16; ++i_1) + for (size_t i_2 = 0; i_2 < 24; ++i_2) + arr_24 [i_0] [i_1] [i_2] = 2689787010U; + for (size_t i_0 = 0; i_0 < 18; ++i_0) + for (size_t i_1 = 0; i_1 < 16; ++i_1) + for (size_t i_2 = 0; i_2 < 24; ++i_2) + arr_26 [i_0] [i_1] [i_2] = (unsigned char)113; + for (size_t i_0 = 0; i_0 < 18; ++i_0) + for (size_t i_1 = 0; i_1 < 16; ++i_1) + for (size_t i_2 = 0; i_2 < 24; ++i_2) + for (size_t i_3 = 0; i_3 < 22; ++i_3) + arr_28 [i_0] [i_1] [i_2] [i_3] = -136968988483491489LL; + for (size_t i_0 = 0; i_0 < 18; ++i_0) + for (size_t i_1 = 0; i_1 < 16; ++i_1) + for (size_t i_2 = 0; i_2 < 24; ++i_2) + for (size_t i_3 = 0; i_3 < 22; ++i_3) + for (size_t i_4 = 0; i_4 < 19; ++i_4) + arr_31 [i_0] [i_1] [i_2] [i_3] [i_4] = 1518678833U; + for (size_t i_0 = 0; i_0 < 18; ++i_0) + for (size_t i_1 = 0; i_1 < 16; ++i_1) + for (size_t i_2 = 0; i_2 < 24; ++i_2) + for (size_t i_3 = 0; i_3 < 22; ++i_3) + for (size_t i_4 = 0; i_4 < 19; ++i_4) + arr_32 [i_0] [i_1] [i_2] [i_3] [i_4] = 6213611581793329887ULL; + for (size_t i_0 = 0; i_0 < 18; ++i_0) + for (size_t i_1 = 0; i_1 < 16; ++i_1) + for (size_t i_2 = 0; i_2 < 24; ++i_2) + for (size_t i_3 = 0; i_3 < 22; ++i_3) + for (size_t i_4 = 0; i_4 < 19; ++i_4) + arr_33 [i_0] [i_1] [i_2] [i_3] [i_4] = (signed char)-84; + for (size_t i_0 = 0; i_0 < 18; ++i_0) + for (size_t i_1 = 0; i_1 < 12; ++i_1) + arr_45 [i_0] [i_1] = 4958626133280835718ULL; + for (size_t i_0 = 0; i_0 < 18; ++i_0) + for (size_t i_1 = 0; i_1 < 12; ++i_1) + arr_46 [i_0] [i_1] = (unsigned short)18691; + for (size_t i_0 = 0; i_0 < 18; ++i_0) + for (size_t i_1 = 0; i_1 < 12; ++i_1) + arr_47 [i_0] [i_1] = 3544092557254811493ULL; + for (size_t i_0 = 0; i_0 < 23; ++i_0) + arr_50 [i_0] = (_Bool)1; + for (size_t i_0 = 0; i_0 < 23; ++i_0) + arr_51 [i_0] = (_Bool)0; + for (size_t i_0 = 0; i_0 < 23; ++i_0) + for (size_t i_1 = 0; i_1 < 19; ++i_1) + arr_54 [i_0] [i_1] = 2997391537U; + for (size_t i_0 = 0; i_0 < 23; ++i_0) + for (size_t i_1 = 0; i_1 < 19; ++i_1) + for (size_t i_2 = 0; i_2 < 21; ++i_2) + arr_55 [i_0] [i_1] [i_2] = -8050429996972813400LL; + for (size_t i_0 = 0; i_0 < 23; ++i_0) + for (size_t i_1 = 0; i_1 < 19; ++i_1) + for (size_t i_2 = 0; i_2 < 21; ++i_2) + arr_57 [i_0] [i_1] [i_2] = -2278772028358221440LL; + for (size_t i_0 = 0; i_0 < 23; ++i_0) + for (size_t i_1 = 0; i_1 < 19; ++i_1) + for (size_t i_2 = 0; i_2 < 21; ++i_2) + for (size_t i_3 = 0; i_3 < 23; ++i_3) + arr_58 [i_0] [i_1] [i_2] [i_3] = 1777737235U; + for (size_t i_0 = 0; i_0 < 23; ++i_0) + for (size_t i_1 = 0; i_1 < 19; ++i_1) + for (size_t i_2 = 0; i_2 < 21; ++i_2) + for (size_t i_3 = 0; i_3 < 23; ++i_3) + arr_59 [i_0] [i_1] [i_2] [i_3] = 3648468248U; + for (size_t i_0 = 0; i_0 < 23; ++i_0) + for (size_t i_1 = 0; i_1 < 19; ++i_1) + for (size_t i_2 = 0; i_2 < 21; ++i_2) + for (size_t i_3 = 0; i_3 < 23; ++i_3) + arr_60 [i_0] [i_1] [i_2] [i_3] = (signed char)62; + for (size_t i_0 = 0; i_0 < 23; ++i_0) + for (size_t i_1 = 0; i_1 < 19; ++i_1) + for (size_t i_2 = 0; i_2 < 21; ++i_2) + for (size_t i_3 = 0; i_3 < 23; ++i_3) + arr_61 [i_0] [i_1] [i_2] [i_3] = (short)-14497; + for (size_t i_0 = 0; i_0 < 15; ++i_0) + arr_65 [i_0] = -264616889; + for (size_t i_0 = 0; i_0 < 15; ++i_0) + for (size_t i_1 = 0; i_1 < 12; ++i_1) + for (size_t i_2 = 0; i_2 < 10; ++i_2) + arr_71 [i_0] [i_1] [i_2] = (_Bool)1; + for (size_t i_0 = 0; i_0 < 15; ++i_0) + for (size_t i_1 = 0; i_1 < 12; ++i_1) + for (size_t i_2 = 0; i_2 < 10; ++i_2) + for (size_t i_3 = 0; i_3 < 19; ++i_3) + for (size_t i_4 = 0; i_4 < 16; ++i_4) + arr_76 [i_0] [i_1] [i_2] [i_3] [i_4] = -1517806046; + for (size_t i_0 = 0; i_0 < 23; ++i_0) + arr_81 [i_0] = -693943685; + for (size_t i_0 = 0; i_0 < 23; ++i_0) + for (size_t i_1 = 0; i_1 < 14; ++i_1) + arr_82 [i_0] [i_1] = -4375922196765858869LL; + for (size_t i_0 = 0; i_0 < 23; ++i_0) + for (size_t i_1 = 0; i_1 < 14; ++i_1) + for (size_t i_2 = 0; i_2 < 19; ++i_2) + for (size_t i_3 = 0; i_3 < 21; ++i_3) + arr_88 [i_0] [i_1] [i_2] [i_3] = (signed char)-76; + for (size_t i_0 = 0; i_0 < 23; ++i_0) + for (size_t i_1 = 0; i_1 < 14; ++i_1) + for (size_t i_2 = 0; i_2 < 19; ++i_2) + for (size_t i_3 = 0; i_3 < 21; ++i_3) + arr_89 [i_0] [i_1] [i_2] [i_3] = (_Bool)1; + for (size_t i_0 = 0; i_0 < 20; ++i_0) + for (size_t i_1 = 0; i_1 < 19; ++i_1) + arr_7 [i_0] [i_1] = (unsigned char)158; + for (size_t i_0 = 0; i_0 < 20; ++i_0) + for (size_t i_1 = 0; i_1 < 19; ++i_1) + for (size_t i_2 = 0; i_2 < 25; ++i_2) + for (size_t i_3 = 0; i_3 < 21; ++i_3) + for (size_t i_4 = 0; i_4 < 17; ++i_4) + arr_14 [i_0] [i_1] [i_2] [i_3] [i_4] = (unsigned char)180; + for (size_t i_0 = 0; i_0 < 20; ++i_0) + for (size_t i_1 = 0; i_1 < 19; ++i_1) + for (size_t i_2 = 0; i_2 < 25; ++i_2) + for (size_t i_3 = 0; i_3 < 21; ++i_3) + for (size_t i_4 = 0; i_4 < 17; ++i_4) + arr_15 [i_0] [i_1] [i_2] [i_3] [i_4] = (unsigned short)45045; + for (size_t i_0 = 0; i_0 < 20; ++i_0) + for (size_t i_1 = 0; i_1 < 19; ++i_1) + arr_16 [i_0] [i_1] = 963744428U; + for (size_t i_0 = 0; i_0 < 20; ++i_0) + for (size_t i_1 = 0; i_1 < 19; ++i_1) + arr_17 [i_0] [i_1] = 1057874994; + for (size_t i_0 = 0; i_0 < 18; ++i_0) + for (size_t i_1 = 0; i_1 < 16; ++i_1) + for (size_t i_2 = 0; i_2 < 24; ++i_2) + for (size_t i_3 = 0; i_3 < 22; ++i_3) + for (size_t i_4 = 0; i_4 < 19; ++i_4) + arr_35 [i_0] [i_1] [i_2] [i_3] [i_4] = 2135228601U; + for (size_t i_0 = 0; i_0 < 18; ++i_0) + for (size_t i_1 = 0; i_1 < 16; ++i_1) + for (size_t i_2 = 0; i_2 < 24; ++i_2) + for (size_t i_3 = 0; i_3 < 22; ++i_3) + for (size_t i_4 = 0; i_4 < 19; ++i_4) + arr_36 [i_0] [i_1] [i_2] [i_3] [i_4] = 860178157U; + for (size_t i_0 = 0; i_0 < 18; ++i_0) + for (size_t i_1 = 0; i_1 < 16; ++i_1) + arr_37 [i_0] [i_1] = (signed char)47; + for (size_t i_0 = 0; i_0 < 18; ++i_0) + for (size_t i_1 = 0; i_1 < 16; ++i_1) + arr_38 [i_0] [i_1] = (unsigned char)13; + for (size_t i_0 = 0; i_0 < 18; ++i_0) + for (size_t i_1 = 0; i_1 < 16; ++i_1) + arr_39 [i_0] [i_1] = (short)-19337; + for (size_t i_0 = 0; i_0 < 18; ++i_0) + for (size_t i_1 = 0; i_1 < 16; ++i_1) + arr_40 [i_0] [i_1] = -8406889858776225552LL; + for (size_t i_0 = 0; i_0 < 18; ++i_0) + for (size_t i_1 = 0; i_1 < 12; ++i_1) + arr_48 [i_0] [i_1] = (short)15863; + for (size_t i_0 = 0; i_0 < 18; ++i_0) + for (size_t i_1 = 0; i_1 < 12; ++i_1) + arr_49 [i_0] [i_1] = (_Bool)0; + for (size_t i_0 = 0; i_0 < 23; ++i_0) + for (size_t i_1 = 0; i_1 < 19; ++i_1) + for (size_t i_2 = 0; i_2 < 21; ++i_2) + for (size_t i_3 = 0; i_3 < 23; ++i_3) + arr_62 [i_0] [i_1] [i_2] [i_3] = -689082257326864773LL; + for (size_t i_0 = 0; i_0 < 23; ++i_0) + for (size_t i_1 = 0; i_1 < 19; ++i_1) + for (size_t i_2 = 0; i_2 < 21; ++i_2) + for (size_t i_3 = 0; i_3 < 23; ++i_3) + arr_63 [i_0] [i_1] [i_2] [i_3] = (short)-30984; + for (size_t i_0 = 0; i_0 < 23; ++i_0) + for (size_t i_1 = 0; i_1 < 19; ++i_1) + arr_64 [i_0] [i_1] = 3921365277U; + for (size_t i_0 = 0; i_0 < 15; ++i_0) + for (size_t i_1 = 0; i_1 < 12; ++i_1) + for (size_t i_2 = 0; i_2 < 10; ++i_2) + arr_72 [i_0] [i_1] [i_2] = (short)6828; + for (size_t i_0 = 0; i_0 < 15; ++i_0) + for (size_t i_1 = 0; i_1 < 12; ++i_1) + for (size_t i_2 = 0; i_2 < 10; ++i_2) + for (size_t i_3 = 0; i_3 < 19; ++i_3) + for (size_t i_4 = 0; i_4 < 16; ++i_4) + arr_77 [i_0] [i_1] [i_2] [i_3] [i_4] = -2280935045040780897LL; + for (size_t i_0 = 0; i_0 < 15; ++i_0) + for (size_t i_1 = 0; i_1 < 12; ++i_1) + for (size_t i_2 = 0; i_2 < 10; ++i_2) + for (size_t i_3 = 0; i_3 < 19; ++i_3) + for (size_t i_4 = 0; i_4 < 16; ++i_4) + arr_78 [i_0] [i_1] [i_2] [i_3] [i_4] = (signed char)24; + for (size_t i_0 = 0; i_0 < 15; ++i_0) + for (size_t i_1 = 0; i_1 < 12; ++i_1) + for (size_t i_2 = 0; i_2 < 10; ++i_2) + for (size_t i_3 = 0; i_3 < 19; ++i_3) + for (size_t i_4 = 0; i_4 < 16; ++i_4) + arr_79 [i_0] [i_1] [i_2] [i_3] [i_4] = 66841243; + for (size_t i_0 = 0; i_0 < 23; ++i_0) + for (size_t i_1 = 0; i_1 < 14; ++i_1) + for (size_t i_2 = 0; i_2 < 19; ++i_2) + for (size_t i_3 = 0; i_3 < 21; ++i_3) + arr_90 [i_0] [i_1] [i_2] [i_3] = (unsigned short)10048; + for (size_t i_0 = 0; i_0 < 23; ++i_0) + for (size_t i_1 = 0; i_1 < 14; ++i_1) + for (size_t i_2 = 0; i_2 < 19; ++i_2) + for (size_t i_3 = 0; i_3 < 21; ++i_3) + arr_91 [i_0] [i_1] [i_2] [i_3] = 2813322819U; + for (size_t i_0 = 0; i_0 < 23; ++i_0) + for (size_t i_1 = 0; i_1 < 14; ++i_1) + for (size_t i_2 = 0; i_2 < 19; ++i_2) + for (size_t i_3 = 0; i_3 < 21; ++i_3) + arr_92 [i_0] [i_1] [i_2] [i_3] = -1687817282; + for (size_t i_0 = 0; i_0 < 23; ++i_0) + for (size_t i_1 = 0; i_1 < 14; ++i_1) + for (size_t i_2 = 0; i_2 < 19; ++i_2) + for (size_t i_3 = 0; i_3 < 21; ++i_3) + arr_93 [i_0] [i_1] [i_2] [i_3] = (_Bool)0; + for (size_t i_0 = 0; i_0 < 23; ++i_0) + for (size_t i_1 = 0; i_1 < 14; ++i_1) + arr_94 [i_0] [i_1] = (unsigned char)83; +} + +void checksum() { + hash(&seed, var_23); +} +void test(long long int var_0, signed char var_1, int var_2, int var_3, int var_4, signed char var_5, long long int var_6, signed char var_7, unsigned char var_8, int var_9, int var_10, short var_11, unsigned char var_12, long long int var_13, _Bool var_14, int var_15, _Bool var_16, unsigned long long int var_17, unsigned int var_18, unsigned char arr_3 [20] [19] , signed char arr_4 [20] [19] , short arr_5 [20] [19] , unsigned long long int arr_6 [20] [19] , int arr_8 [20] [19] [25] , long long int arr_13 [20] [19] [25] [21] [17] , unsigned int arr_22 [18] [16] , unsigned long long int arr_23 [18] [16] , unsigned int arr_24 [18] [16] [24] , unsigned char arr_26 [18] [16] [24] , long long int arr_28 [18] [16] [24] [22] , unsigned int arr_31 [18] [16] [24] [22] [19] , unsigned long long int arr_32 [18] [16] [24] [22] [19] , signed char arr_33 [18] [16] [24] [22] [19] , unsigned long long int arr_45 [18] [12] , unsigned short arr_46 [18] [12] , unsigned long long int arr_47 [18] [12] , _Bool arr_50 [23] , _Bool arr_51 [23] , unsigned int arr_54 [23] [19] , long long int arr_55 [23] [19] [21] , long long int arr_57 [23] [19] [21] , unsigned int arr_58 [23] [19] [21] [23] , unsigned int arr_59 [23] [19] [21] [23] , signed char arr_60 [23] [19] [21] [23] , short arr_61 [23] [19] [21] [23] , int arr_65 [15] , _Bool arr_71 [15] [12] [10] , int arr_76 [15] [12] [10] [19] [16] , int arr_81 [23] , long long int arr_82 [23] [14] , signed char arr_88 [23] [14] [19] [21] , _Bool arr_89 [23] [14] [19] [21] ); + +int main() { + init(); + test(var_0, var_1, var_2, var_3, var_4, var_5, var_6, var_7, var_8, var_9, var_10, var_11, var_12, var_13, var_14, var_15, var_16, var_17, var_18, arr_3 , arr_4 , arr_5 , arr_6 , arr_8 , arr_13 , arr_22 , arr_23 , arr_24 , arr_26 , arr_28 , arr_31 , arr_32 , arr_33 , arr_45 , arr_46 , arr_47 , arr_50 , arr_51 , arr_54 , arr_55 , arr_57 , arr_58 , arr_59 , arr_60 , arr_61 , arr_65 , arr_71 , arr_76 , arr_81 , arr_82 , arr_88 , arr_89 ); + checksum(); + printf("%llu\n", seed); +} diff --git a/testsuite/c_test/unit_test/UNIT0162-ebo-CombineExtsionAndLoadPattern/expected.txt b/testsuite/c_test/unit_test/UNIT0162-ebo-CombineExtsionAndLoadPattern/expected.txt new file mode 100644 index 0000000000000000000000000000000000000000..f92ec914f7b5c268d5c6608ae16bc90682287168 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0162-ebo-CombineExtsionAndLoadPattern/expected.txt @@ -0,0 +1,2 @@ +var_23 = 0 +2654435769 diff --git a/testsuite/c_test/unit_test/UNIT0162-ebo-CombineExtsionAndLoadPattern/func.c b/testsuite/c_test/unit_test/UNIT0162-ebo-CombineExtsionAndLoadPattern/func.c new file mode 100644 index 0000000000000000000000000000000000000000..eb4cc690b68346111d742e8213d28f25d63d3c0e --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0162-ebo-CombineExtsionAndLoadPattern/func.c @@ -0,0 +1,96 @@ +#include "init.h" +#define max(a,b) \ + ({ __typeof__ (a) _a = (a); \ + __typeof__ (b) _b = (b); \ + _a > _b ? _a : _b; }) +#define min(a,b) \ + ({ __typeof__ (a) _a = (a); \ + __typeof__ (b) _b = (b); \ + _a < _b ? _a : _b; }) +void test(long long int var_0, signed char var_1, int var_2, int var_3, int var_4, signed char var_5, long long int var_6, signed char var_7, unsigned char var_8, int var_9, int var_10, short var_11, unsigned char var_12, long long int var_13, _Bool var_14, int var_15, _Bool var_16, unsigned long long int var_17, unsigned int var_18, unsigned char arr_3 [20] [19] , signed char arr_4 [20] [19] , short arr_5 [20] [19] , unsigned long long int arr_6 [20] [19] , int arr_8 [20] [19] [25] , long long int arr_13 [20] [19] [25] [21] [17] , unsigned int arr_22 [18] [16] , unsigned long long int arr_23 [18] [16] , unsigned int arr_24 [18] [16] [24] , unsigned char arr_26 [18] [16] [24] , long long int arr_28 [18] [16] [24] [22] , unsigned int arr_31 [18] [16] [24] [22] [19] , unsigned long long int arr_32 [18] [16] [24] [22] [19] , signed char arr_33 [18] [16] [24] [22] [19] , unsigned long long int arr_45 [18] [12] , unsigned short arr_46 [18] [12] , unsigned long long int arr_47 [18] [12] , _Bool arr_50 [23] , _Bool arr_51 [23] , unsigned int arr_54 [23] [19] , long long int arr_55 [23] [19] [21] , long long int arr_57 [23] [19] [21] , unsigned int arr_58 [23] [19] [21] [23] , unsigned int arr_59 [23] [19] [21] [23] , signed char arr_60 [23] [19] [21] [23] , short arr_61 [23] [19] [21] [23] , int arr_65 [15] , _Bool arr_71 [15] [12] [10] , int arr_76 [15] [12] [10] [19] [16] , int arr_81 [23] , long long int arr_82 [23] [14] , signed char arr_88 [23] [14] [19] [21] , _Bool arr_89 [23] [14] [19] [21] ) { + var_19 = ((/* implicit */unsigned int) max((var_3), (((/* implicit */int) ((short) var_6))))); + if (((/* implicit */_Bool) ((unsigned int) ((((/* implicit */_Bool) (~(var_13)))) ? ((+(var_3))) : (((/* implicit */int) (unsigned short)33013)))))) + { + if (((/* implicit */_Bool) ((min((((/* implicit */unsigned long long int) (~(((/* implicit */int) var_14))))), (max((((/* implicit */unsigned long long int) (short)-12069)), (18446744073709551612ULL))))) & (((/* implicit */unsigned long long int) ((/* implicit */int) (unsigned short)1593)))))) + { + var_20 = ((/* implicit */int) (~(((/* implicit */int) (unsigned short)33018)))); + /* LoopNest 2 */ + for (unsigned char i_0 = ((((/* implicit */int) ((/* implicit */unsigned char) var_2))) - (169))/*0*/; i_0 < ((((/* implicit */int) ((/* implicit */unsigned char) var_13))) - (64))/*20*/; i_0 += ((((/* implicit */int) ((/* implicit */unsigned char) (short)24285))) - (220))/*1*/) + { + for (short i_1 = ((((/* implicit */int) ((/* implicit */short) var_9))) + (25184))/*0*/; i_1 < ((((/* implicit */int) (short)-3007)) + (3026))/*19*/; i_1 += ((((/* implicit */int) ((/* implicit */short) var_5))) + (42))/*1*/) + { + { + arr_7 [i_0] [i_1] = ((/* implicit */unsigned char) ((((/* implicit */_Bool) 13)) ? (((/* implicit */unsigned long long int) -1003878649)) : (((((/* implicit */_Bool) arr_6 [i_0] [i_1])) ? (arr_6 [i_0] [i_1]) : (arr_6 [i_0] [i_1]))))); + if (((/* implicit */_Bool) max((-37768685), (((/* implicit */int) arr_5 [i_0] [i_1]))))) + { + var_21 = ((/* implicit */unsigned int) ((((/* implicit */_Bool) (-((+(var_10)))))) ? (((/* implicit */int) arr_4 [i_0] [i_1])) : (85978107))); + if (((/* implicit */_Bool) ((((((/* implicit */_Bool) arr_5 [i_0] [i_1])) ? (arr_6 [i_0] [i_1]) : (((/* implicit */unsigned long long int) ((/* implicit */int) arr_5 [i_0] [i_1]))))) ^ (((/* implicit */unsigned long long int) ((/* implicit */int) arr_4 [i_0] [i_1])))))) + { + var_22 = ((/* implicit */unsigned char) arr_6 [i_0] [i_1]); + /* LoopNest 3 */ + for (short i_2 = ((((/* implicit */int) ((/* implicit */short) ((((/* implicit */int) ((_Bool) ((-8252017403857936506LL) == (((/* implicit */long long int) var_15)))))) != ((-(((((/* implicit */int) arr_5 [i_0] [i_1])) >> (((((/* implicit */int) (unsigned short)1579)) - (1570))))))))))) - (1))/*0*/; i_2 < ((((/* implicit */int) ((/* implicit */short) var_5))) + (66))/*25*/; i_2 += ((((/* implicit */int) ((/* implicit */short) var_7))) + (76))/*3*/) + { + for (unsigned long long int i_3 = ((((/* implicit */unsigned long long int) var_18)) - (2533806420ULL))/*2*/; i_3 < ((((/* implicit */unsigned long long int) var_12)) - (24ULL))/*20*/; i_3 += ((((/* implicit */unsigned long long int) var_1)) - (11ULL))/*1*/) + { + for (long long int i_4 = 0LL/*0*/; i_4 < ((((/* implicit */long long int) (signed char)78)) - (61LL))/*17*/; i_4 += ((((/* implicit */long long int) ((((((/* implicit */unsigned long long int) ((((/* implicit */int) (signed char)125)) / (((/* implicit */int) (unsigned short)17002))))) * (((0ULL) - (((/* implicit */unsigned long long int) ((/* implicit */int) var_1))))))) > (((/* implicit */unsigned long long int) ((/* implicit */int) (_Bool)1)))))) + (4LL))/*4*/) + { + { + var_23 = ((/* implicit */signed char) ((unsigned int) (!(((((/* implicit */_Bool) (unsigned short)31006)) || (((/* implicit */_Bool) var_1))))))); + arr_14 [i_0] [i_1] [i_2] [i_3] [i_4] = ((/* implicit */unsigned char) 2272699586U); + arr_15 [i_0] [i_1] [i_2] [i_3] [i_4] = ((/* implicit */unsigned short) ((int) (~(arr_13 [i_0] [i_1] [i_2] [i_3 - 2] [i_4])))); + } + } + } + } + } + + var_24 = ((/* implicit */int) ((((/* implicit */_Bool) arr_6 [i_0] [i_1])) ? ((~(((/* implicit */int) ((arr_6 [i_0] [i_1]) <= (((/* implicit */unsigned long long int) ((/* implicit */int) arr_3 [i_0] [i_1])))))))) : (((/* implicit */int) (short)-21)))); + arr_16 [i_0] [i_1] = ((/* implicit */unsigned int) arr_6 [i_0] [i_1]); + arr_17 [i_0] [i_1] = ((/* implicit */int) (unsigned short)32768); + } + + } + } + } + var_31 = ((/* implicit */signed char) (+(var_13))); + } + + + var_41 = ((/* implicit */long long int) var_15); + /* LoopNest 3 */ + } + else + { + var_45 = ((/* implicit */unsigned int) (~(((/* implicit */int) (short)0)))); + /* LoopNest 2 */ + for (long long int i_21 = ((((/* implicit */long long int) var_7)) + (73LL))/*0*/; i_21 < ((((/* implicit */long long int) var_14)) + (22LL))/*23*/; i_21 += ((((/* implicit */long long int) (signed char)-11)) + (15LL))/*4*/) + { + for (int i_22 = ((((arr_50 [i_21]) ? (((/* implicit */int) ((((((/* implicit */_Bool) (signed char)-50)) ? (((/* implicit */long long int) arr_81 [i_21])) : (-8252017403857936506LL))) > (((8252017403857936491LL) >> (((var_13) - (3730067208602679627LL)))))))) : (min((var_9), (((/* implicit */int) var_11)))))) + (3))/*3*/; i_22 < ((((/* implicit */int) var_12)) - (33))/*11*/; i_22 += ((((/* implicit */int) var_6)) - (699070797))/*2*/) + { + { + /* LoopNest 2 */ + for (signed char i_23 = ((((/* implicit */int) ((/* implicit */signed char) var_4))) + (31))/*2*/; i_23 < ((((/* implicit */int) (signed char)75)) - (58))/*17*/; i_23 += ((((/* implicit */int) ((/* implicit */signed char) var_18))) - (85))/*1*/) + { + for (signed char i_24 = ((((/* implicit */int) ((/* implicit */signed char) var_18))) - (84))/*2*/; i_24 < (signed char)20/*20*/; i_24 += ((((/* implicit */int) ((/* implicit */signed char) arr_57 [i_21] [i_22 - 2] [i_23]))) + (130))/*2*/) + { + { + arr_90 [i_21] [i_22] [i_23] [i_24] = ((/* implicit */unsigned short) arr_58 [i_21] [i_22] [i_23] [i_24]); + var_46 = ((/* implicit */_Bool) ((((/* implicit */unsigned int) ((/* implicit */int) arr_89 [i_21] [i_22 + 3] [i_23 - 1] [i_24 - 1]))) - ((((!(((/* implicit */_Bool) arr_58 [i_21] [i_22] [i_23] [i_24])))) ? (((((/* implicit */_Bool) arr_88 [i_21] [i_22] [i_23] [i_24])) ? (arr_59 [i_21] [i_22] [i_23] [i_24]) : (((/* implicit */unsigned int) 13)))) : (((/* implicit */unsigned int) ((/* implicit */int) min((arr_60 [i_21] [i_22] [i_23] [i_24]), (((/* implicit */signed char) arr_89 [i_21] [i_22] [i_23] [i_24])))))))))); + if (((/* implicit */_Bool) min(((~(((/* implicit */int) (_Bool)0)))), (min((((((/* implicit */int) arr_61 [i_21] [i_22] [i_23] [i_24])) | (((/* implicit */int) arr_88 [i_21] [i_22] [i_23] [i_24])))), (((/* implicit */int) arr_61 [i_21] [i_22] [i_23] [i_24]))))))) + { + arr_91 [i_21] [i_22] [i_23] [i_24] = ((/* implicit */unsigned int) arr_58 [i_21] [i_22] [i_23] [i_24]); + arr_92 [i_21] [i_22] [i_23] [i_24] = ((/* implicit */int) arr_59 [i_21] [i_22] [i_23] [i_24]); + var_47 = ((/* implicit */_Bool) min((((/* implicit */unsigned int) max((((/* implicit */int) ((((/* implicit */int) arr_60 [i_21] [i_22] [i_23] [i_24])) <= (((/* implicit */int) arr_61 [i_21] [i_22] [i_23] [i_24]))))), ((+(((/* implicit */int) arr_61 [i_21] [i_22] [i_23] [i_24]))))))), (max((((/* implicit */unsigned int) (~(((/* implicit */int) arr_89 [i_21] [i_22] [i_23] [i_24]))))), (arr_59 [i_21] [i_22] [i_23] [i_24]))))); + } + + arr_93 [i_21] [i_22] [i_23] [i_24] = ((/* implicit */_Bool) max((((/* implicit */unsigned short) arr_88 [i_21] [i_22] [i_23 + 1] [i_24])), (min((((/* implicit */unsigned short) arr_61 [i_21] [i_22] [i_23 - 2] [i_24])), ((unsigned short)1593))))); + } + } + } + arr_94 [i_21] [i_22] = ((/* implicit */unsigned char) (!(((/* implicit */_Bool) arr_82 [i_21] [i_22])))); + } + } + } + var_48 = ((/* implicit */signed char) var_5); + } +} diff --git a/testsuite/c_test/unit_test/UNIT0162-ebo-CombineExtsionAndLoadPattern/init.h b/testsuite/c_test/unit_test/UNIT0162-ebo-CombineExtsionAndLoadPattern/init.h new file mode 100644 index 0000000000000000000000000000000000000000..a8fb12eeba0b7ca61728638eb6514754bed74fac --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0162-ebo-CombineExtsionAndLoadPattern/init.h @@ -0,0 +1,55 @@ +extern unsigned int var_19; +extern int var_20; +extern unsigned int var_21; +extern unsigned char var_22; +extern signed char var_23; +extern int var_24; +extern short var_25; +extern unsigned int var_26; +extern int var_27; +extern unsigned char var_28; +extern _Bool var_29; +extern int var_30; +extern __thread signed char var_31; +extern signed char var_32; +extern long long int var_33; +extern long long int var_34; +extern __thread short var_35; +extern long long int var_36; +extern unsigned char var_37; +extern long long int var_38; +extern int var_39; +extern signed char var_40; +extern long long int var_41; +extern unsigned long long int var_42; +extern unsigned long long int var_43; +extern __thread _Bool var_44; +extern unsigned int var_45; +extern _Bool var_46; +extern _Bool var_47; +extern signed char var_48; +extern unsigned char arr_7 [20] [19] ; +extern unsigned char arr_14 [20] [19] [25] [21] [17] ; +extern unsigned short arr_15 [20] [19] [25] [21] [17] ; +extern unsigned int arr_16 [20] [19] ; +extern int arr_17 [20] [19] ; +extern unsigned int arr_35 [18] [16] [24] [22] [19] ; +extern unsigned int arr_36 [18] [16] [24] [22] [19] ; +extern signed char arr_37 [18] [16] ; +extern unsigned char arr_38 [18] [16] ; +extern short arr_39 [18] [16] ; +extern long long int arr_40 [18] [16] ; +extern short arr_48 [18] [12] ; +extern _Bool arr_49 [18] [12] ; +extern long long int arr_62 [23] [19] [21] [23] ; +extern short arr_63 [23] [19] [21] [23] ; +extern unsigned int arr_64 [23] [19] ; +extern short arr_72 [15] [12] [10] ; +extern long long int arr_77 [15] [12] [10] [19] [16] ; +extern signed char arr_78 [15] [12] [10] [19] [16] ; +extern int arr_79 [15] [12] [10] [19] [16] ; +extern unsigned short arr_90 [23] [14] [19] [21] ; +extern unsigned int arr_91 [23] [14] [19] [21] ; +extern int arr_92 [23] [14] [19] [21] ; +extern _Bool arr_93 [23] [14] [19] [21] ; +extern unsigned char arr_94 [23] [14] ; diff --git a/testsuite/c_test/unit_test/UNIT0162-ebo-CombineExtsionAndLoadPattern/test.cfg b/testsuite/c_test/unit_test/UNIT0162-ebo-CombineExtsionAndLoadPattern/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..8f690781ad09c0e1cd8a956d6eb04c422a63d726 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0162-ebo-CombineExtsionAndLoadPattern/test.cfg @@ -0,0 +1,5 @@ +TEST_OS,TEST_O2: +generate_shared_lib(APP1=func,LIB=func) +compile(APP2=driver) +link(APP2=driver,LIB=func) +run() diff --git a/testsuite/c_test/unit_test/UNIT0162-optCfg-continuous_memory/main.c b/testsuite/c_test/unit_test/UNIT0162-optCfg-continuous_memory/main.c new file mode 100644 index 0000000000000000000000000000000000000000..5ff43e31a6051e732265c605c504f210c622d947 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0162-optCfg-continuous_memory/main.c @@ -0,0 +1,13 @@ +struct A { + void *smac; + void *dmac; +}; + +int main() { + struct A *pkt; + if ((*((int *) (((pkt)->smac))) == 0x0 && *((short *) (((char *) (((pkt)->smac))) + 4)) == 0x0) || + (*((int *) (((pkt)->dmac))) == 0x0 && *((short *) (((char *) (((pkt)->dmac))) + 4)) == 0x0)) { + return 0; + } + return 0; +} diff --git a/testsuite/c_test/unit_test/UNIT0162-optCfg-continuous_memory/test.cfg b/testsuite/c_test/unit_test/UNIT0162-optCfg-continuous_memory/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..8f4a478f6312074e1e5039d3398bb75e10193817 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0162-optCfg-continuous_memory/test.cfg @@ -0,0 +1,3 @@ +CO2: +${MAPLE_BUILD_OUTPUT}/bin/maple main.c -O2 --debug --save-temps +python3 ${TEST_BIN}/check.py --check=num --n=2 --str="br" --result=main.me.mpl diff --git a/testsuite/c_test/unit_test/UNIT0163-pregcopy/main.c b/testsuite/c_test/unit_test/UNIT0163-pregcopy/main.c new file mode 100644 index 0000000000000000000000000000000000000000..365441d80305cd071fef38b000313c9fefb900fd --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0163-pregcopy/main.c @@ -0,0 +1,290 @@ +char(g), e, h, i, aa, z, ab; +int a, w, c, l, m, ac, x, y, ad, ae, af, ag, ah, ai, aj, ak, al; +long long b, f; +unsigned d, am; +short n, t, u, v, an, ao, ap, aq, ar; +int* o; +int** p; +unsigned *q, *as; +char* r = &h; +signed char s; +long at, au = 3, av; +short *aw, *ax; +int ay[]; +unsigned** az; +static char(ba)() {} +static signed bb() {} +static signed bc() {} +static char(bd)() {} +static signed be() {} +char(bf)(char bg) { + return bg; +} +short(bh)(bg) { + return bg; +} +short(bi)(bg) { + return bg; +} +static short(bj)() {} +void(bk)() {} +static int(bl)() {} +static int(bm)() {} +long(bn)() { + return 0; +} +void(bo)() {} +static long(bp)() {} +char(bq)(char bg, char br) { + return br; +} +char(bs)(bg, br) { + return br; +} +short(bt)(short bg) { + return bg; +} +static short(bu)() {} +static int(bv)() {} +void(bw)() {} +static int(bx)() {} +unsigned by(bg) { + return bg; +} +unsigned bz(bg) { + return a; +} +long(ca)(bg) { + return bg; +} +long(cb)() { + return w / 0; +} +void(cc)(); +void cd(unsigned long bg) { + char ce, cf, cg, ch; + long ci, cj, ck; + short cl; + unsigned cm; + int cn, co, cp; + unsigned* cq = &d; + int cr[10]; + b; + char* cs = &e; + long long ct = b; + long long *cu = &ct, *cv = &f; + int cw[9][27] = { 0, 1, 4, 3, 2, 3, 0, 0, 1, 0, 0, 3, 1, 0, 4, 1, 0, 2, 1, 1, 0, 0, 2, 0, 1, 1, 0, + {3, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 0, 1, 2, 2, 0, 1, 4, 3, 2, 3, 0, 0, 1}, 1, 0, 4, 1, 0, 2, 1, + 1, 0, 0, 2, 0, 0, 1, 0, 3, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 0, 1, 2, 2, 0, 1, 4, 3, 2, 3, 0, 0, 1, + 0, 0, 3, 1, 0, 0, 0, 0, 1, 6, 6, 1, 3, 2, 2, 1, 6, 1, 1, 0, 2, 0, 1, 1, 2, 2, 2, 4, 0, 1, 2, 0, + 1, 0, 4, 0, 1, 0, 1, 1, 0, 6, 635917, 2, 1, 6, 1, 0, 0, 0, 1, 6, 6, 1, 3, 2, 2, 1, 6, 1, 1, 0, 2, + 0, 1, 1, 2, 2, 2, 4, 0, 1, 2, 0, 1, 0, 4, 0, 1, 6, 1, 1, 0, 2, 3, 2, 1, 6, 1, 0, 0, 0, 1, 6, 6, 1}; + long cx = x = 0; + for (; x < 10; x++) + cr[x] = 1; + for (; x < 4;) + an; + (cu = &b) || cd; + ce = ba(); + cw[5][0] &= ce; + *cs = ae = ba(cw[5][0]) <= 252003; + 9; + aa = bd(af); + int k = cl = cr[8]; + ap = cl = bf(cl); + *cq = cb(); + ag = c; +cy: + ak = bg && 9; + 0; + for (; ck != 5; ck = bz(ck)) { + int *cz = &ag, *da = &cw[5][0]; + 1; + char* db = &e; + short* dc = &v; + unsigned** dd = &as; + 18446744073709551615 >= bg&& bg; + ba; + cp = bl(); + char j = z = cp; + z; + *cz = bh(z) < cw[0][2]; + ai = (&cs != db) > **p; + al = bx(ai | 1165212643162920 > s); + aj = ba(); + *da = bc() > 8; + if (da) { + long de = 9461681275; + short df = n = 1; + int dg = ak = *o; + for (; cx; cx = cm) { + int dh; + int* di = &cr[4]; + x = 0; + for (; 0; x++) + 0; + --de; + if (bm()) { + unsigned* dj = cq; + short* dk = &df; + int dl = ag; + if ((7 | by((dj = &ay[90]) || + (*dc = (*q = 7) != dm((ax = dk = &df) != &n, de)))) < + 7UL) { + int dn[] = {8, 8, 3, 8, 8, 3, 8}; + unsigned* t61 = *az; + int t62[1] = {}; + ac; + co = be(); + *r = bq(co ^ *di, *r); + ch = bs(*r, bg); + 6; + cj; + h <= (*cv = cj); + ar = bi(ag); + ba; + *q = bx(*(t61 = *az)); + ak &= bn(); + if (*da) + continue; + } else { + int t63[] = {5, 5, 5, 5, 5}; + 0; + for (; x; x++) + dj; + *di = bj(); + if (**p) + break; + bg = aw || 7; + *cv ^= + (dh = *da = at | &dg == (dd = &q) && *aw) <= 169573 < 169573 && + *aw; + bz; + g; + *di |= 1; + } + 0; + for (; m != 7; ++m) + ba; + *p = &dl; + } else if (c) + goto cy; + } + } else { + int *t64 = &af, *t65 = &c; + int t66[] = {1, 1, 1, 1, 1, 1, 1, 1}; + *p = &ag; + cn = bv(); + av = bp(cn); + cf = bd(*r); + (au = f) || (bk(ci || *r), h); + af; + if (bb(da) > bg) { + int t67 = *o = ** p = by(); + ad = bu(); + bo(*aw || *t65); + am = bt(ah | *t65); + if ((cd && ca(am < 5UL)) | cm & **p || bg) { + long t68; + for (; x < 2; x++) + 3; + *cz = 4; + ba() ^ (cw[5][0] = *t65 = t68); + cg = ba(); + cc; + --bg; + bw(bg || 7); + *t64 = 0 == 0; + if (af) + continue; + l; + for (; 0;) { + s = fn30(++aq || bd); + o; + 0 ? 0 : cd; + q = *dd = &t67; + *t64 = fn31(); + 0; + 0; + 0; + bp; + db && 7; + fn32() || cd; + } + } + *p = *p; + if (*t65) + break; + } else { + ab; + for (;;) { + int t69[] = {0, 0, 0, 0, 0, 0, 0, 0, t69[0]}; + long t70[1] = {}; + short t71[] = {an, 1, 9, ao, 1, 9, 0, 1, 0, ao, ao, 0, 1, 1, + an, ao, u, an, 0, t, ao, 0, 0, 1, t, 1, 0, 0, + 0, ao, ao, 1, 0, 0, 1, an, 0, t, ao, ao, t, 0}; + 0; + for (;; x++) + for (; y; y++) + 0; + 3; + for (;; i--) { + int t72[] = {*t65, *o, *t64, *t65, 1, *t64, *t65, + *o, *t65, *t64, 1, *t65, *t64, *o, + *t65, *t65, 1, *t65, *t65, *o}; + int t73[] = {1, 1, 1, 1, 1, 1, 1}; + int t74[] = { + *t65, *t64, *t64, *o, *o, 0, 1, *o, *t64, *t64, + 0, *t64, *o, *o, 1, 1, *o, *t65, *o, 1, + *o, *o, 1, *o, *t64, 1, *o, 1, *t65, 1, + 1, 1, 1, *o, *t65, 1, 1, *o, *o, 1, + 1, *t65, *t64, *t65, *t64, *o, *t64, 0, *o, *t64, + *o, 1, *o, 1, *o, 1, *o, *t64, 0, *t64, + 1, *o, *t64, *o, 0, *o, *t65, 1, *t64, 1, + 1, *t64, 0, *t64, 1, *t65, 1, *t65, 0, 1, + *t64, *t65, *o, *o, 1, *t65, 0, 0, *t64, *o, + *t64, 1, 0, *t64, *t65, *t64, *t64, 1, 1, *t64, + *o, *o, *t64, *t65, *t65, *t64, *t64, 0, 1, *t64, + 1, *t64, 1, *t64, *t65, *o, *o, *t64, *t65, *t65, + 1, *t64, 0, 1, *t64, *o, *o, *t64, *o, *o, + *t65, 1, *t64, *o, 1, 1, 1, 1, *o, *t64, + *t64, 1, *t64, 0, *t64, *t65, 0, *o, *o, 1, + 0, 1, *t65, *t65, *t65, 1, 0, 1, *o, *o, + *t64, *o, *o, *t65, 1, 1, *o, *t65, *o, 1, + 0, *o, 1, *t64, *o, 1, 1, *t64, *t65, *t64, + *o, 1, *t65, *t65, *t64, 1, 1, *o, *t64, *o, + 0, *t64, 1, 0, *t64, *o, 0, 1, 1, *o, + *o, 1, 1, *o, *t64, *t64, 1, *o, *t64, 1, + *o, 1, 1, 0, 1, 1, *t65, *o, 1, 1, + *t64, 1, *t64, 1, 1, *t64, *o, *o, *t64, *o, + *o, *o, 1, 1, 1, *t64, *t64, *t65, *o, *t64}; + int t75[][10][1] = {{{}, {}, {}, {}, {}, {}, {}, {}, *t65}, + {{}, {}, {}, {}, {}, {}, {}, {}, *t65}, + {*o, {}}, + {{}, *o}, + {*o, {}}, + {{}, *o}, + {{}, *o}, + {{}, *o}, + {{}, *o}, + {{}, *o}, + {{}, {}, {}, {}, {}, {}, {}, {}, *o}, + {}, + {}, + {}, + {}, + {}, + {}, + {}, + {}, + *o}; + o; + } + if (bc) + break; + } + } + } + } +} +int main() {} diff --git a/testsuite/c_test/unit_test/UNIT0163-pregcopy/test.cfg b/testsuite/c_test/unit_test/UNIT0163-pregcopy/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..133ad4739e9a788d34e1cfac7ee18116230b8b2b --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0163-pregcopy/test.cfg @@ -0,0 +1,2 @@ +CO2: +${MAPLE_BUILD_OUTPUT}/bin/maple -O2 main.c -w -S diff --git a/testsuite/c_test/unit_test/UNIT0164-targetprop/driver.c b/testsuite/c_test/unit_test/UNIT0164-targetprop/driver.c new file mode 100644 index 0000000000000000000000000000000000000000..f17cca4ce318b6af04c11ff8626b8685a8fd457d --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0164-targetprop/driver.c @@ -0,0 +1,200 @@ +#include + +unsigned long long int seed = 0; +void hash(unsigned long long int *seed, unsigned long long int const v) { + *seed ^= v + 0x9e3779b9 + ((*seed)<<6) + ((*seed)>>2); +} + +signed char var_0 = (signed char)-1; +unsigned short var_1 = (unsigned short)29282; +signed char var_2 = (signed char)13; +short var_3 = (short)8033; +unsigned char var_4 = (unsigned char)116; +signed char var_5 = (signed char)-25; +unsigned long long int var_6 = 3060008527955846234ULL; +unsigned long long int var_7 = 17108457571267521559ULL; +int var_8 = -607052051; +_Bool var_9 = (_Bool)0; +signed char var_10 = (signed char)103; +unsigned char var_11 = (unsigned char)191; +short var_12 = (short)-25646; +signed char var_13 = (signed char)-41; +int var_14 = 1244534841; +unsigned int var_15 = 1542520077U; +unsigned short var_16 = (unsigned short)25835; +unsigned short var_17 = (unsigned short)50387; +unsigned int var_18 = 3870444117U; +int var_19 = -1182623431; +_Bool var_20 = (_Bool)1; +short var_21 = (short)11194; +__thread unsigned short var_22 = (unsigned short)54584; +unsigned char var_23 = (unsigned char)154; +signed char var_24 = (signed char)-50; +int var_25 = -12834007; +__thread long long int var_26 = -4167964093285423711LL; +unsigned short var_27 = (unsigned short)43647; +unsigned int var_28 = 3339695607U; +unsigned long long int var_29 = 16710086995624239903ULL; +_Bool var_30 = (_Bool)0; +unsigned short var_31 = (unsigned short)26030; +long long int var_32 = -228001644254834936LL; +int var_33 = 1649508108; +unsigned long long int var_34 = 12490950785326187617ULL; +__thread _Bool var_35 = (_Bool)1; +_Bool var_36 = (_Bool)0; +_Bool var_37 = (_Bool)1; +unsigned char var_38 = (unsigned char)89; +unsigned char var_39 = (unsigned char)193; +int var_40 = -1599217040; +short var_41 = (short)25532; +_Bool var_42 = (_Bool)0; +unsigned long long int var_43 = 11330365801005871741ULL; +unsigned int var_44 = 4260499067U; +unsigned char var_45 = (unsigned char)214; +unsigned char var_46 = (unsigned char)62; +unsigned char var_47 = (unsigned char)123; +long long int var_48 = -4986808148012098056LL; +unsigned int var_49 = 1502053039U; +unsigned long long int var_50 = 7995749801150870491ULL; +unsigned char var_51 = (unsigned char)107; +unsigned long long int var_52 = 6537723742214157810ULL; +unsigned char var_53 = (unsigned char)137; +short var_54 = (short)27024; +unsigned char var_55 = (unsigned char)180; +unsigned char var_56 = (unsigned char)88; +signed char var_57 = (signed char)68; +unsigned int var_58 = 3171861888U; +__thread signed char var_59 = (signed char)72; +unsigned long long int var_60 = 7259328727577554028ULL; +_Bool arr_0 [14] ; +_Bool arr_5 [14] [14] ; +unsigned char arr_7 [14] [14] [19] ; +long long int arr_8 [14] [14] [19] ; +int arr_9 [14] [14] [19] [24] ; +unsigned long long int arr_10 [14] [14] [19] [24] ; +short arr_11 [14] [14] [19] [17] ; +long long int arr_12 [14] [14] [19] [17] ; +signed char arr_17 [14] [14] [19] [17] [11] ; +unsigned int arr_23 [14] [14] [19] [17] [19] ; +int arr_37 [14] [14] [19] [10] ; +_Bool arr_39 [19] ; +long long int arr_40 [19] ; +signed char arr_43 [19] ; +signed char arr_44 [19] ; +long long int arr_45 [19] [15] ; +signed char arr_46 [19] [15] ; +long long int arr_48 [19] [15] [24] ; +signed char arr_49 [19] [15] [24] ; +int arr_51 [19] [15] [24] [23] ; +unsigned char arr_52 [19] [15] [24] [23] ; +unsigned long long int arr_53 [19] [15] [24] [23] ; +unsigned long long int arr_55 [19] [15] [24] [18] ; +unsigned char arr_56 [19] [15] [24] [18] ; +short arr_57 [19] [15] [24] [18] ; +unsigned short arr_59 [19] [15] [24] [18] ; +int arr_60 [19] [15] [24] [18] ; +signed char arr_61 [19] [15] [24] [18] [25] ; +long long int arr_62 [19] [15] [24] [18] [25] ; +unsigned int arr_64 [19] [15] [24] [18] [12] ; +unsigned short arr_67 [19] [15] [24] [18] [17] ; +unsigned long long int arr_68 [19] [15] [24] [18] [17] ; +short arr_75 [19] [15] [24] [18] [17] ; +short arr_76 [19] [15] [24] [18] [17] ; +unsigned char arr_77 [19] [15] [24] [18] [17] ; +unsigned char arr_78 [19] [15] [24] [18] [17] ; +int arr_80 [19] [15] [10] ; +_Bool arr_88 [19] [12] ; +unsigned long long int arr_89 [19] [12] ; +int arr_91 [19] [12] [20] ; +int arr_92 [19] [12] [20] ; +long long int arr_95 [19] [12] [20] [21] ; +signed char arr_98 [19] [12] [16] ; +unsigned int arr_100 [19] [12] [16] ; +int arr_105 [19] [12] [16] [15] [25] ; +short arr_106 [19] [12] [16] [15] [25] ; +unsigned char arr_112 [19] [12] [16] [15] [25] ; +unsigned char arr_113 [19] [12] [16] [15] [25] ; +long long int arr_118 [19] [12] [16] [15] [16] ; +unsigned int arr_132 [19] [12] [25] ; +unsigned short arr_133 [19] [12] [25] [15] ; +int arr_134 [19] [12] [25] [15] ; +unsigned char arr_136 [19] [12] [25] [15] [11] ; +int arr_137 [19] [12] [25] [15] [11] ; +unsigned short arr_141 [19] [12] [21] ; +unsigned int arr_142 [19] [12] [21] ; +unsigned char arr_148 [10] ; +long long int arr_149 [10] ; +signed char arr_150 [10] ; +_Bool arr_13 [14] [14] [19] [17] ; +unsigned int arr_14 [14] [14] [19] [17] ; +int arr_15 [14] [14] [19] [17] ; +unsigned int arr_16 [14] [14] [19] [17] ; +unsigned long long int arr_21 [14] [14] [19] [17] [11] ; +unsigned long long int arr_22 [14] [14] [19] [17] [11] ; +unsigned int arr_27 [14] [14] [19] [17] [19] ; +_Bool arr_28 [14] [14] [19] [17] [19] ; +int arr_32 [14] [14] [19] [17] [12] ; +signed char arr_33 [14] [14] [19] [17] [12] ; +unsigned short arr_34 [14] [14] [19] [17] [12] ; +unsigned long long int arr_38 [14] [14] [19] ; +unsigned int arr_41 [19] ; +signed char arr_42 [19] ; +signed char arr_50 [19] [15] [24] ; +unsigned char arr_54 [19] [15] [24] [23] ; +int arr_66 [19] [15] [24] [18] [12] ; +_Bool arr_69 [19] [15] [24] [18] [17] ; +short arr_70 [19] [15] [24] [18] ; +unsigned char arr_87 [19] [15] [10] [12] [22] ; +int arr_96 [19] [12] [20] [21] ; +long long int arr_97 [19] [12] [20] [21] ; +unsigned char arr_101 [19] [12] [16] ; +unsigned int arr_107 [19] [12] [16] [15] [25] ; +unsigned long long int arr_108 [19] [12] [16] [15] [25] ; +long long int arr_109 [19] [12] [16] [15] [25] ; +unsigned char arr_110 [19] [12] [16] [15] [25] ; +short arr_111 [19] [12] [16] [15] [25] ; +unsigned char arr_115 [19] [12] [16] [15] [25] ; +unsigned char arr_116 [19] [12] [16] [15] [25] ; +long long int arr_120 [19] [12] [16] [15] [16] ; +unsigned char arr_121 [19] [12] [16] [15] [16] ; +long long int arr_122 [19] [12] [16] [15] [16] ; +unsigned short arr_123 [19] [12] [16] [15] [16] ; +signed char arr_124 [19] [12] [16] [15] [16] ; +unsigned int arr_128 [19] [12] [16] ; +short arr_138 [19] [12] [25] [15] [11] ; +int arr_139 [19] [12] [25] [15] [11] ; +_Bool arr_140 [19] [12] [25] [15] [11] ; +int arr_145 [19] [12] [21] ; +short arr_146 [19] ; +unsigned char arr_151 [10] ; +int arr_152 [10] ; +unsigned short arr_153 [10] ; +void init() { + for (size_t i_0 = 0; i_0 < 19; ++i_0) + for (size_t i_1 = 0; i_1 < 15; ++i_1) + for (size_t i_2 = 0; i_2 < 24; ++i_2) + for (size_t i_3 = 0; i_3 < 18; ++i_3) + for (size_t i_4 = 0; i_4 < 25; ++i_4) + arr_62 [i_0] [i_1] [i_2] [i_3] [i_4] = 5388088388012331884LL; + for (size_t i_0 = 0; i_0 < 19; ++i_0) + for (size_t i_1 = 0; i_1 < 15; ++i_1) + for (size_t i_2 = 0; i_2 < 24; ++i_2) + for (size_t i_3 = 0; i_3 < 18; ++i_3) + for (size_t i_4 = 0; i_4 < 12; ++i_4) + arr_64 [i_0] [i_1] [i_2] [i_3] [i_4] = 421101516U; +} + +void checksum() { + for (size_t i_0 = 0; i_0 < 14; ++i_0) + for (size_t i_1 = 0; i_1 < 14; ++i_1) + for (size_t i_2 = 0; i_2 < 19; ++i_2) + hash(&seed, arr_38 [i_0] [i_1] [i_2] ); +} +void test(signed char var_0, unsigned short var_1, signed char var_2, short var_3, unsigned char var_4, signed char var_5, unsigned long long int var_6, unsigned long long int var_7, int var_8, _Bool var_9, _Bool arr_0 [14] , _Bool arr_5 [14] [14] , unsigned char arr_7 [14] [14] [19] , long long int arr_8 [14] [14] [19] , int arr_9 [14] [14] [19] [24] , unsigned long long int arr_10 [14] [14] [19] [24] , short arr_11 [14] [14] [19] [17] , long long int arr_12 [14] [14] [19] [17] , signed char arr_17 [14] [14] [19] [17] [11] , unsigned int arr_23 [14] [14] [19] [17] [19] , int arr_37 [14] [14] [19] [10] , _Bool arr_39 [19] , long long int arr_40 [19] , signed char arr_43 [19] , signed char arr_44 [19] , long long int arr_45 [19] [15] , signed char arr_46 [19] [15] , long long int arr_48 [19] [15] [24] , signed char arr_49 [19] [15] [24] , int arr_51 [19] [15] [24] [23] , unsigned char arr_52 [19] [15] [24] [23] , unsigned long long int arr_53 [19] [15] [24] [23] , unsigned long long int arr_55 [19] [15] [24] [18] , unsigned char arr_56 [19] [15] [24] [18] , short arr_57 [19] [15] [24] [18] , unsigned short arr_59 [19] [15] [24] [18] , int arr_60 [19] [15] [24] [18] , signed char arr_61 [19] [15] [24] [18] [25] , long long int arr_62 [19] [15] [24] [18] [25] , unsigned int arr_64 [19] [15] [24] [18] [12] , unsigned short arr_67 [19] [15] [24] [18] [17] , unsigned long long int arr_68 [19] [15] [24] [18] [17] , short arr_75 [19] [15] [24] [18] [17] , short arr_76 [19] [15] [24] [18] [17] , unsigned char arr_77 [19] [15] [24] [18] [17] , unsigned char arr_78 [19] [15] [24] [18] [17] , int arr_80 [19] [15] [10] , _Bool arr_88 [19] [12] , unsigned long long int arr_89 [19] [12] , int arr_91 [19] [12] [20] , int arr_92 [19] [12] [20] , long long int arr_95 [19] [12] [20] [21] , signed char arr_98 [19] [12] [16] , unsigned int arr_100 [19] [12] [16] , int arr_105 [19] [12] [16] [15] [25] , short arr_106 [19] [12] [16] [15] [25] , unsigned char arr_112 [19] [12] [16] [15] [25] , unsigned char arr_113 [19] [12] [16] [15] [25] , long long int arr_118 [19] [12] [16] [15] [16] , unsigned int arr_132 [19] [12] [25] , unsigned short arr_133 [19] [12] [25] [15] , int arr_134 [19] [12] [25] [15] , unsigned char arr_136 [19] [12] [25] [15] [11] , int arr_137 [19] [12] [25] [15] [11] , unsigned short arr_141 [19] [12] [21] , unsigned int arr_142 [19] [12] [21] , unsigned char arr_148 [10] , long long int arr_149 [10] , signed char arr_150 [10] ); + +int main() { + init(); + test(var_0, var_1, var_2, var_3, var_4, var_5, var_6, var_7, var_8, var_9, arr_0 , arr_5 , arr_7 , arr_8 , arr_9 , arr_10 , arr_11 , arr_12 , arr_17 , arr_23 , arr_37 , arr_39 , arr_40 , arr_43 , arr_44 , arr_45 , arr_46 , arr_48 , arr_49 , arr_51 , arr_52 , arr_53 , arr_55 , arr_56 , arr_57 , arr_59 , arr_60 , arr_61 , arr_62 , arr_64 , arr_67 , arr_68 , arr_75 , arr_76 , arr_77 , arr_78 , arr_80 , arr_88 , arr_89 , arr_91 , arr_92 , arr_95 , arr_98 , arr_100 , arr_105 , arr_106 , arr_112 , arr_113 , arr_118 , arr_132 , arr_133 , arr_134 , arr_136 , arr_137 , arr_141 , arr_142 , arr_148 , arr_149 , arr_150 ); + checksum(); + printf("%llu\n", seed); +} diff --git a/testsuite/c_test/unit_test/UNIT0164-targetprop/expected.txt b/testsuite/c_test/unit_test/UNIT0164-targetprop/expected.txt new file mode 100644 index 0000000000000000000000000000000000000000..e7aacb5eb8a83b209343eb0aad4490a28fc9bd8c --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0164-targetprop/expected.txt @@ -0,0 +1 @@ +1093461438710479092 diff --git a/testsuite/c_test/unit_test/UNIT0164-targetprop/func.c b/testsuite/c_test/unit_test/UNIT0164-targetprop/func.c new file mode 100644 index 0000000000000000000000000000000000000000..85bf1038ee517328a570d1989fdf367d15f6d918 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0164-targetprop/func.c @@ -0,0 +1,39 @@ +/* +yarpgen version 2.0 (build f17b7aa on 2023:05:23) +Seed: 1057120243 +Invocation: /root/workspace/MapleC_pipeline/Yarpgen_pipeline/maplec-test/Public/tools/yarpgen/yarpgen -o /root/workspace/MapleC_pipeline/Yarpgen_pipeline/maplec-test/../Report/LangFuzz/report/1689629500_9981/src --std=c +*/ +#include "init.h" +#define max(a,b) \ + ({ __typeof__ (a) _a = (a); \ + __typeof__ (b) _b = (b); \ + _a > _b ? _a : _b; }) +#define min(a,b) \ + ({ __typeof__ (a) _a = (a); \ + __typeof__ (b) _b = (b); \ + _a < _b ? _a : _b; }) +void test(signed char var_0, unsigned short var_1, signed char var_2, short var_3, unsigned char var_4, signed char var_5, unsigned long long int var_6, unsigned long long int var_7, int var_8, _Bool var_9, _Bool arr_0 [14] , _Bool arr_5 [14] [14] , unsigned char arr_7 [14] [14] [19] , long long int arr_8 [14] [14] [19] , int arr_9 [14] [14] [19] [24] , unsigned long long int arr_10 [14] [14] [19] [24] , short arr_11 [14] [14] [19] [17] , long long int arr_12 [14] [14] [19] [17] , signed char arr_17 [14] [14] [19] [17] [11] , unsigned int arr_23 [14] [14] [19] [17] [19] , int arr_37 [14] [14] [19] [10] , _Bool arr_39 [19] , long long int arr_40 [19] , signed char arr_43 [19] , signed char arr_44 [19] , long long int arr_45 [19] [15] , signed char arr_46 [19] [15] , long long int arr_48 [19] [15] [24] , signed char arr_49 [19] [15] [24] , int arr_51 [19] [15] [24] [23] , unsigned char arr_52 [19] [15] [24] [23] , unsigned long long int arr_53 [19] [15] [24] [23] , unsigned long long int arr_55 [19] [15] [24] [18] , unsigned char arr_56 [19] [15] [24] [18] , short arr_57 [19] [15] [24] [18] , unsigned short arr_59 [19] [15] [24] [18] , int arr_60 [19] [15] [24] [18] , signed char arr_61 [19] [15] [24] [18] [25] , long long int arr_62 [19] [15] [24] [18] [25] , unsigned int arr_64 [19] [15] [24] [18] [12] , unsigned short arr_67 [19] [15] [24] [18] [17] , unsigned long long int arr_68 [19] [15] [24] [18] [17] , short arr_75 [19] [15] [24] [18] [17] , short arr_76 [19] [15] [24] [18] [17] , unsigned char arr_77 [19] [15] [24] [18] [17] , unsigned char arr_78 [19] [15] [24] [18] [17] , int arr_80 [19] [15] [10] , _Bool arr_88 [19] [12] , unsigned long long int arr_89 [19] [12] , int arr_91 [19] [12] [20] , int arr_92 [19] [12] [20] , long long int arr_95 [19] [12] [20] [21] , signed char arr_98 [19] [12] [16] , unsigned int arr_100 [19] [12] [16] , int arr_105 [19] [12] [16] [15] [25] , short arr_106 [19] [12] [16] [15] [25] , unsigned char arr_112 [19] [12] [16] [15] [25] , unsigned char arr_113 [19] [12] [16] [15] [25] , long long int arr_118 [19] [12] [16] [15] [16] , unsigned int arr_132 [19] [12] [25] , unsigned short arr_133 [19] [12] [25] [15] , int arr_134 [19] [12] [25] [15] , unsigned char arr_136 [19] [12] [25] [15] [11] , int arr_137 [19] [12] [25] [15] [11] , unsigned short arr_141 [19] [12] [21] , unsigned int arr_142 [19] [12] [21] , unsigned char arr_148 [10] , long long int arr_149 [10] , signed char arr_150 [10] ) { + /* LoopNest 2 */ + for (_Bool i_0 = (_Bool)0/*0*/; i_0 < ((/* implicit */int) ((/* implicit */_Bool) var_2))/*1*/; i_0 += (_Bool)1/*1*/) + { + for (_Bool i_1 = ((((/* implicit */int) ((((/* implicit */int) (_Bool)1)) <= (((/* implicit */int) (short)14579))))) - (1))/*0*/; i_1 < ((/* implicit */int) ((/* implicit */_Bool) var_1))/*1*/; i_1 += ((((/* implicit */int) var_9)) + (1))/*1*/) + { + { + /* LoopSeq 1 */ + for (_Bool i_2 = ((((/* implicit */int) ((/* implicit */_Bool) var_6))) - (1))/*0*/; i_2 < ((/* implicit */int) ((/* implicit */_Bool) var_6))/*1*/; i_2 += (_Bool)1/*1*/) + { + /* LoopSeq 3 */ + for (unsigned long long int i_3 = 0ULL/*0*/; i_3 < ((((/* implicit */unsigned long long int) (_Bool)1)) + (23ULL))/*24*/; i_3 += ((((/* implicit */unsigned long long int) var_2)) - (12ULL))/*1*/) + { + var_10 = ((/* implicit */signed char) (_Bool)1); + var_11 = ((/* implicit */unsigned char) (((!(((/* implicit */_Bool) max((arr_10 [i_0] [i_1] [i_2] [i_3]), (((/* implicit */unsigned long long int) var_2))))))) ? (((/* implicit */int) (!(((/* implicit */_Bool) min((((/* implicit */unsigned long long int) (signed char)-1)), (var_7))))))) : ((~(arr_9 [i_0] [i_1] [i_2] [i_3]))))); + } + arr_38 [i_0] [i_1] [i_2] = ((/* implicit */unsigned long long int) min((max((arr_8 [i_0] [i_1] [i_2]), (((/* implicit */long long int) (-(972243504U)))))), (((/* implicit */long long int) (~(((/* implicit */int) min(((signed char)-9), (((/* implicit */signed char) (_Bool)1)))))))))); + var_18 = ((/* implicit */unsigned int) arr_8 [i_0] [i_1] [i_2]); + } + var_19 = ((/* implicit */int) (_Bool)0); + var_20 = ((/* implicit */_Bool) ((_Bool) ((((/* implicit */_Bool) 4294967276U)) ? (((/* implicit */int) arr_5 [i_0] [i_1])) : (((/* implicit */int) arr_5 [i_0] [i_1]))))); + } + } + } +} diff --git a/testsuite/c_test/unit_test/UNIT0164-targetprop/init.h b/testsuite/c_test/unit_test/UNIT0164-targetprop/init.h new file mode 100644 index 0000000000000000000000000000000000000000..af9b01c704bad91c553d2fb81350ff0d97ae93c2 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0164-targetprop/init.h @@ -0,0 +1,95 @@ +extern signed char var_10; +extern unsigned char var_11; +extern short var_12; +extern signed char var_13; +extern int var_14; +extern unsigned int var_15; +extern unsigned short var_16; +extern unsigned short var_17; +extern unsigned int var_18; +extern int var_19; +extern _Bool var_20; +extern short var_21; +extern __thread unsigned short var_22; +extern unsigned char var_23; +extern signed char var_24; +extern int var_25; +extern __thread long long int var_26; +extern unsigned short var_27; +extern unsigned int var_28; +extern unsigned long long int var_29; +extern _Bool var_30; +extern unsigned short var_31; +extern long long int var_32; +extern int var_33; +extern unsigned long long int var_34; +extern __thread _Bool var_35; +extern _Bool var_36; +extern _Bool var_37; +extern unsigned char var_38; +extern unsigned char var_39; +extern int var_40; +extern short var_41; +extern _Bool var_42; +extern unsigned long long int var_43; +extern unsigned int var_44; +extern unsigned char var_45; +extern unsigned char var_46; +extern unsigned char var_47; +extern long long int var_48; +extern unsigned int var_49; +extern unsigned long long int var_50; +extern unsigned char var_51; +extern unsigned long long int var_52; +extern unsigned char var_53; +extern short var_54; +extern unsigned char var_55; +extern unsigned char var_56; +extern signed char var_57; +extern unsigned int var_58; +extern __thread signed char var_59; +extern unsigned long long int var_60; +extern _Bool arr_13 [14] [14] [19] [17] ; +extern unsigned int arr_14 [14] [14] [19] [17] ; +extern int arr_15 [14] [14] [19] [17] ; +extern unsigned int arr_16 [14] [14] [19] [17] ; +extern unsigned long long int arr_21 [14] [14] [19] [17] [11] ; +extern unsigned long long int arr_22 [14] [14] [19] [17] [11] ; +extern unsigned int arr_27 [14] [14] [19] [17] [19] ; +extern _Bool arr_28 [14] [14] [19] [17] [19] ; +extern int arr_32 [14] [14] [19] [17] [12] ; +extern signed char arr_33 [14] [14] [19] [17] [12] ; +extern unsigned short arr_34 [14] [14] [19] [17] [12] ; +extern unsigned long long int arr_38 [14] [14] [19] ; +extern unsigned int arr_41 [19] ; +extern signed char arr_42 [19] ; +extern signed char arr_50 [19] [15] [24] ; +extern unsigned char arr_54 [19] [15] [24] [23] ; +extern int arr_66 [19] [15] [24] [18] [12] ; +extern _Bool arr_69 [19] [15] [24] [18] [17] ; +extern short arr_70 [19] [15] [24] [18] ; +extern unsigned char arr_87 [19] [15] [10] [12] [22] ; +extern int arr_96 [19] [12] [20] [21] ; +extern long long int arr_97 [19] [12] [20] [21] ; +extern unsigned char arr_101 [19] [12] [16] ; +extern unsigned int arr_107 [19] [12] [16] [15] [25] ; +extern unsigned long long int arr_108 [19] [12] [16] [15] [25] ; +extern long long int arr_109 [19] [12] [16] [15] [25] ; +extern unsigned char arr_110 [19] [12] [16] [15] [25] ; +extern short arr_111 [19] [12] [16] [15] [25] ; +extern unsigned char arr_115 [19] [12] [16] [15] [25] ; +extern unsigned char arr_116 [19] [12] [16] [15] [25] ; +extern long long int arr_120 [19] [12] [16] [15] [16] ; +extern unsigned char arr_121 [19] [12] [16] [15] [16] ; +extern long long int arr_122 [19] [12] [16] [15] [16] ; +extern unsigned short arr_123 [19] [12] [16] [15] [16] ; +extern signed char arr_124 [19] [12] [16] [15] [16] ; +extern unsigned int arr_128 [19] [12] [16] ; +extern short arr_138 [19] [12] [25] [15] [11] ; +extern int arr_139 [19] [12] [25] [15] [11] ; +extern _Bool arr_140 [19] [12] [25] [15] [11] ; +extern int arr_145 [19] [12] [21] ; +extern short arr_146 [19] ; +extern unsigned char arr_151 [10] ; +extern int arr_152 [10] ; +extern unsigned short arr_153 [10] ; diff --git a/testsuite/c_test/unit_test/UNIT0164-targetprop/test.cfg b/testsuite/c_test/unit_test/UNIT0164-targetprop/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..8f690781ad09c0e1cd8a956d6eb04c422a63d726 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0164-targetprop/test.cfg @@ -0,0 +1,5 @@ +TEST_OS,TEST_O2: +generate_shared_lib(APP1=func,LIB=func) +compile(APP2=driver) +link(APP2=driver,LIB=func) +run() diff --git a/testsuite/c_test/unit_test/UNIT0164-vrp-cvt/expected.txt b/testsuite/c_test/unit_test/UNIT0164-vrp-cvt/expected.txt new file mode 100644 index 0000000000000000000000000000000000000000..61530ad9ff7bbb6a133dffd8a0c86a9f50fcf856 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0164-vrp-cvt/expected.txt @@ -0,0 +1 @@ +-28427 diff --git a/testsuite/c_test/unit_test/UNIT0164-vrp-cvt/main.c b/testsuite/c_test/unit_test/UNIT0164-vrp-cvt/main.c new file mode 100644 index 0000000000000000000000000000000000000000..d907d1d4f4520e75fe0d17516d3236707eea4487 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0164-vrp-cvt/main.c @@ -0,0 +1,20 @@ +#define max(a,b) \ + ({ __typeof__ (a) _a = (a); \ + __typeof__ (b) _b = (b); \ + _a > _b ? _a : _b; }) +#define min(a,b) \ + ({ __typeof__ (a) _a = (a); \ + __typeof__ (b) _b = (b); \ + _a < _b ? _a : _b; }) + +short arr[23][23]; +int main() { + for (int i_0 = 0; i_0 < 23; ++i_0) + for (int i_1 = 0; i_1 < 23; ++i_1) + arr[i_0] [i_1] = (short)-28427; + + int x = min((2021076666U), (arr[0][0])); + int y = min(0, (long long int)arr[0][0]); + int var_113 = min(x, y); + printf("%d\n", var_113); +} diff --git a/testsuite/c_test/unit_test/UNIT0164-vrp-cvt/test.cfg b/testsuite/c_test/unit_test/UNIT0164-vrp-cvt/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..12276add4f3d98bc0bad2447fc23a652d1a88401 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0164-vrp-cvt/test.cfg @@ -0,0 +1,3 @@ +CO2: +compile(main) +run(main) diff --git a/testsuite/c_test/unit_test/UNIT0165-implicit_cvt_in_handlefunc/expected.txt b/testsuite/c_test/unit_test/UNIT0165-implicit_cvt_in_handlefunc/expected.txt new file mode 100644 index 0000000000000000000000000000000000000000..573541ac9702dd3969c9bc859d2b91ec1f7e6e56 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0165-implicit_cvt_in_handlefunc/expected.txt @@ -0,0 +1 @@ +0 diff --git a/testsuite/c_test/unit_test/UNIT0165-implicit_cvt_in_handlefunc/main.c b/testsuite/c_test/unit_test/UNIT0165-implicit_cvt_in_handlefunc/main.c new file mode 100644 index 0000000000000000000000000000000000000000..b3ab497ffe22617763c1589f95f977df62e94aeb --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0165-implicit_cvt_in_handlefunc/main.c @@ -0,0 +1,7 @@ +char a[] = {255}; +int main() { + char *b = &a[0]; + a[0] && ++*b; + printf("%d\n", a[0]); + return 0; +} diff --git a/testsuite/c_test/unit_test/UNIT0165-implicit_cvt_in_handlefunc/test.cfg b/testsuite/c_test/unit_test/UNIT0165-implicit_cvt_in_handlefunc/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..bfd783d51c73c319ed8c9f8d161f2083af99fe63 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0165-implicit_cvt_in_handlefunc/test.cfg @@ -0,0 +1,2 @@ +compile(main) +run(main) diff --git a/testsuite/c_test/unit_test/UNIT0166-add-cmp-zero-sideeffect-condition/expected.txt b/testsuite/c_test/unit_test/UNIT0166-add-cmp-zero-sideeffect-condition/expected.txt new file mode 100644 index 0000000000000000000000000000000000000000..573541ac9702dd3969c9bc859d2b91ec1f7e6e56 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0166-add-cmp-zero-sideeffect-condition/expected.txt @@ -0,0 +1 @@ +0 diff --git a/testsuite/c_test/unit_test/UNIT0166-add-cmp-zero-sideeffect-condition/main.c b/testsuite/c_test/unit_test/UNIT0166-add-cmp-zero-sideeffect-condition/main.c new file mode 100644 index 0000000000000000000000000000000000000000..c682fc94ce9441aa61f787d919c4cbcdf219ef2f --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0166-add-cmp-zero-sideeffect-condition/main.c @@ -0,0 +1,20 @@ +int printf(const char *, ...); +int a, b, d, c, g; +int e[]; +int *h(); +void i() { + int *f = &e[2]; + h(f); + *f = f == 0; +} +int *h() { + for (;; d++) { + for (; b > -14; b--) + ; + return &g; + } +} +int main() { + i(); + printf("%d\n", a); +} diff --git a/testsuite/c_test/unit_test/UNIT0166-add-cmp-zero-sideeffect-condition/test.cfg b/testsuite/c_test/unit_test/UNIT0166-add-cmp-zero-sideeffect-condition/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..bfd783d51c73c319ed8c9f8d161f2083af99fe63 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0166-add-cmp-zero-sideeffect-condition/test.cfg @@ -0,0 +1,2 @@ +compile(main) +run(main) diff --git a/testsuite/c_test/unit_test/UNIT0167-global-opt-extend/driver.c b/testsuite/c_test/unit_test/UNIT0167-global-opt-extend/driver.c new file mode 100644 index 0000000000000000000000000000000000000000..e25f6b1fafc31dc1766f38e4f861ae592ada40e1 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0167-global-opt-extend/driver.c @@ -0,0 +1,32 @@ +#include + +signed char var_4 = (signed char)19; +long long int var_12 = -6387642471029973383LL; +unsigned long long int var_14 = 1142716087604872716ULL; +signed char var_16 = (signed char)81; +unsigned int var_26 = 3123253222U; +unsigned int arr_33[18][23]; +unsigned int arr_34[18][23]; +unsigned long long int arr_330[15]; + +void init() { + for (size_t i_0 = 0; i_0 < 18; ++i_0) + for (size_t i_1 = 0; i_1 < 23; ++i_1) + arr_33[i_0][i_1] = 1995976896U; + for (size_t i_0 = 0; i_0 < 18; ++i_0) + for (size_t i_1 = 0; i_1 < 23; ++i_1) + arr_34[i_0][i_1] = 730469611U; +} + +void test(signed char var_4, + long long int var_12, + unsigned long long int var_14, + signed char var_16, + unsigned int arr_33[18][23], + unsigned int arr_34[18][23]); + +int main() { + init(); + test(var_4, var_12, var_14, var_16, arr_33, arr_34); + printf("%llu\n", var_26); +} diff --git a/testsuite/c_test/unit_test/UNIT0167-global-opt-extend/expected.txt b/testsuite/c_test/unit_test/UNIT0167-global-opt-extend/expected.txt new file mode 100644 index 0000000000000000000000000000000000000000..d00491fd7e5bb6fa28c517a0bb32b8b506539d4d --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0167-global-opt-extend/expected.txt @@ -0,0 +1 @@ +1 diff --git a/testsuite/c_test/unit_test/UNIT0167-global-opt-extend/func.c b/testsuite/c_test/unit_test/UNIT0167-global-opt-extend/func.c new file mode 100644 index 0000000000000000000000000000000000000000..9202d2fc3a77222cccac9589aa83820785aa2817 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0167-global-opt-extend/func.c @@ -0,0 +1,33 @@ +#include "init.h" +#define max(a, b) \ + { \ + __typeof__(a) _a = a; \ + __typeof__(b) _b = b; \ + _a > _b; \ + } + +void test(signed char var_4, + long long int var_12, + unsigned long long int var_14, + signed char var_16, + unsigned int arr_33[][3], + unsigned int arr_34[][3]) { + for (unsigned long long int i_0 = 0; i_0 < 8; i_0 = 0 - 1) { + for (_Bool i_1 = 0; 0 < 0; i_1 = 0) + ; + for (int i_8 = 0; i_8 < (int)var_14 - 818939381; i_8 = var_12 - 0) + for (long long int i_9 = 0; i_9 < var_16 - 0; i_9 += var_4 - 0) + var_26 = (max(arr_34[i_0][i_8], + (unsigned long long int)(arr_33[i_0][i_8] + << 15200166479656428611 - + 15200166479656428583))); + for (long long int i_12 = 0; 0 < 0; i_12 = 3) + for (short i_14 = 0; 0 < 0; i_14 = 1) + ; + } + for (long long int i_24 = 0; 0 < 0; i_24 = 0) + for (unsigned short i_42 = 0; 0 < 9; i_42 = 0) + for (_Bool i_58 = 1; 1 < 0; i_58 = 0) + for (unsigned long long int i_59 = 0; 0 < 0; i_59 = 0) + ; +} diff --git a/testsuite/c_test/unit_test/UNIT0167-global-opt-extend/init.h b/testsuite/c_test/unit_test/UNIT0167-global-opt-extend/init.h new file mode 100644 index 0000000000000000000000000000000000000000..7618391484095b21687cb0a7f4d394ba8504eb5a --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0167-global-opt-extend/init.h @@ -0,0 +1,243 @@ +extern short var_19; +extern short var_20; +extern unsigned long long int var_21; +extern signed char var_22; +extern unsigned long long int var_23; +extern signed char var_24; +extern unsigned long long int var_25; +extern unsigned int var_26; +extern long long int var_27; +extern short var_28; +extern unsigned short var_29; +extern unsigned char var_30; +extern __thread signed char var_31; +extern signed char var_32; +extern unsigned long long int var_33; +extern unsigned short var_34; +extern __thread unsigned short var_35; +extern short var_36; +extern unsigned long long int var_37; +extern int var_38; +extern int var_39; +extern _Bool var_40; +extern unsigned int var_41; +extern signed char var_42; +extern unsigned char var_43; +extern __thread long long int var_44; +extern unsigned int var_45; +extern unsigned char var_46; +extern unsigned char var_47; +extern unsigned long long int var_48; +extern _Bool var_49; +extern _Bool var_50; +extern unsigned short var_51; +extern unsigned short var_52; +extern long long int var_53; +extern unsigned char var_54; +extern short var_55; +extern unsigned long long int var_56; +extern unsigned char var_57; +extern _Bool var_58; +extern unsigned long long int var_59; +extern _Bool var_60; +extern unsigned char var_61; +extern int var_62; +extern signed char var_63; +extern signed char var_64; +extern unsigned char var_65; +extern long long int var_66; +extern _Bool var_67; +extern __thread int var_68; +extern unsigned int var_69; +extern signed char var_70; +extern _Bool var_71; +extern __thread short var_72; +extern long long int var_73; +extern unsigned short var_74; +extern short var_75; +extern __thread int var_76; +extern unsigned short var_77; +extern unsigned long long int var_78; +extern unsigned int var_79; +extern unsigned int var_80; +extern signed char var_81; +extern short var_82; +extern unsigned short var_83; +extern int var_84; +extern unsigned char var_85; +extern unsigned int var_86; +extern int var_87; +extern unsigned long long int var_88; +extern unsigned char var_89; +extern unsigned long long int var_90; +extern _Bool var_91; +extern unsigned int var_92; +extern unsigned short var_93; +extern long long int var_94; +extern short var_95; +extern int var_96; +extern _Bool var_97; +extern __thread unsigned int var_98; +extern unsigned char var_99; +extern unsigned int var_100; +extern signed char var_101; +extern unsigned short var_102; +extern short var_103; +extern short var_104; +extern unsigned int var_105; +extern signed char var_106; +extern signed char var_107; +extern unsigned long long int var_108; +extern short var_109; +extern __thread _Bool var_110; +extern _Bool var_111; +extern int var_112; +extern short var_113; +extern unsigned long long int var_114; +extern long long int var_115; +extern unsigned long long int var_116; +extern unsigned int var_117; +extern unsigned int var_118; +extern long long int var_119; +extern __thread int var_120; +extern unsigned long long int var_121; +extern long long int var_122; +extern signed char var_123; +extern int var_124; +extern int var_125; +extern _Bool var_126; +extern unsigned short var_127; +extern int var_128; +extern unsigned short var_129; +extern signed char var_130; +extern unsigned int var_131; +extern __thread _Bool var_132; +extern signed char var_133; +extern _Bool var_134; +extern _Bool var_135; +extern short var_136; +extern unsigned short var_137; +extern signed char var_138; +extern __thread unsigned short var_139; +extern unsigned long long int var_140; +extern unsigned long long int var_141; +extern signed char var_142; +extern unsigned long long int arr_2 [18] ; +extern unsigned long long int arr_3 [18] ; +extern unsigned long long int arr_7 [18] [14] ; +extern int arr_10 [18] [14] [11] ; +extern int arr_11 [18] [14] [11] ; +extern int arr_15 [18] [14] [11] [25] ; +extern unsigned long long int arr_20 [18] [14] [11] [11] [19] ; +extern short arr_21 [18] [14] [11] [11] [19] ; +extern signed char arr_22 [18] [14] [11] [11] ; +extern long long int arr_23 [18] [14] [11] [11] ; +extern long long int arr_24 [18] [14] [11] [11] ; +extern unsigned char arr_28 [18] [14] [11] [15] ; +extern int arr_29 [18] [14] [11] [15] ; +extern _Bool arr_32 [18] [14] [12] ; +extern _Bool arr_44 [18] [23] [17] [14] [22] ; +extern _Bool arr_45 [18] [23] [17] [14] [22] ; +extern int arr_46 [18] [23] [17] [14] [22] ; +extern int arr_47 [18] [23] [17] [14] [22] ; +extern unsigned short arr_48 [18] [23] [17] [14] [22] ; +extern unsigned long long int arr_49 [18] [23] [17] [14] [22] ; +extern unsigned int arr_50 [18] [23] [17] [14] [22] ; +extern _Bool arr_59 [18] [14] ; +extern signed char arr_68 [18] [14] [15] [20] [22] ; +extern short arr_71 [18] [14] [15] [23] ; +extern long long int arr_74 [18] [14] [15] [23] [24] ; +extern int arr_78 [18] [14] [15] [23] [22] ; +extern signed char arr_79 [18] [14] [15] [23] [22] ; +extern long long int arr_80 [18] [14] [15] [23] ; +extern short arr_83 [18] [14] [18] ; +extern signed char arr_84 [18] [14] [18] ; +extern signed char arr_85 [18] [14] [18] ; +extern unsigned long long int arr_89 [18] [20] ; +extern _Bool arr_90 [18] [20] ; +extern unsigned char arr_94 [21] ; +extern signed char arr_95 [21] ; +extern long long int arr_107 [23] [19] [24] [11] ; +extern unsigned char arr_108 [23] [19] [24] ; +extern signed char arr_113 [23] [19] [24] [23] [13] ; +extern unsigned char arr_114 [23] [19] [24] [23] [13] ; +extern signed char arr_115 [23] [19] [24] [23] [13] ; +extern signed char arr_116 [23] ; +extern signed char arr_121 [23] [12] ; +extern signed char arr_122 [23] [12] ; +extern short arr_125 [23] [19] ; +extern short arr_126 [23] [19] ; +extern unsigned long long int arr_127 [23] [19] ; +extern signed char arr_140 [23] [19] [18] [18] [25] ; +extern unsigned int arr_141 [23] [19] [18] [18] [25] ; +extern int arr_145 [23] [19] [18] [18] [21] ; +extern _Bool arr_146 [23] [19] [18] [18] [21] ; +extern unsigned int arr_147 [23] [19] [18] [18] [21] ; +extern unsigned char arr_150 [23] [19] [18] [23] ; +extern unsigned int arr_154 [23] [19] [18] [23] [22] ; +extern short arr_155 [23] [19] [18] [23] ; +extern unsigned long long int arr_156 [23] [19] [18] [23] ; +extern unsigned char arr_159 [23] [19] [18] [12] ; +extern int arr_162 [23] [20] ; +extern unsigned long long int arr_165 [21] ; +extern short arr_168 [19] ; +extern long long int arr_174 [19] [14] [22] ; +extern unsigned char arr_184 [19] [19] [15] [13] ; +extern unsigned long long int arr_185 [19] [19] [15] [13] ; +extern unsigned char arr_186 [19] [19] [15] [13] ; +extern unsigned char arr_187 [19] [19] [15] [13] ; +extern signed char arr_195 [19] [19] [15] [18] [17] ; +extern long long int arr_196 [19] [19] [15] [18] [17] ; +extern int arr_200 [19] [19] [15] [18] [14] ; +extern unsigned long long int arr_203 [19] [19] [15] [18] [10] ; +extern unsigned char arr_206 [19] [24] ; +extern _Bool arr_207 [19] [24] ; +extern unsigned short arr_214 [19] [20] [19] [12] ; +extern short arr_215 [19] [20] ; +extern unsigned char arr_218 [16] ; +extern signed char arr_222 [15] ; +extern int arr_232 [15] [15] [20] [25] ; +extern unsigned int arr_235 [15] [15] [20] [15] ; +extern unsigned short arr_240 [15] [15] [20] [12] [14] ; +extern long long int arr_241 [15] [15] [20] [12] [14] ; +extern unsigned long long int arr_242 [15] [15] [20] [12] [14] ; +extern long long int arr_243 [15] [15] [20] [12] [14] ; +extern unsigned short arr_244 [15] [15] [20] [12] [14] ; +extern long long int arr_245 [15] [15] [20] [12] [14] ; +extern unsigned short arr_246 [15] [15] [20] [12] [14] ; +extern unsigned short arr_247 [15] [15] [20] [12] [14] ; +extern unsigned short arr_248 [15] [15] [20] [12] [14] ; +extern long long int arr_251 [15] [15] [20] [12] [21] ; +extern long long int arr_252 [15] [15] [20] [12] [21] ; +extern _Bool arr_253 [15] [15] [20] [12] [21] ; +extern signed char arr_256 [15] [15] [20] [12] [19] ; +extern unsigned int arr_257 [15] [15] [20] [12] ; +extern _Bool arr_260 [15] [15] [20] [12] [20] ; +extern _Bool arr_265 [15] [15] [13] ; +extern _Bool arr_266 [15] [15] [13] ; +extern short arr_270 [15] [15] [16] ; +extern unsigned long long int arr_276 [15] [15] [16] [10] ; +extern unsigned long long int arr_280 [15] [15] [19] ; +extern unsigned int arr_283 [15] [15] [19] [13] ; +extern unsigned char arr_284 [15] [15] [19] [13] ; +extern unsigned int arr_285 [15] [15] [19] [13] ; +extern unsigned long long int arr_286 [15] [15] [19] [13] ; +extern signed char arr_292 [15] [15] [19] [23] [12] ; +extern unsigned short arr_293 [15] [15] [19] [23] [12] ; +extern unsigned int arr_294 [15] [15] [19] [23] [12] ; +extern short arr_297 [15] [15] [19] [10] ; +extern unsigned int arr_307 [15] [15] [19] [10] [19] ; +extern short arr_308 [15] [15] [19] [10] [19] ; +extern unsigned char arr_314 [15] [15] [19] [22] [24] ; +extern long long int arr_315 [15] [15] [19] [22] [24] ; +extern unsigned long long int arr_316 [15] [15] [19] [22] [24] ; +extern signed char arr_321 [15] [15] [19] [22] [12] ; +extern unsigned int arr_322 [15] [15] [19] [22] [12] ; +extern short arr_323 [15] [15] [19] [22] [12] ; +extern unsigned int arr_324 [15] [15] [19] [22] [12] ; +extern unsigned char arr_325 [15] [15] [19] [22] ; +extern short arr_326 [15] [15] ; +extern signed char arr_327 [15] [15] ; +extern int arr_328 [15] [15] ; +extern long long int arr_329 [15] [15] ; +extern unsigned long long int arr_330 [15] ; diff --git a/testsuite/c_test/unit_test/UNIT0167-global-opt-extend/test.cfg b/testsuite/c_test/unit_test/UNIT0167-global-opt-extend/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..8f690781ad09c0e1cd8a956d6eb04c422a63d726 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0167-global-opt-extend/test.cfg @@ -0,0 +1,5 @@ +TEST_OS,TEST_O2: +generate_shared_lib(APP1=func,LIB=func) +compile(APP2=driver) +link(APP2=driver,LIB=func) +run() diff --git a/testsuite/c_test/unit_test/UNIT0167-ivopt-suboverflowcheck/expected.txt b/testsuite/c_test/unit_test/UNIT0167-ivopt-suboverflowcheck/expected.txt new file mode 100644 index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391 diff --git a/testsuite/c_test/unit_test/UNIT0167-ivopt-suboverflowcheck/main.c b/testsuite/c_test/unit_test/UNIT0167-ivopt-suboverflowcheck/main.c new file mode 100644 index 0000000000000000000000000000000000000000..0c769cc10c2f015b4c7400269d7b84d110e55043 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0167-ivopt-suboverflowcheck/main.c @@ -0,0 +1,19 @@ +unsigned long long g = 0; + +__attribute__ ((noinline)) +void test() { + unsigned int a = 4294967290UL; // -8 + for (long long i = 0; i <= 500; i += 1) { + // do not change `a > -9` to `a - a_init > -9 - a_init` + g |= (a > -9); + a++; + } +} + +int main() { + test(); + if (g != 1) { + abort(); + } + return 0; +} diff --git a/testsuite/c_test/unit_test/UNIT0167-ivopt-suboverflowcheck/test.cfg b/testsuite/c_test/unit_test/UNIT0167-ivopt-suboverflowcheck/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..12276add4f3d98bc0bad2447fc23a652d1a88401 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0167-ivopt-suboverflowcheck/test.cfg @@ -0,0 +1,3 @@ +CO2: +compile(main) +run(main) diff --git a/testsuite/c_test/unit_test/UNIT0168-select_implicit_cvt/expected.txt b/testsuite/c_test/unit_test/UNIT0168-select_implicit_cvt/expected.txt new file mode 100644 index 0000000000000000000000000000000000000000..8539361c5cc2065c01bfea8980ef19672384b99f --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0168-select_implicit_cvt/expected.txt @@ -0,0 +1 @@ +18446744073709551612 diff --git a/testsuite/c_test/unit_test/UNIT0168-select_implicit_cvt/main.c b/testsuite/c_test/unit_test/UNIT0168-select_implicit_cvt/main.c new file mode 100644 index 0000000000000000000000000000000000000000..65d66537b16cc6fb83eedacda313be0366a89761 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0168-select_implicit_cvt/main.c @@ -0,0 +1,9 @@ +#include + +signed char b = -4; +int main() { + long long a = 0; + a = b ?: 0UL; + printf("%llu\n", a); + return 0; +} diff --git a/testsuite/c_test/unit_test/UNIT0168-select_implicit_cvt/test.cfg b/testsuite/c_test/unit_test/UNIT0168-select_implicit_cvt/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..bfd783d51c73c319ed8c9f8d161f2083af99fe63 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0168-select_implicit_cvt/test.cfg @@ -0,0 +1,2 @@ +compile(main) +run(main) diff --git a/testsuite/c_test/unit_test/UNIT0169-mesink-volatilerhs/expected.txt b/testsuite/c_test/unit_test/UNIT0169-mesink-volatilerhs/expected.txt new file mode 100644 index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391 diff --git a/testsuite/c_test/unit_test/UNIT0169-mesink-volatilerhs/main.c b/testsuite/c_test/unit_test/UNIT0169-mesink-volatilerhs/main.c new file mode 100644 index 0000000000000000000000000000000000000000..355d178bf5cf2ce1df380eec35d473b09dd16c79 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0169-mesink-volatilerhs/main.c @@ -0,0 +1,26 @@ +int g0 = 0; +int *g1 = &g0; +int **volatile g2 = &g1; + +__attribute__((noinline)) +int test(int cond) { + int l0; + int **l2; + if (cond) { + test(0); + l2 = &g1; + l0 = **g2; + *l2 = 0; + } else { + l2 = &g1; + l0 = **g2; + *l2 = 0; + } + // do not sink `l0 = **g2` to here + return l0; +} + +int main() { + test(0); + return 0; +} diff --git a/testsuite/c_test/unit_test/UNIT0169-mesink-volatilerhs/test.cfg b/testsuite/c_test/unit_test/UNIT0169-mesink-volatilerhs/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..12276add4f3d98bc0bad2447fc23a652d1a88401 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0169-mesink-volatilerhs/test.cfg @@ -0,0 +1,3 @@ +CO2: +compile(main) +run(main) diff --git a/testsuite/c_test/unit_test/UNIT0170-no-builtin-abs/expected.txt b/testsuite/c_test/unit_test/UNIT0170-no-builtin-abs/expected.txt new file mode 100644 index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391 diff --git a/testsuite/c_test/unit_test/UNIT0170-no-builtin-abs/main.c b/testsuite/c_test/unit_test/UNIT0170-no-builtin-abs/main.c new file mode 100644 index 0000000000000000000000000000000000000000..677af04ef2da1aab38e37ad0b0513ee5a65e97f4 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0170-no-builtin-abs/main.c @@ -0,0 +1,18 @@ +#include +#include +#include + +int g_x = 99; +int g_y = 99; + +__attribute_noinline__ int abs(int n) { + g_x = 0; + return g_x; +} + +int main(void) +{ + g_x = 1; + g_y = abs(3); + return g_x; +} diff --git a/testsuite/c_test/unit_test/UNIT0170-no-builtin-abs/test.cfg b/testsuite/c_test/unit_test/UNIT0170-no-builtin-abs/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..25696ac3c90f4bc01c96412cfe1e034584a111e2 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0170-no-builtin-abs/test.cfg @@ -0,0 +1,3 @@ +CO2: +${MAPLE_BUILD_OUTPUT}/bin/maple main.c -o main.out -Wno-error=int-conversion -fno-builtin --save-temps +run(main) diff --git a/testsuite/c_test/unit_test/UNIT0171-simplify-implicitcvt1/expected.txt b/testsuite/c_test/unit_test/UNIT0171-simplify-implicitcvt1/expected.txt new file mode 100644 index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391 diff --git a/testsuite/c_test/unit_test/UNIT0171-simplify-implicitcvt1/main.c b/testsuite/c_test/unit_test/UNIT0171-simplify-implicitcvt1/main.c new file mode 100644 index 0000000000000000000000000000000000000000..a6f70beb7784e5310bd1434a96343197e57ac6cd --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0171-simplify-implicitcvt1/main.c @@ -0,0 +1,13 @@ +unsigned short a; +int i; +int main() { + signed char c[] = {7, 7, 7, 7, 183}; + for (i = 0; i <= 4; i++) { + // do sign extension for c[i] here + a ^= c[i]; + } + if (a != 65463) { + abort(); + } + return 0; +} diff --git a/testsuite/c_test/unit_test/UNIT0171-simplify-implicitcvt1/test.cfg b/testsuite/c_test/unit_test/UNIT0171-simplify-implicitcvt1/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..12276add4f3d98bc0bad2447fc23a652d1a88401 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0171-simplify-implicitcvt1/test.cfg @@ -0,0 +1,3 @@ +CO2: +compile(main) +run(main) diff --git a/testsuite/c_test/unit_test/UNIT0171-tbz_del_edge/main.c b/testsuite/c_test/unit_test/UNIT0171-tbz_del_edge/main.c new file mode 100644 index 0000000000000000000000000000000000000000..7c8eea97cda59facf67637d7068191418458b9f6 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0171-tbz_del_edge/main.c @@ -0,0 +1,8 @@ +long a; +short b = 0; +unsigned long c; + +int main() { + (a ?: (b || (int)(-9223372036854775807LL - 1 & c)) % 0 || c); + return 0; +} \ No newline at end of file diff --git a/testsuite/c_test/unit_test/UNIT0171-tbz_del_edge/test.cfg b/testsuite/c_test/unit_test/UNIT0171-tbz_del_edge/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..6468d7fec1724c2c62ff77e5b234e77d24de8abc --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0171-tbz_del_edge/test.cfg @@ -0,0 +1 @@ +compile(main) \ No newline at end of file diff --git a/testsuite/c_test/unit_test/UNIT0172-implicit_cvt_in_handlefunc2/expected.txt b/testsuite/c_test/unit_test/UNIT0172-implicit_cvt_in_handlefunc2/expected.txt new file mode 100644 index 0000000000000000000000000000000000000000..8539361c5cc2065c01bfea8980ef19672384b99f --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0172-implicit_cvt_in_handlefunc2/expected.txt @@ -0,0 +1 @@ +18446744073709551612 diff --git a/testsuite/c_test/unit_test/UNIT0172-implicit_cvt_in_handlefunc2/main.c b/testsuite/c_test/unit_test/UNIT0172-implicit_cvt_in_handlefunc2/main.c new file mode 100644 index 0000000000000000000000000000000000000000..3a1993bf1f5ec11ca06b1638aa842e81390615d4 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0172-implicit_cvt_in_handlefunc2/main.c @@ -0,0 +1,16 @@ +#include + +typedef struct { + long a; + unsigned long b; +} S0; + +S0 c[1] = {0, 0}; + +signed char b = -4; +int main() { + long long a = 0; + a = b ?: c[0].b; + printf("%llu\n", a); + return 0; +} diff --git a/testsuite/c_test/unit_test/UNIT0172-implicit_cvt_in_handlefunc2/test.cfg b/testsuite/c_test/unit_test/UNIT0172-implicit_cvt_in_handlefunc2/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..bfd783d51c73c319ed8c9f8d161f2083af99fe63 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0172-implicit_cvt_in_handlefunc2/test.cfg @@ -0,0 +1,2 @@ +compile(main) +run(main) diff --git a/testsuite/c_test/unit_test/UNIT0172-objsize-last-field/expected.txt b/testsuite/c_test/unit_test/UNIT0172-objsize-last-field/expected.txt new file mode 100644 index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391 diff --git a/testsuite/c_test/unit_test/UNIT0172-objsize-last-field/main.c b/testsuite/c_test/unit_test/UNIT0172-objsize-last-field/main.c new file mode 100644 index 0000000000000000000000000000000000000000..9d0d86587064ec40aa2470329fd4687bbc61e353 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0172-objsize-last-field/main.c @@ -0,0 +1,28 @@ +/* { dg-do run } */ +/* { dg-options "-O2" } */ + +extern void abort (void); +extern char *strncpy(char *, const char *, __SIZE_TYPE__); + +union u { + struct { + char vi[8]; + char pi[16]; + }; + char all[8+16+4]; +}; + +void __attribute__((noinline,noclone)) +f(union u *u) +{ + char vi[8+1]; + __builtin_strncpy(vi, u->vi, sizeof(u->vi)); + if (__builtin_object_size (u->all, 1) != -1) + abort (); +} +int main() +{ + union u u; + f (&u); + return 0; +} diff --git a/testsuite/c_test/unit_test/UNIT0172-objsize-last-field/test.cfg b/testsuite/c_test/unit_test/UNIT0172-objsize-last-field/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..414c68f2cad9405add9d57b41a7fbd23765c0641 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0172-objsize-last-field/test.cfg @@ -0,0 +1,4 @@ +compile(main) +run(main) + +CO0: diff --git a/testsuite/c_test/unit_test/UNIT0173-vrp-loop1/expected.txt b/testsuite/c_test/unit_test/UNIT0173-vrp-loop1/expected.txt new file mode 100644 index 0000000000000000000000000000000000000000..0cfbf08886fca9a91cb753ec8734c84fcbe52c9f --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0173-vrp-loop1/expected.txt @@ -0,0 +1 @@ +2 diff --git a/testsuite/c_test/unit_test/UNIT0173-vrp-loop1/main.c b/testsuite/c_test/unit_test/UNIT0173-vrp-loop1/main.c new file mode 100644 index 0000000000000000000000000000000000000000..e483f049634a8402f3a0ed63e418e4316b4a9580 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0173-vrp-loop1/main.c @@ -0,0 +1,13 @@ +int printf(const char *, ...); +int a; +long b; +long *c = &b; +short(d)(e, f) { return e - f; } +int main() { + unsigned g = 4294967295; + a = 23; + for (; a > 5; a = d(a, 6)) + ++g; + *c = g; + printf("%d\n", (int)b); +} diff --git a/testsuite/c_test/unit_test/UNIT0173-vrp-loop1/test.cfg b/testsuite/c_test/unit_test/UNIT0173-vrp-loop1/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..bfd783d51c73c319ed8c9f8d161f2083af99fe63 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0173-vrp-loop1/test.cfg @@ -0,0 +1,2 @@ +compile(main) +run(main) diff --git a/testsuite/c_test/unit_test/UNIT0174-vrp-loop2/expected.txt b/testsuite/c_test/unit_test/UNIT0174-vrp-loop2/expected.txt new file mode 100644 index 0000000000000000000000000000000000000000..d00491fd7e5bb6fa28c517a0bb32b8b506539d4d --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0174-vrp-loop2/expected.txt @@ -0,0 +1 @@ +1 diff --git a/testsuite/c_test/unit_test/UNIT0174-vrp-loop2/main.c b/testsuite/c_test/unit_test/UNIT0174-vrp-loop2/main.c new file mode 100644 index 0000000000000000000000000000000000000000..f88c8d041046896e2c0d53c14124496ceb586e60 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0174-vrp-loop2/main.c @@ -0,0 +1,25 @@ +void printf(); +int a = 9, b, e, i, j; +int *volatile c = &b; +long d = 2; +long *f = &d; +unsigned long g; +unsigned char h; +unsigned long fn1(short p1) { + *f = p1; + return e; +} +int main() { + unsigned int k = 18446744073709551615; + for (i; i < 1; i++) + h = 0; + a = 0; + for (a; a <= 5; a++) { + *c = 0; + k++; + } + g = fn1(0 || k); + printf("%d\n", d); + for (j; j < 7; j++) + ; +} diff --git a/testsuite/c_test/unit_test/UNIT0174-vrp-loop2/test.cfg b/testsuite/c_test/unit_test/UNIT0174-vrp-loop2/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..bfd783d51c73c319ed8c9f8d161f2083af99fe63 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0174-vrp-loop2/test.cfg @@ -0,0 +1,2 @@ +compile(main) +run(main) diff --git a/testsuite/c_test/unit_test/UNIT0175-vrp-loop3/expected.txt b/testsuite/c_test/unit_test/UNIT0175-vrp-loop3/expected.txt new file mode 100644 index 0000000000000000000000000000000000000000..573541ac9702dd3969c9bc859d2b91ec1f7e6e56 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0175-vrp-loop3/expected.txt @@ -0,0 +1 @@ +0 diff --git a/testsuite/c_test/unit_test/UNIT0175-vrp-loop3/main.c b/testsuite/c_test/unit_test/UNIT0175-vrp-loop3/main.c new file mode 100644 index 0000000000000000000000000000000000000000..c084d05361a94e93340f9587f4730472b052f920 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0175-vrp-loop3/main.c @@ -0,0 +1,10 @@ +int printf(const char *, ...); +int b; +char a; +int main() { + unsigned d = 18446744073709551615; + for (; b != 5; ++b) + d++; + if (d) + printf("%d\n", a); +} diff --git a/testsuite/c_test/unit_test/UNIT0175-vrp-loop3/test.cfg b/testsuite/c_test/unit_test/UNIT0175-vrp-loop3/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..bfd783d51c73c319ed8c9f8d161f2083af99fe63 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0175-vrp-loop3/test.cfg @@ -0,0 +1,2 @@ +compile(main) +run(main) diff --git a/testsuite/c_test/unit_test/UNIT0177-ValidBitUxtw/expected.txt b/testsuite/c_test/unit_test/UNIT0177-ValidBitUxtw/expected.txt new file mode 100644 index 0000000000000000000000000000000000000000..ef2749553bb7dbe0d12dadb652fb5cd10a4f6e25 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0177-ValidBitUxtw/expected.txt @@ -0,0 +1 @@ +g_90 = 1 diff --git a/testsuite/c_test/unit_test/UNIT0177-ValidBitUxtw/main.c b/testsuite/c_test/unit_test/UNIT0177-ValidBitUxtw/main.c new file mode 100644 index 0000000000000000000000000000000000000000..4141076ad865a2ec74471b288ec68b7aa98f279a --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0177-ValidBitUxtw/main.c @@ -0,0 +1,26 @@ +#include + +__attribute__((noinline)) uint32_t safe_lshift_func_uint32_t_u_s(uint32_t left, + int right) { + return ((((int)right) < 0) || (((int)right) >= 32) || + (left > ((4294967295U) >> ((int)right)))) + ? ((left)) + : (left << ((int)right)); +} + +__attribute__((noinline)) int32_t safe_rshift_func_int32_t_s_s(int32_t left, + int right) { + return ((left < 0) || (((int)right) < 0) || (((int)right) >= 32)) + ? ((left)) + : (left >> ((int)right)); +} + +uint16_t g_158 = 0x0EB3L; + +int main() { + int g_90 = + safe_lshift_func_uint32_t_u_s( + safe_rshift_func_int32_t_s_s((~g_158) ^ 0x75FBD47FL, 1), 18) >= 0L; + printf("g_90 = %x\n", g_90); + return 0; +} diff --git a/testsuite/c_test/unit_test/UNIT0177-ValidBitUxtw/test.cfg b/testsuite/c_test/unit_test/UNIT0177-ValidBitUxtw/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..bfd783d51c73c319ed8c9f8d161f2083af99fe63 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0177-ValidBitUxtw/test.cfg @@ -0,0 +1,2 @@ +compile(main) +run(main) diff --git a/testsuite/c_test/unit_test/UNIT0178-UxthAndImm/expected.txt b/testsuite/c_test/unit_test/UNIT0178-UxthAndImm/expected.txt new file mode 100644 index 0000000000000000000000000000000000000000..0337343aea2e79f317b21a79c38f25ddfdf30f97 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0178-UxthAndImm/expected.txt @@ -0,0 +1 @@ +65456 diff --git a/testsuite/c_test/unit_test/UNIT0178-UxthAndImm/main.c b/testsuite/c_test/unit_test/UNIT0178-UxthAndImm/main.c new file mode 100644 index 0000000000000000000000000000000000000000..b31fda6f5dc6a1c34a4fa9fdf2b67b8d3aacd7db --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0178-UxthAndImm/main.c @@ -0,0 +1,8 @@ +signed char a = 69; +unsigned short b = 61034; + +int main() { + int c = -16 & (unsigned short)(~a | ~b); + printf("%d\n", c); + return 0; +} diff --git a/testsuite/c_test/unit_test/UNIT0178-UxthAndImm/test.cfg b/testsuite/c_test/unit_test/UNIT0178-UxthAndImm/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..bfd783d51c73c319ed8c9f8d161f2083af99fe63 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0178-UxthAndImm/test.cfg @@ -0,0 +1,2 @@ +compile(main) +run(main) diff --git a/testsuite/c_test/unit_test/UNIT0179-UxtwPhi/expected.txt b/testsuite/c_test/unit_test/UNIT0179-UxtwPhi/expected.txt new file mode 100644 index 0000000000000000000000000000000000000000..d00491fd7e5bb6fa28c517a0bb32b8b506539d4d --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0179-UxtwPhi/expected.txt @@ -0,0 +1 @@ +1 diff --git a/testsuite/c_test/unit_test/UNIT0179-UxtwPhi/main.c b/testsuite/c_test/unit_test/UNIT0179-UxtwPhi/main.c new file mode 100644 index 0000000000000000000000000000000000000000..992b113a9bd35aca2b3cc196f7fdef88495d91a8 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0179-UxtwPhi/main.c @@ -0,0 +1,12 @@ +int a = 1; +int b = 0; +long long c = 0xFFFF00000000; +int d = 0; + +int main() { + if (a ? c : b) { + d = 1; + } + printf("%d\n", d); + return 0; +} diff --git a/testsuite/c_test/unit_test/UNIT0179-UxtwPhi/test.cfg b/testsuite/c_test/unit_test/UNIT0179-UxtwPhi/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..bfd783d51c73c319ed8c9f8d161f2083af99fe63 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0179-UxtwPhi/test.cfg @@ -0,0 +1,2 @@ +compile(main) +run(main) diff --git a/testsuite/c_test/unit_test/UNIT0181-cmi1/expected.txt b/testsuite/c_test/unit_test/UNIT0181-cmi1/expected.txt new file mode 100644 index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391 diff --git a/testsuite/c_test/unit_test/UNIT0181-cmi1/main.c b/testsuite/c_test/unit_test/UNIT0181-cmi1/main.c new file mode 100644 index 0000000000000000000000000000000000000000..533c63bde6741445cf8ba1ad3011378bb5f235b5 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0181-cmi1/main.c @@ -0,0 +1,9 @@ +extern int shared_add(int a, int b); + +int main() { + // we say shared_add computes `param1 + param2` + if (shared_add(5, 2) != 7) { + abort(); + } + return 0; +} diff --git a/testsuite/c_test/unit_test/UNIT0181-cmi1/shared.c b/testsuite/c_test/unit_test/UNIT0181-cmi1/shared.c new file mode 100644 index 0000000000000000000000000000000000000000..134fd7a71377f862a1fdd994b8976c12b9b1c1e1 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0181-cmi1/shared.c @@ -0,0 +1,3 @@ +int shared_add(int a, int b) { + return a + b; +} diff --git a/testsuite/c_test/unit_test/UNIT0181-cmi1/test.cfg b/testsuite/c_test/unit_test/UNIT0181-cmi1/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..060aa1b18dfc8bd47bd5cc174f30d49a9da4a6cf --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0181-cmi1/test.cfg @@ -0,0 +1,4 @@ +CO2: +${MAPLE_BUILD_OUTPUT}/bin/maple -O2 shared.c -c -w -finline-mplt-dir=./ -fexport-inline-mplt +${MAPLE_BUILD_OUTPUT}/bin/maple -O2 main.c -o main.out -w -finline-mplt-dir=./ -fimport-inline-mplt +run(main) diff --git a/testsuite/c_test/unit_test/UNIT0182-cmi2/expected.txt b/testsuite/c_test/unit_test/UNIT0182-cmi2/expected.txt new file mode 100644 index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391 diff --git a/testsuite/c_test/unit_test/UNIT0182-cmi2/main.c b/testsuite/c_test/unit_test/UNIT0182-cmi2/main.c new file mode 100644 index 0000000000000000000000000000000000000000..732a07b186c4e58c789a2e5c0006997aa42749e2 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0182-cmi2/main.c @@ -0,0 +1,11 @@ +extern int shared_add(int a, int b); +extern int shared_sub(int a, int b); + +int main() { + // we say shared_add computes `param1 + param2` + // shared_sub computes `param1 - param2` + if (shared_add(5, 2) != 7 || shared_sub(5, 2) != 3) { + abort(); + } + return 0; +} diff --git a/testsuite/c_test/unit_test/UNIT0182-cmi2/shared_add/shared.c b/testsuite/c_test/unit_test/UNIT0182-cmi2/shared_add/shared.c new file mode 100644 index 0000000000000000000000000000000000000000..134fd7a71377f862a1fdd994b8976c12b9b1c1e1 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0182-cmi2/shared_add/shared.c @@ -0,0 +1,3 @@ +int shared_add(int a, int b) { + return a + b; +} diff --git a/testsuite/c_test/unit_test/UNIT0182-cmi2/shared_sub/shared.c b/testsuite/c_test/unit_test/UNIT0182-cmi2/shared_sub/shared.c new file mode 100644 index 0000000000000000000000000000000000000000..8287ccf820a3aeb45e96c2b2835d10eb74cf0dbf --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0182-cmi2/shared_sub/shared.c @@ -0,0 +1,3 @@ +int shared_sub(int a, int b) { + return a - b; +} diff --git a/testsuite/c_test/unit_test/UNIT0182-cmi2/test.cfg b/testsuite/c_test/unit_test/UNIT0182-cmi2/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..2268bd13df390ba802a981bc374f9d5ff21df8b1 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0182-cmi2/test.cfg @@ -0,0 +1,5 @@ +CO2: +${MAPLE_BUILD_OUTPUT}/bin/maple -O2 shared_add/shared.c -c -w -finline-mplt-dir=./ -fexport-inline-mplt +${MAPLE_BUILD_OUTPUT}/bin/maple -O2 shared_sub/shared.c -c -w -finline-mplt-dir=./ -fexport-inline-mplt +${MAPLE_BUILD_OUTPUT}/bin/maple -O2 main.c -o main.out -w -finline-mplt-dir=./ -fimport-inline-mplt +run(main) diff --git a/testsuite/c_test/unit_test/UNIT0183-simplify-signedoverflow/expected.txt b/testsuite/c_test/unit_test/UNIT0183-simplify-signedoverflow/expected.txt new file mode 100644 index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391 diff --git a/testsuite/c_test/unit_test/UNIT0183-simplify-signedoverflow/main.c b/testsuite/c_test/unit_test/UNIT0183-simplify-signedoverflow/main.c new file mode 100644 index 0000000000000000000000000000000000000000..c8fae77e33645762b929541fa53bee78bf1c30ec --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0183-simplify-signedoverflow/main.c @@ -0,0 +1,23 @@ +#define min(a, b) \ + { \ + __typeof__(a) _a = a; \ + __typeof__(b) _b = b; \ + _a < _b ? _a : _b; \ + } + +__attribute__ ((noinline)) +void test(long long *arr, long long *a, int cond, int start) { + // if you change the `(min(-2147483647 - 1, 0)) + 2147483647 + 2` compute order, + // you will see signed integer overflow which is undefined, and that may cause + // following optimizations get wrong results. + for (int i = start; i < cond; i += (min(-2147483647 - 1, 0)) + 2147483647 + 2) { + (*a) += arr[i]; + } +} + +int main() { + long long arr[50]; + long long res; + test(arr, &res, 50, 10); + return 0; +} diff --git a/testsuite/c_test/unit_test/UNIT0183-simplify-signedoverflow/test.cfg b/testsuite/c_test/unit_test/UNIT0183-simplify-signedoverflow/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..12276add4f3d98bc0bad2447fc23a652d1a88401 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0183-simplify-signedoverflow/test.cfg @@ -0,0 +1,3 @@ +CO2: +compile(main) +run(main) diff --git a/testsuite/c_test/unit_test/UNIT0184-cf-negcase/expected.txt b/testsuite/c_test/unit_test/UNIT0184-cf-negcase/expected.txt new file mode 100644 index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391 diff --git a/testsuite/c_test/unit_test/UNIT0184-cf-negcase/main.c b/testsuite/c_test/unit_test/UNIT0184-cf-negcase/main.c new file mode 100644 index 0000000000000000000000000000000000000000..3839beaf443baa73c998cdf8d5befdd8dd845d17 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0184-cf-negcase/main.c @@ -0,0 +1,20 @@ +int t; +int check; + +__attribute__ ((noinline)) +void foo(long long x) { + int a = 0; + if (0) {} + else { + // check here + check = -((long long)((int)x == 0) == (long long)(a / t)); + } +} + +int main() { + foo(3); + if (check != -1) { + abort(); + } + return 0; +} diff --git a/testsuite/c_test/unit_test/UNIT0184-cf-negcase/test.cfg b/testsuite/c_test/unit_test/UNIT0184-cf-negcase/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..12276add4f3d98bc0bad2447fc23a652d1a88401 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0184-cf-negcase/test.cfg @@ -0,0 +1,3 @@ +CO2: +compile(main) +run(main) diff --git a/testsuite/c_test/unit_test/UNIT0184-cgpeephole-RevCbzToCbzPattern/expected.txt b/testsuite/c_test/unit_test/UNIT0184-cgpeephole-RevCbzToCbzPattern/expected.txt new file mode 100644 index 0000000000000000000000000000000000000000..5e940b13f25c30918399c80a46cf7bfa175bee7f --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0184-cgpeephole-RevCbzToCbzPattern/expected.txt @@ -0,0 +1,4 @@ +case1 right +case2 right +case3 right +case4 right diff --git a/testsuite/c_test/unit_test/UNIT0184-cgpeephole-RevCbzToCbzPattern/main.c b/testsuite/c_test/unit_test/UNIT0184-cgpeephole-RevCbzToCbzPattern/main.c new file mode 100644 index 0000000000000000000000000000000000000000..5ef02f817f1f3fb4f0383ed87f69c8836829e45b --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0184-cgpeephole-RevCbzToCbzPattern/main.c @@ -0,0 +1,77 @@ +#include + +struct Header { + unsigned short a; + unsigned short b; +} header; + +int test1() { + // CHECK-NOT: rev16 + // CHECK: and{{.*}}#4280287007 + unsigned short n = ((header.a & (0xFF00)) >> 8) | ((header.a & (0x00FF)) << 8); + if (n & 0x1FFF) { + printf("case1 right\n"); + } else { + printf("case1 wrong\n"); + } + + return 0; +} + +int test2(unsigned int n) { + // CHECK-NOT: rev + // CHECK: and{{.*}}#4282384191 + // CHECK: eor{{.*}}#4282384191 + // CHECK: orr{{.*}}#4282384191 + n = (((n & 0x000000FF) << 24) | ((n & 0x0000FF00) << 8) | + ((n & 0x00FF0000) >> 8) | ((n & 0xFF000000) >> 24)); + n &= 0x3FFF3FFF; + n ^= 0x3FFF3FFF; + n |= 0x3FFF3FFF; + if (n) { + printf("case2 right\n"); + } else { + printf("case2 wrong\n"); + } + + return 0; +} + +int test3(unsigned long long n) { + // CHECK-NOT: rev + // CHECK: and{{.*}}#6148914691236517205 + n = (((n & 0x00000000000000FF) << 56) | ((n & 0x000000000000FF00) << 40) | + ((n & 0x0000000000FF0000) << 24) | ((n & 0x00000000FF000000) << 8) | + ((n & 0x000000FF00000000) >> 8) | ((n & 0x0000FF0000000000) >> 24) | + ((n & 0x00FF000000000000) >> 40) | ((n & 0xFF00000000000000) >> 56)); + n &= 0x5555555555555555ULL; + if (n) { + printf("case3 right\n"); + } else { + printf("case3 wrong\n"); + } + + return 0; +} + +int test4() { + // CHECK-NOT: rev16 + // CHECK: cmp{{.*}}#8 + // CHECK: beq{{.*}} + if (((((header.b & (0xFF00)) >> 8) | ((header.b & (0x00FF)) << 8))) != 0x0800) { + printf("case4 right\n"); + } else { + printf("case4 wrong\n"); + } + + return 0; +} + +int main() { + header.a = 0x00FF; + header.b = 0xFF00; + test1(); + test2(0x00FF00FF); + test3(0x00FF00FF); + test4(); +} diff --git a/testsuite/c_test/unit_test/UNIT0184-cgpeephole-RevCbzToCbzPattern/test.cfg b/testsuite/c_test/unit_test/UNIT0184-cgpeephole-RevCbzToCbzPattern/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..462449fc27fbc61b85816933ad260313705db367 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0184-cgpeephole-RevCbzToCbzPattern/test.cfg @@ -0,0 +1,4 @@ +CO2: +compile(APP="main",option="--save-temps") +cat main.s | ${MAPLE_ROOT}/tools/bin/FileCheck main.c +run(main) \ No newline at end of file diff --git a/testsuite/c_test/unit_test/UNIT0184-symbol-interinterposition/main.c b/testsuite/c_test/unit_test/UNIT0184-symbol-interinterposition/main.c new file mode 100644 index 0000000000000000000000000000000000000000..aea62e3cdd1c19d99cc41760236acf9b32eae55c --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0184-symbol-interinterposition/main.c @@ -0,0 +1,9 @@ +__attribute__((noinline)) int foo(__attribute__((unused)) int a){ + return 1; +} + +int main(){ + // CHECK: {{^ mov w0, #3}} + int a = 3; + return foo(a); +} diff --git a/testsuite/c_test/unit_test/UNIT0184-symbol-interinterposition/test.cfg b/testsuite/c_test/unit_test/UNIT0184-symbol-interinterposition/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..339fc88a0eb51028cf8993ab31b0503787d81342 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0184-symbol-interinterposition/test.cfg @@ -0,0 +1,3 @@ +CO2: +${MAPLE_BUILD_OUTPUT}/bin/maple -fPIC -O2 -S main.c --mpl2mpl-opt="--symbol-interposition" +cat main.s | ${MAPLE_ROOT}/tools/bin/FileCheck main.c diff --git a/testsuite/c_test/unit_test/UNIT0185-CmpAndShift/expected.txt b/testsuite/c_test/unit_test/UNIT0185-CmpAndShift/expected.txt new file mode 100644 index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391 diff --git a/testsuite/c_test/unit_test/UNIT0185-CmpAndShift/main.c b/testsuite/c_test/unit_test/UNIT0185-CmpAndShift/main.c new file mode 100644 index 0000000000000000000000000000000000000000..7b98cc0dd45f8dde140cc1d50fc97f4faaaae37a --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0185-CmpAndShift/main.c @@ -0,0 +1,10 @@ +#include +__attribute__((noinline)) int foo(uint64_t a){ + return (int)((a << 32) & 0xffffffffful) == 0; +} + +int main(){ + if(!foo(0xffffffffful)){ + __builtin_abort(); + } +} diff --git a/testsuite/c_test/unit_test/UNIT0185-CmpAndShift/test.cfg b/testsuite/c_test/unit_test/UNIT0185-CmpAndShift/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..bfd783d51c73c319ed8c9f8d161f2083af99fe63 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0185-CmpAndShift/test.cfg @@ -0,0 +1,2 @@ +compile(main) +run(main) diff --git a/testsuite/c_test/unit_test/UNIT0185-implicit_cvt_in_handlefunc3/expected.txt b/testsuite/c_test/unit_test/UNIT0185-implicit_cvt_in_handlefunc3/expected.txt new file mode 100644 index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391 diff --git a/testsuite/c_test/unit_test/UNIT0185-implicit_cvt_in_handlefunc3/main.c b/testsuite/c_test/unit_test/UNIT0185-implicit_cvt_in_handlefunc3/main.c new file mode 100644 index 0000000000000000000000000000000000000000..b28f6cb54cc4d1950fcf7d1e392a219fadc2b54c --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0185-implicit_cvt_in_handlefunc3/main.c @@ -0,0 +1,11 @@ +#include +char a[] = {255}; +int main() { + char *b = &a[0]; + a[0] && ++*b; + if (a[0] != 0) { + printf("%d\n", a[0]); + return 1; + } + return 0; +} diff --git a/testsuite/c_test/unit_test/UNIT0185-implicit_cvt_in_handlefunc3/test.cfg b/testsuite/c_test/unit_test/UNIT0185-implicit_cvt_in_handlefunc3/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..bfd783d51c73c319ed8c9f8d161f2083af99fe63 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0185-implicit_cvt_in_handlefunc3/test.cfg @@ -0,0 +1,2 @@ +compile(main) +run(main) diff --git a/testsuite/c_test/unit_test/UNIT0185-pseudo-ret-insn/expected.txt b/testsuite/c_test/unit_test/UNIT0185-pseudo-ret-insn/expected.txt new file mode 100644 index 0000000000000000000000000000000000000000..573541ac9702dd3969c9bc859d2b91ec1f7e6e56 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0185-pseudo-ret-insn/expected.txt @@ -0,0 +1 @@ +0 diff --git a/testsuite/c_test/unit_test/UNIT0185-pseudo-ret-insn/main.c b/testsuite/c_test/unit_test/UNIT0185-pseudo-ret-insn/main.c new file mode 100644 index 0000000000000000000000000000000000000000..a1b4e062c8d0497538aceda5c02e8fb9e50ab617 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0185-pseudo-ret-insn/main.c @@ -0,0 +1,26 @@ +#include + +char a, b = 6; + +struct c { + short d; + int e; + short f; +} g, h, *k = &h; + +volatile signed char *i = &b; +volatile signed char **j = &i; + +void(l)(m) { + m == 0 || a &&m == 1; +} + +struct c n() { + l(**j); + return g; +} + +int main() { + *k = n(); + printf("%d\n", h.f); +} diff --git a/testsuite/c_test/unit_test/UNIT0185-pseudo-ret-insn/test.cfg b/testsuite/c_test/unit_test/UNIT0185-pseudo-ret-insn/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..bfd783d51c73c319ed8c9f8d161f2083af99fe63 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0185-pseudo-ret-insn/test.cfg @@ -0,0 +1,2 @@ +compile(main) +run(main) diff --git a/testsuite/c_test/unit_test/UNIT0185-simplify-bitfield-with-different-type/expected.txt b/testsuite/c_test/unit_test/UNIT0185-simplify-bitfield-with-different-type/expected.txt new file mode 100644 index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391 diff --git a/testsuite/c_test/unit_test/UNIT0185-simplify-bitfield-with-different-type/main.c b/testsuite/c_test/unit_test/UNIT0185-simplify-bitfield-with-different-type/main.c new file mode 100644 index 0000000000000000000000000000000000000000..3c4779ffa2791c7000401e928001ce61b661fb01 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0185-simplify-bitfield-with-different-type/main.c @@ -0,0 +1,12 @@ +struct a { + int x; + int x1 : 31; + int x2 : 18; + int x3 : 14; +} g[4]; +int *g1 = &g[0].x; +int main() { + *(++g1) = 1; + g[0].x3 = 4; + return *g1 != 1; +} diff --git a/testsuite/c_test/unit_test/UNIT0185-simplify-bitfield-with-different-type/test.cfg b/testsuite/c_test/unit_test/UNIT0185-simplify-bitfield-with-different-type/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..bfd783d51c73c319ed8c9f8d161f2083af99fe63 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0185-simplify-bitfield-with-different-type/test.cfg @@ -0,0 +1,2 @@ +compile(main) +run(main) diff --git a/testsuite/c_test/unit_test/UNIT0185-vrp-compare_overflow/main.mpl b/testsuite/c_test/unit_test/UNIT0185-vrp-compare_overflow/main.mpl new file mode 100644 index 0000000000000000000000000000000000000000..32bd42f5873c23ed7bf8255522b281916a808319 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0185-vrp-compare_overflow/main.mpl @@ -0,0 +1,137 @@ +flavor 1 +srclang 1 +id 65535 +numfuncs 108 +entryfunc &main +fileinfo { + @INFO_filename "./main.ast"} +srcfileinfo { + 2 "/usr/lib/gcc-cross/aarch64-linux-gnu/5.5.0/../../../../aarch64-linux-gnu/include/bits/libio.h", + 3 "/usr/lib/gcc-cross/aarch64-linux-gnu/5.5.0/../../../../aarch64-linux-gnu/include/stdio.h", + 4 "/home/yangyi/maple/Maple/OpenArkCompiler/main.c", + 5 "/usr/lib/gcc-cross/aarch64-linux-gnu/5.5.0/../../../../aarch64-linux-gnu/include/bits/types.h", + 6 "/usr/lib/gcc-cross/aarch64-linux-gnu/5.5.0/../../../../aarch64-linux-gnu/include/bits/types/__mbstate_t.h", + 7 "/usr/lib/gcc-cross/aarch64-linux-gnu/5.5.0/../../../../aarch64-linux-gnu/include/bits/_G_config.h", + 8 "/usr/lib/gcc-cross/aarch64-linux-gnu/5.5.0/../../../../aarch64-linux-gnu/include/bits/sys_errlist.h"} +type $_IO_FILE , + @_IO_read_end <* u8>, + @_IO_read_base <* u8>, + @_IO_write_base <* u8>, + @_IO_write_ptr <* u8>, + @_IO_write_end <* u8>, + @_IO_buf_base <* u8>, + @_IO_buf_end <* u8>, + @_IO_save_base <* u8>, + @_IO_backup_base <* u8>, + @_IO_save_end <* u8>, + @_markers <* <$_IO_marker>>, + @_chain <* <$_IO_FILE>>, + @_fileno i32, + @_flags2 i32, + @_old_offset i64, + @_cur_column u16, + @_vtable_offset i8, + @_shortbuf <[1] u8>, + @_lock <* void>, + @_offset i64, + @__pad1 <* void>, + @__pad2 <* void>, + @__pad3 <* void>, + @__pad4 <* void>, + @__pad5 u64, + @_mode i32, + @_unused2 <[20] u8>}> +type $__va_list , + @__gr_top <* void>, + @__vr_top <* void>, + @__gr_offs i32, + @__vr_offs i32}> +type $_G_fpos_t }> +type $__fsid_t }> +type $_IO_marker >, + @_sbuf <* <$_IO_FILE>>, + @_pos i32}> +type $__mbstate_t }> +type $unnamed.74 }> +type $_G_fpos64_t }> +type $_IO_FILE_plus +LOC 2 389 12 +func &func public noinline (var %a i32 used, var %b u1 used, var %c i32 used, var %d i32 used, var %f u1 used) i32 +LOC 4 18 5 +func &main public () i32 +LOC 2 319 29 +var $_IO_2_1_stdin_ extern <$_IO_FILE_plus> +LOC 2 320 29 +var $_IO_2_1_stdout_ extern <$_IO_FILE_plus> +LOC 2 321 29 +var $_IO_2_1_stderr_ extern <$_IO_FILE_plus> +LOC 3 135 25 +var $stdin extern <* <$_IO_FILE>> +LOC 3 136 25 +var $stdout extern <* <$_IO_FILE>> +LOC 3 137 25 +var $stderr extern <* <$_IO_FILE>> +LOC 8 26 12 +var $sys_nerr extern i32 +LOC 8 27 26 +var $sys_errlist extern <[1] <* u8> incomplete_array> const +func &rand implicit public used () i32 +LOC 4 4 5 +func &func public noinline (var %a i32 used, var %b u1 used, var %c i32 used, var %d i32 used, var %f u1 used) i32 { + funcid 107 + funcinfo { + @INFO_fullname "func"} + +LOC 4 5 9 + var %e_5_9 u1 used + var %retVar_72 i32 + +LOC 4 6 7 + callassigned &rand () { dassign %retVar_72 0 } +LOC 4 6 3 + if (ne u1 i32 (dread i32 %retVar_72, constval i32 0)) { +LOC 4 7 7 + dassign %a 0 (dread i32 %c) +LOC 4 8 7 + dassign %e_5_9 0 (dread u32 %b) + } + else { +LOC 4 10 7 + dassign %a 0 (dread i32 %d) +LOC 4 11 7 + dassign %e_5_9 0 (dread u32 %f) + } +LOC 4 13 3 + # CHECK:cmp + if (lt u1 u1 ( + dread i32 %a, + dread u1 %e_5_9)) { +LOC 4 14 5 + return (constval i32 0) + } +LOC 4 16 3 + return (constval i32 1) +} +LOC 4 18 5 +func &main public () i32 { + funcid 108 + funcinfo { + @INFO_fullname "main"} + + +LOC 4 19 3 + return (constval i32 0) +} diff --git a/testsuite/c_test/unit_test/UNIT0185-vrp-compare_overflow/test.cfg b/testsuite/c_test/unit_test/UNIT0185-vrp-compare_overflow/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..8b1c81913efcdf2d6b6ed39531d6c858e2a4787f --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0185-vrp-compare_overflow/test.cfg @@ -0,0 +1,3 @@ +CO2: +$MAPLE_ROOT/output/aarch64-clang-release/bin/maple --run=me:mpl2mpl:mplcg --option="--quiet -O2: --quiet -O2: --quiet -O2" --debug --save-temps --quiet main.mpl +cat main.s | ${MAPLE_ROOT}/tools/bin/FileCheck main.mpl diff --git a/testsuite/c_test/unit_test/UNIT0186-isless/expected.txt b/testsuite/c_test/unit_test/UNIT0186-isless/expected.txt new file mode 100644 index 0000000000000000000000000000000000000000..405d33487754245da7df5c17c31d40c9e66879ba --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0186-isless/expected.txt @@ -0,0 +1,8 @@ +0 +0 +0 +0 +0 +0 +0 +0 diff --git a/testsuite/c_test/unit_test/UNIT0186-isless/main.c b/testsuite/c_test/unit_test/UNIT0186-isless/main.c new file mode 100644 index 0000000000000000000000000000000000000000..6e3d40e6273fffa6aaf10470658d14d6ff384082 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0186-isless/main.c @@ -0,0 +1,16 @@ + +#include +#include +int main () +{ + printf("%d\n", isless(1.0, NAN)); + printf("%d\n", islessequal(1.0, NAN)); + printf("%d\n", isgreater(1.0, NAN)); + printf("%d\n", isgreaterequal(1.0, NAN)); + printf("%d\n", isless(NAN, 1.0)); + printf("%d\n", islessequal(NAN, 1.0)); + printf("%d\n", isgreater(NAN, 1.0)); + printf("%d\n", isgreaterequal(NAN, 1.0)); + return 0; +} + diff --git a/testsuite/c_test/unit_test/UNIT0186-isless/test.cfg b/testsuite/c_test/unit_test/UNIT0186-isless/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..bfd783d51c73c319ed8c9f8d161f2083af99fe63 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0186-isless/test.cfg @@ -0,0 +1,2 @@ +compile(main) +run(main) diff --git a/testsuite/c_test/unit_test/UNIT0187-empty-parentheses-inline/expected.txt b/testsuite/c_test/unit_test/UNIT0187-empty-parentheses-inline/expected.txt new file mode 100644 index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391 diff --git a/testsuite/c_test/unit_test/UNIT0187-empty-parentheses-inline/main.c b/testsuite/c_test/unit_test/UNIT0187-empty-parentheses-inline/main.c new file mode 100644 index 0000000000000000000000000000000000000000..b9fb7918daf4af33f2b47c0d3557bcef7f1eec40 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0187-empty-parentheses-inline/main.c @@ -0,0 +1,18 @@ + +int i, j ,k; +long m(); +void n(); +int main() { + m(4); + return 0; +} +long m(p) { + n(i & j, k); + return 2015357946; +} +void n() { + int q, h; + q = 1; + h = 2; +} + diff --git a/testsuite/c_test/unit_test/UNIT0187-empty-parentheses-inline/test.cfg b/testsuite/c_test/unit_test/UNIT0187-empty-parentheses-inline/test.cfg new file mode 100644 index 0000000000000000000000000000000000000000..12276add4f3d98bc0bad2447fc23a652d1a88401 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0187-empty-parentheses-inline/test.cfg @@ -0,0 +1,3 @@ +CO2: +compile(main) +run(main) diff --git a/testsuite/driver/.config/aarch64-clang-debug.conf b/testsuite/driver/.config/aarch64-clang-debug.conf index aec4dd1a411ae644042873e040af5b87daa14d4f..ca62caa5a3f9ebc203d017f75e66a51412e391d7 100644 --- a/testsuite/driver/.config/aarch64-clang-debug.conf +++ b/testsuite/driver/.config/aarch64-clang-debug.conf @@ -50,9 +50,13 @@ c_test/unit_test/UNIT0110-prepeephole-verify-immopnd: DRIVER c_test/unit_test/UNIT0128-atomic-invalid-memorder: CO0, CO2 c_test/unit_test/UNIT0142-bugfix-ico: TEST_OS, TEST_O2 + c_test/unit_test/UNIT0161-ico-add-compare-mop: TEST_OS, TEST_O2 + c_test/unit_test/UNIT0162-ebo-CombineExtsionAndLoadPattern: TEST_OS, TEST_O2 c_test/unit_test/UNIT0151-struct_arg_copy_offset: CO0 c_test/unit_test/UNIT0152-struct_arg_copy_offset2: CO0 c_test/unit_test/UNIT0153-lower_bitfield_read: CO0, CO2, CMBCO2, FORTIFY_O2, FORTIFY_O1, COS + c_test/unit_test/UNIT0164-targetprop: TEST_O2, TEST_OS + c_test/unit_test/UNIT0167-global-opt-extend: TEST_O2, TEST_OS c_test/aapcs64_test: AAPCS64_O0, AAPCS64_O2 c_test/lto_test/LTO0001-OneHeadFile: LTOASTO0 c_test/lto_test/LTO0002-DiffCFile: LTOASTO0 @@ -70,7 +74,26 @@ c_test/sanity_test/SANITY0053-asan4: ASAN_O0 c_test/sanity_test/SANITY0054-asan5: ASAN_O0 c_test/sanity_test/SANITY0055-asan6: ASAN_O0 - + c_test/driver_test/DRIVER0040-lto-fpic: LTO_TEST + c_test/driver_test/DRIVER0041-lto-fnopic: LTO_TEST + c_test/driver_test/DRIVER0042-lto-O1O2: LTO_TEST + c_test/driver_test/DRIVER0043-lto-fpicfPIE: LTO_TEST + c_test/driver_test/DRIVER0044-lto-fpie: LTO_TEST + c_test/driver_test/DRIVER0045-lto-fno-pie: LTO_TEST + c_test/driver_test/DRIVER0046-lto-O1O2O1: LTO_TEST + c_test/driver_test/DRIVER0047-lto-fpicfpie: LTO_TEST + c_test/driver_test/DRIVER0048-lto-fPICfPIE: LTO_TEST + c_test/driver_test/DRIVER0049-lto-OsO3: LTO_TEST + c_test/driver_test/DRIVER0050-lto-OsO1: LTO_TEST + c_test/driver_test/DRIVER0051-lto_optFile: LTO_TEST + c_test/driver_test/DRIVER0054-lto-fakea: LTO_TEST + c_test/driver_test/DRIVER0055-lto-OnlyO1: LTO_TEST + c_test/driver_test/DRIVER0056-lto-nopie: LTO_TEST + c_test/driver_test/DRIVER0057-lto-nopie: LTO_TEST + c_test/driver_test/DRIVER0058-lto-nopie: LTO_TEST + c_test/driver_test/DRIVER0059-lto-nopie: LTO_TEST + c_test/driver_test/DRIVER0060-lto-fpic: LTO_TEST + c_test/driver_test/DRIVER0061-lto-fpic: LTO_TEST [BAN_TEST_SUITE] c_test/unit_test/UNIT0023-FORTIFY_O2_Strcpy: FORTIFY_O2 @@ -388,88 +411,19 @@ c_test/neon_test/NEON01388-vqtbx4q_s8: NEONO2,NEONO0 c_test/neon_test/NEON01389-vqtbx4_u8: NEONO2,NEONO0 c_test/neon_test/NEON01390-vqtbx4q_u8: NEONO2,NEONO0 - c_test/neon_test/NEON01591-vqdmlalh_lane_s16: NEONO0 - c_test/neon_test/NEON01592-vqdmlals_lane_s32: NEONO0 - c_test/neon_test/NEON01597-vqdmlalh_laneq_s16: NEONO0 - c_test/neon_test/NEON01598-vqdmlals_laneq_s32: NEONO0 - c_test/neon_test/NEON01603-vqdmlslh_lane_s16: NEONO0 - c_test/neon_test/NEON01604-vqdmlsls_lane_s32: NEONO0 - c_test/neon_test/NEON01609-vqdmlslh_laneq_s16: NEONO0 - c_test/neon_test/NEON01610-vqdmlsls_laneq_s32: NEONO0 - c_test/neon_test/NEON01630-vqdmullh_lane_s16: NEONO0 - c_test/neon_test/NEON01631-vqdmulls_lane_s32: NEONO0 - c_test/neon_test/NEON01636-vqdmullh_laneq_s16: NEONO0 - c_test/neon_test/NEON01637-vqdmulls_laneq_s32: NEONO0 - c_test/neon_test/NEON01648-vqdmulhh_lane_s16: NEONO0 - c_test/neon_test/NEON01649-vqdmulhs_lane_s32: NEONO0 - c_test/neon_test/NEON01654-vqdmulhh_laneq_s16: NEONO0 - c_test/neon_test/NEON01655-vqdmulhs_laneq_s32: NEONO0 - c_test/neon_test/NEON01664-vqrdmulhh_lane_s16: NEONO0 - c_test/neon_test/NEON01665-vqrdmulhs_lane_s32: NEONO0 - c_test/neon_test/NEON01670-vqrdmulhh_laneq_s16: NEONO0 - c_test/neon_test/NEON01671-vqrdmulhs_laneq_s32: NEONO0 - c_test/neon_test/NEON01890-vqshlb_n_s8: NEONO0 - c_test/neon_test/NEON01891-vqshlh_n_s16: NEONO0 - c_test/neon_test/NEON01892-vqshls_n_s32: NEONO0 - c_test/neon_test/NEON01893-vqshld_n_s64: NEONO0 - c_test/neon_test/NEON01894-vqshlb_n_u8: NEONO0 - c_test/neon_test/NEON01895-vqshlh_n_u16: NEONO0 - c_test/neon_test/NEON01896-vqshls_n_u32: NEONO0 - c_test/neon_test/NEON01897-vqshld_n_u64: NEONO0 - c_test/neon_test/NEON01906-vqshlub_n_s8: NEONO0 - c_test/neon_test/NEON01907-vqshluh_n_s16: NEONO0 - c_test/neon_test/NEON01908-vqshlus_n_s32: NEONO0 - c_test/neon_test/NEON01909-vqshlud_n_s64: NEONO0 - c_test/neon_test/NEON01980-vslid_n_s64: NEONO0 - c_test/neon_test/NEON01981-vslid_n_u64: NEONO0 - c_test/neon_test/NEON01996-vrshrd_n_s64: NEONO0 - c_test/neon_test/NEON01997-vrshrd_n_u64: NEONO0 - c_test/neon_test/NEON02012-vsrad_n_s64: NEONO0 - c_test/neon_test/NEON02013-vsrad_n_u64: NEONO0 - c_test/neon_test/NEON02028-vrsrad_n_s64: NEONO0 - c_test/neon_test/NEON02029-vrsrad_n_u64: NEONO0 - c_test/neon_test/NEON02045-vqshrunh_n_s16: NEONO0 - c_test/neon_test/NEON02046-vqshruns_n_s32: NEONO0 - c_test/neon_test/NEON02047-vqshrund_n_s64: NEONO0 - c_test/neon_test/NEON02057-vqshrnh_n_s16: NEONO0 - c_test/neon_test/NEON02058-vqshrns_n_s32: NEONO0 - c_test/neon_test/NEON02059-vqshrnd_n_s64: NEONO0 - c_test/neon_test/NEON02060-vqshrnh_n_u16: NEONO0 - c_test/neon_test/NEON02061-vqshrns_n_u32: NEONO0 - c_test/neon_test/NEON02062-vqshrnd_n_u64: NEONO0 - c_test/neon_test/NEON02072-vqrshrunh_n_s16: NEONO0 - c_test/neon_test/NEON02073-vqrshruns_n_s32: NEONO0 - c_test/neon_test/NEON02074-vqrshrund_n_s64: NEONO0 - c_test/neon_test/NEON02084-vqrshrnh_n_s16: NEONO0 - c_test/neon_test/NEON02085-vqrshrns_n_s32: NEONO0 - c_test/neon_test/NEON02086-vqrshrnd_n_s64: NEONO0 - c_test/neon_test/NEON02087-vqrshrnh_n_u16: NEONO0 - c_test/neon_test/NEON02088-vqrshrns_n_u32: NEONO0 - c_test/neon_test/NEON02089-vqrshrnd_n_u64: NEONO0 - c_test/neon_test/NEON02122-vsrid_n_s64: NEONO0 - c_test/neon_test/NEON02123-vsrid_n_u64: NEONO0 - - #libc_enhanced - c_test/driver_test/DRIVER0017-ftlsmodel-localdynamic: DRIVER - c_test/driver_test/DRIVER0018-ftlsmodel-initialexec: DRIVER #undefined reference to `inline_me' c_test/lto_test/LTO0033-gcc.dg-materialize-1: LTO_TEST - #O2 core dumped - c_test/lto_test/LTO0030-gcc.dg-ipacp: LTO_TEST - c_test/lto_test/LTO0031-gcc.dg-ipareference: LTO_TEST + #O2 core dumped, depends on the optimization capability c_test/lto_test/LTO0032-gcc.dg-ipareference2: LTO_TEST - #O3 core dumped + #O3 core dumped, unsupported inline assembly scenarios c_test/lto_test/LTO0028-gcc.dg-c-compatible-types-1: LTO_TEST #The function callmealias has unsupported attribute(s): alias c_test/lto_test/LTO0027-gcc.dg-attr-weakref-1: LTO_TEST - #undefined reference to `cabs' - c_test/lto_test/LTO0022-gcc.dg-20110201-1: LTO_TEST - #clang error function definition is not allowed here c_test/lto_test/LTO0037-gcc.dg-pr55703: LTO_TEST @@ -487,3 +441,5 @@ #struct unused bits have undefined value(undefined behavior) c_test/aapcs64_test/AAPCS0005-StructAlign: AAPCS64_O2 + #enable after fixed + c_test/unit_test/UNIT0184-cgpeephole-RevCbzToCbzPattern: CO2 diff --git a/testsuite/driver/.config/aarch64-clang-release.conf b/testsuite/driver/.config/aarch64-clang-release.conf index 4b3d633ebcaabb40fb8dd88cef894676a5f7cd69..57322470a7784fed50d36e7c310d7909bff2d0cf 100644 --- a/testsuite/driver/.config/aarch64-clang-release.conf +++ b/testsuite/driver/.config/aarch64-clang-release.conf @@ -13,7 +13,7 @@ c_test/enhancec_test: ENCO2_N_D, ENCO2_B_D, ENCO2_S_D, ENCO2_N_D_ALL, ENCO2_B_D_A_C c_test/sanity_test: c_common_mode_set c_test/gtorture_test: c_common_mode_set, co3_set - c_test/unit_test: CO2, CMBCO2, FORTIFY_O2, FORTIFY_O1, COS + c_test/unit_test: CO2, CMBCO2, FORTIFY_O2, FORTIFY_O1, COS, CO0 c_test/inline_test: CO0, CO2, COS c_test/noinline_test: CO2, ENCO2_N_D, CMBCO2 c_test/driver_test: c_driver_mode_set @@ -42,6 +42,8 @@ java_test/gconly_test: GC_O0, GC_O2 irbuild_test: IR c_test/ast_test/AST0138-InitListOptCheck: AST2MPL + c_test/ast_test/AST0144-Typedef: AST2MPL + c_test/ast_test/AST0084-PackedAttr: ASTO0, AST2MPL c_test/mplir_test: MPLIR c_test/neon_test: NEONO0, NEONO2 c_test/unit_test/UNIT0057-fieldoffset: CO0 @@ -63,11 +65,20 @@ c_test/unit_test/UNIT0128-atomic-invalid-memorder: CO0, CO2 c_test/unit_test/UNIT0129-string-func-for-FORTIFY-SOURCE-2: CO0 c_test/unit_test/UNIT0142-bugfix-ico: TEST_OS, TEST_O2 + c_test/unit_test/UNIT0161-ico-add-compare-mop: TEST_OS, TEST_O2 + c_test/unit_test/UNIT0162-ebo-CombineExtsionAndLoadPattern: TEST_OS, TEST_O2 c_test/unit_test/UNIT0138-always-sweep-static-symbol: CO0_GDB c_test/unit_test/UNIT0139-aarch64-abi-B6: CO0 + c_test/unit_test/UNIT0154-mirscope_for_StmtExpr: DRIVER c_test/unit_test/UNIT0151-agg_param_copy_offset: CO0 c_test/unit_test/UNIT0152-agg_param_copy_offset2: CO0 c_test/unit_test/UNIT0153-lower_bitfield_read: CO0, CO2, CMBCO2, FORTIFY_O2, FORTIFY_O1, COS + c_test/unit_test/UNIT0148-add-scope-boundary-condition:DRIVER + c_test/unit_test/UNIT0155-tls-warmup-func-no-debug-info: DRIVER + c_test/unit_test/UNIT0161-tls-val-no-debug-info: DRIVER + c_test/unit_test/UNIT0164-targetprop: TEST_O2, TEST_OS + c_test/unit_test/UNIT0166-add-cmp-zero-sideeffect-condition: CO2 + c_test/unit_test/UNIT0167-global-opt-extend: TEST_O2, TEST_OS c_test/aapcs64_test: AAPCS64_O0, AAPCS64_O2 c_test/lto_test/LTO0001-OneHeadFile: LTOASTO0 c_test/lto_test/LTO0002-DiffCFile: LTOASTO0 @@ -80,6 +91,26 @@ c_test/lto_test/LTO0009-TypedefStruct: LTOASTO0 c_test/lto_test/LTO0010-TypeDiffRecord: LTOASTO0 c_test/lto_test/LTO0101-SafeRegion: LTO_ENC + c_test/driver_test/DRIVER0040-lto-fpic: LTO_TEST + c_test/driver_test/DRIVER0041-lto-fnopic: LTO_TEST + c_test/driver_test/DRIVER0042-lto-O1O2: LTO_TEST + c_test/driver_test/DRIVER0043-lto-fpicfPIE: LTO_TEST + c_test/driver_test/DRIVER0044-lto-fpie: LTO_TEST + c_test/driver_test/DRIVER0045-lto-fno-pie: LTO_TEST + c_test/driver_test/DRIVER0046-lto-O1O2O1: LTO_TEST + c_test/driver_test/DRIVER0047-lto-fpicfpie: LTO_TEST + c_test/driver_test/DRIVER0048-lto-fPICfPIE: LTO_TEST + c_test/driver_test/DRIVER0049-lto-OsO3: LTO_TEST + c_test/driver_test/DRIVER0050-lto-OsO1: LTO_TEST + c_test/driver_test/DRIVER0051-lto_optFile: LTO_TEST + c_test/driver_test/DRIVER0054-lto-fakea: LTO_TEST + c_test/driver_test/DRIVER0055-lto-OnlyO1: LTO_TEST + c_test/driver_test/DRIVER0056-lto-nopie: LTO_TEST + c_test/driver_test/DRIVER0057-lto-nopie: LTO_TEST + c_test/driver_test/DRIVER0058-lto-nopie: LTO_TEST + c_test/driver_test/DRIVER0059-lto-nopie: LTO_TEST + c_test/driver_test/DRIVER0060-lto-fpic: LTO_TEST + c_test/driver_test/DRIVER0061-lto-fpic: LTO_TES [BAN_TEST_SUITE] java_test/compact_test/RT0194-rt-compact-AnnotationStaticFieldSetTest: GC_O0, GC_O2 @@ -1009,104 +1040,30 @@ c_test/neon_test/NEON01388-vqtbx4q_s8: NEONO2,NEONO0 c_test/neon_test/NEON01389-vqtbx4_u8: NEONO2,NEONO0 c_test/neon_test/NEON01390-vqtbx4q_u8: NEONO2,NEONO0 - c_test/neon_test/NEON01591-vqdmlalh_lane_s16: NEONO0 - c_test/neon_test/NEON01592-vqdmlals_lane_s32: NEONO0 - c_test/neon_test/NEON01597-vqdmlalh_laneq_s16: NEONO0 - c_test/neon_test/NEON01598-vqdmlals_laneq_s32: NEONO0 - c_test/neon_test/NEON01603-vqdmlslh_lane_s16: NEONO0 - c_test/neon_test/NEON01604-vqdmlsls_lane_s32: NEONO0 - c_test/neon_test/NEON01609-vqdmlslh_laneq_s16: NEONO0 - c_test/neon_test/NEON01610-vqdmlsls_laneq_s32: NEONO0 - c_test/neon_test/NEON01630-vqdmullh_lane_s16: NEONO0 - c_test/neon_test/NEON01631-vqdmulls_lane_s32: NEONO0 - c_test/neon_test/NEON01636-vqdmullh_laneq_s16: NEONO0 - c_test/neon_test/NEON01637-vqdmulls_laneq_s32: NEONO0 - c_test/neon_test/NEON01648-vqdmulhh_lane_s16: NEONO0 - c_test/neon_test/NEON01649-vqdmulhs_lane_s32: NEONO0 - c_test/neon_test/NEON01654-vqdmulhh_laneq_s16: NEONO0 - c_test/neon_test/NEON01655-vqdmulhs_laneq_s32: NEONO0 - c_test/neon_test/NEON01664-vqrdmulhh_lane_s16: NEONO0 - c_test/neon_test/NEON01665-vqrdmulhs_lane_s32: NEONO0 - c_test/neon_test/NEON01670-vqrdmulhh_laneq_s16: NEONO0 - c_test/neon_test/NEON01671-vqrdmulhs_laneq_s32: NEONO0 - c_test/neon_test/NEON01890-vqshlb_n_s8: NEONO0 - c_test/neon_test/NEON01891-vqshlh_n_s16: NEONO0 - c_test/neon_test/NEON01892-vqshls_n_s32: NEONO0 - c_test/neon_test/NEON01893-vqshld_n_s64: NEONO0 - c_test/neon_test/NEON01894-vqshlb_n_u8: NEONO0 - c_test/neon_test/NEON01895-vqshlh_n_u16: NEONO0 - c_test/neon_test/NEON01896-vqshls_n_u32: NEONO0 - c_test/neon_test/NEON01897-vqshld_n_u64: NEONO0 - c_test/neon_test/NEON01906-vqshlub_n_s8: NEONO0 - c_test/neon_test/NEON01907-vqshluh_n_s16: NEONO0 - c_test/neon_test/NEON01908-vqshlus_n_s32: NEONO0 - c_test/neon_test/NEON01909-vqshlud_n_s64: NEONO0 - c_test/neon_test/NEON01980-vslid_n_s64: NEONO0 - c_test/neon_test/NEON01981-vslid_n_u64: NEONO0 - c_test/neon_test/NEON01996-vrshrd_n_s64: NEONO0 - c_test/neon_test/NEON01997-vrshrd_n_u64: NEONO0 - c_test/neon_test/NEON02012-vsrad_n_s64: NEONO0 - c_test/neon_test/NEON02013-vsrad_n_u64: NEONO0 - c_test/neon_test/NEON02028-vrsrad_n_s64: NEONO0 - c_test/neon_test/NEON02029-vrsrad_n_u64: NEONO0 - c_test/neon_test/NEON02045-vqshrunh_n_s16: NEONO0 - c_test/neon_test/NEON02046-vqshruns_n_s32: NEONO0 - c_test/neon_test/NEON02047-vqshrund_n_s64: NEONO0 - c_test/neon_test/NEON02057-vqshrnh_n_s16: NEONO0 - c_test/neon_test/NEON02058-vqshrns_n_s32: NEONO0 - c_test/neon_test/NEON02059-vqshrnd_n_s64: NEONO0 - c_test/neon_test/NEON02060-vqshrnh_n_u16: NEONO0 - c_test/neon_test/NEON02061-vqshrns_n_u32: NEONO0 - c_test/neon_test/NEON02062-vqshrnd_n_u64: NEONO0 - c_test/neon_test/NEON02072-vqrshrunh_n_s16: NEONO0 - c_test/neon_test/NEON02073-vqrshruns_n_s32: NEONO0 - c_test/neon_test/NEON02074-vqrshrund_n_s64: NEONO0 - c_test/neon_test/NEON02084-vqrshrnh_n_s16: NEONO0 - c_test/neon_test/NEON02085-vqrshrns_n_s32: NEONO0 - c_test/neon_test/NEON02086-vqrshrnd_n_s64: NEONO0 - c_test/neon_test/NEON02087-vqrshrnh_n_u16: NEONO0 - c_test/neon_test/NEON02088-vqrshrns_n_u32: NEONO0 - c_test/neon_test/NEON02089-vqrshrnd_n_u64: NEONO0 - c_test/neon_test/NEON02122-vsrid_n_s64: NEONO0 - c_test/neon_test/NEON02123-vsrid_n_u64: NEONO0 - # will be add back when local dynamic is fully supported - c_test/driver_test/DRIVER0017-ftlsmodel-localdynamic: DRIVER - c_test/driver_test/DRIVER0018-ftlsmodel-initialexec: DRIVER #-boundary-check-dynamic --npe-check-dynamic - #driver me --quiet - c_test/enhancec_test/ENC0095-boundary_string: ENCO2_B_D - - #echo $? 47 - #cg compiler error c_test/gtorture_test/GCC01042-g.torture.execute-pr38533: CO0 #undefined reference to `inline_me' c_test/lto_test/LTO0033-gcc.dg-materialize-1: LTO_TEST - #O2 core dumped - c_test/lto_test/LTO0030-gcc.dg-ipacp: LTO_TEST - c_test/lto_test/LTO0031-gcc.dg-ipareference: LTO_TEST + #O2 core dumped, depends on the optimization capability c_test/lto_test/LTO0032-gcc.dg-ipareference2: LTO_TEST - #O3 core dumped + #O3 core dumped, unsupported inline assembly scenarios c_test/lto_test/LTO0028-gcc.dg-c-compatible-types-1: LTO_TEST #The function callmealias has unsupported attribute(s): alias c_test/lto_test/LTO0027-gcc.dg-attr-weakref-1: LTO_TEST - #undefined reference to `cabs' - c_test/lto_test/LTO0022-gcc.dg-20110201-1: LTO_TEST - #clang error function definition is not allowed here c_test/lto_test/LTO0037-gcc.dg-pr55703: LTO_TEST #result not same c_test/lto_test/LTO0098-gcc.dg-pr55525: LTO_TEST c_test/lto_test/LTO0100-gcc.dg-pr60449: LTO_TEST - c_test/lto_test/LTO0077-gcc.dg-20100227-1: LTO_TEST #unsupportedVarAttrs.empty() c_test/lto_test/LTO0096-gcc.dg-pr52634: LTO_TEST @@ -1118,18 +1075,6 @@ c_test/lto_test/LTO0074-gcc.dg-20091209-1: LTO_TEST c_test/lto_test/LTO0062-gcc.dg-20090706-1: LTO_TEST - #link error - c_test/lto_test/LTO0069-gcc.dg-20091006-1: LTO_TEST - c_test/lto_test/LTO0051-gcc.dg-20081201-1: LTO_TEST - c_test/lto_test/LTO0049-gcc.dg-20081118: LTO_TEST - c_test/lto_test/LTO0048-gcc.dg-20081115: LTO_TEST - - #compile error - c_test/lto_test/LTO0065-gcc.dg-20090729: LTO_TEST - - #core dumped - c_test/lto_test/LTO0057-gcc.dg-20090120: LTO_TEST - #relay on QEMU env c_test/driver_test/DRIVER0021-fnosemanticinterposition2: DRIVER @@ -1147,3 +1092,5 @@ #should not raise error c_test/unit_test/UNIT0023-FORTIFY_O2_Strcpy: FORTIFY_O2 + #enable after fixed + c_test/unit_test/UNIT0184-cgpeephole-RevCbzToCbzPattern: CO2 diff --git a/testsuite/driver/config b/testsuite/driver/config index 2ec2572c7eb97791c85771794a3eb7415f191a8b..7774cc3d5eb585dbe310eaba84b1e9dd3d2f6c6d 120000 --- a/testsuite/driver/config +++ b/testsuite/driver/config @@ -1 +1 @@ -.config \ No newline at end of file +/home/maple/workspace/OpenArkCompiler/testsuite/driver/.config \ No newline at end of file diff --git a/testsuite/driver/src/.mode/CO2_PIE.py b/testsuite/driver/src/.mode/CO2_PIE.py index 3595b8b09267068aa21ef83b725d6762846e56cb..e42f99c43395e6a369562edd7a5d63b2b486f509 100644 --- a/testsuite/driver/src/.mode/CO2_PIE.py +++ b/testsuite/driver/src/.mode/CO2_PIE.py @@ -17,72 +17,31 @@ from api import * CO2_PIE = { - "compile_main": [ - C2ast( - clang="${ENHANCED_CLANG_PATH}/bin/clang", - include_path=[ - "${MAPLE_BUILD_OUTPUT}/lib/include", - "${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc/usr/include", - "${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/lib/gcc/aarch64-linux-gnu/7.5.0/include", - "../lib/include" - ], - option="--target=aarch64 -U __SIZEOF_INT128__ -Wno-error=int-conversion", - infile="${APP}.c", - outfile="${APP}.ast" - ), - Hir2mpl( - hir2mpl="${MAPLE_BUILD_OUTPUT}/bin/hir2mpl", - infile="${APP}.ast", - outfile="${APP}.mpl" - ), - Maple( - maple="${MAPLE_BUILD_OUTPUT}/bin/maple", - run=["me", "mpl2mpl", "mplcg"], - option={ - "me": "-O2 --quiet", - "mpl2mpl": "-O2", - "mplcg": "-O2 --fPIC --fPIE --quiet" - }, - global_option="", - infiles=["${APP}.mpl"] - ) - ], "compile": [ - C2ast( - clang="${ENHANCED_CLANG_PATH}/bin/clang", + MapleDriver( + maple="${MAPLE_BUILD_OUTPUT}/bin/maple", + infiles=["${APP}.c"], + outfile="${APP}.s", include_path=[ "${MAPLE_BUILD_OUTPUT}/lib/include", "${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc/usr/include", "${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/lib/gcc/aarch64-linux-gnu/7.5.0/include", - "../lib/include" + "../lib/include", + "${MAPLE_ROOT}/testsuite/c_test/csmith_test/runtime_x86" ], - option="--target=aarch64 -U __SIZEOF_INT128__", - infile="${APP}.c", - outfile="${APP}.ast" - ), - Hir2mpl( - hir2mpl="${MAPLE_BUILD_OUTPUT}/bin/hir2mpl", - infile="${APP}.ast", - outfile="${APP}.mpl" - ), - Maple( - maple="${MAPLE_BUILD_OUTPUT}/bin/maple", - run=["me", "mpl2mpl", "mplcg"], - option={ - "me": "-O2 --quiet", - "mpl2mpl": "-O2", - "mplcg": "-O2 --fPIC --fPIE --quiet" - }, - global_option="", - infiles=["${APP}.mpl"] - ), - CLinker( - infiles=["main.s", "${APP}.s"], - front_option="-pie", - outfile="${APP}.out", - back_option="-lm" + option="-O2 -fPIC -fPIE -S -g -lpthread -lm --save-temps -Wno-error=int-conversion" ) ], + "link": [ + MapleDriver( + maple="${OUT_ROOT}/aarch64-clang-release/bin/maple", + infiles=["${APP}"], + outfile="${TARGET}.out", + option="-std=gnu99 -lm -L${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc/lib/", + extra_opt="-pie" + ) + ], + "run": [ Shell( "${MAPLE_ROOT}/tools/bin/qemu-aarch64 -L ${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc ${APP}.out > output.log 2>&1" @@ -90,6 +49,6 @@ CO2_PIE = { CheckFileEqual( file1="output.log", file2="expected.txt" - ) + ) ] } diff --git a/testsuite/driver/src/.mode/LTO_TEST.py b/testsuite/driver/src/.mode/LTO_TEST.py index 73c2324c0bf7a4d66e2167af3eb8dc210b1037b3..22ae05b01aed1d672bc1abf628aaefb213539817 100644 --- a/testsuite/driver/src/.mode/LTO_TEST.py +++ b/testsuite/driver/src/.mode/LTO_TEST.py @@ -62,6 +62,11 @@ LTO_TEST = { option="${linkoption}" ) ], + "run1": [ + Shell( + "${MAPLE_ROOT}/tools/bin/llvm-ar -q lib${APP}.a ${APP}.o" + ), + ], "run": [ Shell( "${MAPLE_ROOT}/tools/bin/qemu-aarch64 -L ${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc a.out > output.log 2>&1" @@ -70,5 +75,10 @@ LTO_TEST = { file1="output.log", file2="expected.txt" ) + ], + "justrun": [ + Shell( + "${MAPLE_ROOT}/tools/bin/qemu-aarch64 -L ${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc a.out > output.log 2>&1" + ) ] } diff --git a/testsuite/driver/src/.mode/SCO0_TEST_MERGE.py b/testsuite/driver/src/.mode/SCO0_TEST_MERGE.py index caf001aa3683fc19280b50437c0970fc5171d436..f22bb9c27d6ad8c53f51ada02eae620f4da689d8 100644 --- a/testsuite/driver/src/.mode/SCO0_TEST_MERGE.py +++ b/testsuite/driver/src/.mode/SCO0_TEST_MERGE.py @@ -52,7 +52,7 @@ SCO0_TEST_MERGE = { infiles=["${APP}"], outfile="${TARGET}", option="-std=gnu99 -lm -L${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc/lib/", - extra_opt="--O0 --patch-long-branch -fPIC --no-pie -flto" + extra_opt="-flto" ) ], "cp_data":[ diff --git a/testsuite/driver/src/.mode/SCO0_TRAIN_MERGE.py b/testsuite/driver/src/.mode/SCO0_TRAIN_MERGE.py index 9f3ecb78471ecb4729aff25ba661e3f2d1e3728a..92d8eb68eadf40cbda30f281c8153dd0360d8646 100644 --- a/testsuite/driver/src/.mode/SCO0_TRAIN_MERGE.py +++ b/testsuite/driver/src/.mode/SCO0_TRAIN_MERGE.py @@ -52,7 +52,7 @@ SCO0_TRAIN_MERGE = { infiles=["${APP}"], outfile="${TARGET}", option="-std=gnu99 --no-pie -lm -L${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc/lib/", - extra_opt="--O0 --patch-long-branch -fPIC --no-pie -flto ${SPEC_PARAM}" + extra_opt="${SPEC_PARAM}" ) ], "cp_data":[ diff --git a/testsuite/driver/src/.mode/SCO2_TEST_MERGE.py b/testsuite/driver/src/.mode/SCO2_TEST_MERGE.py index c4c1565a1ef74cb14133830ad90aa81be271ca70..6fae2037edfe025feb612b6a7a9a702684f615a7 100644 --- a/testsuite/driver/src/.mode/SCO2_TEST_MERGE.py +++ b/testsuite/driver/src/.mode/SCO2_TEST_MERGE.py @@ -52,7 +52,7 @@ SCO2_TEST_MERGE = { infiles=["${APP}"], outfile="${TARGET}", option="-std=gnu99 --no-pie -lm -L${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc/lib/", - extra_opt="--O2 -fPIC -g --no-pie -flto ${SPEC_PARAM}" + extra_opt="${SPEC_PARAM}" ) ], "cp_data":[ diff --git a/testsuite/driver/src/.mode/SCO2_TRAIN_MERGE.py b/testsuite/driver/src/.mode/SCO2_TRAIN_MERGE.py index ca495b9876f6a5409f507842a2dd77667e81bcdc..23b32b0b322d45beba98b4f0015f32091298526d 100644 --- a/testsuite/driver/src/.mode/SCO2_TRAIN_MERGE.py +++ b/testsuite/driver/src/.mode/SCO2_TRAIN_MERGE.py @@ -52,7 +52,7 @@ SCO2_TRAIN_MERGE = { infiles=["${APP}"], outfile="${TARGET}", option="-std=gnu99 --no-pie -lm -L${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc/lib/", - extra_opt="--O2 -fPIC -g --no-pie -flto ${SPEC_PARAM}" + extra_opt="${SPEC_PARAM}" ) ], "cp_data":[ diff --git a/testsuite/driver/src/.mode/SCOS_TEST_MERGE.py b/testsuite/driver/src/.mode/SCOS_TEST_MERGE.py index 40d40f158bb217f87bea53392dae57f182cd5171..1ed8ed2bd128170ea47db993d00593226e79145f 100644 --- a/testsuite/driver/src/.mode/SCOS_TEST_MERGE.py +++ b/testsuite/driver/src/.mode/SCOS_TEST_MERGE.py @@ -50,7 +50,7 @@ SCOS_TEST_MERGE = { infiles=["${APP}"], outfile="${TARGET}", option="-std=gnu99 --no-pie -lm -L${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc/lib/", - extra_opt="--Os -fPIC -g --no-pie -flto ${SPEC_PARAM}" + extra_opt="-Os ${SPEC_PARAM}" ) ], "cp_data":[ diff --git a/testsuite/driver/src/.mode/SCOS_TRAIN_MERGE.py b/testsuite/driver/src/.mode/SCOS_TRAIN_MERGE.py index 4e189a0e26b31b0539f417422bb16a8659a81b34..c82fcf321c8fc17ea44e068b7f481294844c017b 100644 --- a/testsuite/driver/src/.mode/SCOS_TRAIN_MERGE.py +++ b/testsuite/driver/src/.mode/SCOS_TRAIN_MERGE.py @@ -16,6 +16,20 @@ from api import * SCOS_TRAIN_MERGE = { + "c2o": [ + MapleDriver( + maple="${MAPLE_BUILD_OUTPUT}/bin/maple", + infiles=["${APP}.c"], + outfile="${TARGET}", + include_path=[ + "${MAPLE_BUILD_OUTPUT}/lib/include", + "${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc/usr/include", + "${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/lib/gcc/aarch64-linux-gnu/7.5.0/include" + ], + option="--Os --patch-long-branch -fPIC --no-pie -std=gnu99 -lm -L${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc/lib/", + extra_opt="${SPEC_PARAM}" + ) + ], "compile": [ MapleDriver( maple="${MAPLE_BUILD_OUTPUT}/bin/maple", @@ -36,7 +50,7 @@ SCOS_TRAIN_MERGE = { infiles=["${APP}"], outfile="${TARGET}", option="-std=gnu99 --no-pie -lm -L${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc/lib/", - extra_opt="--Os -fPIC -g --no-pie -flto ${SPEC_PARAM}" + extra_opt="-Os ${SPEC_PARAM}" ) ], "cp_data":[ diff --git a/testsuite/driver/src/api b/testsuite/driver/src/api index 0e2167fe5a36e0a118321a9a10fcab50e01190c8..6ef4a6bf7ff46d8e7f9bc78d3e02c8b66417b71b 120000 --- a/testsuite/driver/src/api +++ b/testsuite/driver/src/api @@ -1 +1 @@ -.api \ No newline at end of file +/home/maple/workspace/OpenArkCompiler/testsuite/driver/src/.api \ No newline at end of file diff --git a/testsuite/driver/src/mode b/testsuite/driver/src/mode index 09d75d39961ee7dbbeb279d4c7b1435aedbf0a8d..ebf9aa657fb84641cace53ba48900667efb58594 120000 --- a/testsuite/driver/src/mode +++ b/testsuite/driver/src/mode @@ -1 +1 @@ -.mode \ No newline at end of file +/home/maple/workspace/OpenArkCompiler/testsuite/driver/src/.mode \ No newline at end of file