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=?UTF-8?q?=20=20[litepgo]=20Bugfix=20for=20pgouse=20hotcoldsplit=20with?= =?UTF-8?q?=20infinite=20loop=20=20=20=20=20[maplecg]=20add=20vra=20regist?= =?UTF-8?q?er=20use=20infomation=20for=20propInmem=20during=20cgtargetprop?= =?UTF-8?q?=20phase?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- src/hir2mpl/BUILD.gn | 1 + .../clang/include/ast_builtin_func.def | 3 + .../ast_input/clang/include/ast_expr.h | 66 +- .../ast_input/clang/include/ast_parser.h | 8 +- .../ast_input/clang/include/ast_stmt.h | 5 + .../ast_input/clang/lib/ast_interface.cpp | 34 +- .../ast_input/clang/lib/ast_interface.h | 68 +- src/hir2mpl/ast_input/clang/lib/ast_type.cpp | 123 +- src/hir2mpl/ast_input/clang/src/ast_expr.cpp | 92 +- .../ast_input/clang/src/ast_parser.cpp | 368 +-- .../clang/src/ast_parser_builting_func.cpp | 6 +- src/hir2mpl/ast_input/clang/src/ast_stmt.cpp | 1 + .../clang/src/ast_struct2fe_helper.cpp | 2 +- .../ast_input/common/include/ast_decl.h | 55 +- .../common/include/ast_decl_builder.h | 58 +- src/hir2mpl/ast_input/common/src/ast_decl.cpp | 2 +- .../maple/lib/maple_ast_interface.cpp | 3 +- .../common/include/bc_instruction.h | 1 + .../common/include/enhance_c_checker.h | 3 +- src/hir2mpl/common/include/fe_options.h | 2 +- .../common/include/fe_struct_elem_info.h | 2 +- src/hir2mpl/common/include/feir_builder.h | 42 + src/hir2mpl/common/include/feir_stmt.h | 55 +- src/hir2mpl/common/include/feir_var.h | 8 +- src/hir2mpl/common/include/generic_attrs.h | 150 +- src/hir2mpl/common/include/hir2mpl_options.h | 2 +- src/hir2mpl/common/src/enhance_c_checker.cpp | 86 +- .../common/src/fe_java_string_manager.cpp | 3 +- src/hir2mpl/common/src/feir_builder.cpp | 28 +- src/hir2mpl/common/src/feir_stmt.cpp | 53 +- src/hir2mpl/common/src/generic_attrs.cpp | 12 +- .../common/src/hir2mpl_compiler_component.cpp | 2 +- src/hir2mpl/common/src/hir2mpl_options.cpp | 4 +- .../test/ast_input/clang/ast_var_test.cpp | 2 +- src/mapleall/maple_be/BUILD.gn | 8 +- src/mapleall/maple_be/CMakeLists.txt | 9 +- src/mapleall/maple_be/include/be/lower.h | 6 + .../include/cg/aarch64/aarch64_MPISel.h | 1 - .../cg/aarch64/aarch64_aggressive_opt.h | 4 +- .../include/cg/aarch64/aarch64_alignment.h | 16 +- .../include/cg/aarch64/aarch64_call_conv.h | 4 +- .../cg/aarch64/aarch64_cfi_generator.h | 4 +- .../maple_be/include/cg/aarch64/aarch64_cg.h | 18 +- .../include/cg/aarch64/aarch64_cgfunc.h | 58 +- .../aarch64_dup.h} | 31 +- .../maple_be/include/cg/aarch64/aarch64_ico.h | 23 +- .../include/cg/aarch64/aarch64_md.def | 170 +- .../cg/aarch64/aarch64_mop_register_limit.h | 279 ++ .../include/cg/aarch64/aarch64_mop_split.h | 1 + .../include/cg/aarch64/aarch64_mop_valid.h | 10 +- .../include/cg/aarch64/aarch64_peep.h | 31 +- .../include/cg/aarch64/aarch64_phases.def | 7 +- .../include/cg/aarch64/aarch64_proepilog.h | 26 +- .../include/cg/aarch64/aarch64_prop.h | 5 +- .../include/cg/aarch64/aarch64_ra_opt.h | 70 +- .../include/cg/aarch64/aarch64_reg_info.h | 14 +- .../include/cg/aarch64/aarch64_schedule.h | 6 +- .../include/cg/aarch64/aarch64_validbit_opt.h | 4 +- src/mapleall/maple_be/include/cg/alignment.h | 21 +- src/mapleall/maple_be/include/cg/asm_info.h | 7 + src/mapleall/maple_be/include/cg/call_conv.h | 2 - src/mapleall/maple_be/include/cg/cfi.h | 2 +- .../maple_be/include/cg/cfi_generator.h | 10 +- src/mapleall/maple_be/include/cg/cg.h | 18 +- src/mapleall/maple_be/include/cg/cg_cdg.h | 2 +- .../maple_be/include/cg/cg_critical_edge.h | 2 +- .../maple_be/include/cg/cg_dominance.h | 25 + .../maple_be/include/cg/cg_mc_ssa_pre.h | 4 +- src/mapleall/maple_be/include/cg/cg_option.h | 83 +- src/mapleall/maple_be/include/cg/cg_options.h | 8 +- .../maple_be/include/cg/cg_phasemanager.h | 5 +- src/mapleall/maple_be/include/cg/cg_predict.h | 93 + src/mapleall/maple_be/include/cg/cg_prop.h | 5 +- src/mapleall/maple_be/include/cg/cg_rce.h | 2 +- .../maple_be/include/cg/cg_validbit_opt.h | 2 +- src/mapleall/maple_be/include/cg/cgbb.h | 110 +- src/mapleall/maple_be/include/cg/cgfunc.h | 34 +- .../aarch64_isolate_fastpath.h => dup_tail.h} | 61 +- src/mapleall/maple_be/include/cg/ebo.h | 1 - src/mapleall/maple_be/include/cg/insn.h | 31 +- src/mapleall/maple_be/include/cg/isa.h | 43 +- .../maple_be/include/cg/list_scheduler.h | 54 +- src/mapleall/maple_be/include/cg/live.h | 1 - src/mapleall/maple_be/include/cg/loop.h | 12 +- src/mapleall/maple_be/include/cg/operand.h | 30 +- .../maple_be/include/cg/optimize_common.h | 7 +- src/mapleall/maple_be/include/cg/proepilog.h | 74 +- src/mapleall/maple_be/include/cg/ra_opt.h | 132 +- src/mapleall/maple_be/include/cg/reg_alloc.h | 37 +- .../maple_be/include/cg/reg_alloc_basic.h | 11 +- .../maple_be/include/cg/reg_alloc_color_ra.h | 43 +- .../maple_be/include/cg/reg_alloc_lsra.h | 5 - src/mapleall/maple_be/include/cg/reg_info.h | 11 +- .../maple_be/include/cg/sparse_datainfo.h | 4 - src/mapleall/maple_be/include/cg/tailcall.h | 1 - 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- 821 files changed, 16056 insertions(+), 19934 deletions(-) rename src/mapleall/maple_be/include/cg/{isolate_fastpath.h => aarch64/aarch64_dup.h} (51%) create mode 100644 src/mapleall/maple_be/include/cg/aarch64/aarch64_mop_register_limit.h create mode 100644 src/mapleall/maple_be/include/cg/cg_predict.h rename src/mapleall/maple_be/include/cg/{aarch64/aarch64_isolate_fastpath.h => dup_tail.h} (30%) rename src/mapleall/maple_be/src/cg/{isolate_fastpath.cpp => aarch64/aarch64_dup.cpp} (53%) delete mode 100644 src/mapleall/maple_be/src/cg/aarch64/aarch64_isolate_fastpath.cpp create mode 100644 src/mapleall/maple_be/src/cg/cg_predict.cpp create mode 100644 src/mapleall/maple_be/src/cg/dup_tail.cpp create mode 100644 src/mapleall/maple_driver/include/parse_spec.h create mode 100644 src/mapleall/maple_driver/src/parse_spec.cpp create mode 100644 src/mapleall/maple_ipa/include/builtins.def create mode 100644 src/mapleall/maple_ipa/include/builtins_outside_C90.def rename src/mapleall/{maple_util/include/set_spec.h => maple_ir/include/side_effect_info.h} (43%) create mode 100644 src/mapleall/maple_me/include/me_combine_expr.h create mode 100644 src/mapleall/maple_me/include/me_expr_utils.h create mode 100644 src/mapleall/maple_me/src/me_combine_expr.cpp create mode 100644 src/mapleall/maple_me/src/me_expr_utils.cpp create mode 100644 src/mapleall/maple_util/include/bit_value.h create mode 100644 src/mapleall/maple_util/include/mem_reference_table.h rename src/mapleall/{maple_me => maple_util}/include/orig_symbol.h (99%) create mode 100644 src/mapleall/maple_util/src/bit_value.cpp rename src/mapleall/{maple_me => maple_util}/src/orig_symbol.cpp (100%) delete mode 100644 src/mapleall/maple_util/src/set_spec.cpp rename src/mapleall/mpl2mpl/include/{expand128floats.h => legalize_numeric_types.h} (62%) rename src/mapleall/mpl2mpl/src/{expand128floats.cpp => legalize_numeric_types.cpp} (51%) create mode 100644 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testsuite/driver/src/mode/ZTERPRC.py delete mode 100644 testsuite/driver/src/mode/__init__.py diff --git a/src/hir2mpl/BUILD.gn b/src/hir2mpl/BUILD.gn index bb9cc6c086..447fcfdf4c 100644 --- a/src/hir2mpl/BUILD.gn +++ b/src/hir2mpl/BUILD.gn @@ -18,6 +18,7 @@ if (COV_CHECK == 1) { } cflags += [ + "-DLLVM_BISHENGCLANGUAGE=1", "-DMIR_FEATURE_FULL=1", "-DHIR2MPL_FULL_INFO_DUMP=1", "-DJAVA_OBJ_IN_MFILE=1", diff --git a/src/hir2mpl/ast_input/clang/include/ast_builtin_func.def b/src/hir2mpl/ast_input/clang/include/ast_builtin_func.def index 4577b60139..dfcbd861df 100644 --- a/src/hir2mpl/ast_input/clang/include/ast_builtin_func.def +++ b/src/hir2mpl/ast_input/clang/include/ast_builtin_func.def @@ -7,6 +7,9 @@ BUILTIN_FUNC(strcmp) BUILTIN_FUNC(strlen) BUILTIN_FUNC(strchr) BUILTIN_FUNC(strrchr) +BUILTIN_FUNC(strcspn) +BUILTIN_FUNC(strspn) +BUILTIN_FUNC(strpbrk) BUILTIN_FUNC(memcmp) BUILTIN_FUNC(memcpy) BUILTIN_FUNC(memset) diff --git a/src/hir2mpl/ast_input/clang/include/ast_expr.h b/src/hir2mpl/ast_input/clang/include/ast_expr.h index dd4152f658..c67407780b 100644 --- a/src/hir2mpl/ast_input/clang/include/ast_expr.h +++ b/src/hir2mpl/ast_input/clang/include/ast_expr.h @@ -23,24 +23,23 @@ class ASTDecl; class ASTFunc; class ASTStmt; -union Value { - uint64 f128[2]; - Int128Arr i128; - uint8 u8; - uint16 u16; - uint32 u32; - uint64 u64; - int8 i8; - int16 i16; - int32 i32; - float f32; - int64 i64; - double f64; - UStrIdx strIdx; -}; - struct ASTValue { - Value val = {{0, 0}}; + union Value { + uint64 f128[2]; + Int128Arr i128; + uint8 u8; + uint16 u16; + uint32 u32; + uint64 u64; + int8 i8; + int16 i16; + int32 i32; + float f32; + int64 i64; + double f64; + UStrIdx strIdx; + } val = {.f128 = {0, 0}}; + PrimType pty = PTY_begin; PrimType GetPrimType() const { @@ -278,6 +277,18 @@ class ASTCastExpr : public ASTExpr { isVectorSplat = flag; } + void SetPartOfExplicitCast(bool flag) { + isPartOfExplicitCast = flag; + } + + void SetPartOfCastType(MIRType *castType) { + partOfCastType = castType; + } + + void SetTargetFieldName(const std::string &fieldName) { + targetFieldName = fieldName; + } + protected: MIRConst *GenerateMIRConstImpl() const override; UniqueFEIRExpr Emit2FEExprImpl(std::list &stmts) const override; @@ -300,6 +311,7 @@ class ASTCastExpr : public ASTExpr { ASTExpr *child = nullptr; MIRType *src = nullptr; MIRType *dst = nullptr; + MIRType *partOfCastType = nullptr; bool isNeededCvt = false; bool isBitCast = false; MIRType *complexType = nullptr; @@ -309,6 +321,8 @@ class ASTCastExpr : public ASTExpr { bool isBuilinFunc = false; bool isUnoinCast = false; bool isVectorSplat = false; + bool isPartOfExplicitCast = false; + std::string targetFieldName; }; class ASTDeclRefExpr : public ASTExpr { @@ -1168,10 +1182,6 @@ class ASTMemberExpr : public ASTExpr { return fieldOffsetBits; } - void SetIsMulAlignAttr(bool flag) { - isMulAlignAttr = flag; - } - private: MIRConst *GenerateMIRConstImpl() const override; UniqueFEIRExpr Emit2FEExprImpl(std::list &stmts) const override; @@ -1185,7 +1195,6 @@ class ASTMemberExpr : public ASTExpr { MIRType *baseType = nullptr; bool isArrow = false; uint64 fieldOffsetBits = 0; - bool isMulAlignAttr = false; }; class ASTDesignatedInitUpdateExpr : public ASTExpr { @@ -1283,8 +1292,11 @@ class ASTBOPtrMemExpr : public ASTBinaryOperatorExpr { class ASTCallExpr : public ASTExpr { public: explicit ASTCallExpr(MapleAllocator &allocatorIn) - : ASTExpr(allocatorIn, kASTOpCall), args(allocatorIn.Adapter()), funcName("", allocatorIn.GetMemPool()), - varName(FEUtils::GetSequentialName("retVar_"), allocatorIn.GetMemPool()) {} + : ASTExpr(allocatorIn, kASTOpCall), + args(allocatorIn.Adapter()), + funcName("", allocatorIn.GetMemPool()), + varName(FEUtils::GetSequentialName("retVar_"), allocatorIn.GetMemPool()), + returnVarAttrs(allocatorIn) {} ~ASTCallExpr() override { funcDecl = nullptr; } @@ -1344,11 +1356,11 @@ class ASTCallExpr : public ASTExpr { funcDecl = decl; } - void SetReturnVarAttrs(const GenericAttrs &attrs) { + void SetReturnVarAttrs(const MapleGenericAttrs &attrs) { returnVarAttrs = attrs; } - const GenericAttrs &GetReturnVarAttrs() const { + const MapleGenericAttrs &GetReturnVarAttrs() const { return returnVarAttrs; } @@ -1561,7 +1573,7 @@ UniqueFEIRExpr EmitBuiltin##STR(std::list &stmts) const; bool isIcall = false; MapleString varName; ASTFunc *funcDecl = nullptr; - GenericAttrs returnVarAttrs; + MapleGenericAttrs returnVarAttrs; }; class ASTParenExpr : public ASTExpr { diff --git a/src/hir2mpl/ast_input/clang/include/ast_parser.h b/src/hir2mpl/ast_input/clang/include/ast_parser.h index b641c7f0ec..afd45b6754 100644 --- a/src/hir2mpl/ast_input/clang/include/ast_parser.h +++ b/src/hir2mpl/ast_input/clang/include/ast_parser.h @@ -198,7 +198,8 @@ class ASTParser { MapleVector SolveFuncParameterDecls(MapleAllocator &allocator, const clang::FunctionDecl &funcDecl, MapleVector &typeDescIn, std::list &stmts, bool needBody); - GenericAttrs SolveFunctionAttributes(const clang::FunctionDecl &funcDecl, std::string &funcName) const; + MapleGenericAttrs SolveFunctionAttributes(MapleAllocator &allocator, const clang::FunctionDecl &funcDecl, + std::string &funcName) const; ASTDecl *ProcessDecl(MapleAllocator &allocator, const clang::Decl &decl); ASTStmt *SolveFunctionBody(MapleAllocator &allocator, const clang::FunctionDecl &funcDecl, ASTFunc &astFunc, const std::list &stmts); @@ -218,7 +219,7 @@ class ASTParser { ASTDecl *PROCESS_DECL(Label); ASTDecl *PROCESS_DECL(StaticAssert); ASTDecl *ProcessDeclFunctionDecl(MapleAllocator &allocator, const clang::FunctionDecl &funcDecl, - bool needBody = false); + bool needBody = false, bool needDefDeMangledVer = false); static ASTExpr *GetAddrShiftExpr(MapleAllocator &allocator, ASTExpr &expr, uint32 typeSize); static ASTExpr *GetSizeMulExpr(MapleAllocator &allocator, ASTExpr &expr, ASTExpr &ptrSizeExpr); @@ -288,6 +289,9 @@ class ASTParser { const clang::QualType &qualType) const; void CheckAtomicClearArg(const clang::CallExpr &expr) const; std::string GetFuncNameFromFuncDecl(const clang::FunctionDecl &funcDecl) const; + bool IsMemberTypeHasMulAlignAttr(const clang::Expr &expr) const; + ASTFunc *BuildAstFunc(MapleAllocator &allocator, const clang::FunctionDecl &funcDecl, + std::list &implicitStmts, bool needDefDeMangledVer, bool needBody); using FuncPtrBuiltinFunc = ASTExpr *(ASTParser::*)(MapleAllocator &allocator, const clang::CallExpr &expr, std::stringstream &ss, ASTCallExpr &astCallExpr) const; static std::map InitBuiltinFuncPtrMap(); diff --git a/src/hir2mpl/ast_input/clang/include/ast_stmt.h b/src/hir2mpl/ast_input/clang/include/ast_stmt.h index 7bcc761b92..7fdd536407 100644 --- a/src/hir2mpl/ast_input/clang/include/ast_stmt.h +++ b/src/hir2mpl/ast_input/clang/include/ast_stmt.h @@ -146,8 +146,13 @@ class ASTReturnStmt : public ASTStmt { explicit ASTReturnStmt(MapleAllocator &allocatorIn) : ASTStmt(allocatorIn, kASTStmtReturn) {} ~ASTReturnStmt() override = default; + void SetActulReturnStmt(bool flag) { + actulReturnStmt = flag; + } + private: std::list Emit2FEStmtImpl() const override; + bool actulReturnStmt = false; }; class ASTAttributedStmt : public ASTStmt { diff --git a/src/hir2mpl/ast_input/clang/lib/ast_interface.cpp b/src/hir2mpl/ast_input/clang/lib/ast_interface.cpp index def33c89dc..22db296c1c 100644 --- a/src/hir2mpl/ast_input/clang/lib/ast_interface.cpp +++ b/src/hir2mpl/ast_input/clang/lib/ast_interface.cpp @@ -173,7 +173,7 @@ uint32 LibAstFile::RetrieveAggTypeAlign(const clang::Type *ty) const { return 0; } -void LibAstFile::GetCVRAttrs(uint32_t qualifiers, GenericAttrs &genAttrs, bool isConst) const { +void LibAstFile::GetCVRAttrs(uint32_t qualifiers, MapleGenericAttrs &genAttrs, bool isConst) const { if (isConst && (qualifiers & clang::Qualifiers::Const) != 0) { genAttrs.SetAttr(GENATTR_const); } @@ -185,7 +185,7 @@ void LibAstFile::GetCVRAttrs(uint32_t qualifiers, GenericAttrs &genAttrs, bool i } } -void LibAstFile::GetSClassAttrs(const clang::StorageClass storageClass, GenericAttrs &genAttrs) const { +void LibAstFile::GetSClassAttrs(const clang::StorageClass storageClass, MapleGenericAttrs &genAttrs) const { switch (storageClass) { case clang::SC_Extern: case clang::SC_PrivateExtern: @@ -199,7 +199,7 @@ void LibAstFile::GetSClassAttrs(const clang::StorageClass storageClass, GenericA } } -void LibAstFile::GetStorageAttrs(const clang::NamedDecl &decl, GenericAttrs &genAttrs) const { +void LibAstFile::GetStorageAttrs(const clang::NamedDecl &decl, MapleGenericAttrs &genAttrs) const { switch (decl.getKind()) { case clang::Decl::Function: case clang::Decl::CXXMethod: { @@ -241,7 +241,7 @@ void LibAstFile::GetStorageAttrs(const clang::NamedDecl &decl, GenericAttrs &gen return; } -void LibAstFile::GetAccessAttrs(AccessKind access, GenericAttrs &genAttrs) const { +void LibAstFile::GetAccessAttrs(AccessKind access, MapleGenericAttrs &genAttrs) const { switch (access) { case kPublic: genAttrs.SetAttr(GENATTR_public); @@ -261,7 +261,7 @@ void LibAstFile::GetAccessAttrs(AccessKind access, GenericAttrs &genAttrs) const return; } -void LibAstFile::GetQualAttrs(const clang::NamedDecl &decl, GenericAttrs &genAttrs) const { +void LibAstFile::GetQualAttrs(const clang::NamedDecl &decl, MapleGenericAttrs &genAttrs) const { switch (decl.getKind()) { case clang::Decl::Function: case clang::Decl::CXXMethod: @@ -280,12 +280,12 @@ void LibAstFile::GetQualAttrs(const clang::NamedDecl &decl, GenericAttrs &genAtt } } -void LibAstFile::GetQualAttrs(const clang::QualType &qualType, GenericAttrs &genAttrs, bool isSourceType) const { +void LibAstFile::GetQualAttrs(const clang::QualType &qualType, MapleGenericAttrs &genAttrs, bool isSourceType) const { uint32_t qualifiers = qualType.getCVRQualifiers(); GetCVRAttrs(qualifiers, genAttrs, isSourceType); } -void LibAstFile::CollectAttrs(const clang::NamedDecl &decl, GenericAttrs &genAttrs, AccessKind access) const { +void LibAstFile::CollectAttrs(const clang::NamedDecl &decl, MapleGenericAttrs &genAttrs, AccessKind access) const { GetStorageAttrs(decl, genAttrs); GetAccessAttrs(access, genAttrs); GetQualAttrs(decl, genAttrs); @@ -349,7 +349,8 @@ void LibAstFile::SetAttrTLSModel(const clang::VarDecl &decl, GenericAttrs &genAt } } -void LibAstFile::CollectFuncAttrs(const clang::FunctionDecl &decl, GenericAttrs &genAttrs, AccessKind access) const { +void LibAstFile::CollectFuncAttrs(const clang::FunctionDecl &decl, MapleGenericAttrs &genAttrs, AccessKind access) + const { CollectAttrs(decl, genAttrs, access); if (decl.isVirtualAsWritten()) { genAttrs.SetAttr(GENATTR_virtual); @@ -469,7 +470,7 @@ void LibAstFile::CheckUnsupportedFuncAttrs(const clang::FunctionDecl &decl) cons unsupportedFuncAttrs.c_str()); } -void LibAstFile::CollectVarAttrs(const clang::VarDecl &decl, GenericAttrs &genAttrs, AccessKind access) const { +void LibAstFile::CollectVarAttrs(const clang::VarDecl &decl, MapleGenericAttrs &genAttrs, AccessKind access) const { CollectAttrs(decl, genAttrs, access); SetAttrVisibility(decl, genAttrs); SetAttrTLSModel(decl, genAttrs); @@ -550,7 +551,7 @@ void LibAstFile::CheckUnsupportedTypeAttrs(const clang::RecordDecl &decl) const unsupportedTypeAttrs.c_str()); } -void LibAstFile::CollectFieldAttrs(const clang::FieldDecl &decl, GenericAttrs &genAttrs, AccessKind access) const { +void LibAstFile::CollectFieldAttrs(const clang::FieldDecl &decl, MapleGenericAttrs &genAttrs, AccessKind access) const { CollectAttrs(decl, genAttrs, access); clang::PackedAttr *packedAttr = decl.getAttr(); if (packedAttr != nullptr) { @@ -562,18 +563,18 @@ void LibAstFile::CollectFieldAttrs(const clang::FieldDecl &decl, GenericAttrs &g } } -void LibAstFile::EmitTypeName(const clang::QualType qualType, std::stringstream &ss) { +void LibAstFile::EmitTypeName(MapleAllocator &allocatorIn, const clang::QualType qualType, std::stringstream &ss) { switch (qualType->getTypeClass()) { case clang::Type::LValueReference: { ss << "R"; const clang::QualType pointeeType = qualType->castAs()->getPointeeType(); - EmitTypeName(pointeeType, ss); + EmitTypeName(allocatorIn, pointeeType, ss); break; } case clang::Type::Pointer: { ss << "P"; const clang::QualType pointeeType = qualType->castAs()->getPointeeType(); - EmitTypeName(pointeeType, ss); + EmitTypeName(allocatorIn, pointeeType, ss); break; } case clang::Type::Record: { @@ -582,7 +583,7 @@ void LibAstFile::EmitTypeName(const clang::QualType qualType, std::stringstream } default: { EmitQualifierName(qualType, ss); - MIRType *type = CvtType(qualType); + MIRType *type = CvtType(allocatorIn, qualType); ss << ASTUtil::GetTypeString(*type); break; } @@ -787,13 +788,10 @@ std::string LibAstFile::GetSourceTextRaw(const clang::SourceRange range, const c bool LibAstFile::CheckAndBuildStaticFunctionLayout(const clang::FunctionDecl &funcDecl, std::stringstream &funcNameStream, std::unordered_set &visitedCalls) { - if (!funcDecl.isStatic()) { - return false; - } if (!funcDecl.getBody()) { return false; } - std::string funcSignature = BuildStaticFunctionSignature(funcDecl); + std::string funcSignature = BuildStaticFunctionSignature(*funcDecl.getDefinition()); funcNameStream << funcSignature << "{"; std::string funcSourceCode = ""; funcSourceCode = GetSourceText(*(funcDecl.getBody())); diff --git a/src/hir2mpl/ast_input/clang/lib/ast_interface.h b/src/hir2mpl/ast_input/clang/lib/ast_interface.h index f7a3f015d8..91933131a5 100644 --- a/src/hir2mpl/ast_input/clang/lib/ast_interface.h +++ b/src/hir2mpl/ast_input/clang/lib/ast_interface.h @@ -49,7 +49,7 @@ class LibAstFile { std::string GetMangledName(const clang::NamedDecl &decl) const; const std::string GetOrCreateMappedUnnamedName(const clang::Decl &decl); const std::string GetDeclName(const clang::NamedDecl &decl, bool isRename = false); - void EmitTypeName(const clang::QualType qualType, std::stringstream &ss); + void EmitTypeName(MapleAllocator &allocatorIn, const clang::QualType qualType, std::stringstream &ss); void EmitTypeName(const clang::RecordType &recordType, std::stringstream &ss); void EmitQualifierName(const clang::QualType qualType, std::stringstream &ss) const; std::string GetTypedefNameFromUnnamedStruct(const clang::RecordDecl &recoDecl) const; @@ -62,52 +62,59 @@ class LibAstFile { std::unordered_set &visitedCalls); std::string GetRecordLayoutString(const clang::RecordDecl &recordDecl); void BuildFieldLayoutString(std::stringstream &recordLayoutStr, const clang::FieldDecl &fieldDecl); - void CollectBaseEltTypeAndSizesFromConstArrayDecl(const clang::QualType &currQualType, MIRType *&elemType, + void CollectBaseEltTypeAndSizesFromConstArrayDecl(MapleAllocator &allocator, const clang::QualType &currQualType, + MIRType *&elemType, TypeAttrs &elemAttr, std::vector &operands, bool isSourceType); - void CollectBaseEltTypeAndDimFromVariaArrayDecl(const clang::QualType &currQualType, MIRType *&elemType, - TypeAttrs &elemAttr, uint8_t &dim, bool isSourceType); - void CollectBaseEltTypeAndDimFromDependentSizedArrayDecl(const clang::QualType currQualType, MIRType *&elemType, - TypeAttrs &elemAttr, std::vector &operands, - bool isSourceType); - void CollectBaseEltTypeFromArrayDecl(const clang::QualType &currQualType, MIRType *&elemType, TypeAttrs &elemAttr, - bool isSourceType = false); - void GetCVRAttrs(uint32_t qualifiers, GenericAttrs &genAttrs, bool isConst = true) const; - void GetSClassAttrs(const clang::StorageClass storageClass, GenericAttrs &genAttrs) const; - void GetStorageAttrs(const clang::NamedDecl &decl, GenericAttrs &genAttrs) const; - void GetAccessAttrs(AccessKind access, GenericAttrs &genAttrs) const; - void GetQualAttrs(const clang::NamedDecl &decl, GenericAttrs &genAttrs) const; - void GetQualAttrs(const clang::QualType &qualType, GenericAttrs &genAttrs, bool isSourceType) const; - void CollectAttrs(const clang::NamedDecl &decl, GenericAttrs &genAttrs, AccessKind access) const; - void CollectFuncAttrs(const clang::FunctionDecl &decl, GenericAttrs &genAttrs, AccessKind access) const; + void CollectBaseEltTypeAndDimFromVariaArrayDecl(MapleAllocator &allocator, const clang::QualType &currQualType, + MIRType *&elemType, TypeAttrs &elemAttr, uint8_t &dim, + bool isSourceType); + void CollectBaseEltTypeAndDimFromDependentSizedArrayDecl(MapleAllocator &allocator, + const clang::QualType currQualType, + MIRType *&elemType, TypeAttrs &elemAttr, + std::vector &operands, bool isSourceType); + void CollectBaseEltTypeFromArrayDecl(MapleAllocator &allocator, const clang::QualType &currQualType, + MIRType *&elemType, TypeAttrs &elemAttr, bool isSourceType = false); + void GetCVRAttrs(uint32_t qualifiers, MapleGenericAttrs &genAttrs, bool isConst = true) const; + void GetSClassAttrs(const clang::StorageClass storageClass, MapleGenericAttrs &genAttrs) const; + void GetStorageAttrs(const clang::NamedDecl &decl, MapleGenericAttrs &genAttrs) const; + void GetAccessAttrs(AccessKind access, MapleGenericAttrs &genAttrs) const; + void GetQualAttrs(const clang::NamedDecl &decl, MapleGenericAttrs &genAttrs) const; + void GetQualAttrs(const clang::QualType &qualType, MapleGenericAttrs &genAttrs, bool isSourceType) const; + void CollectAttrs(const clang::NamedDecl &decl, MapleGenericAttrs &genAttrs, AccessKind access) const; + void CollectFuncAttrs(const clang::FunctionDecl &decl, MapleGenericAttrs &genAttrs, AccessKind access) const; void CollectFuncReturnVarAttrs(const clang::CallExpr &expr, GenericAttrs &genAttrs) const; void SetAttrVisibility(const clang::DeclaratorDecl &decl, GenericAttrs &genAttrs) const; void SetAttrTLSModel(const clang::VarDecl &decl, GenericAttrs &genAttrs) const; void CheckUnsupportedFuncAttrs(const clang::FunctionDecl &decl) const; - void CollectVarAttrs(const clang::VarDecl &decl, GenericAttrs &genAttrs, AccessKind access) const; + void CollectVarAttrs(const clang::VarDecl &decl, MapleGenericAttrs &genAttrs, AccessKind access) const; void CheckUnsupportedVarAttrs(const clang::VarDecl &decl) const; void CollectRecordAttrs(const clang::RecordDecl &decl, GenericAttrs &genAttrs) const; void CheckUnsupportedTypeAttrs(const clang::RecordDecl &decl) const; - void CollectFieldAttrs(const clang::FieldDecl &decl, GenericAttrs &genAttrs, AccessKind access) const; + void CollectFieldAttrs(const clang::FieldDecl &decl, MapleGenericAttrs &genAttrs, AccessKind access) const; void CollectTypeAttrs(const clang::NamedDecl &decl, TypeAttrs &typeAttrs) const; MIRType *CvtPrimType(const clang::QualType qualType, bool isSourceType = false) const; PrimType CvtPrimType(const clang::BuiltinType::Kind kind, bool isSourceType) const; MIRType *CvtPrimType2SourceType(const clang::BuiltinType::Kind kind) const; - MIRType *CvtSourceType(const clang::QualType qualType); - MIRType *CvtType(const clang::QualType qualType, bool isSourceType = false, const clang::Type **vlaType = nullptr); - MIRType *CvtOtherType(const clang::QualType srcType, bool isSourceType, const clang::Type **vlaType); - MIRType *CvtArrayType(const clang::QualType &srcType, bool isSourceType, const clang::Type **vlaType); - MIRType *CvtFunctionType(const clang::QualType srcType, bool isSourceType); - MIRType *CvtEnumType(const clang::QualType &qualType, bool isSourceType); - MIRType *CvtRecordType(const clang::QualType qualType); + MIRType *CvtSourceType(MapleAllocator &allocator, const clang::QualType qualType); + MIRType *CvtType(MapleAllocator &allocator, const clang::QualType qualType, bool isSourceType = false, + const clang::Type **vlaType = nullptr); + MIRType *CvtOtherType(MapleAllocator &allocator, const clang::QualType srcType, bool isSourceType, + const clang::Type **vlaType); + MIRType *CvtArrayType(MapleAllocator &allocator, const clang::QualType &srcType, bool isSourceType, + const clang::Type **vlaType); + MIRType *CvtFunctionType(MapleAllocator &allocator, const clang::QualType srcType, bool isSourceType); + MIRType *CvtEnumType(MapleAllocator &allocator, const clang::QualType &qualType, bool isSourceType); + MIRType *CvtRecordType(MapleAllocator &allocator, const clang::QualType qualType); MIRType *CvtFieldType(const clang::NamedDecl &decl); MIRType *CvtComplexType(const clang::QualType srcType) const; - MIRType *CvtVectorType(const clang::QualType srcType); + MIRType *CvtVectorType(MapleAllocator &allocator, const clang::QualType srcType); MIRType *CvtVectorSizeType(const MIRType &elemType, MIRType *destType, uint32_t arrLen, uint32_t vecLen, uint32 alignNum) const; - bool CheckSourceTypeNameNotNull(const clang::QualType &currQualType, MIRType *&elemType, bool isSourceType); - MIRType *CvtTypedef(const clang::QualType &qualType); - MIRType *CvtTypedefDecl(const clang::TypedefNameDecl &typedefDecl); + bool CheckSourceTypeNameNotNull(MapleAllocator &allocator, const clang::QualType &currQualType, MIRType *&elemType, + bool isSourceType); + MIRType *CvtTypedef(MapleAllocator &allocator, const clang::QualType &qualType); + MIRType *CvtTypedefDecl(MapleAllocator &allocator, const clang::TypedefNameDecl &typedefDecl); bool TypeHasMayAlias(const clang::QualType srcType) const; static bool IsOneElementVector(const clang::QualType &qualType); static bool IsOneElementVector(const clang::Type &type); @@ -163,6 +170,7 @@ class CallCollector : public clang::RecursiveASTVisitor { } return true; } + std::map GetCallExprs() { return callExprs; } diff --git a/src/hir2mpl/ast_input/clang/lib/ast_type.cpp b/src/hir2mpl/ast_input/clang/lib/ast_type.cpp index 61056bc4a6..a83b7837a3 100644 --- a/src/hir2mpl/ast_input/clang/lib/ast_type.cpp +++ b/src/hir2mpl/ast_input/clang/lib/ast_type.cpp @@ -152,33 +152,34 @@ bool LibAstFile::TypeHasMayAlias(const clang::QualType srcType) const { return false; } -MIRType *LibAstFile::CvtTypedef(const clang::QualType &qualType) { +MIRType *LibAstFile::CvtTypedef(MapleAllocator &allocator, const clang::QualType &qualType) { const clang::TypedefType *typedefType = llvm::dyn_cast(qualType); if (typedefType == nullptr) { return nullptr; } - return CvtTypedefDecl(*typedefType->getDecl()); + return CvtTypedefDecl(allocator, *typedefType->getDecl()); } -MIRType *LibAstFile::CvtTypedefDecl(const clang::TypedefNameDecl &typedefDecl) { +MIRType *LibAstFile::CvtTypedefDecl(MapleAllocator &allocator, const clang::TypedefNameDecl &typedefDecl) { std::string typedefName = GetDeclName(typedefDecl, true); MIRTypeByName *typdefType = nullptr; clang::QualType underlyTy = typedefDecl.getCanonicalDecl()->getUnderlyingType(); - MIRType *type = CvtType(underlyTy, true); + MIRType *type = CvtType(allocator, underlyTy, true); if (type != nullptr) { typdefType = FEManager::GetTypeManager().CreateTypedef(typedefName, *type); } return typdefType; } -MIRType *LibAstFile::CvtSourceType(const clang::QualType qualType) { - return CvtType(qualType, true); +MIRType *LibAstFile::CvtSourceType(MapleAllocator &allocator, const clang::QualType qualType) { + return CvtType(allocator, qualType, true); } -MIRType *LibAstFile::CvtType(const clang::QualType qualType, bool isSourceType, const clang::Type **vlaType) { +MIRType *LibAstFile::CvtType(MapleAllocator &allocator, const clang::QualType qualType, bool isSourceType, + const clang::Type **vlaType) { clang::QualType srcType = qualType.getCanonicalType(); if (isSourceType) { - MIRType *nameType = CvtTypedef(qualType); + MIRType *nameType = CvtTypedef(allocator, qualType); if (nameType != nullptr) { return nameType; } @@ -196,18 +197,18 @@ MIRType *LibAstFile::CvtType(const clang::QualType qualType, bool isSourceType, // handle pointer types const clang::QualType srcPteType = srcType->getPointeeType(); if (!srcPteType.isNull()) { - MIRType *mirPointeeType = CvtType(srcPteType, isSourceType, vlaType); + MIRType *mirPointeeType = CvtType(allocator, srcPteType, isSourceType, vlaType); if (mirPointeeType == nullptr) { return nullptr; } - GenericAttrs genAttrs; + MapleGenericAttrs genAttrs(allocator); GetQualAttrs(srcPteType, genAttrs, isSourceType); TypeAttrs attrs = genAttrs.ConvertToTypeAttrs(); // Get alignment from the pointee type uint32 alignmentBits = astContext->getTypeAlignIfKnown(srcPteType); if (alignmentBits != 0) { - if (alignmentBits > astContext->getTypeUnadjustedAlign(srcPteType)) { + if (llvm::isa(srcPteType) && srcPteType.getCanonicalType()->isBuiltinType()) { attrs.SetAlign(alignmentBits / 8); // bits to byte } } @@ -235,33 +236,34 @@ MIRType *LibAstFile::CvtType(const clang::QualType qualType, bool isSourceType, return prtType; } - return CvtOtherType(srcType, isSourceType, vlaType); + return CvtOtherType(allocator, srcType, isSourceType, vlaType); } -MIRType *LibAstFile::CvtOtherType(const clang::QualType srcType, bool isSourceType, const clang::Type **vlaType) { +MIRType *LibAstFile::CvtOtherType(MapleAllocator &allocator, const clang::QualType srcType, bool isSourceType, + const clang::Type **vlaType) { MIRType *destType = nullptr; if (srcType->isArrayType()) { - destType = CvtArrayType(srcType, isSourceType, vlaType); + destType = CvtArrayType(allocator, srcType, isSourceType, vlaType); } else if (srcType->isRecordType()) { - destType = CvtRecordType(srcType); + destType = CvtRecordType(allocator, srcType); // isComplexType() does not include complex integers (a GCC extension) } else if (srcType->isAnyComplexType()) { destType = CvtComplexType(srcType); } else if (srcType->isFunctionType()) { - destType = CvtFunctionType(srcType, isSourceType); + destType = CvtFunctionType(allocator, srcType, isSourceType); } else if (srcType->isEnumeralType()) { - destType = CvtEnumType(srcType, isSourceType); + destType = CvtEnumType(allocator, srcType, isSourceType); } else if (srcType->isAtomicType()) { const auto *atomicType = llvm::cast(srcType); - destType = CvtType(atomicType->getValueType()); + destType = CvtType(allocator, atomicType->getValueType()); } else if (srcType->isVectorType()) { - destType = CvtVectorType(srcType); + destType = CvtVectorType(allocator, srcType); } CHECK_FATAL(destType != nullptr, "unsupport type %s", srcType.getAsString().c_str()); return destType; } -MIRType *LibAstFile::CvtEnumType(const clang::QualType &qualType, bool isSourceType) { +MIRType *LibAstFile::CvtEnumType(MapleAllocator &allocator, const clang::QualType &qualType, bool isSourceType) { const clang::EnumType *enumTy = llvm::dyn_cast(qualType.getCanonicalType()); CHECK_NULL_FATAL(enumTy); clang::EnumDecl *enumDecl = enumTy->getDecl(); @@ -282,13 +284,13 @@ MIRType *LibAstFile::CvtEnumType(const clang::QualType &qualType, bool isSourceT FE_ERR(kLncErr, GetLOC(enumDecl->getLocation()), "Incomplete Enums Type is not support."); } else { clang::QualType qt = enumDecl->getIntegerType(); - type = CvtType(qt, isSourceType); + type = CvtType(allocator, qt, isSourceType); } } return type; } -MIRType *LibAstFile::CvtRecordType(const clang::QualType qualType) { +MIRType *LibAstFile::CvtRecordType(MapleAllocator &allocator, const clang::QualType qualType) { clang::QualType srcType = qualType.getCanonicalType(); const auto *recordType = llvm::cast(srcType); clang::RecordDecl *recordDecl = recordType->getDecl(); @@ -300,7 +302,7 @@ MIRType *LibAstFile::CvtRecordType(const clang::QualType qualType) { } MIRStructType *type = nullptr; std::stringstream ss; - EmitTypeName(srcType, ss); + EmitTypeName(allocator, srcType, ss); std::string name(ss.str()); if (!recordDecl->isDefinedOutsideFunctionOrMethod()) { Loc l = GetLOC(recordDecl->getLocation()); @@ -316,26 +318,28 @@ MIRType *LibAstFile::CvtRecordType(const clang::QualType qualType) { return recordDecl->isLambda() ? GlobalTables::GetTypeTable().GetOrCreatePointerType(*type) : type; } -MIRType *LibAstFile::CvtArrayType(const clang::QualType &srcType, bool isSourceType, const clang::Type **vlaType) { +MIRType *LibAstFile::CvtArrayType(MapleAllocator &allocator, const clang::QualType &srcType, bool isSourceType, + const clang::Type **vlaType) { MIRType *elemType = nullptr; TypeAttrs elemAttrs; std::vector operands; uint8_t dim = 0; if (srcType->isConstantArrayType()) { - CollectBaseEltTypeAndSizesFromConstArrayDecl(srcType, elemType, elemAttrs, operands, isSourceType); + CollectBaseEltTypeAndSizesFromConstArrayDecl(allocator, srcType, elemType, elemAttrs, operands, isSourceType); ASSERT(operands.size() < kMaxArrayDim, "The max array dimension is kMaxArrayDim"); dim = static_cast(operands.size()); } else if (srcType->isIncompleteArrayType()) { const clang::ArrayType *arrType = srcType->getAsArrayTypeUnsafe(); const auto *inArrType = llvm::cast(arrType); CollectBaseEltTypeAndSizesFromConstArrayDecl( - inArrType->getElementType(), elemType, elemAttrs, operands, isSourceType); + allocator, inArrType->getElementType(), elemType, elemAttrs, operands, isSourceType); dim = static_cast(operands.size()); ASSERT(operands.size() < kMaxArrayDim, "The max array dimension is kMaxArrayDim"); } else if (srcType->isVariableArrayType()) { - CollectBaseEltTypeAndDimFromVariaArrayDecl(srcType, elemType, elemAttrs, dim, isSourceType); + CollectBaseEltTypeAndDimFromVariaArrayDecl(allocator, srcType, elemType, elemAttrs, dim, isSourceType); } else if (srcType->isDependentSizedArrayType()) { - CollectBaseEltTypeAndDimFromDependentSizedArrayDecl(srcType, elemType, elemAttrs, operands, isSourceType); + CollectBaseEltTypeAndDimFromDependentSizedArrayDecl(allocator, srcType, elemType, elemAttrs, operands, + isSourceType); ASSERT(operands.size() < kMaxArrayDim, "The max array dimension is kMaxArrayDim"); dim = static_cast(operands.size()); } else { @@ -378,10 +382,10 @@ MIRType *LibAstFile::CvtComplexType(const clang::QualType srcType) const { return FEManager::GetTypeManager().GetOrCreateComplexStructType(*destElemType); } -MIRType *LibAstFile::CvtFunctionType(const clang::QualType srcType, bool isSourceType) { +MIRType *LibAstFile::CvtFunctionType(MapleAllocator &allocator, const clang::QualType srcType, bool isSourceType) { const auto *funcType = srcType.getTypePtr()->castAs(); CHECK_NULL_FATAL(funcType); - MIRType *retType = CvtType(funcType->getReturnType(), isSourceType); + MIRType *retType = CvtType(allocator, funcType->getReturnType(), isSourceType); std::vector argsVec; std::vector attrsVec; if (funcType->isFunctionProtoType()) { @@ -389,8 +393,8 @@ MIRType *LibAstFile::CvtFunctionType(const clang::QualType srcType, bool isSourc using ItType = clang::FunctionProtoType::param_type_iterator; for (ItType it = funcProtoType->param_type_begin(); it != funcProtoType->param_type_end(); ++it) { clang::QualType protoQualType = *it; - argsVec.push_back(CvtType(protoQualType, isSourceType)->GetTypeIndex()); - GenericAttrs genAttrs; + argsVec.push_back(CvtType(allocator, protoQualType, isSourceType)->GetTypeIndex()); + MapleGenericAttrs genAttrs(allocator); // collect storage class, access, and qual attributes // ASTCompiler::GetSClassAttrs(SC_Auto, genAttrs); -- no-op // ASTCompiler::GetAccessAttrs(genAttrs); -- no-op for params @@ -412,11 +416,12 @@ MIRType *LibAstFile::CvtFunctionType(const clang::QualType srcType, bool isSourc return GlobalTables::GetTypeTable().GetOrCreatePointerType(*mirFuncType); } -void LibAstFile::CollectBaseEltTypeAndSizesFromConstArrayDecl(const clang::QualType &currQualType, MIRType *&elemType, +void LibAstFile::CollectBaseEltTypeAndSizesFromConstArrayDecl(MapleAllocator &allocator, + const clang::QualType &currQualType, MIRType *&elemType, TypeAttrs &elemAttr, std::vector &operands, bool isSourceType) { if (isSourceType) { - MIRType *nameType = CvtTypedef(currQualType); + MIRType *nameType = CvtTypedef(allocator, currQualType); if (nameType != nullptr) { elemType = nameType; return; @@ -432,17 +437,17 @@ void LibAstFile::CollectBaseEltTypeAndSizesFromConstArrayDecl(const clang::QualT llvm::APInt size = constArrayType->getSize(); ASSERT(size.getSExtValue() >= 0, "Array Size must be positive or zero", currQualType.getAsString().c_str()); operands.push_back(size.getSExtValue()); - CollectBaseEltTypeAndSizesFromConstArrayDecl(constArrayType->getElementType(), elemType, elemAttr, operands, - isSourceType); + CollectBaseEltTypeAndSizesFromConstArrayDecl(allocator, constArrayType->getElementType(), elemType, elemAttr, + operands, isSourceType); } else { - CollectBaseEltTypeFromArrayDecl(currQualType, elemType, elemAttr, isSourceType); + CollectBaseEltTypeFromArrayDecl(allocator, currQualType, elemType, elemAttr, isSourceType); } } -bool LibAstFile::CheckSourceTypeNameNotNull(const clang::QualType &currQualType, MIRType *&elemType, - bool isSourceType) { +bool LibAstFile::CheckSourceTypeNameNotNull(MapleAllocator &allocator, const clang::QualType &currQualType, + MIRType *&elemType, bool isSourceType) { if (isSourceType) { - MIRType *nameType = CvtTypedef(currQualType); + MIRType *nameType = CvtTypedef(allocator, currQualType); if (nameType != nullptr) { elemType = nameType; return true; @@ -451,26 +456,30 @@ bool LibAstFile::CheckSourceTypeNameNotNull(const clang::QualType &currQualType, return false; } -void LibAstFile::CollectBaseEltTypeAndDimFromVariaArrayDecl(const clang::QualType &currQualType, MIRType *&elemType, +void LibAstFile::CollectBaseEltTypeAndDimFromVariaArrayDecl(MapleAllocator &allocator, + const clang::QualType &currQualType, MIRType *&elemType, TypeAttrs &elemAttr, uint8_t &dim, bool isSourceType) { - if (CheckSourceTypeNameNotNull(currQualType, elemType, isSourceType)) { + if (CheckSourceTypeNameNotNull(allocator, currQualType, elemType, isSourceType)) { return; } const clang::Type *ptrType = currQualType.getTypePtrOrNull(); ASSERT(ptrType != nullptr, "Null type", currQualType.getAsString().c_str()); if (ptrType->isArrayType()) { const auto *arrayType = ptrType->getAsArrayTypeUnsafe(); - CollectBaseEltTypeAndDimFromVariaArrayDecl(arrayType->getElementType(), elemType, elemAttr, dim, isSourceType); + CollectBaseEltTypeAndDimFromVariaArrayDecl(allocator, arrayType->getElementType(), elemType, elemAttr, dim, + isSourceType); ++dim; } else { - CollectBaseEltTypeFromArrayDecl(currQualType, elemType, elemAttr, isSourceType); + CollectBaseEltTypeFromArrayDecl(allocator, currQualType, elemType, elemAttr, isSourceType); } } -void LibAstFile::CollectBaseEltTypeAndDimFromDependentSizedArrayDecl( - const clang::QualType currQualType, MIRType *&elemType, TypeAttrs &elemAttr, std::vector &operands, - bool isSourceType) { - if (CheckSourceTypeNameNotNull(currQualType, elemType, isSourceType)) { +void LibAstFile::CollectBaseEltTypeAndDimFromDependentSizedArrayDecl(MapleAllocator &allocator, + const clang::QualType currQualType, + MIRType *&elemType, TypeAttrs &elemAttr, + std::vector &operands, + bool isSourceType) { + if (CheckSourceTypeNameNotNull(allocator, currQualType, elemType, isSourceType)) { return; } const clang::Type *ptrType = currQualType.getTypePtrOrNull(); @@ -480,20 +489,20 @@ void LibAstFile::CollectBaseEltTypeAndDimFromDependentSizedArrayDecl( ASSERT(arrayType != nullptr, "ERROR:null pointer!"); // variable sized operands.push_back(0); - CollectBaseEltTypeAndDimFromDependentSizedArrayDecl(arrayType->getElementType(), elemType, elemAttr, operands, - isSourceType); + CollectBaseEltTypeAndDimFromDependentSizedArrayDecl(allocator, arrayType->getElementType(), elemType, elemAttr, + operands, isSourceType); } else { - CollectBaseEltTypeFromArrayDecl(currQualType, elemType, elemAttr, isSourceType); + CollectBaseEltTypeFromArrayDecl(allocator, currQualType, elemType, elemAttr, isSourceType); } } -void LibAstFile::CollectBaseEltTypeFromArrayDecl(const clang::QualType &currQualType, +void LibAstFile::CollectBaseEltTypeFromArrayDecl(MapleAllocator &allocator, const clang::QualType &currQualType, MIRType *&elemType, TypeAttrs &elemAttr, bool isSourceType) { - elemType = CvtType(currQualType, isSourceType); + elemType = CvtType(allocator, currQualType, isSourceType); // Get alignment from the element type uint32 alignmentBits = astContext->getTypeAlignIfKnown(currQualType); if (alignmentBits != 0) { - if (alignmentBits > astContext->getTypeUnadjustedAlign(currQualType)) { + if (llvm::isa(currQualType) && currQualType.getCanonicalType()->isBuiltinType()) { elemAttr.SetAlign(alignmentBits / 8); // bits to byte } } @@ -529,9 +538,9 @@ MIRType *LibAstFile::CvtVectorSizeType(const MIRType &elemType, MIRType *destTyp return structType; } -MIRType *LibAstFile::CvtVectorType(const clang::QualType srcType) { +MIRType *LibAstFile::CvtVectorType(MapleAllocator &allocator, const clang::QualType srcType) { const auto *vectorType = llvm::cast(srcType); - MIRType *elemType = CvtType(vectorType->getElementType()); + MIRType *elemType = CvtType(allocator, vectorType->getElementType()); unsigned numElems = vectorType->getNumElements(); MIRType *destType = nullptr; auto elemTypeSize = elemType->GetSize(); @@ -566,4 +575,4 @@ bool LibAstFile::IsOneElementVector(const clang::Type &type) { } return false; } -} // namespace maple +} // namespace maple \ No newline at end of file diff --git a/src/hir2mpl/ast_input/clang/src/ast_expr.cpp b/src/hir2mpl/ast_input/clang/src/ast_expr.cpp index 25d28dd196..8fcc71f3b0 100644 --- a/src/hir2mpl/ast_input/clang/src/ast_expr.cpp +++ b/src/hir2mpl/ast_input/clang/src/ast_expr.cpp @@ -660,19 +660,22 @@ UniqueFEIRExpr ASTCastExpr::Emit2FEExprForFunctionOrArray2Pointer(std::listEmit2FEExpr(stmts); if (childFEExpr->GetKind() == kExprDRead) { - return std::make_unique( - static_cast(childFEExpr.get())->GetVar()->Clone(), childFEExpr->GetFieldID()); - } else if (childFEExpr->GetKind() == kExprIRead) { + return std::make_unique(static_cast(childFEExpr.get())->GetVar()->Clone(), + childFEExpr->GetFieldID(), childFEExpr->GetLenFieldID()); + } else if (childFEExpr->GetKind() == kExprIRead || childFEExpr->GetKind() == kExprIAddrof) { auto iread = static_cast(childFEExpr.get()); if (iread->GetFieldID() == 0) { auto addrOfExpr = iread->GetClonedOpnd(); ENCChecker::ReduceBoundaryChecking(stmts, addrOfExpr); return addrOfExpr; } else { - return std::make_unique(iread->GetClonedPtrType(), iread->GetFieldID(), iread->GetClonedOpnd()); + return std::make_unique(iread->GetClonedPtrType(), iread->GetFieldID(), + iread->GetClonedOpnd(), childFEExpr->GetLenFieldID()); } - } else if (childFEExpr->GetKind() == kExprIAddrof || childFEExpr->GetKind() == kExprAddrofVar || - childFEExpr->GetKind() == kExprAddrofFunc || childFEExpr->GetKind() == kExprAddrof) { + } else if (childFEExpr->GetKind() == kExprAddrofVar) { + return std::make_unique(static_cast(childFEExpr.get())->GetVar()->Clone(), + childFEExpr->GetFieldID(), childFEExpr->GetLenFieldID()); + } else if (childFEExpr->GetKind() == kExprAddrofFunc || childFEExpr->GetKind() == kExprAddrof) { return childFEExpr; } else { CHECK_FATAL(false, "unsupported expr kind %d", childFEExpr->GetKind()); @@ -688,10 +691,17 @@ UniqueFEIRExpr ASTCastExpr::Emit2FEExprImpl(std::list &stmts) co EmitVLASizeExprs(stmts); UniqueFEIRExpr subExpr = childExpr->Emit2FEExpr(stmts); if (isUnoinCast && dst->GetKind() == kTypeUnion) { + UniqueFEIRStmt unionStmt; std::string varName = FEUtils::GetSequentialName("anon.union."); UniqueFEIRType dstType = std::make_unique(*dst); UniqueFEIRVar unionVar = FEIRBuilder::CreateVarNameForC(varName, std::move(dstType)); - UniqueFEIRStmt unionStmt = FEIRBuilder::CreateStmtDAssign(unionVar->Clone(), subExpr->Clone()); + if (isPartOfExplicitCast) { + MIRStructType *mirStructType = static_cast(partOfCastType); + FieldID targetFieldID = FEUtils::GetStructFieldID(mirStructType, targetFieldName); + unionStmt = FEIRBuilder::CreateStmtDAssignAggField(unionVar->Clone(), subExpr->Clone(), targetFieldID); + } else { + unionStmt = FEIRBuilder::CreateStmtDAssign(unionVar->Clone(), subExpr->Clone()); + } (void)stmts.emplace_back(std::move(unionStmt)); return FEIRBuilder::CreateExprDRead(std::move(unionVar)); } @@ -730,44 +740,7 @@ UniqueFEIRExpr ASTCastExpr::Emit2FEExprImpl(std::list &stmts) co } UniqueFEIRExpr ASTCastExpr::EmitExprVdupVector(PrimType primtype, UniqueFEIRExpr &subExpr) const { -MIRIntrinsicID intrinsic; - switch (primtype) { -#define SET_VDUP(TY) \ - case PTY_##TY: \ - intrinsic = INTRN_vector_from_scalar_##TY; \ - break; - - SET_VDUP(v2i64) - SET_VDUP(v4i32) - SET_VDUP(v8i16) - SET_VDUP(v16i8) - SET_VDUP(v2u64) - SET_VDUP(v4u32) - SET_VDUP(v8u16) - SET_VDUP(v16u8) - SET_VDUP(v2f64) - SET_VDUP(v4f32) - SET_VDUP(v2i32) - SET_VDUP(v4i16) - SET_VDUP(v8i8) - SET_VDUP(v2u32) - SET_VDUP(v4u16) - SET_VDUP(v8u8) - SET_VDUP(v2f32) - case PTY_i64: - case PTY_v1i64: - intrinsic = INTRN_vector_from_scalar_v1i64; - break; - case PTY_u64: - case PTY_v1u64: - intrinsic = INTRN_vector_from_scalar_v1u64; - break; - case PTY_f64: - intrinsic = INTRN_vector_from_scalar_v1f64; - break; - default: - CHECK_FATAL(false, "Unhandled vector type in CreateExprVdupAnyVector"); - } + MIRIntrinsicID intrinsic = GetVectorIntrinsic(primtype); UniqueFEIRType feType = FEIRTypeHelper::CreateTypeNative(*GlobalTables::GetTypeTable().GetPrimType(primtype)); std::vector argOpnds; argOpnds.push_back(std::move(subExpr)); @@ -2168,15 +2141,17 @@ UniqueFEIRExpr ASTExprUnaryExprOrTypeTraitExpr::Emit2FEExprImpl(std::list memberNameList; const ASTExpr *base = baseExpr; + if (base->GetASTOp() == kASTMemberExpr) { + std::list memberNameList; + (void)memberNameList.emplace_back(GetMemberName()); + (void)FindFinalMember(*(static_cast(baseExpr)), memberNameList); + fieldName = ASTUtil::Join(memberNameList, "$"); // add structure nesting relationship + } while (base->GetASTOp() == kASTMemberExpr) { // find final BaseExpr and calculate FieldOffsets const ASTMemberExpr *memberExpr = static_cast(base); fieldOffset += memberExpr->GetFieldOffsetBits() / kOneByte; base = memberExpr->GetBaseExpr(); - (void)memberNameList.emplace_back(GetMemberName()); - (void)FindFinalMember(*(static_cast(baseExpr)), memberNameList); - fieldName = ASTUtil::Join(memberNameList, "$"); // add structure nesting relationship } MIRConst *baseConst = base->GenerateMIRConst(); MIRAddrofConst *konst = nullptr; @@ -2192,7 +2167,7 @@ MIRConst *ASTMemberExpr::GenerateMIRConstImpl() const { base->GetType()->IsMIRPtrType() ? static_cast(base->GetType())->GetPointedType() : base->GetType(); CHECK_FATAL(baseStructType->IsMIRStructType() || baseStructType->GetKind() == kTypeUnion, "Invalid"); - if (!baseStructType->IsIncomplete() && isMulAlignAttr) { + if (!baseStructType->IsIncomplete()) { MIRStructType *structType = static_cast(baseStructType); FieldID lenFieldID = FEUtils::GetStructFieldID(structType, fieldName); fieldOffset = static_cast(structType->GetBitOffsetFromBaseAddr(lenFieldID)) / kOneByte; @@ -2260,7 +2235,7 @@ UniqueFEIRExpr ASTMemberExpr::Emit2FEExprImpl(std::list &stmts) CHECK_FATAL(reType->GetPrimType() == memberType->GetPrimType(), "traverse fieldID error, type is inconsistent"); UniqueFEIRType retFEType = std::make_unique(*reType); if (retFEType->IsArray()) { - return std::make_unique(std::move(baseFEType), fieldID, std::move(baseFEExpr)); + return std::make_unique(std::move(baseFEType), fieldID, std::move(baseFEExpr), lenFieldID); } else { InsertNonnullChecking(stmts, baseFEExpr->Clone()); return FEIRBuilder::CreateExprIRead(std::move(retFEType), std::move(baseFEType), std::move(baseFEExpr), fieldID, @@ -2281,7 +2256,13 @@ UniqueFEIRExpr ASTMemberExpr::Emit2FEExprImpl(std::list &stmts) } UniqueFEIRVar tmpVar = static_cast(baseFEExpr.get())->GetVar()->Clone(); if (reFEType->IsArray()) { - auto addrofExpr = std::make_unique(std::move(tmpVar)); + UniqueFEIRExpr addrofExpr = nullptr; + if (lenFieldName != "") { + FieldID lenFieldID = FEUtils::GetStructFieldID(structType, lenFieldName); + addrofExpr = std::make_unique(std::move(tmpVar), 0, lenFieldID); + } else { + addrofExpr = std::make_unique(std::move(tmpVar)); + } addrofExpr->SetFieldID(baseID + fieldID); return addrofExpr; } else { @@ -2520,7 +2501,8 @@ UniqueFEIRExpr ASTBinaryOperatorExpr::Emit2FEExprLogicOperate(std::list &stmts) c EmitVLASizeExprs(stmts); VaArgInfo info = ProcessValistArgInfo(*mirType); bool needRoundUp = false; // determine whether offset is need roundup. - if (mirType->GetTypeAttrs().GetAlign() > 8 && !info.isCopyedMem && info.isGPReg) { // 8: bits to byte + if (mirType->GetUnadjustedAlign() > 8 && !info.isCopyedMem && info.isGPReg) { // 8: bits to byte needRoundUp = true; } UniqueFEIRExpr readVaList = child->Emit2FEExpr(stmts); @@ -3102,6 +3084,8 @@ VaArgInfo ASTVAArgExpr::ProcessValistArgInfo(const MIRType &type) const { case PTY_f64: // double info = { false, 16, 8, false, nullptr }; break; + case PTY_i128: + case PTY_u128: case PTY_f128: info = { false, 16, 16, false, nullptr }; break; diff --git a/src/hir2mpl/ast_input/clang/src/ast_parser.cpp b/src/hir2mpl/ast_input/clang/src/ast_parser.cpp index 927a6f9924..816e20de17 100644 --- a/src/hir2mpl/ast_input/clang/src/ast_parser.cpp +++ b/src/hir2mpl/ast_input/clang/src/ast_parser.cpp @@ -66,7 +66,7 @@ ASTBinaryOperatorExpr *ASTParser::AllocBinaryOperatorExpr(MapleAllocator &alloca if (bo.isPtrMemOp()) { return ASTDeclsBuilder::ASTExprBuilder(allocator); } - MIRType *lhTy = astFile->CvtType(bo.getLHS()->getType()); + MIRType *lhTy = astFile->CvtType(allocator, bo.getLHS()->getType()); ASSERT_NOT_NULL(lhTy); auto opcode = bo.getOpcode(); if (bo.isCompoundAssignmentOp()) { @@ -416,6 +416,7 @@ ASTStmt *ASTParser::ProcessStmtReturnStmt(MapleAllocator &allocator, const clang ASTExpr *astExpr = ProcessExpr(allocator, retStmt.getRetValue()); astStmt->SetCallAlloca(astExpr != nullptr && astExpr->IsCallAlloca()); astStmt->SetASTExpr(astExpr); + astStmt->SetActulReturnStmt(true); return astStmt; } @@ -619,7 +620,7 @@ ASTStmt *ASTParser::ProcessStmtSwitchStmt(MapleAllocator &allocator, const clang // switch cond expr ASTExpr *condExpr = switchStmt.getCond() == nullptr ? nullptr : ProcessExpr(allocator, switchStmt.getCond()); if (condExpr != nullptr) { - astStmt->SetCondType(astFile->CvtType(switchStmt.getCond()->getType())); + astStmt->SetCondType(astFile->CvtType(allocator, switchStmt.getCond()->getType())); } astStmt->SetCallAlloca(condExpr != nullptr && condExpr->IsCallAlloca()); astStmt->SetCondExpr(condExpr); @@ -818,7 +819,7 @@ ASTValue *ASTParser::TranslateConstantValue2ASTValue(MapleAllocator &allocator, if (result.Val.isLValue()) { return TranslateLValue2ASTValue(allocator, result, expr); } - auto *constMirType = astFile->CvtType(expr->getType().getCanonicalType()); + auto *constMirType = astFile->CvtType(allocator, expr->getType().getCanonicalType()); ASSERT_NOT_NULL(constMirType); if (result.Val.isInt()) { astValue = AllocASTValue(allocator); @@ -1035,19 +1036,19 @@ ASTValue *ASTParser::TranslateExprEval(MapleAllocator &allocator, const clang::E return TranslateConstantValue2ASTValue(allocator, expr); } -#define EXPR_CASE(CLASS) \ +#define EXPR_CASE(allocator, CLASS) \ case clang::Stmt::CLASS##Class: { \ - ASTExpr *astExpr = EvaluateExprAsConst(allocator, expr); \ + ASTExpr *astExpr = EvaluateExprAsConst((allocator), expr); \ if (astExpr == nullptr) { \ - astExpr = ProcessExpr##CLASS(allocator, llvm::cast(*expr)); \ + astExpr = ProcessExpr##CLASS((allocator), llvm::cast(*expr)); \ if (astExpr == nullptr) { \ return nullptr; \ } \ } \ - MIRType *exprType = astFile->CvtType(expr->getType()); \ + MIRType *exprType = astFile->CvtType((allocator), expr->getType()); \ astExpr->SetType(exprType); \ if (expr->isConstantInitializer(*astFile->GetNonConstAstContext(), false, nullptr)) { \ - astExpr->SetConstantValue(TranslateExprEval(allocator, expr)); \ + astExpr->SetConstantValue(TranslateExprEval((allocator), expr)); \ } \ Loc loc = astFile->GetExprLOC(*expr); \ astExpr->SetSrcLoc(loc); \ @@ -1082,7 +1083,7 @@ ASTExpr *ASTParser::EvaluateExprAsConst(MapleAllocator &allocator, const clang:: auto *unaryExpr = llvm::cast(expr); clang::QualType qualType = unaryExpr->isArgumentType() ? unaryExpr->getArgumentType().getCanonicalType() : unaryExpr->getArgumentExpr()->getType().getCanonicalType(); - MIRType *mirType = astFile->CvtType(qualType); + MIRType *mirType = astFile->CvtType(allocator, qualType); if (mirType->GetKind() == kTypeStruct || mirType->GetKind() == kTypeUnion) { intExpr->SetVarNameIdx(mirType->GetNameStrIdx()); if (unaryExpr->getKind() == clang::UETT_SizeOf) { @@ -1147,50 +1148,50 @@ ASTExpr *ASTParser::ProcessExpr(MapleAllocator &allocator, const clang::Expr *ex return nullptr; } switch (expr->getStmtClass()) { - EXPR_CASE(UnaryOperator); - EXPR_CASE(AddrLabelExpr); - EXPR_CASE(NoInitExpr); - EXPR_CASE(PredefinedExpr); - EXPR_CASE(OpaqueValueExpr); - EXPR_CASE(BinaryConditionalOperator); - EXPR_CASE(CompoundLiteralExpr); - EXPR_CASE(OffsetOfExpr); - EXPR_CASE(InitListExpr); - EXPR_CASE(BinaryOperator); - EXPR_CASE(ImplicitValueInitExpr); - EXPR_CASE(ArraySubscriptExpr); - EXPR_CASE(UnaryExprOrTypeTraitExpr); - EXPR_CASE(MemberExpr); - EXPR_CASE(DesignatedInitUpdateExpr); - EXPR_CASE(ImplicitCastExpr); - EXPR_CASE(DeclRefExpr); - EXPR_CASE(ParenExpr); - EXPR_CASE(IntegerLiteral); - EXPR_CASE(CharacterLiteral); - EXPR_CASE(StringLiteral); - EXPR_CASE(FloatingLiteral); - EXPR_CASE(ConditionalOperator); - EXPR_CASE(VAArgExpr); - EXPR_CASE(GNUNullExpr); - EXPR_CASE(SizeOfPackExpr); - EXPR_CASE(UserDefinedLiteral); - EXPR_CASE(ShuffleVectorExpr); - EXPR_CASE(TypeTraitExpr); - EXPR_CASE(ConstantExpr); - EXPR_CASE(ImaginaryLiteral); - EXPR_CASE(CallExpr); - EXPR_CASE(CompoundAssignOperator); - EXPR_CASE(StmtExpr); - EXPR_CASE(CStyleCastExpr); - EXPR_CASE(ArrayInitLoopExpr); - EXPR_CASE(ArrayInitIndexExpr); - EXPR_CASE(ExprWithCleanups); - EXPR_CASE(MaterializeTemporaryExpr); - EXPR_CASE(SubstNonTypeTemplateParmExpr); - EXPR_CASE(DependentScopeDeclRefExpr); - EXPR_CASE(AtomicExpr); - EXPR_CASE(ChooseExpr); - EXPR_CASE(GenericSelectionExpr); + EXPR_CASE(allocator, UnaryOperator); + EXPR_CASE(allocator, AddrLabelExpr); + EXPR_CASE(allocator, NoInitExpr); + EXPR_CASE(allocator, PredefinedExpr); + EXPR_CASE(allocator, OpaqueValueExpr); + EXPR_CASE(allocator, BinaryConditionalOperator); + EXPR_CASE(allocator, CompoundLiteralExpr); + EXPR_CASE(allocator, OffsetOfExpr); + EXPR_CASE(allocator, InitListExpr); + EXPR_CASE(allocator, BinaryOperator); + EXPR_CASE(allocator, ImplicitValueInitExpr); + EXPR_CASE(allocator, ArraySubscriptExpr); + EXPR_CASE(allocator, UnaryExprOrTypeTraitExpr); + EXPR_CASE(allocator, MemberExpr); + EXPR_CASE(allocator, DesignatedInitUpdateExpr); + EXPR_CASE(allocator, ImplicitCastExpr); + EXPR_CASE(allocator, DeclRefExpr); + EXPR_CASE(allocator, ParenExpr); + EXPR_CASE(allocator, IntegerLiteral); + EXPR_CASE(allocator, CharacterLiteral); + EXPR_CASE(allocator, StringLiteral); + EXPR_CASE(allocator, FloatingLiteral); + EXPR_CASE(allocator, ConditionalOperator); + EXPR_CASE(allocator, VAArgExpr); + EXPR_CASE(allocator, GNUNullExpr); + EXPR_CASE(allocator, SizeOfPackExpr); + EXPR_CASE(allocator, UserDefinedLiteral); + EXPR_CASE(allocator, ShuffleVectorExpr); + EXPR_CASE(allocator, TypeTraitExpr); + EXPR_CASE(allocator, ConstantExpr); + EXPR_CASE(allocator, ImaginaryLiteral); + EXPR_CASE(allocator, CallExpr); + EXPR_CASE(allocator, CompoundAssignOperator); + EXPR_CASE(allocator, StmtExpr); + EXPR_CASE(allocator, CStyleCastExpr); + EXPR_CASE(allocator, ArrayInitLoopExpr); + EXPR_CASE(allocator, ArrayInitIndexExpr); + EXPR_CASE(allocator, ExprWithCleanups); + EXPR_CASE(allocator, MaterializeTemporaryExpr); + EXPR_CASE(allocator, SubstNonTypeTemplateParmExpr); + EXPR_CASE(allocator, DependentScopeDeclRefExpr); + EXPR_CASE(allocator, AtomicExpr); + EXPR_CASE(allocator, ChooseExpr); + EXPR_CASE(allocator, GenericSelectionExpr); default: CHECK_FATAL(false, "ASTExpr %s NIY", expr->getStmtClassName()); } @@ -1269,14 +1270,34 @@ const clang::Expr *ASTParser::PeelParen2(const clang::Expr &expr) const { return exprPtr; } +bool ASTParser::IsMemberTypeHasMulAlignAttr(const clang::Expr &expr) const { + auto memberExpr = llvm::dyn_cast(&expr); + auto memberCanonicalType = memberExpr->getBase()->getType().getCanonicalType(); + if (memberCanonicalType->isRecordType()) { + const clang::RecordType *subRecordType = llvm::dyn_cast(memberCanonicalType); + auto subRecordDecl = subRecordType->getDecl(); + if (subRecordDecl != nullptr) { + int alignNum = 0; + for (const auto *alignAttr : subRecordDecl->specific_attrs()) { + (void)alignAttr; + alignNum++; + } + if (alignNum > 1) { + return true; + } + } + } + return false; +} + ASTExpr *ASTParser::ProcessExprUnaryOperator(MapleAllocator &allocator, const clang::UnaryOperator &uo) { ASTUnaryOperatorExpr *astUOExpr = AllocUnaryOperatorExpr(allocator, uo); CHECK_FATAL(astUOExpr != nullptr, "astUOExpr is nullptr"); const clang::Expr *subExpr = PeelParen(*uo.getSubExpr()); clang::UnaryOperator::Opcode clangOpCode = uo.getOpcode(); - MIRType *subType = astFile->CvtType(subExpr->getType()); + MIRType *subType = astFile->CvtType(allocator, subExpr->getType()); astUOExpr->SetSubType(subType); - MIRType *uoType = astFile->CvtType(uo.getType()); + MIRType *uoType = astFile->CvtType(allocator, uo.getType()); astUOExpr->SetUOType(uoType); if (clangOpCode == clang::UO_PostInc || clangOpCode == clang::UO_PostDec || clangOpCode == clang::UO_PreInc || clangOpCode == clang::UO_PreDec) { @@ -1290,7 +1311,7 @@ ASTExpr *ASTParser::ProcessExprUnaryOperator(MapleAllocator &allocator, const cl const clang::QualType qualType = subExpr->getType()->getPointeeType(); const clang::QualType desugaredType = qualType.getDesugaredType(*(astFile->GetContext())); MIRType *pointeeType = GlobalTables::GetTypeTable().GetPtr(); - MIRType *mirType = astFile->CvtType(qualType); + MIRType *mirType = astFile->CvtType(allocator, qualType); if (mirType != nullptr && mirType->GetPrimType() == PTY_ptr && !qualType->isVariableArrayType()) { len = static_cast(pointeeType->GetSize()); astUOExpr->SetPointeeLen(len); @@ -1309,7 +1330,7 @@ ASTExpr *ASTParser::ProcessExprUnaryOperator(MapleAllocator &allocator, const cl CHECK_FATAL(uo.getSubExpr()->getType().getCanonicalType()->isAnyComplexType(), "Unsupported complex value in MIR"); clang::QualType elementType = llvm::cast( uo.getSubExpr()->getType().getCanonicalType())->getElementType(); - MIRType *elementMirType = astFile->CvtType(elementType); + MIRType *elementMirType = astFile->CvtType(allocator, elementType); if (clangOpCode == clang::UO_Real) { static_cast(astUOExpr)->SetElementType(elementMirType); } else { @@ -1325,24 +1346,6 @@ ASTExpr *ASTParser::ProcessExprUnaryOperator(MapleAllocator &allocator, const cl if (clangOpCode == clang::UO_AddrOf && subExpr->getType()->isVariableArrayType() && llvm::isa(subExpr->getType())) { return astExpr; - } else if (clangOpCode == clang::UO_AddrOf && subExpr->getStmtClass() == clang::Stmt::MemberExprClass) { - auto memberExpr = llvm::dyn_cast(subExpr); - auto memberCanType = memberExpr->getBase()->getType().getCanonicalType(); - if (memberCanType->isRecordType()) { - const clang::RecordType *subRecordType = llvm::dyn_cast(memberCanType); - auto subRecordDecl = subRecordType->getDecl(); - if (subRecordDecl != nullptr) { - int alignNum = 0; - for (const auto *alignAttr : subRecordDecl->specific_attrs()) { - (void)alignAttr; - alignNum++; - } - if (alignNum > 1) { - ASTMemberExpr *astMemberExpr = static_cast(astExpr); - astMemberExpr->SetIsMulAlignAttr(true); - } - } - } } astUOExpr->SetASTDecl(astExpr->GetASTDecl()); astUOExpr->SetUOExpr(astExpr); @@ -1363,7 +1366,7 @@ ASTExpr *ASTParser::ProcessExprNoInitExpr(MapleAllocator &allocator, const clang ASTNoInitExpr *astNoInitExpr = ASTDeclsBuilder::ASTExprBuilder(allocator); CHECK_FATAL(astNoInitExpr != nullptr, "astNoInitExpr is nullptr"); clang::QualType qualType = expr.getType(); - MIRType *noInitType = astFile->CvtType(qualType); + MIRType *noInitType = astFile->CvtType(allocator, qualType); astNoInitExpr->SetNoInitType(noInitType); return astNoInitExpr; } @@ -1407,7 +1410,7 @@ ASTExpr *ASTParser::ProcessExprBinaryConditionalOperator(MapleAllocator &allocat return nullptr; } astBinaryConditionalOperator->SetFalseExpr(falseExpr); - astBinaryConditionalOperator->SetType(astFile->CvtType(expr.getType())); + astBinaryConditionalOperator->SetType(astFile->CvtType(allocator, expr.getType())); return astBinaryConditionalOperator; } @@ -1441,7 +1444,7 @@ ASTExpr *ASTParser::ProcessExprCompoundLiteralExpr(MapleAllocator &allocator, const clang::Expr *initExpr = expr.getInitializer(); CHECK_FATAL(initExpr != nullptr, "initExpr is nullptr"); clang::QualType qualType = initExpr->getType(); - astCompoundLiteralExpr->SetCompoundLiteralType(astFile->CvtType(qualType)); + astCompoundLiteralExpr->SetCompoundLiteralType(astFile->CvtType(allocator, qualType)); astExpr = ProcessExpr(allocator, initExpr); if (astExpr == nullptr) { return nullptr; @@ -1493,7 +1496,7 @@ ASTExpr *ASTParser::ProcessExprInitListExpr(MapleAllocator &allocator, const cla ASTInitListExpr *astInitListExpr = ASTDeclsBuilder::ASTExprBuilder(allocator); CHECK_FATAL(astInitListExpr != nullptr, "ASTInitListExpr is nullptr"); const clang::Type *type = nullptr; - MIRType *initListType = astFile->CvtType(expr.getType(), false, &type); + MIRType *initListType = astFile->CvtType(allocator, expr.getType(), false, &type); if (type != nullptr) { ParserExprVLASizeExpr(allocator, *type, *astInitListExpr); } @@ -1658,7 +1661,7 @@ ASTExpr *ASTParser::ProcessExprVAArgExpr(MapleAllocator &allocator, const clang: astVAArgExpr->SetCallAlloca(astExpr->IsCallAlloca()); astVAArgExpr->SetASTExpr(astExpr); const clang::Type *type = nullptr; - astVAArgExpr->SetType(astFile->CvtType(expr.getType(), false, &type)); + astVAArgExpr->SetType(astFile->CvtType(allocator, expr.getType(), false, &type)); if (type != nullptr) { ParserExprVLASizeExpr(allocator, *type, *astVAArgExpr); } @@ -1669,7 +1672,7 @@ ASTExpr *ASTParser::ProcessExprImplicitValueInitExpr(MapleAllocator &allocator, const clang::ImplicitValueInitExpr &expr) { auto *astImplicitValueInitExpr = ASTDeclsBuilder::ASTExprBuilder(allocator); CHECK_FATAL(astImplicitValueInitExpr != nullptr, "astImplicitValueInitExpr is nullptr"); - astImplicitValueInitExpr->SetType(astFile->CvtType(expr.getType())); + astImplicitValueInitExpr->SetType(astFile->CvtType(allocator, expr.getType())); astImplicitValueInitExpr->SetEvaluatedFlag(kEvaluatedAsZero); return astImplicitValueInitExpr; } @@ -1677,7 +1680,7 @@ ASTExpr *ASTParser::ProcessExprImplicitValueInitExpr(MapleAllocator &allocator, ASTExpr *ASTParser::ProcessExprStringLiteral(MapleAllocator &allocator, const clang::StringLiteral &expr) { auto *astStringLiteral = ASTDeclsBuilder::ASTExprBuilder(allocator); CHECK_FATAL(astStringLiteral != nullptr, "astStringLiteral is nullptr"); - astStringLiteral->SetType(astFile->CvtType(expr.getType())); + astStringLiteral->SetType(astFile->CvtType(allocator, expr.getType())); astStringLiteral->SetLength(expr.getLength()); MapleVector codeUnits(allocator.Adapter()); for (size_t i = 0; i < expr.getLength(); ++i) { @@ -1702,7 +1705,7 @@ ASTExpr *ASTParser::ProcessExprArraySubscriptExpr(MapleAllocator &allocator, con !static_cast(base)->isPartOfExplicitCast()) { arrayQualType = static_cast(base)->getSubExpr()->getType().getCanonicalType(); } - MIRType *arrayMirType = astFile->CvtType(arrayQualType); + MIRType *arrayMirType = astFile->CvtType(allocator, arrayQualType); if (arrayQualType->isVectorType()) { if (arrayMirType->GetSize() <= 16) { // vectortype size <= 128 bits. astArraySubscriptExpr->SetIsVectorType(true); @@ -1727,7 +1730,7 @@ ASTExpr *ASTParser::ProcessExprArraySubscriptExpr(MapleAllocator &allocator, con } astArraySubscriptExpr->SetCallAlloca(astBaseExpr != nullptr && astBaseExpr->IsCallAlloca()); astArraySubscriptExpr->SetBaseExpr(astBaseExpr); - auto *mirType = astFile->CvtType(exprType); + auto *mirType = astFile->CvtType(allocator, exprType); astArraySubscriptExpr->SetType(mirType); return astArraySubscriptExpr; } @@ -1997,7 +2000,7 @@ ASTExpr *ASTParser::ProcessExprMemberExpr(MapleAllocator &allocator, const clang return nullptr; } astMemberExpr->SetBaseExpr(baseExpr); - astMemberExpr->SetBaseType(astFile->CvtType(expr.getBase()->getType())); + astMemberExpr->SetBaseType(astFile->CvtType(allocator, expr.getBase()->getType())); auto memberName = expr.getMemberDecl()->getNameAsString(); if (memberName.empty()) { memberName = astFile->GetOrCreateMappedUnnamedName(*expr.getMemberDecl()); @@ -2006,7 +2009,7 @@ ASTExpr *ASTParser::ProcessExprMemberExpr(MapleAllocator &allocator, const clang SetFieldLenNameInMemberExpr(allocator, *astMemberExpr, *fieldDecl); astMemberExpr->SetMemberName(memberName); - astMemberExpr->SetMemberType(astFile->CvtType(expr.getMemberDecl()->getType())); + astMemberExpr->SetMemberType(astFile->CvtType(allocator, expr.getMemberDecl()->getType())); astMemberExpr->SetIsArrow(expr.isArrow()); uint64_t offsetBits = astFile->GetContext()->getFieldOffset(expr.getMemberDecl()); astMemberExpr->SetFiledOffsetBits(offsetBits); @@ -2023,7 +2026,7 @@ ASTExpr *ASTParser::ProcessExprDesignatedInitUpdateExpr(MapleAllocator &allocato } astDesignatedInitUpdateExpr->SetBaseExpr(baseExpr); clang::InitListExpr *initListExpr = expr.getUpdater(); - MIRType *initListType = astFile->CvtType(expr.getType()); + MIRType *initListType = astFile->CvtType(allocator, expr.getType()); astDesignatedInitUpdateExpr->SetInitListType(initListType); ASTExpr *updaterExpr = ProcessExpr(allocator, initListExpr); if (updaterExpr == nullptr) { @@ -2061,7 +2064,7 @@ ASTExpr *ASTParser::ProcessExprConditionalOperator(MapleAllocator &allocator, co } astConditionalOperator->SetCallAlloca(astFalseExpr->IsCallAlloca()); astConditionalOperator->SetFalseExpr(astFalseExpr); - astConditionalOperator->SetType(astFile->CvtType(expr.getType())); + astConditionalOperator->SetType(astFile->CvtType(allocator, expr.getType())); return astConditionalOperator; } @@ -2091,7 +2094,7 @@ ASTExpr *ASTParser::ProcessExprTypeTraitExpr(MapleAllocator &allocator, const cl } else { astIntegerLiteral->SetVal(0); } - astIntegerLiteral->SetType(astFile->CvtType(expr.getType())); + astIntegerLiteral->SetType(astFile->CvtType(allocator, expr.getType())); return astIntegerLiteral; } @@ -2123,10 +2126,10 @@ ASTExpr *ASTParser::ProcessExprConstantExpr(MapleAllocator &allocator, const cla ASTExpr *ASTParser::ProcessExprImaginaryLiteral(MapleAllocator &allocator, const clang::ImaginaryLiteral &expr) { clang::QualType complexQualType = expr.getType().getCanonicalType(); - MIRType *complexType = astFile->CvtType(complexQualType); + MIRType *complexType = astFile->CvtType(allocator, complexQualType); CHECK_NULL_FATAL(complexType); clang::QualType elemQualType = llvm::cast(complexQualType)->getElementType(); - MIRType *elemType = astFile->CvtType(elemQualType); + MIRType *elemType = astFile->CvtType(allocator, elemQualType); CHECK_NULL_FATAL(elemType); ASTImaginaryLiteral *astImaginaryLiteral = ASTDeclsBuilder::ASTExprBuilder(allocator); astImaginaryLiteral->SetComplexType(complexType); @@ -2178,9 +2181,9 @@ ASTExpr *ASTParser::ProcessExprCallExpr(MapleAllocator &allocator, const clang:: } astCallExpr->SetCalleeExpr(astCallee); // return - astCallExpr->SetType(astFile->CvtType(expr.getType())); + astCallExpr->SetType(astFile->CvtType(allocator, expr.getType())); // return var attrs - GenericAttrs returnVarAttrs; + MapleGenericAttrs returnVarAttrs(allocator); astFile->CollectFuncReturnVarAttrs(expr, returnVarAttrs); astCallExpr->SetReturnVarAttrs(returnVarAttrs); // args @@ -2193,7 +2196,7 @@ ASTExpr *ASTParser::ProcessExprCallExpr(MapleAllocator &allocator, const clang:: if (funcDecl != nullptr && IsNeedGetPointeeType(*funcDecl)) { type = GetPointeeType(*subExpr); } - arg->SetType(astFile->CvtType(type)); + arg->SetType(astFile->CvtType(allocator, type)); args.push_back(arg); } astCallExpr->SetArgs(args); @@ -2215,7 +2218,7 @@ ASTExpr *ASTParser::ProcessExprCallExpr(MapleAllocator &allocator, const clang:: if (funcName == kBuiltinAlloca || funcName == kAlloca || funcName == kBuiltinAllocaWithAlign) { astCallExpr->SetCallAlloca(true); } - GenericAttrs attrs = SolveFunctionAttributes(*funcDecl, funcName); + MapleGenericAttrs attrs = SolveFunctionAttributes(allocator, *funcDecl, funcName); astCallExpr->SetFuncName(funcName); astCallExpr->SetFuncAttrs(attrs.ConvertToFuncAttrs()); ASTFunc *astFunc = static_cast(ProcessDeclFunctionDecl(allocator, *funcDecl)); @@ -2325,8 +2328,8 @@ ASTExpr *ASTParser::ProcessExprCastExpr(MapleAllocator &allocator, const clang:: ASTCastExpr *astCastExpr = ASTDeclsBuilder::ASTExprBuilder(allocator); CHECK_FATAL(astCastExpr != nullptr, "astCastExpr is nullptr"); const clang::Type *type = nullptr; - MIRType *srcType = astFile->CvtType(expr.getSubExpr()->getType(), false, &type); - MIRType *toType = astFile->CvtType(expr.getType(), false, &type); + MIRType *srcType = astFile->CvtType(allocator, expr.getSubExpr()->getType(), false, &type); + MIRType *toType = astFile->CvtType(allocator, expr.getType(), false, &type); if (vlaType != nullptr) { *vlaType = type; } @@ -2384,18 +2387,18 @@ ASTExpr *ASTParser::ProcessExprCastExpr(MapleAllocator &allocator, const clang:: case clang::CK_FloatingComplexToBoolean: case clang::CK_IntegralComplexToBoolean: { clang::QualType qualType = expr.getType().getCanonicalType(); - astCastExpr->SetComplexType(astFile->CvtType(qualType)); + astCastExpr->SetComplexType(astFile->CvtType(allocator, qualType)); clang::QualType dstQualType = llvm::cast(qualType)->getElementType(); - astCastExpr->SetDstType(astFile->CvtType(dstQualType)); + astCastExpr->SetDstType(astFile->CvtType(allocator, dstQualType)); astCastExpr->SetNeededCvt(true); if (expr.getCastKind() == clang::CK_IntegralRealToComplex || expr.getCastKind() == clang::CK_FloatingRealToComplex) { astCastExpr->SetComplexCastKind(true); - astCastExpr->SetSrcType(astFile->CvtType(expr.getSubExpr()->getType().getCanonicalType())); + astCastExpr->SetSrcType(astFile->CvtType(allocator, expr.getSubExpr()->getType().getCanonicalType())); } else { clang::QualType subQualType = expr.getSubExpr()->getType().getCanonicalType(); clang::QualType srcQualType = llvm::cast(subQualType)->getElementType(); - astCastExpr->SetSrcType(astFile->CvtType(srcQualType)); + astCastExpr->SetSrcType(astFile->CvtType(allocator, srcQualType)); } break; } @@ -2435,7 +2438,7 @@ ASTExpr *ASTParser::ProcessExprDeclRefExpr(MapleAllocator &allocator, const clan const llvm::APSInt value = enumConst->getInitVal(); ASTIntegerLiteral *astIntegerLiteral = ASTDeclsBuilder::ASTExprBuilder(allocator); astIntegerLiteral->SetVal(value.getExtValue()); - astIntegerLiteral->SetType(astFile->CvtType(expr.getType())); + astIntegerLiteral->SetType(astFile->CvtType(allocator, expr.getType())); return astIntegerLiteral; } switch (expr.getStmtClass()) { @@ -2473,12 +2476,12 @@ ASTExpr *ASTParser::ProcessExprBinaryOperatorComplex(MapleAllocator &allocator, ASTBinaryOperatorExpr *astBinOpExpr = AllocBinaryOperatorExpr(allocator, bo); CHECK_FATAL(astBinOpExpr != nullptr, "astBinOpExpr is nullptr"); clang::QualType qualType = bo.getType(); - astBinOpExpr->SetRetType(astFile->CvtType(qualType)); + astBinOpExpr->SetRetType(astFile->CvtType(allocator, qualType)); ASTExpr *astRExpr = ProcessExpr(allocator, bo.getRHS()); ASTExpr *astLExpr = ProcessExpr(allocator, bo.getLHS()); clang::QualType elementType = llvm::cast( bo.getLHS()->getType().getCanonicalType())->getElementType(); - MIRType *elementMirType = astFile->CvtType(elementType); + MIRType *elementMirType = astFile->CvtType(allocator, elementType); astBinOpExpr->SetComplexElementType(elementMirType); auto *leftImage = ASTDeclsBuilder::ASTExprBuilder(allocator); leftImage->SetUOExpr(astLExpr); @@ -2505,7 +2508,7 @@ ASTExpr *ASTParser::SolvePointerOffsetOperation(MapleAllocator &allocator, const auto boType = bo.getType().getCanonicalType(); auto lhsType = bo.getLHS()->getType().getCanonicalType(); auto rhsType = bo.getRHS()->getType().getCanonicalType(); - auto boMirType = astFile->CvtType(boType); + auto boMirType = astFile->CvtType(allocator, boType); auto ptrType = lhsType->isPointerType() ? lhsType : rhsType; auto astSizeExpr = lhsType->isPointerType() ? &astRExpr : &astLExpr; if (ptrType->getPointeeType()->isVariableArrayType()) { @@ -2544,14 +2547,14 @@ ASTExpr *ASTParser::ProcessExprBinaryOperator(MapleAllocator &allocator, const c auto boType = bo.getType().getCanonicalType(); auto lhsType = bo.getLHS()->getType().getCanonicalType(); auto rhsType = bo.getRHS()->getType().getCanonicalType(); - auto leftMirType = astFile->CvtType(lhsType); - auto rightMirType = astFile->CvtType(rhsType); + auto leftMirType = astFile->CvtType(allocator, lhsType); + auto rightMirType = astFile->CvtType(allocator, rhsType); auto clangOpCode = bo.getOpcode(); - astBinOpExpr->SetRetType(astFile->CvtType(boType)); + astBinOpExpr->SetRetType(astFile->CvtType(allocator, boType)); if (bo.isCompoundAssignmentOp()) { clangOpCode = clang::BinaryOperator::getOpForCompoundAssignment(clangOpCode); clang::QualType res = llvm::cast(bo).getComputationLHSType().getCanonicalType(); - astBinOpExpr->SetRetType(astFile->CvtType(res)); + astBinOpExpr->SetRetType(astFile->CvtType(allocator, res)); } if ((boType->isAnyComplexType() && (clang::BinaryOperator::isAdditiveOp(clangOpCode) || clang::BinaryOperator::isMultiplicativeOp(clangOpCode))) || @@ -2638,6 +2641,13 @@ ASTExpr *ASTParser::ProcessExprCStyleCastExpr(MapleAllocator &allocator, const c CHECK_FATAL(astCastExpr != nullptr, "astCastExpr is nullptr"); const clang::Type *type = nullptr; astCastExpr = static_cast(ProcessExprCastExpr(allocator, castExpr, &type)); + if (castExpr.getType().getCanonicalType()->isUnionType() && castExpr.getTargetUnionField() != nullptr) { + MIRType *targetMIRType = astFile->CvtType(allocator, castExpr.getType()); + std::string fieldName = castExpr.getTargetUnionField()->getNameAsString(); + astCastExpr->SetPartOfCastType(targetMIRType); + astCastExpr->SetTargetFieldName(fieldName); + astCastExpr->SetPartOfExplicitCast(true); + } if (type != nullptr) { ParserExprVLASizeExpr(allocator, *type, *astCastExpr); } @@ -2658,7 +2668,7 @@ ASTExpr *ASTParser::ProcessExprArrayInitIndexExpr(MapleAllocator &allocator, const clang::ArrayInitIndexExpr &arrInitIndexExpr) { ASTArrayInitIndexExpr *astExpr = ASTDeclsBuilder::ASTExprBuilder(allocator); CHECK_FATAL(astExpr != nullptr, "astCastExpr is nullptr"); - astExpr->SetPrimType(astFile->CvtType(arrInitIndexExpr.getType())); + astExpr->SetPrimType(astFile->CvtType(allocator, arrInitIndexExpr.getType())); astExpr->SetValueStr("0"); return astExpr; } @@ -2691,15 +2701,16 @@ void ASTParser::SetAtomExprValType(MapleAllocator &allocator, const clang::Atomi auto val1Expr = atomicExpr.getVal1(); astExpr.SetValExpr1(ProcessExpr(allocator, val1Expr)); const clang::QualType val1Type = GetPointeeType(*val1Expr); - astExpr.SetVal1Type(astFile->CvtType(val1Type)); + astExpr.SetVal1Type(astFile->CvtType(allocator, val1Type)); /* only atomic_load and atomic_store need to save second param type, for second param type is a pointer */ if (atomicExpr.getOp() == clang::AtomicExpr::AO__atomic_load || atomicExpr.getOp() == clang::AtomicExpr::AO__atomic_store) { auto firstType = val1Expr->getType(); val1Expr = GetAtomValExpr(val1Expr); auto secondType = val1Expr->getType(); - astExpr.SetFirstParamType(astFile->CvtType(firstType->isPointerType() ? firstType->getPointeeType() : firstType)); - astExpr.SetSecondParamType(astFile->CvtType(secondType->isPointerType() ? + astExpr.SetFirstParamType(astFile->CvtType(allocator, firstType->isPointerType() ? firstType->getPointeeType() : + firstType)); + astExpr.SetSecondParamType(astFile->CvtType(allocator, secondType->isPointerType() ? secondType->getPointeeType() : secondType)); } else if (atomicExpr.getOp() == clang::AtomicExpr::AO__atomic_compare_exchange || atomicExpr.getOp() == clang::AtomicExpr::AO__atomic_compare_exchange_n) { @@ -2718,16 +2729,19 @@ void ASTParser::SetAtomExchangeType(MapleAllocator &allocator, const clang::Atom auto val1Expr = atomicExpr.getVal1(); astExpr.SetValExpr2(ProcessExpr(allocator, val2Expr)); const clang::QualType val2Type = GetPointeeType(*val2Expr); - astExpr.SetVal2Type(astFile->CvtType(val2Type)); + astExpr.SetVal2Type(astFile->CvtType(allocator, val2Type)); auto firstType = val2Expr->getType(); val1Expr = GetAtomValExpr(val1Expr); auto secondType = val1Expr->getType(); val2Expr = GetAtomValExpr(val2Expr); auto thirdType = val2Expr->getType(); - astExpr.SetFirstParamType(astFile->CvtType(firstType->isPointerType() ? firstType->getPointeeType() : firstType)); - astExpr.SetSecondParamType(astFile->CvtType(secondType->isPointerType() ? secondType->getPointeeType() : secondType)); - astExpr.SetThirdParamType(astFile->CvtType(thirdType->isPointerType() ? thirdType->getPointeeType() : thirdType)); + astExpr.SetFirstParamType(astFile->CvtType(allocator, firstType->isPointerType() ? firstType->getPointeeType() : + firstType)); + astExpr.SetSecondParamType(astFile->CvtType(allocator, secondType->isPointerType() ? secondType->getPointeeType() : + secondType)); + astExpr.SetThirdParamType(astFile->CvtType(allocator, thirdType->isPointerType() ? thirdType->getPointeeType() : + thirdType)); } ASTExpr *ASTParser::ProcessExprAtomicExpr(MapleAllocator &allocator, @@ -2735,16 +2749,16 @@ ASTExpr *ASTParser::ProcessExprAtomicExpr(MapleAllocator &allocator, ASTAtomicExpr *astExpr = ASTDeclsBuilder::ASTExprBuilder(allocator); CHECK_FATAL(astExpr != nullptr, "astCastExpr is nullptr"); astExpr->SetObjExpr(ProcessExpr(allocator, atomicExpr.getPtr())); - astExpr->SetType(astFile->CvtType(atomicExpr.getPtr()->getType())); + astExpr->SetType(astFile->CvtType(allocator, atomicExpr.getPtr()->getType())); const clang::QualType firstArgPointeeType = GetPointeeType(*atomicExpr.getPtr()); - astExpr->SetRefType(astFile->CvtType(firstArgPointeeType)); + astExpr->SetRefType(astFile->CvtType(allocator, firstArgPointeeType)); if (atomicExpr.getOp() != clang::AtomicExpr::AO__atomic_load_n) { SetAtomExprValType(allocator, atomicExpr, *astExpr); if (atomicExpr.getOp() == clang::AtomicExpr::AO__atomic_exchange) { SetAtomExchangeType(allocator, atomicExpr, *astExpr); } } else { - astExpr->SetVal1Type(astFile->CvtType(firstArgPointeeType)); + astExpr->SetVal1Type(astFile->CvtType(allocator, firstArgPointeeType)); } astExpr->SetOrderExpr(ProcessExpr(allocator, atomicExpr.getOrder())); @@ -2908,11 +2922,11 @@ ASTDecl *ASTParser::ProcessDeclRecordDecl(MapleAllocator &allocator, const clang std::stringstream recName; clang::QualType qType = decl.getTypeForDecl()->getCanonicalTypeInternal(); astFile->EmitTypeName(*qType->getAs(), recName); - MIRType *recType = astFile->CvtType(qType); + MIRType *recType = astFile->CvtType(allocator, qType); if (recType == nullptr) { return nullptr; } - GenericAttrs attrs; + MapleGenericAttrs attrs(allocator); astFile->CollectRecordAttrs(decl, attrs); TypeAttrs typeAttrs = attrs.ConvertToTypeAttrs(); astFile->CollectTypeAttrs(decl, typeAttrs); @@ -2992,8 +3006,9 @@ MapleVector ASTParser::SolveFuncParameterDecls(MapleAllocator &allocat return paramDecls; } -GenericAttrs ASTParser::SolveFunctionAttributes(const clang::FunctionDecl &funcDecl, std::string &funcName) const { - GenericAttrs attrs; +MapleGenericAttrs ASTParser::SolveFunctionAttributes(MapleAllocator &allocator, const clang::FunctionDecl &funcDecl, + std::string &funcName) const { + MapleGenericAttrs attrs(allocator); astFile->CollectFuncAttrs(funcDecl, attrs, kPublic); // for inline optimize if ((attrs.GetAttr(GENATTR_static) || ASTUtil::IsFuncMustBeDeleted(attrs)) && @@ -3029,61 +3044,74 @@ MapleVector ASTParser::CvtFuncTypeAndRetType(MapleAllocator &allocator const clang::QualType &qualType) const { MapleVector typeDescIn(allocator.Adapter()); clang::QualType funcQualType = funcDecl.getType(); - MIRType *mirFuncType = astFile->CvtType(funcQualType); + MIRType *mirFuncType = astFile->CvtType(allocator, funcQualType); typeDescIn.push_back(mirFuncType); - MIRType *retType = astFile->CvtType(qualType); + MIRType *retType = astFile->CvtType(allocator, qualType); CHECK_FATAL(retType != nullptr, "retType cvt failed, type is %s", qualType.getAsString().c_str()); typeDescIn.push_back(retType); return typeDescIn; } -ASTDecl *ASTParser::ProcessDeclFunctionDecl(MapleAllocator &allocator, const clang::FunctionDecl &decl, - bool needBody) { - ASTFunc *astFunc = static_cast(ASTDeclsBuilder::GetInstance(allocator).GetASTDecl(decl.getID())); +ASTFunc *ASTParser::BuildAstFunc(MapleAllocator &allocator, const clang::FunctionDecl &funcDecl, + std::list &implicitStmts, bool needDefDeMangledVer, bool needBody) { + ASTFunc *astFunc = static_cast(ASTDeclsBuilder::GetInstance(allocator).GetASTDecl(funcDecl.getID())); + MapleVector typeDescIn = CvtFuncTypeAndRetType(allocator, funcDecl, funcDecl.getReturnType()); + std::string funcName = GetFuncNameFromFuncDecl(funcDecl); + if (needDefDeMangledVer || astFunc == nullptr) { + MapleVector paramDecls = SolveFuncParameterDecls(allocator, funcDecl, typeDescIn, + implicitStmts, needBody); + MapleGenericAttrs attrs = SolveFunctionAttributes(allocator, funcDecl, funcName); + bool isInlineDefinition = ASTUtil::IsFuncMustBeDeleted(attrs) && FEOptions::GetInstance().GetFuncInlineSize() != 0; + std::string originFuncName = GetFuncNameFromFuncDecl(funcDecl); + if (needDefDeMangledVer && isInlineDefinition) { + astFunc = ASTDeclsBuilder::GetInstance(allocator).ASTFuncBuilder(allocator, fileName, originFuncName, + originFuncName, typeDescIn, attrs, paramDecls, INT64_MAX); + } else if (astFunc == nullptr) { + astFunc = ASTDeclsBuilder::GetInstance(allocator).ASTFuncBuilder(allocator, fileName, originFuncName, funcName, + typeDescIn, attrs, paramDecls, funcDecl.getID()); + } + } else { + (void)SolveFuncParameterDecls(allocator, funcDecl, typeDescIn, implicitStmts, needBody); + } + return astFunc; +} + +ASTDecl *ASTParser::ProcessDeclFunctionDecl(MapleAllocator &allocator, const clang::FunctionDecl &funcDecl, + bool needBody, bool needDefDeMangledVer) { + ASTFunc *astFunc = static_cast(ASTDeclsBuilder::GetInstance(allocator).GetASTDecl(funcDecl.getID())); bool needParseBody = needBody && astFunc != nullptr && !astFunc->HasCode(); - if (astFunc != nullptr && !needParseBody) { + if (!needDefDeMangledVer && astFunc != nullptr && !needParseBody) { return astFunc; } - std::string funcName = GetFuncNameFromFuncDecl(decl); - clang::QualType qualType = decl.getReturnType(); - MapleVector typeDescIn = CvtFuncTypeAndRetType(allocator, decl, qualType); + clang::QualType qualType = funcDecl.getReturnType(); std::list implicitStmts; - if (astFunc == nullptr) { - MapleVector paramDecls = SolveFuncParameterDecls(allocator, decl, typeDescIn, - implicitStmts, needBody); - GenericAttrs attrs = SolveFunctionAttributes(decl, funcName); - astFunc = ASTDeclsBuilder::GetInstance(allocator).ASTFuncBuilder( - allocator, fileName, GetFuncNameFromFuncDecl(decl), funcName, typeDescIn, attrs, paramDecls, - decl.getID()); - } else { - (void)SolveFuncParameterDecls(allocator, decl, typeDescIn, implicitStmts, needBody); - } + astFunc = BuildAstFunc(allocator, funcDecl, implicitStmts, needDefDeMangledVer, needBody); CHECK_FATAL(astFunc != nullptr, "astFunc is nullptr"); FE_INFO_LEVEL(FEOptions::kDumpLevelInfoDetail, "ASTParser::ProcessDeclFunctionDecl for %s, %lld", astFunc->GetName().c_str(), astFunc->GetFuncId()); - clang::SectionAttr *sa = decl.getAttr(); + clang::SectionAttr *sa = funcDecl.getAttr(); if (sa != nullptr && !sa->isImplicit()) { astFunc->SetSectionAttr(sa->getName().str()); } /* create typealias for func return type */ if (FEOptions::GetInstance().IsDbgFriendly()) { - MIRType *sourceType = astFile->CvtSourceType(qualType); + MIRType *sourceType = astFile->CvtSourceType(allocator, qualType); astFunc->SetSourceType(sourceType); } // collect EnhanceC func attr - ProcessNonnullFuncAttrs(decl, *astFunc); - ProcessBoundaryFuncAttrs(allocator, decl, *astFunc); - ProcessBoundaryParamAttrs(allocator, decl, *astFunc); - clang::WeakRefAttr *weakrefAttr = decl.getAttr(); + ProcessNonnullFuncAttrs(funcDecl, *astFunc); + ProcessBoundaryFuncAttrs(allocator, funcDecl, *astFunc); + ProcessBoundaryParamAttrs(allocator, funcDecl, *astFunc); + clang::WeakRefAttr *weakrefAttr = funcDecl.getAttr(); if (weakrefAttr != nullptr) { astFunc->SetWeakrefAttr(std::pair{true, weakrefAttr->getAliasee().str()}); } - if (decl.hasBody() && needBody) { - if (SolveFunctionBody(allocator, decl, *astFunc, implicitStmts) == nullptr) { + if (funcDecl.hasBody() && needBody) { + if (SolveFunctionBody(allocator, funcDecl, *astFunc, implicitStmts) == nullptr) { return nullptr; } } - SET_LOC(astFunc, decl, astFile); + SET_LOC(astFunc, funcDecl, astFile); return astFunc; } @@ -3126,7 +3154,7 @@ ASTDecl *ASTParser::ProcessDeclFieldDecl(MapleAllocator &allocator, const clang: fieldName = astFile->GetOrCreateMappedUnnamedName(decl); } CHECK_FATAL(!fieldName.empty(), "fieldName is empty"); - MIRType *fieldType = astFile->CvtType(qualType); + MIRType *fieldType = astFile->CvtType(allocator, qualType); if (fieldType == nullptr) { return nullptr; } @@ -3136,7 +3164,7 @@ ASTDecl *ASTParser::ProcessDeclFieldDecl(MapleAllocator &allocator, const clang: auto bfTypeIdx = GlobalTables::GetTypeTable().GetOrCreateMIRType(&mirBFType); fieldType = GlobalTables::GetTypeTable().GetTypeFromTyIdx(bfTypeIdx); } - GenericAttrs attrs; + MapleGenericAttrs attrs(allocator); bool isAligned = false; astFile->CollectFieldAttrs(decl, attrs, kNone); // one elem vector type @@ -3162,7 +3190,7 @@ ASTDecl *ASTParser::ProcessDeclFieldDecl(MapleAllocator &allocator, const clang: ProcessBoundaryFuncPtrAttrs(allocator, *valueDecl, *fieldDecl); } if (FEOptions::GetInstance().IsDbgFriendly()) { - MIRType *sourceType = astFile->CvtSourceType(qualType); + MIRType *sourceType = astFile->CvtSourceType(allocator, qualType); fieldDecl->SetSourceType(sourceType); } return fieldDecl; @@ -3232,11 +3260,11 @@ ASTDecl *ASTParser::ProcessDeclVarDecl(MapleAllocator &allocator, const clang::V } CheckVarNameValid(varName); clang::QualType qualType = decl.getType(); - MIRType *varType = astFile->CvtType(qualType); + MIRType *varType = astFile->CvtType(allocator, qualType); if (varType == nullptr) { return nullptr; } - GenericAttrs attrs; + MapleGenericAttrs attrs(allocator); astFile->CollectVarAttrs(decl, attrs, kNone); // for inline optimize if (attrs.GetAttr(GENATTR_static) && FEOptions::GetInstance().GetFuncInlineSize() != 0) { @@ -3256,7 +3284,7 @@ ASTDecl *ASTParser::ProcessDeclVarDecl(MapleAllocator &allocator, const clang::V astVar = ASTDeclsBuilder::GetInstance(allocator).ASTVarBuilder( allocator, fileName, varName, MapleVector({varType}, allocator.Adapter()), attrs, decl.getID()); if (FEOptions::GetInstance().IsDbgFriendly()) { - MIRType *sourceType = astFile->CvtSourceType(qualType); + MIRType *sourceType = astFile->CvtSourceType(allocator, qualType); astVar->SetSourceType(sourceType); } astVar->SetIsMacro(decl.getLocation().isMacroID()); @@ -3308,7 +3336,7 @@ ASTDecl *ASTParser::ProcessDeclParmVarDecl(MapleAllocator &allocator, const clan parmName = FEUtils::GetSequentialName("arg|"); } } - MIRType *paramType = astFile->CvtType(parmQualType); + MIRType *paramType = astFile->CvtType(allocator, parmQualType); if (paramType == nullptr) { return nullptr; } @@ -3323,7 +3351,7 @@ ASTDecl *ASTParser::ProcessDeclParmVarDecl(MapleAllocator &allocator, const clan paramType = FEUtils::IsInteger(paramType->GetPrimType()) ? GlobalTables::GetTypeTable().GetInt32() : GlobalTables::GetTypeTable().GetDouble(); } - GenericAttrs attrs; + MapleGenericAttrs attrs(allocator); astFile->CollectAttrs(decl, attrs, kNone); if (LibAstFile::IsOneElementVector(parmQualType)) { attrs.SetAttr(GENATTR_oneelem_simd); @@ -3333,7 +3361,7 @@ ASTDecl *ASTParser::ProcessDeclParmVarDecl(MapleAllocator &allocator, const clan parmVar->SetIsParam(true); parmVar->SetPromotedType(promotedType); if (FEOptions::GetInstance().IsDbgFriendly()) { - MIRType *sourceType = astFile->CvtSourceType(parmQualType); + MIRType *sourceType = astFile->CvtSourceType(allocator, parmQualType); parmVar->SetSourceType(sourceType); } const auto *valueDecl = llvm::dyn_cast(&decl); @@ -3360,14 +3388,14 @@ ASTDecl *ASTParser::ProcessDeclEnumDecl(MapleAllocator &allocator, const clang:: if (astEnum != nullptr) { return astEnum; } - GenericAttrs attrs; + MapleGenericAttrs attrs(allocator); astFile->CollectAttrs(*enumDecl, attrs, kNone); std::string enumName = astFile->GetDeclName(*enumDecl); MIRType *mirType; if (enumDecl->getPromotionType().isNull()) { mirType = GlobalTables::GetTypeTable().GetInt32(); } else { - mirType = astFile->CvtType(enumDecl->getPromotionType()); + mirType = astFile->CvtType(allocator, enumDecl->getPromotionType()); } astEnum = ASTDeclsBuilder::GetInstance(allocator).ASTLocalEnumDeclBuilder(allocator, fileName, enumName, MapleVector({mirType}, allocator.Adapter()), attrs, enumDecl->getID()); @@ -3391,10 +3419,10 @@ ASTDecl *ASTParser::ProcessDeclEnumConstantDecl(MapleAllocator &allocator, const if (astConst != nullptr) { return astConst; } - GenericAttrs attrs; + MapleGenericAttrs attrs(allocator); astFile->CollectAttrs(decl, attrs, kNone); const std::string &varName = decl.getNameAsString(); - MIRType *mirType = astFile->CvtType(decl.getType()); + MIRType *mirType = astFile->CvtType(allocator, decl.getType()); CHECK_NULL_FATAL(mirType); astConst = ASTDeclsBuilder::GetInstance(allocator).ASTEnumConstBuilder( allocator, fileName, varName, MapleVector({mirType}, allocator.Adapter()), attrs, decl.getID()); @@ -3411,10 +3439,10 @@ ASTDecl *ASTParser::ProcessDeclTypedefDecl(MapleAllocator &allocator, const clan return astTypedef; } std::string typedefName = astFile->GetDeclName(decl); - GenericAttrs attrs; + MapleGenericAttrs attrs(allocator); astFile->CollectAttrs(decl, attrs, kNone); clang::QualType underlyTy = decl.getUnderlyingType(); - MIRType *type = astFile->CvtType(underlyTy, true); + MIRType *type = astFile->CvtType(allocator, underlyTy, true); CHECK_NULL_FATAL(type); astTypedef = ASTDeclsBuilder::GetInstance(allocator).ASTTypedefBuilder( allocator, fileName, typedefName, MapleVector({type}, allocator.Adapter()), attrs, decl.getID()); @@ -3526,6 +3554,12 @@ bool ASTParser::RetrieveFuncs(MapleAllocator &allocator) { if (af == nullptr) { return false; } + if (af->GetName() != af->GetOriginalName() && funcDecl != nullptr) { + ASTFunc *originFunc = static_cast(ProcessDeclFunctionDecl(allocator, *funcDecl, false, + FEOptions::GetInstance().GetWPAA())); + (void)astFuncs.emplace_back(originFunc); + originFunc->SetGlobal(true); + } af->SetGlobal(true); astFuncs.emplace_back(af); } diff --git a/src/hir2mpl/ast_input/clang/src/ast_parser_builting_func.cpp b/src/hir2mpl/ast_input/clang/src/ast_parser_builting_func.cpp index 7d81bd14f8..099f4fe5bb 100644 --- a/src/hir2mpl/ast_input/clang/src/ast_parser_builting_func.cpp +++ b/src/hir2mpl/ast_input/clang/src/ast_parser_builting_func.cpp @@ -986,7 +986,7 @@ ASTExpr *ASTParser::ParseBuiltinConstantP(MapleAllocator &allocator, const clang } ASTIntegerLiteral *astIntegerLiteral = ASTDeclsBuilder::ASTExprBuilder(allocator); astIntegerLiteral->SetVal(constP); - astIntegerLiteral->SetType(astFile->CvtType(expr.getType())); + astIntegerLiteral->SetType(astFile->CvtType(allocator, expr.getType())); return astIntegerLiteral; } @@ -1002,7 +1002,7 @@ ASTExpr *ASTParser::ParseBuiltinIsinfsign(MapleAllocator &allocator, const clang (void)allocator; ss.clear(); ss.str(std::string()); - MIRType *mirType = astFile->CvtType(expr.getArg(0)->getType()); + MIRType *mirType = astFile->CvtType(allocator, expr.getArg(0)->getType()); if (mirType != nullptr) { PrimType type = mirType->GetPrimType(); if (type == PTY_f128) { @@ -1129,7 +1129,7 @@ ASTExpr *ASTParser::ParseBuiltinSignBitf(MapleAllocator &allocator, const clang: ASTExpr *ASTParser::ParseBuiltinSignBitl(MapleAllocator &allocator, const clang::CallExpr &expr, std::stringstream &ss, ASTCallExpr &astCallExpr) const { (void)astCallExpr; - if (astFile->CvtType(expr.getArg(0)->getType())->GetPrimType() != PTY_f128) { + if (astFile->CvtType(allocator, expr.getArg(0)->getType())->GetPrimType() != PTY_f128) { return ProcessBuiltinFuncByName(allocator, expr, ss, "__signbit"); } return ProcessBuiltinFuncByName(allocator, expr, ss, "__signbitl"); diff --git a/src/hir2mpl/ast_input/clang/src/ast_stmt.cpp b/src/hir2mpl/ast_input/clang/src/ast_stmt.cpp index 153d8d04eb..bff1e7e871 100644 --- a/src/hir2mpl/ast_input/clang/src/ast_stmt.cpp +++ b/src/hir2mpl/ast_input/clang/src/ast_stmt.cpp @@ -99,6 +99,7 @@ std::list ASTReturnStmt::Emit2FEStmtImpl() const { } FEIRBuilder::EmitVLACleanupStmts(FEManager::GetCurrentFEFunction(), stmts); UniqueFEIRStmt stmt = std::make_unique(std::move(feExpr)); + stmt->SetActulReturnStmt(true); stmts.emplace_back(std::move(stmt)); return stmts; } diff --git a/src/hir2mpl/ast_input/clang/src/ast_struct2fe_helper.cpp b/src/hir2mpl/ast_input/clang/src/ast_struct2fe_helper.cpp index 78f10b7ec6..796db04bf5 100644 --- a/src/hir2mpl/ast_input/clang/src/ast_struct2fe_helper.cpp +++ b/src/hir2mpl/ast_input/clang/src/ast_struct2fe_helper.cpp @@ -298,7 +298,7 @@ void ASTFunc2FEHelper::SolveFunctionArguments() const { if (firstArgRet) { ASTDecl *returnParamVar = ASTDeclsBuilder::GetInstance(allocator).ASTVarBuilder(allocator, MapleString("", allocator.GetMemPool()), - "first_arg_return", MapleVector({}, allocator.Adapter()), GenericAttrs()); + "first_arg_return", MapleVector({}, allocator.Adapter()), MapleGenericAttrs(allocator)); returnParamVar->SetIsParam(true); (void)paramDecls.insert(paramDecls.cbegin(), returnParamVar); } diff --git a/src/hir2mpl/ast_input/common/include/ast_decl.h b/src/hir2mpl/ast_input/common/include/ast_decl.h index daad91f4ec..80a265a025 100644 --- a/src/hir2mpl/ast_input/common/include/ast_decl.h +++ b/src/hir2mpl/ast_input/common/include/ast_decl.h @@ -45,14 +45,15 @@ struct BoundaryInfo { class ASTDecl { public: - ASTDecl(const MapleString &srcFile, const MapleString &nameIn, const MapleVector &typeDescIn) - : isGlobalDecl(false), srcFileName(srcFile), name(nameIn), typeDesc(typeDescIn) {} + ASTDecl(MapleAllocator &allocatorIn, const MapleString &srcFile, const MapleString &nameIn, const + MapleVector &typeDescIn) + : isGlobalDecl(false), srcFileName(srcFile), name(nameIn), typeDesc(typeDescIn), genAttrs(allocatorIn) {} virtual ~ASTDecl() = default; const std::string GetSrcFileName() const; const std::string GetName() const; const MapleVector &GetTypeDesc() const; void SetTypeDesc(const MapleVector &typeVecIn); - GenericAttrs GetGenericAttrs() const { + MapleGenericAttrs GetGenericAttrs() const { return genAttrs; } @@ -197,7 +198,7 @@ class ASTDecl { MapleString name; MapleVector typeDesc; - GenericAttrs genAttrs; + MapleGenericAttrs genAttrs; Loc loc = { 0, 0, 0 }; uint32 isMacroID = false; DeclKind declKind = kASTDecl; @@ -211,9 +212,9 @@ class ASTDecl { class ASTField : public ASTDecl { public: - ASTField(const MapleString &srcFile, const MapleString &nameIn, const MapleVector &typeDescIn, - const GenericAttrs &genAttrsIn, bool isAnonymous = false) - : ASTDecl(srcFile, nameIn, typeDescIn), isAnonymousField(isAnonymous) { + ASTField(MapleAllocator &allocatorIn, const MapleString &srcFile, const MapleString &nameIn, + const MapleVector &typeDescIn, const MapleGenericAttrs &genAttrsIn, bool isAnonymous = false) + : ASTDecl(allocatorIn, srcFile, nameIn, typeDescIn), isAnonymousField(isAnonymous) { genAttrs = genAttrsIn; declKind = kASTField; } @@ -228,10 +229,13 @@ class ASTField : public ASTDecl { class ASTFunc : public ASTDecl { public: - ASTFunc(const MapleString &srcFile, const MapleString &originalNameIn, const MapleString &nameIn, - const MapleVector &typeDescIn, const GenericAttrs &genAttrsIn, + ASTFunc(MapleAllocator &allocatorIn, const MapleString &srcFile, const MapleString &originalNameIn, + const MapleString &nameIn, const MapleVector &typeDescIn, const MapleGenericAttrs &genAttrsIn, const MapleVector ¶mDeclsIn, int64 funcId) - : ASTDecl(srcFile, nameIn, typeDescIn), compound(nullptr), paramDecls(paramDeclsIn), funcId(funcId), + : ASTDecl(allocatorIn, srcFile, nameIn, typeDescIn), + compound(nullptr), + paramDecls(paramDeclsIn), + funcId(funcId), originalName(originalNameIn) { genAttrs = genAttrsIn; declKind = kASTFunc; @@ -248,7 +252,7 @@ class ASTFunc : public ASTDecl { std::vector> GenArgVarList() const; std::list EmitASTStmtToFEIR() const; std::list InitArgsBoundaryVar(MIRFunction &mirFunc) const; - void InsertBoundaryCheckingInRet(std::list &stmts) const; + void SaveReturnBoundarySizeInHeadFunc(std::list &stmts) const; void SetWeakrefAttr(const std::pair &attr) { weakrefAttr = attr; @@ -285,8 +289,8 @@ class ASTFunc : public ASTDecl { class ASTStruct : public ASTDecl { public: ASTStruct(MapleAllocator &allocatorIn, const MapleString &srcFile, const MapleString &nameIn, - const MapleVector &typeDescIn, const GenericAttrs &genAttrsIn) - : ASTDecl(srcFile, nameIn, typeDescIn), + const MapleVector &typeDescIn, const MapleGenericAttrs &genAttrsIn) + : ASTDecl(allocatorIn, srcFile, nameIn, typeDescIn), isUnion(false), fields(allocatorIn.Adapter()), methods(allocatorIn.Adapter()) { genAttrs = genAttrsIn; declKind = kASTStruct; @@ -330,9 +334,9 @@ class ASTStruct : public ASTDecl { class ASTVar : public ASTDecl { public: - ASTVar(const MapleString &srcFile, const MapleString &nameIn, const MapleVector &typeDescIn, - const GenericAttrs &genAttrsIn) - : ASTDecl(srcFile, nameIn, typeDescIn) { + ASTVar(MapleAllocator &allocatorIn, const MapleString &srcFile, const MapleString &nameIn, + const MapleVector &typeDescIn, const MapleGenericAttrs &genAttrsIn) + : ASTDecl(allocatorIn, srcFile, nameIn, typeDescIn) { genAttrs = genAttrsIn; declKind = kASTVar; } @@ -387,7 +391,8 @@ class ASTVar : public ASTDecl { class ASTFileScopeAsm : public ASTDecl { public: ASTFileScopeAsm(MapleAllocator &allocatorIn, const MapleString &srcFile) - : ASTDecl(srcFile, MapleString("", allocatorIn.GetMemPool()), MapleVector(allocatorIn.Adapter())) { + : ASTDecl(allocatorIn, srcFile, MapleString("", allocatorIn.GetMemPool()), + MapleVector(allocatorIn.Adapter())) { declKind = kASTFileScopeAsm; } ~ASTFileScopeAsm() override = default; @@ -406,9 +411,9 @@ class ASTFileScopeAsm : public ASTDecl { class ASTEnumConstant : public ASTDecl { public: - ASTEnumConstant(const MapleString &srcFile, const MapleString &nameIn, const MapleVector &typeDescIn, - const GenericAttrs &genAttrsIn) - : ASTDecl(srcFile, nameIn, typeDescIn) { + ASTEnumConstant(MapleAllocator &allocatorIn, const MapleString &srcFile, const MapleString &nameIn, + const MapleVector &typeDescIn, const MapleGenericAttrs &genAttrsIn) + : ASTDecl(allocatorIn, srcFile, nameIn, typeDescIn) { genAttrs = genAttrsIn; declKind = kASTEnumConstant; } @@ -425,8 +430,8 @@ class ASTEnumConstant : public ASTDecl { class ASTEnumDecl : public ASTDecl { public: ASTEnumDecl(MapleAllocator &allocatorIn, const MapleString &srcFile, const MapleString &nameIn, - const MapleVector &typeDescIn, const GenericAttrs &genAttrsIn) - : ASTDecl(srcFile, nameIn, typeDescIn), consts(allocatorIn.Adapter()) { + const MapleVector &typeDescIn, const MapleGenericAttrs &genAttrsIn) + : ASTDecl(allocatorIn, srcFile, nameIn, typeDescIn), consts(allocatorIn.Adapter()) { genAttrs = genAttrsIn; declKind = kASTEnumDecl; } @@ -448,9 +453,9 @@ class ASTEnumDecl : public ASTDecl { class ASTTypedefDecl : public ASTDecl { public: - ASTTypedefDecl(const MapleString &srcFile, const MapleString &nameIn, - const MapleVector &typeDescIn, const GenericAttrs &genAttrsIn) - : ASTDecl(srcFile, nameIn, typeDescIn) { + ASTTypedefDecl(MapleAllocator &allocatorIn, const MapleString &srcFile, const MapleString &nameIn, + const MapleVector &typeDescIn, const MapleGenericAttrs &genAttrsIn) + : ASTDecl(allocatorIn, srcFile, nameIn, typeDescIn) { genAttrs = genAttrsIn; declKind = kASTTypedefDecl; } diff --git a/src/hir2mpl/ast_input/common/include/ast_decl_builder.h b/src/hir2mpl/ast_input/common/include/ast_decl_builder.h index 5cdf163a8a..07df73327c 100644 --- a/src/hir2mpl/ast_input/common/include/ast_decl_builder.h +++ b/src/hir2mpl/ast_input/common/include/ast_decl_builder.h @@ -34,42 +34,42 @@ class ASTDeclsBuilder { declesTable.clear(); } - ASTDecl *ASTDeclBuilder(const MapleAllocator &allocator, const MapleString &srcFile, + ASTDecl *ASTDeclBuilder(MapleAllocator &allocator, const MapleString &srcFile, const std::string &nameIn, const MapleVector &typeDescIn, int64 id = INT64_MAX) { MapleString nameStr(nameIn, allocator.GetMemPool()); if (id == INT64_MAX) { - return allocator.GetMemPool()->New(srcFile, nameStr, typeDescIn); // for temp decl + return allocator.GetMemPool()->New(allocator, srcFile, nameStr, typeDescIn); // for temp decl } else if (declesTable[id] == nullptr) { - declesTable[id] = allocator.GetMemPool()->New(srcFile, nameStr, typeDescIn); + declesTable[id] = allocator.GetMemPool()->New(allocator, srcFile, nameStr, typeDescIn); } return declesTable[id]; } - ASTVar *ASTVarBuilder(const MapleAllocator &allocator, const MapleString &srcFile, const std::string &varName, - const MapleVector &desc, const GenericAttrs &genAttrsIn, int64 id = INT64_MAX) { + ASTVar *ASTVarBuilder(MapleAllocator &allocator, const MapleString &srcFile, const std::string &varName, + const MapleVector &desc, const MapleGenericAttrs &genAttrsIn, int64 id = INT64_MAX) { MapleString varNameStr(varName, allocator.GetMemPool()); if (id == INT64_MAX) { - return allocator.GetMemPool()->New(srcFile, varNameStr, desc, genAttrsIn); + return allocator.GetMemPool()->New(allocator, srcFile, varNameStr, desc, genAttrsIn); } else if (declesTable[id] == nullptr) { - declesTable[id] = allocator.GetMemPool()->New(srcFile, varNameStr, desc, genAttrsIn); + declesTable[id] = allocator.GetMemPool()->New(allocator, srcFile, varNameStr, desc, genAttrsIn); } return static_cast(declesTable[id]); } - ASTEnumConstant *ASTEnumConstBuilder(const MapleAllocator &allocator, const MapleString &srcFile, + ASTEnumConstant *ASTEnumConstBuilder(MapleAllocator &allocator, const MapleString &srcFile, const std::string &varName, const MapleVector &desc, - const GenericAttrs &genAttrsIn, int64 id = INT64_MAX) { + const MapleGenericAttrs &genAttrsIn, int64 id = INT64_MAX) { MapleString varNameStr(varName, allocator.GetMemPool()); if (id == INT64_MAX) { - return allocator.GetMemPool()->New(srcFile, varNameStr, desc, genAttrsIn); + return allocator.GetMemPool()->New(allocator, srcFile, varNameStr, desc, genAttrsIn); } else if (declesTable[id] == nullptr) { - declesTable[id] = allocator.GetMemPool()->New(srcFile, varNameStr, desc, genAttrsIn); + declesTable[id] = allocator.GetMemPool()->New(allocator, srcFile, varNameStr, desc, genAttrsIn); } return static_cast(declesTable[id]); } ASTEnumDecl *ASTLocalEnumDeclBuilder(MapleAllocator &allocator, const MapleString &srcFile, - const std::string &varName, const MapleVector &desc, const GenericAttrs &genAttrsIn, + const std::string &varName, const MapleVector &desc, const MapleGenericAttrs &genAttrsIn, int64 id = INT64_MAX) { MapleString varNameStr(varName, allocator.GetMemPool()); if (id == INT64_MAX) { @@ -80,30 +80,30 @@ class ASTDeclsBuilder { return static_cast(declesTable[id]); } - ASTFunc *ASTFuncBuilder(const MapleAllocator &allocator, const MapleString &srcFile, + ASTFunc *ASTFuncBuilder(MapleAllocator &allocator, const MapleString &srcFile, const std::string &originalNameIn, const std::string &nameIn, - const MapleVector &typeDescIn, const GenericAttrs &genAttrsIn, + const MapleVector &typeDescIn, const MapleGenericAttrs &genAttrsIn, MapleVector ¶mDeclsIn, int64 id = INT64_MAX) { MapleString originalFuncName(originalNameIn, allocator.GetMemPool()); MapleString funcNameStr(nameIn, allocator.GetMemPool()); if (id == INT64_MAX) { - return allocator.GetMemPool()->New(srcFile, originalFuncName, funcNameStr, typeDescIn, genAttrsIn, - paramDeclsIn, id); + return allocator.GetMemPool()->New(allocator, srcFile, originalFuncName, funcNameStr, typeDescIn, + genAttrsIn, paramDeclsIn, id); } else if (declesTable[id] == nullptr) { - declesTable[id] = allocator.GetMemPool()->New(srcFile, originalFuncName, funcNameStr, typeDescIn, - genAttrsIn, paramDeclsIn, id); + declesTable[id] = allocator.GetMemPool()->New(allocator, srcFile, originalFuncName, funcNameStr, + typeDescIn, genAttrsIn, paramDeclsIn, id); } return static_cast(declesTable[id]); } - ASTTypedefDecl *ASTTypedefBuilder(const MapleAllocator &allocator, const MapleString &srcFile, + ASTTypedefDecl *ASTTypedefBuilder(MapleAllocator &allocator, const MapleString &srcFile, const std::string &varName, const MapleVector &desc, - const GenericAttrs &genAttrsIn, int64 id = INT64_MAX) { + const MapleGenericAttrs &genAttrsIn, int64 id = INT64_MAX) { MapleString varNameStr(varName, allocator.GetMemPool()); if (id == INT64_MAX) { - return allocator.GetMemPool()->New(srcFile, varNameStr, desc, genAttrsIn); + return allocator.GetMemPool()->New(allocator, srcFile, varNameStr, desc, genAttrsIn); } else if (declesTable[id] == nullptr) { - declesTable[id] = allocator.GetMemPool()->New(srcFile, varNameStr, desc, genAttrsIn); + declesTable[id] = allocator.GetMemPool()->New(allocator, srcFile, varNameStr, desc, genAttrsIn); } return static_cast(declesTable[id]); } @@ -120,7 +120,7 @@ class ASTDeclsBuilder { ASTStruct *ASTStructBuilder(MapleAllocator &allocator, const MapleString &srcFile, const std::string &nameIn, const MapleVector &typeDescIn, - const GenericAttrs &genAttrsIn, int64 id = INT64_MAX) { + const MapleGenericAttrs &genAttrsIn, int64 id = INT64_MAX) { MapleString structNameStr(nameIn, allocator.GetMemPool()); if (id == INT64_MAX) { return allocator.GetMemPool()->New(allocator, srcFile, structNameStr, typeDescIn, genAttrsIn); @@ -131,15 +131,15 @@ class ASTDeclsBuilder { return static_cast(declesTable[id]); } - ASTField *ASTFieldBuilder(const MapleAllocator &allocator, const MapleString &srcFile, + ASTField *ASTFieldBuilder(MapleAllocator &allocator, const MapleString &srcFile, const std::string &varName, const MapleVector &desc, - const GenericAttrs &genAttrsIn, int64 id = INT64_MAX, + const MapleGenericAttrs &genAttrsIn, int64 id = INT64_MAX, bool isAnonymous = false) { MapleString varNameStr(varName, allocator.GetMemPool()); if (id == INT64_MAX) { - return allocator.GetMemPool()->New(srcFile, varNameStr, desc, genAttrsIn, isAnonymous); + return allocator.GetMemPool()->New(allocator, srcFile, varNameStr, desc, genAttrsIn, isAnonymous); } else if (declesTable[id] == nullptr) { - declesTable[id] = allocator.GetMemPool()->New(srcFile, varNameStr, desc, genAttrsIn, + declesTable[id] = allocator.GetMemPool()->New(allocator, srcFile, varNameStr, desc, genAttrsIn, isAnonymous); } return static_cast(declesTable[id]); @@ -147,8 +147,8 @@ class ASTDeclsBuilder { ~ASTDeclsBuilder() = default; private: - explicit ASTDeclsBuilder(MapleAllocator &allocator) : declesTable(allocator.Adapter()) {} - MapleMap declesTable; + explicit ASTDeclsBuilder(MapleAllocator &allocator [[maybe_unused]]) {} + std::map declesTable; }; } // namespace maple #endif // HIR2MPL_AST_INPUT_INCLUDE_AST_DECL_BUILDER_H diff --git a/src/hir2mpl/ast_input/common/src/ast_decl.cpp b/src/hir2mpl/ast_input/common/src/ast_decl.cpp index 6ddeeb1ad3..05ca6a7cee 100644 --- a/src/hir2mpl/ast_input/common/src/ast_decl.cpp +++ b/src/hir2mpl/ast_input/common/src/ast_decl.cpp @@ -315,7 +315,7 @@ std::list ASTFunc::EmitASTStmtToFEIR() const { retStmt->SetSrcLoc(endLoc); stmts.emplace_back(std::move(retStmt)); } - InsertBoundaryCheckingInRet(stmts); + SaveReturnBoundarySizeInHeadFunc(stmts); return stmts; } diff --git a/src/hir2mpl/ast_input/maple/lib/maple_ast_interface.cpp b/src/hir2mpl/ast_input/maple/lib/maple_ast_interface.cpp index 678f3c15dc..d82a1d45fe 100644 --- a/src/hir2mpl/ast_input/maple/lib/maple_ast_interface.cpp +++ b/src/hir2mpl/ast_input/maple/lib/maple_ast_interface.cpp @@ -23,7 +23,8 @@ namespace maple { bool LibMapleAstFile::Open(const std::string &fileName) { std::ifstream input(fileName, std::ifstream::binary); input >> std::noskipws; - std::istream_iterator s(input), e; + std::istream_iterator s(input); + std::istream_iterator e; maplefe::AstBuffer vec(s, e); maplefe::AstLoad loadAst; maplefe::ModuleNode *mod = loadAst.LoadFromAstBuf(vec); diff --git a/src/hir2mpl/bytecode_input/common/include/bc_instruction.h b/src/hir2mpl/bytecode_input/common/include/bc_instruction.h index d2a6d1ac1b..c5dbfd57bd 100644 --- a/src/hir2mpl/bytecode_input/common/include/bc_instruction.h +++ b/src/hir2mpl/bytecode_input/common/include/bc_instruction.h @@ -128,6 +128,7 @@ struct BCRegTypeItem { : typeNameIdx(item.typeNameIdx), isIndeterminate(item.isIndeterminate) {} ~BCRegTypeItem() = default; + BCRegTypeItem& operator=(const BCRegTypeItem &item); PrimType GetPrimType() const; PrimType GetBasePrimType() const; diff --git a/src/hir2mpl/common/include/enhance_c_checker.h b/src/hir2mpl/common/include/enhance_c_checker.h index 1f6e2e9078..ef4a438a0f 100644 --- a/src/hir2mpl/common/include/enhance_c_checker.h +++ b/src/hir2mpl/common/include/enhance_c_checker.h @@ -79,7 +79,8 @@ class ENCChecker { static void CheckBoundaryLenFinalAssign(MIRBuilder &mirBuilder, const UniqueFEIRType &addrType, FieldID fieldID, const Loc &loc); static void CheckBoundaryLenFinalAddr(MIRBuilder &mirBuilder, const UniqueFEIRExpr &expr, const Loc &loc); - static MapleVector ReplaceBoundaryChecking(MIRBuilder &mirBuilder, const FEIRStmtNary *stmt); + static MapleVector ReplaceBoundaryChecking(MIRBuilder &mirBuilder, const FEIRStmtNary *stmt, + UniqueFEIRExpr lenExpr); static void ReplaceBoundaryErr(const MIRBuilder &mirBuilder, const FEIRStmtNary *stmt); static UniqueFEIRExpr GetBoundaryLenExprCache(uint32 hash); static UniqueFEIRExpr GetBoundaryLenExprCache(const TypeAttrs &attr); diff --git a/src/hir2mpl/common/include/fe_options.h b/src/hir2mpl/common/include/fe_options.h index fa16b0fda7..e216b530c4 100644 --- a/src/hir2mpl/common/include/fe_options.h +++ b/src/hir2mpl/common/include/fe_options.h @@ -581,7 +581,7 @@ class FEOptions { uint32 funcInlineSize = 0; bool wpaa = false; - bool funcMerge = false; + bool funcMerge = true; FEOptions(); ~FEOptions() = default; }; diff --git a/src/hir2mpl/common/include/fe_struct_elem_info.h b/src/hir2mpl/common/include/fe_struct_elem_info.h index 963d8a5ab9..72aa7dd28d 100644 --- a/src/hir2mpl/common/include/fe_struct_elem_info.h +++ b/src/hir2mpl/common/include/fe_struct_elem_info.h @@ -73,7 +73,7 @@ class FEStructElemInfo { return GlobalTables::GetStrTable().GetStringFromStrIdx(structElemNameIdx.type); } - bool TypeIsNullOrIncomplete(MIRType *type) const { + bool TypeIsNullOrIncomplete(const MIRType *type) const { return (type == nullptr) || type->IsIncomplete(); } diff --git a/src/hir2mpl/common/include/feir_builder.h b/src/hir2mpl/common/include/feir_builder.h index dde312119c..a7d7472dd3 100644 --- a/src/hir2mpl/common/include/feir_builder.h +++ b/src/hir2mpl/common/include/feir_builder.h @@ -150,5 +150,47 @@ class FEIRBuilder { static std::string EmitVLACleanupStmts(FEFunction &feFunction, const std::string &labelName, const Loc &loc); static void EmitVLACleanupStmts(const FEFunction &feFunction, std::list &stmts); }; // class FEIRBuilder + +inline MIRIntrinsicID GetVectorIntrinsic(PrimType primtype) { + MIRIntrinsicID intrinsic; + switch (primtype) { +#define SET_VDUP(TY) \ + case PTY_##TY: \ + intrinsic = INTRN_vector_from_scalar_##TY; \ + break + + SET_VDUP(v2i64); + SET_VDUP(v4i32); + SET_VDUP(v8i16); + SET_VDUP(v16i8); + SET_VDUP(v2u64); + SET_VDUP(v4u32); + SET_VDUP(v8u16); + SET_VDUP(v16u8); + SET_VDUP(v2f64); + SET_VDUP(v4f32); + SET_VDUP(v2i32); + SET_VDUP(v4i16); + SET_VDUP(v8i8); + SET_VDUP(v2u32); + SET_VDUP(v4u16); + SET_VDUP(v8u8); + SET_VDUP(v2f32); + case PTY_i64: + case PTY_v1i64: + intrinsic = INTRN_vector_from_scalar_v1i64; + break; + case PTY_u64: + case PTY_v1u64: + intrinsic = INTRN_vector_from_scalar_v1u64; + break; + case PTY_f64: + intrinsic = INTRN_vector_from_scalar_v1f64; + break; + default: + CHECK_FATAL(false, "Unhandled vector type in GetVectorIntrinsic"); + } + return intrinsic; +} } // namespace maple #endif // HIR2MPL_INCLUDE_COMMON_FEIR_BUILDER_H diff --git a/src/hir2mpl/common/include/feir_stmt.h b/src/hir2mpl/common/include/feir_stmt.h index 91382938dc..eca16c6d19 100644 --- a/src/hir2mpl/common/include/feir_stmt.h +++ b/src/hir2mpl/common/include/feir_stmt.h @@ -266,6 +266,14 @@ class FEIRStmt : public FELinkListNode { isNeedGenMir = needGen; } + void SetActulReturnStmt(bool isActual) { + isActualReturn = isActual; + } + + bool IsActualReturn() const { + return isActualReturn; + } + protected: virtual std::string DumpDotStringImpl() const; virtual void DumpImpl(const std::string &prefix) const; @@ -323,6 +331,7 @@ class FEIRStmt : public FELinkListNode { bool isAuxPost = false; bool isThrowable = false; bool isEnhancedChecking = true; + bool isActualReturn = false; std::vector extraPreds; std::vector extraSuccs; @@ -527,7 +536,7 @@ class FEIRExpr { CHECK_FATAL(false, "unsupported in base class"); } - virtual void SetLenFieldIDImpl(FieldID fieldID) { + virtual void SetLenFieldIDImpl(FieldID fieldID [[maybe_unused]]) { CHECK_FATAL(false, "unsupported in base class"); } @@ -535,11 +544,11 @@ class FEIRExpr { CHECK_FATAL(false, "unsupported in base class"); } - virtual void SetFieldIDImpl(FieldID fieldID) { + virtual void SetFieldIDImpl(FieldID fieldID [[maybe_unused]]) { CHECK_FATAL(false, "unsupported in base class"); } - virtual void SetFieldTypeImpl(std::unique_ptr fieldType) { + virtual void SetFieldTypeImpl(std::unique_ptr fieldType [[maybe_unused]]) { CHECK_FATAL(false, "unsupported in base class"); } @@ -806,10 +815,10 @@ class FEIRExprAddrofVar : public FEIRExpr { FEIRTypeHelper::CreateTypeNative(*GlobalTables::GetTypeTable().GetPtrType())), varSrc(std::move(argVarSrc)) {} - FEIRExprAddrofVar(std::unique_ptr argVarSrc, FieldID id) + FEIRExprAddrofVar(std::unique_ptr argVarSrc, FieldID id, FieldID lenId = 0) : FEIRExpr(FEIRNodeKind::kExprAddrofVar, FEIRTypeHelper::CreateTypeNative(*GlobalTables::GetTypeTable().GetPtrType())), - varSrc(std::move(argVarSrc)), fieldID(id) {} + varSrc(std::move(argVarSrc)), fieldID(id), lenFieldID(lenId) {} ~FEIRExprAddrofVar() override { cst = nullptr; } @@ -835,6 +844,14 @@ class FEIRExprAddrofVar : public FEIRExpr { fieldID = id; } + FieldID GetLenFieldIDImpl() const override { + return lenFieldID; + } + + void SetLenFieldIDImpl(FieldID argFieldID) override { + lenFieldID = argFieldID; + } + uint32 HashImpl() const override { return (static_cast(kind) << kOpHashShift) + (type->Hash() << kTypeHashShift) + (static_cast(fieldID) << kOtherShift) + varSrc->Hash(); @@ -843,17 +860,18 @@ class FEIRExprAddrofVar : public FEIRExpr { private: std::unique_ptr varSrc; FieldID fieldID = 0; + FieldID lenFieldID = 0; MIRConst *cst = nullptr; }; // ---------- FEIRExprIAddrof ---------- class FEIRExprIAddrof : public FEIRExpr { public: - FEIRExprIAddrof(UniqueFEIRType pointeeType, FieldID id, UniqueFEIRExpr expr) + FEIRExprIAddrof(UniqueFEIRType pointeeType, FieldID id, UniqueFEIRExpr expr, FieldID lenId = 0) : FEIRExpr(FEIRNodeKind::kExprIAddrof, FEIRTypeHelper::CreateTypeNative(*GlobalTables::GetTypeTable().GetPtrType())), ptrType(std::move(pointeeType)), - fieldID(id), + fieldID(id), lenFieldID(lenId), subExpr(std::move(expr)) {} ~FEIRExprIAddrof() override = default; @@ -882,6 +900,14 @@ class FEIRExprIAddrof : public FEIRExpr { fieldID = argFieldID; } + FieldID GetLenFieldIDImpl() const override { + return lenFieldID; + } + + void SetLenFieldIDImpl(FieldID argFieldID) override { + lenFieldID = argFieldID; + } + uint32 HashImpl() const override { return (static_cast(kind) << kOpHashShift) + (type->Hash() << kTypeHashShift) + (static_cast(fieldID) << kOtherShift) + ptrType->Hash() + subExpr->Hash(); @@ -890,6 +916,7 @@ class FEIRExprIAddrof : public FEIRExpr { private: UniqueFEIRType ptrType; FieldID fieldID = 0; + FieldID lenFieldID = 0; UniqueFEIRExpr subExpr; }; @@ -1793,8 +1820,8 @@ class FEIRStmtJavaFillArrayData : public FEIRStmtAssign { LLT_PRIVATE: PrimType ProcessArrayElemPrimType() const; - MIRSymbol *ProcessArrayElemData(const MIRBuilder &mirBuilder, PrimType elemPrimType) const; - MIRAggConst *FillArrayElem(const MIRBuilder &mirBuilder, PrimType elemPrimType, MIRType &arrayTypeWithSize, + MIRSymbol *ProcessArrayElemData(MIRBuilder &mirBuilder, PrimType elemPrimType) const; + MIRAggConst *FillArrayElem(MIRBuilder &mirBuilder, PrimType elemPrimType, MIRType &arrayTypeWithSize, uint32 elemSize) const; std::unique_ptr arrayExpr; @@ -1943,11 +1970,20 @@ class FEIRStmtAssertBoundary : public FEIRStmtNary { return isComputable; } + void SetIsFlexibleArray(bool flag) { + isFlexArray = flag; + } + + bool IsFlexibleArray() const { + return isFlexArray; + } + protected: std::list GenMIRStmtsImpl(MIRBuilder &mirBuilder) const override; private: bool isComputable = false; + bool isFlexArray = false; }; // ---------- FEIRStmtReturn ---------- @@ -1961,6 +1997,7 @@ class FEIRStmtReturn : public FEIRStmtUseOnly { private: void InsertNonnullChecking(MIRBuilder &mirBuilder, std::list &ans) const; + void InsertFuncReturnChecking(MIRBuilder &mirBuilder, std::list &ans) const; }; // ---------- FEIRStmtPesudoLabel ---------- diff --git a/src/hir2mpl/common/include/feir_var.h b/src/hir2mpl/common/include/feir_var.h index 6592f1749d..a7f288d49e 100644 --- a/src/hir2mpl/common/include/feir_var.h +++ b/src/hir2mpl/common/include/feir_var.h @@ -165,7 +165,11 @@ class FEIRVar { return HashImpl(); } - void SetAttrs(const GenericAttrs &argGenericAttrs) { + void SetAttrs(const StlGenericAttrs &argGenericAttrs) { + genAttrs = argGenericAttrs; + } + + void SetAttrs(const MapleGenericAttrs &argGenericAttrs) { genAttrs = argGenericAttrs; } @@ -208,7 +212,7 @@ class FEIRVar { bool isDef : 1; UniqueFEIRType type; UniqueFEIRVarTrans trans; - GenericAttrs genAttrs; + StlGenericAttrs genAttrs; Loc loc = {0, 0, 0}; std::string sectionAttr; std::unique_ptr boundaryLenExpr; diff --git a/src/hir2mpl/common/include/generic_attrs.h b/src/hir2mpl/common/include/generic_attrs.h index fecce382c3..1bc4d5064b 100644 --- a/src/hir2mpl/common/include/generic_attrs.h +++ b/src/hir2mpl/common/include/generic_attrs.h @@ -17,6 +17,7 @@ #include #include #include "mir_type.h" +#include "global_tables.h" namespace maple { using AttrContent = std::variant; @@ -37,9 +38,7 @@ constexpr uint32 kMaxATTRNum = 128; class GenericAttrs { public: GenericAttrs() = default; - GenericAttrs(const GenericAttrs &ta) = default; - GenericAttrs &operator=(const GenericAttrs &p) = default; - ~GenericAttrs() = default; + virtual ~GenericAttrs() = default; void SetAttr(GenericAttrKind x) { attrFlag.set(x); @@ -61,8 +60,24 @@ class GenericAttrs { return !(*this == tA); } + virtual void ContentResize(size_t newSize) = 0; + + virtual void ContentClear() = 0; + + virtual void ContentShrinkToFit() = 0; + + virtual void ContentInsert(GenericAttrKind key, GStrIdx nameIdx) = 0; + + virtual void ContentInsert(GenericAttrKind key, int val) = 0; + + virtual const std::string &GetAttrStrName(GenericAttrKind key) const = 0; + + virtual int GetPriority(GenericAttrKind attr) const = 0; + + virtual uint32 GetPack(GenericAttrKind attr) const = 0; + void InitContentMap() { - contentMap.resize(kMaxATTRNum); + ContentResize(kMaxATTRNum); isInit = true; } @@ -75,35 +90,148 @@ class GenericAttrs { InitContentMap(); } if (!contentFlag[key]) { - contentMap[key] = val; + ContentInsert(key, val); contentFlag.set(key); } } - void InsertStrIdxContentMap(GenericAttrKind key, GStrIdx nameIdx) { + void InsertStrIdxContentMap(GenericAttrKind key, const GStrIdx &nameIdx) { if (!isInit) { InitContentMap(); } if (!contentFlag[key]) { - contentMap[key] = nameIdx; + ContentInsert(key, nameIdx); contentFlag.set(key); } } void ClearContentMap() { - contentMap.clear(); - contentMap.shrink_to_fit(); + ContentClear(); + ContentShrinkToFit(); } FieldAttrs ConvertToFieldAttrs(); TypeAttrs ConvertToTypeAttrs() const; FuncAttrs ConvertToFuncAttrs(); - private: + std::bitset GetAttrs() const { + return attrFlag; + } + + std::bitset GetContents() const { + return contentFlag; + } + + bool GetInit() const { + return isInit; + } + + protected: + GenericAttrs(const GenericAttrs &ta) = default; + GenericAttrs &operator=(const GenericAttrs &p) = default; std::bitset attrFlag = 0; std::bitset contentFlag = 0; - std::vector contentMap; bool isInit = false; }; + +class MapleGenericAttrs : public GenericAttrs { + public: + explicit MapleGenericAttrs(MapleAllocator &allocatorIn) : contentMap(allocatorIn.Adapter()) {} + MapleGenericAttrs(const MapleGenericAttrs &ta) = default; + MapleGenericAttrs &operator=(const MapleGenericAttrs &p) = default; + + void ContentResize(size_t newSize) override { + contentMap.resize(newSize); + }; + + void ContentClear() override { + contentMap.clear(); + }; + + void ContentShrinkToFit() override { + contentMap.shrink_to_fit(); + }; + + void ContentInsert(GenericAttrKind key, int val) override { + contentMap[key] = val; + }; + + void ContentInsert(GenericAttrKind key, GStrIdx nameIdx) override { + contentMap[key] = nameIdx; + }; + + const std::string &GetAttrStrName(GenericAttrKind key) const override { + return GlobalTables::GetStrTable().GetStringFromStrIdx(std::get(contentMap[key])); + } + + int GetPriority(GenericAttrKind attr) const override { + return std::get(contentMap[attr]); + } + + uint32 GetPack(GenericAttrKind attr) const override { + return static_cast(std::get(contentMap[attr])); + } + + MapleVector contentMap; +}; + +class StlGenericAttrs : public GenericAttrs { + public: + StlGenericAttrs() = default; + + StlGenericAttrs(const StlGenericAttrs &ta) = default; + + explicit StlGenericAttrs(const MapleGenericAttrs &ma) { + contentMap.assign(ma.contentMap.begin(), ma.contentMap.end()); + attrFlag = ma.GetAttrs(); + contentFlag = ma.GetContents(); + isInit = ma.GetInit(); + } + + StlGenericAttrs &operator=(const StlGenericAttrs &p) = default; + + StlGenericAttrs &operator=(const MapleGenericAttrs &pa) { + contentMap.assign(pa.contentMap.begin(), pa.contentMap.end()); + attrFlag = pa.GetAttrs(); + contentFlag = pa.GetContents(); + isInit = pa.GetInit(); + return *this; + } + + void ContentResize(size_t newSize) override { + contentMap.resize(newSize); + }; + + void ContentClear() override { + contentMap.clear(); + }; + + void ContentShrinkToFit() override { + contentMap.shrink_to_fit(); + }; + + void ContentInsert(GenericAttrKind key, int val) override { + contentMap[key] = val; + }; + + void ContentInsert(GenericAttrKind key, GStrIdx nameIdx) override { + contentMap[key] = nameIdx; + }; + + const std::string &GetAttrStrName(GenericAttrKind key) const override { + return GlobalTables::GetStrTable().GetStringFromStrIdx(std::get(contentMap[key])); + } + + int GetPriority(GenericAttrKind attr) const override { + return std::get(contentMap[attr]); + } + + uint32 GetPack(GenericAttrKind attr) const override { + return static_cast(std::get(contentMap[attr])); + } + + private: + std::vector contentMap; +}; } #endif // GENERIC_ATTRS_H \ No newline at end of file diff --git a/src/hir2mpl/common/include/hir2mpl_options.h b/src/hir2mpl/common/include/hir2mpl_options.h index e2885d9cb8..b835a3d12a 100644 --- a/src/hir2mpl/common/include/hir2mpl_options.h +++ b/src/hir2mpl/common/include/hir2mpl_options.h @@ -97,7 +97,7 @@ class HIR2MPLOptions { bool ProcessEnableVariableArray(const maplecl::OptionInterface &) const; bool ProcessFuncInlineSize(const maplecl::OptionInterface &funcInliceSize) const; bool ProcessWPAA(const maplecl::OptionInterface &) const; - bool ProcessFM(const maplecl::OptionInterface &) const; + bool ProcessFM(const maplecl::OptionInterface &fmOpt) const; // ast compiler options bool ProcessUseSignedChar(const maplecl::OptionInterface &) const; diff --git a/src/hir2mpl/common/src/enhance_c_checker.cpp b/src/hir2mpl/common/src/enhance_c_checker.cpp index 5aa84b3875..e9e240ea43 100644 --- a/src/hir2mpl/common/src/enhance_c_checker.cpp +++ b/src/hir2mpl/common/src/enhance_c_checker.cpp @@ -572,8 +572,10 @@ void ASTParser::ProcessBoundaryFuncPtrAttrs(MapleAllocator &allocator, const cla attrsVec, funcType->GetFuncAttrs(), retAttr); astDecl.SetTypeDesc(MapleVector({GlobalTables::GetTypeTable().GetOrCreatePointerType( *GlobalTables::GetTypeTable().GetOrCreatePointerType(*newFuncType))}, allocator.Adapter())); + ProcessBoundaryFuncPtrAttrsByIndex(allocator, valueDecl, astDecl, *static_cast(newFuncType)); + } else { + ProcessBoundaryFuncPtrAttrsByIndex(allocator, valueDecl, astDecl, *funcType); } - ProcessBoundaryFuncPtrAttrsByIndex(allocator, valueDecl, astDecl, *funcType); } template @@ -595,7 +597,7 @@ bool ASTParser::ProcessBoundaryFuncPtrAttrsForParams(T *attr, MapleAllocator &al MIRType *ptrType = GlobalTables::GetTypeTable().GetTypeFromTyIdx(typesVec[idx]); ASTVar *tmpDecl = ASTDeclsBuilder::GetInstance(allocator).ASTVarBuilder(allocator, MapleString("", allocator.GetMemPool()), "tmpVar", - MapleVector({ptrType}, allocator.Adapter()), GenericAttrs()); + MapleVector({ptrType}, allocator.Adapter()), MapleGenericAttrs(allocator)); bool isByte = std::is_same::type, clang::ByteCountAttr>::value; ProcessBoundaryLenExprInVar(allocator, *tmpDecl, proto.getParamType(idx), lenExpr, !isByte); ENCChecker::InsertBoundaryInAtts(attrsVec[idx], tmpDecl->GetBoundaryInfo()); @@ -615,7 +617,7 @@ bool ASTParser::ProcessBoundaryFuncPtrAttrsForRet(T *attr, MapleAllocator &alloc MIRType *ptrType = GlobalTables::GetTypeTable().GetTypeFromTyIdx(funcType.GetRetTyIdx()); ASTVar *tmpRetDecl = ASTDeclsBuilder::GetInstance(allocator).ASTVarBuilder(allocator, MapleString("", allocator.GetMemPool()), - "tmpRetVar", MapleVector({ptrType}, allocator.Adapter()), GenericAttrs()); + "tmpRetVar", MapleVector({ptrType}, allocator.Adapter()), MapleGenericAttrs(allocator)); bool isByte = std::is_same::type, clang::ReturnsByteCountAttr>::value; ProcessBoundaryLenExprInVar(allocator, *tmpRetDecl, clangFuncType.getReturnType(), lenExpr, !isByte); ENCChecker::InsertBoundaryInAtts(retAttr, tmpRetDecl->GetBoundaryInfo()); @@ -736,8 +738,9 @@ void ASTParser::ProcessBoundaryFieldAttrs(MapleAllocator &allocator, const ASTSt void ASTParser::ProcessBoundaryLenExpr(MapleAllocator &allocator, ASTDecl &ptrDecl, const clang::QualType &qualType, const std::function &getLenExprFromStringLiteral, ASTExpr *lenExpr, bool isSize) { - if (!qualType->isPointerType()) { - FE_ERR(kLncErr, lenExpr->GetSrcLoc(), "The variable modified by the boundary attribute should be a pointer type"); + if (!qualType->isPointerType() && !qualType->isIncompleteArrayType()) { + FE_ERR(kLncErr, lenExpr->GetSrcLoc(), + "The variable modified by the boundary attribute should be a pointer type or a flexible array member"); return; } // Check lenExpr kind from: length stringLiteral or constant value/var expression @@ -754,7 +757,15 @@ void ASTParser::ProcessBoundaryLenExpr(MapleAllocator &allocator, ASTDecl &ptrDe if (isSize) { // The type size can only be obtained from ClangDecl instead of ASTDecl, // because the field of mir struct type has not yet been initialized at this time - uint32 lenSize = GetSizeFromQualType(qualType->getPointeeType()); + uint32 lenSize = 0; + if (qualType->isIncompleteArrayType()) { + const clang::ArrayType *arrType = qualType->getAsArrayTypeUnsafe(); + const auto *inArrType = llvm::cast(arrType); + lenSize = GetSizeFromQualType(inArrType->getElementType()); + } else { + lenSize = GetSizeFromQualType(qualType->getPointeeType()); + } + MIRType *pointedType = static_cast(ptrDecl.GetTypeDesc().front())->GetPointedType(); if (pointedType->GetPrimType() == PTY_f64) { lenSize = 8; // 8 is f64 byte num, because now f128 also cvt to f64 @@ -971,7 +982,8 @@ MIRType *ENCChecker::GetTypeFromAddrExpr(const UniqueFEIRExpr &expr) { MIRType *ENCChecker::GetArrayTypeFromExpr(const UniqueFEIRExpr &expr) { MIRType *arrType = GetTypeFromAddrExpr(expr); if (arrType != nullptr && arrType->GetKind() == kTypeArray && - !static_cast(arrType)->GetTypeAttrs().GetAttr(ATTR_incomplete_array)) { + (!static_cast(arrType)->GetTypeAttrs().GetAttr(ATTR_incomplete_array) || + expr->GetFieldID() != 0)) { // if an incomplete array its fieldID != 0, it must be a flexible array member return arrType; } if (expr->GetKind() == kExprAddrof) { // local char* value size @@ -1102,6 +1114,11 @@ void ENCChecker::AssignBoundaryVar(MIRBuilder &mirBuilder, const UniqueFEIRExpr (rBoundaryVarStIdx.first != StIdx(0) || isSizedArray || rRealLenExpr != nullptr)) { lBoundaryVarStIdx = ENCChecker::InsertBoundaryVar(mirBuilder, dstExpr); } + bool isFlexArray = false; + if (arrType != nullptr) { + isFlexArray = static_cast(arrType)->GetTypeAttrs().GetAttr(ATTR_incomplete_array) && + baseExpr->GetFieldID() != 0; + } if (lBoundaryVarStIdx.first != StIdx(0)) { MIRSymbol *lLowerSym = curFunction->GetLocalOrGlobalSymbol(lBoundaryVarStIdx.first); CHECK_NULL_FATAL(lLowerSym); @@ -1117,6 +1134,13 @@ void ENCChecker::AssignBoundaryVar(MIRBuilder &mirBuilder, const UniqueFEIRExpr MIRSymbol *rUpperSym = curFunction->GetLocalOrGlobalSymbol(rBoundaryVarStIdx.second); CHECK_NULL_FATAL(rUpperSym); upperStmt = mirBuilder.CreateStmtDassign(*lUpperSym, 0, mirBuilder.CreateExprDread(*rUpperSym)); + } else if (isFlexArray) { + rRealLenExpr = GetGlobalOrFieldLenExprInExpr(mirBuilder, baseExpr); + if (rRealLenExpr != nullptr) { + lowerStmt = mirBuilder.CreateStmtDassign(*lLowerSym, 0, baseExpr->GenMIRNode(mirBuilder)); + UniqueFEIRExpr binExpr = FEIRBuilder::CreateExprBinary(OP_add, baseExpr->Clone(), rRealLenExpr->Clone()); + upperStmt = mirBuilder.CreateStmtDassign(*lUpperSym, 0, binExpr->GenMIRNode(mirBuilder)); + } } else if (isSizedArray) { lowerStmt = mirBuilder.CreateStmtDassign(*lLowerSym, 0, baseExpr->GenMIRNode(mirBuilder)); UniqueFEIRExpr binExpr = FEIRBuilder::CreateExprBinary( @@ -1239,7 +1263,7 @@ void ENCChecker::InitBoundaryVarFromASTDecl(MapleAllocator &allocator, ASTDecl * std::string lowerVarName = "_boundary." + ptrDecl->GetName() + ".lower"; ASTVar *lowerDecl = ASTDeclsBuilder::GetInstance(allocator).ASTVarBuilder(allocator, MapleString("", allocator.GetMemPool()), - lowerVarName, MapleVector({ptrType}, allocator.Adapter()), GenericAttrs()); + lowerVarName, MapleVector({ptrType}, allocator.Adapter()), MapleGenericAttrs(allocator)); lowerDecl->SetIsParam(true); lowerDecl->SetInitExpr(lowerRefExpr); ASTDeclStmt *lowerStmt = ASTDeclsBuilder::ASTStmtBuilder(allocator); @@ -1256,7 +1280,7 @@ void ENCChecker::InitBoundaryVarFromASTDecl(MapleAllocator &allocator, ASTDecl * std::string upperVarName = "_boundary." + ptrDecl->GetName() + ".upper"; ASTVar *upperDecl = ASTDeclsBuilder::GetInstance(allocator).ASTVarBuilder(allocator, MapleString("", allocator.GetMemPool()), - upperVarName, MapleVector({ptrType}, allocator.Adapter()), GenericAttrs()); + upperVarName, MapleVector({ptrType}, allocator.Adapter()), MapleGenericAttrs(allocator)); upperDecl->SetIsParam(true); upperDecl->SetInitExpr(upperBinExpr); ASTDeclStmt *upperStmt = ASTDeclsBuilder::ASTStmtBuilder(allocator); @@ -1358,9 +1382,10 @@ UniqueFEIRExpr ENCChecker::GetGlobalOrFieldLenExprInExpr(MIRBuilder &mirBuilder, } // Get the boundary attr(i.e. boundary length expr cache) lenExpr = GetBoundaryLenExprCache(symbol->GetAttrs()); - } else if ((expr->GetKind() == kExprDRead || expr->GetKind() == kExprIRead) && expr->GetFieldID() != 0) { + } else if ((expr->GetKind() == kExprDRead || expr->GetKind() == kExprIRead || expr->GetKind() == kExprAddrofVar || + expr->GetKind() == kExprIAddrof) && expr->GetFieldID() != 0) { MIRStructType *structType = nullptr; - if (expr->GetKind() == kExprDRead) { + if (expr->GetKind() == kExprDRead || expr->GetKind() == kExprAddrofVar) { structType = static_cast(expr->GetVarUses().front()->GetType()->GenerateMIRTypeAuto()); } else { FEIRExprIRead *iread = static_cast(expr.get()); @@ -1534,10 +1559,10 @@ UniqueFEIRExpr ENCChecker::GetRealBoundaryLenExprInField(const UniqueFEIRExpr &l } MIRType *reType = FEUtils::GetStructFieldType(&baseType, lenFieldID); UniqueFEIRType reFEType = FEIRTypeHelper::CreateTypeNative(*reType); - if (dstExpr->GetKind() == kExprDRead) { + if (dstExpr->GetKind() == kExprDRead || dstExpr->GetKind() == kExprAddrofVar) { return FEIRBuilder::CreateExprDReadAggField( dstExpr->GetVarUses().front()->Clone(), lenFieldID, std::move(reFEType)); - } else if (dstExpr->GetKind() == kExprIRead) { + } else if (dstExpr->GetKind() == kExprIRead || dstExpr->GetKind() == kExprIAddrof) { FEIRExprIRead *iread = static_cast(dstExpr.get()); return FEIRBuilder::CreateExprIRead( std::move(reFEType), iread->GetClonedPtrType(), iread->GetClonedOpnd(), lenFieldID); @@ -1567,31 +1592,18 @@ std::list ASTFunc::InitArgsBoundaryVar(MIRFunction &mirFunc) con return stmts; } -void ASTFunc::InsertBoundaryCheckingInRet(std::list &stmts) const { +void ASTFunc::SaveReturnBoundarySizeInHeadFunc(std::list &stmts) const { if (!FEOptions::GetInstance().IsBoundaryCheckDynamic() || boundary.lenExpr == nullptr || stmts.size() == 0 || stmts.back()->GetKind() != kStmtReturn) { return; } - std::list nullStmts; - const UniqueFEIRExpr &retExpr = static_cast(stmts.back().get())->GetExpr(); - UniqueFEIRExpr baseExpr = ENCChecker::FindBaseExprInPointerOperation(retExpr); - if (baseExpr == nullptr) { - return; - } - std::list exprs; - UniqueFEIRExpr lenExpr = boundary.lenExpr->Emit2FEExpr(nullStmts); + std::list lenStmts; + UniqueFEIRExpr lenExpr = boundary.lenExpr->Emit2FEExpr(lenStmts); if (boundary.lenParamIdx != -1) { // backup return boundary size in head func body UniqueFEIRVar retSizeVar = FEIRBuilder::CreateVarNameForC("_boundary.return.size", lenExpr->GetType()->Clone()); UniqueFEIRStmt lenStmt = FEIRBuilder::CreateStmtDAssign(retSizeVar->Clone(), lenExpr->Clone()); stmts.emplace_front(std::move(lenStmt)); - lenExpr = FEIRBuilder::CreateExprDRead(std::move(retSizeVar)); } - lenExpr = FEIRBuilder::CreateExprBinary(OP_add, retExpr->Clone(), std::move(lenExpr)); - exprs.emplace_back(std::move(lenExpr)); - exprs.emplace_back(std::move(baseExpr)); - UniqueFEIRStmt stmt = std::make_unique(OP_returnassertle, std::move(exprs)); - stmt->SetSrcLoc(stmts.back()->GetSrcLoc()); - (void)stmts.insert(--stmts.cend(), std::move(stmt)); } void ENCChecker::InsertBoundaryAssignChecking(MIRBuilder &mirBuilder, std::list &ans, @@ -1834,7 +1846,8 @@ void ENCChecker::CheckBoundaryLenFinalAddr(MIRBuilder &mirBuilder, const UniqueF } } -MapleVector ENCChecker::ReplaceBoundaryChecking(MIRBuilder &mirBuilder, const FEIRStmtNary *stmt) { +MapleVector ENCChecker::ReplaceBoundaryChecking(MIRBuilder &mirBuilder, const FEIRStmtNary *stmt, + UniqueFEIRExpr lenExpr) { MIRFunction *curFunction = mirBuilder.GetCurrentFunctionNotNull(); UniqueFEIRExpr leftExpr = stmt->GetArgExprs().front()->Clone(); UniqueFEIRExpr rightExpr = stmt->GetArgExprs().back()->Clone(); @@ -1851,9 +1864,14 @@ MapleVector ENCChecker::ReplaceBoundaryChecking(MIRBuilder &mirBuilde // assertge/assertlt lnode: addrofarray + index; assertle lnode: (attributed upper boundary) addrofarray + len expr // assertge rnode: addrof array; assertlt/assertle rnode: addrof array + sizeof expr if (kOpcodeInfo.IsAssertUpperBoundary(op)) { - rightExpr = FEIRBuilder::CreateExprBinary( - OP_add, std::move(rightExpr), std::make_unique(arrType->GetSize(), PTY_ptr)); + if (lenExpr != nullptr) { + rightExpr = FEIRBuilder::CreateExprBinary(OP_add, std::move(rightExpr), std::move(lenExpr)); + } else { + rightExpr = FEIRBuilder::CreateExprBinary( + OP_add, std::move(rightExpr), std::make_unique(arrType->GetSize(), PTY_ptr)); + } } + leftNode = leftExpr->GenMIRNode(mirBuilder); rightNode = rightExpr->GenMIRNode(mirBuilder); } else { @@ -1861,7 +1879,6 @@ MapleVector ENCChecker::ReplaceBoundaryChecking(MIRBuilder &mirBuilde // assertge/assertlt lnode: addrof base + index; assertle lnode: (attributed upper boundary) addrof base + len expr // assertge rnode: lower boundary; assertlt/assertle rnode: upper boundary auto it = FEManager::GetCurrentFEFunction().GetBoundaryMap().find(rightExpr->Hash()); - UniqueFEIRExpr lenExpr = ENCChecker::GetGlobalOrFieldLenExprInExpr(mirBuilder, rightExpr); if (it != FEManager::GetCurrentFEFunction().GetBoundaryMap().end()) { if (lenExpr == nullptr && IsGlobalVarInExpr(rightExpr)) { return args; // skip boundary checking for global var whithout boundary attr, @@ -1937,6 +1954,8 @@ bool ASTArraySubscriptExpr::InsertBoundaryChecking(std::list &st lowerExprs.emplace_back(baseAddrFEExpr->Clone()); auto lowerStmt = std::make_unique(OP_assertge, std::move(lowerExprs)); lowerStmt->SetIsComputable(true); + bool isFlexibleArray = static_cast(arrayType)->GetTypeAttrs().GetAttr(ATTR_incomplete_array); + lowerStmt->SetIsFlexibleArray(isFlexibleArray); lowerStmt->SetSrcLoc(loc); stmts.emplace_back(std::move(lowerStmt)); // insert upper boundary chencking, baseExpr will be replace by upper boundary var when FEIRStmtNary GenMIRStmts @@ -1945,6 +1964,7 @@ bool ASTArraySubscriptExpr::InsertBoundaryChecking(std::list &st upperExprs.emplace_back(std::move(baseAddrFEExpr)); auto upperStmt = std::make_unique(OP_assertlt, std::move(upperExprs)); upperStmt->SetIsComputable(true); + upperStmt->SetIsFlexibleArray(isFlexibleArray); upperStmt->SetSrcLoc(loc); stmts.emplace_back(std::move(upperStmt)); return true; diff --git a/src/hir2mpl/common/src/fe_java_string_manager.cpp b/src/hir2mpl/common/src/fe_java_string_manager.cpp index 666404ce1e..e61334c203 100644 --- a/src/hir2mpl/common/src/fe_java_string_manager.cpp +++ b/src/hir2mpl/common/src/fe_java_string_manager.cpp @@ -196,8 +196,9 @@ MIRAggConst *FEJavaStringManager::CreateByteArrayConst(const std::u16string &str AddDataIntoByteArray(*newconst, *mp, currData, static_cast(0), *uInt64); #endif // JAVA_OBJ_IN_MFILE + uint32 compressibleInt = compressible ? 1 : 0; // @count - uint32 strCount = (strU16.length() > 0) ? static_cast((strU16.length() * 2) | compressible) : 0; + uint32 strCount = (strU16.length() > 0) ? static_cast((strU16.length() * 2) | compressibleInt) : 0; AddDataIntoByteArray(*newconst, *mp, currData, strCount, *uInt64); // @hash diff --git a/src/hir2mpl/common/src/feir_builder.cpp b/src/hir2mpl/common/src/feir_builder.cpp index 40c2ec3233..517441964c 100644 --- a/src/hir2mpl/common/src/feir_builder.cpp +++ b/src/hir2mpl/common/src/feir_builder.cpp @@ -251,33 +251,7 @@ UniqueFEIRExpr FEIRBuilder::CreateExprConstAnyScalar(PrimType primType, std::pai } UniqueFEIRExpr FEIRBuilder::CreateExprVdupAnyVector(PrimType primtype, int64 val) { -MIRIntrinsicID intrinsic; - switch (primtype) { -#define SET_VDUP(TY) \ - case PTY_##TY: \ - intrinsic = INTRN_vector_from_scalar_##TY; \ - break; - - SET_VDUP(v2i64) - SET_VDUP(v4i32) - SET_VDUP(v8i16) - SET_VDUP(v16i8) - SET_VDUP(v2u64) - SET_VDUP(v4u32) - SET_VDUP(v8u16) - SET_VDUP(v16u8) - SET_VDUP(v2f64) - SET_VDUP(v4f32) - SET_VDUP(v2i32) - SET_VDUP(v4i16) - SET_VDUP(v8i8) - SET_VDUP(v2u32) - SET_VDUP(v4u16) - SET_VDUP(v8u8) - SET_VDUP(v2f32) - default: - CHECK_FATAL(false, "Unhandled vector type in CreateExprVdupAnyVector"); - } + MIRIntrinsicID intrinsic = GetVectorIntrinsic(primtype); UniqueFEIRType feType = FEIRTypeHelper::CreateTypeNative(*GlobalTables::GetTypeTable().GetPrimType(primtype)); UniqueFEIRExpr valExpr = CreateExprConstAnyScalar(FEUtils::GetVectorElementPrimType(primtype), val); std::vector> argOpnds; diff --git a/src/hir2mpl/common/src/feir_stmt.cpp b/src/hir2mpl/common/src/feir_stmt.cpp index ae45d448d3..a9bdb75bc8 100644 --- a/src/hir2mpl/common/src/feir_stmt.cpp +++ b/src/hir2mpl/common/src/feir_stmt.cpp @@ -546,7 +546,7 @@ PrimType FEIRStmtJavaFillArrayData::ProcessArrayElemPrimType() const { return elemPrimType; } -MIRSymbol *FEIRStmtJavaFillArrayData::ProcessArrayElemData(const MIRBuilder &mirBuilder, PrimType elemPrimType) const { +MIRSymbol *FEIRStmtJavaFillArrayData::ProcessArrayElemData(MIRBuilder &mirBuilder, PrimType elemPrimType) const { // specify size for const array uint32 sizeIn = size; MIRType *arrayTypeWithSize = GlobalTables::GetTypeTable().GetOrCreateArrayType( @@ -559,7 +559,7 @@ MIRSymbol *FEIRStmtJavaFillArrayData::ProcessArrayElemData(const MIRBuilder &mir return arrayVar; } -MIRAggConst *FEIRStmtJavaFillArrayData::FillArrayElem(const MIRBuilder &mirBuilder, PrimType elemPrimType, +MIRAggConst *FEIRStmtJavaFillArrayData::FillArrayElem(MIRBuilder &mirBuilder, PrimType elemPrimType, MIRType &arrayTypeWithSize, uint32 elemSize) const { MemPool *mp = mirBuilder.GetMirModule().GetMemPool(); MIRModule &module = mirBuilder.GetMirModule(); @@ -820,7 +820,8 @@ std::list FEIRStmtCallAssertNonnull::GenMIRStmtsImpl(MIRBuilder &mirB std::list FEIRStmtCallAssertBoundary::GenMIRStmtsImpl(MIRBuilder &mirBuilder) const { std::list stmts; StmtNode *stmt = nullptr; - auto args = ENCChecker::ReplaceBoundaryChecking(mirBuilder, this); + auto lenExpr = ENCChecker::GetGlobalOrFieldLenExprInExpr(mirBuilder, GetArgExprs().back()->Clone()); + auto args = ENCChecker::ReplaceBoundaryChecking(mirBuilder, this, std::move(lenExpr)); if (args.size() > 0) { GStrIdx stridx = GlobalTables::GetStrTable().GetOrCreateStrIdxFromName(GetFuncName()); stmt = mirBuilder.CreateStmtCallAssertBoundary(op, std::move(args), stridx, GetParamIndex(), @@ -836,7 +837,12 @@ std::list FEIRStmtCallAssertBoundary::GenMIRStmtsImpl(MIRBuilder &mir std::list FEIRStmtAssertBoundary::GenMIRStmtsImpl(MIRBuilder &mirBuilder) const { std::list stmts; StmtNode *stmt = nullptr; - auto args = ENCChecker::ReplaceBoundaryChecking(mirBuilder, this); + auto lenExpr = ENCChecker::GetGlobalOrFieldLenExprInExpr(mirBuilder, GetArgExprs().back()->Clone()); + // do not insert check in flex array without len info + if (lenExpr == nullptr && IsFlexibleArray()) { + return stmts; + } + auto args = ENCChecker::ReplaceBoundaryChecking(mirBuilder, this, std::move(lenExpr)); if (args.size() > 0) { stmt = mirBuilder.CreateStmtAssertBoundary(op, std::move(args), mirBuilder.GetCurrentFunction()->GetNameStrIdx()); } @@ -852,6 +858,26 @@ FEIRStmtReturn::FEIRStmtReturn(std::unique_ptr argExpr) isFallThru = true; } +void FEIRStmtReturn::InsertFuncReturnChecking(MIRBuilder &mirBuilder, std::list &ans) const { + UniqueFEIRExpr baseExpr = ENCChecker::FindBaseExprInPointerOperation(expr); + uint32 lenHash = mirBuilder.GetCurrentFunction()->GetAttrs().GetAttrBoundary().GetLenExprHash(); + auto lenExpr = FEManager::GetTypeManager().GetBoundaryLenExprFromMap(lenHash); + if (baseExpr != nullptr && lenExpr != nullptr) { + if (mirBuilder.GetCurrentFunction()->GetAttrs().GetAttrBoundary().GetLenParamIdx() != -1) { + UniqueFEIRVar retSizeVar = FEIRBuilder::CreateVarNameForC("_boundary.return.size", lenExpr->GetType()->Clone()); + lenExpr = FEIRBuilder::CreateExprDRead(std::move(retSizeVar)); + } + lenExpr = FEIRBuilder::CreateExprBinary(OP_add, expr->Clone(), std::move(lenExpr)); + std::list exprs; + (void)exprs.emplace_back(std::move(lenExpr)); + (void)exprs.emplace_back(std::move(baseExpr)); + UniqueFEIRStmt returnAssertStmt = std::make_unique(OP_returnassertle, std::move(exprs)); + returnAssertStmt->SetSrcLoc(expr->GetLoc()); + std::list stmts = returnAssertStmt->GenMIRStmts(mirBuilder); + ans.splice(ans.end(), stmts); + } +} + std::list FEIRStmtReturn::GenMIRStmtsImpl(MIRBuilder &mirBuilder) const { std::list ans; StmtNode *mirStmt = nullptr; @@ -860,15 +886,18 @@ std::list FEIRStmtReturn::GenMIRStmtsImpl(MIRBuilder &mirBuilder) con } else { BaseNode *srcNode = expr->GenMIRNode(mirBuilder); if (mirBuilder.GetCurrentFunction()->IsFirstArgReturn()) { - MIRSymbol *firstArgRetSym = mirBuilder.GetCurrentFunction()->GetFormal(0); - BaseNode *addrNode = mirBuilder.CreateDread(*firstArgRetSym, PTY_ptr); - StmtNode *iNode = mirBuilder.CreateStmtIassign(*firstArgRetSym->GetType(), 0, addrNode, srcNode); - ans.emplace_back(iNode); + if (IsActualReturn()) { + MIRSymbol *firstArgRetSym = mirBuilder.GetCurrentFunction()->GetFormal(0); + BaseNode *addrNode = mirBuilder.CreateDread(*firstArgRetSym, PTY_ptr); + StmtNode *iNode = mirBuilder.CreateStmtIassign(*firstArgRetSym->GetType(), 0, addrNode, srcNode); + ans.emplace_back(iNode); + } mirStmt = mirBuilder.CreateStmtReturn(nullptr); } else { InsertNonnullChecking(mirBuilder, ans); ENCChecker::InsertBoundaryAssignChecking(mirBuilder, ans, expr, loc); ENCChecker::CheckBoundaryLenFinalAddr(mirBuilder, expr, loc); + InsertFuncReturnChecking(mirBuilder, ans); mirStmt = mirBuilder.CreateStmtReturn(srcNode); } } @@ -1385,7 +1414,7 @@ void FEIRStmtArrayStore::InitTrans4AllVarsImpl() { } std::list FEIRStmtArrayStore::GenMIRStmtsImpl(MIRBuilder &mirBuilder) const { - CHECK_FATAL(((exprIndex == nullptr) && (exprIndexs.size() != 0))|| + CHECK_FATAL(((exprIndex == nullptr) && (exprIndexs.size() != 0)) || (exprIndex->GetKind() == kExprDRead) || (exprIndex->GetKind() == kExprConst), "only support dread/const expr for exprIndex"); MIRType *ptrMIRArrayType = typeArray->GenerateMIRType(false); @@ -2668,6 +2697,7 @@ BaseNode *FEIRExprAddrofConstArray::GenMIRNodeImpl(MIRBuilder &mirBuilder) const MIRSymbol *arrayVar = mirBuilder.GetOrCreateGlobalDecl(arrayName, *arrayTypeWithSize); arrayVar->SetAttr(ATTR_readonly); arrayVar->SetStorageClass(kScFstatic); + arrayVar->SetAttr(ATTR_const); MIRModule &module = mirBuilder.GetMirModule(); MIRAggConst *val = module.GetMemPool()->New(module, *arrayTypeWithSize); for (uint32 i = 0; i < array.size(); ++i) { @@ -2697,7 +2727,9 @@ BaseNode *FEIRExprAddrOfLabel::GenMIRNodeImpl(MIRBuilder &mirBuilder) const { // ---------- FEIRExprIAddrof ---------- std::unique_ptr FEIRExprIAddrof::CloneImpl() const { - return std::make_unique(ptrType->Clone(), fieldID, subExpr->Clone()); + UniqueFEIRExpr expr = std::make_unique(ptrType->Clone(), fieldID, subExpr->Clone()); + expr->SetLenFieldID(lenFieldID); + return expr; } std::vector FEIRExprIAddrof::GetVarUsesImpl() const { @@ -2723,6 +2755,7 @@ BaseNode *FEIRExprIAddrof::GenMIRNodeImpl(MIRBuilder &mirBuilder) const { std::unique_ptr FEIRExprAddrofVar::CloneImpl() const { UniqueFEIRExpr expr = std::make_unique(varSrc->Clone()); expr->SetFieldID(fieldID); + expr->SetLenFieldID(lenFieldID); return expr; } diff --git a/src/hir2mpl/common/src/generic_attrs.cpp b/src/hir2mpl/common/src/generic_attrs.cpp index de7ccba767..af2a08304e 100644 --- a/src/hir2mpl/common/src/generic_attrs.cpp +++ b/src/hir2mpl/common/src/generic_attrs.cpp @@ -13,7 +13,6 @@ * See the Mulan PSL v2 for more details. */ #include "generic_attrs.h" -#include "global_tables.h" namespace maple { TypeAttrs GenericAttrs::ConvertToTypeAttrs() const { @@ -38,7 +37,8 @@ TypeAttrs GenericAttrs::ConvertToTypeAttrs() const { } } if (GetContentFlag(GENATTR_pack)) { - attr.SetPack(static_cast(std::get(contentMap[GENATTR_pack]))); + uint32 pack = GetPack(GENATTR_pack); + attr.SetPack(pack); } return attr; } @@ -65,14 +65,16 @@ FuncAttrs GenericAttrs::ConvertToFuncAttrs() { } } if (GetContentFlag(GENATTR_alias)) { - std::string name = GlobalTables::GetStrTable().GetStringFromStrIdx(std::get(contentMap[GENATTR_alias])); + const std::string &name = GetAttrStrName(GENATTR_alias); attr.SetAliasFuncName(name); } if (GetContentFlag(GENATTR_constructor_priority)) { - attr.SetConstructorPriority(std::get(contentMap[GENATTR_constructor_priority])); + int priority = GetPriority(GENATTR_constructor_priority); + attr.SetConstructorPriority(priority); } if (GetContentFlag(GENATTR_destructor_priority)) { - attr.SetDestructorPriority(std::get(contentMap[GENATTR_destructor_priority])); + int priority = GetPriority(GENATTR_destructor_priority); + attr.SetDestructorPriority(priority); } return attr; } diff --git a/src/hir2mpl/common/src/hir2mpl_compiler_component.cpp b/src/hir2mpl/common/src/hir2mpl_compiler_component.cpp index 929d8c2c66..dc548210eb 100644 --- a/src/hir2mpl/common/src/hir2mpl_compiler_component.cpp +++ b/src/hir2mpl/common/src/hir2mpl_compiler_component.cpp @@ -48,7 +48,7 @@ void FEFunctionProcessSchedular::AddFunctionProcessTask(std::unique_ptr= FEOptions::kDumpLevelInfoDebug) { - INFO(kLncInfo, "Start Run Thread (tid=%lx)", tid); + INFO(kLncInfo, "Start Run Thread (tid=%lx)", std::hash()(tid)); } FEConfigParallel::GetInstance().RegisterRunThreadID(tid); } diff --git a/src/hir2mpl/common/src/hir2mpl_options.cpp b/src/hir2mpl/common/src/hir2mpl_options.cpp index dc1951252c..316b364ecc 100644 --- a/src/hir2mpl/common/src/hir2mpl_options.cpp +++ b/src/hir2mpl/common/src/hir2mpl_options.cpp @@ -603,8 +603,8 @@ bool HIR2MPLOptions::ProcessWPAA(const maplecl::OptionInterface &) const { } // func merge -bool HIR2MPLOptions::ProcessFM(const maplecl::OptionInterface &) const { - FEOptions::GetInstance().SetFuncMergeEnable(true); +bool HIR2MPLOptions::ProcessFM(const maplecl::OptionInterface &fmOpt) const { + FEOptions::GetInstance().SetFuncMergeEnable(fmOpt.GetCommonValue()); return true; } diff --git a/src/hir2mpl/test/ast_input/clang/ast_var_test.cpp b/src/hir2mpl/test/ast_input/clang/ast_var_test.cpp index c56524bd78..afe8c7ccd3 100644 --- a/src/hir2mpl/test/ast_input/clang/ast_var_test.cpp +++ b/src/hir2mpl/test/ast_input/clang/ast_var_test.cpp @@ -31,7 +31,7 @@ class FEIRVarNameTest : public FEIRTestBase { }; TEST_F(FEIRVarNameTest, FEIRVarInAST) { - GenericAttrs attrs; + MapleGenericAttrs attrs(allocator); attrs.SetAttr(GENATTR_const); MIRType *type = GlobalTables::GetTypeTable().GetInt32(); auto astVar = ASTDeclsBuilder::GetInstance(allocator).ASTVarBuilder(allocator, MapleString("foo.c", mp), "a", diff --git a/src/mapleall/maple_be/BUILD.gn b/src/mapleall/maple_be/BUILD.gn index e92ba91a13..b44218fa7f 100644 --- a/src/mapleall/maple_be/BUILD.gn +++ b/src/mapleall/maple_be/BUILD.gn @@ -129,7 +129,7 @@ src_libcgaarch64 = [ "src/cg/aarch64/aarch64_validbit_opt.cpp", "src/cg/aarch64/aarch64_rce.cpp", "src/cg/aarch64/aarch64_cfgo.cpp", - "src/cg/aarch64/aarch64_isolate_fastpath.cpp", + "src/cg/aarch64/aarch64_dup.cpp", "src/cg/aarch64/aarch64_rematerialize.cpp", "src/cg/aarch64/aarch64_MPISel.cpp", "src/cg/aarch64/aarch64_standardize.cpp", @@ -147,6 +147,9 @@ src_libcgx86phases = [ "src/cg/cg_dominance.cpp", "src/cg/cg_pre.cpp", "src/cg/cg_occur.cpp", + "src/cg/cg_ssu_pre.cpp", + "src/cg/cg_ssa_pre.cpp", + "src/cg/cg_mc_ssa_pre.cpp", "src/cg/cg_pgo_gen.cpp", ] @@ -220,9 +223,11 @@ src_libcgphases = [ "src/cg/reg_coalesce.cpp", "src/cg/global.cpp", "src/cg/ico.cpp", + "src/cg/dup_tail.cpp", "src/cg/peep.cpp", "src/cg/pressure.cpp", "src/cg/reaching.cpp", + "src/cg/cg_predict.cpp", "src/cg/schedule.cpp", "src/cg/strldr.cpp", "src/cg/cg_dominance.cpp", @@ -276,7 +281,6 @@ src_libcg = [ "src/cg/reg_alloc_lsra.cpp", "src/cg/reg_alloc_color_ra.cpp", "src/cg/proepilog.cpp", - "src/cg/isolate_fastpath.cpp", "src/cg/rematerialize.cpp", "src/cg/cg.cpp", "src/cg/isa.cpp", diff --git a/src/mapleall/maple_be/CMakeLists.txt b/src/mapleall/maple_be/CMakeLists.txt index d21ff7e245..d19cd491e2 100755 --- a/src/mapleall/maple_be/CMakeLists.txt +++ b/src/mapleall/maple_be/CMakeLists.txt @@ -109,8 +109,8 @@ if(${TARGET} STREQUAL "aarch64" OR ${TARGET} STREQUAL "aarch64_ilp32") src/cg/aarch64/aarch64_validbit_opt.cpp src/cg/aarch64/aarch64_rce.cpp src/cg/aarch64/aarch64_cfgo.cpp + src/cg/aarch64/aarch64_dup.cpp src/cg/aarch64/aarch64_pgo_gen.cpp - src/cg/aarch64/aarch64_isolate_fastpath.cpp src/cg/aarch64/aarch64_rematerialize.cpp src/cg/aarch64/aarch64_MPISel.cpp src/cg/aarch64/aarch64_standardize.cpp @@ -134,9 +134,11 @@ if(${TARGET} STREQUAL "aarch64" OR ${TARGET} STREQUAL "aarch64_ilp32") src/cg/reg_coalesce.cpp src/cg/global.cpp src/cg/ico.cpp + src/cg/dup_tail.cpp src/cg/peep.cpp src/cg/pressure.cpp src/cg/reaching.cpp + src/cg/cg_predict.cpp src/cg/schedule.cpp src/cg/strldr.cpp src/cg/cg_dominance.cpp @@ -189,11 +191,15 @@ if(${TARGET} STREQUAL "x86_64") src/cg/peep.cpp src/cg/alignment.cpp src/cg/reaching.cpp + src/cg/cg_predict.cpp src/cg/local_opt.cpp src/cg/cfgo.cpp src/cg/cg_dominance.cpp src/cg/cg_pre.cpp src/cg/cg_occur.cpp + src/cg/cg_ssu_pre.cpp + src/cg/cg_ssa_pre.cpp + src/cg/cg_mc_ssa_pre.cpp src/cg/cg_pgo_gen.cpp ) endif() @@ -284,7 +290,6 @@ set(src_libcg src/cg/reg_alloc_lsra.cpp src/cg/reg_alloc_color_ra.cpp src/cg/proepilog.cpp - src/cg/isolate_fastpath.cpp src/cg/rematerialize.cpp src/cg/cg.cpp src/cg/isa.cpp diff --git a/src/mapleall/maple_be/include/be/lower.h b/src/mapleall/maple_be/include/be/lower.h index 4257dddda7..a6395effb3 100644 --- a/src/mapleall/maple_be/include/be/lower.h +++ b/src/mapleall/maple_be/include/be/lower.h @@ -229,6 +229,11 @@ class CGLowerer { BaseNode *LowerIreadBitfield(IreadNode &iread); StmtNode *LowerDassignBitfield(DassignNode &dassign, BlockNode &newBlk); StmtNode *LowerIassignBitfield(IassignNode &iassign, BlockNode &newBlk); + StmtNode *ReplaceCommonAggAssign(DassignNode &dass, const MIRSymbol &sym); + BaseNode *ReplaceAggRead(BaseNode *rhs, DassignNode &dass, uint32 bitSize, MIRFunction &func); + StmtNode *ReplaceUnionAssign(StmtNode &stmt); + BaseNode *ReplaceAggAssign(BaseNode &parent, uint32 bitOffset, uint32 bitSize, PregIdx regNo, bool fromDass); + BaseNode *ReplaceUnionRead(BaseNode &parent, BaseNode &expr, bool fromDass = false); void LowerAsmStmt(AsmNode *asmNode, BlockNode *newBlk); @@ -351,6 +356,7 @@ class CGLowerer { uint32 labelIdx = 0; static std::unordered_map intrinFuncIDs; static std::unordered_map arrayClassCacheIndex; + std::unordered_map unionReplacePair; std::unordered_map l2fMap; // Map label to frequency on profileUse FuncProfInfo *funcProfData = nullptr; }; diff --git a/src/mapleall/maple_be/include/cg/aarch64/aarch64_MPISel.h b/src/mapleall/maple_be/include/cg/aarch64/aarch64_MPISel.h index 0b7c88b227..d3110f29c8 100644 --- a/src/mapleall/maple_be/include/cg/aarch64/aarch64_MPISel.h +++ b/src/mapleall/maple_be/include/cg/aarch64/aarch64_MPISel.h @@ -117,7 +117,6 @@ class AArch64MPIsel : public MPISel { void CreateCallStructParamPassByReg(const MemOperand &memOpnd, regno_t regNo, uint32 parmNum); void CreateCallStructParamPassByStack(const MemOperand &addrOpnd, uint32 symSize, int32 baseOffset); void SelectAggCopyReturn(const MIRSymbol &symbol, MIRType &symbolType, uint64 symbolSize); - uint32 GetAggCopySize(uint32 offset1, uint32 offset2, uint32 alignment) const; bool IsParamStructCopy(const MIRSymbol &symbol); bool IsSymbolRequireIndirection(const MIRSymbol &symbol) override; void SelectMinOrMax(bool isMin, Operand &resOpnd, Operand &opnd0, Operand &opnd1, PrimType primType) override; diff --git a/src/mapleall/maple_be/include/cg/aarch64/aarch64_aggressive_opt.h b/src/mapleall/maple_be/include/cg/aarch64/aarch64_aggressive_opt.h index 6b0c07095f..d24d086248 100644 --- a/src/mapleall/maple_be/include/cg/aarch64/aarch64_aggressive_opt.h +++ b/src/mapleall/maple_be/include/cg/aarch64/aarch64_aggressive_opt.h @@ -87,13 +87,13 @@ class AArch64CombineRedundantX16Opt { void InitSegmentInfo(MemPool *tmpMp, MapleAllocator *tmpAlloc); void ClearSegmentInfo(MemPool *tmpMp, MapleAllocator *tmpAlloc); void ResetInsnId(); - bool IsEndOfSegment(Insn &insn, bool hasX16Def); + bool IsEndOfSegment(const Insn &insn, bool hasX16Def); void ComputeRecentAddImm(); void RecordRecentSplitInsnInfo(Insn &insn); bool IsUseX16MemInsn(const Insn &insn) const; void RecordUseX16InsnInfo(Insn &insn, MemPool *tmpMp, MapleAllocator *tmpAlloc); void ComputeValidAddImmInterval(UseX16InsnInfo &x16UseInfo, bool isPair); - void FindCommonX16DefInsns(MemPool *tmpMp, MapleAllocator *tmpAlloc); + void FindCommonX16DefInsns(MemPool *tmpMp, MapleAllocator *tmpAlloc) const; void ProcessSameAddImmCombineInfo(MemPool *tmpMp, MapleAllocator *tmpAlloc) const; void ProcessIntervalIntersectionCombineInfo(MemPool *tmpMp, MapleAllocator *tmpAlloc) const; void CombineRedundantX16DefInsns(BB &bb); diff --git a/src/mapleall/maple_be/include/cg/aarch64/aarch64_alignment.h b/src/mapleall/maple_be/include/cg/aarch64/aarch64_alignment.h index 822831afd2..84a012339b 100644 --- a/src/mapleall/maple_be/include/cg/aarch64/aarch64_alignment.h +++ b/src/mapleall/maple_be/include/cg/aarch64/aarch64_alignment.h @@ -41,22 +41,34 @@ class AArch64AlignAnalysis : public AlignAnalysis { } ~AArch64AlignAnalysis() override = default; - void FindLoopHeader() override; - void FindJumpTarget() override; + void FindLoopHeaderByDefault() override; + void FindJumpTargetByDefault() override; void ComputeLoopAlign() override; void ComputeJumpAlign() override; void ComputeCondBranchAlign() override; + uint32 ComputeBBAlignNopNum(BB &bb, uint32 addr) const; + void FindLoopHeaderByFrequency() override; + void FindJumpTargetByFrequency() override; bool MarkCondBranchAlign(); bool MarkShortBranchSplit(); void AddNopAfterMark(); void UpdateInsnId(); uint32 GetAlignRange(uint32 alignedVal, uint32 addr) const; + void ComputeInsnAddr(); + bool MarkForLoop(); + Insn* FindTargetIsland(BB &bb) const; + void AddNopForLoopAfterMark(); + void AddNopForLoop() override; + uint32 GetInlineAsmInsnNum(const Insn &insn) const; /* filter condition */ bool IsIncludeCall(BB &bb) override; bool IsInSizeRange(BB &bb) override; bool HasFallthruEdge(BB &bb) override; bool IsInSameAlignedRegion(uint32 addr1, uint32 addr2, uint32 alignedRegionSize) const; + uint64 GetFreqThreshold() const; + uint64 GetFallThruFreq(const BB &bb) const; + uint64 GetBranchFreq(const BB &bb) const; private: AArch64CGFunc *aarFunc = nullptr; diff --git a/src/mapleall/maple_be/include/cg/aarch64/aarch64_call_conv.h b/src/mapleall/maple_be/include/cg/aarch64/aarch64_call_conv.h index 11723365e2..00134912ff 100644 --- a/src/mapleall/maple_be/include/cg/aarch64/aarch64_call_conv.h +++ b/src/mapleall/maple_be/include/cg/aarch64/aarch64_call_conv.h @@ -37,7 +37,7 @@ class AArch64CallConvImpl { ~AArch64CallConvImpl() = default; // Return size of aggregate structure copy on stack. - uint64 LocateNextParm(MIRType &mirType, CCLocInfo &ploc, bool isFirst = false, + uint64 LocateNextParm(const MIRType &mirType, CCLocInfo &ploc, bool isFirst = false, MIRFuncType *tFunc = nullptr); void LocateRetVal(const MIRType &retType, CCLocInfo &ploc) const; @@ -45,7 +45,7 @@ class AArch64CallConvImpl { void InitCCLocInfo(CCLocInfo &ploc) const; // for lmbc - uint32 FloatParamRegRequired(MIRStructType &structType, uint32 &fpSize) const; + uint32 FloatParamRegRequired(const MIRStructType &structType, uint32 &fpSize); void SetupSecondRetReg(const MIRType &retTy2, CCLocInfo &ploc) const; diff --git a/src/mapleall/maple_be/include/cg/aarch64/aarch64_cfi_generator.h b/src/mapleall/maple_be/include/cg/aarch64/aarch64_cfi_generator.h index 6000835335..367ff645a4 100644 --- a/src/mapleall/maple_be/include/cg/aarch64/aarch64_cfi_generator.h +++ b/src/mapleall/maple_be/include/cg/aarch64/aarch64_cfi_generator.h @@ -31,8 +31,8 @@ class AArch64GenCfi : public GenCfi { ~AArch64GenCfi() override = default; private: - void GenerateRegisterSaveDirective(BB &bb) override; - void GenerateRegisterRestoreDirective(BB &bb) override; + void GenerateRegisterSaveDirective(BB &bb, Insn &stackDefInsn) override; + void GenerateRegisterRestoreDirective(BB &bb, Insn &stackRevertInsn) override; /* frame pointer(x29) is available as a general-purpose register if useFP is set as false */ AArch64reg stackBaseReg = RFP; diff --git a/src/mapleall/maple_be/include/cg/aarch64/aarch64_cg.h b/src/mapleall/maple_be/include/cg/aarch64/aarch64_cg.h index 26340145ea..a5257f15e7 100644 --- a/src/mapleall/maple_be/include/cg/aarch64/aarch64_cg.h +++ b/src/mapleall/maple_be/include/cg/aarch64/aarch64_cg.h @@ -37,6 +37,9 @@ #include "aarch64_global_schedule.h" #include "aarch64_local_schedule.h" #include "aarch64_aggressive_opt.h" +#include "aarch64_dup.h" +#include "aarch64_ra_opt.h" +#include "aarch64_proepilog.h" namespace maplebe { constexpr int64 kShortBRDistance = (8 * 1024); @@ -223,6 +226,9 @@ class AArch64CG : public CG { CFGOptimizer *CreateCFGOptimizer(MemPool &mp, CGFunc &f, LoopAnalysis &loop) const override { return mp.New(f, mp, loop); } + DupTailOptimizer *CreateDupTailOptimizer(MemPool &mp, CGFunc &f) const override { + return mp.New(f, mp); + } Rematerializer *CreateRematerializer(MemPool &mp) const override { return mp.New(); } @@ -235,6 +241,14 @@ class AArch64CG : public CG { CGAggressiveOpt *CreateAggressiveOpt(MemPool &mp, CGFunc &f) const override { return mp.New(f); } + RaOpt *CreateRaOptimizer(MemPool &mp, CGFunc &f, DomAnalysis &dom, LoopAnalysis &loop) const override { + return mp.New(f, mp, dom, loop); + } + ProEpilogAnalysis *CreateProEpilogAnalysis(MemPool &mp, CGFunc &f, DomAnalysis &dom, PostDomAnalysis &pdom, + LoopAnalysis &loop) const override { + return mp.New(f, mp, dom, pdom, loop); + } + /* Return the copy operand id of reg1 if it is an insn who just do copy from reg1 to reg2. * i. mov reg2, reg1 * ii. add/sub reg2, reg1, 0/zero register @@ -252,7 +266,7 @@ class AArch64CG : public CG { }; static const InsnDesc kMd[kMopLast]; - static constexpr MOperator movBetweenOpnds[kIndex2][kIndex2][kIndex2][kIndex2] = { + static constexpr MOperator kMovBetweenOpnds[kIndex2][kIndex2][kIndex2][kIndex2] = { { { {MOP_wmovrr, MOP_undef}, {MOP_xvmovrs, MOP_undef} }, { {MOP_undef, MOP_xmovrr}, {MOP_undef, MOP_xvmovrd} } @@ -279,7 +293,7 @@ class AArch64CG : public CG { auto isLeftReg64Bits = leftReg.GetSize() == k64BitSize ? 1 : 0; auto isRightRegFloat = rightReg.GetRegisterType() == kRegTyFloat ? 1 : 0; auto isRightReg64Bits = rightReg.GetSize() == k64BitSize ? 1 : 0; - auto mop = movBetweenOpnds[isLeftRegFloat][isLeftReg64Bits][isRightRegFloat][isRightReg64Bits]; + auto mop = kMovBetweenOpnds[isLeftRegFloat][isLeftReg64Bits][isRightRegFloat][isRightReg64Bits]; if (mop == MOP_undef) { return; } diff --git a/src/mapleall/maple_be/include/cg/aarch64/aarch64_cgfunc.h b/src/mapleall/maple_be/include/cg/aarch64/aarch64_cgfunc.h index 54e0345504..26736bd435 100644 --- a/src/mapleall/maple_be/include/cg/aarch64/aarch64_cgfunc.h +++ b/src/mapleall/maple_be/include/cg/aarch64/aarch64_cgfunc.h @@ -25,7 +25,6 @@ #include "aarch64_reg_info.h" #include "aarch64_optimize_common.h" #include "aarch64_call_conv.h" - namespace maplebe { class LmbcArgInfo { public: @@ -143,7 +142,7 @@ class AArch64CGFunc : public CGFunc { void SelectParmList(StmtNode &naryNode, ListOperand &srcOpnds, bool isCallNative = false); void SelectCondGoto(CondGotoNode &stmt, Operand &opnd0, Operand &opnd1) override; void SelectCondGoto(LabelOperand &targetOpnd, Opcode jmpOp, Opcode cmpOp, Operand &origOpnd0, - Operand &origOpnd1, PrimType primType, bool signedCond); + Operand &origOpnd1, PrimType primType, bool signedCond, int32 prob); void SelectCondSpecialCase1(CondGotoNode &stmt, BaseNode &expr) override; void SelectCondSpecialCase2(const CondGotoNode &stmt, BaseNode &expr) override; void SelectGoto(GotoNode &stmt) override; @@ -209,6 +208,11 @@ class AArch64CGFunc : public CGFunc { void SelectAdd(Operand &resOpnd, Operand &opnd0, Operand &opnd1, PrimType primType) override; Operand *SelectAdd(BinaryNode &node, Operand &opnd0, Operand &opnd1, const BaseNode &parent) override; + void SelectAdds(Operand &resOpnd, Operand &opnd0, Operand &opnd1, PrimType primType); + void SelectSubs(Operand &resOpnd, Operand &opnd0, Operand &opnd1, PrimType primType); + void SelectAdc(Operand &resOpnd, Operand &opnd0, Operand &opnd1, PrimType primType); + void SelectSbc(Operand &resOpnd, Operand &opnd0, Operand &opnd1, PrimType primType); + void SelectCarryOperator(bool isAdc, Operand &resOpnd, Operand &opnd0, Operand &opnd1, PrimType primType); Operand &SelectCGArrayElemAdd(BinaryNode &node, const BaseNode &parent) override; void SelectMadd(Operand &resOpnd, Operand &opndM0, Operand &opndM1, Operand &opnd1, PrimType primType) override; Operand *SelectMadd(BinaryNode &node, Operand &opndM0, Operand &opndM1, Operand &opnd1, @@ -224,8 +228,9 @@ class AArch64CGFunc : public CGFunc { Operand *SelectBxor(BinaryNode &node, Operand &opnd0, Operand &opnd1, const BaseNode &parent) override; void SelectBxor(Operand &resOpnd, Operand &opnd0, Operand &opnd1, PrimType primType) override; void SelectNand(Operand &resOpnd, Operand &opnd0, Operand &opnd1, PrimType primType) override; - - void SelectBxorShift(Operand &resOpnd, Operand *opnd0, Operand *opnd1, Operand &opnd2, PrimType primType); + void SelectBandShift(Operand &resOpnd, Operand &opnd0, Operand &opnd1, BitShiftOperand &shiftOp, PrimType primType); + void SelectBiorShift(Operand &resOpnd, Operand &opnd0, Operand &opnd1, BitShiftOperand &shiftOp, PrimType primType); + void SelectBxorShift(Operand &resOpnd, Operand &opnd0, Operand &opnd1, BitShiftOperand &shiftOp, PrimType primType); Operand *SelectLand(BinaryNode &node, Operand &lhsOpnd, Operand &rhsOpnd, const BaseNode &parent) override; Operand *SelectLor(BinaryNode &node, Operand &opnd0, Operand &opnd1, const BaseNode &parent, bool parentIsBr = false) override; @@ -246,6 +251,8 @@ class AArch64CGFunc : public CGFunc { void SelectAArch64CSINV(Operand &res, Operand &o0, Operand &o1, CondOperand &cond, bool is64Bits); void SelectAArch64CSINC(Operand &res, Operand &o0, Operand &o1, CondOperand &cond, bool is64Bits); void SelectShift(Operand &resOpnd, Operand &opnd0, Operand &opnd1, ShiftDirection direct, PrimType primType); + void SelectTst(Operand &opnd0, Operand &opnd1, uint32 size); + void SelectMulh(bool isSigned, Operand &resOpnd, Operand &opnd0, Operand &opnd1); Operand *SelectMpy(BinaryNode &node, Operand &opnd0, Operand &opnd1, const BaseNode &parent) override; void SelectMpy(Operand &resOpnd, Operand &opnd0, Operand &opnd1, PrimType primType) override; /* method description contains method information which is metadata for reflection. */ @@ -261,9 +268,12 @@ class AArch64CGFunc : public CGFunc { Operand *SelectAbsSub(Insn &lastInsn, const UnaryNode &node, Operand &newOpnd0); Operand *SelectAbs(UnaryNode &node, Operand &opnd0) override; Operand *SelectBnot(UnaryNode &node, Operand &opnd0, const BaseNode &parent) override; + void SelectBnot(Operand &resOpnd, Operand &opnd, PrimType primType); Operand *SelectBswap(IntrinsicopNode &node, Operand &opnd0, const BaseNode &parent) override; + void SelectExtractbits(Operand &resOpnd, uint8 offset, uint8 size, Operand &srcOpnd, PrimType dtype, Opcode extOp); Operand *SelectExtractbits(ExtractbitsNode &node, Operand &srcOpnd, const BaseNode &parent) override; Operand *SelectRegularBitFieldLoad(ExtractbitsNode &node, const BaseNode &parent) override; + void SelectDepositBits(Operand &resOpnd, uint8 offset, uint8 size, Operand &opnd0, Operand &opnd1, PrimType primType); Operand *SelectDepositBits(DepositbitsNode &node, Operand &opnd0, Operand &opnd1, const BaseNode &parent) override; Operand *SelectLnot(UnaryNode &node, Operand &srcOpnd, const BaseNode &parent) override; Operand *SelectNeg(UnaryNode &node, Operand &opnd0, const BaseNode &parent) override; @@ -385,6 +395,35 @@ class AArch64CGFunc : public CGFunc { return origTyp == PTY_v1i64 || origTyp == PTY_v1u64 ? PTY_f64 : origTyp; } + struct SplittedInt128 { + Operand &low; + Operand &high; + }; + + struct SplittedInt128 SplitInt128(Operand &opnd); + RegOperand &CombineInt128(const SplittedInt128 parts); + void CombineInt128(Operand &resOpnd, const SplittedInt128 parts); + SplittedInt128 GetSplittedInt128(Operand &opnd, PrimType opndType); + void SelectInt128Cvt(Operand *&resOpnd, Operand &opnd0, PrimType fromType, PrimType toType); + RegOperand *SelectShiftInt128(Operand &opnd0, Operand &opnd1, ShiftDirection direct); + void SelectShiftInt128Imm(Operand &resOpnd, Operand &opnd0, Operand &opnd1, ShiftDirection direct); + void SelectShlInt128(Operand &resOpnd, Operand &origOpnd0, Operand &shiftVal); + void SelectShrInt128(Operand &resOpnd, Operand &origOpnd0, Operand &shiftVal, bool isAShr); + RegOperand *SelectAddInt128(Operand &origOpnd0, PrimType opnd0Ty, Operand &origOpnd1, PrimType opnd1Ty); + RegOperand *SelectSubInt128(Operand &origOpnd0, PrimType opnd0Ty, Operand &origOpnd1, PrimType opnd1Ty); + RegOperand *SelectMpyInt128(Operand &origOpnd0, PrimType opnd0Ty, Operand &origOpnd1, PrimType opnd1Ty); + RegOperand *SelectBnotInt128(Operand &origOpnd); + RegOperand *SelectNegInt128(Operand &origOpnd); + void SelectInt128CompNeq(Operand &result, Operand &origOpnd0, PrimType opnd0Ty, Operand &origOpnd1, PrimType opnd1Ty); + void SelectInt128CompLt(Operand &result, Operand &origOpnd0, PrimType opnd0Ty, Operand &origOpnd1, PrimType opnd1Ty, + bool signedCond); + void SelectCondGotoInt128(LabelOperand &label, Opcode jmpOp, Opcode cmpOp, Operand &opnd0, Operand &opnd1, + bool signedCond); + void SelectInt128Compare(Operand &resOpnd, Operand &lhs, PrimType lhsTy, Operand &rhs, PrimType rhsTy, Opcode opcode, + bool isSigned); + void SelectParmListForInt128(Operand &opnd, ListOperand &srcOpnds, const CCLocInfo &ploc); + RegOperand *SelectExtractbitsInt128(uint8 bitOffset, uint8 bitSize, Operand &srcOpnd, Opcode extOp); + RegOperand *SelectDepositBitsInt128(uint8 offset, uint8 size, Operand &opnd0, Operand &opnd1); ImmOperand &CreateImmOperand(PrimType ptyp, int64 val) override { if (ptyp == PTY_f32 || ptyp == PTY_f64) { ASSERT(val == 0, "val must be 0!"); @@ -562,6 +601,13 @@ class AArch64CGFunc : public CGFunc { return calleeSavedRegs; } + bool IsUsedCalleeSavedReg(AArch64reg reg) { + if (std::find(calleeSavedRegs.begin(), calleeSavedRegs.end(), reg) != calleeSavedRegs.end()) { + return true; + } + return false; + } + Insn *GetYieldPointInsn() { return yieldPointInsn; } @@ -899,6 +945,10 @@ class AArch64CGFunc : public CGFunc { PrimType primType); MOperator SelectRelationMop(RelationOperator operatorCode, RelationOperatorOpndPattern opndPattern, bool is64Bits, bool isBitmaskImmediate, bool isBitNumLessThan16) const; + Operand *SelectRelationOperatorInt128(RelationOperator operatorCode, Operand &origOpnd0, PrimType oty0, + Operand &origOpnd1, PrimType oty1); + void SelectRelationShiftOperator(RelationOperator operatorCode, Operand &resOpnd, Operand &opnd0, Operand &opnd1, + BitShiftOperand &shiftOp, PrimType primType); Operand *SelectMinOrMax(bool isMin, const BinaryNode &node, Operand &opnd0, Operand &opnd1, const BaseNode &parent); Operand *SelectRoundLibCall(RoundType roundType, const TypeCvtNode &node, Operand &opnd0); Operand *SelectRoundOperator(RoundType roundType, const TypeCvtNode &node, Operand &opnd0, const BaseNode &parent); diff --git a/src/mapleall/maple_be/include/cg/isolate_fastpath.h b/src/mapleall/maple_be/include/cg/aarch64/aarch64_dup.h similarity index 51% rename from src/mapleall/maple_be/include/cg/isolate_fastpath.h rename to src/mapleall/maple_be/include/cg/aarch64/aarch64_dup.h index 9bdb58cae8..4d0d73c35b 100644 --- a/src/mapleall/maple_be/include/cg/isolate_fastpath.h +++ b/src/mapleall/maple_be/include/cg/aarch64/aarch64_dup.h @@ -1,5 +1,5 @@ /* - * Copyright (c) [2022] Huawei Technologies Co.,Ltd.All rights reserved. + * Copyright (c) [2023] Huawei Technologies Co.,Ltd.All rights reserved. * * OpenArkCompiler is licensed under Mulan PSL v2. * You can use this software according to the terms and conditions of the Mulan PSL v2. @@ -12,27 +12,18 @@ * FIT FOR A PARTICULAR PURPOSE. * See the Mulan PSL v2 for more details. */ -#ifndef MAPLEBE_INCLUDE_CG_ISOLATE_FASTPATH_H -#define MAPLEBE_INCLUDE_CG_ISOLATE_FASTPATH_H -#include "cgfunc.h" +#ifndef MAPLEBE_INCLUDE_CG_AARCH64_AARCH64_DUP_H +#define MAPLEBE_INCLUDE_CG_AARCH64_AARCH64_DUP_H + +#include "dup_tail.h" namespace maplebe { -class IsolateFastPath { +class AArch64DupTailOptimizer : public DupTailOptimizer { public: - explicit IsolateFastPath(CGFunc &func) - : cgFunc(func) {} - - virtual ~IsolateFastPath() = default; - - virtual void Run() {} - - std::string PhaseName() const { - return "isolate_fastpath"; - } - - protected: - CGFunc &cgFunc; + AArch64DupTailOptimizer(CGFunc &func, MemPool &memPool) : DupTailOptimizer(func, memPool) {} + ~AArch64DupTailOptimizer() override = default; + void InitOptimizePatterns() override; }; -} /* namespace maplebe */ +} // namespace maplebe -#endif /* MAPLEBE_INCLUDE_CG_ISOLATE_FASTPATH_H */ +#endif // MAPLEBE_INCLUDE_CG_AARCH64_AARCH64_CFGO_H diff --git a/src/mapleall/maple_be/include/cg/aarch64/aarch64_ico.h b/src/mapleall/maple_be/include/cg/aarch64/aarch64_ico.h index 97975c4a53..e7632c3dfb 100755 --- a/src/mapleall/maple_be/include/cg/aarch64/aarch64_ico.h +++ b/src/mapleall/maple_be/include/cg/aarch64/aarch64_ico.h @@ -31,7 +31,7 @@ class AArch64IfConversionOptimizer : public IfConversionOptimizer { class AArch64ICOPattern : public ICOPattern { public: explicit AArch64ICOPattern(CGFunc &func) : ICOPattern(func) {} - virtual ~AArch64ICOPattern() = default; + ~AArch64ICOPattern() override = default; protected: ConditionCode Encode(MOperator mOp, bool inverse) const; Insn *BuildCmpInsn(const Insn &condBr) const; @@ -62,7 +62,9 @@ class AArch64ICOIfThenElsePattern : public AArch64ICOPattern { const std::map> &elseDestSrcMap; }; - explicit AArch64ICOIfThenElsePattern(CGFunc &func) : AArch64ICOPattern(func) {} + explicit AArch64ICOIfThenElsePattern(CGFunc &func) : AArch64ICOPattern(func) { + patternName = "IfthenElsePattern"; + } ~AArch64ICOIfThenElsePattern() override { cmpBB = nullptr; } @@ -114,7 +116,9 @@ class AArch64ICOIfThenElsePattern : public AArch64ICOPattern { * */ class AArch64ICOSameCondPattern : public AArch64ICOPattern { public: - explicit AArch64ICOSameCondPattern(CGFunc &func) : AArch64ICOPattern(func) {} + explicit AArch64ICOSameCondPattern(CGFunc &func) : AArch64ICOPattern(func) { + patternName = "SameCondPattern"; + } ~AArch64ICOSameCondPattern() override = default; bool Optimize(BB &secondIfBB) override; protected: @@ -137,7 +141,9 @@ class AArch64ICOSameCondPattern : public AArch64ICOPattern { * */ class AArch64ICOMorePredsPattern : public AArch64ICOPattern { public: - explicit AArch64ICOMorePredsPattern(CGFunc &func) : AArch64ICOPattern(func) {} + explicit AArch64ICOMorePredsPattern(CGFunc &func) : AArch64ICOPattern(func) { + patternName = "ICOMorePredsPattern"; + } ~AArch64ICOMorePredsPattern() override = default; bool Optimize(BB &curBB) override; protected: @@ -176,14 +182,17 @@ class AArch64ICOMorePredsPattern : public AArch64ICOPattern { // class AArch64ICOCondSetPattern : public AArch64ICOPattern { public: - explicit AArch64ICOCondSetPattern(CGFunc &func) : AArch64ICOPattern(func) {} + explicit AArch64ICOCondSetPattern(CGFunc &func) : AArch64ICOPattern(func) { + patternName = "ICOCondSetPattern"; + } ~AArch64ICOCondSetPattern() override = default; bool Optimize(BB &curBB) override; protected: - bool DoOpt(BB &curBB) const; + bool DoOpt(BB &curBB); bool CheckMovGotoBB(BB >BB); bool CheckMovFallthruBB(BB &ftBB); - Insn *BuildNewInsn(ImmOperand &immOpnd1, ImmOperand &immOpnd2, Insn &bInsn, RegOperand &dest, bool is32Bits) const; + Insn *BuildNewInsn(const ImmOperand &immOpnd1, const ImmOperand &immOpnd2, const Insn &bInsn, + RegOperand &dest, bool is32Bits) const; private: BB *firstMovBB = nullptr; BB *secondMovBB = nullptr; diff --git a/src/mapleall/maple_be/include/cg/aarch64/aarch64_md.def b/src/mapleall/maple_be/include/cg/aarch64/aarch64_md.def index 50d6de6b88..493666336f 100644 --- a/src/mapleall/maple_be/include/cg/aarch64/aarch64_md.def +++ b/src/mapleall/maple_be/include/cg/aarch64/aarch64_md.def @@ -138,6 +138,16 @@ DEFINE_MOP(MOP_dsub, {&OpndDesc::Reg64FD, &OpndDesc::Reg64FS, &OpndDesc::Reg64FS /* MOP_ssub */ DEFINE_MOP(MOP_ssub, {&OpndDesc::Reg32FD, &OpndDesc::Reg32FS, &OpndDesc::Reg32FS}, 0, kLtFpalu, "fsub", "0,1,2", 1) +/* AARCH64 Arithmetic: adc/sbc */ +/* MOP_xadcrrr */ +DEFINE_MOP(MOP_xadcrrr, {&OpndDesc::CCS, &OpndDesc::Reg64ID,&OpndDesc::Reg64IS,&OpndDesc::Reg64IS},0,kLtAlu,"adc","1,2,3",1) +/* MOP_xsbcrrr */ +DEFINE_MOP(MOP_xsbcrrr, {&OpndDesc::CCS, &OpndDesc::Reg64ID,&OpndDesc::Reg64IS,&OpndDesc::Reg64IS},0,kLtAlu,"sbc","1,2,3",1) +/* MOP_wadcrrr */ +DEFINE_MOP(MOP_wadcrrr, {&OpndDesc::CCS,&OpndDesc::Reg32ID,&OpndDesc::Reg32IS,&OpndDesc::Reg32IS},0,kLtAlu,"adc","1,2,3",1) +/* MOP_wsbcrrr */ +DEFINE_MOP(MOP_wsbcrrr, {&OpndDesc::CCS,&OpndDesc::Reg32ID,&OpndDesc::Reg32IS,&OpndDesc::Reg32IS},0,kLtAlu,"sbc","1,2,3",1) + /* AARCH64 Arithmetic: multiply */ /* MOP_Tbxmulrrr */ DEFINE_MOP(MOP_xmulrrr, {&OpndDesc::Reg64ID, &OpndDesc::Reg64IS, &OpndDesc::Reg64IS}, 0, kLtMul, "mul", "0,1,2", 1) @@ -156,6 +166,12 @@ DEFINE_MOP(MOP_xmaddrrrr, {&OpndDesc::Reg64ID, &OpndDesc::Reg64IS, &OpndDesc::Re /* MOP_wmaddrrrr */ DEFINE_MOP(MOP_wmaddrrrr, {&OpndDesc::Reg32ID, &OpndDesc::Reg32IS, &OpndDesc::Reg32IS, &OpndDesc::Reg32IS}, 0, kLtMul, "madd", "0,1,2,3", 1) +/* AARCH64 Arithmetic: multiply high */ +/* MOP_smulh */ +DEFINE_MOP(MOP_smulh, {&OpndDesc::Reg64ID,&OpndDesc::Reg64IS,&OpndDesc::Reg64IS},0,kLtMul,"smulh","0,1,2",1) +/* MOP_umulh */ +DEFINE_MOP(MOP_umulh, {&OpndDesc::Reg64ID,&OpndDesc::Reg64IS,&OpndDesc::Reg64IS},0,kLtMul,"umulh","0,1,2",1) + /* AARCH64 leading zeros, reverse bits (for trailing zeros) */ /* MOP_wclz */ DEFINE_MOP(MOP_wclz, {&OpndDesc::Reg32ID, &OpndDesc::Reg32IS}, 0, kLtAlu, "clz", "0,1", 1) @@ -500,7 +516,7 @@ DEFINE_MOP(MOP_tls_desc_rel, {&OpndDesc::Reg64ID, &OpndDesc::Reg64IS, &OpndDesc: * .tlsdesccall symbol * blr x1 */ -DEFINE_MOP(MOP_tls_desc_call, {&OpndDesc::Reg64ID, &OpndDesc::Reg64ID, &OpndDesc::ListSrc}, ISSPCALL | CANTHROW | SPINTRINSIC, kLtBranch, "tlsdesccall", "0,1", 2) +DEFINE_MOP(MOP_tls_desc_call, {&OpndDesc::Reg64ID, &OpndDesc::Reg64ID, &OpndDesc::ListSrc}, ISSPCALL | CANTHROW | SPINTRINSIC, kLtBranch, "tlsdesccall", "0,1", 4) /* * will be emit to three instrunctions in a row: @@ -717,7 +733,7 @@ DEFINE_MOP(MOP_wcmprrs, {&OpndDesc::CCD, &OpndDesc::Reg32IS, &OpndDesc::Reg32IS, /* MOP_wwcmprre -- register, shifted register, AArch64 cmp has no dest operand */ DEFINE_MOP(MOP_wwcmprre, {&OpndDesc::CCD, &OpndDesc::Reg32IS, &OpndDesc::Reg32IS, &OpndDesc::Extendshift64}, 0, kLtAluShift, "cmp", "1,2,3", 1, MOP_wwcmprreValid) /* MOP_xcmpri -- AArch64 cmp has no dest operand */ -DEFINE_MOP(MOP_xcmpri, {&OpndDesc::CCD, &OpndDesc::Reg64IS, &OpndDesc::Imm16}, 0, kLtAlu, "cmp", "1,2", 1, MOP_xcmpriValid) +DEFINE_MOP(MOP_xcmpri, {&OpndDesc::CCD, &OpndDesc::Reg64IS, &OpndDesc::Imm12}, 0, kLtAlu, "cmp", "1,2", 1, MOP_xcmpriValid) /* MOP_xcmprr -- register, shifted register, AArch64 cmp has no dest operand */ DEFINE_MOP(MOP_xcmprr, {&OpndDesc::CCD, &OpndDesc::Reg64IS, &OpndDesc::Reg64IS}, 0, kLtAlu, "cmp", "1,2", 1) /* MOP_xcmprrs -- register, shifted register, AArch64 cmp has no dest operand */ @@ -743,7 +759,7 @@ DEFINE_MOP(MOP_wcmnrrs, {&OpndDesc::CCD, &OpndDesc::Reg32IS, &OpndDesc::Reg32IS, /* MOP_wwcmnrre -- register, shifted register, AArch64 cmp has no dest operand */ DEFINE_MOP(MOP_wwcmnrre, {&OpndDesc::CCD, &OpndDesc::Reg32IS, &OpndDesc::Reg32IS, &OpndDesc::Extendshift64}, 0, kLtAluShift, "cmn", "1,2,3", 1, MOP_wwcmnrreValid) /* MOP_xcmnri -- AArch64 cmp has no dest operand */ -DEFINE_MOP(MOP_xcmnri, {&OpndDesc::CCD, &OpndDesc::Reg64IS, &OpndDesc::Imm16}, 0, kLtAlu, "cmn", "1,2", 1, MOP_xcmnriValid) +DEFINE_MOP(MOP_xcmnri, {&OpndDesc::CCD, &OpndDesc::Reg64IS, &OpndDesc::Imm12}, 0, kLtAlu, "cmn", "1,2", 1, MOP_xcmnriValid) /* MOP_xcmnrr -- register, shifted register, AArch64 cmp has no dest operand */ DEFINE_MOP(MOP_xcmnrr, {&OpndDesc::CCD, &OpndDesc::Reg64IS, &OpndDesc::Reg64IS}, 0, kLtAlu, "cmn", "1,2", 1) /* MOP_xcmnrrs -- register, shifted register, AArch64 cmp has no dest operand */ @@ -855,21 +871,21 @@ DEFINE_MOP(MOP_vwmovrv, {&OpndDesc::Reg32ID, &OpndDesc::Reg128VS}, ISVECTOR, kLt DEFINE_MOP(MOP_vxmovrv, {&OpndDesc::Reg64ID, &OpndDesc::Reg128VS}, ISVECTOR, kLtAdvsimdAluQ, "umov", "0,1", 1) DEFINE_MOP(MOP_vwsmovru, {&OpndDesc::Reg32ID, &OpndDesc::Reg64VS}, ISVECTOR, kLtFpalu, "smov", "0,1", 1) DEFINE_MOP(MOP_vwsmovrv, {&OpndDesc::Reg32ID, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "smov", "0,1", 1) -DEFINE_MOP(MOP_vwdupur, {&OpndDesc::Reg64VD, &OpndDesc::Reg32IS}, ISVECTOR | SPINTRINSIC, kLtAdvsimdAlu, "dup", "0,1", 1) -DEFINE_MOP(MOP_vwdupvr, {&OpndDesc::Reg128VD, &OpndDesc::Reg32IS}, ISVECTOR | SPINTRINSIC, kLtAdvsimdAlu, "dup", "0,1", 1) -DEFINE_MOP(MOP_vxdupur, {&OpndDesc::Reg64VD, &OpndDesc::Reg64IS}, ISVECTOR | SPINTRINSIC, kLtAdvsimdAlu, "dup", "0,1", 1) -DEFINE_MOP(MOP_vxdupvr, {&OpndDesc::Reg128VD, &OpndDesc::Reg64IS}, ISVECTOR | SPINTRINSIC, kLtAdvsimdAlu, "dup", "0,1", 1) -DEFINE_MOP(MOP_vduprv, {&OpndDesc::Reg64FD, &OpndDesc::Reg128VS}, ISVECTOR | SPINTRINSIC, kLtAdvsimdAlu, "dup", "0,1", 1) -DEFINE_MOP(MOP_vbdupru, {&OpndDesc::Reg8FD, &OpndDesc::Reg64VS}, ISVECTOR | SPINTRINSIC, kLtFpalu, "dup", "0,1", 1) -DEFINE_MOP(MOP_vbduprv, {&OpndDesc::Reg8FD, &OpndDesc::Reg128VS}, ISVECTOR | SPINTRINSIC, kLtFpalu, "dup", "0,1", 1) -DEFINE_MOP(MOP_vhdupru, {&OpndDesc::Reg16FD, &OpndDesc::Reg64VS}, ISVECTOR | SPINTRINSIC, kLtFpalu, "dup", "0,1", 1) -DEFINE_MOP(MOP_vhduprv, {&OpndDesc::Reg16FD, &OpndDesc::Reg128VS}, ISVECTOR | SPINTRINSIC, kLtFpalu, "dup", "0,1", 1) -DEFINE_MOP(MOP_vsdupru, {&OpndDesc::Reg32FD, &OpndDesc::Reg64VS}, ISVECTOR | SPINTRINSIC, kLtFpalu, "dup", "0,1", 1) -DEFINE_MOP(MOP_vsduprv, {&OpndDesc::Reg32FD, &OpndDesc::Reg128VS}, ISVECTOR | SPINTRINSIC, kLtFpalu, "dup", "0,1", 1) -DEFINE_MOP(MOP_vdupuu, {&OpndDesc::Reg64VD, &OpndDesc::Reg64VS}, ISVECTOR | SPINTRINSIC, kLtAdvsimdAlu, "dup", "0,1", 1) -DEFINE_MOP(MOP_vdupuv, {&OpndDesc::Reg64VD, &OpndDesc::Reg128VS}, ISVECTOR | SPINTRINSIC, kLtAdvsimdAlu, "dup", "0,1", 1) -DEFINE_MOP(MOP_vdupvu, {&OpndDesc::Reg128VD, &OpndDesc::Reg64VS}, ISVECTOR | SPINTRINSIC, kLtFpalu, "dup", "0,1", 1) -DEFINE_MOP(MOP_vdupvv, {&OpndDesc::Reg128VD, &OpndDesc::Reg128VS}, ISVECTOR | SPINTRINSIC, kLtAdvsimdAlu, "dup", "0,1", 1) +DEFINE_MOP(MOP_vwdupur, {&OpndDesc::Reg64VD, &OpndDesc::Reg32IS}, ISVECTOR, kLtAdvsimdAlu, "dup", "0,1", 1) +DEFINE_MOP(MOP_vwdupvr, {&OpndDesc::Reg128VD, &OpndDesc::Reg32IS}, ISVECTOR, kLtAdvsimdAlu, "dup", "0,1", 1) +DEFINE_MOP(MOP_vxdupur, {&OpndDesc::Reg64VD, &OpndDesc::Reg64IS}, ISVECTOR, kLtAdvsimdAlu, "dup", "0,1", 1) +DEFINE_MOP(MOP_vxdupvr, {&OpndDesc::Reg128VD, &OpndDesc::Reg64IS}, ISVECTOR, kLtAdvsimdAlu, "dup", "0,1", 1) +DEFINE_MOP(MOP_vduprv, {&OpndDesc::Reg64FD, &OpndDesc::Reg128VS}, ISVECTOR, kLtAdvsimdAlu, "dup", "0,1", 1) +DEFINE_MOP(MOP_vbdupru, {&OpndDesc::Reg8FD, &OpndDesc::Reg64VS}, ISVECTOR, kLtFpalu, "dup", "0,1", 1) +DEFINE_MOP(MOP_vbduprv, {&OpndDesc::Reg8FD, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "dup", "0,1", 1) +DEFINE_MOP(MOP_vhdupru, {&OpndDesc::Reg16FD, &OpndDesc::Reg64VS}, ISVECTOR, kLtFpalu, "dup", "0,1", 1) +DEFINE_MOP(MOP_vhduprv, {&OpndDesc::Reg16FD, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "dup", "0,1", 1) +DEFINE_MOP(MOP_vsdupru, {&OpndDesc::Reg32FD, &OpndDesc::Reg64VS}, ISVECTOR, kLtFpalu, "dup", "0,1", 1) +DEFINE_MOP(MOP_vsduprv, {&OpndDesc::Reg32FD, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "dup", "0,1", 1) +DEFINE_MOP(MOP_vdupuu, {&OpndDesc::Reg64VD, &OpndDesc::Reg64VS}, ISVECTOR, kLtAdvsimdAlu, "dup", "0,1", 1) +DEFINE_MOP(MOP_vdupuv, {&OpndDesc::Reg64VD, &OpndDesc::Reg128VS}, ISVECTOR, kLtAdvsimdAlu, "dup", "0,1", 1) +DEFINE_MOP(MOP_vdupvu, {&OpndDesc::Reg128VD, &OpndDesc::Reg64VS}, ISVECTOR, kLtFpalu, "dup", "0,1", 1) +DEFINE_MOP(MOP_vdupvv, {&OpndDesc::Reg128VD, &OpndDesc::Reg128VS}, ISVECTOR, kLtAdvsimdAlu, "dup", "0,1", 1) DEFINE_MOP(MOP_vextuuui, {&OpndDesc::Reg64VD, &OpndDesc::Reg64VS, &OpndDesc::Reg64VS, &OpndDesc::Imm8}, ISVECTOR, kLtAdvsimdAlu, "ext", "0,1,2,3", 1) DEFINE_MOP(MOP_vextvvvi, {&OpndDesc::Reg128VD, &OpndDesc::Reg128VS, &OpndDesc::Reg128VS, &OpndDesc::Imm8}, ISVECTOR, kLtAdvsimdAluQ, "ext", "0,1,2,3", 1) DEFINE_MOP(MOP_vsabdlvuu, {&OpndDesc::Reg128VD, &OpndDesc::Reg64VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtAdvsimdAlu, "sabdl", "0,1,2", 1) @@ -884,10 +900,10 @@ DEFINE_MOP(MOP_vsaddlpuu, {&OpndDesc::Reg64VD, &OpndDesc::Reg64VS}, ISVECTOR, kL DEFINE_MOP(MOP_vsaddlpvv, {&OpndDesc::Reg128VD, &OpndDesc::Reg128VS}, ISVECTOR, kLtAdvsimdAluQ, "saddlp", "0,1", 1) DEFINE_MOP(MOP_vuaddlpuu, {&OpndDesc::Reg64VD, &OpndDesc::Reg64VS}, ISVECTOR, kLtAdvsimdAlu, "uaddlp", "0,1", 1) DEFINE_MOP(MOP_vuaddlpvv, {&OpndDesc::Reg128VD, &OpndDesc::Reg128VS}, ISVECTOR, kLtAdvsimdAluQ, "uaddlp", "0,1", 1) -DEFINE_MOP(MOP_vwinsur, {&OpndDesc::Reg64VDS, &OpndDesc::Reg32IS}, ISVECTOR | SPINTRINSIC, kLtAdvsimdAlu, "ins", "0,1", 1) -DEFINE_MOP(MOP_vxinsur, {&OpndDesc::Reg64VDS, &OpndDesc::Reg64IS}, ISVECTOR | SPINTRINSIC, kLtAdvsimdAlu, "ins", "0,1", 1) -DEFINE_MOP(MOP_vwinsvr, {&OpndDesc::Reg128VDS, &OpndDesc::Reg32IS}, ISVECTOR | SPINTRINSIC, kLtAdvsimdAluQ, "ins", "0,1", 1) -DEFINE_MOP(MOP_vxinsvr, {&OpndDesc::Reg128VDS, &OpndDesc::Reg64IS}, ISVECTOR | SPINTRINSIC, kLtAdvsimdAluQ, "ins", "0,1", 1) +DEFINE_MOP(MOP_vwinsur, {&OpndDesc::Reg64VDS, &OpndDesc::Reg32IS}, ISVECTOR, kLtAdvsimdAlu, "ins", "0,1", 1) +DEFINE_MOP(MOP_vxinsur, {&OpndDesc::Reg64VDS, &OpndDesc::Reg64IS}, ISVECTOR, kLtAdvsimdAlu, "ins", "0,1", 1) +DEFINE_MOP(MOP_vwinsvr, {&OpndDesc::Reg128VDS, &OpndDesc::Reg32IS}, ISVECTOR, kLtAdvsimdAluQ, "ins", "0,1", 1) +DEFINE_MOP(MOP_vxinsvr, {&OpndDesc::Reg128VDS, &OpndDesc::Reg64IS}, ISVECTOR, kLtAdvsimdAluQ, "ins", "0,1", 1) DEFINE_MOP(MOP_vrev16dd, {&OpndDesc::Reg64VD, &OpndDesc::Reg64VS}, ISVECTOR, kLtAdvsimdAlu, "rev16", "0,1", 1) DEFINE_MOP(MOP_vrev32dd, {&OpndDesc::Reg64VD, &OpndDesc::Reg64VS}, ISVECTOR, kLtAdvsimdAlu, "rev32", "0,1", 1) DEFINE_MOP(MOP_vrev64dd, {&OpndDesc::Reg64VD, &OpndDesc::Reg64VS}, ISVECTOR, kLtAdvsimdAlu, "rev64", "0,1", 1) @@ -949,16 +965,16 @@ DEFINE_MOP(MOP_vuxtl2vv, {&OpndDesc::Reg128VD, &OpndDesc::Reg128VS}, ISVECTOR, k DEFINE_MOP(MOP_vshruui, {&OpndDesc::Reg64VD, &OpndDesc::Reg64VS, &OpndDesc::Imm8}, ISVECTOR, kLtAdvsimdAlu, "sshr", "0,1,2", 1) DEFINE_MOP(MOP_vshrvvi, {&OpndDesc::Reg128VD, &OpndDesc::Reg128VS, &OpndDesc::Imm8}, ISVECTOR, kLtAdvsimdAluQ, "sshr", "0,1,2", 1) -DEFINE_MOP(MOP_vsmaddvvv, {&OpndDesc::Reg128VDS, &OpndDesc::Reg64VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtAdvsimdAluQ, "smlal", "0,1,2", 1) -DEFINE_MOP(MOP_vumaddvvv, {&OpndDesc::Reg128VDS, &OpndDesc::Reg64VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtAdvsimdAluQ, "umlal", "0,1,2", 1) -DEFINE_MOP(MOP_vsmullvuu, {&OpndDesc::Reg128VD, &OpndDesc::Reg64VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtAdvsimdAluQ, "smull", "0,1,2", 1) -DEFINE_MOP(MOP_vumullvuu, {&OpndDesc::Reg128VD, &OpndDesc::Reg64VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtAdvsimdAluQ, "umull", "0,1,2", 1) -DEFINE_MOP(MOP_vsmullvuv, {&OpndDesc::Reg128VD, &OpndDesc::Reg64VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtAdvsimdAluQ, "smull", "0,1,2", 1) -DEFINE_MOP(MOP_vumullvuv, {&OpndDesc::Reg128VD, &OpndDesc::Reg64VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtAdvsimdAluQ, "umull", "0,1,2", 1) -DEFINE_MOP(MOP_vsmullvvv, {&OpndDesc::Reg128VD, &OpndDesc::Reg128VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtAdvsimdAluQ, "smull", "0,1,2", 1) -DEFINE_MOP(MOP_vumullvvv, {&OpndDesc::Reg128VD, &OpndDesc::Reg128VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtAdvsimdAluQ, "umull", "0,1,2", 1) -DEFINE_MOP(MOP_vsmull2vvv, {&OpndDesc::Reg128VD, &OpndDesc::Reg128VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtAdvsimdAluQ, "smull2", "0,1,2", 1) -DEFINE_MOP(MOP_vumull2vvv, {&OpndDesc::Reg128VD, &OpndDesc::Reg128VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "umull2", "0,1,2", 1) +DEFINE_MOP(MOP_vsmaddvvv, {&OpndDesc::Reg128VDS, &OpndDesc::Reg64VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtAdvsimdAluQ, "smlal", "0,1,2", 1, MOP_vsmaddvvvRegisterLimit) +DEFINE_MOP(MOP_vumaddvvv, {&OpndDesc::Reg128VDS, &OpndDesc::Reg64VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtAdvsimdAluQ, "umlal", "0,1,2", 1, MOP_vumaddvvvRegisterLimit) +DEFINE_MOP(MOP_vsmullvuu, {&OpndDesc::Reg128VD, &OpndDesc::Reg64VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtAdvsimdAluQ, "smull", "0,1,2", 1, MOP_vsmullvuuRegisterLimit) +DEFINE_MOP(MOP_vumullvuu, {&OpndDesc::Reg128VD, &OpndDesc::Reg64VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtAdvsimdAluQ, "umull", "0,1,2", 1, MOP_vumullvuuRegisterLimit) +DEFINE_MOP(MOP_vsmullvuv, {&OpndDesc::Reg128VD, &OpndDesc::Reg64VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtAdvsimdAluQ, "smull", "0,1,2", 1, MOP_vsmullvuvRegisterLimit) +DEFINE_MOP(MOP_vumullvuv, {&OpndDesc::Reg128VD, &OpndDesc::Reg64VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtAdvsimdAluQ, "umull", "0,1,2", 1, MOP_vumullvuvRegisterLimit) +DEFINE_MOP(MOP_vsmullvvv, {&OpndDesc::Reg128VD, &OpndDesc::Reg128VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtAdvsimdAluQ, "smull", "0,1,2", 1, MOP_vsmullvvvRegisterLimit) +DEFINE_MOP(MOP_vumullvvv, {&OpndDesc::Reg128VD, &OpndDesc::Reg128VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtAdvsimdAluQ, "umull", "0,1,2", 1, MOP_vumullvvvRegisterLimit) +DEFINE_MOP(MOP_vsmull2vvv, {&OpndDesc::Reg128VD, &OpndDesc::Reg128VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtAdvsimdAluQ, "smull2", "0,1,2", 1, MOP_vsmull2vvvRegisterLimit) +DEFINE_MOP(MOP_vumull2vvv, {&OpndDesc::Reg128VD, &OpndDesc::Reg128VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "umull2", "0,1,2", 1, MOP_vumull2vvvRegisterLimit) DEFINE_MOP(MOP_vabsrr, {&OpndDesc::Reg64FD, &OpndDesc::Reg64FS}, ISVECTOR, kLtFpalu, "abs", "0,1", 1) DEFINE_MOP(MOP_vabsuu, {&OpndDesc::Reg64VD, &OpndDesc::Reg64VS}, ISVECTOR, kLtFpalu, "abs", "0,1", 1) DEFINE_MOP(MOP_vabsvv, {&OpndDesc::Reg128VD, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "abs", "0,1", 1) @@ -973,8 +989,8 @@ DEFINE_MOP(MOP_vuaddwvvu, {&OpndDesc::Reg128VD, &OpndDesc::Reg128VS, &OpndDesc:: DEFINE_MOP(MOP_vsaddw2vvv, {&OpndDesc::Reg128VD, &OpndDesc::Reg128VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "saddw2", "0,1,2", 1) DEFINE_MOP(MOP_vuaddw2vvv, {&OpndDesc::Reg128VD, &OpndDesc::Reg128VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "uaddw2", "0,1,2", 1) DEFINE_MOP(MOP_vaddvvv, {&OpndDesc::Reg128VD, &OpndDesc::Reg128VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "add", "0,1,2", 1) -DEFINE_MOP(MOP_vmuluuu, {&OpndDesc::Reg64VD, &OpndDesc::Reg64VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtFpalu, "mul", "0,1,2", 1) -DEFINE_MOP(MOP_vmulvvv, {&OpndDesc::Reg128VD, &OpndDesc::Reg128VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "mul", "0,1,2", 1) +DEFINE_MOP(MOP_vmuluuu, {&OpndDesc::Reg64VD, &OpndDesc::Reg64VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtFpalu, "mul", "0,1,2", 1, MOP_vmuluuuRegisterLimit) +DEFINE_MOP(MOP_vmulvvv, {&OpndDesc::Reg128VD, &OpndDesc::Reg128VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "mul", "0,1,2", 1, MOP_vmulvvvRegisterLimit) DEFINE_MOP(MOP_vsubrrr, {&OpndDesc::Reg64FD, &OpndDesc::Reg64FS, &OpndDesc::Reg64FS}, ISVECTOR, kLtFpalu, "sub", "0,1,2", 1) DEFINE_MOP(MOP_vsubuuu, {&OpndDesc::Reg64VD, &OpndDesc::Reg64VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtFpalu, "sub", "0,1,2", 1) DEFINE_MOP(MOP_vsubvvv, {&OpndDesc::Reg128VD, &OpndDesc::Reg128VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "sub", "0,1,2", 1) @@ -1138,49 +1154,49 @@ DEFINE_MOP(MOP_vsuqaddvv, {&OpndDesc::Reg128VDS, &OpndDesc::Reg128VS}, ISVECTOR, DEFINE_MOP(MOP_vdusqaddrr, {&OpndDesc::Reg64FDS, &OpndDesc::Reg64FS}, ISVECTOR, kLtFpalu, "usqadd", "0,1", 1) DEFINE_MOP(MOP_vusqadduu, {&OpndDesc::Reg64VDS, &OpndDesc::Reg64VS}, ISVECTOR, kLtFpalu, "usqadd", "0,1", 1) DEFINE_MOP(MOP_vusqaddvv, {&OpndDesc::Reg128VDS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "usqadd", "0,1", 1) -DEFINE_MOP(MOP_vmlauuu, {&OpndDesc::Reg64VDS, &OpndDesc::Reg64VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtFpalu, "mla", "0,1,2", 1) -DEFINE_MOP(MOP_vmlauuv, {&OpndDesc::Reg64VDS, &OpndDesc::Reg64VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "mla", "0,1,2", 1) -DEFINE_MOP(MOP_vmlavvu, {&OpndDesc::Reg128VDS, &OpndDesc::Reg128VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtFpalu, "mla", "0,1,2", 1) -DEFINE_MOP(MOP_vmlavvv, {&OpndDesc::Reg128VDS, &OpndDesc::Reg128VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "mla", "0,1,2", 1) -DEFINE_MOP(MOP_vmlsuuu, {&OpndDesc::Reg64VDS, &OpndDesc::Reg64VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtFpalu, "mls", "0,1,2", 1) -DEFINE_MOP(MOP_vmlsuuv, {&OpndDesc::Reg64VDS, &OpndDesc::Reg64VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "mls", "0,1,2", 1) -DEFINE_MOP(MOP_vmlsvvu, {&OpndDesc::Reg128VDS, &OpndDesc::Reg128VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtFpalu, "mls", "0,1,2", 1) -DEFINE_MOP(MOP_vmlsvvv, {&OpndDesc::Reg128VDS, &OpndDesc::Reg128VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "mls", "0,1,2", 1) -DEFINE_MOP(MOP_vsmlalvuu, {&OpndDesc::Reg128VDS, &OpndDesc::Reg64VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtFpalu, "smlal", "0,1,2", 1) -DEFINE_MOP(MOP_vumlalvuu, {&OpndDesc::Reg128VDS, &OpndDesc::Reg64VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtFpalu, "umlal", "0,1,2", 1) -DEFINE_MOP(MOP_vsmlalvuv, {&OpndDesc::Reg128VDS, &OpndDesc::Reg64VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "smlal", "0,1,2", 1) -DEFINE_MOP(MOP_vumlalvuv, {&OpndDesc::Reg128VDS, &OpndDesc::Reg64VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "umlal", "0,1,2", 1) -DEFINE_MOP(MOP_vsmlal2vvv, {&OpndDesc::Reg128VDS, &OpndDesc::Reg128VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "smlal2", "0,1,2", 1) -DEFINE_MOP(MOP_vumlal2vvv, {&OpndDesc::Reg128VDS, &OpndDesc::Reg128VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "umlal2", "0,1,2", 1) -DEFINE_MOP(MOP_vsmlslvuu, {&OpndDesc::Reg128VDS, &OpndDesc::Reg64VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtFpalu, "smlsl", "0,1,2", 1) -DEFINE_MOP(MOP_vumlslvuu, {&OpndDesc::Reg128VDS, &OpndDesc::Reg64VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtFpalu, "umlsl", "0,1,2", 1) -DEFINE_MOP(MOP_vsmlslvuv, {&OpndDesc::Reg128VDS, &OpndDesc::Reg64VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "smlsl", "0,1,2", 1) -DEFINE_MOP(MOP_vumlslvuv, {&OpndDesc::Reg128VDS, &OpndDesc::Reg64VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "umlsl", "0,1,2", 1) -DEFINE_MOP(MOP_vsmlsl2vvu, {&OpndDesc::Reg128VDS, &OpndDesc::Reg128VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtFpalu, "smlsl2", "0,1,2", 1) -DEFINE_MOP(MOP_vumlsl2vvu, {&OpndDesc::Reg128VDS, &OpndDesc::Reg128VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtFpalu, "umlsl2", "0,1,2", 1) -DEFINE_MOP(MOP_vsmlsl2vvv, {&OpndDesc::Reg128VDS, &OpndDesc::Reg128VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "smlsl2", "0,1,2", 1) -DEFINE_MOP(MOP_vumlsl2vvv, {&OpndDesc::Reg128VDS, &OpndDesc::Reg128VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "umlsl2", "0,1,2", 1) -DEFINE_MOP(MOP_vsqdmulhuuu, {&OpndDesc::Reg64VD, &OpndDesc::Reg64VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtFpalu, "sqdmulh", "0,1,2", 1) -DEFINE_MOP(MOP_vsqdmulhuuv, {&OpndDesc::Reg64VD, &OpndDesc::Reg64VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "sqdmulh", "0,1,2", 1) -DEFINE_MOP(MOP_vsqdmulhvvu, {&OpndDesc::Reg128VD, &OpndDesc::Reg128VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtFpalu, "sqdmulh", "0,1,2", 1) -DEFINE_MOP(MOP_vsqdmulhvvv, {&OpndDesc::Reg128VD, &OpndDesc::Reg128VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "sqdmulh", "0,1,2", 1) -DEFINE_MOP(MOP_vsqrdmulhuuu, {&OpndDesc::Reg64VD, &OpndDesc::Reg64VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtFpalu, "sqrdmulh", "0,1,2", 1) -DEFINE_MOP(MOP_vsqrdmulhuuv, {&OpndDesc::Reg64VD, &OpndDesc::Reg64VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "sqrdmulh", "0,1,2", 1) -DEFINE_MOP(MOP_vsqrdmulhvvu, {&OpndDesc::Reg128VD, &OpndDesc::Reg128VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtFpalu, "sqrdmulh", "0,1,2", 1) -DEFINE_MOP(MOP_vsqrdmulhvvv, {&OpndDesc::Reg128VD, &OpndDesc::Reg128VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "sqrdmulh", "0,1,2", 1) -DEFINE_MOP(MOP_vsqdmulluuu, {&OpndDesc::Reg64VD, &OpndDesc::Reg64VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtFpalu, "sqdmull", "0,1,2", 1) -DEFINE_MOP(MOP_vsqdmullvuu, {&OpndDesc::Reg128VD, &OpndDesc::Reg64VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtFpalu, "sqdmull", "0,1,2", 1) -DEFINE_MOP(MOP_vsqdmullvuv, {&OpndDesc::Reg128VD, &OpndDesc::Reg64VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "sqdmull", "0,1,2", 1) -DEFINE_MOP(MOP_vsqdmull2vvu, {&OpndDesc::Reg128VD, &OpndDesc::Reg128VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtFpalu, "sqdmull2", "0,1,2", 1) -DEFINE_MOP(MOP_vsqdmull2vvv, {&OpndDesc::Reg128VD, &OpndDesc::Reg128VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "sqdmull2", "0,1,2", 1) -DEFINE_MOP(MOP_vsqdmlalvuu, {&OpndDesc::Reg128VDS, &OpndDesc::Reg64VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtFpalu, "sqdmlal", "0,1,2", 1) -DEFINE_MOP(MOP_vsqdmlalvuv, {&OpndDesc::Reg128VDS, &OpndDesc::Reg64VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "sqdmlal", "0,1,2", 1) -DEFINE_MOP(MOP_vsqdmlal2vvu, {&OpndDesc::Reg128VDS, &OpndDesc::Reg128VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtFpalu, "sqdmlal2", "0,1,2", 1) -DEFINE_MOP(MOP_vsqdmlal2vvv, {&OpndDesc::Reg128VDS, &OpndDesc::Reg128VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "sqdmlal2", "0,1,2", 1) -DEFINE_MOP(MOP_vsqdmlslvuu, {&OpndDesc::Reg128VDS, &OpndDesc::Reg64VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtFpalu, "sqdmlsl", "0,1,2", 1) -DEFINE_MOP(MOP_vsqdmlslvuv, {&OpndDesc::Reg128VDS, &OpndDesc::Reg64VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "sqdmlsl", "0,1,2", 1) -DEFINE_MOP(MOP_vsqdmlsl2vvu, {&OpndDesc::Reg128VDS, &OpndDesc::Reg128VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtFpalu, "sqdmlsl2", "0,1,2", 1) -DEFINE_MOP(MOP_vsqdmlsl2vvv, {&OpndDesc::Reg128VDS, &OpndDesc::Reg128VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "sqdmlsl2", "0,1,2", 1) +DEFINE_MOP(MOP_vmlauuu, {&OpndDesc::Reg64VDS, &OpndDesc::Reg64VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtFpalu, "mla", "0,1,2", 1, MOP_vmlauuuRegisterLimit) +DEFINE_MOP(MOP_vmlauuv, {&OpndDesc::Reg64VDS, &OpndDesc::Reg64VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "mla", "0,1,2", 1, MOP_vmlauuvRegisterLimit) +DEFINE_MOP(MOP_vmlavvu, {&OpndDesc::Reg128VDS, &OpndDesc::Reg128VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtFpalu, "mla", "0,1,2", 1, MOP_vmlavvuRegisterLimit) +DEFINE_MOP(MOP_vmlavvv, {&OpndDesc::Reg128VDS, &OpndDesc::Reg128VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "mla", "0,1,2", 1, MOP_vmlavvvRegisterLimit) +DEFINE_MOP(MOP_vmlsuuu, {&OpndDesc::Reg64VDS, &OpndDesc::Reg64VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtFpalu, "mls", "0,1,2", 1, MOP_vmlsuuuRegisterLimit) +DEFINE_MOP(MOP_vmlsuuv, {&OpndDesc::Reg64VDS, &OpndDesc::Reg64VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "mls", "0,1,2", 1, MOP_vmlsuuvRegisterLimit) +DEFINE_MOP(MOP_vmlsvvu, {&OpndDesc::Reg128VDS, &OpndDesc::Reg128VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtFpalu, "mls", "0,1,2", 1, MOP_vmlsvvuRegisterLimit) +DEFINE_MOP(MOP_vmlsvvv, {&OpndDesc::Reg128VDS, &OpndDesc::Reg128VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "mls", "0,1,2", 1, MOP_vmlsvvvRegisterLimit) +DEFINE_MOP(MOP_vsmlalvuu, {&OpndDesc::Reg128VDS, &OpndDesc::Reg64VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtFpalu, "smlal", "0,1,2", 1, MOP_vsmlalvuuRegisterLimit) +DEFINE_MOP(MOP_vumlalvuu, {&OpndDesc::Reg128VDS, &OpndDesc::Reg64VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtFpalu, "umlal", "0,1,2", 1, MOP_vumlalvuuRegisterLimit) +DEFINE_MOP(MOP_vsmlalvuv, {&OpndDesc::Reg128VDS, &OpndDesc::Reg64VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "smlal", "0,1,2", 1, MOP_vsmlalvuvRegisterLimit) +DEFINE_MOP(MOP_vumlalvuv, {&OpndDesc::Reg128VDS, &OpndDesc::Reg64VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "umlal", "0,1,2", 1, MOP_vumlalvuvRegisterLimit) +DEFINE_MOP(MOP_vsmlal2vvv, {&OpndDesc::Reg128VDS, &OpndDesc::Reg128VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "smlal2", "0,1,2", 1, MOP_vsmlal2vvvRegisterLimit) +DEFINE_MOP(MOP_vumlal2vvv, {&OpndDesc::Reg128VDS, &OpndDesc::Reg128VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "umlal2", "0,1,2", 1, MOP_vumlal2vvvRegisterLimit) +DEFINE_MOP(MOP_vsmlslvuu, {&OpndDesc::Reg128VDS, &OpndDesc::Reg64VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtFpalu, "smlsl", "0,1,2", 1, MOP_vsmlslvuuRegisterLimit) +DEFINE_MOP(MOP_vumlslvuu, {&OpndDesc::Reg128VDS, &OpndDesc::Reg64VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtFpalu, "umlsl", "0,1,2", 1, MOP_vumlslvuuRegisterLimit) +DEFINE_MOP(MOP_vsmlslvuv, {&OpndDesc::Reg128VDS, &OpndDesc::Reg64VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "smlsl", "0,1,2", 1, MOP_vsmlslvuvRegisterLimit) +DEFINE_MOP(MOP_vumlslvuv, {&OpndDesc::Reg128VDS, &OpndDesc::Reg64VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "umlsl", "0,1,2", 1, MOP_vumlslvuvRegisterLimit) +DEFINE_MOP(MOP_vsmlsl2vvu, {&OpndDesc::Reg128VDS, &OpndDesc::Reg128VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtFpalu, "smlsl2", "0,1,2", 1, MOP_vsmlsl2vvuRegisterLimit) +DEFINE_MOP(MOP_vumlsl2vvu, {&OpndDesc::Reg128VDS, &OpndDesc::Reg128VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtFpalu, "umlsl2", "0,1,2", 1, MOP_vumlsl2vvuRegisterLimit) +DEFINE_MOP(MOP_vsmlsl2vvv, {&OpndDesc::Reg128VDS, &OpndDesc::Reg128VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "smlsl2", "0,1,2", 1, MOP_vsmlsl2vvvRegisterLimit) +DEFINE_MOP(MOP_vumlsl2vvv, {&OpndDesc::Reg128VDS, &OpndDesc::Reg128VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "umlsl2", "0,1,2", 1, MOP_vumlsl2vvvRegisterLimit) +DEFINE_MOP(MOP_vsqdmulhuuu, {&OpndDesc::Reg64VD, &OpndDesc::Reg64VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtFpalu, "sqdmulh", "0,1,2", 1, MOP_vsqdmulhuuuRegisterLimit) +DEFINE_MOP(MOP_vsqdmulhuuv, {&OpndDesc::Reg64VD, &OpndDesc::Reg64VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "sqdmulh", "0,1,2", 1, MOP_vsqdmulhuuvRegisterLimit) +DEFINE_MOP(MOP_vsqdmulhvvu, {&OpndDesc::Reg128VD, &OpndDesc::Reg128VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtFpalu, "sqdmulh", "0,1,2", 1, MOP_vsqdmulhvvuRegisterLimit) +DEFINE_MOP(MOP_vsqdmulhvvv, {&OpndDesc::Reg128VD, &OpndDesc::Reg128VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "sqdmulh", "0,1,2", 1, MOP_vsqdmulhvvvRegisterLimit) +DEFINE_MOP(MOP_vsqrdmulhuuu, {&OpndDesc::Reg64VD, &OpndDesc::Reg64VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtFpalu, "sqrdmulh", "0,1,2", 1, MOP_vsqrdmulhuuuRegisterLimit) +DEFINE_MOP(MOP_vsqrdmulhuuv, {&OpndDesc::Reg64VD, &OpndDesc::Reg64VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "sqrdmulh", "0,1,2", 1, MOP_vsqrdmulhuuvRegisterLimit) +DEFINE_MOP(MOP_vsqrdmulhvvu, {&OpndDesc::Reg128VD, &OpndDesc::Reg128VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtFpalu, "sqrdmulh", "0,1,2", 1, MOP_vsqrdmulhvvuRegisterLimit) +DEFINE_MOP(MOP_vsqrdmulhvvv, {&OpndDesc::Reg128VD, &OpndDesc::Reg128VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "sqrdmulh", "0,1,2", 1, MOP_vsqrdmulhvvvRegisterLimit) +DEFINE_MOP(MOP_vsqdmulluuu, {&OpndDesc::Reg64VD, &OpndDesc::Reg64VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtFpalu, "sqdmull", "0,1,2", 1, MOP_vsqdmulluuuRegisterLimit) +DEFINE_MOP(MOP_vsqdmullvuu, {&OpndDesc::Reg128VD, &OpndDesc::Reg64VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtFpalu, "sqdmull", "0,1,2", 1, MOP_vsqdmullvuuRegisterLimit) +DEFINE_MOP(MOP_vsqdmullvuv, {&OpndDesc::Reg128VD, &OpndDesc::Reg64VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "sqdmull", "0,1,2", 1, MOP_vsqdmullvuvRegisterLimit) +DEFINE_MOP(MOP_vsqdmull2vvu, {&OpndDesc::Reg128VD, &OpndDesc::Reg128VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtFpalu, "sqdmull2", "0,1,2", 1, MOP_vsqdmull2vvuRegisterLimit) +DEFINE_MOP(MOP_vsqdmull2vvv, {&OpndDesc::Reg128VD, &OpndDesc::Reg128VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "sqdmull2", "0,1,2", 1, MOP_vsqdmull2vvvRegisterLimit) +DEFINE_MOP(MOP_vsqdmlalvuu, {&OpndDesc::Reg128VDS, &OpndDesc::Reg64VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtFpalu, "sqdmlal", "0,1,2", 1, MOP_vsqdmlalvuuRegisterLimit) +DEFINE_MOP(MOP_vsqdmlalvuv, {&OpndDesc::Reg128VDS, &OpndDesc::Reg64VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "sqdmlal", "0,1,2", 1, MOP_vsqdmlalvuvRegisterLimit) +DEFINE_MOP(MOP_vsqdmlal2vvu, {&OpndDesc::Reg128VDS, &OpndDesc::Reg128VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtFpalu, "sqdmlal2", "0,1,2", 1, MOP_vsqdmlal2vvuRegisterLimit) +DEFINE_MOP(MOP_vsqdmlal2vvv, {&OpndDesc::Reg128VDS, &OpndDesc::Reg128VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "sqdmlal2", "0,1,2", 1, MOP_vsqdmlal2vvvRegisterLimit) +DEFINE_MOP(MOP_vsqdmlslvuu, {&OpndDesc::Reg128VDS, &OpndDesc::Reg64VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtFpalu, "sqdmlsl", "0,1,2", 1, MOP_vsqdmlslvuuRegisterLimit) +DEFINE_MOP(MOP_vsqdmlslvuv, {&OpndDesc::Reg128VDS, &OpndDesc::Reg64VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "sqdmlsl", "0,1,2", 1, MOP_vsqdmlslvuvRegisterLimit) +DEFINE_MOP(MOP_vsqdmlsl2vvu, {&OpndDesc::Reg128VDS, &OpndDesc::Reg128VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtFpalu, "sqdmlsl2", "0,1,2", 1, MOP_vsqdmlsl2vvuRegisterLimit) +DEFINE_MOP(MOP_vsqdmlsl2vvv, {&OpndDesc::Reg128VDS, &OpndDesc::Reg128VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "sqdmlsl2", "0,1,2", 1, MOP_vsqdmlsl2vvvRegisterLimit) DEFINE_MOP(MOP_vshsubuuu, {&OpndDesc::Reg64VD, &OpndDesc::Reg64VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtFpalu, "shsub", "0,1,2", 1) DEFINE_MOP(MOP_vshsubvvv, {&OpndDesc::Reg128VD, &OpndDesc::Reg128VS, &OpndDesc::Reg128VS}, ISVECTOR, kLtFpalu, "shsub", "0,1,2", 1) DEFINE_MOP(MOP_vuhsubuuu, {&OpndDesc::Reg64VD, &OpndDesc::Reg64VS, &OpndDesc::Reg64VS}, ISVECTOR, kLtFpalu, "uhsub", "0,1,2", 1) diff --git a/src/mapleall/maple_be/include/cg/aarch64/aarch64_mop_register_limit.h b/src/mapleall/maple_be/include/cg/aarch64/aarch64_mop_register_limit.h new file mode 100644 index 0000000000..1bae540a32 --- /dev/null +++ b/src/mapleall/maple_be/include/cg/aarch64/aarch64_mop_register_limit.h @@ -0,0 +1,279 @@ +/* + * Copyright (c) [2023] Huawei Technologies Co.,Ltd.All rights reserved. + * + * OpenArkCompiler is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * + * http://license.coscl.org.cn/MulanPSL2 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. +*/ +#ifndef MAPLEBE_INCLUDE_CG_AARCH64_AARCH64_MOP_REGISTER_LIMIT_H +#define MAPLEBE_INCLUDE_CG_AARCH64_AARCH64_MOP_REGISTER_LIMIT_H + +#include "aarch64_isa.h" +#include "insn.h" + +namespace maplebe { +// Check insn is VectorInsn, and third opnd's element size is H. H - half word(16-bit) +inline bool IsVectorInsnAndThirdOpndIsH(const Insn &insn) { + if (insn.GetNumOfRegSpec() == 0 || (insn.GetOperandSize() - 1) != kInsnThirdOpnd) { + return false; + } + if (!insn.GetOperand(kInsnThirdOpnd).IsRegister()) { + return false; + } + + // Get third opnd's vector spec + auto regSpecIter = insn.GetRegSpecList().begin(); + for (uint32 i = 0; i < insn.GetOperandSize(); ++i) { + auto *opndDesc = insn.GetDesc()->GetOpndDes(i); + if (i == kInsnThirdOpnd) { + if (opndDesc->IsVectorOperand()) { + break; + } else { + return false; + } + } + if (opndDesc->IsVectorOperand()) { + ++regSpecIter; + } + } + + // third opnd's element size is H + return ((*regSpecIter)->vecElementSize == k16BitSize); +} + +// Third Opnd restricted to V0-V15 when element size is H(01). +inline std::pair VectorByElementInsnThirdRegisterLimit(const Insn &insn, uint32 opndIdx) { + if (opndIdx != kInsnThirdOpnd || !IsVectorInsnAndThirdOpndIsH(insn)) { + return kInvalidRegLimit; + } + return {V0, V15}; +} + +inline std::pair MOP_vsmaddvvvRegisterLimit(const Insn &insn, uint32 opndIdx) { + return VectorByElementInsnThirdRegisterLimit(insn, opndIdx); +} + +inline std::pair MOP_vumaddvvvRegisterLimit(const Insn &insn, uint32 opndIdx) { + return VectorByElementInsnThirdRegisterLimit(insn, opndIdx); +} + +inline std::pair MOP_vsmullvuuRegisterLimit(const Insn &insn, uint32 opndIdx) { + return VectorByElementInsnThirdRegisterLimit(insn, opndIdx); +} + +inline std::pair MOP_vumullvuuRegisterLimit(const Insn &insn, uint32 opndIdx) { + return VectorByElementInsnThirdRegisterLimit(insn, opndIdx); +} + +inline std::pair MOP_vsmullvuvRegisterLimit(const Insn &insn, uint32 opndIdx) { + return VectorByElementInsnThirdRegisterLimit(insn, opndIdx); +} + +inline std::pair MOP_vumullvuvRegisterLimit(const Insn &insn, uint32 opndIdx) { + return VectorByElementInsnThirdRegisterLimit(insn, opndIdx); +} + +inline std::pair MOP_vsmullvvvRegisterLimit(const Insn &insn, uint32 opndIdx) { + return VectorByElementInsnThirdRegisterLimit(insn, opndIdx); +} + +inline std::pair MOP_vumullvvvRegisterLimit(const Insn &insn, uint32 opndIdx) { + return VectorByElementInsnThirdRegisterLimit(insn, opndIdx); +} + +inline std::pair MOP_vsmull2vvvRegisterLimit(const Insn &insn, uint32 opndIdx) { + return VectorByElementInsnThirdRegisterLimit(insn, opndIdx); +} + +inline std::pair MOP_vumull2vvvRegisterLimit(const Insn &insn, uint32 opndIdx) { + return VectorByElementInsnThirdRegisterLimit(insn, opndIdx); +} + +inline std::pair MOP_vmuluuuRegisterLimit(const Insn &insn, uint32 opndIdx) { + return VectorByElementInsnThirdRegisterLimit(insn, opndIdx); +} + +inline std::pair MOP_vmulvvvRegisterLimit(const Insn &insn, uint32 opndIdx) { + return VectorByElementInsnThirdRegisterLimit(insn, opndIdx); +} + +inline std::pair MOP_vmlauuuRegisterLimit(const Insn &insn, uint32 opndIdx) { + return VectorByElementInsnThirdRegisterLimit(insn, opndIdx); +} + +inline std::pair MOP_vmlauuvRegisterLimit(const Insn &insn, uint32 opndIdx) { + return VectorByElementInsnThirdRegisterLimit(insn, opndIdx); +} + +inline std::pair MOP_vmlavvuRegisterLimit(const Insn &insn, uint32 opndIdx) { + return VectorByElementInsnThirdRegisterLimit(insn, opndIdx); +} + +inline std::pair MOP_vmlavvvRegisterLimit(const Insn &insn, uint32 opndIdx) { + return VectorByElementInsnThirdRegisterLimit(insn, opndIdx); +} + +inline std::pair MOP_vmlsuuuRegisterLimit(const Insn &insn, uint32 opndIdx) { + return VectorByElementInsnThirdRegisterLimit(insn, opndIdx); +} + +inline std::pair MOP_vmlsuuvRegisterLimit(const Insn &insn, uint32 opndIdx) { + return VectorByElementInsnThirdRegisterLimit(insn, opndIdx); +} + +inline std::pair MOP_vmlsvvuRegisterLimit(const Insn &insn, uint32 opndIdx) { + return VectorByElementInsnThirdRegisterLimit(insn, opndIdx); +} + +inline std::pair MOP_vmlsvvvRegisterLimit(const Insn &insn, uint32 opndIdx) { + return VectorByElementInsnThirdRegisterLimit(insn, opndIdx); +} + +inline std::pair MOP_vsmlalvuuRegisterLimit(const Insn &insn, uint32 opndIdx) { + return VectorByElementInsnThirdRegisterLimit(insn, opndIdx); +} + +inline std::pair MOP_vumlalvuuRegisterLimit(const Insn &insn, uint32 opndIdx) { + return VectorByElementInsnThirdRegisterLimit(insn, opndIdx); +} + +inline std::pair MOP_vsmlalvuvRegisterLimit(const Insn &insn, uint32 opndIdx) { + return VectorByElementInsnThirdRegisterLimit(insn, opndIdx); +} + +inline std::pair MOP_vumlalvuvRegisterLimit(const Insn &insn, uint32 opndIdx) { + return VectorByElementInsnThirdRegisterLimit(insn, opndIdx); +} + +inline std::pair MOP_vsmlal2vvvRegisterLimit(const Insn &insn, uint32 opndIdx) { + return VectorByElementInsnThirdRegisterLimit(insn, opndIdx); +} + +inline std::pair MOP_vumlal2vvvRegisterLimit(const Insn &insn, uint32 opndIdx) { + return VectorByElementInsnThirdRegisterLimit(insn, opndIdx); +} + +inline std::pair MOP_vsmlslvuuRegisterLimit(const Insn &insn, uint32 opndIdx) { + return VectorByElementInsnThirdRegisterLimit(insn, opndIdx); +} + +inline std::pair MOP_vumlslvuuRegisterLimit(const Insn &insn, uint32 opndIdx) { + return VectorByElementInsnThirdRegisterLimit(insn, opndIdx); +} + +inline std::pair MOP_vsmlslvuvRegisterLimit(const Insn &insn, uint32 opndIdx) { + return VectorByElementInsnThirdRegisterLimit(insn, opndIdx); +} + +inline std::pair MOP_vumlslvuvRegisterLimit(const Insn &insn, uint32 opndIdx) { + return VectorByElementInsnThirdRegisterLimit(insn, opndIdx); +} + +inline std::pair MOP_vsmlsl2vvuRegisterLimit(const Insn &insn, uint32 opndIdx) { + return VectorByElementInsnThirdRegisterLimit(insn, opndIdx); +} + +inline std::pair MOP_vumlsl2vvuRegisterLimit(const Insn &insn, uint32 opndIdx) { + return VectorByElementInsnThirdRegisterLimit(insn, opndIdx); +} + +inline std::pair MOP_vsmlsl2vvvRegisterLimit(const Insn &insn, uint32 opndIdx) { + return VectorByElementInsnThirdRegisterLimit(insn, opndIdx); +} + +inline std::pair MOP_vumlsl2vvvRegisterLimit(const Insn &insn, uint32 opndIdx) { + return VectorByElementInsnThirdRegisterLimit(insn, opndIdx); +} + +inline std::pair MOP_vsqdmulhuuuRegisterLimit(const Insn &insn, uint32 opndIdx) { + return VectorByElementInsnThirdRegisterLimit(insn, opndIdx); +} + +inline std::pair MOP_vsqdmulhuuvRegisterLimit(const Insn &insn, uint32 opndIdx) { + return VectorByElementInsnThirdRegisterLimit(insn, opndIdx); +} + +inline std::pair MOP_vsqdmulhvvuRegisterLimit(const Insn &insn, uint32 opndIdx) { + return VectorByElementInsnThirdRegisterLimit(insn, opndIdx); +} + +inline std::pair MOP_vsqdmulhvvvRegisterLimit(const Insn &insn, uint32 opndIdx) { + return VectorByElementInsnThirdRegisterLimit(insn, opndIdx); +} + +inline std::pair MOP_vsqrdmulhuuuRegisterLimit(const Insn &insn, uint32 opndIdx) { + return VectorByElementInsnThirdRegisterLimit(insn, opndIdx); +} + +inline std::pair MOP_vsqrdmulhuuvRegisterLimit(const Insn &insn, uint32 opndIdx) { + return VectorByElementInsnThirdRegisterLimit(insn, opndIdx); +} + +inline std::pair MOP_vsqrdmulhvvuRegisterLimit(const Insn &insn, uint32 opndIdx) { + return VectorByElementInsnThirdRegisterLimit(insn, opndIdx); +} + +inline std::pair MOP_vsqrdmulhvvvRegisterLimit(const Insn &insn, uint32 opndIdx) { + return VectorByElementInsnThirdRegisterLimit(insn, opndIdx); +} + +inline std::pair MOP_vsqdmulluuuRegisterLimit(const Insn &insn, uint32 opndIdx) { + return VectorByElementInsnThirdRegisterLimit(insn, opndIdx); +} + +inline std::pair MOP_vsqdmullvuuRegisterLimit(const Insn &insn, uint32 opndIdx) { + return VectorByElementInsnThirdRegisterLimit(insn, opndIdx); +} + +inline std::pair MOP_vsqdmullvuvRegisterLimit(const Insn &insn, uint32 opndIdx) { + return VectorByElementInsnThirdRegisterLimit(insn, opndIdx); +} + +inline std::pair MOP_vsqdmull2vvuRegisterLimit(const Insn &insn, uint32 opndIdx) { + return VectorByElementInsnThirdRegisterLimit(insn, opndIdx); +} + +inline std::pair MOP_vsqdmull2vvvRegisterLimit(const Insn &insn, uint32 opndIdx) { + return VectorByElementInsnThirdRegisterLimit(insn, opndIdx); +} + +inline std::pair MOP_vsqdmlalvuuRegisterLimit(const Insn &insn, uint32 opndIdx) { + return VectorByElementInsnThirdRegisterLimit(insn, opndIdx); +} + +inline std::pair MOP_vsqdmlalvuvRegisterLimit(const Insn &insn, uint32 opndIdx) { + return VectorByElementInsnThirdRegisterLimit(insn, opndIdx); +} + +inline std::pair MOP_vsqdmlal2vvuRegisterLimit(const Insn &insn, uint32 opndIdx) { + return VectorByElementInsnThirdRegisterLimit(insn, opndIdx); +} + +inline std::pair MOP_vsqdmlal2vvvRegisterLimit(const Insn &insn, uint32 opndIdx) { + return VectorByElementInsnThirdRegisterLimit(insn, opndIdx); +} + +inline std::pair MOP_vsqdmlslvuuRegisterLimit(const Insn &insn, uint32 opndIdx) { + return VectorByElementInsnThirdRegisterLimit(insn, opndIdx); +} + +inline std::pair MOP_vsqdmlslvuvRegisterLimit(const Insn &insn, uint32 opndIdx) { + return VectorByElementInsnThirdRegisterLimit(insn, opndIdx); +} + +inline std::pair MOP_vsqdmlsl2vvuRegisterLimit(const Insn &insn, uint32 opndIdx) { + return VectorByElementInsnThirdRegisterLimit(insn, opndIdx); +} + +inline std::pair MOP_vsqdmlsl2vvvRegisterLimit(const Insn &insn, uint32 opndIdx) { + return VectorByElementInsnThirdRegisterLimit(insn, opndIdx); +} +} // namespace maplebe +#endif // MAPLEBE_INCLUDE_CG_AARCH64_AARCH64_MOP_REGISTER_LIMIT_H \ No newline at end of file diff --git a/src/mapleall/maple_be/include/cg/aarch64/aarch64_mop_split.h b/src/mapleall/maple_be/include/cg/aarch64/aarch64_mop_split.h index 3945902cdc..fc6de9859f 100644 --- a/src/mapleall/maple_be/include/cg/aarch64/aarch64_mop_split.h +++ b/src/mapleall/maple_be/include/cg/aarch64/aarch64_mop_split.h @@ -703,5 +703,6 @@ inline void MOP_qstpSplit(Insn *insn, bool isAfterRegAlloc, InsnBuilder *insnBui OperandBuilder *opndBuilder) { LoadStoreInsnSplit(insn, kInsnThirdOpnd, true, isAfterRegAlloc, insnBuilder, opndBuilder); } + } /* namespace maplebe */ #endif /* MAPLEBE_INCLUDE_CG_AARCH64_AARCH64_MOP_SPLIT_H */ \ No newline at end of file diff --git a/src/mapleall/maple_be/include/cg/aarch64/aarch64_mop_valid.h b/src/mapleall/maple_be/include/cg/aarch64/aarch64_mop_valid.h index dfe247a64f..d540b4ebb4 100644 --- a/src/mapleall/maple_be/include/cg/aarch64/aarch64_mop_valid.h +++ b/src/mapleall/maple_be/include/cg/aarch64/aarch64_mop_valid.h @@ -798,7 +798,7 @@ inline bool MOP_wwcmprreValid(const MapleVector &opnds) { inline bool MOP_xcmpriValid(const MapleVector &opnds) { bool checkThird = (opnds[kInsnThirdOpnd] != nullptr) ? - Imm16BitValid(static_cast(opnds[kInsnThirdOpnd])->GetValue()) : true; + Imm12BitValid(static_cast(opnds[kInsnThirdOpnd])->GetValue()) : true; return checkThird; } @@ -866,7 +866,7 @@ inline bool MOP_wwcmnrreValid(const MapleVector &opnds) { inline bool MOP_xcmnriValid(const MapleVector &opnds) { bool checkThird = (opnds[kInsnThirdOpnd] != nullptr) ? - Imm16BitValid(static_cast(opnds[kInsnThirdOpnd])->GetValue()) : true; + Imm12BitValid(static_cast(opnds[kInsnThirdOpnd])->GetValue()) : true; return checkThird; } @@ -886,7 +886,7 @@ inline bool MOP_xwcmnrreValid(const MapleVector &opnds) { inline bool MOP_wtbnzValid(const MapleVector &opnds) { // Is the bit number to be tested, in the range 0 to 63 bool checkSecond = (opnds[kInsnSecondOpnd] != nullptr) ? - BitShift6BitValidImm(static_cast(opnds[kInsnSecondOpnd])->GetValue()) : true; + BitShift5BitValidImm(static_cast(opnds[kInsnSecondOpnd])->GetValue()) : true; return checkSecond; } @@ -898,9 +898,9 @@ inline bool MOP_xtbnzValid(const MapleVector &opnds) { } inline bool MOP_wtbzValid(const MapleVector &opnds) { - // Is the bit number to be tested, in the range 0 to 63 + // Is the bit number to be tested, in the range 0 to 31 bool checkSecond = (opnds[kInsnSecondOpnd] != nullptr) ? - BitShift6BitValidImm(static_cast(opnds[kInsnSecondOpnd])->GetValue()) : true; + BitShift5BitValidImm(static_cast(opnds[kInsnSecondOpnd])->GetValue()) : true; return checkSecond; } diff --git a/src/mapleall/maple_be/include/cg/aarch64/aarch64_peep.h b/src/mapleall/maple_be/include/cg/aarch64/aarch64_peep.h index f5716297ba..b8e9860262 100644 --- a/src/mapleall/maple_be/include/cg/aarch64/aarch64_peep.h +++ b/src/mapleall/maple_be/include/cg/aarch64/aarch64_peep.h @@ -122,6 +122,32 @@ class CselToCsetPattern : public CGPeepPattern { RegOperand *useReg = nullptr; }; +/* + * mov w1, #1 + * csel w2, w1, w0, EQ ===> csinc w2, w0, WZR, NE + * + * mov w1, #1 + * csel w2, w0, w1, EQ ===> csinc w2, w0, WZR, EQ + */ +class CselToCsincRemoveMovPattern : public CGPeepPattern { + public: + CselToCsincRemoveMovPattern(CGFunc &cgFunc, BB &currBB, Insn &currInsn, CGSSAInfo &info) + : CGPeepPattern(cgFunc, currBB, currInsn, info) {} + ~CselToCsincRemoveMovPattern() override = default; + void Run(BB &bb, Insn &insn) override; + bool CheckCondition(Insn &insn) override; + std::string GetPatternName() override { + return "CselToCsincRemoveMovPattern"; + } + + private: + bool IsOpndMovOneAndNewOpndOpt(const Insn &curInsn); + Insn *prevMovInsn = nullptr; + RegOperand *newSecondOpnd = nullptr; + CondOperand *cond = nullptr; + bool needReverseCond = false; +}; + /* * cset w0, HS * add w2, w1, w0 ===> cinc w2, w1, hs @@ -499,6 +525,7 @@ class AddSubMergeLdStPattern : public CGPeepPattern { private: bool CheckIfCanBeMerged(const Insn *adjacentInsn, const Insn &insn); + Insn *FindRegInBB(const Insn &insn, bool isAbove) const; Insn *nextInsn = nullptr; Insn *prevInsn = nullptr; Insn *insnToBeReplaced = nullptr; @@ -844,8 +871,8 @@ class SimplifyMulArithmeticPattern : public CGPeepPattern { kFNeg, kArithmeticTypeSize }; - static constexpr uint8 newMopNum = 2; - MOperator curMop2NewMopTable[kArithmeticTypeSize][newMopNum] = { + static constexpr uint8 kNewMopNum = 2; + MOperator curMop2NewMopTable[kArithmeticTypeSize][kNewMopNum] = { /* {32bit_mop, 64bit_mop} */ {MOP_undef, MOP_undef}, /* kUndef */ {MOP_wmaddrrrr, MOP_xmaddrrrr}, /* kAdd */ diff --git a/src/mapleall/maple_be/include/cg/aarch64/aarch64_phases.def b/src/mapleall/maple_be/include/cg/aarch64/aarch64_phases.def index 8acdca7ef1..76e910a4ec 100644 --- a/src/mapleall/maple_be/include/cg/aarch64/aarch64_phases.def +++ b/src/mapleall/maple_be/include/cg/aarch64/aarch64_phases.def @@ -49,8 +49,8 @@ ADDTARGETPHASE("prepeephole1", CGOptions::DoPrePeephole()); ADDTARGETPHASE("ebo", CGOptions::DoEBO()); ADDTARGETPHASE("globalschedule", GetMIRModule()->IsCModule() && CGOptions::DoGlobalSchedule()); - ADDTARGETPHASE("raopt", CGOptions::DoPreLSRAOpt()); ADDTARGETPHASE("cgsplitcriticaledge", GetMIRModule()->IsCModule() && CGOptions::DoRegSavesOpt()); + ADDTARGETPHASE("raopt", CGOptions::DoPreRAOpt()); ADDTARGETPHASE("regalloc", true); ADDTARGETPHASE("tailcallopt", GetMIRModule()->IsCModule() && CGOptions::DoTailCallOpt()); ADDTARGETPHASE("regsaves", GetMIRModule()->IsCModule() && CGOptions::DoRegSavesOpt()); @@ -59,22 +59,23 @@ ADDTARGETPHASE("globalopt", CGOptions::DoCGSSA()); } ADDTARGETPHASE("clearrdinfo", GetMIRModule()->IsCModule() && (CGOptions::DoStoreLoadOpt() || CGOptions::DoGlobalOpt())); - ADDTARGETPHASE("isolatefastpath", CGOptions::DoIsolateFastPath()); ADDTARGETPHASE("generateproepilog", true); ADDTARGETPHASE("framefinalize", true); ADDTARGETPHASE("cfgo", GetMIRModule()->IsCModule() && CGOptions::DoCFGO()); ADDTARGETPHASE("peephole0", CGOptions::DoPeephole()); ADDTARGETPHASE("ebo", CGOptions::DoEBO()); ADDTARGETPHASE("postcfgo", CGOptions::DoCFGO()); + ADDTARGETPHASE("duptail", !CGOptions::DoLiteProfUse() && !CGOptions::DoLiteProfGen()); ADDTARGETPHASE("cgpostpeephole", CGOptions::DoPeephole()); ADDTARGETPHASE("yieldpoint", GetMIRModule()->IsJavaModule() && CGOptions::IsInsertYieldPoint()); ADDTARGETPHASE("localschedule", GetMIRModule()->IsCModule() && CGOptions::DoLocalSchedule()); ADDTARGETPHASE("cgsplitcriticaledge", CGOptions::DoLiteProfGen()); ADDTARGETPHASE("cgpgogen", CGOptions::DoLiteProfGen()); ADDTARGETPHASE("cgpgouse", CGOptions::DoLiteProfUse()); + ADDTARGETPHASE("duptail", CGOptions::DoLiteProfUse() && !CGOptions::DoLiteProfGen()); + ADDTARGETPHASE("cgaggressiveopt", GetMIRModule()->IsCModule() && CGOptions::DoAggrOpt()); ADDTARGETPHASE("alignanalysis", GetMIRModule()->IsCModule() && CGOptions::DoAlignAnalysis() && !CGOptions::DoLiteProfGen()); ADDTARGETPHASE("fixshortbranch", true); - ADDTARGETPHASE("cgaggressiveopt", GetMIRModule()->IsCModule() && CGOptions::DoAggrOpt()); ADDTARGETPHASE("gencfi", !GetMIRModule()->IsCModule() || CGOptions::GetInstance().IsUnwindTables() || GetMIRModule()->IsWithDbgInfo()); ADDTARGETPHASE("dbgfixcallframeoffsets", true); ADDTARGETPHASE("cgirverify", true); diff --git a/src/mapleall/maple_be/include/cg/aarch64/aarch64_proepilog.h b/src/mapleall/maple_be/include/cg/aarch64/aarch64_proepilog.h index d39f29a339..60be6df824 100644 --- a/src/mapleall/maple_be/include/cg/aarch64/aarch64_proepilog.h +++ b/src/mapleall/maple_be/include/cg/aarch64/aarch64_proepilog.h @@ -23,13 +23,21 @@ #include "aarch64_insn.h" namespace maplebe { -using namespace maple; +class AArch64ProEpilogAnalysis : public ProEpilogAnalysis { + public: + AArch64ProEpilogAnalysis(CGFunc &func, MemPool &pool, DomAnalysis &dom, PostDomAnalysis &pdom, LoopAnalysis &loop) + : ProEpilogAnalysis(func, pool, dom, pdom, loop) {} + ~AArch64ProEpilogAnalysis() override = default; + + bool NeedProEpilog() override; +}; class AArch64GenProEpilog : public GenProEpilog { public: - AArch64GenProEpilog(CGFunc &func, MemPool &memPool) + AArch64GenProEpilog(CGFunc &func, MemPool &memPool, const ProEpilogSaveInfo *proepiSaveInfo = nullptr) : GenProEpilog(func), - tmpAlloc(&memPool) { + tmpAlloc(&memPool), + saveInfo(proepiSaveInfo) { useFP = func.UseFP(); if (func.GetMirModule().GetFlavor() == MIRFlavor::kFlavorLmbc) { stackBaseReg = RFP; @@ -63,6 +71,7 @@ class AArch64GenProEpilog : public GenProEpilog { void GenStackGuard(); void AddStackGuard(BB &bb); void GenStackGuardCheckInsn(BB &bb); + BB &GetOrGenStackGuardCheckFailBB(BB &bb); void AppendInstructionAllocateCallFrame(AArch64reg reg0, AArch64reg reg1, RegType rty); void AppendInstructionAllocateCallFrameDebug(AArch64reg reg0, AArch64reg reg1, RegType rty); void GeneratePushRegs(); @@ -84,18 +93,12 @@ class AArch64GenProEpilog : public GenProEpilog { RegType rty); Insn &AppendInstructionForAllocateOrDeallocateCallFrame(int64 argsToStkPassSize, AArch64reg reg0, AArch64reg reg1, RegType rty, bool isAllocate); - void SetFastPathReturnBB(BB *bb) { - bb->SetFastPathReturn(true); - fastPathReturnBB = bb; - } - BB *GetFastPathReturnBB() { - return fastPathReturnBB; - } + MapleAllocator tmpAlloc; + const ProEpilogSaveInfo *saveInfo = nullptr; static constexpr const int32 kOffset8MemPos = 8; static constexpr const int32 kOffset16MemPos = 16; - BB *fastPathReturnBB = nullptr; bool useFP = false; // To be compatible with previous code more easily，we use storeFP boolean to indicate the case // (1) use FP to address @@ -104,6 +107,7 @@ class AArch64GenProEpilog : public GenProEpilog { bool storeFP = false; /* frame pointer(x29) is available as a general-purpose register if useFP is set as false */ AArch64reg stackBaseReg = RFP; + BB *stackChkFailBB = nullptr; // only one stack check fail BB is need }; } /* namespace maplebe */ diff --git a/src/mapleall/maple_be/include/cg/aarch64/aarch64_prop.h b/src/mapleall/maple_be/include/cg/aarch64/aarch64_prop.h index 8f11c604ed..b219270ab8 100644 --- a/src/mapleall/maple_be/include/cg/aarch64/aarch64_prop.h +++ b/src/mapleall/maple_be/include/cg/aarch64/aarch64_prop.h @@ -126,9 +126,10 @@ class A64ConstProp { ImmOperand &constOpnd, ArithmeticType aT); bool ArithmeticConstReplace(DUInsnInfo &useDUInfo, ImmOperand &constOpnd, ArithmeticType aT); bool ArithmeticConstFold(DUInsnInfo &useDUInfo, const ImmOperand &constOpnd, ArithmeticType aT) const; - bool ShiftConstReplace(DUInsnInfo &useDUInfo, const ImmOperand &constOpnd) const; + bool ShiftConstReplace(DUInsnInfo &useDUInfo, const ImmOperand &constOpnd); bool BitInsertReplace(DUInsnInfo &useDUInfo, const ImmOperand &constOpnd) const; - bool ReplaceCmpToCmn(DUInsnInfo &useDUInfo, const ImmOperand &constOpnd) const; + bool ReplaceCmpToCmnOrConstPropCmp(DUInsnInfo &useDUInfo, ImmOperand &constOpnd); + bool MovLslConstToMov(DUInsnInfo &useDUInfo, const ImmOperand &constOpnd); MemPool *constPropMp; CGFunc *cgFunc; diff --git a/src/mapleall/maple_be/include/cg/aarch64/aarch64_ra_opt.h b/src/mapleall/maple_be/include/cg/aarch64/aarch64_ra_opt.h index 63cfa7586a..fbc73f660f 100644 --- a/src/mapleall/maple_be/include/cg/aarch64/aarch64_ra_opt.h +++ b/src/mapleall/maple_be/include/cg/aarch64/aarch64_ra_opt.h @@ -16,9 +16,7 @@ #ifndef MAPLEBE_INCLUDE_CG_AARCH64RAOPT_H #define MAPLEBE_INCLUDE_CG_AARCH64RAOPT_H -#include "cg.h" #include "ra_opt.h" -#include "aarch64_cg.h" #include "aarch64_insn.h" #include "aarch64_operand.h" @@ -80,11 +78,16 @@ class X0OptInfo { regno_t renameReg; }; -class RaX0Opt { +class RaX0Opt : public RaOptPattern { public: - explicit RaX0Opt(CGFunc* func) : cgFunc(func) {} - ~RaX0Opt() = default; + RaX0Opt(CGFunc &func, MemPool &pool, bool dump = false) + : RaOptPattern(func, pool, dump) {} + ~RaX0Opt() override = default; + void Run() override { + PropagateX0(); + } + private: bool PropagateX0CanReplace(Operand *opnd, regno_t replaceReg) const; bool PropagateRenameReg(Insn &nInsn, const X0OptInfo &optVal) const; bool PropagateX0DetectX0(const Insn &insn, X0OptInfo &optVal) const; @@ -93,31 +96,20 @@ class RaX0Opt { bool PropagateX0ForCurrBb(BB &bb, const X0OptInfo &optVal) const; void PropagateX0ForNextBb(BB &nextBb, const X0OptInfo &optVal) const; void PropagateX0(); - - private: - CGFunc *cgFunc; }; -class ParamRegOpt { +class AArch64LRSplitForSink : public LRSplitForSink { public: - ParamRegOpt(CGFunc &func, DomAnalysis &dom, const LoopAnalysis &loop) : cgFunc(func), domInfo(dom), loopInfo(loop) {} - ~ParamRegOpt() = default; - - void HandleParamReg(); - void CollectRefBBs(RegOperand &movDest, std::set &refBBs); - void TryToSplitParamReg(RegOperand &movDest, Insn &posInsn); - BB* GetCommondDom(std::set &refBBs) const; - bool DominatorAll(uint32 domBB, std::set &refBBs) const; - void SplitAtDomBB(RegOperand &movDest, BB &domBB, Insn &posInsn) const; - void SetDumpInfo(bool val) { - dumpInfo = val; - } + AArch64LRSplitForSink(CGFunc &func, MemPool &pool, DomAnalysis &dom, LoopAnalysis &loop, bool dump) + : LRSplitForSink(func, pool, dom, loop, dump) {} + ~AArch64LRSplitForSink() override = default; private: - CGFunc &cgFunc; - DomAnalysis &domInfo; - const LoopAnalysis &loopInfo; - bool dumpInfo = false; + // collect registers which will be split. + // for aarch64, now only param dest reg will be split + void CollectSplitRegs() override; + + Insn &GenMovInsn(RegOperand &dest, RegOperand &src) override; }; class VregRenameInfo { @@ -136,15 +128,19 @@ class VregRenameInfo { uint8 innerMostloopLevelSeen = 0; }; -class VregRename { +class VregRename : public RaOptPattern { public: - VregRename(CGFunc *func, MemPool *pool, LoopAnalysis &loop) - : cgFunc(func), memPool(pool), alloc(pool), loopInfo(&loop), renameInfo(alloc.Adapter()) { - renameInfo.resize(cgFunc->GetMaxRegNum()); - ccRegno = static_cast(&cgFunc->GetOrCreateRflag())->GetRegisterNumber(); + VregRename(CGFunc &func, MemPool &pool, LoopAnalysis &loop, bool dump = false) + : RaOptPattern(func, pool, dump), loopInfo(loop), renameInfo(alloc.Adapter()) { + renameInfo.resize(cgFunc.GetMaxRegNum()); + ccRegno = static_cast(&cgFunc.GetOrCreateRflag())->GetRegisterNumber(); } - ~VregRename() = default; + ~VregRename() override = default; + void Run() override { + VregLongLiveRename(); + } + private: void PrintRenameInfo(regno_t regno) const; void PrintAllRenameInfo() const; @@ -156,11 +152,7 @@ class VregRename { void UpdateVregInfo(regno_t vreg, BB *bb, bool isInner, bool isDef); void VregLongLiveRename(); - CGFunc *cgFunc = nullptr; - MemPool *memPool = nullptr; - MapleAllocator alloc; - Bfs *bfs = nullptr; - LoopAnalysis *loopInfo = nullptr; + LoopAnalysis &loopInfo; MapleVector renameInfo; uint32 maxRegnoSeen = 0; regno_t ccRegno = 0; @@ -168,11 +160,11 @@ class VregRename { class AArch64RaOpt : public RaOpt { public: - AArch64RaOpt(CGFunc &func, MemPool &pool) : RaOpt(func, pool) {} + AArch64RaOpt(CGFunc &func, MemPool &pool, DomAnalysis &dom, LoopAnalysis &loop) + : RaOpt(func, pool, dom, loop) {} ~AArch64RaOpt() override = default; - void Run() override; - private: + void InitializePatterns() override; }; } /* namespace maplebe */ diff --git a/src/mapleall/maple_be/include/cg/aarch64/aarch64_reg_info.h b/src/mapleall/maple_be/include/cg/aarch64/aarch64_reg_info.h index 0af05c9890..3a9fd84a14 100644 --- a/src/mapleall/maple_be/include/cg/aarch64/aarch64_reg_info.h +++ b/src/mapleall/maple_be/include/cg/aarch64/aarch64_reg_info.h @@ -27,6 +27,18 @@ class AArch64RegInfo : public RegisterInfo { ~AArch64RegInfo() override = default; + // float 128-bit register has caller store, so pref alloced caller-save registers. + bool IsPrefCallerSaveRegs(RegType type, uint32 size) const override { + return (type == kRegTyFloat && size == k128BitSize); + } + + // Additionally, only the bottom 64 bits of each value stored in v8-v15 need to be preserved 8; + // it is the responsibility of the caller to preserve larger values. + // Refer to Procedure Call Standard for the Arm 64-bit Architecture (AArch64) 2022Q3. $6.1.2 + bool IsCallerSavePartRegister(regno_t regNO, uint32 size) const override { + return (regNO >= V8 && regNO <= V15) && size == k128BitSize; + } + bool IsGPRegister(regno_t regNO) const override { return AArch64isa::IsGPRegister(static_cast(regNO)); } @@ -51,7 +63,7 @@ class AArch64RegInfo : public RegisterInfo { return true; } /* when yieldpoint is enabled, the RYP(x19) can not be used. */ - if (GetCurrFunction()->GetCG()->GenYieldPoint() && (regNO == RYP)) { + if (CGOptions::GetInstance().GenYieldPoint() && (regNO == RYP)) { return true; } return false; diff --git a/src/mapleall/maple_be/include/cg/aarch64/aarch64_schedule.h b/src/mapleall/maple_be/include/cg/aarch64/aarch64_schedule.h index 248ca9e289..a37fc8c143 100644 --- a/src/mapleall/maple_be/include/cg/aarch64/aarch64_schedule.h +++ b/src/mapleall/maple_be/include/cg/aarch64/aarch64_schedule.h @@ -33,9 +33,9 @@ class AArch64ScheduleProcessInfo : public ScheduleProcessInfo { ~AArch64ScheduleProcessInfo() override = default; /* recover register type which is not recorded in live analysis */ - static RegType GetRegisterType(CGFunc &f, regno_t regNO); - void VaryLiveRegSet(CGFunc &f, regno_t regNO, bool isInc); - void VaryFreeRegSet(CGFunc &f, std::set regNOs, DepNode &node); + static RegType GetRegisterType(const CGFunc &f, regno_t regNO); + void VaryLiveRegSet(const CGFunc &f, regno_t regNO, bool isInc); + void VaryFreeRegSet(const CGFunc &f, std::set regNOs, DepNode &node); uint32 GetFreeIntRegs(DepNode &node) { return (freeIntRegNodeSet.count(&node)) > 0 ? freeIntRegNodeSet.find(&node)->second : 0; diff --git a/src/mapleall/maple_be/include/cg/aarch64/aarch64_validbit_opt.h b/src/mapleall/maple_be/include/cg/aarch64/aarch64_validbit_opt.h index 81b753b337..721353426e 100644 --- a/src/mapleall/maple_be/include/cg/aarch64/aarch64_validbit_opt.h +++ b/src/mapleall/maple_be/include/cg/aarch64/aarch64_validbit_opt.h @@ -41,7 +41,7 @@ class PropPattern : public ValidBitPattern { ~PropPattern() override {} protected: void ValidateImplicitCvt(RegOperand &destReg, const RegOperand &srcReg, Insn &movInsn) const; - void ReplaceImplicitCvtAndProp(VRegVersion *destVersion, VRegVersion *srcVersion); + void ReplaceImplicitCvtAndProp(VRegVersion *destVersion, VRegVersion *srcVersion) const; }; /* @@ -106,7 +106,7 @@ class ExtValidBitPattern : public PropPattern { private: bool CheckValidCvt(const Insn &insn); - bool CheckRedundantUxtbUxth(Insn &insn); + bool CheckRedundantUxtbUxth(const Insn &insn); bool RealUseMopX(const RegOperand &defOpnd, InsnSet &visitedInsn); RegOperand *newDstOpnd = nullptr; RegOperand *newSrcOpnd = nullptr; diff --git a/src/mapleall/maple_be/include/cg/alignment.h b/src/mapleall/maple_be/include/cg/alignment.h index de6901f498..1a7bc0e777 100644 --- a/src/mapleall/maple_be/include/cg/alignment.h +++ b/src/mapleall/maple_be/include/cg/alignment.h @@ -31,17 +31,21 @@ class AlignAnalysis { loopHeaderBBs(alignAllocator.Adapter()), jumpTargetBBs(alignAllocator.Adapter()), alignInfos(alignAllocator.Adapter()), - sameTargetBranches(alignAllocator.Adapter()) {} + sameTargetBranches(alignAllocator.Adapter()), + splitInsns(alignAllocator.Adapter()) {} virtual ~AlignAnalysis() = default; void AnalysisAlignment(); void Dump(); - virtual void FindLoopHeader() = 0; - virtual void FindJumpTarget() = 0; + virtual void FindLoopHeaderByDefault() = 0; + virtual void FindJumpTargetByDefault() = 0; virtual void ComputeLoopAlign() = 0; virtual void ComputeJumpAlign() = 0; virtual void ComputeCondBranchAlign() = 0; + virtual void AddNopForLoop() = 0; + virtual void FindLoopHeaderByFrequency() = 0; + virtual void FindJumpTargetByFrequency() = 0; /* filter condition */ virtual bool IsIncludeCall(BB &bb) = 0; @@ -82,6 +86,17 @@ class AlignAnalysis { MapleUnorderedSet jumpTargetBBs; MapleUnorderedMap alignInfos; MapleUnorderedMap sameTargetBranches; + + /* jump insn might be split due to short branch */ + bool IsSplitInsn(Insn &insn) { + return splitInsns.count(&insn); + } + void MarkSplitInsn(Insn &insn) { + splitInsns.emplace(&insn); + } + + private: + MapleUnorderedSet splitInsns; }; MAPLE_FUNC_PHASE_DECLARE_BEGIN(CgAlignAnalysis, maplebe::CGFunc) diff --git a/src/mapleall/maple_be/include/cg/asm_info.h b/src/mapleall/maple_be/include/cg/asm_info.h index 2112894ddd..94c8257626 100644 --- a/src/mapleall/maple_be/include/cg/asm_info.h +++ b/src/mapleall/maple_be/include/cg/asm_info.h @@ -33,6 +33,7 @@ enum AsmLabel : uint8 { kAsmShort, kAsmValue, kAsmWord, + kAsmXWord, kAsmLong, kAsmQuad, kAsmSize, @@ -112,6 +113,10 @@ class AsmInfo { return asmWord; } + const MapleString &GetXWord() const { + return asmXWord; + } + const MapleString &GetLong() const { return asmLong; } @@ -177,6 +182,7 @@ class AsmInfo { asmValue("\t.value\t", &memPool), #endif asmWord("\t.word\t", &memPool), + asmXWord("\t.xword\t", &memPool), #ifdef TARGARM32 asmLong("\t.word\t", &memPool), #else @@ -211,6 +217,7 @@ class AsmInfo { MapleString asmShort; MapleString asmValue; MapleString asmWord; + MapleString asmXWord; MapleString asmLong; MapleString asmQuad; MapleString asmSize; diff --git a/src/mapleall/maple_be/include/cg/call_conv.h b/src/mapleall/maple_be/include/cg/call_conv.h index 977605fbec..ce81549a47 100644 --- a/src/mapleall/maple_be/include/cg/call_conv.h +++ b/src/mapleall/maple_be/include/cg/call_conv.h @@ -31,7 +31,6 @@ struct CCLocInfo { int32 memOffset = 0; int32 memSize = 0; uint32 fpSize = 0; - uint32 numFpPureRegs = 0; uint8 regCount = 0; /* number of registers <= 2 storing the return value */ PrimType primTypeOfReg0; /* the primitive type stored in reg0 */ PrimType primTypeOfReg1; /* the primitive type stored in reg1 */ @@ -46,7 +45,6 @@ struct CCLocInfo { memOffset = 0; memSize = 0; fpSize = 0; - numFpPureRegs = 0; regCount = 0; primTypeOfReg0 = PTY_begin; primTypeOfReg1 = PTY_begin; diff --git a/src/mapleall/maple_be/include/cg/cfi.h b/src/mapleall/maple_be/include/cg/cfi.h index 539507d5cc..bfa224fbf1 100644 --- a/src/mapleall/maple_be/include/cg/cfi.h +++ b/src/mapleall/maple_be/include/cg/cfi.h @@ -61,7 +61,7 @@ class CfiInsn : public maplebe::Insn { CfiInsn(MemPool &memPool, maplebe::MOperator op) : Insn(memPool, op) {} CfiInsn(const CfiInsn& other) : maplebe::Insn(other) {} - + CfiInsn(MemPool &memPool, maplebe::MOperator op, maplebe::Operand &opnd0) : Insn(memPool, op, opnd0) {} CfiInsn(MemPool &memPool, maplebe::MOperator op, maplebe::Operand &opnd0, maplebe::Operand &opnd1) diff --git a/src/mapleall/maple_be/include/cg/cfi_generator.h b/src/mapleall/maple_be/include/cg/cfi_generator.h index 42d1129e2c..b7af63c00f 100644 --- a/src/mapleall/maple_be/include/cg/cfi_generator.h +++ b/src/mapleall/maple_be/include/cg/cfi_generator.h @@ -30,8 +30,10 @@ class GenCfi { void Run(); protected: - void InsertCFIDefCfaOffset(BB &bb, Insn &insn, int32 &cfiOffset); /* cfiOffset in-out */ - Insn &FindStackDefNextInsn(BB &bb) const; + Insn *InsertCFIDefCfaOffset(BB &bb, Insn &insn, int32 &cfiOffset); /* cfiOffset in-out */ + + Insn *FindStackDefInsn(BB &bb) const; + Insn *FinsStackRevertInsn(BB &bb) const; /* CFI related routines */ int64 GetOffsetFromCFA() const { @@ -56,8 +58,8 @@ class GenCfi { void GenerateStartDirective(BB &bb); void GenerateEndDirective(BB &bb); void GenerateRegisterStateDirective(BB &bb); - virtual void GenerateRegisterSaveDirective(BB &bb) {} - virtual void GenerateRegisterRestoreDirective(BB &bb) {} + virtual void GenerateRegisterSaveDirective(BB &bb, Insn &stackDefInsn) {} + virtual void GenerateRegisterRestoreDirective(BB &bb, Insn &stackRevertInsn) {} /* It inserts a start location information for each function in debugging mode */ void InsertFirstLocation(BB &bb); diff --git a/src/mapleall/maple_be/include/cg/cg.h b/src/mapleall/maple_be/include/cg/cg.h index 2409794920..911915e8d7 100644 --- a/src/mapleall/maple_be/include/cg/cg.h +++ b/src/mapleall/maple_be/include/cg/cg.h @@ -37,6 +37,7 @@ namespace maplebe { class CGSSAInfo; class PhiEliminate; class DomAnalysis; +class PostDomAnalysis; class CGProp; class CGDce; class AlignAnalysis; @@ -58,6 +59,9 @@ class ControlDepAnalysis; class DataDepAnalysis; class CGAggressiveOpt; class LoopAnalysis; +class DupTailOptimizer; +class RaOpt; +class ProEpilogAnalysis; class Globals { public: @@ -331,6 +335,9 @@ class CG { virtual CFGOptimizer *CreateCFGOptimizer(MemPool &mp, CGFunc &f, LoopAnalysis &loop) const { return nullptr; } + virtual DupTailOptimizer *CreateDupTailOptimizer(MemPool &mp, CGFunc &f) const { + return nullptr; + } virtual CGProfGen *CreateCGProfGen(MemPool &mp, CGFunc &f) const { return nullptr; } @@ -343,6 +350,13 @@ class CG { return nullptr; } + virtual RaOpt *CreateRaOptimizer(MemPool &mp, CGFunc &f, DomAnalysis &dom, LoopAnalysis &loop) const { + return nullptr; + } + + virtual ProEpilogAnalysis *CreateProEpilogAnalysis(MemPool &mp, CGFunc &f, DomAnalysis &dom, PostDomAnalysis &pdom, + LoopAnalysis &loop) const; + /* Object map generation helper */ std::vector GetReferenceOffsets64(const BECommon &beCommon, MIRStructType &structType) const; @@ -388,11 +402,11 @@ class CG { virtual bool IsClinitInsn(MOperator mOp) const = 0; virtual void DumpTargetOperand(Operand &opnd, const OpndDesc &opndDesc) const = 0; - protected: const MIRModule *GetMIRModule() const { return mirModule; } - + + protected: MemPool *memPool = nullptr; MapleAllocator allocator; diff --git a/src/mapleall/maple_be/include/cg/cg_cdg.h b/src/mapleall/maple_be/include/cg/cg_cdg.h index 244ddb9722..59f67eefb0 100644 --- a/src/mapleall/maple_be/include/cg/cg_cdg.h +++ b/src/mapleall/maple_be/include/cg/cg_cdg.h @@ -274,7 +274,7 @@ class CDGNode { return (*regUses)[regNO]; } - void AppendUseInsnChain(regno_t regNO, Insn *useInsn, MemPool &mp) const { + void AppendUseInsnChain(regno_t regNO, Insn *useInsn, MemPool &mp) { CHECK_FATAL(useInsn != nullptr, "invalid useInsn"); auto *newUse = mp.New(); newUse->insn = useInsn; diff --git a/src/mapleall/maple_be/include/cg/cg_critical_edge.h b/src/mapleall/maple_be/include/cg/cg_critical_edge.h index d0c7159a18..ee87a681da 100644 --- a/src/mapleall/maple_be/include/cg/cg_critical_edge.h +++ b/src/mapleall/maple_be/include/cg/cg_critical_edge.h @@ -32,7 +32,7 @@ class CriticalEdge { void CollectCriticalEdges(); void SplitCriticalEdges(); - MapleSet CopyNewBBInfo() { + const MapleSet &GetNewBBInfo() const { return newBBcreated; } diff --git a/src/mapleall/maple_be/include/cg/cg_dominance.h b/src/mapleall/maple_be/include/cg/cg_dominance.h index 1e7c370cf0..91420f5674 100644 --- a/src/mapleall/maple_be/include/cg/cg_dominance.h +++ b/src/mapleall/maple_be/include/cg/cg_dominance.h @@ -60,6 +60,7 @@ class DomAnalysis : public DominanceBase { BB &commonExitBB) : DominanceBase(func, memPool, tmpPool, bbVec, commonEntryBB, commonExitBB), postOrderIDVec(bbVec.size() + 1, -1, tmpAllocator.Adapter()), + reversePostOrderId(tmpAllocator.Adapter()), reversePostOrder(tmpAllocator.Adapter()), doms(bbVec.size() + 1, nullptr, domAllocator.Adapter()), domFrontier(bbVec.size() + 1, MapleVector(domAllocator.Adapter()), domAllocator.Adapter()), @@ -86,6 +87,16 @@ class DomAnalysis : public DominanceBase { return reversePostOrder; } + const MapleVector &GetReversePostOrderId() { + if (reversePostOrderId.empty()) { + reversePostOrderId.resize(bbVec.size() + 1, 0); + for (size_t id = 0; id < reversePostOrder.size(); ++id) { + reversePostOrderId[reversePostOrder[id]->GetID()] = static_cast(id); + } + } + return reversePostOrderId; + } + MapleVector &GetDtPreOrder() { return dtPreOrder; } @@ -145,11 +156,25 @@ class DomAnalysis : public DominanceBase { return domChildren.size(); } + BB *GetCommonDom(BB &bb1, BB &bb2) { + if (&bb1 == &GetCommonEntryBB() || &bb2 == &GetCommonEntryBB()) { + return &GetCommonEntryBB(); + } + if (Dominate(bb1, bb2)) { + return &bb1; + } + if (Dominate(bb2, bb1)) { + return &bb2; + } + auto *domBB = GetDom(bb1.GetID()); + return (domBB != nullptr ? GetCommonDom(*domBB, bb2) : nullptr); + } private: void PostOrderWalk(const BB &bb, int32 &pid, MapleVector &visitedMap); BB *Intersect(BB &bb1, const BB &bb2); MapleVector postOrderIDVec; // index is bb id + MapleVector reversePostOrderId; // gives position of each node in reversePostOrder MapleVector reversePostOrder; // an ordering of the BB in reverse postorder MapleVector doms; // index is bb id; immediate dominator for each BB MapleVector> domFrontier; // index is bb id diff --git a/src/mapleall/maple_be/include/cg/cg_mc_ssa_pre.h b/src/mapleall/maple_be/include/cg/cg_mc_ssa_pre.h index 17bfda28e4..141b378edd 100644 --- a/src/mapleall/maple_be/include/cg/cg_mc_ssa_pre.h +++ b/src/mapleall/maple_be/include/cg/cg_mc_ssa_pre.h @@ -73,7 +73,7 @@ class McSSAPre : public SSAPre { occ2RGNodeMap(preAllocator.Adapter()), maxFlowRoutes(preAllocator.Adapter()), minCut(preAllocator.Adapter()) {} - ~McSSAPre() { + ~McSSAPre() override { sink = nullptr; } @@ -85,7 +85,7 @@ class McSSAPre : public SSAPre { // step 7 max flow/min cut bool AmongMinCut(const RGNode *nd, uint32 idx) const; void DumpRGToFile(); // dump reduced graph to dot file - bool IncludedEarlier(Visit **cut, const Visit *curVisit, uint32 nextRouteIdx) const; + bool IncludedEarlier(Visit * const *cut, const Visit *curVisit, uint32 nextRouteIdx) const; void RemoveRouteNodesFromCutSet(std::unordered_multiset &cutSet, Route *route) const; bool SearchRelaxedMinCut(Visit **cut, std::unordered_multiset &cutSet, uint32 nextRouteIdx, FreqType flowSoFar); diff --git a/src/mapleall/maple_be/include/cg/cg_option.h b/src/mapleall/maple_be/include/cg/cg_option.h index 89f743c733..2fe0c038f8 100644 --- a/src/mapleall/maple_be/include/cg/cg_option.h +++ b/src/mapleall/maple_be/include/cg/cg_option.h @@ -612,18 +612,6 @@ class CGOptions { return fastAlloc; } - static bool IsEnableTimePhases() { - return timePhases; - } - - static void EnableTimePhases() { - timePhases = true; - } - - static void DisableTimePhases() { - timePhases = false; - } - static void EnableInRange() { inRange = true; } @@ -812,11 +800,6 @@ class CGOptions { return doICO; } - static bool DoIsolateFastPath() { - return (CGOptions::GetInstance().DoPrologueEpilogue()) && - (CGOptions::GetInstance().GetOptimizeLevel() == CGOptions::kLevel2); - } - static void EnableStoreLoadOpt() { doStoreLoadOpt = true; } @@ -877,6 +860,18 @@ class CGOptions { return doCondBrAlign; } + static void EnableLoopAlign() { + doLoopAlign = true; + } + + static void DisableLoopAlign() { + doLoopAlign = false; + } + + static bool DoLoopAlign() { + return doLoopAlign; + } + static void EnableBigEndianInCG() { cgBigEndian = true; } @@ -929,16 +924,16 @@ class CGOptions { return doMultiPassColorRA; } - static void EnablePreLSRAOpt() { - doPreLSRAOpt = true; + static void EnablePreRAOpt() { + doPreRAOpt = true; } - static void DisablePreLSRAOpt() { - doPreLSRAOpt = false; + static void DisablePreRAOpt() { + doPreRAOpt = false; } - static bool DoPreLSRAOpt() { - return doPreLSRAOpt; + static bool DoPreRAOpt() { + return doPreRAOpt; } static void EnableLocalRefSpill() { @@ -1557,7 +1552,7 @@ class CGOptions { noplt = true; } - static bool GetNoplt() { + static bool IsNoPlt() { return noplt; } @@ -1591,6 +1586,38 @@ class CGOptions { return doOptimizedFrameLayout; } + static void SetDupFreqThreshold(uint32 dupThres) { + dupFreqThreshold = dupThres; + } + + static uint32 GetDupFreqThreshold() { + return dupFreqThreshold; + } + + static void EnablePgoCodeAlign() { + doPgoCodeAlign = true; + } + + static bool DoPgoCodeAlign() { + return doPgoCodeAlign; + } + + static void SetAlignThreshold(uint32 alignThre) { + alignThreshold = alignThre; + } + + static uint32 GetAlignThreshold() { + return alignThreshold; + } + + static void SetAlignLoopIterations(uint32 loopIter) { + alignLoopIterations = loopIter; + } + + static uint32 GetAlignLoopIterations() { + return alignLoopIterations; + } + private: std::vector phaseSequence; bool runCGFlag = true; @@ -1620,7 +1647,6 @@ class CGOptions { static bool optForSize; static bool enableHotColdSplit; static bool useBarriersForVolatile; - static bool timePhases; static bool cgBigEndian; static bool doEBO; static bool doCGSSA; @@ -1642,6 +1668,7 @@ class CGOptions { static bool doSchedule; static bool doAlignAnalysis; static bool doCondBrAlign; + static bool doLoopAlign; static bool doWriteRefFieldOpt; static bool doRegSavesOpt; static bool doTailCallOpt; @@ -1694,7 +1721,7 @@ class CGOptions { static uint8 rematLevel; static uint8 fastAllocMode; static bool fastAlloc; - static bool doPreLSRAOpt; + static bool doPreRAOpt; static bool doLocalRefSpill; static bool doCalleeToSpill; static bool replaceASM; @@ -1724,6 +1751,10 @@ class CGOptions { static bool doTlsGlobalWarmUpOpt; static bool noplt; static bool doOptimizedFrameLayout; + static bool doPgoCodeAlign; + static uint32 alignThreshold; + static uint32 alignLoopIterations; + static uint32 dupFreqThreshold; }; } /* namespace maplebe */ diff --git a/src/mapleall/maple_be/include/cg/cg_options.h b/src/mapleall/maple_be/include/cg/cg_options.h index fdf44d4d86..ad78c85450 100644 --- a/src/mapleall/maple_be/include/cg/cg_options.h +++ b/src/mapleall/maple_be/include/cg/cg_options.h @@ -41,7 +41,7 @@ extern maplecl::Option ico; extern maplecl::Option storeloadopt; extern maplecl::Option globalopt; extern maplecl::Option hotcoldsplit; -extern maplecl::Option prelsra; +extern maplecl::Option preraopt; extern maplecl::Option lsraLvarspill; extern maplecl::Option lsraOptcallee; extern maplecl::Option calleeregsPlacement; @@ -95,7 +95,6 @@ extern maplecl::Option skipPhases; extern maplecl::Option skipFrom; extern maplecl::Option skipAfter; extern maplecl::Option dumpFunc; -extern maplecl::Option timePhases; extern maplecl::Option useBarriersForVolatile; extern maplecl::Option range; extern maplecl::Option fastAlloc; @@ -129,6 +128,7 @@ extern maplecl::Option localSchedule; extern maplecl::Option calleeEnsureParam; extern maplecl::Option common; extern maplecl::Option condbrAlign; +extern maplecl::Option loopAlign; extern maplecl::Option alignMinBbSize; extern maplecl::Option alignMaxBbSize; extern maplecl::Option loopAlignPow; @@ -143,6 +143,10 @@ extern maplecl::Option litePgoFile; extern maplecl::Option functionPriority; extern maplecl::Option litePgoVerify; extern maplecl::Option optimizedFrameLayout; +extern maplecl::Option pgoCodeAlign; +extern maplecl::Option alignThreshold; +extern maplecl::Option alignLoopIterations; +extern maplecl::Option dupFreqThreshold; } #endif /* MAPLE_BE_INCLUDE_CG_OPTIONS_H */ diff --git a/src/mapleall/maple_be/include/cg/cg_phasemanager.h b/src/mapleall/maple_be/include/cg/cg_phasemanager.h index 411532ec23..e125028edd 100644 --- a/src/mapleall/maple_be/include/cg/cg_phasemanager.h +++ b/src/mapleall/maple_be/include/cg/cg_phasemanager.h @@ -37,9 +37,6 @@ class CgFuncPM : public FunctionPM { cgOptions = nullptr; cg = nullptr; beCommon = nullptr; - if (CGOptions::IsEnableTimePhases()) { - DumpPhaseTime(); - } } bool PhaseRun(MIRModule &m) override; @@ -53,6 +50,7 @@ class CgFuncPM : public FunctionPM { BECommon *GetBECommon() { return beCommon; } + void SweepUnusedStaticSymbol(MIRModule &m) const; private: bool FuncLevelRun(CGFunc &cgFunc, AnalysisDataManager &serialADM); void GenerateOutPutFile(MIRModule &m) const; @@ -69,7 +67,6 @@ class CgFuncPM : public FunctionPM { void EmitDebugInfo(const MIRModule &m) const; void EmitFastFuncs(const MIRModule &m) const; bool IsFramework(MIRModule &m) const; - void SweepUnusedStaticSymbol(MIRModule &m) const; CG *cg = nullptr; BECommon *beCommon = nullptr; diff --git a/src/mapleall/maple_be/include/cg/cg_predict.h b/src/mapleall/maple_be/include/cg/cg_predict.h new file mode 100644 index 0000000000..9387629b78 --- /dev/null +++ b/src/mapleall/maple_be/include/cg/cg_predict.h @@ -0,0 +1,93 @@ +/* + * Copyright (c) [2023] Huawei Technologies Co.,Ltd.All rights reserved. + * + * OpenArkCompiler is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * + * http://license.coscl.org.cn/MulanPSL2 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ +#ifndef MAPLEBE_INCLUDE_CG_CG_PREDICT_H +#define MAPLEBE_INCLUDE_CG_CG_PREDICT_H +#include "cgfunc.h" +#include "cgbb.h" +#include "cg_dominance.h" +#include "loop.h" +#include "cg_cfg.h" +namespace maplebe { +// The base value for branch probability notes and edge probabilities. +constexpr int kProbBase = 10000; + +struct Edge { + BB &src; + BB &dest; + Edge *next = nullptr; // the edge with the same src + int32 probability = 0; + FreqType frequency = 0; + Edge(BB &bb1, BB &bb2) : src(bb1), dest(bb2) {} + void Dump(bool dumpNext = false) const; +}; + +class CgPrediction : public AnalysisResult { + public: + static void VerifyFreq(CGFunc &cgFunc); + CgPrediction(MemPool &memPool, MemPool &tmpPool, CGFunc &cgFunc, DomAnalysis &dom, PostDomAnalysis &pdom, + LoopAnalysis &loops) + : AnalysisResult(&memPool), + mePredAlloc(&memPool), + tmpAlloc(&tmpPool), + cgFunc(&cgFunc), + dom(&dom), + pdom(&pdom), + cgLoop(&loops), + edges(tmpAlloc.Adapter()), + backEdgeProb(tmpAlloc.Adapter()), + bbVisited(tmpAlloc.Adapter()), + backEdges(tmpAlloc.Adapter()), + predictDebug(false) {} + + ~CgPrediction() override = default; + Edge *FindEdge(const BB &src, const BB &dest) const; + bool IsBackEdge(const Edge &edge) const; + void NormallizeCFGProb(); + void NormallizeBBProb(BB *bb); + void Verify(); + void Init(); + bool DoPropFreq(const BB *head, std::vector *headers, BB &bb); + void PropFreqInLoops(); + bool PropFreqInFunc(); + void ComputeBBFreq(); + void PrintAllEdges(); + void Run(); + void SetPredictDebug(bool val); + void SavePredictResultIntoCfg(); + void FixRedundantSuccsPreds(); + void RemoveRedundantSuccsPreds(BB *bb); + + protected: + MapleAllocator mePredAlloc; + MapleAllocator tmpAlloc; + CGFunc *cgFunc; + DomAnalysis *dom; + PostDomAnalysis *pdom; + LoopAnalysis *cgLoop; + MapleVector edges; + MapleMap backEdgeProb; // used in EstimateBBFrequency + MapleVector bbVisited; + MapleVector backEdges; // all backedges of loops + // used to save and recover builtin expect branchProb of condgoto stmtllptr; + bool predictDebug; +}; + +MAPLE_FUNC_PHASE_DECLARE_BEGIN(CgPredict, maplebe::CGFunc) +OVERRIDE_DEPENDENCE +MAPLE_FUNC_PHASE_DECLARE_END +} + + +#endif /* MAPLEBE_INCLUDE_CG_CG_PREDICT_H */ diff --git a/src/mapleall/maple_be/include/cg/cg_prop.h b/src/mapleall/maple_be/include/cg/cg_prop.h index 39fed58a8c..56e74c2e38 100644 --- a/src/mapleall/maple_be/include/cg/cg_prop.h +++ b/src/mapleall/maple_be/include/cg/cg_prop.h @@ -63,14 +63,13 @@ class CGProp { class PropOptimizeManager { public: - ~PropOptimizeManager() = default; template - void Optimize(CGFunc &cgFunc, CGSSAInfo *cgssaInfo, LiveIntervalAnalysis *ll) const { + static void Optimize(CGFunc &cgFunc, CGSSAInfo *cgssaInfo, LiveIntervalAnalysis *ll) { PropOptimizePattern optPattern(cgFunc, cgssaInfo, ll); optPattern.Run(); } template - void Optimize(CGFunc &cgFunc, CGSSAInfo *cgssaInfo) const { + static void Optimize(CGFunc &cgFunc, CGSSAInfo *cgssaInfo) { PropOptimizePattern optPattern(cgFunc, cgssaInfo); optPattern.Run(); } diff --git a/src/mapleall/maple_be/include/cg/cg_rce.h b/src/mapleall/maple_be/include/cg/cg_rce.h index ffe8697b82..df6d8383b8 100644 --- a/src/mapleall/maple_be/include/cg/cg_rce.h +++ b/src/mapleall/maple_be/include/cg/cg_rce.h @@ -22,7 +22,6 @@ namespace maplebe { #define CG_RCE_DUMP CG_DEBUG_FUNC(*cgFunc) -static uint32 g_count = 0; class RedundantComputeElim { public: RedundantComputeElim(CGFunc &f, CGSSAInfo &info, MemPool &mp) : cgFunc(&f), ssaInfo(&info), rceAlloc(&mp) {} @@ -36,6 +35,7 @@ class RedundantComputeElim { virtual void Run() = 0; void Dump(const Insn *insn1, const Insn *insn2) const; + uint32 kGcount = 0; protected: CGFunc *cgFunc; diff --git a/src/mapleall/maple_be/include/cg/cg_validbit_opt.h b/src/mapleall/maple_be/include/cg/cg_validbit_opt.h index 6176dbe3ef..4dd988a0b1 100644 --- a/src/mapleall/maple_be/include/cg/cg_validbit_opt.h +++ b/src/mapleall/maple_be/include/cg/cg_validbit_opt.h @@ -97,7 +97,7 @@ class ValidBitOpt { } virtual void DoOpt() = 0; void RectifyValidBitNum(); - void RecoverValidBitNum(); + void SetValidBitToOpndSize(); virtual void SetValidBits(Insn &insn) = 0; virtual bool SetPhiValidBits(Insn &insn) = 0; diff --git a/src/mapleall/maple_be/include/cg/cgbb.h b/src/mapleall/maple_be/include/cg/cgbb.h index ec11aaf953..2cb2a6dbed 100644 --- a/src/mapleall/maple_be/include/cg/cgbb.h +++ b/src/mapleall/maple_be/include/cg/cgbb.h @@ -30,7 +30,6 @@ /* Maple MP header */ #include "mempool_allocator.h" - namespace maplebe { /* For get bb */ #define FIRST_BB_OF_FUNC(FUNC) ((FUNC)->GetFirstBB()) @@ -63,6 +62,8 @@ namespace maplebe { #define FOR_BB_INSNS_REV(INSN, BLOCK) \ for (Insn * (INSN) = LAST_INSN(BLOCK); (INSN) != nullptr; (INSN) = (INSN)->GetPrev()) +#define FOR_BB_INSNS_REV_CONST(INSN, BLOCK) \ + for (const Insn * (INSN) = LAST_INSN(BLOCK); (INSN) != nullptr; (INSN) = (INSN)->GetPrev()) /* For iterating over insns in basic block when we might remove the current insn. */ #define FOR_BB_INSNS_SAFE(INSN, BLOCK, NEXT) \ @@ -80,6 +81,7 @@ using BBID = uint32; class BB : public maple::BaseGraphNode { public: + static constexpr int32 kUnknownProb = -1; enum BBKind : uint8 { kBBFallthru, /* default */ kBBIf, /* conditional branch */ @@ -101,6 +103,7 @@ class BB : public maple::BaseGraphNode { succs(mallocator.Adapter()), ehPreds(mallocator.Adapter()), ehSuccs(mallocator.Adapter()), + succsProb(mallocator.Adapter()), succsFreq(mallocator.Adapter()), succsProfFreq(mallocator.Adapter()), liveInRegNO(mallocator.Adapter()), @@ -155,6 +158,7 @@ class BB : public maple::BaseGraphNode { if (next != nullptr) { next->prev = &bb; } + succsProb[&bb] = kUnknownProb; next = &bb; } @@ -165,6 +169,7 @@ class BB : public maple::BaseGraphNode { this->prev->next = &bb; } this->prev = &bb; + succsProb[&bb] = kUnknownProb; } Insn *InsertInsnBefore(Insn &existing, Insn &newInsn); @@ -267,10 +272,11 @@ class BB : public maple::BaseGraphNode { CHECK_FATAL(false, "request to remove a non-existent element?"); } - void RemoveFromSuccessorList(const BB &bb) { + void RemoveFromSuccessorList(BB &bb) { for (auto i = succs.begin(); i != succs.end(); ++i) { if (*i == &bb) { succs.erase(i); + succsProb.erase(&bb); return; } } @@ -291,6 +297,7 @@ class BB : public maple::BaseGraphNode { /* Number of instructions excluding DbgInsn and comments */ int32 NumInsn() const; + int32 NumMachineInsn() const; BBID GetId() const { return GetID(); } @@ -373,6 +380,7 @@ class BB : public maple::BaseGraphNode { void SetFirstInsn(Insn *arg) { firstInsn = arg; } + Insn *GetFirstMachineInsn() { FOR_BB_INSNS(insn, this) { if (insn->IsMachineInstruction()) { @@ -381,9 +389,29 @@ class BB : public maple::BaseGraphNode { } return nullptr; } + const Insn *GetFirstMachineInsn() const { + FOR_BB_INSNS_CONST(insn, this) { + if (insn->IsMachineInstruction()) { + return insn; + } + } + return nullptr; + } Insn *GetLastMachineInsn() { FOR_BB_INSNS_REV(insn, this) { -#if TARGAARCH64 +#if defined(TARGAARCH64) && TARGAARCH64 + if (insn->IsMachineInstruction() && !AArch64isa::IsPseudoInstruction(insn->GetMachineOpcode())) { +#elif defined(TARGX86_64) && TARGX86_64 + if (insn->IsMachineInstruction()) { +#endif + return insn; + } + } + return nullptr; + } + const Insn *GetLastMachineInsn() const { + FOR_BB_INSNS_REV_CONST(insn, this) { +#if defined(TARGAARCH64) && TARGAARCH64 if (insn->IsMachineInstruction() && !AArch64isa::IsPseudoInstruction(insn->GetMachineOpcode())) { #elif defined(TARGX86_64) && TARGX86_64 if (insn->IsMachineInstruction()) { @@ -411,8 +439,9 @@ class BB : public maple::BaseGraphNode { void InsertPred(const MapleList::iterator &it, BB &bb) { preds.insert(it, &bb); } - void InsertSucc(const MapleList::iterator &it, BB &bb) { + void InsertSucc(const MapleList::iterator &it, BB &bb, int32 prob = kUnknownProb) { succs.insert(it, &bb); + succsProb[&bb] = prob; } const MapleList &GetPreds() const { return preds; @@ -431,7 +460,7 @@ class BB : public maple::BaseGraphNode { allPreds.push_back(pred); } for (auto *pred : ehPreds) { - (void)allPreds.push_back(pred); + allPreds.push_back(pred); } return allPreds; } @@ -443,7 +472,7 @@ class BB : public maple::BaseGraphNode { allSuccs.push_back(suc); } for (auto *suc : ehSuccs) { - (void)allSuccs.push_back(suc); + allSuccs.push_back(suc); } return allSuccs; } @@ -501,10 +530,11 @@ class BB : public maple::BaseGraphNode { preds.push_back(&bb); } } - void PushBackSuccs(BB &bb) { + void PushBackSuccs(BB &bb, int32 prob = kUnknownProb) { MapleList::iterator it = find(succs.begin(), succs.end(), &bb); if (it == succs.end()) { succs.push_back(&bb); + succsProb[&bb] = prob; } } void PushBackEhPreds(BB &bb) { @@ -516,8 +546,9 @@ class BB : public maple::BaseGraphNode { void PushFrontPreds(BB &bb) { preds.push_front(&bb); } - void PushFrontSuccs(BB &bb) { + void PushFrontSuccs(BB &bb, int32 prob = kUnknownProb) { succs.push_front(&bb); + succsProb[&bb] = prob; } MapleList::iterator ErasePreds(MapleList::const_iterator it) { return preds.erase(it); @@ -530,7 +561,21 @@ class BB : public maple::BaseGraphNode { } void RemoveSuccs(BB &bb) { succs.remove(&bb); + succsProb.erase(&bb); + } + + void ReplaceSucc(MapleList::const_iterator it, BB &newBB) { + int prob = succsProb[*it]; + EraseSuccs(it); + PushBackSuccs(newBB, prob); } + + void ReplaceSucc(BB &oldBB, BB &newBB) { + int prob = succsProb[&oldBB]; + RemoveSuccs(oldBB); + PushBackSuccs(newBB, prob); + } + void RemoveEhPreds(BB &bb) { ehPreds.remove(&bb); } @@ -542,6 +587,7 @@ class BB : public maple::BaseGraphNode { } void ClearSuccs() { succs.clear(); + succsProb.clear(); } void ClearEhPreds() { ehPreds.clear(); @@ -613,12 +659,6 @@ class BB : public maple::BaseGraphNode { void SetWontExit(bool arg) { wontExit = arg; } - void SetFastPathReturn(bool arg) { - fastPathReturn = arg; - } - bool IsFastPathReturn() const { - return fastPathReturn; - } bool IsCatch() const { return isCatch; } @@ -631,12 +671,6 @@ class BB : public maple::BaseGraphNode { void SetIsCleanup(bool arg) { isCleanup = arg; } - bool IsProEpilog() const { - return isProEpilog; - } - void SetIsProEpilog(bool arg) { - isProEpilog = arg; - } bool IsLabelTaken() const { return labelTaken; } @@ -649,12 +683,6 @@ class BB : public maple::BaseGraphNode { void SetHasCfi() { hasCfi = true; } - bool IsNeedRestoreCfi() const { - return needRestoreCfi; - } - void SetNeedRestoreCfi(bool flag) { - needRestoreCfi = flag; - } long GetInternalFlag1() const { return internalFlag1; } @@ -743,9 +771,6 @@ class BB : public maple::BaseGraphNode { void LiveInOrBits(const SparseDataInfo &arg) { liveIn->OrBits(arg); } - void LiveInEnlargeCapacity(uint32 arg) { - liveIn->EnlargeCapacityToAdaptSize(arg); - } void LiveInClearDataInfo() { liveIn->ClearDataInfo(); liveIn = nullptr; @@ -765,9 +790,6 @@ class BB : public maple::BaseGraphNode { void LiveOutOrBits(const SparseDataInfo &arg) { liveOut->OrBits(arg); } - void LiveOutEnlargeCapacity(uint32 arg) { - liveOut->EnlargeCapacityToAdaptSize(arg); - } void LiveOutClearDataInfo() { liveOut->ClearDataInfo(); liveOut = nullptr; @@ -834,6 +856,10 @@ class BB : public maple::BaseGraphNode { void SetCDGNode(CDGNode *node) { cdgNode = node; } + + MapleVector &GetSuccsFreq() { + return succsFreq; + } void InitEdgeFreq() { succsFreq.resize(succs.size()); @@ -878,6 +904,14 @@ class BB : public maple::BaseGraphNode { succsFreq[idx] = freq; } + void RemoveEdgeFreq(const BB &bb) { + auto iter = std::find(succs.cbegin(), succs.cend(), &bb); + CHECK_FATAL(iter != std::end(succs), "%d is not the successor of %d", bb.GetId(), this->GetId()); + CHECK_FATAL(succs.size() == succsFreq.size(), "succfreq size doesn't match succ size"); + const size_t idx = static_cast(std::distance(succs.cbegin(), iter)); + (void)succsFreq.erase(succsFreq.begin() + static_cast::difference_type>(idx)); + } + void InitEdgeProfFreq() { succsProfFreq.resize(succs.size(), 0); } @@ -911,6 +945,14 @@ class BB : public maple::BaseGraphNode { succsProfFreq[idx] = freq; } + void SetEdgeProb(const BB &bb, int32 prob) { + succsProb[&bb] = prob; + } + + int32 GetEdgeProb(const BB &bb) const { + return succsProb.find(&bb)->second; + } + bool HasMachineInsn() { FOR_BB_INSNS(insn, this) { if (insn->IsMachineInstruction()) { @@ -947,6 +989,7 @@ class BB : public maple::BaseGraphNode { MapleList succs; MapleList ehPreds; MapleList ehSuccs; + MapleMap succsProb; MapleVector succsFreq; MapleVector succsProfFreq; bool inColdSection = false; /* for bb splitting */ @@ -959,17 +1002,14 @@ class BB : public maple::BaseGraphNode { bool hasCall = false; bool unreachable = false; bool wontExit = false; - bool fastPathReturn = false; bool isCatch = false; /* part of the catch bb, true does might also mean it is unreachable */ /* * Since isCatch is set early and unreachable detected later, there * are some overlap here. */ bool isCleanup = false; /* true if the bb is cleanup bb. otherwise, false. */ - bool isProEpilog = false; /* Temporary tag for modifying prolog/epilog bb. */ bool labelTaken = false; /* Block label is taken indirectly and can be used to jump to it. */ bool hasCfi = false; /* bb contain cfi directive. */ - bool needRestoreCfi = false; /* add cfi insn to current bb if true */ /* * Different meaning for each data flow analysis. * For HandleFunction(), rough estimate of num of insn created. diff --git a/src/mapleall/maple_be/include/cg/cgfunc.h b/src/mapleall/maple_be/include/cg/cgfunc.h index 923bee9bcd..1e4121fa8e 100644 --- a/src/mapleall/maple_be/include/cg/cgfunc.h +++ b/src/mapleall/maple_be/include/cg/cgfunc.h @@ -477,8 +477,6 @@ class CGFunc { case PTY_a32: case PTY_a64: case PTY_ptr: - case PTY_i128: - case PTY_u128: case PTY_agg: return kRegTyInt; case PTY_f32: @@ -503,6 +501,8 @@ class CGFunc { case PTY_v16u8: case PTY_v1i64: case PTY_v1u64: + case PTY_i128: + case PTY_u128: return kRegTyFloat; default: ASSERT(false, "Unexpected pty"); @@ -752,14 +752,6 @@ class CGFunc { return returnBB; } - void SetPrologureBB(BB &bb) { - prologureBB = &bb; - } - - BB *GetPrologureBB() { - return prologureBB != nullptr ? prologureBB : firstBB; - } - void SetReturnBB(BB &bb) { returnBB = &bb; returnBB->SetKind(BB::kBBReturn); @@ -953,8 +945,7 @@ class CGFunc { MIRSymbol *st = GetEmitSt(bb.GetId()); MIRAggConst *arrayConst = safe_cast(st->GetKonst()); MIRType *etype = GlobalTables::GetTypeTable().GetTypeFromTyIdx(static_cast(PTY_a64)); - MIRConst *mirConst = GetMemoryPool()->New(newLabelIdx, - GetFunction().GetPuidx(), *etype); + MIRConst *mirConst = GetMemoryPool()->New(newLabelIdx, GetFunction().GetPuidx(), *etype); for (size_t i = 0; i < arrayConst->GetConstVec().size(); ++i) { CHECK_FATAL(arrayConst->GetConstVecItem(i)->GetKind() == kConstLblConst, "not a kConstLblConst"); MIRLblConst *lblConst = safe_cast(arrayConst->GetConstVecItem(i)); @@ -1213,6 +1204,10 @@ class CGFunc { return isParam ? dbgParamCallFrameLocations : dbgLocalCallFrameLocations; } + bool HasIrrScc() const { + return hasIrrScc; + } + bool HasAsm() const { return hasAsm; } @@ -1246,6 +1241,10 @@ class CGFunc { hasAsm = true; } + void SetHasIrrScc() { + hasIrrScc = true; + } + void SetStackProtectInfo(StackProtectKind kind) { stackProtectInfo |= kind; } @@ -1291,8 +1290,7 @@ class CGFunc { } static bool UsePlt(const MIRSymbol *funcSt = nullptr) { - if (CGOptions::GetNoplt() || CGOptions::IsNoSemanticInterposition() || - CGOptions::GetVisibilityType() == CGOptions::kHiddenVisibility) { + if (CGOptions::IsNoSemanticInterposition() || CGOptions::GetVisibilityType() == CGOptions::kHiddenVisibility) { return false; } @@ -1300,6 +1298,10 @@ class CGFunc { return false; } + if (CGOptions::IsNoPlt() && funcSt && funcSt->GetFunction()) { + return !funcSt->GetFunction()->CanDoNoPlt(CGOptions::IsShlib(), CGOptions::IsPIE()); + } + return true; } @@ -1479,7 +1481,6 @@ class CGFunc { LabelNode *endLabel = nullptr; /* end label of the function */ BB *firstBB = nullptr; - BB *prologureBB = nullptr; /* the BB to placing prologure's instructions(callee save/cfi) */ BB *returnBB = nullptr; BB *cleanupBB = nullptr; BB *lastBB = nullptr; @@ -1512,6 +1513,7 @@ class CGFunc { uint32 nextSpillLocation = 0; regno_t spSaveReg = 0; + bool hasIrrScc = false; bool hasAsm = false; bool useFP = true; bool seenFP = true; @@ -1548,7 +1550,5 @@ MAPLE_FUNC_PHASE_DECLARE_BEGIN(CgEmission, maplebe::CGFunc) MAPLE_FUNC_PHASE_DECLARE_END MAPLE_FUNC_PHASE_DECLARE_BEGIN(CgGenProEpiLog, maplebe::CGFunc) MAPLE_FUNC_PHASE_DECLARE_END -MAPLE_FUNC_PHASE_DECLARE_BEGIN(CgIsolateFastPath, maplebe::CGFunc) -MAPLE_FUNC_PHASE_DECLARE_END } /* namespace maplebe */ #endif /* MAPLEBE_INCLUDE_CG_CGFUNC_H */ diff --git a/src/mapleall/maple_be/include/cg/aarch64/aarch64_isolate_fastpath.h b/src/mapleall/maple_be/include/cg/dup_tail.h similarity index 30% rename from src/mapleall/maple_be/include/cg/aarch64/aarch64_isolate_fastpath.h rename to src/mapleall/maple_be/include/cg/dup_tail.h index 52059c7fe4..9a893cf861 100644 --- a/src/mapleall/maple_be/include/cg/aarch64/aarch64_isolate_fastpath.h +++ b/src/mapleall/maple_be/include/cg/dup_tail.h @@ -1,5 +1,5 @@ /* - * Copyright (c) [2022] Huawei Technologies Co.,Ltd.All rights reserved. + * Copyright (c) [2023] Huawei Technologies Co.,Ltd.All rights reserved. * * OpenArkCompiler is licensed under Mulan PSL v2. * You can use this software according to the terms and conditions of the Mulan PSL v2. @@ -12,46 +12,39 @@ * FIT FOR A PARTICULAR PURPOSE. * See the Mulan PSL v2 for more details. */ -#ifndef MAPLEBE_INCLUDE_CG_AARCH64_AARCH64_ISOLATE_FASTPATH_H -#define MAPLEBE_INCLUDE_CG_AARCH64_AARCH64_ISOLATE_FASTPATH_H - -#include "isolate_fastpath.h" -#include "aarch64_cgfunc.h" -#include "aarch64_operand.h" -#include "aarch64_insn.h" +#ifndef MAPLEBE_INCLUDE_CG_DUP_TAIL_H +#define MAPLEBE_INCLUDE_CG_DUP_TAIL_H +#include "optimize_common.h" namespace maplebe { -using namespace maple; - -class AArch64IsolateFastPath : public IsolateFastPath { +class DupTailOptimizer : public Optimizer { public: - explicit AArch64IsolateFastPath(CGFunc &func) - : IsolateFastPath(func) {} - ~AArch64IsolateFastPath() override { - fastPathReturnBB = nullptr; + DupTailOptimizer(CGFunc &func, MemPool &memPool) : Optimizer(func, memPool) { + name = "DupTail"; } - void Run() override; - - private: - bool InsertOpndRegs(Operand &op, std::set &vecRegs) const; - bool InsertInsnRegs(Insn &insn, bool insertSource, std::set &vecSourceRegs, - bool insertTarget, std::set &vecTargetRegs) const; - bool FindRegs(Operand &op, std::set &vecRegs) const; - bool BackwardFindDependency(BB &ifbb, std::set &vecReturnSourceRegs, std::list &existingInsns, - std::list &moveInsns) const; - void IsolateFastPathOpt(); + ~DupTailOptimizer() override = default; +}; - void SetFastPathReturnBB(BB *bb) { - bb->SetFastPathReturn(true); - fastPathReturnBB = bb; - } - BB *GetFastPathReturnBB() { - return fastPathReturnBB; +class DupPattern : public OptimizationPattern { + public: + explicit DupPattern(CGFunc &func) : OptimizationPattern(func) { + patternName = "DuplicatePattern"; + dotColor = kDup; } - - BB *fastPathReturnBB = nullptr; + ~DupPattern() override = default; + bool Optimize(BB &curBB) override; + uint32 GetFreqThreshold(); + + private: + // if the ret bb's insn num > 1, we should not dup ret bb by default + static constexpr int kThreshold = 1; + // if the rebb's insn num > kSafeThreshold, we do not dup ret bb. + static constexpr int kSafeThreshold = 10; + static constexpr int kFreqThresholdPgo = 40; }; + +MAPLE_FUNC_PHASE_DECLARE(CgDupTail, maplebe::CGFunc) } /* namespace maplebe */ -#endif /* MAPLEBE_INCLUDE_CG_AARCH64_AARCH64_ISOLATE_FASTPATH_H */ +#endif /* MAPLEBE_INCLUDE_CG_DUP_TAIL_H */ diff --git a/src/mapleall/maple_be/include/cg/ebo.h b/src/mapleall/maple_be/include/cg/ebo.h index 9d33d08ad2..88f018a6c5 100644 --- a/src/mapleall/maple_be/include/cg/ebo.h +++ b/src/mapleall/maple_be/include/cg/ebo.h @@ -138,7 +138,6 @@ class Ebo { --info.refCount; } - void EnlargeSpaceForLA(Insn &csetInsn) const; bool IsSaveReg(const Operand &opnd) const; bool IsFrameReg(Operand &opnd) const; bool OperandEqual(const Operand &op1, const Operand &op2) const; diff --git a/src/mapleall/maple_be/include/cg/insn.h b/src/mapleall/maple_be/include/cg/insn.h index 696f683ee7..87595ac518 100644 --- a/src/mapleall/maple_be/include/cg/insn.h +++ b/src/mapleall/maple_be/include/cg/insn.h @@ -51,7 +51,7 @@ struct VectorRegSpec { vecElementSize(eleSize), compositeOpnds(compositeOpnds) {} - void Dump() { + void Dump() const { if (vecElementSize == 0) { return; } @@ -85,6 +85,7 @@ class Insn { }; /* MCC_DecRefResetPair clear 2 stack position, MCC_ClearLocalStackRef clear 1 stack position */ static constexpr uint8 kMaxStackOffsetSize = 2; + static constexpr int32 kUnknownProb = -1; Insn(MemPool &memPool, MOperator opc) : mOp(opc), @@ -310,6 +311,14 @@ class Insn { isStackDef = flag; } + bool IsStackRevert() const { + return isStackRevert; + } + + void SetStackRevert(bool flag) { + isStackRevert = flag; + } + bool IsAsmDefCondCode() const { return asmDefCondCode; } @@ -463,14 +472,6 @@ class Insn { return nopNum; } - void SetNeedSplit(bool flag) { - needSplit = flag; - } - - bool IsNeedSplit() const { - return needSplit; - } - void SetIsThrow(bool isThrowVal) { this->isThrow = isThrowVal; } @@ -625,6 +626,12 @@ class Insn { void ClearRegSpecList() { regSpecList.clear(); } + int32 GetProb() { + return probability; + } + void SetProb(int prob) { + probability = prob; + } VectorRegSpec *GetAndRemoveRegSpecFromList(); @@ -684,10 +691,10 @@ class Insn { bool isSpill = false; /* used as hint for optimization */ bool isReload = false; /* used as hint for optimization */ bool isFrameDef = false; - bool isStackDef = false; + bool isStackDef = false; // def sp in prolog + bool isStackRevert = false; // revert sp in epilog bool asmDefCondCode = false; bool asmModMem = false; - bool needSplit = false; bool mayTailCall = false; /* for dynamic language to mark reference counting */ @@ -700,6 +707,8 @@ class Insn { * indicate whether the version has been processed. */ bool processRHS = false; + // for jmp insn, probability is the prob for jumping + int32 probability = kUnknownProb; }; struct InsnIdCmp { diff --git a/src/mapleall/maple_be/include/cg/isa.h b/src/mapleall/maple_be/include/cg/isa.h index 818e7b1c21..39351e783a 100644 --- a/src/mapleall/maple_be/include/cg/isa.h +++ b/src/mapleall/maple_be/include/cg/isa.h @@ -191,7 +191,13 @@ struct IntrinsicDesc { std::unordered_map opndDescMap; }; +constexpr std::pair kInvalidRegLimit = {-1, -1}; + struct InsnDesc { + using ImmValidFunc = std::function)>; + using SplitFunc = std::function; + using RegisterRangeLimitFunc = std::function(const Insn&, uint32)>; + InsnDesc(MOperator op, const std::string &inName, const std::string &inFormat) : opc(op), name(inName), @@ -215,8 +221,8 @@ struct InsnDesc { // for hard-coded machine description. InsnDesc(MOperator op, std::vector opndmd, uint64 props, uint64 ltype, - const std::string &inName, const std::string &inFormat, uint32 anum, - std::function)> vFunc) + const std::string &inName, const std::string &inFormat, uint32 anum, + const ImmValidFunc &vFunc) : opc(op), opndMD(opndmd), properties(props), @@ -229,9 +235,22 @@ struct InsnDesc { // for hard-coded machine description. InsnDesc(MOperator op, std::vector opndmd, uint64 props, uint64 ltype, - const std::string &inName, const std::string &inFormat, uint32 anum, - std::function)> vFunc, - std::function sFunc) + const std::string &inName, const std::string &inFormat, uint32 anum, + const RegisterRangeLimitFunc &vFunc) + : opc(op), + opndMD(opndmd), + properties(props), + latencyType(ltype), + name(inName), + format(inFormat), + atomicNum(anum), + regLimitFunc(vFunc) { + }; + + // for hard-coded machine description. + InsnDesc(MOperator op, std::vector opndmd, uint64 props, uint64 ltype, + const std::string &inName, const std::string &inFormat, uint32 anum, + const ImmValidFunc &vFunc, const SplitFunc &sFunc) : opc(op), opndMD(opndmd), properties(props), @@ -251,9 +270,11 @@ struct InsnDesc { const std::string format; uint32 atomicNum; /* indicate how many asm instructions it will emit. */ // If insn has immOperand, this function needs to be implemented. - std::function)> validFunc = nullptr; + ImmValidFunc validFunc = nullptr; // If insn needs to be split, this function needs to be implemented. - std::function splitFunc = nullptr; + SplitFunc splitFunc = nullptr; + // If insn has a limit on the register range, this function needs to be implemented. + RegisterRangeLimitFunc regLimitFunc = nullptr; bool IsSame(const InsnDesc &left, std::function cmp) const; @@ -366,6 +387,14 @@ struct InsnDesc { } splitFunc(insn, isAfterRegAlloc, insnBuilder, opndBuilder); } + + std::pair GetRegisterLimit(const Insn &insn, uint32 opndIdx) const { + if (!regLimitFunc) { + return kInvalidRegLimit; + } + return regLimitFunc(insn, opndIdx); + } + const OpndDesc *GetOpndDes(size_t index) const { return opndMD[index]; } diff --git a/src/mapleall/maple_be/include/cg/list_scheduler.h b/src/mapleall/maple_be/include/cg/list_scheduler.h index 11a76a2ab2..245dac8bc6 100644 --- a/src/mapleall/maple_be/include/cg/list_scheduler.h +++ b/src/mapleall/maple_be/include/cg/list_scheduler.h @@ -30,8 +30,6 @@ constexpr uint32 kClinitAdvanceCycle = 12; constexpr uint32 kAdrpLdrAdvanceCycle = 4; constexpr uint32 kClinitTailAdvanceCycle = 6; -static uint32 maxUnitIdx = 0; - class CommonScheduleInfo { public: explicit CommonScheduleInfo(MemPool &memPool) @@ -213,57 +211,7 @@ class ListScheduler { return true; } - /* - * Sort by priority in descending order, which use LStart as algorithm of computing priority, - * that is the first node in list has the highest priority - */ - static bool CriticalPathRankScheduleInsns(const DepNode *node1, const DepNode *node2) { - // p as an acronym for priority - CompareLStart compareLStart; - int p1 = compareLStart(*node1, *node2); - if (p1 != 0) { - return p1 > 0; - } - - CompareCost compareCost; - int p2 = compareCost(*node1, *node2); - if (p2 != 0) { - return p2 > 0; - } - - CompareEStart compareEStart; - int p3 = compareEStart(*node1, *node2); - if (p3 != 0) { - return p3 > 0; - } - - CompareSuccNodeSize compareSuccNodeSize; - int p4 = compareSuccNodeSize(*node1, *node2); - if (p4 != 0) { - return p4 > 0; - } - - CompareUnitKindNum compareUnitKindNum(maxUnitIdx); - int p5 = compareUnitKindNum(*node1, *node2); - if (p5 != 0) { - return p5 > 0; - } - - CompareSlotType compareSlotType; - int p6 = compareSlotType(*node1, *node2); - if (p6 != 0) { - return p6 > 0; - } - - CompareInsnID compareInsnId; - int p7 = compareInsnId(*node1, *node2); - if (p7 != 0) { - return p7 > 0; - } - - // default - return true; - } + static bool CriticalPathRankScheduleInsns(const DepNode *node1, const DepNode *node2); MemPool &listSchedMp; MapleAllocator listSchedAlloc; diff --git a/src/mapleall/maple_be/include/cg/live.h b/src/mapleall/maple_be/include/cg/live.h index 5b4bb27401..68043d83e5 100644 --- a/src/mapleall/maple_be/include/cg/live.h +++ b/src/mapleall/maple_be/include/cg/live.h @@ -40,7 +40,6 @@ class LiveAnalysis : public AnalysisResult { void InsertInOutOfCleanupBB(); void ResetLiveSet(); void ClearInOutDataInfo(); - void EnlargeSpaceForLiveAnalysis(BB &currBB); void GetBBDefUse(BB &bb) const; void ProcessAsmListOpnd(BB &bb, Operand &opnd, uint32 idx) const; void ProcessListOpnd(BB &bb, Operand &opnd, bool isDef) const; diff --git a/src/mapleall/maple_be/include/cg/loop.h b/src/mapleall/maple_be/include/cg/loop.h index 05170c12a1..4f32f9fc4e 100644 --- a/src/mapleall/maple_be/include/cg/loop.h +++ b/src/mapleall/maple_be/include/cg/loop.h @@ -165,7 +165,7 @@ class LoopAnalysis : public AnalysisResult { void Analysis(); void Dump() const { - LogInfo::MapleLogger() << "Dump LoopAnalysis Result:\n"; + LogInfo::MapleLogger() << "Dump LoopAnalysis Result For Func " << cgFunc.GetName() << ":\n"; for (const auto *loop : loops) { loop->Dump(); } @@ -176,6 +176,16 @@ class LoopAnalysis : public AnalysisResult { LogInfo::MapleLogger() << "BB " << bbId << " in loop " << bbLoopParent[bbId]->GetHeader().GetId() << "\n"; } } + + bool IsLoopHeaderBB(const BB &bb) const { + if (GetBBLoopParent(bb.GetId()) == nullptr) { + return false; + } else if (GetBBLoopParent(bb.GetId())->GetHeader().GetId() == bb.GetId()) { + return true; + } + return false; + } + private: MapleAllocator alloc; CGFunc &cgFunc; diff --git a/src/mapleall/maple_be/include/cg/operand.h b/src/mapleall/maple_be/include/cg/operand.h index 35aadcd475..d91356beb8 100644 --- a/src/mapleall/maple_be/include/cg/operand.h +++ b/src/mapleall/maple_be/include/cg/operand.h @@ -687,20 +687,20 @@ class OfstOperand : public ImmOperand { /* only for symbol offset */ OfstOperand(const MIRSymbol &mirSymbol, uint32 size, int32 relocs) : ImmOperand(kOpdOffset, 0, size, true, kNotVary, false), - offsetType(kSymbolOffset), symbol(&mirSymbol), relocs(relocs) {} + offsetType(kSymbolOffset), ofSymbol(&mirSymbol), reloc(relocs) {} /* only for Immediate offset */ OfstOperand(int64 val, uint32 size, VaryType isVar = kNotVary) : ImmOperand(kOpdOffset, static_cast(val), size, true, isVar, false), - offsetType(kImmediateOffset), symbol(nullptr), relocs(0) {} + offsetType(kImmediateOffset), ofSymbol(nullptr), reloc(0) {} /* for symbol and Immediate offset */ OfstOperand(const MIRSymbol &mirSymbol, int64 val, uint32 size, int32 relocs, VaryType isVar = kNotVary) : ImmOperand(kOpdOffset, val, size, true, isVar, false), offsetType(kSymbolImmediateOffset), - symbol(&mirSymbol), - relocs(relocs) {} + ofSymbol(&mirSymbol), + reloc(relocs) {} ~OfstOperand() override { - symbol = nullptr; + ofSymbol = nullptr; } Operand *Clone(MemPool &memPool) const override { @@ -719,11 +719,11 @@ class OfstOperand : public ImmOperand { using ImmOperand::GetSymbol; const MIRSymbol *GetSymbol() const override { - return symbol; + return ofSymbol; } const std::string &GetSymbolName() const { - return symbol->GetName(); + return ofSymbol->GetName(); } int64 GetOffsetValue() const { @@ -739,14 +739,14 @@ class OfstOperand : public ImmOperand { } bool operator==(const OfstOperand &opnd) const { - return (offsetType == opnd.offsetType && symbol == opnd.symbol && - ImmOperand::operator==(opnd) && relocs == opnd.relocs); + return (offsetType == opnd.offsetType && ofSymbol == opnd.ofSymbol && + ImmOperand::operator==(opnd) && relocs == opnd.reloc); } bool operator<(const OfstOperand &opnd) const { return (offsetType < opnd.offsetType || - (offsetType == opnd.offsetType && symbol < opnd.symbol) || - (offsetType == opnd.offsetType && symbol == opnd.symbol && GetValue() < opnd.GetValue())); + (offsetType == opnd.offsetType && ofSymbol < opnd.ofSymbol) || + (offsetType == opnd.offsetType && ofSymbol == opnd.ofSymbol && GetValue() < opnd.GetValue())); } void Dump() const override { @@ -759,13 +759,13 @@ class OfstOperand : public ImmOperand { } std::string GetHashContent() const override { - return ImmOperand::GetHashContent() + std::to_string(offsetType) + std::to_string(relocs); + return ImmOperand::GetHashContent() + std::to_string(offsetType) + std::to_string(reloc); } private: OfstType offsetType; - const MIRSymbol *symbol; - int32 relocs; + const MIRSymbol *ofSymbol; + int32 reloc; }; class ExtendShiftOperand : public OperandVisitable { @@ -1320,6 +1320,8 @@ class MemOperand : public OperandVisitable { return amount == k2BitSize; } else if (size == k64BitSize) { return amount == k3BitSize; + } else if (size == k128BitSize) { + return amount == k4BitSize; } else { return false; } diff --git a/src/mapleall/maple_be/include/cg/optimize_common.h b/src/mapleall/maple_be/include/cg/optimize_common.h index 23a7840d6b..b1c9878d1f 100644 --- a/src/mapleall/maple_be/include/cg/optimize_common.h +++ b/src/mapleall/maple_be/include/cg/optimize_common.h @@ -24,8 +24,10 @@ inline const std::string kCfgoAlways = "green"; inline const std::string kCfgoUnreach = "yellow"; inline const std::string kCfgoDup = "orange"; inline const std::string kCfgoEmpty = "purple"; -inline const std::string kIcoIte = "blue"; /* if conversion optimization, if-then-else */ -inline const std::string kIcoIt = "grey"; /* if conversion optimization, if-then-else */ +inline const std::string kIcoIte = "blue"; // if conversion optimization, if-then-else +inline const std::string kIcoIt = "grey"; // if conversion optimization, if-then-else +inline const std::string kDup = "maize"; // dup optimization + class OptimizationPattern { public: @@ -48,7 +50,6 @@ class OptimizationPattern { return (ehFunc != nullptr && maplebe::CGCFG::InLSDA(label, ehFunc)) || cgFunc->GetTheCFG()->InSwitchTable(label, *cgFunc); } - void Search2Op(bool noOptimize); virtual bool Optimize(BB &curBB) = 0; diff --git a/src/mapleall/maple_be/include/cg/proepilog.h b/src/mapleall/maple_be/include/cg/proepilog.h index 9fffbbeff9..3917d9da32 100644 --- a/src/mapleall/maple_be/include/cg/proepilog.h +++ b/src/mapleall/maple_be/include/cg/proepilog.h @@ -17,8 +17,81 @@ #include "cg_phase.h" #include "cgfunc.h" #include "insn.h" +#include "cg_dominance.h" +#include "loop.h" namespace maplebe { +struct ProEpilogSaveInfo { + ProEpilogSaveInfo(MapleAllocator &alloc) : prologBBs(alloc.Adapter()), epilogBBs(alloc.Adapter()) {} + + ~ProEpilogSaveInfo() = default; + + void Dump() { + LogInfo::MapleLogger() << "prolog will saved at BB "; + for (auto bbId : prologBBs) { + LogInfo::MapleLogger() << bbId << " "; + } + LogInfo::MapleLogger() << "entry!\n"; + + LogInfo::MapleLogger() << "epilog will saved at BB "; + for (auto bbId : epilogBBs) { + LogInfo::MapleLogger() << bbId << " "; + } + LogInfo::MapleLogger() << "exit!\n"; + } + + void Clear() { + prologBBs.clear(); + epilogBBs.clear(); + } + + MapleSet prologBBs; // will be inserted prolog at entry + MapleSet epilogBBs; // will be inserted epilog at exit +}; + +class ProEpilogAnalysis { + public: + ProEpilogAnalysis(CGFunc &func, MemPool &pool, DomAnalysis &dom, PostDomAnalysis &pdom, LoopAnalysis &loop) + : cgFunc(func), memPool(pool), alloc(&pool), domInfo(dom), pdomInfo(pdom), loopInfo(loop), saveInfo(alloc) {} + + virtual ~ProEpilogAnalysis() = default; + + std::string PhaseName() const { + return "proepiloganalysis"; + } + + virtual bool NeedProEpilog() { + return true; + } + + void Analysis(); + + const ProEpilogSaveInfo &GetProEpilogSaveInfo() const { + return saveInfo; + } + protected: + CGFunc &cgFunc; + MemPool &memPool; + MapleAllocator alloc; + DomAnalysis &domInfo; + PostDomAnalysis &pdomInfo; + LoopAnalysis &loopInfo; + ProEpilogSaveInfo saveInfo; + + bool PrologBBHoist(const MapleSet &saveBBs); +}; + +MAPLE_FUNC_PHASE_DECLARE_BEGIN(CgProEpilogAnalysis, maplebe::CGFunc); +const ProEpilogSaveInfo *GetResult() const { + if (proepilogAnalysis == nullptr) { + return nullptr; + } + return &proepilogAnalysis->GetProEpilogSaveInfo(); +} +ProEpilogAnalysis *proepilogAnalysis = nullptr; +OVERRIDE_DEPENDENCE +MAPLE_FUNC_PHASE_DECLARE_END + class GenProEpilog { public: explicit GenProEpilog(CGFunc &func) : cgFunc(func) {} @@ -50,7 +123,6 @@ class GenProEpilog { CGFunc &cgFunc; int64 offsetFromCfa = 0; /* SP offset from Call Frame Address */ - bool stackProtect = false; }; } /* namespace maplebe */ diff --git a/src/mapleall/maple_be/include/cg/ra_opt.h b/src/mapleall/maple_be/include/cg/ra_opt.h index a3530fb2a0..010bdae37f 100644 --- a/src/mapleall/maple_be/include/cg/ra_opt.h +++ b/src/mapleall/maple_be/include/cg/ra_opt.h @@ -18,39 +18,131 @@ #include "cgfunc.h" #include "cg_phase.h" #include "cg_dominance.h" +#include "maple_phase_manager.h" namespace maplebe { -class RaOpt { +class RaOptPattern { public: - RaOpt(CGFunc &func, MemPool &pool) : cgFunc(&func), memPool(&pool) {} + RaOptPattern(CGFunc &func, MemPool &pool, bool dump) + : cgFunc(func), memPool(pool), alloc(&pool), dumpInfo(dump) {} - virtual ~RaOpt() = default; + virtual ~RaOptPattern() = default; - virtual void Run() {} + virtual void Run() = 0; + protected: + CGFunc &cgFunc; + MemPool &memPool; + MapleAllocator alloc; + bool dumpInfo = false; +}; - std::string PhaseName() const { - return "raopt"; - } +// split reg live range for sink, such as +// BB1: BB1: +// mov R100, R0 mov R100, R0 +// cmp R100, #10 cmp R100, #10 +// bne BB3 bne BB3 +// BB2: BB2: +// add R0, R100, #10 ==> add R0, R100, #10 +// b BB_ret b BB_ret +// BB3: BB3: +// mov R1, R100 mov R101, R100 +// call mov R1, R101 +// add R0, R100, #10 call +// b BB_ret add R0, R100, #10 +// b BB_ret +class LRSplitForSink : public RaOptPattern { + struct RefsInfo { + RefsInfo(MapleAllocator &alloc) + : defInsns(alloc.Adapter()), useInsns(alloc.Adapter()), afterCallBBs(alloc.Adapter()) {} + ~RefsInfo() = default; - const CGFunc *GetCGFunc() const { - return cgFunc; - } - const MemPool *GetMemPool() const { - return memPool; + MapleVector defInsns; + MapleVector useInsns; + MapleSet afterCallBBs; + }; + public: + LRSplitForSink(CGFunc &func, MemPool &pool, DomAnalysis &dom, LoopAnalysis &loop, bool dump) + : RaOptPattern(func, pool, dump), + domInfo(dom), + loopInfo(loop), + splitRegs(alloc.Adapter()), + splitRegRefs(alloc.Adapter()), + afterCallBBs(cgFunc.NumBBs(), false, alloc.Adapter()) {} + + virtual ~LRSplitForSink() override = default; + + void Run() override; + protected: + DomAnalysis &domInfo; + LoopAnalysis &loopInfo; + MapleMap splitRegs; // registers which will be split + MapleMap splitRegRefs; // registers reference points + MapleBitVector afterCallBBs; + + // collect registers which will be split + virtual void CollectSplitRegs() = 0; + + // generate mov instructions related to the target + virtual Insn &GenMovInsn(RegOperand &dest, RegOperand &src) = 0; + + RefsInfo *GetOrCreateSplitRegRefsInfo(regno_t regno) { + if (splitRegs.count(regno) == 0) { + return nullptr; + } + auto *refsInfo = splitRegRefs[regno]; + if (refsInfo == nullptr) { + refsInfo = memPool.New(alloc); + splitRegRefs[regno] = refsInfo; + } + return splitRegRefs[regno]; } - void SetDomInfo(DomAnalysis *curDom) { - domInfo = curDom; + void ColletAfterCallBBs(BB &bb, MapleBitVector &visited, bool isAfterCallBB); + void ColletAfterCallBBs(); + + // search for the BB that can spilt the LR + BB *SearchSplitBB(const RefsInfo &refsInfo); + + void TryToSplitLiveRanges(); + + // collect reference points of all registers that need to be split + void ColletSplitRegRefs(); + void ColletSplitRegRefsWithInsn(Insn &insn, bool afterCall); + void SetSplitRegRef(Insn &insn, regno_t regno, bool isDef, bool isUse, bool afterCall); + void SetSplitRegCrossCall(const BB &bb, regno_t regno, bool afterCall); +}; + +class RaOpt { + public: + RaOpt(CGFunc &func, MemPool &pool, DomAnalysis &dom, LoopAnalysis &loop) + : cgFunc(func), + memPool(pool), + alloc(&pool), + domInfo(dom), + loopInfo(loop), + patterns(alloc.Adapter()) {} + + virtual ~RaOpt() = default; + + virtual void InitializePatterns() = 0; + + void Run() { + for (auto *pattern : patterns) { + ASSERT_NOT_NULL(pattern); + pattern->Run(); + } } - void SetLoopInfo(LoopAnalysis &loop) { - loopInfo = &loop; + std::string PhaseName() const { + return "raopt"; } protected: - CGFunc *cgFunc; - MemPool *memPool; - DomAnalysis *domInfo = nullptr; - LoopAnalysis *loopInfo = nullptr; + CGFunc &cgFunc; + MemPool &memPool; + MapleAllocator alloc; + DomAnalysis &domInfo; + LoopAnalysis &loopInfo; + MapleVector patterns; // all patterns }; MAPLE_FUNC_PHASE_DECLARE(CgRaOpt, maplebe::CGFunc) diff --git a/src/mapleall/maple_be/include/cg/reg_alloc.h b/src/mapleall/maple_be/include/cg/reg_alloc.h index 312f266dd5..3aee6ab34d 100644 --- a/src/mapleall/maple_be/include/cg/reg_alloc.h +++ b/src/mapleall/maple_be/include/cg/reg_alloc.h @@ -19,6 +19,39 @@ #include "maple_phase_manager.h" namespace maplebe { +class RATimerManager { + public: + RATimerManager(const RATimerManager&) = delete; + RATimerManager& operator=(const RATimerManager&) = delete; + + static MPLTimerManager &GetInstance() { + static RATimerManager raTimerM{}; + return raTimerM.timerM; + } + + void PrintAllTimerAndClear(const std::string &funcName) { + LogInfo::MapleLogger() << "Func[" << funcName << "] Reg Alloc Time:\n"; + LogInfo::MapleLogger() << timerM.ConvertAllTimer2Str() << std::endl; + timerM.Clear(); + } + private: + RATimerManager() = default; + ~RATimerManager() = default; + + MPLTimerManager timerM; +}; + +// RA time statistics marco. If defined, RA time consumed will print. +#ifdef REG_ALLOC_TIME_STATISTICS +#define RA_TIMER_REGISTER(timerName, str) MPLTimerRegister timerName##Timer(RATimerManager::GetInstance(), str) +#define RA_TIMER_STOP(timerName) timerName##Timer.Stop() +#define RA_TIMER_PRINT(funcName) RATimerManager::GetInstance().PrintAllTimerAndClear(funcName) +#else +#define RA_TIMER_REGISTER(name, str) +#define RA_TIMER_STOP(name) +#define RA_TIMER_PRINT(funcName) +#endif + class RegAllocator { public: RegAllocator(CGFunc &tempCGFunc, MemPool &memPool) @@ -26,8 +59,8 @@ class RegAllocator { memPool(&memPool), alloc(&memPool), regInfo(tempCGFunc.GetTargetRegInfo()) { - regInfo->Init(); -} + regInfo->Init(); + } virtual ~RegAllocator() = default; diff --git a/src/mapleall/maple_be/include/cg/reg_alloc_basic.h b/src/mapleall/maple_be/include/cg/reg_alloc_basic.h index e423355811..bd8065f1ab 100644 --- a/src/mapleall/maple_be/include/cg/reg_alloc_basic.h +++ b/src/mapleall/maple_be/include/cg/reg_alloc_basic.h @@ -31,7 +31,8 @@ class DefaultO0RegAllocator : public RegAllocator { allocatedSet(std::less(), alloc.Adapter()), regLiveness(alloc.Adapter()), rememberRegs(alloc.Adapter()), - multiDefForInsn(alloc.Adapter()) { + multiDefForInsn(alloc.Adapter()), + regsLimit(alloc.Adapter()) { availRegSet.resize(regInfo->GetAllRegNum()); } @@ -61,9 +62,9 @@ class DefaultO0RegAllocator : public RegAllocator { bool CheckRangesOverlap(const std::pair &range1, const MapleVector> &ranges2) const; void SetupRegLiveness(BB *bb); - void SetupRegLiveness(const MemOperand &opnd, uint32 insnId); - void SetupRegLiveness(ListOperand &opnd, uint32 insnId, bool isDef); - void SetupRegLiveness(const RegOperand &opnd, uint32 insnId, bool isDef); + void SetupRegLiveness(const MemOperand &opnd, const Insn &insn, uint32 opndIdx); + void SetupRegLiveness(const ListOperand &opnd, const Insn &insn, bool isDef, uint32 opndIdx); + void SetupRegLiveness(const RegOperand &opnd, const Insn &insn, bool isDef, uint32 opndIdx); MapleSet calleeSaveUsed; MapleVector availRegSet; @@ -73,7 +74,7 @@ class DefaultO0RegAllocator : public RegAllocator { MapleMap>> regLiveness; MapleVector rememberRegs; MapleSet multiDefForInsn; /* record multiple def operands in one insn*/ - + MapleMap> regsLimit; private: /* check live of physical and original vreg, release it if there is no overlap */ void CheckLiveAndReleaseReg( diff --git a/src/mapleall/maple_be/include/cg/reg_alloc_color_ra.h b/src/mapleall/maple_be/include/cg/reg_alloc_color_ra.h index e2b22b70c2..cda33e094e 100644 --- a/src/mapleall/maple_be/include/cg/reg_alloc_color_ra.h +++ b/src/mapleall/maple_be/include/cg/reg_alloc_color_ra.h @@ -794,6 +794,20 @@ class LiveRange { return rematerializer; } + bool IsVaildRegister(regno_t reg) const { + if (regLimit != kInvalidRegLimit) { + return (reg >= regLimit.first) && (reg <= regLimit.second); + } + return true; + } + + void SetRegisterLimit(const std::pair &limit) { + regLimit = limit; + } + + const std::pair &GetRegisterLimit() const { + return regLimit; + } private: MapleAllocator *lrAlloca; regno_t regNO = 0; @@ -826,6 +840,7 @@ class LiveRange { bool isNonLocal = true; bool isSpSave = false; /* contain SP in case of alloca */ Rematerializer *rematerializer = nullptr; + std::pair regLimit = kInvalidRegLimit; // first <= regLimit <= second }; /* One per bb, to communicate local usage to global RA */ @@ -1197,7 +1212,7 @@ class GraphColorRegAllocator : public RegAllocator { bbVec(alloc.Adapter()), vregLive(alloc.Adapter()), pregLive(alloc.Adapter()), - lrMap(alloc.Adapter()), + lrMap(cgFunc.GetMaxVReg(), nullptr, alloc.Adapter()), localRegVec(alloc.Adapter()), bbRegInfo(alloc.Adapter()), unconstrained(alloc.Adapter()), @@ -1224,6 +1239,9 @@ class GraphColorRegAllocator : public RegAllocator { uint32 cnt = 0; FOR_ALL_BB(bb, &cgFunc) { FOR_BB_INSNS(insn, bb) { + if (insn->IsImmaterialInsn() || !insn->IsMachineInstruction()) { + continue; + } ++cnt; } } @@ -1247,14 +1265,9 @@ class GraphColorRegAllocator : public RegAllocator { }; LiveRange *GetLiveRange(regno_t regNO) const { - auto it = lrMap.find(regNO); - if (it != lrMap.end()) { - return it->second; - } else { - return nullptr; - } + return lrMap[regNO]; } - const MapleMap &GetLrMap() const { + const MapleVector &GetLrMap() const { return lrMap; } Insn *SpillOperand(Insn &insn, const Operand &opnd, bool isDef, RegOperand &phyOpnd, bool forCall = false); @@ -1276,6 +1289,13 @@ class GraphColorRegAllocator : public RegAllocator { } }; + struct RegOpndInfo { + RegOpndInfo(RegOperand &opnd, uint32 size, uint32 idx) : regOpnd(opnd), regSize(size), opndIdx(idx) {} + RegOperand ®Opnd; + uint32 regSize = 0; + uint32 opndIdx = -1; + }; + void PrintLiveRanges() const; void PrintLocalRAInfo(const std::string &str) const; void PrintBBAssignInfo() const; @@ -1288,11 +1308,10 @@ class GraphColorRegAllocator : public RegAllocator { LiveRange *CreateLiveRangeAllocateAndUpdate(regno_t regNO, const BB &bb, uint32 currId); void CreateLiveRange(regno_t regNO, const BB &bb, bool isDef, uint32 currId, bool updateCount); void SetupLiveRangeByPhysicalReg(const Insn &insn, regno_t regNO, bool isDef); - void SetupLiveRangeByRegOpnd(const Insn &insn, const RegOperand ®Opnd, uint32 regSize, bool isDef); + void SetupLiveRangeByRegOpnd(const Insn &insn, const RegOpndInfo ®OpndInfo, bool isDef); void ComputeLiveRangeByLiveOut(BB &bb, uint32 currPoint); void ComputeLiveRangeByLiveIn(BB &bb, uint32 currPoint); void UpdateAdjMatrixByLiveIn(BB &bb, AdjMatrix &adjMat); - using RegOpndInfo = std::pair; // first is opnd, second is regSize void CollectRegOpndInfo(const Insn &insn, std::vector &defOpnds, std::vector &useOpnds); void UpdateCallInfo(uint32 bbId, uint32 currPoint, const Insn &insn); @@ -1382,8 +1401,6 @@ class GraphColorRegAllocator : public RegAllocator { RegOperand *CreateSpillFillCode(const RegOperand &opnd, Insn &insn, uint32 spillCnt, bool isdef = false); bool SpillLiveRangeForSpills(); void FinalizeSpSaveReg(); - - MapleVector::iterator GetHighPriorityLr(MapleVector &lrSet) const; void UpdateForbiddenForNeighbors(const LiveRange &lr) const; void UpdatePregvetoForNeighbors(const LiveRange &lr) const; regno_t FindColorForLr(const LiveRange &lr) const; @@ -1427,7 +1444,7 @@ class GraphColorRegAllocator : public RegAllocator { MapleVector bbVec; MapleUnorderedSet vregLive; MapleUnorderedSet pregLive; - MapleMap lrMap; + MapleVector lrMap; MapleVector localRegVec; /* local reg info for each bb, no local reg if null */ MapleVector bbRegInfo; /* register assignment info for each bb */ MapleVector unconstrained; diff --git a/src/mapleall/maple_be/include/cg/reg_alloc_lsra.h b/src/mapleall/maple_be/include/cg/reg_alloc_lsra.h index 8c17ba7b67..6811bac44e 100644 --- a/src/mapleall/maple_be/include/cg/reg_alloc_lsra.h +++ b/src/mapleall/maple_be/include/cg/reg_alloc_lsra.h @@ -19,11 +19,6 @@ #include "optimize_common.h" namespace maplebe { - -#ifdef RA_PERF_ANALYSIS - extern void printLSRATime() {}; -#endif - class LSRALinearScanRegAllocator : public RegAllocator { enum RegInCatch : uint8 { /* diff --git a/src/mapleall/maple_be/include/cg/reg_info.h b/src/mapleall/maple_be/include/cg/reg_info.h index 52340444aa..118f8b066f 100644 --- a/src/mapleall/maple_be/include/cg/reg_info.h +++ b/src/mapleall/maple_be/include/cg/reg_info.h @@ -188,9 +188,18 @@ class RegisterInfo { void SetCurrFunction(CGFunc &func) { cgFunc = &func; } - CGFunc *GetCurrFunction() const { + CGFunc *GetCurrFunction() { return cgFunc; } + // When some registers are allocated to the callee, the caller stores a part of the registers + // and the callee stores another part of the registers. + // For these registers, it is a better choice to assign them as caller-save registers. + virtual bool IsPrefCallerSaveRegs(RegType type, uint32 size) const { + return false; + } + virtual bool IsCallerSavePartRegister(regno_t regNO, uint32 size) const { + return false; + } virtual RegOperand *GetOrCreatePhyRegOperand(regno_t regNO, uint32 size, RegType kind, uint32 flag = 0) = 0; virtual bool IsGPRegister(regno_t regNO) const = 0; virtual bool IsPreAssignedReg(regno_t regNO) const = 0; diff --git a/src/mapleall/maple_be/include/cg/sparse_datainfo.h b/src/mapleall/maple_be/include/cg/sparse_datainfo.h index f0db416a9f..34372d4fa2 100644 --- a/src/mapleall/maple_be/include/cg/sparse_datainfo.h +++ b/src/mapleall/maple_be/include/cg/sparse_datainfo.h @@ -118,10 +118,6 @@ class SparseDataInfo { info.Clear(); } - void EnlargeCapacityToAdaptSize(uint32 /* bitNO */) const { - /* add one more size for each enlarge action */ - } - void ClearDataInfo() { info.Clear(); } diff --git a/src/mapleall/maple_be/include/cg/tailcall.h b/src/mapleall/maple_be/include/cg/tailcall.h index f8136e9c92..bd1f9b5a8f 100644 --- a/src/mapleall/maple_be/include/cg/tailcall.h +++ b/src/mapleall/maple_be/include/cg/tailcall.h @@ -75,7 +75,6 @@ class TailCallOpt { CGFunc &cgFunc; MemPool *memPool; MapleAllocator tmpAlloc; - bool stackProtect = false; MapleMap, BBIdCmp> exitBB2CallSitesMap; BB *curTailcallExitBB = nullptr; }; diff --git a/src/mapleall/maple_be/include/cg/x86_64/x64_MPISel.h b/src/mapleall/maple_be/include/cg/x86_64/x64_MPISel.h index 4953179d84..a452f20b76 100644 --- a/src/mapleall/maple_be/include/cg/x86_64/x64_MPISel.h +++ b/src/mapleall/maple_be/include/cg/x86_64/x64_MPISel.h @@ -113,7 +113,6 @@ class X64MPIsel : public MPISel { void CreateCallStructParamPassByReg(const MemOperand &memOpnd, regno_t regNo, uint32 parmNum); void CreateCallStructParamPassByStack(const MemOperand &addrOpnd, uint32 symSize, int32 baseOffset); void SelectAggCopyReturn(const MIRSymbol &symbol, MIRType &symbolType, uint64 symbolSize); - uint32 GetAggCopySize(uint32 offset1, uint32 offset2, uint32 alignment) const; bool IsParamStructCopy(const MIRSymbol &symbol); void SelectMinOrMax(bool isMin, Operand &resOpnd, Operand &opnd0, Operand &opnd1, PrimType primType) override; void SelectLibCall(const std::string &funcName, std::vector &opndVec, diff --git a/src/mapleall/maple_be/mdgen/include/mdlexer.h b/src/mapleall/maple_be/mdgen/include/mdlexer.h index 020ef877b7..5c46a89f99 100644 --- a/src/mapleall/maple_be/mdgen/include/mdlexer.h +++ b/src/mapleall/maple_be/mdgen/include/mdlexer.h @@ -102,7 +102,7 @@ class MDLexer { MDTokenKind GetFloatConst(); private: - static constexpr int maxNumLength = 10; + static constexpr int kMaxNumLength = 10; std::ifstream *mdFile = nullptr; std::ifstream mdFileInternal; uint32 lineNumber = 0; /* current Processing Line */ diff --git a/src/mapleall/maple_be/mdgen/src/mdlexer.cpp b/src/mapleall/maple_be/mdgen/src/mdlexer.cpp index 38b9ab4e71..03127bc551 100644 --- a/src/mapleall/maple_be/mdgen/src/mdlexer.cpp +++ b/src/mapleall/maple_be/mdgen/src/mdlexer.cpp @@ -167,7 +167,7 @@ MDTokenKind MDLexer::GetHexConst(uint32 digitStartPos, bool isNegative) { while (isxdigit(c)) { c = GetNextChar(); ++loopDepth; - if (loopDepth > maxNumLength) { + if (loopDepth > kMaxNumLength) { return ReturnError(); } } @@ -201,7 +201,7 @@ MDTokenKind MDLexer::GetIntConst(uint32 digitStartPos, bool isNegative) { while (isdigit(c)) { c = GetNextChar(); ++loopDepth; - if (loopDepth > maxNumLength) { + if (loopDepth > kMaxNumLength) { return ReturnError(); } } diff --git a/src/mapleall/maple_be/src/ad/mad.cpp b/src/mapleall/maple_be/src/ad/mad.cpp index a4f498705e..dfb25ef8bb 100644 --- a/src/mapleall/maple_be/src/ad/mad.cpp +++ b/src/mapleall/maple_be/src/ad/mad.cpp @@ -96,7 +96,7 @@ void Unit::Occupy(const Insn &insn, uint32 cycle) { } return; } - occupancyTable |= (1ull << cycle); + occupancyTable |= (1ULL << cycle); } /* diff --git a/src/mapleall/maple_be/src/be/becommon.cpp b/src/mapleall/maple_be/src/be/becommon.cpp index b19e69a2c6..2fc7a31ed4 100644 --- a/src/mapleall/maple_be/src/be/becommon.cpp +++ b/src/mapleall/maple_be/src/be/becommon.cpp @@ -541,14 +541,14 @@ void BECommon::GenObjSize(const MIRClassType &classType, FILE &outFile) const { TyIdx parentTypeIdx = classType.GetParentTyIdx(); MIRType *parentType = GlobalTables::GetTypeTable().GetTypeFromTyIdx(parentTypeIdx); - const char *parentName = nullptr; + std::string parentName; if (parentType != nullptr) { MIRClassType *parentClass = static_cast(parentType); - parentName = parentClass->GetName().c_str(); + parentName = parentClass->GetName(); } else { parentName = "THIS_IS_ROOT"; } - fprintf(&outFile, "__MRT_CLASS(%s, %" PRIu64 ", %s)\n", className.c_str(), objSize, parentName); + fprintf(&outFile, "__MRT_CLASS(%s, %" PRIu64 ", %s)\n", className.c_str(), objSize, parentName.c_str()); } // compute the offset of the field given by fieldID within the java class diff --git a/src/mapleall/maple_be/src/be/lower.cpp b/src/mapleall/maple_be/src/be/lower.cpp index 667b74fc19..0272858ad8 100644 --- a/src/mapleall/maple_be/src/be/lower.cpp +++ b/src/mapleall/maple_be/src/be/lower.cpp @@ -821,11 +821,11 @@ StmtNode *CGLowerer::WriteBitField(const OffsetPair &byteBitOffsets, const MIRBi auto *extractedHigherBits = builder->CreateExprExtractbits(OP_extractbits, primType, bitsExtracted, bitsRemained, rhs); auto *bitFieldRemained = builder->CreateExprIreadoff(primType, - static_cast(static_cast(byteOffset) + static_cast(primTypeSize)), baseAddr); + static_cast(byteOffset) + static_cast(primTypeSize), baseAddr); auto *depositedHigherBits = builder->CreateExprDepositbits(OP_depositbits, primType, 0, bitsRemained, bitFieldRemained, extractedHigherBits); auto *assignedHigherBits = builder->CreateStmtIassignoff(primType, - static_cast(static_cast(byteOffset) + static_cast(primTypeSize)), baseAddr, depositedHigherBits); + static_cast(byteOffset) + static_cast(primTypeSize), baseAddr, depositedHigherBits); if (funcProfData) { funcProfData->CopyStmtFreq(assignedLowerBits->GetStmtID(), block->GetStmtID()); funcProfData->CopyStmtFreq(assignedHigherBits->GetStmtID(), block->GetStmtID()); @@ -854,12 +854,16 @@ BaseNode *CGLowerer::ReadBitField(const OffsetPair &byteBitOffsets, const MIRBit if (CGOptions::IsBigEndian()) { bitOffset = 0; } + // extractbits i32 0 28 (depositbits i32 27 1 ( + // extractbits i32 5 27 (ireadoff i32 19 (addrof ptr $g_569)), + // ireadoff i32 23 (addrof ptr $g_569))) auto *extractedLowerBits = builder->CreateExprExtractbits(OP_extractbits, primType, static_cast(bitOffset), bitSize - bitsRemained, bitField); auto *bitFieldRemained = builder->CreateExprIreadoff(primType, static_cast(static_cast(byteOffset) + static_cast(primTypeSize)), baseAddr); - auto *result = builder->CreateExprDepositbits(OP_depositbits, primType, bitSize - bitsRemained, bitsRemained, + auto *depositAllBits = builder->CreateExprDepositbits(OP_depositbits, primType, bitSize - bitsRemained, bitsRemained, extractedLowerBits, bitFieldRemained); + auto *result = builder->CreateExprExtractbits(OP_extractbits, primType, 0, bitSize, depositAllBits); return result; } @@ -1012,6 +1016,9 @@ StmtNode *CGLowerer::LowerIassignBitfield(IassignNode &iassign, BlockNode &newBl ASSERT(iassign.Opnd(0) != nullptr, "iassign.Opnd(0) should not be nullptr"); iassign.SetOpnd(LowerExpr(iassign, *iassign.Opnd(0), newBlk), 0); iassign.SetRHS(LowerExpr(iassign, *iassign.GetRHS(), newBlk)); + if (iassign.GetFieldID() == 0) { + return &iassign; + } CHECK_FATAL(iassign.GetTyIdx() < GlobalTables::GetTypeTable().GetTypeTable().size(), "LowerIassignBitField: subscript out of range"); @@ -1620,21 +1627,11 @@ void CGLowerer::LowerStructReturnInGpRegs(BlockNode &newBlk, const StmtNode &stm if (size == 0) { return; - } else if (size <= k8ByteSize) { - // size <= 8-Byte, lowerd into - // call &foo - // dassign agg $s (regread agg %%retval0) - auto *regread = mirBuilder->CreateExprRegread(symbol.GetType()->GetPrimType(), -kSregRetval0); - auto *dStmt = mirBuilder->CreateStmtDassign(symbol.GetStIdx(), 0, regread); - newBlk.AddStatement(dStmt); - if (funcProfData) { - funcProfData->CopyStmtFreq(dStmt->GetStmtID(), stmt.GetStmtID()); - } - return; } // save retval0, retval1 - PregIdx pIdx1R = 0, pIdx2R = 0; + PregIdx pIdx1R = 0; + PregIdx pIdx2R = 0; auto genRetvalSave = [this, &newBlk, &stmt](PregIdx &pIdx, SpecialReg sreg) { auto *regreadNode = mirBuilder->CreateExprRegread(PTY_u64, -sreg); pIdx = GetCurrentFunc()->GetPregTab()->CreatePreg(PTY_u64); @@ -1645,7 +1642,9 @@ void CGLowerer::LowerStructReturnInGpRegs(BlockNode &newBlk, const StmtNode &stm } }; genRetvalSave(pIdx1R, kSregRetval0); - genRetvalSave(pIdx2R, kSregRetval1); + if (size > k8ByteSize) { + genRetvalSave(pIdx2R, kSregRetval1); + } // save &s BaseNode *regAddr = mirBuilder->CreateExprAddrof(0, symbol); @@ -1940,6 +1939,120 @@ void CGLowerer::LowerAssertBoundary(StmtNode &stmt, BlockNode &block, BlockNode abortNode.emplace_back(abortModeNode); } +StmtNode *CGLowerer::ReplaceCommonAggAssign(DassignNode &dass, const MIRSymbol &sym) { + if (dass.GetRHS()->GetOpCode() != OP_dread || dass.GetRHS()->GetPrimType() != PTY_agg) { + return nullptr; + } + auto *replace = ReplaceUnionRead(dass, *dass.GetRHS(), true); + if (!replace) { + return nullptr; + } + // replace " dassign $a 0 (dread agg %union 2) " with + // " iassign <* u32> 0 (addrof a64 $a, extractbits u32 0 16 (regread u64 %111)) " + auto ptrType = GetExactPtrPrimType(); + auto oldSize = GlobalTables::GetTypeTable().GetTypeTableSize(); + auto *newType = GlobalTables::GetTypeTable().GetOrCreatePointerType( + *GlobalTables::GetTypeTable().GetPrimType(replace->GetPrimType()), ptrType); + beCommon.AddNewTypeAfterBecommon(oldSize, GlobalTables::GetTypeTable().GetTypeTableSize()); + BaseNode *base = mirBuilder->CreateAddrof(sym, ptrType); + if (dass.GetFieldID() != 0) { + auto offset = + static_cast(sym.GetType())->GetFieldOffsetFromBaseAddr(dass.GetFieldID()).byteOffset; + base = mirBuilder->CreateExprBinary(OP_add, ptrType, base, mirBuilder->CreateIntConst(offset, ptrType)); + } + return mirBuilder->CreateStmtIassign(*newType, 0, base, replace); +} + +BaseNode *CGLowerer::ReplaceAggRead(BaseNode *rhs, DassignNode &dass, uint32 bitSize, MIRFunction &func) { + auto ptrType = GetExactPtrPrimType(); + auto pto = bitSize <= k8BitSize ? PTY_u8 : bitSize <= k16BitSize ? PTY_u16 : + bitSize <= k32BitSize ? PTY_u32 : PTY_u64; + auto oldSize = GlobalTables::GetTypeTable().GetTypeTableSize(); + auto *newType = + GlobalTables::GetTypeTable().GetOrCreatePointerType(*GlobalTables::GetTypeTable().GetPrimType(pto), ptrType); + beCommon.AddNewTypeAfterBecommon(oldSize, GlobalTables::GetTypeTable().GetTypeTableSize()); + if (rhs->GetOpCode() == OP_iread) { + // replace " iread agg <* struct> 0 (%1) " with + // " iread u32 <* u32> 0 (%1) " + auto *iread = static_cast(rhs); + auto *base = iread->Opnd(0); + if (iread->GetFieldID() != 0) { + auto *lhsSymTy = static_cast(GlobalTables::GetTypeTable().GetTypeFromTyIdx(iread->GetTyIdx())); + auto offset = static_cast(lhsSymTy->GetPointedType())-> + GetFieldOffsetFromBaseAddr(iread->GetFieldID()).byteOffset; + base = mirBuilder->CreateExprBinary(OP_add, ptrType, base, mirBuilder->CreateIntConst(offset, ptrType)); + } + rhs = mirBuilder->CreateExprIread(pto, newType->GetTypeIndex(), 0, base); + } else if (rhs->GetOpCode() == OP_dread) { + // replace " dread agg $a 0 " with + // " iread u32 <* u32> 0 (addrof a64 $a) " + auto *replace = ReplaceUnionRead(dass, *rhs, true); + if (replace) { + return replace; + } + auto *dread = static_cast(rhs); + auto *rhsSym = func.GetLocalOrGlobalSymbol(dread->GetStIdx()); + BaseNode *base = mirBuilder->CreateAddrof(*rhsSym, ptrType); + if (dread->GetFieldID() != 0) { + auto offset = + static_cast(rhsSym->GetType())->GetFieldOffsetFromBaseAddr(dread->GetFieldID()).byteOffset; + base = mirBuilder->CreateExprBinary(OP_add, ptrType, base, mirBuilder->CreateIntConst(offset, ptrType)); + } + rhs = mirBuilder->CreateExprIread(pto, newType->GetTypeIndex(), 0, base); + } else { + CHECK_FATAL_FALSE("Check This Case!"); + } + return rhs; +} + +StmtNode *CGLowerer::ReplaceUnionAssign(StmtNode &stmt) { + if (CGOptions::IsBigEndian()) { + return nullptr; + } + if (stmt.GetOpCode() != OP_dassign) { + return nullptr; + } + auto &dass = static_cast(stmt); + auto stIdx = dass.GetStIdx(); + auto *func = mirModule.CurFunction(); + auto *sym = func->GetLocalOrGlobalSymbol(stIdx); + if (!sym->IsUnionReplaceCand()) { + return ReplaceCommonAggAssign(dass, *sym); + } + auto *type = sym->GetType(); + PregIdx regNo = 0; + auto regPtyp = GetPointerSize() == k4ByteSize ? PTY_u32 : PTY_u64; + auto found = unionReplacePair.find(stIdx); + if (found != unionReplacePair.end()) { + regNo = found->second; + } else { + regNo = func->GetPregTab()->CreatePreg(regPtyp); + (void)unionReplacePair.emplace(stIdx, regNo); + } + auto *fieldType = static_cast(type)->GetFieldType(dass.GetFieldID()); + uint32 bitOffset = + static_cast(static_cast(type)->GetBitOffsetFromBaseAddr(dass.GetFieldID())); + uint32 bitSize = static_cast(fieldType->GetSize()) * k8BitSize; + auto *rhs = dass.GetRHS(); + if (fieldType->IsMIRBitFieldType()) { + bitSize = static_cast(static_cast(fieldType)->GetFieldSize()); + } else if (IsPrimitiveScalar(fieldType->GetPrimType())) { + if (!IsPrimitiveInteger(fieldType->GetPrimType())) { + auto iptyp = bitSize <= k8BitSize ? PTY_u8 : bitSize <= k16BitSize ? PTY_u16 : + bitSize <= k32BitSize ? PTY_u32 : PTY_u64; + rhs = mirBuilder->CreateExprRetype(*GlobalTables::GetTypeTable().GetPrimType(iptyp), + fieldType->GetPrimType(), rhs); + } + } else { + rhs = ReplaceAggRead(rhs, dass, bitSize, *func); + } + // replace " dassign %union 1 (rhs) " with + // " regassign u64 %1 (depositbits u64 0 16 (regread %1, rhs))" + auto *deposit = mirBuilder->CreateExprDepositbits(OP_depositbits, regPtyp, bitOffset, bitSize, + mirBuilder->CreateExprRegread(regPtyp, regNo), rhs); + return mirBuilder->CreateStmtRegassign(regPtyp, regNo, deposit); +} + BlockNode *CGLowerer::LowerBlock(BlockNode &block) { BlockNode *newBlk = mirModule.CurFuncCodeMemPool()->New(); if (funcProfData) { @@ -1958,6 +2071,8 @@ BlockNode *CGLowerer::LowerBlock(BlockNode &block) { stmt->SetNext(nullptr); currentBlock = newBlk; auto lastStmt = newBlk->GetStmtNodes().rbegin(); + auto *replaced = ReplaceUnionAssign(*stmt); + stmt = replaced ? replaced : stmt; LowerTypePtr(*stmt); @@ -2617,7 +2732,7 @@ void CGLowerer::RegisterBuiltIns() { std::vector formals; const std::string params[IntrinDesc::kMaxArgsNum] = { "p0", "p1", "p2", "p3", "p4", "p5" }; - for (uint32 j = 0; j < IntrinDesc::kMaxArgsNum; ++j) { + for (uint32 j = 0; j < desc.argInfo.size(); ++j) { MIRType *argTy = desc.GetArgType(j); if (argTy == nullptr) { break; @@ -2776,6 +2891,89 @@ void CGLowerer::ProcessArrayExpr(BaseNode &expr, BlockNode &blkNode) { } } +BaseNode *CGLowerer::ReplaceAggAssign(BaseNode &parent, uint32 bitOffset, uint32 bitSize, + PregIdx regNo, bool fromDass) { + auto regPtyp = GetPointerSize() == k4ByteSize ? PTY_u32 : PTY_u64; + auto ptrType = GetExactPtrPrimType(); + auto pto = bitSize <= k8BitSize ? PTY_u8 : bitSize <= k16BitSize ? PTY_u16 : + bitSize <= k32BitSize ? PTY_u32 : PTY_u64; + auto oldSize = GlobalTables::GetTypeTable().GetTypeTableSize(); + auto *newType = + GlobalTables::GetTypeTable().GetOrCreatePointerType(*GlobalTables::GetTypeTable().GetPrimType(pto), ptrType); + beCommon.AddNewTypeAfterBecommon(oldSize, GlobalTables::GetTypeTable().GetTypeTableSize()); + if (parent.GetOpCode() == OP_iassign) { + // replace " iassign <* struct> 1 (%1, dread agg %union 1) " with + // " iassign <* u32> 0 (%1, extractbits u32 0 16 (regread u64 %111)) " + auto &iass = static_cast(parent); + if (iass.GetFieldID() != 0) { + auto *lhsSymTy = static_cast(GlobalTables::GetTypeTable().GetTypeFromTyIdx(iass.GetTyIdx())); + auto offset = static_cast(lhsSymTy->GetPointedType())-> + GetFieldOffsetFromBaseAddr(iass.GetFieldID()).byteOffset; + auto *base = + mirBuilder->CreateExprBinary(OP_add, ptrType, iass.Opnd(0), mirBuilder->CreateIntConst(offset, ptrType)); + iass.SetFieldID(0); + iass.SetOpnd(base, 0); + } + iass.SetPrimType(pto); + iass.SetTyIdx(newType->GetTypeIndex()); + return mirBuilder->CreateExprExtractbits(OP_extractbits, pto, bitOffset, bitSize, + mirBuilder->CreateExprRegread(regPtyp, regNo)); + } else if (fromDass) { + return mirBuilder->CreateExprExtractbits(OP_extractbits, pto, bitOffset, bitSize, + mirBuilder->CreateExprRegread(regPtyp, regNo)); + } else { + CHECK_FATAL_FALSE("Check This Case!"); + } +} + +BaseNode *CGLowerer::ReplaceUnionRead(BaseNode &parent, BaseNode &expr, bool fromDass) { + if (CGOptions::IsBigEndian()) { + return nullptr; + } + if (expr.GetOpCode() != OP_dread) { + return nullptr; + } + auto &dread = static_cast(expr); + auto stIdx = dread.GetStIdx(); + auto *func = mirModule.CurFunction(); + auto *sym = func->GetLocalOrGlobalSymbol(stIdx); + if (!sym->IsUnionReplaceCand()) { + return nullptr; + } + auto *type = sym->GetType(); + PregIdx regNo = 0; + auto regPtyp = GetPointerSize() == k4ByteSize ? PTY_u32 : PTY_u64; + auto found = unionReplacePair.find(stIdx); + if (found != unionReplacePair.end()) { + regNo = found->second; + } else { + regNo = func->GetPregTab()->CreatePreg(regPtyp); + (void)unionReplacePair.emplace(stIdx, regNo); + } + auto *fieldType = static_cast(type)->GetFieldType(dread.GetFieldID()); + uint32 bitOffset = + static_cast(static_cast(type)->GetBitOffsetFromBaseAddr(dread.GetFieldID())); + uint32 bitSize = static_cast(fieldType->GetSize()) * k8BitSize; + if (fieldType->IsMIRBitFieldType()) { + bitSize = static_cast(fieldType)->GetFieldSize(); + } else if (IsPrimitiveScalar(fieldType->GetPrimType())) { + if (!IsPrimitiveInteger(fieldType->GetPrimType())) { + auto iptyp = bitSize <= k8BitSize ? PTY_u8 : bitSize <= k16BitSize ? PTY_u16 : + bitSize <= k32BitSize ? PTY_u32 : PTY_u64; + auto *extract = mirBuilder->CreateExprExtractbits(OP_extractbits, iptyp, bitOffset, bitSize, + mirBuilder->CreateExprRegread(regPtyp, regNo)); + return mirBuilder->CreateExprRetype(*GlobalTables::GetTypeTable().GetPrimType(fieldType->GetPrimType()), + iptyp, extract); + } + } else { + return ReplaceAggAssign(parent, bitOffset, bitSize, regNo, fromDass); + } + // replace " dread u32 %union 1 " with + // " extractbits u32 0 16 (regread u64 %111) " + return mirBuilder->CreateExprExtractbits(OP_extractbits, fieldType->GetPrimType(), bitOffset, bitSize, + mirBuilder->CreateExprRegread(regPtyp, regNo)); +} + BaseNode *CGLowerer::LowerExpr(BaseNode &parent, BaseNode &expr, BlockNode &blkNode) { bool isCvtU1Expr = (expr.GetOpCode() == OP_cvt && expr.GetPrimType() == PTY_u1 && static_cast(expr).FromType() != PTY_u1); @@ -2792,6 +2990,11 @@ BaseNode *CGLowerer::LowerExpr(BaseNode &parent, BaseNode &expr, BlockNode &blkN return LowerIntrinsicopwithtype(parent, static_cast(expr), blkNode); } + auto *replace = ReplaceUnionRead(parent, expr); + if (replace) { + return LowerExpr(parent, *replace, blkNode); + } + LowerTypePtr(expr); if (expr.GetOpCode() == OP_iread && expr.Opnd(0)->GetOpCode() == OP_array) { @@ -4255,6 +4458,7 @@ void CGLowerer::LowerFunc(MIRFunction &func) { BlockNode *origBody = func.GetBody(); CHECK_FATAL(origBody != nullptr, "origBody should not be nullptr"); + unionReplacePair.clear(); BlockNode *newBody = LowerBlock(*origBody); func.SetBody(newBody); if (needBranchCleanup) { diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_aggressive_opt.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_aggressive_opt.cpp index 288e0db872..37c4ca016e 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_aggressive_opt.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_aggressive_opt.cpp @@ -83,7 +83,7 @@ void AArch64CombineRedundantX16Opt::ResetInsnId() { } } -bool AArch64CombineRedundantX16Opt::IsEndOfSegment(Insn &insn, bool hasX16Def) { +bool AArch64CombineRedundantX16Opt::IsEndOfSegment(const Insn &insn, bool hasX16Def) { if (insn.IsCall() || (IsUseX16MemInsn(insn) && (recentSplitUseOpnd == nullptr || isSpecialX16Def))) { clearX16Def = true; return true; @@ -91,7 +91,6 @@ bool AArch64CombineRedundantX16Opt::IsEndOfSegment(Insn &insn, bool hasX16Def) { if (!hasX16Def) { return false; } - CHECK_FATAL(insn.GetDefRegs().size() == 1, "invalid x16 def instruction"); MOperator curMop = insn.GetMachineOpcode(); if (curMop != MOP_waddrri12 && curMop != MOP_xaddrri12 && curMop != MOP_waddrri24 && curMop != MOP_xaddrri24 && curMop != MOP_waddrrr && curMop != MOP_xaddrrr && curMop != MOP_wmovri32 && curMop != MOP_xmovri64 && @@ -294,7 +293,7 @@ void AArch64CombineRedundantX16Opt::ComputeValidAddImmInterval(UseX16InsnInfo &x x16UseInfo.maxValidAddImm = x16UseInfo.originalOfst - minValidOfst; } -void AArch64CombineRedundantX16Opt::FindCommonX16DefInsns(MemPool *tmpMp, MapleAllocator *tmpAlloc) { +void AArch64CombineRedundantX16Opt::FindCommonX16DefInsns(MemPool *tmpMp, MapleAllocator *tmpAlloc) const { if (isSameAddImm) { ProcessSameAddImmCombineInfo(tmpMp, tmpAlloc); } else { diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_alignment.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_alignment.cpp index 1cdfe62260..0da32c10ce 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_alignment.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_alignment.cpp @@ -21,22 +21,29 @@ #include "aarch64_alignment.h" namespace maplebe { -void AArch64AlignAnalysis::FindLoopHeader() { +void AArch64AlignAnalysis::FindLoopHeaderByDefault() { if (loopInfo.GetLoops().empty()) { return; } for (auto *loop : loopInfo.GetLoops()) { - InsertLoopHeaderBBs(loop->GetHeader()); + BB &header = loop->GetHeader(); + if (&header == aarFunc->GetFirstBB() || IsIncludeCall(header) || !IsInSizeRange(header)) { + continue; + } + InsertLoopHeaderBBs(header); } } -void AArch64AlignAnalysis::FindJumpTarget() { +void AArch64AlignAnalysis::FindJumpTargetByDefault() { MapleUnorderedMap label2BBMap = aarFunc->GetLab2BBMap(); if (label2BBMap.empty()) { return; } for (auto &iter : label2BBMap) { BB *jumpBB = iter.second; + if (jumpBB == aarFunc->GetFirstBB() || !IsInSizeRange(*jumpBB) || HasFallthruEdge(*jumpBB)) { + continue; + } if (jumpBB != nullptr) { InsertJumpTargetBBs(*jumpBB); } @@ -93,9 +100,6 @@ void AArch64AlignAnalysis::ComputeLoopAlign() { return; } for (BB *bb : loopHeaderBBs) { - if (bb == cgFunc.GetFirstBB() || IsIncludeCall(*bb) || !IsInSizeRange(*bb)) { - continue; - } bb->SetNeedAlign(true); if (CGOptions::GetLoopAlignPow() == 0) { return; @@ -117,9 +121,6 @@ void AArch64AlignAnalysis::ComputeJumpAlign() { return; } for (BB *bb : jumpTargetBBs) { - if (bb == cgFunc.GetFirstBB() || !IsInSizeRange(*bb) || HasFallthruEdge(*bb)) { - continue; - } bb->SetNeedAlign(true); if (CGOptions::GetJumpAlignPow() == 0) { return; @@ -148,16 +149,56 @@ bool AArch64AlignAnalysis::IsInSameAlignedRegion(uint32 addr1, uint32 addr2, uin return (((addr1 - 1) * kInsnSize) / alignedRegionSize) == (((addr2 - 1) * kInsnSize) / alignedRegionSize); } +uint32 AArch64AlignAnalysis::ComputeBBAlignNopNum(BB &bb, uint32 addr) const { + uint32 alignedVal = (1U << bb.GetAlignPower()); + uint32 alignNopNum = GetAlignRange(alignedVal, addr); + bb.SetAlignNopNum(alignNopNum); + return alignNopNum; +} + +uint64 AArch64AlignAnalysis::GetFreqThreshold() const { + uint32 alignThreshold = CGOptions::GetAlignThreshold(); + if (alignThreshold < 1 || alignThreshold > 100) { // 1: min value, 100: max value + alignThreshold = 100; // 100: default value + } + uint64 freqMax = 0; + FOR_ALL_BB(bb, aarFunc) { + if (bb != nullptr && bb->GetFrequency() > freqMax) { + freqMax = bb->GetFrequency(); + } + } + + return freqMax / alignThreshold; +} + +uint64 AArch64AlignAnalysis::GetFallThruFreq(const BB &bb) const { + uint64 fallthruFreq = 0; + for (BB *pred : bb.GetPreds()) { + if (pred == bb.GetPrev()) { + fallthruFreq += pred->GetEdgeFreq(bb); + break; + } + } + return fallthruFreq; +} + +uint64 AArch64AlignAnalysis::GetBranchFreq(const BB &bb) const { + uint64 branchFreq = 0; + for (BB *pred : bb.GetPreds()) { + if (pred != bb.GetPrev()) { + branchFreq += pred->GetEdgeFreq(bb); + } + } + return branchFreq; +} + bool AArch64AlignAnalysis::MarkCondBranchAlign() { sameTargetBranches.clear(); uint32 addr = 0; bool change = false; FOR_ALL_BB(bb, aarFunc) { if (bb != nullptr && bb->IsBBNeedAlign()) { - uint32 alignedVal = (1U << bb->GetAlignPower()); - uint32 alignNopNum = GetAlignRange(alignedVal, addr); - addr += alignNopNum; - bb->SetAlignNopNum(alignNopNum); + addr += ComputeBBAlignNopNum(*bb, addr); } FOR_BB_INSNS(insn, bb) { if (!insn->IsMachineInstruction()) { @@ -165,7 +206,7 @@ bool AArch64AlignAnalysis::MarkCondBranchAlign() { } addr += insn->GetAtomicNum(); MOperator mOp = insn->GetMachineOpcode(); - if ((mOp == MOP_wtbz || mOp == MOP_wtbnz || mOp == MOP_xtbz || mOp == MOP_xtbnz) && insn->IsNeedSplit()) { + if ((mOp == MOP_wtbz || mOp == MOP_wtbnz || mOp == MOP_xtbz || mOp == MOP_xtbnz) && IsSplitInsn(*insn)) { ++addr; } if (!insn->IsCondBranch() || insn->GetOperandSize() == 0) { @@ -214,9 +255,11 @@ void AArch64AlignAnalysis::UpdateInsnId() { uint32 id = 0; FOR_ALL_BB(bb, aarFunc) { if (bb != nullptr && bb->IsBBNeedAlign()) { - uint32 alignedVal = 1U << (bb->GetAlignPower()); - uint32 range = GetAlignRange(alignedVal, id); - id = id + (range > kAlignPseudoSize ? range : kAlignPseudoSize); + if (!(CGOptions::DoLoopAlign() && loopHeaderBBs.find(bb) != loopHeaderBBs.end())) { + uint32 alignedVal = 1U << (bb->GetAlignPower()); + uint32 range = GetAlignRange(alignedVal, id); + id = id + (range > kAlignPseudoSize ? range : kAlignPseudoSize); + } } FOR_BB_INSNS(insn, bb) { if (!insn->IsMachineInstruction()) { @@ -227,7 +270,7 @@ void AArch64AlignAnalysis::UpdateInsnId() { id += insn->GetNopNum(); } MOperator mOp = insn->GetMachineOpcode(); - if ((mOp == MOP_wtbz || mOp == MOP_wtbnz || mOp == MOP_xtbz || mOp == MOP_xtbnz) && insn->IsNeedSplit()) { + if ((mOp == MOP_wtbz || mOp == MOP_wtbnz || mOp == MOP_xtbz || mOp == MOP_xtbnz) && IsSplitInsn(*insn)) { ++id; } insn->SetId(id); @@ -253,7 +296,7 @@ bool AArch64AlignAnalysis::MarkShortBranchSplit() { if (mOp != MOP_wtbz && mOp != MOP_wtbnz && mOp != MOP_xtbz && mOp != MOP_xtbnz) { continue; } - if (insn->IsNeedSplit()) { + if (IsSplitInsn(*insn)) { continue; } auto &labelOpnd = static_cast(insn->GetOperand(kInsnThirdOpnd)); @@ -262,7 +305,7 @@ bool AArch64AlignAnalysis::MarkShortBranchSplit() { } split = true; change = true; - insn->SetNeedSplit(split); + MarkSplitInsn(*insn); } } } while (split); @@ -362,4 +405,216 @@ void AArch64AlignAnalysis::ComputeCondBranchAlign() { } AddNopAfterMark(); } + +uint32 AArch64AlignAnalysis::GetInlineAsmInsnNum(const Insn &insn) const { + uint32 num = 0; + MapleString asmStr = static_cast(insn.GetOperand(kAsmStringOpnd)).GetComment(); + // If there are multiple insns, add \n\t after each insn to separate them in general. + for (size_t i = 0; (i = asmStr.find('\n', i)) != std::string::npos; i++) { + num++; + } + + size_t index = asmStr.length(); + index = index > 0 ? --index : 0; + while (index > 0) { + if ((asmStr[index] >= 'A' && asmStr[index] <= 'Z') || (asmStr[index] >= 'a' && asmStr[index] <= 'z')) { + break; + } + index--; + if (index == 0) { + break; + } + } + // The last instruction in inline asm does not use a newline character. + if (index > 0 && asmStr.find('\n', index) == std::string::npos) { + num++; + } + + return num; +} + +void AArch64AlignAnalysis::ComputeInsnAddr() { + uint32 addr = 0; + FOR_ALL_BB(bb, aarFunc) { + if (bb != nullptr && bb->IsBBNeedAlign()) { + addr += ComputeBBAlignNopNum(*bb, addr); + } + + FOR_BB_INSNS(insn, bb) { + if (insn == nullptr || !insn->IsMachineInstruction()) { + continue; + } + + MOperator mOp = insn->GetMachineOpcode(); + if (mOp == MOP_asm) { + addr += GetInlineAsmInsnNum(*insn); + } else { + addr += insn->GetAtomicNum(); + } + if ((mOp == MOP_wtbz || mOp == MOP_wtbnz || mOp == MOP_xtbz || mOp == MOP_xtbnz) && IsSplitInsn(*insn)) { + ++addr; + } + insn->SetAddress(addr); + } + } +} + +bool AArch64AlignAnalysis::MarkForLoop() { + if (loopHeaderBBs.empty()) { + return false; + } + + ComputeInsnAddr(); + bool changed = false; + for (BB *header: loopHeaderBBs) { + if (!header->IsBBNeedAlign()) { + continue; + } + Insn *insn = header->GetFirstInsn(); + while (insn != nullptr && !insn->IsMachineInstruction()) { + insn = insn->GetNext(); + } + + uint32 nopNum = header->GetAlignNopNum(); + // Set the nop(s) on the first machine instruction of loop header bb to check whether + // the number of nop of bb changes after ComputeInsnAddr. + if (insn != nullptr && insn->IsMachineInstruction() && nopNum != 0) { + if (nopNum != insn->GetNopNum()) { + changed = true; + insn->SetNopNum(nopNum); + } + } + } + return changed; +} + +Insn* AArch64AlignAnalysis::FindTargetIsland(BB &bb) const { + BB *targetBB = &bb; + Insn *targetInsn = targetBB->GetLastInsn(); + while (targetInsn != nullptr || (targetBB != aarFunc->GetFirstBB() && targetBB != nullptr)) { + while (targetInsn == nullptr && targetBB->GetPrev() != nullptr) { + targetBB = targetBB->GetPrev(); + targetInsn = targetBB->GetLastInsn(); + } + if (targetInsn == nullptr && targetBB->GetPrev() == nullptr) { + break; + } + // Don't insert nop across aligned bb in avoid to mutual influence. + if (targetBB->IsBBNeedAlign() || targetInsn->GetNopNum() != 0) { + break; + } + if (targetInsn->GetMachineOpcode() == MOP_xuncond || targetInsn->GetMachineOpcode() == MOP_xret || + targetInsn->GetMachineOpcode() == MOP_xbr) { + return targetInsn; + } + targetInsn = targetInsn->GetPrev(); + } + return nullptr; +} + +void AArch64AlignAnalysis::AddNopForLoopAfterMark() { + FOR_ALL_BB(bb, aarFunc) { + // just add nop for loop header bb + if (loopHeaderBBs.find(bb) == loopHeaderBBs.end()) { + continue; + } + + if (!bb->IsBBNeedAlign()) { + continue; + } + + if (bb->GetAlignNopNum() == 0) { + bb->SetNeedAlign(false); + bb->SetAlignPower(0); + continue; + } + + BB *targetBB = bb->GetPrev(); + uint32 nopNum = bb->GetAlignNopNum(); + Insn *targetInsn = FindTargetIsland(*targetBB); + if (targetInsn != nullptr) { + for (uint32 i = 0; i < nopNum; i++) { + (void)bb->InsertInsnAfter(*targetInsn, aarFunc->GetInsnBuilder()->BuildInsn(MOP_nop)); + } + } else { + BB *prevBB = bb->GetPrev(); + while (prevBB != nullptr && prevBB->GetLastInsn() == nullptr) { + prevBB = prevBB->GetPrev(); + } + if (prevBB == nullptr) { + for (uint32 i = 0; i < nopNum; i++) { + (void)bb->InsertInsnBefore(*bb->GetFirstInsn(), aarFunc->GetInsnBuilder()->BuildInsn(MOP_nop)); + } + } else { + for (uint32 i = 0; i < nopNum; i++) { + (void)bb->InsertInsnAfter(*prevBB->GetLastInsn(), + aarFunc->GetInsnBuilder()->BuildInsn(MOP_nop)); + } + } + } + bb->SetNeedAlign(false); + bb->SetAlignPower(0); + bb->SetAlignNopNum(0); + } +} + +void AArch64AlignAnalysis::AddNopForLoop() { + bool loopChange = false; + bool shortBrChange = false; + for (;;) { + loopChange = MarkForLoop(); + if (!loopChange) { + break; + } + shortBrChange = MarkShortBranchSplit(); + if (!shortBrChange) { + break; + } + } + AddNopForLoopAfterMark(); +} + +void AArch64AlignAnalysis::FindJumpTargetByFrequency() { + MapleUnorderedMap label2BBMap = aarFunc->GetLab2BBMap(); + if (label2BBMap.empty()) { + return; + } + + for (auto &iter : label2BBMap) { + BB *jumpBB = iter.second; + if (jumpBB == nullptr) { + continue; + } + // Select bb for alignment: + // 1. The bb is frequently invoked. + // 2. The predecessor of bb is not frequently invoked or almost never executed. + // 3. The jump edge is frequently invoked. + // The following values 2 and 10 are gcc empirical values. + if (!HasFallthruEdge(*jumpBB) && (GetBranchFreq(*jumpBB) >= GetFreqThreshold() || (jumpBB->GetPrev() != nullptr && + jumpBB->GetFrequency() > jumpBB->GetPrev()->GetFrequency() * 10)) && + jumpBB->GetPrev()->GetFrequency() <= (aarFunc->GetFirstBB()->GetFrequency() / 2)) { + InsertJumpTargetBBs(*jumpBB); + } + } +} + +void AArch64AlignAnalysis::FindLoopHeaderByFrequency() { + if (loopInfo.GetLoops().empty()) { + return; + } + + uint32 loopIterations = CGOptions::GetAlignLoopIterations(); + + for (auto *loop : loopInfo.GetLoops()) { + BB header = loop->GetHeader(); + uint64 branchFreq = GetBranchFreq(header); + uint64 fallthruFreq = GetFallThruFreq(header); + // Select bb for alignment: The bb is frequently invoked. + if (HasFallthruEdge(header) && (branchFreq + fallthruFreq > GetFreqThreshold()) && + (branchFreq > fallthruFreq * loopIterations) && + !(header.GetSuccsSize() == 1 && *header.GetSuccsBegin() == aarFunc->GetLastBB())) { + InsertLoopHeaderBBs(header); + } + } +} } /* namespace maplebe */ diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_args.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_args.cpp index e7ca920388..32a91142d3 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_args.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_args.cpp @@ -52,7 +52,7 @@ void AArch64MoveRegArgs::MoveRegisterArgs() { [this, baseOpnd, &offset, sym, symLoc](AArch64reg reg, PrimType primType) { RegOperand ®Opnd = aarFunc->GetOrCreatePhysicalRegisterOperand(reg, GetPrimTypeBitSize(primType), aarFunc->GetRegTyFromPrimTy(primType)); - OfstOperand &ofstOpnd = aarFunc->CreateOfstOpnd(static_cast(offset), k32BitSize); + OfstOperand &ofstOpnd = aarFunc->CreateOfstOpnd(static_cast(static_cast(offset)), k32BitSize); AArch64MemLayout *memLayout = static_cast(aarFunc->GetMemlayout()); if (memLayout->IsSegMentVaried(symLoc->GetMemSegment())) { ofstOpnd.SetVary(kUnAdjustVary); diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_call_conv.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_call_conv.cpp index e1f9adbef3..621ed73a41 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_call_conv.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_call_conv.cpp @@ -20,7 +20,7 @@ namespace maplebe { using namespace maple; // external interface to look for pure float struct -uint32 AArch64CallConvImpl::FloatParamRegRequired(MIRStructType &structType, uint32 &fpSize) const { +uint32 AArch64CallConvImpl::FloatParamRegRequired(const MIRStructType &structType, uint32 &fpSize) { PrimType baseType = PTY_begin; size_t elemNum = 0; if (!IsHomogeneousAggregates(structType, baseType, elemNum)) { @@ -47,7 +47,7 @@ static void AllocateHomogeneousAggregatesRegister(CCLocInfo &ploc, const AArch64 ploc.primTypeOfReg2 = baseType; } if (allocNum >= kFourRegister) { - ploc.reg3 = regList[begin++]; + ploc.reg3 = regList[begin]; ploc.primTypeOfReg3 = baseType; } ploc.regCount = static_cast(allocNum); @@ -101,10 +101,10 @@ void AArch64CallConvImpl::LocateRetVal(const MIRType &retType, CCLocInfo &ploc) if (retSize <= k16ByteSize) { // agg size <= 16-byte or int128, return in x0-x1 ploc.reg0 = AArch64Abi::kIntReturnRegs[0]; - ploc.primTypeOfReg0 = PTY_u64; + ploc.primTypeOfReg0 = (retSize <= k4ByteSize && !CGOptions::IsBigEndian()) ? PTY_u32 : PTY_u64; if (retSize > k8ByteSize) { ploc.reg1 = AArch64Abi::kIntReturnRegs[1]; - ploc.primTypeOfReg1 = PTY_u64; + ploc.primTypeOfReg1 = (retSize <= k12ByteSize && !CGOptions::IsBigEndian()) ? PTY_u32 : PTY_u64; } ploc.regCount = retSize <= k8ByteSize ? kOneRegister : kTwoRegister; return; @@ -135,6 +135,18 @@ uint64 AArch64CallConvImpl::AllocateRegisterForAgg(const MIRType &mirType, CCLoc } } else if (size <= k16ByteSize) { // small struct, passed by general purpose register + // B.6 If the argument is an alignment adjusted type its value is passed as a copy of the actual + // value. The copy will have an alignment defined as follows: + // (1) For a Fundamental Data Type, the alignment is the natural alignment of that type, + // after any promotions. + // (2) For a Composite Type, the alignment of the copy will have 8-byte alignment if its + // natural alignment is <= 8 and 16-byte alignment if its natural alignment is >= 16. + // The alignment of the copy is used for applying marshaling rules. + if (mirType.GetUnadjustedAlign() <= k8ByteSize) { + align = k8ByteSize; + } else { + align = k16ByteSize; + } AllocateGPRegister(mirType, ploc, size, align); } else { // large struct, a pointer to the copy is used @@ -236,7 +248,7 @@ static void SetupCCLocInfoRegCount(CCLocInfo &ploc) { // LocateNextParm is then checked against a function parameter list. All other calls // of LocateNextParm are against caller's argument list must not have isFirst set, // or it will be checking the caller's enclosing function. -uint64 AArch64CallConvImpl::LocateNextParm(MIRType &mirType, CCLocInfo &ploc, bool isFirst, MIRFuncType *tFunc) { +uint64 AArch64CallConvImpl::LocateNextParm(const MIRType &mirType, CCLocInfo &ploc, bool isFirst, MIRFuncType *tFunc) { InitCCLocInfo(ploc); uint64 typeSize = mirType.GetSize(); diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_cfi_generator.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_cfi_generator.cpp index fb991e4d09..680cbe3fc8 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_cfi_generator.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_cfi_generator.cpp @@ -16,34 +16,32 @@ #include "aarch64_memlayout.h" #include "aarch64_cgfunc.h" namespace maplebe { -void AArch64GenCfi::GenerateRegisterSaveDirective(BB &bb) { +void AArch64GenCfi::GenerateRegisterSaveDirective(BB &bb, Insn &stackDefInsn) { auto stackFrameSize = static_cast( static_cast(cgFunc.GetMemlayout())->RealStackFrameSize()); auto argsToStkPassSize = static_cast(cgFunc.GetMemlayout()->SizeOfArgsToStackPass()); int32 cfiOffset = stackFrameSize; - Insn &stackDefNextInsn = FindStackDefNextInsn(bb); - InsertCFIDefCfaOffset(bb, stackDefNextInsn, cfiOffset); + auto *curInsn = InsertCFIDefCfaOffset(bb, stackDefInsn, cfiOffset); cfiOffset = static_cast(GetOffsetFromCFA() - argsToStkPassSize); auto &aarchCGFunc = static_cast(cgFunc); if (useFP) { - (void)bb.InsertInsnBefore(stackDefNextInsn, aarchCGFunc.CreateCfiOffsetInsn(stackBaseReg, -cfiOffset, k64BitSize)); + curInsn = bb.InsertInsnAfter(*curInsn, aarchCGFunc.CreateCfiOffsetInsn(stackBaseReg, -cfiOffset, k64BitSize)); } int32 RLROffset = static_cast(cgFunc).GetStoreFP() ? kOffset8MemPos : 0; - (void)bb.InsertInsnBefore(stackDefNextInsn, - aarchCGFunc.CreateCfiOffsetInsn(RLR, static_cast(-cfiOffset + RLROffset), - k64BitSize)); + curInsn = bb.InsertInsnAfter(*curInsn, aarchCGFunc.CreateCfiOffsetInsn(RLR, static_cast(-cfiOffset + RLROffset), + k64BitSize)); /* change CFA register and offset */ if (useFP) { bool isLmbc = cgFunc.GetMirModule().GetFlavor() == MIRFlavor::kFlavorLmbc; if ((argsToStkPassSize > 0) || isLmbc) { - (void)bb.InsertInsnBefore(stackDefNextInsn, aarchCGFunc.CreateCfiDefCfaInsn(stackBaseReg, + curInsn = bb.InsertInsnAfter(*curInsn, aarchCGFunc.CreateCfiDefCfaInsn(stackBaseReg, static_cast(cgFunc.GetMemlayout())->RealStackFrameSize() - static_cast(argsToStkPassSize), k64BitSize)); } else { - (void)bb.InsertInsnBefore( - stackDefNextInsn, cgFunc.GetInsnBuilder()->BuildCfiInsn(cfi::OP_CFI_def_cfa_register).AddOpndChain( + curInsn = bb.InsertInsnAfter(*curInsn, + cgFunc.GetInsnBuilder()->BuildCfiInsn(cfi::OP_CFI_def_cfa_register).AddOpndChain( cgFunc.CreateCfiRegOperand(stackBaseReg, k64BitSize))); } } @@ -71,19 +69,18 @@ void AArch64GenCfi::GenerateRegisterSaveDirective(BB &bb) { AArch64reg reg = *it; stackFrameSize -= static_cast(cgFunc.GetMemlayout()->SizeOfArgsToStackPass()); cfiOffset = stackFrameSize - offset; - (void)bb.InsertInsnBefore(stackDefNextInsn, aarchCGFunc.CreateCfiOffsetInsn(reg, -cfiOffset, k64BitSize)); + curInsn = bb.InsertInsnAfter(*curInsn, aarchCGFunc.CreateCfiOffsetInsn(reg, -cfiOffset, k64BitSize)); /* On AArch64, kIntregBytelen == 8 */ offset += static_cast(kIntregBytelen); } } -void AArch64GenCfi::GenerateRegisterRestoreDirective(BB &bb) { +void AArch64GenCfi::GenerateRegisterRestoreDirective(BB &bb, Insn &stackRevertInsn) { auto &aarchCGFunc = static_cast(cgFunc); auto ®sToSave = (aarchCGFunc.GetProEpilogSavedRegs().empty()) ? aarchCGFunc.GetCalleeSavedRegs() : aarchCGFunc.GetProEpilogSavedRegs(); + auto *curInsn = &stackRevertInsn; - Insn *returnInsn = bb.GetLastMachineInsn(); - CHECK_NULL_FATAL(returnInsn); if (!regsToSave.empty()) { auto it = regsToSave.begin(); // skip the RFP @@ -96,16 +93,16 @@ void AArch64GenCfi::GenerateRegisterRestoreDirective(BB &bb) { if (!CGOptions::IsNoCalleeCFI()) { for (; it != regsToSave.end(); ++it) { AArch64reg reg = *it; - (void)bb.InsertInsnBefore(*returnInsn, aarchCGFunc.CreateCfiRestoreInsn(reg, k64BitSize)); + curInsn = bb.InsertInsnAfter(*curInsn, aarchCGFunc.CreateCfiRestoreInsn(reg, k64BitSize)); } } if (useFP) { - (void)bb.InsertInsnBefore(*returnInsn, aarchCGFunc.CreateCfiRestoreInsn(stackBaseReg, k64BitSize)); + curInsn = bb.InsertInsnAfter(*curInsn, aarchCGFunc.CreateCfiRestoreInsn(stackBaseReg, k64BitSize)); } - (void)bb.InsertInsnBefore(*returnInsn, aarchCGFunc.CreateCfiRestoreInsn(RLR, k64BitSize)); + curInsn = bb.InsertInsnAfter(*curInsn, aarchCGFunc.CreateCfiRestoreInsn(RLR, k64BitSize)); } /* in aarch64 R31 is sp */ - (void)bb.InsertInsnBefore(*returnInsn, aarchCGFunc.CreateCfiDefCfaInsn(R31, 0, k64BitSize)); + curInsn = bb.InsertInsnAfter(*curInsn, aarchCGFunc.CreateCfiDefCfaInsn(R31, 0, k64BitSize)); } } /* maplebe */ diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_cg.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_cg.cpp index b7dd5a37d3..2f5e832f27 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_cg.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_cg.cpp @@ -15,6 +15,7 @@ #include "aarch64_cg.h" #include "aarch64_mop_split.h" #include "aarch64_mop_valid.h" +#include "aarch64_mop_register_limit.h" #include "mir_builder.h" #include "becommon.h" #include "label_creation.h" diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp index 7cdde390a7..cf135adbff 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp @@ -145,7 +145,7 @@ MOperator PickLdStInsn(bool isLoad, uint32 bitSize, PrimType primType, AArch64is } /* __builtin_ffs(x) returns: 0 -> 0, 1 -> 1, 2 -> 2, 4 -> 3, 8 -> 4 */ - if ((IsPrimitiveInteger(primType) || primType == PTY_agg) && !IsPrimitiveVector(primType)) { + if ((IsPrimitiveInteger(primType) || primType == PTY_agg) && !IsPrimitiveVector(primType) && !IsInt128Ty(primType)) { MOperator(*table)[kIntByteSizeDimension]; if (isLoad) { table = (memOrd == AArch64isa::kMoAcquire) ? ldIsAcq : ldIs; @@ -280,7 +280,8 @@ MOperator AArch64CGFunc::PickMovBetweenRegs(PrimType destType, PrimType srcType) return GetPrimTypeSize(srcType) == k8ByteSize ? MOP_vmovuu : MOP_vmovvv; } if (IsPrimitiveInteger(destType) && IsPrimitiveInteger(srcType)) { - return GetPrimTypeSize(srcType) <= k4ByteSize ? MOP_wmovrr : MOP_xmovrr; + auto size = GetPrimTypeSize(srcType); + return size <= k4ByteSize ? MOP_wmovrr : (size < k16ByteSize ? MOP_xmovrr : MOP_vmovvv); } if (IsPrimitiveFloat(destType) && IsPrimitiveFloat(srcType)) { auto primTypeSize = GetPrimTypeSize(srcType); @@ -1746,16 +1747,17 @@ void AArch64CGFunc::SelectAggDassign(const DassignNode &stmt) { uint32 lhsOffset = 0; MIRType *lhsType = lhsSymbol->GetType(); bool bothUnion = false; + uint32 lhsAlign = lhsType->GetAlign(); if (stmt.GetFieldID() != 0) { MIRStructType *structType = static_cast(lhsSymbol->GetType()); ASSERT(structType != nullptr, "SelectAggDassign: non-zero fieldID for non-structure"); lhsType = structType->GetFieldType(stmt.GetFieldID()); + lhsAlign = structType->GetFieldTypeAlign(stmt.GetFieldID()); lhsOffset = structType->GetKind() == kTypeClass ? static_cast(GetBecommon().GetJClassFieldOffset(*structType, stmt.GetFieldID()).byteOffset) : static_cast(structType->GetFieldOffsetFromBaseAddr(stmt.GetFieldID()).byteOffset); bothUnion = bothUnion || (structType->GetKind() == kTypeUnion); } - uint32 lhsAlign = lhsType->GetAlign(); uint64 lhsSize = lhsType->GetSize(); uint32 rhsAlign; @@ -2040,49 +2042,7 @@ void AArch64CGFunc::SelectAggDassign(const DassignNode &stmt) { lhsSizeCovered += newAlignUsed; } } else { - ASSERT(stmt.GetRHS()->op == OP_regread, "SelectAggDassign: NYI"); - bool isRet = false; - if (lhsType->GetKind() == kTypeStruct || lhsType->GetKind() == kTypeUnion) { - RegreadNode *rhsregread = static_cast(stmt.GetRHS()); - PregIdx pregIdx = rhsregread->GetRegIdx(); - if (IsSpecialPseudoRegister(pregIdx)) { - if ((-pregIdx) == kSregRetval0) { - AArch64CallConvImpl parmlocator(GetBecommon()); - CCLocInfo pLoc; - PrimType retPtype; - RegType regType; - uint32 memSize; - uint32 regSize; - parmlocator.LocateRetVal(*lhsType, pLoc); - AArch64reg r[kFourRegister]; - r[0] = static_cast(pLoc.reg0); - r[1] = static_cast(pLoc.reg1); - r[2] = static_cast(pLoc.reg2); - r[3] = static_cast(pLoc.reg3); - if (pLoc.numFpPureRegs > 0) { - regSize = (pLoc.fpSize == k4ByteSize) ? k32BitSize : k64BitSize; - memSize = pLoc.fpSize; - retPtype = (pLoc.fpSize == k4ByteSize) ? PTY_f32 : PTY_f64; - regType = kRegTyFloat; - } else { - regSize = k64BitSize; - memSize = k8BitSize; - retPtype = PTY_u64; - regType = kRegTyInt; - } - for (uint32 i = 0; i < kFourRegister; ++i) { - if (r[i] == kRinvalid) { - break; - } - RegOperand &parm = GetOrCreatePhysicalRegisterOperand(r[i], regSize, regType); - Operand &mOpnd = GetOrCreateMemOpnd(*lhsSymbol, memSize * i, regSize); - GetCurBB()->AppendInsn(GetInsnBuilder()->BuildInsn(PickStInsn(regSize, retPtype), parm, mOpnd)); - } - isRet = true; - } - } - } - CHECK_FATAL(isRet, "SelectAggDassign: NYI"); + CHECK_FATAL(false, "SelectAggDassign: NYI"); } } @@ -2465,7 +2425,7 @@ uint32 AArch64CGFunc::LmbcTotalRegsUsed() { If blassign is not for argument, this function simply memcpy */ void AArch64CGFunc::SelectBlkassignoff(BlkassignoffNode &bNode, Operand &src) { CHECK_FATAL(src.GetKind() == Operand::kOpdRegister, "blkassign src type not in register"); - std::vector *parmList; + std::vector *parmList = nullptr; if (GetLmbcArgInfo() == nullptr) { LmbcArgInfo *p = memPool->New(*GetFuncScopeAllocator()); SetLmbcArgInfo(p); @@ -2509,7 +2469,8 @@ void AArch64CGFunc::SelectBlkassignoff(BlkassignoffNode &bNode, Operand &src) { bool isPair; for (uint32 sz = static_cast(bNode.blockSize); sz > 0;) { isPair = false; - MOperator ldOp, stOp; + MOperator ldOp; + MOperator stOp; if (sz >= k16ByteSize) { sz -= k16ByteSize; inc = k16ByteSize; @@ -2564,10 +2525,12 @@ void AArch64CGFunc::SelectAggIassign(IassignNode &stmt, Operand &addrOpnd) { MIRType *stmtType = GlobalTables::GetTypeTable().GetTypeFromTyIdx(stmt.GetTyIdx()); MIRPtrType *lhsPointerType = static_cast(stmtType); MIRType *lhsType = GlobalTables::GetTypeTable().GetTypeFromTyIdx(lhsPointerType->GetPointedTyIdx()); + uint32 lhsAlign = lhsType->GetAlign(); if (stmt.GetFieldID() != 0) { MIRStructType *structType = static_cast(lhsType); ASSERT(structType != nullptr, "SelectAggIassign: non-zero fieldID for non-structure"); lhsType = structType->GetFieldType(stmt.GetFieldID()); + lhsAlign = structType->GetFieldTypeAlign(stmt.GetFieldID()); lhsOffset = structType->GetKind() == kTypeClass ? static_cast(GetBecommon().GetJClassFieldOffset(*structType, stmt.GetFieldID()).byteOffset) : static_cast(structType->GetFieldOffsetFromBaseAddr(stmt.GetFieldID()).byteOffset); @@ -2577,6 +2540,7 @@ void AArch64CGFunc::SelectAggIassign(IassignNode &stmt, Operand &addrOpnd) { /* access an array element */ MIRType *lhsType = GlobalTables::GetTypeTable().GetTypeFromTyIdx(arrayLhsType->GetElemTyIdx()); MIRTypeKind typeKind = lhsType->GetKind(); + lhsAlign = lhsType->GetAlign(); ASSERT(((typeKind == kTypeScalar) || (typeKind == kTypeStruct) || (typeKind == kTypeClass) || (typeKind == kTypePointer)), "unexpected array element type in iassign"); @@ -2592,7 +2556,6 @@ void AArch64CGFunc::SelectAggIassign(IassignNode &stmt, Operand &addrOpnd) { "unexpected array element type in iassign"); #endif } - uint32 lhsAlign = lhsType->GetAlign(); uint64 lhsSize = lhsType->GetSize(); uint32 rhsAlign; @@ -3016,6 +2979,13 @@ Operand *AArch64CGFunc::SelectDread(const BaseNode &parent, DreadNode &expr) { RegOperand *AArch64CGFunc::SelectRegread(RegreadNode &expr) { PregIdx pregIdx = expr.GetRegIdx(); + + if (IsInt128Ty(expr.GetPrimType())) { + Operand &low = GetOrCreatePhysicalRegisterOperand(R0, k64BitSize, GetRegTyFromPrimTy(PTY_u64)); + Operand &high = GetOrCreatePhysicalRegisterOperand(R1, k64BitSize, GetRegTyFromPrimTy(PTY_u64)); + return &CombineInt128({low, high}); + } + if (IsSpecialPseudoRegister(pregIdx)) { /* if it is one of special registers */ return &GetOrCreateSpecialRegisterOperand(-pregIdx, expr.GetPrimType()); @@ -3480,7 +3450,8 @@ Operand *AArch64CGFunc::SelectIread(const BaseNode &parent, IreadNode &expr, } MemOperand *memOpnd = - CreateMemOpndOrNull(destType, expr, *expr.Opnd(0), static_cast(offset) + extraOffset, memOrd); + CreateMemOpndOrNull(destType, expr, *expr.Opnd(0), + static_cast(static_cast(offset) + extraOffset), memOrd); if (aggParamReg != nullptr) { isAggParamInReg = false; return aggParamReg; @@ -3556,10 +3527,23 @@ Operand *AArch64CGFunc::SelectIread(const BaseNode &parent, IreadNode &expr, } Operand *AArch64CGFunc::SelectIntConst(MIRIntConst &intConst, const BaseNode &parent) { - PrimType primType = intConst.GetType().GetPrimType(); + auto primType = intConst.GetType().GetPrimType(); + if (IsInt128Ty(primType)) { + auto immTy = PTY_u64; + const uint64 *value = intConst.GetValue().GetRawData(); + Operand &lowImm = CreateImmOperand(immTy, static_cast(value[0])); + Operand &highImm = CreateImmOperand(immTy, static_cast(value[1])); + return &CombineInt128({lowImm, highImm}); + } + if (kOpcodeInfo.IsCompare(parent.GetOpCode())) { - primType = static_cast(parent).GetOpndType(); + PrimType compNodePrimTy = static_cast(parent).GetOpndType(); + // don't promote int128 types + if (!IsInt128Ty(compNodePrimTy)) { + primType = compNodePrimTy; + } } + return &CreateImmOperand(intConst.GetExtValue(), GetPrimTypeBitSize(primType), false); } @@ -3843,7 +3827,7 @@ void AArch64CGFunc::SelectIgoto(Operand *opnd0) { } void AArch64CGFunc::SelectCondGoto(LabelOperand &targetOpnd, Opcode jmpOp, Opcode cmpOp, Operand &origOpnd0, - Operand &origOpnd1, PrimType primType, bool signedCond) { + Operand &origOpnd1, PrimType primType, bool signedCond, int32 prob) { Operand *opnd0 = &origOpnd0; Operand *opnd1 = &origOpnd1; opnd0 = &LoadIntoRegister(origOpnd0, primType); @@ -3891,7 +3875,9 @@ void AArch64CGFunc::SelectCondGoto(LabelOperand &targetOpnd, Opcode jmpOp, Opcod bool isSigned = IsPrimitiveInteger(primType) ? IsSignedInteger(primType) : (signedCond ? true : false); MOperator jmpOperator = PickJmpInsn(jmpOp, cmpOp, isFloat, isSigned); - GetCurBB()->AppendInsn(GetInsnBuilder()->BuildInsn(jmpOperator, rflag, targetOpnd)); + Insn &jmpInsn = GetInsnBuilder()->BuildInsn(jmpOperator, rflag, targetOpnd); + jmpInsn.SetProb(prob); + GetCurBB()->AppendInsn(jmpInsn); } /* @@ -3997,8 +3983,13 @@ void AArch64CGFunc::SelectCondGoto(CondGotoNode &stmt, Operand &opnd0, Operand & cmpOp = OP_ne; pType = condNode->GetPrimType(); } + bool signedCond = IsSignedInteger(pType) || IsPrimitiveFloat(pType); - SelectCondGoto(targetOpnd, stmt.GetOpCode(), cmpOp, opnd0, opnd1, pType, signedCond); + if (!IsInt128Ty(pType)) { + SelectCondGoto(targetOpnd, stmt.GetOpCode(), cmpOp, opnd0, opnd1, pType, signedCond, stmt.GetBranchProb()); + } else { + SelectCondGotoInt128(targetOpnd, stmt.GetOpCode(), cmpOp, opnd0, opnd1, signedCond); + } } void AArch64CGFunc::SelectGoto(GotoNode &stmt) { @@ -4007,8 +3998,53 @@ void AArch64CGFunc::SelectGoto(GotoNode &stmt) { GetCurBB()->SetKind(BB::kBBGoto); } +void AArch64CGFunc::SelectAdds(Operand &resOpnd, Operand &opnd0, Operand &opnd1, PrimType primType) { + auto dsize = (GetPrimTypeBitSize(primType) == k64BitSize) ? k64BitSize : k32BitSize; + RegOperand ®Opnd0 = LoadIntoRegister(opnd0, true /* isIntTy */, dsize); + RegOperand ®Opnd1 = LoadIntoRegister(opnd1, true /* isIntTy */, dsize); + + MOperator mOp = (dsize == k64BitSize) ? MOP_xaddsrrr : MOP_waddsrrr; + Operand &rflag = GetOrCreateRflag(); + auto &insn = GetInsnBuilder()->BuildInsn(mOp, rflag, resOpnd, regOpnd0, regOpnd1); + GetCurBB()->AppendInsn(insn); +} + +void AArch64CGFunc::SelectSubs(Operand &resOpnd, Operand &opnd0, Operand &opnd1, PrimType primType) { + auto dsize = (GetPrimTypeBitSize(primType) == k64BitSize) ? k64BitSize : k32BitSize; + RegOperand ®Opnd0 = LoadIntoRegister(opnd0, true /* isIntTy */, dsize); + RegOperand ®Opnd1 = LoadIntoRegister(opnd1, true /* isIntTy */, dsize); + + MOperator mOp = (dsize == k64BitSize) ? MOP_xsubsrrr : MOP_wsubsrrr; + Operand &rflag = GetOrCreateRflag(); + auto &insn = GetInsnBuilder()->BuildInsn(mOp, rflag, resOpnd, regOpnd0, regOpnd1); + GetCurBB()->AppendInsn(insn); +} + +void AArch64CGFunc::SelectAdc(Operand &resOpnd, Operand &opnd0, Operand &opnd1, PrimType primType) { + SelectCarryOperator(true /* isAdc */, resOpnd, opnd0, opnd1, primType); +} + +void AArch64CGFunc::SelectSbc(Operand &resOpnd, Operand &opnd0, Operand &opnd1, PrimType primType) { + SelectCarryOperator(false /* isAdc */, resOpnd, opnd0, opnd1, primType); +} + +void AArch64CGFunc::SelectCarryOperator(bool isAdc, Operand &resOpnd, Operand &opnd0, Operand &opnd1, + PrimType primType) { + auto dsize = (GetPrimTypeBitSize(primType) == k64BitSize) ? k64BitSize : k32BitSize; + RegOperand ®Opnd0 = LoadIntoRegister(opnd0, true /* isIntTy */, dsize); + RegOperand ®Opnd1 = LoadIntoRegister(opnd1, true /* isIntTy */, dsize); + Operand &rflag = GetOrCreateRflag(); + + MOperator mOp = (dsize == k64BitSize) ? (isAdc ? MOP_xadcrrr : MOP_xsbcrrr) : (isAdc ? MOP_wadcrrr : MOP_wsbcrrr); + auto &insn = GetInsnBuilder()->BuildInsn(mOp, rflag, resOpnd, regOpnd0, regOpnd1); + GetCurBB()->AppendInsn(insn); +} + Operand *AArch64CGFunc::SelectAdd(BinaryNode &node, Operand &opnd0, Operand &opnd1, const BaseNode &parent) { PrimType dtype = node.GetPrimType(); + if (IsInt128Ty(dtype)) { + return SelectAddInt128(opnd0, node.Opnd(0)->GetPrimType(), opnd1, node.Opnd(1)->GetPrimType()); + } bool isSigned = IsSignedInteger(dtype); uint32 dsize = GetPrimTypeBitSize(dtype); bool is64Bits = (dsize == k64BitSize); @@ -4185,6 +4221,9 @@ void AArch64CGFunc::SelectSub(Operand &resOpnd, Operand &opnd0, Operand &opnd1, Operand *AArch64CGFunc::SelectSub(BinaryNode &node, Operand &opnd0, Operand &opnd1, const BaseNode &parent) { PrimType dtype = node.GetPrimType(); + if (IsInt128Ty(dtype)) { + return SelectSubInt128(opnd0, node.Opnd(0)->GetPrimType(), opnd1, node.Opnd(1)->GetPrimType()); + } bool isSigned = IsSignedInteger(dtype); uint32 dsize = GetPrimTypeBitSize(dtype); bool is64Bits = (dsize == k64BitSize); @@ -4207,6 +4246,10 @@ Operand *AArch64CGFunc::SelectSub(BinaryNode &node, Operand &opnd0, Operand &opn Operand *AArch64CGFunc::SelectMpy(BinaryNode &node, Operand &opnd0, Operand &opnd1, const BaseNode &parent) { PrimType dtype = node.GetPrimType(); + if (IsInt128Ty(dtype)) { + return SelectMpyInt128(opnd0, node.Opnd(0)->GetPrimType(), opnd1, node.Opnd(1)->GetPrimType()); + } + bool isSigned = IsSignedInteger(dtype); uint32 dsize = GetPrimTypeBitSize(dtype); bool is64Bits = (dsize == k64BitSize); @@ -4226,6 +4269,15 @@ Operand *AArch64CGFunc::SelectMpy(BinaryNode &node, Operand &opnd0, Operand &opn return resOpnd; } +void AArch64CGFunc::SelectMulh(bool isSigned, Operand &resOpnd, Operand &opnd0, Operand &opnd1) { + auto pTy = isSigned ? PTY_i64 : PTY_u64; // MULH supports only 64-bits registers + Operand ®Opnd0 = LoadIntoRegister(opnd0, pTy); + Operand ®Opnd1 = LoadIntoRegister(opnd1, pTy); + MOperator mOp = isSigned ? MOP_smulh : MOP_umulh; + auto &insn = GetInsnBuilder()->BuildInsn(mOp, resOpnd, regOpnd0, regOpnd1); + GetCurBB()->AppendInsn(insn); +} + void AArch64CGFunc::SelectMpy(Operand &resOpnd, Operand &opnd0, Operand &opnd1, PrimType primType) { Operand::OperandType opnd0Type = opnd0.GetKind(); Operand::OperandType opnd1Type = opnd1.GetKind(); @@ -4368,6 +4420,7 @@ void AArch64CGFunc::SelectDiv(Operand &resOpnd, Operand &origOpnd0, Operand &opn Operand *AArch64CGFunc::SelectDiv(BinaryNode &node, Operand &opnd0, Operand &opnd1, const BaseNode &parent) { PrimType dtype = node.GetPrimType(); + ASSERT(!IsInt128Ty(dtype), "int128 division must be lowered"); bool isSigned = IsSignedInteger(dtype); uint32 dsize = GetPrimTypeBitSize(dtype); bool is64Bits = (dsize == k64BitSize); @@ -4513,6 +4566,7 @@ void AArch64CGFunc::SelectRem(Operand &resOpnd, Operand &lhsOpnd, Operand &rhsOp Operand *AArch64CGFunc::SelectRem(BinaryNode &node, Operand &opnd0, Operand &opnd1, const BaseNode &parent) { PrimType dtype = node.GetPrimType(); + ASSERT(!IsInt128Ty(dtype), "int128 division must be lowered"); ASSERT(IsPrimitiveInteger(dtype), "wrong type for rem"); bool isSigned = IsSignedInteger(dtype); uint32 dsize = GetPrimTypeBitSize(dtype); @@ -4673,6 +4727,10 @@ Operand *AArch64CGFunc::SelectCmpOp(CompareNode &node, Operand &opnd0, Operand & if (IsPrimitiveVector(node.GetPrimType())) { resOpnd = SelectVectorCompare( &opnd0, node.Opnd(0)->GetPrimType(), &opnd1, node.Opnd(1)->GetPrimType(), node.GetOpCode()); + } else if (IsInt128Ty(node.GetPrimType()) || IsInt128Ty(node.GetOpndType())) { + resOpnd = &GetOrCreateResOperand(parent, node.GetPrimType()); + SelectInt128Compare(*resOpnd, opnd0, node.Opnd(0)->GetPrimType(), opnd1, node.Opnd(1)->GetPrimType(), + node.GetOpCode(), IsSignedInteger(node.GetOpndType())); } else { resOpnd = &GetOrCreateResOperand(parent, node.GetPrimType()); SelectCmpOp(*resOpnd, opnd0, opnd1, node.GetOpCode(), node.GetOpndType(), parent); @@ -4774,6 +4832,11 @@ void AArch64CGFunc::SelectBand(Operand &resOpnd, Operand &opnd0, Operand &opnd1, Operand *AArch64CGFunc::SelectRelationOperator(RelationOperator operatorCode, const BinaryNode &node, Operand &opnd0, Operand &opnd1, const BaseNode &parent) { PrimType dtype = node.GetPrimType(); + if (IsInt128Ty(dtype)) { + return SelectRelationOperatorInt128(operatorCode, opnd0, node.Opnd(0)->GetPrimType(), opnd1, + node.Opnd(1)->GetPrimType()); + } + bool isSigned = IsSignedInteger(dtype); uint32 dsize = GetPrimTypeBitSize(dtype); bool is64Bits = (dsize == k64BitSize); @@ -5026,6 +5089,9 @@ Operand *AArch64CGFunc::SelectShift(BinaryNode &node, Operand &opnd0, Operand &o resOpnd = SelectVectorShiftImm(dtype, opd0, &opnd1, static_cast(sConst), opcode); } else if ((IsPrimitiveVector(dtype)) && !opnd1.IsConstImmediate()) { resOpnd = SelectVectorShift(dtype, opd0, otyp0, &opnd1, node.Opnd(1)->GetPrimType(), opcode); + } else if (IsInt128Ty(dtype)) { + ShiftDirection direct = (opcode == OP_lshr) ? kShiftLright : ((opcode == OP_ashr) ? kShiftAright : kShiftLeft); + resOpnd = SelectShiftInt128(opnd0, opnd1, direct); } else { PrimType primType = isFloat ? dtype : (is64Bits ? (isSigned ? PTY_i64 : PTY_u64) : (isSigned ? PTY_i32 : PTY_u32)); resOpnd = &GetOrCreateResOperand(parent, primType); @@ -5054,14 +5120,45 @@ Operand *AArch64CGFunc::SelectRor(BinaryNode &node, Operand &opnd0, Operand &opn return resOpnd; } -void AArch64CGFunc::SelectBxorShift(Operand &resOpnd, Operand *opnd0, Operand *opnd1, Operand &opnd2, +void AArch64CGFunc::SelectBandShift(Operand &resOpnd, Operand &opnd0, Operand &opnd1, BitShiftOperand &shiftOp, PrimType primType) { - opnd0 = &LoadIntoRegister(*opnd0, primType); - opnd1 = &LoadIntoRegister(*opnd1, primType); + SelectRelationShiftOperator(kAND, resOpnd, opnd0, opnd1, shiftOp, primType); +} + +void AArch64CGFunc::SelectBiorShift(Operand &resOpnd, Operand &opnd0, Operand &opnd1, BitShiftOperand &shiftOp, + PrimType primType) { + SelectRelationShiftOperator(kIOR, resOpnd, opnd0, opnd1, shiftOp, primType); +} + +void AArch64CGFunc::SelectBxorShift(Operand &resOpnd, Operand &opnd0, Operand &opnd1, BitShiftOperand &shiftOp, + PrimType primType) { + SelectRelationShiftOperator(kEOR, resOpnd, opnd0, opnd1, shiftOp, primType); +} + +void AArch64CGFunc::SelectRelationShiftOperator(RelationOperator operatorCode, Operand &resOpnd, Operand &opnd0, + Operand &opnd1, BitShiftOperand &shiftOp, PrimType primType) { + RegOperand ®Opnd0 = LoadIntoRegister(opnd0, primType); + RegOperand ®Opnd1 = LoadIntoRegister(opnd1, primType); + uint32 dsize = GetPrimTypeBitSize(primType); bool is64Bits = (dsize == k64BitSize); - MOperator mopBxor = is64Bits ? MOP_xeorrrrs : MOP_weorrrrs; - GetCurBB()->AppendInsn(GetInsnBuilder()->BuildInsn(mopBxor, resOpnd, *opnd0, *opnd1, opnd2)); + + MOperator mOp = MOP_undef; + switch (operatorCode) { + case kAND: + mOp = is64Bits ? MOP_xandrrrs : MOP_wandrrrs; + break; + case kIOR: + mOp = is64Bits ? MOP_xiorrrrs : MOP_wiorrrrs; + break; + case kEOR: + mOp = is64Bits ? MOP_xeorrrrs : MOP_weorrrrs; + break; + default: + break; + } + + GetCurBB()->AppendInsn(GetInsnBuilder()->BuildInsn(mOp, resOpnd, regOpnd0, regOpnd1, shiftOp)); } void AArch64CGFunc::SelectShift(Operand &resOpnd, Operand &opnd0, Operand &opnd1, ShiftDirection direct, @@ -5116,6 +5213,15 @@ void AArch64CGFunc::SelectShift(Operand &resOpnd, Operand &opnd0, Operand &opnd1 GetCurBB()->AppendInsn(GetInsnBuilder()->BuildInsn(mopShift, resOpnd, *firstOpnd, opnd1)); } +void AArch64CGFunc::SelectTst(Operand &opnd0, Operand &opnd1, uint32 size) { + auto mOpCode = opnd1.IsImmediate() ? (size <= k32BitSize ? MOP_wtstri32 : MOP_xtstri64) + : (size <= k32BitSize ? MOP_wtstrr : MOP_xtstrr); + + Operand &rflag = GetOrCreateRflag(); + Insn &insn = GetInsnBuilder()->BuildInsn(mOpCode, rflag, opnd0, opnd1); + GetCurBB()->AppendInsn(insn); +} + Operand *AArch64CGFunc::SelectAbsSub(Insn &lastInsn, const UnaryNode &node, Operand &newOpnd0) { PrimType dtyp = node.GetPrimType(); bool is64Bits = (GetPrimTypeBitSize(dtyp) == k64BitSize); @@ -5185,22 +5291,26 @@ Operand *AArch64CGFunc::SelectBnot(UnaryNode &node, Operand &opnd0, const BaseNo bool is64Bits = (GetPrimTypeBitSize(dtype) == k64BitSize); bool isSigned = IsSignedInteger(dtype); RegOperand *resOpnd = nullptr; - if (!IsPrimitiveVector(dtype)) { + if (IsPrimitiveVector(dtype)) { + /* vector operand */ + resOpnd = SelectVectorNot(dtype, &opnd0); + } else if (IsInt128Ty(dtype)) { + resOpnd = SelectBnotInt128(opnd0); + } else { /* promoted type */ PrimType primType = is64Bits ? (isSigned ? PTY_i64 : PTY_u64) : (isSigned ? PTY_i32 : PTY_u32); resOpnd = &GetOrCreateResOperand(parent, primType); - - Operand &newOpnd0 = LoadIntoRegister(opnd0, primType); - - uint32 mopBnot = is64Bits ? MOP_xnotrr : MOP_wnotrr; - GetCurBB()->AppendInsn(GetInsnBuilder()->BuildInsn(mopBnot, *resOpnd, newOpnd0)); - } else { - /* vector operand */ - resOpnd = SelectVectorNot(dtype, &opnd0); + SelectBnot(*resOpnd, opnd0, primType); } return resOpnd; } +void AArch64CGFunc::SelectBnot(Operand &resOpnd, Operand &opnd, PrimType primType) { + Operand &opnd1 = LoadIntoRegister(opnd, primType); + uint32 mopBnot = (GetPrimTypeBitSize(primType) == k64BitSize) ? MOP_xnotrr : MOP_wnotrr; + GetCurBB()->AppendInsn(GetInsnBuilder()->BuildInsn(mopBnot, resOpnd, opnd1)); +} + Operand *AArch64CGFunc::SelectBswap(IntrinsicopNode &node, Operand &opnd0, const BaseNode &parent) { PrimType dtype = node.GetPrimType(); auto bitWidth = (GetPrimTypeBitSize(dtype)); @@ -5225,64 +5335,77 @@ Operand *AArch64CGFunc::SelectRegularBitFieldLoad(ExtractbitsNode &node, const B return result; } -Operand *AArch64CGFunc::SelectExtractbits(ExtractbitsNode &node, Operand &srcOpnd, const BaseNode &parent) { - uint8 bitOffset = node.GetBitsOffset(); - uint8 bitSize = node.GetBitsSize(); - RegOperand *srcVecRegOperand = static_cast(&srcOpnd); - if (srcVecRegOperand && srcVecRegOperand->IsRegister() && (srcVecRegOperand->GetSize() == k128BitSize)) { - if ((bitSize == k8BitSize || bitSize == k16BitSize || bitSize == k32BitSize || bitSize == k64BitSize) && - (bitOffset % bitSize) == k0BitSize) { - uint32 lane = bitOffset / bitSize; - PrimType srcVecPtype; - if (bitSize == k64BitSize) { - srcVecPtype = PTY_v2u64; - } else if (bitSize == k32BitSize) { - srcVecPtype = PTY_v4u32; - } else if (bitSize == k16BitSize) { - srcVecPtype = PTY_v8u16; - } else { - srcVecPtype = PTY_v16u8; - } - RegOperand *resRegOperand = SelectVectorGetElement(node.GetPrimType(), - &srcOpnd, srcVecPtype, static_cast(lane)); - return resRegOperand; - } else { - CHECK_FATAL(false, "NYI"); - } - } - PrimType dtype = node.GetPrimType(); - RegOperand &resOpnd = GetOrCreateResOperand(parent, dtype); - bool isSigned = (node.GetOpCode() == OP_sext) ? true : (node.GetOpCode() == OP_zext) ? false : IsSignedInteger(dtype); +void AArch64CGFunc::SelectExtractbits(Operand &resOpnd, uint8 offset, uint8 size, Operand &srcOpnd, PrimType dtype, + Opcode extOp) { + bool isSigned = (extOp == OP_sext) ? true : (extOp == OP_zext) ? false : IsSignedInteger(dtype); bool is64Bits = (GetPrimTypeBitSize(dtype) == k64BitSize); uint32 immWidth = is64Bits ? kMaxImmVal13Bits : kMaxImmVal12Bits; Operand &opnd0 = LoadIntoRegister(srcOpnd, dtype); - if (bitOffset == 0) { - if (!isSigned && (bitSize < immWidth)) { - SelectBand(resOpnd, opnd0, CreateImmOperand(static_cast((static_cast(1) << bitSize) - 1), - immWidth, false), dtype); - return &resOpnd; + if (offset == 0) { + if (!isSigned && (size < immWidth)) { + SelectBand(resOpnd, opnd0, + CreateImmOperand(static_cast((static_cast(1) << size) - 1), immWidth, false), dtype); + return; } else { MOperator mOp = MOP_undef; - if (bitSize == k8BitSize) { - mOp = is64Bits ? (isSigned ? MOP_xsxtb64 : MOP_undef) : - (isSigned ? MOP_xsxtb32 : (opnd0.GetSize() == k32BitSize ? MOP_xuxtb32 : MOP_undef)); - } else if (bitSize == k16BitSize) { - mOp = is64Bits ? (isSigned ? MOP_xsxth64 : MOP_undef) : - (isSigned ? MOP_xsxth32 : (opnd0.GetSize() == k32BitSize ? MOP_xuxth32 : MOP_undef)); - } else if (bitSize == k32BitSize) { + if (size == k8BitSize) { + mOp = is64Bits ? (isSigned ? MOP_xsxtb64 : MOP_undef) + : (isSigned ? MOP_xsxtb32 : (opnd0.GetSize() == k32BitSize ? MOP_xuxtb32 : MOP_undef)); + } else if (size == k16BitSize) { + mOp = is64Bits ? (isSigned ? MOP_xsxth64 : MOP_undef) + : (isSigned ? MOP_xsxth32 : (opnd0.GetSize() == k32BitSize ? MOP_xuxth32 : MOP_undef)); + } else if (size == k32BitSize) { mOp = is64Bits ? (isSigned ? MOP_xsxtw64 : MOP_xuxtw64) : MOP_wmovrr; } if (mOp != MOP_undef) { GetCurBB()->AppendInsn(GetInsnBuilder()->BuildInsn(mOp, resOpnd, opnd0)); - return &resOpnd; + return; } } } uint32 mopBfx = is64Bits ? (isSigned ? MOP_xsbfxrri6i6 : MOP_xubfxrri6i6) : (isSigned ? MOP_wsbfxrri5i5 : MOP_wubfxrri5i5); - ImmOperand &immOpnd1 = CreateImmOperand(bitOffset, k8BitSize, false); - ImmOperand &immOpnd2 = CreateImmOperand(bitSize, k8BitSize, false); + ImmOperand &immOpnd1 = CreateImmOperand(offset, k8BitSize, false); + ImmOperand &immOpnd2 = CreateImmOperand(size, k8BitSize, false); GetCurBB()->AppendInsn(GetInsnBuilder()->BuildInsn(mopBfx, resOpnd, opnd0, immOpnd1, immOpnd2)); +} + +Operand *AArch64CGFunc::SelectExtractbits(ExtractbitsNode &node, Operand &srcOpnd, const BaseNode &parent) { + uint8 bitOffset = node.GetBitsOffset(); + uint8 bitSize = node.GetBitsSize(); + + PrimType dtype = node.GetPrimType(); + if (IsInt128Ty(dtype)) { + return SelectExtractbitsInt128(bitOffset, bitSize, srcOpnd, node.GetOpCode()); + } + + RegOperand *srcVecRegOperand = static_cast(&srcOpnd); + if (srcVecRegOperand && srcVecRegOperand->IsRegister() && (srcVecRegOperand->GetSize() == k128BitSize)) { + if (srcVecRegOperand && srcVecRegOperand->IsRegister() && (srcVecRegOperand->GetSize() == k128BitSize)) { + if ((bitSize == k8BitSize || bitSize == k16BitSize || bitSize == k32BitSize || bitSize == k64BitSize) && + (bitOffset % bitSize) == k0BitSize) { + uint32 lane = bitOffset / bitSize; + PrimType srcVecPtype; + if (bitSize == k64BitSize) { + srcVecPtype = PTY_v2u64; + } else if (bitSize == k32BitSize) { + srcVecPtype = PTY_v4u32; + } else if (bitSize == k16BitSize) { + srcVecPtype = PTY_v8u16; + } else { + srcVecPtype = PTY_v16u8; + } + RegOperand *resRegOperand = + SelectVectorGetElement(node.GetPrimType(), &srcOpnd, srcVecPtype, static_cast(lane)); + return resRegOperand; + } else { + CHECK_FATAL(false, "NYI"); + } + } + } + + RegOperand &resOpnd = GetOrCreateResOperand(parent, dtype); + SelectExtractbits(resOpnd, bitOffset, bitSize, srcOpnd, dtype, node.GetOpCode()); return &resOpnd; } @@ -5306,37 +5429,45 @@ inline bool IsMoveWideKeepable(int64 offsetVal, uint32 bitOffset, uint32 bitSize } /* we use the fact that A ^ B ^ A == B, A ^ 0 = A */ -Operand *AArch64CGFunc::SelectDepositBits(DepositbitsNode &node, Operand &opnd0, Operand &opnd1, - const BaseNode &parent) { - uint32 bitOffset = node.GetBitsOffset(); - uint32 bitSize = node.GetBitsSize(); - PrimType regType = node.GetPrimType(); - bool is64Bits = GetPrimTypeBitSize(regType) == k64BitSize; - // deposit does not define opnd0 but bfi does, so we need an extra copy to keep opnd0 wont de defined - Operand *result = &GetOrCreateResOperand(parent, regType); - SelectCopy(*result, regType, opnd0, regType); +void AArch64CGFunc::SelectDepositBits(Operand &resOpnd, uint8 offset, uint8 size, Operand &opnd0, Operand &opnd1, + PrimType primType) { + bool is64Bits = GetPrimTypeBitSize(primType) == k64BitSize; + SelectCopy(resOpnd, primType, opnd0, primType); /* * if operand 1 is immediate and fits in MOVK, use it * MOVK Wd, #imm{, LSL #shift} ; 32-bit general registers * MOVK Xd, #imm{, LSL #shift} ; 64-bit general registers */ if (opnd1.IsIntImmediate() && - IsMoveWideKeepable(static_cast(opnd1).GetValue(), bitOffset, bitSize, is64Bits)) { - RegOperand &resOpnd = GetOrCreateResOperand(parent, regType); - SelectCopy(resOpnd, regType, *result, regType); - GetCurBB()->AppendInsn(GetInsnBuilder()->BuildInsn((is64Bits ? MOP_xmovkri16 : MOP_wmovkri16), resOpnd, opnd1, - *GetLogicalShiftLeftOperand(bitOffset, is64Bits))); - return &resOpnd; + IsMoveWideKeepable(static_cast(opnd1).GetValue(), offset, size, is64Bits)) { + MOperator mOp = is64Bits ? MOP_xmovkri16 : MOP_wmovkri16; + GetCurBB()->AppendInsn( + GetInsnBuilder()->BuildInsn(mOp, resOpnd, opnd1, *GetLogicalShiftLeftOperand(offset, is64Bits))); } else { - Operand &movOpnd = LoadIntoRegister(opnd1, regType); + Operand &movOpnd = LoadIntoRegister(opnd1, primType); uint32 mopBfi = is64Bits ? MOP_xbfirri6i6 : MOP_wbfirri5i5; - ImmOperand &immOpnd1 = CreateImmOperand(bitOffset, k8BitSize, false); - ImmOperand &immOpnd2 = CreateImmOperand(bitSize, k8BitSize, false); - GetCurBB()->AppendInsn(GetInsnBuilder()->BuildInsn(mopBfi, *result, movOpnd, immOpnd1, immOpnd2)); - return result; + ImmOperand &immOpnd1 = CreateImmOperand(offset, k8BitSize, false); + ImmOperand &immOpnd2 = CreateImmOperand(size, k8BitSize, false); + GetCurBB()->AppendInsn(GetInsnBuilder()->BuildInsn(mopBfi, resOpnd, movOpnd, immOpnd1, immOpnd2)); } } +Operand *AArch64CGFunc::SelectDepositBits(DepositbitsNode &node, Operand &opnd0, Operand &opnd1, + const BaseNode &parent) { + auto offset = node.GetBitsOffset(); + auto size = node.GetBitsSize(); + PrimType dtype = node.GetPrimType(); + + if (IsInt128Ty(dtype)) { + return SelectDepositBitsInt128(offset, size, opnd0, opnd1); + } + + Operand &resOpnd = GetOrCreateResOperand(parent, dtype); + SelectDepositBits(resOpnd, offset, size, opnd0, opnd1, dtype); + + return &resOpnd; +} + Operand *AArch64CGFunc::SelectLnot(UnaryNode &node, Operand &srcOpnd, const BaseNode &parent) { PrimType dtype = node.GetPrimType(); RegOperand &resOpnd = GetOrCreateResOperand(parent, dtype); @@ -5351,7 +5482,12 @@ Operand *AArch64CGFunc::SelectNeg(UnaryNode &node, Operand &opnd0, const BaseNod PrimType dtype = node.GetPrimType(); bool is64Bits = (GetPrimTypeBitSize(dtype) == k64BitSize); RegOperand *resOpnd = nullptr; - if (!IsPrimitiveVector(dtype)) { + if (IsInt128Ty(dtype)) { + resOpnd = SelectNegInt128(opnd0); + } else if (IsPrimitiveVector(dtype)) { + /* vector operand */ + resOpnd = SelectVectorNeg(dtype, &opnd0); + } else { PrimType primType; if (IsPrimitiveFloat(dtype)) { primType = dtype; @@ -5360,9 +5496,6 @@ Operand *AArch64CGFunc::SelectNeg(UnaryNode &node, Operand &opnd0, const BaseNod } resOpnd = &GetOrCreateResOperand(parent, primType); SelectNeg(*resOpnd, opnd0, primType); - } else { - /* vector operand */ - resOpnd = SelectVectorNeg(dtype, &opnd0); } return resOpnd; } @@ -5801,14 +5934,9 @@ void AArch64CGFunc::SelectCvtFloat2Float(Operand &resOpnd, Operand &srcOpnd, Pri */ void AArch64CGFunc::SelectCvtInt2Int(const BaseNode *parent, Operand *&resOpnd, Operand *opnd0, PrimType fromType, PrimType toType) { + ASSERT(!IsInt128Ty(fromType) && !IsInt128Ty(toType), "unexpected cvt"); uint32 fsize = GetPrimTypeBitSize(fromType); - if (fromType == PTY_i128 || fromType == PTY_u128) { - fsize = k64BitSize; - } uint32 tsize = GetPrimTypeBitSize(toType); - if (toType == PTY_i128 || toType == PTY_u128) { - tsize = k64BitSize; - } bool isExpand = tsize > fsize; bool is64Bit = (tsize == k64BitSize); if ((parent != nullptr) && opnd0->IsIntImmediate() && @@ -5955,8 +6083,11 @@ Operand *AArch64CGFunc::SelectCvt(const BaseNode &parent, TypeCvtNode &node, Ope if (fromType == toType) { return &opnd0; /* noop */ } + Operand *resOpnd = &GetOrCreateResOperand(parent, toType); - if (IsPrimitiveFloat(toType) && IsPrimitiveInteger(fromType)) { + if (IsInt128Ty(fromType) || IsInt128Ty(toType)) { + SelectInt128Cvt(resOpnd, opnd0, fromType, toType); + } else if (IsPrimitiveFloat(toType) && IsPrimitiveInteger(fromType)) { SelectCvtInt2Float(*resOpnd, opnd0, toType, fromType); } else if (IsPrimitiveFloat(fromType) && IsPrimitiveInteger(toType)) { SelectCvtFloat2Int(*resOpnd, opnd0, toType, fromType); @@ -5965,7 +6096,7 @@ Operand *AArch64CGFunc::SelectCvt(const BaseNode &parent, TypeCvtNode &node, Ope } else if (IsPrimitiveVector(toType) || IsPrimitiveVector(fromType)) { CHECK_FATAL(IsPrimitiveVector(toType) && IsPrimitiveVector(fromType), "Invalid vector cvt operands"); SelectVectorCvt(resOpnd, toType, &opnd0, fromType); - } else { /* both are float type */ + } else { /* both are float type */ SelectCvtFloat2Float(*resOpnd, opnd0, fromType, toType); } return resOpnd; @@ -5973,6 +6104,8 @@ Operand *AArch64CGFunc::SelectCvt(const BaseNode &parent, TypeCvtNode &node, Ope Operand *AArch64CGFunc::SelectTrunc(TypeCvtNode &node, Operand &opnd0, const BaseNode &parent) { PrimType ftype = node.FromType(); + ASSERT(!IsInt128Ty(node.GetPrimType()), "trunc must be lowered"); + bool is64Bits = (GetPrimTypeBitSize(node.GetPrimType()) == k64BitSize); PrimType itype = (is64Bits) ? (IsSignedInteger(node.GetPrimType()) ? PTY_i64 : PTY_u64) : (IsSignedInteger(node.GetPrimType()) ? PTY_i32 : PTY_u32); /* promoted type */ @@ -6957,6 +7090,7 @@ void AArch64CGFunc::GenerateYieldpoint(BB &bb) { } Operand &AArch64CGFunc::GetTargetRetOperand(PrimType primType, int32 sReg) { + ASSERT(!IsInt128Ty(primType), "NIY"); if (IsSpecialPseudoRegister(-sReg)) { return GetOrCreateSpecialRegisterOperand(sReg, primType); } @@ -7771,8 +7905,7 @@ void AArch64CGFunc::SelectParmListPreprocessForAggregate(BaseNode &argExpr, int3 // B.4 If the argument type is a Composite Type that is larger than 16 bytes, // then the argument is copied to memory allocated by the caller // and the argument is replaced by a pointer to the copy. - uint32 align = aggDesc.mirType->GetAlign() > k8ByteSize ? k16ByteSize : k8ByteSize; - structCopyOffset = static_cast(RoundUp(static_cast(structCopyOffset), align)); + structCopyOffset = static_cast(RoundUp(static_cast(structCopyOffset), k8ByteSize)); SelectParamPreCopy(argExpr, aggDesc, static_cast(mirSize), structCopyOffset, isArgUnused); @@ -7903,6 +8036,14 @@ void AArch64CGFunc::SelectParmListPassByStack(const MIRType &mirType, Operand &o return; } + if (IsInt128Ty(mirType.GetPrimType())) { + ASSERT(!preCopyed, "NIY"); + MemOperand &mem = CreateMemOpnd(RSP, memOffset, GetPrimTypeBitSize(PTY_u128)); + mem.SetStackArgMem(true); + SelectCopy(mem, PTY_u128, opnd, PTY_u128); + return; + } + PrimType primType = preCopyed ? PTY_a64 : mirType.GetPrimType(); CHECK_FATAL(primType != PTY_i128 && primType != PTY_u128, "NIY, i128 is unsupported"); auto &valReg = LoadIntoRegister(opnd, primType); @@ -7973,6 +8114,8 @@ void AArch64CGFunc::SelectParmList(StmtNode &naryNode, ListOperand &srcOpnds, bo if (ploc.reg0 != kRinvalid) { // load to the register. if (mirType->GetPrimType() == PTY_agg && !preCopyed) { SelectParmListSmallStruct(*mirType, ploc, *opnd, srcOpnds); + } else if (IsInt128Ty(mirType->GetPrimType())) { + SelectParmListForInt128(*opnd, srcOpnds, ploc); } else { CHECK_FATAL(ploc.reg1 == kRinvalid, "NIY"); auto &phyReg = GetOrCreatePhysicalRegisterOperand(static_cast(ploc.reg0), @@ -8563,7 +8706,16 @@ void AArch64CGFunc::SelectReturn(Operand *opnd0) { AArch64CallConvImpl retLocator(GetBecommon()); CCLocInfo retMech; retLocator.LocateRetVal(*retTyp, retMech); - if ((retMech.GetRegCount() > 0) && (opnd0 != nullptr)) { + if (IsInt128Ty(GetFunction().GetReturnType()->GetPrimType())) { + auto opnd = SplitInt128(*opnd0); + ASSERT(retMech.GetRegCount() == 2, ""); + AArch64reg retReg0 = static_cast(retMech.GetReg0()); + auto ®0 = GetOrCreatePhysicalRegisterOperand(retReg0, k64BitSize, kRegTyInt); + SelectCopy(reg0, retMech.GetPrimTypeOfReg0(), opnd.low, PTY_u64); + AArch64reg retReg1 = static_cast(retMech.GetReg1()); + auto ®1 = GetOrCreatePhysicalRegisterOperand(retReg1, k64BitSize, kRegTyInt); + SelectCopy(reg1, retMech.GetPrimTypeOfReg1(), opnd.high, PTY_u64); + } else if ((retMech.GetRegCount() > 0) && (opnd0 != nullptr)) { RegType regTyp = is64x1vec ? kRegTyFloat : GetRegTyFromPrimTy(retMech.GetPrimTypeOfReg0()); PrimType oriPrimType = is64x1vec ? GetFunction().GetReturnType()->GetPrimType() : retMech.GetPrimTypeOfReg0(); AArch64reg retReg = static_cast(retMech.GetReg0()); @@ -9097,7 +9249,8 @@ MemOperand *AArch64CGFunc::CheckAndCreateExtendMemOpnd(PrimType ptype, const Bas if (addendExpr->GetOpCode() != OP_mul || !IsPrimitiveInteger(ptype)) { return nullptr; } - BaseNode *indexExpr, *scaleExpr; + BaseNode *indexExpr; + BaseNode *scaleExpr; indexExpr = addendExpr->Opnd(0); scaleExpr = addendExpr->Opnd(1); if (scaleExpr->GetOpCode() != OP_constval) { @@ -9116,8 +9269,9 @@ MemOperand *AArch64CGFunc::CheckAndCreateExtendMemOpnd(PrimType ptype, const Bas return nullptr; } /* 8 is 1 << 3; 4 is 1 << 2; 2 is 1 << 1; 1 is 1 << 0 */ - uint32 shift = (unsignedScale == 8) ? 3 : ((unsignedScale == 4) ? 2 : ((unsignedScale == 2) ? 1 : 0)); - RegOperand &base = static_cast(LoadIntoRegister(*AArchHandleExpr(addrExpr, *baseExpr), PTY_a64)); + ASSERT(IsPowerOf2(unsignedScale), "must be power of two"); + uint32 shift = (unsignedScale == 0) ? 0 : static_cast(__builtin_ctz(unsignedScale)); + RegOperand &base = static_cast(LoadIntoRegister(*HandleExpr(addrExpr, *baseExpr), PTY_a64)); TypeCvtNode *typeCvtNode = static_cast(indexExpr); PrimType fromType = typeCvtNode->FromType(); PrimType toType = typeCvtNode->GetPrimType(); @@ -9768,61 +9922,46 @@ Insn &AArch64CGFunc::GenerateLocalLongCallAfterInsn(const MIRSymbol &func, ListO return *callInsn; } -/* - * Generate early bond pic call for "-fno-plt" - * for "-fPIC" - * adrp VRx, :got:symbol - * ldr VRx, [VRx, #:got_lo12:symbol] - * blr VRx - * - * for "-fpic" - * adrp VRx, _GLOBAL_OFFSET_TABLE_ - * ldr VRx, [VRx, #:gotpage_lo15:symbol] - * blr VRx - * - * Input: - * insn : insert new instruction after the 'insn' - * func : the symbol of the function need to be called - * srcOpnds : list operand of the function need to be called - * Return: the 'blr' instruction - */ +// Generate early bond pic call for "-fno-plt" +// for "-fPIC" +// adrp VRx, :got:symbol +// ldr VRx, [VRx, #:got_lo12:symbol] +// blr VRx +// for "-fpic" +// adrp VRx, _GLOBAL_OFFSET_TABLE_ +// ldr VRx, [VRx, #:gotpage_lo15:symbol] +// blr VRx +// Input: +// funcSym : the symbol of the function need to be called +// srcOpnds : list operand of the function need to be called +// Return: the 'blr' instruction Insn &AArch64CGFunc::GenerateGlobalNopltCallAfterInsn(const MIRSymbol &funcSym, ListOperand &srcOpnds) { - MIRFunction *func = funcSym.GetValue().mirFunc; - if (func && func->IsDefaultVisibility() && - ((CGOptions::IsPIE() && !func->GetBody()) || (CGOptions::IsShlib() && !func->IsStatic()))) { - StImmOperand &stOpnd = CreateStImmOperand(funcSym, 0, 0); - RegOperand *tmpReg = nullptr; - if (!IsAfterRegAlloc()) { - tmpReg = &CreateRegisterOperandOfType(PTY_u64); - } else { - // After RA, we use reserved X16 as tmpReg. - // Utill now it will not clobber other X16 def - tmpReg = &GetOrCreatePhysicalRegisterOperand(R16, maple::k64BitSize, kRegTyInt); - } - SelectAddrof(*tmpReg, stOpnd); - Insn &callInsn = GetInsnBuilder()->BuildInsn(MOP_xblr, *tmpReg, srcOpnds); - GetCurBB()->AppendInsn(callInsn); - GetCurBB()->SetHasCall(); - return callInsn; + StImmOperand &stOpnd = CreateStImmOperand(funcSym, 0, 0); + RegOperand *tmpReg = nullptr; + if (!IsAfterRegAlloc()) { + tmpReg = &CreateRegisterOperandOfType(PTY_u64); } else { - Operand &targetOpnd = GetOrCreateFuncNameOpnd(funcSym); - Insn &callInsn = GetInsnBuilder()->BuildInsn(MOP_xbl, targetOpnd, srcOpnds); - GetCurBB()->AppendInsn(callInsn); - GetCurBB()->SetHasCall(); - return callInsn; + // After RA, we use reserved X16 as tmpReg. + // Utill now it will not clobber other X16 def + tmpReg = &GetOrCreatePhysicalRegisterOperand(R16, maple::k64BitSize, kRegTyInt); } + SelectAddrof(*tmpReg, stOpnd); + Insn &callInsn = GetInsnBuilder()->BuildInsn(MOP_xblr, *tmpReg, srcOpnds); + GetCurBB()->AppendInsn(callInsn); + GetCurBB()->SetHasCall(); + return callInsn; } Insn &AArch64CGFunc::AppendCall(const MIRSymbol &sym, ListOperand &srcOpnds) { Insn *callInsn = nullptr; + MIRFunction *mirFunc = sym.GetFunction(); if (CGOptions::IsLongCalls()) { - MIRFunction *mirFunc = sym.GetFunction(); if (IsDuplicateAsmList(sym) || (mirFunc && mirFunc->GetAttr(FUNCATTR_local))) { callInsn = &GenerateLocalLongCallAfterInsn(sym, srcOpnds); } else { callInsn = &GenerateGlobalLongCallAfterInsn(sym, srcOpnds); } - } else if (CGOptions::GetNoplt()) { + } else if (CGOptions::IsNoPlt() && mirFunc && mirFunc->CanDoNoPlt(CGOptions::IsShlib(), CGOptions::IsPIE())) { callInsn = &GenerateGlobalNopltCallAfterInsn(sym, srcOpnds); } else { Operand &targetOpnd = GetOrCreateFuncNameOpnd(sym); @@ -10029,7 +10168,7 @@ void AArch64CGFunc::GenCVaStartIntrin(RegOperand &opnd, uint32 stkSize) { vReg.GetSize() == k64BitSize ? MOP_xstr : MOP_wstr, vReg, *strOpnd)); /* __gr_offs */ - int32 offs = - static_cast(grAreaSize); + int32 offs = -static_cast(grAreaSize); offsOpnd = &CreateImmOperand(offs, k32BitSize, false); RegOperand *tmpReg = &CreateRegisterOperandOfType(PTY_i32); /* offs value to be assigned (rhs) */ SelectCopyImm(*tmpReg, *offsOpnd, PTY_i32); @@ -12511,7 +12650,7 @@ RegOperand *AArch64CGFunc::SelectVectorIntrinsics(const IntrinsicopNode &intrins auto *opndExpr = intrinsicOp.Opnd(static_cast(opndId)); auto *opnd = AArchHandleExpr(intrinsicOp, *opndExpr); auto &intrinsicDesc = IntrinDesc::intrinTable[intrinsicId]; - if (intrinsicDesc.argTypes[opndId + 1] == kArgTyPtr) { + if (intrinsicDesc.argInfo[opndId].argType == kArgTyPtr) { ASSERT(opnd->IsRegister(), "NIY, must be register"); auto *regOpnd = static_cast(opnd); (void)insn.AddOpndChain(CreateMemOpnd(*regOpnd, 0, GetPrimTypeBitSize(resultType))); @@ -12586,4 +12725,544 @@ void AArch64CGFunc::HandleFuncCfg(CGCFG *cfg) { } NeedStackProtect(); } + +AArch64CGFunc::SplittedInt128 AArch64CGFunc::SplitInt128(Operand &opnd) { + ASSERT(opnd.IsRegister() && opnd.GetSize() == k128BitSize, "expected 128-bits register opnd"); + auto vecTy = PTY_v2u64; + auto scTy = PTY_u64; + Operand &low = *SelectVectorGetElement(scTy, &opnd, vecTy, 0); + Operand &high = *SelectVectorGetElement(scTy, &opnd, vecTy, 1); + return {low, high}; +} + +RegOperand &AArch64CGFunc::CombineInt128(const SplittedInt128 parts) { + RegOperand &resOpnd = CreateRegisterOperandOfType(PTY_v2u64); + CombineInt128(resOpnd, parts); + return resOpnd; +} + +void AArch64CGFunc::CombineInt128(Operand &resOpnd, const SplittedInt128 parts) { + auto vecTy = PTY_v2u64; + auto scTy = PTY_u64; + auto *tmpOpnd = SelectVectorFromScalar(vecTy, &parts.low, scTy); + SelectCopy(resOpnd, vecTy, *SelectVectorSetElement(&parts.high, scTy, tmpOpnd, vecTy, 1), vecTy); +} + +void AArch64CGFunc::SelectParmListForInt128(Operand &opnd, ListOperand &srcOpnds, const CCLocInfo &ploc) { + ASSERT(ploc.reg0 != kRinvalid && ploc.reg1 != kRinvalid, ""); + + auto splitOpnd = SplitInt128(opnd); + auto reg0 = static_cast(ploc.reg0); + auto reg1 = static_cast(ploc.reg1); + RegOperand &low = GetOrCreatePhysicalRegisterOperand(reg0, k64BitSize, kRegTyInt); + RegOperand &high = GetOrCreatePhysicalRegisterOperand(reg1, k64BitSize, kRegTyInt); + + auto cpyTy = PTY_u64; + SelectCopy(low, cpyTy, splitOpnd.low, cpyTy); + SelectCopy(high, cpyTy, splitOpnd.high, cpyTy); + + srcOpnds.PushOpnd(low); + srcOpnds.PushOpnd(high); +} + +AArch64CGFunc::SplittedInt128 AArch64CGFunc::GetSplittedInt128(Operand &opnd, PrimType opndType) { + ASSERT(IsPrimitiveInteger(opndType), "unexpected prim type"); + + if (IsInt128Ty(opndType)) { + ASSERT(opnd.IsRegister(), "NIY"); + return SplitInt128(opnd); + } + + bool isSigned = IsSignedInteger(opndType); + auto pTy = isSigned ? PTY_i64 : PTY_u64; + Operand *lowRes = &CreateRegisterOperandOfType(pTy); + SelectCvtInt2Int(nullptr, lowRes, &opnd, opndType, pTy); + + RegOperand *highRes = nullptr; + if (isSigned) { + highRes = &CreateRegisterOperandOfType(pTy); + SelectShift(*highRes, *lowRes, CreateImmOperand(pTy, k64BitSize - 1), kShiftAright, pTy); + } else { + highRes = &GetZeroOpnd(k64BitSize); + } + + return {*lowRes, *highRes}; +} + +void AArch64CGFunc::SelectInt128Cvt(Operand *&resOpnd, Operand &opnd0, PrimType fromType, PrimType toType) { + ASSERT(IsInt128Ty(fromType) || IsInt128Ty(toType), "unexpected prim type"); + + if (IsInt128Ty(toType) && IsInt128Ty(fromType)) { + resOpnd = &opnd0; + } else if (IsInt128Ty(fromType) && IsPrimitiveInteger(toType)) { + // truncate int128 + Operand *lowOpnd0 = SelectVectorGetElement(PTY_u64, &opnd0, PTY_v2u64, 0); + SelectCvtInt2Int(nullptr, resOpnd, lowOpnd0, PTY_u64, toType); + } else if (IsPrimitiveInteger(fromType) && IsInt128Ty(toType)) { + // extend int128 + auto res = GetSplittedInt128(opnd0, fromType); + CombineInt128(*resOpnd, res); + } else if (IsPrimitiveFloat(fromType) || IsPrimitiveFloat(toType)) { + ASSERT(false, "cvt from/to float must be lowered"); + } else { + ASSERT(false, "NIY cvt from %s to %s", GetPrimTypeName(fromType), GetPrimTypeName(toType)); + } +} + +RegOperand *AArch64CGFunc::SelectShiftInt128(Operand &opnd0, Operand &opnd1, ShiftDirection direct) { + ASSERT(opnd0.IsRegister() && opnd0.GetSize() == k128BitSize, "unexpected opnd"); + RegOperand &resOpnd = CreateRegisterOperandOfType(PTY_u128); + + if (opnd1.IsImmediate()) { + SelectShiftInt128Imm(resOpnd, opnd0, opnd1, direct); + } else if (opnd1.IsRegister()) { + switch (direct) { + case kShiftLeft: + SelectShlInt128(resOpnd, opnd0, opnd1); + break; + case kShiftLright: + SelectShrInt128(resOpnd, opnd0, opnd1, false); + break; + case kShiftAright: + SelectShrInt128(resOpnd, opnd0, opnd1, true); + break; + default: + ASSERT(false, "unexpected shift direction"); + } + } else { + ASSERT(false, "NIY"); + } + + return &resOpnd; +} + +void AArch64CGFunc::SelectShiftInt128Imm(Operand &resOpnd, Operand &opnd0, Operand &opnd1, ShiftDirection direct) { + ASSERT(opnd1.IsImmediate(), "immediate opnd expected"); + + auto opnd = SplitInt128(opnd0); + + uint32 shift = static_cast(static_cast(opnd1).GetValue()); + bool wordShift = (shift / k64BitSize) > 0; + uint32 bitShift = shift % k64BitSize; + + auto pTy = PTY_u64; + + bool isShl = (direct == kShiftLeft); + + Operand *lowRes = nullptr; + Operand *highRes = nullptr; + + if (wordShift) { + lowRes = isShl ? &GetZeroOpnd(pTy) : &opnd.high; + highRes = isShl ? &opnd.low : &GetZeroOpnd(pTy); + + // sign-extend + if (direct == kShiftAright) { + lowRes = &opnd.high; + highRes = &CreateRegisterOperandOfType(pTy); + SelectShift(*highRes, opnd.high, CreateImmOperand(pTy, k64BitSize - 1), kShiftAright, pTy); + } + } else { + lowRes = &opnd.low; + highRes = &opnd.high; + } + + if (bitShift != 0) { + Operand &lowOp = *lowRes; + Operand &highOp = *highRes; + + lowRes = &CreateRegisterOperandOfType(pTy); + highRes = &CreateRegisterOperandOfType(pTy); + + RegOperand &tmp = CreateRegisterOperandOfType(pTy); + + Operand &opndPart0 = isShl ? highOp : lowOp; + Operand &opndPart1 = isShl ? lowOp : highOp; + Operand &resPart0 = isShl ? *highRes : *lowRes; + Operand &resPart1 = isShl ? *lowRes : *highRes; + auto &shiftOp = CreateBitShiftOperand(isShl ? BitShiftOperand::kShiftLSR : BitShiftOperand::kShiftLSL, + k64BitSize - bitShift, k64BitSize); + + SelectShift(tmp, opndPart0, CreateImmOperand(pTy, bitShift), direct, pTy); + SelectBiorShift(resPart0, tmp, opndPart1, shiftOp, pTy); + SelectShift(resPart1, opndPart1, CreateImmOperand(pTy, bitShift), direct, pTy); + } + + CombineInt128(resOpnd, {*lowRes, *highRes}); +} + +void AArch64CGFunc::SelectShlInt128(Operand &resOpnd, Operand &origOpnd0, Operand &shiftVal) { + auto opnd0 = SplitInt128(origOpnd0); + + auto pTy = PTY_u64; + RegOperand &tmp0 = CreateRegisterOperandOfType(pTy); + RegOperand &tmp1 = CreateRegisterOperandOfType(pTy); + RegOperand &tmp2 = CreateRegisterOperandOfType(pTy); + + RegOperand &lowRes = CreateRegisterOperandOfType(pTy); + RegOperand &highRes = CreateRegisterOperandOfType(pTy); + + SelectShift(tmp0, opnd0.high, shiftVal, kShiftLeft, pTy); + SelectMvn(tmp1, shiftVal, PTY_u32); + SelectShift(tmp2, opnd0.low, CreateImmOperand(pTy, 1), kShiftLright, pTy); + SelectShift(tmp1, tmp2, tmp1, kShiftLright, pTy); + SelectBior(tmp0, tmp0, tmp1, pTy); + SelectShift(tmp1, opnd0.low, shiftVal, kShiftLeft, pTy); + SelectTst(shiftVal, CreateImmOperand(pTy, k64BitSize), k64BitSize); + SelectAArch64Select(highRes, tmp1, tmp0, GetCondOperand(CC_NE), true, k64BitSize); + SelectAArch64Select(lowRes, GetZeroOpnd(k64BitSize), tmp1, GetCondOperand(CC_NE), true, k64BitSize); + + CombineInt128(resOpnd, {lowRes, highRes}); +} + +void AArch64CGFunc::SelectShrInt128(Operand &resOpnd, Operand &origOpnd0, Operand &shiftVal, bool isAShr) { + auto opnd0 = SplitInt128(origOpnd0); + + auto pTy = PTY_u64; + RegOperand &tmp0 = CreateRegisterOperandOfType(pTy); + RegOperand &tmp1 = CreateRegisterOperandOfType(pTy); + RegOperand &tmp2 = CreateRegisterOperandOfType(pTy); + + RegOperand &lowRes = CreateRegisterOperandOfType(pTy); + RegOperand &highRes = CreateRegisterOperandOfType(pTy); + + SelectShift(tmp0, opnd0.low, shiftVal, kShiftLright, pTy); + SelectMvn(tmp1, shiftVal, PTY_u32); + SelectShift(tmp2, opnd0.high, CreateImmOperand(pTy, 1), kShiftLeft, pTy); + SelectShift(tmp1, tmp2, tmp1, kShiftLeft, pTy); + SelectBior(tmp0, tmp0, tmp1, pTy); + SelectShift(tmp1, opnd0.high, shiftVal, isAShr ? kShiftAright : kShiftLright, pTy); + SelectTst(shiftVal, CreateImmOperand(pTy, k64BitSize), k64BitSize); + SelectAArch64Select(lowRes, tmp1, tmp0, GetCondOperand(CC_NE), true, k64BitSize); + + // sign-extend AShr result + if (!isAShr) { + SelectShift(tmp0, opnd0.low, CreateImmOperand(pTy, k64BitSize - 1), kShiftAright, pTy); + } + + SelectAArch64Select(highRes, GetZeroOpnd(k64BitSize), tmp1, GetCondOperand(CC_NE), true, k64BitSize); + + CombineInt128(resOpnd, {lowRes, highRes}); +} + +RegOperand *AArch64CGFunc::SelectAddInt128(Operand &origOpnd0, PrimType opnd0Ty, Operand &origOpnd1, PrimType opnd1Ty) { + auto opnd0 = GetSplittedInt128(origOpnd0, opnd0Ty); + auto opnd1 = GetSplittedInt128(origOpnd1, opnd1Ty); + + RegOperand &lowRes = CreateRegisterOperandOfType(PTY_u64); + RegOperand &highRes = CreateRegisterOperandOfType(PTY_u64); + + SelectAdds(lowRes, opnd0.low, opnd1.low, PTY_u64); + SelectAdc(highRes, opnd0.high, opnd1.high, PTY_u64); + + return &CombineInt128({lowRes, highRes}); +} + +RegOperand *AArch64CGFunc::SelectSubInt128(Operand &origOpnd0, PrimType opnd0Ty, Operand &origOpnd1, PrimType opnd1Ty) { + auto opnd0 = GetSplittedInt128(origOpnd0, opnd0Ty); + auto opnd1 = GetSplittedInt128(origOpnd1, opnd1Ty); + + RegOperand &lowRes = CreateRegisterOperandOfType(PTY_u64); + RegOperand &highRes = CreateRegisterOperandOfType(PTY_u64); + + SelectSubs(lowRes, opnd0.low, opnd1.low, PTY_u64); + SelectSbc(highRes, opnd0.high, opnd1.high, PTY_u64); + + return &CombineInt128({lowRes, highRes}); +} + +RegOperand *AArch64CGFunc::SelectMpyInt128(Operand &origOpnd0, PrimType opnd0Ty, Operand &origOpnd1, PrimType opnd1Ty) { + auto opnd0 = GetSplittedInt128(origOpnd0, opnd0Ty); + auto opnd1 = GetSplittedInt128(origOpnd1, opnd1Ty); + + RegOperand &tmpReg = CreateRegisterOperandOfType(PTY_u64); + RegOperand &lowRes = CreateRegisterOperandOfType(PTY_u64); + RegOperand &highRes = CreateRegisterOperandOfType(PTY_u64); + + SelectMulh(false, tmpReg, opnd0.low, opnd1.low); + SelectMadd(tmpReg, opnd0.high, opnd1.low, tmpReg, PTY_u64); + SelectMadd(highRes, opnd1.high, opnd0.low, tmpReg, PTY_u64); + + SelectMpy(lowRes, opnd0.low, opnd1.low, PTY_u64); + + return &CombineInt128({lowRes, highRes}); +} + +// set result to zero if origOpnd0 != origOpnd1 +void AArch64CGFunc::SelectInt128CompNeq(Operand &result, Operand &origOpnd0, PrimType opnd0Ty, Operand &origOpnd1, + PrimType opnd1Ty) { + auto opnd0 = GetSplittedInt128(origOpnd0, opnd0Ty); + auto opnd1 = GetSplittedInt128(origOpnd1, opnd1Ty); + + Operand &tmpReg0 = CreateRegisterOperandOfType(PTY_u64); + Operand &tmpReg1 = CreateRegisterOperandOfType(PTY_u64); + + SelectBxor(tmpReg0, opnd0.low, opnd1.low, PTY_u64); + SelectBxor(tmpReg1, opnd0.high, opnd1.high, PTY_u64); + SelectBior(result, tmpReg0, tmpReg1, PTY_u64); +} + +// set result to zero if origOpnd0 < origOpnd1 +void AArch64CGFunc::SelectInt128CompLt(Operand &result, Operand &origOpnd0, PrimType opnd0Ty, Operand &origOpnd1, + PrimType opnd1Ty, bool signedCond) { + auto opnd0 = GetSplittedInt128(origOpnd0, opnd0Ty); + auto opnd1 = GetSplittedInt128(origOpnd1, opnd1Ty); + + // opnd0 < opnd1 <=> (opnd0.hi < opnd1.hi) || (opnd0.hi == opnd1.hi && opnd0.low < opnd1.low) + + // set flag if opnd0.hi < opnd1.hi + Operand &highLO = CreateRegisterOperandOfType(PTY_u64); + // set flag if opnd0.hi == opnd1.hi + Operand &highEQ = CreateRegisterOperandOfType(PTY_u64); + // set flag if opnd0.low < opnd1.low + Operand &lowLO = CreateRegisterOperandOfType(PTY_u64); + + SelectAArch64Cmp(opnd0.high, opnd1.high, /* isIntType */ true, k64BitSize); + SelectAArch64CSet(highLO, GetCondOperand(signedCond ? CC_LT : CC_LO), /* is64Bits */ false); + + SelectAArch64Cmp(opnd0.high, opnd1.high, /* isIntType */ true, k64BitSize); + SelectAArch64CSet(highEQ, GetCondOperand(CC_EQ), /* is64Bits */ false); + + SelectAArch64Cmp(opnd0.low, opnd1.low, /* isIntType */ true, k64BitSize); + SelectAArch64CSet(lowLO, GetCondOperand(CC_LO), /* is64Bits */ false); + + // result = highLO || (highEQ && lowLO) + SelectBand(result, highEQ, lowLO, PTY_u64); + SelectBior(result, result, highLO, PTY_u64); +} + +void AArch64CGFunc::SelectCondGotoInt128(LabelOperand &label, Opcode jmpOp, Opcode cmpOp, Operand &opnd0, + Operand &opnd1, bool signedCond) { + RegOperand &resComp = CreateRegisterOperandOfType(PTY_u64); + + auto int128Ty = signedCond ? PTY_i128 : PTY_u128; + SelectInt128Compare(resComp, opnd0, int128Ty, opnd1, int128Ty, cmpOp, signedCond); + + MOperator mOpBranch = (jmpOp == OP_brtrue) ? MOP_xcbnz : MOP_xcbz; + auto &bInsn = GetInsnBuilder()->BuildInsn(mOpBranch, resComp, label); + GetCurBB()->AppendInsn(bInsn); +} + +void AArch64CGFunc::SelectInt128Compare(Operand &resOpnd, Operand &lhs, PrimType lhsTy, Operand &rhs, PrimType rhsTy, + Opcode opcode, bool isSigned) { + ConditionCode cond = kCcLast; + switch (opcode) { + case OP_eq: + SelectInt128CompNeq(resOpnd, lhs, lhsTy, rhs, rhsTy); + cond = CC_EQ; + break; + case OP_ne: + SelectInt128CompNeq(resOpnd, lhs, lhsTy, rhs, rhsTy); + cond = CC_NE; + break; + case OP_lt: + SelectInt128CompLt(resOpnd, lhs, lhsTy, rhs, rhsTy, isSigned); + cond = CC_NE; + break; + case OP_gt: + // lhs < rhs <=> rhs > lhs + SelectInt128CompLt(resOpnd, rhs, rhsTy, lhs, lhsTy, isSigned); + cond = CC_NE; + break; + case OP_le: + // lhs <= rhs <=> !(rhs < lhs) + SelectInt128CompLt(resOpnd, rhs, rhsTy, lhs, lhsTy, isSigned); + cond = CC_EQ; + break; + case OP_ge: + // lhs >= rhs <=> !(lhs < rhs) + SelectInt128CompLt(resOpnd, lhs, lhsTy, rhs, rhsTy, isSigned); + cond = CC_EQ; + break; + default: + ASSERT(false, "unexpected opcode"); + } + + SelectAArch64Cmp(resOpnd, GetZeroOpnd(k64BitSize), true /* isIntType */, k64BitSize); + SelectAArch64CSet(resOpnd, GetCondOperand(cond), true /* is64Bits */); +} + +Operand *AArch64CGFunc::SelectRelationOperatorInt128(RelationOperator operatorCode, Operand &origOpnd0, PrimType oty0, + Operand &origOpnd1, PrimType oty1) { + auto opnd0 = GetSplittedInt128(origOpnd0, oty0); + auto opnd1 = GetSplittedInt128(origOpnd1, oty1); + + RegOperand &lowRes = CreateRegisterOperandOfType(PTY_u64); + RegOperand &highRes = CreateRegisterOperandOfType(PTY_u64); + + SelectRelationOperator(operatorCode, lowRes, opnd0.low, opnd1.low, PTY_u64); + SelectRelationOperator(operatorCode, highRes, opnd0.high, opnd1.high, PTY_u64); + + return &CombineInt128({lowRes, highRes}); +} + +RegOperand *AArch64CGFunc::SelectBnotInt128(Operand &origOpnd) { + auto opnd = SplitInt128(origOpnd); + + RegOperand &lowRes = CreateRegisterOperandOfType(PTY_u64); + RegOperand &highRes = CreateRegisterOperandOfType(PTY_u64); + + SelectBnot(lowRes, opnd.low, PTY_u64); + SelectBnot(highRes, opnd.high, PTY_u64); + + return &CombineInt128({lowRes, highRes}); +} + +RegOperand *AArch64CGFunc::SelectNegInt128(Operand &origOpnd) { + auto opnd = SplitInt128(origOpnd); + + // -opnd <=> 0 - opnd + RegOperand &lowRes = CreateRegisterOperandOfType(PTY_u64); + RegOperand &highRes = CreateRegisterOperandOfType(PTY_u64); + + SelectSubs(lowRes, GetZeroOpnd(k64BitSize), opnd.low, PTY_u64); + SelectSbc(highRes, GetZeroOpnd(k64BitSize), opnd.high, PTY_u64); + + return &CombineInt128({lowRes, highRes}); +} + +RegOperand *AArch64CGFunc::SelectExtractbitsInt128(uint8 bitOffset, uint8 bitSize, Operand &srcOpnd, Opcode extOp) { + ASSERT(srcOpnd.IsRegister() && srcOpnd.GetSize() == k128BitSize, "NIY extractbits"); + ASSERT(bitSize + bitOffset <= k128BitSize, "illegal extractbits"); + + auto opnd = SplitInt128(srcOpnd); + Operand &lowSrc = opnd.low; + Operand &highSrc = opnd.high; + + PrimType pTy = PTY_u64; + Operand *lowRes = nullptr; + Operand *highRes = nullptr; + + if (bitOffset < k64BitSize && (bitOffset + bitSize) <= k64BitSize) { + // extract bits only from low part + // | low | high | + // ^ ^ ^ + // |off| size | + lowRes = &CreateRegisterOperandOfType(pTy); + SelectExtractbits(*lowRes, bitOffset, bitSize, lowSrc, pTy, extOp); + highRes = &GetZeroOpnd(k64BitSize); + } else if (bitOffset >= k64BitSize && bitSize <= k64BitSize) { + // extract bits only from high part + // | low | high | + // ^ ^ ^ + // | off | size | + lowRes = &CreateRegisterOperandOfType(pTy); + SelectExtractbits(*lowRes, bitOffset - k64BitSize, bitSize, highSrc, pTy, extOp); + highRes = &GetZeroOpnd(k64BitSize); + } else { + // extract bits from each parts + // | low | high | + // ^ ^ ^ + // | off | size | + + // get bits from low part + Operand &tmpReg0 = CreateRegisterOperandOfType(pTy); + uint32 bitSizeFromLow = k64BitSize - bitOffset; + SelectExtractbits(tmpReg0, bitOffset, static_cast(bitSizeFromLow), lowSrc, pTy, OP_zext); + + // get bits from high part + Operand &tmpReg1 = CreateRegisterOperandOfType(PTY_u64); + uint8 bitSizeFromHigh = static_cast(bitOffset + bitSize - k64BitSize); + SelectExtractbits(tmpReg1, static_cast(0), bitSizeFromHigh, highSrc, pTy, OP_zext); + + if (bitSizeFromLow != k64BitSize) { + lowRes = &CreateRegisterOperandOfType(pTy); + auto &shiftOp = CreateBitShiftOperand(BitShiftOperand::kShiftLSL, bitSizeFromLow, k64BitSize); + SelectBiorShift(*lowRes, tmpReg0, tmpReg1, shiftOp, pTy); + } else { + lowRes = &tmpReg0; + } + + if (bitSizeFromLow + bitSizeFromHigh <= k64BitSize) { + highRes = &GetZeroOpnd(k64BitSize); + } else { + highRes = &CreateRegisterOperandOfType(pTy); + SelectShift(*highRes, tmpReg1, CreateImmOperand(pTy, bitOffset), kShiftLright, pTy); + } + } + + return &CombineInt128({*lowRes, *highRes}); +} + +RegOperand *AArch64CGFunc::SelectDepositBitsInt128(uint8 offset, uint8 size, Operand &opnd0, Operand &opnd1) { + ASSERT(opnd0.IsRegister() && opnd0.GetSize() == k128BitSize, "NIY depositbits"); + ASSERT(opnd1.IsRegister() && opnd1.GetSize() == k128BitSize, "NIY depositbits"); + ASSERT(offset + size <= k128BitSize, "incorrect depositbits"); + + auto opnd = SplitInt128(opnd0); + Operand &lowOpnd0 = opnd.low; + Operand &highOpnd0 = opnd.high; + + auto splitOpnd1 = SplitInt128(opnd1); + Operand &lowOpnd1 = splitOpnd1.low; + Operand &highOpnd1 = splitOpnd1.high; + + Operand *lowRes = nullptr; + Operand *highRes = nullptr; + + if (size <= k64BitSize) { + if (offset < k64BitSize && (offset + size) <= k64BitSize) { + // deposit from low part + // | low | high | + // ^ ^ ^ + // |off| size | + lowRes = &CreateRegisterOperandOfType(PTY_u64); + SelectDepositBits(*lowRes, offset, size, lowOpnd0, lowOpnd1, PTY_u64); + highRes = &highOpnd0; + } else if (offset >= k64BitSize) { + // deposit from high part + // | low | high | + // ^ ^ ^ + // | off | size | + highRes = &CreateRegisterOperandOfType(PTY_u64); + SelectDepositBits(*highRes, offset - k64BitSize, size, highOpnd0, lowOpnd1, PTY_u64); + lowRes = &lowOpnd0; + } else if (offset < k64BitSize && (offset + size) > k64BitSize) { + // deposit from each part + // | low | high | + // ^ ^ ^ + // | off | size | + + lowRes = &CreateRegisterOperandOfType(PTY_u64); + uint8 deposToLow = k64BitSize - offset; + SelectDepositBits(*lowRes, offset, deposToLow, lowOpnd0, lowOpnd1, PTY_u64); + + highRes = &CreateRegisterOperandOfType(PTY_u64); + uint8 deposToHigh = size + offset - k64BitSize; + Operand &shiftedOpnd1 = CreateRegisterOperandOfType(PTY_u64); + SelectShift(shiftedOpnd1, lowOpnd1, CreateImmOperand(PTY_u64, offset), kShiftLright, PTY_u64); + SelectDepositBits(*highRes, 0, deposToHigh, highOpnd0, shiftedOpnd1, PTY_u64); + } else { + ASSERT(false, "NIY depositbits %d, %d", offset, size); + } + } else { // size > k64BitSize + lowRes = &CreateRegisterOperandOfType(PTY_u64); + highRes = &CreateRegisterOperandOfType(PTY_u64); + + if (offset == 0) { + SelectDepositBits(*lowRes, 0, k64BitSize, lowOpnd0, lowOpnd1, PTY_u64); + SelectDepositBits(*highRes, 0, size - k64BitSize, highOpnd0, highOpnd1, PTY_u64); + } else { + // result: + // | low | high | + // ^ ^ ^ ^ ^ + // | off | a | b | c | + // a + b + c = size + + auto a = k64BitSize - offset; + SelectDepositBits(*lowRes, offset, static_cast(a), lowOpnd0, lowOpnd1, PTY_u64); + + auto b = offset; + Operand &tmpReg = CreateRegisterOperandOfType(PTY_u64); + SelectShift(tmpReg, lowOpnd1, CreateImmOperand(PTY_u64, static_cast(a)), kShiftLright, PTY_u64); + SelectDepositBits(*highRes, static_cast(0), b, highOpnd0, tmpReg, PTY_u64); + + auto c = size - k64BitSize; + SelectDepositBits(*highRes, b, static_cast(c), *highRes, highOpnd1, PTY_u64); + } + } + + return &CombineInt128({*lowRes, *highRes}); +} + } /* namespace maplebe */ diff --git a/src/mapleall/maple_be/src/cg/isolate_fastpath.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_dup.cpp similarity index 53% rename from src/mapleall/maple_be/src/cg/isolate_fastpath.cpp rename to src/mapleall/maple_be/src/cg/aarch64/aarch64_dup.cpp index ebcdc28cd0..aef0712d30 100644 --- a/src/mapleall/maple_be/src/cg/isolate_fastpath.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_dup.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) [2022] Huawei Technologies Co.,Ltd.All rights reserved. + * Copyright (c) [2023] Huawei Technologies Co.,Ltd.All rights reserved. * * OpenArkCompiler is licensed under Mulan PSL v2. * You can use this software according to the terms and conditions of the Mulan PSL v2. @@ -12,21 +12,12 @@ * FIT FOR A PARTICULAR PURPOSE. * See the Mulan PSL v2 for more details. */ -#include "isolate_fastpath.h" -#if TARGAARCH64 -#include "aarch64_isolate_fastpath.h" -#endif -#include "cgfunc.h" -namespace maplebe { -using namespace maple; +#include "aarch64_dup.h" -bool CgIsolateFastPath::PhaseRun(maplebe::CGFunc &f) { - IsolateFastPath *isolateFastPath = nullptr; -#if TARGAARCH64 - isolateFastPath = GetPhaseAllocator()->New(f); -#endif - isolateFastPath->Run(); - return false; +namespace maplebe { +/* Initialize cfg optimization patterns */ +void AArch64DupTailOptimizer::InitOptimizePatterns() { + (void)diffPassPatterns.emplace_back(memPool->New(*cgFunc)); +} } -} /* namespace maplebe */ diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_ebo.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_ebo.cpp index ce068dc3bc..e11935b507 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_ebo.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_ebo.cpp @@ -1372,8 +1372,6 @@ bool AArch64Ebo::SpecialSequence(Insn &insn, const MapleVector &origI AArch64CGFunc *aarFunc = static_cast(cgFunc); Operand &r = aarFunc->CreateRegisterOperandOfType(static_cast(result)->GetRegisterType(), size / kBitsPerByte); - /* after generate a new vreg, check if the size of DataInfo is big enough */ - EnlargeSpaceForLA(*csetInsn); CondOperand &cond2 = aarFunc->GetCondOperand(GetReverseCond(cond1)); Operand &rflag = aarFunc->GetOrCreateRflag(); Insn &newCset = cgFunc->GetInsnBuilder()->BuildInsn( diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_emitter.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_emitter.cpp index 6f847aefbd..2045790f81 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_emitter.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_emitter.cpp @@ -1080,7 +1080,7 @@ void AArch64AsmEmitter::EmitInlineAsm(Emitter &emitter, const Insn &insn) const auto isMemAccess = [](char c)->bool { return c == '['; }; - auto emitRegister = [&stringToEmit,&isMemAccess](const char *p, bool isInt, uint32 regNO, bool unDefRegSize)->void { + auto emitRegister = [&stringToEmit, &isMemAccess](const char *p, bool isInt, uint32 regNO, bool unDefRegSize)->void { if (isMemAccess(p[0])) { stringToEmit += "[x"; AsmStringOutputRegNum(isInt, regNO, R0, V0, stringToEmit); diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_fixshortbranch.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_fixshortbranch.cpp index 4216502fa6..b4afa4b738 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_fixshortbranch.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_fixshortbranch.cpp @@ -184,8 +184,7 @@ void AArch64FixShortBranch::InsertJmpPadAtSecEnd(Insn &insn, uint32 targetLabelI insn.SetOperand(targetLabelIdx, padBBLabelOpnd); /* adjust CFG */ - bb->RemoveSuccs(targetBB); - bb->PushBackSuccs(*padBB); + bb->ReplaceSucc(targetBB, *padBB); targetBB.RemovePreds(*bb); targetBB.PushBackPreds(*padBB); padBB->PushBackPreds(*bb); diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_global.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_global.cpp index 3e60d2bdb7..c1612c3b60 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_global.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_global.cpp @@ -2204,6 +2204,9 @@ void AndCbzPattern::Optimize(Insn &insn) { auto &label = static_cast(insn.GetOperand(kInsnSecondOpnd)); ImmOperand &tbzImm = aarchFunc.CreateImmOperand(tbzVal, k8BitSize, false); Insn &newInsn = cgFunc.GetInsnBuilder()->BuildInsn(newMop, prevInsn->GetOperand(kInsnSecondOpnd), tbzImm, label); + if (!VERIFY_INSN(&newInsn)) { + return; + } newInsn.SetId(insn.GetId()); bb->ReplaceInsn(insn, newInsn); if (GLOBAL_DUMP) { diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_ico.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_ico.cpp index 04aca4164b..f9578c35f8 100755 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_ico.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_ico.cpp @@ -338,11 +338,8 @@ void AArch64ICOIfThenElsePattern::GenerateInsnForReg(const Insn &branchInsn, Ope Insn &tempInsnIf = cgFunc->GetInsnBuilder()->BuildInsn(mOp, destReg, *tReg); generateInsn.emplace_back(&tempInsnIf); } else { - uint32 dSize = destReg.GetSize(); bool isIntTy = destReg.IsOfIntClass(); - MOperator mOpCode = isIntTy ? (dSize == k64BitSize ? MOP_xcselrrrc : MOP_wcselrrrc) - : (dSize == k64BitSize ? MOP_dcselrrrc : (dSize == k32BitSize ? - MOP_scselrrrc : MOP_hcselrrrc)); + MOperator mOpCode = isIntTy ? MOP_xcselrrrc : MOP_dcselrrrc; Insn *cselInsn = BuildCondSel(branchInsn, mOpCode, destReg, *tReg, *eReg); CHECK_FATAL(cselInsn != nullptr, "build a csel insn failed"); generateInsn.emplace_back(cselInsn); @@ -1227,10 +1224,21 @@ bool AArch64ICOSameCondPattern::DoOpt(BB &firstIfBB, BB &secondIfBB) const { if (secondIfLabel != MIRLabelTable::GetDummyLabel()) { label2BBMap.erase(secondIfLabel); } + // bb6(firstif) + // / unknown \ likely + // / bb10 (secondif) + // \ / (l/u) \ unknown + // bb7 bb11 + // => + // bb6 + // / unkown \ likely + // \ \ + // bb7 bb11 + int32 firstToSecondProb = firstIfBB.GetEdgeProb(secondIfBB); cgFunc->GetTheCFG()->RemoveBB(secondIfBB); if (nextBB->GetLabIdx() != labelOpnd1[0]->GetLabelIndex()) { label2BBMap.emplace(nextBB->GetLabIdx(), nextBB); - firstIfBB.PushFrontSuccs(*nextBB); + firstIfBB.PushFrontSuccs(*nextBB, firstToSecondProb); nextBB->PushFrontPreds(firstIfBB); } return true; @@ -1489,8 +1497,8 @@ bool AArch64ICOCondSetPattern::Optimize(BB &curBB) { return DoOpt(curBB); } -Insn *AArch64ICOCondSetPattern::BuildNewInsn(ImmOperand &immOpnd1, ImmOperand &immOpnd2, Insn &bInsn, RegOperand &dest, - bool is32Bits) const { +Insn *AArch64ICOCondSetPattern::BuildNewInsn(const ImmOperand &immOpnd1, const ImmOperand &immOpnd2, const Insn &bInsn, + RegOperand &dest, bool is32Bits) const { if (immOpnd1.IsZero()) { if (immOpnd2.IsOne()) { return BuildCondSet(bInsn, dest, false); @@ -1507,7 +1515,7 @@ Insn *AArch64ICOCondSetPattern::BuildNewInsn(ImmOperand &immOpnd1, ImmOperand &i return nullptr; } -bool AArch64ICOCondSetPattern::DoOpt(BB &curBB) const { +bool AArch64ICOCondSetPattern::DoOpt(BB &curBB) { std::vector labelOpnd = GetLabelOpnds(*curBrInsn); if (labelOpnd.size() != 1) { return false; diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_insn.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_insn.cpp index 9b5fe87d4a..47b1309bb9 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_insn.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_insn.cpp @@ -188,7 +188,7 @@ void A64OpndEmitVisitor::Visit(maplebe::MemOperand *v) { RegOperand *baseReg = v->GetBaseRegister(); EmitIntReg(*baseReg, k64BitSize); CHECK_NULL_FATAL(v->GetSymbol()); - if ((CGOptions::IsPIC() && v->GetSymbol()->IsThreadLocal()) || + if ((CGOptions::IsPIC() && v->GetSymbol()->IsThreadLocal()) || v->GetSymbol()->NeedGOT(CGOptions::IsPIC(), CGOptions::IsPIE())) { std::string gotEntry = ""; if (v->GetSymbol()->IsThreadLocal()) { diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_isolate_fastpath.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_isolate_fastpath.cpp deleted file mode 100644 index 70ece8c69e..0000000000 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_isolate_fastpath.cpp +++ /dev/null @@ -1,433 +0,0 @@ -/* - * Copyright (c) [2022] Huawei Technologies Co.,Ltd.All rights reserved. - * - * OpenArkCompiler is licensed under Mulan PSL v2. - * You can use this software according to the terms and conditions of the Mulan PSL v2. - * You may obtain a copy of Mulan PSL v2 at: - * - * http://license.coscl.org.cn/MulanPSL2 - * - * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR - * FIT FOR A PARTICULAR PURPOSE. - * See the Mulan PSL v2 for more details. - */ -#include "aarch64_isolate_fastpath.h" -#include "aarch64_cg.h" -#include "cgfunc.h" -#include "cg_irbuilder.h" - -namespace maplebe { -using namespace maple; - -bool AArch64IsolateFastPath::FindRegs(Operand &op, std::set &vecRegs) const { - Operand *opnd = &op; - if (opnd == nullptr || vecRegs.empty()) { - return false; - } - if (opnd->IsList()) { - MapleList pregList = static_cast(opnd)->GetOperands(); - for (auto *preg : as_const(pregList)) { - if (preg->GetRegisterNumber() == R29 || - vecRegs.find(preg->GetRegisterNumber()) != vecRegs.end()) { - return true; /* the opReg will overwrite or reread the vecRegs */ - } - } - } - if (opnd->IsMemoryAccessOperand()) { /* the registers of kOpdMem are complex to be detected */ - RegOperand *baseOpnd = static_cast(opnd)->GetBaseRegister(); - RegOperand *indexOpnd = static_cast(opnd)->GetIndexRegister(); - if ((baseOpnd != nullptr && baseOpnd->GetRegisterNumber() == R29) || - (indexOpnd != nullptr && indexOpnd->GetRegisterNumber() == R29)) { - return true; /* Avoid modifying data on the stack */ - } - if ((baseOpnd != nullptr && vecRegs.find(baseOpnd->GetRegisterNumber()) != vecRegs.end()) || - (indexOpnd != nullptr && vecRegs.find(indexOpnd->GetRegisterNumber()) != vecRegs.end())) { - return true; - } - } - if (opnd->IsRegister()) { - RegOperand *regOpnd = static_cast(opnd); - if (regOpnd->GetRegisterNumber() == R29 || - vecRegs.find(regOpnd->GetRegisterNumber()) != vecRegs.end()) { - return true; /* dst is a target register, result_dst is a target register */ - } - } - return false; -} - -bool AArch64IsolateFastPath::InsertOpndRegs(Operand &op, std::set &vecRegs) const { - Operand *opnd = &op; - if (opnd->IsList()) { - MapleList pregList = static_cast(opnd)->GetOperands(); - for (auto *preg : as_const(pregList)) { - if (preg != nullptr) { - (void)vecRegs.insert(preg->GetRegisterNumber()); - } - } - } - if (opnd->IsMemoryAccessOperand()) { /* the registers of kOpdMem are complex to be detected */ - RegOperand *baseOpnd = static_cast(opnd)->GetBaseRegister(); - if (baseOpnd != nullptr) { - (void)vecRegs.insert(baseOpnd->GetRegisterNumber()); - } - RegOperand *indexOpnd = static_cast(opnd)->GetIndexRegister(); - if (indexOpnd != nullptr) { - (void)vecRegs.insert(indexOpnd->GetRegisterNumber()); - } - } - if (opnd->IsRegister()) { - RegOperand *preg = static_cast(opnd); - if (preg != nullptr) { - (void)vecRegs.insert(preg->GetRegisterNumber()); - } - } - return true; -} - -bool AArch64IsolateFastPath::InsertInsnRegs(Insn &insn, bool insertSource, std::set &vecSourceRegs, - bool insertTarget, std::set &vecTargetRegs) const { - Insn *curInsn = &insn; - for (uint32 o = 0; o < curInsn->GetOperandSize(); ++o) { - Operand &opnd = curInsn->GetOperand(o); - if (insertSource && curInsn->OpndIsUse(o)) { - (void)InsertOpndRegs(opnd, vecSourceRegs); - } - if (insertTarget && curInsn->OpndIsDef(o)) { - (void)InsertOpndRegs(opnd, vecTargetRegs); - } - } - return true; -} - -bool AArch64IsolateFastPath::BackwardFindDependency(BB &ifbb, std::set &vecReturnSourceRegs, - std::list &existingInsns, - std::list &moveInsns) const { - /* - * Pattern match,(*) instruction are moved down below branch. - * ******************** - * curInsn: - * in predBB - * in ifBB - * in returnBB - * ********************* - * list: the insns can be moved into the coldBB - * (1) the instruction is neither a branch nor a call, except for the ifbb.GetLastInsn() - * As long as a branch insn exists, - * the fast path finding fails and the return value is false, - * but the code sinking can be continued. - * (2) the predBB is not a ifBB, - * As long as a ifBB in preds exists, - * the code sinking fails, - * but fast path finding can be continued. - * (3) the targetRegs of insns in existingInsns can neither be reread or overwrite - * (4) the sourceRegs of insns in existingInsns can not be overwrite - * (5) the sourceRegs of insns in returnBB can neither be reread or overwrite - * (6) the targetRegs and sourceRegs cannot be R29 R30, to protect the stack - * (7) modified the reg when: - * -------------- - * curInsn: move R2,R1 - * : s s s - * s s s - * -> s s s - * ------------ - * (a) all targets cannot be R1, all sources cannot be R1 - * all targets cannot be R2, all return sources cannot be R2 - * (b) the targetRegs and sourceRegs cannot be list or MemoryAccess - * (c) no ifBB in preds, no branch insns - * (d) the bits of source-R2 must be equal to the R2 - * (e) replace the R2 with R1 - */ - BB *pred = &ifbb; - std::set vecTargetRegs; /* the targrtRegs of existingInsns */ - std::set vecSourceRegs; /* the soureRegs of existingInsns */ - bool ifPred = false; /* Indicates whether a ifBB in pred exists */ - bool bl = false; /* Indicates whether a branch insn exists */ - do { - FOR_BB_INSNS_REV(insn, pred) { - /* code sinking */ - if (insn->IsImmaterialInsn()) { - moveInsns.push_back(insn); - continue; - } - /* code sinking */ - if (!insn->IsMachineInstruction()) { - moveInsns.push_back(insn); - continue; - } - /* code sinking fails, the insns must be retained in the ifBB */ - if (ifPred || insn == ifbb.GetLastInsn() || insn->IsBranch() || insn->IsCall() || - insn->IsStore() || insn->IsStorePair()) { - /* fast path finding fails */ - if (insn != ifbb.GetLastInsn() && (insn->IsBranch() || insn->IsCall() || - insn->IsStore() || insn->IsStorePair() || insn->IsSpecialCall())) { - bl = true; - } - (void)InsertInsnRegs(*insn, true, vecSourceRegs, true, vecTargetRegs); - existingInsns.push_back(insn); - continue; - } - bool allow = true; /* whether allow this insn move into the codeBB */ - for (uint32 o = 0; allow && o < insn->GetOperandSize(); ++o) { - Operand &opnd = insn->GetOperand(o); - if (insn->OpndIsDef(o)) { - allow = allow && !FindRegs(opnd, vecTargetRegs); - allow = allow && !FindRegs(opnd, vecSourceRegs); - allow = allow && !FindRegs(opnd, vecReturnSourceRegs); - } - if (insn->OpndIsUse(o)) { - allow = allow && !FindRegs(opnd, vecTargetRegs); - } - } - /* if a result_dst not allowed, this insn can be allowed on the condition of mov Rx,R0/R1, - * and tje existing insns cannot be blr - * RLR 31, RFP 32, RSP 33, RZR 34 */ - if (!ifPred && !bl && !allow && (insn->GetMachineOpcode() == MOP_xmovrr || - insn->GetMachineOpcode() == MOP_wmovrr)) { - Operand *resultOpnd = &(insn->GetOperand(0)); - Operand *srcOpnd = &(insn->GetOperand(1)); - regno_t resultNO = static_cast(resultOpnd)->GetRegisterNumber(); - regno_t srcNO = static_cast(srcOpnd)->GetRegisterNumber(); - if (!FindRegs(*resultOpnd, vecTargetRegs) && !FindRegs(*srcOpnd, vecTargetRegs) && - !FindRegs(*srcOpnd, vecSourceRegs) && !FindRegs(*srcOpnd, vecReturnSourceRegs) && - (srcNO < RLR || srcNO > RZR)) { - allow = true; /* allow on the conditional mov Rx,Rxx */ - for (auto *exit : as_const(existingInsns)) { - /* the registers of kOpdMem are complex to be detected */ - for (uint32 o = 0; o < exit->GetOperandSize(); ++o) { - if (!exit->OpndIsUse(o)) { - continue; - } - Operand *opd = &(exit->GetOperand(o)); - if (opd->IsList() || opd->IsMemoryAccessOperand()) { - allow = false; - break; - } - /* Distinguish between 32-bit regs and 64-bit regs */ - if (opd->IsRegister() && - static_cast(opd)->GetRegisterNumber() == resultNO && - opd != resultOpnd) { - allow = false; - break; - } - } - } - } - /* replace the R2 with R1 */ - if (allow) { - for (auto *exit : existingInsns) { - for (uint32 o = 0; o < exit->GetOperandSize(); ++o) { - if (!exit->OpndIsUse(o)) { - continue; - } - Operand *opd = &(exit->GetOperand(o)); - if (opd->IsRegister() && (opd == resultOpnd)) { - exit->SetOperand(o, *srcOpnd); - } - } - } - } - } - if (!allow) { /* all result_dsts are not target register */ - /* code sinking fails */ - (void)InsertInsnRegs(*insn, true, vecSourceRegs, true, vecTargetRegs); - existingInsns.push_back(insn); - } else { - moveInsns.push_back(insn); - } - } - if (pred->GetPreds().empty()) { - break; - } - if (!ifPred) { - for (auto *tmPred : pred->GetPreds()) { - pred = tmPred; - /* try to find the BB without branch */ - if (tmPred->GetKind() == BB::kBBGoto || tmPred->GetKind() == BB::kBBFallthru) { - ifPred = false; - break; - } else { - ifPred = true; - } - } - } - } while (pred != nullptr); - for (std::set::iterator it = vecTargetRegs.begin(); it != vecTargetRegs.end(); ++it) { - if (AArch64Abi::IsCalleeSavedReg(static_cast(*it))) { /* flag register */ - return false; - } - } - return !bl; -} - -void AArch64IsolateFastPath::IsolateFastPathOpt() { - /* - * Detect "if (cond) return" fast path, and move extra instructions - * to the slow path. - * Must match the following block structure. BB1 can be a series of - * single-pred/single-succ blocks. - * BB1 ops1 cmp-br to BB3 BB1 cmp-br to BB3 - * BB2 ops2 br to retBB ==> BB2 ret - * BB3 slow path BB3 ops1 ops2 - * if the detect is successful, BB3 will be used to generate prolog stuff. - */ - BB &bb = *cgFunc.GetFirstBB(); - if (bb.GetPrev() != nullptr) { - return; - } - BB *ifBB = nullptr; - BB *returnBB = nullptr; - BB *coldBB = nullptr; - { - BB *curBB = &bb; - /* Look for straight line code */ - while (1) { - if (!curBB->GetEhSuccs().empty()) { - return; - } - if (curBB->GetSuccs().size() == 1) { - if (curBB->HasCall()) { - return; - } - BB *succ = curBB->GetSuccs().front(); - if (succ->GetPreds().size() != 1 || !succ->GetEhPreds().empty()) { - return; - } - curBB = succ; - } else if (curBB->GetKind() == BB::kBBIf) { - ifBB = curBB; - break; - } else { - return; - } - } - } - /* targets of if bb can only be reached by if bb */ - { - CHECK_FATAL(!ifBB->GetSuccs().empty(), "null succs check!"); - BB *first = ifBB->GetSuccs().front(); - BB *second = ifBB->GetSuccs().back(); - if (first->GetPreds().size() != 1 || !first->GetEhPreds().empty()) { - return; - } - if (second->GetPreds().size() != 1 || !second->GetEhPreds().empty()) { - return; - } - /* One target of the if bb jumps to a return bb */ - if (first->GetKind() != BB::kBBGoto && first->GetKind() != BB::kBBFallthru) { - return; - } - if (first->GetSuccs().size() != 1) { - return; - } - if (first->GetSuccs().front()->GetKind() != BB::kBBReturn) { - return; - } - if (first->GetSuccs().front()->GetPreds().size() != 1) { - return; - } - constexpr int32 maxNumInsn = 2; - if (first->GetSuccs().front()->NumInsn() > maxNumInsn) { /* avoid a insn is used to debug */ - return; - } - if (second->GetSuccs().empty()) { - return; - } - returnBB = first; - coldBB = second; - } - /* Search backward looking for dependencies for the cond branch */ - std::list existingInsns; /* the insns must be retained in the ifBB (and the return BB) */ - std::list moveInsns; /* instructions to be moved to coldbb */ - /* - * The control flow matches at this point. - * Make sure the SourceRegs of the insns in returnBB (vecReturnSourceReg) cannot be overwrite. - * the regs in insns have three forms: list, MemoryAccess, or Register. - */ - CHECK_FATAL(returnBB != nullptr, "null ptr check"); - std::set vecReturnSourceRegs; - FOR_BB_INSNS_REV(insn, returnBB) { - if (!insn->IsMachineInstruction()) { - continue; - } - if (insn->IsBranch() || insn->IsCall() || insn->IsStore() || insn->IsStorePair()) { - return; - } - (void)InsertInsnRegs(*insn, true, vecReturnSourceRegs, false, vecReturnSourceRegs); - existingInsns.push_back(insn); - } - FOR_BB_INSNS_REV(insn, returnBB->GetSuccs().front()) { - if (!insn->IsMachineInstruction()) { - continue; - } - if (insn->IsBranch() || insn->IsCall() || insn->IsStore() || insn->IsStorePair()) { - return; - } - (void)InsertInsnRegs(*insn, true, vecReturnSourceRegs, false, vecReturnSourceRegs); - existingInsns.push_back(insn); - } - /* - * The mv is the 1st move using the parameter register leading to the branch - * The ld is the load using the parameter register indirectly for the branch - * The depMv is the move which preserves the result of the load but might - * destroy a parameter register which will be moved below the branch. - */ - bool fast = BackwardFindDependency(*ifBB, vecReturnSourceRegs, existingInsns, moveInsns); - /* move extra instructions to the slow path */ - if (!fast) { - return; - } - for (auto &in : as_const(moveInsns)) { - in->GetBB()->RemoveInsn(*in); - CHECK_FATAL(coldBB != nullptr, "null ptr check"); - coldBB->InsertInsnBegin(*in); - } - /* All instructions are in the right place, replace branch to ret bb to just ret. */ - /* Remove the lastInsn of gotoBB */ - if (returnBB->GetKind() == BB::kBBGoto) { - returnBB->RemoveInsn(*returnBB->GetLastInsn()); - } - BB *tgtBB = returnBB->GetSuccs().front(); - CHECK_FATAL(tgtBB->GetKind() == BB::kBBReturn, "check return bb of isolatefastpatch"); - CHECK_FATAL(tgtBB != nullptr, "null ptr check"); - FOR_BB_INSNS(insn, tgtBB) { - returnBB->AppendInsn(*insn); /* add the insns such as MOP_xret */ - } - returnBB->AppendInsn(cgFunc.GetInsnBuilder()->BuildInsn(MOP_xret)); - /* bb is now a retbb and has no succ. */ - returnBB->SetKind(BB::kBBReturn); - - // add to exitvec and common exitpreds - BB* commonExit = cgFunc.GetCommonExitBB(); - auto cEpredtgt = std::find(commonExit->GetPredsBegin(), commonExit->GetPredsEnd(), tgtBB); - const auto cEpredreturn = std::find(commonExit->GetPredsBegin(), commonExit->GetPredsEnd(), returnBB); - if (cEpredtgt == commonExit->GetPredsEnd() || cEpredreturn != commonExit->GetPredsEnd()) { - CHECK_FATAL(false, "check case in isolatefast"); - } - commonExit->RemovePreds(*tgtBB); - commonExit->PushBackPreds(*returnBB); - - auto commonExitVecTgt = std::find(cgFunc.GetExitBBsVec().begin(), cgFunc.GetExitBBsVec().end(), tgtBB); - auto commonExitVecRet = std::find(cgFunc.GetExitBBsVec().begin(), cgFunc.GetExitBBsVec().end(), returnBB); - if (commonExitVecTgt == cgFunc.GetExitBBsVec().end() || commonExitVecRet != cgFunc.GetExitBBsVec().end()) { - CHECK_FATAL(false, "check case in isolatefast"); - } - (void)cgFunc.GetExitBBsVec().erase(commonExitVecTgt); - cgFunc.GetExitBBsVec().push_back(returnBB); - - MapleList::const_iterator predIt = std::find(tgtBB->GetPredsBegin(), tgtBB->GetPredsEnd(), returnBB); - (void)tgtBB->ErasePreds(predIt); - tgtBB->ClearInsns(); - returnBB->ClearSuccs(); - if (tgtBB->GetPrev() != nullptr && tgtBB->GetNext() != nullptr) { - tgtBB->GetPrev()->SetNext(tgtBB->GetNext()); - tgtBB->GetNext()->SetPrev(tgtBB->GetPrev()); - } - SetFastPathReturnBB(returnBB); - cgFunc.SetPrologureBB(*coldBB); -} - -void AArch64IsolateFastPath::Run() { - IsolateFastPathOpt(); -} -} /* namespace maplebe */ diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_memlayout.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_memlayout.cpp index 4eaffbe3b3..85fffb12e7 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_memlayout.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_memlayout.cpp @@ -307,7 +307,7 @@ void AArch64MemLayout::LayoutFormalParams() { // ||----------------------------| // | args to pass through stack | // ||----------------------------| -static const uint64 localAreaSizeThreshold = 0; +static const uint64 kLocalAreaSizeThreshold = 0; void AArch64MemLayout::LayoutLocalsInSize(const MIRSymbol &mirSym) { TyIdx tyIdx = mirSym.GetTyIdx(); SymbolAlloc *symLoc = symAllocTable[mirSym.GetStIndex()]; @@ -315,7 +315,7 @@ void AArch64MemLayout::LayoutLocalsInSize(const MIRSymbol &mirSym) { uint32 align = ty->GetAlign(); uint32 tSize = 0; MemSegment *currentSeg = &segLocals; - if (segLocals.GetSize() < localAreaSizeThreshold) { + if (segLocals.GetSize() < kLocalAreaSizeThreshold) { symLoc->SetMemSegment(segLocals); } else { symLoc->SetMemSegment(segCold); diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_offset_adjust.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_offset_adjust.cpp index f6b906a48b..9390300d61 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_offset_adjust.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_offset_adjust.cpp @@ -139,8 +139,21 @@ void AArch64FPLROffsetAdjustment::AdjustmentOffsetForImmOpnd(Insn &insn, uint32 } if (!aarchCGFunc->IsOperandImmValid(insn.GetMachineOpcode(), &immOpnd, index)) { if (insn.GetMachineOpcode() == MOP_xaddsrri12 || insn.GetMachineOpcode() == MOP_waddsrri12) { - insn.Dump(); - CHECK_FATAL(false, "NYI, need a better away to process 'adds' "); + bool is64bit = insn.GetOperand(kInsnFirstOpnd).GetSize() == k64BitSize; + MOperator tempMovOp = is64bit ? MOP_xmovri64 : MOP_wmovri32; + MOperator tempAddsOp = is64bit ? MOP_xaddsrrr : MOP_waddsrrr; + RegOperand &ccOpnd = static_cast(insn.GetOperand(kInsnFirstOpnd)); + RegOperand &srcOpnd = static_cast(insn.GetOperand(kInsnThirdOpnd)); + RegOperand &dstOpnd = static_cast(insn.GetOperand(kInsnSecondOpnd)); + Insn &tempMov = cgFunc->GetInsnBuilder()->BuildInsn(tempMovOp, dstOpnd, immOpnd); + Insn &tempAdds = cgFunc->GetInsnBuilder()->BuildInsn(tempAddsOp, ccOpnd, dstOpnd, srcOpnd, dstOpnd); + (void)insn.GetBB()->InsertInsnBefore(insn, tempMov); + if (!VERIFY_INSN(&tempMov)) { + SPLIT_INSN(&tempMov, cgFunc); + } + (void)insn.GetBB()->InsertInsnBefore(insn, tempAdds); + insn.GetBB()->RemoveInsn(insn); + return; } else if (insn.GetMachineOpcode() >= MOP_xaddrri24 && insn.GetMachineOpcode() <= MOP_waddrri12) { PrimType destTy = static_cast(insn.GetOperand(kInsnFirstOpnd)).GetSize() == k64BitSize ? PTY_i64 : PTY_i32; @@ -171,6 +184,7 @@ void AArch64FPLROffsetAdjustment::AdjustmentOffsetForImmOpnd(Insn &insn, uint32 insn.GetBB()->RemoveInsn(insn); return; } else { + insn.Dump(); CHECK_FATAL(false, "NIY"); } } diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_peep.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_peep.cpp index 2fe4e66c58..7c5e38eef3 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_peep.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_peep.cpp @@ -188,6 +188,7 @@ bool AArch64CGPeepHole::DoSSAOptimize(BB &bb, Insn &insn) { case MOP_wcselrrrc: case MOP_xcselrrrc: { manager->Optimize(true); + manager->Optimize(true); break; } case MOP_wiorrrr: @@ -515,7 +516,7 @@ bool LdrCmpPattern::SetInsns() { } ldr1 = ldr2->GetPreviousMachineInsn(); /* ldr1 must be firstInsn in currBB */ - if (currInsn->GetBB()->GetFirstInsn() != ldr1) { + if (currInsn->GetBB()->GetFirstMachineInsn() != ldr1) { return false; } if (!IsBne(currInsn->GetNextMachineInsn())) { @@ -528,10 +529,10 @@ bool LdrCmpPattern::SetInsns() { if ((prevBB == nullptr) || (predBBs.size() != 1) || (prevBB != *predBBs.begin())) { return false; } - if (!IsBne(prevBB->GetLastInsn())) { + if (!IsBne(prevBB->GetLastMachineInsn())) { return false; } - bne2 = prevBB->GetLastInsn(); + bne2 = prevBB->GetLastMachineInsn(); if (!IsCmp(bne2->GetPreviousMachineInsn())) { return false; } @@ -943,6 +944,81 @@ void CselToCsetPattern::Run(BB &bb, Insn &insn) { } } +bool CselToCsincRemoveMovPattern::IsOpndMovOneAndNewOpndOpt(const Insn &curInsn) { + auto &insnThirdOpnd = static_cast(curInsn.GetOperand(kInsnThirdOpnd)); + auto &insnSecondOpnd = static_cast(curInsn.GetOperand(kInsnSecondOpnd)); + auto &origCondOpnd = static_cast(curInsn.GetOperand(kInsnFourthOpnd)); + Insn *insnThirdOpndDefInsn = ssaInfo->GetDefInsn(insnThirdOpnd); + Insn *insnSecondOpndDefInsn = ssaInfo->GetDefInsn(insnSecondOpnd); + if (insnThirdOpndDefInsn == nullptr || insnSecondOpndDefInsn == nullptr) { + return false; + } + MOperator insnThirdOpndDefMop = insnThirdOpndDefInsn->GetMachineOpcode(); + MOperator insnSecondOpndDefMop = insnSecondOpndDefInsn->GetMachineOpcode(); + if (insnThirdOpndDefMop == MOP_wmovri32 || insnThirdOpndDefMop == MOP_xmovri64) { + prevMovInsn = insnThirdOpndDefInsn; + } else if (insnSecondOpndDefMop == MOP_wmovri32 || insnSecondOpndDefMop == MOP_xmovri64){ + prevMovInsn = insnSecondOpndDefInsn; + needReverseCond = true; + } else { + return false; + } + auto &prevMovImmOpnd = static_cast(prevMovInsn->GetOperand(kInsnSecondOpnd)); + auto val = prevMovImmOpnd.GetValue(); + if (val != 1) { + return false; + } + if (needReverseCond) { + newSecondOpnd = &insnThirdOpnd; + ConditionCode inverseCondCode = AArch64isa::GetReverseCC(origCondOpnd.GetCode()); + if (inverseCondCode == kCcLast) { + return false; + } + auto *aarFunc = static_cast(cgFunc); + CondOperand &inverseCondOpnd = aarFunc->GetCondOperand(inverseCondCode); + cond = &inverseCondOpnd; + } else { + newSecondOpnd = &insnSecondOpnd; + cond = &origCondOpnd; + } + return true; +} + +bool CselToCsincRemoveMovPattern::CheckCondition(Insn &insn) { + MOperator curMop = insn.GetMachineOpcode(); + if (curMop != MOP_xcselrrrc && curMop != MOP_wcselrrrc) { + return false; + } + if (!IsOpndMovOneAndNewOpndOpt(insn)) { + return false; + } + return true; +} + +void CselToCsincRemoveMovPattern::Run(BB &bb, Insn &insn) { + if (!CheckCondition(insn)) { + return; + } + uint32 dstOpndSize = insn.GetOperandSize(kInsnFirstOpnd); + MOperator newMop = (dstOpndSize == k64ByteSize) ? MOP_xcsincrrrc : MOP_wcsincrrrc; + Operand &ccReg = insn.GetOperand(kInsnFifthOpnd); + RegOperand &zeroOpnd = cgFunc->GetZeroOpnd(dstOpndSize); + auto &insnFirstOpnd = static_cast(insn.GetOperand(kInsnFirstOpnd)); + Insn &newInsn = cgFunc->GetInsnBuilder()->BuildInsn(newMop, insnFirstOpnd, *static_cast(newSecondOpnd), + zeroOpnd, *static_cast(cond), ccReg); + bb.ReplaceInsn(insn, newInsn); + // updata ssa info + ssaInfo->ReplaceInsn(insn, newInsn); + optSuccess = true; + SetCurrInsn(&newInsn); + // dump pattern info + if (CG_PEEP_DUMP) { + std::vector prevs; + prevs.emplace_back(prevMovInsn); + DumpAfterPattern(prevs, &insn, &newInsn); + } +} + bool CsetToCincPattern::CheckDefInsn(const RegOperand &opnd, Insn &insn) { Insn *tempDefInsn = ssaInfo->GetDefInsn(opnd); if (tempDefInsn != nullptr && tempDefInsn->GetBB()->GetId() == insn.GetBB()->GetId()) { @@ -1115,6 +1191,9 @@ void AndCmpBranchesToTbzPattern::Run(BB &bb, Insn &insn) { ImmOperand &tbzImmOpnd = aarFunc->CreateImmOperand(tbzImmVal, k8BitSize, false); Insn &newInsn = cgFunc->GetInsnBuilder()->BuildInsn( newMop, prevAndInsn->GetOperand(kInsnSecondOpnd), tbzImmOpnd, labelOpnd); + if (!VERIFY_INSN(&newInsn)) { + return; + } bb.ReplaceInsn(insn, newInsn); /* update ssa info */ ssaInfo->ReplaceInsn(insn, newInsn); @@ -1327,6 +1406,9 @@ void ZeroCmpBranchesToTbzPattern::Run(BB &bb, Insn &insn) { (regOpnd->GetSize() <= k32BitSize) ? (k32BitSize - 1) : (k64BitSize - 1), k8BitSize, false); auto &labelOpnd = static_cast(insn.GetOperand(kInsnSecondOpnd)); Insn &newInsn = cgFunc->GetInsnBuilder()->BuildInsn(newMop, *static_cast(regOpnd), bitOpnd, labelOpnd); + if (!VERIFY_INSN(&newInsn)) { + return; + } bb.ReplaceInsn(insn, newInsn); /* update ssa info */ ssaInfo->ReplaceInsn(insn, newInsn); @@ -1649,6 +1731,7 @@ bool AndCbzToTbzPattern::CheckCondition(Insn &insn) { void AndCbzToTbzPattern::Run(BB &bb, Insn &insn) { auto *aarchFunc = static_cast(cgFunc); + bool isDeleted = false; if (!CheckCondition(insn)) { return; } @@ -1678,20 +1761,47 @@ void AndCbzToTbzPattern::Run(BB &bb, Insn &insn) { } auto &labelOpnd = static_cast(insn.GetOperand(kInsnSecondOpnd)); ImmOperand &tbzImm = aarchFunc->CreateImmOperand(tbzVal, k8BitSize, false); - Insn &newInsn = cgFunc->GetInsnBuilder()->BuildInsn(newMop, prevInsn->GetOperand(kInsnSecondOpnd), - tbzImm, labelOpnd); - bb.ReplaceInsn(insn, newInsn); + Insn *newInsn = nullptr; + // if bit offset is invalid (implicit zero), then it should be a unconditional branch + if(!aarchFunc->IsOperandImmValid(newMop, &tbzImm, kInsnSecondOpnd)) { + // cfg adjustment in ssa is complicate, so we just bypass this pattern if imm is invalid. + if (ssaInfo) { + return; + } + if (newMop == MOP_wtbz) { + newInsn = &aarchFunc->GetInsnBuilder()->BuildInsn(MOP_xuncond, labelOpnd); + BB *bbFt = bb.GetNext(); + bbFt->RemovePreds(bb); + bb.SetKind(BB::kBBGoto); + bb.RemoveSuccs(*bbFt); + } else if (newMop == MOP_wtbnz) { + BB *targetBB = cgFunc->GetBBFromLab2BBMap(labelOpnd.GetLabelIndex()); + targetBB->RemovePreds(bb); + bb.SetKind(BB::kBBFallthru); + bb.RemoveSuccs(*targetBB); + bb.RemoveInsn(insn); + isDeleted = true; + } else { + CHECK_FATAL(false, "only wtbz/wtbnz can have invalid imm"); + } + } else { + newInsn = &cgFunc->GetInsnBuilder()->BuildInsn(newMop, prevInsn->GetOperand(kInsnSecondOpnd), + tbzImm, labelOpnd); + } + if (!isDeleted) { + bb.ReplaceInsn(insn, *newInsn); + SetCurrInsn(newInsn); + } if (ssaInfo) { /* update ssa info */ - ssaInfo->ReplaceInsn(insn, newInsn); + ssaInfo->ReplaceInsn(insn, *newInsn); } optSuccess = true; - SetCurrInsn(&newInsn); /* dump pattern info */ if (CG_PEEP_DUMP) { std::vector prevs; prevs.emplace_back(prevInsn); - DumpAfterPattern(prevs, &insn, &newInsn); + DumpAfterPattern(prevs, &insn, newInsn); } } @@ -2138,7 +2248,7 @@ void ElimSpecificExtensionPattern::ReplaceExtWithMov(Insn &currInsn) { } void ElimSpecificExtensionPattern::ElimExtensionAfterMov(Insn &insn) { - if (&insn == currBB->GetFirstInsn() || extTypeIdx == AND) { + if (&insn == currBB->GetFirstMachineInsn() || extTypeIdx == AND) { return; } auto &prevDstOpnd = static_cast(prevInsn->GetOperand(kInsnFirstOpnd)); @@ -2354,7 +2464,7 @@ void ElimSpecificExtensionPattern::Run(BB& /* bb */, Insn &insn) { } void OneHoleBranchPattern::FindNewMop(const BB &bb, const Insn &insn) { - if (&insn != bb.GetLastInsn()) { + if (&insn != bb.GetLastMachineInsn()) { return; } MOperator thisMop = insn.GetMachineOpcode(); @@ -2422,6 +2532,9 @@ void OneHoleBranchPattern::Run(BB &bb, Insn &insn) { ImmOperand &oneHoleOpnd = aarch64CGFunc->CreateImmOperand(0, k8BitSize, false); auto ®Operand = static_cast(prePrevInsn->GetOperand(kInsnSecondOpnd)); Insn &newTbzInsn = cgFunc->GetInsnBuilder()->BuildInsn(newOp, regOperand, oneHoleOpnd, label); + if (!VERIFY_INSN(&newTbzInsn)) { + return; + } bb.ReplaceInsn(insn, newTbzInsn); ssaInfo->ReplaceInsn(insn, newTbzInsn); optSuccess = true; @@ -3346,7 +3459,7 @@ void EliminateSpecifcUXTPattern::Run(BB &bb, Insn &insn) { MOperator thisMop = insn.GetMachineOpcode(); auto ®Opnd0 = static_cast(insn.GetOperand(kInsnFirstOpnd)); auto ®Opnd1 = static_cast(insn.GetOperand(kInsnSecondOpnd)); - if (&insn == bb.GetFirstInsn() || regOpnd0.GetRegisterNumber() != regOpnd1.GetRegisterNumber() || + if (&insn == bb.GetFirstMachineInsn() || regOpnd0.GetRegisterNumber() != regOpnd1.GetRegisterNumber() || !prevInsn->IsMachineInstruction()) { return; } @@ -3426,7 +3539,7 @@ bool FmovRegPattern::CheckCondition(Insn &insn) { if (nextInsn == nullptr) { return false; } - if (&insn == insn.GetBB()->GetFirstInsn()) { + if (&insn == insn.GetBB()->GetFirstMachineInsn()) { return false; } prevInsn = insn.GetPrev(); @@ -3670,7 +3783,8 @@ void CbnzToCbzPattern::Run(BB &bb, Insn &insn) { bool ContiLDRorSTRToSameMEMPattern::CheckCondition(Insn &insn) { prevInsn = insn.GetPrev(); - while (prevInsn != nullptr && prevInsn->GetMachineOpcode() == 0 && prevInsn != insn.GetBB()->GetFirstInsn()) { + while (prevInsn != nullptr && (prevInsn->GetMachineOpcode() == 0 || !prevInsn->IsMachineInstruction()) && + prevInsn != insn.GetBB()->GetFirstMachineInsn()) { prevInsn = prevInsn->GetPrev(); } if (!insn.IsMachineInstruction() || prevInsn == nullptr) { @@ -3749,7 +3863,7 @@ void ContiLDRorSTRToSameMEMPattern::Run(BB &bb, Insn &insn) { newOp = (reg1.GetSize() <= k32BitSize) ? MOP_xvmovs : MOP_xvmovd; } Insn *nextInsn = insn.GetNext(); - while (nextInsn != nullptr && nextInsn->GetMachineOpcode() == 0 && nextInsn != bb.GetLastInsn()) { + while (nextInsn != nullptr && nextInsn->GetMachineOpcode() == 0 && nextInsn != bb.GetLastMachineInsn()) { nextInsn = nextInsn->GetNext(); } bool moveSameReg = false; @@ -4203,7 +4317,7 @@ bool DeleteMovAfterCbzOrCbnzAArch64::OpndDefByMovZero(const Insn &insn) const { /* check whether predefine insn of first operand of test_insn is exist in current BB */ bool DeleteMovAfterCbzOrCbnzAArch64::NoPreDefine(Insn &testInsn) const { Insn *nextInsn = nullptr; - for (Insn *insn = testInsn.GetBB()->GetFirstInsn(); insn != nullptr && insn != &testInsn; insn = nextInsn) { + for (Insn *insn = testInsn.GetBB()->GetFirstMachineInsn(); insn != nullptr && insn != &testInsn; insn = nextInsn) { nextInsn = insn->GetNextMachineInsn(); if (!insn->IsMachineInstruction()) { continue; @@ -5019,6 +5133,9 @@ void NormRevTbzToTbzPattern::Run(BB &bb, Insn &insn) { MOperator useMop = tbzInsn->GetMachineOpcode(); Insn &newInsn = cgFunc->GetInsnBuilder()->BuildInsn(useMop, insn.GetOperand(kInsnSecondOpnd), newImmOpnd, tbzInsn->GetOperand(kInsnThirdOpnd)); + if (!VERIFY_INSN(&newInsn)) { + return; + } bb.ReplaceInsn(*tbzInsn, newInsn); optSuccess = true; /* dump pattern info */ @@ -5029,9 +5146,30 @@ void NormRevTbzToTbzPattern::Run(BB &bb, Insn &insn) { } } +Insn *AddSubMergeLdStPattern::FindRegInBB(const Insn &insn, bool isAbove) const { + regno_t regNO = static_cast(insn.GetOperand(kInsnFirstOpnd)).GetRegisterNumber(); + for (Insn *resInsn = isAbove ? insn.GetPreviousMachineInsn() : insn.GetNextMachineInsn(); resInsn != nullptr; + resInsn = isAbove ? resInsn->GetPreviousMachineInsn() : resInsn->GetNextMachineInsn()) { + if (resInsn->GetDesc()->IsCall() || resInsn->GetDesc()->IsInlineAsm() || resInsn->GetDesc()->IsSpecialIntrinsic()) { + return nullptr; + } + if (resInsn->ScanReg(regNO)) { + return resInsn; + } + } + return nullptr; +} + bool AddSubMergeLdStPattern::CheckCondition(Insn &insn) { - nextInsn = insn.GetNextMachineInsn(); - prevInsn = insn.GetPreviousMachineInsn(); + insnDefReg = &static_cast(insn.GetOperand(kInsnFirstOpnd)); + insnUseReg = &static_cast(insn.GetOperand(kInsnSecondOpnd)); + regno_t insnDefRegNO = insnDefReg->GetRegisterNumber(); + regno_t insnUseRegNO = insnUseReg->GetRegisterNumber(); + if (insnDefRegNO != insnUseRegNO) { + return false; + } + nextInsn = FindRegInBB(insn, false); + prevInsn = FindRegInBB(insn, true); isAddSubFront = CheckIfCanBeMerged(nextInsn, insn); isLdStFront = CheckIfCanBeMerged(prevInsn, insn); // If prev & next all can be merged, only one will be merged, otherwise #imm will be add/sub twice. @@ -5041,7 +5179,7 @@ bool AddSubMergeLdStPattern::CheckCondition(Insn &insn) { return isAddSubFront || isLdStFront; } -bool AddSubMergeLdStPattern::CheckIfCanBeMerged(const Insn *adjacentInsn, const Insn &insn) { +bool AddSubMergeLdStPattern::CheckIfCanBeMerged(const Insn *adjacentInsn, const Insn& /* insn */) { if (adjacentInsn == nullptr || adjacentInsn->IsVectorOp() || (!adjacentInsn->AccessMem())) { return false; } @@ -5052,17 +5190,13 @@ bool AddSubMergeLdStPattern::CheckIfCanBeMerged(const Insn *adjacentInsn, const } MemOperand *memOpnd = &static_cast(opnd); // load/store memopnd offset value must be #0 - if (memOpnd->GetAddrMode() != MemOperand::kBOI || - AArch64isa::GetMemOpndOffsetValue(memOpnd) != static_cast(k0BitSize)) { + if (memOpnd->GetAddrMode() != MemOperand::kBOI || AArch64isa::GetMemOpndOffsetValue(memOpnd) != 0) { return false; } - insnDefReg = &static_cast(insn.GetOperand(kInsnFirstOpnd)); - insnUseReg = &static_cast(insn.GetOperand(kInsnSecondOpnd)); RegOperand *memUseReg = memOpnd->GetBaseRegister(); regno_t insnDefRegNO = insnDefReg->GetRegisterNumber(); - regno_t insnUseRegNO = insnUseReg->GetRegisterNumber(); regno_t memUseRegNO = memUseReg->GetRegisterNumber(); - if ((insnDefRegNO != memUseRegNO) || (insnDefRegNO != insnUseRegNO) || (insnUseRegNO != memUseRegNO)) { + if (insnDefRegNO != memUseRegNO) { return false; } // When load/store insn def & use regno are the same, it will trigger unpredictable transfer with writeback. @@ -5143,6 +5277,9 @@ void UbfxAndCbzToTbzPattern::Run(BB& /* bb */, Insn &insn) { return; } Insn *newInsn = &cgFunc->GetInsnBuilder()->BuildInsn(newMop, opnd2, imm3, label); + if (!VERIFY_INSN(newInsn)) { + return; + } BB *useInsnBB = useInsn->GetBB(); useInsnBB->ReplaceInsn(*useInsn, *newInsn); if (ssaInfo) { diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_pgo_gen.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_pgo_gen.cpp index 0211479a49..dbba5065d0 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_pgo_gen.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_pgo_gen.cpp @@ -17,13 +17,17 @@ namespace maplebe { void AArch64ProfGen::InstrumentBB(BB &bb, MIRSymbol &countTab, uint32 offset) { regno_t freeUseRegNo = R30; + auto *a64Func = static_cast(f); for (regno_t reg = R8; reg < R29; ++reg) { if (bb.GetLiveInRegNO().count(reg) == 0 && reg != R16) { - freeUseRegNo = reg; - break; + if (!AArch64Abi::IsCalleeSavedReg(static_cast(reg)) || + (AArch64Abi::IsCalleeSavedReg(static_cast(reg)) && + a64Func->IsUsedCalleeSavedReg(static_cast(reg)))) { + freeUseRegNo = reg; + break; + } } } - auto *a64Func = static_cast(f); StImmOperand &funcPtrSymOpnd = a64Func->CreateStImmOperand(countTab, 0, 0); RegOperand &tempRegOpnd = a64Func->GetOrCreatePhysicalRegisterOperand( static_cast(freeUseRegNo), k64BitSize, kRegTyInt); diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_proepilog.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_proepilog.cpp index 8278f7a505..6f288fedb5 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_proepilog.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_proepilog.cpp @@ -18,6 +18,8 @@ #include "cgfunc.h" #include "cg_irbuilder.h" +#define PROEPILOG_DUMP CG_DEBUG_FUNC(cgFunc) + namespace maplebe { using namespace maple; @@ -65,18 +67,17 @@ inline void AppendInstructionTo(Insn &insn, CGFunc &func) { } } -bool AArch64GenProEpilog::NeedProEpilog() { +static inline bool AArch64NeedProEpilog(CGFunc &cgFunc) { if (cgFunc.GetMirModule().GetSrcLang() != kSrcLangC) { return true; } else if (cgFunc.GetFunction().GetAttr(FUNCATTR_varargs) || cgFunc.HasVLAOrAlloca()) { return true; } - bool funcHasCalls = false; - /* note that tailcall insn is not a call */ + // note that tailcall insn is not a call FOR_ALL_BB(bb, &cgFunc) { FOR_BB_INSNS_REV(insn, bb) { if (insn->IsMachineInstruction() && (insn->IsCall() || insn->IsSpecialCall())) { - funcHasCalls = true; + return true; } } } @@ -85,7 +86,7 @@ bool AArch64GenProEpilog::NeedProEpilog() { aarchCGFunc.GetCalleeSavedRegs() : aarchCGFunc.GetProEpilogSavedRegs(); size_t calleeSavedRegSize = kOneRegister; CHECK_FATAL(regsToRestore.size() >= calleeSavedRegSize, "Forgot LR ?"); - if (funcHasCalls || regsToRestore.size() > calleeSavedRegSize || aarchCGFunc.HasStackLoadStore() || + if (regsToRestore.size() > calleeSavedRegSize || aarchCGFunc.HasStackLoadStore() || static_cast(cgFunc.GetMemlayout())->GetSizeOfLocals() > 0 || static_cast(cgFunc.GetMemlayout())->GetSizeOfCold() > 0 || cgFunc.GetFunction().GetAttr(FUNCATTR_callersensitive)) { @@ -94,6 +95,14 @@ bool AArch64GenProEpilog::NeedProEpilog() { return false; } +bool AArch64ProEpilogAnalysis::NeedProEpilog() { + return AArch64NeedProEpilog(cgFunc); +} + +bool AArch64GenProEpilog::NeedProEpilog() { + return AArch64NeedProEpilog(cgFunc); +} + // RealStackFrameSize - [GR,16] - [VR,16] - 8 (from fp to stack protect area) // We allocate 16 byte for stack protect area MemOperand *AArch64GenProEpilog::GetDownStack() { @@ -144,12 +153,11 @@ void AArch64GenProEpilog::GenStackGuard() { } void AArch64GenProEpilog::AddStackGuard(BB &bb) { - if (!stackProtect) { + if (!cgFunc.GetNeedStackProtect()) { return; } BB *formerCurBB = cgFunc.GetCurBB(); auto &aarchCGFunc = static_cast(cgFunc); - aarchCGFunc.GetDummyBB()->SetIsProEpilog(true); GenStackGuard(); RegOperand &stAddrOpnd = aarchCGFunc.GetOrCreatePhysicalRegisterOperand(R9, GetPointerBitSize(), kRegTyInt); @@ -159,12 +167,34 @@ void AArch64GenProEpilog::AddStackGuard(BB &bb) { cgFunc.GetCurBB()->AppendInsn(tmpInsn); bb.InsertAtBeginning(*aarchCGFunc.GetDummyBB()); - aarchCGFunc.GetDummyBB()->SetIsProEpilog(false); cgFunc.SetCurBB(*formerCurBB); } +BB &AArch64GenProEpilog::GetOrGenStackGuardCheckFailBB(BB &bb) { + if (stackChkFailBB != nullptr) { + return *stackChkFailBB; + } + BB *formerCurBB = cgFunc.GetCurBB(); + auto &aarchCGFunc = static_cast(cgFunc); + + // create new check fail BB + auto failLable = aarchCGFunc.CreateLabel(); + stackChkFailBB = aarchCGFunc.CreateNewBB(failLable, bb.IsUnreachable(), BB::kBBFallthru, bb.GetFrequency()); + cgFunc.SetCurBB(*stackChkFailBB); + MIRSymbol *failFunc = GlobalTables::GetGsymTable().GetSymbolFromStrIdx( + GlobalTables::GetStrTable().GetStrIdxFromName(std::string("__stack_chk_fail"))); + ListOperand *srcOpnds = aarchCGFunc.CreateListOpnd(*cgFunc.GetFuncScopeAllocator()); + Insn &callInsn = aarchCGFunc.AppendCall(*failFunc, *srcOpnds); + callInsn.SetDoNotRemove(true); + ASSERT_NOT_NULL(cgFunc.GetLastBB()); + cgFunc.GetLastBB()->PrependBB(*stackChkFailBB); + + cgFunc.SetCurBB(*formerCurBB); + return *stackChkFailBB; +} + void AArch64GenProEpilog::GenStackGuardCheckInsn(BB &bb) { - if (!stackProtect) { + if (!cgFunc.GetNeedStackProtect()) { return; } @@ -181,20 +211,15 @@ void AArch64GenProEpilog::GenStackGuardCheckInsn(BB &bb) { cgFunc.GetCurBB()->AppendInsn(newInsn); cgFunc.SelectBxor(stAddrOpnd, stAddrOpnd, checkOp, PTY_u64); - LabelIdx failLable = aarchCGFunc.CreateLabel(); - aarchCGFunc.SelectCondGoto(aarchCGFunc.GetOrCreateLabelOperand(failLable), OP_brtrue, OP_ne, - stAddrOpnd, aarchCGFunc.CreateImmOperand(0, k64BitSize, false), PTY_u64, false); + auto &failBB = GetOrGenStackGuardCheckFailBB(bb); + aarchCGFunc.SelectCondGoto(aarchCGFunc.GetOrCreateLabelOperand(failBB.GetLabIdx()), OP_brtrue, OP_ne, + stAddrOpnd, aarchCGFunc.CreateImmOperand(0, k64BitSize, false), PTY_u64, false, BB::kUnknownProb); auto chkBB = cgFunc.CreateNewBB(bb.GetLabIdx(), bb.IsUnreachable(), BB::kBBIf, bb.GetFrequency()); chkBB->AppendBBInsns(bb); bb.ClearInsns(); - Insn *lastInsn = chkBB->GetLastInsn(); - while (lastInsn != nullptr && (!lastInsn->IsMachineInstruction() || - AArch64isa::IsPseudoInstruction(lastInsn->GetMachineOpcode()))) { - lastInsn = lastInsn->GetPrev(); - } - bool isTailCall = lastInsn == nullptr ? false : lastInsn->IsTailCall(); - if (isTailCall) { + auto *lastInsn = chkBB->GetLastMachineInsn(); + if (lastInsn != nullptr && (lastInsn->IsTailCall() || lastInsn->IsBranch())) { chkBB->RemoveInsn(*lastInsn); bb.AppendInsn(*lastInsn); } @@ -206,8 +231,7 @@ void AArch64GenProEpilog::GenStackGuardCheckInsn(BB &bb) { chkBB->PushBackSuccs(bb); auto &originPreds = bb.GetPreds(); for (auto pred : originPreds) { - pred->RemoveSuccs(bb); - pred->PushBackSuccs(*chkBB); + pred->ReplaceSucc(bb, *chkBB); chkBB->PushBackPreds(*pred); } LabelIdx nextLable = aarchCGFunc.CreateLabel(); @@ -215,21 +239,8 @@ void AArch64GenProEpilog::GenStackGuardCheckInsn(BB &bb) { cgFunc.SetLab2BBMap(nextLable, bb); bb.ClearPreds(); bb.PushBackPreds(*chkBB); - - BB *newBB = aarchCGFunc.CreateNewBB(failLable, bb.IsUnreachable(), BB::kBBGoto, bb.GetFrequency()); - cgFunc.SetCurBB(*newBB); - MIRSymbol *failFunc = GlobalTables::GetGsymTable().GetSymbolFromStrIdx( - GlobalTables::GetStrTable().GetStrIdxFromName(std::string("__stack_chk_fail"))); - ListOperand *srcOpnds = aarchCGFunc.CreateListOpnd(*cgFunc.GetFuncScopeAllocator()); - Insn &callInsn = aarchCGFunc.AppendCall(*failFunc, *srcOpnds); - callInsn.SetDoNotRemove(true); - LabelOperand &targetOpnd = cgFunc.GetOrCreateLabelOperand(bb.GetLabIdx()); - newBB->AppendInsn(cgFunc.GetInsnBuilder()->BuildInsn(MOP_xuncond, targetOpnd)); - bb.AppendBB(*newBB); - chkBB->PushBackSuccs(*newBB); - newBB->PushBackPreds(*chkBB); - newBB->PushBackSuccs(bb); - bb.PushBackPreds(*newBB); + chkBB->PushBackSuccs(failBB); + failBB.PushBackPreds(*chkBB); cgFunc.SetCurBB(*formerCurBB); } @@ -720,18 +731,21 @@ void AArch64GenProEpilog::AppendInstructionStackCheck(AArch64reg reg, RegType rt } void AArch64GenProEpilog::GenerateProlog(BB &bb) { + if (!cgFunc.GetHasProEpilogue()) { + return; + } + if (PROEPILOG_DUMP) { + LogInfo::MapleLogger() << "generate prolog at BB " << bb.GetId() << "\n"; + } + + AddStackGuard(bb); + auto &aarchCGFunc = static_cast(cgFunc); CG *currCG = cgFunc.GetCG(); BB *formerCurBB = cgFunc.GetCurBB(); aarchCGFunc.GetDummyBB()->ClearInsns(); - aarchCGFunc.GetDummyBB()->SetIsProEpilog(true); cgFunc.SetCurBB(*aarchCGFunc.GetDummyBB()); - bool hasProEpilogue = cgFunc.GetHasProEpilogue(); - if (!hasProEpilogue) { - return; - } - // insert .loc for function if (currCG->GetCGOptions().WithLoc() && (!currCG->GetMIRModule()->IsCModule())) { MIRFunction *func = &cgFunc.GetFunction(); @@ -809,10 +823,13 @@ void AArch64GenProEpilog::GenerateProlog(BB &bb) { } bb.InsertAtBeginning(*aarchCGFunc.GetDummyBB()); cgFunc.SetCurBB(*formerCurBB); - aarchCGFunc.GetDummyBB()->SetIsProEpilog(false); } void AArch64GenProEpilog::GenerateRet(BB &bb) { + auto *lastInsn = bb.GetLastMachineInsn(); + if (lastInsn != nullptr && (lastInsn->IsTailCall() || lastInsn->IsBranch())) { + return; + } /* Insert the loc insn before ret insn so that the breakpoint can break at the end of the block's reverse parenthesis line. */ SrcPosition pos = cgFunc.GetFunction().GetScope()->GetRangeHigh(); @@ -928,6 +945,7 @@ void AArch64GenProEpilog::AppendInstructionDeallocateCallFrame(AArch64reg reg0, Insn &deallocInsn = cgFunc.GetInsnBuilder()->BuildInsn(mOp, o0, o1, *o2); cgFunc.GetCurBB()->AppendInsn(deallocInsn); } + cgFunc.GetCurBB()->GetLastInsn()->SetStackRevert(true); } void AArch64GenProEpilog::AppendInstructionDeallocateCallFrameDebug(AArch64reg reg0, AArch64reg reg1, RegType rty) { @@ -984,6 +1002,7 @@ void AArch64GenProEpilog::AppendInstructionDeallocateCallFrameDebug(AArch64reg r Operand &immOpnd = aarchCGFunc.CreateImmOperand(stackFrameSize, k32BitSize, true); aarchCGFunc.SelectAdd(spOpnd, spOpnd, immOpnd, PTY_u64); } + cgFunc.GetCurBB()->GetLastInsn()->SetStackRevert(true); } void AArch64GenProEpilog::GeneratePopRegs() { @@ -1101,7 +1120,6 @@ void AArch64GenProEpilog::AppendJump(const MIRSymbol &funcSymbol) { void AArch64GenProEpilog::AppendBBtoEpilog(BB &epilogBB, BB &newBB) { if (epilogBB.GetPreds().empty() && &epilogBB != cgFunc.GetFirstBB() && cgFunc.GetMirModule().IsCModule() && CGOptions::DoTailCallOpt()) { - epilogBB.SetNeedRestoreCfi(false); Insn &junk = cgFunc.GetInsnBuilder()->BuildInsn(MOP_pseudo_none); epilogBB.AppendInsn(junk); return; @@ -1109,33 +1127,24 @@ void AArch64GenProEpilog::AppendBBtoEpilog(BB &epilogBB, BB &newBB) { FOR_BB_INSNS(insn, &newBB) { insn->SetDoNotRemove(true); } - Insn *lastInsn = epilogBB.GetLastInsn(); - while (lastInsn != nullptr && (!lastInsn->IsMachineInstruction() || - AArch64isa::IsPseudoInstruction(lastInsn->GetMachineOpcode()))) { - lastInsn = lastInsn->GetPrev(); - } - bool isTailCall = lastInsn == nullptr ? false : lastInsn->IsTailCall(); - if (isTailCall) { - Insn *retInsn = newBB.GetLastInsn(); - if (retInsn != nullptr && retInsn->GetMachineOpcode() == MOP_xret) { - newBB.RemoveInsn(*retInsn); - } + auto *lastInsn = epilogBB.GetLastMachineInsn(); + if (lastInsn != nullptr && (lastInsn->IsTailCall() || lastInsn->IsBranch())) { epilogBB.RemoveInsn(*lastInsn); epilogBB.AppendBBInsns(newBB); epilogBB.AppendInsn(*lastInsn); } else { epilogBB.AppendBBInsns(newBB); } - epilogBB.SetNeedRestoreCfi(true); } void AArch64GenProEpilog::GenerateEpilog(BB &bb) { if (!cgFunc.GetHasProEpilogue()) { - if (!bb.GetPreds().empty() && !TestPredsOfRetBB(bb)) { - GenerateRet(bb); - } return; } + if (PROEPILOG_DUMP) { + LogInfo::MapleLogger() << "generate epilog at BB " << bb.GetId() << "\n"; + } + /* generate stack protected instruction */ GenStackGuardCheckInsn(bb); @@ -1143,7 +1152,6 @@ void AArch64GenProEpilog::GenerateEpilog(BB &bb) { CG *currCG = cgFunc.GetCG(); BB *formerCurBB = cgFunc.GetCurBB(); aarchCGFunc.GetDummyBB()->ClearInsns(); - aarchCGFunc.GetDummyBB()->SetIsProEpilog(true); cgFunc.SetCurBB(*aarchCGFunc.GetDummyBB()); Operand &spOpnd = aarchCGFunc.GetOrCreatePhysicalRegisterOperand(RSP, k64BitSize, kRegTyInt); Operand &fpOpnd = aarchCGFunc.GetOrCreatePhysicalRegisterOperand(stackBaseReg, k64BitSize, kRegTyInt); @@ -1172,6 +1180,7 @@ void AArch64GenProEpilog::GenerateEpilog(BB &bb) { if (stackFrameSize > 0) { Operand &immOpnd = aarchCGFunc.CreateImmOperand(stackFrameSize, k32BitSize, true); aarchCGFunc.SelectAdd(spOpnd, spOpnd, immOpnd, PTY_u64); + aarchCGFunc.GetCurBB()->GetLastInsn()->SetStackRevert(true); } } } @@ -1180,14 +1189,12 @@ void AArch64GenProEpilog::GenerateEpilog(BB &bb) { AppendJump(*(currCG->GetDebugTraceExitFunction())); } - GenerateRet(*(cgFunc.GetCurBB())); AppendBBtoEpilog(bb, *cgFunc.GetCurBB()); if (cgFunc.GetCurBB()->GetHasCfi()) { bb.SetHasCfi(); } cgFunc.SetCurBB(*formerCurBB); - aarchCGFunc.GetDummyBB()->SetIsProEpilog(false); } void AArch64GenProEpilog::GenerateEpilogForCleanup(BB &bb) { @@ -1205,12 +1212,7 @@ void AArch64GenProEpilog::GenerateEpilogForCleanup(BB &bb) { void AArch64GenProEpilog::Run() { CHECK_FATAL(cgFunc.GetFunction().GetBody()->GetFirst()->GetOpCode() == OP_label, "The first statement should be a label"); - stackProtect = cgFunc.GetNeedStackProtect(); - cgFunc.SetHasProEpilogue(NeedProEpilog()); - if (cgFunc.GetHasProEpilogue()) { - AddStackGuard(*(cgFunc.GetFirstBB())); - } - + // update exitBB if (cgFunc.IsExitBBsVecEmpty()) { if (cgFunc.GetCleanupBB() != nullptr && cgFunc.GetCleanupBB()->GetPrev() != nullptr) { cgFunc.PushBackExitBBsVec(*cgFunc.GetCleanupBB()->GetPrev()); @@ -1219,18 +1221,33 @@ void AArch64GenProEpilog::Run() { } } - GenerateProlog(*(cgFunc.GetPrologureBB())); + cgFunc.SetHasProEpilogue(NeedProEpilog()); + if (saveInfo == nullptr || saveInfo->prologBBs.empty()) { + // not run proepilog analysis or analysis failed, insert proepilog at firstBB and exitBB + GenerateProlog(*(cgFunc.GetFirstBB())); - for (auto *exitBB : cgFunc.GetExitBBsVec()) { - // Do not generate epilog in fast-path-return BB - if (exitBB->IsFastPathReturn()) { - continue; + for (auto *exitBB : cgFunc.GetExitBBsVec()) { + GenerateEpilog(*exitBB); + } + + if (cgFunc.GetFunction().IsJava()) { + GenerateEpilogForCleanup(*(cgFunc.GetCleanupBB())); + } + } else { + CHECK_FATAL(cgFunc.GetMirModule().IsCModule(), "NIY, only support C"); + for (auto bbId : saveInfo->prologBBs) { + GenerateProlog(*cgFunc.GetBBFromID(bbId)); + } + for (auto bbId : saveInfo->epilogBBs) { + GenerateEpilog(*cgFunc.GetBBFromID(bbId)); } - GenerateEpilog(*exitBB); } - if (cgFunc.GetFunction().IsJava()) { - GenerateEpilogForCleanup(*(cgFunc.GetCleanupBB())); + // insert ret insn for exitBB + for (auto *exitBB : cgFunc.GetExitBBsVec()) { + if (cgFunc.GetHasProEpilogue() || (!exitBB->GetPreds().empty() && !TestPredsOfRetBB(*exitBB))) { + GenerateRet(*exitBB); + } } } } /* namespace maplebe */ diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_prop.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_prop.cpp index c21f79a153..9b69d29330 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_prop.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_prop.cpp @@ -64,9 +64,8 @@ bool AArch64Prop::IsInLimitCopyRange(VRegVersion *toBeReplaced) { } void AArch64Prop::CopyProp() { - PropOptimizeManager optManager; - optManager.Optimize(*cgFunc, GetSSAInfo(), GetRegll()); - optManager.Optimize(*cgFunc, GetSSAInfo()); + PropOptimizeManager::Optimize(*cgFunc, GetSSAInfo(), GetRegll()); + PropOptimizeManager::Optimize(*cgFunc, GetSSAInfo()); } void AArch64Prop::TargetProp(Insn &insn) { @@ -176,10 +175,16 @@ MOperator A64ConstProp::GetRegImmMOP(MOperator regregMop, bool withLeftShift) { case MOP_wiorrrrs: case MOP_wbfirri5i5: return MOP_wiorrri12; - case MOP_xmovrr: { + case MOP_xmovrr: + case MOP_xlslrri6: + case MOP_xlsrrri6: + case MOP_xasrrri6: { return MOP_xmovri64; } - case MOP_wmovrr: { + case MOP_wmovrr: + case MOP_wlslrri5: + case MOP_wlsrrri5: + case MOP_wasrrri5: { return MOP_wmovri32; } default: @@ -396,7 +401,7 @@ bool A64ConstProp::ArithmeticConstFold(DUInsnInfo &useDUInfo, const ImmOperand & return false; } -bool A64ConstProp::ShiftConstReplace(DUInsnInfo &useDUInfo, const ImmOperand &constOpnd) const { +bool A64ConstProp::ShiftConstReplace(DUInsnInfo &useDUInfo, const ImmOperand &constOpnd) { Insn *useInsn = useDUInfo.GetInsn(); MOperator curMop = useInsn->GetMachineOpcode(); if (useDUInfo.GetOperands().size() == 1) { @@ -405,7 +410,7 @@ bool A64ConstProp::ShiftConstReplace(DUInsnInfo &useDUInfo, const ImmOperand &co if (useOpndIdx == kInsnThirdOpnd) { auto &shiftBit = static_cast(useInsn->GetOperand(kInsnFourthOpnd)); int64 val = constOpnd.GetValue(); - if (shiftBit.GetShiftOp() == BitShiftOperand::kShiftLSL) { + if (shiftBit.GetShiftOp() == BitShiftOperand::kShiftLSL) { // only have one useInsn val = static_cast(static_cast(val) << shiftBit.GetShiftAmount()); } else if (shiftBit.GetShiftOp() == BitShiftOperand::kShiftLSR) { val = static_cast(static_cast(val) >> shiftBit.GetShiftAmount()); @@ -478,33 +483,47 @@ bool A64ConstProp::ConstProp(DUInsnInfo &useDUInfo, ImmOperand &constOpnd) { } case MOP_wcmprr: case MOP_xcmprr: { - return ReplaceCmpToCmn(useDUInfo, constOpnd); + return ReplaceCmpToCmnOrConstPropCmp(useDUInfo, constOpnd); } + case MOP_wlslrri5: + case MOP_wlsrrri5: + case MOP_wasrrri5: + case MOP_xlslrri6: + case MOP_xlsrrri6: + case MOP_xasrrri6: + return MovLslConstToMov(useDUInfo, constOpnd); default: break; } return false; } -bool A64ConstProp::ReplaceCmpToCmn(DUInsnInfo &useDUInfo, const ImmOperand &constOpnd) const { +/* + * mov w1, #imm + * cmp w0, w1 + * + * + * if imm < 0 ===> cmn w0, #imm + * else if imm > 0 ===> cmp w0, #imm + */ +bool A64ConstProp::ReplaceCmpToCmnOrConstPropCmp(DUInsnInfo &useDUInfo, ImmOperand &constOpnd) { Insn *useInsn = useDUInfo.GetInsn(); + MOperator curMop = curInsn->GetMachineOpcode(); if (useDUInfo.GetOperands().size() != 1) { return false; } auto &cmpFirstOpnd = static_cast(useInsn->GetOperand(kInsnSecondOpnd)); - MOperator newMop = useInsn->GetMachineOpcode() == MOP_wcmprr ? MOP_wcmnri : MOP_xcmnri; - uint64 negOne = useInsn->GetMachineOpcode() == MOP_wcmprr ? UINT32_MAX : UINT64_MAX; Operand ®Flag = useInsn->GetOperand(kInsnFirstOpnd); auto useOpndInfoIt = useDUInfo.GetOperands().cbegin(); uint32 useOpndIdx = useOpndInfoIt->first; Insn *newInsn = nullptr; - int64 iVal = constOpnd.GetValue(); - if ((iVal < 0 && iVal >= kNegativeImmLowerLimit) || static_cast(iVal) == negOne) { - if (iVal == static_cast(negOne)) { - iVal = -1; - } + auto iVal = (curMop == MOP_wmovri32) ? static_cast(constOpnd.GetValue()) : + static_cast(constOpnd.GetValue()); + if (iVal < 0 && iVal >= kNegativeImmLowerLimit) { iVal = iVal * (-1); - ImmOperand &newOpnd = static_cast(cgFunc)->CreateImmOperand(iVal, constOpnd.GetSize(), false); + MOperator newMop = curMop == MOP_wmovri32 ? MOP_wcmnri : MOP_xcmnri; + ImmOperand &newOpnd = static_cast(cgFunc)->CreateImmOperand(iVal, constOpnd.GetSize(), + constOpnd.IsSignedValue()); if (!static_cast(cgFunc)->IsOperandImmValid(newMop, &newOpnd, kInsnThirdOpnd)) { return false; } @@ -513,13 +532,70 @@ bool A64ConstProp::ReplaceCmpToCmn(DUInsnInfo &useDUInfo, const ImmOperand &cons } else if (useOpndIdx == kInsnThirdOpnd) { newInsn = &cgFunc->GetInsnBuilder()->BuildInsn(newMop, regFlag, cmpFirstOpnd, newOpnd); } else { - CHECK_FATAL(false, "error"); + CHECK_FATAL(false, "Cannot replace the cmp bit cmn"); + } + ReplaceInsnAndUpdateSSA(*useInsn, *newInsn); + return true; + } else if (iVal > 0) { + MOperator newMop = curMop == MOP_wmovri32 ? MOP_wcmpri : MOP_xcmpri; + if (!static_cast(cgFunc)->IsOperandImmValid(newMop, static_cast(&constOpnd), + kInsnThirdOpnd)) { + return false; + } + if (useOpndIdx == kInsnSecondOpnd) { + return false; + } else if (useOpndIdx == kInsnThirdOpnd) { + newInsn = &cgFunc->GetInsnBuilder()->BuildInsn(newMop, regFlag, cmpFirstOpnd, + *static_cast(&constOpnd)); + } else { + CHECK_FATAL(false, "Cannot prop const to cmp"); } ReplaceInsnAndUpdateSSA(*useInsn, *newInsn); return true; } return false; } + +/* mov w1, #1 + lsl w1, w1, #6 ===> mov w1, #xx +*/ +bool A64ConstProp::MovLslConstToMov(DUInsnInfo &useDUInfo, const ImmOperand &constOpnd) { + Insn *useInsn = useDUInfo.GetInsn(); + MOperator curMop = useInsn->GetMachineOpcode(); + if (useDUInfo.GetOperands().size() == 1) { // only have one useInsn + auto useOpndInfoIt = useDUInfo.GetOperands().cbegin(); + uint32 useOpndIdx = useOpndInfoIt->first; + if (useOpndIdx == kInsnSecondOpnd) { + auto &shiftBitImm = static_cast(useInsn->GetOperand(kInsnThirdOpnd)); + int64 val = constOpnd.GetValue(); + uint64 shift = static_cast(shiftBitImm.GetValue()); + constexpr uint32 k63Bits = 63; + if (curMop == MOP_wlslrri5 || curMop == MOP_xlslrri6) { + val = static_cast(static_cast(val) << shift); + } else if (curMop == MOP_wlsrrri5 || curMop == MOP_xlsrrri6 || + ((curMop == MOP_wasrrri5 || curMop == MOP_xasrrri6) && ((val & (1ULL << k63Bits)) == 0))) { + val = static_cast(static_cast(val) >> shift); + } else if (((curMop == MOP_wasrrri5 || curMop == MOP_xasrrri6) && + ((val & (1ULL << k63Bits)) == (1ULL << k63Bits)))) { + uint64 leadOnes = ~(ULLONG_MAX >> shift); + val = static_cast((static_cast(val) >> shift) | leadOnes); + } else { + CHECK_FATAL(false, "shift mop is not defined"); + } + auto *newImm = static_cast(constOpnd.Clone(*constPropMp)); + newImm->SetValue(val); + MOperator newMop = GetRegImmMOP(curMop, false); + if (static_cast(cgFunc)->IsOperandImmValid(newMop, newImm, kInsnSecondOpnd)) { + auto *cgNewImm = static_cast(newImm->Clone(*cgFunc->GetMemoryPool())); + Insn &newInsn = cgFunc->GetInsnBuilder()->BuildInsn(newMop, useInsn->GetOperand(kInsnFirstOpnd), *cgNewImm); + ReplaceInsnAndUpdateSSA(*useInsn, newInsn); + return true; + } + } + } + return false; +} + bool A64ConstProp::BitInsertReplace(DUInsnInfo &useDUInfo, const ImmOperand &constOpnd) const { Insn *useInsn = useDUInfo.GetInsn(); MOperator curMop = useInsn->GetMachineOpcode(); @@ -946,6 +1022,11 @@ MemOperand *A64StrLdrProp::SelectReplaceMem(const MemOperand &currMemOpnd) { int64 val = ofstOpnd->GetValue(); auto *offset1 = static_cast(&defInsn->GetOperand(kInsnThirdOpnd)); CHECK_FATAL(offset1 != nullptr, "offset1 is null!"); + // this restriction is for 'ldr' insn whose second operand has wrong alignment + if (offset1->GetSymbol() && offset1->GetSymbol()->IsConst() && + offset1->GetSymbol()->GetSymbolAlign(CGOptions::IsArm64ilp32()) != kAlignOfU8) { + break; + } val += offset1->GetOffset(); OfstOperand *newOfsetOpnd = &static_cast(cgFunc)->CreateOfstOpnd(static_cast(val), k32BitSize); @@ -1086,12 +1167,11 @@ bool A64StrLdrProp::CheckNewMemOffset(const Insn &insn, MemOperand &newMemOpnd, } void AArch64Prop::PropPatternOpt() { - PropOptimizeManager optManager; - optManager.Optimize(*cgFunc, GetSSAInfo()); - optManager.Optimize(*cgFunc, GetSSAInfo()); - optManager.Optimize(*cgFunc, GetSSAInfo()); - optManager.Optimize(*cgFunc, GetSSAInfo()); - optManager.Optimize(*cgFunc, GetSSAInfo()); + PropOptimizeManager::Optimize(*cgFunc, GetSSAInfo()); + PropOptimizeManager::Optimize(*cgFunc, GetSSAInfo()); + PropOptimizeManager::Optimize(*cgFunc, GetSSAInfo()); + PropOptimizeManager::Optimize(*cgFunc, GetSSAInfo()); + PropOptimizeManager::Optimize(*cgFunc, GetSSAInfo()); } bool ExtendShiftPattern::IsSwapInsn(const Insn &insn) const { @@ -1576,6 +1656,15 @@ bool ExtendShiftPattern::CheckCondition(Insn &insn) { (defSrcOpnd.GetSize() > regOperand.GetSize())) { return false; } + // The following conversions are not equivalent: + // sxtb_32 w0, w0 + // cmp_64 x2, x0 + // ==/=> + // cmp_64 x2, w0, SXTB + if ((extendOp == ExtendShiftOperand::kSXTB || extendOp == ExtendShiftOperand::kSXTH) && + (insn.GetOperandSize(replaceIdx) > defInsn->GetOperandSize(kInsnSecondOpnd))) { + return false; + } regno_t defSrcRegNo = regDefSrc.GetRegisterNumber(); /* check regDefSrc */ VRegVersion *replaceUseV = optSsaInfo->FindSSAVersion(defSrcRegNo); @@ -1795,6 +1884,15 @@ bool CopyRegProp::IsValidCopyProp(const RegOperand &dstReg, const RegOperand &sr useBB->IsInPhiList(dstRegNO))) { return false; } + + // destReg was used as use-def and has conflict with srcReg, can not prop it + if (dstll->IsConflictWith(srcRegNO)) { + for (auto [opndIdx, _] : useDUInfoIt.second->GetOperands()) { + if (useInsn->GetDesc()->GetOpndDes(opndIdx)->IsRegDef()) { + return false; + } + } + } } if (dstll && srcll) { regll->CoalesceLiveIntervals(*dstll, *srcll); @@ -2615,14 +2713,20 @@ bool A64PregCopyPattern::CheckPhiCaseCondition(Insn &defInsn) { } Operand &opnd1 = validDefInsns[0]->GetOperand(idx); Operand &opnd2 = validDefInsns[i]->GetOperand(idx); - if (!opnd1.Equals(opnd2) && differIdx == -1) { - differIdx = static_cast(idx); + if (!opnd1.Equals(opnd2)) { + if (differIdx == -1) { + differIdx = static_cast(idx); + } else if (static_cast(idx) != differIdx) { + // Only one operand of two instructions can be different + return false; + } + // We only propagate register if (!validDefInsns[0]->GetOperand(static_cast(differIdx)).IsRegister() || !validDefInsns[i]->GetOperand(static_cast(differIdx)).IsRegister()) { return false; } auto &differOpnd1 = static_cast(validDefInsns[0]->GetOperand(static_cast(differIdx))); - auto &differOpnd2 = static_cast(validDefInsns[1]->GetOperand(static_cast(differIdx))); + auto &differOpnd2 = static_cast(validDefInsns[i]->GetOperand(static_cast(differIdx))); /* avoid cc reg */ if (!differOpnd1.IsOfIntClass() || !differOpnd2.IsOfIntClass() || differOpnd1.IsPhysicalRegister() || differOpnd2.IsPhysicalRegister()) { @@ -2633,12 +2737,12 @@ bool A64PregCopyPattern::CheckPhiCaseCondition(Insn &defInsn) { if (!differVersion1 || !differVersion2) { return false; } + // The PregPropagationOpt cannot be done if the original versions of the two operands from different + // validDefInsns are not the same. if (differVersion1->GetOriginalRegNO() != differVersion2->GetOriginalRegNO()) { return false; } differOrigNO = differVersion1->GetOriginalRegNO(); - } else if (!opnd1.Equals(opnd2) && static_cast(idx) != differIdx) { - return false; } } if (differIdx <= 0) { diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_ra_opt.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_ra_opt.cpp index 0453b19f0e..b1bcc12b54 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_ra_opt.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_ra_opt.cpp @@ -18,7 +18,7 @@ namespace maplebe { -#define RAOPT_DUMP CG_DEBUG_FUNC(*cgFunc) +#define RAOPT_DUMP CG_DEBUG_FUNC(cgFunc) using namespace std; bool RaX0Opt::PropagateX0CanReplace(Operand *opnd, regno_t replaceReg) const { @@ -221,7 +221,7 @@ void RaX0Opt::PropagateX0ForNextBb(BB &nextBb, const X0OptInfo &optVal) const { * Second propagation see comment in function. */ void RaX0Opt::PropagateX0() { - FOR_ALL_BB(bb, cgFunc) { + FOR_ALL_BB(bb, &cgFunc) { X0OptInfo optVal; Insn *insn = bb->GetFirstInsn(); @@ -287,6 +287,46 @@ void RaX0Opt::PropagateX0() { } } +void AArch64LRSplitForSink::CollectSplitRegs() { + auto *regInfo = cgFunc.GetTargetRegInfo(); + FOR_BB_INSNS(insn, cgFunc.GetFirstBB()) { + if (insn->IsImmaterialInsn() || !insn->IsMachineInstruction()) { + continue; + } + // only mov dest reg will split + auto mOp = insn->GetMachineOpcode(); + if (mOp != MOP_xmovrr && mOp != MOP_wmovrr && mOp != MOP_xvmovs && mOp != MOP_xvmovd) { + continue; + } + + // dest reg must be virReg and src reg must be phyReg + auto &destOpnd = insn->GetOperand(kInsnFirstOpnd); + if (!destOpnd.IsRegister() || !regInfo->IsVirtualRegister(static_cast(destOpnd))) { + continue; + } + + auto &srcOpnd = insn->GetOperand(kInsnSecondOpnd); + if (!srcOpnd.IsRegister() || regInfo->IsVirtualRegister(static_cast(srcOpnd))) { + continue; + } + auto *destRegOpnd = static_cast(&destOpnd); + (void)splitRegs.emplace(destRegOpnd->GetRegisterNumber(), destRegOpnd); + } + if (dumpInfo) { + LogInfo::MapleLogger() << "find need split reg :"; + for (auto [regno, _] : splitRegs) { + LogInfo::MapleLogger() << "R" << regno << ","; + } + LogInfo::MapleLogger() << "\n"; + } +} + +Insn &AArch64LRSplitForSink::GenMovInsn(RegOperand &dest, RegOperand &src) { + auto mOp = (dest.GetRegisterType() == kRegTyInt) ? ((dest.GetSize() == k64BitSize) ? MOP_xmovrr : MOP_wmovrr) : + ((dest.GetSize() == k64BitSize) ? MOP_xvmovd : MOP_xvmovs); + return cgFunc.GetInsnBuilder()->BuildInsn(mOp, dest, src); +} + void VregRename::PrintRenameInfo(regno_t regno) const { VregRenameInfo *info = (regno <= maxRegnoSeen) ? renameInfo[regno] : nullptr; if (info == nullptr || (info->numDefs == 0 && info->numUses == 0)) { @@ -315,7 +355,7 @@ void VregRename::PrintRenameInfo(regno_t regno) const { } void VregRename::PrintAllRenameInfo() const { - for (uint32 regno = 0; regno < cgFunc->GetMaxRegNum(); ++regno) { + for (uint32 regno = 0; regno < cgFunc.GetMaxRegNum(); ++regno) { PrintRenameInfo(regno); } } @@ -335,8 +375,8 @@ void VregRename::RenameProfitableVreg(RegOperand &ropnd, const LoopDesc &loop) { } uint32 size = (ropnd.GetSize() == k64BitSize) ? k8ByteSize : k4ByteSize; - regno_t newRegno = cgFunc->NewVReg(ropnd.GetRegisterType(), size); - RegOperand *renameVreg = &cgFunc->CreateVirtualRegisterOperand(newRegno); + regno_t newRegno = cgFunc.NewVReg(ropnd.GetRegisterType(), size); + RegOperand *renameVreg = &cgFunc.CreateVirtualRegisterOperand(newRegno); for (auto pred : loop.GetHeader().GetPreds()) { if (loop.IsBackEdge(*pred, loop.GetHeader())) { @@ -345,7 +385,7 @@ void VregRename::RenameProfitableVreg(RegOperand &ropnd, const LoopDesc &loop) { MOperator mOp = (ropnd.GetRegisterType() == kRegTyInt) ? ((size == k8BitSize) ? MOP_xmovrr : MOP_wmovrr) : ((size == k8BitSize) ? MOP_xvmovd : MOP_xvmovs); - Insn &newInsn = cgFunc->GetInsnBuilder()->BuildInsn(mOp, *renameVreg, ropnd); + Insn &newInsn = cgFunc.GetInsnBuilder()->BuildInsn(mOp, *renameVreg, ropnd); Insn *last = pred->GetLastInsn(); if (last) { if (last->IsBranch()) { @@ -359,7 +399,7 @@ void VregRename::RenameProfitableVreg(RegOperand &ropnd, const LoopDesc &loop) { } for (auto bbId : loop.GetLoopBBs()) { - auto *bb = cgFunc->GetBBFromID(bbId); + auto *bb = cgFunc.GetBBFromID(bbId); FOR_BB_INSNS(insn, bb) { if (insn->IsImmaterialInsn() || !insn->IsMachineInstruction()) { continue; @@ -373,14 +413,14 @@ void VregRename::RenameProfitableVreg(RegOperand &ropnd, const LoopDesc &loop) { RegOperand *base = static_cast(memopnd->GetBaseRegister()); MemOperand *newMemOpnd = nullptr; if (base != nullptr && base->IsVirtualRegister() && base->GetRegisterNumber() == vreg) { - newMemOpnd = static_cast(memopnd->Clone(*cgFunc->GetMemoryPool())); + newMemOpnd = static_cast(memopnd->Clone(*cgFunc.GetMemoryPool())); newMemOpnd->SetBaseRegister(*renameVreg); insn->SetOperand(i, *newMemOpnd); } RegOperand *offset = static_cast(memopnd->GetIndexRegister()); if (offset != nullptr && offset->IsVirtualRegister() && offset->GetRegisterNumber() == vreg) { if (newMemOpnd == nullptr) { - newMemOpnd = static_cast(memopnd->Clone(*cgFunc->GetMemoryPool())); + newMemOpnd = static_cast(memopnd->Clone(*cgFunc.GetMemoryPool())); } newMemOpnd->SetIndexRegister(*renameVreg); insn->SetOperand(i, *newMemOpnd); @@ -396,7 +436,7 @@ void VregRename::RenameProfitableVreg(RegOperand &ropnd, const LoopDesc &loop) { void VregRename::RenameFindLoopVregs(const LoopDesc &loop) { for (auto bbId : loop.GetLoopBBs()) { - auto *bb = cgFunc->GetBBFromID(bbId); + auto *bb = cgFunc.GetBBFromID(bbId); FOR_BB_INSNS(insn, bb) { if (insn->IsImmaterialInsn() || !insn->IsMachineInstruction()) { continue; @@ -430,7 +470,7 @@ void VregRename::RenameFindLoopVregs(const LoopDesc &loop) { void VregRename::UpdateVregInfo(regno_t vreg, BB *bb, bool isInner, bool isDef) { VregRenameInfo *info = renameInfo[vreg]; if (info == nullptr) { - info = memPool->New(); + info = memPool.New(); renameInfo[vreg] = info; if (vreg > maxRegnoSeen) { maxRegnoSeen = vreg; @@ -464,8 +504,8 @@ void VregRename::UpdateVregInfo(regno_t vreg, BB *bb, bool isInner, bool isDef) } void VregRename::RenameGetFuncVregInfo() { - FOR_ALL_BB(bb, cgFunc) { - auto *loop = loopInfo->GetBBLoopParent(bb->GetId()); + FOR_ALL_BB(bb, &cgFunc) { + auto *loop = loopInfo.GetBBLoopParent(bb->GetId()); bool isInner = loop ? loop->GetChildLoops().empty() : false; FOR_BB_INSNS(insn, bb) { if (insn->IsImmaterialInsn() || !insn->IsMachineInstruction()) { @@ -511,187 +551,22 @@ void VregRename::RenameFindVregsToRename(const LoopDesc &loop) { void VregRename::VregLongLiveRename() { - if (loopInfo->GetLoops().empty()) { + if (loopInfo.GetLoops().empty()) { return; } RenameGetFuncVregInfo(); - for (const auto *loop : loopInfo->GetLoops()) { + for (const auto *loop : loopInfo.GetLoops()) { RenameFindVregsToRename(*loop); } } -bool ParamRegOpt::DominatorAll(uint32 domBB, std::set &refBBs) const { - for (auto it: refBBs) { - if (!domInfo.Dominate(*cgFunc.GetBBFromID(domBB), *cgFunc.GetBBFromID(it))) { - return false; - } - } - return true; -} - -BB* ParamRegOpt::GetCommondDom(std::set &refBBs) const { - MapleVector &domOrder = domInfo.GetDtPreOrder(); - uint32 minId = static_cast(domOrder.size()); - for (auto it = domOrder.crbegin(); it != domOrder.crend(); ++it) { - uint32 curBBId = *it; - if (refBBs.find(curBBId) != refBBs.end()) { - minId = curBBId; - } - } - if (DominatorAll(minId, refBBs)) { - BB* domBB = cgFunc.GetBBFromID(minId); - while (loopInfo.GetBBLoopParent(domBB->GetId()) != nullptr) { - domBB = domInfo.GetDom(domBB->GetId()); - } - return domBB; - } - BB *curBB = domInfo.GetDom(minId); - while (curBB != nullptr && curBB != cgFunc.GetFirstBB()) { - if (DominatorAll(curBB->GetId(), refBBs)) { - break; - } - curBB = domInfo.GetDom(curBB->GetId()); - } - if (curBB == nullptr || curBB == cgFunc.GetFirstBB()) { - return nullptr; - } - while (loopInfo.GetBBLoopParent(curBB->GetId()) != nullptr) { - curBB = domInfo.GetDom(curBB->GetId()); - } - return curBB; -} - -void ParamRegOpt::SplitAtDomBB(RegOperand &movDest, BB &domBB, Insn &posInsn) const { - if (dumpInfo) { - LogInfo::MapleLogger() << "----cand R" << movDest.GetRegisterNumber() << - " to split at BB" << domBB.GetId() << " \n"; - } - uint32 size = (movDest.GetSize() == k64BitSize) ? k8ByteSize : k4ByteSize; - regno_t newRegno = cgFunc.NewVReg(movDest.GetRegisterType(), size); - RegOperand *renameVreg = &cgFunc.CreateVirtualRegisterOperand(newRegno); - MOperator mOp = (movDest.GetRegisterType() == kRegTyInt) ? - ((size == k8BitSize) ? MOP_xmovrr : MOP_wmovrr) : - ((size == k8BitSize) ? MOP_xvmovd : MOP_xvmovs); - Insn &newInsn = cgFunc.GetInsnBuilder()->BuildInsn(mOp, movDest, *renameVreg); - domBB.InsertInsnBegin(newInsn); - posInsn.SetOperand(kFirstOpnd, *renameVreg); -} - -void ParamRegOpt::CollectRefBBs(RegOperand &movDest, std::set &refBBs) { - regno_t cand = movDest.GetRegisterNumber(); - BB* firstBB = cgFunc.GetFirstBB(); - std::set defBBs; - std::set useBBs; - std::set crossCallBBs; - FOR_ALL_BB(bb, (&cgFunc)) { - bool bbHasCall = false; - FOR_BB_INSNS(insn, bb) { - if (insn->IsImmaterialInsn() || !insn->IsMachineInstruction()) { - continue; - } - bbHasCall = bbHasCall || insn->IsCall(); - if (insn->ScanReg(cand)) { - if (insn->IsRegDefined(cand)) { - (void)defBBs.insert(bb->GetId()); - if (bbHasCall) { - (void)crossCallBBs.insert(bb->GetId()); - } - } else { - (void)useBBs.insert(bb->GetId()); - if (bbHasCall) { - (void)crossCallBBs.insert(bb->GetId()); - } - } - } - } - if (bbHasCall && (bb->GetLiveOutRegNO().find(cand) != bb->GetLiveOutRegNO().end() || - bb->GetLiveInRegNO().find(cand) != bb->GetLiveInRegNO().end())) { - (void)crossCallBBs.insert(bb->GetId()); - } - } - /* expect single def and cross call */ - if (defBBs.size() != 1 || crossCallBBs.empty()) { - return; - } - /* single defBB should be the firstBB */ - if (defBBs.find(firstBB->GetId()) == defBBs.end()) { - return; - } - /* expect no use or call in the firstBB */ - if (useBBs.find(firstBB->GetId()) != useBBs.end() || crossCallBBs.find(firstBB->GetId()) != crossCallBBs.end()) { - return; - } - useBBs.insert(crossCallBBs.cbegin(), crossCallBBs.cend()); - refBBs.insert(useBBs.cbegin(), useBBs.cend()); -} - -void ParamRegOpt::TryToSplitParamReg(RegOperand &movDest, Insn &posInsn) { - std::set useBBs; - CollectRefBBs(movDest, useBBs); - if (useBBs.empty()) { - return; - } - /* common dom */ - BB* firstBB = cgFunc.GetFirstBB(); - BB *domBB = GetCommondDom(useBBs); - BB *secondBB = nullptr; - if (firstBB->GetSuccs().size() == 1) { - secondBB = *firstBB->GetSuccs().begin(); - } - if (domBB == nullptr || domBB == firstBB || domBB == secondBB) { - return; - } - /* do split */ - SplitAtDomBB(movDest, *domBB, posInsn); -} - -void ParamRegOpt::HandleParamReg() { - uint32 formalCount = static_cast(cgFunc.GetFunction().GetFormalCount()); - if (formalCount == 0) { - return; - } - BB* firstBB = cgFunc.GetFirstBB(); - FOR_BB_INSNS(insn, firstBB) { - if (!insn->IsMachineInstruction()) { - continue; - } - if (insn->GetMachineOpcode() != MOP_xmovrr && insn->GetMachineOpcode() != MOP_wmovrr && - insn->GetMachineOpcode() != MOP_xvmovd && insn->GetMachineOpcode() != MOP_xvmovs) { - return; - } - RegOperand &movDest = static_cast(insn->GetOperand(kFirstOpnd)); - RegOperand &movSrc = static_cast(insn->GetOperand(kSecondOpnd)); - if (movSrc.IsVirtualRegister()) { - return; - } - if (movSrc.IsPhysicalRegister() && movSrc.GetRegisterNumber() == RSP) { - return; - } - TryToSplitParamReg(movDest, *insn); - } -} - -void AArch64RaOpt::Run() { - RaX0Opt x0Opt(cgFunc); - x0Opt.PropagateX0(); - - if (RAOPT_DUMP) { - LogInfo::MapleLogger() << "Handle func:" << cgFunc->GetName() << ", funcid: " << - cgFunc->GetFunction().GetPuidx() << " \n"; - } - ParamRegOpt argOpt(*cgFunc, *domInfo, *loopInfo); - argOpt.SetDumpInfo(RAOPT_DUMP); - argOpt.HandleParamReg(); - - if (cgFunc->GetMirModule().GetSrcLang() == kSrcLangC && CGOptions::DoVregRename()) { - /* loop detection considers EH bb. That is not handled. So C only for now. */ - auto *loop = memPool->New(*cgFunc, *memPool, *domInfo); - loop->Analysis(); - VregRename rename(cgFunc, memPool, *loop); - Bfs localBfs(*cgFunc, *memPool); - rename.bfs = &localBfs; - rename.bfs->ComputeBlockOrder(); - rename.VregLongLiveRename(); +void AArch64RaOpt::InitializePatterns() { + bool dump = RAOPT_DUMP; + patterns.emplace_back(memPool.New(cgFunc, memPool, dump)); + patterns.emplace_back(memPool.New(cgFunc, memPool, domInfo, loopInfo, dump)); + if (cgFunc.GetMirModule().GetSrcLang() == kSrcLangC && CGOptions::DoVregRename()) { + // loop detection considers EH bb. That is not handled. So C only for now. + patterns.emplace_back(memPool.New(cgFunc, memPool, loopInfo, dump)); } } } /* namespace maplebe */ diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_rce.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_rce.cpp index 3e7d163e4e..1b64585860 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_rce.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_rce.cpp @@ -21,13 +21,13 @@ void AArch64RedundantComputeElim::Run() { continue; } bool opt; - g_count = 0; + kGcount = 0; do { /* reset hashSeed and hashSet */ g_hashSeed = 0; candidates.clear(); opt = DoOpt(bb); - ++g_count; + ++kGcount; } while (opt); } if (CG_RCE_DUMP) { diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_reg_coalesce.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_reg_coalesce.cpp index 43a08b136c..e4a02125ab 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_reg_coalesce.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_reg_coalesce.cpp @@ -20,10 +20,6 @@ #include "aarch64_cgfunc.h" #include "aarch64_cg.h" -/* - * This phase implements if-conversion optimization, - * which tries to convert conditional branches into cset/csel instructions - */ namespace maplebe { #define REGCOAL_DUMP CG_DEBUG_FUNC(*cgFunc) diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_reg_info.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_reg_info.cpp index 22fd7f2974..822e8828f3 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_reg_info.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_reg_info.cpp @@ -77,7 +77,7 @@ bool AArch64RegInfo::IsCalleeSavedReg(regno_t regno) const { } bool AArch64RegInfo::IsYieldPointReg(regno_t regno) const { /* when yieldpoint is enabled, x19 is reserved. */ - if (GetCurrFunction()->GetCG()->GenYieldPoint()) { + if (CGOptions::GetInstance().GenYieldPoint()) { return (static_cast(regno) == RYP); } return false; @@ -109,7 +109,7 @@ bool AArch64RegInfo::IsUnconcernedReg(const RegOperand ®Opnd) const { /* r16,r17 are used besides ra. */ bool AArch64RegInfo::IsReservedReg(regno_t regNO, bool doMultiPass) const { - if (!doMultiPass || GetCurrFunction()->GetMirModule().GetSrcLang() != kSrcLangC) { + if (!doMultiPass || Globals::GetInstance()->GetTarget()->GetMIRModule()->GetSrcLang() != kSrcLangC) { return (regNO == R16) || (regNO == R17); } else { return (regNO == R16); diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_schedule.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_schedule.cpp index 4a673718f0..b85023c12a 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_schedule.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_schedule.cpp @@ -659,7 +659,7 @@ struct RegisterInfoUnit { uint32 ccRegNum = 0; }; -RegisterInfoUnit GetDepNodeDefType(const DepNode &depNode, CGFunc &f) { +RegisterInfoUnit GetDepNodeDefType(const DepNode &depNode, const CGFunc &f) { RegisterInfoUnit rIU; for (auto defRegNO : depNode.GetDefRegnos()) { RegType defRegTy = AArch64ScheduleProcessInfo::GetRegisterType(f, defRegNO); @@ -1268,7 +1268,7 @@ void AArch64Schedule::GenerateDot(const BB &bb, const MapleVector &nod std::cout.rdbuf(coutBuf); } -RegType AArch64ScheduleProcessInfo::GetRegisterType(CGFunc &f, regno_t regNO) { +RegType AArch64ScheduleProcessInfo::GetRegisterType(const CGFunc &f, regno_t regNO) { if (AArch64isa::IsPhysicalRegister(regNO)) { if (AArch64isa::IsGPRegister(static_cast(regNO))) { return kRegTyInt; @@ -1284,7 +1284,7 @@ RegType AArch64ScheduleProcessInfo::GetRegisterType(CGFunc &f, regno_t regNO) { } } -void AArch64ScheduleProcessInfo::VaryLiveRegSet(CGFunc &f, regno_t regNO, bool isInc) { +void AArch64ScheduleProcessInfo::VaryLiveRegSet(const CGFunc &f, regno_t regNO, bool isInc) { RegType registerTy = GetRegisterType(f, regNO); if (registerTy == kRegTyInt || registerTy == kRegTyVary) { isInc ? IncIntLiveRegSet(regNO) : DecIntLiveRegSet(regNO); @@ -1294,7 +1294,7 @@ void AArch64ScheduleProcessInfo::VaryLiveRegSet(CGFunc &f, regno_t regNO, bool i /* consider other type register */ } -void AArch64ScheduleProcessInfo::VaryFreeRegSet(CGFunc &f, std::set regNOs, DepNode &node) { +void AArch64ScheduleProcessInfo::VaryFreeRegSet(const CGFunc &f, std::set regNOs, DepNode &node) { for (auto regNO : regNOs) { RegType registerTy = GetRegisterType(f, regNO); if (registerTy == kRegTyInt || registerTy == kRegTyVary /* memory base register must be int */) { diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_strldr.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_strldr.cpp index 30547c3c36..535a290d1e 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_strldr.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_strldr.cpp @@ -671,6 +671,15 @@ bool AArch64StoreLoadOpt::ReplaceMemOpnd(Insn &insn, regno_t regNo, RegOperand & if (!CheckDefInsn(*regDefInsn, insn)) { return false; } + // this restriction is for 'ldr' insn whose second operand has wrong alignment + if (regDefInsn->GetOperandSize() > kInsnThirdOpnd && regDefInsn->GetOperand(kInsnThirdOpnd).IsStImmediate()) { + auto &stImm = static_cast(regDefInsn->GetOperand(kInsnThirdOpnd)); + if (stImm.GetSymbol() && stImm.GetSymbol()->IsConst() && + stImm.GetSymbol()->GetSymbolAlign(CGOptions::IsArm64ilp32()) != kAlignOfU8) { + return false; + } + } + MemOperand *newMemOpnd = SelectReplaceMem(*regDefInsn, insn, base, offset); if (newMemOpnd == nullptr) { return false; diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_validbit_opt.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_validbit_opt.cpp index 3eef9c584f..e018522aae 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_validbit_opt.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_validbit_opt.cpp @@ -31,7 +31,7 @@ void PropPattern::ValidateImplicitCvt(RegOperand &destReg, const RegOperand &src } // prop ssa info and change implicit cvt to uxtw / ubfx -void PropPattern::ReplaceImplicitCvtAndProp(VRegVersion *destVersion, VRegVersion *srcVersion) { +void PropPattern::ReplaceImplicitCvtAndProp(VRegVersion *destVersion, VRegVersion *srcVersion) const { MapleUnorderedMap useList = destVersion->GetAllUseInsns(); ssaInfo->ReplaceAllUse(destVersion, srcVersion); for (auto it = useList.begin(); it != useList.end(); ++it) { @@ -366,6 +366,15 @@ void AArch64ValidBitOpt::SetValidBits(Insn &insn) { } break; } + case MOP_wubfizrri5i5: + case MOP_xubfizrri6i6: { + auto &dstOpnd = static_cast(insn.GetOperand(kInsnFirstOpnd)); + auto &lsb = static_cast(insn.GetOperand(kInsnThirdOpnd)); + auto &width = static_cast(insn.GetOperand(kInsnFourthOpnd)); + uint32 newVB = lsb.GetValue() + width.GetValue(); + dstOpnd.SetValidBitsNum(newVB); + break; + } default: break; } @@ -427,9 +436,11 @@ bool AndValidBitPattern::CheckCondition(Insn &insn) { auto &andImm = static_cast(insn.GetOperand(kInsnThirdOpnd)); int64 immVal = andImm.GetValue(); uint32 validBit = srcReg->GetValidBitsNum(); - if (validBit == k8BitSize && immVal == 0xFF) { + if (validBit <= k8BitSize && immVal == 0xFF) { + return true; + } else if (validBit <= k16BitSize && immVal == 0xFFFF) { return true; - } else if (validBit == k16BitSize && immVal == 0xFFFF) { + } else if (validBit <= k32BitSize && immVal == 0xFFFFFFFF) { return true; } /* and R287[32], R286[64], #255 */ @@ -509,7 +520,7 @@ bool ExtValidBitPattern::RealUseMopX(const RegOperand &defOpnd, InsnSet &visited // uxth R0 R1 (redundant) // rev R2 R0 // if there are insns that only use 8/16 bit of the register ,this pattern should be expanded. -bool ExtValidBitPattern::CheckRedundantUxtbUxth(Insn &insn) { +bool ExtValidBitPattern::CheckRedundantUxtbUxth(const Insn &insn) { RegOperand *destOpnd = nullptr; RegOperand *srcOpnd = nullptr; std::set checkMops; diff --git a/src/mapleall/maple_be/src/cg/alignment.cpp b/src/mapleall/maple_be/src/cg/alignment.cpp index 71419ba313..18124de852 100644 --- a/src/mapleall/maple_be/src/cg/alignment.cpp +++ b/src/mapleall/maple_be/src/cg/alignment.cpp @@ -22,13 +22,29 @@ namespace maplebe { #define ALIGN_ANALYZE_DUMP_NEWPW CG_DEBUG_FUNC(func) void AlignAnalysis::AnalysisAlignment() { - FindLoopHeader(); - FindJumpTarget(); + // If pgo is enabled, we analysis alignment on specific by frequency. + if (CGOptions::DoLiteProfUse() && CGOptions::DoPgoCodeAlign()) { + LiteProfile::BBInfo *bbInfo = cgFunc.GetFunction().GetModule()->GetLiteProfile().GetFuncBBProf(cgFunc.GetName()); + if (bbInfo == nullptr) { + LogInfo::MapleLogger() << cgFunc.GetName() << " is not in white list in pgo use\n"; + return; + } + FindLoopHeaderByFrequency(); + FindJumpTargetByFrequency(); + } else { + FindLoopHeaderByDefault(); + FindJumpTargetByDefault(); + } + ComputeLoopAlign(); ComputeJumpAlign(); + if (CGOptions::DoCondBrAlign()) { ComputeCondBranchAlign(); } + if (CGOptions::DoLoopAlign() && !loopHeaderBBs.empty()) { + AddNopForLoop(); + } } void AlignAnalysis::Dump() { diff --git a/src/mapleall/maple_be/src/cg/cfgo.cpp b/src/mapleall/maple_be/src/cg/cfgo.cpp index 0acde88777..cba7c6444d 100644 --- a/src/mapleall/maple_be/src/cg/cfgo.cpp +++ b/src/mapleall/maple_be/src/cg/cfgo.cpp @@ -16,8 +16,8 @@ #include "cgbb.h" #include "cg.h" #include "loop.h" +#include "cg_predict.h" #include "mpl_logging.h" - /* * This phase traverses all basic block of cgFunc and finds special * basic block patterns, like continuous fallthrough basic block, continuous @@ -44,8 +44,8 @@ bool ChainingPattern::NoInsnBetween(const BB &from, const BB &to) const { /* return true if insns in bb1 and bb2 are the same except the last goto insn. */ bool ChainingPattern::DoSameThing(const BB &bb1, const Insn &last1, const BB &bb2, const Insn &last2) const { - const Insn *insn1 = bb1.GetFirstInsn(); - const Insn *insn2 = bb2.GetFirstInsn(); + const Insn *insn1 = bb1.GetFirstMachineInsn(); + const Insn *insn2 = bb2.GetFirstMachineInsn(); while (insn1 != nullptr && insn1 != last1.GetNext() && insn2 != nullptr && insn2 != last2.GetNext()) { if (!insn1->IsMachineInstruction()) { insn1 = insn1->GetNext(); @@ -72,7 +72,7 @@ bool ChainingPattern::DoSameThing(const BB &bb1, const Insn &last1, const BB &bb insn1 = insn1->GetNextMachineInsn(); insn2 = insn2->GetNextMachineInsn(); } - return (insn1 == last1.GetNext() && insn2 == last2.GetNext()); + return (insn1 == last1.GetNextMachineInsn() && insn2 == last2.GetNextMachineInsn()); } /* @@ -156,8 +156,7 @@ bool ChainingPattern::RemoveGotoInsn(BB &curBB, BB &sucBB) { } if (&sucBB != curBB.GetNext()) { ASSERT(curBB.GetNext() != nullptr, "nullptr check"); - curBB.RemoveSuccs(sucBB); - curBB.PushBackSuccs(*curBB.GetNext()); + curBB.ReplaceSucc(sucBB, *curBB.GetNext()); curBB.GetNext()->PushBackPreds(curBB); sucBB.RemovePreds(curBB); } @@ -192,9 +191,12 @@ bool ChainingPattern::ClearCurBBAndResetTargetBB(BB &curBB, BB &sucBB) { } } ASSERT(br != nullptr, "goto BB has no branch"); - last1 = br->GetPrev(); + last1 = br->GetPreviousMachineInsn(); + } + if (last1 == nullptr) { + return false; } - if (last1 == nullptr || !DoSameThing(*newTarget, *last1, curBB, *brInsn->GetPrev())) { + if (!DoSameThing(*newTarget, *last1, curBB, *brInsn->GetPreviousMachineInsn())) { return false; } @@ -502,8 +504,7 @@ bool SequentialJumpPattern::HasInvalidPred(BB &sucBB) const { void SequentialJumpPattern::SkipSucBB(BB &curBB, BB &sucBB) const { BB *gotoTarget = CGCFG::GetTargetSuc(sucBB); CHECK_FATAL(gotoTarget != nullptr, "gotoTarget is null in SequentialJumpPattern::SkipSucBB"); - curBB.RemoveSuccs(sucBB); - curBB.PushBackSuccs(*gotoTarget); + curBB.ReplaceSucc(sucBB, *gotoTarget); sucBB.RemovePreds(curBB); gotoTarget->PushBackPreds(curBB); // If the sucBB needs to be skipped, all preds of the sucBB must skip it and update cfg info. @@ -539,9 +540,8 @@ void SequentialJumpPattern::SkipSucBB(BB &curBB, BB &sucBB) const { } else if (predBB->GetKind() == BB::kBBRangeGoto) { UpdateSwitchSucc(*predBB, sucBB); } - predBB->RemoveSuccs(sucBB); + predBB->ReplaceSucc(sucBB, *gotoTarget); sucBB.RemovePreds(*predBB); - predBB->PushBackSuccs(*gotoTarget); gotoTarget->PushBackPreds(*predBB); } cgFunc->GetTheCFG()->FlushUnReachableStatusAndRemoveRelations(sucBB, *cgFunc); @@ -707,12 +707,10 @@ bool FlipBRPattern::Optimize(BB &curBB) { it = curBB.GetSuccsBegin(); CHECK_FATAL(*it != nullptr, "nullptr check"); if (*it == brBB) { - curBB.EraseSuccs(it); - curBB.PushBackSuccs(*tgtBB); + curBB.ReplaceSucc(it, *tgtBB); } else { ++it; - curBB.EraseSuccs(it); - curBB.PushFrontSuccs(*tgtBB); + curBB.ReplaceSucc(it, *tgtBB); } for (it = tgtBB->GetPredsBegin(); it != tgtBB->GetPredsEnd(); ++it) { if (*it == ftBB) { @@ -788,15 +786,12 @@ bool FlipBRPattern::Optimize(BB &curBB) { brInsn->SetOperand(gotoTargetIdx, condTarget); auto it = ftBB->GetSuccsBegin(); BB *loopHeadBB = *it; - - curBB.RemoveSuccs(*brBB); + curBB.ReplaceSucc(*brBB, *loopHeadBB); brBB->RemovePreds(curBB); - ftBB->RemoveSuccs(*loopHeadBB); + ftBB->ReplaceSucc(*loopHeadBB, *brBB); loopHeadBB->RemovePreds(*ftBB); - curBB.PushBackSuccs(*loopHeadBB); loopHeadBB->PushBackPreds(curBB); - ftBB->PushBackSuccs(*brBB); brBB->PushBackPreds(*ftBB); } else { RelocateThrowBB(curBB); diff --git a/src/mapleall/maple_be/src/cg/cfi_generator.cpp b/src/mapleall/maple_be/src/cg/cfi_generator.cpp index 8dba511bca..439330a95f 100644 --- a/src/mapleall/maple_be/src/cg/cfi_generator.cpp +++ b/src/mapleall/maple_be/src/cg/cfi_generator.cpp @@ -20,25 +20,31 @@ #endif namespace maplebe { -Insn &GenCfi::FindStackDefNextInsn(BB &bb) const { +Insn *GenCfi::FindStackDefInsn(BB &bb) const { FOR_BB_INSNS(insn, &bb) { if (insn->IsStackDef()) { - if (insn->GetNext() == nullptr) { - auto &comment = cgFunc.GetOpndBuilder()->CreateComment("stack alloc end"); - bb.AppendInsn(cgFunc.GetInsnBuilder()->BuildCommentInsn(comment)); - } - return *(insn->GetNext()); + return insn; } } - CHECK_FATAL(false, "bb need a stackdef insn"); + return nullptr; } -void GenCfi::InsertCFIDefCfaOffset(BB &bb, Insn &insn, int32 &cfiOffset) { +Insn *GenCfi::FinsStackRevertInsn(BB &bb) const { + FOR_BB_INSNS_REV(insn, &bb) { + if (insn->IsStackRevert()) { + return insn; + } + } + return nullptr; +} + +Insn *GenCfi::InsertCFIDefCfaOffset(BB &bb, Insn &insn, int32 &cfiOffset) { cfiOffset = AddtoOffsetFromCFA(cfiOffset); Insn &cfiInsn = cgFunc.GetInsnBuilder()->BuildCfiInsn(cfi::OP_CFI_def_cfa_offset).AddOpndChain( cgFunc.CreateCfiImmOperand(cfiOffset, k64BitSize)); - (void)bb.InsertInsnBefore(insn, cfiInsn); + (void)bb.InsertInsnAfter(insn, cfiInsn); cgFunc.SetDbgCallFrameOffset(cfiOffset); + return &cfiInsn; } void GenCfi::GenerateStartDirective(BB &bb) { @@ -110,12 +116,15 @@ void GenCfi::Run() { InsertFirstLocation(*startBB); if (cgFunc.GetHasProEpilogue()) { - GenerateRegisterSaveDirective(*(cgFunc.GetPrologureBB())); - FOR_ALL_BB(bb, &cgFunc) { - if (!bb->IsFastPathReturn() && bb->IsNeedRestoreCfi()) { + auto *stackDefInsn = FindStackDefInsn(*bb); + if (stackDefInsn != nullptr) { + GenerateRegisterSaveDirective(*bb, *stackDefInsn); + } + auto *stackRevertInsn = FinsStackRevertInsn(*bb); + if (stackRevertInsn != nullptr) { GenerateRegisterStateDirective(*bb); - GenerateRegisterRestoreDirective(*bb); + GenerateRegisterRestoreDirective(*bb, *stackRevertInsn); } } } diff --git a/src/mapleall/maple_be/src/cg/cg.cpp b/src/mapleall/maple_be/src/cg/cg.cpp index 7cc8540fd7..fcf1c38ef6 100644 --- a/src/mapleall/maple_be/src/cg/cg.cpp +++ b/src/mapleall/maple_be/src/cg/cg.cpp @@ -14,6 +14,7 @@ */ #include #include "emit.h" +#include "proepilog.h" namespace maplebe { using namespace maple; @@ -295,4 +296,9 @@ const std::string CG::ExtractFuncName(const std::string &str) const { } return funcName; } + +ProEpilogAnalysis *CG::CreateProEpilogAnalysis(MemPool &mp, CGFunc &f, DomAnalysis &dom, PostDomAnalysis &pdom, + LoopAnalysis &loop) const { + return mp.New(f, mp, dom, pdom, loop); +} } /* namespace maplebe */ diff --git a/src/mapleall/maple_be/src/cg/cg_callgraph_reorder.cpp b/src/mapleall/maple_be/src/cg/cg_callgraph_reorder.cpp index be294c13e7..7309617496 100644 --- a/src/mapleall/maple_be/src/cg/cg_callgraph_reorder.cpp +++ b/src/mapleall/maple_be/src/cg/cg_callgraph_reorder.cpp @@ -76,8 +76,13 @@ static void ReadProfile(const std::string &path) { while (std::getline(fs, line)) { std::istringstream ss(line); - std::string calleeName, callerName; - uint64 calleeSize, callerSize, calleeWeight, callerWeight, edgeWeight; + std::string calleeName; + std::string callerName; + uint64 calleeSize; + uint64 callerSize; + uint64 calleeWeight; + uint64 callerWeight; + uint64 edgeWeight; ss >> calleeName >> calleeWeight >> calleeSize >> callerName >> callerWeight >> callerSize >> edgeWeight; if (!ss) { LogInfo::MapleLogger() << "WARN: unexpected format in Function Priority File" << '\n'; @@ -110,7 +115,8 @@ static uint32 GetLeader(uint32 src) { } static void MergeClusters(Cluster &dst, uint32 dstIdx, Cluster &src, uint32 srcIdx) { - uint32 tail1 = dst.prev, tail2 = src.prev; + uint32 tail1 = dst.prev; + uint32 tail2 = src.prev; dst.prev = tail2; clusters[tail2].next = dstIdx; src.prev = tail1; diff --git a/src/mapleall/maple_be/src/cg/cg_cfg.cpp b/src/mapleall/maple_be/src/cg/cg_cfg.cpp index f9a7fc6159..4555d6f19f 100644 --- a/src/mapleall/maple_be/src/cg/cg_cfg.cpp +++ b/src/mapleall/maple_be/src/cg/cg_cfg.cpp @@ -112,6 +112,7 @@ void CGCFG::BuildCFG() { curBB->PushBackSuccs(*fallthruBB); fallthruBB->PushBackPreds(*curBB); Insn *branchInsn = curBB->GetLastMachineInsn(); + int32 prob = branchInsn->GetProb(); CHECK_FATAL(branchInsn != nullptr, "machine instruction must be exist in ifBB"); ASSERT(branchInsn->IsCondBranch(), "must be a conditional branch generated from an intrinsic"); /* Assume the last non-null operand is the branch target */ @@ -122,7 +123,7 @@ void CGCFG::BuildCFG() { auto &labelOpnd = static_cast(lastOpnd); BB *brToBB = cgFunc->GetBBFromLab2BBMap(labelOpnd.GetLabelIndex()); if (fallthruBB->GetId() != brToBB->GetId()) { - curBB->PushBackSuccs(*brToBB); + curBB->PushBackSuccs(*brToBB, prob); brToBB->PushBackPreds(*curBB); } break; @@ -207,7 +208,7 @@ static inline uint32 CRC32Compute(uint32_t crc, uint32 val) { } uint32 CGCFG::ComputeCFGHash() { - uint32 hash = 0xfffffffful; + uint32 hash = 0xffffffffUL; FOR_ALL_BB(bb, cgFunc) { hash = CRC32Compute (hash, bb->GetId()); for (BB *sucBB : bb->GetSuccs()) { @@ -445,10 +446,9 @@ void CGCFG::MergeBB(BB &merger, BB &mergee) { for (BB *bb : mergee.GetSuccs()) { bb->RemovePreds(mergee); bb->PushBackPreds(merger); - merger.PushBackSuccs(*bb); + merger.PushBackSuccs(*bb, mergee.GetEdgeProb(*bb)); } merger.SetKind(mergee.GetKind()); - merger.SetNeedRestoreCfi(mergee.IsNeedRestoreCfi()); mergee.SetNext(nullptr); mergee.SetPrev(nullptr); mergee.ClearPreds(); @@ -614,11 +614,11 @@ void CGCFG::RemoveBB(BB &curBB, bool isGotoIf) const { insnVisitor->ModifyJumpTarget(targetLabel, *preBB); } if (fallthruSuc != nullptr && !fallthruSuc->IsPredecessor(*preBB)) { - preBB->PushBackSuccs(*fallthruSuc); + preBB->PushBackSuccs(*fallthruSuc, preBB->GetEdgeProb(curBB)); fallthruSuc->PushBackPreds(*preBB); } if (sucBB != nullptr && !sucBB->IsPredecessor(*preBB)) { - preBB->PushBackSuccs(*sucBB); + preBB->PushBackSuccs(*sucBB, preBB->GetEdgeProb(curBB)); sucBB->PushBackPreds(*preBB); } preBB->RemoveSuccs(curBB); @@ -967,16 +967,16 @@ void CGCFG::UpdatePredsSuccsAfterSplit(BB &pred, BB &succ, BB &newBB) const { } newBB.PushBackSuccs(succ); - /* connext pred -> newBB */ + /* connect pred -> newBB */ for (auto it = pred.GetSuccsBegin(); it != pred.GetSuccsEnd(); ++it) { if (*it == &succ) { auto origIt = it; pred.EraseSuccs(it); if (origIt != succ.GetSuccsBegin()) { --origIt; - pred.InsertSucc(origIt, newBB); + pred.InsertSucc(origIt, newBB, pred.GetEdgeProb(succ)); } else { - pred.PushFrontSuccs(newBB); + pred.PushFrontSuccs(newBB, pred.GetEdgeProb(succ)); } break; } @@ -1035,8 +1035,7 @@ BB *CGCFG::BreakCriticalEdge(BB &pred, BB &succ) const { cgFunc->ClearBBInVec(newBB->GetId()); return nullptr; } else { - cgFunc->GetLastBB()->AppendBB(*newBB); - cgFunc->SetLastBB(*newBB); + cgFunc->GetLastBB()->PrependBB(*newBB); } } else { exitBB->AppendBB(*newBB); @@ -1119,10 +1118,15 @@ void CGCFG::ReverseCriticalEdge(BB &cbb) { ASSERT(0, "unexpeced bb kind in BreakCriticalEdge"); } + // Remove edge freq before removing bb. + pred->RemoveEdgeFreq(cbb); pred->RemoveSuccs(cbb); pred->PushBackSuccs(*succ); succ->RemovePreds(cbb); succ->PushBackPreds(*pred); + // Maintain the frequency of the edge. + pred->InitEdgeFreq(); + pred->SetEdgeFreq(*succ, cbb.GetFrequency()); } #endif diff --git a/src/mapleall/maple_be/src/cg/cg_mc_ssa_pre.cpp b/src/mapleall/maple_be/src/cg/cg_mc_ssa_pre.cpp index 1114dc1798..38561bf0b3 100644 --- a/src/mapleall/maple_be/src/cg/cg_mc_ssa_pre.cpp +++ b/src/mapleall/maple_be/src/cg/cg_mc_ssa_pre.cpp @@ -139,7 +139,7 @@ void McSSAPre::DumpRGToFile() { LogInfo::MapleLogger() << "++++ ssapre candidate " << workCand->workCandID << " dumped to " << fileName << "\n"; } -bool McSSAPre::IncludedEarlier(Visit **cut, const Visit *curVisit, uint32 nextRouteIdx) const { +bool McSSAPre::IncludedEarlier(Visit * const *cut, const Visit *curVisit, uint32 nextRouteIdx) const { uint32 i = nextRouteIdx; while (i != 0) { i--; diff --git a/src/mapleall/maple_be/src/cg/cg_option.cpp b/src/mapleall/maple_be/src/cg/cg_option.cpp index cd46153ef0..1fd5e95a81 100644 --- a/src/mapleall/maple_be/src/cg/cg_option.cpp +++ b/src/mapleall/maple_be/src/cg/cg_option.cpp @@ -28,7 +28,6 @@ using namespace maple; const std::string kMplcgVersion = ""; -bool CGOptions::timePhases = false; std::string CGOptions::targetArch = ""; std::unordered_set CGOptions::dumpPhases = {}; std::unordered_set CGOptions::skipPhases = {}; @@ -74,6 +73,14 @@ std::string CGOptions::functionReorderAlgorithm = ""; std::string CGOptions::functionReorderProfile = ""; std::string CGOptions::cpu = "cortex-a53"; bool CGOptions::doOptimizedFrameLayout = true; +bool CGOptions::doPgoCodeAlign = false; +// Select fraction of the maximal frequency of executions of basic block in function given basic block get alignment. +uint32 CGOptions::alignThreshold = 100; +// Loops iterating at least selected number of iterations will get loop alignment. +uint32 CGOptions::alignLoopIterations = 4; +// percentage of frequency of first bb, if the freq of edge to retbb >= dupFreqThreshold, retbb will be duplicated. +uint32 CGOptions::dupFreqThreshold = 100; + #if TARGAARCH64 || TARGRISCV64 bool CGOptions::useBarriersForVolatile = false; #else @@ -128,7 +135,7 @@ bool CGOptions::doPatchLongBranch = false; bool CGOptions::doPreSchedule = false; bool CGOptions::emitBlockMarker = true; bool CGOptions::inRange = false; -bool CGOptions::doPreLSRAOpt = false; +bool CGOptions::doPreRAOpt = false; bool CGOptions::doLocalRefSpill = false; bool CGOptions::doCalleeToSpill = false; bool CGOptions::doRegSavesOpt = false; @@ -141,6 +148,7 @@ bool CGOptions::generalRegOnly = false; bool CGOptions::fastMath = false; bool CGOptions::doAlignAnalysis = false; bool CGOptions::doCondBrAlign = false; +bool CGOptions::doLoopAlign = false; bool CGOptions::cgBigEndian = false; bool CGOptions::arm64ilp32 = false; bool CGOptions::noCommon = false; @@ -229,7 +237,7 @@ bool CGOptions::SolveOptions(bool isDebug) { if (opts::cg::fpic.IsEnabledByUser() || opts::cg::fPIC.IsEnabledByUser()) { /* To avoid fpie mode being modified twice, need to ensure fpie is not opened. */ - if (!opts::cg::fpie && !opts::cg::fpie.IsEnabledByUser() && !opts::cg::fPIE.IsEnabledByUser() &&!opts::cg::fPIE) { + if (!opts::cg::fpie && !opts::cg::fpie.IsEnabledByUser() && !opts::cg::fPIE.IsEnabledByUser() && !opts::cg::fPIE) { if (opts::cg::fPIC && opts::cg::fPIC.IsEnabledByUser()) { SetPICOptionHelper(kLargeMode); SetPIEMode(kClose); @@ -294,10 +302,6 @@ bool CGOptions::SolveOptions(bool isDebug) { SetRange(opts::cg::range, "--range", GetRange()); } - if (opts::cg::timePhases.IsEnabledByUser()) { - opts::cg::timePhases ? EnableTimePhases() : DisableTimePhases(); - } - if (opts::cg::dumpFunc.IsEnabledByUser()) { SetDumpFunc(opts::cg::dumpFunc); } @@ -487,8 +491,8 @@ bool CGOptions::SolveOptions(bool isDebug) { opts::cg::hotcoldsplit ? EnableHotColdSplit() : DisableHotColdSplit(); } - if (opts::cg::prelsra.IsEnabledByUser()) { - opts::cg::prelsra ? EnablePreLSRAOpt() : DisablePreLSRAOpt(); + if (opts::cg::preraopt.IsEnabledByUser()) { + opts::cg::preraopt ? EnablePreRAOpt() : DisablePreRAOpt(); } if (opts::cg::lsraLvarspill.IsEnabledByUser()) { @@ -674,6 +678,10 @@ bool CGOptions::SolveOptions(bool isDebug) { opts::cg::condbrAlign ? EnableCondBrAlign() : DisableCondBrAlign(); } + if (opts::cg::loopAlign.IsEnabledByUser()) { + opts::cg::loopAlign ? EnableLoopAlign() : DisableLoopAlign(); + } + /* big endian can be set with several options: --target, -Be. * Triple takes to account all these options and allows to detect big endian with IsBigEndian() interface */ Triple::GetTriple().IsBigEndian() ? EnableBigEndianInCG() : DisableBigEndianInCG(); @@ -776,6 +784,23 @@ bool CGOptions::SolveOptions(bool isDebug) { } SetOption(kWithSrc); + + if (opts::cg::pgoCodeAlign.IsEnabledByUser()) { + EnablePgoCodeAlign(); + } + + if (opts::cg::alignThreshold.IsEnabledByUser()) { + SetAlignThreshold(opts::cg::alignThreshold); + } + + if (opts::cg::alignLoopIterations.IsEnabledByUser()) { + SetAlignLoopIterations(opts::cg::alignLoopIterations); + } + + if (opts::cg::dupFreqThreshold.IsEnabledByUser()) { + SetDupFreqThreshold(opts::cg::dupFreqThreshold); + } + /* override some options when loc, dwarf is generated */ if (WithLoc()) { SetOption(kWithSrc); @@ -861,7 +886,7 @@ void CGOptions::EnableO0() { doPeephole = false; doStoreLoadOpt = false; doGlobalOpt = false; - doPreLSRAOpt = false; + doPreRAOpt = false; doLocalRefSpill = false; doCalleeToSpill = false; doPreSchedule = false; @@ -872,6 +897,7 @@ void CGOptions::EnableO0() { doWriteRefFieldOpt = false; doAlignAnalysis = false; doCondBrAlign = false; + doLoopAlign = false; doAggrOpt = false; SetOption(kUseUnwindTables); if (maple::Triple::GetTriple().GetEnvironment() == Triple::kGnuIlp32) { @@ -886,7 +912,7 @@ void CGOptions::EnableO0() { void CGOptions::EnableO1() { optimizeLevel = kLevel1; - doPreLSRAOpt = true; + doPreRAOpt = true; doCalleeToSpill = true; doTailCallOpt = true; SetOption(kConstFold); @@ -912,6 +938,7 @@ void CGOptions::EnableO2() { doSchedule = true; doAlignAnalysis = true; doCondBrAlign = true; + doLoopAlign = true; doRetMerge = true; doAggrOpt = true; SetOption(kConstFold); @@ -919,14 +946,14 @@ void CGOptions::EnableO2() { ClearOption(kUseStackProtectorStrong); ClearOption(kUseStackProtectorAll); #if defined(TARGARM32) && TARGARM32 - doPreLSRAOpt = false; + doPreRAOpt = false; doLocalRefSpill = false; doCalleeToSpill = false; doWriteRefFieldOpt = false; doTailCallOpt = false; ClearOption(kProEpilogueOpt); #else - doPreLSRAOpt = true; + doPreRAOpt = true; doLocalRefSpill = true; doCalleeToSpill = true; doRegSavesOpt = true; @@ -937,8 +964,8 @@ void CGOptions::EnableO2() { SetOption(kProEpilogueOpt); #endif - /* O2 performs expand128Floats optimization on mpl2mpl (O0 does it on codegen) */ - opts::expand128Floats.SetValue(false); + /* O2 performs legalizeNumericTypes optimization on mpl2mpl (O0 does it on codegen) */ + opts::legalizeNumericTypes.SetValue(false); } void CGOptions::EnableLiteCG() { @@ -953,7 +980,7 @@ void CGOptions::EnableLiteCG() { doPeephole = false; doStoreLoadOpt = false; doGlobalOpt = false; - doPreLSRAOpt = false; + doPreRAOpt = false; doLocalRefSpill = false; doCalleeToSpill = false; doPreSchedule = false; diff --git a/src/mapleall/maple_be/src/cg/cg_options.cpp b/src/mapleall/maple_be/src/cg/cg_options.cpp index 6222440e17..ab2b1783f3 100644 --- a/src/mapleall/maple_be/src/cg/cg_options.cpp +++ b/src/mapleall/maple_be/src/cg/cg_options.cpp @@ -125,10 +125,10 @@ maplecl::Option hotcoldsplit({"--hotcoldsplit"}, " --no-hotcoldsplit \n", {cgCategory}, maplecl::DisableWith("--no-hotcoldsplit")); -maplecl::Option prelsra({"--prelsra"}, - " --prelsra \tPerform live interval simplification in LSRA\n" - " --no-prelsra \n", - {cgCategory}, maplecl::DisableWith("--no-prelsra")); +maplecl::Option preraopt({"--preraopt"}, + " --preraopt \tPerform live interval simplification in RA\n" + " --no-preraopt \n", + {cgCategory}, maplecl::DisableWith("--no-preraopt")); maplecl::Option lsraLvarspill({"--lsra-lvarspill"}, " --lsra-lvarspill \tPerform LSRA spill using local ref var stack locations\n" @@ -376,11 +376,6 @@ maplecl::Option dumpFunc({"--dump-func"}, "(can only specify once)\n", {cgCategory}); -maplecl::Option timePhases({"--time-phases"}, - " --time-phases \tCollect compilation time stats for each phase.\n" - " --no-time-phases \tDon't Collect compilation time stats for each phase.\n", - {cgCategory}, maplecl::DisableWith("--no-time-phases")); - maplecl::Option useBarriersForVolatile({"--use-barriers-for-volatile"}, " --use-barriers-for-volatile \tOptimize volatile load/str\n" " --no-use-barriers-for-volatile\n", @@ -605,4 +600,22 @@ maplecl::Option optimizedFrameLayout({"--optimized-frame-layout"}, " --optimized-frame-layout \tEnable optimized framelayout, put small local variables near sp, put " "callee save region near sp\n", {cgCategory}, maplecl::DisableWith("--no-optimized-frame-layout")); -} + +maplecl::Option loopAlign({"--loop-align"}, + " --loop-align \tPerform add nop for loop instead of insert .p2align\n" + " --no-loop-align \n", + {cgCategory}, maplecl::DisableWith("--no-loop-align")); +maplecl::Option pgoCodeAlign({"--pgo-code-align"}, + " --pgo-code-align \tuse the bb's frequency generated by pgo" + " to do the alignment analysis\n", + {cgCategory}); +maplecl::Option alignThreshold({"--align-threshold"}, + " --align-threshold=NUM(1, 100) \talign thresold, default 100", + {cgCategory}); +maplecl::Option alignLoopIterations({"--align-loop-Iterations"}, + " --align-loop-Iterations=NUM(1, 4) \tdefault 4", + {cgCategory}); +maplecl::Option dupFreqThreshold({"--dup-threshold"}, + " --dup-threshold=NUM(1, 100) \tdup thresold, default 100", + {cgCategory}); +} // namespace opts::cg diff --git a/src/mapleall/maple_be/src/cg/cg_pgo_gen.cpp b/src/mapleall/maple_be/src/cg/cg_pgo_gen.cpp index 04a80e851b..261dc00855 100644 --- a/src/mapleall/maple_be/src/cg/cg_pgo_gen.cpp +++ b/src/mapleall/maple_be/src/cg/cg_pgo_gen.cpp @@ -185,6 +185,7 @@ void CGProfGen::CreateProfInitExitFunc(MIRModule &m) { MIRType *voidTy = GlobalTables::GetTypeTable().GetVoid(); auto *newEntry = m.GetMIRBuilder()->CreateFunction(profEntry, *voidTy, formals); newEntry->SetWithSrc(false); + m.SetCurFunction(newEntry); auto *initInSo = m.GetMIRBuilder()->GetOrCreateFunction("__mpl_pgo_init", TyIdx(PTY_void)); initInSo->SetWithSrc(false); auto *entryBody = newEntry->GetCodeMempool()->New(); @@ -203,6 +204,7 @@ void CGProfGen::CreateProfInitExitFunc(MIRModule &m) { auto profSetup = std::string("__" + LiteProfile::FlatenName(m.GetFileName()) + AppendModSpecSuffix(m) + "_setup"); auto *newSetup = m.GetMIRBuilder()->CreateFunction(profSetup, *voidTy, formals); newSetup->SetWithSrc(false); + m.SetCurFunction(newSetup); auto *setupInSo = m.GetMIRBuilder()->GetOrCreateFunction("__mpl_pgo_setup", TyIdx(PTY_void)); setupInSo->SetWithSrc(false); auto *setupBody = newSetup->GetCodeMempool()->New(); @@ -217,6 +219,7 @@ void CGProfGen::CreateProfInitExitFunc(MIRModule &m) { auto profExit = std::string("__" + LiteProfile::FlatenName(m.GetFileName()) + AppendModSpecSuffix(m) + "_exit"); auto *newExit = m.GetMIRBuilder()->CreateFunction(profExit, *voidTy, formals); newExit->SetWithSrc(false); + m.SetCurFunction(newExit); auto *exitInSo = m.GetMIRBuilder()->GetOrCreateFunction("__mpl_pgo_exit", TyIdx(PTY_void)); exitInSo->SetWithSrc(false); auto *exitBody = newExit->GetCodeMempool()->New(); diff --git a/src/mapleall/maple_be/src/cg/cg_pgo_use.cpp b/src/mapleall/maple_be/src/cg/cg_pgo_use.cpp index 41792ac588..529406092a 100644 --- a/src/mapleall/maple_be/src/cg/cg_pgo_use.cpp +++ b/src/mapleall/maple_be/src/cg/cg_pgo_use.cpp @@ -93,19 +93,20 @@ void CGProfUse::InitBBEdgeInfo() { continue; } BB *src = e->GetSrcBB(); + BB *dest = e->GetDestBB(); BBUseInfo *srcUseInfo = GetOrCreateBBUseInfo(*src, true); + BBUseInfo *destUseInfo = GetOrCreateBBUseInfo(*dest, true); if (srcUseInfo->GetStatus() && srcUseInfo->GetOutEdgeSize() == 1) { SetEdgeCount(*e, srcUseInfo->GetCount()); - } else { - BB *dest = e->GetDestBB(); - auto destUseInfo = GetOrCreateBBUseInfo(*dest, true); - if (destUseInfo->GetStatus() && destUseInfo->GetInEdgeSize() == 1) { - SetEdgeCount(*e, destUseInfo->GetCount()); - } + } else if (destUseInfo->GetStatus() && destUseInfo->GetInEdgeSize() == 1) { + SetEdgeCount(*e, destUseInfo->GetCount()); } if (e->GetStatus()) { continue; } + if (srcUseInfo->GetStatus() || destUseInfo->GetStatus()) { + continue; + } SetEdgeCount(*e, 0); } } @@ -176,7 +177,7 @@ void CGProfUse::ApplyOnBB() { continue; } curbb->InitEdgeFreq(); - auto outEdges = useInfo->GetOutEdges(); + auto &outEdges = useInfo->GetOutEdges(); for (auto *e : outEdges) { auto *destBB = e->GetDestBB(); if (destBB == f.GetCommonExitBB()) { @@ -253,6 +254,12 @@ void CGProfUse::LayoutBBwithProfile() { // Init layout settings for CG chainLayout.SetHasRealProfile(true); chainLayout.SetConsiderBetterPred(true); + FOR_ALL_BB(bb, &f) { + if (bb->IsWontExit() && !(bb->GetPreds().empty() && bb->GetSuccs().empty())) { + chainLayout.SetMarkNeverExe(false); + break; + } + } chainLayout.BuildChainForFunc(); NodeChain *mainChain = chainLayout.GetNode2Chain()[f.GetFirstBB()->GetID()]; @@ -339,7 +346,7 @@ bool CgPgoUse::PhaseRun(maplebe::CGFunc &f) { f.GetTheCFG()->InitInsnVisitor(f); split->CollectCriticalEdges(); split->SplitCriticalEdges(); - MapleSet newbbinsplit = split->CopyNewBBInfo(); + auto &newbbinsplit = split->GetNewBBInfo(); MaplePhase *domPhase = GetAnalysisInfoHook()-> ForceRunAnalysisPhase, CGFunc>(&CgDomAnalysis::id, f); @@ -375,6 +382,7 @@ bool CgPgoUse::PhaseRun(maplebe::CGFunc &f) { CHECK_FATAL(false, "infinte loop"); } } + LogInfo::MapleLogger() << std::endl; return false; } @@ -383,6 +391,7 @@ MAPLE_TRANSFORM_PHASE_REGISTER(CgPgoUse, cgpgouse) void CGProfUse::AddBBProf(BB &bb) { if (layoutBBs.empty()) { + f.SetFirstBB(bb); AddBB(bb); return; } diff --git a/src/mapleall/maple_be/src/cg/cg_phasemanager.cpp b/src/mapleall/maple_be/src/cg/cg_phasemanager.cpp index c846ff94aa..d0ba3b4ab5 100644 --- a/src/mapleall/maple_be/src/cg/cg_phasemanager.cpp +++ b/src/mapleall/maple_be/src/cg/cg_phasemanager.cpp @@ -434,17 +434,9 @@ static std::optional> ReorderFunction(MIRModule &m, } /* =================== new phase manager =================== */ -#ifdef RA_PERF_ANALYSIS -#include "reg_alloc_lsra.h" -#endif - bool CgFuncPM::PhaseRun(MIRModule &m) { CreateCGAndBeCommon(m); bool changed = false; - /* reserve static symbol for debugging */ - if (!cgOptions->WithDwarf()) { - SweepUnusedStaticSymbol(m); - } if (cgOptions->IsRunCG()) { GenerateOutPutFile(m); @@ -535,12 +527,6 @@ bool CgFuncPM::PhaseRun(MIRModule &m) { CGOptions::DisableInRange(); } PostOutPut(m); -#ifdef RA_PERF_ANALYSIS - if (cgOptions->IsEnableTimePhases()) { - printLSRATime(); - printRATime(); - } -#endif } else { LogInfo::MapleLogger(kLlErr) << "Skipped generating .s because -no-cg is given" << '\n'; } @@ -766,5 +752,4 @@ MAPLE_TRANSFORM_PHASE_REGISTER(CgAlignAnalysis, alignanalysis) MAPLE_TRANSFORM_PHASE_REGISTER(CgFrameFinalize, framefinalize) MAPLE_TRANSFORM_PHASE_REGISTER(CgYieldPointInsertion, yieldpoint) MAPLE_TRANSFORM_PHASE_REGISTER(CgGenProEpiLog, generateproepilog) -MAPLE_TRANSFORM_PHASE_REGISTER(CgIsolateFastPath, isolatefastpath) } /* namespace maplebe */ diff --git a/src/mapleall/maple_be/src/cg/cg_predict.cpp b/src/mapleall/maple_be/src/cg/cg_predict.cpp new file mode 100644 index 0000000000..2250aacb07 --- /dev/null +++ b/src/mapleall/maple_be/src/cg/cg_predict.cpp @@ -0,0 +1,437 @@ +/* + * Copyright (c) [2023] Huawei Technologies Co.,Ltd.All rights reserved. + * + * OpenArkCompiler is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * + * http://license.coscl.org.cn/MulanPSL2 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ +#include "cg_predict.h" +#include +#include +#include +#include +#include "optimize_common.h" + +namespace { +using namespace maplebe; +constexpr uint32 kScaleDownFactor = 2; +constexpr int32 kProbAll = 10000; +constexpr uint32 kMaxNumBBToPredict = 15000; +} // anonymous namespace + +namespace maplebe { + +Edge *CgPrediction::FindEdge(const BB &src, const BB &dest) const { + Edge *edge = edges[src.GetId()]; + while (edge != nullptr) { + if (&dest == &edge->dest) { + return edge; + } + edge = edge->next; + } + return nullptr; +} + +// Recognize backedges identified by loops. +bool CgPrediction::IsBackEdge(const Edge &edge) const { + for (auto *backEdge : backEdges) { + if (backEdge == &edge) { + return true; + } + } + return false; +} + +void CgPrediction::Verify() { + for (auto *bb : cgFunc->GetAllBBs()) { + if (bb == nullptr) { + continue; + } + for (auto *it : bb->GetSuccs()) { + if (bb->GetEdgeProb(*it) < 0 || bb->GetEdgeProb(*it) > 10000) { + CHECK_FATAL_FALSE("error prob"); + } else { + } + } + } +} + +void CgPrediction::FixRedundantSuccsPreds() { + BB *firstBB = cgFunc->GetFirstBB(); + for (BB *curBB = firstBB; curBB != nullptr; curBB = curBB->GetNext()) { + RemoveRedundantSuccsPreds(curBB); + } +} + +void CgPrediction::RemoveRedundantSuccsPreds(BB *bb) { + auto &succs = bb->GetSuccs(); + for (BB *succBB : succs) { + int count = 0; + for (auto it = succs.begin(); it != succs.end(); it++) { + if (*it == succBB) { + count++; + } + } + for (auto it = succs.begin(); it != succs.end(); it++) { + if (*it == succBB && count > 1) { + bb->EraseSuccs(it); + count--; + } + } + } + auto &preds = bb->GetPreds(); + for (BB *predBB : preds) { + int count = 0; + for (auto it = preds.begin(); it != preds.end(); it++) { + if (*it == predBB) { + count++; + } + } + for (auto it = preds.begin(); it != preds.end(); it++) { + if (*it == predBB && count > 1) { + bb->ErasePreds(it); + count--; + } + } + } +} + +void CgPrediction::NormallizeCFGProb() { + BB *firstBB = cgFunc->GetFirstBB(); + for (BB *curBB = firstBB; curBB != nullptr; curBB = curBB->GetNext()) { + NormallizeBBProb(curBB); + } +} + +void CgPrediction::NormallizeBBProb(BB *bb) { + std::vector unknownProbBBs; + int32 knownProbSum = 0; + for (BB *succBB : bb->GetSuccs()) { + int32 bbToSuccProb = bb->GetEdgeProb(*succBB); + if (bbToSuccProb == BB::kUnknownProb) { + unknownProbBBs.push_back(succBB); + } else { + knownProbSum += bbToSuccProb; + } + } + if (unknownProbBBs.size() == 0) { + return; + } + int32 probForUnknown = (kProbAll - knownProbSum) / unknownProbBBs.size(); + for (BB* unknownBB : unknownProbBBs) { + bb->SetEdgeProb(*unknownBB, probForUnknown); + } +} + +void CgPrediction::VerifyFreq(CGFunc &cgFunc) { + FOR_ALL_BB(bb, &cgFunc) { // skip common entry and common exit + // cfi bb we can not prop to this bb + if (bb == nullptr || bb->GetKind() == BB::kBBReturn || bb->GetKind() == BB::kBBNoReturn || bb->GetSuccsSize() == 0) { + continue; + } + // bb freq == sum(out edge freq) + uint64 succSumFreq = 0; + for (auto succFreq : bb->GetSuccsFreq()) { + succSumFreq += succFreq; + } + if (succSumFreq != bb->GetFrequency()) { + LogInfo::MapleLogger() << "[VerifyFreq failure] BB" << bb->GetId() << " freq: " << + bb->GetFrequency() << ", all succ edge freq sum: " << succSumFreq << std::endl; + LogInfo::MapleLogger() << cgFunc.GetName() << std::endl; + CHECK_FATAL_FALSE("check this case"); + } + } +} + +void CgPrediction::Init() { + edges.resize(cgFunc->GetAllBBs().size()); + bbVisited.resize(cgFunc->GetAllBBs().size()); + for (auto *bb : cgFunc->GetAllBBs()) { + if (bb == nullptr) { + continue; + } + BBID idx = bb->GetId(); + bbVisited[idx] = true; + edges[idx] = nullptr; + for (auto *it : bb->GetSuccs()) { + Edge *edge = tmpAlloc.GetMemPool()->New(*bb, *it); + edge->probability = bb->GetEdgeProb(*it); + edge->next = edges[idx]; + edges[idx] = edge; + } + } + if (cgFunc->GetCommonEntryBB() != cgFunc->GetFirstBB()) { + bbVisited[cgFunc->GetCommonEntryBB()->GetId()] = true; + } + if (cgFunc->GetCommonExitBB() != cgFunc->GetLastBB()) { + bbVisited[cgFunc->GetCommonExitBB()->GetId()] = true; + } +} + +// Use head to propagate freq for normal loops. Use headers to propagate freq for irreducible SCCs +// because there are multiple headers in irreducible SCCs. +bool CgPrediction::DoPropFreq(const BB *head, std::vector *headers, BB &bb) { + if (bbVisited[bb.GetId()]) { + return true; + } + // 1. find bfreq(bb) + if (&bb == head) { + bb.SetFrequency(kFreqBase); + if (predictDebug) { + LogInfo::MapleLogger() << "Set Header Frequency BB" << bb.GetId() << ": " << bb.GetFrequency() << std::endl; + } + } else if (headers != nullptr && std::find(headers->begin(), headers->end(), &bb) != headers->end()) { + bb.SetFrequency(static_cast(kFreqBase / headers->size())); + if (predictDebug) { + LogInfo::MapleLogger() << "Set Header Frequency BB" << bb.GetId() << ": " << bb.GetFrequency() << std::endl; + } + } else { + // Check whether all pred bb have been estimated + for (BB *pred : bb.GetPreds()) { + Edge *edge = FindEdge(*pred, bb); + CHECK_NULL_FATAL(edge); + if (!bbVisited[pred->GetId()] && pred != &bb && !IsBackEdge(*edge)) { + if (predictDebug) { + LogInfo::MapleLogger() << "BB" << bb.GetId() << " can't be estimated because it's predecessor BB" << + pred->GetId() << " hasn't be estimated yet\n"; + } + return false; + } + } + FreqType freq = 0; + double cyclicProb = 0; + for (BB *pred : bb.GetPreds()) { + Edge *edge = FindEdge(*pred, bb); + ASSERT_NOT_NULL(edge); + if (IsBackEdge(*edge) && &edge->dest == &bb) { + cyclicProb += backEdgeProb[edge]; + } else { + freq += edge->frequency; + } + } + if (cyclicProb > (1 - std::numeric_limits::epsilon())) { + cyclicProb = 1 - std::numeric_limits::epsilon(); + } + // Floating-point numbers have precision problems, consider using integers to represent backEdgeProb? + bb.SetFrequency(static_cast(static_cast(freq / (1 - cyclicProb)))); + } + // 2. calculate frequencies of bb's out edges + if (predictDebug) { + LogInfo::MapleLogger() << "Estimate Frequency of BB" << bb.GetId() << "\n"; + } + bbVisited[bb.GetId()] = true; + uint32 tmp = 0; + uint64 total = 0; + Edge *bestEdge = nullptr; + size_t i = 0; + for (BB *succ : bb.GetSuccs()) { + Edge *edge = FindEdge(bb, *succ); + CHECK_NULL_FATAL(edge); + if (i == 0) { + bestEdge = edge; + tmp = edge->probability; + } else { + if (edge->probability > tmp) { + tmp = edge->probability; + bestEdge = edge; + } + } + edge->frequency = bb.GetFrequency() * 1.0 * edge->probability / kProbBase; + total += static_cast(edge->frequency); + bool isBackEdge = headers != nullptr ? std::find(headers->begin(), headers->end(), &edge->dest) != headers->end() : + &edge->dest == head; + if (isBackEdge) { // is the edge a back edge + backEdgeProb[edge] = static_cast(edge->probability) * bb.GetFrequency() / (kProbBase * kFreqBase); + } + i++; + } + // To ensure that the sum of out edge frequency is equal to bb frequency + if (bestEdge != nullptr && static_cast(total) != bb.GetFrequency()) { + bestEdge->frequency += bb.GetFrequency() - static_cast(total); + } + return true; +} + +bool CgPrediction::PropFreqInFunc() { + if (predictDebug) { + LogInfo::MapleLogger() << "== freq prop for func" << std::endl; + } + // Now propagate the frequencies through all the blocks. + std::fill(bbVisited.begin(), bbVisited.end(), false); + BB *entryBB = cgFunc->GetCommonEntryBB(); + if (entryBB != cgFunc->GetFirstBB()) { + bbVisited[entryBB->GetID()] = false; + } + if (cgFunc->GetCommonExitBB() != cgFunc->GetLastBB()) { + bbVisited[cgFunc->GetCommonExitBB()->GetID()] = false; + } + cgFunc->GetFirstBB()->SetFrequency(static_cast(kFreqBase)); + + for (auto *node : dom->GetReversePostOrder()) { + auto bb = cgFunc->GetBBFromID(BBID(node->GetID())); + if (bb == entryBB) { + continue; + } + bool ret = DoPropFreq(cgFunc->GetFirstBB(), nullptr, *bb); + if (!ret) { + // found irreducible SCC + return false; + } + } + return true; +} + +void CgPrediction::PropFreqInLoops() { + for (auto *loop : cgLoop->GetLoops()) { + auto &loopBBs = loop->GetLoopBBs(); + auto &tailBBIDs = loop->GetBackEdges(); + BB &headerBB = loop->GetHeader(); + for (auto tailBBID : tailBBIDs) { + auto *backEdge = FindEdge(*cgFunc->GetBBFromID(tailBBID), headerBB); + backEdges.push_back(backEdge); + } + for (auto &bbId : loopBBs) { + bbVisited[bbId] = false; + } + if (predictDebug) { + LogInfo::MapleLogger() << "== freq prop for loop: header BB" << headerBB.GetID() << std::endl; + } + // sort loop BB by topological order + const auto &bbId2RpoId = dom->GetReversePostOrderId(); + std::vector rpoLoopBBs(loopBBs.begin(), loopBBs.end()); + std::sort(rpoLoopBBs.begin(), rpoLoopBBs.end(), [&bbId2RpoId](BBID a, BBID b) { + return bbId2RpoId[a] < bbId2RpoId[b]; + }); + // calculate header first + bool ret = DoPropFreq(&headerBB, nullptr, headerBB); + CHECK_FATAL(ret, "prop freq for loop header failed"); + for (auto bbId : rpoLoopBBs) { + // it will fail if the loop contains irreducible SCC + (void)DoPropFreq(&headerBB, nullptr, *cgFunc->GetBBFromID(bbId)); + } + } +} + +void Edge::Dump(bool dumpNext) const { + LogInfo::MapleLogger() << src.GetId() << " ==> " << dest.GetId() << " (prob: " << probability << + ", freq: " << frequency << ")" << std::endl; + if (dumpNext && next != nullptr) { + next->Dump(dumpNext); + } +} + +void CgPrediction::PrintAllEdges() { + for (auto *edge : edges) { + if (edge == nullptr) continue; + edge->Dump(true); + } +} + +void CgPrediction::SavePredictResultIntoCfg() { + // Init bb succFreq if needed + for (auto *bb : cgFunc->GetAllBBs()) { + if (bb == nullptr) { + continue; + } + if (bb->GetSuccsFreq().size() != bb->GetSuccs().size()) { + bb->InitEdgeFreq(); + } + } + // Save edge freq into cfg + for (auto *edge : edges) { + while (edge != nullptr) { + BB &srcBB = edge->src; + BB &destBB = edge->dest; + srcBB.SetEdgeFreq(destBB, edge->frequency); + edge = edge->next; + } + } +} + +void CgPrediction::ComputeBBFreq() { + if (predictDebug) { + LogInfo::MapleLogger() << "\ncompute-bb-freq" << std::endl; + } + double backProb = 0.0; + for (size_t i = 0; i < cgFunc->GetAllBBs().size(); ++i) { + Edge *edge = edges[i]; + while (edge != nullptr) { + if (edge->probability > 0) { + backProb = edge->probability; + } else { + backProb = kProbBase / kScaleDownFactor; + } + backProb = backProb / kProbBase; + (void)backEdgeProb.insert(std::make_pair(edge, backProb)); + edge = edge->next; + } + } + // First compute frequencies locally for each loop from innermost + // to outermost to examine frequencies for back edges. + PropFreqInLoops(); + if (!PropFreqInFunc()) { + // found irreducible SCC + cgFunc->SetHasIrrScc(); + return; + } +} + +void CgPrediction::Run() { + if (predictDebug) { + LogInfo::MapleLogger() << "prediction: " << cgFunc->GetName() << "\n" << + "============" << std::string(cgFunc->GetName().size(), '=') << std::endl; + } + if (cgFunc->GetAllBBs().size() > kMaxNumBBToPredict) { + // The func is too large, won't run prediction + if (predictDebug) { + LogInfo::MapleLogger() << "func is too large to run prediction, bb number > " << kMaxNumBBToPredict << std::endl; + } + return; + } + // do not generate freq info for white list function. + if (LiteProfile::IsInWhiteList(cgFunc->GetName()) && CGOptions::DoLiteProfUse()) { + if (predictDebug) { + LogInfo::MapleLogger() << "white list function, do not run prediction" << std::endl; + } + return; + } + FixRedundantSuccsPreds(); + NormallizeCFGProb(); + Init(); + ComputeBBFreq(); + SavePredictResultIntoCfg(); +} + +bool CgPredict::PhaseRun(maplebe::CGFunc &f) { + DomAnalysis *domInfo = GET_ANALYSIS(CgDomAnalysis, f); + CHECK_NULL_FATAL(domInfo); + PostDomAnalysis *pdomInfo = GET_ANALYSIS(CgPostDomAnalysis, f); + CHECK_NULL_FATAL(pdomInfo); + LoopAnalysis *loopInfo = GET_ANALYSIS(CgLoopAnalysis, f); + CHECK_NULL_FATAL(loopInfo); + + MemPool *cgPredMp = GetPhaseMemPool(); + auto *cgPredict = cgPredMp->New(*cgPredMp, *ApplyTempMemPool(), f, *domInfo, *pdomInfo, *loopInfo); + cgPredict->Run(); + if (!f.HasIrrScc() && f.GetAllBBs().size() <= kMaxNumBBToPredict && + !(LiteProfile::IsInWhiteList(f.GetName()) && CGOptions::DoLiteProfUse())) { + CgPrediction::VerifyFreq(f); + } + + return false; +} + +void CgPredict::GetAnalysisDependence(AnalysisDep &aDep) const { + aDep.AddRequired(); + aDep.AddRequired(); + aDep.AddRequired(); +} +MAPLE_ANALYSIS_PHASE_REGISTER(CgPredict, cgpredict) +} \ No newline at end of file diff --git a/src/mapleall/maple_be/src/cg/cg_rce.cpp b/src/mapleall/maple_be/src/cg/cg_rce.cpp index 8479ba2a29..ee7e9e8144 100644 --- a/src/mapleall/maple_be/src/cg/cg_rce.cpp +++ b/src/mapleall/maple_be/src/cg/cg_rce.cpp @@ -18,7 +18,7 @@ namespace maplebe { void RedundantComputeElim::Dump(const Insn *insn1, const Insn *insn2) const { CHECK_FATAL(insn1 && insn2, "dump insn is null"); LogInfo::MapleLogger() << ">>>>>> SameRHSInsnPair in BB(" << - insn1->GetBB()->GetId() << ") at {" << g_count << "} <<<<<<\n"; + insn1->GetBB()->GetId() << ") at {" << kGcount << "} <<<<<<\n"; insn1->Dump(); insn2->Dump(); } diff --git a/src/mapleall/maple_be/src/cg/cg_validbit_opt.cpp b/src/mapleall/maple_be/src/cg/cg_validbit_opt.cpp index cb665c4c87..095a991d6b 100644 --- a/src/mapleall/maple_be/src/cg/cg_validbit_opt.cpp +++ b/src/mapleall/maple_be/src/cg/cg_validbit_opt.cpp @@ -103,7 +103,7 @@ void ValidBitOpt::RectifyValidBitNum() { } while (iterate); } -void ValidBitOpt::RecoverValidBitNum() { +void ValidBitOpt::SetValidBitToOpndSize() { FOR_ALL_BB(bb, cgFunc) { FOR_BB_INSNS(insn, bb) { if (!insn->IsMachineInstruction() && !insn->IsPhi()) { @@ -125,16 +125,14 @@ void ValidBitOpt::RecoverValidBitNum() { } void ValidBitOpt::Run() { - /* - * Set validbit of regOpnd before optimization - */ + // Set validbit of regOpnd before optimization + // Set to opnd size in case some optimization does not handle the validbitnum correctly. + SetValidBitToOpndSize(); RectifyValidBitNum(); DoOpt(); cgDce->DoDce(); - /* - * Recover validbit of regOpnd after optimization - */ - RecoverValidBitNum(); + // Recover validbit of regOpnd after optimization + SetValidBitToOpndSize(); } bool CgValidBitOpt::PhaseRun(maplebe::CGFunc &f) { diff --git a/src/mapleall/maple_be/src/cg/cgbb.cpp b/src/mapleall/maple_be/src/cg/cgbb.cpp index ec87636d91..5b93a5beed 100644 --- a/src/mapleall/maple_be/src/cg/cgbb.cpp +++ b/src/mapleall/maple_be/src/cg/cgbb.cpp @@ -274,6 +274,25 @@ int32 BB::NumInsn() const { return bbSize; } +// Number of instructions excluding DbgInsn , comments and pseudo insns +int32 BB::NumMachineInsn() const { + int32 bbSize = 0; + FOR_BB_INSNS_CONST(i, this) { + if (i->IsImmaterialInsn() || i->IsDbgInsn()) { + continue; + } + #if TARGAARCH64 + if (!i->IsMachineInstruction() || AArch64isa::IsPseudoInstruction(i->GetMachineOpcode())) { + #elif defined(TARGX86_64) && TARGX86_64 + if (!i->IsMachineInstruction()) { + #endif + continue; + } + ++bbSize; + } + return bbSize; +} + bool BB::IsInPhiList(regno_t regNO) { for (auto &phiInsnIt : std::as_const(phiInsnList)) { Insn *phiInsn = phiInsnIt.second; diff --git a/src/mapleall/maple_be/src/cg/cgfunc.cpp b/src/mapleall/maple_be/src/cg/cgfunc.cpp index 2c13ee6a7e..1787fbf380 100644 --- a/src/mapleall/maple_be/src/cg/cgfunc.cpp +++ b/src/mapleall/maple_be/src/cg/cgfunc.cpp @@ -24,9 +24,9 @@ #include "factory.h" #include "debug_info.h" #include "cfgo.h" +#include "dup_tail.h" #include "optimize_common.h" #include "me_function.h" - namespace maplebe { using namespace maple; diff --git a/src/mapleall/maple_be/src/cg/dup_tail.cpp b/src/mapleall/maple_be/src/cg/dup_tail.cpp new file mode 100644 index 0000000000..bd27765dac --- /dev/null +++ b/src/mapleall/maple_be/src/cg/dup_tail.cpp @@ -0,0 +1,121 @@ +/* + * Copyright (c) [2023] Huawei Technologies Co.,Ltd.All rights reserved. + * + * OpenArkCompiler is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * + * http://license.coscl.org.cn/MulanPSL2 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ +#include "dup_tail.h" +#include "cg_predict.h" +#include "cg.h" +/* + * This phase implements tail duplicate , + * which tries to merge ret bb + */ +namespace maplebe { + +bool DupPattern::Optimize(BB &curBB) { + if (curBB.IsUnreachable()) { + return false; + } + if (CGOptions::IsNoDupBB() || CGOptions::OptimizeForSize()) { + return false; + } + /* curBB can't be in try block */ + if (curBB.GetKind() != BB::kBBReturn || IsLabelInLSDAOrSwitchTable(curBB.GetLabIdx()) || + !curBB.GetEhSuccs().empty()) { + return false; + } + /* It is possible curBB jump to itself */ + uint32 numPreds = curBB.NumPreds(); + for (BB *bb : curBB.GetPreds()) { + if (bb == &curBB) { + numPreds--; + } + } + + if (numPreds > 1 && curBB.GetKind() == BB::kBBReturn) { + std::vector candidates; + for (BB *bb : curBB.GetPreds()) { + if (bb->GetKind() == BB::kBBGoto && bb->GetNext() != &curBB && bb != &curBB && !bb->IsEmpty()) { + candidates.emplace_back(bb); + } + } + if (candidates.empty()) { + return false; + } + Log(curBB.GetId()); + if (checkOnly) { + return false; + } + bool changed = false; + for (BB *bb : candidates) { + if (curBB.NumMachineInsn() > kSafeThreshold) { + continue; + } + if (curBB.NumMachineInsn() > kThreshold && bb->GetEdgeFreq(curBB) <= GetFreqThreshold()) { + continue; + } + if (curBB.GetEhSuccs().size() != bb->GetEhSuccs().size()) { + continue; + } + if (!curBB.GetEhSuccs().empty() && (curBB.GetEhSuccs().front() != bb->GetEhSuccs().front())) { + continue; + } + bb->RemoveInsn(*bb->GetLastInsn()); + FOR_BB_INSNS(insn, (&curBB)) { + if (!insn->IsMachineInstruction() && !insn->IsCfiInsn()) { + continue; + } + Insn *clonedInsn = cgFunc->GetTheCFG()->CloneInsn(*insn); + clonedInsn->SetPrev(nullptr); + clonedInsn->SetNext(nullptr); + clonedInsn->SetBB(nullptr); + bb->AppendInsn(*clonedInsn); + } + bb->SetKind(BB::kBBReturn); + bb->RemoveSuccs(curBB); + curBB.RemovePreds(*bb); + cgFunc->PushBackExitBBsVec(*bb); + cgFunc->GetCommonExitBB()->PushBackPreds(*bb); + changed = true; + } + cgFunc->GetTheCFG()->FlushUnReachableStatusAndRemoveRelations(curBB, *cgFunc); + return changed; + } + + return false; +} + +uint32 DupPattern::GetFreqThreshold() { + if (LiteProfile::IsInWhiteList(cgFunc->GetName()) && CGOptions::DoLiteProfUse()) { + return cgFunc->GetFirstBB()->GetFrequency() * kFreqThresholdPgo / 100; + } else { + uint32 freqThresholdStatic = CGOptions::GetDupFreqThreshold(); + return kFreqBase * freqThresholdStatic / 100; + } +} + +bool CgDupTail::PhaseRun(maplebe::CGFunc &f) { + DupTailOptimizer *dupTailOptimizer = f.GetCG()->CreateDupTailOptimizer(*GetPhaseMemPool(), f); + const std::string &funcClass = f.GetFunction().GetBaseClassName(); + const std::string &funcName = f.GetFunction().GetBaseFuncName(); + const std::string &name = funcClass + funcName; + if (!f.HasIrrScc()) { + dupTailOptimizer->Run(name); + } + return false; +} + +void CgDupTail::GetAnalysisDependence(maple::AnalysisDep &aDep) const { + aDep.AddRequired(); +} +MAPLE_TRANSFORM_PHASE_REGISTER_CANSKIP(CgDupTail, duptail) +} /* namespace maplebe */ diff --git a/src/mapleall/maple_be/src/cg/ebo.cpp b/src/mapleall/maple_be/src/cg/ebo.cpp index 3ea130f4a8..971d23243b 100644 --- a/src/mapleall/maple_be/src/cg/ebo.cpp +++ b/src/mapleall/maple_be/src/cg/ebo.cpp @@ -67,11 +67,6 @@ MemOpndInfo *Ebo::GetMemInfo(InsnInfo &insnInfo) const { return nullptr; } -void Ebo::EnlargeSpaceForLA(Insn &csetInsn) const { - CHECK_FATAL(live != nullptr, "no live info!"); - live->EnlargeSpaceForLiveAnalysis(*csetInsn.GetBB()); -} - bool Ebo::IsFrameReg(Operand &opnd) const { if (!opnd.IsRegister()) { return false; diff --git a/src/mapleall/maple_be/src/cg/emit.cpp b/src/mapleall/maple_be/src/cg/emit.cpp index 9bac98d3e3..8a45bbabb3 100644 --- a/src/mapleall/maple_be/src/cg/emit.cpp +++ b/src/mapleall/maple_be/src/cg/emit.cpp @@ -125,10 +125,8 @@ using namespace cfi; void Emitter::EmitLabelRef(LabelIdx labIdx) { PUIdx pIdx = GetCG()->GetMIRModule()->CurFunction()->GetPuidx(); - char *idx = strdup(std::to_string(pIdx).c_str()); + std::string idx = std::to_string(pIdx); outStream << ".L." << idx << "__" << labIdx; - free(idx); - idx = nullptr; } void Emitter::EmitStmtLabel(LabelIdx labIdx) { @@ -145,10 +143,8 @@ void Emitter::EmitLabelPair(const LabelPair &pairLabel) { } void Emitter::EmitLabelForFunc(const MIRFunction *func, LabelIdx labIdx) { - char *idx = strdup(std::to_string(func->GetPuidx()).c_str()); + std::string idx = std::to_string(func->GetPuidx()); outStream << ".L." << idx << "__" << labIdx; - free(idx); - idx = nullptr; } AsmLabel Emitter::GetTypeAsmInfoName(PrimType primType) const { @@ -171,6 +167,9 @@ AsmLabel Emitter::GetTypeAsmInfoName(PrimType primType) const { if (primType == PTY_f128) { return kAsmWord; } + if (IsInt128Ty(primType)) { + return kAsmXWord; + } return kAsmValue; default: ASSERT(false, "NYI"); @@ -334,7 +333,11 @@ void Emitter::EmitAsmLabel(AsmLabel label) { return; } case kAsmWord: { - Emit(asmInfo->GetWord()); + (void)Emit(asmInfo->GetWord()); + return; + } + case kAsmXWord: { + (void)Emit(asmInfo->GetXWord()); return; } case kAsmLong: { @@ -449,33 +452,7 @@ void Emitter::EmitAsmLabel(const MIRSymbol &mirSymbol, AsmLabel label) { return; } case kAsmAlign: { - uint8 align = mirSymbol.GetAttrs().GetAlignValue(); - if (align == 0) { - if (mirSymbol.GetType()->GetKind() == kTypeStruct || - mirSymbol.GetType()->GetKind() == kTypeClass || - mirSymbol.GetType()->GetKind() == kTypeArray || - mirSymbol.GetType()->GetKind() == kTypeUnion) { -#if (defined(TARGX86) && TARGX86) || (defined(TARGX86_64) && TARGX86_64) - return; -#else - uint8 alignMin = 0; - if (mirSymbol.GetType()->GetAlign() > 0) { - alignMin = static_cast(log2(mirSymbol.GetType()->GetAlign())); - } - align = std::max(kAlignOfU8, alignMin); -#endif - } else { - align = static_cast(mirSymbol.GetType()->GetAlign()); -#if (defined(TARGAARCH64) && TARGAARCH64) || (defined(TARGARM32) && TARGARM32) || (defined(TARGARK) && TARGARK) ||\ - (defined(TARGRISCV64) && TARGRISCV64) - if (CGOptions::IsArm64ilp32() && mirSymbol.GetType()->GetPrimType() == PTY_a32) { - align = kAlignOfU8; - } else { - align = static_cast(log2(align)); - } -#endif - } - } + uint8 align = mirSymbol.GetSymbolAlign(CGOptions::IsArm64ilp32()); Emit(asmInfo->GetAlign()); Emit(std::to_string(align)); Emit("\n"); @@ -759,12 +736,24 @@ void Emitter::EmitScalarConstant(MIRConst &mirConst, bool newLine, bool flag32, if (intCt.GetActualBitWidth() > sizeInBits) { intCt.Trunc(sizeInBits); } - if (flag32) { - EmitAsmLabel(AsmLabel::kAsmLong); + + if (sizeInBits <= k64BitSize) { + if (flag32) { + EmitAsmLabel(AsmLabel::kAsmLong); + } else { + EmitAsmLabel(asmName); + } + Emit(intCt.GetValue()); } else { - EmitAsmLabel(asmName); + const IntVal &intVal = intCt.GetValue(); + const uint64 *value = intVal.GetRawData(); + for (int part = 0; part < intVal.GetNumWords(); ++part) { + EmitAsmLabel(asmName); + (void)Emit(static_cast(value[part])); + Emit("\n"); + } } - Emit(intCt.GetValue()); + if (isFlexibleArray) { arraySize += (sizeInBits / kBitsPerByte); } @@ -2397,12 +2386,13 @@ void Emitter::EmitUninitializedSymbolsWithPrefixSection(const MIRSymbol &symbol, EmitAsmLabel(symbol, kAsmGlbl); } if (symbol.GetType()->GetKind() == kTypeStruct) { + ASSERT_NOT_NULL(Globals::GetInstance()->GetBECommon()); isFlexibleArray = Globals::GetInstance()->GetBECommon()->GetHasFlexibleArray(symbol.GetType()->GetTypeIndex().GetIdx()); if (isFlexibleArray) { auto structType = static_cast(symbol.GetType()); auto lastFieldID = structType->GetFields().size() - 1; - arraySize = structType->GetElemType(lastFieldID)->GetSize(); + arraySize = structType->GetElemType(static_cast(lastFieldID))->GetSize(); } } @@ -3673,7 +3663,8 @@ void Emitter::EmitDIDebugInfoSection(DebugInfo *mirdi) { CHECK_FATAL(diae != nullptr, "diae is null in Emitter::EmitDIDebugInfoSection"); MapleVector &apl = diae->GetAttrPairs(); /* attribute pair list */ - std::string sfile, spath; + std::string sfile; + std::string spath; if (diae->GetTag() == DW_TAG_compile_unit && sfile.empty()) { /* get full source path from fileMap[2] */ if (emitter->GetFileMap().size() > k2ByteSize) { /* have src file map */ diff --git a/src/mapleall/maple_be/src/cg/list_scheduler.cpp b/src/mapleall/maple_be/src/cg/list_scheduler.cpp index 61ac853785..761ac4438a 100644 --- a/src/mapleall/maple_be/src/cg/list_scheduler.cpp +++ b/src/mapleall/maple_be/src/cg/list_scheduler.cpp @@ -154,6 +154,59 @@ void ListScheduler::WaitingQueueToReadyList() { } } +static uint32 kMaxUnitIdx = 0; + /* + * Sort by priority in descending order, which use LStart as algorithm of computing priority, + * that is the first node in list has the highest priority + */ +bool ListScheduler::CriticalPathRankScheduleInsns(const DepNode *node1, const DepNode *node2) { + // p as an acronym for priority + CompareLStart compareLStart; + int p1 = compareLStart(*node1, *node2); + if (p1 != 0) { + return p1 > 0; + } + + CompareCost compareCost; + int p2 = compareCost(*node1, *node2); + if (p2 != 0) { + return p2 > 0; + } + + CompareEStart compareEStart; + int p3 = compareEStart(*node1, *node2); + if (p3 != 0) { + return p3 > 0; + } + + CompareSuccNodeSize compareSuccNodeSize; + int p4 = compareSuccNodeSize(*node1, *node2); + if (p4 != 0) { + return p4 > 0; + } + + CompareUnitKindNum compareUnitKindNum(kMaxUnitIdx); + int p5 = compareUnitKindNum(*node1, *node2); + if (p5 != 0) { + return p5 > 0; + } + + CompareSlotType compareSlotType; + int p6 = compareSlotType(*node1, *node2); + if (p6 != 0) { + return p6 > 0; + } + + CompareInsnID compareInsnId; + int p7 = compareInsnId(*node1, *node2); + if (p7 != 0) { + return p7 > 0; + } + + // default + return true; +} + void ListScheduler::UpdateInfoBeforeSelectNode() { while (advancedCycle > 0) { currCycle++; @@ -422,11 +475,11 @@ void ListScheduler::CalculateMostUsedUnitKindCount() { } uint32 maxCount = 0; - maxUnitIdx = 0; + kMaxUnitIdx = 0; for (uint32 i = 1; i < kUnitKindLast; ++i) { if (maxCount < unitKindCount[i]) { maxCount = unitKindCount[i]; - maxUnitIdx = i; + kMaxUnitIdx = i; } } } diff --git a/src/mapleall/maple_be/src/cg/live.cpp b/src/mapleall/maple_be/src/cg/live.cpp index 380edf012e..236f202433 100644 --- a/src/mapleall/maple_be/src/cg/live.cpp +++ b/src/mapleall/maple_be/src/cg/live.cpp @@ -438,16 +438,6 @@ void LiveAnalysis::ClearInOutDataInfo() { } } -void LiveAnalysis::EnlargeSpaceForLiveAnalysis(BB &currBB) { - regno_t currMaxVRegNO = cgFunc->GetMaxVReg(); - if (currMaxVRegNO >= currBB.GetLiveIn()->Size()) { - FOR_ALL_BB(bb, cgFunc) { - bb->LiveInEnlargeCapacity(currMaxVRegNO); - bb->LiveOutEnlargeCapacity(currMaxVRegNO); - } - } -} - bool CgLiveAnalysis::PhaseRun(maplebe::CGFunc &f) { MemPool *liveMemPool = GetPhaseMemPool(); live = f.GetCG()->CreateLiveAnalysis(*liveMemPool, f); diff --git a/src/mapleall/maple_be/src/cg/proepilog.cpp b/src/mapleall/maple_be/src/cg/proepilog.cpp index 6ddd99c624..cfced35ed0 100644 --- a/src/mapleall/maple_be/src/cg/proepilog.cpp +++ b/src/mapleall/maple_be/src/cg/proepilog.cpp @@ -26,14 +26,207 @@ #endif #include "cgfunc.h" #include "cg.h" +#include "cg_ssa_pre.h" +#include "cg_mc_ssa_pre.h" +#include "cg_ssu_pre.h" namespace maplebe { -using namespace maple; +static inline bool CheckInsnNeedProEpilog(const CGFunc &cgFunc, const Insn &insn) { + auto *regInfo = cgFunc.GetTargetRegInfo(); + auto checkRegisterNeedProEpilog = [regInfo](const RegOperand ®Opnd) { + if (regOpnd.GetRegisterType() == kRegTyVary) { + return true; + } + auto regno = regOpnd.GetRegisterNumber(); + if (regInfo->IsCalleeSavedReg(regno) || regInfo->IsFramePointReg(regno) || + regno == regInfo->GetStackPointReg()) { + return true; + } + return false; + }; + + for (uint32 i = 0; i < insn.GetOperandSize(); ++i) { + auto &opnd = insn.GetOperand(i); + if (opnd.IsRegister()) { + if (checkRegisterNeedProEpilog(static_cast(opnd))) { + return true; + } + } else if (opnd.IsMemoryAccessOperand()) { + auto &memOpnd = static_cast(opnd); + if (memOpnd.GetBaseRegister() && checkRegisterNeedProEpilog(*memOpnd.GetBaseRegister())) { + return true; + } + if (memOpnd.GetIndexRegister() && checkRegisterNeedProEpilog(*memOpnd.GetIndexRegister())) { + return true; + } + } else if (opnd.IsList()) { + auto &listOpnd = static_cast(opnd); + for (auto *regOpnd : std::as_const(listOpnd.GetOperands())) { + if (checkRegisterNeedProEpilog(*regOpnd)) { + return true; + } + } + } + } + return false; +} + +static inline void CollectNeedProEpilogBB(CGFunc &cgFunc, MapleSet &occBBs) { + FOR_ALL_BB(bb, &cgFunc) { + FOR_BB_INSNS(insn, bb) { + if (insn->IsImmaterialInsn() || !insn->IsMachineInstruction()) { + continue; + } + if (insn->IsCall() || insn->IsSpecialCall() || CheckInsnNeedProEpilog(cgFunc, *insn)) { + occBBs.insert(bb->GetId()); + break; + } + } + } +} + +// If all successors of curBB need to insert prolog, we can insert prolog at curBB. +// such as: +// BB1: BB1: +// ... insert prolog +// bne BB3; ... +// BB2: bne BB3; +// insert prolog ==> BB2: +// ... ... +// BB3: BB3: +// insert prolog ... +// ... +bool ProEpilogAnalysis::PrologBBHoist(const MapleSet &saveBBs) { + for (const auto bbId : saveBBs) { + // saveBB post dom firstBB, it's no benefit + if (pdomInfo.PostDominate(*cgFunc.GetBBFromID(bbId), *cgFunc.GetFirstBB())) { + saveInfo.Clear(); + return false; + } + } + + for (const auto bbId : saveBBs) { + auto &bbPreds = cgFunc.GetBBFromID(bbId)->GetPreds(); + if (bbPreds.size() != 1) { + saveInfo.prologBBs.insert(bbId); + continue; + } + // only one pred, check succs of pred are all in saveBBs + auto *bbPred = bbPreds.front(); + if (saveInfo.prologBBs.count(bbPred->GetId()) != 0) { + continue; + } + bool bbPredSuccHasProlog = true; + for (const auto *succ : bbPred->GetSuccs()) { + if (saveBBs.count(succ->GetId()) == 0) { + bbPredSuccHasProlog = false; + } + } + if (bbPredSuccHasProlog) { + saveInfo.prologBBs.insert(bbPred->GetId()); + } else { + saveInfo.prologBBs.insert(bbId); + } + } + return true; +} + +void ProEpilogAnalysis::Analysis() { + SsaPreWorkCand wkCand(&alloc); + CollectNeedProEpilogBB(cgFunc, wkCand.occBBs); + if (cgFunc.GetFunction().GetFuncProfData() == nullptr) { + DoSavePlacementOpt(&cgFunc, &domInfo, &loopInfo, &wkCand); + } else { + DoProfileGuidedSavePlacement(&cgFunc, &domInfo, &loopInfo, &wkCand); + } + if (wkCand.saveAtEntryBBs.empty() || wkCand.saveAtProlog) { + return; + } + if (!PrologBBHoist(wkCand.saveAtEntryBBs)) { + saveInfo.Clear(); + return; + } + + SPreWorkCand swkCand(&alloc); + swkCand.occBBs = wkCand.occBBs; + swkCand.saveBBs = saveInfo.prologBBs; + DoRestorePlacementOpt(&cgFunc, &pdomInfo, &swkCand); + if (swkCand.saveBBs.empty() || swkCand.restoreAtEpilog) { + saveInfo.Clear(); + return; + } + for (auto bbId : swkCand.restoreAtEntryBBs) { + // saveBB post dom firstBB, it's no benefit + if (pdomInfo.PostDominate(*cgFunc.GetBBFromID(bbId), *cgFunc.GetFirstBB())) { + saveInfo.Clear(); + return; + } + saveInfo.epilogBBs.insert(bbId); + } + for (auto bbId : swkCand.restoreAtExitBBs) { + // saveBB post dom firstBB, it's no benefit + if (pdomInfo.PostDominate(*cgFunc.GetBBFromID(bbId), *cgFunc.GetFirstBB())) { + saveInfo.Clear(); + return; + } + auto *lastInsn = cgFunc.GetBBFromID(bbId)->GetLastMachineInsn(); + if (lastInsn != nullptr && (lastInsn->IsBranch() || lastInsn->IsTailCall()) && + CheckInsnNeedProEpilog(cgFunc, *lastInsn)) { + saveInfo.Clear(); + return; + } + saveInfo.epilogBBs.insert(bbId); + } + + if (CG_DEBUG_FUNC(cgFunc)) { + LogInfo::MapleLogger() << "Dump result of " << PhaseName() << "\n"; + saveInfo.Dump(); + } +} + +void CgProEpilogAnalysis::GetAnalysisDependence(AnalysisDep &aDep) const { + aDep.AddRequired(); + aDep.AddRequired(); + aDep.AddRequired(); + aDep.SetPreservedAll(); +} + +bool CgProEpilogAnalysis::PhaseRun(maplebe::CGFunc &f) { + if (f.GetMirModule().GetSrcLang() != kSrcLangC || f.GetFunction().IsVarargs()) { + return false; + } + + if (CG_DEBUG_FUNC(f)) { + DotGenerator::GenerateDot("before-proepiloganalysis", f, f.GetMirModule()); + } + + auto *dom = GET_ANALYSIS(CgDomAnalysis, f); + CHECK_FATAL(dom != nullptr, "null ptr check"); + auto *pdom = GET_ANALYSIS(CgPostDomAnalysis, f); + CHECK_FATAL(pdom != nullptr, "null ptr check"); + auto *loop = GET_ANALYSIS(CgLoopAnalysis, f); + CHECK_FATAL(loop != nullptr, "null ptr check"); + + proepilogAnalysis = f.GetCG()->CreateProEpilogAnalysis(*GetPhaseMemPool(), f, *dom, *pdom, *loop); + if (proepilogAnalysis->NeedProEpilog()) { + proepilogAnalysis->Analysis(); + } + + return false; +}; + +MAPLE_TRANSFORM_PHASE_REGISTER_CANSKIP(CgProEpilogAnalysis, proepiloganalysis) bool CgGenProEpiLog::PhaseRun(maplebe::CGFunc &f) { GenProEpilog *genPE = nullptr; #if (defined(TARGAARCH64) && TARGAARCH64) || (defined(TARGRISCV64) && TARGRISCV64) - genPE = GetPhaseAllocator()->New(f, *ApplyTempMemPool()); + const ProEpilogSaveInfo *saveInfo = nullptr; + if (Globals::GetInstance()->GetOptimLevel() > CGOptions::kLevel0 && !CGOptions::OptimizeForSize()) { + MaplePhase *it = GetAnalysisInfoHook()->ForceRunAnalysisPhase, CGFunc>( + &CgProEpilogAnalysis::id, f); + saveInfo = static_cast(it)->GetResult(); + } + genPE = GetPhaseAllocator()->New(f, *ApplyTempMemPool(), saveInfo); #endif #if defined(TARGARM32) && TARGARM32 genPE = GetPhaseAllocator()->New(f); diff --git a/src/mapleall/maple_be/src/cg/ra_opt.cpp b/src/mapleall/maple_be/src/cg/ra_opt.cpp index 43ca998bd7..97bec72fe9 100644 --- a/src/mapleall/maple_be/src/cg/ra_opt.cpp +++ b/src/mapleall/maple_be/src/cg/ra_opt.cpp @@ -13,43 +13,219 @@ * See the MulanPSL - 2.0 for more details. */ +#include "ra_opt.h" #include "cgfunc.h" -#if TARGAARCH64 -#include "aarch64_ra_opt.h" -#elif defined(TARGRISCV64) && TARGRISCV64 -#include "riscv64_ra_opt.h" -#endif +#include "live.h" +#include "loop.h" +#include "cg.h" namespace maplebe { -using namespace maple; +void LRSplitForSink::SetSplitRegCrossCall(const BB &bb, regno_t regno, bool afterCall) { + if (afterCall) { + auto *refsInfo = GetOrCreateSplitRegRefsInfo(regno); + if (refsInfo == nullptr) { + return; + } + refsInfo->afterCallBBs.insert(bb.GetId()); + } +} -bool CgRaOpt::PhaseRun(maplebe::CGFunc &f) { - MemPool *memPool = GetPhaseMemPool(); - RaOpt *raOpt = nullptr; -#if TARGAARCH64 - raOpt = memPool->New(f, *memPool); -#elif defined(TARGRISCV64) || TARGRISCV64 - raOpt = memPool->New(f, *memPool); -#endif - - if (raOpt) { - LiveAnalysis *live = GET_ANALYSIS(CgLiveAnalysis, f); - live->ResetLiveSet(); - auto *dom = GET_ANALYSIS(CgDomAnalysis, f); - raOpt->SetDomInfo(dom); - auto *loop = GET_ANALYSIS(CgLoopAnalysis, f); - raOpt->SetLoopInfo(*loop); - raOpt->Run(); - /* the live range info may changed, so invalid the info. */ - if (live != nullptr) { - live->ClearInOutDataInfo(); +void LRSplitForSink::SetSplitRegRef(Insn &insn, regno_t regno, bool isDef, bool isUse, bool afterCall) { + auto *refsInfo = GetOrCreateSplitRegRefsInfo(regno); + if (refsInfo == nullptr) { + return; + } + if (isDef) { + refsInfo->defInsns.push_back(&insn); + } + if (isUse) { + refsInfo->useInsns.push_back(&insn); + } + SetSplitRegCrossCall(*insn.GetBB(), regno, afterCall); +} + +void LRSplitForSink::ColletSplitRegRefsWithInsn(Insn &insn, bool afterCall) { + const InsnDesc *md = insn.GetDesc(); + for (uint32 i = 0; i < insn.GetOperandSize(); ++i) { + auto &opnd = insn.GetOperand(i); + const auto *opndDesc = md->GetOpndDes(i); + if (opnd.IsRegister()) { + auto regno = static_cast(opnd).GetRegisterNumber(); + SetSplitRegRef(insn, regno, opndDesc->IsDef(), opndDesc->IsUse(), afterCall); + } else if (opnd.IsMemoryAccessOperand()) { + auto &memOpnd = static_cast(opnd); + if (memOpnd.GetBaseRegister()) { + SetSplitRegRef(insn, memOpnd.GetBaseRegister()->GetRegisterNumber(), false, true, afterCall); + } + if (memOpnd.GetIndexRegister()) { + SetSplitRegRef(insn, memOpnd.GetIndexRegister()->GetRegisterNumber(), false, true, afterCall); + } + } else if (opnd.IsList()) { + auto &listOpnd = static_cast(opnd); + for (auto *regOpnd : std::as_const(listOpnd.GetOperands())) { + SetSplitRegRef(insn, regOpnd->GetRegisterNumber(), opndDesc->IsDef(), opndDesc->IsUse(), afterCall); + } + } + } +} + +void LRSplitForSink::ColletSplitRegRefs() { + FOR_ALL_BB(bb, &cgFunc) { + bool afterCall = afterCallBBs[bb->GetId()]; + FOR_BB_INSNS(insn, bb) { + if (insn->IsImmaterialInsn() || !insn->IsMachineInstruction()) { + continue; + } + if (insn->IsCall()) { + afterCall = true; + } + ColletSplitRegRefsWithInsn(*insn, afterCall); + } + if (afterCall) { + for (auto regno : bb->GetLiveOutRegNO()) { + SetSplitRegCrossCall(*bb, regno, afterCall); + } + } + } + if (dumpInfo) { + for (const auto &[regno, refsInfo] : splitRegRefs) { + LogInfo::MapleLogger() << "R" << regno << " : D" << refsInfo->defInsns.size() << "U" << + refsInfo->useInsns.size() << " After Call BB :"; + for (auto bb : refsInfo->afterCallBBs) { + LogInfo::MapleLogger() << bb << " "; + } + LogInfo::MapleLogger() << "\n"; + } + } +} + +void LRSplitForSink::ColletAfterCallBBs(BB &bb, MapleBitVector &visited, bool isAfterCallBB) { + if ((!isAfterCallBB && visited[bb.GetId()]) || afterCallBBs[bb.GetId()]) { + return; + } + if (isAfterCallBB) { + afterCallBBs[bb.GetId()] = true; + } else { + FOR_BB_INSNS(insn, &bb) { + if (insn->IsImmaterialInsn() || !insn->IsMachineInstruction()) { + continue; + } + if (insn->IsCall()) { + isAfterCallBB = true; + break; + } + } + } + visited[bb.GetId()] = true; + for (auto *succBB : bb.GetSuccs()) { + ColletAfterCallBBs(*succBB, visited, isAfterCallBB); + } + for (auto *succEhBB : bb.GetEhSuccs()) { + ColletAfterCallBBs(*succEhBB, visited, isAfterCallBB); + } +} + +void LRSplitForSink::ColletAfterCallBBs() { + MapleBitVector visited(cgFunc.NumBBs(), false, alloc.Adapter()); + FOR_ALL_BB(bb, &cgFunc) { + if (bb->GetPreds().size() == 0) { + ColletAfterCallBBs(*bb, visited, false); } } +} + +BB *LRSplitForSink::SearchSplitBB(const RefsInfo &refsInfo) { + BB *spiltBB = nullptr; + for (auto bbId : refsInfo.afterCallBBs) { + auto *bb = cgFunc.GetBBFromID(bbId); + if (spiltBB == nullptr) { + spiltBB = bb; + } else { + spiltBB = domInfo.GetCommonDom(*spiltBB, *bb); + } + } + if (spiltBB == nullptr) { + return nullptr; + } + auto *loop = loopInfo.GetBBLoopParent(spiltBB->GetId()); + while (loop != nullptr) { + spiltBB = domInfo.GetDom(spiltBB->GetId()); + loop = loopInfo.GetBBLoopParent(spiltBB->GetId()); + } + return spiltBB; +} + +void LRSplitForSink::TryToSplitLiveRanges() { + ColletSplitRegRefs(); + for (auto &[regno, refsInfo] : splitRegRefs) { + // def point more than 1 or not cross call, there's no need to split it + if (refsInfo->defInsns.size() > 1 || refsInfo->afterCallBBs.size() <= 0) { + continue; + } + if (dumpInfo) { + LogInfo::MapleLogger() << "try to split R" << regno << "\n"; + } + + auto *splitBB = SearchSplitBB(*refsInfo); + // when splitBB is firstBB, there is no benefit from split live range. + if (splitBB == nullptr || splitBB == cgFunc.GetFirstBB()) { + return; + } + if (dumpInfo) { + LogInfo::MapleLogger() << "R" << regno << " will split at BB " << splitBB->GetId() << "\n"; + } + + // create newreg and replace oldregs that is dominated by splitBB + auto *destReg = splitRegs[regno]; + ASSERT_NOT_NULL(destReg); + uint32 regSize = (destReg->GetSize() == k64BitSize) ? k8ByteSize : k4ByteSize; + auto *newReg = &cgFunc.CreateVirtualRegisterOperand(cgFunc.NewVReg(destReg->GetRegisterType(), regSize)); + for (auto *insn : refsInfo->useInsns) { + if (insn->GetBB() == splitBB || domInfo.Dominate(*splitBB, *insn->GetBB())) { + cgFunc.ReplaceOpndInInsn(*destReg, *newReg, *insn, destReg->GetRegisterNumber()); + } + } + auto &movInsn = GenMovInsn(*newReg, *destReg); + splitBB->InsertInsnBegin(movInsn); + if (dumpInfo) { + LogInfo::MapleLogger() << "split R" << regno << " to R" << newReg->GetRegisterNumber() << "\n"; + } + } +} + +void LRSplitForSink::Run() { + CollectSplitRegs(); + if (splitRegs.empty()) { // no need split reg + return; + } + ColletAfterCallBBs(); + TryToSplitLiveRanges(); +} + +bool CgRaOpt::PhaseRun(maplebe::CGFunc &f) { + auto *live = GET_ANALYSIS(CgLiveAnalysis, f); + CHECK_FATAL(live != nullptr, "null ptr check"); + live->ResetLiveSet(); + + auto *dom = GET_ANALYSIS(CgDomAnalysis, f); + CHECK_FATAL(dom != nullptr, "null ptr check"); + auto *loop = GET_ANALYSIS(CgLoopAnalysis, f); + CHECK_FATAL(loop != nullptr, "null ptr check"); + auto raOpt = f.GetCG()->CreateRaOptimizer(*GetPhaseMemPool(), f, *dom, *loop); + CHECK_FATAL(raOpt != nullptr, "null ptr check"); + raOpt->InitializePatterns(); + raOpt->Run(); + // the live range info may changed, so invalid the info. + if (live != nullptr) { + live->ClearInOutDataInfo(); + } return false; } + void CgRaOpt::GetAnalysisDependence(maple::AnalysisDep &aDep) const { aDep.AddRequired(); aDep.AddRequired(); + aDep.AddRequired(); aDep.AddRequired(); aDep.PreservedAllExcept(); } diff --git a/src/mapleall/maple_be/src/cg/reg_alloc.cpp b/src/mapleall/maple_be/src/cg/reg_alloc.cpp index 678da3c58c..9017eeb5df 100644 --- a/src/mapleall/maple_be/src/cg/reg_alloc.cpp +++ b/src/mapleall/maple_be/src/cg/reg_alloc.cpp @@ -24,43 +24,14 @@ #include "cg.h" namespace maplebe { - -#ifdef RA_PERF_ANALYSIS -static long loopAnalysisUS = 0; -static long liveAnalysisUS = 0; -static long createRAUS = 0; -static long raUS = 0; -static long cleanupUS = 0; -static long totalUS = 0; -extern void printRATime() { - std::cout << "============================================================\n"; - std::cout << " RA sub-phase time information \n"; - std::cout << "============================================================\n"; - std::cout << "loop analysis cost: " << loopAnalysisUS << "us \n"; - std::cout << "live analysis cost: " << liveAnalysisUS << "us \n"; - std::cout << "create RA cost: " << createRAUS << "us \n"; - std::cout << "doRA cost: " << raUS << "us \n"; - std::cout << "cleanup cost: " << cleanupUS << "us \n"; - std::cout << "RA total cost: " << totalUS << "us \n"; - std::cout << "============================================================\n"; -} -#endif - bool CgRegAlloc::PhaseRun(maplebe::CGFunc &f) { bool success = false; -#ifdef RA_PERF_ANALYSIS - auto begin = std::chrono::system_clock::now(); -#endif - - /* loop Analysis */ -#ifdef RA_PERF_ANALYSIS - auto start = std::chrono::system_clock::now(); -#endif /* dom Analysis */ DomAnalysis *dom = nullptr; if (Globals::GetInstance()->GetOptimLevel() > CGOptions::kLevel0 && f.GetCG()->GetCGOptions().DoColoringBasedRegisterAllocation()) { + RA_TIMER_REGISTER(dom, "RA Dom"); MaplePhase *it = GetAnalysisInfoHook()->ForceRunAnalysisPhase, CGFunc>( &CgDomAnalysis::id, f); dom = static_cast(it)->GetResult(); @@ -68,24 +39,18 @@ bool CgRegAlloc::PhaseRun(maplebe::CGFunc &f) { LoopAnalysis *loop = nullptr; if (Globals::GetInstance()->GetOptimLevel() > CGOptions::kLevel0) { + RA_TIMER_REGISTER(loop, "RA Loop"); MaplePhase *it = GetAnalysisInfoHook()->ForceRunAnalysisPhase, CGFunc>( &CgLoopAnalysis::id, f); loop = static_cast(it)->GetResult(); } -#ifdef RA_PERF_ANALYSIS - auto end = std::chrono::system_clock::now(); - loopAnalysisUS += std::chrono::duration_cast(end - start).count(); -#endif - while (!success) { MemPool *phaseMp = GetPhaseMemPool(); -#ifdef RA_PERF_ANALYSIS - start = std::chrono::system_clock::now(); -#endif /* live analysis */ LiveAnalysis *live = nullptr; if (Globals::GetInstance()->GetOptimLevel() > CGOptions::kLevel0) { + RA_TIMER_REGISTER(live, "RA Live"); MaplePhase *it = GetAnalysisInfoHook()->ForceRunAnalysisPhase, CGFunc>( &CgLiveAnalysis::id, f); live = static_cast(it)->GetResult(); @@ -93,14 +58,6 @@ bool CgRegAlloc::PhaseRun(maplebe::CGFunc &f) { /* revert liveanalysis result container. */ live->ResetLiveSet(); } -#ifdef RA_PERF_ANALYSIS - end = std::chrono::system_clock::now(); - liveAnalysisUS += std::chrono::duration_cast(end - start).count(); -#endif - -#ifdef RA_PERF_ANALYSIS - start = std::chrono::system_clock::now(); -#endif /* create register allocator */ RegAllocator *regAllocator = nullptr; MemPool *tempMP = nullptr; @@ -126,26 +83,12 @@ bool CgRegAlloc::PhaseRun(maplebe::CGFunc &f) { "Warning: We only support Linear Scan and GraphColor register allocation\n"; } } -#ifdef RA_PERF_ANALYSIS - end = std::chrono::system_clock::now(); - createRAUS += std::chrono::duration_cast(end - start).count(); -#endif - -#ifdef RA_PERF_ANALYSIS - start = std::chrono::system_clock::now(); -#endif + RA_TIMER_REGISTER(ra, "RA Time"); /* do register allocation */ CHECK_FATAL(regAllocator != nullptr, "regAllocator is null in CgDoRegAlloc::Run"); f.SetIsAfterRegAlloc(); success = regAllocator->AllocateRegisters(); -#ifdef RA_PERF_ANALYSIS - end = std::chrono::system_clock::now(); - raUS += std::chrono::duration_cast(end - start).count(); -#endif -#ifdef RA_PERF_ANALYSIS - start = std::chrono::system_clock::now(); -#endif /* the live range info may changed, so invalid the info. */ if (live != nullptr) { live->ClearInOutDataInfo(); @@ -153,17 +96,10 @@ bool CgRegAlloc::PhaseRun(maplebe::CGFunc &f) { if (Globals::GetInstance()->GetOptimLevel() > CGOptions::kLevel0) { GetAnalysisInfoHook()->ForceEraseAnalysisPhase(f.GetUniqueID(), &CgLiveAnalysis::id); } -#ifdef RA_PERF_ANALYSIS - end = std::chrono::system_clock::now(); - cleanupUS += std::chrono::duration_cast(end - start).count(); -#endif memPoolCtrler.DeleteMemPool(tempMP); } -#ifdef RA_PERF_ANALYSIS - end = std::chrono::system_clock::now(); - totalUS += std::chrono::duration_cast(end - begin).count(); -#endif + RA_TIMER_PRINT(f.GetName()); return false; } } /* namespace maplebe */ diff --git a/src/mapleall/maple_be/src/cg/reg_alloc_basic.cpp b/src/mapleall/maple_be/src/cg/reg_alloc_basic.cpp index d276267ad8..cd1d02450f 100644 --- a/src/mapleall/maple_be/src/cg/reg_alloc_basic.cpp +++ b/src/mapleall/maple_be/src/cg/reg_alloc_basic.cpp @@ -154,6 +154,12 @@ bool DefaultO0RegAllocator::AllocatePhysicalRegister(const RegOperand &opnd) { regno_t regStart = *regBank.begin(); regno_t regEnd = *regBank.crbegin(); + const auto regLimitIter = regsLimit.find(regNo); + if (regLimitIter != regsLimit.end()) { + regStart = regLimitIter->second.first; + regEnd = regLimitIter->second.second; + } + const auto opndRegIt = regLiveness.find(regNo); for (regno_t reg = regStart; reg <= regEnd; ++reg) { if (!availRegSet[reg]) { @@ -236,11 +242,11 @@ void DefaultO0RegAllocator::SetupRegLiveness(BB *bb) { const OpndDesc *opndDesc = curMd->GetOpndDes(i); if (opnd.IsRegister()) { /* def-use is processed by use */ - SetupRegLiveness(static_cast(opnd), insn->GetId(), !opndDesc->IsUse()); + SetupRegLiveness(static_cast(opnd), *insn, !opndDesc->IsUse(), i); } else if (opnd.IsMemoryAccessOperand()) { - SetupRegLiveness(static_cast(opnd), insn->GetId()); + SetupRegLiveness(static_cast(opnd), *insn, i); } else if (opnd.IsList()) { - SetupRegLiveness(static_cast(opnd), insn->GetId(), opndDesc->IsDef()); + SetupRegLiveness(static_cast(opnd), *insn, opndDesc->IsDef(), i); } } } @@ -254,24 +260,24 @@ void DefaultO0RegAllocator::SetupRegLiveness(BB *bb) { } } -void DefaultO0RegAllocator::SetupRegLiveness(const MemOperand &opnd, uint32 insnId) { +void DefaultO0RegAllocator::SetupRegLiveness(const MemOperand &opnd, const Insn &insn, uint32 opndIdx) { /* base regOpnd is use in O0 */ if (opnd.GetBaseRegister()) { - SetupRegLiveness(*opnd.GetBaseRegister(), insnId, false); + SetupRegLiveness(*opnd.GetBaseRegister(), insn, false, opndIdx); } /* index regOpnd must be use */ if (opnd.GetIndexRegister()) { - SetupRegLiveness(*opnd.GetIndexRegister(), insnId, false); + SetupRegLiveness(*opnd.GetIndexRegister(), insn, false, opndIdx); } } -void DefaultO0RegAllocator::SetupRegLiveness(ListOperand &opnd, uint32 insnId, bool isDef) { +void DefaultO0RegAllocator::SetupRegLiveness(const ListOperand &opnd, const Insn &insn, bool isDef, uint32 opndIdx) { for (RegOperand *regOpnd : opnd.GetOperands()) { - SetupRegLiveness(*regOpnd, insnId, isDef); + SetupRegLiveness(*regOpnd, insn, isDef, opndIdx); } } -void DefaultO0RegAllocator::SetupRegLiveness(const RegOperand &opnd, uint32 insnId, bool isDef) { +void DefaultO0RegAllocator::SetupRegLiveness(const RegOperand &opnd, const Insn &insn, bool isDef, uint32 opndIdx) { MapleVector> ranges(alloc.Adapter()); auto regLivenessIt = regLiveness.emplace(opnd.GetRegisterNumber(), ranges).first; auto ®LivenessRanges = regLivenessIt->second; @@ -280,14 +286,21 @@ void DefaultO0RegAllocator::SetupRegLiveness(const RegOperand &opnd, uint32 insn } auto ®LivenessLastRange = regLivenessRanges.back(); if (regLivenessLastRange.first == 0) { - regLivenessLastRange.first = insnId; + regLivenessLastRange.first = insn.GetId(); } - regLivenessLastRange.second = insnId; + regLivenessLastRange.second = insn.GetId(); /* create new range, only phyReg need to be segmented */ if (isDef && regInfo->IsAvailableReg(opnd.GetRegisterNumber())) { regLivenessRanges.push_back(std::make_pair(0, 0)); } + + if (regsLimit.find(opnd.GetRegisterNumber()) == regsLimit.end()) { + auto limit = insn.GetDesc()->GetRegisterLimit(insn, opndIdx); + if (limit != kInvalidRegLimit) { + regsLimit.emplace(opnd.GetRegisterNumber(), limit); + } + } } void DefaultO0RegAllocator::AllocHandleDestList(Insn &insn, Operand &opnd, uint32 idx) { diff --git a/src/mapleall/maple_be/src/cg/reg_alloc_color_ra.cpp b/src/mapleall/maple_be/src/cg/reg_alloc_color_ra.cpp index e58214ac9d..00a61559ab 100644 --- a/src/mapleall/maple_be/src/cg/reg_alloc_color_ra.cpp +++ b/src/mapleall/maple_be/src/cg/reg_alloc_color_ra.cpp @@ -183,6 +183,9 @@ void LiveRange::Dump(const std::string &str) const { if (IsLocalReg()) { LogInfo::MapleLogger() << " local"; } + if (regLimit != kInvalidRegLimit) { + LogInfo::MapleLogger() << " reg limit:[" << regLimit.first << "," << regLimit.second << "]"; + } LogInfo::MapleLogger() << "\n"; DumpLiveBB(); DumpLiveUnitMap(); @@ -195,8 +198,10 @@ void LiveRange::Dump(const std::string &str) const { void GraphColorRegAllocator::PrintLiveRanges() const { LogInfo::MapleLogger() << "PrintLiveRanges: size = " << lrMap.size() << "\n"; - for (const auto [_, lr] : lrMap) { - lr->Dump(""); + for (const auto *lr : lrMap) { + if (lr != nullptr) { + lr->Dump(""); + } } LogInfo::MapleLogger() << "\n"; } @@ -349,7 +354,11 @@ void GraphColorRegAllocator::CalculatePriority(LiveRange &lr) const { } void GraphColorRegAllocator::CalculatePriority() const { - for (auto [_, lr] : std::as_const(lrMap)) { + RA_TIMER_REGISTER(color, "ColorRA CalculatePriority"); + for (auto lr : std::as_const(lrMap)) { + if (lr == nullptr) { + continue; + } #ifdef USE_LRA if (doLRA && lr->IsLocalReg()) { continue; @@ -560,13 +569,13 @@ void GraphColorRegAllocator::SetupLiveRangeByPhysicalReg(const Insn &insn, regno } } -void GraphColorRegAllocator::SetupLiveRangeByRegOpnd(const Insn &insn, const RegOperand ®Opnd, - uint32 regSize, bool isDef) { +void GraphColorRegAllocator::SetupLiveRangeByRegOpnd(const Insn &insn, const RegOpndInfo ®OpndInfo, bool isDef) { + auto ®Opnd = regOpndInfo.regOpnd; uint32 regNO = regOpnd.GetRegisterNumber(); if (regInfo->IsUnconcernedReg(regOpnd)) { if (GetLiveRange(regNO) != nullptr) { ASSERT(false, "Unconcerned reg"); - (void)lrMap.erase(regNO); + lrMap[regNO] = nullptr; } return; } @@ -581,9 +590,9 @@ void GraphColorRegAllocator::SetupLiveRangeByRegOpnd(const Insn &insn, const Reg LiveRange *lr = GetLiveRange(regNO); CHECK_FATAL(lr != nullptr, "lr should not be nullptr"); if (isDef) { - lr->SetMaxDefSize(std::max(regSize, lr->GetMaxDefSize())); + lr->SetMaxDefSize(std::max(regOpndInfo.regSize, lr->GetMaxDefSize())); } else { - lr->SetMaxUseSize(std::max(regSize, lr->GetMaxUseSize())); + lr->SetMaxUseSize(std::max(regOpndInfo.regSize, lr->GetMaxUseSize())); } if (lr->GetMaxDefSize() == 0) { lr->SetSpillSize(lr->GetMaxUseSize()); @@ -603,6 +612,14 @@ void GraphColorRegAllocator::SetupLiveRangeByRegOpnd(const Insn &insn, const Reg lr->GetLiveUnitFromLuMap(insn.GetBB()->GetId())->IncUseNum(); lr->AddRef(insn.GetBB()->GetId(), insn.GetId(), kIsUse); } + + if (lr->GetRegisterLimit() == kInvalidRegLimit && regOpndInfo.opndIdx < insn.GetOperandSize()) { + lr->SetRegisterLimit(insn.GetDesc()->GetRegisterLimit(insn, regOpndInfo.opndIdx)); + if (lr->GetRegisterLimit() != kInvalidRegLimit) { + lr->SetMustAssigned(); + lr->SetIsNonLocal(true); + } + } #ifdef MOVE_COALESCE if (insn.IsIntRegisterMov()) { RegOperand &opnd1 = static_cast(insn.GetOperand(1)); @@ -661,20 +678,20 @@ void GraphColorRegAllocator::CollectRegOpndInfo(const Insn &insn, continue; } if (opndDesc->IsDef()) { - (void)defOpnds.emplace_back(®Opnd, opndDesc->GetSize()); + (void)defOpnds.emplace_back(regOpnd, opndDesc->GetSize(), i); } if (opndDesc->IsUse()) { - (void)useOpnds.emplace_back(®Opnd, opndDesc->GetSize()); + (void)useOpnds.emplace_back(regOpnd, opndDesc->GetSize(), i); } } else if (opnd.IsMemoryAccessOperand()) { auto &memOpnd = static_cast(opnd); RegOperand *base = memOpnd.GetBaseRegister(); RegOperand *offset = memOpnd.GetIndexRegister(); if (base && !regInfo->IsUnconcernedReg(*base)) { - (void)useOpnds.emplace_back(base, base->GetSize()); + (void)useOpnds.emplace_back(*base, base->GetSize(), i); } if (offset && !regInfo->IsUnconcernedReg(*offset)) { - (void)useOpnds.emplace_back(offset, offset->GetSize()); + (void)useOpnds.emplace_back(*offset, offset->GetSize(), i); } } else if (opnd.IsList()) { auto &listOpnd = static_cast(opnd); @@ -683,10 +700,10 @@ void GraphColorRegAllocator::CollectRegOpndInfo(const Insn &insn, continue; } if (opndDesc->IsDef()) { - (void)defOpnds.emplace_back(regOpnd, regOpnd->GetSize()); + (void)defOpnds.emplace_back(*regOpnd, regOpnd->GetSize(), i); } if (opndDesc->IsUse()) { - (void)useOpnds.emplace_back(regOpnd, regOpnd->GetSize()); + (void)useOpnds.emplace_back(*regOpnd, regOpnd->GetSize(), i); } } } @@ -700,7 +717,7 @@ void GraphColorRegAllocator::CollectRegOpndInfo(const Insn &insn, for (regno_t preg : pregLive) { auto *phyReg = regInfo->GetOrCreatePhyRegOperand(preg, k64BitSize, regInfo->IsGPRegister(preg) ? kRegTyInt : kRegTyFloat); - (void)defOpnds.emplace_back(phyReg, k64BitSize); + (void)defOpnds.emplace_back(*phyReg, k64BitSize, -1); } } } @@ -752,36 +769,36 @@ void GraphColorRegAllocator::UpdateAdjMatrix(const Insn &insn, AdjMatrix &adjMat) { // if IsAtomicStore or IsSpecialIntrinsic or IsAsm, set conflicts for all opnds if (insn.IsAtomicStore() || insn.IsSpecialIntrinsic() || insn.IsAsmInsn()) { - for (const auto [regOpnd, _] : useOpnds) { - InsertRegLive(regOpnd->GetRegisterNumber()); + for (const auto ®OpndInfo : useOpnds) { + InsertRegLive(regOpndInfo.regOpnd.GetRegisterNumber()); } } - for (const auto [regOpnd, _] : defOpnds) { - InsertRegLive(regOpnd->GetRegisterNumber()); + for (const auto ®OpndInfo : defOpnds) { + InsertRegLive(regOpndInfo.regOpnd.GetRegisterNumber()); } // Set conflict reg and pregvoto - for (const auto [regOpnd, _] : defOpnds) { - UpdateAdjMatrixByRegNO(regOpnd->GetRegisterNumber(), adjMat); + for (const auto ®OpndInfo : defOpnds) { + UpdateAdjMatrixByRegNO(regOpndInfo.regOpnd.GetRegisterNumber(), adjMat); } // update reglive - for (const auto [regOpnd, _] : defOpnds) { - RemoveRegLive(regOpnd->GetRegisterNumber()); + for (const auto ®OpndInfo : defOpnds) { + RemoveRegLive(regOpndInfo.regOpnd.GetRegisterNumber()); } } void GraphColorRegAllocator::ComputeLiveRangeForDefOperands(const Insn &insn, std::vector &defOpnds) { - for (auto [regOpnd, regSize] : defOpnds) { - SetupLiveRangeByRegOpnd(insn, *regOpnd, regSize, true); + for (auto ®OpndInfo : defOpnds) { + SetupLiveRangeByRegOpnd(insn, regOpndInfo, true); } } void GraphColorRegAllocator::ComputeLiveRangeForUseOperands(const Insn &insn, std::vector &useOpnds) { - for (auto [regOpnd, regSize] : useOpnds) { - SetupLiveRangeByRegOpnd(insn, *regOpnd, regSize, false); + for (auto ®OpndInfo : useOpnds) { + SetupLiveRangeByRegOpnd(insn, regOpndInfo, false); } } @@ -856,8 +873,8 @@ void GraphColorRegAllocator::UpdateRegLive(const Insn &insn, } // all use opnds insert to live reg - for (auto [regOpnd, _] : useOpnds) { - InsertRegLive(regOpnd->GetRegisterNumber()); + for (auto ®OpndInfo : useOpnds) { + InsertRegLive(regOpndInfo.regOpnd.GetRegisterNumber()); } } @@ -910,7 +927,7 @@ void GraphColorRegAllocator::AddConflictAndPregvetoToLr(const std::vectorIsLocalReg()) { continue; @@ -932,7 +949,10 @@ void GraphColorRegAllocator::AddConflictAndPregvetoToLr(const std::vectorGetRegType() != kRegTyUndef, "error reg type"); AddConflictAndPregvetoToLr(adjMat.ConvertEdgeToVec(lr->GetRegNO()), *lr, (lr->GetRegType() == kRegTyInt)); @@ -947,6 +967,7 @@ void GraphColorRegAllocator::ConvertAdjMatrixToConflict(const AdjMatrix &adjMat) * Not for now though. */ void GraphColorRegAllocator::ComputeLiveRangesAndConflict() { + RA_TIMER_REGISTER(color, "ColorRA ComputeLiveRangesAndConflict"); bbVec.clear(); bbVec.resize(cgFunc->NumBBs()); @@ -1075,7 +1096,13 @@ void GraphColorRegAllocator::SetBBInfoGlobalAssigned(uint32 bbID, regno_t regNO) } bool GraphColorRegAllocator::HaveAvailableColor(const LiveRange &lr, uint32 num) const { - return ((lr.GetRegType() == kRegTyInt && num < intRegNum) || (lr.GetRegType() == kRegTyFloat && num < fpRegNum)); + auto getLrAllocedRegNum = [this, &lr]() { + if (lr.GetRegisterLimit() != kInvalidRegLimit) { + return (lr.GetRegisterLimit().second - lr.GetRegisterLimit().first) + 1; + } + return lr.GetRegType() == kRegTyInt ? intRegNum : fpRegNum; + }; + return (num < getLrAllocedRegNum()); } /* @@ -1088,7 +1115,10 @@ bool GraphColorRegAllocator::HaveAvailableColor(const LiveRange &lr, uint32 num) * Compute a sorted list of constrained LRs based on priority cost. */ void GraphColorRegAllocator::Separate() { - for (auto [_, lr] : std::as_const(lrMap)) { + for (auto lr : std::as_const(lrMap)) { + if (lr == nullptr) { + continue; + } #ifdef USE_LRA if (doLRA && lr->IsLocalReg()) { continue; @@ -1148,22 +1178,6 @@ void GraphColorRegAllocator::Separate() { } } -MapleVector::iterator GraphColorRegAllocator::GetHighPriorityLr(MapleVector &lrSet) const { - auto it = lrSet.begin(); - auto highestIt = it; - LiveRange *startLr = *it; - float maxPrio = startLr->GetPriority(); - ++it; - for (; it != lrSet.end(); ++it) { - LiveRange *lr = *it; - if (lr->GetPriority() > maxPrio) { - maxPrio = lr->GetPriority(); - highestIt = it; - } - } - return highestIt; -} - void GraphColorRegAllocator::UpdateForbiddenForNeighbors(const LiveRange &lr) const { for (auto regNO : lr.GetConflict()) { LiveRange *newLr = GetLiveRange(regNO); @@ -1223,7 +1237,7 @@ regno_t GraphColorRegAllocator::FindColorForLr(const LiveRange &lr) const { const MapleSet *currRegSet = nullptr; const MapleSet *nextRegSet = nullptr; if (regType == kRegTyInt) { - if (lr.GetNumCall() != 0) { + if (lr.GetNumCall() != 0 && !regInfo->IsPrefCallerSaveRegs(regType, lr.GetSpillSize())) { currRegSet = &intCalleeRegSet; nextRegSet = &intCallerRegSet; } else { @@ -1231,7 +1245,7 @@ regno_t GraphColorRegAllocator::FindColorForLr(const LiveRange &lr) const { nextRegSet = &intCalleeRegSet; } } else { - if (lr.GetNumCall() != 0) { + if (lr.GetNumCall() != 0 && !regInfo->IsPrefCallerSaveRegs(regType, lr.GetSpillSize())) { currRegSet = &fpCalleeRegSet; nextRegSet = &fpCallerRegSet; } else { @@ -1243,20 +1257,20 @@ regno_t GraphColorRegAllocator::FindColorForLr(const LiveRange &lr) const { #ifdef MOVE_COALESCE if (lr.GetNumCall() == 0 || (lr.GetNumDefs() + lr.GetNumUses() <= 2)) { for (const auto reg : lr.GetPrefs()) { - if ((FindIn(*currRegSet, reg) || FindIn(*nextRegSet, reg)) && !lr.HaveConflict(reg)) { + if ((FindIn(*currRegSet, reg) || FindIn(*nextRegSet, reg)) && !lr.HaveConflict(reg) && lr.IsVaildRegister(reg)) { return reg; } } } #endif /* MOVE_COALESCE */ for (const auto reg : *currRegSet) { - if (!lr.HaveConflict(reg)) { + if (!lr.HaveConflict(reg) && lr.IsVaildRegister(reg)) { return reg; } } /* Failed to allocate in first choice. Try 2nd choice. */ for (const auto reg : *nextRegSet) { - if (!lr.HaveConflict(reg)) { + if (!lr.HaveConflict(reg) && lr.IsVaildRegister(reg)) { return reg; } } @@ -1276,14 +1290,14 @@ regno_t GraphColorRegAllocator::TryToAssignCallerSave(const LiveRange &lr) const #ifdef MOVE_COALESCE if (lr.GetNumCall() == 0 || (lr.GetNumDefs() + lr.GetNumUses() <= 2)) { for (const auto reg : lr.GetPrefs()) { - if ((FindIn(*currRegSet, reg)) && !lr.HaveConflict(reg) && !lr.GetCallDef(reg)) { + if ((FindIn(*currRegSet, reg)) && !lr.HaveConflict(reg) && !lr.GetCallDef(reg) && lr.IsVaildRegister(reg)) { return reg; } } } #endif /* MOVE_COALESCE */ for (const auto reg : *currRegSet) { - if (!lr.HaveConflict(reg) && !lr.GetCallDef(reg)) { + if (!lr.HaveConflict(reg) && !lr.GetCallDef(reg) && lr.IsVaildRegister(reg)) { return reg; } } @@ -1790,22 +1804,18 @@ void GraphColorRegAllocator::SplitLrHandleLoops(LiveRange &lr, LiveRange &newLr, */ ComputeBBForNewSplit(newLr, lr); - /* With new LR, recompute conflict. */ - auto recomputeConflict = [&lr, &newLr, this](uint32 bbID) { - for (auto regNO : lr.GetConflict()) { - LiveRange *confLrVec = lrMap[regNO]; - if (confLrVec->GetBBMember(bbID) || - (confLrVec->GetSplitLr() != nullptr && confLrVec->GetSplitLr()->GetBBMember(bbID))) { - /* - * New LR getting the interference does not mean the - * old LR can remove the interference. - * Old LR's interference will be handled at the end of split. - */ - newLr.InsertConflict(regNO); - } + // With new LR, recompute conflict + for (auto regNO : lr.GetConflict()) { + auto *confLr = lrMap[regNO]; + if (IsBBsetOverlap(newLr.GetBBMember(), confLr->GetBBMember()) || + (confLr->GetSplitLr() != nullptr && + IsBBsetOverlap(newLr.GetBBMember(), confLr->GetSplitLr()->GetBBMember()))) { + // New LR getting the interference does not mean the + // old LR can remove the interference. + // Old LR's interference will be handled at the end of split. + newLr.InsertConflict(regNO); } - }; - ForEachBBArrElem(newLr.GetBBMember(), recomputeConflict); + } /* update bb/loop same as for new LR. */ ComputeBBForOldSplit(newLr, lr); @@ -1906,6 +1916,7 @@ void GraphColorRegAllocator::SplitLrErrorCheckAndDebug(const LiveRange &origLr) * Return the new LR. */ void GraphColorRegAllocator::SplitLr(LiveRange &lr) { + RA_TIMER_REGISTER(color, "ColorRA SplitLr"); if (!SplitLrShouldSplit(lr)) { return; } @@ -1992,15 +2003,14 @@ void GraphColorRegAllocator::ColorForOptPrologEpilog() { * Color the unconstrained LRs. */ void GraphColorRegAllocator::SplitAndColorForEachLr(MapleVector &targetLrVec) { - while (!targetLrVec.empty()) { - auto highestIt = GetHighPriorityLr(targetLrVec); + // find high priority Lr + std::stable_sort(targetLrVec.begin(), targetLrVec.end(), [](const LiveRange *lr1, const LiveRange *lr2) { + return lr1->GetPriority() > lr2->GetPriority(); + }); + auto highestIt = targetLrVec.begin(); + while (highestIt != targetLrVec.end()) { LiveRange *lr = *highestIt; - /* check those lrs in lr->sconflict which is in unconstrained whether it turns to constrined */ - if (highestIt != targetLrVec.end()) { - targetLrVec.erase(highestIt); - } else { - ASSERT(false, "Error: not in targetLrVec"); - } + ++highestIt; if (AssignColorToLr(*lr)) { continue; } @@ -2023,6 +2033,7 @@ void GraphColorRegAllocator::SplitAndColorForEachLr(MapleVector &tar } void GraphColorRegAllocator::SplitAndColor() { + RA_TIMER_REGISTER(color, "ColorRA SplitAndColor"); /* handle mustAssigned */ if (GCRA_DUMP) { LogInfo::MapleLogger() << " starting mustAssigned : \n"; @@ -2354,6 +2365,7 @@ void GraphColorRegAllocator::LocalRaDebug(const BB &bb, const LocalRegAllocator * from global RA. Spill if no register available. */ void GraphColorRegAllocator::LocalRegisterAllocator(bool doAllocate) { + RA_TIMER_REGISTER(color, "ColorRA LocalRegisterAllocator"); if (GCRA_DUMP) { if (doAllocate) { LogInfo::MapleLogger() << "LRA allocation start\n"; @@ -2948,9 +2960,7 @@ RegOperand *GraphColorRegAllocator::GetReplaceUseDefOpndForLRA(Insn &insn, const if (defSpill != nullptr) { SpillOperandForSpillPost(*defSpill, regOpnd, true, phyOpnd, spillIdx, needSpillLr); } - Insn *useSpill = SpillOperand(insn, regOpnd, false, phyOpnd); - ASSERT(useSpill != nullptr, "null ptr check!"); - SpillOperandForSpillPost(*useSpill, regOpnd, false, phyOpnd, spillIdx, needSpillLr); + (void)SpillOperand(insn, regOpnd, false, phyOpnd); ++spillIdx; return &phyOpnd; } @@ -3156,12 +3166,12 @@ RegOperand *GraphColorRegAllocator::GetReplaceOpnd(Insn &insn, const Operand &op return &phyOpnd; } - bool needCallerSave = false; + bool needCallerSave = regInfo->IsCallerSavePartRegister(regNO, lr->GetSpillSize()); if ((lr->GetNumCall() > 0) && !isCalleeReg) { if (isDef) { - needCallerSave = NeedCallerSave(insn, *lr, isDef) && lr->GetRematLevel() == kRematOff; + needCallerSave |= (NeedCallerSave(insn, *lr, isDef) && lr->GetRematLevel() == kRematOff); } else { - needCallerSave = !lr->GetProcessed(); + needCallerSave |= (!lr->GetProcessed()); } } @@ -3238,9 +3248,9 @@ RegOperand *GraphColorRegAllocator::GetReplaceUseDefOpnd(Insn &insn, const Opera return &phyOpnd; } - bool needCallerSave = false; + bool needCallerSave = regInfo->IsCallerSavePartRegister(regNO, lr->GetSpillSize()); if ((lr->GetNumCall() > 0) && !isCalleeReg) { - needCallerSave = NeedCallerSave(insn, *lr, true) && lr->GetRematLevel() == kRematOff; + needCallerSave |= (NeedCallerSave(insn, *lr, true) && lr->GetRematLevel() == kRematOff); } if (lr->IsSpilled() || (isSplitPart && (lr->GetSplitLr()->GetNumCall() != 0)) || needCallerSave || @@ -3251,9 +3261,7 @@ RegOperand *GraphColorRegAllocator::GetReplaceUseDefOpnd(Insn &insn, const Opera if (defSpill != nullptr) { SpillOperandForSpillPost(*defSpill, regOpnd, true, phyOpnd, spillIdx, needSpillLr); } - Insn *useSpill = SpillOperand(insn, opnd, false, phyOpnd); - ASSERT(useSpill != nullptr, "null ptr check!"); - SpillOperandForSpillPost(*useSpill, regOpnd, false, phyOpnd, spillIdx, needSpillLr); + (void)SpillOperand(insn, opnd, false, phyOpnd); ++spillIdx; } @@ -4044,12 +4052,14 @@ void CallerSavePre::ComputeVarAndDfPhis() { void CallerSavePre::BuildWorkList() { size_t numBBs = dom->GetDtPreOrderSize(); std::vector callSaveLrs; - for (auto [_, lr] : regAllocator.GetLrMap()) { + for (auto lr : regAllocator.GetLrMap()) { if (lr == nullptr || lr->IsSpilled()) { continue; } bool isCalleeReg = func.GetTargetRegInfo()->IsCalleeSavedReg(lr->GetAssignedRegNO()); - if (lr->GetSplitLr() == nullptr && (lr->GetNumCall() > 0) && !isCalleeReg) { + bool isCallerSavePartReg = + func.GetTargetRegInfo()->IsCallerSavePartRegister(lr->GetAssignedRegNO(), lr->GetSpillSize()); + if (lr->GetSplitLr() == nullptr && (lr->GetNumCall() > 0) && (!isCalleeReg || isCallerSavePartReg)) { callSaveLrs.emplace_back(lr); } } @@ -4184,6 +4194,10 @@ void GraphColorRegAllocator::SplitVregAroundLoop(const LoopDesc &loop, const std LiveRange *replacedLr = lrMap[*it]; replacedLr->SetAssignedRegNO(lr->GetAssignedRegNO()); replacedLr->SetSpilled(false); + // prevent reused in nested loops + for (auto [key, replacedLu] : replacedLr->GetLuMap()) { + lr->SetElemToLuMap(key, *replacedLu); + } ++it; } if (splitCount >= maxSplitCount) { @@ -4205,11 +4219,8 @@ bool GraphColorRegAllocator::LrGetBadReg(const LiveRange &lr) const { bool GraphColorRegAllocator::LoopNeedSplit(const LoopDesc &loop, std::set &cands) { std::set regPressure; const MapleSet &liveIn = loop.GetHeader().GetLiveInRegNO(); - std::set loopBBs; for (auto bbId : loop.GetLoopBBs()) { - auto *bb = cgFunc->GetBBFromID(bbId); - loopBBs.insert(bb); - FOR_BB_INSNS(insn, bb) { + FOR_BB_INSNS(insn, cgFunc->GetBBFromID(bbId)) { if (!insn->IsMachineInstruction()) { continue; } @@ -4262,7 +4273,7 @@ bool GraphColorRegAllocator::LoopNeedSplit(const LoopDesc &loop, std::setGetBBMember(), [this, &smember](uint32 bbID) { (void)smember.emplace_back(bbVec[bbID]); }); bool liveBeyondLoop = false; for (auto bb: smember) { - if (loopBBs.find(bb) == loopBBs.end()) { + if (loop.GetLoopBBs().count(bb->GetId()) == 0) { liveBeyondLoop = true; break; } @@ -4294,61 +4305,65 @@ void GraphColorRegAllocator::AnalysisLoop(const LoopDesc &loop) { return; } bool hasCall = false; - std::set loopBBs; for (auto bbId : loop.GetLoopBBs()) { auto *bb = cgFunc->GetBBFromID(bbId); if (bb->HasCall()) { hasCall = true; } - loopBBs.insert(bb); } if (!hasCall) { return; } - auto comparator = [](const LiveRange *lr1, const LiveRange *lr2) -> bool { - return lr1->GetPriority() < lr2->GetPriority(); - }; - std::sort(lrs.begin(), lrs.end(), comparator); - auto &exits = loop.GetExitBBs(); - std::set loopExits; - for (auto bbId: exits) { + + std::set loopExitSuccs; + for (auto bbId: loop.GetExitBBs()) { auto *bb = cgFunc->GetBBFromID(bbId); for (auto &succ: bb->GetSuccs()) { - if (loopBBs.find(succ) != loopBBs.end()) { + if (loop.GetLoopBBs().count(succ->GetId()) != 0) { continue; } if (succ->IsSoloGoto() || succ->IsEmpty()) { BB *realSucc = CGCFG::GetTargetSuc(*succ); if (realSucc != nullptr) { - loopExits.insert(realSucc); + loopExitSuccs.insert(realSucc); } } else { - loopExits.insert(succ); + loopExitSuccs.insert(succ); } } } std::set loopEntra; for (auto &pred: loop.GetHeader().GetPreds()) { - if (loopBBs.find(pred) != loopBBs.end()) { + if (loop.GetBackEdges().count(pred->GetId()) != 0) { continue; } loopEntra.insert(pred); } - if (loopEntra.size() != 1 || loopExits.size() != 1) { + if (loopEntra.size() != 1 || loopExitSuccs.size() != 1) { return; } BB *headerPred = *loopEntra.begin(); - BB *exitSucc = *loopExits.begin(); if (headerPred->GetKind() != BB::kBBFallthru) { return; } + BB *exitSucc = *loopExitSuccs.begin(); if (exitSucc->GetPreds().size() != loop.GetExitBBs().size()) { return; } + for (auto *pred : exitSucc->GetPreds()) { + if (loop.GetExitBBs().count(pred->GetId()) == 0) { + return; + } + } std::set cands; if (!LoopNeedSplit(loop, cands)) { return; } + + auto comparator = [](const LiveRange *lr1, const LiveRange *lr2) -> bool { + return lr1->GetPriority() < lr2->GetPriority(); + }; + std::sort(lrs.begin(), lrs.end(), comparator); SplitVregAroundLoop(loop, lrs, *headerPred, *exitSucc, cands); } @@ -4365,11 +4380,12 @@ void GraphColorRegAllocator::AnalysisLoopPressureAndSplit(const LoopDesc &loop) /* Iterate through all instructions and change the vreg to preg. */ void GraphColorRegAllocator::FinalizeRegisters() { + RA_TIMER_REGISTER(color, "ColorRA FinalizeRegisters"); if (doMultiPass && hasSpill) { if (GCRA_DUMP) { LogInfo::MapleLogger() << "In this round, spill vregs : \n"; - for (auto [_, lr]: std::as_const(lrMap)) { - if (lr->IsSpilled()) { + for (const auto *lr : std::as_const(lrMap)) { + if (lr != nullptr && lr->IsSpilled()) { LogInfo::MapleLogger() << "R" << lr->GetRegNO() << " "; } } diff --git a/src/mapleall/maple_be/src/cg/reg_alloc_lsra.cpp b/src/mapleall/maple_be/src/cg/reg_alloc_lsra.cpp index 336394cb87..b050443a2e 100644 --- a/src/mapleall/maple_be/src/cg/reg_alloc_lsra.cpp +++ b/src/mapleall/maple_be/src/cg/reg_alloc_lsra.cpp @@ -42,28 +42,6 @@ static uint32 insnNumBeforRA = 0; #undef LSRA_GRAPH -#ifdef RA_PERF_ANALYSIS -static long bfsUS = 0; -static long liveIntervalUS = 0; -static long holesUS = 0; -static long lsraUS = 0; -static long finalizeUS = 0; -static long totalUS = 0; - -extern void printLSRATime() { - std::cout << "============================================================\n"; - std::cout << " LSRA sub-phase time information \n"; - std::cout << "============================================================\n"; - std::cout << "BFS BB sorting cost: " << bfsUS << "us \n"; - std::cout << "live interval computing cost: " << liveIntervalUS << "us \n"; - std::cout << "live range approximation cost: " << holesUS << "us \n"; - std::cout << "LSRA cost: " << lsraUS << "us \n"; - std::cout << "finalize cost: " << finalizeUS << "us \n"; - std::cout << "LSRA total cost: " << totalUS << "us \n"; - std::cout << "============================================================\n"; -} -#endif - /* * This LSRA implementation is an interpretation of the [Poletto97] paper. * BFS BB ordering is used to order the instructions. The live intervals are vased on @@ -690,6 +668,7 @@ void LSRALinearScanRegAllocator::BuildIntervalRangesForEachOperand(const Insn &i /* Support finding holes by searching for ranges where holes exist. */ void LSRALinearScanRegAllocator::BuildIntervalRanges() { + RA_TIMER_REGISTER(lsra, "LSRA BuildIntervalRanges"); size_t bbIdx = bfs->sortedBBs.size(); if (bbIdx == 0) { return; @@ -911,6 +890,7 @@ void LSRALinearScanRegAllocator::ComputeLiveIntervalForEachOperand(Insn &insn) { } void LSRALinearScanRegAllocator::ComputeLiveInterval() { + RA_TIMER_REGISTER(lsra, "LSRA ComputeLiveInterval"); calleeUseCnt.resize(regInfo->GetAllRegNum()); liveIntervalsArray.resize(cgFunc->GetMaxVReg()); /* LiveInterval queue for each param/return register */ @@ -1889,6 +1869,7 @@ void LSRALinearScanRegAllocator::FindLowestPrioInActive(LiveInterval *&targetLi, /* Calculate the weight of a live interval for pre-spill and flexible spill */ void LSRALinearScanRegAllocator::LiveIntervalAnalysis() { + RA_TIMER_REGISTER(lsra, "LSRA LiveIntervalAnalysis"); for (uint32 bbIdx = 0; bbIdx < bfs->sortedBBs.size(); ++bbIdx) { BB *bb = bfs->sortedBBs[bbIdx]; @@ -2187,6 +2168,7 @@ void LSRALinearScanRegAllocator::CheckSpillCallee() { /* Iterate through all instructions and change the vreg to preg. */ void LSRALinearScanRegAllocator::FinalizeRegisters() { + RA_TIMER_REGISTER(lsra, "LSRA FinalizeRegisters"); CheckSpillCallee(); for (BB *bb : bfs->sortedBBs) { intBBDefMask = 0; @@ -2302,6 +2284,7 @@ void LSRALinearScanRegAllocator::SetAllocMode() { } void LSRALinearScanRegAllocator::LinearScanRegAllocator() { + RA_TIMER_REGISTER(lsra, "LSRA LinearScanRegAllocator"); if (LSRA_DUMP) { PrintParamQueue("Initial param queue"); PrintCallQueue("Initial call queue"); @@ -2357,19 +2340,13 @@ void LSRALinearScanRegAllocator::LinearScanRegAllocator() { bool LSRALinearScanRegAllocator::AllocateRegisters() { cgFunc->SetIsAfterRegAlloc(); SetAllocMode(); -#ifdef RA_PERF_ANALYSIS - auto begin = std::chrono::system_clock::now(); -#endif if (LSRA_DUMP) { const MIRModule &mirModule = cgFunc->GetMirModule(); DotGenerator::GenerateDot("RA", *cgFunc, mirModule); DotGenerator::GenerateDot("RAe", *cgFunc, mirModule, true); LogInfo::MapleLogger() << "Entering LinearScanRegAllocator\n"; } -/* ================= ComputeBlockOrder =============== */ -#ifdef RA_PERF_ANALYSIS - auto start = std::chrono::system_clock::now(); -#endif + /* * The basic blocks are sorted into a linear order for allocation. * initialize block ordering @@ -2380,59 +2357,22 @@ bool LSRALinearScanRegAllocator::AllocateRegisters() { Bfs localBfs(*cgFunc, *memPool); bfs = &localBfs; bfs->ComputeBlockOrder(); -#ifdef RA_PERF_ANALYSIS - auto end = std::chrono::system_clock::now(); - bfsUS += std::chrono::duration_cast(end - start).count(); -#endif -/* ================= LiveInterval =============== */ -#ifdef RA_PERF_ANALYSIS - start = std::chrono::system_clock::now(); -#endif ComputeLiveInterval(); - #ifdef LSRA_GRAPH PrintLiveRanges(); #endif LiveIntervalAnalysis(); -#ifdef RA_PERF_ANALYSIS - end = std::chrono::system_clock::now(); - liveIntervalUS += std::chrono::duration_cast(end - start).count(); -#endif -/* ================= LiveRange =============== */ -#ifdef RA_PERF_ANALYSIS - start = std::chrono::system_clock::now(); -#endif /* using live interval + holes to approximate live ranges */ BuildIntervalRanges(); -#ifdef RA_PERF_ANALYSIS - end = std::chrono::system_clock::now(); - holesUS += std::chrono::duration_cast(end - start).count(); -#endif -/* ================= InitFreeRegPool =============== */ + InitFreeRegPool(); -/* ================= LinearScanRegAllocator =============== */ -#ifdef RA_PERF_ANALYSIS - start = std::chrono::system_clock::now(); -#endif LinearScanRegAllocator(); -#ifdef RA_PERF_ANALYSIS - end = std::chrono::system_clock::now(); - lsraUS += std::chrono::duration_cast(end - start).count(); -#endif -#ifdef RA_PERF_ANALYSIS - start = std::chrono::system_clock::now(); -#endif FinalizeRegisters(); -#ifdef RA_PERF_ANALYSIS - end = std::chrono::system_clock::now(); - finalizeUS += std::chrono::duration_cast(end - start).count(); -#endif - if (LSRA_DUMP) { LogInfo::MapleLogger() << "Total " << spillCount << " spillCount in " << cgFunc->GetName() << " \n"; LogInfo::MapleLogger() << "Total " << reloadCount << " reloadCount\n"; @@ -2447,12 +2387,6 @@ bool LSRALinearScanRegAllocator::AllocateRegisters() { } bfs = nullptr; /* bfs is not utilized outside the function. */ - -#ifdef RA_PERF_ANALYSIS - end = std::chrono::system_clock::now(); - totalUS += std::chrono::duration_cast(end - begin).count(); -#endif - return true; } diff --git a/src/mapleall/maple_be/src/cg/reg_coalesce.cpp b/src/mapleall/maple_be/src/cg/reg_coalesce.cpp index 5584739974..20ae4cf20b 100644 --- a/src/mapleall/maple_be/src/cg/reg_coalesce.cpp +++ b/src/mapleall/maple_be/src/cg/reg_coalesce.cpp @@ -21,10 +21,6 @@ #endif #include "cg.h" -/* - * This phase implements if-conversion optimization, - * which tries to convert conditional branches into cset/csel instructions - */ namespace maplebe { void LiveIntervalAnalysis::Run() { diff --git a/src/mapleall/maple_be/src/cg/tailcall.cpp b/src/mapleall/maple_be/src/cg/tailcall.cpp index 8f55841357..e4e295f0a8 100644 --- a/src/mapleall/maple_be/src/cg/tailcall.cpp +++ b/src/mapleall/maple_be/src/cg/tailcall.cpp @@ -213,7 +213,6 @@ void TailCallOpt::TideExitBB() { } void TailCallOpt::Run() { - stackProtect = cgFunc.GetNeedStackProtect(); if (CGOptions::DoTailCallOpt()) { (void)DoTailCallOpt(); // return value == "no call instr/only or 1 tailcall" } diff --git a/src/mapleall/maple_be/src/cg/x86_64/x64_args.cpp b/src/mapleall/maple_be/src/cg/x86_64/x64_args.cpp index a07b9e1da7..cec24043d2 100644 --- a/src/mapleall/maple_be/src/cg/x86_64/x64_args.cpp +++ b/src/mapleall/maple_be/src/cg/x86_64/x64_args.cpp @@ -61,12 +61,6 @@ void X64MoveRegArgs::CollectRegisterArgs(std::map &argsList, if (ploc.reg1 == kRinvalid) { continue; } - if (ploc.numFpPureRegs) { - uint32 index = i; - numFpRegs[index] = ploc.numFpPureRegs; - fpSize[index] = ploc.fpSize; - continue; - } pairReg[i] = static_cast(ploc.reg1); } } diff --git a/src/mapleall/maple_be/src/cg/x86_64/x64_call_conv.cpp b/src/mapleall/maple_be/src/cg/x86_64/x64_call_conv.cpp index 96ee659c07..67febc38b9 100644 --- a/src/mapleall/maple_be/src/cg/x86_64/x64_call_conv.cpp +++ b/src/mapleall/maple_be/src/cg/x86_64/x64_call_conv.cpp @@ -109,7 +109,6 @@ void X64CallConvImpl::InitCCLocInfo(CCLocInfo &pLoc) const { pLoc.reg3 = kRinvalid; pLoc.memOffset = nextStackArgAdress; pLoc.fpSize = 0; - pLoc.numFpPureRegs = 0; } int32 X64CallConvImpl::LocateNextParm(MIRType &mirType, CCLocInfo &pLoc, bool isFirst, MIRFunction *tFunc) { diff --git a/src/mapleall/maple_be/src/cg/x86_64/x64_proepilog.cpp b/src/mapleall/maple_be/src/cg/x86_64/x64_proepilog.cpp index 84760974f9..8f4337eeba 100644 --- a/src/mapleall/maple_be/src/cg/x86_64/x64_proepilog.cpp +++ b/src/mapleall/maple_be/src/cg/x86_64/x64_proepilog.cpp @@ -114,7 +114,6 @@ void X64GenProEpilog::GenerateProlog(BB &bb) { auto &x64CGFunc = static_cast(cgFunc); BB *formerCurBB = cgFunc.GetCurBB(); x64CGFunc.GetDummyBB()->ClearInsns(); - x64CGFunc.GetDummyBB()->SetIsProEpilog(true); cgFunc.SetCurBB(*x64CGFunc.GetDummyBB()); /* push %rbp */ @@ -147,7 +146,6 @@ void X64GenProEpilog::GenerateProlog(BB &bb) { GeneratePushUnnamedVarargRegs(); bb.InsertAtBeginning(*x64CGFunc.GetDummyBB()); - x64CGFunc.GetDummyBB()->SetIsProEpilog(false); cgFunc.SetCurBB(*formerCurBB); } @@ -155,7 +153,6 @@ void X64GenProEpilog::GenerateEpilog(BB &bb) { auto &x64CGFunc = static_cast(cgFunc); BB *formerCurBB = cgFunc.GetCurBB(); x64CGFunc.GetDummyBB()->ClearInsns(); - x64CGFunc.GetDummyBB()->SetIsProEpilog(true); cgFunc.SetCurBB(*x64CGFunc.GetDummyBB()); GenerateCalleeSavedRegs(false); @@ -183,7 +180,6 @@ void X64GenProEpilog::GenerateEpilog(BB &bb) { cgFunc.GetCurBB()->AppendInsn(retInsn); bb.AppendBBInsns(*x64CGFunc.GetDummyBB()); - x64CGFunc.GetDummyBB()->SetIsProEpilog(false); cgFunc.SetCurBB(*formerCurBB); } diff --git a/src/mapleall/maple_driver/BUILD.gn b/src/mapleall/maple_driver/BUILD.gn index 43cc6d54d2..43d4319f40 100644 --- a/src/mapleall/maple_driver/BUILD.gn +++ b/src/mapleall/maple_driver/BUILD.gn @@ -56,6 +56,7 @@ executable("maple") { "src/mpl_options.cpp", "src/mplcg_compiler.cpp", "src/hided_options.cpp", + "src/parse_spec.cpp", ] include_dirs = include_directories diff --git a/src/mapleall/maple_driver/CMakeLists.txt b/src/mapleall/maple_driver/CMakeLists.txt index 4f727704a0..bc015d45e7 100755 --- a/src/mapleall/maple_driver/CMakeLists.txt +++ b/src/mapleall/maple_driver/CMakeLists.txt @@ -54,6 +54,7 @@ set(src_libmaple src/mpl_options.cpp src/mplcg_compiler.cpp src/hided_options.cpp + src/parse_spec.cpp ) #libmaple diff --git a/src/mapleall/maple_driver/include/driver_options.h b/src/mapleall/maple_driver/include/driver_options.h index 2a6236b4e5..295ccbdcde 100644 --- a/src/mapleall/maple_driver/include/driver_options.h +++ b/src/mapleall/maple_driver/include/driver_options.h @@ -57,6 +57,7 @@ extern maplecl::Option genVtable; extern maplecl::Option verbose; extern maplecl::Option debug; extern maplecl::Option withDwarf; +extern maplecl::Option noOptO0; extern maplecl::Option withIpa; extern maplecl::Option npeNoCheck; extern maplecl::Option npeStaticCheck; @@ -95,7 +96,7 @@ extern maplecl::Option noStdinc; extern maplecl::Option pie; extern maplecl::Option fStrongEvalOrder; extern maplecl::Option linkerTimeOpt; -extern maplecl::Option expand128Floats; +extern maplecl::Option legalizeNumericTypes; extern maplecl::Option shared; extern maplecl::Option rdynamic; extern maplecl::Option dndebug; @@ -181,7 +182,6 @@ extern maplecl::Option oWformatTruncation; extern maplecl::Option oWformatY2k; extern maplecl::Option oWformatZeroLength; extern maplecl::Option oWframeAddress; -extern maplecl::Option oWframeLargerThan; extern maplecl::Option oWfreeNonheapObject; extern maplecl::Option oWignoredAttributes; extern maplecl::Option oWimplicit; @@ -1341,6 +1341,7 @@ extern maplecl::Option oMmaxStackFrame; extern maplecl::Option oMmcountRaAddress; extern maplecl::Option oMmcu; extern maplecl::Option oMMD; +extern maplecl::Option oMD; extern maplecl::Option oMmedia; extern maplecl::Option oMmediumCalls; extern maplecl::Option oMmemcpy; @@ -2076,6 +2077,7 @@ extern maplecl::Option oWeakReferenceMismatches; extern maplecl::Option helpLevel; extern maplecl::Option funcInliceSize; extern maplecl::Option initOptNum; +extern maplecl::Option oWframeLargerThan; /* ##################### Warnings Options ############################################################### */ diff --git a/src/mapleall/maple_driver/include/mpl_options.h b/src/mapleall/maple_driver/include/mpl_options.h index c2f0d68094..d8b45765b4 100644 --- a/src/mapleall/maple_driver/include/mpl_options.h +++ b/src/mapleall/maple_driver/include/mpl_options.h @@ -93,6 +93,10 @@ class InputInfo { return inputFolder; } + const std::string &GetInputName() const { + return inputName; + } + const std::string &GetOutputFolder() const { return outputFolder; } @@ -278,6 +282,10 @@ class MplOptions { return linkInputFiles; } + const std::vector> &GetInputInfos() const { + return inputInfos; + } + /* return hirInputFiles when -flto. */ const std::vector &GetHirInputFiles() const { return hirInputFiles; diff --git a/src/mapleall/maple_driver/include/parse_spec.h b/src/mapleall/maple_driver/include/parse_spec.h new file mode 100644 index 0000000000..e54e62081e --- /dev/null +++ b/src/mapleall/maple_driver/include/parse_spec.h @@ -0,0 +1,31 @@ +/* + * Copyright (c) [2023] Huawei Technologies Co.,Ltd.All rights reserved. + * + * OpenArkCompiler is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * + * http://license.coscl.org.cn/MulanPSL2 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ +#ifndef MAPLE_DRIVER_INCLUDE_PARSE_SPEC_H +#define MAPLE_DRIVER_INCLUDE_PARSE_SPEC_H +#include "compiler.h" + +namespace maple { + +class ParseSpec { + public: + ParseSpec() {} + ~ParseSpec() = default; + + static std::vector GetOpt(const std::string &cmd, const std::string &args); + static ErrorCode GetOptFromSpecsByGcc(int argc, char **argv, const MplOptions &mplOptions); +}; + +} +#endif // MAPLE_DRIVER_INCLUDE_PARSE_SPEC_H \ No newline at end of file diff --git a/src/mapleall/maple_driver/include/safe_exe.h b/src/mapleall/maple_driver/include/safe_exe.h index 307f59d9ed..026a95214b 100644 --- a/src/mapleall/maple_driver/include/safe_exe.h +++ b/src/mapleall/maple_driver/include/safe_exe.h @@ -28,6 +28,7 @@ #include #include +#include #include "error_code.h" #include "mpl_logging.h" #include "mpl_options.h" @@ -84,7 +85,69 @@ class SafeExe { ret = kErrorCompileFail; } } + for (size_t j = 0; j < vectorArgs.size(); ++j) { + delete [] argv[j]; + } + delete [] argv; + return ret; + } + static ErrorCode HandleCommand(const std::string &cmd, const std::string &args, std::string &result) { + std::vector vectorArgs = ParseArgsVector(cmd, args); + // extra space for exe name and args + char **argv = new char *[vectorArgs.size() + 1]; + // argv[0] is program name + // copy args + for (size_t j = 0; j < vectorArgs.size(); ++j) { + size_t strLength = vectorArgs[j].size(); + argv[j] = new char[strLength + 1]; + strncpy_s(argv[j], strLength + 1, vectorArgs[j].c_str(), strLength); + argv[j][strLength] = '\0'; + } + // end of arguments sentinel is nullptr + argv[vectorArgs.size()] = nullptr; + int pipefd[2]; + if (pipe(pipefd) == -1) { + return kErrorCompileFail; + } + fflush(nullptr); + pid_t pid = fork(); + ErrorCode ret = kErrorNoError; + if (pid == 0) { + // child process + fflush(nullptr); + (void)close(pipefd[0]); + (void)dup2(pipefd[1], STDERR_FILENO); + if (execv(cmd.c_str(), argv) < 0) { + for (size_t j = 0; j < vectorArgs.size(); ++j) { + delete [] argv[j]; + } + delete [] argv; + (void)close(pipefd[1]); + exit(1); + } + (void)close(pipefd[1]); + } else { + // parent process + int status = -1; + char buf[1] = {0}; + (void)close(pipefd[1]); + // read one char on time + for (;;) { + ssize_t retCode = read(pipefd[ 0], buf, sizeof(buf)); + if (retCode == 0) { + break; + } + result.push_back(buf[0]); + } + (void)close(pipefd[0]); + waitpid(pid, &status, 0); + auto exitStatus = static_cast(status); + if (!WIFEXITED(exitStatus) || WEXITSTATUS(exitStatus) != 0) { + LogInfo::MapleLogger() << "Error while Exe, cmd: " << cmd << " args: " << args << '\n'; + ret = kErrorCompileFail; + } + } for (size_t j = 0; j < vectorArgs.size(); ++j) { delete [] argv[j]; } @@ -139,10 +202,10 @@ class SafeExe { // child process fflush(nullptr); if (compileeFlag == Compilee::kHir2mpl) { - std::string ld_path = ":"; + std::string ldPath = ":"; if (FileUtils::SafeGetenv(kLdLibPath) != "") { - ld_path += FileUtils::SafeGetenv(kLdLibPath); - ldLibPath += ld_path; + ldPath += FileUtils::SafeGetenv(kLdLibPath); + ldLibPath += ldPath; } setenv("LD_LIBRARY_PATH", ldLibPath.c_str(), 1); } @@ -269,7 +332,7 @@ class SafeExe { #endif static ErrorCode Exe(const std::string &cmd, const std::string &args) { - LogInfo::MapleLogger() << "Starting:" << cmd << args << '\n'; + LogInfo::MapleLogger() << "Starting:" << cmd << " " << args << '\n'; if (StringUtils::HasCommandInjectionChar(cmd) || StringUtils::HasCommandInjectionChar(args)) { LogInfo::MapleLogger() << "Error while Exe, cmd: " << cmd << " args: " << args << '\n'; return kErrorCompileFail; @@ -278,6 +341,18 @@ class SafeExe { return ret; } + static ErrorCode Exe(const std::string &cmd, const std::string &args, std::string &result) { + if (opts::debug) { + LogInfo::MapleLogger() << "Starting:" << cmd << " " << args << '\n'; + } + if (StringUtils::HasCommandInjectionChar(cmd) || StringUtils::HasCommandInjectionChar(args)) { + LogInfo::MapleLogger() << "Error while Exe, cmd: " << cmd << " args: " << args << '\n'; + return kErrorCompileFail; + } + ErrorCode ret = HandleCommand(cmd, args, result); + return ret; + } + static ErrorCode Exe(const std::string &cmd, const MplOptions &mplOptions, const std::vector &options) { if (StringUtils::HasCommandInjectionChar(cmd)) { diff --git a/src/mapleall/maple_driver/include/triple.h b/src/mapleall/maple_driver/include/triple.h index c5db27f9db..8bfc5501ed 100644 --- a/src/mapleall/maple_driver/include/triple.h +++ b/src/mapleall/maple_driver/include/triple.h @@ -56,6 +56,7 @@ class Triple { static Triple triple; return triple; } + Triple(const Triple &) = delete; Triple &operator=(const Triple &) = delete; diff --git a/src/mapleall/maple_driver/src/as_compiler.cpp b/src/mapleall/maple_driver/src/as_compiler.cpp index b0791262a6..819ed8bb4e 100644 --- a/src/mapleall/maple_driver/src/as_compiler.cpp +++ b/src/mapleall/maple_driver/src/as_compiler.cpp @@ -76,7 +76,7 @@ DefaultOption AsCompilerBeILP32::GetDefaultOptions(const MplOptions &options, co if (triple.GetEnvironment() == Triple::EnvironmentType::kGnuIlp32) { defaultOptions.mplOptions[i].SetKey("-mabi=ilp32"); - defaultOptions.mplOptions[i++].SetValue(""); + defaultOptions.mplOptions[i].SetValue(""); // if new option is added, this i needs i++ } return defaultOptions; diff --git a/src/mapleall/maple_driver/src/clang_compiler.cpp b/src/mapleall/maple_driver/src/clang_compiler.cpp index d60d165d1b..d13d1fce16 100644 --- a/src/mapleall/maple_driver/src/clang_compiler.cpp +++ b/src/mapleall/maple_driver/src/clang_compiler.cpp @@ -102,6 +102,7 @@ bool IsUseSafeOption() { static uint32_t FillSpecialDefaulOpt(std::unique_ptr &opt, const Action &action, const MplOptions &options) { uint32_t additionalLen = 1; // for -o option + uint32_t index = 0; auto &triple = Triple::GetTriple(); if (triple.GetArch() != Triple::ArchType::kAarch64 || @@ -116,38 +117,44 @@ static uint32_t FillSpecialDefaulOpt(std::unique_ptr &opt, if (opts::passO2ToClang.IsEnabledByUser()) { additionalLen += 1; } + if (opts::oMD.IsEnabledByUser() && (opts::compileWOLink.IsEnabledByUser() || opts::onlyCompile.IsEnabledByUser())) { + additionalLen += 1; + } opt = std::make_unique(additionalLen); - opt[0].SetKey("-target"); - opt[0].SetValue(triple.Str()); - opt[1].SetKey("-isystem"); - opt[1].SetValue(GetFormatClangPath(options) + "lib/libc_enhanced/include"); - opt[2].SetKey("-isystem"); - opt[2].SetValue(GetFormatClangPath(options) + "lib/include"); - opt[3].SetKey("-U"); - opt[3].SetValue("__SIZEOF_INT128__"); + auto setMplOption = [&opt](const std::string &key, const std::string &value, uint32_t index) { + opt[index].SetKey(key); + opt[index].SetValue(value); + }; + + setMplOption("-target", triple.Str(), index++); + setMplOption("-isystem", GetFormatClangPath(options) + "lib/libc_enhanced/include", index++); + setMplOption("-isystem", GetFormatClangPath(options) + "lib/include", index++); + setMplOption("-U", "__SIZEOF_INT128__", index++); if (IsUseSafeOption()) { - opt[4].SetKey("-DC_ENHANCED"); - opt[4].SetValue(""); + setMplOption("-DC_ENHANCED", "", index++); } if (opts::passO2ToClang.IsEnabledByUser() && opts::o2.IsEnabledByUser()) { - opt[additionalLen - 3].SetKey("-O2"); - opt[additionalLen - 3].SetValue(""); + setMplOption("-O2", "", index++); } + if (opts::oMD.IsEnabledByUser() && (opts::compileWOLink.IsEnabledByUser() || opts::onlyCompile.IsEnabledByUser())) { + if (opts::onlyCompile.IsEnabledByUser()) { + setMplOption("-S", "", index++); + } else { + setMplOption("-c", "", index++); + } + } /* Set last option as -o option */ if (action.GetInputFileType() != InputFileType::kFileTypeH && !opts::onlyPreprocess.IsEnabledByUser() && !opts::oM.IsEnabledByUser() && !opts::oMM.IsEnabledByUser() && !opts::oMG.IsEnabledByUser() && !opts::oMQ.IsEnabledByUser()) { if (!opts::linkerTimeOpt.IsEnabledByUser() || !opts::compileWOLink.IsEnabledByUser()) { - opt[additionalLen - 1].SetKey("-o"); - opt[additionalLen - 1].SetValue(action.GetFullOutputName() + ".ast"); + setMplOption("-o", action.GetFullOutputName() + ".ast", index++); } else { - opt[additionalLen - 1].SetKey("-o"); - opt[additionalLen - 1].SetValue("./" + action.GetOutputName() + ".o"); + setMplOption("-o", "./" + action.GetOutputName() + ".o", index++); } - opt[additionalLen - 2].SetKey("-emit-ast"); // 2 is the array sequence number. - opt[additionalLen - 2].SetValue(""); + setMplOption("-emit-ast", "", index); } return additionalLen; diff --git a/src/mapleall/maple_driver/src/cpp2mpl_compiler.cpp b/src/mapleall/maple_driver/src/cpp2mpl_compiler.cpp index fc6fca3ca3..189e5ea6fd 100644 --- a/src/mapleall/maple_driver/src/cpp2mpl_compiler.cpp +++ b/src/mapleall/maple_driver/src/cpp2mpl_compiler.cpp @@ -98,8 +98,7 @@ DefaultOption Cpp2MplCompiler::GetDefaultOptions(const MplOptions &options, } if (opts::linkerTimeOpt.IsEnabledByUser()) { defaultOptions.mplOptions[len].SetKey("-wpaa"); - defaultOptions.mplOptions[len].SetValue(""); - len++; + defaultOptions.mplOptions[len].SetValue(""); // if new option is added, needs len++ } return defaultOptions; } diff --git a/src/mapleall/maple_driver/src/driver_options.cpp b/src/mapleall/maple_driver/src/driver_options.cpp index 8d7111b99d..8f6f77840f 100644 --- a/src/mapleall/maple_driver/src/driver_options.cpp +++ b/src/mapleall/maple_driver/src/driver_options.cpp @@ -28,23 +28,23 @@ maplecl::Option ignoreUnkOpt({"--ignore-unknown-options"}, " --ignore-unknown-options \tIgnore unknown compilation options\n", {driverCategory}); -maplecl::Option o0({"--O0", "-O0"}, +maplecl::Option o0({"-O0", "--O0"}, " -O0 \tNo optimization. (Default)\n", {driverCategory}); -maplecl::Option o1({"--O1", "-O1"}, +maplecl::Option o1({"-O1", "--O1"}, " -O1 \tDo some optimization.\n", {driverCategory}, maplecl::kHide); -maplecl::Option o2({"--O2", "-O2"}, +maplecl::Option o2({"-O2", "--O2"}, " -O2 \tDo more optimization.\n", {driverCategory, hir2mplCategory}); -maplecl::Option o3({"--O3", "-O3"}, +maplecl::Option o3({"-O3", "--O3"}, " -O3 \tDo more optimization.\n", {driverCategory}, maplecl::kHide); -maplecl::Option os({"--Os", "-Os"}, +maplecl::Option os({"-Os", "--Os"}, " -Os \tOptimize for size, based on O2.\n", {driverCategory}); @@ -64,8 +64,8 @@ maplecl::Option gcOnly({"--gconly", "-gconly"}, {driverCategory, dex2mplCategory, meCategory, mpl2mplCategory, cgCategory}, maplecl::DisableWith("--no-gconly"), maplecl::kHide); -maplecl::Option timePhase({"-time-phases"}, - " -time-phases \tTiming phases and print percentages.\n", +maplecl::Option timePhase({"--time-phases", "-time-phases"}, + " --time-phases \tTiming phases and print percentages.\n", {driverCategory}); maplecl::Option genMeMpl({"--genmempl"}, @@ -91,6 +91,9 @@ maplecl::Option debug({"--debug"}, maplecl::Option withDwarf({"-g"}, " --debug \tPrint debug info.\n", {driverCategory, hir2mplCategory}); +maplecl::Option noOptO0({"-no-opt-O0"}, + " -no-opt-O0 \tDonot do O0 opt which will interference debug.\n", + {driverCategory}); maplecl::Option withIpa({"--with-ipa"}, " --with-ipa \tRun IPA when building.\n" @@ -197,11 +200,11 @@ maplecl::Option inlineAsWeak({"-inline-as-weak", "--inline-as-weak"}, " --inline-as-weak \tSet inline functions as weak symbols as it's in C++\n", {driverCategory, hir2mplCategory}); -maplecl::Option expand128Floats({"--expand128floats"}, - " --expand128floats \tEnable expand128floats pass\n", +maplecl::Option legalizeNumericTypes({"--legalize-numeric-types"}, + " --legalize-numeric-types \tEnable legalize-numeric-types pass\n", {driverCategory}, maplecl::DisableWith("--no-exp nd128floats"), maplecl::kHide, maplecl::Init(true)); -maplecl::Option MD({"-MD"}, +maplecl::Option oMD({"-MD"}, " -MD \tWrite a depfile containing user and system headers.\n", {driverCategory, clangCategory}); @@ -266,7 +269,7 @@ maplecl::Option rdynamic({"-rdynamic"}, maplecl::Option dndebug({"-DNDEBUG"}, " -DNDEBUG \t\n", - {driverCategory, ldCategory}); + {driverCategory, ldCategory, clangCategory}); maplecl::Option useSignedChar({"-fsigned-char", "-usesignedchar", "--usesignedchar"}, " -fsigned-char \tuse signed char\n", @@ -313,7 +316,7 @@ maplecl::Option wpaa({"-wpaa", "--wpaa"}, maplecl::Option fm({"-fm", "--fm"}, " -fm \tStatic function merge will be enabled only when wpaa is enabled " "at the same time.\n", - {driverCategory, hir2mplCategory}); + {driverCategory, hir2mplCategory}, maplecl::DisableEvery({"-no-fm", "--no-fm"})); maplecl::Option dumpTime({"--dump-time", "-dump-time"}, " --dump-time \tDump time.\n", @@ -464,6 +467,14 @@ maplecl::Option marchE({"-march="}, " -march= \tGenerate code for given CPU.\n", {driverCategory, clangCategory, asCategory, ldCategory, unSupCategory}, maplecl::kHide); +maplecl::Option marchArmV8({"-march=armv8-a"}, + " -march=armv8-a \tGenerate code for armv8-a.\n", + {driverCategory, clangCategory, asCategory, ldCategory}); + +maplecl::Option marchArmV8Crc({"-march=armv8-a+crc"}, + " -march=armv8-a+crc \tGenerate code for armv8-a+crc.\n", + {driverCategory, clangCategory, asCategory, ldCategory}); + maplecl::Option sysRoot({"--sysroot"}, " --sysroot \tSet the root directory of the target platform.\n" " --sysroot= \tSet the root directory of the target platform.\n", @@ -3526,7 +3537,7 @@ maplecl::Option oStdgnu98p({"-std=gnu++98"}, maplecl::Option oStdgnu11({"-std=gnu11"}, " -std=gnu11 \tConform to the ISO 2011 C standard with GNU extensions.\n", - {driverCategory, clangCategory, unSupCategory}, maplecl::kHide); + {driverCategory, clangCategory}); maplecl::Option oStdgnu1x({"-std=gnu1x"}, " -std=gnu1x \tDeprecated in favor of -std=gnu11.\n", diff --git a/src/mapleall/maple_driver/src/driver_runner.cpp b/src/mapleall/maple_driver/src/driver_runner.cpp index c84f095611..95b5308982 100644 --- a/src/mapleall/maple_driver/src/driver_runner.cpp +++ b/src/mapleall/maple_driver/src/driver_runner.cpp @@ -21,6 +21,7 @@ #include "constantfold.h" #include "lower.h" #include "me_phase_manager.h" +#include "ipa_phase_manager.h" #include "lfo_loop_vec.h" #include "seqvec.h" @@ -283,11 +284,13 @@ void DriverRunner::RunNewPM(const std::string &output, const std::string &vtable MeFuncPM::genMapleBC = genMapleBC; MeFuncPM::genLMBC = genLMBC; MeFuncPM::timePhases = timePhases; + IpaSccPM::timePhases = timePhases; MPLTimer timer; timer.Start(); topLevelPhaseManager->DoPhasesPopulate(*theModule); topLevelPhaseManager->Run(*theModule); if (timePhases) { + LogInfo::MapleLogger() << "================== TopLevelPM =================="; topLevelPhaseManager->DumpPhaseTime(); } // emit after module phase @@ -323,14 +326,6 @@ void DriverRunner::ProcessMpl2mplAndMePhases(const std::string &output, const st void DriverRunner::ProcessCGPhase(const std::string &output, const std::string &originBaseName) { CHECK_MODULE(); theMIRModule = theModule; - if (withDwarf && !theModule->IsWithDbgInfo()) { - theMIRModule->GetDbgInfo()->BuildDebugInfo(); -#if defined(DEBUG) && DEBUG - if (cgOptions) { - cgOptions->SetOption(CGOptions::kVerboseAsm); - } -#endif - } if (cgOptions == nullptr) { return; } @@ -342,9 +337,6 @@ void DriverRunner::ProcessCGPhase(const std::string &output, const std::string & theModule->SetBaseName(originBaseName); theModule->SetOutputFileName(output); cgOptions->SetDefaultOptions(*theModule); - if (timePhases) { - CGOptions::EnableTimePhases(); - } Globals::GetInstance()->SetOptimLevel(cgOptions->GetOptimizeLevel()); MAD mad; Globals::GetInstance()->SetMAD(mad); @@ -358,8 +350,21 @@ void DriverRunner::ProcessCGPhase(const std::string &output, const std::string & } /* It is a specifc work around (need refactor) */ cgfuncPhaseManager->SetCGOptions(cgOptions); + // reserve static symbol in O0 debugging + temp flag for GDB testsuite + if (!((opts::o0 || opts::o0.IsEnabledByUser()) && opts::noOptO0)) { + cgfuncPhaseManager->SweepUnusedStaticSymbol(*theModule); + } + if (withDwarf && !theModule->IsWithDbgInfo()) { + theMIRModule->GetDbgInfo()->BuildDebugInfo(); +#if defined(DEBUG) && DEBUG + if (cgOptions) { + cgOptions->SetOption(CGOptions::kVerboseAsm); + } +#endif + } (void) cgfuncPhaseManager->PhaseRun(*theModule); if (timePhases) { + LogInfo::MapleLogger() << "================== CGFuncPM =================="; cgfuncPhaseManager->DumpPhaseTime(); } timer.Stop(); diff --git a/src/mapleall/maple_driver/src/ld_compiler.cpp b/src/mapleall/maple_driver/src/ld_compiler.cpp index 85547ffb79..0a8a3b564e 100644 --- a/src/mapleall/maple_driver/src/ld_compiler.cpp +++ b/src/mapleall/maple_driver/src/ld_compiler.cpp @@ -53,21 +53,7 @@ std::string LdCompilerBeILP32::GetBin(const MplOptions &mplOptions [[maybe_unuse } std::string LdCompiler::GetBin(const MplOptions &mplOptions [[maybe_unused]]) const { -#ifdef ANDROID - return "prebuilts/gcc/linux-x86/aarch64/aarch64-linux-android-4.9/bin/"; -#else - if (FileUtils::SafeGetenv(kGccPath) != "") { - std::string gccPath = FileUtils::SafeGetenv(kGccPath) + " -dumpversion"; - FileUtils::CheckGCCVersion(gccPath.c_str()); - return FileUtils::SafeGetenv(kGccPath); - } else if (FileUtils::SafeGetenv(kMapleRoot) != "") { - return FileUtils::SafeGetenv(kMapleRoot) + "/tools/bin/aarch64-linux-gnu-gcc"; - } - std::string gccPath = FileUtils::SafeGetPath("which aarch64-linux-gnu-gcc", "aarch64-linux-gnu-gcc") + - " -dumpversion"; - FileUtils::CheckGCCVersion(gccPath.c_str()); - return FileUtils::SafeGetPath("which aarch64-linux-gnu-gcc", "aarch64-linux-gnu-gcc"); -#endif + return FileUtils::GetGccBin(); } // Required to use ld instead of gcc; ld will be implemented later diff --git a/src/mapleall/maple_driver/src/maple.cpp b/src/mapleall/maple_driver/src/maple.cpp index cf6aa2171f..6f22a99f4c 100644 --- a/src/mapleall/maple_driver/src/maple.cpp +++ b/src/mapleall/maple_driver/src/maple.cpp @@ -16,6 +16,7 @@ #include "error_code.h" #include "mpl_options.h" #include "mpl_sighandler.h" +#include "parse_spec.h" using namespace maple; @@ -25,7 +26,10 @@ int main(int argc, char **argv) { MplOptions mplOptions; int ret = static_cast(mplOptions.Parse(argc, argv)); if (ret == kErrorNoError) { - ret = CompilerFactory::GetInstance().Compile(mplOptions); + ret = static_cast(ParseSpec::GetOptFromSpecsByGcc(argc, argv, mplOptions)); + } + if (ret == kErrorNoError) { + ret = static_cast(CompilerFactory::GetInstance().Compile(mplOptions)); } PrintErrorMessage(ret); return ret; diff --git a/src/mapleall/maple_driver/src/mpl_options.cpp b/src/mapleall/maple_driver/src/mpl_options.cpp index 149c35045b..f99db4f1bb 100644 --- a/src/mapleall/maple_driver/src/mpl_options.cpp +++ b/src/mapleall/maple_driver/src/mpl_options.cpp @@ -402,9 +402,9 @@ ErrorCode MplOptions::DecideRunningPhases() { inputInfos.clear(); inputInfos = std::move(tmpInputInfos); tmpInputInfos.clear(); - auto lastOastInfo = hirInputFiles.back(); - hirInputFiles.pop_back(); - inputInfos.push_back(std::make_unique(lastOastInfo)); + auto frontOastInfo = hirInputFiles.front(); + (void)hirInputFiles.erase(hirInputFiles.begin()); + inputInfos.push_back(std::make_unique(frontOastInfo)); inputInfos.push_back(std::make_unique(InputInfo(inputInfos.back()->GetOutputFolder() + "tmp.mpl", InputFileType::kFileTypeMpl, "tmp.mpl", inputInfos.back()->GetOutputFolder(), inputInfos.back()->GetOutputFolder(), "tmp", inputInfos.back()->GetOutputFolder() + "tmp"))); diff --git a/src/mapleall/maple_driver/src/parse_spec.cpp b/src/mapleall/maple_driver/src/parse_spec.cpp new file mode 100644 index 0000000000..351503aebd --- /dev/null +++ b/src/mapleall/maple_driver/src/parse_spec.cpp @@ -0,0 +1,112 @@ +/* + * Copyright (c) [2023] Huawei Technologies Co.,Ltd.All rights reserved. + * + * OpenArkCompiler is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * + * http://license.coscl.org.cn/MulanPSL2 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ +#include "parse_spec.h" +#include "compiler.h" +#include "safe_exe.h" +#include "file_utils.h" +#include "driver_options.h" + +namespace maple { + +std::vector ParseSpec::GetOpt(const std::string &cmd, const std::string &args) { + std::vector res; + std::string result = ""; + ErrorCode ret = SafeExe::Exe(cmd, args, result); + if (ret != kErrorNoError) { + return res; + } + std::vector gccOutput; + StringUtils::Split(result, gccOutput, '\n'); + for (size_t index = 0; index < gccOutput.size(); index++) { + if (gccOutput[index].find("cc1") != std::string::npos) { + StringUtils::Split(gccOutput[index], res, ' '); + break; + } + } + return res; +} + +bool IsMapleOptionOrInputFile(const std::string &opt, const MplOptions &mplOptions, bool &isNeedNext) { + std::vector driverOptAndInputFile = {"--ignore-unknown-options", "--hir2mpl-opt=", "--mpl2mpl-opt=", + "-specs", "-specs=", "--save-temps", "-o", "--maple-phase", "-tmp-folder", "--me-opt=", "--mplcg-opt=", + "--static-libmplpgo", "--lite-pgo-verify", "--lite-pgo-gen", "--lite-pgo-file", "--lite-pgo-file=", "--run=", + "--option=", "--infile", "--quiet", "--lite-pgo-output-func=", "--lite-pgo-white-list=", + "--instrumentation-dir="}; + for (auto &inputFile : mplOptions.GetInputInfos()) { + driverOptAndInputFile.push_back(inputFile->GetInputFile()); + } + driverOptAndInputFile.push_back(opts::output.GetValue()); + if (opt == "-o" || opt == "-tmp-folder" || opt == "-specs" || opt == "--infile" || opt == "--lite-pgo-file") { + isNeedNext = false; + } + return std::find(driverOptAndInputFile.begin(), driverOptAndInputFile.end(), opt) != driverOptAndInputFile.end(); +} + +ErrorCode ParseSpec::GetOptFromSpecsByGcc(int argc, char **argv, const MplOptions &mplOptions) { + if (!opts::specs.IsEnabledByUser()) { + return kErrorNoError; + } + std::string fileName = FileUtils::GetInstance().GetTmpFolder() + "maple.c"; + if (!FileUtils::CreateFile(fileName)) { + return kErrorCreateFile; + } + std::string gccBin = FileUtils::GetGccBin(); + std::string arg = "-v -S " + fileName + " -o " + FileUtils::GetInstance().GetTmpFolder() + "maple.s "; + std::vector defaultOptVec = GetOpt(gccBin, arg); + if (argc > 0) { + --argc; + ++argv; // skip program name argv[0] if present + } + while (argc > 0 && *argv != nullptr) { + std::string tmpOpt = *argv; + std::string opt = tmpOpt.find("=") != std::string::npos ? StringUtils::GetStrBeforeFirst(tmpOpt, "=") + "=" : + tmpOpt; + bool isNeedNext = true; + if (!IsMapleOptionOrInputFile(opt, mplOptions, isNeedNext)) { + std::string optString = *argv; + arg += optString; + arg += " "; + } + if (!isNeedNext) { + ++argv; + --argc; + } + ++argv; + --argc; + } + arg = arg + "-specs=" + opts::specs.GetValue(); + std::vector cmdOptVec = GetOpt(gccBin, arg); + if (cmdOptVec.size() == 0) { + return kErrorInvalidParameter; + } + std::deque args; + for (size_t index = 0; index < cmdOptVec.size(); index++) { + if (std::find(defaultOptVec.begin(), defaultOptVec.end(), cmdOptVec[index]) == defaultOptVec.end()) { + // The -g option indicates that the GCC detects that the --debug option is transferred to CC1 by default. + // Currently, Maple does not set this option. + if (cmdOptVec[index] == "-g" && !opts::withDwarf.IsEnabledByUser()) { + continue; + } else { + std::string_view tmp(cmdOptVec[index]); + (void)args.emplace_back(tmp); + } + } + } + clangCategory.ClearJoinedOpt(); + (void)maplecl::CommandLine::GetCommandLine().HandleInputArgs(args, driverCategory); + return kErrorNoError; +} + +} diff --git a/src/mapleall/maple_driver/src/triple.cpp b/src/mapleall/maple_driver/src/triple.cpp index cb4d91de22..d7ead6c8e8 100644 --- a/src/mapleall/maple_driver/src/triple.cpp +++ b/src/mapleall/maple_driver/src/triple.cpp @@ -1164,11 +1164,11 @@ maplecl::Option oMfixAt697f({"-mfix-at697f"}, maplecl::Option oMfixCortexA53835769({"-mfix-cortex-a53-835769"}, " -mfix-cortex-a53-835769 \tWorkaround for ARM Cortex-A53 Erratum number 835769.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-fix-cortex-a53-835769"), maplecl::kHide); + {driverCategory, ldCategory}, maplecl::DisableWith("-mno-fix-cortex-a53-835769")); maplecl::Option oMfixCortexA53843419({"-mfix-cortex-a53-843419"}, " -mfix-cortex-a53-843419 \tWorkaround for ARM Cortex-A53 Erratum number 843419.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-fix-cortex-a53-843419"), maplecl::kHide); + {driverCategory, ldCategory}, maplecl::DisableWith("-mno-fix-cortex-a53-843419")); maplecl::Option oMfixCortexM3Ldrd({"-mfix-cortex-m3-ldrd"}, " -mfix-cortex-m3-ldrd \tSome Cortex-M3 cores can cause data corruption when ldrd instructions with " @@ -1955,7 +1955,7 @@ maplecl::Option oMlow64k({"-mlow-64k"}, maplecl::Option oMlowPrecisionRecipSqrt({"-mlow-precision-recip-sqrt"}, " -mlow-precision-recip-sqrt \tEnable the reciprocal square root approximation. Enabling this reduces precision" " of reciprocal square root results to about 16 bits for single precision and to 32 bits for double precision.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-low-precision-recip-sqrt"), maplecl::kHide); + {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-low-precision-recip-sqrt"), maplecl::kHide); maplecl::Option oMlp64({"-mlp64"}, " -mlp64 \t\n", @@ -2502,7 +2502,7 @@ maplecl::Option oMpairedSingle({"-mpaired-single"}, maplecl::Option oMpcRelativeLiteralLoads({"-mpc-relative-literal-loads"}, " -mpc-relative-literal-loads \tPC relative literal loads.\n", - {driverCategory, unSupCategory}, maplecl::kHide); + {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-pc-relative-literal-loads"), maplecl::kHide); maplecl::Option oMpc32({"-mpc32"}, " -mpc32 \t\n", @@ -3313,7 +3313,7 @@ maplecl::Option oMstdmain({"-mstdmain"}, maplecl::Option oMstrictAlign({"-mstrict-align"}, " -mstrict-align \tDon't assume that unaligned accesses are handled by the system.\n", - {driverCategory, unSupCategory}, maplecl::DisableWith("--mno-strict-align"), maplecl::kHide); + {driverCategory, unSupCategory}, maplecl::DisableWith("-mno-strict-align"), maplecl::kHide); maplecl::Option oMstrictX({"-mstrict-X"}, " -mstrict-X \t\n", @@ -3809,8 +3809,8 @@ maplecl::Option oWframeAddress({"-Wframe-address"}, " -Wframe-address \tWarn when __builtin_frame_address or __builtin_return_address is used unsafely.\n", {driverCategory, clangCategory}, maplecl::DisableWith("-Wno-frame-address")); -maplecl::Option oWframeLargerThan({"-Wframe-larger-than"}, - " -Wframe-larger-than \t\n", +maplecl::Option oWframeLargerThan({"-Wframe-larger-than="}, + " -Wframe-larger-than= \tWarn if a function's stack frame requires in excess of .\n", {driverCategory, clangCategory}); maplecl::Option oWfreeNonheapObject({"-Wfree-nonheap-object"}, diff --git a/src/mapleall/maple_ipa/include/builtins.def b/src/mapleall/maple_ipa/include/builtins.def new file mode 100644 index 0000000000..0cbc857488 --- /dev/null +++ b/src/mapleall/maple_ipa/include/builtins.def @@ -0,0 +1,114 @@ +{"acosf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"acosl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"asinf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"asinl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"atan2f", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"atan2l", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"atanf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"atanl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"ceilf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"ceill", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"cosf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"coshf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"coshl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"cosl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"expf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"expl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"fabsf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"fabsl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"floorf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"floorl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"fmodf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"fmodl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"frexpf", {FI::kUnknown, RI::kAliasParam1, {PI::kReadSelfOnly, PI::kWriteMemoryOnly}}}, +{"frexpl", {FI::kUnknown, RI::kAliasParam1, {PI::kReadSelfOnly, PI::kWriteMemoryOnly}}}, +{"ldexpf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"ldexpl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"log10f", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"log10l", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"logf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"logl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"modfl", {FI::kUnknown, RI::kAliasParam1, {PI::kReadSelfOnly, PI::kWriteMemoryOnly}}}, +{"modff", {FI::kUnknown, RI::kAliasParam1, {PI::kReadSelfOnly, PI::kWriteMemoryOnly}}}, +{"powf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"powl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"sinf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"sinhf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"sinhl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"sinl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"sqrtf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"sqrtl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"tanf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"tanhf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"tanhl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"tanl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"abort", {FI::kConst, RI::kNoAlias, {}}}, +{"abs", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"acos", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"asin", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"atan2", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"atan", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"calloc", {FI::kUnknown, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"ceil", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"cosh", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"cos", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"exit", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"exp", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"fabs", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"floor", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"fmod", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"fprintf", {FI::kUnknown, RI::kNoAlias, {PI::kWriteMemoryOnly, PI::kReadMemoryOnly, PI::kReadWriteMemory, PI::kReadWriteMemory, PI::kReadWriteMemory, PI::kReadWriteMemory}}}, +{"fputs", {FI::kUnknown, RI::kAliasParam1, {PI::kReadMemoryOnly, PI::kWriteMemoryOnly}}}, +{"free", {FI::kUnknown, RI::kNoAlias, {PI::kWriteMemoryOnly}}}, +{"frexp", {FI::kUnknown, RI::kAliasParam1, {PI::kReadSelfOnly, PI::kWriteMemoryOnly}}}, +{"fscanf", {FI::kUnknown, RI::kNoAlias, {PI::kReadMemoryOnly, PI::kReadMemoryOnly, PI::kWriteMemoryOnly, PI::kWriteMemoryOnly, PI::kWriteMemoryOnly, PI::kWriteMemoryOnly}}}, +{"isalnum", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"isalpha", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"iscntrl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"isdigit", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"isgraph", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"islower", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"isprint", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"ispunct", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"isspace", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"isupper", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"isxdigit", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"tolower", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"toupper", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"labs", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"ldexp", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"log10", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"log", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"malloc", {FI::kUnknown, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"memchr", {FI::kPure, RI::kNoAlias, {PI::kReadMemoryOnly, PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"memcmp", {FI::kPure, RI::kNoAlias, {PI::kReadMemoryOnly, PI::kReadMemoryOnly, PI::kReadSelfOnly}}}, +{"memcpy", {FI::kUnknown, RI::kAliasParam0, {PI::kWriteMemoryOnly, PI::kReadMemoryOnly, PI::kReadSelfOnly}}}, +{"memset", {FI::kUnknown, RI::kAliasParam0, {PI::kWriteMemoryOnly, PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"modf", {FI::kUnknown, RI::kAliasParam1, {PI::kReadSelfOnly, PI::kWriteMemoryOnly}}}, +{"pow", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"printf", {FI::kPure, RI::kNoAlias, {PI::kReadMemoryOnly, PI::kReadWriteMemory, PI::kReadWriteMemory, PI::kReadWriteMemory, PI::kReadWriteMemory, PI::kReadWriteMemory}}}, +{"putchar", {FI::kUnknown, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"puts", {FI::kUnknown, RI::kNoAlias, {PI::kReadMemoryOnly}}}, +{"realloc", {FI::kUnknown, RI::kNoAlias, {PI::kReadMemoryOnly, PI::kReadSelfOnly}}}, +{"scanf", {FI::kUnknown, RI::kNoAlias, {PI::kReadMemoryOnly, PI::kWriteMemoryOnly, PI::kWriteMemoryOnly, PI::kWriteMemoryOnly, PI::kWriteMemoryOnly, PI::kWriteMemoryOnly}}}, +{"sinh", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"sin", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"snprintf", {FI::kUnknown, RI::kNoAlias, {PI::kWriteMemoryOnly, PI::kReadMemoryOnly, PI::kReadMemoryOnly, PI::kReadWriteMemory, PI::kReadWriteMemory, PI::kReadWriteMemory}}}, +{"sprintf", {FI::kUnknown, RI::kNoAlias, {PI::kWriteMemoryOnly, PI::kReadMemoryOnly, PI::kReadWriteMemory, PI::kReadWriteMemory, PI::kReadWriteMemory, PI::kReadWriteMemory}}}, +{"sqrt", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"sscanf", {FI::kUnknown, RI::kNoAlias, {PI::kReadMemoryOnly, PI::kReadMemoryOnly, PI::kWriteMemoryOnly, PI::kWriteMemoryOnly, PI::kWriteMemoryOnly, PI::kWriteMemoryOnly}}}, +{"strcat", {FI::kUnknown, RI::kAliasParam0, {PI::kWriteMemoryOnly, PI::kReadMemoryOnly}}}, +{"strchr", {FI::kPure, RI::kAliasParam0, {PI::kReadMemoryOnly, PI::kReadSelfOnly}}}, +{"strcmp", {FI::kPure, RI::kNoAlias, {PI::kReadMemoryOnly, PI::kReadMemoryOnly}}}, +{"strcpy", {FI::kUnknown, RI::kAliasParam0, {PI::kWriteMemoryOnly, PI::kReadMemoryOnly}}}, +{"strcspn", {FI::kPure, RI::kNoAlias, {PI::kReadMemoryOnly, PI::kReadMemoryOnly}}}, +{"strlen", {FI::kPure, RI::kNoAlias, {PI::kReadMemoryOnly}}}, +{"strncat", {FI::kUnknown, RI::kAliasParam0, {PI::kWriteMemoryOnly, PI::kReadMemoryOnly, PI::kReadSelfOnly}}}, +{"strncmp", {FI::kPure, RI::kNoAlias, {PI::kReadMemoryOnly, PI::kReadMemoryOnly, PI::kReadSelfOnly}}}, +{"strncpy", {FI::kUnknown, RI::kAliasParam0, {PI::kWriteMemoryOnly, PI::kReadMemoryOnly, PI::kReadSelfOnly}}}, +{"strpbrk", {FI::kPure, RI::kNoAlias, {PI::kReadMemoryOnly, PI::kReadMemoryOnly}}}, +{"strrchr", {FI::kPure, RI::kAliasParam0, {PI::kReadMemoryOnly, PI::kReadSelfOnly}}}, +{"strspn", {FI::kPure, RI::kNoAlias, {PI::kReadMemoryOnly, PI::kReadMemoryOnly}}}, +{"strstr", {FI::kPure, RI::kNoAlias, {PI::kReadMemoryOnly, PI::kReadMemoryOnly}}}, +{"tanh", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"tan", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, diff --git a/src/mapleall/maple_ipa/include/builtins_outside_C90.def b/src/mapleall/maple_ipa/include/builtins_outside_C90.def new file mode 100644 index 0000000000..9e8f6da297 --- /dev/null +++ b/src/mapleall/maple_ipa/include/builtins_outside_C90.def @@ -0,0 +1,304 @@ +{"_Exit", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"acoshf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"acoshl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"acosh", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"asinhf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"asinhl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"asinh", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"atanhf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"atanhl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"atanh", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"cabsf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"cabsl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"cabs", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"cacosf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"cacoshf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"cacoshl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"cacosh", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"cacosl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"cacos", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"cargf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"cargl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"carg", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"casinf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"casinhf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"casinhl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"casinh", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"casinl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"casin", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"catanf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"catanhf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"catanhl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"catanh", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"catanl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"catan", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"cbrtf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"cbrtl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"cbrt", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"ccosf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"ccoshf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"ccoshl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"ccosh", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"ccosl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"ccos", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"cexpf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"cexpl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"cexp", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"cimagf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"cimagl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"cimag", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"clogf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"clogl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"clog", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"conjf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"conjl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"conj", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"copysignf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"copysignl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"copysign", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"cpowf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"cpowl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"cpow", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"cprojf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"cprojl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"cproj", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"crealf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"crealf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"creall", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"creall", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"creal", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"creal", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"csinf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"csinhf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"csinhl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"csinh", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"csinl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"csin", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"csqrtf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"csqrtl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"csqrt", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"ctanf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"ctanhf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"ctanhl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"ctanh", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"ctanl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"ctan", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"erfcf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"erfcl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"erfc", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"erff", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"erfl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"erf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"exp2f", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"exp2l", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"exp2", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"expm1f", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"expm1l", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"expm1", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"fdimf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"fdiml", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"fdim", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"fmaf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"fmal", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"fmaxf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"fmaxl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"fmax", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"fma", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"fminf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"fminl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"fmin", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"hypotf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"hypotl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"hypot", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"ilogbf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"ilogbl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"ilogb", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"imaxabs", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"isblank", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"iswblank", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"lgammaf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"lgammal", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"lgamma", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"llabs", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"llrintf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"llrintl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"llrint", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"llroundf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"llroundl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"llround", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"log1pf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"log1pl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"log1p", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"log2f", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"log2l", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"log2", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"logbf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"logbl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"logb", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"lrintf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"lrintl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"lrint", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"lroundf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"lroundl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"lround", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"nearbyintf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"nearbyintl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"nearbyint", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"nextafterf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"nextafterl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"nextafter", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"nexttowardf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"nexttowardl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"nexttoward", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"remainderf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"remainderl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"remainder", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"remquof", {FI::kUnknown, RI::kAliasParam2, {PI::kReadSelfOnly, PI::kReadSelfOnly, PI::kWriteMemoryOnly}}}, +{"remquol", {FI::kUnknown, RI::kAliasParam2, {PI::kReadSelfOnly, PI::kReadSelfOnly, PI::kWriteMemoryOnly}}}, +{"remquo", {FI::kUnknown, RI::kAliasParam2, {PI::kReadSelfOnly, PI::kReadSelfOnly, PI::kWriteMemoryOnly}}}, +{"rintf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"rintl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"rint", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"roundf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"roundl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"round", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"scalblnf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"scalblnl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"scalbln", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"scalbnf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"scalbnl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"scalbn", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"snprintf", {FI::kUnknown, RI::kNoAlias, {PI::kWriteMemoryOnly, PI::kReadMemoryOnly, PI::kReadMemoryOnly, PI::kReadWriteMemory, PI::kReadWriteMemory, PI::kReadWriteMemory}}}, +{"tgammaf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"tgammal", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"tgamma", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"truncf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"truncl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"trunc", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"iswalnum", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"iswalpha", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"iswcntrl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"iswdigit", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"iswgraph", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"iswlower", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"iswprint", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"iswpunct", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"iswspace", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"iswupper", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"iswxdigit", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"towlower", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"towupper", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"acosf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"acosl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"asinf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"asinl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"atan2f", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"atan2l", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"atanf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"atanl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"ceilf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"ceill", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"cosf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"coshf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"coshl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"cosl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"expf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"expl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"fabsf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"fabsl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"floorf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"floorl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"fmodf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"fmodl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"frexpf", {FI::kUnknown, RI::kAliasParam1, {PI::kReadSelfOnly, PI::kWriteMemoryOnly}}}, +{"frexpl", {FI::kUnknown, RI::kAliasParam1, {PI::kReadSelfOnly, PI::kWriteMemoryOnly}}}, +{"ldexpf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"ldexpl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"log10f", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"log10l", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"logf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"logl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"modfl", {FI::kUnknown, RI::kAliasParam1, {PI::kReadSelfOnly, PI::kWriteMemoryOnly}}}, +{"modff", {FI::kUnknown, RI::kAliasParam1, {PI::kReadSelfOnly, PI::kWriteMemoryOnly}}}, +{"powf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"powl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"sinf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"sinhf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"sinhl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"sinl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"sqrtf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"sqrtl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"tanf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"tanhf", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"tanhl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"tanl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"abort", {FI::kConst, RI::kNoAlias, {}}}, +{"abs", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"acos", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"asin", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"atan2", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"atan", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"calloc", {FI::kUnknown, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"ceil", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"cosh", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"cos", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"exit", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"exp", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"fabs", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"floor", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"fmod", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"fprintf", {FI::kUnknown, RI::kNoAlias, {PI::kWriteMemoryOnly, PI::kReadMemoryOnly, PI::kReadWriteMemory, PI::kReadWriteMemory, PI::kReadWriteMemory, PI::kReadWriteMemory}}}, +{"fputs", {FI::kUnknown, RI::kAliasParam1, {PI::kReadMemoryOnly, PI::kWriteMemoryOnly}}}, +{"free", {FI::kUnknown, RI::kNoAlias, {PI::kWriteMemoryOnly}}}, +{"frexp", {FI::kUnknown, RI::kAliasParam1, {PI::kReadSelfOnly, PI::kWriteMemoryOnly}}}, +{"fscanf", {FI::kUnknown, RI::kNoAlias, {PI::kReadMemoryOnly, PI::kReadMemoryOnly, PI::kWriteMemoryOnly, PI::kWriteMemoryOnly, PI::kWriteMemoryOnly, PI::kWriteMemoryOnly}}}, +{"isalnum", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"isalpha", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"iscntrl", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"isdigit", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"isgraph", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"islower", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"isprint", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"ispunct", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"isspace", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"isupper", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"isxdigit", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"tolower", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"toupper", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"labs", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"ldexp", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"log10", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"log", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"malloc", {FI::kUnknown, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"memchr", {FI::kPure, RI::kNoAlias, {PI::kReadMemoryOnly, PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"memcmp", {FI::kPure, RI::kNoAlias, {PI::kReadMemoryOnly, PI::kReadMemoryOnly, PI::kReadSelfOnly}}}, +{"memcpy", {FI::kUnknown, RI::kAliasParam0, {PI::kWriteMemoryOnly, PI::kReadMemoryOnly, PI::kReadSelfOnly}}}, +{"memset", {FI::kUnknown, RI::kAliasParam0, {PI::kWriteMemoryOnly, PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"modf", {FI::kUnknown, RI::kAliasParam1, {PI::kReadSelfOnly, PI::kWriteMemoryOnly}}}, +{"pow", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly, PI::kReadSelfOnly}}}, +{"printf", {FI::kPure, RI::kNoAlias, {PI::kReadMemoryOnly, PI::kReadWriteMemory, PI::kReadWriteMemory, PI::kReadWriteMemory, PI::kReadWriteMemory, PI::kReadWriteMemory}}}, +{"putchar", {FI::kUnknown, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"puts", {FI::kUnknown, RI::kNoAlias, {PI::kReadMemoryOnly}}}, +{"realloc", {FI::kUnknown, RI::kNoAlias, {PI::kReadMemoryOnly, PI::kReadSelfOnly}}}, +{"scanf", {FI::kUnknown, RI::kNoAlias, {PI::kReadMemoryOnly, PI::kWriteMemoryOnly, PI::kWriteMemoryOnly, PI::kWriteMemoryOnly, PI::kWriteMemoryOnly, PI::kWriteMemoryOnly}}}, +{"sinh", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"sin", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"snprintf", {FI::kUnknown, RI::kNoAlias, {PI::kWriteMemoryOnly, PI::kReadMemoryOnly, PI::kReadMemoryOnly, PI::kReadWriteMemory, PI::kReadWriteMemory, PI::kReadWriteMemory}}}, +{"sprintf", {FI::kUnknown, RI::kNoAlias, {PI::kWriteMemoryOnly, PI::kReadMemoryOnly, PI::kReadWriteMemory, PI::kReadWriteMemory, PI::kReadWriteMemory, PI::kReadWriteMemory}}}, +{"sqrt", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"sscanf", {FI::kUnknown, RI::kNoAlias, {PI::kReadMemoryOnly, PI::kReadMemoryOnly, PI::kWriteMemoryOnly, PI::kWriteMemoryOnly, PI::kWriteMemoryOnly, PI::kWriteMemoryOnly}}}, +{"strcat", {FI::kUnknown, RI::kAliasParam0, {PI::kWriteMemoryOnly, PI::kReadMemoryOnly}}}, +{"strchr", {FI::kPure, RI::kAliasParam0, {PI::kReadMemoryOnly, PI::kReadSelfOnly}}}, +{"strcmp", {FI::kPure, RI::kNoAlias, {PI::kReadMemoryOnly, PI::kReadMemoryOnly}}}, +{"strcpy", {FI::kUnknown, RI::kAliasParam0, {PI::kWriteMemoryOnly, PI::kReadMemoryOnly}}}, +{"strcspn", {FI::kPure, RI::kNoAlias, {PI::kReadMemoryOnly, PI::kReadMemoryOnly}}}, +{"strlen", {FI::kPure, RI::kNoAlias, {PI::kReadMemoryOnly}}}, +{"strncat", {FI::kUnknown, RI::kAliasParam0, {PI::kWriteMemoryOnly, PI::kReadMemoryOnly, PI::kReadSelfOnly}}}, +{"strncmp", {FI::kPure, RI::kNoAlias, {PI::kReadMemoryOnly, PI::kReadMemoryOnly, PI::kReadSelfOnly}}}, +{"strncpy", {FI::kUnknown, RI::kAliasParam0, {PI::kWriteMemoryOnly, PI::kReadMemoryOnly, PI::kReadSelfOnly}}}, +{"strpbrk", {FI::kPure, RI::kNoAlias, {PI::kReadMemoryOnly, PI::kReadMemoryOnly}}}, +{"strrchr", {FI::kPure, RI::kAliasParam0, {PI::kReadMemoryOnly, PI::kReadSelfOnly}}}, +{"strspn", {FI::kPure, RI::kNoAlias, {PI::kReadMemoryOnly, PI::kReadMemoryOnly}}}, +{"strstr", {FI::kPure, RI::kNoAlias, {PI::kReadMemoryOnly, PI::kReadMemoryOnly}}}, +{"tanh", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, +{"tan", {FI::kConst, RI::kNoAlias, {PI::kReadSelfOnly}}}, diff --git a/src/mapleall/maple_ipa/include/ipa_clone.h b/src/mapleall/maple_ipa/include/ipa_clone.h index f5d43e6fb1..fdd6701194 100644 --- a/src/mapleall/maple_ipa/include/ipa_clone.h +++ b/src/mapleall/maple_ipa/include/ipa_clone.h @@ -42,7 +42,6 @@ class IpaClone : public AnalysisResult { bool IsBrCondOrIf(Opcode op) const; void DoIpaClone(); void InitParams(); - void CopyFuncInfo(MIRFunction &originalFunction, MIRFunction &newFunc) const; void IpaCloneArgument(MIRFunction &originalFunction, ArgVector &argument) const; void RemoveUnneedParameter(MIRFunction *newFunc, uint32 paramIndex, int64_t value) const; void DecideCloneFunction(std::vector &result, uint32 paramIndex, std::map integerString; MapleVector stmtInfoVector; StmtIndex currNewStmtIndex = 0; - StmtIndex prevInteger = kInvalidIndex; + StmtIndex prevInteger = utils::kInvalidIndex; size_t continuousSequenceCount = 0; }; MAPLE_SCC_PHASE_DECLARE_BEGIN(SCCCollectIpaInfo, maple::SCCNode) diff --git a/src/mapleall/maple_ipa/include/ipa_phase_manager.h b/src/mapleall/maple_ipa/include/ipa_phase_manager.h index 25fd4ba8a5..9044da8bc9 100644 --- a/src/mapleall/maple_ipa/include/ipa_phase_manager.h +++ b/src/mapleall/maple_ipa/include/ipa_phase_manager.h @@ -33,6 +33,7 @@ class IpaSccPM : public SccPM { ~IpaSccPM() override { ipaInfo = nullptr; } + static bool timePhases; std::string PhaseName() const override; CollectIpaInfo *GetResult() { return ipaInfo; @@ -50,7 +51,7 @@ class SCCPrepare : public MapleSccPhase>, public MaplePhaseManag std::string PhaseName() const override; PHASECONSTRUCTOR(SCCPrepare); bool PhaseRun(SCCNode &scc) override; - void Dump(const MeFunction &f, const std::string phaseName) const; + void DumpSCCPrepare(const MeFunction &f, const std::string phaseName) const; AnalysisDataManager *GetResult() { return result; } @@ -65,7 +66,7 @@ class SCCEmit : public MapleSccPhase>, public MaplePhaseManager std::string PhaseName() const override; PHASECONSTRUCTOR(SCCEmit); bool PhaseRun(SCCNode &scc) override; - void Dump(MeFunction &f, const std::string phaseName) const; + void DumpSCCEmit(MeFunction &f, const std::string phaseName) const; private: void GetAnalysisDependence(maple::AnalysisDep &aDep) const override; }; diff --git a/src/mapleall/maple_ipa/include/ipa_side_effect.h b/src/mapleall/maple_ipa/include/ipa_side_effect.h index 42a53a5e9a..a58c4a4659 100644 --- a/src/mapleall/maple_ipa/include/ipa_side_effect.h +++ b/src/mapleall/maple_ipa/include/ipa_side_effect.h @@ -14,34 +14,34 @@ */ #ifndef MAPLE_IPA_INCLUDE_IPASIDEEFFECT_H #define MAPLE_IPA_INCLUDE_IPASIDEEFFECT_H +#include "me_ir.h" #include "me_phase_manager.h" #include "ipa_phase_manager.h" namespace maple { -class SideEffect { +class IpaSideEffectAnalyzer { public: - SideEffect(MeFunction *meFunc, Dominance *dom, AliasClass *alias, CallGraph *cg) + IpaSideEffectAnalyzer(MeFunction &meFunc, Dominance *dom, AliasClass *alias, CallGraph *cg) : meFunc(meFunc), dom(dom), alias(alias), callGraph(cg) { defGlobal = false; defArg = false; useGlobal = false; - vstsValueAliasWithFormal.resize(std::min(meFunc->GetMirFunc()->GetFormalCount(), kMaxParamCount)); + vstsValueAliasWithFormal.resize(std::min(meFunc.GetMirFunc()->GetFormalCount(), kMaxParamCount)); } - ~SideEffect() { + ~IpaSideEffectAnalyzer() { callGraph = nullptr; alias = nullptr; dom = nullptr; - meFunc = nullptr; curFuncDesc = nullptr; } bool Perform(MeFunction &f); static const FuncDesc &GetFuncDesc(MeFunction &f); static const FuncDesc &GetFuncDesc(MIRFunction &f); - static const std::map &GetWhiteList(); + static const std::map *GetWhiteList(); private: void DealWithOperand(MeExpr *expr); - void DealWithOst(OStIdx ostIdx); + void DealWithOst(const OStIdx &ostIdx); void DealWithStmt(MeStmt &stmt); void DealWithMayUse(MeStmt &stmt); void DealWithMayDef(MeStmt &stmt); @@ -51,6 +51,7 @@ class SideEffect { void ParamInfoUpdater(size_t vstIdx, const PI &calleeParamInfo); void DealWithOst(const OriginalSt *ost); void DealWithReturn(const RetMeStmt &retMeStmt) const; + void DealWithIcall(MeStmt &stmt); void AnalysisFormalOst(); void SolveVarArgs(MeFunction &f) const; void CollectFormalOst(MeFunction &f); @@ -59,7 +60,7 @@ class SideEffect { std::set> analysisLater; std::vector> vstsValueAliasWithFormal; - MeFunction *meFunc = nullptr; + MeFunction &meFunc; FuncDesc *curFuncDesc = nullptr; Dominance *dom = nullptr; AliasClass *alias = nullptr; diff --git a/src/mapleall/maple_ipa/include/old/ipa_escape_analysis.h b/src/mapleall/maple_ipa/include/old/ipa_escape_analysis.h index 7be69adc17..5cbfbe08ac 100644 --- a/src/mapleall/maple_ipa/include/old/ipa_escape_analysis.h +++ b/src/mapleall/maple_ipa/include/old/ipa_escape_analysis.h @@ -52,6 +52,7 @@ class IPAEscapeAnalysis { private: TyIdx GetAggElemType(const MIRType &aggregate) const; bool IsSpecialEscapedObj(const MeExpr &alloc) const; + EACGRefNode *GetOrCreateCGRefNode(MeExpr *expr, bool createObjNode); EACGRefNode *GetOrCreateCGRefNodeForVar(VarMeExpr &var, bool createObjNode = false); EACGRefNode *GetOrCreateCGRefNodeForAddrof(AddrofMeExpr &var, bool createObjNode = false); EACGRefNode *GetOrCreateCGRefNodeForReg(RegMeExpr ®, bool createObjNode = false); diff --git a/src/mapleall/maple_ipa/include/region_identify.h b/src/mapleall/maple_ipa/include/region_identify.h index aa6c94efb5..145f1b8deb 100644 --- a/src/mapleall/maple_ipa/include/region_identify.h +++ b/src/mapleall/maple_ipa/include/region_identify.h @@ -181,7 +181,7 @@ class RegionCandidate { StmtInfo* end; MIRFunction *function; size_t length; - GroupId groupId = kInvalidIndex; + GroupId groupId = utils::kInvalidIndex; std::set regionOutputs; std::set regionInputs; std::unordered_set stmtJumpToEnd; diff --git a/src/mapleall/maple_ipa/src/ipa_clone.cpp b/src/mapleall/maple_ipa/src/ipa_clone.cpp index c3c9f5998d..be1ba1be17 100644 --- a/src/mapleall/maple_ipa/src/ipa_clone.cpp +++ b/src/mapleall/maple_ipa/src/ipa_clone.cpp @@ -102,7 +102,7 @@ MIRFunction *IpaClone::IpaCloneFunction(MIRFunction &originalFunction, const std newFunc->GetFuncSymbol()->SetAppearsInCode(true); newFunc->SetPuidxOrigin(newFunc->GetPuidx()); if (originalFunction.GetBody() != nullptr) { - CopyFuncInfo(originalFunction, *newFunc); + maple::CopyFuncInfo(originalFunction, *newFunc, mirBuilder); newFunc->SetBody( originalFunction.GetBody()->CloneTree(newFunc->GetCodeMempoolAllocator())); IpaCloneSymbols(*newFunc, originalFunction); @@ -142,7 +142,7 @@ MIRFunction *IpaClone::IpaCloneFunctionWithFreq(MIRFunction &originalFunction, // update real left frequency origProfData->SetFuncRealFrequency(origProfData->GetFuncRealFrequency() - callSiteFreq); if (originalFunction.GetBody() != nullptr) { - CopyFuncInfo(originalFunction, *newFunc); + maple::CopyFuncInfo(originalFunction, *newFunc, mirBuilder); BlockNode *newbody = originalFunction.GetBody()->CloneTreeWithFreqs(newFunc->GetCodeMempoolAllocator(), newProfData->GetStmtFreqs(), origProfData->GetStmtFreqs(), callSiteFreq, /* numer */ @@ -166,30 +166,6 @@ void IpaClone::IpaCloneArgument(MIRFunction &originalFunction, ArgVector &argume } } -void IpaClone::CopyFuncInfo(MIRFunction &originalFunction, MIRFunction &newFunc) const { - const auto &funcNameIdx = newFunc.GetBaseFuncNameStrIdx(); - const auto &fullNameIdx = newFunc.GetNameStrIdx(); - const auto &classNameIdx = newFunc.GetBaseClassNameStrIdx(); - const static auto &metaFullNameIdx = mirBuilder.GetOrCreateStringIndex(kFullNameStr); - const static auto &metaClassNameIdx = mirBuilder.GetOrCreateStringIndex(kClassNameStr); - const static auto &metaFuncNameIdx = mirBuilder.GetOrCreateStringIndex(kFuncNameStr); - MIRInfoVector &fnInfo = originalFunction.GetInfoVector(); - const MapleVector &infoIsString = originalFunction.InfoIsString(); - size_t size = fnInfo.size(); - for (size_t i = 0; i < size; ++i) { - if (fnInfo[i].first == metaFullNameIdx) { - newFunc.PushbackMIRInfo(std::pair(fnInfo[i].first, fullNameIdx)); - } else if (fnInfo[i].first == metaFuncNameIdx) { - newFunc.PushbackMIRInfo(std::pair(fnInfo[i].first, funcNameIdx)); - } else if (fnInfo[i].first == metaClassNameIdx) { - newFunc.PushbackMIRInfo(std::pair(fnInfo[i].first, classNameIdx)); - } else { - newFunc.PushbackMIRInfo(std::pair(fnInfo[i].first, fnInfo[i].second)); - } - newFunc.PushbackIsString(infoIsString[i]); - } -} - bool IpaClone::CheckCostModel(uint32 paramIndex, std::vector &calleeValue, std::vector &result) const { uint32 impSize = 0; diff --git a/src/mapleall/maple_ipa/src/ipa_collect.cpp b/src/mapleall/maple_ipa/src/ipa_collect.cpp index 0cf2299d49..011846ede5 100644 --- a/src/mapleall/maple_ipa/src/ipa_collect.cpp +++ b/src/mapleall/maple_ipa/src/ipa_collect.cpp @@ -239,7 +239,7 @@ void CollectIpaInfo::CollectDefUsePosition(ScalarMeExpr &scalar, StmtInfoId posi switch (scalar.GetDefBy()) { case kDefByNo: { if (ost->IsFormal()) { - defUsePosition.definePositions.push_back(kInvalidIndex); + defUsePosition.definePositions.push_back(utils::kInvalidIndex); } break; } @@ -253,7 +253,7 @@ void CollectIpaInfo::CollectDefUsePosition(ScalarMeExpr &scalar, StmtInfoId posi CHECK_FATAL(scalar.GetDefByMeStmt() != nullptr, "nullptr check"); auto defStmtInfoId = scalar.GetDefByMeStmt()->GetStmtInfoId(); defUsePosition.definePositions.push_back(defStmtInfoId); - if (scalar.GetDefBy() != kDefByChi && defStmtInfoId != kInvalidIndex) { + if (scalar.GetDefBy() != kDefByChi && defStmtInfoId != utils::kInvalidIndex) { auto &defUsePositionOfDefStmt = stmtInfoVector[defStmtInfoId].GetDefUsePositions(*ost); defUsePositionOfDefStmt.usePositions.push_back(position); break; diff --git a/src/mapleall/maple_ipa/src/ipa_phase_manager.cpp b/src/mapleall/maple_ipa/src/ipa_phase_manager.cpp index e363a99074..832c8c25ed 100644 --- a/src/mapleall/maple_ipa/src/ipa_phase_manager.cpp +++ b/src/mapleall/maple_ipa/src/ipa_phase_manager.cpp @@ -24,9 +24,13 @@ #define CLANG (mirModule.IsCModule()) namespace maple { +bool IpaSccPM::timePhases = false; void IpaSccPM::Init(MIRModule &m) { SetQuiet(true); m.SetInIPA(true); + if (IpaSccPM::timePhases) { + InitTimeHandler(); + } MeOption::mergeStmts = false; MeOption::propDuringBuild = false; MeOption::layoutWithPredict = false; @@ -92,6 +96,10 @@ bool IpaSccPM::PhaseRun(MIRModule &m) { ipaInfo->Dump(); } m.SetInIPA(false); + if (IpaSccPM::timePhases) { + LogInfo::MapleLogger() << "================== IpaSccPM =================="; + DumpPhaseTime(); + } return changed; } @@ -122,7 +130,7 @@ void IpaSccPM::GetAnalysisDependence(maple::AnalysisDep &aDep) const { } } -void SCCPrepare::Dump(const MeFunction &f, const std::string phaseName) const { +void SCCPrepare::DumpSCCPrepare(const MeFunction &f, const std::string phaseName) const { if (Options::dumpIPA && (Options::dumpFunc == f.GetName() || Options::dumpFunc == "*")) { LogInfo::MapleLogger() << ">>>>> Dump after " << phaseName << " <<<<<\n"; f.Dump(false); @@ -131,6 +139,9 @@ void SCCPrepare::Dump(const MeFunction &f, const std::string phaseName) const { } bool SCCPrepare::PhaseRun(SCCNode &scc) { + if (IpaSccPM::timePhases && Options::dumpIPA) { + InitTimeHandler(); + } SetQuiet(true); AddPhase("mecfgbuild", true); if (Options::profileUse) { @@ -168,13 +179,18 @@ bool SCCPrepare::PhaseRun(SCCNode &scc) { } else { (void)RunTransformPhase(*phase, *result, meFunc, 1); } - Dump(meFunc, phase->PhaseName()); + DumpSCCPrepare(meFunc, phase->PhaseName()); } } + if (IpaSccPM::timePhases && Options::dumpIPA) { + LogInfo::MapleLogger() << "================== SccPrepare =================="; + scc.Dump(); + DumpPhaseTime(); + } return false; } -void SCCEmit::Dump(MeFunction &f, const std::string phaseName) const { +void SCCEmit::DumpSCCEmit(MeFunction &f, const std::string phaseName) const { if (Options::dumpIPA && (f.GetName() == Options::dumpFunc || Options::dumpFunc == "*")) { LogInfo::MapleLogger() << ">>>>> Dump after " << phaseName << " <<<<<\n"; f.GetMirFunc()->Dump(); @@ -204,7 +220,7 @@ bool SCCEmit::PhaseRun(SCCNode &scc) { << " Phase [ " << phase->PhaseName() << " ]---\n"; } (void)RunAnalysisPhase(*phase, *serialADM, *func->GetMeFunc()); - Dump(*func->GetMeFunc(), phase->PhaseName()); + DumpSCCEmit(*func->GetMeFunc(), phase->PhaseName()); delete func->GetMeFunc()->GetPmeMempool(); func->GetMeFunc()->SetPmeMempool(nullptr); } diff --git a/src/mapleall/maple_ipa/src/ipa_side_effect.cpp b/src/mapleall/maple_ipa/src/ipa_side_effect.cpp index 4994f84fa7..d465a95ab6 100644 --- a/src/mapleall/maple_ipa/src/ipa_side_effect.cpp +++ b/src/mapleall/maple_ipa/src/ipa_side_effect.cpp @@ -13,33 +13,51 @@ * See the Mulan PSL v2 for more details. */ #include "ipa_side_effect.h" +#include "driver_options.h" #include "func_desc.h" #include "inline_analyzer.h" +#include "me_ir.h" +#include "opcodes.h" namespace maple { -const std::map kWhitelist = { +std::map kFullWhiteList = { #include "func_desc.def" }; -const FuncDesc &SideEffect::GetFuncDesc(MeFunction &f) { - return SideEffect::GetFuncDesc(*f.GetMirFunc()); +const std::map kBuiltinsList = { +#include "builtins.def" +}; + +const std::map kBuiltinsOutSideC90List = { +#include "builtins_outside_C90.def" +}; + +const FuncDesc &IpaSideEffectAnalyzer::GetFuncDesc(MeFunction &f) { + return IpaSideEffectAnalyzer::GetFuncDesc(*f.GetMirFunc()); } -const FuncDesc &SideEffect::GetFuncDesc(MIRFunction &f) { - if (!Options::sideEffectWhiteList) { - return f.GetFuncDesc(); - } - auto it = kWhitelist.find(f.GetName()); - if (it != kWhitelist.end()) { +const FuncDesc &IpaSideEffectAnalyzer::GetFuncDesc(MIRFunction &f) { + auto it = GetWhiteList()->find(f.GetName()); + if (it != GetWhiteList()->end()) { return it->second; } return f.GetFuncDesc(); } -const std::map &SideEffect::GetWhiteList() { - return kWhitelist; +const std::map *IpaSideEffectAnalyzer::GetWhiteList() { + if (opts::oFnoBuiltin) { + kFullWhiteList.erase(kFullWhiteList.begin(), kFullWhiteList.end()); + return &kFullWhiteList; + } + if (Options::sideEffectWhiteList) { + return &kFullWhiteList; + } + if (opts::oStd90 || opts::oAnsi) { + return &kBuiltinsList; + } + return &kBuiltinsOutSideC90List; } -void SideEffect::ParamInfoUpdater(size_t vstIdx, const PI &calleeParamInfo) { +void IpaSideEffectAnalyzer::ParamInfoUpdater(size_t vstIdx, const PI &calleeParamInfo) { for (size_t callerFormalIdx = 0; callerFormalIdx < vstsValueAliasWithFormal.size(); ++callerFormalIdx) { auto &formalValueAlias = vstsValueAliasWithFormal[callerFormalIdx]; if (formalValueAlias.find(vstIdx) != formalValueAlias.end()) { @@ -48,7 +66,7 @@ void SideEffect::ParamInfoUpdater(size_t vstIdx, const PI &calleeParamInfo) { } } -void SideEffect::PropInfoFromOpnd(MeExpr &opnd, const PI &calleeParamInfo) { +void IpaSideEffectAnalyzer::PropInfoFromOpnd(MeExpr &opnd, const PI &calleeParamInfo) { MeExpr &base = opnd.GetAddrExprBase(); OriginalSt *ost = nullptr; switch (base.GetMeOp()) { @@ -85,7 +103,7 @@ void SideEffect::PropInfoFromOpnd(MeExpr &opnd, const PI &calleeParamInfo) { } } -void SideEffect::PropParamInfoFromCallee(const MeStmt &call, MIRFunction &callee) { +void IpaSideEffectAnalyzer::PropParamInfoFromCallee(const MeStmt &call, MIRFunction &callee) { const FuncDesc &desc = callee.GetFuncDesc(); size_t skipFirstOpnd = kOpcodeInfo.IsICall(call.GetOp()) ? 1 : 0; size_t actualParaCount = call.NumMeStmtOpnds() - skipFirstOpnd; @@ -95,19 +113,19 @@ void SideEffect::PropParamInfoFromCallee(const MeStmt &call, MIRFunction &callee } } -void SideEffect::PropAllInfoFromCallee(const MeStmt &call, MIRFunction &callee) { +void IpaSideEffectAnalyzer::PropAllInfoFromCallee(const MeStmt &call, MIRFunction &callee) { const FuncDesc &desc = callee.GetFuncDesc(); curFuncDesc->SetFuncInfoNoBetterThan(desc.GetFuncInfo()); PropParamInfoFromCallee(call, callee); } -void SideEffect::DealWithMayDef(MeStmt &stmt) { +void IpaSideEffectAnalyzer::DealWithMayDef(MeStmt &stmt) { if (!stmt.GetChiList()) { return; } for (auto &chi : std::as_const(*stmt.GetChiList())) { auto ostIdx = chi.first; - auto *ost = meFunc->GetMeSSATab()->GetSymbolOriginalStFromID(ostIdx); + auto *ost = meFunc.GetMeSSATab()->GetSymbolOriginalStFromID(ostIdx); if (!ost) { continue; } @@ -118,7 +136,7 @@ void SideEffect::DealWithMayDef(MeStmt &stmt) { } } -void SideEffect::DealWithMayUse(MeStmt &stmt) { +void IpaSideEffectAnalyzer::DealWithMayUse(MeStmt &stmt) { if (!stmt.GetMuList()) { return; } @@ -129,52 +147,82 @@ void SideEffect::DealWithMayUse(MeStmt &stmt) { } } -void SideEffect::DealWithStmt(MeStmt &stmt) { - if (stmt.GetOp() == OP_asm) { - curFuncDesc->SetFuncInfoNoBetterThan(FI::kUnknown); +void IpaSideEffectAnalyzer::DealWithIcall(MeStmt &stmt) { + IcallMeStmt *icall = safe_cast(&stmt); + if (icall == nullptr) { + return; + } + MIRFunction *mirFunc = meFunc.GetMirFunc(); + CGNode *icallCGNode = callGraph->GetCGNode(mirFunc); + CallInfo callInfo(stmt.GetMeStmtId()); + CHECK_NULL_FATAL(icallCGNode); + auto &callees = icallCGNode->GetCallee(); + auto it = callees.find(&callInfo); + if (it == callees.end() || it->second->empty()) { + // no candidates found, process conservatively + for (size_t formalIdx = 1; formalIdx < icall->NumMeStmtOpnds(); ++formalIdx) { + PropInfoFromOpnd(*icall->GetOpnd(formalIdx), PI::kUnknown); + } + } else { + for (auto *cgNode : *it->second) { + MIRFunction *calleeFunc = cgNode->GetMIRFunction(); + PropAllInfoFromCallee(*icall, *calleeFunc); + } } +} + +void IpaSideEffectAnalyzer::DealWithStmt(MeStmt &stmt) { for (size_t i = 0; i < stmt.NumMeStmtOpnds(); ++i) { DealWithOperand(stmt.GetOpnd(i)); } - RetMeStmt *ret = safe_cast(&stmt); - if (ret != nullptr) { - DealWithReturn(*ret); - } - CallMeStmt *call = safe_cast(&stmt); - if (call != nullptr) { - MIRFunction *calleeFunc = GlobalTables::GetFunctionTable().GetFunctionFromPuidx(call->GetPUIdx()); - PropAllInfoFromCallee(*call, *calleeFunc); - } - IcallMeStmt *icall = safe_cast(&stmt); - if (icall != nullptr) { - MIRFunction *mirFunc = meFunc->GetMirFunc(); - CGNode *icallCGNode = callGraph->GetCGNode(mirFunc); - CallInfo callInfo(stmt.GetMeStmtId()); - CHECK_NULL_FATAL(icallCGNode); - auto &callees = icallCGNode->GetCallee(); - auto it = callees.find(&callInfo); - if (it == callees.end() || it->second->empty()) { - // no candidates found, process conservatively - for (size_t formalIdx = 1; formalIdx < icall->NumMeStmtOpnds(); ++formalIdx) { - PropInfoFromOpnd(*icall->GetOpnd(formalIdx), PI::kUnknown); - } - } else { - for (auto *cgNode : *it->second) { - MIRFunction *calleeFunc = cgNode->GetMIRFunction(); - PropAllInfoFromCallee(*icall, *calleeFunc); + switch (stmt.GetOp()) { + case OP_asm: { + curFuncDesc->SetFuncInfoNoBetterThan(FI::kUnknown); + break; + } + case OP_return: { + DealWithReturn(static_cast(stmt)); + break; + } + case OP_call: + case OP_callassigned: { + CallMeStmt *call = safe_cast(&stmt); + MIRFunction *calleeFunc = GlobalTables::GetFunctionTable().GetFunctionFromPuidx(call->GetPUIdx()); + PropAllInfoFromCallee(*call, *calleeFunc); + break; + } + case OP_icall: + case OP_icallproto: + case OP_icallassigned: + case OP_icallprotoassigned: { + DealWithIcall(stmt); + break; + } + case OP_intrinsiccall: + case OP_intrinsiccallwithtype: + case OP_intrinsiccallwithtypeassigned: + case OP_intrinsiccallassigned: { + auto &intrinsicCall = static_cast(stmt); + auto &intrinsicDesc = intrinsicCall.GetIntrinsicDescription(); + if (!intrinsicDesc.HasNoSideEffect()) { + curFuncDesc->SetFuncInfoNoBetterThan(FI::kNoDirectGlobleAccess); } + break; + } + default: { + break; } } DealWithMayUse(stmt); DealWithMayDef(stmt); } -void SideEffect::DealWithOst(OStIdx ostIdx) { - OriginalSt *ost = meFunc->GetMeSSATab()->GetSymbolOriginalStFromID(ostIdx); +void IpaSideEffectAnalyzer::DealWithOst(const OStIdx &ostIdx) { + OriginalSt *ost = meFunc.GetMeSSATab()->GetSymbolOriginalStFromID(ostIdx); DealWithOst(ost); } -void SideEffect::DealWithOst(const OriginalSt *ost) { +void IpaSideEffectAnalyzer::DealWithOst(const OriginalSt *ost) { if (ost == nullptr) { return; } @@ -189,7 +237,7 @@ void SideEffect::DealWithOst(const OriginalSt *ost) { } } -void SideEffect::DealWithOperand(MeExpr *expr) { +void IpaSideEffectAnalyzer::DealWithOperand(MeExpr *expr) { if (expr == nullptr) { return; } @@ -217,7 +265,7 @@ void SideEffect::DealWithOperand(MeExpr *expr) { return; } -void SideEffect::DealWithReturn(const RetMeStmt &retMeStmt) const { +void IpaSideEffectAnalyzer::DealWithReturn(const RetMeStmt &retMeStmt) const { if (retMeStmt.NumMeStmtOpnds() == 0) { return; } @@ -258,7 +306,7 @@ void SideEffect::DealWithReturn(const RetMeStmt &retMeStmt) const { std::set result; alias->GetValueAliasSetOfVst(vstIdxOfRet, result); for (auto valueAliasVstIdx : result) { - auto *meExpr = meFunc->GetIRMap()->GetVerst2MeExprTableItem(static_cast(valueAliasVstIdx)); + auto *meExpr = meFunc.GetIRMap()->GetVerst2MeExprTableItem(static_cast(valueAliasVstIdx)); // meExpr of valueAliasVstIdx not created in IRMap, it must not occured in hssa-mefunction if (meExpr == nullptr) { continue; @@ -266,7 +314,7 @@ void SideEffect::DealWithReturn(const RetMeStmt &retMeStmt) const { OriginalSt *aliasOst = nullptr; if (meExpr->GetMeOp() == kMeOpAddrof) { auto ostIdx = static_cast(meExpr)->GetOstIdx(); - aliasOst = meFunc->GetMeSSATab()->GetOriginalStFromID(ostIdx); + aliasOst = meFunc.GetMeSSATab()->GetOriginalStFromID(ostIdx); } else if (meExpr->IsScalar()) { aliasOst = static_cast(meExpr)->GetOst(); } else { @@ -279,7 +327,7 @@ void SideEffect::DealWithReturn(const RetMeStmt &retMeStmt) const { } } -void SideEffect::SolveVarArgs(MeFunction &f) const { +void IpaSideEffectAnalyzer::SolveVarArgs(MeFunction &f) const { MIRFunction *func = f.GetMirFunc(); if (func->IsVarargs()) { for (size_t i = func->GetFormalCount(); i < kMaxParamCount; ++i) { @@ -289,9 +337,9 @@ void SideEffect::SolveVarArgs(MeFunction &f) const { } } -void SideEffect::CollectAllLevelOst(size_t vstIdx, std::set &result) { +void IpaSideEffectAnalyzer::CollectAllLevelOst(size_t vstIdx, std::set &result) { (void)result.insert(vstIdx); - auto *nextLevelOsts = meFunc->GetMeSSATab()->GetNextLevelOsts(vstIdx); + auto *nextLevelOsts = meFunc.GetMeSSATab()->GetNextLevelOsts(vstIdx); if (nextLevelOsts == nullptr) { return; } @@ -302,7 +350,7 @@ void SideEffect::CollectAllLevelOst(size_t vstIdx, std::set &result) { } } -void SideEffect::CollectFormalOst(MeFunction &f) { +void IpaSideEffectAnalyzer::CollectFormalOst(MeFunction &f) { MIRFunction *func = f.GetMirFunc(); for (auto *ost : f.GetMeSSATab()->GetOriginalStTable().GetOriginalStVector()) { if (ost == nullptr) { @@ -332,7 +380,7 @@ void SideEffect::CollectFormalOst(MeFunction &f) { alias->GetValueAliasSetOfVst(ost->GetZeroVersionIndex(), vstValueAliasFormal); for (size_t vstIdx: vstValueAliasFormal) { - auto *meExpr = meFunc->GetIRMap()->GetVerst2MeExprTableItem(static_cast(vstIdx)); + auto *meExpr = meFunc.GetIRMap()->GetVerst2MeExprTableItem(static_cast(vstIdx)); if (meExpr == nullptr || meExpr->GetMeOp() == kMeOpAddrof) { // corresponding ScalarMeExpr has not been created in irmap for vstIdx. CollectAllLevelOst(vstIdx, vstsValueAliasWithFormal[idx]); @@ -351,11 +399,11 @@ void SideEffect::CollectFormalOst(MeFunction &f) { } } -void SideEffect::AnalysisFormalOst() { +void IpaSideEffectAnalyzer::AnalysisFormalOst() { for (size_t formalIndex = 0; formalIndex < vstsValueAliasWithFormal.size(); ++formalIndex) { for (size_t vstIdx : vstsValueAliasWithFormal[formalIndex]) { curFuncDesc->SetParamInfoNoBetterThan(formalIndex, PI::kReadSelfOnly); - auto *meExpr = meFunc->GetIRMap()->GetVerst2MeExprTableItem(static_cast(vstIdx)); + auto *meExpr = meFunc.GetIRMap()->GetVerst2MeExprTableItem(static_cast(vstIdx)); if (meExpr == nullptr) { continue; } @@ -398,7 +446,7 @@ inline static bool IsComplicatedType(const MIRType &type) { return type.IsIncomplete() || type.GetPrimType() == PTY_agg; } -void SideEffect::FilterComplicatedPrametersForNoGlobalAccess(MeFunction &f) { +void IpaSideEffectAnalyzer::FilterComplicatedPrametersForNoGlobalAccess(MeFunction &f) { if (!curFuncDesc->NoDirectGlobleAccess()) { return; } @@ -420,7 +468,7 @@ void SideEffect::FilterComplicatedPrametersForNoGlobalAccess(MeFunction &f) { } } -bool SideEffect::Perform(MeFunction &f) { +bool IpaSideEffectAnalyzer::Perform(MeFunction &f) { MIRFunction *func = f.GetMirFunc(); curFuncDesc = &func->GetFuncDesc(); FuncDesc oldDesc = *curFuncDesc; @@ -475,7 +523,7 @@ bool SCCSideEffect::PhaseRun(SCCNode &scc) { CHECK_FATAL(meSSATab == meFunc->GetMeSSATab(), "IPA_PM may be wrong."); MaplePhase *it = GetAnalysisInfoHook()->GetOverIRAnalyisData(*func->GetModule()); CallGraph *cg = static_cast(it)->GetResult(); - SideEffect se(meFunc, dom, alias, cg); + IpaSideEffectAnalyzer se(*meFunc, dom, alias, cg); changed = changed || se.Perform(*meFunc); } } diff --git a/src/mapleall/maple_ipa/src/old/ipa_escape_analysis.cpp b/src/mapleall/maple_ipa/src/old/ipa_escape_analysis.cpp index 2e9b0d362a..b1791e17d1 100644 --- a/src/mapleall/maple_ipa/src/old/ipa_escape_analysis.cpp +++ b/src/mapleall/maple_ipa/src/old/ipa_escape_analysis.cpp @@ -235,11 +235,11 @@ bool IPAEscapeAnalysis::IsSpecialEscapedObj(const MeExpr &alloc) const { return false; } -EACGRefNode *IPAEscapeAnalysis::GetOrCreateCGRefNodeForReg(RegMeExpr ®, bool createObjNode) { - EACGBaseNode *node = eaCG->GetCGNodeFromExpr(®); +EACGRefNode *IPAEscapeAnalysis::GetOrCreateCGRefNode(MeExpr *expr, bool createObjNode) { + EACGBaseNode *node = eaCG->GetCGNodeFromExpr(expr); EACGRefNode *refNode = nullptr; if (node == nullptr) { - refNode = eaCG->CreateReferenceNode(®, kNoEscape, false); + refNode = eaCG->CreateReferenceNode(expr, kNoEscape, false); cgChangedInSCC = true; } else { refNode = static_cast(node); @@ -251,24 +251,16 @@ EACGRefNode *IPAEscapeAnalysis::GetOrCreateCGRefNodeForReg(RegMeExpr ®, bool return refNode; } +EACGRefNode *IPAEscapeAnalysis::GetOrCreateCGRefNodeForReg(RegMeExpr ®, bool createObjNode) { + return GetOrCreateCGRefNode(®, createObjNode); +} + EACGRefNode *IPAEscapeAnalysis::GetOrCreateCGRefNodeForAddrof(AddrofMeExpr &var, bool createObjNode) { if (IsGlobal(*ssaTab, var)) { eaCG->UpdateExprOfGlobalRef(&var); return eaCG->GetGlobalReference(); } - EACGBaseNode *node = eaCG->GetCGNodeFromExpr(&var); - EACGRefNode *refNode = nullptr; - if (node == nullptr) { - refNode = eaCG->CreateReferenceNode(&var, kNoEscape, false); - cgChangedInSCC = true; - } else { - refNode = static_cast(node); - } - if (node == nullptr && createObjNode) { - EACGObjectNode *objNode = GetOrCreateCGObjNode(nullptr, nullptr, refNode->GetEAStatus()); - (void)refNode->AddOutNode(*objNode); - } - return refNode; + return GetOrCreateCGRefNode(&var, createObjNode); } EACGRefNode *IPAEscapeAnalysis::GetOrCreateCGRefNodeForVar(VarMeExpr &var, bool createObjNode) { @@ -276,19 +268,7 @@ EACGRefNode *IPAEscapeAnalysis::GetOrCreateCGRefNodeForVar(VarMeExpr &var, bool eaCG->UpdateExprOfGlobalRef(&var); return eaCG->GetGlobalReference(); } - EACGBaseNode *node = eaCG->GetCGNodeFromExpr(&var); - EACGRefNode *refNode = nullptr; - if (node == nullptr) { - refNode = eaCG->CreateReferenceNode(&var, kNoEscape, false); - cgChangedInSCC = true; - } else { - refNode = static_cast(node); - } - if (node == nullptr && createObjNode) { - EACGObjectNode *objNode = GetOrCreateCGObjNode(nullptr, nullptr, refNode->GetEAStatus()); - (void)refNode->AddOutNode(*objNode); - } - return refNode; + return GetOrCreateCGRefNode(&var, createObjNode); } EACGRefNode *IPAEscapeAnalysis::GetOrCreateCGRefNodeForVarOrReg(MeExpr &var, bool createObjNode) { diff --git a/src/mapleall/maple_ipa/src/region_identify.cpp b/src/mapleall/maple_ipa/src/region_identify.cpp index 202c5f9825..e4dfdac89c 100644 --- a/src/mapleall/maple_ipa/src/region_identify.cpp +++ b/src/mapleall/maple_ipa/src/region_identify.cpp @@ -171,7 +171,7 @@ void RegionIdentify::CreateRegionCandidates(const SuffixArray &sa) { void RegionIdentify::CreateRegionGroups(std::vector ®ions) { for (size_t i = 0; i < regions.size(); ++i) { auto &currRegion = regions[i]; - if (currRegion.GetGroupId() != kInvalidIndex) { + if (currRegion.GetGroupId() != utils::kInvalidIndex) { continue; } auto currGroup = RegionGroup(); diff --git a/src/mapleall/maple_ir/include/dex2mpl/dexintrinsic.def b/src/mapleall/maple_ir/include/dex2mpl/dexintrinsic.def index cfa6016f0c..931fc3ac96 100644 --- a/src/mapleall/maple_ir/include/dex2mpl/dexintrinsic.def +++ b/src/mapleall/maple_ir/include/dex2mpl/dexintrinsic.def @@ -1,17 +1,25 @@ DEF_MIR_INTRINSIC(JAVA_INTERFACE_CALL,\ - "__dex_interface_call", DEFAULT_NUM_INSN, INTRNISJAVA, kArgTyDynany, kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__dex_interface_call", DEFAULT_NUM_INSN, INTRNISJAVA, kArgTyDynany, \ + { kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JAVA_PRINT,\ - "printf", DEFAULT_NUM_INSN, INTRNISJAVA, kArgTyVoid, kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "printf", DEFAULT_NUM_INSN, INTRNISJAVA, kArgTyVoid, \ + { kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JAVA_CLINIT_CHECK_SGET,\ - "__dex_clinit_check_sget", DEFAULT_NUM_INSN, INTRNISJAVA, kArgTyVoid, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__dex_clinit_check_sget", DEFAULT_NUM_INSN, INTRNISJAVA, kArgTyVoid, \ + { kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JAVA_CLINIT_CHECK_SPUT,\ - "__dex__clinit_check_sput", DEFAULT_NUM_INSN, INTRNISJAVA, kArgTyVoid, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__dex__clinit_check_sput", DEFAULT_NUM_INSN, INTRNISJAVA, kArgTyVoid, \ + { kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JAVA_CLINIT_CHECK_NEW,\ - "__dex_clinit_check_new", DEFAULT_NUM_INSN, INTRNISJAVA, kArgTyVoid, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__dex_clinit_check_new", DEFAULT_NUM_INSN, INTRNISJAVA, kArgTyVoid, \ + { kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JAVA_STR_TO_JSTR,\ - "__dex_str_to_jstr", DEFAULT_NUM_INSN, INTRNISJAVA, kArgTyPtr, kArgTyPtr, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__dex_str_to_jstr", DEFAULT_NUM_INSN, INTRNISJAVA, kArgTyPtr, \ + { kArgTyPtr, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) // __dex_random is used to generate a random value used in callback cfg DEF_MIR_INTRINSIC(JAVA_RANDOM,\ - "__dex_random", DEFAULT_NUM_INSN, INTRNISJAVA | INTRNNOSIDEEFFECT, kArgTyI32, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__dex_random", DEFAULT_NUM_INSN, INTRNISJAVA | INTRNNOSIDEEFFECT, kArgTyI32, \ + { kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JAVA_THROW_CLASSCAST,\ - "MCC_ThrowClassCastException", DEFAULT_NUM_INSN, INTRNISJAVA | INTRNNEVERRETURN, kArgTyVoid, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "MCC_ThrowClassCastException", DEFAULT_NUM_INSN, INTRNISJAVA | INTRNNEVERRETURN, kArgTyVoid, \ + { kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) diff --git a/src/mapleall/maple_ir/include/global_tables.h b/src/mapleall/maple_ir/include/global_tables.h index b568112972..8f5a7a62fe 100644 --- a/src/mapleall/maple_ir/include/global_tables.h +++ b/src/mapleall/maple_ir/include/global_tables.h @@ -501,6 +501,7 @@ class TypeTable { void PushNull() { typeTable.push_back(nullptr); } void PopBack() { typeTable.pop_back(); } + void FillinTypeMapOrHashTable(MIRType &pType, MIRType &nType); void CreateMirTypeNodeAt(MIRType &pType, TyIdx tyIdxUsed, MIRModule *module, bool isObject, bool isIncomplete); MIRType *CreateAndUpdateMirTypeNode(MIRType &pType); MIRType *GetOrCreateStructOrUnion(const std::string &name, const FieldVector &fields, const FieldVector &parentFields, diff --git a/src/mapleall/maple_ir/include/intrinsic_c.def b/src/mapleall/maple_ir/include/intrinsic_c.def index b063e7d103..cc4b4f07a6 100644 --- a/src/mapleall/maple_ir/include/intrinsic_c.def +++ b/src/mapleall/maple_ir/include/intrinsic_c.def @@ -1,5 +1,5 @@ /* - * Copyright (c) [2021] Huawei Technologies Co., Ltd. All rights reserved. + * Copyright (c) [2023] Huawei Technologies Co., Ltd. All rights reserved. * * OpenArkCompiler is licensed under the Mulan Permissive Software License v2. * You can use this software according to the terms and conditions of the MulanPSL - 2.0. @@ -13,325 +13,425 @@ * See the MulanPSL - 2.0 for more details. */ -// DEF_MIR_INTRINSIC(STR, NAME, NUM_INSN, INTRN_CLASS, RETURN_TYPE, ARG0, ARG1, ARG2, ARG3, ARG4, ARG5) +// DEF_MIR_INTRINSIC(STR, NAME, NUM_INSN, INTRNISCBUILTIN | INTRN_CLASS, RETURN_TYPE, { ARG ... }) DEF_MIR_INTRINSIC(C_strcmp,\ - "strcmp", 1, INTRNNOSIDEEFFECT | INTRNISPURE, kArgTyI32, kArgTyPtr, kArgTyPtr) + "strcmp", 1, INTRNISCBUILTIN | INTRNNOSIDEEFFECT | INTRNISPURE, kArgTyI32, + { { kArgTyPtr, MemEffect::kLoadMemory }, { kArgTyPtr, MemEffect::kLoadMemory } }) DEF_MIR_INTRINSIC(C_strncmp,\ - "strncmp", 1, INTRNNOSIDEEFFECT | INTRNISPURE, kArgTyI32, kArgTyPtr, kArgTyPtr, kArgTyU32) + "strncmp", 1, INTRNISCBUILTIN | INTRNNOSIDEEFFECT | INTRNISPURE, kArgTyI32, + { { kArgTyPtr, MemEffect::kLoadMemory }, { kArgTyPtr, MemEffect::kLoadMemory }, kArgTyU32 }) DEF_MIR_INTRINSIC(C_strcpy,\ - "strcpy", 1, INTRNWRITEFIRSTOPND | INTRNREADSECONDOPND, \ - kArgTyPtr, kArgTyPtr, kArgTyPtr) + "strcpy", 1, INTRNISCBUILTIN, { kArgTyPtr, AliasLevelInfo::kAliasArgs }, + { { kArgTyPtr, { MemEffect::kStoreMemory, MemEffect::kReturned } }, { kArgTyPtr, MemEffect::kLoadMemory } }) DEF_MIR_INTRINSIC(C_strncpy,\ - "strncpy", 1, INTRNWRITEFIRSTOPND | INTRNREADSECONDOPND | INTRNREADTHIRDOPND, \ - kArgTyPtr, kArgTyPtr, kArgTyPtr, kArgTyU64) + "strncpy", 1, INTRNISCBUILTIN, { kArgTyPtr, AliasLevelInfo::kAliasArgs }, + { { kArgTyPtr, { MemEffect::kStoreMemory, MemEffect::kReturned } }, { kArgTyPtr, MemEffect::kLoadMemory }, kArgTyU64 }) DEF_MIR_INTRINSIC(C_strlen,\ - "strlen", 1, INTRNNOSIDEEFFECT | INTRNISPURE, kArgTyU64, kArgTyPtr) + "strlen", 1, INTRNISCBUILTIN | INTRNNOSIDEEFFECT | INTRNISPURE, kArgTyU64, { { kArgTyPtr, MemEffect::kLoadMemory } }) DEF_MIR_INTRINSIC(C_strchr,\ - "strchr", 1, INTRNNOSIDEEFFECT | INTRNISPURE, kArgTyPtr, kArgTyPtr, kArgTyU32) + "strchr", 1, INTRNISCBUILTIN | INTRNNOSIDEEFFECT | INTRNISPURE, { kArgTyPtr, AliasLevelInfo::kAliasArgs }, + { { kArgTyPtr, { MemEffect::kLoadMemory, MemEffect::kReturned } }, kArgTyU32 }) DEF_MIR_INTRINSIC(C_strrchr,\ - "strrchr", 1, INTRNNOSIDEEFFECT | INTRNISPURE, kArgTyPtr, kArgTyPtr, kArgTyU32) + "strrchr", 1, INTRNISCBUILTIN | INTRNNOSIDEEFFECT | INTRNISPURE, { kArgTyPtr, AliasLevelInfo::kAliasArgs }, + { { kArgTyPtr, { MemEffect::kLoadMemory, MemEffect::kReturned } }, kArgTyU32 }) DEF_MIR_INTRINSIC(C_memcmp,\ - "memcmp", 1, INTRNNOSIDEEFFECT | INTRNISPURE, kArgTyI32, kArgTyPtr, kArgTyPtr, kArgTyU64) + "memcmp", 1, INTRNISCBUILTIN | INTRNNOSIDEEFFECT | INTRNISPURE, kArgTyI32, + { { kArgTyPtr, MemEffect::kLoadMemory }, { kArgTyPtr, MemEffect::kLoadMemory }, kArgTyU64 }) DEF_MIR_INTRINSIC(C_memcpy,\ - "memcpy", 1, INTRNWRITEFIRSTOPND | INTRNREADSECONDOPND | INTRNREADTHIRDOPND, \ - kArgTyPtr, kArgTyPtr, kArgTyPtr, kArgTyU64) + "memcpy", 1, INTRNISCBUILTIN, { kArgTyPtr, AliasLevelInfo::kAliasArgs }, + { { kArgTyPtr, { MemEffect::kStoreMemory, MemEffect::kReturned } }, { kArgTyPtr, MemEffect::kLoadMemory }, kArgTyU64 }) DEF_MIR_INTRINSIC(C_memmove,\ - "memmove", 1, 0, kArgTyPtr, kArgTyPtr, kArgTyPtr, kArgTyU64) + "memmove", 1, INTRNISCBUILTIN, { kArgTyPtr, AliasLevelInfo::kAliasArgs }, + { { kArgTyPtr, { MemEffect::kStoreMemory, MemEffect::kReturned } }, { kArgTyPtr, MemEffect::kLoadMemory }, kArgTyU64 }) DEF_MIR_INTRINSIC(C_memset,\ - "memset", 1, INTRNWRITEFIRSTOPND | INTRNREADSECONDOPND | INTRNREADTHIRDOPND, \ - kArgTyPtr, kArgTyPtr, kArgTyI32, kArgTyU64) + "memset", 1, INTRNISCBUILTIN, { kArgTyPtr, AliasLevelInfo::kAliasArgs }, + { { kArgTyPtr, { MemEffect::kStoreMemory, MemEffect::kReturned } }, kArgTyI32, kArgTyU64 }) DEF_MIR_INTRINSIC(C_acosf,\ - "acosf", 1, INTRNISPURE, kArgTyF32, kArgTyF32) + "acosf", 1, INTRNISCBUILTIN | INTRNISPURE, kArgTyF32, { kArgTyF32 }) DEF_MIR_INTRINSIC(C_asinf,\ - "asinf", 1, INTRNISPURE, kArgTyF32, kArgTyF32) + "asinf", 1, INTRNISCBUILTIN | INTRNISPURE, kArgTyF32, { kArgTyF32 }) DEF_MIR_INTRINSIC(C_atanf,\ - "atanf", 1, INTRNISPURE, kArgTyF32, kArgTyF32) + "atanf", 1, INTRNISCBUILTIN | INTRNISPURE, kArgTyF32, { kArgTyF32 }) DEF_MIR_INTRINSIC(C_cosf,\ - "cosf", 1, INTRNISPURE, kArgTyF32, kArgTyF32) + "cosf", 1, INTRNISCBUILTIN | INTRNISPURE, kArgTyF32, { kArgTyF32 }) DEF_MIR_INTRINSIC(C_coshf,\ - "coshf", 1, INTRNISPURE, kArgTyF32, kArgTyF32) + "coshf", 1, INTRNISCBUILTIN | INTRNISPURE, kArgTyF32, { kArgTyF32 }) DEF_MIR_INTRINSIC(C_expf,\ - "expf", 1, INTRNISPURE, kArgTyF32, kArgTyF32) + "expf", 1, INTRNISCBUILTIN | INTRNISPURE, kArgTyF32, { kArgTyF32 }) DEF_MIR_INTRINSIC(C_logf,\ - "logf", 1, INTRNISPURE, kArgTyF32, kArgTyF32) + "logf", 1, INTRNISCBUILTIN | INTRNISPURE, kArgTyF32, { kArgTyF32 }) DEF_MIR_INTRINSIC(C_log10f,\ - "log10f", 1, INTRNISPURE, kArgTyF32, kArgTyF32) + "log10f", 1, INTRNISCBUILTIN | INTRNISPURE, kArgTyF32, { kArgTyF32 }) DEF_MIR_INTRINSIC(C_sinf,\ - "sinf", 1, INTRNISPURE, kArgTyF32, kArgTyF32) + "sinf", 1, INTRNISCBUILTIN | INTRNISPURE, kArgTyF32, { kArgTyF32 }) DEF_MIR_INTRINSIC(C_sinhf,\ - "sinhf", 1, INTRNISPURE, kArgTyF32, kArgTyF32) + "sinhf", 1, INTRNISCBUILTIN | INTRNISPURE, kArgTyF32, { kArgTyF32 }) DEF_MIR_INTRINSIC(C_acos,\ - "acos", 1, INTRNISPURE, kArgTyF64, kArgTyF64) + "acos", 1, INTRNISCBUILTIN | INTRNISPURE, kArgTyF64, { kArgTyF64 }) DEF_MIR_INTRINSIC(C_asin,\ - "asin", 1, INTRNISPURE, kArgTyF64, kArgTyF64) + "asin", 1, INTRNISCBUILTIN | INTRNISPURE, kArgTyF64, { kArgTyF64 }) DEF_MIR_INTRINSIC(C_atan,\ - "atan", 1, INTRNISPURE, kArgTyF64, kArgTyF64) + "atan", 1, INTRNISCBUILTIN | INTRNISPURE, kArgTyF64, { kArgTyF64 }) DEF_MIR_INTRINSIC(C_cos,\ - "cos", 1, INTRNISPURE, kArgTyF64, kArgTyF64) + "cos", 1, INTRNISCBUILTIN | INTRNISPURE, kArgTyF64, { kArgTyF64 }) DEF_MIR_INTRINSIC(C_cosh,\ - "cosh", 1, INTRNISPURE, kArgTyF64, kArgTyF64) + "cosh", 1, INTRNISCBUILTIN | INTRNISPURE, kArgTyF64, { kArgTyF64 }) DEF_MIR_INTRINSIC(C_exp,\ - "exp", 1, INTRNISPURE, kArgTyF64, kArgTyF64) + "exp", 1, INTRNISCBUILTIN | INTRNISPURE, kArgTyF64, { kArgTyF64 }) DEF_MIR_INTRINSIC(C_log,\ - "log", 1, INTRNISPURE, kArgTyF64, kArgTyF64) + "log", 1, INTRNISCBUILTIN | INTRNISPURE, kArgTyF64, { kArgTyF64 }) DEF_MIR_INTRINSIC(C_log10,\ - "log10", 1, INTRNISPURE, kArgTyF64, kArgTyF64) + "log10", 1, INTRNISCBUILTIN | INTRNISPURE, kArgTyF64, { kArgTyF64 }) DEF_MIR_INTRINSIC(C_sin,\ - "sin", 1, INTRNISPURE, kArgTyF64, kArgTyF64) + "sin", 1, INTRNISCBUILTIN | INTRNISPURE, kArgTyF64, { kArgTyF64 }) DEF_MIR_INTRINSIC(C_sinh,\ - "sinh", 1, INTRNISPURE, kArgTyF64, kArgTyF64) + "sinh", 1, INTRNISCBUILTIN | INTRNISPURE, kArgTyF64, { kArgTyF64 }) DEF_MIR_INTRINSIC(C_ffs,\ - "ffs", 4, INTRNISPURE, kArgTyI32, kArgTyI32) + "ffs", 4, INTRNISCBUILTIN | INTRNISPURE, kArgTyI32, { kArgTyI32 }) DEF_MIR_INTRINSIC(C_fabsl,\ - "fabsl", 1, INTRNISPURE, kArgTyF128, kArgTyF128) -DEF_MIR_INTRINSIC(C_fmaxl, "fmaxl", 1, INTRNISPURE, kArgTyF128, kArgTyF128, kArgTyF128) -DEF_MIR_INTRINSIC(C_fminl, "fminl", 1, INTRNISPURE, kArgTyF128, kArgTyF128, kArgTyF128) + "fabsl", 1, INTRNISCBUILTIN | INTRNISPURE, kArgTyF128, { kArgTyF128 }) +DEF_MIR_INTRINSIC(C_fmaxl, "fmaxl", 1, INTRNISCBUILTIN | INTRNISPURE, kArgTyF128, { kArgTyF128, kArgTyF128 }) +DEF_MIR_INTRINSIC(C_fminl, "fminl", 1, INTRNISCBUILTIN | INTRNISPURE, kArgTyF128, { kArgTyF128, kArgTyF128 }) DEF_MIR_INTRINSIC(C_va_start,\ - "va_start", 10,\ - INTRNISPURE | INTRNISSPECIAL | INTRNWRITEFIRSTOPND | INTRNREADSECONDOPND, \ - kArgTyVoid, kArgTyPtr, kArgTyI32) + "va_start", 10, INTRNISCBUILTIN | INTRNISPURE | INTRNISSPECIAL, kArgTyVoid, + { { kArgTyPtr, MemEffect::kStoreMemory } , kArgTyI32 }) DEF_MIR_INTRINSIC(C_constant_p,\ - "constant_p", 0, 0, kArgTyI32, kArgTyDynany) + "constant_p", 0, 0, kArgTyI32, { kArgTyDynany }) DEF_MIR_INTRINSIC(C_clz32,\ - "clz32", 1, INTRNISPURE, kArgTyI32, kArgTyU32) + "clz32", 1, INTRNISCBUILTIN | INTRNISPURE, kArgTyI32, { kArgTyU32 }) DEF_MIR_INTRINSIC(C_clz64,\ - "clz64", 1, INTRNISPURE, kArgTyI32, kArgTyU64) + "clz64", 1, INTRNISCBUILTIN | INTRNISPURE, kArgTyI32, { kArgTyU64 }) DEF_MIR_INTRINSIC(C_ctz32,\ - "ctz32", 2, INTRNISPURE, kArgTyI32, kArgTyU32) + "ctz32", 2, INTRNISCBUILTIN | INTRNISPURE, kArgTyI32, { kArgTyU32 }) DEF_MIR_INTRINSIC(C_ctz64,\ - "ctz64", 2, INTRNISPURE, kArgTyI32, kArgTyU64) + "ctz64", 2, INTRNISCBUILTIN | INTRNISPURE, kArgTyI32, { kArgTyU64 }) DEF_MIR_INTRINSIC(C_popcount32,\ - "popcount32", DEFAULT_NUM_INSN, INTRNISPURE, kArgTyI32, kArgTyU32) + "popcount32", DEFAULT_NUM_INSN, INTRNISCBUILTIN | INTRNISPURE, kArgTyI32, { kArgTyU32 }) DEF_MIR_INTRINSIC(C_popcount64,\ - "popcount64", DEFAULT_NUM_INSN, INTRNISPURE, kArgTyI32, kArgTyU64) + "popcount64", DEFAULT_NUM_INSN, INTRNISCBUILTIN | INTRNISPURE, kArgTyI32, { kArgTyU64 }) DEF_MIR_INTRINSIC(C_parity32,\ - "parity32", DEFAULT_NUM_INSN, INTRNISPURE, kArgTyI32, kArgTyU32) + "parity32", DEFAULT_NUM_INSN, INTRNISCBUILTIN | INTRNISPURE, kArgTyI32, { kArgTyU32 }) DEF_MIR_INTRINSIC(C_parity64,\ - "parity64", DEFAULT_NUM_INSN, INTRNISPURE, kArgTyI32, kArgTyU64) + "parity64", DEFAULT_NUM_INSN, INTRNISCBUILTIN | INTRNISPURE, kArgTyI32, { kArgTyU64 }) DEF_MIR_INTRINSIC(C_clrsb32,\ - "clrsb32", DEFAULT_NUM_INSN, INTRNISPURE, kArgTyI32, kArgTyU32) + "clrsb32", DEFAULT_NUM_INSN, INTRNISCBUILTIN | INTRNISPURE, kArgTyI32, { kArgTyU32 }) DEF_MIR_INTRINSIC(C_clrsb64,\ - "clrsb64", DEFAULT_NUM_INSN, INTRNISPURE, kArgTyI32, kArgTyU64) + "clrsb64", DEFAULT_NUM_INSN, INTRNISCBUILTIN | INTRNISPURE, kArgTyI32, { kArgTyU64 }) DEF_MIR_INTRINSIC(C_isaligned,\ - "isaligned", DEFAULT_NUM_INSN, INTRNISPURE, kArgTyU1, kArgTyPtr, kArgTyU64) + "isaligned", DEFAULT_NUM_INSN, INTRNISCBUILTIN | INTRNISPURE, kArgTyU1, { kArgTyPtr, kArgTyU64 }) DEF_MIR_INTRINSIC(C_alignup,\ - "alignup", DEFAULT_NUM_INSN, INTRNISPURE, kArgTyU1, kArgTyPtr, kArgTyU64) + "alignup", DEFAULT_NUM_INSN, INTRNISCBUILTIN | INTRNISPURE, kArgTyU1, { kArgTyPtr, kArgTyU64 }) DEF_MIR_INTRINSIC(C_aligndown,\ - "aligndown", DEFAULT_NUM_INSN, INTRNISPURE, kArgTyU1, kArgTyPtr, kArgTyU64) + "aligndown", DEFAULT_NUM_INSN, INTRNISCBUILTIN | INTRNISPURE, kArgTyU1, { kArgTyPtr, kArgTyU64 }) DEF_MIR_INTRINSIC(C_rev16_2,\ - "rev16", DEFAULT_NUM_INSN, INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI16, kArgTyI16) + "rev16", DEFAULT_NUM_INSN, INTRNISCBUILTIN | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI16, { kArgTyI16 }) DEF_MIR_INTRINSIC(C_rev_4,\ - "rev", DEFAULT_NUM_INSN, INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI32, kArgTyI32) + "rev", DEFAULT_NUM_INSN, INTRNISCBUILTIN | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI32, { kArgTyI32 }) DEF_MIR_INTRINSIC(C_rev_8,\ - "rev", DEFAULT_NUM_INSN, INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI64, kArgTyI64) + "rev", DEFAULT_NUM_INSN, INTRNISCBUILTIN | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI64, { kArgTyI64 }) DEF_MIR_INTRINSIC(C_bswap16,\ - "rev16", DEFAULT_NUM_INSN, INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI16, kArgTyI16) + "rev16", DEFAULT_NUM_INSN, INTRNISCBUILTIN | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI16, { kArgTyI16 }) DEF_MIR_INTRINSIC(C_bswap32,\ - "rev", DEFAULT_NUM_INSN, INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI32, kArgTyI32) + "rev", DEFAULT_NUM_INSN, INTRNISCBUILTIN | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI32, { kArgTyI32 }) DEF_MIR_INTRINSIC(C_bswap64,\ - "rev", DEFAULT_NUM_INSN, INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI64, kArgTyI64) + "rev", DEFAULT_NUM_INSN, INTRNISCBUILTIN | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI64, { kArgTyI64 }) DEF_MIR_INTRINSIC(C_stack_save,\ - "stack_save", DEFAULT_NUM_INSN, INTRNISPURE | INTRNISSPECIAL, kArgTyPtr) + "stack_save", DEFAULT_NUM_INSN, INTRNISCBUILTIN | INTRNISPURE | INTRNISSPECIAL, kArgTyPtr, {}) DEF_MIR_INTRINSIC(C_stack_restore,\ - "stack_restore", DEFAULT_NUM_INSN, INTRNISPURE | INTRNISSPECIAL, kArgTyPtr) + "stack_restore", DEFAULT_NUM_INSN, INTRNISCBUILTIN | INTRNISPURE | INTRNISSPECIAL, kArgTyVoid, { kArgTyPtr }) // sync DEF_MIR_INTRINSIC(C___sync_add_and_fetch_1,\ - "__sync_add_and_fetch_1", 5, INTRNATOMIC, kArgTyU8, kArgTyPtr, kArgTyU8) + "__sync_add_and_fetch_1", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU8, + { kArgTyPtr, kArgTyU8 }) DEF_MIR_INTRINSIC(C___sync_add_and_fetch_2,\ - "__sync_add_and_fetch_2", 5, INTRNATOMIC, kArgTyU16, kArgTyPtr, kArgTyU16) + "__sync_add_and_fetch_2", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU16, + { kArgTyPtr, kArgTyU16 }) DEF_MIR_INTRINSIC(C___sync_add_and_fetch_4,\ - "__sync_add_and_fetch_4", 5, INTRNATOMIC, kArgTyU32, kArgTyPtr, kArgTyU32) + "__sync_add_and_fetch_4", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU32, + { kArgTyPtr, kArgTyU32 }) DEF_MIR_INTRINSIC(C___sync_add_and_fetch_8,\ - "__sync_add_and_fetch_8", 5, INTRNATOMIC, kArgTyU64, kArgTyPtr, kArgTyU64) + "__sync_add_and_fetch_8", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU64, + { kArgTyPtr, kArgTyU64 }) DEF_MIR_INTRINSIC(C___sync_sub_and_fetch_1,\ - "__sync_sub_and_fetch_1", 5, INTRNATOMIC, kArgTyU8, kArgTyPtr, kArgTyU8) + "__sync_sub_and_fetch_1", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU8, + { kArgTyPtr, kArgTyU8 }) DEF_MIR_INTRINSIC(C___sync_sub_and_fetch_2,\ - "__sync_sub_and_fetch_2", 5, INTRNATOMIC, kArgTyU16, kArgTyPtr, kArgTyU16) + "__sync_sub_and_fetch_2", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU16, + { kArgTyPtr, kArgTyU16 }) DEF_MIR_INTRINSIC(C___sync_sub_and_fetch_4,\ - "__sync_sub_and_fetch_4", 5, INTRNATOMIC, kArgTyU32, kArgTyPtr, kArgTyU32) + "__sync_sub_and_fetch_4", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU32, + { kArgTyPtr, kArgTyU32 }) DEF_MIR_INTRINSIC(C___sync_sub_and_fetch_8,\ - "__sync_sub_and_fetch_8", 5, INTRNATOMIC, kArgTyU64, kArgTyPtr, kArgTyU64) + "__sync_sub_and_fetch_8", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU64, + { kArgTyPtr, kArgTyU64 }) DEF_MIR_INTRINSIC(C___sync_fetch_and_add_1,\ - "__sync_fetch_and_add_1", 5, INTRNATOMIC, kArgTyU8, kArgTyPtr, kArgTyU8) + "__sync_fetch_and_add_1", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU8, + { kArgTyPtr, kArgTyU8 }) DEF_MIR_INTRINSIC(C___sync_fetch_and_add_2,\ - "__sync_fetch_and_add_2", 5, INTRNATOMIC, kArgTyU16, kArgTyPtr, kArgTyU16) + "__sync_fetch_and_add_2", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU16, + { kArgTyPtr, kArgTyU16 }) DEF_MIR_INTRINSIC(C___sync_fetch_and_add_4,\ - "__sync_fetch_and_add_4", 5, INTRNATOMIC, kArgTyU32, kArgTyPtr, kArgTyU32) + "__sync_fetch_and_add_4", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU32, + { kArgTyPtr, kArgTyU32 }) DEF_MIR_INTRINSIC(C___sync_fetch_and_add_8,\ - "__sync_fetch_and_add_8", 5, INTRNATOMIC, kArgTyU64, kArgTyPtr, kArgTyU64) + "__sync_fetch_and_add_8", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU64, + { kArgTyPtr, kArgTyU64 }) DEF_MIR_INTRINSIC(C___sync_fetch_and_sub_1,\ - "__sync_fetch_and_sub_1", 5, INTRNATOMIC, kArgTyU8, kArgTyPtr, kArgTyU8) + "__sync_fetch_and_sub_1", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU8, + { kArgTyPtr, kArgTyU8 }) DEF_MIR_INTRINSIC(C___sync_fetch_and_sub_2,\ - "__sync_fetch_and_sub_2", 5, INTRNATOMIC, kArgTyU16, kArgTyPtr, kArgTyU16) + "__sync_fetch_and_sub_2", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU16, + { kArgTyPtr, kArgTyU16 }) DEF_MIR_INTRINSIC(C___sync_fetch_and_sub_4,\ - "__sync_fetch_and_sub_4", 5, INTRNATOMIC, kArgTyU32, kArgTyPtr, kArgTyU32) + "__sync_fetch_and_sub_4", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU32, + { kArgTyPtr, kArgTyU32 }) DEF_MIR_INTRINSIC(C___sync_fetch_and_sub_8,\ - "__sync_fetch_and_sub_8", 5, INTRNATOMIC, kArgTyU64, kArgTyPtr, kArgTyU64) + "__sync_fetch_and_sub_8", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU64, + { kArgTyPtr, kArgTyU64 }) DEF_MIR_INTRINSIC(C___sync_bool_compare_and_swap_1,\ - "__sync_bool_compare_and_swap_1", 5, INTRNATOMIC, kArgTyU1, kArgTyPtr, kArgTyU8, kArgTyU8) + "__sync_bool_compare_and_swap_1", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU1, + { kArgTyPtr, kArgTyU8, kArgTyU8 }) DEF_MIR_INTRINSIC(C___sync_bool_compare_and_swap_2,\ - "__sync_bool_compare_and_swap_2", 5, INTRNATOMIC, kArgTyU1, kArgTyPtr, kArgTyU16, kArgTyU16) + "__sync_bool_compare_and_swap_2", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU1, + { kArgTyPtr, kArgTyU16, kArgTyU16 }) DEF_MIR_INTRINSIC(C___sync_bool_compare_and_swap_4,\ - "__sync_bool_compare_and_swap_4", 5, INTRNATOMIC, kArgTyU1, kArgTyPtr, kArgTyU32, kArgTyU32) + "__sync_bool_compare_and_swap_4", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU1, + { kArgTyPtr, kArgTyU32, kArgTyU32 }) DEF_MIR_INTRINSIC(C___sync_bool_compare_and_swap_8,\ - "__sync_bool_compare_and_swap_8", 5, INTRNATOMIC, kArgTyU1, kArgTyPtr, kArgTyU64, kArgTyU64) + "__sync_bool_compare_and_swap_8", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU1, + { kArgTyPtr, kArgTyU64, kArgTyU64 }) DEF_MIR_INTRINSIC(C___sync_val_compare_and_swap_1,\ - "__sync_val_compare_and_swap_1", 5, INTRNATOMIC, kArgTyU8, kArgTyPtr, kArgTyU8, kArgTyU8) + "__sync_val_compare_and_swap_1", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU8, + { kArgTyPtr, kArgTyU8, kArgTyU8 }) DEF_MIR_INTRINSIC(C___sync_val_compare_and_swap_2,\ - "__sync_val_compare_and_swap_2", 5, INTRNATOMIC, kArgTyU16, kArgTyPtr, kArgTyU16, kArgTyU16) + "__sync_val_compare_and_swap_2", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU16, + { kArgTyPtr, kArgTyU16, kArgTyU16 }) DEF_MIR_INTRINSIC(C___sync_val_compare_and_swap_4,\ - "__sync_val_compare_and_swap_4", 5, INTRNATOMIC, kArgTyU32, kArgTyPtr, kArgTyU32, kArgTyU32) + "__sync_val_compare_and_swap_4", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU32, + { kArgTyPtr, kArgTyU32, kArgTyU32 }) DEF_MIR_INTRINSIC(C___sync_val_compare_and_swap_8,\ - "__sync_val_compare_and_swap_8", 5, INTRNATOMIC, kArgTyU64, kArgTyPtr, kArgTyU64, kArgTyU64) + "__sync_val_compare_and_swap_8", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU64, + { kArgTyPtr, kArgTyU64, kArgTyU64 }) DEF_MIR_INTRINSIC(C___sync_lock_test_and_set_1,\ - "__sync_lock_test_and_set_1", 5, INTRNATOMIC, kArgTyU8, kArgTyPtr, kArgTyU8) + "__sync_lock_test_and_set_1", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU8, + { kArgTyPtr, kArgTyU8 }) DEF_MIR_INTRINSIC(C___sync_lock_test_and_set_2,\ - "__sync_lock_test_and_set_2", 5, INTRNATOMIC, kArgTyU16, kArgTyPtr, kArgTyU16) + "__sync_lock_test_and_set_2", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU16, + { kArgTyPtr, kArgTyU16 }) DEF_MIR_INTRINSIC(C___sync_lock_test_and_set_4,\ - "__sync_lock_test_and_set_4", 5, INTRNATOMIC, kArgTyU32, kArgTyPtr, kArgTyU32) + "__sync_lock_test_and_set_4", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU32, + { kArgTyPtr, kArgTyU32 }) DEF_MIR_INTRINSIC(C___sync_lock_test_and_set_8,\ - "__sync_lock_test_and_set_8", 5, INTRNATOMIC, kArgTyU64, kArgTyPtr, kArgTyU64) + "__sync_lock_test_and_set_8", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU64, + { kArgTyPtr, kArgTyU64 }) DEF_MIR_INTRINSIC(C___sync_lock_release_8,\ - "__sync_lock_release_8", 1, INTRNATOMIC, kArgTyVoid, kArgTyPtr) + "__sync_lock_release_8", 1, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyVoid, + { kArgTyPtr }) DEF_MIR_INTRINSIC(C___sync_lock_release_4,\ - "__sync_lock_release_4", 1, INTRNATOMIC, kArgTyVoid, kArgTyPtr) + "__sync_lock_release_4", 1, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyVoid, + { kArgTyPtr }) DEF_MIR_INTRINSIC(C___sync_lock_release_2,\ - "__sync_lock_release_2", 1, INTRNATOMIC, kArgTyVoid, kArgTyPtr) + "__sync_lock_release_2", 1, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyVoid, + { kArgTyPtr }) DEF_MIR_INTRINSIC(C___sync_lock_release_1,\ - "__sync_lock_release_1", 1, INTRNATOMIC, kArgTyVoid, kArgTyPtr) + "__sync_lock_release_1", 1, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyVoid, + { kArgTyPtr }) DEF_MIR_INTRINSIC(C___sync_fetch_and_and_1,\ - "__sync_fetch_and_and_1", 5, INTRNATOMIC, kArgTyU8, kArgTyPtr, kArgTyU8) + "__sync_fetch_and_and_1", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU8, + { kArgTyPtr, kArgTyU8 }) DEF_MIR_INTRINSIC(C___sync_fetch_and_and_2,\ - "__sync_fetch_and_and_2", 5, INTRNATOMIC, kArgTyU16, kArgTyPtr, kArgTyU16) + "__sync_fetch_and_and_2", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU16, + { kArgTyPtr, kArgTyU16 }) DEF_MIR_INTRINSIC(C___sync_fetch_and_and_4,\ - "__sync_fetch_and_and_4", 5, INTRNATOMIC, kArgTyU32, kArgTyPtr, kArgTyU32) + "__sync_fetch_and_and_4", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU32, + { kArgTyPtr, kArgTyU32 }) DEF_MIR_INTRINSIC(C___sync_fetch_and_and_8,\ - "__sync_fetch_and_and_8", 5, INTRNATOMIC, kArgTyU64, kArgTyPtr, kArgTyU64) + "__sync_fetch_and_and_8", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU64, + { kArgTyPtr, kArgTyU64 }) DEF_MIR_INTRINSIC(C___sync_fetch_and_or_1,\ - "__sync_fetch_and_or_1", 5, INTRNATOMIC, kArgTyU8, kArgTyPtr, kArgTyU8) + "__sync_fetch_and_or_1", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU8, + { kArgTyPtr, kArgTyU8 }) DEF_MIR_INTRINSIC(C___sync_fetch_and_or_2,\ - "__sync_fetch_and_or_2", 5, INTRNATOMIC, kArgTyU16, kArgTyPtr, kArgTyU16) + "__sync_fetch_and_or_2", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU16, + { kArgTyPtr, kArgTyU16 }) DEF_MIR_INTRINSIC(C___sync_fetch_and_or_4,\ - "__sync_fetch_and_or_4", 5, INTRNATOMIC, kArgTyU32, kArgTyPtr, kArgTyU32) + "__sync_fetch_and_or_4", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU32, + { kArgTyPtr, kArgTyU32 }) DEF_MIR_INTRINSIC(C___sync_fetch_and_or_8,\ - "__sync_fetch_and_or_8", 5, INTRNATOMIC, kArgTyU64, kArgTyPtr, kArgTyU64) + "__sync_fetch_and_or_8", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU64, + { kArgTyPtr, kArgTyU64 }) DEF_MIR_INTRINSIC(C___sync_fetch_and_xor_1,\ - "__sync_fetch_and_xor_1", 5, INTRNATOMIC, kArgTyU8, kArgTyPtr, kArgTyU8) + "__sync_fetch_and_xor_1", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU8, + { kArgTyPtr, kArgTyU8 }) DEF_MIR_INTRINSIC(C___sync_fetch_and_xor_2,\ - "__sync_fetch_and_xor_2", 5, INTRNATOMIC, kArgTyU16, kArgTyPtr, kArgTyU16) + "__sync_fetch_and_xor_2", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU16, + { kArgTyPtr, kArgTyU16 }) DEF_MIR_INTRINSIC(C___sync_fetch_and_xor_4,\ - "__sync_fetch_and_xor_4", 5, INTRNATOMIC, kArgTyU32, kArgTyPtr, kArgTyU32) + "__sync_fetch_and_xor_4", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU32, + { kArgTyPtr, kArgTyU32 }) DEF_MIR_INTRINSIC(C___sync_fetch_and_xor_8,\ - "__sync_fetch_and_xor_8", 5, INTRNATOMIC, kArgTyU64, kArgTyPtr, kArgTyU64) + "__sync_fetch_and_xor_8", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU64, + { kArgTyPtr, kArgTyU64 }) DEF_MIR_INTRINSIC(C___sync_fetch_and_nand_1,\ - "__sync_fetch_and_nand_1", 5, INTRNATOMIC, kArgTyU8, kArgTyPtr, kArgTyU8) + "__sync_fetch_and_nand_1", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU8, + { kArgTyPtr, kArgTyU8 }) DEF_MIR_INTRINSIC(C___sync_fetch_and_nand_2,\ - "__sync_fetch_and_nand_2", 5, INTRNATOMIC, kArgTyU16, kArgTyPtr, kArgTyU16) + "__sync_fetch_and_nand_2", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU16, + { kArgTyPtr, kArgTyU16 }) DEF_MIR_INTRINSIC(C___sync_fetch_and_nand_4,\ - "__sync_fetch_and_nand_4", 5, INTRNATOMIC, kArgTyU32, kArgTyPtr, kArgTyU32) + "__sync_fetch_and_nand_4", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU32, + { kArgTyPtr, kArgTyU32 }) DEF_MIR_INTRINSIC(C___sync_fetch_and_nand_8,\ - "__sync_fetch_and_nand_8", 5, INTRNATOMIC, kArgTyU64, kArgTyPtr, kArgTyU64) + "__sync_fetch_and_nand_8", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU64, + { kArgTyPtr, kArgTyU64 }) DEF_MIR_INTRINSIC(C___sync_and_and_fetch_1,\ - "__sync_and_and_fetch_1", 5, INTRNATOMIC, kArgTyU8, kArgTyPtr, kArgTyU8) + "__sync_and_and_fetch_1", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU8, + { kArgTyPtr, kArgTyU8 }) DEF_MIR_INTRINSIC(C___sync_and_and_fetch_2,\ - "__sync_and_and_fetch_2", 5, INTRNATOMIC, kArgTyU16, kArgTyPtr, kArgTyU16) + "__sync_and_and_fetch_2", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU16, + { kArgTyPtr, kArgTyU16 }) DEF_MIR_INTRINSIC(C___sync_and_and_fetch_4,\ - "__sync_and_and_fetch_4", 5, INTRNATOMIC, kArgTyU32, kArgTyPtr, kArgTyU32) + "__sync_and_and_fetch_4", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU32, + { kArgTyPtr, kArgTyU32 }) DEF_MIR_INTRINSIC(C___sync_and_and_fetch_8,\ - "__sync_and_and_fetch_8", 5, INTRNATOMIC, kArgTyU64, kArgTyPtr, kArgTyU64) + "__sync_and_and_fetch_8", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU64, + { kArgTyPtr, kArgTyU64 }) DEF_MIR_INTRINSIC(C___sync_or_and_fetch_1,\ - "__sync_or_and_fetch_1", 5, INTRNATOMIC, kArgTyU8, kArgTyPtr, kArgTyU8) + "__sync_or_and_fetch_1", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU8, + { kArgTyPtr, kArgTyU8 }) DEF_MIR_INTRINSIC(C___sync_or_and_fetch_2,\ - "__sync_or_and_fetch_2", 5, INTRNATOMIC, kArgTyU16, kArgTyPtr, kArgTyU16) + "__sync_or_and_fetch_2", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU16, + { kArgTyPtr, kArgTyU16 }) DEF_MIR_INTRINSIC(C___sync_or_and_fetch_4,\ - "__sync_or_and_fetch_4", 5, INTRNATOMIC, kArgTyU32, kArgTyPtr, kArgTyU32) + "__sync_or_and_fetch_4", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU32, + { kArgTyPtr, kArgTyU32 }) DEF_MIR_INTRINSIC(C___sync_or_and_fetch_8,\ - "__sync_or_and_fetch_8", 5, INTRNATOMIC, kArgTyU64, kArgTyPtr, kArgTyU64) + "__sync_or_and_fetch_8", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU64, + { kArgTyPtr, kArgTyU64 }) DEF_MIR_INTRINSIC(C___sync_xor_and_fetch_1,\ - "__sync_xor_and_fetch_1", 5, INTRNATOMIC, kArgTyU8, kArgTyPtr, kArgTyU8) + "__sync_xor_and_fetch_1", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU8, + { kArgTyPtr, kArgTyU8 }) DEF_MIR_INTRINSIC(C___sync_xor_and_fetch_2,\ - "__sync_xor_and_fetch_2", 5, INTRNATOMIC, kArgTyU16, kArgTyPtr, kArgTyU16) + "__sync_xor_and_fetch_2", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU16, + { kArgTyPtr, kArgTyU16 }) DEF_MIR_INTRINSIC(C___sync_xor_and_fetch_4,\ - "__sync_xor_and_fetch_4", 5, INTRNATOMIC, kArgTyU32, kArgTyPtr, kArgTyU32) + "__sync_xor_and_fetch_4", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU32, + { kArgTyPtr, kArgTyU32 }) DEF_MIR_INTRINSIC(C___sync_xor_and_fetch_8,\ - "__sync_xor_and_fetch_8", 5, INTRNATOMIC, kArgTyU64, kArgTyPtr, kArgTyU64) + "__sync_xor_and_fetch_8", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU64, + { kArgTyPtr, kArgTyU64 }) DEF_MIR_INTRINSIC(C___sync_nand_and_fetch_1,\ - "__sync_nand_and_fetch_1", 5, INTRNATOMIC, kArgTyU8, kArgTyPtr, kArgTyU8) + "__sync_nand_and_fetch_1", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU8, + { kArgTyPtr, kArgTyU8 }) DEF_MIR_INTRINSIC(C___sync_nand_and_fetch_2,\ - "__sync_nand_and_fetch_2", 5, INTRNATOMIC, kArgTyU16, kArgTyPtr, kArgTyU16) + "__sync_nand_and_fetch_2", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU16, + { kArgTyPtr, kArgTyU16 }) DEF_MIR_INTRINSIC(C___sync_nand_and_fetch_4,\ - "__sync_nand_and_fetch_4", 5, INTRNATOMIC, kArgTyU32, kArgTyPtr, kArgTyU32) + "__sync_nand_and_fetch_4", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU32, + { kArgTyPtr, kArgTyU32 }) DEF_MIR_INTRINSIC(C___sync_nand_and_fetch_8,\ - "__sync_nand_and_fetch_8", 5, INTRNATOMIC, kArgTyU64, kArgTyPtr, kArgTyU64) + "__sync_nand_and_fetch_8", 5, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU64, + { kArgTyPtr, kArgTyU64 }) DEF_MIR_INTRINSIC(C___sync_synchronize,\ - "__sync_synchronize", DEFAULT_NUM_INSN, INTRNATOMIC, kArgTyUndef) - + "__sync_synchronize", DEFAULT_NUM_INSN, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyUndef, + {}) DEF_MIR_INTRINSIC(C__builtin_return_address,\ - "__builtin_return_address", 1, INTRNISPURE, kArgTyPtr, kArgTyU32) + "__builtin_return_address", 1, INTRNISCBUILTIN | INTRNISPURE, kArgTyPtr, + { kArgTyU32 }) DEF_MIR_INTRINSIC(C__builtin_extract_return_addr,\ - "__builtin_extract_return_addr", 1, INTRNISPURE, kArgTyPtr, kArgTyPtr) + "__builtin_extract_return_addr", 1, INTRNISCBUILTIN | INTRNISPURE, { kArgTyPtr, AliasLevelInfo::kAliasArgs }, + { { kArgTyPtr, MemEffect::kReturned } }) DEF_MIR_INTRINSIC(C___builtin_expect,\ - "__builtin_expect", 0, INTRNISPURE, kArgTyI32, kArgTyI32, kArgTyI32) + "__builtin_expect", 0, INTRNISCBUILTIN | INTRNISPURE, kArgTyI32, + { kArgTyI32, kArgTyI32 }) DEF_MIR_INTRINSIC(C___builtin_object_size,\ - "__builtin_object_size", 0, INTRNNOSIDEEFFECT | INTRNISPURE, kArgTyU64, kArgTyPtr, kArgTyI32) + "__builtin_object_size", 0, INTRNISCBUILTIN | INTRNNOSIDEEFFECT | INTRNISPURE, kArgTyU64, + { kArgTyPtr, kArgTyI32 }) DEF_MIR_INTRINSIC(C___builtin_division_exception,\ - "__builtin_division_exception", 0, INTRNNOSIDEEFFECT | INTRNISPURE, kArgTyVoid, kArgTyI64) + "__builtin_division_exception", 0, INTRNISCBUILTIN | INTRNNOSIDEEFFECT | INTRNISPURE | INTRNISSPECIAL, kArgTyVoid, + { kArgTyI64 }) // atomic DEF_MIR_INTRINSIC(C___atomic_load_n,\ - "__atomic_load_n", 1, INTRNATOMIC, kArgTyDynany, kArgTyPtr, kArgTyI32) + "__atomic_load_n", 1, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyDynany, + { kArgTyPtr, kArgTyI32 }) DEF_MIR_INTRINSIC(C___atomic_load,\ - "__atomic_load", 1, INTRNATOMIC, kArgTyVoid, kArgTyPtr, kArgTyPtr, kArgTyI32) + "__atomic_load", 1, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyVoid, + { kArgTyPtr, kArgTyPtr, kArgTyI32 }) DEF_MIR_INTRINSIC(C___atomic_store_n,\ - "__atomic_store_n", 1, INTRNATOMIC, kArgTyVoid, kArgTyPtr, kArgTyDynany, kArgTyI32) + "__atomic_store_n", 1, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyVoid, + { kArgTyPtr, kArgTyDynany, kArgTyI32 }) DEF_MIR_INTRINSIC(C___atomic_store,\ - "__atomic_store", 1, INTRNATOMIC, kArgTyVoid, kArgTyPtr, kArgTyPtr, kArgTyI32) + "__atomic_store", 1, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyVoid, + { kArgTyPtr, kArgTyPtr, kArgTyI32 }) DEF_MIR_INTRINSIC(C___atomic_exchange_n,\ - "__atomic_exchange_n", 2, INTRNATOMIC, kArgTyDynany, kArgTyPtr, kArgTyDynany, kArgTyI32) + "__atomic_exchange_n", 2, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyDynany, + { kArgTyPtr, kArgTyDynany, kArgTyI32 }) DEF_MIR_INTRINSIC(C___atomic_exchange,\ - "__atomic_exchange", 1, INTRNATOMIC, kArgTyVoid, kArgTyPtr, kArgTyPtr, kArgTyPtr, kArgTyI32) + "__atomic_exchange", 1, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyVoid, + { kArgTyPtr, kArgTyPtr, kArgTyPtr, kArgTyI32 }) DEF_MIR_INTRINSIC(C___atomic_add_fetch,\ - "__atomic_add_fetch", DEFAULT_NUM_INSN, INTRNATOMIC, kArgTyDynany, kArgTyPtr, kArgTyDynany, kArgTyI32) + "__atomic_add_fetch", DEFAULT_NUM_INSN, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyDynany, + { kArgTyPtr, kArgTyDynany, kArgTyI32 }) DEF_MIR_INTRINSIC(C___atomic_sub_fetch,\ - "__atomic_sub_fetch", DEFAULT_NUM_INSN, INTRNATOMIC, kArgTyDynany, kArgTyPtr, kArgTyDynany, kArgTyI32) + "__atomic_sub_fetch", DEFAULT_NUM_INSN, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyDynany, + { kArgTyPtr, kArgTyDynany, kArgTyI32 }) DEF_MIR_INTRINSIC(C___atomic_and_fetch,\ - "__atomic_and_fetch", DEFAULT_NUM_INSN, INTRNATOMIC, kArgTyDynany, kArgTyPtr, kArgTyDynany, kArgTyI32) + "__atomic_and_fetch", DEFAULT_NUM_INSN, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyDynany, + { kArgTyPtr, kArgTyDynany, kArgTyI32 }) DEF_MIR_INTRINSIC(C___atomic_xor_fetch,\ - "__atomic_xor_fetch", DEFAULT_NUM_INSN, INTRNATOMIC, kArgTyDynany, kArgTyPtr, kArgTyDynany, kArgTyI32) + "__atomic_xor_fetch", DEFAULT_NUM_INSN, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyDynany, + { kArgTyPtr, kArgTyDynany, kArgTyI32 }) DEF_MIR_INTRINSIC(C___atomic_or_fetch,\ - "__atomic_or_fetch", DEFAULT_NUM_INSN, INTRNATOMIC, kArgTyDynany, kArgTyPtr, kArgTyDynany, kArgTyI32) + "__atomic_or_fetch", DEFAULT_NUM_INSN, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyDynany, + { kArgTyPtr, kArgTyDynany, kArgTyI32 }) DEF_MIR_INTRINSIC(C___atomic_nand_fetch,\ - "__atomic_nand_fetch", DEFAULT_NUM_INSN, INTRNATOMIC, kArgTyDynany, kArgTyPtr, kArgTyDynany, kArgTyI32) + "__atomic_nand_fetch", DEFAULT_NUM_INSN, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyDynany, + { kArgTyPtr, kArgTyDynany, kArgTyI32 }) DEF_MIR_INTRINSIC(C___atomic_fetch_add,\ - "__atomic_fetch_add", DEFAULT_NUM_INSN, INTRNATOMIC, kArgTyDynany, kArgTyPtr, kArgTyDynany, kArgTyI32) + "__atomic_fetch_add", DEFAULT_NUM_INSN, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyDynany, + { kArgTyPtr, kArgTyDynany, kArgTyI32 }) DEF_MIR_INTRINSIC(C___atomic_fetch_sub,\ - "__atomic_fetch_sub", DEFAULT_NUM_INSN, INTRNATOMIC, kArgTyDynany, kArgTyPtr, kArgTyDynany, kArgTyI32) + "__atomic_fetch_sub", DEFAULT_NUM_INSN, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyDynany, + { kArgTyPtr, kArgTyDynany, kArgTyI32 }) DEF_MIR_INTRINSIC(C___atomic_fetch_and,\ - "__atomic_fetch_and", DEFAULT_NUM_INSN, INTRNATOMIC, kArgTyDynany, kArgTyPtr, kArgTyDynany, kArgTyI32) + "__atomic_fetch_and", DEFAULT_NUM_INSN, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyDynany, + { kArgTyPtr, kArgTyDynany, kArgTyI32 }) DEF_MIR_INTRINSIC(C___atomic_fetch_xor,\ - "__atomic_fetch_xor", DEFAULT_NUM_INSN, INTRNATOMIC, kArgTyDynany, kArgTyPtr, kArgTyDynany, kArgTyI32) + "__atomic_fetch_xor", DEFAULT_NUM_INSN, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyDynany, + { kArgTyPtr, kArgTyDynany, kArgTyI32 }) DEF_MIR_INTRINSIC(C___atomic_fetch_or,\ - "__atomic_fetch_or", DEFAULT_NUM_INSN, INTRNATOMIC, kArgTyDynany, kArgTyPtr, kArgTyDynany, kArgTyI32) + "__atomic_fetch_or", DEFAULT_NUM_INSN, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyDynany, + { kArgTyPtr, kArgTyDynany, kArgTyI32 }) DEF_MIR_INTRINSIC(C___atomic_fetch_nand,\ - "__atomic_fetch_nand", DEFAULT_NUM_INSN, INTRNATOMIC, kArgTyDynany, kArgTyPtr, kArgTyDynany, kArgTyI32) + "__atomic_fetch_nand", DEFAULT_NUM_INSN, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyDynany, + { kArgTyPtr, kArgTyDynany, kArgTyI32 }) DEF_MIR_INTRINSIC(C___atomic_test_and_set,\ - "__atomic_test_and_set", DEFAULT_NUM_INSN, INTRNATOMIC, kArgTyU1, kArgTyPtr, kArgTyI32) + "__atomic_test_and_set", DEFAULT_NUM_INSN, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU1, + { kArgTyPtr, kArgTyI32 }) DEF_MIR_INTRINSIC(C___atomic_clear,\ - "__atomic_clear", DEFAULT_NUM_INSN, INTRNATOMIC, kArgTyVoid, kArgTyPtr, kArgTyI32) + "__atomic_clear", DEFAULT_NUM_INSN, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyVoid, + { kArgTyPtr, kArgTyI32 }) DEF_MIR_INTRINSIC(C___atomic_thread_fence,\ - "__atomic_thread_fence", DEFAULT_NUM_INSN, INTRNATOMIC, kArgTyVoid, kArgTyI32) + "__atomic_thread_fence", DEFAULT_NUM_INSN, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyVoid, + { kArgTyI32 }) DEF_MIR_INTRINSIC(C___atomic_signal_fence,\ - "__atomic_signal_fence", DEFAULT_NUM_INSN, INTRNATOMIC, kArgTyVoid, kArgTyI32) + "__atomic_signal_fence", DEFAULT_NUM_INSN, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyVoid, + { kArgTyI32 }) DEF_MIR_INTRINSIC(C___atomic_always_lock_free,\ - "__atomic_always_lock_free", DEFAULT_NUM_INSN, INTRNATOMIC, kArgTyU1, kArgTyU64, kArgTyPtr) + "__atomic_always_lock_free", DEFAULT_NUM_INSN, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU1, + { kArgTyU64, kArgTyPtr }) DEF_MIR_INTRINSIC(C___atomic_is_lock_free,\ - "__atomic_is_lock_free", DEFAULT_NUM_INSN, INTRNATOMIC, kArgTyU1, kArgTyU64, kArgTyPtr) + "__atomic_is_lock_free", DEFAULT_NUM_INSN, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU1, + { kArgTyU64, kArgTyPtr }) DEF_MIR_INTRINSIC(C___atomic_compare_exchange_n,\ - "__atomic_compare_exchange_n", DEFAULT_NUM_INSN, INTRNATOMIC, kArgTyU1, kArgTyPtr, kArgTyPtr, kArgTyDynany, kArgTyU1, kArgTyI32, kArgTyI32) + "__atomic_compare_exchange_n", DEFAULT_NUM_INSN, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU1, + { kArgTyPtr, kArgTyPtr, kArgTyDynany, kArgTyU1, kArgTyI32, kArgTyI32 }) DEF_MIR_INTRINSIC(C___atomic_compare_exchange,\ - "__atomic_compare_exchange", DEFAULT_NUM_INSN, INTRNATOMIC, kArgTyU1, kArgTyPtr, kArgTyPtr, kArgTyPtr, kArgTyU1, kArgTyI32, kArgTyI32) + "__atomic_compare_exchange", DEFAULT_NUM_INSN, INTRNISCBUILTIN | INTRNATOMIC | INTRNMEMBARRIER, kArgTyU1, + { kArgTyPtr, kArgTyPtr, kArgTyPtr, kArgTyU1, kArgTyI32, kArgTyI32 }) DEF_MIR_INTRINSIC(C___tls_get_tbss_anchor,\ - "__tls_get_tbss_anchor", 5, INTRNATOMIC , kArgTyU64) + "__tls_get_tbss_anchor", 5, INTRNISCBUILTIN | INTRNMEMBARRIER, { kArgTyU64, AliasLevelInfo::kAliasGlobal }, {}) DEF_MIR_INTRINSIC(C___tls_get_tdata_anchor,\ - "__tls_get_tdata_anchor", 5, INTRNATOMIC , kArgTyU64) \ No newline at end of file + "__tls_get_tdata_anchor", 5, INTRNISCBUILTIN | INTRNMEMBARRIER, { kArgTyU64, AliasLevelInfo::kAliasGlobal }, {}) diff --git a/src/mapleall/maple_ir/include/intrinsic_dai.def b/src/mapleall/maple_ir/include/intrinsic_dai.def index b1c398a7a5..1a190ac98c 100644 --- a/src/mapleall/maple_ir/include/intrinsic_dai.def +++ b/src/mapleall/maple_ir/include/intrinsic_dai.def @@ -1,20 +1,30 @@ DEF_MIR_INTRINSIC(MCC_DeferredConstClass,\ - "MCC_DeferredConstClass", DEFAULT_NUM_INSN, INTRNISJAVA, kArgTyRef, kArgTyRef, kArgTyRef, kArgTyRef) + "MCC_DeferredConstClass", DEFAULT_NUM_INSN, INTRNISJAVA, kArgTyRef, \ + { kArgTyRef, kArgTyRef, kArgTyRef }) DEF_MIR_INTRINSIC(MCC_DeferredInstanceOf,\ - "MCC_DeferredInstanceOf", DEFAULT_NUM_INSN, INTRNISJAVA, kArgTyU1, kArgTyRef, kArgTyRef, kArgTyRef, kArgTyRef) + "MCC_DeferredInstanceOf", DEFAULT_NUM_INSN, INTRNISJAVA, kArgTyU1, \ + { kArgTyRef, kArgTyRef, kArgTyRef, kArgTyRef }) DEF_MIR_INTRINSIC(MCC_DeferredCheckCast,\ - "MCC_DeferredCheckCast", DEFAULT_NUM_INSN, INTRNISJAVA, kArgTyRef, kArgTyRef, kArgTyRef, kArgTyRef, kArgTyRef) + "MCC_DeferredCheckCast", DEFAULT_NUM_INSN, INTRNISJAVA, kArgTyRef, \ + { kArgTyRef, kArgTyRef, kArgTyRef, kArgTyRef }) DEF_MIR_INTRINSIC(MCC_DeferredNewInstance,\ - "MCC_DeferredNewInstance", DEFAULT_NUM_INSN, INTRNISJAVA, kArgTyRef, kArgTyRef, kArgTyRef, kArgTyRef) + "MCC_DeferredNewInstance", DEFAULT_NUM_INSN, INTRNISJAVA, kArgTyRef, \ + { kArgTyRef, kArgTyRef, kArgTyRef }) DEF_MIR_INTRINSIC(MCC_DeferredNewArray,\ - "MCC_DeferredNewArray", DEFAULT_NUM_INSN, INTRNISJAVA, kArgTyRef, kArgTyRef, kArgTyRef, kArgTyRef, kArgTyI32) + "MCC_DeferredNewArray", DEFAULT_NUM_INSN, INTRNISJAVA, kArgTyRef, \ + { kArgTyRef, kArgTyRef, kArgTyRef, kArgTyI32 }) DEF_MIR_INTRINSIC(MCC_DeferredFillNewArray,\ - "MCC_DeferredFillNewArray", DEFAULT_NUM_INSN, INTRNISJAVA, kArgTyRef, kArgTyRef, kArgTyRef, kArgTyRef, kArgTyI32, kArgTyDynany, kArgTyDynany) + "MCC_DeferredFillNewArray", DEFAULT_NUM_INSN, INTRNISJAVA, kArgTyRef, \ + { kArgTyRef, kArgTyRef, kArgTyRef, kArgTyI32, kArgTyDynany, kArgTyDynany }) DEF_MIR_INTRINSIC(MCC_DeferredLoadField,\ - "MCC_DeferredLoadField", DEFAULT_NUM_INSN, INTRNISJAVA, kArgTyDynany, kArgTyRef, kArgTyRef, kArgTyRef, kArgTyRef, kArgTyRef, kArgTyRef) + "MCC_DeferredLoadField", DEFAULT_NUM_INSN, INTRNISJAVA, kArgTyDynany, \ + { kArgTyRef, kArgTyRef, kArgTyRef, kArgTyRef, kArgTyRef, kArgTyRef }) DEF_MIR_INTRINSIC(MCC_DeferredStoreField,\ - "MCC_DeferredStoreField", DEFAULT_NUM_INSN, INTRNISJAVA, kArgTyVoid, kArgTyRef, kArgTyRef, kArgTyRef, kArgTyRef, kArgTyRef, kArgTyRef, kArgTyRef) + "MCC_DeferredStoreField", DEFAULT_NUM_INSN, INTRNISJAVA, kArgTyVoid, \ + { kArgTyRef, kArgTyRef, kArgTyRef, kArgTyRef, kArgTyRef, kArgTyRef, kArgTyRef }) DEF_MIR_INTRINSIC(MCC_DeferredInvoke,\ - "MCC_DeferredInvoke", DEFAULT_NUM_INSN, INTRNISJAVA, kArgTyDynany, kArgTyRef, kArgTyI32, kArgTyRef, kArgTyRef, kArgTyRef, kArgTyRef) + "MCC_DeferredInvoke", DEFAULT_NUM_INSN, INTRNISJAVA, kArgTyDynany, \ + { kArgTyRef, kArgTyI32, kArgTyRef, kArgTyRef, kArgTyRef, kArgTyRef }) DEF_MIR_INTRINSIC(MCC_DeferredClinitCheck,\ - "MCC_DeferredClinitCheck", DEFAULT_NUM_INSN, INTRNISJAVA, kArgTyVoid, kArgTyRef, kArgTyRef, kArgTyRef) + "MCC_DeferredClinitCheck", DEFAULT_NUM_INSN, INTRNISJAVA, kArgTyVoid, \ + { kArgTyRef, kArgTyRef, kArgTyRef }) diff --git a/src/mapleall/maple_ir/include/intrinsic_java.def b/src/mapleall/maple_ir/include/intrinsic_java.def index f49b138b40..1d87872bd7 100644 --- a/src/mapleall/maple_ir/include/intrinsic_java.def +++ b/src/mapleall/maple_ir/include/intrinsic_java.def @@ -1,5 +1,5 @@ /* - * Copyright (c) [2019] Huawei Technologies Co.,Ltd.All rights reserved. + * Copyright (c) [2023] Huawei Technologies Co.,Ltd.All rights reserved. * * OpenArkCompiler is licensed under the Mulan PSL v1. * You can use this software according to the terms and conditions of the Mulan PSL v1. @@ -12,28 +12,40 @@ * FIT FOR A PARTICULAR PURPOSE. * See the Mulan PSL v1 for more details. */ -// DEF_MIR_INTRINSIC(STR, NAME, NUM_INSN, INTRN_CLASS, RETURN_TYPE, ARG0, ARG1, ARG2, ARG3, ARG4, ARG5) +// DEF_MIR_INTRINSIC(STR, NAME, NUM_INSN, INTRN_CLASS, RETURN_TYPE, { ARG ... }) DEF_MIR_INTRINSIC(JAVA_ARRAY_LENGTH,\ - "__java_array_length", DEFAULT_NUM_INSN, INTRNISJAVA | INTRNNOSIDEEFFECT | INTRNISPURE, kArgTyI32, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__java_array_length", DEFAULT_NUM_INSN, INTRNISJAVA | INTRNNOSIDEEFFECT | INTRNISPURE, kArgTyI32, \ + { kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JAVA_ARRAY_FILL,\ - "__java_array_fill", DEFAULT_NUM_INSN, INTRNISJAVA, kArgTyVoid, kArgTyDynany, kArgTyDynany, kArgTyI32, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__java_array_fill", DEFAULT_NUM_INSN, INTRNISJAVA, kArgTyVoid, \ + { kArgTyDynany, kArgTyDynany, kArgTyI32, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JAVA_FILL_NEW_ARRAY,\ - "__java_fill_new_array", DEFAULT_NUM_INSN, INTRNISJAVA, kArgTyRef, kArgTyI32, kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__java_fill_new_array", DEFAULT_NUM_INSN, INTRNISJAVA, kArgTyRef, \ + { kArgTyI32, kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JAVA_CHECK_CAST,\ - "__java_check_cast", DEFAULT_NUM_INSN, INTRNISJAVA | INTRNNOSIDEEFFECT, kArgTyDynany, kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__java_check_cast", DEFAULT_NUM_INSN, INTRNISJAVA | INTRNNOSIDEEFFECT, kArgTyDynany, \ + { kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JAVA_CONST_CLASS,\ - "__java_const_class", DEFAULT_NUM_INSN, INTRNISJAVA, kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__java_const_class", DEFAULT_NUM_INSN, INTRNISJAVA, kArgTyDynany, \ + { kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JAVA_INSTANCE_OF,\ - "__java_instance_of", DEFAULT_NUM_INSN, INTRNISJAVA, kArgTyU1, kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__java_instance_of", DEFAULT_NUM_INSN, INTRNISJAVA, kArgTyU1, \ + { kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JAVA_ISASSIGNABLEFROM,\ - "__java_isAssignableFrom", DEFAULT_NUM_INSN, INTRNISJAVA, kArgTyU1, kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__java_isAssignableFrom", DEFAULT_NUM_INSN, INTRNISJAVA, kArgTyU1, \ + { kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JAVA_MERGE,\ - "__java_merge", DEFAULT_NUM_INSN, INTRNISJAVA, kArgTyPtr, kArgTyDynany, kArgTyDynany, kArgTyDynany, kArgTyDynany, kArgTyDynany, kArgTyUndef) + "__java_merge", DEFAULT_NUM_INSN, INTRNISJAVA, kArgTyPtr, \ + { kArgTyDynany, kArgTyDynany, kArgTyDynany, kArgTyDynany, kArgTyDynany, kArgTyUndef }) DEF_MIR_INTRINSIC(JAVA_CLINIT_CHECK,\ - "__java_clinit_check", DEFAULT_NUM_INSN, INTRNISJAVA | INTRNNOSIDEEFFECT, kArgTyVoid, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__java_clinit_check", DEFAULT_NUM_INSN, INTRNISJAVA | INTRNNOSIDEEFFECT, kArgTyVoid, \ + { kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JAVA_POLYMORPHIC_CALL,\ - "__java_polymorphic_call", DEFAULT_NUM_INSN, INTRNISJAVA, kArgTyDynany, kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__java_polymorphic_call", DEFAULT_NUM_INSN, INTRNISJAVA, kArgTyDynany, \ + { kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JAVA_THROW_ARITHMETIC,\ - "MCC_ThrowArithmeticException", DEFAULT_NUM_INSN, INTRNISJAVA | INTRNNEVERRETURN, kArgTyVoid, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "MCC_ThrowArithmeticException", DEFAULT_NUM_INSN, INTRNISJAVA | INTRNNEVERRETURN, kArgTyVoid, \ + { kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JAVA_GET_CLASS,\ - "MCC_GetClass", DEFAULT_NUM_INSN, INTRNISJAVA | INTRNNOSIDEEFFECT, kArgTyPtr, kArgTyPtr, kArgTyPtr, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) \ No newline at end of file + "MCC_GetClass", DEFAULT_NUM_INSN, INTRNISJAVA | INTRNNOSIDEEFFECT, kArgTyPtr, \ + { kArgTyPtr, kArgTyPtr, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) diff --git a/src/mapleall/maple_ir/include/intrinsic_js.def b/src/mapleall/maple_ir/include/intrinsic_js.def index e366aff88e..87367cbdcd 100644 --- a/src/mapleall/maple_ir/include/intrinsic_js.def +++ b/src/mapleall/maple_ir/include/intrinsic_js.def @@ -1,5 +1,5 @@ /* - * Copyright (c) [2021] Huawei Technologies Co., Ltd. All rights reserved. + * Copyright (c) [2023] Huawei Technologies Co., Ltd. All rights reserved. * * OpenArkCompiler is licensed under the Mulan Permissive Software License v2. * You can use this software according to the terms and conditions of the MulanPSL - 2.0. @@ -13,106 +13,157 @@ * See the MulanPSL - 2.0 for more details. */ -// DEF_MIR_INTRINSIC(STR, NAME, NUM_INSN, INTRN_CLASS, RETURN_TYPE, ARG0, ARG1, ARG2, ARG3, ARG4, ARG5) +// DEF_MIR_INTRINSIC(STR, NAME, NUM_INSN, INTRN_CLASS, RETURN_TYPE, { ARG ... }) DEF_MIR_INTRINSIC(JS_INIT_CONTEXT,\ - "__js_init_context", DEFAULT_NUM_INSN, INTRNISJS, kArgTyVoid, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__js_init_context", DEFAULT_NUM_INSN, INTRNISJS, kArgTyVoid, \ + { kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JS_REQUIRE,\ - "__js_require", DEFAULT_NUM_INSN, INTRNISJS | INTRNNOSIDEEFFECT, kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__js_require", DEFAULT_NUM_INSN, INTRNISJS | INTRNNOSIDEEFFECT, kArgTyDynany, \ + { kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JS_GET_BIOBJECT,\ - "__jsobj_get_or_create_builtin", DEFAULT_NUM_INSN, INTRNISJS | INTRNISPURE, kArgTySimpleobj, kArgTyU32, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__jsobj_get_or_create_builtin", DEFAULT_NUM_INSN, INTRNISJS | INTRNISPURE, kArgTySimpleobj, \ + { kArgTyU32, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JS_GET_BISTRING,\ - "__jsstr_get_builtin", DEFAULT_NUM_INSN, INTRNISJS | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTySimplestr, kArgTyU32, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__jsstr_get_builtin", DEFAULT_NUM_INSN, INTRNISJS | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTySimplestr, \ + { kArgTyU32, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JSOP_THIS,\ - "__jsop_this", DEFAULT_NUM_INSN, INTRNISJS | INTRNNOSIDEEFFECT, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__jsop_this", DEFAULT_NUM_INSN, INTRNISJS | INTRNNOSIDEEFFECT, kArgTyDynany, \ + { kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JSOP_ADD,\ - "__jsop_add", DEFAULT_NUM_INSN, INTRNISJS | INTRNISJSBINARY | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyDynany, kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__jsop_add", DEFAULT_NUM_INSN, INTRNISJS | INTRNISJSBINARY | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyDynany, \ + { kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JSOP_CONCAT,\ - "__jsstr_concat_2", DEFAULT_NUM_INSN, INTRNISJS | INTRNISJSBINARY | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTySimplestr, kArgTySimplestr, kArgTySimplestr, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__jsstr_concat_2", DEFAULT_NUM_INSN, INTRNISJS | INTRNISJSBINARY | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTySimplestr, \ + { kArgTySimplestr, kArgTySimplestr, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JSOP_STRICTEQ,\ - "__jsop_stricteq", DEFAULT_NUM_INSN, INTRNISJS | INTRNISJSBINARY | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU1, kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__jsop_stricteq", DEFAULT_NUM_INSN, INTRNISJS | INTRNISJSBINARY | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU1, \ + { kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JSSTR_STRICTEQ,\ - "__jsstr_equal", DEFAULT_NUM_INSN, INTRNISJS | INTRNISJSBINARY | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU1, kArgTySimplestr, kArgTySimplestr, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__jsstr_equal", DEFAULT_NUM_INSN, INTRNISJS | INTRNISJSBINARY | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU1, \ + { kArgTySimplestr, kArgTySimplestr, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JSOP_STRICTNE,\ - "__jsop_strictne", DEFAULT_NUM_INSN, INTRNISJS | INTRNISJSBINARY | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU1, kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__jsop_strictne", DEFAULT_NUM_INSN, INTRNISJS | INTRNISJSBINARY | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU1, \ + { kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JSSTR_STRICTNE,\ - "__jsstr_ne", DEFAULT_NUM_INSN, INTRNISJS | INTRNISJSBINARY | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU1, kArgTySimplestr, kArgTySimplestr, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__jsstr_ne", DEFAULT_NUM_INSN, INTRNISJS | INTRNISJSBINARY | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU1, \ + { kArgTySimplestr, kArgTySimplestr, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JSOP_INSTANCEOF,\ - "__jsop_instanceof", DEFAULT_NUM_INSN, INTRNISJS | INTRNISJSBINARY | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU1, kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__jsop_instanceof", DEFAULT_NUM_INSN, INTRNISJS | INTRNISJSBINARY | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU1, \ + { kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JSOP_IN,\ - "__jsop_in", DEFAULT_NUM_INSN, INTRNISJS | INTRNISJSBINARY | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU1, kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__jsop_in", DEFAULT_NUM_INSN, INTRNISJS | INTRNISJSBINARY | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU1, \ + { kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JSOP_OR,\ - "__jsop_or", DEFAULT_NUM_INSN, INTRNISJS | INTRNISJSBINARY | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI32, kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__jsop_or", DEFAULT_NUM_INSN, INTRNISJS | INTRNISJSBINARY | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI32, \ + { kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JSOP_AND,\ - "__jsop_and", DEFAULT_NUM_INSN, INTRNISJS | INTRNISJSBINARY | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI32, kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__jsop_and", DEFAULT_NUM_INSN, INTRNISJS | INTRNISJSBINARY | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI32, \ + { kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JSOP_TYPEOF,\ - "__jsop_typeof", DEFAULT_NUM_INSN, INTRNISJS | INTRNISJSUNARY | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__jsop_typeof", DEFAULT_NUM_INSN, INTRNISJS | INTRNISJSUNARY | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyDynany, \ + { kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JS_NEW,\ - "__js_new", DEFAULT_NUM_INSN, INTRNISJS | INTRNNOSIDEEFFECT, kArgTyPtr, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__js_new", DEFAULT_NUM_INSN, INTRNISJS | INTRNNOSIDEEFFECT, kArgTyPtr, \ + { kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JS_STRING,\ - "__js_ToString", DEFAULT_NUM_INSN, INTRNISJS | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTySimplestr, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__js_ToString", DEFAULT_NUM_INSN, INTRNISJS | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTySimplestr, \ + { kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JSSTR_LENGTH,\ - "__jsstr_get_length", DEFAULT_NUM_INSN, INTRNISJS | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU32, kArgTySimplestr, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__jsstr_get_length", DEFAULT_NUM_INSN, INTRNISJS | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU32, \ + { kArgTySimplestr, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JS_BOOLEAN,\ - "__js_ToBoolean", DEFAULT_NUM_INSN, INTRNISJS | INTRNISJSUNARY | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU1, kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__js_ToBoolean", DEFAULT_NUM_INSN, INTRNISJS | INTRNISJSUNARY | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU1, \ + { kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JS_NUMBER,\ - "__js_ToNumber", DEFAULT_NUM_INSN, INTRNISJS | INTRNISJSUNARY | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI32, kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__js_ToNumber", DEFAULT_NUM_INSN, INTRNISJS | INTRNISJSUNARY | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI32, \ + { kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JS_INT32,\ - "__js_ToInt32", DEFAULT_NUM_INSN, INTRNISJS | INTRNISJSUNARY | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI32, kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__js_ToInt32", DEFAULT_NUM_INSN, INTRNISJS | INTRNISJSUNARY | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI32, \ + { kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JS_PRINT,\ - "__jsop_print", DEFAULT_NUM_INSN, INTRNISJS | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyDynany, kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__jsop_print", DEFAULT_NUM_INSN, INTRNISJS | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyDynany, \ + { kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JS_ERROR,\ - "__js_error", DEFAULT_NUM_INSN, INTRNISJS | INTRNISPURE | INTRNNOSIDEEFFECT | INTRNNEVERRETURN, kArgTyDynany, kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__js_error", DEFAULT_NUM_INSN, INTRNISJS | INTRNISPURE | INTRNNOSIDEEFFECT | INTRNNEVERRETURN, kArgTyDynany, \ + { kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JS_EVAL,\ - "__js_eval", DEFAULT_NUM_INSN, kIntrnUndef, kArgTyDynany, kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__js_eval", DEFAULT_NUM_INSN, kIntrnUndef, kArgTyDynany, \ + { kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JS_ICALL,\ - "__js_icall", DEFAULT_NUM_INSN, INTRNISJS | INTRNRETURNSTRUCT, kArgTyDynany, kArgTyA32, kArgTyU32, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__js_icall", DEFAULT_NUM_INSN, INTRNISJS | INTRNRETURNSTRUCT, kArgTyDynany, \ + { kArgTyA32, kArgTyU32, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JSOP_CALL, - "__jsop_call", DEFAULT_NUM_INSN, INTRNISJS, kArgTyDynany, kArgTyDynany, kArgTyDynany, kArgTyPtr, kArgTyU32, kArgTyUndef, kArgTyUndef) + "__jsop_call", DEFAULT_NUM_INSN, INTRNISJS, kArgTyDynany, \ + { kArgTyDynany, kArgTyDynany, kArgTyPtr, kArgTyU32, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JSOP_CCALL,\ - "__jsop_ccall", DEFAULT_NUM_INSN, INTRNISJS, kArgTyDynany, kArgTyDynany, kArgTyDynany, kArgTyPtr, kArgTyU32, kArgTyUndef, kArgTyUndef) + "__jsop_ccall", DEFAULT_NUM_INSN, INTRNISJS, kArgTyDynany, \ + { kArgTyDynany, kArgTyDynany, kArgTyPtr, kArgTyU32, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JSOP_NEW, - "__jsop_new", DEFAULT_NUM_INSN, INTRNISJS | INTRNNOSIDEEFFECT, kArgTyDynany, kArgTyDynany, kArgTyDynany, kArgTyPtr, kArgTyU32, kArgTyUndef, kArgTyUndef) + "__jsop_new", DEFAULT_NUM_INSN, INTRNISJS | INTRNNOSIDEEFFECT, kArgTyDynany, \ + { kArgTyDynany, kArgTyDynany, kArgTyPtr, kArgTyU32, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JS_SETTIMEOUT, - "__js_setTimeout", DEFAULT_NUM_INSN, INTRNISJS | INTRNNOSIDEEFFECT, kArgTyDynany, kArgTyDynany, kArgTyI32, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__js_setTimeout", DEFAULT_NUM_INSN, INTRNISJS | INTRNNOSIDEEFFECT, kArgTyDynany, \ + { kArgTyDynany, kArgTyI32, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JS_SETCYCLEHEADER,\ - "__js_setCycleHeader", DEFAULT_NUM_INSN, INTRNISJS, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__js_setCycleHeader", DEFAULT_NUM_INSN, INTRNISJS, kArgTyDynany, \ + { kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JS_NEW_OBJECT_0,\ - "__js_new_obj_obj_0", DEFAULT_NUM_INSN, INTRNISJS | INTRNNOSIDEEFFECT, kArgTySimpleobj, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__js_new_obj_obj_0", DEFAULT_NUM_INSN, INTRNISJS | INTRNNOSIDEEFFECT, kArgTySimpleobj, \ + { kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JS_NEW_OBJECT_1,\ - "__js_new_obj_obj_1", DEFAULT_NUM_INSN, INTRNISJS | INTRNNOSIDEEFFECT, kArgTySimpleobj, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__js_new_obj_obj_1", DEFAULT_NUM_INSN, INTRNISJS | INTRNNOSIDEEFFECT, kArgTySimpleobj, \ + { kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JSOP_SETPROP,\ - "__jsop_setprop", DEFAULT_NUM_INSN, INTRNISJS, kArgTyVoid, kArgTyDynany, kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__jsop_setprop", DEFAULT_NUM_INSN, INTRNISJS, kArgTyVoid, \ + { kArgTyDynany, kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JSOP_GETPROP,\ - "__jsop_getprop", DEFAULT_NUM_INSN, INTRNISJS | INTRNLOADMEM | INTRNNOSIDEEFFECT, kArgTyDynany, kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__jsop_getprop", DEFAULT_NUM_INSN, INTRNISJS | INTRNLOADMEM | INTRNNOSIDEEFFECT, kArgTyDynany, \ + { kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JSOP_DELPROP,\ - "__jsop_delprop", DEFAULT_NUM_INSN, INTRNISJS, kArgTyDynany, kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__jsop_delprop", DEFAULT_NUM_INSN, INTRNISJS, kArgTyDynany, \ + { kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JSOP_SETPROP_BY_NAME,\ - "__jsop_setprop_by_name", DEFAULT_NUM_INSN, INTRNISJS, kArgTyVoid, kArgTyDynany, kArgTySimplestr, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__jsop_setprop_by_name", DEFAULT_NUM_INSN, INTRNISJS, kArgTyVoid, \ + { kArgTyDynany, kArgTySimplestr, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JSOP_GETPROP_BY_NAME,\ - "__jsop_getprop_by_name", DEFAULT_NUM_INSN, INTRNISJS | INTRNLOADMEM | INTRNNOSIDEEFFECT, kArgTyDynany, kArgTyDynany, kArgTySimplestr, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__jsop_getprop_by_name", DEFAULT_NUM_INSN, INTRNISJS | INTRNLOADMEM | INTRNNOSIDEEFFECT, kArgTyDynany, \ + { kArgTyDynany, kArgTySimplestr, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JSOP_SETPROP_BY_INDEX,\ - "__jsop_setprop_by_index", DEFAULT_NUM_INSN, INTRNISJS, kArgTyVoid, kArgTyDynany, kArgTyU32, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__jsop_setprop_by_index", DEFAULT_NUM_INSN, INTRNISJS, kArgTyVoid, \ + { kArgTyDynany, kArgTyU32, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JSOP_GETPROP_BY_INDEX,\ - "__jsop_getprop_by_index", DEFAULT_NUM_INSN, INTRNISJS | INTRNLOADMEM | INTRNNOSIDEEFFECT, kArgTyDynany, kArgTyDynany, kArgTyU32, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__jsop_getprop_by_index", DEFAULT_NUM_INSN, INTRNISJS | INTRNLOADMEM | INTRNNOSIDEEFFECT, kArgTyDynany, \ + { kArgTyDynany, kArgTyU32, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JSOP_INITPROP_BY_NAME,\ - "__jsop_initprop", DEFAULT_NUM_INSN, INTRNISJS, kArgTyVoid, kArgTyDynany, kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__jsop_initprop", DEFAULT_NUM_INSN, INTRNISJS, kArgTyVoid, \ + { kArgTyDynany, kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JSOP_INITPROP_GETTER,\ - "__jsop_initprop_getter", DEFAULT_NUM_INSN, INTRNISJS, kArgTyDynany, kArgTyDynany, kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__jsop_initprop_getter", DEFAULT_NUM_INSN, INTRNISJS, kArgTyDynany, \ + { kArgTyDynany, kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JSOP_INITPROP_SETTER,\ - "__jsop_initprop_setter", DEFAULT_NUM_INSN, INTRNISJS, kArgTyDynany, kArgTyDynany, kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__jsop_initprop_setter", DEFAULT_NUM_INSN, INTRNISJS, kArgTyDynany, \ + { kArgTyDynany, kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JS_NEW_FUNCTION,\ - "__js_new_function", DEFAULT_NUM_INSN, INTRNISJS, kArgTyDynany, kArgTyPtr, kArgTyPtr, kArgTyU32, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__js_new_function", DEFAULT_NUM_INSN, INTRNISJS, kArgTyDynany, \ + { kArgTyPtr, kArgTyPtr, kArgTyU32, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JS_NEW_ARR_ELEMS,\ - "__js_new_arr_elems", DEFAULT_NUM_INSN, INTRNISJS | INTRNNOSIDEEFFECT, kArgTySimpleobj, kArgTyPtr, kArgTyU32, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__js_new_arr_elems", DEFAULT_NUM_INSN, INTRNISJS | INTRNNOSIDEEFFECT, kArgTySimpleobj, \ + { kArgTyPtr, kArgTyU32, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JS_NEW_ARR_LENGTH,\ - "__js_new_arr_length", DEFAULT_NUM_INSN, INTRNISJS | INTRNNOSIDEEFFECT, kArgTySimpleobj, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__js_new_arr_length", DEFAULT_NUM_INSN, INTRNISJS | INTRNNOSIDEEFFECT, kArgTySimpleobj, \ + { kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JSOP_LENGTH,\ - "__jsop_length", DEFAULT_NUM_INSN, INTRNISJS | INTRNLOADMEM | INTRNNOSIDEEFFECT | INTRNISPURE, kArgTyI32, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__jsop_length", DEFAULT_NUM_INSN, INTRNISJS | INTRNLOADMEM | INTRNNOSIDEEFFECT | INTRNISPURE, kArgTyI32, \ + { kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JSOP_NEW_ITERATOR,\ - "__jsop_valueto_iterator", DEFAULT_NUM_INSN, INTRNISJS, kArgTyPtr, kArgTyDynany, kArgTyU32, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__jsop_valueto_iterator", DEFAULT_NUM_INSN, INTRNISJS, kArgTyPtr, \ + { kArgTyDynany, kArgTyU32, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JSOP_NEXT_ITERATOR,\ - "__jsop_iterator_next", DEFAULT_NUM_INSN, INTRNISJS, kArgTyDynany, kArgTyPtr, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__jsop_iterator_next", DEFAULT_NUM_INSN, INTRNISJS, kArgTyDynany, \ + { kArgTyPtr, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JSOP_MORE_ITERATOR,\ - "__jsop_more_iterator", DEFAULT_NUM_INSN, INTRNISJS, kArgTyU32, kArgTyPtr, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__jsop_more_iterator", DEFAULT_NUM_INSN, INTRNISJS, kArgTyU32, \ + { kArgTyPtr, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JS_ADDSYSEVENTLISTENER,\ - "__js_add_sysevent_listener", DEFAULT_NUM_INSN, INTRNISJS, kArgTyU32, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) \ No newline at end of file + "__js_add_sysevent_listener", DEFAULT_NUM_INSN, INTRNISJS, kArgTyU32, \ + { kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) diff --git a/src/mapleall/maple_ir/include/intrinsic_js_eng.def b/src/mapleall/maple_ir/include/intrinsic_js_eng.def index f21cda4431..5aae3b72c1 100644 --- a/src/mapleall/maple_ir/include/intrinsic_js_eng.def +++ b/src/mapleall/maple_ir/include/intrinsic_js_eng.def @@ -1,5 +1,5 @@ /* - * Copyright (c) [2021] Huawei Technologies Co., Ltd. All rights reserved. + * Copyright (c) [2023] Huawei Technologies Co., Ltd. All rights reserved. * * OpenArkCompiler is licensed under the Mulan Permissive Software License v2. * You can use this software according to the terms and conditions of the MulanPSL - 2.0. @@ -13,22 +13,31 @@ * See the MulanPSL - 2.0 for more details. */ -// DEF_MIR_INTRINSIC(STR, NAME, INTRN_CLASS, RETURN_TYPE, ARG0, ARG1, ARG2, ARG3, ARG4, ARG5) +// DEF_MIR_INTRINSIC(STR, NAME, INTRN_CLASS, RETURN_TYPE, { ARG ... }) DEF_MIR_INTRINSIC(JS_GET_ARGUMENTOBJECT,\ - "__jsobj_get_or_create_argument", INTRNISJS | INTRNISPURE, kArgTySimpleobj, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__jsobj_get_or_create_argument", DEFAULT_NUM_INSN, INTRNISJS | INTRNISPURE, kArgTySimpleobj, \ + { kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JS_GET_ERROR_OBJECT,\ - "__jsobj_get_or_create_error", INTRNISJS | INTRNISPURE, kArgTySimpleobj, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__jsobj_get_or_create_error", DEFAULT_NUM_INSN, INTRNISJS | INTRNISPURE, kArgTySimpleobj, \ + { kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JS_GET_EVALERROR_OBJECT,\ - "__jsobj_get_or_create_evalError", INTRNISJS | INTRNISPURE, kArgTySimpleobj, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__jsobj_get_or_create_evalError", DEFAULT_NUM_INSN, INTRNISJS | INTRNISPURE, kArgTySimpleobj, \ + { kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JS_GET_RANGEERROR_OBJECT,\ - "__jsobj_get_or_create_rangeError", INTRNISJS | INTRNISPURE, kArgTySimpleobj, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__jsobj_get_or_create_rangeError", DEFAULT_NUM_INSN, INTRNISJS | INTRNISPURE, kArgTySimpleobj, \ + { kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JS_GET_REFERENCEERROR_OBJECT,\ - "__jsobj_get_or_create_referenceError", INTRNISJS | INTRNISPURE, kArgTySimpleobj, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__jsobj_get_or_create_referenceError", DEFAULT_NUM_INSN, INTRNISJS | INTRNISPURE, kArgTySimpleobj, \ + { kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JS_GET_SYNTAXERROR_OBJECT,\ - "__jsobj_get_or_create_syntaxError", INTRNISJS | INTRNISPURE, kArgTySimpleobj, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__jsobj_get_or_create_syntaxError", DEFAULT_NUM_INSN, INTRNISJS | INTRNISPURE, kArgTySimpleobj, \ + { kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JS_GET_TYPEERROR_OBJECT,\ - "__jsobj_get_or_create_typeError", INTRNISJS | INTRNISPURE, kArgTySimpleobj, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__jsobj_get_or_create_typeError", DEFAULT_NUM_INSN, INTRNISJS | INTRNISPURE, kArgTySimpleobj, \ + { kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JS_GET_URIERROR_OBJECT,\ - "__jsobj_get_or_create_uriError", INTRNISJS | INTRNISPURE, kArgTySimpleobj, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__jsobj_get_or_create_uriError", DEFAULT_NUM_INSN, INTRNISJS | INTRNISPURE, kArgTySimpleobj, \ + { kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(JSOP_ASSERTVALUE, - "__jsop_assert_value", INTRNISJS, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) \ No newline at end of file + "__jsop_assert_value", DEFAULT_NUM_INSN, INTRNISJS, kArgTyDynany, \ + { kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) diff --git a/src/mapleall/maple_ir/include/intrinsic_op.h b/src/mapleall/maple_ir/include/intrinsic_op.h index 45efb2cd89..936f9d473d 100644 --- a/src/mapleall/maple_ir/include/intrinsic_op.h +++ b/src/mapleall/maple_ir/include/intrinsic_op.h @@ -15,6 +15,8 @@ #ifndef MAPLE_IR_INCLUDE_INTRINSIC_OP_H #define MAPLE_IR_INCLUDE_INTRINSIC_OP_H +#include "types_def.h" + namespace maple { #define CASE_INTRN_C_SYNC \ case INTRN_C___sync_add_and_fetch_1: \ diff --git a/src/mapleall/maple_ir/include/intrinsic_vector.def b/src/mapleall/maple_ir/include/intrinsic_vector.def index a896661266..84e98d2946 100644 --- a/src/mapleall/maple_ir/include/intrinsic_vector.def +++ b/src/mapleall/maple_ir/include/intrinsic_vector.def @@ -20,652 +20,652 @@ // Create a vector by getting the absolute value of the elements in src. DEF_MIR_INTRINSIC(vector_abs_v8i8, "vector_abs_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I8) + { kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_abs_v4i16, "vector_abs_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16) + { kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_abs_v2i32, "vector_abs_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32) + { kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_abs_v1i64, "vector_abs_v1i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1I64, - kArgTyV1I64) + { kArgTyV1I64 }) DEF_MIR_INTRINSIC(vector_abs_v2f32, "vector_abs_v2f32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2F32, - kArgTyV2F32) + { kArgTyV2F32 }) DEF_MIR_INTRINSIC(vector_abs_v1f64, "vector_abs_v1f64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1F64, - kArgTyV1F64) + { kArgTyV1F64 }) DEF_MIR_INTRINSIC(vector_abs_v16i8, "vector_abs_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV16I8) + { kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_abs_v8i16, "vector_abs_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16) + { kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_abs_v4i32, "vector_abs_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32) + { kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_abs_v2i64, "vector_abs_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64) + { kArgTyV2I64 }) DEF_MIR_INTRINSIC(vector_abs_v4f32, "vector_abs_v4f32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4F32, - kArgTyV4F32) + { kArgTyV4F32 }) DEF_MIR_INTRINSIC(vector_abs_v2f64, "vector_abs_v2f64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2F64, - kArgTyV2F64) + { kArgTyV2F64 }) // vecTy vector_mov_narrow(vecTy src) // copies each element of the operand vector to the corresponding element of the destination vector. // The result element is half the width of the operand element, and values are saturated to the result width. // The results are the same type as the operands. DEF_MIR_INTRINSIC(vector_mov_narrow_v8u16, "vector_mov_narrow_v8u16", 1, - INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, kArgTyV8U16) + INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, { kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_mov_narrow_v4u32, "vector_mov_narrow_v4u32", 1, - INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, kArgTyV4U32) + INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, { kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_mov_narrow_v2u64, "vector_mov_narrow_v2u64", 1, - INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, kArgTyV2U64) + INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, { kArgTyV2U64 }) DEF_MIR_INTRINSIC(vector_mov_narrow_v8i16, "vector_mov_narrow_v8i16", 1, - INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, kArgTyV8I16) + INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, { kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_mov_narrow_v4i32, "vector_mov_narrow_v4i32", 1, - INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, kArgTyV4I32) + INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, { kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_mov_narrow_v2i64, "vector_mov_narrow_v2i64", 1, - INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, kArgTyV2I64) + INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, { kArgTyV2I64 }) // vecTy vector_addl_low(vecTy src1, vecTy src2) // Add each element of the source vector to second source // put the result into the destination vector. DEF_MIR_INTRINSIC(vector_addl_low_v8i8, "vector_addl_low_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I8, kArgTyV8I8) + { kArgTyV8I8, kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_addl_low_v4i16, "vector_addl_low_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I16, kArgTyV4I16) + { kArgTyV4I16, kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_addl_low_v2i32, "vector_addl_low_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I32, kArgTyV2I32) + { kArgTyV2I32, kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_addl_low_v8u8, "vector_addl_low_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U8, kArgTyV8U8) + { kArgTyV8U8, kArgTyV8U8 }) DEF_MIR_INTRINSIC(vector_addl_low_v4u16, "vector_addl_low_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U16, kArgTyV4U16) + { kArgTyV4U16, kArgTyV4U16 }) DEF_MIR_INTRINSIC(vector_addl_low_v2u32, "vector_addl_low_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U32, kArgTyV2U32) + { kArgTyV2U32, kArgTyV2U32 }) // vecTy vector_addl_high(vecTy src1, vecTy src2) // Add each element of the source vector to upper half of second source // put the result into the destination vector. DEF_MIR_INTRINSIC(vector_addl_high_v8i8, "vector_addl_high_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV16I8, kArgTyV16I8) + { kArgTyV16I8, kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_addl_high_v4i16, "vector_addl_high_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV8I16, kArgTyV8I16) + { kArgTyV8I16, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_addl_high_v2i32, "vector_addl_high_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV4I32, kArgTyV4I32) + { kArgTyV4I32, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_addl_high_v8u8, "vector_addl_high_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV16U8, kArgTyV16U8) + { kArgTyV16U8, kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_addl_high_v4u16, "vector_addl_high_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV8U16, kArgTyV8U16) + { kArgTyV8U16, kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_addl_high_v2u32, "vector_addl_high_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV4U32, kArgTyV4U32) + { kArgTyV4U32, kArgTyV4U32 }) // vecTy vector_addw_low(vecTy src1, vecTy src2) // Add each element of the source vector to second source // widen the result into the destination vector. DEF_MIR_INTRINSIC(vector_addw_low_v8i8, "vector_addw_low_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV8I8) + { kArgTyV8I16, kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_addw_low_v4i16, "vector_addw_low_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I16) + { kArgTyV4I32, kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_addw_low_v2i32, "vector_addw_low_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV2I32) + { kArgTyV2I64, kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_addw_low_v8u8, "vector_addw_low_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyV8U8) + { kArgTyV8U16, kArgTyV8U8 }) DEF_MIR_INTRINSIC(vector_addw_low_v4u16, "vector_addw_low_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV4U16) + { kArgTyV4U32, kArgTyV4U16 }) DEF_MIR_INTRINSIC(vector_addw_low_v2u32, "vector_addw_low_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U64, kArgTyV2U32) + { kArgTyV2U64, kArgTyV2U32 }) // vecTy vector_addw_high(vecTy src1, vecTy src2) // Add each element of the source vector to upper half of second source // widen the result into the destination vector. DEF_MIR_INTRINSIC(vector_addw_high_v8i8, "vector_addw_high_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV16I8) + { kArgTyV8I16, kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_addw_high_v4i16, "vector_addw_high_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV8I16) + { kArgTyV4I32, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_addw_high_v2i32, "vector_addw_high_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV4I32) + { kArgTyV2I64, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_addw_high_v8u8, "vector_addw_high_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyV16U8) + { kArgTyV8U16, kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_addw_high_v4u16, "vector_addw_high_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV8U16) + { kArgTyV4U32, kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_addw_high_v2u32, "vector_addw_high_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U64, kArgTyV4U32) + { kArgTyV2U64, kArgTyV4U32 }) // vecTy vector_from_scalar(scalarTy value) // Create a vector by repeating the scalar value for each element in the // vector. DEF_MIR_INTRINSIC(vector_from_scalar_v2i64, "vector_from_scalar_v2i64", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyI64) + { kArgTyI64 }) DEF_MIR_INTRINSIC(vector_from_scalar_v4i32, "vector_from_scalar_v4i32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyI32) + { kArgTyI32 }) DEF_MIR_INTRINSIC(vector_from_scalar_v8i16, "vector_from_scalar_v8i16", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyI16) + { kArgTyI16 }) DEF_MIR_INTRINSIC(vector_from_scalar_v16i8, "vector_from_scalar_v16i8", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyI8) + { kArgTyI8 }) DEF_MIR_INTRINSIC(vector_from_scalar_v2u64, "vector_from_scalar_v2u64", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyU64) + { kArgTyU64 }) DEF_MIR_INTRINSIC(vector_from_scalar_v4u32, "vector_from_scalar_v4u32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyU32) + { kArgTyU32 }) DEF_MIR_INTRINSIC(vector_from_scalar_v8u16, "vector_from_scalar_v8u16", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyU16) + { kArgTyU16 }) DEF_MIR_INTRINSIC(vector_from_scalar_v16u8, "vector_from_scalar_v16u8", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyU8) + { kArgTyU8 }) DEF_MIR_INTRINSIC(vector_from_scalar_v2f64, "vector_from_scalar_v2f64", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2F64, - kArgTyF64) + { kArgTyF64 }) DEF_MIR_INTRINSIC(vector_from_scalar_v4f32, "vector_from_scalar_v4f32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4F32, - kArgTyF32) + { kArgTyF32 }) DEF_MIR_INTRINSIC(vector_from_scalar_v1i64, "vector_from_scalar_v1i64", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1I64, - kArgTyI64) + { kArgTyI64 }) DEF_MIR_INTRINSIC(vector_from_scalar_v2i32, "vector_from_scalar_v2i32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyI32) + { kArgTyI32 }) DEF_MIR_INTRINSIC(vector_from_scalar_v4i16, "vector_from_scalar_v4i16", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyI16) + { kArgTyI16 }) DEF_MIR_INTRINSIC(vector_from_scalar_v8i8, "vector_from_scalar_v8i8", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyI8) + { kArgTyI8 }) DEF_MIR_INTRINSIC(vector_from_scalar_v1u64, "vector_from_scalar_v1u64", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1U64, - kArgTyU64) + { kArgTyU64 }) DEF_MIR_INTRINSIC(vector_from_scalar_v2u32, "vector_from_scalar_v2u32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyU32) + { kArgTyU32 }) DEF_MIR_INTRINSIC(vector_from_scalar_v4u16, "vector_from_scalar_v4u16", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyU16) + { kArgTyU16 }) DEF_MIR_INTRINSIC(vector_from_scalar_v8u8, "vector_from_scalar_v8u8", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyU8) + { kArgTyU8 }) DEF_MIR_INTRINSIC(vector_from_scalar_v1f64, "vector_from_scalar_v1f64", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1F64, - kArgTyF64) + { kArgTyF64 }) DEF_MIR_INTRINSIC(vector_from_scalar_v2f32, "vector_from_scalar_v2f32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2F32, - kArgTyF32) + { kArgTyF32 }) // vecTy2 vector_labssub(vectTy1 src2, vectTy2 src2) // Create a widened vector by getting the abs value of subtracted arguments. DEF_MIR_INTRINSIC(vector_labssub_low_v8i8, "vector_labssub_low_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I8, kArgTyV8I8) + { kArgTyV8I8, kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_labssub_low_v4i16, "vector_labssub_low_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I16, kArgTyV4I16) + { kArgTyV4I16, kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_labssub_low_v2i32, "vector_labssub_low_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I32, kArgTyV2I32) + { kArgTyV2I32, kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_labssub_low_v8u8, "vector_labssub_low_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U8, kArgTyV8U8) + { kArgTyV8U8, kArgTyV8U8 }) DEF_MIR_INTRINSIC(vector_labssub_low_v4u16, "vector_labssub_low_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U16, kArgTyV4U16) + { kArgTyV4U16, kArgTyV4U16 }) DEF_MIR_INTRINSIC(vector_labssub_low_v2u32, "vector_labssub_low_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U32, kArgTyV2U32) + { kArgTyV2U32, kArgTyV2U32 }) // vecTy2 vector_labssub_high(vectTy1 src2, vectTy2 src2) // Create a widened vector by getting the abs value of subtracted high args. DEF_MIR_INTRINSIC(vector_labssub_high_v8i8, "vector_labssub_high_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV16I8, kArgTyV16I8) + { kArgTyV16I8, kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_labssub_high_v4i16, "vector_labssub_high_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV8I16, kArgTyV8I16) + { kArgTyV8I16, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_labssub_high_v2i32, "vector_labssub_high_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV4I32, kArgTyV4I32) + { kArgTyV4I32, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_labssub_high_v8u8, "vector_labssub_high_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV16U8, kArgTyV16U8) + { kArgTyV16U8, kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_labssub_high_v4u16, "vector_labssub_high_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV8U16, kArgTyV8U16) + { kArgTyV8U16, kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_labssub_high_v2u32, "vector_labssub_high_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV4U32, kArgTyV4U32) + { kArgTyV4U32, kArgTyV4U32 }) // vecTy2 vector_madd(vecTy2 accum, vecTy1 src1, vecTy1 src2) // Multiply the elements of src1 and src2, then accumulate into accum. // Elements of vecTy2 are twice as long as elements of vecTy1. DEF_MIR_INTRINSIC(vector_madd_v2i32, "vector_madd_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV2I32, kArgTyV2I32) + { kArgTyV2I64, kArgTyV2I32, kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_madd_v4i16, "vector_madd_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I16, kArgTyV4I16) + { kArgTyV4I32, kArgTyV4I16, kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_madd_v8i8, "vector_madd_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV8I8, kArgTyV8I8) + { kArgTyV8I16, kArgTyV8I8, kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_madd_v2u32, "vector_madd_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U64, kArgTyV2U32, kArgTyV2U32) + { kArgTyV2U64, kArgTyV2U32, kArgTyV2U32 }) DEF_MIR_INTRINSIC(vector_madd_v4u16, "vector_madd_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV4U16, kArgTyV4U16) + { kArgTyV4U32, kArgTyV4U16, kArgTyV4U16 }) DEF_MIR_INTRINSIC(vector_madd_v8u8, "vector_madd_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyV8U8, kArgTyV8U8) + { kArgTyV8U16, kArgTyV8U8, kArgTyV8U8 }) // vecTy2 vector_mull_low(vecTy1 src1, vecTy1 src2) // Multiply the elements of src1 and src2. Elements of vecTy2 are twice as // long as elements of vecTy1. DEF_MIR_INTRINSIC(vector_mull_low_v2i32, "vector_mull_low_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I32, kArgTyV2I32) + { kArgTyV2I32, kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_mull_low_v4i16, "vector_mull_low_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I16, kArgTyV4I16) + { kArgTyV4I16, kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_mull_low_v8i8, "vector_mull_low_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I8, kArgTyV8I8) + { kArgTyV8I8, kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_mull_low_v2u32, "vector_mull_low_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U32, kArgTyV2U32) + { kArgTyV2U32, kArgTyV2U32 }) DEF_MIR_INTRINSIC(vector_mull_low_v4u16, "vector_mull_low_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U16, kArgTyV4U16) + { kArgTyV4U16, kArgTyV4U16 }) DEF_MIR_INTRINSIC(vector_mull_low_v8u8, "vector_mull_low_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U8, kArgTyV8U8) + { kArgTyV8U8, kArgTyV8U8 }) // vecTy2 vector_mull_high(vecTy1 src1, vecTy1 src2) // Multiply the upper elements of src1 and src2. Elements of vecTy2 are twice // as long as elements of vecTy1. DEF_MIR_INTRINSIC(vector_mull_high_v2i32, "vector_mull_high_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I32, kArgTyV2I32) + { kArgTyV2I32, kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_mull_high_v4i16, "vector_mull_high_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I16, kArgTyV4I16) + { kArgTyV4I16, kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_mull_high_v8i8, "vector_mull_high_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I8, kArgTyV8I8) + { kArgTyV8I8, kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_mull_high_v2u32, "vector_mull_high_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U32, kArgTyV2U32) + { kArgTyV2U32, kArgTyV2U32 }) DEF_MIR_INTRINSIC(vector_mull_high_v4u16, "vector_mull_high_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U16, kArgTyV4U16) + { kArgTyV4U16, kArgTyV4U16 }) DEF_MIR_INTRINSIC(vector_mull_high_v8u8, "vector_mull_high_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U8, kArgTyV8U8) + { kArgTyV8U8, kArgTyV8U8 }) // vecTy vector_merge(vecTy src1, vecTy src2, int n) // Create a vector by concatenating the high elements of src1, starting // with the nth element, followed by the low elements of src2. DEF_MIR_INTRINSIC(vector_merge_v2i64, "vector_merge_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV2I64, kArgTyI32) + { kArgTyV2I64, kArgTyV2I64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_merge_v4i32, "vector_merge_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I32, kArgTyI32) + { kArgTyV4I32, kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_merge_v8i16, "vector_merge_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV8I16, kArgTyI32) + { kArgTyV8I16, kArgTyV8I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_merge_v16i8, "vector_merge_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV16I8, kArgTyV16I8, kArgTyI32) + { kArgTyV16I8, kArgTyV16I8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_merge_v2u64, "vector_merge_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U64, kArgTyV2U64, kArgTyI32) + { kArgTyV2U64, kArgTyV2U64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_merge_v4u32, "vector_merge_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV4U32, kArgTyI32) + { kArgTyV4U32, kArgTyV4U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_merge_v8u16, "vector_merge_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyV8U16, kArgTyI32) + { kArgTyV8U16, kArgTyV8U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_merge_v16u8, "vector_merge_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV16U8, kArgTyV16U8, kArgTyI32) + { kArgTyV16U8, kArgTyV16U8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_merge_v2f64, "vector_merge_v2f64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2F64, - kArgTyV2F64, kArgTyV2F64, kArgTyI32) + { kArgTyV2F64, kArgTyV2F64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_merge_v4f32, "vector_merge_v4f32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4F32, - kArgTyV4F32, kArgTyV4F32, kArgTyI32) + { kArgTyV4F32, kArgTyV4F32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_merge_v1i64, "vector_merge_v1i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1I64, - kArgTyV1I64, kArgTyV1I64, kArgTyI32) + { kArgTyV1I64, kArgTyV1I64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_merge_v2i32, "vector_merge_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32, kArgTyV2I32, kArgTyI32) + { kArgTyV2I32, kArgTyV2I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_merge_v4i16, "vector_merge_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16, kArgTyV4I16, kArgTyI32) + { kArgTyV4I16, kArgTyV4I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_merge_v8i8, "vector_merge_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I8, kArgTyV8I8, kArgTyI32) + { kArgTyV8I8, kArgTyV8I8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_merge_v1u64, "vector_merge_v1u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1U64, - kArgTyV1U64, kArgTyV1U64, kArgTyI32) + { kArgTyV1U64, kArgTyV1U64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_merge_v2u32, "vector_merge_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U32, kArgTyV2U32, kArgTyI32) + { kArgTyV2U32, kArgTyV2U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_merge_v4u16, "vector_merge_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U16, kArgTyV4U16, kArgTyI32) + { kArgTyV4U16, kArgTyV4U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_merge_v8u8, "vector_merge_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U8, kArgTyV8U8, kArgTyI32) + { kArgTyV8U8, kArgTyV8U8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_merge_v1f64, "vector_merge_v1f64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1F64, - kArgTyV1F64, kArgTyV1F64, kArgTyI32) + { kArgTyV1F64, kArgTyV1F64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_merge_v2f32, "vector_merge_v2f32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2F32, - kArgTyV2F32, kArgTyV2F32, kArgTyI32) + { kArgTyV2F32, kArgTyV2F32, kArgTyI32 }) // vecTy2 vector_get_low(vecTy1 src) // Create a vector from the low part of the source vector. DEF_MIR_INTRINSIC(vector_get_low_v2i64, "vector_get_low_v2i64", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1I64, - kArgTyV2I64) + { kArgTyV2I64 }) DEF_MIR_INTRINSIC(vector_get_low_v4i32, "vector_get_low_v4i32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV4I32) + { kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_get_low_v8i16, "vector_get_low_v8i16", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV8I16) + { kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_get_low_v16i8, "vector_get_low_v16i8", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV16I8) + { kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_get_low_v2u64, "vector_get_low_v2u64", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1U64, - kArgTyV2U64) + { kArgTyV2U64 }) DEF_MIR_INTRINSIC(vector_get_low_v4u32, "vector_get_low_v4u32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV4U32) + { kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_get_low_v8u16, "vector_get_low_v8u16", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV8U16) + { kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_get_low_v16u8, "vector_get_low_v16u8", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV16U8) + { kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_get_low_v2f64, "vector_get_low_v2f64", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1F64, - kArgTyV2F64) + { kArgTyV2F64 }) DEF_MIR_INTRINSIC(vector_get_low_v4f32, "vector_get_low_v4f32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2F32, - kArgTyV4F32) + { kArgTyV4F32 }) // vecTy2 vector_get_low(vecTy1 src) // Create a vector from the high part of the source vector. DEF_MIR_INTRINSIC(vector_get_high_v2i64, "vector_get_high_v2i64", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1I64, - kArgTyV2I64) + { kArgTyV2I64 }) DEF_MIR_INTRINSIC(vector_get_high_v4i32, "vector_get_high_v4i32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV4I32) + { kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_get_high_v8i16, "vector_get_high_v8i16", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV8I16) + { kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_get_high_v16i8, "vector_get_high_v16i8", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV16I8) + { kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_get_high_v2u64, "vector_get_high_v2u64", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1U64, - kArgTyV2U64) + { kArgTyV2U64 }) DEF_MIR_INTRINSIC(vector_get_high_v4u32, "vector_get_high_v4u32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV4U32) + { kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_get_high_v8u16, "vector_get_high_v8u16", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV8U16) + { kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_get_high_v16u8, "vector_get_high_v16u8", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV16U8) + { kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_get_high_v2f64, "vector_get_high_v2f64", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1F64, - kArgTyV2F64) + { kArgTyV2F64 }) DEF_MIR_INTRINSIC(vector_get_high_v4f32, "vector_get_high_v4f32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2F32, - kArgTyV4F32) + { kArgTyV4F32 }) // scalarTy vector_get_element(vecTy src, int n) // Get the nth element of the source vector. DEF_MIR_INTRINSIC(vector_get_element_v2f64, "vector_get_element_v2f64", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyF64, - kArgTyV2F64, kArgTyI32) + { kArgTyV2F64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_get_element_v4f32, "vector_get_element_v4f32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyF32, - kArgTyV4F32, kArgTyI32) + { kArgTyV4F32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_get_element_v1f64, "vector_get_element_v1f64", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyF64, - kArgTyV1F64, kArgTyI32) + { kArgTyV1F64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_get_element_v2f32, "vector_get_element_v2f32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyF32, - kArgTyV2F32, kArgTyI32) + { kArgTyV2F32, kArgTyI32 }) // vecTy vector_set_element(ScalarTy value, VecTy vec, int n) // Set the nth element of the source vector to value. DEF_MIR_INTRINSIC(vector_set_element_v2i64, "vector_set_element_v2i64", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyI64, kArgTyV2I64, kArgTyI32) + { kArgTyI64, kArgTyV2I64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_set_element_v4i32, "vector_set_element_v4i32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyI32, kArgTyV4I32, kArgTyI32) + { kArgTyI32, kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_set_element_v8i16, "vector_set_element_v8i16", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyI16, kArgTyV8I16, kArgTyI32) + { kArgTyI16, kArgTyV8I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_set_element_v16i8, "vector_set_element_v16i8", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyI8, kArgTyV16I8, kArgTyI32) + { kArgTyI8, kArgTyV16I8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_set_element_v2u64, "vector_set_element_v2u64", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyU64, kArgTyV2U64, kArgTyI32) + { kArgTyU64, kArgTyV2U64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_set_element_v4u32, "vector_set_element_v4u32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyU32, kArgTyV4U32, kArgTyI32) + { kArgTyU32, kArgTyV4U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_set_element_v8u16, "vector_set_element_v8u16", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyU16, kArgTyV8U16, kArgTyI32) + { kArgTyU16, kArgTyV8U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_set_element_v16u8, "vector_set_element_v16u8", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyU8, kArgTyV16U8, kArgTyI32) + { kArgTyU8, kArgTyV16U8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_set_element_v2f64, "vector_set_element_v2f64", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2F64, - kArgTyF64, kArgTyV2F64, kArgTyI32) + { kArgTyF64, kArgTyV2F64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_set_element_v4f32, "vector_set_element_v4f32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4F32, - kArgTyF32, kArgTyV4F32, kArgTyI32) + { kArgTyF32, kArgTyV4F32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_set_element_v1i64, "vector_set_element_v1i64", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1I64, - kArgTyI64, kArgTyV1I64, kArgTyI32) + { kArgTyI64, kArgTyV1I64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_set_element_v2i32, "vector_set_element_v2i32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyI32, kArgTyV2I32, kArgTyI32) + { kArgTyI32, kArgTyV2I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_set_element_v4i16, "vector_set_element_v4i16", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyI16, kArgTyV4I16, kArgTyI32) + { kArgTyI16, kArgTyV4I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_set_element_v8i8, "vector_set_element_v8i8", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyI8, kArgTyV8I8, kArgTyI32) + { kArgTyI8, kArgTyV8I8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_set_element_v1u64, "vector_set_element_v1u64", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1U64, - kArgTyU64, kArgTyV1U64, kArgTyI32) + { kArgTyU64, kArgTyV1U64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_set_element_v2u32, "vector_set_element_v2u32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyU32, kArgTyV2U32, kArgTyI32) + { kArgTyU32, kArgTyV2U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_set_element_v4u16, "vector_set_element_v4u16", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyU16, kArgTyV4U16, kArgTyI32) + { kArgTyU16, kArgTyV4U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_set_element_v8u8, "vector_set_element_v8u8", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyU8, kArgTyV8U8, kArgTyI32) + { kArgTyU8, kArgTyV8U8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_set_element_v1f64, "vector_set_element_v1f64", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1F64, - kArgTyF64, kArgTyV1F64, kArgTyI32) + { kArgTyF64, kArgTyV1F64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_set_element_v2f32, "vector_set_element_v2f32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2F32, - kArgTyF32, kArgTyV2F32, kArgTyI32) + { kArgTyF32, kArgTyV2F32, kArgTyI32 }) // vecTy2 vector_widen_low(vecTy1 src) // Widen each element of the 64-bit argument to double size of the // original width to a 128-bit destination vector. DEF_MIR_INTRINSIC(vector_widen_low_v2i32, "vector_widen_low_v2i32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I32) + { kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_widen_low_v4i16, "vector_widen_low_v4i16", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I16) + { kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_widen_low_v8i8, "vector_widen_low_v8i8", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I8) + { kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_widen_low_v2u32, "vector_widen_low_v2u32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U32) + { kArgTyV2U32 }) DEF_MIR_INTRINSIC(vector_widen_low_v4u16, "vector_widen_low_v4u16", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U16) + { kArgTyV4U16 }) DEF_MIR_INTRINSIC(vector_widen_low_v8u8, "vector_widen_low_v8u8", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U8) + { kArgTyV8U8 }) // vecTy2 vector_widen_high(vecTy1 src) // Widen each upper element of the 128-bit source vector to double size of // the original width into a 128-bit destination vector. DEF_MIR_INTRINSIC(vector_widen_high_v2i32, "vector_widen_high_v2i32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV4I32) + { kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_widen_high_v4i16, "vector_widen_high_v4i16", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV8I16) + { kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_widen_high_v8i8, "vector_widen_high_v8i8", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV16I8) + { kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_widen_high_v2u32, "vector_widen_high_v2u32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV4U32) + { kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_widen_high_v4u16, "vector_widen_high_v4u16", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV8U16) + { kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_widen_high_v8u8, "vector_widen_high_v8u8", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV16U8) + { kArgTyV16U8 }) // vecTy2 vector_narrow_low(vecTy1 src) // Narrow each element of the 128-bit source vector to half of the original width, // then write it to the lower half of the destination vector. DEF_MIR_INTRINSIC(vector_narrow_low_v2i64, "vector_narrow_low_v2i64", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I64) + { kArgTyV2I64 }) DEF_MIR_INTRINSIC(vector_narrow_low_v4i32, "vector_narrow_low_v4i32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I32) + { kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_narrow_low_v8i16, "vector_narrow_low_v8i16", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I16) + { kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_narrow_low_v2u64, "vector_narrow_low_v2u64", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U64) + { kArgTyV2U64 }) DEF_MIR_INTRINSIC(vector_narrow_low_v4u32, "vector_narrow_low_v4u32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U32) + { kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_narrow_low_v8u16, "vector_narrow_low_v8u16", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U16) + { kArgTyV8U16 }) // vecTy2 vector_narrow_high(vecTy1 src) // Narrow each element of the upper source vector to half of the original width, // concatenate with the first 64-bit arg into a 128-bit destination vector. DEF_MIR_INTRINSIC(vector_narrow_high_v2i64, "vector_narrow_high_v2i64", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV2I32, kArgTyV2I64) + { kArgTyV2I32, kArgTyV2I64 }) DEF_MIR_INTRINSIC(vector_narrow_high_v4i32, "vector_narrow_high_v4i32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV4I16, kArgTyV4I32) + { kArgTyV4I16, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_narrow_high_v8i16, "vector_narrow_high_v8i16", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV8I8, kArgTyV8I16) + { kArgTyV8I8, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_narrow_high_v2u64, "vector_narrow_high_v2u64", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV2U32, kArgTyV2U64) + { kArgTyV2U32, kArgTyV2U64 }) DEF_MIR_INTRINSIC(vector_narrow_high_v4u32, "vector_narrow_high_v4u32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV4U16, kArgTyV4U32) + { kArgTyV4U16, kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_narrow_high_v8u16, "vector_narrow_high_v8u16", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV8U8, kArgTyV8U16) + { kArgTyV8U8, kArgTyV8U16 }) // vecTy vector_pairwise_adalp(vecTy src1, vecTy2 src2) // Pairwise add of src2 then accumulate into src1 as dest DEF_MIR_INTRINSIC(vector_pairwise_adalp_v8i8, "vector_pairwise_adalp_v8i8", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16, kArgTyV8I8) + { kArgTyV4I16, kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_pairwise_adalp_v4i16, "vector_pairwise_adalp_v4i16", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32, kArgTyV4I16) + { kArgTyV2I32, kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_pairwise_adalp_v2i32, "vector_pairwise_adalp_v2i32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1I64, - kArgTyV1I64, kArgTyV2I32) + { kArgTyV1I64, kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_pairwise_adalp_v8u8, "vector_pairwise_adalp_v8u8", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U16, kArgTyV8U8) + { kArgTyV4U16, kArgTyV8U8 }) DEF_MIR_INTRINSIC(vector_pairwise_adalp_v4u16, "vector_pairwise_adalp_v4u16", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U32, kArgTyV4U16) + { kArgTyV2U32, kArgTyV4U16 }) DEF_MIR_INTRINSIC(vector_pairwise_adalp_v2u32, "vector_pairwise_adalp_v2u32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1U64, - kArgTyV1U64, kArgTyV2U32) + { kArgTyV1U64, kArgTyV2U32 }) DEF_MIR_INTRINSIC(vector_pairwise_adalp_v16i8, "vector_pairwise_adalp_v16i8", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV16I8) + { kArgTyV8I16, kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_pairwise_adalp_v8i16, "vector_pairwise_adalp_v8i16", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV8I16) + { kArgTyV4I32, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_pairwise_adalp_v4i32, "vector_pairwise_adalp_v4i32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV4I32) + { kArgTyV2I64, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_pairwise_adalp_v16u8, "vector_pairwise_adalp_v16u8", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyV16U8) + { kArgTyV8U16, kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_pairwise_adalp_v8u16, "vector_pairwise_adalp_v8u16", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV8U16) + { kArgTyV4U32, kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_pairwise_adalp_v4u32, "vector_pairwise_adalp_v4u32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U64, kArgTyV4U32) + { kArgTyV2U64, kArgTyV4U32 }) // vecTy2 vector_pairwise_add(vecTy1 src) // Add pairs of elements from the source vector and put the result into the @@ -673,159 +673,159 @@ DEF_MIR_INTRINSIC(vector_pairwise_adalp_v4u32, "vector_pairwise_adalp_v4u32", // elements is half of the source vector type. DEF_MIR_INTRINSIC(vector_pairwise_add_v4i32, "vector_pairwise_add_v4i32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV4I32) + { kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_pairwise_add_v8i16, "vector_pairwise_add_v8i16", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV8I16) + { kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_pairwise_add_v16i8, "vector_pairwise_add_v16i8", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV16I8) + { kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_pairwise_add_v4u32, "vector_pairwise_add_v4u32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV4U32) + { kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_pairwise_add_v8u16, "vector_pairwise_add_v8u16", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV8U16) + { kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_pairwise_add_v16u8, "vector_pairwise_add_v16u8", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV16U8) + { kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_pairwise_add_v2i32, "vector_pairwise_add_v2i32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1I64, - kArgTyV2I32) + { kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_pairwise_add_v4i16, "vector_pairwise_add_v4i16", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV4I16) + { kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_pairwise_add_v8i8, "vector_pairwise_add_v8i8", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV8I8) + { kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_pairwise_add_v2u32, "vector_pairwise_add_v2u32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1U64, - kArgTyV2U32) + { kArgTyV2U32 }) DEF_MIR_INTRINSIC(vector_pairwise_add_v4u16, "vector_pairwise_add_v4u16", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV4U16) + { kArgTyV4U16 }) DEF_MIR_INTRINSIC(vector_pairwise_add_v8u8, "vector_pairwise_add_v8u8", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV8U8) + { kArgTyV8U8 }) // vecTy vector_reverse(vecTy src) // Create a vector by reversing the order of the elements in src. DEF_MIR_INTRINSIC(vector_reverse_v2i64, "vector_reverse_v2i64", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64) + { kArgTyV2I64 }) DEF_MIR_INTRINSIC(vector_reverse_v4i32, "vector_reverse_v4i32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32) + { kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_reverse_v8i16, "vector_reverse_v8i16", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16) + { kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_reverse_v16i8, "vector_reverse_v16i8", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV16I8) + { kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_reverse_v2u64, "vector_reverse_v2u64", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U64) + { kArgTyV2U64 }) DEF_MIR_INTRINSIC(vector_reverse_v4u32, "vector_reverse_v4u32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32) + { kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_reverse_v8u16, "vector_reverse_v8u16", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16) + { kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_reverse_v16u8, "vector_reverse_v16u8", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV16U8) + { kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_reverse_v2f64, "vector_reverse_v2f64", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2F64, - kArgTyV2F64) + { kArgTyV2F64 }) DEF_MIR_INTRINSIC(vector_reverse_v4f32, "vector_reverse_v4f32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4F32, - kArgTyV4F32) + { kArgTyV4F32 }) DEF_MIR_INTRINSIC(vector_reverse_v1i64, "vector_reverse_v1i64", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1I64, - kArgTyV1I64) + { kArgTyV1I64 }) DEF_MIR_INTRINSIC(vector_reverse_v2i32, "vector_reverse_v2i32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32) + { kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_reverse_v4i16, "vector_reverse_v4i16", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16) + { kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_reverse_v8i8, "vector_reverse_v8i8", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I8) + { kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_reverse_v1u64, "vector_reverse_v1u64", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1U64, - kArgTyV1U64) + { kArgTyV1U64 }) DEF_MIR_INTRINSIC(vector_reverse_v2u32, "vector_reverse_v2u32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U32) + { kArgTyV2U32 }) DEF_MIR_INTRINSIC(vector_reverse_v4u16, "vector_reverse_v4u16", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U16) + { kArgTyV4U16 }) DEF_MIR_INTRINSIC(vector_reverse_v8u8, "vector_reverse_v8u8", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U8) + { kArgTyV8U8 }) DEF_MIR_INTRINSIC(vector_reverse_v1f64, "vector_reverse_v1f64", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1F64, - kArgTyV1F64) + { kArgTyV1F64 }) DEF_MIR_INTRINSIC(vector_reverse_v2f32, "vector_reverse_v2f32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2F32, - kArgTyV2F32) + { kArgTyV2F32 }) // vector_reverse16 with 8-bit elements DEF_MIR_INTRINSIC(vector_reverse16_v16u8, "vector_reverse16_v16u8", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV16U8) + { kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_reverse16_v16i8, "vector_reverse16_v16i8", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV16I8) + { kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_reverse16_v8u8, "vector_reverse16_v8u8", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U8) + { kArgTyV8U8 }) DEF_MIR_INTRINSIC(vector_reverse16_v8i8, "vector_reverse16_v8i8", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I8) + { kArgTyV8I8 }) // vector_reverse64 with 8-bit elements DEF_MIR_INTRINSIC(vector_reverse64_v16u8, "vector_reverse64_v16u8", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV16U8) + { kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_reverse64_v16i8, "vector_reverse64_v16i8", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV16I8) + { kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_reverse64_v8u8, "vector_reverse64_v8u8", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U8) + { kArgTyV8U8 }) DEF_MIR_INTRINSIC(vector_reverse64_v8i8, "vector_reverse64_v8i8", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I8) + { kArgTyV8I8 }) // vector_reverse64 with 16-bit elements DEF_MIR_INTRINSIC(vector_reverse64_v8u16, "vector_reverse64_v8u16", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16) + { kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_reverse64_v8i16, "vector_reverse64_v8i16", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16) + { kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_reverse64_v4u16, "vector_reverse64_v4u16", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U16) + { kArgTyV4U16 }) DEF_MIR_INTRINSIC(vector_reverse64_v4i16, "vector_reverse64_v4i16", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16) + { kArgTyV4I16 }) // vector_reverse64 with 32-bit elements DEF_MIR_INTRINSIC(vector_reverse64_v4u32, "vector_reverse64_v4u32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32) + { kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_reverse64_v4i32, "vector_reverse64_v4i32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32) + { kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_reverse64_v2u32, "vector_reverse64_v2u32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U32) + { kArgTyV2U32 }) DEF_MIR_INTRINSIC(vector_reverse64_v2i32, "vector_reverse64_v2i32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32) + { kArgTyV2I32 }) // vecTy2 vector_shift_narrow_low(vecTy1 src, const int n) // Shift each element in the vector right by n, narrow each element to half @@ -833,550 +833,550 @@ DEF_MIR_INTRINSIC(vector_reverse64_v2i32, "vector_reverse64_v2i32", // half of the destination vector. DEF_MIR_INTRINSIC(vector_shr_narrow_low_v2i64, "vector_shr_narrow_low_v2i64", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I64, kArgTyI32) + { kArgTyV2I64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_shr_narrow_low_v4i32, "vector_shr_narrow_low_v4i32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I32, kArgTyI32) + { kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_shr_narrow_low_v8i16, "vector_shr_narrow_low_v8i16", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I16, kArgTyI32) + { kArgTyV8I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_shr_narrow_low_v2u64, "vector_shr_narrow_low_v2u64", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U64, kArgTyI32) + { kArgTyV2U64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_shr_narrow_low_v4u32, "vector_shr_narrow_low_v4u32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U32, kArgTyI32) + { kArgTyV4U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_shr_narrow_low_v8u16, "vector_shr_narrow_low_v8u16", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U16, kArgTyI32) + { kArgTyV8U16, kArgTyI32 }) // scalarTy vector_sum(vecTy src) // Sum all of the elements in the vector into a scalar. DEF_MIR_INTRINSIC(vector_sum_v2i64, "vector_sum_v2i64", 2, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI64, - kArgTyV2I64) + { kArgTyV2I64 }) DEF_MIR_INTRINSIC(vector_sum_v4i32, "vector_sum_v4i32", 2, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI32, - kArgTyV4I32) + { kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_sum_v8i16, "vector_sum_v8i16", 2, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI16, - kArgTyV8I16) + { kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_sum_v16i8, "vector_sum_v16i8", 2, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI8, - kArgTyV16I8) + { kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_sum_v2u64, "vector_sum_v2u64", 2, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU64, - kArgTyV2U64) + { kArgTyV2U64 }) DEF_MIR_INTRINSIC(vector_sum_v4u32, "vector_sum_v4u32", 2, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU32, - kArgTyV4U32) + { kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_sum_v8u16, "vector_sum_v8u16", 2, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU16, - kArgTyV8U16) + { kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_sum_v16u8, "vector_sum_v16u8", 2, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU8, - kArgTyV16U8) + { kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_sum_v2f64, "vector_sum_v2f64", 2, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyF64, - kArgTyV2F64) + { kArgTyV2F64 }) DEF_MIR_INTRINSIC(vector_sum_v4f32, "vector_sum_v4f32", 2, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyF32, - kArgTyV4F32) + { kArgTyV4F32 }) DEF_MIR_INTRINSIC(vector_sum_v1i64, "vector_sum_v1i64", 2, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI64, - kArgTyV1I64) + { kArgTyV1I64 }) DEF_MIR_INTRINSIC(vector_sum_v2i32, "vector_sum_v2i32", 2, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI32, - kArgTyV2I32) + { kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_sum_v4i16, "vector_sum_v4i16", 2, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI16, - kArgTyV4I16) + { kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_sum_v8i8, "vector_sum_v8i8", 2, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI8, - kArgTyV8I8) + { kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_sum_v1u64, "vector_sum_v1u64", 2, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU64, - kArgTyV1U64) + { kArgTyV1U64 }) DEF_MIR_INTRINSIC(vector_sum_v2u32, "vector_sum_v2u32", 2, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU32, - kArgTyV2U32) + { kArgTyV2U32 }) DEF_MIR_INTRINSIC(vector_sum_v4u16, "vector_sum_v4u16", 2, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU16, - kArgTyV4U16) + { kArgTyV4U16 }) DEF_MIR_INTRINSIC(vector_sum_v8u8, "vector_sum_v8u8", 2, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU8, - kArgTyV8U8) + { kArgTyV8U8 }) DEF_MIR_INTRINSIC(vector_sum_v1f64, "vector_sum_v1f64", 2, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyF64, - kArgTyV1F64) + { kArgTyV1F64 }) DEF_MIR_INTRINSIC(vector_sum_v2f32, "vector_sum_v2f32", 2, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyF32, - kArgTyV2F32) + { kArgTyV2F32 }) // vecTy table_lookup(vecTy tbl, vecTy idx) // Performs a table vector lookup. DEF_MIR_INTRINSIC(vector_table_lookup_v2i64, "vector_table_lookup_v2i64", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV2I64) + { kArgTyV2I64, kArgTyV2I64 }) DEF_MIR_INTRINSIC(vector_table_lookup_v4i32, "vector_table_lookup_v4i32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I32) + { kArgTyV4I32, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_table_lookup_v8i16, "vector_table_lookup_v8i16", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV8I16) + { kArgTyV8I16, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_table_lookup_v16i8, "vector_table_lookup_v16i8", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV16I8, kArgTyV16I8) + { kArgTyV16I8, kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_table_lookup_v2u64, "vector_table_lookup_v2u64", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U64, kArgTyV2U64) + { kArgTyV2U64, kArgTyV2U64 }) DEF_MIR_INTRINSIC(vector_table_lookup_v4u32, "vector_table_lookup_v4u32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV4U32) + { kArgTyV4U32, kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_table_lookup_v8u16, "vector_table_lookup_v8u16", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyV8U16) + { kArgTyV8U16, kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_table_lookup_v16u8, "vector_table_lookup_v16u8", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV16U8, kArgTyV16U8) + { kArgTyV16U8, kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_table_lookup_v2f64, "vector_table_lookup_v2f64", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2F64, - kArgTyV2F64, kArgTyV2F64) + { kArgTyV2F64, kArgTyV2F64 }) DEF_MIR_INTRINSIC(vector_table_lookup_v4f32, "vector_table_lookup_v4f32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4F32, - kArgTyV4F32, kArgTyV4F32) + { kArgTyV4F32, kArgTyV4F32 }) DEF_MIR_INTRINSIC(vector_table_lookup_v1i64, "vector_table_lookup_v1i64", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1I64, - kArgTyV1I64, kArgTyV1I64) + { kArgTyV1I64, kArgTyV1I64 }) DEF_MIR_INTRINSIC(vector_table_lookup_v2i32, "vector_table_lookup_v2i32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32, kArgTyV2I32) + { kArgTyV2I32, kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_table_lookup_v4i16, "vector_table_lookup_v4i16", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16, kArgTyV4I16) + { kArgTyV4I16, kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_table_lookup_v8i8, "vector_table_lookup_v8i8", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I8, kArgTyV8I8) + { kArgTyV8I8, kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_table_lookup_v1u64, "vector_table_lookup_v1u64", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1U64, - kArgTyV1U64, kArgTyV1U64) + { kArgTyV1U64, kArgTyV1U64 }) DEF_MIR_INTRINSIC(vector_table_lookup_v2u32, "vector_table_lookup_v2u32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U32, kArgTyV2U32) + { kArgTyV2U32, kArgTyV2U32 }) DEF_MIR_INTRINSIC(vector_table_lookup_v4u16, "vector_table_lookup_v4u16", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U16, kArgTyV4U16) + { kArgTyV4U16, kArgTyV4U16 }) DEF_MIR_INTRINSIC(vector_table_lookup_v8u8, "vector_table_lookup_v8u8", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U8, kArgTyV8U8) + { kArgTyV8U8, kArgTyV8U8 }) DEF_MIR_INTRINSIC(vector_table_lookup_v1f64, "vector_table_lookup_v1f64", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1F64, - kArgTyV1F64, kArgTyV1F64) + { kArgTyV1F64, kArgTyV1F64 }) DEF_MIR_INTRINSIC(vector_table_lookup_v2f32, "vector_table_lookup_v2f32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2F32, - kArgTyV2F32, kArgTyV2F32) + { kArgTyV2F32, kArgTyV2F32 }) // vecTy vector_load(scalarTy *ptr) // Load the elements pointed to by ptr into a vector. DEF_MIR_INTRINSIC(vector_load_v2f64, "vector_load_v2f64", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNLOADMEM | INTRNNOSIDEEFFECT, kArgTyV2F64, - kArgTyPtr) + { { kArgTyPtr, MemEffect::kLoadMemory } }) DEF_MIR_INTRINSIC(vector_load_v4f32, "vector_load_v4f32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNLOADMEM | INTRNNOSIDEEFFECT, kArgTyV4F32, - kArgTyPtr) + { { kArgTyPtr, MemEffect::kLoadMemory } }) DEF_MIR_INTRINSIC(vector_load_v1f64, "vector_load_v1f64", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNLOADMEM | INTRNNOSIDEEFFECT, kArgTyV1F64, - kArgTyPtr) + { { kArgTyPtr, MemEffect::kLoadMemory } }) DEF_MIR_INTRINSIC(vector_load_v2f32, "vector_load_v2f32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNLOADMEM | INTRNNOSIDEEFFECT, kArgTyV2F32, - kArgTyPtr) + { { kArgTyPtr, MemEffect::kLoadMemory } }) // void vector_store(scalarTy *ptr, vecTy src) // Store the elements from src into the memory pointed to by ptr. DEF_MIR_INTRINSIC(vector_store_v2i64, "vector_store_v2i64", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyV2I64) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyV2I64 }) DEF_MIR_INTRINSIC(vector_store_v4i32, "vector_store_v4i32", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyV4I32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_store_v8i16, "vector_store_v8i16", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyV8I16) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_store_v16i8, "vector_store_v16i8", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyV16I8) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_store_v2u64, "vector_store_v2u64", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyV2U64) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyV2U64 }) DEF_MIR_INTRINSIC(vector_store_v4u32, "vector_store_v4u32", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyV4U32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_store_v8u16, "vector_store_v8u16", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyV8U16) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_store_v16u8, "vector_store_v16u8", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyV16U8) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_store_v2f64, "vector_store_v2f64", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyV2F64) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyV2F64 }) DEF_MIR_INTRINSIC(vector_store_v4f32, "vector_store_v4f32", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyV4F32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyV4F32 }) DEF_MIR_INTRINSIC(vector_store_v1i64, "vector_store_v1i64", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyV1I64) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyV1I64 }) DEF_MIR_INTRINSIC(vector_store_v2i32, "vector_store_v2i32", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyV2I32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_store_v4i16, "vector_store_v4i16", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyV4I16) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_store_v8i8, "vector_store_v8i8", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyV8I8) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_store_v1u64, "vector_store_v1u64", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyV1U64) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyV1U64 }) DEF_MIR_INTRINSIC(vector_store_v2u32, "vector_store_v2u32", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyV2U32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyV2U32 }) DEF_MIR_INTRINSIC(vector_store_v4u16, "vector_store_v4u16", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyV4U16) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyV4U16 }) DEF_MIR_INTRINSIC(vector_store_v8u8, "vector_store_v8u8", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyV8U8) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyV8U8 }) DEF_MIR_INTRINSIC(vector_store_v1f64, "vector_store_v1f64", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyV1F64) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyV1F64 }) DEF_MIR_INTRINSIC(vector_store_v2f32, "vector_store_v2f32", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyV2F32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyV2F32 }) // vecTy vector_subl_low(vecTy src1, vecTy src2) // Subtract each element of the source vector to second source // widen the result into the destination vector. DEF_MIR_INTRINSIC(vector_subl_low_v8i8, "vector_subl_low_v8i8", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I8, kArgTyV8I8) + { kArgTyV8I8, kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_subl_low_v4i16, "vector_subl_low_v4i16", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I16, kArgTyV4I16) + { kArgTyV4I16, kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_subl_low_v2i32, "vector_subl_low_v2i32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I32, kArgTyV2I32) + { kArgTyV2I32, kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_subl_low_v8u8, "vector_subl_low_v8u8", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U8, kArgTyV8U8) + { kArgTyV8U8, kArgTyV8U8 }) DEF_MIR_INTRINSIC(vector_subl_low_v4u16, "vector_subl_low_v4u16", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U16, kArgTyV4U16) + { kArgTyV4U16, kArgTyV4U16 }) DEF_MIR_INTRINSIC(vector_subl_low_v2u32, "vector_subl_low_v2u32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U32, kArgTyV2U32) + { kArgTyV2U32, kArgTyV2U32 }) // vecTy vector_subl_high(vecTy src1, vecTy src2) // Subtract each element of the source vector to upper half of second source // widen the result into the destination vector. DEF_MIR_INTRINSIC(vector_subl_high_v8i8, "vector_subl_high_v8i8", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV16I8, kArgTyV16I8) + { kArgTyV16I8, kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_subl_high_v4i16, "vector_subl_high_v4i16", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV8I16, kArgTyV8I16) + { kArgTyV8I16, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_subl_high_v2i32, "vector_subl_high_v2i32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV4I32, kArgTyV4I32) + { kArgTyV4I32, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_subl_high_v8u8, "vector_subl_high_v8u8", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV16U8, kArgTyV16U8) + { kArgTyV16U8, kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_subl_high_v4u16, "vector_subl_high_v4u16", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV8U16, kArgTyV8U16) + { kArgTyV8U16, kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_subl_high_v2u32, "vector_subl_high_v2u32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV4U32, kArgTyV4U32) + { kArgTyV4U32, kArgTyV4U32 }) // vecTy vector_subw_low(vecTy src1, vecTy src2) // Subtract each element of the source vector to second source // widen the result into the destination vector. DEF_MIR_INTRINSIC(vector_subw_low_v8i8, "vector_subw_low_v8i8", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV8I8) + { kArgTyV8I16, kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_subw_low_v4i16, "vector_subw_low_v4i16", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I16) + { kArgTyV4I32, kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_subw_low_v2i32, "vector_subw_low_v2i32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV2I32) + { kArgTyV2I64, kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_subw_low_v8u8, "vector_subw_low_v8u8", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyV8U8) + { kArgTyV8U16, kArgTyV8U8 }) DEF_MIR_INTRINSIC(vector_subw_low_v4u16, "vector_subw_low_v4u16", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV4U16) + { kArgTyV4U32, kArgTyV4U16 }) DEF_MIR_INTRINSIC(vector_subw_low_v2u32, "vector_subw_low_v2u32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U64, kArgTyV2U32) + { kArgTyV2U64, kArgTyV2U32 }) // vecTy vector_subw_high(vecTy src1, vecTy src2) // Subtract each element of the source vector to upper half of second source // widen the result into the destination vector. DEF_MIR_INTRINSIC(vector_subw_high_v8i8, "vector_subw_high_v8i8", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV16I8) + { kArgTyV8I16, kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_subw_high_v4i16, "vector_subw_high_v4i16", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV8I16) + { kArgTyV4I32, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_subw_high_v2i32, "vector_subw_high_v2i32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV4I32) + { kArgTyV2I64, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_subw_high_v8u8, "vector_subw_high_v8u8", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyV16U8) + { kArgTyV8U16, kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_subw_high_v4u16, "vector_subw_high_v4u16", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV8U16) + { kArgTyV4U32, kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_subw_high_v2u32, "vector_subw_high_v2u32", DEFAULT_NUM_INSN, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U64, kArgTyV4U32) + { kArgTyV2U64, kArgTyV4U32 }) // void vector_store(scalarTy *ptr, vecTy src) // Store the elements from src into the memory pointed to by ptr. DEF_MIR_INTRINSIC(vector_st1_i8v8, "vector_st1_i8v8", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyV8I8) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_st1q_i8v16, "vector_st1q_i8v16", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyV16I8) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_st1_i16v4, "vector_st1_i16v4", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyV4I16) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_st1q_i16v8, "vector_st1q_i16v8", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyV8I16) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_st1_i32v2, "vector_st1_i32v2", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyV2I32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_st1q_i32v4, "vector_st1q_i32v4", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyV4I32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_st1_i64v1, "vector_st1_i64v1", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyV1I64) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyV1I64 }) DEF_MIR_INTRINSIC(vector_st1q_i64v2, "vector_st1q_i64v2", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyV2I64) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyV2I64 }) DEF_MIR_INTRINSIC(vector_st1_u8v8, "vector_st1_u8v8", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyV8U8) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyV8U8 }) DEF_MIR_INTRINSIC(vector_st1q_u8v16, "vector_st1q_u8v16", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyV16U8) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_st1_u16v4, "vector_st1_u16v4", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyV4U16) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyV4U16 }) DEF_MIR_INTRINSIC(vector_st1q_u16v8, "vector_st1q_u16v8", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyV8U16) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_st1_u32v2, "vector_st1_u32v2", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyV2U32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyV2U32 }) DEF_MIR_INTRINSIC(vector_st1q_u32v4, "vector_st1q_u32v4", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyV4U32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_st1_u64v1, "vector_st1_u64v1", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyV1U64) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyV1U64 }) DEF_MIR_INTRINSIC(vector_st1q_u64v2, "vector_st1q_u64v2", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyV2U64) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyV2U64 }) DEF_MIR_INTRINSIC(vector_st1_lane_i8v8, "vector_st1_lane_i8v8", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyV8I8, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyV8I8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st1q_lane_i8v16, "vector_st1q_lane_i8v16", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyV16I8, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyV16I8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st1_lane_i16v4, "vector_st1_lane_i16v4", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyV4I16, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyV4I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st1q_lane_i16v8, "vector_st1q_lane_i16v8", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyV8I16, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyV8I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st1_lane_i32v2, "vector_st1_lane_i32v2", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyV2I32, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyV2I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st1q_lane_i32v4, "vector_st1q_lane_i32v4", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyV4I32, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st1_lane_i64v1, "vector_st1_lane_i64v1", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyV1I64, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyV1I64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st1q_lane_i64v2, "vector_st1q_lane_i64v2", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyV2I64, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyV2I64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st1_lane_u8v8, "vector_st1_lane_u8v8", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyV8U8, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyV8U8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st1q_lane_u8v16, "vector_st1q_lane_u8v16", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyV16U8, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyV16U8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st1_lane_u16v4, "vector_st1_lane_u16v4", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyV4U16, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyV4U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st1q_lane_u16v8, "vector_st1q_lane_u16v8", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyV8U16, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyV8U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st1_lane_u32v2, "vector_st1_lane_u32v2", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyV2U32, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyV2U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st1q_lane_u32v4, "vector_st1q_lane_u32v4", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyV4U32, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyV4U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st1_lane_u64v1, "vector_st1_lane_u64v1", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyV1U64, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyV1U64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st1q_lane_u64v2, "vector_st1q_lane_u64v2", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyV2U64, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyV2U64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st2_i8v8, "vector_st2_i8v8", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg }) DEF_MIR_INTRINSIC(vector_st2q_i8v16, "vector_st2q_i8v16", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg }) DEF_MIR_INTRINSIC(vector_st2_i16v4, "vector_st2_i16v4", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg }) DEF_MIR_INTRINSIC(vector_st2q_i16v8, "vector_st2q_i16v8", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg }) DEF_MIR_INTRINSIC(vector_st2_i32v2, "vector_st2_i32v2", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg }) DEF_MIR_INTRINSIC(vector_st2q_i32v4, "vector_st2q_i32v4", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg }) DEF_MIR_INTRINSIC(vector_st2_u8v8, "vector_st2_u8v8", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg }) DEF_MIR_INTRINSIC(vector_st2q_u8v16, "vector_st2q_u8v16", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg }) DEF_MIR_INTRINSIC(vector_st2_u16v4, "vector_st2_u16v4", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg }) DEF_MIR_INTRINSIC(vector_st2q_u16v8, "vector_st2q_u16v8", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg }) DEF_MIR_INTRINSIC(vector_st2_u32v2, "vector_st2_u32v2", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg }) DEF_MIR_INTRINSIC(vector_st2q_u32v4, "vector_st2q_u32v4", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg }) DEF_MIR_INTRINSIC(vector_st2_i64v1, "vector_st2_i64v1", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg }) DEF_MIR_INTRINSIC(vector_st2_u64v1, "vector_st2_u64v1", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg }) DEF_MIR_INTRINSIC(vector_st2q_i64v2, "vector_st2q_i64v2", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg }) DEF_MIR_INTRINSIC(vector_st2q_u64v2, "vector_st2q_u64v2", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg }) DEF_MIR_INTRINSIC(vector_st3_i8v8, "vector_st3_i8v8", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg }) DEF_MIR_INTRINSIC(vector_st3q_i8v16, "vector_st3q_i8v16", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg }) DEF_MIR_INTRINSIC(vector_st3_i16v4, "vector_st3_i16v4", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg }) DEF_MIR_INTRINSIC(vector_st3q_i16v8, "vector_st3q_i16v8", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg }) DEF_MIR_INTRINSIC(vector_st3_i32v2, "vector_st3_i32v2", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg }) DEF_MIR_INTRINSIC(vector_st3q_i32v4, "vector_st3q_i32v4", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg }) DEF_MIR_INTRINSIC(vector_st3_u8v8, "vector_st3_u8v8", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg }) DEF_MIR_INTRINSIC(vector_st3q_u8v16, "vector_st3q_u8v16", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg }) DEF_MIR_INTRINSIC(vector_st3_u16v4, "vector_st3_u16v4", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg }) DEF_MIR_INTRINSIC(vector_st3q_u16v8, "vector_st3q_u16v8", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg }) DEF_MIR_INTRINSIC(vector_st3_u32v2, "vector_st3_u32v2", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg }) DEF_MIR_INTRINSIC(vector_st3q_u32v4, "vector_st3q_u32v4", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg }) DEF_MIR_INTRINSIC(vector_st3_i64v1, "vector_st3_i64v1", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg }) DEF_MIR_INTRINSIC(vector_st3_u64v1, "vector_st3_u64v1", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg }) DEF_MIR_INTRINSIC(vector_st3q_i64v2, "vector_st3q_i64v2", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg }) DEF_MIR_INTRINSIC(vector_st3q_u64v2, "vector_st3q_u64v2", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg }) DEF_MIR_INTRINSIC(vector_st4_i8v8, "vector_st4_i8v8", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg }) DEF_MIR_INTRINSIC(vector_st4q_i8v16, "vector_st4q_i8v16", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg }) DEF_MIR_INTRINSIC(vector_st4_i16v4, "vector_st4_i16v4", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg }) DEF_MIR_INTRINSIC(vector_st4q_i16v8, "vector_st4q_i16v8", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg }) DEF_MIR_INTRINSIC(vector_st4_i32v2, "vector_st4_i32v2", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg }) DEF_MIR_INTRINSIC(vector_st4q_i32v4, "vector_st4q_i32v4", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg }) DEF_MIR_INTRINSIC(vector_st4_u8v8, "vector_st4_u8v8", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg }) DEF_MIR_INTRINSIC(vector_st4q_u8v16, "vector_st4q_u8v16", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg }) DEF_MIR_INTRINSIC(vector_st4_u16v4, "vector_st4_u16v4", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg }) DEF_MIR_INTRINSIC(vector_st4q_u16v8, "vector_st4q_u16v8", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg }) DEF_MIR_INTRINSIC(vector_st4_u32v2, "vector_st4_u32v2", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg }) DEF_MIR_INTRINSIC(vector_st4q_u32v4, "vector_st4q_u32v4", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg }) DEF_MIR_INTRINSIC(vector_st4_i64v1, "vector_st4_i64v1", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg }) DEF_MIR_INTRINSIC(vector_st4_u64v1, "vector_st4_u64v1", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg }) DEF_MIR_INTRINSIC(vector_st4q_i64v2, "vector_st4q_i64v2", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg }) DEF_MIR_INTRINSIC(vector_st4q_u64v2, "vector_st4q_u64v2", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg }) DEF_MIR_INTRINSIC(vector_st2_lane_i8v8, "vector_st2_lane_i8v8", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st2_lane_u8v8, "vector_st2_lane_u8v8", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st3_lane_i8v8, "vector_st3_lane_i8v8", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st3_lane_u8v8, "vector_st3_lane_u8v8", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st4_lane_i8v8, "vector_st4_lane_i8v8", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st4_lane_u8v8, "vector_st4_lane_u8v8", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st2_lane_i16v4, "vector_st2_lane_i16v4", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st2q_lane_i16v8, "vector_st2q_lane_i16v8", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st2_lane_i32v2, "vector_st2_lane_i32v2", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st2q_lane_i32v4, "vector_st2q_lane_i32v4", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st2_lane_u16v4, "vector_st2_lane_u16v4", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st2q_lane_u16v8, "vector_st2q_lane_u16v8", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st2_lane_u32v2, "vector_st2_lane_u32v2", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st2q_lane_u32v4, "vector_st2q_lane_u32v4", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st2q_lane_i8v16, "vector_st2q_lane_i8v16", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st2q_lane_u8v16, "vector_st2q_lane_u8v16", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st2_lane_i64v1, "vector_st2_lane_i64v1", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st2q_lane_i64v2, "vector_st2q_lane_i64v2", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st2_lane_u64v1, "vector_st2_lane_u64v1", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st2q_lane_u64v2, "vector_st2q_lane_u64v2", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st3_lane_i16v4, "vector_st3_lane_i16v4", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st3q_lane_i16v8, "vector_st3q_lane_i16v8", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st3_lane_i32v2, "vector_st3_lane_i32v2", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st3q_lane_i32v4, "vector_st3q_lane_i32v4", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st3_lane_u16v4, "vector_st3_lane_u16v4", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st3q_lane_u16v8, "vector_st3q_lane_u16v8", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st3_lane_u32v2, "vector_st3_lane_u32v2", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st3q_lane_u32v4, "vector_st3q_lane_u32v4", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st3q_lane_i8v16, "vector_st3q_lane_i8v16", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st3q_lane_u8v16, "vector_st3q_lane_u8v16", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st3_lane_i64v1, "vector_st3_lane_i64v1", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st3q_lane_i64v2, "vector_st3q_lane_i64v2", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st3_lane_u64v1, "vector_st3_lane_u64v1", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st3q_lane_u64v2, "vector_st3q_lane_u64v2", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st4_lane_i16v4, "vector_st4_lane_i16v4", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st4q_lane_i16v8, "vector_st4q_lane_i16v8", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st4_lane_i32v2, "vector_st4_lane_i32v2", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st4q_lane_i32v4, "vector_st4q_lane_i32v4", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st4_lane_u16v4, "vector_st4_lane_u16v4", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st4q_lane_u16v8, "vector_st4q_lane_u16v8", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st4_lane_u32v2, "vector_st4_lane_u32v2", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st4q_lane_u32v4, "vector_st4q_lane_u32v4", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st4q_lane_i8v16, "vector_st4q_lane_i8v16", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st4q_lane_u8v16, "vector_st4q_lane_u8v16", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st4_lane_i64v1, "vector_st4_lane_i64v1", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st4q_lane_i64v2, "vector_st4q_lane_i64v2", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st4_lane_u64v1, "vector_st4_lane_u64v1", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_st4q_lane_u64v2, "vector_st4q_lane_u64v2", DEFAULT_NUM_INSN, INTRNISVECTOR, - kArgTyVoid, kArgTyPtr, kArgTyAgg, kArgTyI32) + kArgTyVoid, { { kArgTyPtr, MemEffect::kStoreMemory }, kArgTyAgg, kArgTyI32 }) diff --git a/src/mapleall/maple_ir/include/intrinsic_vector_new.def b/src/mapleall/maple_ir/include/intrinsic_vector_new.def index 1125d15eb9..1d72f8d051 100644 --- a/src/mapleall/maple_ir/include/intrinsic_vector_new.def +++ b/src/mapleall/maple_ir/include/intrinsic_vector_new.def @@ -13,3677 +13,3676 @@ * MulanPSL - 2.0 for more details. */ -// DEF_MIR_INTRINSIC(STR, NAME, INTRN_CLASS, RETURN_TYPE, -// ARG0, ARG1, ARG2, ARG3, ARG4, ARG5) +// DEF_MIR_INTRINSIC(STR, NAME, INTRN_CLASS, RETURN_TYPE, { ARG ... }) -// vecTy vector_abs(vecTy src) +// { vecTy vector_abs(vecTy src }) // Create a vector by getting the absolute value of the elements in src. DEF_MIR_INTRINSIC(vector_get_lane_v8u8, "vector_get_lane_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU8, - kArgTyV8U8, kArgTyI32) + { kArgTyV8U8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_get_lane_v4u16, "vector_get_lane_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU16, - kArgTyV4U16, kArgTyI32) + { kArgTyV4U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_get_lane_v2u32, "vector_get_lane_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU32, - kArgTyV2U32, kArgTyI32) + { kArgTyV2U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_get_lane_v1u64, "vector_get_lane_v1u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU64, - kArgTyV1U64, kArgTyI32) + { kArgTyV1U64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_get_lane_v8i8, "vector_get_lane_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI8, - kArgTyV8I8, kArgTyI32) + { kArgTyV8I8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_get_lane_v4i16, "vector_get_lane_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI16, - kArgTyV4I16, kArgTyI32) + { kArgTyV4I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_get_lane_v2i32, "vector_get_lane_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI32, - kArgTyV2I32, kArgTyI32) + { kArgTyV2I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_get_lane_v1i64, "vector_get_lane_v1i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI64, - kArgTyV1I64, kArgTyI32) + { kArgTyV1I64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_getq_lane_v16u8, "vector_getq_lane_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU8, - kArgTyV16U8, kArgTyI32) + { kArgTyV16U8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_getq_lane_v8u16, "vector_getq_lane_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU16, - kArgTyV8U16, kArgTyI32) + { kArgTyV8U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_getq_lane_v4u32, "vector_getq_lane_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU32, - kArgTyV4U32, kArgTyI32) + { kArgTyV4U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_getq_lane_v2u64, "vector_getq_lane_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU64, - kArgTyV2U64, kArgTyI32) + { kArgTyV2U64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_getq_lane_v16i8, "vector_getq_lane_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI8, - kArgTyV16I8, kArgTyI32) + { kArgTyV16I8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_getq_lane_v8i16, "vector_getq_lane_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI16, - kArgTyV8I16, kArgTyI32) + { kArgTyV8I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_getq_lane_v4i32, "vector_getq_lane_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI32, - kArgTyV4I32, kArgTyI32) + { kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_getq_lane_v2i64, "vector_getq_lane_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI64, - kArgTyV2I64, kArgTyI32) + { kArgTyV2I64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_abd_v8i8, "vector_abd_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I8, kArgTyV8I8) + { kArgTyV8I8, kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_abdq_v16i8, "vector_abdq_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV16I8, kArgTyV16I8) + { kArgTyV16I8, kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_abd_v4i16, "vector_abd_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16, kArgTyV4I16) + { kArgTyV4I16, kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_abdq_v8i16, "vector_abdq_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV8I16) + { kArgTyV8I16, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_abd_v2i32, "vector_abd_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32, kArgTyV2I32) + { kArgTyV2I32, kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_abdq_v4i32, "vector_abdq_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I32) + { kArgTyV4I32, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_abd_v8u8, "vector_abd_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U8, kArgTyV8U8) + { kArgTyV8U8, kArgTyV8U8 }) DEF_MIR_INTRINSIC(vector_abdq_v16u8, "vector_abdq_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV16U8, kArgTyV16U8) + { kArgTyV16U8, kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_abd_v4u16, "vector_abd_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U16, kArgTyV4U16) + { kArgTyV4U16, kArgTyV4U16 }) DEF_MIR_INTRINSIC(vector_abdq_v8u16, "vector_abdq_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyV8U16) + { kArgTyV8U16, kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_abd_v2u32, "vector_abd_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U32, kArgTyV2U32) + { kArgTyV2U32, kArgTyV2U32 }) DEF_MIR_INTRINSIC(vector_abdq_v4u32, "vector_abdq_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV4U32) + { kArgTyV4U32, kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_max_v8i8, "vector_max_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I8, kArgTyV8I8) + { kArgTyV8I8, kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_maxq_v16i8, "vector_maxq_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV16I8, kArgTyV16I8) + { kArgTyV16I8, kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_max_v4i16, "vector_max_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16, kArgTyV4I16) + { kArgTyV4I16, kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_maxq_v8i16, "vector_maxq_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV8I16) + { kArgTyV8I16, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_max_v2i32, "vector_max_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32, kArgTyV2I32) + { kArgTyV2I32, kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_maxq_v4i32, "vector_maxq_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I32) + { kArgTyV4I32, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_max_v8u8, "vector_max_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U8, kArgTyV8U8) + { kArgTyV8U8, kArgTyV8U8 }) DEF_MIR_INTRINSIC(vector_maxq_v16u8, "vector_maxq_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV16U8, kArgTyV16U8) + { kArgTyV16U8, kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_max_v4u16, "vector_max_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U16, kArgTyV4U16) + { kArgTyV4U16, kArgTyV4U16 }) DEF_MIR_INTRINSIC(vector_maxq_v8u16, "vector_maxq_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyV8U16) + { kArgTyV8U16, kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_max_v2u32, "vector_max_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U32, kArgTyV2U32) + { kArgTyV2U32, kArgTyV2U32 }) DEF_MIR_INTRINSIC(vector_maxq_v4u32, "vector_maxq_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV4U32) + { kArgTyV4U32, kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_min_v8i8, "vector_min_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I8, kArgTyV8I8) + { kArgTyV8I8, kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_minq_v16i8, "vector_minq_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV16I8, kArgTyV16I8) + { kArgTyV16I8, kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_min_v4i16, "vector_min_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16, kArgTyV4I16) + { kArgTyV4I16, kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_minq_v8i16, "vector_minq_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV8I16) + { kArgTyV8I16, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_min_v2i32, "vector_min_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32, kArgTyV2I32) + { kArgTyV2I32, kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_minq_v4i32, "vector_minq_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I32) + { kArgTyV4I32, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_min_v8u8, "vector_min_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U8, kArgTyV8U8) + { kArgTyV8U8, kArgTyV8U8 }) DEF_MIR_INTRINSIC(vector_minq_v16u8, "vector_minq_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV16U8, kArgTyV16U8) + { kArgTyV16U8, kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_min_v4u16, "vector_min_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U16, kArgTyV4U16) + { kArgTyV4U16, kArgTyV4U16 }) DEF_MIR_INTRINSIC(vector_minq_v8u16, "vector_minq_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyV8U16) + { kArgTyV8U16, kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_min_v2u32, "vector_min_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U32, kArgTyV2U32) + { kArgTyV2U32, kArgTyV2U32 }) DEF_MIR_INTRINSIC(vector_minq_v4u32, "vector_minq_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV4U32) + { kArgTyV4U32, kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_recpe_v2u32, "vector_recpe_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U32) + { kArgTyV2U32 }) DEF_MIR_INTRINSIC(vector_recpeq_v4u32, "vector_recpeq_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32) + { kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_padd_v8i8, "vector_padd_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I8, kArgTyV8I8) + { kArgTyV8I8, kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_padd_v4i16, "vector_padd_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16, kArgTyV4I16) + { kArgTyV4I16, kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_padd_v2i32, "vector_padd_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32, kArgTyV2I32) + { kArgTyV2I32, kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_padd_v8u8, "vector_padd_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U8, kArgTyV8U8) + { kArgTyV8U8, kArgTyV8U8 }) DEF_MIR_INTRINSIC(vector_padd_v4u16, "vector_padd_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U16, kArgTyV4U16) + { kArgTyV4U16, kArgTyV4U16 }) DEF_MIR_INTRINSIC(vector_padd_v2u32, "vector_padd_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U32, kArgTyV2U32) + { kArgTyV2U32, kArgTyV2U32 }) DEF_MIR_INTRINSIC(vector_paddq_v16i8, "vector_paddq_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV16I8, kArgTyV16I8) + { kArgTyV16I8, kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_paddq_v8i16, "vector_paddq_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV8I16) + { kArgTyV8I16, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_paddq_v4i32, "vector_paddq_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I32) + { kArgTyV4I32, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_paddq_v2i64, "vector_paddq_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV2I64) + { kArgTyV2I64, kArgTyV2I64 }) DEF_MIR_INTRINSIC(vector_paddq_v16u8, "vector_paddq_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV16U8, kArgTyV16U8) + { kArgTyV16U8, kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_paddq_v8u16, "vector_paddq_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyV8U16) + { kArgTyV8U16, kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_paddq_v4u32, "vector_paddq_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV4U32) + { kArgTyV4U32, kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_paddq_v2u64, "vector_paddq_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U64, kArgTyV2U64) + { kArgTyV2U64, kArgTyV2U64 }) DEF_MIR_INTRINSIC(vector_paddd_v2i64, "vector_paddd_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1I64, - kArgTyV2I64) + { kArgTyV2I64 }) DEF_MIR_INTRINSIC(vector_paddd_v2u64, "vector_paddd_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1U64, - kArgTyV2U64) + { kArgTyV2U64 }) DEF_MIR_INTRINSIC(vector_pmax_v8i8, "vector_pmax_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I8, kArgTyV8I8) + { kArgTyV8I8, kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_pmax_v4i16, "vector_pmax_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16, kArgTyV4I16) + { kArgTyV4I16, kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_pmax_v2i32, "vector_pmax_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32, kArgTyV2I32) + { kArgTyV2I32, kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_pmax_v8u8, "vector_pmax_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U8, kArgTyV8U8) + { kArgTyV8U8, kArgTyV8U8 }) DEF_MIR_INTRINSIC(vector_pmax_v4u16, "vector_pmax_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U16, kArgTyV4U16) + { kArgTyV4U16, kArgTyV4U16 }) DEF_MIR_INTRINSIC(vector_pmax_v2u32, "vector_pmax_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U32, kArgTyV2U32) + { kArgTyV2U32, kArgTyV2U32 }) DEF_MIR_INTRINSIC(vector_pmaxq_v16i8, "vector_pmaxq_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV16I8, kArgTyV16I8) + { kArgTyV16I8, kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_pmaxq_v8i16, "vector_pmaxq_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV8I16) + { kArgTyV8I16, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_pmaxq_v4i32, "vector_pmaxq_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I32) + { kArgTyV4I32, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_pmaxq_v16u8, "vector_pmaxq_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV16U8, kArgTyV16U8) + { kArgTyV16U8, kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_pmaxq_v8u16, "vector_pmaxq_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyV8U16) + { kArgTyV8U16, kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_pmaxq_v4u32, "vector_pmaxq_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV4U32) + { kArgTyV4U32, kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_pmin_v8i8, "vector_pmin_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I8, kArgTyV8I8) + { kArgTyV8I8, kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_pmin_v4i16, "vector_pmin_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16, kArgTyV4I16) + { kArgTyV4I16, kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_pmin_v2i32, "vector_pmin_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32, kArgTyV2I32) + { kArgTyV2I32, kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_pmin_v8u8, "vector_pmin_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U8, kArgTyV8U8) + { kArgTyV8U8, kArgTyV8U8 }) DEF_MIR_INTRINSIC(vector_pmin_v4u16, "vector_pmin_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U16, kArgTyV4U16) + { kArgTyV4U16, kArgTyV4U16 }) DEF_MIR_INTRINSIC(vector_pmin_v2u32, "vector_pmin_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U32, kArgTyV2U32) + { kArgTyV2U32, kArgTyV2U32 }) DEF_MIR_INTRINSIC(vector_pminq_v16i8, "vector_pminq_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV16I8, kArgTyV16I8) + { kArgTyV16I8, kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_pminq_v8i16, "vector_pminq_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV8I16) + { kArgTyV8I16, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_pminq_v4i32, "vector_pminq_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I32) + { kArgTyV4I32, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_pminq_v16u8, "vector_pminq_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV16U8, kArgTyV16U8) + { kArgTyV16U8, kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_pminq_v8u16, "vector_pminq_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyV8U16) + { kArgTyV8U16, kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_pminq_v4u32, "vector_pminq_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV4U32) + { kArgTyV4U32, kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_maxv_v8i8, "vector_maxv_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I8) + { kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_maxvq_v16i8, "vector_maxvq_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV16I8) + { kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_maxv_v4i16, "vector_maxv_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16) + { kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_maxvq_v8i16, "vector_maxvq_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16) + { kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_maxv_v2i32, "vector_maxv_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32) + { kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_maxvq_v4i32, "vector_maxvq_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32) + { kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_maxv_v8u8, "vector_maxv_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U8) + { kArgTyV8U8 }) DEF_MIR_INTRINSIC(vector_maxvq_v16u8, "vector_maxvq_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV16U8) + { kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_maxv_v4u16, "vector_maxv_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U16) + { kArgTyV4U16 }) DEF_MIR_INTRINSIC(vector_maxvq_v8u16, "vector_maxvq_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16) + { kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_maxv_v2u32, "vector_maxv_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U32) + { kArgTyV2U32 }) DEF_MIR_INTRINSIC(vector_maxvq_v4u32, "vector_maxvq_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32) + { kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_minv_v8i8, "vector_minv_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I8) + { kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_minvq_v16i8, "vector_minvq_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV16I8) + { kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_minv_v4i16, "vector_minv_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16) + { kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_minvq_v8i16, "vector_minvq_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16) + { kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_minv_v2i32, "vector_minv_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32) + { kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_minvq_v4i32, "vector_minvq_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32) + { kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_minv_v8u8, "vector_minv_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U8) + { kArgTyV8U8 }) DEF_MIR_INTRINSIC(vector_minvq_v16u8, "vector_minvq_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV16U8) + { kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_minv_v4u16, "vector_minv_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U16) + { kArgTyV4U16 }) DEF_MIR_INTRINSIC(vector_minvq_v8u16, "vector_minvq_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16) + { kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_minv_v2u32, "vector_minv_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U32) + { kArgTyV2U32 }) DEF_MIR_INTRINSIC(vector_minvq_v4u32, "vector_minvq_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32) + { kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_tst_v8i8, "vector_tst_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8I8, kArgTyV8I8) + { kArgTyV8I8, kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_tstq_v16i8, "vector_tstq_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV16I8, kArgTyV16I8) + { kArgTyV16I8, kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_tst_v4i16, "vector_tst_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4I16, kArgTyV4I16) + { kArgTyV4I16, kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_tstq_v8i16, "vector_tstq_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8I16, kArgTyV8I16) + { kArgTyV8I16, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_tst_v2i32, "vector_tst_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2I32, kArgTyV2I32) + { kArgTyV2I32, kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_tstq_v4i32, "vector_tstq_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4I32, kArgTyV4I32) + { kArgTyV4I32, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_tst_v8u8, "vector_tst_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U8, kArgTyV8U8) + { kArgTyV8U8, kArgTyV8U8 }) DEF_MIR_INTRINSIC(vector_tstq_v16u8, "vector_tstq_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV16U8, kArgTyV16U8) + { kArgTyV16U8, kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_tst_v4u16, "vector_tst_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U16, kArgTyV4U16) + { kArgTyV4U16, kArgTyV4U16 }) DEF_MIR_INTRINSIC(vector_tstq_v8u16, "vector_tstq_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyV8U16) + { kArgTyV8U16, kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_tst_v2u32, "vector_tst_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U32, kArgTyV2U32) + { kArgTyV2U32, kArgTyV2U32 }) DEF_MIR_INTRINSIC(vector_tstq_v4u32, "vector_tstq_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV4U32) + { kArgTyV4U32, kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_tst_v1i64, "vector_tst_v1i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1U64, - kArgTyV1I64, kArgTyV1I64) + { kArgTyV1I64, kArgTyV1I64 }) DEF_MIR_INTRINSIC(vector_tstq_v2i64, "vector_tstq_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2I64, kArgTyV2I64) + { kArgTyV2I64, kArgTyV2I64 }) DEF_MIR_INTRINSIC(vector_tst_v1u64, "vector_tst_v1u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1U64, - kArgTyV1U64, kArgTyV1U64) + { kArgTyV1U64, kArgTyV1U64 }) DEF_MIR_INTRINSIC(vector_tstq_v2u64, "vector_tstq_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U64, kArgTyV2U64) + { kArgTyV2U64, kArgTyV2U64 }) DEF_MIR_INTRINSIC(vector_tstd_v1i64, "vector_tstd_v1i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU64, - kArgTyI64, kArgTyI64) + { kArgTyI64, kArgTyI64 }) DEF_MIR_INTRINSIC(vector_tstd_v1u64, "vector_tstd_v1u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU64, - kArgTyU64, kArgTyU64) + { kArgTyU64, kArgTyU64 }) DEF_MIR_INTRINSIC(vector_qmovnh_i16, "vector_qmovnh_i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyI16) + { kArgTyI16 }) DEF_MIR_INTRINSIC(vector_qmovns_i32, "vector_qmovns_i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyI32) + { kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qmovnd_i64, "vector_qmovnd_i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyI64) + { kArgTyI64 }) DEF_MIR_INTRINSIC(vector_qmovnh_u16, "vector_qmovnh_u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyU16) + { kArgTyU16 }) DEF_MIR_INTRINSIC(vector_qmovns_u32, "vector_qmovns_u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyU32) + { kArgTyU32 }) DEF_MIR_INTRINSIC(vector_qmovnd_u64, "vector_qmovnd_u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyU64) + { kArgTyU64 }) DEF_MIR_INTRINSIC(vector_qmovn_high_v16i8, "vector_qmovn_high_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV8I8, kArgTyV8I16) + { kArgTyV8I8, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_qmovn_high_v8i16, "vector_qmovn_high_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV4I16, kArgTyV4I32) + { kArgTyV4I16, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_qmovn_high_v4i32, "vector_qmovn_high_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV2I32, kArgTyV2I64) + { kArgTyV2I32, kArgTyV2I64 }) DEF_MIR_INTRINSIC(vector_qmovn_high_v16u8, "vector_qmovn_high_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV8U8, kArgTyV8U16) + { kArgTyV8U8, kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_qmovn_high_v8u16, "vector_qmovn_high_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV4U16, kArgTyV4U32) + { kArgTyV4U16, kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_qmovn_high_v4u32, "vector_qmovn_high_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV2U32, kArgTyV2U64) + { kArgTyV2U32, kArgTyV2U64 }) DEF_MIR_INTRINSIC(vector_qmovun_v8u8, "vector_qmovun_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8I16) + { kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_qmovun_v4u16, "vector_qmovun_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4I32) + { kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_qmovun_v2u32, "vector_qmovun_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2I64) + { kArgTyV2I64 }) DEF_MIR_INTRINSIC(vector_qmovunh_i16, "vector_qmovunh_i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyI16) + { kArgTyI16 }) DEF_MIR_INTRINSIC(vector_qmovuns_i32, "vector_qmovuns_i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyI32) + { kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qmovund_i64, "vector_qmovund_i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyI64) + { kArgTyI64 }) DEF_MIR_INTRINSIC(vector_qmovun_high_v16u8, "vector_qmovun_high_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV8U8, kArgTyV8I16) + { kArgTyV8U8, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_qmovun_high_v8u16, "vector_qmovun_high_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV4U16, kArgTyV4I32) + { kArgTyV4U16, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_qmovun_high_v4u32, "vector_qmovun_high_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV2U32, kArgTyV2I64) + { kArgTyV2U32, kArgTyV2I64 }) DEF_MIR_INTRINSIC(vector_mul_n_v4i16, "vector_mul_n_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16, kArgTyI16) + { kArgTyV4I16, kArgTyI16 }) DEF_MIR_INTRINSIC(vector_mulq_n_v8i16, "vector_mulq_n_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyI16) + { kArgTyV8I16, kArgTyI16 }) DEF_MIR_INTRINSIC(vector_mul_n_v2i32, "vector_mul_n_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32, kArgTyI32) + { kArgTyV2I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mulq_n_v4i32, "vector_mulq_n_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyI32) + { kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mul_n_v4u16, "vector_mul_n_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U16, kArgTyU16) + { kArgTyV4U16, kArgTyU16 }) DEF_MIR_INTRINSIC(vector_mulq_n_v8u16, "vector_mulq_n_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyU16) + { kArgTyV8U16, kArgTyU16 }) DEF_MIR_INTRINSIC(vector_mul_n_v2u32, "vector_mul_n_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U32, kArgTyU32) + { kArgTyV2U32, kArgTyU32 }) DEF_MIR_INTRINSIC(vector_mulq_n_v4u32, "vector_mulq_n_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyU32) + { kArgTyV4U32, kArgTyU32 }) DEF_MIR_INTRINSIC(vector_mul_lane_v4i16, "vector_mul_lane_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16, kArgTyV4I16, kArgTyI32) + { kArgTyV4I16, kArgTyV4I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mulq_lane_v8i16, "vector_mulq_lane_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV4I16, kArgTyI32) + { kArgTyV8I16, kArgTyV4I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mul_lane_v2i32, "vector_mul_lane_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32, kArgTyV2I32, kArgTyI32) + { kArgTyV2I32, kArgTyV2I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mulq_lane_v4i32, "vector_mulq_lane_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV2I32, kArgTyI32) + { kArgTyV4I32, kArgTyV2I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mul_lane_v4u16, "vector_mul_lane_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U16, kArgTyV4U16, kArgTyI32) + { kArgTyV4U16, kArgTyV4U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mulq_lane_v8u16, "vector_mulq_lane_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyV4U16, kArgTyI32) + { kArgTyV8U16, kArgTyV4U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mul_lane_v2u32, "vector_mul_lane_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U32, kArgTyV2U32, kArgTyI32) + { kArgTyV2U32, kArgTyV2U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mulq_lane_v4u32, "vector_mulq_lane_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV2U32, kArgTyI32) + { kArgTyV4U32, kArgTyV2U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mul_laneq_v4i16, "vector_mul_laneq_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16, kArgTyV8I16, kArgTyI32) + { kArgTyV4I16, kArgTyV8I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mulq_laneq_v8i16, "vector_mulq_laneq_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV8I16, kArgTyI32) + { kArgTyV8I16, kArgTyV8I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mul_laneq_v2i32, "vector_mul_laneq_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32, kArgTyV4I32, kArgTyI32) + { kArgTyV2I32, kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mulq_laneq_v4i32, "vector_mulq_laneq_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I32, kArgTyI32) + { kArgTyV4I32, kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mul_laneq_v4u16, "vector_mul_laneq_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U16, kArgTyV8U16, kArgTyI32) + { kArgTyV4U16, kArgTyV8U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mulq_laneq_v8u16, "vector_mulq_laneq_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyV8U16, kArgTyI32) + { kArgTyV8U16, kArgTyV8U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mul_laneq_v2u32, "vector_mul_laneq_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U32, kArgTyV4U32, kArgTyI32) + { kArgTyV2U32, kArgTyV4U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mulq_laneq_v4u32, "vector_mulq_laneq_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV4U32, kArgTyI32) + { kArgTyV4U32, kArgTyV4U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mull_n_v4i32, "vector_mull_n_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I16, kArgTyI16) + { kArgTyV4I16, kArgTyI16 }) DEF_MIR_INTRINSIC(vector_mull_n_v2i64, "vector_mull_n_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I32, kArgTyI32) + { kArgTyV2I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mull_n_v4u32, "vector_mull_n_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U16, kArgTyU16) + { kArgTyV4U16, kArgTyU16 }) DEF_MIR_INTRINSIC(vector_mull_n_v2u64, "vector_mull_n_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U32, kArgTyU32) + { kArgTyV2U32, kArgTyU32 }) DEF_MIR_INTRINSIC(vector_mull_high_n_v4i32, "vector_mull_high_n_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV8I16, kArgTyI16) + { kArgTyV8I16, kArgTyI16 }) DEF_MIR_INTRINSIC(vector_mull_high_n_v2i64, "vector_mull_high_n_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV4I32, kArgTyI32) + { kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mull_high_n_v4u32, "vector_mull_high_n_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV8U16, kArgTyU16) + { kArgTyV8U16, kArgTyU16 }) DEF_MIR_INTRINSIC(vector_mull_high_n_v2u64, "vector_mull_high_n_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV4U32, kArgTyU32) + { kArgTyV4U32, kArgTyU32 }) DEF_MIR_INTRINSIC(vector_mull_lane_v4i32, "vector_mull_lane_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I16, kArgTyV4I16, kArgTyI32) + { kArgTyV4I16, kArgTyV4I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mull_lane_v2i64, "vector_mull_lane_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I32, kArgTyV2I32, kArgTyI32) + { kArgTyV2I32, kArgTyV2I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mull_lane_v4u32, "vector_mull_lane_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U16, kArgTyV4U16, kArgTyI32) + { kArgTyV4U16, kArgTyV4U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mull_lane_v2u64, "vector_mull_lane_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U32, kArgTyV2U32, kArgTyI32) + { kArgTyV2U32, kArgTyV2U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mull_high_lane_v4i32, "vector_mull_high_lane_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV8I16, kArgTyV4I16, kArgTyI32) + { kArgTyV8I16, kArgTyV4I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mull_high_lane_v2i64, "vector_mull_high_lane_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV4I32, kArgTyV2I32, kArgTyI32) + { kArgTyV4I32, kArgTyV2I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mull_high_lane_v4u32, "vector_mull_high_lane_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV8U16, kArgTyV4U16, kArgTyI32) + { kArgTyV8U16, kArgTyV4U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mull_high_lane_v2u64, "vector_mull_high_lane_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV4U32, kArgTyV2U32, kArgTyI32) + { kArgTyV4U32, kArgTyV2U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mull_laneq_v4i32, "vector_mull_laneq_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I16, kArgTyV8I16, kArgTyI32) + { kArgTyV4I16, kArgTyV8I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mull_laneq_v2i64, "vector_mull_laneq_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I32, kArgTyV4I32, kArgTyI32) + { kArgTyV2I32, kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mull_laneq_v4u32, "vector_mull_laneq_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U16, kArgTyV8U16, kArgTyI32) + { kArgTyV4U16, kArgTyV8U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mull_laneq_v2u64, "vector_mull_laneq_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U32, kArgTyV4U32, kArgTyI32) + { kArgTyV2U32, kArgTyV4U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mull_high_laneq_v4i32, "vector_mull_high_laneq_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV8I16, kArgTyV8I16, kArgTyI32) + { kArgTyV8I16, kArgTyV8I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mull_high_laneq_v2i64, "vector_mull_high_laneq_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV4I32, kArgTyV4I32, kArgTyI32) + { kArgTyV4I32, kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mull_high_laneq_v4u32, "vector_mull_high_laneq_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV8U16, kArgTyV8U16, kArgTyI32) + { kArgTyV8U16, kArgTyV8U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mull_high_laneq_v2u64, "vector_mull_high_laneq_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV4U32, kArgTyV4U32, kArgTyI32) + { kArgTyV4U32, kArgTyV4U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_neg_v8i8, "vector_neg_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I8) + { kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_negq_v16i8, "vector_negq_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV16I8) + { kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_neg_v4i16, "vector_neg_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16) + { kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_negq_v8i16, "vector_negq_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16) + { kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_neg_v2i32, "vector_neg_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32) + { kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_negq_v4i32, "vector_negq_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32) + { kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_neg_v1i64, "vector_neg_v1i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1I64, - kArgTyV1I64) + { kArgTyV1I64 }) DEF_MIR_INTRINSIC(vector_negd_v1i64, "vector_negd_v1i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI64, - kArgTyI64) + { kArgTyI64 }) DEF_MIR_INTRINSIC(vector_negq_v2i64, "vector_negq_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64) + { kArgTyV2I64 }) DEF_MIR_INTRINSIC(vector_mvn_v8i8, "vector_mvn_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I8) + { kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_mvnq_v16i8, "vector_mvnq_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV16I8) + { kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_mvn_v4i16, "vector_mvn_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16) + { kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_mvnq_v8i16, "vector_mvnq_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16) + { kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_mvn_v2i32, "vector_mvn_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32) + { kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_mvnq_v4i32, "vector_mvnq_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32) + { kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_mvn_v8u8, "vector_mvn_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U8) + { kArgTyV8U8 }) DEF_MIR_INTRINSIC(vector_mvnq_v16u8, "vector_mvnq_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV16U8) + { kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_mvn_v4u16, "vector_mvn_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U16) + { kArgTyV4U16 }) DEF_MIR_INTRINSIC(vector_mvnq_v8u16, "vector_mvnq_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16) + { kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_mvn_v2u32, "vector_mvn_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U32) + { kArgTyV2U32 }) DEF_MIR_INTRINSIC(vector_mvnq_v4u32, "vector_mvnq_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32) + { kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_orn_v8i8, "vector_orn_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I8, kArgTyV8I8) + { kArgTyV8I8, kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_ornq_v16i8, "vector_ornq_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV16I8, kArgTyV16I8) + { kArgTyV16I8, kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_orn_v4i16, "vector_orn_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16, kArgTyV4I16) + { kArgTyV4I16, kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_ornq_v8i16, "vector_ornq_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV8I16) + { kArgTyV8I16, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_orn_v2i32, "vector_orn_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32, kArgTyV2I32) + { kArgTyV2I32, kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_ornq_v4i32, "vector_ornq_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I32) + { kArgTyV4I32, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_orn_v1i64, "vector_orn_v1i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1I64, - kArgTyV1I64, kArgTyV1I64) + { kArgTyV1I64, kArgTyV1I64 }) DEF_MIR_INTRINSIC(vector_ornq_v2i64, "vector_ornq_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV2I64) + { kArgTyV2I64, kArgTyV2I64 }) DEF_MIR_INTRINSIC(vector_orn_v8u8, "vector_orn_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U8, kArgTyV8U8) + { kArgTyV8U8, kArgTyV8U8 }) DEF_MIR_INTRINSIC(vector_ornq_v16u8, "vector_ornq_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV16U8, kArgTyV16U8) + { kArgTyV16U8, kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_orn_v4u16, "vector_orn_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U16, kArgTyV4U16) + { kArgTyV4U16, kArgTyV4U16 }) DEF_MIR_INTRINSIC(vector_ornq_v8u16, "vector_ornq_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyV8U16) + { kArgTyV8U16, kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_orn_v2u32, "vector_orn_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U32, kArgTyV2U32) + { kArgTyV2U32, kArgTyV2U32 }) DEF_MIR_INTRINSIC(vector_ornq_v4u32, "vector_ornq_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV4U32) + { kArgTyV4U32, kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_orn_v1u64, "vector_orn_v1u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1U64, - kArgTyV1U64, kArgTyV1U64) + { kArgTyV1U64, kArgTyV1U64 }) DEF_MIR_INTRINSIC(vector_ornq_v2u64, "vector_ornq_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U64, kArgTyV2U64) + { kArgTyV2U64, kArgTyV2U64 }) DEF_MIR_INTRINSIC(vector_cls_v8i8, "vector_cls_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I8) + { kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_clsq_v16i8, "vector_clsq_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV16I8) + { kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_cls_v4i16, "vector_cls_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16) + { kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_clsq_v8i16, "vector_clsq_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16) + { kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_cls_v2i32, "vector_cls_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32) + { kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_clsq_v4i32, "vector_clsq_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32) + { kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_cls_v8u8, "vector_cls_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8U8) + { kArgTyV8U8 }) DEF_MIR_INTRINSIC(vector_clsq_v16u8, "vector_clsq_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV16U8) + { kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_cls_v4u16, "vector_cls_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4U16) + { kArgTyV4U16 }) DEF_MIR_INTRINSIC(vector_clsq_v8u16, "vector_clsq_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8U16) + { kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_cls_v2u32, "vector_cls_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2U32) + { kArgTyV2U32 }) DEF_MIR_INTRINSIC(vector_clsq_v4u32, "vector_clsq_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4U32) + { kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_clz_v8i8, "vector_clz_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I8) + { kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_clzq_v16i8, "vector_clzq_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV16I8) + { kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_clz_v4i16, "vector_clz_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16) + { kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_clzq_v8i16, "vector_clzq_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16) + { kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_clz_v2i32, "vector_clz_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32) + { kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_clzq_v4i32, "vector_clzq_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32) + { kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_clz_v8u8, "vector_clz_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U8) + { kArgTyV8U8 }) DEF_MIR_INTRINSIC(vector_clzq_v16u8, "vector_clzq_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV16U8) + { kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_clz_v4u16, "vector_clz_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U16) + { kArgTyV4U16 }) DEF_MIR_INTRINSIC(vector_clzq_v8u16, "vector_clzq_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16) + { kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_clz_v2u32, "vector_clz_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U32) + { kArgTyV2U32 }) DEF_MIR_INTRINSIC(vector_clzq_v4u32, "vector_clzq_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32) + { kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_cnt_v8i8, "vector_cnt_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I8) + { kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_cntq_v16i8, "vector_cntq_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV16I8) + { kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_cnt_v8u8, "vector_cnt_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U8) + { kArgTyV8U8 }) DEF_MIR_INTRINSIC(vector_cntq_v16u8, "vector_cntq_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV16U8) + { kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_bic_v8i8, "vector_bic_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I8, kArgTyV8I8) + { kArgTyV8I8, kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_bicq_v16i8, "vector_bicq_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV16I8, kArgTyV16I8) + { kArgTyV16I8, kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_bic_v4i16, "vector_bic_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16, kArgTyV4I16) + { kArgTyV4I16, kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_bicq_v8i16, "vector_bicq_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV8I16) + { kArgTyV8I16, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_bic_v2i32, "vector_bic_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32, kArgTyV2I32) + { kArgTyV2I32, kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_bicq_v4i32, "vector_bicq_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I32) + { kArgTyV4I32, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_bic_v1i64, "vector_bic_v1i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1I64, - kArgTyV1I64, kArgTyV1I64) + { kArgTyV1I64, kArgTyV1I64 }) DEF_MIR_INTRINSIC(vector_bicq_v2i64, "vector_bicq_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV2I64) + { kArgTyV2I64, kArgTyV2I64 }) DEF_MIR_INTRINSIC(vector_bic_v8u8, "vector_bic_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U8, kArgTyV8U8) + { kArgTyV8U8, kArgTyV8U8 }) DEF_MIR_INTRINSIC(vector_bicq_v16u8, "vector_bicq_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV16U8, kArgTyV16U8) + { kArgTyV16U8, kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_bic_v4u16, "vector_bic_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U16, kArgTyV4U16) + { kArgTyV4U16, kArgTyV4U16 }) DEF_MIR_INTRINSIC(vector_bicq_v8u16, "vector_bicq_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyV8U16) + { kArgTyV8U16, kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_bic_v2u32, "vector_bic_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U32, kArgTyV2U32) + { kArgTyV2U32, kArgTyV2U32 }) DEF_MIR_INTRINSIC(vector_bicq_v4u32, "vector_bicq_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV4U32) + { kArgTyV4U32, kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_bic_v1u64, "vector_bic_v1u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1U64, - kArgTyV1U64, kArgTyV1U64) + { kArgTyV1U64, kArgTyV1U64 }) DEF_MIR_INTRINSIC(vector_bicq_v2u64, "vector_bicq_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U64, kArgTyV2U64) + { kArgTyV2U64, kArgTyV2U64 }) DEF_MIR_INTRINSIC(vector_bsl_v8i8, "vector_bsl_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8U8, kArgTyV8I8, kArgTyV8I8) + { kArgTyV8U8, kArgTyV8I8, kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_bslq_v16i8, "vector_bslq_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV16U8, kArgTyV16I8, kArgTyV16I8) + { kArgTyV16U8, kArgTyV16I8, kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_bsl_v4i16, "vector_bsl_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4U16, kArgTyV4I16, kArgTyV4I16) + { kArgTyV4U16, kArgTyV4I16, kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_bslq_v8i16, "vector_bslq_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8U16, kArgTyV8I16, kArgTyV8I16) + { kArgTyV8U16, kArgTyV8I16, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_bsl_v2i32, "vector_bsl_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2U32, kArgTyV2I32, kArgTyV2I32) + { kArgTyV2U32, kArgTyV2I32, kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_bslq_v4i32, "vector_bslq_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4U32, kArgTyV4I32, kArgTyV4I32) + { kArgTyV4U32, kArgTyV4I32, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_bsl_v1i64, "vector_bsl_v1i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1I64, - kArgTyV1U64, kArgTyV1I64, kArgTyV1I64) + { kArgTyV1U64, kArgTyV1I64, kArgTyV1I64 }) DEF_MIR_INTRINSIC(vector_bslq_v2i64, "vector_bslq_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2U64, kArgTyV2I64, kArgTyV2I64) + { kArgTyV2U64, kArgTyV2I64, kArgTyV2I64 }) DEF_MIR_INTRINSIC(vector_bsl_v8u8, "vector_bsl_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U8, kArgTyV8U8, kArgTyV8U8) + { kArgTyV8U8, kArgTyV8U8, kArgTyV8U8 }) DEF_MIR_INTRINSIC(vector_bslq_v16u8, "vector_bslq_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV16U8, kArgTyV16U8, kArgTyV16U8) + { kArgTyV16U8, kArgTyV16U8, kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_bsl_v4u16, "vector_bsl_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U16, kArgTyV4U16, kArgTyV4U16) + { kArgTyV4U16, kArgTyV4U16, kArgTyV4U16 }) DEF_MIR_INTRINSIC(vector_bslq_v8u16, "vector_bslq_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyV8U16, kArgTyV8U16) + { kArgTyV8U16, kArgTyV8U16, kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_bsl_v2u32, "vector_bsl_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U32, kArgTyV2U32, kArgTyV2U32) + { kArgTyV2U32, kArgTyV2U32, kArgTyV2U32 }) DEF_MIR_INTRINSIC(vector_bslq_v4u32, "vector_bslq_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV4U32, kArgTyV4U32) + { kArgTyV4U32, kArgTyV4U32, kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_bsl_v1u64, "vector_bsl_v1u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1U64, - kArgTyV1U64, kArgTyV1U64, kArgTyV1U64) + { kArgTyV1U64, kArgTyV1U64, kArgTyV1U64 }) DEF_MIR_INTRINSIC(vector_bslq_v2u64, "vector_bslq_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U64, kArgTyV2U64, kArgTyV2U64) + { kArgTyV2U64, kArgTyV2U64, kArgTyV2U64 }) DEF_MIR_INTRINSIC(vector_copy_lane_v8i8, "vector_copy_lane_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I8, kArgTyI32, kArgTyV8I8, kArgTyI32) + { kArgTyV8I8, kArgTyI32, kArgTyV8I8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_copyq_lane_v16i8, "vector_copyq_lane_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV16I8, kArgTyI32, kArgTyV8I8, kArgTyI32) + { kArgTyV16I8, kArgTyI32, kArgTyV8I8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_copy_lane_v4i16, "vector_copy_lane_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16, kArgTyI32, kArgTyV4I16, kArgTyI32) + { kArgTyV4I16, kArgTyI32, kArgTyV4I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_copyq_lane_v8i16, "vector_copyq_lane_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyI32, kArgTyV4I16, kArgTyI32) + { kArgTyV8I16, kArgTyI32, kArgTyV4I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_copy_lane_v2i32, "vector_copy_lane_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32, kArgTyI32, kArgTyV2I32, kArgTyI32) + { kArgTyV2I32, kArgTyI32, kArgTyV2I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_copyq_lane_v4i32, "vector_copyq_lane_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyI32, kArgTyV2I32, kArgTyI32) + { kArgTyV4I32, kArgTyI32, kArgTyV2I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_copy_lane_v1i64, "vector_copy_lane_v1i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1I64, - kArgTyV1I64, kArgTyI32, kArgTyV1I64, kArgTyI32) + { kArgTyV1I64, kArgTyI32, kArgTyV1I64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_copyq_lane_v2i64, "vector_copyq_lane_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyI32, kArgTyV1I64, kArgTyI32) + { kArgTyV2I64, kArgTyI32, kArgTyV1I64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_copy_lane_v8u8, "vector_copy_lane_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U8, kArgTyI32, kArgTyV8U8, kArgTyI32) + { kArgTyV8U8, kArgTyI32, kArgTyV8U8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_copyq_lane_v16u8, "vector_copyq_lane_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV16U8, kArgTyI32, kArgTyV8U8, kArgTyI32) + { kArgTyV16U8, kArgTyI32, kArgTyV8U8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_copy_lane_v4u16, "vector_copy_lane_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U16, kArgTyI32, kArgTyV4U16, kArgTyI32) + { kArgTyV4U16, kArgTyI32, kArgTyV4U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_copyq_lane_v8u16, "vector_copyq_lane_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyI32, kArgTyV4U16, kArgTyI32) + { kArgTyV8U16, kArgTyI32, kArgTyV4U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_copy_lane_v2u32, "vector_copy_lane_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U32, kArgTyI32, kArgTyV2U32, kArgTyI32) + { kArgTyV2U32, kArgTyI32, kArgTyV2U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_copyq_lane_v4u32, "vector_copyq_lane_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyI32, kArgTyV2U32, kArgTyI32) + { kArgTyV4U32, kArgTyI32, kArgTyV2U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_copy_lane_v1u64, "vector_copy_lane_v1u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1U64, - kArgTyV1U64, kArgTyI32, kArgTyV1U64, kArgTyI32) + { kArgTyV1U64, kArgTyI32, kArgTyV1U64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_copyq_lane_v2u64, "vector_copyq_lane_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U64, kArgTyI32, kArgTyV1U64, kArgTyI32) + { kArgTyV2U64, kArgTyI32, kArgTyV1U64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_copy_laneq_v8i8, "vector_copy_laneq_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I8, kArgTyI32, kArgTyV16I8, kArgTyI32) + { kArgTyV8I8, kArgTyI32, kArgTyV16I8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_copyq_laneq_v16i8, "vector_copyq_laneq_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV16I8, kArgTyI32, kArgTyV16I8, kArgTyI32) + { kArgTyV16I8, kArgTyI32, kArgTyV16I8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_copy_laneq_v4i16, "vector_copy_laneq_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16, kArgTyI32, kArgTyV8I16, kArgTyI32) + { kArgTyV4I16, kArgTyI32, kArgTyV8I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_copyq_laneq_v8i16, "vector_copyq_laneq_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyI32, kArgTyV8I16, kArgTyI32) + { kArgTyV8I16, kArgTyI32, kArgTyV8I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_copy_laneq_v2i32, "vector_copy_laneq_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32, kArgTyI32, kArgTyV4I32, kArgTyI32) + { kArgTyV2I32, kArgTyI32, kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_copyq_laneq_v4i32, "vector_copyq_laneq_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyI32, kArgTyV4I32, kArgTyI32) + { kArgTyV4I32, kArgTyI32, kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_copy_laneq_v1i64, "vector_copy_laneq_v1i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1I64, - kArgTyV1I64, kArgTyI32, kArgTyV2I64, kArgTyI32) + { kArgTyV1I64, kArgTyI32, kArgTyV2I64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_copyq_laneq_v2i64, "vector_copyq_laneq_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyI32, kArgTyV2I64, kArgTyI32) + { kArgTyV2I64, kArgTyI32, kArgTyV2I64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_copy_laneq_v8u8, "vector_copy_laneq_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U8, kArgTyI32, kArgTyV16U8, kArgTyI32) + { kArgTyV8U8, kArgTyI32, kArgTyV16U8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_copyq_laneq_v16u8, "vector_copyq_laneq_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV16U8, kArgTyI32, kArgTyV16U8, kArgTyI32) + { kArgTyV16U8, kArgTyI32, kArgTyV16U8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_copy_laneq_v4u16, "vector_copy_laneq_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U16, kArgTyI32, kArgTyV8U16, kArgTyI32) + { kArgTyV4U16, kArgTyI32, kArgTyV8U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_copyq_laneq_v8u16, "vector_copyq_laneq_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyI32, kArgTyV8U16, kArgTyI32) + { kArgTyV8U16, kArgTyI32, kArgTyV8U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_copy_laneq_v2u32, "vector_copy_laneq_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U32, kArgTyI32, kArgTyV4U32, kArgTyI32) + { kArgTyV2U32, kArgTyI32, kArgTyV4U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_copyq_laneq_v4u32, "vector_copyq_laneq_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyI32, kArgTyV4U32, kArgTyI32) + { kArgTyV4U32, kArgTyI32, kArgTyV4U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_copy_laneq_v1u64, "vector_copy_laneq_v1u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1U64, - kArgTyV1U64, kArgTyI32, kArgTyV2U64, kArgTyI32) + { kArgTyV1U64, kArgTyI32, kArgTyV2U64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_copyq_laneq_v2u64, "vector_copyq_laneq_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U64, kArgTyI32, kArgTyV2U64, kArgTyI32) + { kArgTyV2U64, kArgTyI32, kArgTyV2U64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_rbit_v8i8, "vector_rbit_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I8) + { kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_rbitq_v16i8, "vector_rbitq_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV16I8) + { kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_rbit_v8u8, "vector_rbit_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U8) + { kArgTyV8U8 }) DEF_MIR_INTRINSIC(vector_rbitq_v16u8, "vector_rbitq_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV16U8) + { kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_create_v8i8, "vector_create_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyU64) + { kArgTyU64 }) DEF_MIR_INTRINSIC(vector_create_v4i16, "vector_create_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyU64) + { kArgTyU64 }) DEF_MIR_INTRINSIC(vector_create_v2i32, "vector_create_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyU64) + { kArgTyU64 }) DEF_MIR_INTRINSIC(vector_create_v1i64, "vector_create_v1i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1I64, - kArgTyU64) + { kArgTyU64 }) DEF_MIR_INTRINSIC(vector_create_v8u8, "vector_create_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyU64) + { kArgTyU64 }) DEF_MIR_INTRINSIC(vector_create_v4u16, "vector_create_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyU64) + { kArgTyU64 }) DEF_MIR_INTRINSIC(vector_create_v2u32, "vector_create_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyU64) + { kArgTyU64 }) DEF_MIR_INTRINSIC(vector_create_v1u64, "vector_create_v1u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1U64, - kArgTyU64) + { kArgTyU64 }) DEF_MIR_INTRINSIC(vector_mov_n_v8i8, "vector_mov_n_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyI8) + { kArgTyI8 }) DEF_MIR_INTRINSIC(vector_movq_n_v16i8, "vector_movq_n_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyI8) + { kArgTyI8 }) DEF_MIR_INTRINSIC(vector_mov_n_v4i16, "vector_mov_n_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyI16) + { kArgTyI16 }) DEF_MIR_INTRINSIC(vector_movq_n_v8i16, "vector_movq_n_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyI16) + { kArgTyI16 }) DEF_MIR_INTRINSIC(vector_mov_n_v2i32, "vector_mov_n_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyI32) + { kArgTyI32 }) DEF_MIR_INTRINSIC(vector_movq_n_v4i32, "vector_movq_n_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyI32) + { kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mov_n_v1i64, "vector_mov_n_v1i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1I64, - kArgTyI64) + { kArgTyI64 }) DEF_MIR_INTRINSIC(vector_movq_n_v2i64, "vector_movq_n_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyI64) + { kArgTyI64 }) DEF_MIR_INTRINSIC(vector_mov_n_v8u8, "vector_mov_n_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyU8) + { kArgTyU8 }) DEF_MIR_INTRINSIC(vector_movq_n_v16u8, "vector_movq_n_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyU8) + { kArgTyU8 }) DEF_MIR_INTRINSIC(vector_mov_n_v4u16, "vector_mov_n_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyU16) + { kArgTyU16 }) DEF_MIR_INTRINSIC(vector_movq_n_v8u16, "vector_movq_n_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyU16) + { kArgTyU16 }) DEF_MIR_INTRINSIC(vector_mov_n_v2u32, "vector_mov_n_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyU32) + { kArgTyU32 }) DEF_MIR_INTRINSIC(vector_movq_n_v4u32, "vector_movq_n_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyU32) + { kArgTyU32 }) DEF_MIR_INTRINSIC(vector_mov_n_v1u64, "vector_mov_n_v1u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1U64, - kArgTyU64) + { kArgTyU64 }) DEF_MIR_INTRINSIC(vector_movq_n_v2u64, "vector_movq_n_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyU64) + { kArgTyU64 }) DEF_MIR_INTRINSIC(vector_dup_lane_v8i8, "vector_dup_lane_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I8, kArgTyI32) + { kArgTyV8I8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_dupq_lane_v16i8, "vector_dupq_lane_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV8I8, kArgTyI32) + { kArgTyV8I8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_dup_lane_v4i16, "vector_dup_lane_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16, kArgTyI32) + { kArgTyV4I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_dupq_lane_v8i16, "vector_dupq_lane_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV4I16, kArgTyI32) + { kArgTyV4I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_dup_lane_v2i32, "vector_dup_lane_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32, kArgTyI32) + { kArgTyV2I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_dupq_lane_v4i32, "vector_dupq_lane_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV2I32, kArgTyI32) + { kArgTyV2I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_dup_lane_v1i64, "vector_dup_lane_v1i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1I64, - kArgTyV1I64, kArgTyI32) + { kArgTyV1I64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_dupq_lane_v2i64, "vector_dupq_lane_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV1I64, kArgTyI32) + { kArgTyV1I64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_dup_lane_v8u8, "vector_dup_lane_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U8, kArgTyI32) + { kArgTyV8U8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_dupq_lane_v16u8, "vector_dupq_lane_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV8U8, kArgTyI32) + { kArgTyV8U8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_dup_lane_v4u16, "vector_dup_lane_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U16, kArgTyI32) + { kArgTyV4U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_dupq_lane_v8u16, "vector_dupq_lane_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV4U16, kArgTyI32) + { kArgTyV4U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_dup_lane_v2u32, "vector_dup_lane_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U32, kArgTyI32) + { kArgTyV2U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_dupq_lane_v4u32, "vector_dupq_lane_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV2U32, kArgTyI32) + { kArgTyV2U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_dup_lane_v1u64, "vector_dup_lane_v1u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1U64, - kArgTyV1U64, kArgTyI32) + { kArgTyV1U64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_dupq_lane_v2u64, "vector_dupq_lane_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV1U64, kArgTyI32) + { kArgTyV1U64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_dup_laneq_v8i8, "vector_dup_laneq_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV16I8, kArgTyI32) + { kArgTyV16I8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_dupq_laneq_v16i8, "vector_dupq_laneq_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV16I8, kArgTyI32) + { kArgTyV16I8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_dup_laneq_v4i16, "vector_dup_laneq_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV8I16, kArgTyI32) + { kArgTyV8I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_dupq_laneq_v8i16, "vector_dupq_laneq_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyI32) + { kArgTyV8I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_dup_laneq_v2i32, "vector_dup_laneq_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV4I32, kArgTyI32) + { kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_dupq_laneq_v4i32, "vector_dupq_laneq_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyI32) + { kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_dup_laneq_v1i64, "vector_dup_laneq_v1i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1I64, - kArgTyV2I64, kArgTyI32) + { kArgTyV2I64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_dupq_laneq_v2i64, "vector_dupq_laneq_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyI32) + { kArgTyV2I64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_dup_laneq_v8u8, "vector_dup_laneq_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV16U8, kArgTyI32) + { kArgTyV16U8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_dupq_laneq_v16u8, "vector_dupq_laneq_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV16U8, kArgTyI32) + { kArgTyV16U8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_dup_laneq_v4u16, "vector_dup_laneq_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV8U16, kArgTyI32) + { kArgTyV8U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_dupq_laneq_v8u16, "vector_dupq_laneq_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyI32) + { kArgTyV8U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_dup_laneq_v2u32, "vector_dup_laneq_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV4U32, kArgTyI32) + { kArgTyV4U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_dupq_laneq_v4u32, "vector_dupq_laneq_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyI32) + { kArgTyV4U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_dup_laneq_v1u64, "vector_dup_laneq_v1u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1U64, - kArgTyV2U64, kArgTyI32) + { kArgTyV2U64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_dupq_laneq_v2u64, "vector_dupq_laneq_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U64, kArgTyI32) + { kArgTyV2U64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_combine_v16i8, "vector_combine_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV8I8, kArgTyV8I8) + { kArgTyV8I8, kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_combine_v8i16, "vector_combine_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV4I16, kArgTyV4I16) + { kArgTyV4I16, kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_combine_v4i32, "vector_combine_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV2I32, kArgTyV2I32) + { kArgTyV2I32, kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_combine_v2i64, "vector_combine_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV1I64, kArgTyV1I64) + { kArgTyV1I64, kArgTyV1I64 }) DEF_MIR_INTRINSIC(vector_combine_v16u8, "vector_combine_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV8U8, kArgTyV8U8) + { kArgTyV8U8, kArgTyV8U8 }) DEF_MIR_INTRINSIC(vector_combine_v8u16, "vector_combine_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV4U16, kArgTyV4U16) + { kArgTyV4U16, kArgTyV4U16 }) DEF_MIR_INTRINSIC(vector_combine_v4u32, "vector_combine_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV2U32, kArgTyV2U32) + { kArgTyV2U32, kArgTyV2U32 }) DEF_MIR_INTRINSIC(vector_combine_v2u64, "vector_combine_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV1U64, kArgTyV1U64) + { kArgTyV1U64, kArgTyV1U64 }) DEF_MIR_INTRINSIC(vector_dupb_lane_v8i8, "vector_dupb_lane_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI8, - kArgTyV8I8, kArgTyI32) + { kArgTyV8I8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_duph_lane_v4i16, "vector_duph_lane_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI16, - kArgTyV4I16, kArgTyI32) + { kArgTyV4I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_dups_lane_v2i32, "vector_dups_lane_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI32, - kArgTyV2I32, kArgTyI32) + { kArgTyV2I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_dupd_lane_v1i64, "vector_dupd_lane_v1i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI64, - kArgTyV1I64, kArgTyI32) + { kArgTyV1I64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_dupb_lane_v8u8, "vector_dupb_lane_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU8, - kArgTyV8U8, kArgTyI32) + { kArgTyV8U8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_duph_lane_v4u16, "vector_duph_lane_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU16, - kArgTyV4U16, kArgTyI32) + { kArgTyV4U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_dups_lane_v2u32, "vector_dups_lane_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU32, - kArgTyV2U32, kArgTyI32) + { kArgTyV2U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_dupd_lane_v1u64, "vector_dupd_lane_v1u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU64, - kArgTyV1U64, kArgTyI32) + { kArgTyV1U64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_dupb_laneq_v16i8, "vector_dupb_laneq_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI8, - kArgTyV16I8, kArgTyI32) + { kArgTyV16I8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_duph_laneq_v8i16, "vector_duph_laneq_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI16, - kArgTyV8I16, kArgTyI32) + { kArgTyV8I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_dups_laneq_v4i32, "vector_dups_laneq_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI32, - kArgTyV4I32, kArgTyI32) + { kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_dupd_laneq_v2i64, "vector_dupd_laneq_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI64, - kArgTyV2I64, kArgTyI32) + { kArgTyV2I64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_dupb_laneq_v16u8, "vector_dupb_laneq_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU8, - kArgTyV16U8, kArgTyI32) + { kArgTyV16U8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_duph_laneq_v8u16, "vector_duph_laneq_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU16, - kArgTyV8U16, kArgTyI32) + { kArgTyV8U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_dups_laneq_v4u32, "vector_dups_laneq_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU32, - kArgTyV4U32, kArgTyI32) + { kArgTyV4U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_dupd_laneq_v2u64, "vector_dupd_laneq_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU64, - kArgTyV2U64, kArgTyI32) + { kArgTyV2U64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_rev64_v8i8, "vector_rev64_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I8) + { kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_rev64q_v16i8, "vector_rev64q_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV16I8) + { kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_rev64_v4i16, "vector_rev64_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16) + { kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_rev64q_v8i16, "vector_rev64q_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16) + { kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_rev64_v2i32, "vector_rev64_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32) + { kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_rev64q_v4i32, "vector_rev64q_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32) + { kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_rev64_v8u8, "vector_rev64_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U8) + { kArgTyV8U8 }) DEF_MIR_INTRINSIC(vector_rev64q_v16u8, "vector_rev64q_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV16U8) + { kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_rev64_v4u16, "vector_rev64_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U16) + { kArgTyV4U16 }) DEF_MIR_INTRINSIC(vector_rev64q_v8u16, "vector_rev64q_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16) + { kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_rev64_v2u32, "vector_rev64_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U32) + { kArgTyV2U32 }) DEF_MIR_INTRINSIC(vector_rev64q_v4u32, "vector_rev64q_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32) + { kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_rev16_v8i8, "vector_rev16_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I8) + { kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_rev16q_v16i8, "vector_rev16q_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV16I8) + { kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_rev16_v8u8, "vector_rev16_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U8) + { kArgTyV8U8 }) DEF_MIR_INTRINSIC(vector_rev16q_v16u8, "vector_rev16q_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV16U8) + { kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_zip1_v8i8, "vector_zip1_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I8, kArgTyV8I8) + { kArgTyV8I8, kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_zip1q_v16i8, "vector_zip1q_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV16I8, kArgTyV16I8) + { kArgTyV16I8, kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_zip1_v4i16, "vector_zip1_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16, kArgTyV4I16) + { kArgTyV4I16, kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_zip1q_v8i16, "vector_zip1q_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV8I16) + { kArgTyV8I16, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_zip1_v2i32, "vector_zip1_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32, kArgTyV2I32) + { kArgTyV2I32, kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_zip1q_v4i32, "vector_zip1q_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I32) + { kArgTyV4I32, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_zip1q_v2i64, "vector_zip1q_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV2I64) + { kArgTyV2I64, kArgTyV2I64 }) DEF_MIR_INTRINSIC(vector_zip1_v8u8, "vector_zip1_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U8, kArgTyV8U8) + { kArgTyV8U8, kArgTyV8U8 }) DEF_MIR_INTRINSIC(vector_zip1q_v16u8, "vector_zip1q_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV16U8, kArgTyV16U8) + { kArgTyV16U8, kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_zip1_v4u16, "vector_zip1_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U16, kArgTyV4U16) + { kArgTyV4U16, kArgTyV4U16 }) DEF_MIR_INTRINSIC(vector_zip1q_v8u16, "vector_zip1q_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyV8U16) + { kArgTyV8U16, kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_zip1_v2u32, "vector_zip1_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U32, kArgTyV2U32) + { kArgTyV2U32, kArgTyV2U32 }) DEF_MIR_INTRINSIC(vector_zip1q_v4u32, "vector_zip1q_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV4U32) + { kArgTyV4U32, kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_zip1q_v2u64, "vector_zip1q_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U64, kArgTyV2U64) + { kArgTyV2U64, kArgTyV2U64 }) DEF_MIR_INTRINSIC(vector_zip2_v8i8, "vector_zip2_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I8, kArgTyV8I8) + { kArgTyV8I8, kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_zip2q_v16i8, "vector_zip2q_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV16I8, kArgTyV16I8) + { kArgTyV16I8, kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_zip2_v4i16, "vector_zip2_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16, kArgTyV4I16) + { kArgTyV4I16, kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_zip2q_v8i16, "vector_zip2q_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV8I16) + { kArgTyV8I16, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_zip2_v2i32, "vector_zip2_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32, kArgTyV2I32) + { kArgTyV2I32, kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_zip2q_v4i32, "vector_zip2q_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I32) + { kArgTyV4I32, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_zip2q_v2i64, "vector_zip2q_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV2I64) + { kArgTyV2I64, kArgTyV2I64 }) DEF_MIR_INTRINSIC(vector_zip2_v8u8, "vector_zip2_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U8, kArgTyV8U8) + { kArgTyV8U8, kArgTyV8U8 }) DEF_MIR_INTRINSIC(vector_zip2q_v16u8, "vector_zip2q_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV16U8, kArgTyV16U8) + { kArgTyV16U8, kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_zip2_v4u16, "vector_zip2_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U16, kArgTyV4U16) + { kArgTyV4U16, kArgTyV4U16 }) DEF_MIR_INTRINSIC(vector_zip2q_v8u16, "vector_zip2q_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyV8U16) + { kArgTyV8U16, kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_zip2_v2u32, "vector_zip2_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U32, kArgTyV2U32) + { kArgTyV2U32, kArgTyV2U32 }) DEF_MIR_INTRINSIC(vector_zip2q_v4u32, "vector_zip2q_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV4U32) + { kArgTyV4U32, kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_zip2q_v2u64, "vector_zip2q_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U64, kArgTyV2U64) + { kArgTyV2U64, kArgTyV2U64 }) DEF_MIR_INTRINSIC(vector_uzp1_v8i8, "vector_uzp1_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I8, kArgTyV8I8) + { kArgTyV8I8, kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_uzp1q_v16i8, "vector_uzp1q_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV16I8, kArgTyV16I8) + { kArgTyV16I8, kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_uzp1_v4i16, "vector_uzp1_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16, kArgTyV4I16) + { kArgTyV4I16, kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_uzp1q_v8i16, "vector_uzp1q_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV8I16) + { kArgTyV8I16, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_uzp1_v2i32, "vector_uzp1_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32, kArgTyV2I32) + { kArgTyV2I32, kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_uzp1q_v4i32, "vector_uzp1q_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I32) + { kArgTyV4I32, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_uzp1q_v2i64, "vector_uzp1q_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV2I64) + { kArgTyV2I64, kArgTyV2I64 }) DEF_MIR_INTRINSIC(vector_uzp1_v8u8, "vector_uzp1_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U8, kArgTyV8U8) + { kArgTyV8U8, kArgTyV8U8 }) DEF_MIR_INTRINSIC(vector_uzp1q_v16u8, "vector_uzp1q_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV16U8, kArgTyV16U8) + { kArgTyV16U8, kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_uzp1_v4u16, "vector_uzp1_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U16, kArgTyV4U16) + { kArgTyV4U16, kArgTyV4U16 }) DEF_MIR_INTRINSIC(vector_uzp1q_v8u16, "vector_uzp1q_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyV8U16) + { kArgTyV8U16, kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_uzp1_v2u32, "vector_uzp1_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U32, kArgTyV2U32) + { kArgTyV2U32, kArgTyV2U32 }) DEF_MIR_INTRINSIC(vector_uzp1q_v4u32, "vector_uzp1q_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV4U32) + { kArgTyV4U32, kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_uzp1q_v2u64, "vector_uzp1q_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U64, kArgTyV2U64) + { kArgTyV2U64, kArgTyV2U64 }) DEF_MIR_INTRINSIC(vector_uzp2_v8i8, "vector_uzp2_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I8, kArgTyV8I8) + { kArgTyV8I8, kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_uzp2q_v16i8, "vector_uzp2q_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV16I8, kArgTyV16I8) + { kArgTyV16I8, kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_uzp2_v4i16, "vector_uzp2_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16, kArgTyV4I16) + { kArgTyV4I16, kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_uzp2q_v8i16, "vector_uzp2q_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV8I16) + { kArgTyV8I16, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_uzp2_v2i32, "vector_uzp2_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32, kArgTyV2I32) + { kArgTyV2I32, kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_uzp2q_v4i32, "vector_uzp2q_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I32) + { kArgTyV4I32, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_uzp2q_v2i64, "vector_uzp2q_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV2I64) + { kArgTyV2I64, kArgTyV2I64 }) DEF_MIR_INTRINSIC(vector_uzp2_v8u8, "vector_uzp2_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U8, kArgTyV8U8) + { kArgTyV8U8, kArgTyV8U8 }) DEF_MIR_INTRINSIC(vector_uzp2q_v16u8, "vector_uzp2q_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV16U8, kArgTyV16U8) + { kArgTyV16U8, kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_uzp2_v4u16, "vector_uzp2_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U16, kArgTyV4U16) + { kArgTyV4U16, kArgTyV4U16 }) DEF_MIR_INTRINSIC(vector_uzp2q_v8u16, "vector_uzp2q_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyV8U16) + { kArgTyV8U16, kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_uzp2_v2u32, "vector_uzp2_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U32, kArgTyV2U32) + { kArgTyV2U32, kArgTyV2U32 }) DEF_MIR_INTRINSIC(vector_uzp2q_v4u32, "vector_uzp2q_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV4U32) + { kArgTyV4U32, kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_uzp2q_v2u64, "vector_uzp2q_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U64, kArgTyV2U64) + { kArgTyV2U64, kArgTyV2U64 }) DEF_MIR_INTRINSIC(vector_trn1_v8i8, "vector_trn1_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I8, kArgTyV8I8) + { kArgTyV8I8, kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_trn1q_v16i8, "vector_trn1q_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV16I8, kArgTyV16I8) + { kArgTyV16I8, kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_trn1_v4i16, "vector_trn1_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16, kArgTyV4I16) + { kArgTyV4I16, kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_trn1q_v8i16, "vector_trn1q_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV8I16) + { kArgTyV8I16, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_trn1_v2i32, "vector_trn1_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32, kArgTyV2I32) + { kArgTyV2I32, kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_trn1q_v4i32, "vector_trn1q_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I32) + { kArgTyV4I32, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_trn1q_v2i64, "vector_trn1q_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV2I64) + { kArgTyV2I64, kArgTyV2I64 }) DEF_MIR_INTRINSIC(vector_trn1_v8u8, "vector_trn1_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U8, kArgTyV8U8) + { kArgTyV8U8, kArgTyV8U8 }) DEF_MIR_INTRINSIC(vector_trn1q_v16u8, "vector_trn1q_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV16U8, kArgTyV16U8) + { kArgTyV16U8, kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_trn1_v4u16, "vector_trn1_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U16, kArgTyV4U16) + { kArgTyV4U16, kArgTyV4U16 }) DEF_MIR_INTRINSIC(vector_trn1q_v8u16, "vector_trn1q_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyV8U16) + { kArgTyV8U16, kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_trn1_v2u32, "vector_trn1_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U32, kArgTyV2U32) + { kArgTyV2U32, kArgTyV2U32 }) DEF_MIR_INTRINSIC(vector_trn1q_v4u32, "vector_trn1q_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV4U32) + { kArgTyV4U32, kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_trn1q_v2u64, "vector_trn1q_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U64, kArgTyV2U64) + { kArgTyV2U64, kArgTyV2U64 }) DEF_MIR_INTRINSIC(vector_trn2_v8i8, "vector_trn2_v8i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I8, kArgTyV8I8) + { kArgTyV8I8, kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_trn2q_v16i8, "vector_trn2q_v16i8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV16I8, kArgTyV16I8) + { kArgTyV16I8, kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_trn2_v4i16, "vector_trn2_v4i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16, kArgTyV4I16) + { kArgTyV4I16, kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_trn2q_v8i16, "vector_trn2q_v8i16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV8I16) + { kArgTyV8I16, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_trn2_v2i32, "vector_trn2_v2i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32, kArgTyV2I32) + { kArgTyV2I32, kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_trn2q_v4i32, "vector_trn2q_v4i32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I32) + { kArgTyV4I32, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_trn2q_v2i64, "vector_trn2q_v2i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV2I64) + { kArgTyV2I64, kArgTyV2I64 }) DEF_MIR_INTRINSIC(vector_trn2_v8u8, "vector_trn2_v8u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U8, kArgTyV8U8) + { kArgTyV8U8, kArgTyV8U8 }) DEF_MIR_INTRINSIC(vector_trn2q_v16u8, "vector_trn2q_v16u8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV16U8, kArgTyV16U8) + { kArgTyV16U8, kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_trn2_v4u16, "vector_trn2_v4u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U16, kArgTyV4U16) + { kArgTyV4U16, kArgTyV4U16 }) DEF_MIR_INTRINSIC(vector_trn2q_v8u16, "vector_trn2q_v8u16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyV8U16) + { kArgTyV8U16, kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_trn2_v2u32, "vector_trn2_v2u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U32, kArgTyV2U32) + { kArgTyV2U32, kArgTyV2U32 }) DEF_MIR_INTRINSIC(vector_trn2q_v4u32, "vector_trn2q_v4u32", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV4U32) + { kArgTyV4U32, kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_trn2q_v2u64, "vector_trn2q_v2u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U64, kArgTyV2U64) + { kArgTyV2U64, kArgTyV2U64 }) DEF_MIR_INTRINSIC(vector_ld1_i8v8, "vector_ld1_i8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyPtr) + { { kArgTyPtr, MemEffect::kLoadMemory } }) DEF_MIR_INTRINSIC(vector_ld1q_i8v16, "vector_ld1q_i8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyPtr) + { { kArgTyPtr, MemEffect::kLoadMemory } }) DEF_MIR_INTRINSIC(vector_ld1_i16v4, "vector_ld1_i16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyPtr) + { { kArgTyPtr, MemEffect::kLoadMemory } }) DEF_MIR_INTRINSIC(vector_ld1q_i16v8, "vector_ld1q_i16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyPtr) + { { kArgTyPtr, MemEffect::kLoadMemory } }) DEF_MIR_INTRINSIC(vector_ld1_i32v2, "vector_ld1_i32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyPtr) + { { kArgTyPtr, MemEffect::kLoadMemory } }) DEF_MIR_INTRINSIC(vector_ld1q_i32v4, "vector_ld1q_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyPtr) + { { kArgTyPtr, MemEffect::kLoadMemory } }) DEF_MIR_INTRINSIC(vector_ld1_i64v1, "vector_ld1_i64v1", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1I64, - kArgTyPtr) + { { kArgTyPtr, MemEffect::kLoadMemory } }) DEF_MIR_INTRINSIC(vector_ld1q_i64v2, "vector_ld1q_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyPtr) + { { kArgTyPtr, MemEffect::kLoadMemory } }) DEF_MIR_INTRINSIC(vector_ld1_u8v8, "vector_ld1_u8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyPtr) + { { kArgTyPtr, MemEffect::kLoadMemory } }) DEF_MIR_INTRINSIC(vector_ld1q_u8v16, "vector_ld1q_u8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyPtr) + { { kArgTyPtr, MemEffect::kLoadMemory } }) DEF_MIR_INTRINSIC(vector_ld1_u16v4, "vector_ld1_u16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyPtr) + { { kArgTyPtr, MemEffect::kLoadMemory } }) DEF_MIR_INTRINSIC(vector_ld1q_u16v8, "vector_ld1q_u16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyPtr) + { { kArgTyPtr, MemEffect::kLoadMemory } }) DEF_MIR_INTRINSIC(vector_ld1_u32v2, "vector_ld1_u32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyPtr) + { { kArgTyPtr, MemEffect::kLoadMemory } }) DEF_MIR_INTRINSIC(vector_ld1q_u32v4, "vector_ld1q_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyPtr) + { { kArgTyPtr, MemEffect::kLoadMemory } }) DEF_MIR_INTRINSIC(vector_ld1_u64v1, "vector_ld1_u64v1", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1U64, - kArgTyPtr) + { { kArgTyPtr, MemEffect::kLoadMemory } }) DEF_MIR_INTRINSIC(vector_ld1q_u64v2, "vector_ld1q_u64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyPtr) + { { kArgTyPtr, MemEffect::kLoadMemory } }) DEF_MIR_INTRINSIC(vector_ld1_lane_i8v8, "vector_ld1_lane_i8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyPtr, kArgTyV8I8, kArgTyI32) + { { kArgTyPtr, MemEffect::kLoadMemory }, kArgTyV8I8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_ld1q_lane_i8v16, "vector_ld1q_lane_i8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyPtr, kArgTyV16I8, kArgTyI32) + { { kArgTyPtr, MemEffect::kLoadMemory }, kArgTyV16I8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_ld1_lane_i16v4, "vector_ld1_lane_i16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyPtr, kArgTyV4I16, kArgTyI32) + { { kArgTyPtr, MemEffect::kLoadMemory }, kArgTyV4I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_ld1q_lane_i16v8, "vector_ld1q_lane_i16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyPtr, kArgTyV8I16, kArgTyI32) + { { kArgTyPtr, MemEffect::kLoadMemory }, kArgTyV8I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_ld1_lane_i32v2, "vector_ld1_lane_i32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyPtr, kArgTyV2I32, kArgTyI32) + { { kArgTyPtr, MemEffect::kLoadMemory }, kArgTyV2I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_ld1q_lane_i32v4, "vector_ld1q_lane_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyPtr, kArgTyV4I32, kArgTyI32) + { { kArgTyPtr, MemEffect::kLoadMemory }, kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_ld1_lane_i64v1, "vector_ld1_lane_i64v1", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1I64, - kArgTyPtr, kArgTyV1I64, kArgTyI32) + { { kArgTyPtr, MemEffect::kLoadMemory }, kArgTyV1I64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_ld1q_lane_i64v2, "vector_ld1q_lane_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyPtr, kArgTyV2I64, kArgTyI32) + { { kArgTyPtr, MemEffect::kLoadMemory }, kArgTyV2I64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_ld1_lane_u8v8, "vector_ld1_lane_u8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyPtr, kArgTyV8U8, kArgTyI32) + { { kArgTyPtr, MemEffect::kLoadMemory }, kArgTyV8U8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_ld1q_lane_u8v16, "vector_ld1q_lane_u8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyPtr, kArgTyV16U8, kArgTyI32) + { { kArgTyPtr, MemEffect::kLoadMemory }, kArgTyV16U8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_ld1_lane_u16v4, "vector_ld1_lane_u16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyPtr, kArgTyV4U16, kArgTyI32) + { { kArgTyPtr, MemEffect::kLoadMemory }, kArgTyV4U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_ld1q_lane_u16v8, "vector_ld1q_lane_u16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyPtr, kArgTyV8U16, kArgTyI32) + { { kArgTyPtr, MemEffect::kLoadMemory }, kArgTyV8U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_ld1_lane_u32v2, "vector_ld1_lane_u32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyPtr, kArgTyV2U32, kArgTyI32) + { { kArgTyPtr, MemEffect::kLoadMemory }, kArgTyV2U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_ld1q_lane_u32v4, "vector_ld1q_lane_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyPtr, kArgTyV4U32, kArgTyI32) + { { kArgTyPtr, MemEffect::kLoadMemory }, kArgTyV4U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_ld1_lane_u64v1, "vector_ld1_lane_u64v1", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1U64, - kArgTyPtr, kArgTyV1U64, kArgTyI32) + { { kArgTyPtr, MemEffect::kLoadMemory }, kArgTyV1U64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_ld1q_lane_u64v2, "vector_ld1q_lane_u64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyPtr, kArgTyV2U64, kArgTyI32) + { { kArgTyPtr, MemEffect::kLoadMemory }, kArgTyV2U64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_ld1_dup_i8v8, "vector_ld1_dup_i8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyPtr) + { { kArgTyPtr, MemEffect::kLoadMemory } }) DEF_MIR_INTRINSIC(vector_ld1q_dup_i8v16, "vector_ld1q_dup_i8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyPtr) + { { kArgTyPtr, MemEffect::kLoadMemory } }) DEF_MIR_INTRINSIC(vector_ld1_dup_i16v4, "vector_ld1_dup_i16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyPtr) + { { kArgTyPtr, MemEffect::kLoadMemory } }) DEF_MIR_INTRINSIC(vector_ld1q_dup_i16v8, "vector_ld1q_dup_i16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyPtr) + { { kArgTyPtr, MemEffect::kLoadMemory } }) DEF_MIR_INTRINSIC(vector_ld1_dup_i32v2, "vector_ld1_dup_i32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyPtr) + { { kArgTyPtr, MemEffect::kLoadMemory } }) DEF_MIR_INTRINSIC(vector_ld1q_dup_i32v4, "vector_ld1q_dup_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyPtr) + { { kArgTyPtr, MemEffect::kLoadMemory } }) DEF_MIR_INTRINSIC(vector_ld1_dup_i64v1, "vector_ld1_dup_i64v1", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1I64, - kArgTyPtr) + { { kArgTyPtr, MemEffect::kLoadMemory } }) DEF_MIR_INTRINSIC(vector_ld1q_dup_i64v2, "vector_ld1q_dup_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyPtr) + { { kArgTyPtr, MemEffect::kLoadMemory } }) DEF_MIR_INTRINSIC(vector_ld1_dup_u8v8, "vector_ld1_dup_u8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyPtr) + { { kArgTyPtr, MemEffect::kLoadMemory } }) DEF_MIR_INTRINSIC(vector_ld1q_dup_u8v16, "vector_ld1q_dup_u8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyPtr) + { { kArgTyPtr, MemEffect::kLoadMemory } }) DEF_MIR_INTRINSIC(vector_ld1_dup_u16v4, "vector_ld1_dup_u16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyPtr) + { { kArgTyPtr, MemEffect::kLoadMemory } }) DEF_MIR_INTRINSIC(vector_ld1q_dup_u16v8, "vector_ld1q_dup_u16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyPtr) + { { kArgTyPtr, MemEffect::kLoadMemory } }) DEF_MIR_INTRINSIC(vector_ld1_dup_u32v2, "vector_ld1_dup_u32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyPtr) + { { kArgTyPtr, MemEffect::kLoadMemory } }) DEF_MIR_INTRINSIC(vector_ld1q_dup_u32v4, "vector_ld1q_dup_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyPtr) + { { kArgTyPtr, MemEffect::kLoadMemory } }) DEF_MIR_INTRINSIC(vector_ld1_dup_u64v1, "vector_ld1_dup_u64v1", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1U64, - kArgTyPtr) + { { kArgTyPtr, MemEffect::kLoadMemory } }) DEF_MIR_INTRINSIC(vector_ld1q_dup_u64v2, "vector_ld1q_dup_u64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyPtr) + { { kArgTyPtr, MemEffect::kLoadMemory } }) DEF_MIR_INTRINSIC(vector_tbl1_i8v8, "vector_tbl1_i8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV16I8, kArgTyV8I8) + { kArgTyV16I8, kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_tbl1_u8v8, "vector_tbl1_u8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV16U8, kArgTyV8U8) + { kArgTyV16U8, kArgTyV8U8 }) DEF_MIR_INTRINSIC(vector_qtbl1_i8v8, "vector_qtbl1_i8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV16I8, kArgTyV8U8) + { kArgTyV16I8, kArgTyV8U8 }) DEF_MIR_INTRINSIC(vector_qtbl1q_i8v16, "vector_qtbl1q_i8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV16I8, kArgTyV16U8) + { kArgTyV16I8, kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_qtbl1_u8v8, "vector_qtbl1_u8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV16U8, kArgTyV8U8) + { kArgTyV16U8, kArgTyV8U8 }) DEF_MIR_INTRINSIC(vector_qtbl1q_u8v16, "vector_qtbl1q_u8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV16U8, kArgTyV16U8) + { kArgTyV16U8, kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_qtbx1_i8v8, "vector_qtbx1_i8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I8, kArgTyV16I8, kArgTyV8U8) + { kArgTyV8I8, kArgTyV16I8, kArgTyV8U8 }) DEF_MIR_INTRINSIC(vector_qtbx1q_i8v16, "vector_qtbx1q_i8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV16I8, kArgTyV16I8, kArgTyV16U8) + { kArgTyV16I8, kArgTyV16I8, kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_qtbx1_u8v8, "vector_qtbx1_u8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U8, kArgTyV16U8, kArgTyV8U8) + { kArgTyV8U8, kArgTyV16U8, kArgTyV8U8 }) DEF_MIR_INTRINSIC(vector_qtbx1q_u8v16, "vector_qtbx1q_u8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV16U8, kArgTyV16U8, kArgTyV16U8) + { kArgTyV16U8, kArgTyV16U8, kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_hadd_i8v8, "vector_hadd_i8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I8, kArgTyV8I8) + { kArgTyV8I8, kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_haddq_i8v16, "vector_haddq_i8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV16I8, kArgTyV16I8) + { kArgTyV16I8, kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_hadd_i16v4, "vector_hadd_i16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16, kArgTyV4I16) + { kArgTyV4I16, kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_haddq_i16v8, "vector_haddq_i16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV8I16) + { kArgTyV8I16, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_hadd_i32v2, "vector_hadd_i32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32, kArgTyV2I32) + { kArgTyV2I32, kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_haddq_i32v4, "vector_haddq_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I32) + { kArgTyV4I32, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_hadd_u8v8, "vector_hadd_u8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U8, kArgTyV8U8) + { kArgTyV8U8, kArgTyV8U8 }) DEF_MIR_INTRINSIC(vector_haddq_u8v16, "vector_haddq_u8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV16U8, kArgTyV16U8) + { kArgTyV16U8, kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_hadd_u16v4, "vector_hadd_u16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U16, kArgTyV4U16) + { kArgTyV4U16, kArgTyV4U16 }) DEF_MIR_INTRINSIC(vector_haddq_u16v8, "vector_haddq_u16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyV8U16) + { kArgTyV8U16, kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_hadd_u32v2, "vector_hadd_u32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U32, kArgTyV2U32) + { kArgTyV2U32, kArgTyV2U32 }) DEF_MIR_INTRINSIC(vector_haddq_u32v4, "vector_haddq_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV4U32) + { kArgTyV4U32, kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_rhadd_i8v8, "vector_rhadd_i8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I8, kArgTyV8I8) + { kArgTyV8I8, kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_rhaddq_i8v16, "vector_rhaddq_i8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV16I8, kArgTyV16I8) + { kArgTyV16I8, kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_rhadd_i16v4, "vector_rhadd_i16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16, kArgTyV4I16) + { kArgTyV4I16, kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_rhaddq_i16v8, "vector_rhaddq_i16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV8I16) + { kArgTyV8I16, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_rhadd_i32v2, "vector_rhadd_i32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32, kArgTyV2I32) + { kArgTyV2I32, kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_rhaddq_i32v4, "vector_rhaddq_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I32) + { kArgTyV4I32, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_rhadd_u8v8, "vector_rhadd_u8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U8, kArgTyV8U8) + { kArgTyV8U8, kArgTyV8U8 }) DEF_MIR_INTRINSIC(vector_rhaddq_u8v16, "vector_rhaddq_u8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV16U8, kArgTyV16U8) + { kArgTyV16U8, kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_rhadd_u16v4, "vector_rhadd_u16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U16, kArgTyV4U16) + { kArgTyV4U16, kArgTyV4U16 }) DEF_MIR_INTRINSIC(vector_rhaddq_u16v8, "vector_rhaddq_u16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyV8U16) + { kArgTyV8U16, kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_rhadd_u32v2, "vector_rhadd_u32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U32, kArgTyV2U32) + { kArgTyV2U32, kArgTyV2U32 }) DEF_MIR_INTRINSIC(vector_rhaddq_u32v4, "vector_rhaddq_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV4U32) + { kArgTyV4U32, kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_addhn_i8v8, "vector_addhn_i8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I16, kArgTyV8I16) + { kArgTyV8I16, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_addhn_i16v4, "vector_addhn_i16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I32, kArgTyV4I32) + { kArgTyV4I32, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_addhn_i32v2, "vector_addhn_i32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I64, kArgTyV2I64) + { kArgTyV2I64, kArgTyV2I64 }) DEF_MIR_INTRINSIC(vector_addhn_u8v8, "vector_addhn_u8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U16, kArgTyV8U16) + { kArgTyV8U16, kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_addhn_u16v4, "vector_addhn_u16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U32, kArgTyV4U32) + { kArgTyV4U32, kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_addhn_u32v2, "vector_addhn_u32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U64, kArgTyV2U64) + { kArgTyV2U64, kArgTyV2U64 }) DEF_MIR_INTRINSIC(vector_addhn_high_i8v16, "vector_addhn_high_i8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV8I8, kArgTyV8I16, kArgTyV8I16) + { kArgTyV8I8, kArgTyV8I16, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_addhn_high_i16v8, "vector_addhn_high_i16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV4I16, kArgTyV4I32, kArgTyV4I32) + { kArgTyV4I16, kArgTyV4I32, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_addhn_high_i32v4, "vector_addhn_high_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV2I32, kArgTyV2I64, kArgTyV2I64) + { kArgTyV2I32, kArgTyV2I64, kArgTyV2I64 }) DEF_MIR_INTRINSIC(vector_addhn_high_u8v16, "vector_addhn_high_u8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV8U8, kArgTyV8U16, kArgTyV8U16) + { kArgTyV8U8, kArgTyV8U16, kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_addhn_high_u16v8, "vector_addhn_high_u16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV4U16, kArgTyV4U32, kArgTyV4U32) + { kArgTyV4U16, kArgTyV4U32, kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_addhn_high_u32v4, "vector_addhn_high_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV2U32, kArgTyV2U64, kArgTyV2U64) + { kArgTyV2U32, kArgTyV2U64, kArgTyV2U64 }) DEF_MIR_INTRINSIC(vector_raddhn_i8v8, "vector_raddhn_i8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I16, kArgTyV8I16) + { kArgTyV8I16, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_raddhn_i16v4, "vector_raddhn_i16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I32, kArgTyV4I32) + { kArgTyV4I32, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_raddhn_i32v2, "vector_raddhn_i32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I64, kArgTyV2I64) + { kArgTyV2I64, kArgTyV2I64 }) DEF_MIR_INTRINSIC(vector_raddhn_u8v8, "vector_raddhn_u8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U16, kArgTyV8U16) + { kArgTyV8U16, kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_raddhn_u16v4, "vector_raddhn_u16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U32, kArgTyV4U32) + { kArgTyV4U32, kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_raddhn_u32v2, "vector_raddhn_u32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U64, kArgTyV2U64) + { kArgTyV2U64, kArgTyV2U64 }) DEF_MIR_INTRINSIC(vector_raddhn_high_i8v16, "vector_raddhn_high_i8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV8I8, kArgTyV8I16, kArgTyV8I16) + { kArgTyV8I8, kArgTyV8I16, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_raddhn_high_i16v8, "vector_raddhn_high_i16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV4I16, kArgTyV4I32, kArgTyV4I32) + { kArgTyV4I16, kArgTyV4I32, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_raddhn_high_i32v4, "vector_raddhn_high_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV2I32, kArgTyV2I64, kArgTyV2I64) + { kArgTyV2I32, kArgTyV2I64, kArgTyV2I64 }) DEF_MIR_INTRINSIC(vector_raddhn_high_u8v16, "vector_raddhn_high_u8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV8U8, kArgTyV8U16, kArgTyV8U16) + { kArgTyV8U8, kArgTyV8U16, kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_raddhn_high_u16v8, "vector_raddhn_high_u16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV4U16, kArgTyV4U32, kArgTyV4U32) + { kArgTyV4U16, kArgTyV4U32, kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_raddhn_high_u32v4, "vector_raddhn_high_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV2U32, kArgTyV2U64, kArgTyV2U64) + { kArgTyV2U32, kArgTyV2U64, kArgTyV2U64 }) DEF_MIR_INTRINSIC(vector_qadd_i8v8, "vector_qadd_i8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I8, kArgTyV8I8) + { kArgTyV8I8, kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_qaddq_i8v16, "vector_qaddq_i8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV16I8, kArgTyV16I8) + { kArgTyV16I8, kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_qadd_i16v4, "vector_qadd_i16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16, kArgTyV4I16) + { kArgTyV4I16, kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_qaddq_i16v8, "vector_qaddq_i16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV8I16) + { kArgTyV8I16, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_qadd_i32v2, "vector_qadd_i32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32, kArgTyV2I32) + { kArgTyV2I32, kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_qaddq_i32v4, "vector_qaddq_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I32) + { kArgTyV4I32, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_qadd_i64v1, "vector_qadd_i64v1", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1I64, - kArgTyV1I64, kArgTyV1I64) + { kArgTyV1I64, kArgTyV1I64 }) DEF_MIR_INTRINSIC(vector_qaddq_i64v2, "vector_qaddq_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV2I64) + { kArgTyV2I64, kArgTyV2I64 }) DEF_MIR_INTRINSIC(vector_qadd_u8v8, "vector_qadd_u8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U8, kArgTyV8U8) + { kArgTyV8U8, kArgTyV8U8 }) DEF_MIR_INTRINSIC(vector_qaddq_u8v16, "vector_qaddq_u8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV16U8, kArgTyV16U8) + { kArgTyV16U8, kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_qadd_u16v4, "vector_qadd_u16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U16, kArgTyV4U16) + { kArgTyV4U16, kArgTyV4U16 }) DEF_MIR_INTRINSIC(vector_qaddq_u16v8, "vector_qaddq_u16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyV8U16) + { kArgTyV8U16, kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_qadd_u32v2, "vector_qadd_u32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U32, kArgTyV2U32) + { kArgTyV2U32, kArgTyV2U32 }) DEF_MIR_INTRINSIC(vector_qaddq_u32v4, "vector_qaddq_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV4U32) + { kArgTyV4U32, kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_qadd_u64v1, "vector_qadd_u64v1", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1U64, - kArgTyV1U64, kArgTyV1U64) + { kArgTyV1U64, kArgTyV1U64 }) DEF_MIR_INTRINSIC(vector_qaddq_u64v2, "vector_qaddq_u64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U64, kArgTyV2U64) + { kArgTyV2U64, kArgTyV2U64 }) DEF_MIR_INTRINSIC(vector_uqadd_i8v8, "vector_uqadd_i8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I8, kArgTyV8U8) + { kArgTyV8I8, kArgTyV8U8 }) DEF_MIR_INTRINSIC(vector_uqaddq_i8v16, "vector_uqaddq_i8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV16I8, kArgTyV16U8) + { kArgTyV16I8, kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_uqadd_i16v4, "vector_uqadd_i16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16, kArgTyV4U16) + { kArgTyV4I16, kArgTyV4U16 }) DEF_MIR_INTRINSIC(vector_uqaddq_i16v8, "vector_uqaddq_i16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV8U16) + { kArgTyV8I16, kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_uqadd_i32v2, "vector_uqadd_i32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32, kArgTyV2U32) + { kArgTyV2I32, kArgTyV2U32 }) DEF_MIR_INTRINSIC(vector_uqaddq_i32v4, "vector_uqaddq_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4U32) + { kArgTyV4I32, kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_uqadd_i64v1, "vector_uqadd_i64v1", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1I64, - kArgTyV1I64, kArgTyV1U64) + { kArgTyV1I64, kArgTyV1U64 }) DEF_MIR_INTRINSIC(vector_uqaddq_i64v2, "vector_uqaddq_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV2U64) + { kArgTyV2I64, kArgTyV2U64 }) DEF_MIR_INTRINSIC(vector_sqadd_u8v8, "vector_sqadd_u8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U8, kArgTyV8I8) + { kArgTyV8U8, kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_sqaddq_u8v16, "vector_sqaddq_u8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV16U8, kArgTyV16I8) + { kArgTyV16U8, kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_sqadd_u16v4, "vector_sqadd_u16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U16, kArgTyV4I16) + { kArgTyV4U16, kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_sqaddq_u16v8, "vector_sqaddq_u16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyV8I16) + { kArgTyV8U16, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_sqadd_u32v2, "vector_sqadd_u32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U32, kArgTyV2I32) + { kArgTyV2U32, kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_sqaddq_u32v4, "vector_sqaddq_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV4I32) + { kArgTyV4U32, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_sqadd_u64v1, "vector_sqadd_u64v1", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1U64, - kArgTyV1U64, kArgTyV1I64) + { kArgTyV1U64, kArgTyV1I64 }) DEF_MIR_INTRINSIC(vector_sqaddq_u64v2, "vector_sqaddq_u64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U64, kArgTyV2I64) + { kArgTyV2U64, kArgTyV2I64 }) DEF_MIR_INTRINSIC(vector_mla_i8v8, "vector_mla_i8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I8, kArgTyV8I8, kArgTyV8I8) + { kArgTyV8I8, kArgTyV8I8, kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_mlaq_i8v16, "vector_mlaq_i8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV16I8, kArgTyV16I8, kArgTyV16I8) + { kArgTyV16I8, kArgTyV16I8, kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_mla_i16v4, "vector_mla_i16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16, kArgTyV4I16, kArgTyV4I16) + { kArgTyV4I16, kArgTyV4I16, kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_mlaq_i16v8, "vector_mlaq_i16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV8I16, kArgTyV8I16) + { kArgTyV8I16, kArgTyV8I16, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_mla_i32v2, "vector_mla_i32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32, kArgTyV2I32, kArgTyV2I32) + { kArgTyV2I32, kArgTyV2I32, kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_mlaq_i32v4, "vector_mlaq_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I32, kArgTyV4I32) + { kArgTyV4I32, kArgTyV4I32, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_mla_u8v8, "vector_mla_u8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U8, kArgTyV8U8, kArgTyV8U8) + { kArgTyV8U8, kArgTyV8U8, kArgTyV8U8 }) DEF_MIR_INTRINSIC(vector_mlaq_u8v16, "vector_mlaq_u8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV16U8, kArgTyV16U8, kArgTyV16U8) + { kArgTyV16U8, kArgTyV16U8, kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_mla_u16v4, "vector_mla_u16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U16, kArgTyV4U16, kArgTyV4U16) + { kArgTyV4U16, kArgTyV4U16, kArgTyV4U16 }) DEF_MIR_INTRINSIC(vector_mlaq_u16v8, "vector_mlaq_u16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyV8U16, kArgTyV8U16) + { kArgTyV8U16, kArgTyV8U16, kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_mla_u32v2, "vector_mla_u32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U32, kArgTyV2U32, kArgTyV2U32) + { kArgTyV2U32, kArgTyV2U32, kArgTyV2U32 }) DEF_MIR_INTRINSIC(vector_mlaq_u32v4, "vector_mlaq_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV4U32, kArgTyV4U32) + { kArgTyV4U32, kArgTyV4U32, kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_mls_i8v8, "vector_mls_i8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I8, kArgTyV8I8, kArgTyV8I8) + { kArgTyV8I8, kArgTyV8I8, kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_mlsq_i8v16, "vector_mlsq_i8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV16I8, kArgTyV16I8, kArgTyV16I8) + { kArgTyV16I8, kArgTyV16I8, kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_mls_i16v4, "vector_mls_i16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16, kArgTyV4I16, kArgTyV4I16) + { kArgTyV4I16, kArgTyV4I16, kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_mlsq_i16v8, "vector_mlsq_i16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV8I16, kArgTyV8I16) + { kArgTyV8I16, kArgTyV8I16, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_mls_i32v2, "vector_mls_i32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32, kArgTyV2I32, kArgTyV2I32) + { kArgTyV2I32, kArgTyV2I32, kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_mlsq_i32v4, "vector_mlsq_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I32, kArgTyV4I32) + { kArgTyV4I32, kArgTyV4I32, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_mls_u8v8, "vector_mls_u8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U8, kArgTyV8U8, kArgTyV8U8) + { kArgTyV8U8, kArgTyV8U8, kArgTyV8U8 }) DEF_MIR_INTRINSIC(vector_mlsq_u8v16, "vector_mlsq_u8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV16U8, kArgTyV16U8, kArgTyV16U8) + { kArgTyV16U8, kArgTyV16U8, kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_mls_u16v4, "vector_mls_u16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U16, kArgTyV4U16, kArgTyV4U16) + { kArgTyV4U16, kArgTyV4U16, kArgTyV4U16 }) DEF_MIR_INTRINSIC(vector_mlsq_u16v8, "vector_mlsq_u16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyV8U16, kArgTyV8U16) + { kArgTyV8U16, kArgTyV8U16, kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_mls_u32v2, "vector_mls_u32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U32, kArgTyV2U32, kArgTyV2U32) + { kArgTyV2U32, kArgTyV2U32, kArgTyV2U32 }) DEF_MIR_INTRINSIC(vector_mlsq_u32v4, "vector_mlsq_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV4U32, kArgTyV4U32) + { kArgTyV4U32, kArgTyV4U32, kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_mlal_i16v8, "vector_mlal_i16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV8I8, kArgTyV8I8) + { kArgTyV8I16, kArgTyV8I8, kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_mlal_i32v4, "vector_mlal_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I16, kArgTyV4I16) + { kArgTyV4I32, kArgTyV4I16, kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_mlal_i64v2, "vector_mlal_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV2I32, kArgTyV2I32) + { kArgTyV2I64, kArgTyV2I32, kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_mlal_u16v8, "vector_mlal_u16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyV8U8, kArgTyV8U8) + { kArgTyV8U16, kArgTyV8U8, kArgTyV8U8 }) DEF_MIR_INTRINSIC(vector_mlal_u32v4, "vector_mlal_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV4U16, kArgTyV4U16) + { kArgTyV4U32, kArgTyV4U16, kArgTyV4U16 }) DEF_MIR_INTRINSIC(vector_mlal_u64v2, "vector_mlal_u64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U64, kArgTyV2U32, kArgTyV2U32) + { kArgTyV2U64, kArgTyV2U32, kArgTyV2U32 }) DEF_MIR_INTRINSIC(vector_mlal_high_i16v8, "vector_mlal_high_i16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV16I8, kArgTyV16I8) + { kArgTyV8I16, kArgTyV16I8, kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_mlal_high_i32v4, "vector_mlal_high_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV8I16, kArgTyV8I16) + { kArgTyV4I32, kArgTyV8I16, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_mlal_high_i64v2, "vector_mlal_high_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV4I32, kArgTyV4I32) + { kArgTyV2I64, kArgTyV4I32, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_mlal_high_u16v8, "vector_mlal_high_u16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyV16U8, kArgTyV16U8) + { kArgTyV8U16, kArgTyV16U8, kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_mlal_high_u32v4, "vector_mlal_high_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV8U16, kArgTyV8U16) + { kArgTyV4U32, kArgTyV8U16, kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_mlal_high_u64v2, "vector_mlal_high_u64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U64, kArgTyV4U32, kArgTyV4U32) + { kArgTyV2U64, kArgTyV4U32, kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_mlsl_i16v8, "vector_mlsl_i16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV8I8, kArgTyV8I8) + { kArgTyV8I16, kArgTyV8I8, kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_mlsl_i32v4, "vector_mlsl_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I16, kArgTyV4I16) + { kArgTyV4I32, kArgTyV4I16, kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_mlsl_i64v2, "vector_mlsl_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV2I32, kArgTyV2I32) + { kArgTyV2I64, kArgTyV2I32, kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_mlsl_u16v8, "vector_mlsl_u16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyV8U8, kArgTyV8U8) + { kArgTyV8U16, kArgTyV8U8, kArgTyV8U8 }) DEF_MIR_INTRINSIC(vector_mlsl_u32v4, "vector_mlsl_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV4U16, kArgTyV4U16) + { kArgTyV4U32, kArgTyV4U16, kArgTyV4U16 }) DEF_MIR_INTRINSIC(vector_mlsl_u64v2, "vector_mlsl_u64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U64, kArgTyV2U32, kArgTyV2U32) + { kArgTyV2U64, kArgTyV2U32, kArgTyV2U32 }) DEF_MIR_INTRINSIC(vector_mlsl_high_i16v8, "vector_mlsl_high_i16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV16I8, kArgTyV16I8) + { kArgTyV8I16, kArgTyV16I8, kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_mlsl_high_i32v4, "vector_mlsl_high_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV8I16, kArgTyV8I16) + { kArgTyV4I32, kArgTyV8I16, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_mlsl_high_i64v2, "vector_mlsl_high_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV4I32, kArgTyV4I32) + { kArgTyV2I64, kArgTyV4I32, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_mlsl_high_u16v8, "vector_mlsl_high_u16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyV16U8, kArgTyV16U8) + { kArgTyV8U16, kArgTyV16U8, kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_mlsl_high_u32v4, "vector_mlsl_high_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV8U16, kArgTyV8U16) + { kArgTyV4U32, kArgTyV8U16, kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_mlsl_high_u64v2, "vector_mlsl_high_u64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U64, kArgTyV4U32, kArgTyV4U32) + { kArgTyV2U64, kArgTyV4U32, kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_qdmulh_i16v4, "vector_qdmulh_i16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16, kArgTyV4I16) + { kArgTyV4I16, kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_qdmulhq_i16v8, "vector_qdmulhq_i16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV8I16) + { kArgTyV8I16, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_qdmulh_i32v2, "vector_qdmulh_i32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32, kArgTyV2I32) + { kArgTyV2I32, kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_qdmulhq_i32v4, "vector_qdmulhq_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I32) + { kArgTyV4I32, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_qrdmulh_i16v4, "vector_qrdmulh_i16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16, kArgTyV4I16) + { kArgTyV4I16, kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_qrdmulhq_i16v8, "vector_qrdmulhq_i16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV8I16) + { kArgTyV8I16, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_qrdmulh_i32v2, "vector_qrdmulh_i32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32, kArgTyV2I32) + { kArgTyV2I32, kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_qrdmulhq_i32v4, "vector_qrdmulhq_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I32) + { kArgTyV4I32, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_qdmull_i32v4, "vector_qdmull_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I16, kArgTyV4I16) + { kArgTyV4I16, kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_qdmull_i64v2, "vector_qdmull_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I32, kArgTyV2I32) + { kArgTyV2I32, kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_qdmull_high_i32v4, "vector_qdmull_high_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV8I16, kArgTyV8I16) + { kArgTyV8I16, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_qdmull_high_i64v2, "vector_qdmull_high_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV4I32, kArgTyV4I32) + { kArgTyV4I32, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_qdmlal_i32v4, "vector_qdmlal_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I16, kArgTyV4I16) + { kArgTyV4I32, kArgTyV4I16, kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_qdmlal_i64v2, "vector_qdmlal_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV2I32, kArgTyV2I32) + { kArgTyV2I64, kArgTyV2I32, kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_qdmlal_high_i32v4, "vector_qdmlal_high_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV8I16, kArgTyV8I16) + { kArgTyV4I32, kArgTyV8I16, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_qdmlal_high_i64v2, "vector_qdmlal_high_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV4I32, kArgTyV4I32) + { kArgTyV2I64, kArgTyV4I32, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_qdmlsl_i32v4, "vector_qdmlsl_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I16, kArgTyV4I16) + { kArgTyV4I32, kArgTyV4I16, kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_qdmlsl_i64v2, "vector_qdmlsl_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV2I32, kArgTyV2I32) + { kArgTyV2I64, kArgTyV2I32, kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_qdmlsl_high_i32v4, "vector_qdmlsl_high_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV8I16, kArgTyV8I16) + { kArgTyV4I32, kArgTyV8I16, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_qdmlsl_high_i64v2, "vector_qdmlsl_high_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV4I32, kArgTyV4I32) + { kArgTyV2I64, kArgTyV4I32, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_qdmlal_lane_i32v4, "vector_qdmlal_lane_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I16, kArgTyV4I16, kArgTyI32) + { kArgTyV4I32, kArgTyV4I16, kArgTyV4I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qdmlal_lane_i64v2, "vector_qdmlal_lane_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV2I32, kArgTyV2I32, kArgTyI32) + { kArgTyV2I64, kArgTyV2I32, kArgTyV2I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qdmlal_high_lane_i32v4, "vector_qdmlal_high_lane_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV8I16, kArgTyV4I16, kArgTyI32) + { kArgTyV4I32, kArgTyV8I16, kArgTyV4I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qdmlal_high_lane_i64v2, "vector_qdmlal_high_lane_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV4I32, kArgTyV2I32, kArgTyI32) + { kArgTyV2I64, kArgTyV4I32, kArgTyV2I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qdmlal_laneq_i32v4, "vector_qdmlal_laneq_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I16, kArgTyV8I16, kArgTyI32) + { kArgTyV4I32, kArgTyV4I16, kArgTyV8I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qdmlal_laneq_i64v2, "vector_qdmlal_laneq_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV2I32, kArgTyV4I32, kArgTyI32) + { kArgTyV2I64, kArgTyV2I32, kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qdmlal_high_laneq_i32v4, "vector_qdmlal_high_laneq_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV8I16, kArgTyV8I16, kArgTyI32) + { kArgTyV4I32, kArgTyV8I16, kArgTyV8I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qdmlal_high_laneq_i64v2, "vector_qdmlal_high_laneq_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV4I32, kArgTyV4I32, kArgTyI32) + { kArgTyV2I64, kArgTyV4I32, kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qdmlsl_lane_i32v4, "vector_qdmlsl_lane_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I16, kArgTyV4I16, kArgTyI32) + { kArgTyV4I32, kArgTyV4I16, kArgTyV4I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qdmlsl_lane_i64v2, "vector_qdmlsl_lane_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV2I32, kArgTyV2I32, kArgTyI32) + { kArgTyV2I64, kArgTyV2I32, kArgTyV2I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qdmlsl_high_lane_i32v4, "vector_qdmlsl_high_lane_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV8I16, kArgTyV4I16, kArgTyI32) + { kArgTyV4I32, kArgTyV8I16, kArgTyV4I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qdmlsl_high_lane_i64v2, "vector_qdmlsl_high_lane_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV4I32, kArgTyV2I32, kArgTyI32) + { kArgTyV2I64, kArgTyV4I32, kArgTyV2I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qdmlsl_laneq_i32v4, "vector_qdmlsl_laneq_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I16, kArgTyV8I16, kArgTyI32) + { kArgTyV4I32, kArgTyV4I16, kArgTyV8I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qdmlsl_laneq_i64v2, "vector_qdmlsl_laneq_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV2I32, kArgTyV4I32, kArgTyI32) + { kArgTyV2I64, kArgTyV2I32, kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qdmlsl_high_laneq_i32v4, "vector_qdmlsl_high_laneq_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV8I16, kArgTyV8I16, kArgTyI32) + { kArgTyV4I32, kArgTyV8I16, kArgTyV8I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qdmlsl_high_laneq_i64v2, "vector_qdmlsl_high_laneq_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV4I32, kArgTyV4I32, kArgTyI32) + { kArgTyV2I64, kArgTyV4I32, kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mull_i16v8, "vector_mull_i16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I8, kArgTyV8I8) + { kArgTyV8I8, kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_mull_i32v4, "vector_mull_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I16, kArgTyV4I16) + { kArgTyV4I16, kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_mull_i64v2, "vector_mull_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I32, kArgTyV2I32) + { kArgTyV2I32, kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_mull_u16v8, "vector_mull_u16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U8, kArgTyV8U8) + { kArgTyV8U8, kArgTyV8U8 }) DEF_MIR_INTRINSIC(vector_mull_u32v4, "vector_mull_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U16, kArgTyV4U16) + { kArgTyV4U16, kArgTyV4U16 }) DEF_MIR_INTRINSIC(vector_mull_u64v2, "vector_mull_u64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U32, kArgTyV2U32) + { kArgTyV2U32, kArgTyV2U32 }) DEF_MIR_INTRINSIC(vector_mull_high_i16v8, "vector_mull_high_i16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV16I8, kArgTyV16I8) + { kArgTyV16I8, kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_mull_high_i32v4, "vector_mull_high_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV8I16, kArgTyV8I16) + { kArgTyV8I16, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_mull_high_i64v2, "vector_mull_high_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV4I32, kArgTyV4I32) + { kArgTyV4I32, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_mull_high_u16v8, "vector_mull_high_u16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV16U8, kArgTyV16U8) + { kArgTyV16U8, kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_mull_high_u32v4, "vector_mull_high_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV8U16, kArgTyV8U16) + { kArgTyV8U16, kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_qdmull_n_i32v4, "vector_qdmull_n_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I16, kArgTyV4I16) + { kArgTyV4I16, kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_qdmull_n_i64v2, "vector_qdmull_n_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I32, kArgTyV2I32) + { kArgTyV2I32, kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_qdmull_high_n_i32v4, "vector_qdmull_high_n_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV8I16, kArgTyV8I16) + { kArgTyV8I16, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_qdmull_high_n_i64v2, "vector_qdmull_high_n_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV4I32, kArgTyV4I32) + { kArgTyV4I32, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_qdmull_lane_i32v4, "vector_qdmull_lane_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I16, kArgTyV4I16, kArgTyI32) + { kArgTyV4I16, kArgTyV4I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qdmull_lane_i64v2, "vector_qdmull_lane_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I32, kArgTyV2I32, kArgTyI32) + { kArgTyV2I32, kArgTyV2I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qdmull_high_lane_i32v4, "vector_qdmull_high_lane_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV8I16, kArgTyV4I16, kArgTyI32) + { kArgTyV8I16, kArgTyV4I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qdmull_high_lane_i64v2, "vector_qdmull_high_lane_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV4I32, kArgTyV2I32, kArgTyI32) + { kArgTyV4I32, kArgTyV2I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qdmull_laneq_i32v4, "vector_qdmull_laneq_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I16, kArgTyV8I16, kArgTyI32) + { kArgTyV4I16, kArgTyV8I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qdmull_laneq_i64v2, "vector_qdmull_laneq_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I32, kArgTyV4I32, kArgTyI32) + { kArgTyV2I32, kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qdmull_high_laneq_i32v4, "vector_qdmull_high_laneq_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV8I16, kArgTyV8I16, kArgTyI32) + { kArgTyV8I16, kArgTyV8I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qdmull_high_laneq_i64v2, "vector_qdmull_high_laneq_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV4I32, kArgTyV4I32, kArgTyI32) + { kArgTyV4I32, kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qdmulh_n_i16v4, "vector_qdmulh_n_i16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16, kArgTyV4I16) + { kArgTyV4I16, kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_qdmulhq_n_i16v8, "vector_qdmulhq_n_i16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV8I16) + { kArgTyV8I16, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_qdmulh_n_i32v2, "vector_qdmulh_n_i32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32, kArgTyV2I32) + { kArgTyV2I32, kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_qdmulhq_n_i32v4, "vector_qdmulhq_n_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I32) + { kArgTyV4I32, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_qdmulh_lane_i16v4, "vector_qdmulh_lane_i16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16, kArgTyV4I16, kArgTyI32) + { kArgTyV4I16, kArgTyV4I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qdmulhq_lane_i16v8, "vector_qdmulhq_lane_i16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV4I16, kArgTyI32) + { kArgTyV8I16, kArgTyV4I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qdmulh_lane_i32v2, "vector_qdmulh_lane_i32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32, kArgTyV2I32, kArgTyI32) + { kArgTyV2I32, kArgTyV2I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qdmulhq_lane_i32v4, "vector_qdmulhq_lane_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV2I32, kArgTyI32) + { kArgTyV4I32, kArgTyV2I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qdmulh_laneq_i16v4, "vector_qdmulh_laneq_i16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16, kArgTyV8I16, kArgTyI32) + { kArgTyV4I16, kArgTyV8I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qdmulhq_laneq_i16v8, "vector_qdmulhq_laneq_i16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV8I16, kArgTyI32) + { kArgTyV8I16, kArgTyV8I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qdmulh_laneq_i32v2, "vector_qdmulh_laneq_i32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32, kArgTyV4I32, kArgTyI32) + { kArgTyV2I32, kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qdmulhq_laneq_i32v4, "vector_qdmulhq_laneq_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I32, kArgTyI32) + { kArgTyV4I32, kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qrdmulh_n_i16v4, "vector_qrdmulh_n_i16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16, kArgTyV4I16) + { kArgTyV4I16, kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_qrdmulhq_n_i16v8, "vector_qrdmulhq_n_i16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV8I16) + { kArgTyV8I16, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_qrdmulh_n_i32v2, "vector_qrdmulh_n_i32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32, kArgTyV2I32) + { kArgTyV2I32, kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_qrdmulhq_n_i32v4, "vector_qrdmulhq_n_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I32) + { kArgTyV4I32, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_qrdmulh_lane_i16v4, "vector_qrdmulh_lane_i16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16, kArgTyV4I16, kArgTyI32) + { kArgTyV4I16, kArgTyV4I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qrdmulhq_lane_i16v8, "vector_qrdmulhq_lane_i16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV4I16, kArgTyI32) + { kArgTyV8I16, kArgTyV4I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qrdmulh_lane_i32v2, "vector_qrdmulh_lane_i32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32, kArgTyV2I32, kArgTyI32) + { kArgTyV2I32, kArgTyV2I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qrdmulhq_lane_i32v4, "vector_qrdmulhq_lane_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV2I32, kArgTyI32) + { kArgTyV4I32, kArgTyV2I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qrdmulhh_lane_i16v4, "vector_qrdmulhh_lane_i16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI16, - kArgTyI16, kArgTyV4I16, kArgTyI32) + { kArgTyI16, kArgTyV4I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qrdmulhs_lane_i32v2, "vector_qrdmulhs_lane_i32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI32, - kArgTyI32, kArgTyV2I32, kArgTyI32) + { kArgTyI32, kArgTyV2I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qrdmulh_laneq_i16v4, "vector_qrdmulh_laneq_i16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16, kArgTyV8I16, kArgTyI32) + { kArgTyV4I16, kArgTyV8I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qrdmulhq_laneq_i16v8, "vector_qrdmulhq_laneq_i16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV8I16, kArgTyI32) + { kArgTyV8I16, kArgTyV8I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qrdmulh_laneq_i32v2, "vector_qrdmulh_laneq_i32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32, kArgTyV4I32, kArgTyI32) + { kArgTyV2I32, kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qrdmulhq_laneq_i32v4, "vector_qrdmulhq_laneq_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I32, kArgTyI32) + { kArgTyV4I32, kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qrdmulhh_laneq_i16v8, "vector_qrdmulhh_laneq_i16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI16, - kArgTyI16, kArgTyV8I16, kArgTyI32) + { kArgTyI16, kArgTyV8I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qrdmulhs_laneq_i32v4, "vector_qrdmulhs_laneq_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI32, - kArgTyI32, kArgTyV4I32, kArgTyI32) + { kArgTyI32, kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qdmlal_n_i32v4, "vector_qdmlal_n_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I16, kArgTyV4I16) + { kArgTyV4I32, kArgTyV4I16, kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_qdmlal_n_i64v2, "vector_qdmlal_n_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV2I32, kArgTyV2I32) + { kArgTyV2I64, kArgTyV2I32, kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_qdmlal_high_n_i32v4, "vector_qdmlal_high_n_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV8I16, kArgTyV8I16) + { kArgTyV4I32, kArgTyV8I16, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_qdmlal_high_n_i64v2, "vector_qdmlal_high_n_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV4I32, kArgTyV4I32) + { kArgTyV2I64, kArgTyV4I32, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_qdmlsl_n_i32v4, "vector_qdmlsl_n_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I16, kArgTyV4I16) + { kArgTyV4I32, kArgTyV4I16, kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_qdmlsl_n_i64v2, "vector_qdmlsl_n_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV2I32, kArgTyV2I32) + { kArgTyV2I64, kArgTyV2I32, kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_qdmlsl_high_n_i32v4, "vector_qdmlsl_high_n_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV8I16, kArgTyV8I16) + { kArgTyV4I32, kArgTyV8I16, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_qdmlsl_high_n_i64v2, "vector_qdmlsl_high_n_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV4I32, kArgTyV4I32) + { kArgTyV2I64, kArgTyV4I32, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_hsub_i8v8, "vector_hsub_i8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I8, kArgTyV8I8) + { kArgTyV8I8, kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_hsubq_i8v16, "vector_hsubq_i8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV16I8, kArgTyV16I8) + { kArgTyV16I8, kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_hsub_i16v4, "vector_hsub_i16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16, kArgTyV4I16) + { kArgTyV4I16, kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_hsubq_i16v8, "vector_hsubq_i16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV8I16) + { kArgTyV8I16, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_hsub_i32v2, "vector_hsub_i32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32, kArgTyV2I32) + { kArgTyV2I32, kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_hsubq_i32v4, "vector_hsubq_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I32) + { kArgTyV4I32, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_hsub_u8v8, "vector_hsub_u8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U8, kArgTyV8U8) + { kArgTyV8U8, kArgTyV8U8 }) DEF_MIR_INTRINSIC(vector_hsubq_u8v16, "vector_hsubq_u8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV16U8, kArgTyV16U8) + { kArgTyV16U8, kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_hsub_u16v4, "vector_hsub_u16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U16, kArgTyV4U16) + { kArgTyV4U16, kArgTyV4U16 }) DEF_MIR_INTRINSIC(vector_hsubq_u16v8, "vector_hsubq_u16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyV8U16) + { kArgTyV8U16, kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_hsub_u32v2, "vector_hsub_u32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U32, kArgTyV2U32) + { kArgTyV2U32, kArgTyV2U32 }) DEF_MIR_INTRINSIC(vector_hsubq_u32v4, "vector_hsubq_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV4U32) + { kArgTyV4U32, kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_subhn_i8v8, "vector_subhn_i8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I16, kArgTyV8I16) + { kArgTyV8I16, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_subhn_i16v4, "vector_subhn_i16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I32, kArgTyV4I32) + { kArgTyV4I32, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_subhn_i32v2, "vector_subhn_i32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I64, kArgTyV2I64) + { kArgTyV2I64, kArgTyV2I64 }) DEF_MIR_INTRINSIC(vector_subhn_u8v8, "vector_subhn_u8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U16, kArgTyV8U16) + { kArgTyV8U16, kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_subhn_u16v4, "vector_subhn_u16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U32, kArgTyV4U32) + { kArgTyV4U32, kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_subhn_u32v2, "vector_subhn_u32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U64, kArgTyV2U64) + { kArgTyV2U64, kArgTyV2U64 }) DEF_MIR_INTRINSIC(vector_subhn_high_i8v16, "vector_subhn_high_i8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV8I8, kArgTyV8I16, kArgTyV8I16) + { kArgTyV8I8, kArgTyV8I16, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_subhn_high_i16v8, "vector_subhn_high_i16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV4I16, kArgTyV4I32, kArgTyV4I32) + { kArgTyV4I16, kArgTyV4I32, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_subhn_high_i32v4, "vector_subhn_high_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV2I32, kArgTyV2I64, kArgTyV2I64) + { kArgTyV2I32, kArgTyV2I64, kArgTyV2I64 }) DEF_MIR_INTRINSIC(vector_subhn_high_u8v16, "vector_subhn_high_u8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV8U8, kArgTyV8U16, kArgTyV8U16) + { kArgTyV8U8, kArgTyV8U16, kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_subhn_high_u16v8, "vector_subhn_high_u16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV4U16, kArgTyV4U32, kArgTyV4U32) + { kArgTyV4U16, kArgTyV4U32, kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_subhn_high_u32v4, "vector_subhn_high_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV2U32, kArgTyV2U64, kArgTyV2U64) + { kArgTyV2U32, kArgTyV2U64, kArgTyV2U64 }) DEF_MIR_INTRINSIC(vector_rsubhn_i8v8, "vector_rsubhn_i8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I16, kArgTyV8I16) + { kArgTyV8I16, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_rsubhn_i16v4, "vector_rsubhn_i16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I32, kArgTyV4I32) + { kArgTyV4I32, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_rsubhn_i32v2, "vector_rsubhn_i32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I64, kArgTyV2I64) + { kArgTyV2I64, kArgTyV2I64 }) DEF_MIR_INTRINSIC(vector_rsubhn_u8v8, "vector_rsubhn_u8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U16, kArgTyV8U16) + { kArgTyV8U16, kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_rsubhn_u16v4, "vector_rsubhn_u16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U32, kArgTyV4U32) + { kArgTyV4U32, kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_rsubhn_u32v2, "vector_rsubhn_u32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U64, kArgTyV2U64) + { kArgTyV2U64, kArgTyV2U64 }) DEF_MIR_INTRINSIC(vector_rsubhn_high_i8v16, "vector_rsubhn_high_i8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV8I8, kArgTyV8I16, kArgTyV8I16) + { kArgTyV8I8, kArgTyV8I16, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_rsubhn_high_i16v8, "vector_rsubhn_high_i16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV4I16, kArgTyV4I32, kArgTyV4I32) + { kArgTyV4I16, kArgTyV4I32, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_rsubhn_high_i32v4, "vector_rsubhn_high_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV2I32, kArgTyV2I64, kArgTyV2I64) + { kArgTyV2I32, kArgTyV2I64, kArgTyV2I64 }) DEF_MIR_INTRINSIC(vector_rsubhn_high_u8v16, "vector_rsubhn_high_u8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV8U8, kArgTyV8U16, kArgTyV8U16) + { kArgTyV8U8, kArgTyV8U16, kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_rsubhn_high_u16v8, "vector_rsubhn_high_u16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV4U16, kArgTyV4U32, kArgTyV4U32) + { kArgTyV4U16, kArgTyV4U32, kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_rsubhn_high_u32v4, "vector_rsubhn_high_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV2U32, kArgTyV2U64, kArgTyV2U64) + { kArgTyV2U32, kArgTyV2U64, kArgTyV2U64 }) DEF_MIR_INTRINSIC(vector_qsub_i8v8, "vector_qsub_i8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I8, kArgTyV8I8) + { kArgTyV8I8, kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_qsubq_i8v16, "vector_qsubq_i8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV16I8, kArgTyV16I8) + { kArgTyV16I8, kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_qsub_i16v4, "vector_qsub_i16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16, kArgTyV4I16) + { kArgTyV4I16, kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_qsubq_i16v8, "vector_qsubq_i16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV8I16) + { kArgTyV8I16, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_qsub_i32v2, "vector_qsub_i32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32, kArgTyV2I32) + { kArgTyV2I32, kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_qsubq_i32v4, "vector_qsubq_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I32) + { kArgTyV4I32, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_qsub_i64v1, "vector_qsub_i64v1", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1I64, - kArgTyV1I64, kArgTyV1I64) + { kArgTyV1I64, kArgTyV1I64 }) DEF_MIR_INTRINSIC(vector_qsubq_i64v2, "vector_qsubq_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV2I64) + { kArgTyV2I64, kArgTyV2I64 }) DEF_MIR_INTRINSIC(vector_qsub_u8v8, "vector_qsub_u8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U8, kArgTyV8U8) + { kArgTyV8U8, kArgTyV8U8 }) DEF_MIR_INTRINSIC(vector_qsubq_u8v16, "vector_qsubq_u8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV16U8, kArgTyV16U8) + { kArgTyV16U8, kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_qsub_u16v4, "vector_qsub_u16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U16, kArgTyV4U16) + { kArgTyV4U16, kArgTyV4U16 }) DEF_MIR_INTRINSIC(vector_qsubq_u16v8, "vector_qsubq_u16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyV8U16) + { kArgTyV8U16, kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_qsub_u32v2, "vector_qsub_u32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U32, kArgTyV2U32) + { kArgTyV2U32, kArgTyV2U32 }) DEF_MIR_INTRINSIC(vector_qsubq_u32v4, "vector_qsubq_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV4U32) + { kArgTyV4U32, kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_qsub_u64v1, "vector_qsub_u64v1", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1U64, - kArgTyV1U64, kArgTyV1U64) + { kArgTyV1U64, kArgTyV1U64 }) DEF_MIR_INTRINSIC(vector_qsubq_u64v2, "vector_qsubq_u64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U64, kArgTyV2U64) + { kArgTyV2U64, kArgTyV2U64 }) DEF_MIR_INTRINSIC(vector_aba_i8v8, "vector_aba_i8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I8, kArgTyV8I8, kArgTyV8I8) + { kArgTyV8I8, kArgTyV8I8, kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_abaq_i8v16, "vector_abaq_i8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV16I8, kArgTyV16I8, kArgTyV16I8) + { kArgTyV16I8, kArgTyV16I8, kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_aba_i16v4, "vector_aba_i16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16, kArgTyV4I16, kArgTyV4I16) + { kArgTyV4I16, kArgTyV4I16, kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_abaq_i16v8, "vector_abaq_i16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV8I16, kArgTyV8I16) + { kArgTyV8I16, kArgTyV8I16, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_aba_i32v2, "vector_aba_i32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32, kArgTyV2I32, kArgTyV2I32) + { kArgTyV2I32, kArgTyV2I32, kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_abaq_i32v4, "vector_abaq_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I32, kArgTyV4I32) + { kArgTyV4I32, kArgTyV4I32, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_aba_u8v8, "vector_aba_u8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U8, kArgTyV8U8, kArgTyV8U8) + { kArgTyV8U8, kArgTyV8U8, kArgTyV8U8 }) DEF_MIR_INTRINSIC(vector_abaq_u8v16, "vector_abaq_u8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV16U8, kArgTyV16U8, kArgTyV16U8) + { kArgTyV16U8, kArgTyV16U8, kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_aba_u16v4, "vector_aba_u16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U16, kArgTyV4U16, kArgTyV4U16) + { kArgTyV4U16, kArgTyV4U16, kArgTyV4U16 }) DEF_MIR_INTRINSIC(vector_abaq_u16v8, "vector_abaq_u16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyV8U16, kArgTyV8U16) + { kArgTyV8U16, kArgTyV8U16, kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_aba_u32v2, "vector_aba_u32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U32, kArgTyV2U32, kArgTyV2U32) + { kArgTyV2U32, kArgTyV2U32, kArgTyV2U32 }) DEF_MIR_INTRINSIC(vector_abaq_u32v4, "vector_abaq_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV4U32, kArgTyV4U32) + { kArgTyV4U32, kArgTyV4U32, kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_abal_i16v8, "vector_abal_i16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV8I8, kArgTyV8I8) + { kArgTyV8I16, kArgTyV8I8, kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_abal_i32v4, "vector_abal_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I16, kArgTyV4I16) + { kArgTyV4I32, kArgTyV4I16, kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_abal_i64v2, "vector_abal_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV2I32, kArgTyV2I32) + { kArgTyV2I64, kArgTyV2I32, kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_abal_u16v8, "vector_abal_u16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyV8U8, kArgTyV8U8) + { kArgTyV8U16, kArgTyV8U8, kArgTyV8U8 }) DEF_MIR_INTRINSIC(vector_abal_u32v4, "vector_abal_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV4U16, kArgTyV4U16) + { kArgTyV4U32, kArgTyV4U16, kArgTyV4U16 }) DEF_MIR_INTRINSIC(vector_abal_u64v2, "vector_abal_u64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U64, kArgTyV2U32, kArgTyV2U32) + { kArgTyV2U64, kArgTyV2U32, kArgTyV2U32 }) DEF_MIR_INTRINSIC(vector_abal_high_i16v8, "vector_abal_high_i16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV16I8, kArgTyV16I8) + { kArgTyV8I16, kArgTyV16I8, kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_abal_high_i32v4, "vector_abal_high_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV8I16, kArgTyV8I16) + { kArgTyV4I32, kArgTyV8I16, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_abal_high_i64v2, "vector_abal_high_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV4I32, kArgTyV4I32) + { kArgTyV2I64, kArgTyV4I32, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_abal_high_u16v8, "vector_abal_high_u16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyV16U8, kArgTyV16U8) + { kArgTyV8U16, kArgTyV16U8, kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_abal_high_u32v4, "vector_abal_high_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV8U16, kArgTyV8U16) + { kArgTyV4U32, kArgTyV8U16, kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_abal_high_u64v2, "vector_abal_high_u64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U64, kArgTyV4U32, kArgTyV4U32) + { kArgTyV2U64, kArgTyV4U32, kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_qabs_i8v8, "vector_qabs_i8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I8) + { kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_qabsq_i8v16, "vector_qabsq_i8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV16I8) + { kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_qabs_i16v4, "vector_qabs_i16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16) + { kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_qabsq_i16v8, "vector_qabsq_i16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16) + { kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_qabs_i32v2, "vector_qabs_i32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32) + { kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_qabsq_i32v4, "vector_qabsq_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32) + { kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_qabs_i64v1, "vector_qabs_i64v1", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1I64, - kArgTyV1I64) + { kArgTyV1I64 }) DEF_MIR_INTRINSIC(vector_qabsq_i64v2, "vector_qabsq_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64) + { kArgTyV2I64 }) DEF_MIR_INTRINSIC(vector_rsqrte_u32v2, "vector_rsqrte_u32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U32) + { kArgTyV2U32 }) DEF_MIR_INTRINSIC(vector_rsqrteq_u32v4, "vector_rsqrteq_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32) + { kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_addlv_i8v8, "vector_addlv_i8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI16, - kArgTyV8I8) + { kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_addlvq_i8v16, "vector_addlvq_i8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI16, - kArgTyV16I8) + { kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_addlv_i16v4, "vector_addlv_i16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI32, - kArgTyV4I16) + { kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_addlvq_i16v8, "vector_addlvq_i16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI32, - kArgTyV8I16) + { kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_addlvq_i32v4, "vector_addlvq_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI64, - kArgTyV4I32) + { kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_addlv_u8v8, "vector_addlv_u8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU16, - kArgTyV8U8) + { kArgTyV8U8 }) DEF_MIR_INTRINSIC(vector_addlvq_u8v16, "vector_addlvq_u8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU16, - kArgTyV16U8) + { kArgTyV16U8 }) DEF_MIR_INTRINSIC(vector_addlv_u16v4, "vector_addlv_u16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU32, - kArgTyV4U16) + { kArgTyV4U16 }) DEF_MIR_INTRINSIC(vector_addlvq_u16v8, "vector_addlvq_u16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU32, - kArgTyV8U16) + { kArgTyV8U16 }) DEF_MIR_INTRINSIC(vector_addlvq_u32v4, "vector_addlvq_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU64, - kArgTyV4U32) + { kArgTyV4U32 }) DEF_MIR_INTRINSIC(vector_qshl_i8v8, "vector_qshl_i8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I8, kArgTyV8I8) + { kArgTyV8I8, kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_qshlq_i8v16, "vector_qshlq_i8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV16I8, kArgTyV16I8) + { kArgTyV16I8, kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_qshl_i16v4, "vector_qshl_i16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16, kArgTyV4I16) + { kArgTyV4I16, kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_qshlq_i16v8, "vector_qshlq_i16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV8I16) + { kArgTyV8I16, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_qshl_i32v2, "vector_qshl_i32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32, kArgTyV2I32) + { kArgTyV2I32, kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_qshlq_i32v4, "vector_qshlq_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I32) + { kArgTyV4I32, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_qshl_i64v1, "vector_qshl_i64v1", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1I64, - kArgTyV1I64, kArgTyV1I64) + { kArgTyV1I64, kArgTyV1I64 }) DEF_MIR_INTRINSIC(vector_qshlq_i64v2, "vector_qshlq_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV2I64) + { kArgTyV2I64, kArgTyV2I64 }) DEF_MIR_INTRINSIC(vector_qshl_u8v8, "vector_qshl_u8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U8, kArgTyV8I8) + { kArgTyV8U8, kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_qshlq_u8v16, "vector_qshlq_u8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV16U8, kArgTyV16I8) + { kArgTyV16U8, kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_qshl_u16v4, "vector_qshl_u16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U16, kArgTyV4I16) + { kArgTyV4U16, kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_qshlq_u16v8, "vector_qshlq_u16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyV8I16) + { kArgTyV8U16, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_qshl_u32v2, "vector_qshl_u32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U32, kArgTyV2I32) + { kArgTyV2U32, kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_qshlq_u32v4, "vector_qshlq_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV4I32) + { kArgTyV4U32, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_qshl_u64v1, "vector_qshl_u64v1", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1U64, - kArgTyV1U64, kArgTyV1I64) + { kArgTyV1U64, kArgTyV1I64 }) DEF_MIR_INTRINSIC(vector_qshlq_u64v2, "vector_qshlq_u64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U64, kArgTyV2I64) + { kArgTyV2U64, kArgTyV2I64 }) DEF_MIR_INTRINSIC(vector_qshl_n_i8v8, "vector_qshl_n_i8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I8, kArgTyI32) + { kArgTyV8I8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qshlq_n_i8v16, "vector_qshlq_n_i8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV16I8, kArgTyI32) + { kArgTyV16I8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qshl_n_i16v4, "vector_qshl_n_i16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16, kArgTyI32) + { kArgTyV4I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qshlq_n_i16v8, "vector_qshlq_n_i16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyI32) + { kArgTyV8I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qshl_n_i32v2, "vector_qshl_n_i32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32, kArgTyI32) + { kArgTyV2I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qshlq_n_i32v4, "vector_qshlq_n_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyI32) + { kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qshl_n_i64v1, "vector_qshl_n_i64v1", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1I64, - kArgTyV1I64, kArgTyI32) + { kArgTyV1I64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qshlq_n_i64v2, "vector_qshlq_n_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyI32) + { kArgTyV2I64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qshl_n_u8v8, "vector_qshl_n_u8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U8, kArgTyI32) + { kArgTyV8U8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qshlq_n_u8v16, "vector_qshlq_n_u8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV16U8, kArgTyI32) + { kArgTyV16U8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qshl_n_u16v4, "vector_qshl_n_u16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U16, kArgTyI32) + { kArgTyV4U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qshlq_n_u16v8, "vector_qshlq_n_u16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyI32) + { kArgTyV8U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qshl_n_u32v2, "vector_qshl_n_u32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U32, kArgTyI32) + { kArgTyV2U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qshlq_n_u32v4, "vector_qshlq_n_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyI32) + { kArgTyV4U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qshl_n_u64v1, "vector_qshl_n_u64v1", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1U64, - kArgTyV1U64, kArgTyI32) + { kArgTyV1U64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qshlq_n_u64v2, "vector_qshlq_n_u64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U64, kArgTyI32) + { kArgTyV2U64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qshlu_n_u8v8, "vector_qshlu_n_u8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8I8, kArgTyI32) + { kArgTyV8I8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qshluq_n_u8v16, "vector_qshluq_n_u8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV16I8, kArgTyI32) + { kArgTyV16I8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qshlu_n_u16v4, "vector_qshlu_n_u16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4I16, kArgTyI32) + { kArgTyV4I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qshluq_n_u16v8, "vector_qshluq_n_u16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8I16, kArgTyI32) + { kArgTyV8I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qshlu_n_u32v2, "vector_qshlu_n_u32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2I32, kArgTyI32) + { kArgTyV2I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qshluq_n_u32v4, "vector_qshluq_n_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4I32, kArgTyI32) + { kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qshlu_n_u64v1, "vector_qshlu_n_u64v1", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1U64, - kArgTyV1I64, kArgTyI32) + { kArgTyV1I64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qshluq_n_u64v2, "vector_qshluq_n_u64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2I64, kArgTyI32) + { kArgTyV2I64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_rshl_i8v8, "vector_rshl_i8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I8, kArgTyV8I8) + { kArgTyV8I8, kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_rshlq_i8v16, "vector_rshlq_i8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV16I8, kArgTyV16I8) + { kArgTyV16I8, kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_rshl_i16v4, "vector_rshl_i16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16, kArgTyV4I16) + { kArgTyV4I16, kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_rshlq_i16v8, "vector_rshlq_i16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV8I16) + { kArgTyV8I16, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_rshl_i32v2, "vector_rshl_i32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32, kArgTyV2I32) + { kArgTyV2I32, kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_rshlq_i32v4, "vector_rshlq_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I32) + { kArgTyV4I32, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_rshl_i64v1, "vector_rshl_i64v1", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1I64, - kArgTyV1I64, kArgTyV1I64) + { kArgTyV1I64, kArgTyV1I64 }) DEF_MIR_INTRINSIC(vector_rshlq_i64v2, "vector_rshlq_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV2I64) + { kArgTyV2I64, kArgTyV2I64 }) DEF_MIR_INTRINSIC(vector_rshl_u8v8, "vector_rshl_u8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U8, kArgTyV8I8) + { kArgTyV8U8, kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_rshlq_u8v16, "vector_rshlq_u8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV16U8, kArgTyV16I8) + { kArgTyV16U8, kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_rshl_u16v4, "vector_rshl_u16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U16, kArgTyV4I16) + { kArgTyV4U16, kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_rshlq_u16v8, "vector_rshlq_u16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyV8I16) + { kArgTyV8U16, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_rshl_u32v2, "vector_rshl_u32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U32, kArgTyV2I32) + { kArgTyV2U32, kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_rshlq_u32v4, "vector_rshlq_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV4I32) + { kArgTyV4U32, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_rshl_u64v1, "vector_rshl_u64v1", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1U64, - kArgTyV1U64, kArgTyV1I64) + { kArgTyV1U64, kArgTyV1I64 }) DEF_MIR_INTRINSIC(vector_rshlq_u64v2, "vector_rshlq_u64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U64, kArgTyV2I64) + { kArgTyV2U64, kArgTyV2I64 }) DEF_MIR_INTRINSIC(vector_qrshl_i8v8, "vector_qrshl_i8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I8, kArgTyV8I8) + { kArgTyV8I8, kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_qrshlq_i8v16, "vector_qrshlq_i8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV16I8, kArgTyV16I8) + { kArgTyV16I8, kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_qrshl_i16v4, "vector_qrshl_i16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16, kArgTyV4I16) + { kArgTyV4I16, kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_qrshlq_i16v8, "vector_qrshlq_i16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV8I16) + { kArgTyV8I16, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_qrshl_i32v2, "vector_qrshl_i32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32, kArgTyV2I32) + { kArgTyV2I32, kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_qrshlq_i32v4, "vector_qrshlq_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I32) + { kArgTyV4I32, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_qrshl_i64v1, "vector_qrshl_i64v1", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1I64, - kArgTyV1I64, kArgTyV1I64) + { kArgTyV1I64, kArgTyV1I64 }) DEF_MIR_INTRINSIC(vector_qrshlq_i64v2, "vector_qrshlq_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV2I64) + { kArgTyV2I64, kArgTyV2I64 }) DEF_MIR_INTRINSIC(vector_qrshl_u8v8, "vector_qrshl_u8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U8, kArgTyV8I8) + { kArgTyV8U8, kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_qrshlq_u8v16, "vector_qrshlq_u8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV16U8, kArgTyV16I8) + { kArgTyV16U8, kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_qrshl_u16v4, "vector_qrshl_u16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U16, kArgTyV4I16) + { kArgTyV4U16, kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_qrshlq_u16v8, "vector_qrshlq_u16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyV8I16) + { kArgTyV8U16, kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_qrshl_u32v2, "vector_qrshl_u32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U32, kArgTyV2I32) + { kArgTyV2U32, kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_qrshlq_u32v4, "vector_qrshlq_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV4I32) + { kArgTyV4U32, kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_qrshl_u64v1, "vector_qrshl_u64v1", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1U64, - kArgTyV1U64, kArgTyV1I64) + { kArgTyV1U64, kArgTyV1I64 }) DEF_MIR_INTRINSIC(vector_qrshlq_u64v2, "vector_qrshlq_u64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U64, kArgTyV2I64) + { kArgTyV2U64, kArgTyV2I64 }) DEF_MIR_INTRINSIC(vector_shll_n_i16v8, "vector_shll_n_i16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I8, kArgTyI32) + { kArgTyV8I8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_shll_n_i32v4, "vector_shll_n_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I16, kArgTyI32) + { kArgTyV4I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_shll_n_i64v2, "vector_shll_n_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I32, kArgTyI32) + { kArgTyV2I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_shll_n_u16v8, "vector_shll_n_u16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U8, kArgTyI32) + { kArgTyV8U8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_shll_n_u32v4, "vector_shll_n_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U16, kArgTyI32) + { kArgTyV4U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_shll_n_u64v2, "vector_shll_n_u64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U32, kArgTyI32) + { kArgTyV2U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_shll_high_n_i16v8, "vector_shll_high_n_i16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV16I8, kArgTyI32) + { kArgTyV16I8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_shll_high_n_i32v4, "vector_shll_high_n_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV8I16, kArgTyI32) + { kArgTyV8I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_shll_high_n_i64v2, "vector_shll_high_n_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV4I32, kArgTyI32) + { kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_shll_high_n_u16v8, "vector_shll_high_n_u16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV16U8, kArgTyI32) + { kArgTyV16U8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_shll_high_n_u32v4, "vector_shll_high_n_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV8U16, kArgTyI32) + { kArgTyV8U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_shll_high_n_u64v2, "vector_shll_high_n_u64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV4U32, kArgTyI32) + { kArgTyV4U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_sli_n_i8v8, "vector_sli_n_i8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I8, kArgTyV8I8, kArgTyI32) + { kArgTyV8I8, kArgTyV8I8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_sliq_n_i8v16, "vector_sliq_n_i8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV16I8, kArgTyV16I8, kArgTyI32) + { kArgTyV16I8, kArgTyV16I8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_sli_n_i16v4, "vector_sli_n_i16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16, kArgTyV4I16, kArgTyI32) + { kArgTyV4I16, kArgTyV4I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_sliq_n_i16v8, "vector_sliq_n_i16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV8I16, kArgTyI32) + { kArgTyV8I16, kArgTyV8I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_sli_n_i32v2, "vector_sli_n_i32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32, kArgTyV2I32, kArgTyI32) + { kArgTyV2I32, kArgTyV2I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_sliq_n_i32v4, "vector_sliq_n_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I32, kArgTyI32) + { kArgTyV4I32, kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_sli_n_i64v1, "vector_sli_n_i64v1", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1I64, - kArgTyV1I64, kArgTyV1I64, kArgTyI32) + { kArgTyV1I64, kArgTyV1I64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_sliq_n_i64v2, "vector_sliq_n_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV2I64, kArgTyI32) + { kArgTyV2I64, kArgTyV2I64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_sli_n_u8v8, "vector_sli_n_u8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U8, kArgTyV8U8, kArgTyI32) + { kArgTyV8U8, kArgTyV8U8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_sliq_n_u8v16, "vector_sliq_n_u8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV16U8, kArgTyV16U8, kArgTyI32) + { kArgTyV16U8, kArgTyV16U8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_sli_n_u16v4, "vector_sli_n_u16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U16, kArgTyV4U16, kArgTyI32) + { kArgTyV4U16, kArgTyV4U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_sliq_n_u16v8, "vector_sliq_n_u16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyV8U16, kArgTyI32) + { kArgTyV8U16, kArgTyV8U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_sli_n_u32v2, "vector_sli_n_u32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U32, kArgTyV2U32, kArgTyI32) + { kArgTyV2U32, kArgTyV2U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_sliq_n_u32v4, "vector_sliq_n_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV4U32, kArgTyI32) + { kArgTyV4U32, kArgTyV4U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_sli_n_u64v1, "vector_sli_n_u64v1", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1U64, - kArgTyV1U64, kArgTyV1U64, kArgTyI32) + { kArgTyV1U64, kArgTyV1U64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_sliq_n_u64v2, "vector_sliq_n_u64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U64, kArgTyV2U64, kArgTyI32) + { kArgTyV2U64, kArgTyV2U64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_rshr_n_i8v8, "vector_rshr_n_i8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I8, kArgTyI32) + { kArgTyV8I8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_rshrq_n_i8v16, "vector_rshrq_n_i8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV16I8, kArgTyI32) + { kArgTyV16I8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_rshr_n_i16v4, "vector_rshr_n_i16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16, kArgTyI32) + { kArgTyV4I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_rshrq_n_i16v8, "vector_rshrq_n_i16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyI32) + { kArgTyV8I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_rshr_n_i32v2, "vector_rshr_n_i32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32, kArgTyI32) + { kArgTyV2I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_rshrq_n_i32v4, "vector_rshrq_n_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyI32) + { kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_rshrq_n_i64v2, "vector_rshrq_n_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyI32) + { kArgTyV2I64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_rshr_n_u8v8, "vector_rshr_n_u8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U8, kArgTyI32) + { kArgTyV8U8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_rshrq_n_u8v16, "vector_rshrq_n_u8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV16U8, kArgTyI32) + { kArgTyV16U8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_rshr_n_u16v4, "vector_rshr_n_u16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U16, kArgTyI32) + { kArgTyV4U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_rshrq_n_u16v8, "vector_rshrq_n_u16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyI32) + { kArgTyV8U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_rshr_n_u32v2, "vector_rshr_n_u32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U32, kArgTyI32) + { kArgTyV2U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_rshrq_n_u32v4, "vector_rshrq_n_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyI32) + { kArgTyV4U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_rshrq_n_u64v2, "vector_rshrq_n_u64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U64, kArgTyI32) + { kArgTyV2U64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_rshrd_n_i64, "vector_rshrd_n_i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI64, - kArgTyI64, kArgTyI32) + { kArgTyI64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_rshrd_n_u64, "vector_rshrd_n_u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU64, - kArgTyU64, kArgTyI32) + { kArgTyU64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_sra_n_i8v8, "vector_sra_n_i8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I8, kArgTyV8I8, kArgTyI32) + { kArgTyV8I8, kArgTyV8I8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_sraq_n_i8v16, "vector_sraq_n_i8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV16I8, kArgTyV16I8, kArgTyI32) + { kArgTyV16I8, kArgTyV16I8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_sra_n_i16v4, "vector_sra_n_i16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16, kArgTyV4I16, kArgTyI32) + { kArgTyV4I16, kArgTyV4I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_sraq_n_i16v8, "vector_sraq_n_i16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV8I16, kArgTyI32) + { kArgTyV8I16, kArgTyV8I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_sra_n_i32v2, "vector_sra_n_i32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32, kArgTyV2I32, kArgTyI32) + { kArgTyV2I32, kArgTyV2I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_sraq_n_i32v4, "vector_sraq_n_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I32, kArgTyI32) + { kArgTyV4I32, kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_sraq_n_i64v2, "vector_sraq_n_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV2I64, kArgTyI32) + { kArgTyV2I64, kArgTyV2I64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_sra_n_u8v8, "vector_sra_n_u8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U8, kArgTyV8U8, kArgTyI32) + { kArgTyV8U8, kArgTyV8U8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_sraq_n_u8v16, "vector_sraq_n_u8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV16U8, kArgTyV16U8, kArgTyI32) + { kArgTyV16U8, kArgTyV16U8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_sra_n_u16v4, "vector_sra_n_u16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U16, kArgTyV4U16, kArgTyI32) + { kArgTyV4U16, kArgTyV4U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_sraq_n_u16v8, "vector_sraq_n_u16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyV8U16, kArgTyI32) + { kArgTyV8U16, kArgTyV8U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_sra_n_u32v2, "vector_sra_n_u32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U32, kArgTyV2U32, kArgTyI32) + { kArgTyV2U32, kArgTyV2U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_sraq_n_u32v4, "vector_sraq_n_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV4U32, kArgTyI32) + { kArgTyV4U32, kArgTyV4U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_sraq_n_u64v2, "vector_sraq_n_u64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U64, kArgTyV2U64, kArgTyI32) + { kArgTyV2U64, kArgTyV2U64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_srad_n_i64, "vector_srad_n_i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI64, - kArgTyI64, kArgTyI64, kArgTyI32) + { kArgTyI64, kArgTyI64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_srad_n_u64, "vector_srad_n_u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU64, - kArgTyU64, kArgTyU64, kArgTyI32) + { kArgTyU64, kArgTyU64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_rsra_n_i8v8, "vector_rsra_n_i8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I8, kArgTyV8I8, kArgTyI32) + { kArgTyV8I8, kArgTyV8I8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_rsraq_n_i8v16, "vector_rsraq_n_i8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV16I8, kArgTyV16I8, kArgTyI32) + { kArgTyV16I8, kArgTyV16I8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_rsra_n_i16v4, "vector_rsra_n_i16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16, kArgTyV4I16, kArgTyI32) + { kArgTyV4I16, kArgTyV4I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_rsraq_n_i16v8, "vector_rsraq_n_i16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV8I16, kArgTyI32) + { kArgTyV8I16, kArgTyV8I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_rsra_n_i32v2, "vector_rsra_n_i32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32, kArgTyV2I32, kArgTyI32) + { kArgTyV2I32, kArgTyV2I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_rsraq_n_i32v4, "vector_rsraq_n_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I32, kArgTyI32) + { kArgTyV4I32, kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_rsraq_n_i64v2, "vector_rsraq_n_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV2I64, kArgTyI32) + { kArgTyV2I64, kArgTyV2I64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_rsra_n_u8v8, "vector_rsra_n_u8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U8, kArgTyV8U8, kArgTyI32) + { kArgTyV8U8, kArgTyV8U8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_rsraq_n_u8v16, "vector_rsraq_n_u8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV16U8, kArgTyV16U8, kArgTyI32) + { kArgTyV16U8, kArgTyV16U8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_rsra_n_u16v4, "vector_rsra_n_u16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U16, kArgTyV4U16, kArgTyI32) + { kArgTyV4U16, kArgTyV4U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_rsraq_n_u16v8, "vector_rsraq_n_u16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyV8U16, kArgTyI32) + { kArgTyV8U16, kArgTyV8U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_rsra_n_u32v2, "vector_rsra_n_u32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U32, kArgTyV2U32, kArgTyI32) + { kArgTyV2U32, kArgTyV2U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_rsraq_n_u32v4, "vector_rsraq_n_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV4U32, kArgTyI32) + { kArgTyV4U32, kArgTyV4U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_rsraq_n_u64v2, "vector_rsraq_n_u64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U64, kArgTyV2U64, kArgTyI32) + { kArgTyV2U64, kArgTyV2U64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_rsrad_n_i64, "vector_rsrad_n_i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI64, - kArgTyI64, kArgTyI64, kArgTyI32) + { kArgTyI64, kArgTyI64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_rsrad_n_u64, "vector_rsrad_n_u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU64, - kArgTyU64, kArgTyU64, kArgTyI32) + { kArgTyU64, kArgTyU64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_shrn_n_i8v8, "vector_shrn_n_i8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I16, kArgTyI32) + { kArgTyV8I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_shrn_n_i16v4, "vector_shrn_n_i16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I32, kArgTyI32) + { kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_shrn_n_i32v2, "vector_shrn_n_i32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I64, kArgTyI32) + { kArgTyV2I64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_shrn_n_u8v8, "vector_shrn_n_u8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U16, kArgTyI32) + { kArgTyV8U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_shrn_n_u16v4, "vector_shrn_n_u16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U32, kArgTyI32) + { kArgTyV4U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_shrn_n_u32v2, "vector_shrn_n_u32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U64, kArgTyI32) + { kArgTyV2U64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_shrn_high_n_i8v16, "vector_shrn_high_n_i8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV8I8, kArgTyV8I16, kArgTyI32) + { kArgTyV8I8, kArgTyV8I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_shrn_high_n_i16v8, "vector_shrn_high_n_i16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV4I16, kArgTyV4I32, kArgTyI32) + { kArgTyV4I16, kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_shrn_high_n_i32v4, "vector_shrn_high_n_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV2I32, kArgTyV2I64, kArgTyI32) + { kArgTyV2I32, kArgTyV2I64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_shrn_high_n_u8v16, "vector_shrn_high_n_u8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV8U8, kArgTyV8U16, kArgTyI32) + { kArgTyV8U8, kArgTyV8U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_shrn_high_n_u16v8, "vector_shrn_high_n_u16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV4U16, kArgTyV4U32, kArgTyI32) + { kArgTyV4U16, kArgTyV4U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_shrn_high_n_u32v4, "vector_shrn_high_n_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV2U32, kArgTyV2U64, kArgTyI32) + { kArgTyV2U32, kArgTyV2U64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qshrun_n_u8v8, "vector_qshrun_n_u8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8I16, kArgTyI32) + { kArgTyV8I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qshrun_n_u16v4, "vector_qshrun_n_u16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4I32, kArgTyI32) + { kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qshrun_n_u32v2, "vector_qshrun_n_u32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2I64, kArgTyI32) + { kArgTyV2I64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qshrun_high_n_u8v16, "vector_qshrun_high_n_u8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV8U8, kArgTyV8I16, kArgTyI32) + { kArgTyV8U8, kArgTyV8I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qshrun_high_n_u16v8, "vector_qshrun_high_n_u16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV4U16, kArgTyV4I32, kArgTyI32) + { kArgTyV4U16, kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qshrun_high_n_u32v4, "vector_qshrun_high_n_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV2U32, kArgTyV2I64, kArgTyI32) + { kArgTyV2U32, kArgTyV2I64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qshrn_n_i8v8, "vector_qshrn_n_i8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I16, kArgTyI32) + { kArgTyV8I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qshrn_n_i16v4, "vector_qshrn_n_i16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I32, kArgTyI32) + { kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qshrn_n_i32v2, "vector_qshrn_n_i32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I64, kArgTyI32) + { kArgTyV2I64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qshrn_n_u8v8, "vector_qshrn_n_u8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U16, kArgTyI32) + { kArgTyV8U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qshrn_n_u16v4, "vector_qshrn_n_u16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U32, kArgTyI32) + { kArgTyV4U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qshrn_n_u32v2, "vector_qshrn_n_u32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U64, kArgTyI32) + { kArgTyV2U64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qshrn_high_n_i8v16, "vector_qshrn_high_n_i8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV8I8, kArgTyV8I16, kArgTyI32) + { kArgTyV8I8, kArgTyV8I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qshrn_high_n_i16v8, "vector_qshrn_high_n_i16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV4I16, kArgTyV4I32, kArgTyI32) + { kArgTyV4I16, kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qshrn_high_n_i32v4, "vector_qshrn_high_n_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV2I32, kArgTyV2I64, kArgTyI32) + { kArgTyV2I32, kArgTyV2I64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qshrn_high_n_u8v16, "vector_qshrn_high_n_u8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV8U8, kArgTyV8U16, kArgTyI32) + { kArgTyV8U8, kArgTyV8U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qshrn_high_n_u16v8, "vector_qshrn_high_n_u16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV4U16, kArgTyV4U32, kArgTyI32) + { kArgTyV4U16, kArgTyV4U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qshrn_high_n_u32v4, "vector_qshrn_high_n_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV2U32, kArgTyV2U64, kArgTyI32) + { kArgTyV2U32, kArgTyV2U64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qrshrun_n_u8v8, "vector_qrshrun_n_u8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8I16, kArgTyI32) + { kArgTyV8I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qrshrun_n_u16v4, "vector_qrshrun_n_u16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4I32, kArgTyI32) + { kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qrshrun_n_u32v2, "vector_qrshrun_n_u32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2I64, kArgTyI32) + { kArgTyV2I64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qrshrun_high_n_u8v16, "vector_qrshrun_high_n_u8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV8U8, kArgTyV8I16, kArgTyI32) + { kArgTyV8U8, kArgTyV8I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qrshrun_high_n_u16v8, "vector_qrshrun_high_n_u16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV4U16, kArgTyV4I32, kArgTyI32) + { kArgTyV4U16, kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qrshrun_high_n_u32v4, "vector_qrshrun_high_n_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV2U32, kArgTyV2I64, kArgTyI32) + { kArgTyV2U32, kArgTyV2I64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qrshrn_n_i8v8, "vector_qrshrn_n_i8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I16, kArgTyI32) + { kArgTyV8I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qrshrn_n_i16v4, "vector_qrshrn_n_i16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I32, kArgTyI32) + { kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qrshrn_n_i32v2, "vector_qrshrn_n_i32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I64, kArgTyI32) + { kArgTyV2I64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qrshrn_n_u8v8, "vector_qrshrn_n_u8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U16, kArgTyI32) + { kArgTyV8U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qrshrn_n_u16v4, "vector_qrshrn_n_u16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U32, kArgTyI32) + { kArgTyV4U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qrshrn_n_u32v2, "vector_qrshrn_n_u32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U64, kArgTyI32) + { kArgTyV2U64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qrshrn_high_n_i8v16, "vector_qrshrn_high_n_i8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV8I8, kArgTyV8I16, kArgTyI32) + { kArgTyV8I8, kArgTyV8I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qrshrn_high_n_i16v8, "vector_qrshrn_high_n_i16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV4I16, kArgTyV4I32, kArgTyI32) + { kArgTyV4I16, kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qrshrn_high_n_i32v4, "vector_qrshrn_high_n_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV2I32, kArgTyV2I64, kArgTyI32) + { kArgTyV2I32, kArgTyV2I64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qrshrn_high_n_u8v16, "vector_qrshrn_high_n_u8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV8U8, kArgTyV8U16, kArgTyI32) + { kArgTyV8U8, kArgTyV8U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qrshrn_high_n_u16v8, "vector_qrshrn_high_n_u16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV4U16, kArgTyV4U32, kArgTyI32) + { kArgTyV4U16, kArgTyV4U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_qrshrn_high_n_u32v4, "vector_qrshrn_high_n_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV2U32, kArgTyV2U64, kArgTyI32) + { kArgTyV2U32, kArgTyV2U64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_rshrn_n_i8v8, "vector_rshrn_n_i8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I16, kArgTyI32) + { kArgTyV8I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_rshrn_n_i16v4, "vector_rshrn_n_i16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I32, kArgTyI32) + { kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_rshrn_n_i32v2, "vector_rshrn_n_i32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I64, kArgTyI32) + { kArgTyV2I64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_rshrn_n_u8v8, "vector_rshrn_n_u8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U16, kArgTyI32) + { kArgTyV8U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_rshrn_n_u16v4, "vector_rshrn_n_u16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U32, kArgTyI32) + { kArgTyV4U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_rshrn_n_u32v2, "vector_rshrn_n_u32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U64, kArgTyI32) + { kArgTyV2U64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_rshrn_high_n_i8v16, "vector_rshrn_high_n_i8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV8I8, kArgTyV8I16, kArgTyI32) + { kArgTyV8I8, kArgTyV8I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_rshrn_high_n_i16v8, "vector_rshrn_high_n_i16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV4I16, kArgTyV4I32, kArgTyI32) + { kArgTyV4I16, kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_rshrn_high_n_i32v4, "vector_rshrn_high_n_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV2I32, kArgTyV2I64, kArgTyI32) + { kArgTyV2I32, kArgTyV2I64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_rshrn_high_n_u8v16, "vector_rshrn_high_n_u8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV8U8, kArgTyV8U16, kArgTyI32) + { kArgTyV8U8, kArgTyV8U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_rshrn_high_n_u16v8, "vector_rshrn_high_n_u16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV4U16, kArgTyV4U32, kArgTyI32) + { kArgTyV4U16, kArgTyV4U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_rshrn_high_n_u32v4, "vector_rshrn_high_n_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV2U32, kArgTyV2U64, kArgTyI32) + { kArgTyV2U32, kArgTyV2U64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_sri_n_i8v8, "vector_sri_n_i8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I8, kArgTyV8I8, kArgTyI32) + { kArgTyV8I8, kArgTyV8I8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_sriq_n_i8v16, "vector_sriq_n_i8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV16I8, kArgTyV16I8, kArgTyI32) + { kArgTyV16I8, kArgTyV16I8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_sri_n_i16v4, "vector_sri_n_i16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16, kArgTyV4I16, kArgTyI32) + { kArgTyV4I16, kArgTyV4I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_sriq_n_i16v8, "vector_sriq_n_i16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV8I16, kArgTyI32) + { kArgTyV8I16, kArgTyV8I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_sri_n_i32v2, "vector_sri_n_i32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32, kArgTyV2I32, kArgTyI32) + { kArgTyV2I32, kArgTyV2I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_sriq_n_i32v4, "vector_sriq_n_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I32, kArgTyI32) + { kArgTyV4I32, kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_sriq_n_i64v2, "vector_sriq_n_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV2I64, kArgTyI32) + { kArgTyV2I64, kArgTyV2I64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_sri_n_u8v8, "vector_sri_n_u8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U8, - kArgTyV8U8, kArgTyV8U8, kArgTyI32) + { kArgTyV8U8, kArgTyV8U8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_sriq_n_u8v16, "vector_sriq_n_u8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16U8, - kArgTyV16U8, kArgTyV16U8, kArgTyI32) + { kArgTyV16U8, kArgTyV16U8, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_sri_n_u16v4, "vector_sri_n_u16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U16, kArgTyV4U16, kArgTyI32) + { kArgTyV4U16, kArgTyV4U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_sriq_n_u16v8, "vector_sriq_n_u16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyV8U16, kArgTyI32) + { kArgTyV8U16, kArgTyV8U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_sri_n_u32v2, "vector_sri_n_u32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U32, kArgTyV2U32, kArgTyI32) + { kArgTyV2U32, kArgTyV2U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_sriq_n_u32v4, "vector_sriq_n_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV4U32, kArgTyI32) + { kArgTyV4U32, kArgTyV4U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_sriq_n_u64v2, "vector_sriq_n_u64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U64, kArgTyV2U64, kArgTyI32) + { kArgTyV2U64, kArgTyV2U64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_srid_n_i64, "vector_srid_n_i64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyI64, - kArgTyI64, kArgTyI64, kArgTyI32) + { kArgTyI64, kArgTyI64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_srid_n_u64, "vector_srid_n_u64", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyU64, - kArgTyU64, kArgTyU64, kArgTyI32) + { kArgTyU64, kArgTyU64, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mla_lane_i16v4, "vector_mla_lane_i16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16, kArgTyV4I16, kArgTyV4I16, kArgTyI32) + { kArgTyV4I16, kArgTyV4I16, kArgTyV4I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mlaq_lane_i16v8, "vector_mlaq_lane_i16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV8I16, kArgTyV4I16, kArgTyI32) + { kArgTyV8I16, kArgTyV8I16, kArgTyV4I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mla_lane_i32v2, "vector_mla_lane_i32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32, kArgTyV2I32, kArgTyV2I32, kArgTyI32) + { kArgTyV2I32, kArgTyV2I32, kArgTyV2I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mlaq_lane_i32v4, "vector_mlaq_lane_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I32, kArgTyV2I32, kArgTyI32) + { kArgTyV4I32, kArgTyV4I32, kArgTyV2I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mla_lane_u16v4, "vector_mla_lane_u16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U16, kArgTyV4U16, kArgTyV4U16, kArgTyI32) + { kArgTyV4U16, kArgTyV4U16, kArgTyV4U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mlaq_lane_u16v8, "vector_mlaq_lane_u16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyV8U16, kArgTyV4U16, kArgTyI32) + { kArgTyV8U16, kArgTyV8U16, kArgTyV4U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mla_lane_u32v2, "vector_mla_lane_u32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U32, kArgTyV2U32, kArgTyV2U32, kArgTyI32) + { kArgTyV2U32, kArgTyV2U32, kArgTyV2U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mlaq_lane_u32v4, "vector_mlaq_lane_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV4U32, kArgTyV2U32, kArgTyI32) + { kArgTyV4U32, kArgTyV4U32, kArgTyV2U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mla_laneq_i16v4, "vector_mla_laneq_i16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16, kArgTyV4I16, kArgTyV8I16, kArgTyI32) + { kArgTyV4I16, kArgTyV4I16, kArgTyV8I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mlaq_laneq_i16v8, "vector_mlaq_laneq_i16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV8I16, kArgTyV8I16, kArgTyI32) + { kArgTyV8I16, kArgTyV8I16, kArgTyV8I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mla_laneq_i32v2, "vector_mla_laneq_i32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32, kArgTyV2I32, kArgTyV4I32, kArgTyI32) + { kArgTyV2I32, kArgTyV2I32, kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mlaq_laneq_i32v4, "vector_mlaq_laneq_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I32, kArgTyV4I32, kArgTyI32) + { kArgTyV4I32, kArgTyV4I32, kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mla_laneq_u16v4, "vector_mla_laneq_u16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U16, kArgTyV4U16, kArgTyV8U16, kArgTyI32) + { kArgTyV4U16, kArgTyV4U16, kArgTyV8U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mlaq_laneq_u16v8, "vector_mlaq_laneq_u16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyV8U16, kArgTyV8U16, kArgTyI32) + { kArgTyV8U16, kArgTyV8U16, kArgTyV8U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mla_laneq_u32v2, "vector_mla_laneq_u32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U32, kArgTyV2U32, kArgTyV4U32, kArgTyI32) + { kArgTyV2U32, kArgTyV2U32, kArgTyV4U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mlaq_laneq_u32v4, "vector_mlaq_laneq_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV4U32, kArgTyV4U32, kArgTyI32) + { kArgTyV4U32, kArgTyV4U32, kArgTyV4U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mlal_lane_i32v4, "vector_mlal_lane_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I16, kArgTyV4I16, kArgTyI32) + { kArgTyV4I32, kArgTyV4I16, kArgTyV4I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mlal_lane_i64v2, "vector_mlal_lane_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV2I32, kArgTyV2I32, kArgTyI32) + { kArgTyV2I64, kArgTyV2I32, kArgTyV2I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mlal_lane_u32v4, "vector_mlal_lane_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV4U16, kArgTyV4U16, kArgTyI32) + { kArgTyV4U32, kArgTyV4U16, kArgTyV4U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mlal_lane_u64v2, "vector_mlal_lane_u64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U64, kArgTyV2U32, kArgTyV2U32, kArgTyI32) + { kArgTyV2U64, kArgTyV2U32, kArgTyV2U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mlal_high_lane_i32v4, "vector_mlal_high_lane_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV8I16, kArgTyV4I16, kArgTyI32) + { kArgTyV4I32, kArgTyV8I16, kArgTyV4I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mlal_high_lane_i64v2, "vector_mlal_high_lane_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV4I32, kArgTyV2I32, kArgTyI32) + { kArgTyV2I64, kArgTyV4I32, kArgTyV2I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mlal_high_lane_u32v4, "vector_mlal_high_lane_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV8U16, kArgTyV4U16, kArgTyI32) + { kArgTyV4U32, kArgTyV8U16, kArgTyV4U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mlal_high_lane_u64v2, "vector_mlal_high_lane_u64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U64, kArgTyV4U32, kArgTyV2U32, kArgTyI32) + { kArgTyV2U64, kArgTyV4U32, kArgTyV2U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mlal_laneq_i32v4, "vector_mlal_laneq_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I16, kArgTyV8I16, kArgTyI32) + { kArgTyV4I32, kArgTyV4I16, kArgTyV8I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mlal_laneq_i64v2, "vector_mlal_laneq_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV2I32, kArgTyV4I32, kArgTyI32) + { kArgTyV2I64, kArgTyV2I32, kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mlal_laneq_u32v4, "vector_mlal_laneq_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV4U16, kArgTyV8U16, kArgTyI32) + { kArgTyV4U32, kArgTyV4U16, kArgTyV8U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mlal_laneq_u64v2, "vector_mlal_laneq_u64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U64, kArgTyV2U32, kArgTyV4U32, kArgTyI32) + { kArgTyV2U64, kArgTyV2U32, kArgTyV4U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mlal_high_laneq_i32v4, "vector_mlal_high_laneq_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV8I16, kArgTyV8I16, kArgTyI32) + { kArgTyV4I32, kArgTyV8I16, kArgTyV8I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mlal_high_laneq_i64v2, "vector_mlal_high_laneq_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV4I32, kArgTyV4I32, kArgTyI32) + { kArgTyV2I64, kArgTyV4I32, kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mlal_high_laneq_u32v4, "vector_mlal_high_laneq_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV8U16, kArgTyV8U16, kArgTyI32) + { kArgTyV4U32, kArgTyV8U16, kArgTyV8U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mlal_high_laneq_u64v2, "vector_mlal_high_laneq_u64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U64, kArgTyV4U32, kArgTyV4U32, kArgTyI32) + { kArgTyV2U64, kArgTyV4U32, kArgTyV4U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mla_n_i16v4, "vector_mla_n_i16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16, kArgTyV4I16, kArgTyI16) + { kArgTyV4I16, kArgTyV4I16, kArgTyI16 }) DEF_MIR_INTRINSIC(vector_mlaq_n_i16v8, "vector_mlaq_n_i16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV8I16, kArgTyI16) + { kArgTyV8I16, kArgTyV8I16, kArgTyI16 }) DEF_MIR_INTRINSIC(vector_mla_n_i32v2, "vector_mla_n_i32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32, kArgTyV2I32, kArgTyI32) + { kArgTyV2I32, kArgTyV2I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mlaq_n_i32v4, "vector_mlaq_n_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I32, kArgTyI32) + { kArgTyV4I32, kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mla_n_u16v4, "vector_mla_n_u16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U16, kArgTyV4U16, kArgTyU16) + { kArgTyV4U16, kArgTyV4U16, kArgTyU16 }) DEF_MIR_INTRINSIC(vector_mlaq_n_u16v8, "vector_mlaq_n_u16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyV8U16, kArgTyU16) + { kArgTyV8U16, kArgTyV8U16, kArgTyU16 }) DEF_MIR_INTRINSIC(vector_mla_n_u32v2, "vector_mla_n_u32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U32, kArgTyV2U32, kArgTyU32) + { kArgTyV2U32, kArgTyV2U32, kArgTyU32 }) DEF_MIR_INTRINSIC(vector_mlaq_n_u32v4, "vector_mlaq_n_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV4U32, kArgTyU32) + { kArgTyV4U32, kArgTyV4U32, kArgTyU32 }) DEF_MIR_INTRINSIC(vector_mls_lane_i16v4, "vector_mls_lane_i16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16, kArgTyV4I16, kArgTyV4I16, kArgTyI32) + { kArgTyV4I16, kArgTyV4I16, kArgTyV4I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mlsq_lane_i16v8, "vector_mlsq_lane_i16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV8I16, kArgTyV4I16, kArgTyI32) + { kArgTyV8I16, kArgTyV8I16, kArgTyV4I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mls_lane_i32v2, "vector_mls_lane_i32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32, kArgTyV2I32, kArgTyV2I32, kArgTyI32) + { kArgTyV2I32, kArgTyV2I32, kArgTyV2I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mlsq_lane_i32v4, "vector_mlsq_lane_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I32, kArgTyV2I32, kArgTyI32) + { kArgTyV4I32, kArgTyV4I32, kArgTyV2I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mls_lane_u16v4, "vector_mls_lane_u16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U16, kArgTyV4U16, kArgTyV4U16, kArgTyI32) + { kArgTyV4U16, kArgTyV4U16, kArgTyV4U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mlsq_lane_u16v8, "vector_mlsq_lane_u16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyV8U16, kArgTyV4U16, kArgTyI32) + { kArgTyV8U16, kArgTyV8U16, kArgTyV4U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mls_lane_u32v2, "vector_mls_lane_u32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U32, kArgTyV2U32, kArgTyV2U32, kArgTyI32) + { kArgTyV2U32, kArgTyV2U32, kArgTyV2U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mlsq_lane_u32v4, "vector_mlsq_lane_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV4U32, kArgTyV2U32, kArgTyI32) + { kArgTyV4U32, kArgTyV4U32, kArgTyV2U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mls_laneq_i16v4, "vector_mls_laneq_i16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16, kArgTyV4I16, kArgTyV8I16, kArgTyI32) + { kArgTyV4I16, kArgTyV4I16, kArgTyV8I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mlsq_laneq_i16v8, "vector_mlsq_laneq_i16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV8I16, kArgTyV8I16, kArgTyI32) + { kArgTyV8I16, kArgTyV8I16, kArgTyV8I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mls_laneq_i32v2, "vector_mls_laneq_i32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32, kArgTyV2I32, kArgTyV4I32, kArgTyI32) + { kArgTyV2I32, kArgTyV2I32, kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mlsq_laneq_i32v4, "vector_mlsq_laneq_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I32, kArgTyV4I32, kArgTyI32) + { kArgTyV4I32, kArgTyV4I32, kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mls_laneq_u16v4, "vector_mls_laneq_u16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U16, kArgTyV4U16, kArgTyV8U16, kArgTyI32) + { kArgTyV4U16, kArgTyV4U16, kArgTyV8U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mlsq_laneq_u16v8, "vector_mlsq_laneq_u16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyV8U16, kArgTyV8U16, kArgTyI32) + { kArgTyV8U16, kArgTyV8U16, kArgTyV8U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mls_laneq_u32v2, "vector_mls_laneq_u32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U32, kArgTyV2U32, kArgTyV4U32, kArgTyI32) + { kArgTyV2U32, kArgTyV2U32, kArgTyV4U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mlsq_laneq_u32v4, "vector_mlsq_laneq_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV4U32, kArgTyV4U32, kArgTyI32) + { kArgTyV4U32, kArgTyV4U32, kArgTyV4U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mlsl_lane_i32v4, "vector_mlsl_lane_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I16, kArgTyV4I16, kArgTyI32) + { kArgTyV4I32, kArgTyV4I16, kArgTyV4I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mlsl_lane_i64v2, "vector_mlsl_lane_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV2I32, kArgTyV2I32, kArgTyI32) + { kArgTyV2I64, kArgTyV2I32, kArgTyV2I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mlsl_lane_u32v4, "vector_mlsl_lane_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV4U16, kArgTyV4U16, kArgTyI32) + { kArgTyV4U32, kArgTyV4U16, kArgTyV4U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mlsl_lane_u64v2, "vector_mlsl_lane_u64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U64, kArgTyV2U32, kArgTyV2U32, kArgTyI32) + { kArgTyV2U64, kArgTyV2U32, kArgTyV2U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mlsl_high_lane_i32v4, "vector_mlsl_high_lane_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV8I16, kArgTyV4I16, kArgTyI32) + { kArgTyV4I32, kArgTyV8I16, kArgTyV4I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mlsl_high_lane_i64v2, "vector_mlsl_high_lane_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV4I32, kArgTyV2I32, kArgTyI32) + { kArgTyV2I64, kArgTyV4I32, kArgTyV2I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mlsl_high_lane_u32v4, "vector_mlsl_high_lane_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV8U16, kArgTyV4U16, kArgTyI32) + { kArgTyV4U32, kArgTyV8U16, kArgTyV4U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mlsl_high_lane_u64v2, "vector_mlsl_high_lane_u64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U64, kArgTyV4U32, kArgTyV2U32, kArgTyI32) + { kArgTyV2U64, kArgTyV4U32, kArgTyV2U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mlsl_laneq_i32v4, "vector_mlsl_laneq_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I16, kArgTyV8I16, kArgTyI32) + { kArgTyV4I32, kArgTyV4I16, kArgTyV8I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mlsl_laneq_i64v2, "vector_mlsl_laneq_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV2I32, kArgTyV4I32, kArgTyI32) + { kArgTyV2I64, kArgTyV2I32, kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mlsl_laneq_u32v4, "vector_mlsl_laneq_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV4U16, kArgTyV8U16, kArgTyI32) + { kArgTyV4U32, kArgTyV4U16, kArgTyV8U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mlsl_laneq_u64v2, "vector_mlsl_laneq_u64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U64, kArgTyV2U32, kArgTyV4U32, kArgTyI32) + { kArgTyV2U64, kArgTyV2U32, kArgTyV4U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mlsl_high_laneq_i32v4, "vector_mlsl_high_laneq_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV8I16, kArgTyV8I16, kArgTyI32) + { kArgTyV4I32, kArgTyV8I16, kArgTyV8I16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mlsl_high_laneq_i64v2, "vector_mlsl_high_laneq_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV4I32, kArgTyV4I32, kArgTyI32) + { kArgTyV2I64, kArgTyV4I32, kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mlsl_high_laneq_u32v4, "vector_mlsl_high_laneq_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV8U16, kArgTyV8U16, kArgTyI32) + { kArgTyV4U32, kArgTyV8U16, kArgTyV8U16, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mlsl_high_laneq_u64v2, "vector_mlsl_high_laneq_u64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U64, kArgTyV4U32, kArgTyV4U32, kArgTyI32) + { kArgTyV2U64, kArgTyV4U32, kArgTyV4U32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mlal_n_i32v4, "vector_mlal_n_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I16, kArgTyI16) + { kArgTyV4I32, kArgTyV4I16, kArgTyI16 }) DEF_MIR_INTRINSIC(vector_mlal_n_i64v2, "vector_mlal_n_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV2I32, kArgTyI32) + { kArgTyV2I64, kArgTyV2I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mlal_n_u32v4, "vector_mlal_n_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV4U16, kArgTyU16) + { kArgTyV4U32, kArgTyV4U16, kArgTyU16 }) DEF_MIR_INTRINSIC(vector_mlal_n_u64v2, "vector_mlal_n_u64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U64, kArgTyV2U32, kArgTyU32) + { kArgTyV2U64, kArgTyV2U32, kArgTyU32 }) DEF_MIR_INTRINSIC(vector_mlal_high_n_i32v4, "vector_mlal_high_n_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV8I16, kArgTyI16) + { kArgTyV4I32, kArgTyV8I16, kArgTyI16 }) DEF_MIR_INTRINSIC(vector_mlal_high_n_i64v2, "vector_mlal_high_n_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV4I32, kArgTyI32) + { kArgTyV2I64, kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mlal_high_n_u32v4, "vector_mlal_high_n_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV8U16, kArgTyU16) + { kArgTyV4U32, kArgTyV8U16, kArgTyU16 }) DEF_MIR_INTRINSIC(vector_mlal_high_n_u64v2, "vector_mlal_high_n_u64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U64, kArgTyV4U32, kArgTyU32) + { kArgTyV2U64, kArgTyV4U32, kArgTyU32 }) DEF_MIR_INTRINSIC(vector_mls_n_i16v4, "vector_mls_n_i16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16, kArgTyV4I16, kArgTyI16) + { kArgTyV4I16, kArgTyV4I16, kArgTyI16 }) DEF_MIR_INTRINSIC(vector_mlsq_n_i16v8, "vector_mlsq_n_i16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16, kArgTyV8I16, kArgTyI16) + { kArgTyV8I16, kArgTyV8I16, kArgTyI16 }) DEF_MIR_INTRINSIC(vector_mls_n_i32v2, "vector_mls_n_i32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32, kArgTyV2I32, kArgTyI32) + { kArgTyV2I32, kArgTyV2I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mlsq_n_i32v4, "vector_mlsq_n_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I32, kArgTyI32) + { kArgTyV4I32, kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mls_n_u16v4, "vector_mls_n_u16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U16, - kArgTyV4U16, kArgTyV4U16, kArgTyU16) + { kArgTyV4U16, kArgTyV4U16, kArgTyU16 }) DEF_MIR_INTRINSIC(vector_mlsq_n_u16v8, "vector_mlsq_n_u16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8U16, - kArgTyV8U16, kArgTyV8U16, kArgTyU16) + { kArgTyV8U16, kArgTyV8U16, kArgTyU16 }) DEF_MIR_INTRINSIC(vector_mls_n_u32v2, "vector_mls_n_u32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U32, - kArgTyV2U32, kArgTyV2U32, kArgTyU32) + { kArgTyV2U32, kArgTyV2U32, kArgTyU32 }) DEF_MIR_INTRINSIC(vector_mlsq_n_u32v4, "vector_mlsq_n_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV4U32, kArgTyU32) + { kArgTyV4U32, kArgTyV4U32, kArgTyU32 }) DEF_MIR_INTRINSIC(vector_mlsl_n_i32v4, "vector_mlsl_n_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV4I16, kArgTyI16) + { kArgTyV4I32, kArgTyV4I16, kArgTyI16 }) DEF_MIR_INTRINSIC(vector_mlsl_n_i64v2, "vector_mlsl_n_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV2I32, kArgTyI32) + { kArgTyV2I64, kArgTyV2I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mlsl_n_u32v4, "vector_mlsl_n_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV4U16, kArgTyU16) + { kArgTyV4U32, kArgTyV4U16, kArgTyU16 }) DEF_MIR_INTRINSIC(vector_mlsl_n_u64v2, "vector_mlsl_n_u64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U64, kArgTyV2U32, kArgTyU32) + { kArgTyV2U64, kArgTyV2U32, kArgTyU32 }) DEF_MIR_INTRINSIC(vector_mlsl_high_n_i32v4, "vector_mlsl_high_n_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32, kArgTyV8I16, kArgTyI16) + { kArgTyV4I32, kArgTyV8I16, kArgTyI16 }) DEF_MIR_INTRINSIC(vector_mlsl_high_n_i64v2, "vector_mlsl_high_n_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64, kArgTyV4I32, kArgTyI32) + { kArgTyV2I64, kArgTyV4I32, kArgTyI32 }) DEF_MIR_INTRINSIC(vector_mlsl_high_n_u32v4, "vector_mlsl_high_n_u32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4U32, - kArgTyV4U32, kArgTyV8U16, kArgTyU16) + { kArgTyV4U32, kArgTyV8U16, kArgTyU16 }) DEF_MIR_INTRINSIC(vector_mlsl_high_n_u64v2, "vector_mlsl_high_n_u64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2U64, - kArgTyV2U64, kArgTyV4U32, kArgTyU32) + { kArgTyV2U64, kArgTyV4U32, kArgTyU32 }) DEF_MIR_INTRINSIC(vector_qneg_i8v8, "vector_qneg_i8v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I8, - kArgTyV8I8) + { kArgTyV8I8 }) DEF_MIR_INTRINSIC(vector_qnegq_i8v16, "vector_qnegq_i8v16", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV16I8, - kArgTyV16I8) + { kArgTyV16I8 }) DEF_MIR_INTRINSIC(vector_qneg_i16v4, "vector_qneg_i16v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I16, - kArgTyV4I16) + { kArgTyV4I16 }) DEF_MIR_INTRINSIC(vector_qnegq_i16v8, "vector_qnegq_i16v8", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV8I16, - kArgTyV8I16) + { kArgTyV8I16 }) DEF_MIR_INTRINSIC(vector_qneg_i32v2, "vector_qneg_i32v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I32, - kArgTyV2I32) + { kArgTyV2I32 }) DEF_MIR_INTRINSIC(vector_qnegq_i32v4, "vector_qnegq_i32v4", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV4I32, - kArgTyV4I32) + { kArgTyV4I32 }) DEF_MIR_INTRINSIC(vector_qneg_i64v1, "vector_qneg_i64v1", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV1I64, - kArgTyV1I64) + { kArgTyV1I64 }) DEF_MIR_INTRINSIC(vector_qnegq_i64v2, "vector_qnegq_i64v2", 1, INTRNISVECTOR | INTRNISPURE | INTRNNOSIDEEFFECT, kArgTyV2I64, - kArgTyV2I64) \ No newline at end of file + { kArgTyV2I64 }) diff --git a/src/mapleall/maple_ir/include/intrinsics.def b/src/mapleall/maple_ir/include/intrinsics.def index 2b2ff7488e..4ce757000c 100644 --- a/src/mapleall/maple_ir/include/intrinsics.def +++ b/src/mapleall/maple_ir/include/intrinsics.def @@ -12,136 +12,193 @@ * FIT FOR A PARTICULAR PURPOSE. * See the Mulan PSL v1 for more details. */ -// DEF_MIR_INTRINSIC(STR, NAME, NUM_INSN, INTRN_CLASS, RETURN_TYPE, ARG0, ARG1, ARG2, ARG3, ARG4, ARG5) +// DEF_MIR_INTRINSIC(STR, NAME, NUM_INSN, INTRN_CLASS, RETURN_TYPE, { ARG ... }) #define DEFAULT_NUM_INSN 3 DEF_MIR_INTRINSIC(UNDEFINED,\ - nullptr, DEFAULT_NUM_INSN, kIntrnUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + nullptr, DEFAULT_NUM_INSN, kIntrnUndef, kArgTyUndef, + { kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(DEX_ATOMIC_INC,\ - "__dex_ainc", DEFAULT_NUM_INSN, kIntrnIsAtomic, kArgTyI32, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__dex_ainc", DEFAULT_NUM_INSN, INTRNATOMIC, kArgTyI32, + { kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(DEX_ATOMIC_DEC,\ - "__dex_adec", DEFAULT_NUM_INSN, kIntrnIsAtomic, kArgTyI32, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__dex_adec", DEFAULT_NUM_INSN, INTRNATOMIC, kArgTyI32, + { kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(MPL_ATOMIC_EXCHANGE_PTR,\ - "__mpl_atomic_exchange_ptr", DEFAULT_NUM_INSN, kIntrnIsAtomic, kArgTyPtr, kArgTyPtr, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__mpl_atomic_exchange_ptr", DEFAULT_NUM_INSN, INTRNATOMIC, kArgTyPtr, + { kArgTyPtr, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(MPL_CLINIT_CHECK,\ - "__mpl_clinit_check", DEFAULT_NUM_INSN, INTRNISJAVA | INTRNNOSIDEEFFECT | INTRNISSPECIAL, kArgTyVoid, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__mpl_clinit_check", DEFAULT_NUM_INSN, INTRNISJAVA | INTRNNOSIDEEFFECT | INTRNISSPECIAL, kArgTyVoid, + { kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(MPL_PROF_COUNTER_INC,\ - "__mpl_prof_counter_inc", DEFAULT_NUM_INSN, INTRNNOSIDEEFFECT | INTRNISSPECIAL, kArgTyVoid, kArgTyU32, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__mpl_prof_counter_inc", DEFAULT_NUM_INSN, INTRNNOSIDEEFFECT | INTRNISSPECIAL, kArgTyVoid, + { kArgTyU32, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(MPL_CLEAR_STACK,\ - "__mpl_clear_stack", DEFAULT_NUM_INSN, kIntrnUndef, kArgTyVoid, kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__mpl_clear_stack", DEFAULT_NUM_INSN, kIntrnUndef, kArgTyVoid, + { kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(MPL_GET_VTAB_FUNC,\ - "MCC_getFuncPtrFromVtab", DEFAULT_NUM_INSN, kIntrnUndef, kArgTyA64, kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "MCC_getFuncPtrFromVtab", DEFAULT_NUM_INSN, kIntrnUndef, kArgTyA64, + { kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(MPL_READ_STATIC_OFFSET_TAB,\ - "__mpl_read_static_offset", DEFAULT_NUM_INSN, INTRNISJAVA | INTRNNOSIDEEFFECT, kArgTyDynany, kArgTyDynany, kArgTyU32, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__mpl_read_static_offset", DEFAULT_NUM_INSN, INTRNISJAVA | INTRNNOSIDEEFFECT, kArgTyDynany, + { kArgTyDynany, kArgTyU32, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(MPL_READ_OVTABLE_ENTRY,\ - "__mpl_const_offset", DEFAULT_NUM_INSN, INTRNISPURE, kArgTyA32, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__mpl_const_offset", DEFAULT_NUM_INSN, INTRNISPURE, kArgTyA32, + { kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(MPL_READ_OVTABLE_ENTRY2,\ - "__mpl_const_offset2", DEFAULT_NUM_INSN, INTRNISPURE, kArgTyA32, kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__mpl_const_offset2", DEFAULT_NUM_INSN, INTRNISPURE, kArgTyA32, + { kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(MPL_READ_OVTABLE_ENTRY_LAZY,\ - "__mpl_const_offset_lazy", DEFAULT_NUM_INSN, INTRNNOSIDEEFFECT, kArgTyA32, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__mpl_const_offset_lazy", DEFAULT_NUM_INSN, INTRNNOSIDEEFFECT, kArgTyA32, + { kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(MPL_READ_OVTABLE_ENTRY_VTAB_LAZY,\ - "__mpl_const_offset_vtab_lazy", DEFAULT_NUM_INSN, INTRNISPURE, kArgTyDynany, kArgTyDynany, kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__mpl_const_offset_vtab_lazy", DEFAULT_NUM_INSN, INTRNISPURE, kArgTyDynany, + { kArgTyDynany, kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(MPL_READ_OVTABLE_ENTRY_FIELD_LAZY,\ - "__mpl_const_offset_field_lazy", DEFAULT_NUM_INSN, INTRNISPURE, kArgTyA32, kArgTyDynany, kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__mpl_const_offset_field_lazy", DEFAULT_NUM_INSN, INTRNISPURE, kArgTyA32, + { kArgTyDynany, kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(MPL_BOUNDARY_CHECK,\ - "", DEFAULT_NUM_INSN, INTRNISJAVA | INTRNNOSIDEEFFECT, kArgTyVoid, kArgTyU1, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "", DEFAULT_NUM_INSN, INTRNISJAVA | INTRNNOSIDEEFFECT, kArgTyVoid, + { kArgTyU1, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(MPL_READ_ARRAYCLASS_CACHE_ENTRY,\ - "__mpl_const_arrayclass_cache", DEFAULT_NUM_INSN, kIntrnUndef, kArgTyPtr, kArgTyU32, kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "__mpl_const_arrayclass_cache", DEFAULT_NUM_INSN, kIntrnUndef, kArgTyPtr, + { kArgTyU32, kArgTyDynany, kArgTyDynany, kArgTyUndef, kArgTyUndef, kArgTyUndef }) // start of RC Intrinsics with one parameters DEF_MIR_INTRINSIC(MCCSetPermanent,\ - "MCC_SetObjectPermanent", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, kArgTyRef) + "MCC_SetObjectPermanent", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, + { kArgTyRef }) DEF_MIR_INTRINSIC(MCCIncRef,\ - "MCC_IncRef_NaiveRCFast", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, kArgTyRef) + "MCC_IncRef_NaiveRCFast", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, + { kArgTyRef }) DEF_MIR_INTRINSIC(MCCDecRef,\ - "MCC_DecRef_NaiveRCFast", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, kArgTyRef) + "MCC_DecRef_NaiveRCFast", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, + { kArgTyRef }) DEF_MIR_INTRINSIC(MCCDecRefReset,\ - "MCC_ClearLocalStackRef", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, kArgTyPtr) + "MCC_ClearLocalStackRef", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, + { kArgTyPtr }) DEF_MIR_INTRINSIC(MCCLoadRefSVol,\ - "MCC_LoadVolatileStaticField", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, kArgTyRef) + "MCC_LoadVolatileStaticField", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, + { kArgTyRef }) DEF_MIR_INTRINSIC(MCCLoadRefS,\ - "MCC_LoadRefStatic", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, kArgTyRef) + "MCC_LoadRefStatic", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, + { kArgTyRef }) DEF_MIR_INTRINSIC(MCCSetObjectPermanent,\ - "MCC_SetObjectPermanent", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, kArgTyRef) + "MCC_SetObjectPermanent", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, + { kArgTyRef }) // start of RC Intrinsics with two parameters DEF_MIR_INTRINSIC(MCCCheck,\ - "MCC_CheckRefCount", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, kArgTyRef, kArgTyU32) + "MCC_CheckRefCount", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, + { kArgTyRef, kArgTyU32 }) DEF_MIR_INTRINSIC(MCCCheckArrayStore,\ - "MCC_Reflect_Check_Arraystore", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, kArgTyRef, kArgTyRef) + "MCC_Reflect_Check_Arraystore", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, + { kArgTyRef, kArgTyRef }) DEF_MIR_INTRINSIC(MCCIncDecRef,\ - "MCC_IncDecRef_NaiveRCFast", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, kArgTyRef, kArgTyRef) + "MCC_IncDecRef_NaiveRCFast", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, + { kArgTyRef, kArgTyRef }) DEF_MIR_INTRINSIC(MCCIncDecRefReset,\ - "MCC_IncDecRefReset", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, kArgTyRef, kArgTyPtr) + "MCC_IncDecRefReset", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, + { kArgTyRef, kArgTyPtr }) DEF_MIR_INTRINSIC(MCCDecRefResetPair,\ - "MCC_DecRefResetPair", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, kArgTyPtr, kArgTyPtr) + "MCC_DecRefResetPair", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, + { kArgTyPtr, kArgTyPtr }) DEF_MIR_INTRINSIC(MCCLoadWeakVol,\ - "MCC_LoadVolatileWeakField", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, kArgTyRef, kArgTyRef) + "MCC_LoadVolatileWeakField", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, + { kArgTyRef, kArgTyRef }) DEF_MIR_INTRINSIC(MCCLoadWeak,\ - "MCC_LoadWeakField", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, kArgTyRef, kArgTyRef) + "MCC_LoadWeakField", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, + { kArgTyRef, kArgTyRef }) DEF_MIR_INTRINSIC(MCCLoadRef,\ - "MCC_LoadRefField_NaiveRCFast", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, kArgTyRef, kArgTyRef) + "MCC_LoadRefField_NaiveRCFast", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, + { kArgTyRef, kArgTyRef }) DEF_MIR_INTRINSIC(MCCLoadRefVol,\ - "MCC_LoadVolatileField", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, kArgTyRef, kArgTyRef) + "MCC_LoadVolatileField", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, + { kArgTyRef, kArgTyRef }) DEF_MIR_INTRINSIC(MCCWriteReferent,\ - "MCC_WriteReferent", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, kArgTyRef, kArgTyRef) + "MCC_WriteReferent", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, + { kArgTyRef, kArgTyRef }) DEF_MIR_INTRINSIC(MCCWriteSVolNoInc,\ - "MCC_WriteVolatileStaticFieldNoInc", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, kArgTyRef, kArgTyRef) + "MCC_WriteVolatileStaticFieldNoInc", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, + { kArgTyRef, kArgTyRef }) DEF_MIR_INTRINSIC(MCCWriteSVolNoDec,\ - "MCC_WriteVolatileStaticFieldNoDec", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, kArgTyRef, kArgTyRef) + "MCC_WriteVolatileStaticFieldNoDec", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, + { kArgTyRef, kArgTyRef }) DEF_MIR_INTRINSIC(MCCWriteSVolNoRC,\ - "MCC_WriteVolatileStaticFieldNoRC", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, kArgTyRef, kArgTyRef) + "MCC_WriteVolatileStaticFieldNoRC", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, + { kArgTyRef, kArgTyRef }) DEF_MIR_INTRINSIC(MCCWriteSVol,\ - "MCC_WriteVolatileStaticField", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, kArgTyRef, kArgTyRef) + "MCC_WriteVolatileStaticField", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, + { kArgTyRef, kArgTyRef }) DEF_MIR_INTRINSIC(MCCWriteSNoInc,\ - "MCC_WriteRefFieldStaticNoInc", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, kArgTyRef, kArgTyRef) + "MCC_WriteRefFieldStaticNoInc", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, + { kArgTyRef, kArgTyRef }) DEF_MIR_INTRINSIC(MCCWriteSNoDec,\ - "MCC_WriteRefFieldStaticNoDec", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, kArgTyRef, kArgTyRef) + "MCC_WriteRefFieldStaticNoDec", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, + { kArgTyRef, kArgTyRef }) DEF_MIR_INTRINSIC(MCCWriteSNoRC,\ - "MCC_WriteRefFieldStaticNoRC", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, kArgTyRef, kArgTyRef) + "MCC_WriteRefFieldStaticNoRC", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, + { kArgTyRef, kArgTyRef }) DEF_MIR_INTRINSIC(MCCWriteS,\ - "MCC_WriteRefFieldStatic", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, kArgTyRef, kArgTyRef) + "MCC_WriteRefFieldStatic", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, + { kArgTyRef, kArgTyRef }) // start of RC intrinsics with three parameters DEF_MIR_INTRINSIC(MCCWriteVolNoInc,\ - "MCC_WriteVolatileFieldNoInc", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, kArgTyRef, kArgTyRef, kArgTyRef) + "MCC_WriteVolatileFieldNoInc", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, + { kArgTyRef, kArgTyRef, kArgTyRef }) DEF_MIR_INTRINSIC(MCCWriteVolNoDec,\ - "MCC_WriteVolatileFieldNoDec", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, kArgTyRef, kArgTyRef, kArgTyRef) + "MCC_WriteVolatileFieldNoDec", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, + { kArgTyRef, kArgTyRef, kArgTyRef }) DEF_MIR_INTRINSIC(MCCWriteVolNoRC,\ - "MCC_WriteVolatileFieldNoRC", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, kArgTyRef, kArgTyRef, kArgTyRef) + "MCC_WriteVolatileFieldNoRC", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, + { kArgTyRef, kArgTyRef, kArgTyRef }) DEF_MIR_INTRINSIC(MCCWriteVol,\ - "MCC_WriteVolatileField", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, kArgTyRef, kArgTyRef, kArgTyRef) + "MCC_WriteVolatileField", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, + { kArgTyRef, kArgTyRef, kArgTyRef }) DEF_MIR_INTRINSIC(MCCWriteNoInc,\ - "MCC_WriteRefFieldNoInc", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, kArgTyRef, kArgTyRef, kArgTyRef) + "MCC_WriteRefFieldNoInc", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, + { kArgTyRef, kArgTyRef, kArgTyRef }) DEF_MIR_INTRINSIC(MCCWriteNoDec,\ - "MCC_WriteRefFieldNoDec", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, kArgTyRef, kArgTyRef, kArgTyRef) + "MCC_WriteRefFieldNoDec", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, + { kArgTyRef, kArgTyRef, kArgTyRef }) DEF_MIR_INTRINSIC(MCCWriteNoRC,\ - "MCC_WriteRefFieldNoRC", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, kArgTyRef, kArgTyRef, kArgTyRef) + "MCC_WriteRefFieldNoRC", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, + { kArgTyRef, kArgTyRef, kArgTyRef }) DEF_MIR_INTRINSIC(MCCWrite,\ - "MCC_WriteRefField", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, kArgTyRef, kArgTyRef, kArgTyRef) + "MCC_WriteRefField", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, + { kArgTyRef, kArgTyRef, kArgTyRef }) DEF_MIR_INTRINSIC(MCCWriteVolWeak,\ - "MCC_WriteVolatileWeakField", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, kArgTyRef, kArgTyRef, kArgTyRef) + "MCC_WriteVolatileWeakField", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, + { kArgTyRef, kArgTyRef, kArgTyRef }) DEF_MIR_INTRINSIC(MCCWriteWeak,\ - "MCC_WriteWeakField", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, kArgTyRef, kArgTyRef, kArgTyRef) + "MCC_WriteWeakField", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, + { kArgTyRef, kArgTyRef, kArgTyRef }) DEF_MIR_INTRINSIC(MPL_CLEANUP_LOCALREFVARS,\ - "__mpl_cleanup_localrefvars", DEFAULT_NUM_INSN, INTRNISJAVA | INTRNNOSIDEEFFECT | INTRNISSPECIAL, kArgTyUndef, kArgTyRef, kArgTyRef, kArgTyRef, kArgTyRef, kArgTyRef, kArgTyRef) + "__mpl_cleanup_localrefvars", DEFAULT_NUM_INSN, INTRNISJAVA | INTRNNOSIDEEFFECT | INTRNISSPECIAL, kArgTyUndef, + { kArgTyRef, kArgTyRef, kArgTyRef, kArgTyRef, kArgTyRef, kArgTyRef }) DEF_MIR_INTRINSIC(MPL_CLEANUP_LOCALREFVARS_SKIP,\ - "__mpl_cleanup_localrefvars_skip", DEFAULT_NUM_INSN, INTRNISJAVA | INTRNNOSIDEEFFECT | INTRNISSPECIAL, kArgTyUndef, kArgTyRef, kArgTyRef, kArgTyRef, kArgTyRef, kArgTyRef, kArgTyRef) + "__mpl_cleanup_localrefvars_skip", DEFAULT_NUM_INSN, INTRNISJAVA | INTRNNOSIDEEFFECT | INTRNISSPECIAL, kArgTyUndef, + { kArgTyRef, kArgTyRef, kArgTyRef, kArgTyRef, kArgTyRef, kArgTyRef }) DEF_MIR_INTRINSIC(MPL_MEMSET_LOCALVAR,\ - "", DEFAULT_NUM_INSN, kIntrnUndef, kArgTyPtr, kArgTyU32, kArgTyU8, kArgTyU32, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "", DEFAULT_NUM_INSN, kIntrnUndef, kArgTyPtr, + { kArgTyU32, kArgTyU8, kArgTyU32, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(MPL_SET_CLASS,\ - "", DEFAULT_NUM_INSN, kIntrnUndef, kArgTyPtr, kArgTyPtr, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + "", DEFAULT_NUM_INSN, kIntrnUndef, kArgTyPtr, + { kArgTyPtr, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) DEF_MIR_INTRINSIC(MPL_CLEANUP_NORETESCOBJS,\ - "__mpl_cleanup_noretescobjs", DEFAULT_NUM_INSN, INTRNISJAVA | INTRNNOSIDEEFFECT | INTRNISSPECIAL, kArgTyUndef, kArgTyRef, kArgTyRef,\ - kArgTyRef, kArgTyRef, kArgTyRef, kArgTyRef) + "__mpl_cleanup_noretescobjs", DEFAULT_NUM_INSN, INTRNISJAVA | INTRNNOSIDEEFFECT | INTRNISSPECIAL, kArgTyUndef, + { kArgTyRef, kArgTyRef, kArgTyRef, kArgTyRef, kArgTyRef, kArgTyRef }) // start of GC Intrinsics DEF_MIR_INTRINSIC(MCCGCCheck,\ - "MCC_CheckObjAllocated", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, kArgTyRef) + "MCC_CheckObjAllocated", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, + { kArgTyRef }) // start of Profile Intrinsics DEF_MIR_INTRINSIC(MCCSaveProf,\ - "MCC_SaveProfile", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, kArgTyRef) + "MCC_SaveProfile", DEFAULT_NUM_INSN, INTRNISRC | INTRNNOSIDEEFFECT, kArgTyVoid, + { kArgTyRef }) #include "intrinsic_java.def" #include "simplifyintrinsics.def" @@ -153,4 +210,5 @@ DEF_MIR_INTRINSIC(MCCSaveProf,\ #include "intrinsic_vector.def" #include "intrinsic_vector_new.def" DEF_MIR_INTRINSIC(LAST,\ - nullptr, DEFAULT_NUM_INSN, kIntrnUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef) + nullptr, DEFAULT_NUM_INSN, kIntrnUndef, kArgTyUndef, + { kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef, kArgTyUndef }) diff --git a/src/mapleall/maple_ir/include/intrinsics.h b/src/mapleall/maple_ir/include/intrinsics.h index d0a89f448c..e7aecf28c8 100644 --- a/src/mapleall/maple_ir/include/intrinsics.h +++ b/src/mapleall/maple_ir/include/intrinsics.h @@ -14,8 +14,11 @@ */ #ifndef MAPLE_IR_INCLUDE_INTRINSICS_H #define MAPLE_IR_INCLUDE_INTRINSICS_H +#include #include "prim_types.h" #include "intrinsic_op.h" +#include "side_effect_info.h" +#include "utils.h" namespace maple { enum IntrinProperty : uint32 { @@ -24,6 +27,7 @@ enum IntrinProperty : uint32 { kIntrnIsJsUnary, kIntrnIsJsBinary, kIntrnIsJava, + kIntrnIsCBuiltin, kIntrnIsJavaUnary, kIntrnIsJavaBinary, kIntrnIsReturnStruct, @@ -35,6 +39,7 @@ enum IntrinProperty : uint32 { kIntrnIsRC, kIntrnIsSpecial, kIntrnIsVector, + kIntrnMembarrier, // the opnd is marked as "WRITE" but not "READ" => write only // the opnd is marked as "READ" but not "WRITE" => read only // the opnd is marked with nothing but has side effect => write & read @@ -116,6 +121,7 @@ constexpr uint32 INTRNISJS = 1U << kIntrnIsJs; constexpr uint32 INTRNISJSUNARY = 1U << kIntrnIsJsUnary; constexpr uint32 INTRNISJSBINARY = 1U << kIntrnIsJsBinary; constexpr uint32 INTRNISJAVA = 1U << kIntrnIsJava; +constexpr uint32 INTRNISCBUILTIN = 1U << kIntrnIsCBuiltin; constexpr uint32 INTRNNOSIDEEFFECT = 1U << kIntrnNoSideEffect; constexpr uint32 INTRNRETURNSTRUCT = 1U << kIntrnIsReturnStruct; constexpr uint32 INTRNLOADMEM = 1U << kIntrnIsLoadMem; @@ -125,6 +131,7 @@ constexpr uint32 INTRNATOMIC = 1U << kIntrnIsAtomic; constexpr uint32 INTRNISRC = 1U << kIntrnIsRC; constexpr uint32 INTRNISSPECIAL = 1U << kIntrnIsSpecial; constexpr uint32 INTRNISVECTOR = 1U << kIntrnIsVector; +constexpr uint32 INTRNMEMBARRIER = 1U << kIntrnMembarrier; constexpr uint32 INTRNWRITEFIRSTOPND = 1U << kIntrnWriteFirstOpnd; constexpr uint32 INTRNWRITESECONDOPND = 1U << kIntrnWriteSecondOpnd; constexpr uint32 INTRNWRITETHIRDOPND = 1U << kIntrnWriteThirdOpnd; @@ -139,12 +146,46 @@ constexpr uint32 INTRNREADFIFTHOPND = 1U << kIntrnReadFifthOpnd; constexpr uint32 INTRNREADSIXTHOPND = 1U << kIntrnReadSixthOpnd; class MIRType; // circular dependency exists, no other choice class MIRModule; // circular dependency exists, no other choice + +struct IntrinArgInfo { + IntrinArgInfo(IntrinArgType type) : argType(type) {} + + IntrinArgInfo(IntrinArgType type, MemEffect effect) : argType(type) { + SetMemEffectAttr(effect); + } + + IntrinArgInfo(IntrinArgType type, std::vector effects) : argType(type) { + for (auto effect : effects) { + SetMemEffectAttr(effect); + } + } + + void SetMemEffectAttr(MemEffect effect) { + argSideEffectAttr[static_cast(effect)] = true; + } + + bool GetMemEffectAttr(MemEffect effect) const { + return argSideEffectAttr[static_cast(effect)]; + } + + IntrinArgType argType; + MemEffectAttr argSideEffectAttr = { 0 }; +}; + +struct IntrinReturnInfo { + IntrinReturnInfo(IntrinArgType type) : returnType(type) {} + IntrinReturnInfo(IntrinArgType type, AliasLevelInfo info) : returnType(type), returnAliasInfo(info) {} + IntrinArgType returnType; + AliasLevelInfo returnAliasInfo = AliasLevelInfo::kNoAlias; +}; + struct IntrinDesc { static constexpr int kMaxArgsNum = 7; const char *name; size_t numInsn; uint32 properties; - IntrinArgType argTypes[1 + kMaxArgsNum]; // argTypes[0] is the return type + IntrinReturnInfo returnInfo; + std::vector argInfo; bool IsJS() const { return static_cast(properties & INTRNISJS); } @@ -153,6 +194,10 @@ struct IntrinDesc { return static_cast(properties & INTRNISJAVA); } + bool IsCBuiltIn() const { + return static_cast(properties & INTRNISCBUILTIN); + } + bool IsJsUnary() const { return static_cast(properties & INTRNISJSUNARY); } @@ -201,14 +246,17 @@ struct IntrinDesc { return static_cast(properties & INTRNISVECTOR); } + bool IsMemoryBarrier() const { + return static_cast(properties & INTRNMEMBARRIER); + } + size_t GetNumInsn() const { return numInsn; } - bool IsNthOpndMarkedToWrite(uint32 opndIdx) const; - bool IsNthOpndMarkedToRead(uint32 opndIdx) const; bool ReadNthOpnd(uint32 opndIdx) const; bool WriteNthOpnd(uint32 opndIdx) const; + bool ReturnNthOpnd(uint32 opndIdx) const; MIRType *GetReturnType() const; MIRType *GetArgType(uint32 index) const; MIRType *GetTypeFromArgTy(IntrinArgType argType) const; diff --git a/src/mapleall/maple_ir/include/lexer.h b/src/mapleall/maple_ir/include/lexer.h index 3d8624d3a9..2e5d0ac5c9 100644 --- a/src/mapleall/maple_ir/include/lexer.h +++ b/src/mapleall/maple_ir/include/lexer.h @@ -62,7 +62,7 @@ class MIRLexer { return theInt128Val; } - uint64 GetTheIntVal() const { + int64 GetTheIntVal() const { return theIntVal; } diff --git a/src/mapleall/maple_ir/include/metadata_layout.h b/src/mapleall/maple_ir/include/metadata_layout.h index bc23dd3a41..074ac06acb 100644 --- a/src/mapleall/maple_ir/include/metadata_layout.h +++ b/src/mapleall/maple_ir/include/metadata_layout.h @@ -269,6 +269,7 @@ static constexpr uintptr_t kClassInitializedState = kClInitStateAddrBase + kCach extern "C" uint8_t classInitProtectRegion[]; +namespace { // Note there is no state to indicate a class is already initialized. // Any state beyond listed below is treated as initialized. enum ClassInitState : uint8_t { @@ -292,6 +293,7 @@ enum SEGVAddr : size_t { kSEGVAddrRangeEnd, }; +} // namespace struct ClassMetadata { // object common fields diff --git a/src/mapleall/maple_ir/include/mir_builder.h b/src/mapleall/maple_ir/include/mir_builder.h index 4918980162..841988ebd7 100644 --- a/src/mapleall/maple_ir/include/mir_builder.h +++ b/src/mapleall/maple_ir/include/mir_builder.h @@ -40,7 +40,7 @@ using ArgPair = std::pair; using ArgVector = MapleVector; class MIRBuilder { public: - enum MatchStyle { + enum MatchStyle : unsigned int { kUpdateFieldID = 0, // do not match but traverse to update fieldID kMatchTopField = 1, // match top level field only kMatchAnyField = 2, // match any field @@ -67,7 +67,11 @@ class MIRBuilder { return func; } - MIRModule &GetMirModule() const { + const MIRModule &GetMirModule() const { + return *mirModule; + } + + MIRModule &GetMirModule() { return *mirModule; } @@ -100,7 +104,7 @@ class MIRBuilder { return GlobalTables::GetStrTable().GetStrIdxFromName(str); } - MIRFunction *GetOrCreateFunction(const std::string &str, TyIdx retTyIdx); + MIRFunction *GetOrCreateFunction(const std::string &str, const TyIdx &retTyIdx, bool *isNewCreated = nullptr); MIRFunction *GetFunctionFromSymbol(const MIRSymbol &funcSymbol) const; MIRFunction *GetFunctionFromStidx(const StIdx &stIdx) const; MIRFunction *GetFunctionFromName(const std::string &str) const; diff --git a/src/mapleall/maple_ir/include/mir_const.h b/src/mapleall/maple_ir/include/mir_const.h index 691df94fb0..17adfd0e9f 100644 --- a/src/mapleall/maple_ir/include/mir_const.h +++ b/src/mapleall/maple_ir/include/mir_const.h @@ -40,6 +40,14 @@ enum MIRConstKind { kConstStConst }; +constexpr int32 kDoubleLength = 64; +constexpr int32 kFirstBits = 4; +constexpr int32 kDoubleSignPos = 63; +constexpr int32 kDoubleExpShiftBits = 48; +constexpr int32 kDoubleExpLeftBits = 16; +constexpr int32 kDoubleExpPos = 51; +constexpr int32 kFloatSignPos = 31; +constexpr int32 kFloatExpPos = 22; class MIRConst { public: explicit MIRConst(MIRType &type, MIRConstKind constKind = kConstInvalid) @@ -324,11 +332,13 @@ class MIRFloatConst : public MIRConst { std::pair GetFloat128Value() const { // check special values - if (std::isinf(value.floatValue) && ((static_cast(value.intValue) & (1U << 31)) >> 31) == 0x0) { + if (std::isinf(value.floatValue) && + ((static_cast(value.intValue) & (1U << kFloatSignPos)) >> kFloatSignPos) == 0x0) { return {0x7fff000000000000, 0x0}; - } else if (std::isinf(value.floatValue) && ((static_cast(value.intValue) & (1U << 31)) >> 31) == 0x1) { + } else if (std::isinf(value.floatValue) && + ((static_cast(value.intValue) & (1U << kFloatSignPos)) >> kFloatSignPos) == 0x1) { return {0xffff000000000000, 0x0}; - } else if ((static_cast(value.intValue) ^ (0x1 << 31)) == 0x0) { + } else if ((static_cast(value.intValue) ^ (1U << kFloatSignPos)) == 0x0) { return {0x8000000000000000, 0x0}; } else if (value.intValue == 0x0) { return {0x0, 0x0}; @@ -336,30 +346,31 @@ class MIRFloatConst : public MIRConst { return {0x7fff800000000000, 0x0}; } - uint64 sign = (static_cast(value.intValue) & (1U << 31)) >> 31; + uint64 sign = (static_cast(value.intValue) & (1U << kFloatSignPos)) >> kFloatSignPos; uint64 exp = (static_cast(value.intValue) & (0x7f800000)) >> 23; uint64 mantiss = static_cast(value.intValue) & (0x007fffff); - const int float_exp_offset = 0x7f; - const int float_min_exp = -0x7e; - const int float_mantiss_bits = 23; - const int ldoubleExpOffset = 0x3fff; + const int64 floatExpOffset = 0x7f; + const int64 floatMinExp = -0x7e; + const int64 floatMantissBits = 23; + const int64 ldoubleExpOffset = 0x3fff; if (exp > 0x0 && exp < 0xff) { - uint64 ldoubleExp = static_cast(static_cast(exp) - float_exp_offset + ldoubleExpOffset); + uint64 ldoubleExp = static_cast(static_cast(exp) - floatExpOffset + ldoubleExpOffset); uint64 ldoubleMantissFirstBits = mantiss << 25; uint64 lowByte = 0x0; - uint64 highByte = (sign << 63) | (ldoubleExp << 48) | (ldoubleMantissFirstBits); + uint64 highByte = (sign << kDoubleSignPos) | (ldoubleExp << kDoubleExpShiftBits) | (ldoubleMantissFirstBits); return {highByte, lowByte}; } else if (exp == 0x0) { - int num_pos = 0; - for (; ((mantiss >> static_cast(22 - num_pos)) & 0x1) != 1; ++num_pos) {}; + int32 numPos = 0; + for (; ((mantiss >> static_cast(kFloatExpPos - numPos)) & 0x1) != 1; ++numPos) {}; - uint64 ldoubleExp = static_cast(float_min_exp - (num_pos + 1) + ldoubleExpOffset); - int numLdoubleMantissBits = float_mantiss_bits - (num_pos + 1); - uint64 ldoubleMantissMask = (1 << static_cast(numLdoubleMantissBits)) - 1; + uint64 ldoubleExp = static_cast(floatMinExp - (numPos + 1) + ldoubleExpOffset); + int64 numLdoubleMantissBits = floatMantissBits - (numPos + 1); + uint64 ldoubleMantissMask = (1ULL << static_cast(numLdoubleMantissBits)) - 1; uint64 ldoubleMantiss = mantiss & ldoubleMantissMask; - uint64 highByte = (sign << 63 | (ldoubleExp << 48) | (ldoubleMantiss << static_cast(25 + num_pos + 1))); + uint64 highByte = ((sign << kDoubleSignPos) | (ldoubleExp << kDoubleExpShiftBits)) | + (ldoubleMantiss << static_cast(25 + numPos + 1)); uint64 lowByte = 0; return {highByte, lowByte}; } else { @@ -445,11 +456,13 @@ class MIRDoubleConst : public MIRConst { std::pair GetFloat128Value() const { // check special values - if (std::isinf(value.dValue) && ((static_cast(value.intValue) & (1ull << 63)) >> 63) == 0x0) { + if (std::isinf(value.dValue) && + ((static_cast(value.intValue) & (1ULL << kDoubleSignPos)) >> kDoubleSignPos) == 0x0) { return {0x7fff000000000000, 0x0}; - } else if (std::isinf(value.dValue) && ((static_cast(value.intValue) & (1ull << 63)) >> 63) == 0x1) { + } else if (std::isinf(value.dValue) && + ((static_cast(value.intValue) & (1ULL << kDoubleSignPos)) >> kDoubleSignPos) == 0x1) { return {0xffff000000000000, 0x0}; - } else if ((static_cast(value.intValue) ^ (1ull << 63)) == 0x0) { + } else if ((static_cast(value.intValue) ^ (1ULL << kDoubleSignPos)) == 0x0) { return {0x8000000000000000, 0x0}; } else if (value.intValue == 0x0) { return {0x0, 0x0}; @@ -457,7 +470,7 @@ class MIRDoubleConst : public MIRConst { return {0x7fff800000000000, 0x0}; } - uint64 sign = (static_cast(value.intValue) & (1ull << 63)) >> 63; + uint64 sign = (static_cast(value.intValue) & (1ULL << kDoubleSignPos)) >> kDoubleSignPos; uint64 exp = (static_cast(value.intValue) & (0x7ff0000000000000)) >> 52; uint64 mantiss = static_cast(value.intValue) & (0x000fffffffffffff); @@ -469,32 +482,32 @@ class MIRDoubleConst : public MIRConst { if (exp > 0x0 && exp < 0x7ff) { uint64 ldoubleExp = static_cast(static_cast(exp) - doubleExpOffset + ldoubleExpOffset); - uint64 ldoubleMantissFirstBits = mantiss >> 4; + uint64 ldoubleMantissFirstBits = mantiss >> kFirstBits; uint64 ldoubleMantissSecondBits = (mantiss & 0xf) << 60; uint64 lowByte = ldoubleMantissSecondBits; - uint64 highByte = (sign << 63) | (ldoubleExp << 48) | (ldoubleMantissFirstBits); + uint64 highByte = (sign << kDoubleSignPos) | (ldoubleExp << kDoubleExpShiftBits) | (ldoubleMantissFirstBits); return {highByte, lowByte}; } else if (exp == 0x0) { - int num_pos = 0; - for (; ((mantiss >> static_cast(51 - num_pos)) & 0x1) != 1; ++num_pos) {}; + int numPos = 0; + for (; ((mantiss >> static_cast(kDoubleExpPos - numPos)) & 0x1) != 1; ++numPos) {}; - uint64 ldoubleExp = static_cast(doubleMinExp - (num_pos + 1) + ldoubleExpOffset); + uint64 ldoubleExp = static_cast(doubleMinExp - (numPos + 1) + ldoubleExpOffset); - int numLdoubleMantissBits = doubleMantissBits - (num_pos + 1); + int numLdoubleMantissBits = doubleMantissBits - (numPos + 1); uint64 ldoubleMantissMask = (1ULL << static_cast(numLdoubleMantissBits)) - 1; uint64 ldoubleMantiss = mantiss & ldoubleMantissMask; uint64 ldoubleMantissHighBits = 0; - if (4 - (num_pos + 1) > 0) { - ldoubleMantissHighBits = ldoubleMantiss >> static_cast(4 - (num_pos + 1)); + if (kFirstBits - (numPos + 1) > 0) { + ldoubleMantissHighBits = ldoubleMantiss >> static_cast(kFirstBits - (numPos + 1)); } else { - ldoubleMantissHighBits = ldoubleMantiss << static_cast(std::abs(4 - (num_pos + 1))); + ldoubleMantissHighBits = ldoubleMantiss << static_cast(std::abs(kFirstBits - (numPos + 1))); } - uint64 highByte = (sign << 63) | (ldoubleExp << 48) | ldoubleMantissHighBits; + uint64 highByte = (sign << kDoubleSignPos) | (ldoubleExp << kDoubleExpShiftBits) | ldoubleMantissHighBits; uint64 lowByte = 0; - if ((64 - numLdoubleMantissBits) + 48 < 64) { - lowByte = ldoubleMantiss << static_cast((64 - numLdoubleMantissBits) + 48); + if ((kDoubleLength - numLdoubleMantissBits) + kDoubleExpShiftBits < kDoubleLength) { + lowByte = ldoubleMantiss << static_cast((kDoubleLength - numLdoubleMantissBits) + kDoubleExpShiftBits); } return {highByte, lowByte}; @@ -588,15 +601,15 @@ class MIRFloat128Const : public MIRConst { double GetDoubleValue() const { // check special values: -0, +-inf, NaN - if (val[1] == 0x0 && val[0] == (1ull << 63)) { + if (val[1] == 0x0 && val[0] == (1ULL << kDoubleSignPos)) { return -0.0; } else if (val[1] == 0x0 && val[0] == 0x0) { return 0.0; - } else if (val[1] == 0x0 && val[0] == 0x7fff000000000000ull) { + } else if (val[1] == 0x0 && val[0] == 0x7fff000000000000ULL) { return std::numeric_limits::infinity(); - } else if (val[1] == 0x0 && val[0] == 0xffff000000000000ull) { + } else if (val[1] == 0x0 && val[0] == 0xffff000000000000ULL) { return -std::numeric_limits::infinity(); - } else if ((val[0] >> 48) == 0x7fff && (val[0] << 16 != 0x0 || val[1] != 0x0)) { + } else if ((val[0] >> kDoubleExpShiftBits) == 0x7fff && (val[0] << kDoubleExpLeftBits != 0x0 || val[1] != 0x0)) { return std::numeric_limits::quiet_NaN(); } @@ -624,7 +637,7 @@ class MIRFloat128Const : public MIRConst { * we take first 48 bits of double mantiss from first long double byte * and then with '|' add remain 4 bits to get full double mantiss */ - uint64 doubleMantiss = ((val[0] & 0x0000ffffffffffff) << 4) | (val[1] >> 60); + uint64 doubleMantiss = ((val[0] & 0x0000ffffffffffff) << kFirstBits) | (val[1] >> 60); uint64 doubleExp = static_cast(static_cast(GetExponent() - ldoubleExpOffset + doubleExpOffset)); uint64 doubleSign = GetSign(); @@ -634,7 +647,7 @@ class MIRFloat128Const : public MIRConst { } // if we can convert long double to subnormal double else { - uint64 doubleMantiss = ((val[0] & 0x0000ffffffffffff) << 4) | (val[1] >> 60) | 0x0010000000000000; + uint64 doubleMantiss = ((val[0] & 0x0000ffffffffffff) << kFirstBits) | (val[1] >> 60) | 0x0010000000000000; doubleMantiss = doubleMantiss >> static_cast(doubleMinExp - (GetExponent() - ldoubleExpOffset)); uint64 doubleSign = GetSign(); union HexVal data; @@ -644,15 +657,15 @@ class MIRFloat128Const : public MIRConst { } int GetExponent() const { - return (val[0] & 0x7fff000000000000) >> 48; + return (val[0] & 0x7fff000000000000) >> kDoubleExpShiftBits; } unsigned GetSign() const { - return (val[0] & (1ull << 63)) >> 63; + return (val[0] & (1ULL << kDoubleSignPos)) >> kDoubleSignPos; } bool IsZero() const override { - return (val[0] == 0x0 && val[1] == 0x0) || (val[0] == (1ull << 63) && val[1] == 0x0); + return (val[0] == 0x0 && val[1] == 0x0) || (val[0] == (1ULL << kDoubleSignPos) && val[1] == 0x0); } bool IsOne() const override { @@ -660,11 +673,11 @@ class MIRFloat128Const : public MIRConst { }; bool IsNan() const { - return ((val[0] >> 48) == 0x7fff && (val[0] << 16 != 0x0 || val[1] != 0x0)); + return ((val[0] >> kDoubleExpShiftBits) == 0x7fff && (val[0] << kDoubleExpLeftBits != 0x0 || val[1] != 0x0)); } bool IsInf() const { - return (val[0] == 0x7fff000000000000ull && val[1] == 0x0) || (val[0] == 0xffff000000000000ull && val[1] == 0x0); + return (val[0] == 0x7fff000000000000ULL && val[1] == 0x0) || (val[0] == 0xffff000000000000ULL && val[1] == 0x0); } bool IsAllBitsOne() const { @@ -679,9 +692,8 @@ class MIRFloat128Const : public MIRConst { void Dump(const MIRSymbolTable *localSymTab) const override; - long double GetValue() { - CHECK_FATAL(false, "Can't cast f128 to any standard type"); - return *reinterpret_cast(&val[0]); + const long double GetValue() const { + return *reinterpret_cast(&val[0]); } std::pair GetFloat128Value() const { diff --git a/src/mapleall/maple_ir/include/mir_function.h b/src/mapleall/maple_ir/include/mir_function.h index 34962dad5f..54991e7f97 100644 --- a/src/mapleall/maple_ir/include/mir_function.h +++ b/src/mapleall/maple_ir/include/mir_function.h @@ -65,6 +65,7 @@ class FormalDef { class InlineSummary; // circular dependency exists, no other choice class MeFunction; // circular dependency exists, no other choice class EAConnectionGraph; // circular dependency exists, no other choice +class MemReferenceTable; class MIRFunction { public: MIRFunction(MIRModule *mod, StIdx idx) @@ -345,6 +346,13 @@ class MIRFunction { return !funcAttrs.GetAttr(FUNCATTR_visibility_hidden) && !funcAttrs.GetAttr(FUNCATTR_visibility_protected); } + bool CanDoNoPlt(bool isShlib, bool isPIE) const { + if (IsDefaultVisibility() && ((isPIE && !GetBody()) || (isShlib && !IsStatic()))) { + return true; + } + return false; + } + void SetVarArgs() { funcAttrs.SetAttr(FUNCATTR_varargs); } @@ -630,7 +638,7 @@ class MIRFunction { CHECK_FATAL(typeNameTab != nullptr, "typeNameTab is nullptr"); return typeNameTab->GetTyIdxFromGStrIdx(idx); } - void SetGStrIdxToTyIdx(GStrIdx gStrIdx, TyIdx tyIdx) const { + void SetGStrIdxToTyIdx(const GStrIdx &gStrIdx, const TyIdx &tyIdx) const { CHECK_FATAL(typeNameTab != nullptr, "typeNameTab is nullptr"); typeNameTab->SetGStrIdxToTyIdx(gStrIdx, tyIdx); } @@ -1293,6 +1301,18 @@ class MIRFunction { InlineSummary *GetOrCreateInlineSummary(); + MemReferenceTable *GetMemReferenceTable() { + return memReferenceTable; + } + + void DiscardMemReferenceTable() { + memReferenceTable = nullptr; + } + + void CreateMemReferenceTable(); + + MemReferenceTable *GetOrCreateMemReferenceTable(); + void SetFuncProfData(FuncProfInfo *data) { funcProfData = data; } @@ -1456,6 +1476,7 @@ class MIRFunction { uint64 cfgChksum = 0; FuncProfInfo *funcProfData = nullptr; InlineSummary *inlineSummary = nullptr; + MemReferenceTable *memReferenceTable = nullptr; void DumpFlavorLoweredThanMmpl() const; MIRFuncType *ReconstructFormals(const std::vector &symbols, bool clearOldArgs); bool mayWriteToAddrofStack = false; diff --git a/src/mapleall/maple_ir/include/mir_lower.h b/src/mapleall/maple_ir/include/mir_lower.h index f74a4cab65..9ea87768c2 100644 --- a/src/mapleall/maple_ir/include/mir_lower.h +++ b/src/mapleall/maple_ir/include/mir_lower.h @@ -147,12 +147,12 @@ class MIRLower { FuncProfInfo *GetFuncProfData() const { return mirFunc->GetFuncProfData(); } - void CopyStmtFrequency(const StmtNode *newStmt, const StmtNode *oldStmt) { + void CopyStmtFrequency(const StmtNode *newStmt, const StmtNode &oldStmt) { ASSERT(GetFuncProfData() != nullptr, "nullptr check"); - if (newStmt == oldStmt) { + if (newStmt == &oldStmt) { return; } - FreqType freq = GetFuncProfData()->GetStmtFreq(oldStmt->GetStmtID()); + FreqType freq = GetFuncProfData()->GetStmtFreq(oldStmt.GetStmtID()); GetFuncProfData()->SetStmtFreq(newStmt->GetStmtID(), freq); } diff --git a/src/mapleall/maple_ir/include/mir_module.h b/src/mapleall/maple_ir/include/mir_module.h index 5467e1349a..ed755c29c7 100644 --- a/src/mapleall/maple_ir/include/mir_module.h +++ b/src/mapleall/maple_ir/include/mir_module.h @@ -202,6 +202,10 @@ class MIRModule { return inlineSummaryAlloc; } + MapleAllocator &GetMemReferenceTableAllocator() { + return memReferenceTableAllocator; + } + void ReleaseInlineSummaryAlloc() noexcept { if (inlineSummaryAlloc.GetMemPool() != nullptr) { delete inlineSummaryAlloc.GetMemPool(); @@ -209,6 +213,13 @@ class MIRModule { } } + void ReleaseMemReferenceAllocator() noexcept { + if (memReferenceTableAllocator.GetMemPool()) { + delete memReferenceTableAllocator.GetMemPool(); + memReferenceTableAllocator.SetMemPool(nullptr); + } + } + void ReleasePragmaMemPool() { if (pragmaMemPool) { memPoolCtrler.DeleteMemPool(pragmaMemPool); @@ -644,7 +655,7 @@ class MIRModule { return dbgInfo; } - MIRScope *GetScope() const { + MIRScope *GetScope() { return scope; } @@ -735,6 +746,7 @@ class MIRModule { MapleAllocator memPoolAllocator; MapleAllocator pragmaMemPoolAllocator; MapleAllocator inlineSummaryAlloc; // For allocating function inline summary + MapleAllocator memReferenceTableAllocator; // For allocating function inline summary MapleList functionList; // function table in the order of the appearance of function bodies; it // excludes prototype-only functions MapleVector importedMplt; diff --git a/src/mapleall/maple_ir/include/mir_nodes.h b/src/mapleall/maple_ir/include/mir_nodes.h index a98010179d..4efa3845bd 100644 --- a/src/mapleall/maple_ir/include/mir_nodes.h +++ b/src/mapleall/maple_ir/include/mir_nodes.h @@ -123,7 +123,7 @@ class BaseNode : public BaseNodeT { return kOpcodeInfo.GetTableItemAt(GetOpCode()).instrucSize; } - const char *GetOpName() const; + const std::string &GetOpName() const; bool MayThrowException() const; size_t NumOpnds() const override { return numOpnds; @@ -2462,13 +2462,13 @@ class BlockNode : public StmtNode { void InsertAfter(const StmtNode *stmtNode1, StmtNode *stmtNode2); // Insert ss2 after ss1 in current block. // insert all the stmts in inblock to the current block after stmt1 void InsertBlockAfter(BlockNode &inblock, const StmtNode *stmt1); - void Dump(int32 indent, const MIRSymbolTable *theSymTab, MIRPregTable *thePregTab, bool withInfo, bool isFuncbody, - MIRFlavor flavor) const; + void DoDump(int32 indent, const MIRSymbolTable *theSymTab, MIRPregTable *thePregTab, bool withInfo, + bool isFuncbody, MIRFlavor flavor) const; bool Verify() const override; bool Verify(VerifyResult &verifyResult) const override; void Dump(int32 indent) const override { - Dump(indent, nullptr, nullptr, false, false, kFlavorUnknown); + DoDump(indent, nullptr, nullptr, false, false, kFlavorUnknown); } BlockNode *CloneTree(MapleAllocator &allocator) const override; @@ -2551,7 +2551,7 @@ class BlockCallBack { } } - CallBack GetCallBack() const { + CallBack GetCallBack() { return callBack; } @@ -3228,10 +3228,6 @@ class SafetyCallCheckStmtNode { public: SafetyCallCheckStmtNode(GStrIdx callFuncNameIdx, size_t paramIndex, GStrIdx stmtFuncNameIdx) : callFuncNameIdx(callFuncNameIdx), paramIndex(paramIndex), stmtFuncNameIdx(stmtFuncNameIdx) {} - explicit SafetyCallCheckStmtNode(const SafetyCallCheckStmtNode &stmtNode) - : callFuncNameIdx(stmtNode.GetFuncNameIdx()), - paramIndex(stmtNode.GetParamIndex()), - stmtFuncNameIdx(stmtNode.GetStmtFuncNameIdx()) {} virtual ~SafetyCallCheckStmtNode() = default; @@ -3251,6 +3247,12 @@ class SafetyCallCheckStmtNode { void Dump() const { LogInfo::MapleLogger() << " <&" << GetFuncName() << ", " << paramIndex << ", &" << GetStmtFuncName() << ">"; } + protected: + SafetyCallCheckStmtNode(const SafetyCallCheckStmtNode &stmtNode) + : callFuncNameIdx(stmtNode.GetFuncNameIdx()), + paramIndex(stmtNode.GetParamIndex()), + stmtFuncNameIdx(stmtNode.GetStmtFuncNameIdx()) {} + SafetyCallCheckStmtNode &operator=(const SafetyCallCheckStmtNode &stmtNode); private: GStrIdx callFuncNameIdx; @@ -3640,6 +3642,10 @@ class IntrinsiccallNode : public NaryStmtNode { return returnValues.at(i); } + IntrinDesc &GetIntrinsicDescription() const { + return IntrinDesc::intrinTable[intrinsic]; + } + private: MIRIntrinsicID intrinsic; TyIdx tyIdx; diff --git a/src/mapleall/maple_ir/include/mir_parser.h b/src/mapleall/maple_ir/include/mir_parser.h index 149148f59f..42b483c213 100644 --- a/src/mapleall/maple_ir/include/mir_parser.h +++ b/src/mapleall/maple_ir/include/mir_parser.h @@ -114,6 +114,12 @@ class MIRParser { bool ParsePrototypeRemaining(MIRFunction &func, std::vector &vecTyIdx, std::vector &vecAttrs, bool &varArgs); + bool GetStIdxForStmtDassignOrDassignoffNode(StIdx &stidx); + bool SetRHSExprForStmtDassignOrDassignoffNode(UnaryStmtNode &assignStmt); + LabelIdx GetLabIdxForGotoOrBrNode(); + bool SetDataForIntrinsiccallNode(IntrinsiccallNode &intrnCallNode, bool isAssigned); + bool AddLabelForTryOrJsTryNode(LabelIdx &labidx, const GStrIdx &stridx); + // Stmt Parser bool ParseStmtDassign(StmtNodePtr &stmt); bool ParseStmtDassignoff(StmtNodePtr &stmt); @@ -183,6 +189,11 @@ class MIRParser { bool ParseStmtAsm(StmtNodePtr &stmt); bool ParseStmtSafeRegion(StmtNodePtr &stmt); + bool SetPrimTypeAndStIdxForDreadOrDreadoffNode(BaseNode &dexpr, StIdx &stidx); + bool SetBOpndForBinaryOrCompareNode(BinaryNode &addExpr); + bool SetPrimTypeAndOffsetForIreadoffOrIreadFPoffNode(BaseNode &iReadOff, bool isIreadoff); + bool SetStIdxForAddrofOrAddrofoffNode(BaseNode &aNode, StIdx &stidx); + // Expression Parser bool ParseExpression(BaseNodePtr &expr); bool ParseExprDread(BaseNodePtr &expr); diff --git a/src/mapleall/maple_ir/include/mir_scope.h b/src/mapleall/maple_ir/include/mir_scope.h index 88b8ffecaa..1759a6baab 100644 --- a/src/mapleall/maple_ir/include/mir_scope.h +++ b/src/mapleall/maple_ir/include/mir_scope.h @@ -49,6 +49,10 @@ class MIRAlias { aliasVarMap[idx] = vars; } + const MapleMap &GetAliasVarMap() const { + return aliasVarMap; + } + MapleMap &GetAliasVarMap() { return aliasVarMap; } @@ -155,10 +159,11 @@ class MIRScope { if (blkSrcPos.find(pos) == blkSrcPos.end()) { auto point = module->GetMPAllocator().New>( module->GetMPAllocator().Adapter()); - point->emplace(std::pair(posB, posE)); - blkSrcPos.emplace(std::pair*>(pos, point)); + (void)point->emplace(std::pair(posB, posE)); + (void)blkSrcPos.emplace( + std::pair*>(pos, point)); } else { - blkSrcPos[pos]->emplace(std::pair(posB, posE)); + (void)blkSrcPos[pos]->emplace(std::pair(posB, posE)); } } diff --git a/src/mapleall/maple_ir/include/mir_symbol.h b/src/mapleall/maple_ir/include/mir_symbol.h index 95efe21426..d13f8694bd 100644 --- a/src/mapleall/maple_ir/include/mir_symbol.h +++ b/src/mapleall/maple_ir/include/mir_symbol.h @@ -539,6 +539,43 @@ class MIRSymbol { accessByMem = val; } + bool IsUnionReplaceCand() const { + return unionReplaceCand; + } + + void SeUnionReplaceCand(bool set) { + unionReplaceCand = set; + } + + uint8 GetSymbolAlign(bool isArm64ilp32) const { + uint8 align = GetAttrs().GetAlignValue(); + if (align == 0) { + if (GetType()->GetKind() == kTypeStruct || GetType()->GetKind() == kTypeClass || + GetType()->GetKind() == kTypeArray || GetType()->GetKind() == kTypeUnion) { +#if (defined(TARGX86) && TARGX86) || (defined(TARGX86_64) && TARGX86_64) + return align; +#else + uint8 alignMin = 0; + if (GetType()->GetAlign() > 0) { + alignMin = static_cast(log2(GetType()->GetAlign())); + } + align = std::max(3, alignMin); // 3: alignment in bytes of uint8 +#endif + } else { + align = static_cast(GetType()->GetAlign()); +#if (defined(TARGAARCH64) && TARGAARCH64) || (defined(TARGARM32) && TARGARM32) ||\ + (defined(TARGARK) && TARGARK) || (defined(TARGRISCV64) && TARGRISCV64) + if (isArm64ilp32 && GetType()->GetPrimType() == PTY_a32) { + align = 3; // 3: alignment in bytes of uint8 + } else { + align = static_cast(log2(align)); + } +#endif + } + } + return align; + } + // Please keep order of the fields, avoid paddings. private: TyIdx tyIdx{ 0 }; @@ -558,6 +595,7 @@ class MIRSymbol { bool hasPotentialAssignment = false; // for global static vars, init as false and will be set true // if assigned by stmt or the address of itself is taken bool accessByMem = false; // temporary used for tls var the access of which have been transformed to mem offset + bool unionReplaceCand = false; StIdx stIdx { 0, 0 }; TypeAttrs typeAttrs; GStrIdx nameStrIdx{ 0 }; diff --git a/src/mapleall/maple_ir/include/mir_type.h b/src/mapleall/maple_ir/include/mir_type.h index 08c2fd64b1..df3f12b60f 100644 --- a/src/mapleall/maple_ir/include/mir_type.h +++ b/src/mapleall/maple_ir/include/mir_type.h @@ -43,7 +43,6 @@ struct OffsetPair { }; using FieldOffsetVector = std::vector; constexpr size_t kMaxArrayDim = 20; -const std::string kJstrTypeName = "constStr"; constexpr uint32 kInvalidFieldNum = UINT32_MAX; constexpr size_t kInvalidSize = UINT64_MAX; #if MIR_FEATURE_FULL @@ -428,7 +427,7 @@ class TypeAttrs { bool IsPacked() const { return GetAttr(ATTR_packed); } - + bool HasPack() const { return GetAttr(ATTR_pack); } @@ -472,11 +471,11 @@ class FieldAttrs { } void SetAttr(FieldAttrKind x) { - attrFlag |= (1u << static_cast(x)); + attrFlag |= (1U << static_cast(x)); } bool GetAttr(FieldAttrKind x) const { - return (attrFlag & (1u << static_cast(x))) != 0; + return (attrFlag & (1U << static_cast(x))) != 0; } void SetAlign(uint32 x) { @@ -835,6 +834,10 @@ class MIRType { return GetPrimTypeSize(primType); } + virtual uint32 GetUnadjustedAlign() const { + return GetPrimTypeSize(primType); + } + virtual bool HasVolatileField() const { return false; } @@ -1439,6 +1442,7 @@ class MIRStructType : public MIRType { size_t GetSize() const override; uint32 GetAlign() const override; + uint32 GetUnadjustedAlign() const override; size_t GetHashIndex() const override { constexpr uint8 attrShift = 3; @@ -1551,18 +1555,26 @@ class MIRStructType : public MIRType { void SetAlias(MIRAlias *mirAlias) { alias = mirAlias; } - MIRAlias *GetAlias() const { + + const MIRAlias *GetAlias() const { + return alias; + } + + MIRAlias *GetAlias() { return alias; } bool HasZeroWidthBitField() const; - void AddFieldLayout(OffsetPair pair) { + void AddFieldLayout(const OffsetPair &pair) { fieldLayout.push_back(pair); } - std::vector GetFieldLayout() { + std::vector GetFieldLayout() const { return fieldLayout; } + uint32 GetFieldTypeAlignByFieldPair(const FieldPair &fieldPair); + uint32 GetFieldTypeAlign(FieldID fieldID); + protected: FieldVector fields{}; std::vector fieldInferredTyIdx{}; diff --git a/src/mapleall/maple_ir/include/opcode_info.h b/src/mapleall/maple_ir/include/opcode_info.h index 0ff202e394..4ab0f43853 100644 --- a/src/mapleall/maple_ir/include/opcode_info.h +++ b/src/mapleall/maple_ir/include/opcode_info.h @@ -64,7 +64,7 @@ class OpcodeTable { OpcodeTable(); ~OpcodeTable() = default; - OpcodeDesc GetTableItemAt(Opcode o) const { + const OpcodeDesc &GetTableItemAt(Opcode o) const { ASSERT(o < OP_last, "invalid opcode"); return table[o]; } diff --git a/src/mapleall/maple_ir/include/opcodes.h b/src/mapleall/maple_ir/include/opcodes.h index a1186234a0..ecc5788a8a 100644 --- a/src/mapleall/maple_ir/include/opcodes.h +++ b/src/mapleall/maple_ir/include/opcodes.h @@ -59,6 +59,10 @@ inline constexpr bool IsBranch(Opcode opcode) { opcode == OP_igoto); } +inline constexpr bool IsShift(Opcode opcode) { + return (opcode >= OP_ashr && opcode <= OP_shl); +} + inline constexpr bool IsLogicalShift(Opcode opcode) { return (opcode == OP_lshr || opcode == OP_shl); } diff --git a/src/mapleall/maple_util/include/set_spec.h b/src/mapleall/maple_ir/include/side_effect_info.h similarity index 43% rename from src/mapleall/maple_util/include/set_spec.h rename to src/mapleall/maple_ir/include/side_effect_info.h index 6daefc5416..390defbecd 100644 --- a/src/mapleall/maple_util/include/set_spec.h +++ b/src/mapleall/maple_ir/include/side_effect_info.h @@ -12,35 +12,31 @@ * FIT FOR A PARTICULAR PURPOSE. * See the Mulan PSL v2 for more details. */ -#ifndef MAPLE_UTIL_INCLUDE_SET_SPEC_H -#define MAPLE_UTIL_INCLUDE_SET_SPEC_H -#include -#include -#include - -#include "file_utils.h" +#ifndef MAPLE_IR_INCLUDE_SIDE_EFFECT_INFO_H +#define MAPLE_IR_INCLUDE_SIDE_EFFECT_INFO_H +#include namespace maple { -struct SpecList { - const char *name; /* name of the spec. */ - int nameLen; /* length of the name */ - const char* value; /* spec value. */ +enum class AliasLevelInfo { + kNotAllDefSeen = 0, + kAliasGlobal, + kAliasArgs, + kNoAlias, }; -class SetSpec { - public: - static std::vector specs; - static std::deque args; - static void InitSpec(); - static void ReadSpec(const std::string &specsFile); - static void DoSpecs(const char *spec); - static void SetUpSpecs(std::deque &arg, const std::string &specsFile); - static void SetSpecs(const char *name, const char *spec); - static void EndGoingArg(const std::string tmpArg); - static std::string FindPath(const std::string tmpArg); +enum class MemEffect { + kUnknown = 0, + kStoreMemory, + kLoadMemory, + kReadOnly, + kUnused, + kReturned, + kMemEffectLast, }; -} // namespace maple -#endif /* MAPLE_UTIL_INCLUDE_SET_SPEC_H */ \ No newline at end of file +using MemEffectAttr = std::bitset(MemEffect::kMemEffectLast)>; + +} // namespace maple +#endif // MAPLE_IR_INCLUDE_SIDE_EFFECT_INFO_H diff --git a/src/mapleall/maple_ir/include/simplifyintrinsics.def b/src/mapleall/maple_ir/include/simplifyintrinsics.def index f6078c25fb..d65b247ff8 100644 --- a/src/mapleall/maple_ir/include/simplifyintrinsics.def +++ b/src/mapleall/maple_ir/include/simplifyintrinsics.def @@ -15,17 +15,24 @@ /* INTRINSIC(STR, NAME) */ DEF_MIR_INTRINSIC(GET_AND_ADDI, "Lsun_2Fmisc_2FUnsafe_3B_7CgetAndAddInt_7C_28Ljava_2Flang_2FObject_3BJI_29I",\ - DEFAULT_NUM_INSN, INTRNISJAVA | INTRNISSPECIAL, kArgTyI32, kArgTyRef, kArgTyRef, kArgTyI64, kArgTyI32) + DEFAULT_NUM_INSN, INTRNISJAVA | INTRNISSPECIAL, kArgTyI32, + { kArgTyRef, kArgTyRef, kArgTyI64, kArgTyI32 }) DEF_MIR_INTRINSIC(GET_AND_ADDL, "Lsun_2Fmisc_2FUnsafe_3B_7CgetAndAddLong_7C_28Ljava_2Flang_2FObject_3BJJ_29J",\ - DEFAULT_NUM_INSN, INTRNISJAVA | INTRNISSPECIAL, kArgTyI64, kArgTyRef, kArgTyRef, kArgTyI64, kArgTyI64) + DEFAULT_NUM_INSN, INTRNISJAVA | INTRNISSPECIAL, kArgTyI64, + { kArgTyRef, kArgTyRef, kArgTyI64, kArgTyI64 }) DEF_MIR_INTRINSIC(GET_AND_SETI, "Lsun_2Fmisc_2FUnsafe_3B_7CgetAndSetInt_7C_28Ljava_2Flang_2FObject_3BJI_29I",\ - DEFAULT_NUM_INSN, INTRNISJAVA | INTRNISSPECIAL, kArgTyI32, kArgTyRef, kArgTyRef, kArgTyI64, kArgTyI32) + DEFAULT_NUM_INSN, INTRNISJAVA | INTRNISSPECIAL, kArgTyI32, + { kArgTyRef, kArgTyRef, kArgTyI64, kArgTyI32 }) DEF_MIR_INTRINSIC(GET_AND_SETL, "Lsun_2Fmisc_2FUnsafe_3B_7CgetAndSetLong_7C_28Ljava_2Flang_2FObject_3BJJ_29J",\ - DEFAULT_NUM_INSN, INTRNISJAVA | INTRNISSPECIAL, kArgTyI64, kArgTyRef, kArgTyRef, kArgTyI64, kArgTyI64) + DEFAULT_NUM_INSN, INTRNISJAVA | INTRNISSPECIAL, kArgTyI64, + { kArgTyRef, kArgTyRef, kArgTyI64, kArgTyI64 }) DEF_MIR_INTRINSIC(COMP_AND_SWAPI, "Lsun_2Fmisc_2FUnsafe_3B_7CcompareAndSwapInt_7C_28Ljava_2Flang_2FObject_3BJII_29Z",\ - DEFAULT_NUM_INSN, INTRNISJAVA | INTRNISSPECIAL, kArgTyU1, kArgTyRef, kArgTyRef, kArgTyI64, kArgTyI32, kArgTyI32) + DEFAULT_NUM_INSN, INTRNISJAVA | INTRNISSPECIAL, kArgTyU1, + { kArgTyRef, kArgTyRef, kArgTyI64, kArgTyI32, kArgTyI32 }) DEF_MIR_INTRINSIC(COMP_AND_SWAPL, "Lsun_2Fmisc_2FUnsafe_3B_7CcompareAndSwapLong_7C_28Ljava_2Flang_2FObject_3BJJJ_29Z",\ - DEFAULT_NUM_INSN, INTRNISJAVA | INTRNISSPECIAL, kArgTyU1, kArgTyRef, kArgTyRef, kArgTyI64, kArgTyI64, kArgTyI64) + DEFAULT_NUM_INSN, INTRNISJAVA | INTRNISSPECIAL, kArgTyU1, + { kArgTyRef, kArgTyRef, kArgTyI64, kArgTyI64, kArgTyI64 }) DEF_MIR_INTRINSIC(STR_INDEXOF, "Ljava_2Flang_2FString_3B_7CindexOf_7C_28Ljava_2Flang_2FString_3B_29I",\ - DEFAULT_NUM_INSN, INTRNISJAVA | INTRNISSPECIAL, kArgTyI32, kArgTyRef, kArgTyRef) + DEFAULT_NUM_INSN, INTRNISJAVA | INTRNISSPECIAL, kArgTyI32, + { kArgTyRef, kArgTyRef }) diff --git a/src/mapleall/maple_ir/src/bin_mpl_export.cpp b/src/mapleall/maple_ir/src/bin_mpl_export.cpp index 55a843e998..cd734903bc 100644 --- a/src/mapleall/maple_ir/src/bin_mpl_export.cpp +++ b/src/mapleall/maple_ir/src/bin_mpl_export.cpp @@ -508,7 +508,7 @@ void BinaryMplExport::OutputFieldPair(const FieldPair &fp) { OutputStr(fp.first); // GStrIdx OutputType(fp.second.first); // TyIdx FieldAttrs fa = fp.second.second; - WriteNum(fa.GetAttrFlag()); + WriteNum(static_cast(fa.GetAttrFlag())); WriteNum(fa.GetAlignValue()); if (fa.GetAttr(FLDATTR_static) && fa.GetAttr(FLDATTR_final) && (fa.GetAttr(FLDATTR_public) || fa.GetAttr(FLDATTR_protected))) { @@ -909,7 +909,9 @@ void BinaryMplExport::WriteSeField() { GlobalTables::GetGsymTable().GetSymbolFromStrIdx(GlobalTables::GetStrTable().GetStrIdxFromName(funcStr)); MIRFunction *func = (funcSymbol != nullptr) ? GetMIRModule().GetMIRBuilder()->GetFunctionFromSymbol(*funcSymbol) : nullptr; - OutputType(func->GetReturnTyIdx()); + if (func != nullptr) { + OutputType(func->GetReturnTyIdx()); + } } ++size; } diff --git a/src/mapleall/maple_ir/src/bin_mpl_import.cpp b/src/mapleall/maple_ir/src/bin_mpl_import.cpp index 878cbf5d04..b972dfc62a 100644 --- a/src/mapleall/maple_ir/src/bin_mpl_import.cpp +++ b/src/mapleall/maple_ir/src/bin_mpl_import.cpp @@ -138,6 +138,7 @@ MIRConst *BinaryMplImport::ImportConst(MIRFunction *func) { } case kBinKindConstAddrofLabel: { LabelIdx lidx = ImportLabel(func); + CHECK_NULL_FATAL(func); PUIdx puIdx = func->GetPuidx(); MIRLblConst *lblConst = memPool->New(lidx, puIdx, *type); (void)func->GetLabelTab()->addrTakenLabels.insert(lidx); diff --git a/src/mapleall/maple_ir/src/debug_info.cpp b/src/mapleall/maple_ir/src/debug_info.cpp index 9f1de8696e..618e5fa8b1 100644 --- a/src/mapleall/maple_ir/src/debug_info.cpp +++ b/src/mapleall/maple_ir/src/debug_info.cpp @@ -298,10 +298,8 @@ void DebugInfo::InitBaseTypeMap() { void DebugInfo::SetupCU() { compUnit->SetWithChildren(true); /* Add the Producer (Compiler) Information */ - const char *producer = strdup((std::string("Maple Version ") + Version::GetVersionStr()).c_str()); + std::string producer = "Maple Version " + Version::GetVersionStr(); GStrIdx strIdx = GlobalTables::GetStrTable().GetOrCreateStrIdxFromName(producer); - delete producer; - producer = nullptr; compUnit->AddAttr(DW_AT_producer, DW_FORM_strp, strIdx.GetIdx()); /* Source Languate */ @@ -1333,7 +1331,7 @@ DBGDie *DebugInfo::GetOrCreateArrayTypeDie(const MIRArrayType *arrayType) { } typeDie = GetOrCreateTypeDie(TyIdx(PTY_u32)); bool keep = !arrayType->IsIncompleteArray(); - for (auto i = 0; i < dim; ++i) { + for (uint32 i = 0; i < dim; ++i) { DBGDie *rangeDie = module->GetMemPool()->New(module, DW_TAG_subrange_type); rangeDie->AddAttr(DW_AT_type, DW_FORM_ref4, typeDie->GetId(), keep); // The default lower bound value for C, C++, or Java is 0 @@ -1447,7 +1445,7 @@ void DebugInfo::CreateStructTypeFieldsDies(const MIRStructType *structType, DBGD die->AddSubVec(fieldDie); // update field type with alias info - MIRAlias *alias = structType->GetAlias(); + const MIRAlias *alias = structType->GetAlias(); if (!alias) { continue; } @@ -2000,11 +1998,11 @@ void DBGCompileMsgInfo::EmitMsg() { fprintf(stderr, "==================\n"); fprintf(stderr, "===================================================================\n"); fprintf(stderr, "line %4u %s\n", lineNum[(startLine + k2BitSize) % k3BitSize], - reinterpret_cast(codeLine[(startLine + k2BitSize) % k3BitSize])); + static_cast(codeLine[(startLine + k2BitSize) % k3BitSize])); fprintf(stderr, "line %4u %s\n", lineNum[(startLine + 1) % k3BitSize], - reinterpret_cast(codeLine[(startLine + 1) % k3BitSize])); + static_cast(codeLine[(startLine + 1) % k3BitSize])); fprintf(stderr, "line %4u %s\n", lineNum[(startLine) % k3BitSize], - reinterpret_cast(codeLine[(startLine) % k3BitSize])); + static_cast(codeLine[(startLine) % k3BitSize])); fprintf(stderr, "\x1B[1m" "\x1B[31m" " %s\n" "\x1B[0m", str); fprintf(stderr, "===================================================================\n"); } diff --git a/src/mapleall/maple_ir/src/global_tables.cpp b/src/mapleall/maple_ir/src/global_tables.cpp index 3e47a437f5..e15d9da0a5 100644 --- a/src/mapleall/maple_ir/src/global_tables.cpp +++ b/src/mapleall/maple_ir/src/global_tables.cpp @@ -70,27 +70,31 @@ void TypeTable::UpdateMIRType(const MIRType &pType, const TyIdx tyIdx) { SetTypeWithTyIdx(tyIdx, *nType); } -// used only by bin_mpl_import -void TypeTable::CreateMirTypeNodeAt(MIRType &pType, TyIdx tyIdxUsed, MIRModule *module, - bool isObject, bool isIncomplete) { - MIRType *nType = pType.CopyMIRTypeNode(); - nType->SetTypeIndex(tyIdxUsed); - typeTable[tyIdxUsed] = nType; - +void TypeTable::FillinTypeMapOrHashTable(MIRType &pType, MIRType &nType) { if (pType.IsMIRPtrType()) { auto &pty = static_cast(pType); if (pty.GetTypeAttrs() == TypeAttrs()) { if (pty.GetPrimType() != PTY_ref) { - ptrTypeMap[pty.GetPointedTyIdx()] = nType->GetTypeIndex(); + ptrTypeMap[pty.GetPointedTyIdx()] = nType.GetTypeIndex(); } else { - refTypeMap[pty.GetPointedTyIdx()] = nType->GetTypeIndex(); + refTypeMap[pty.GetPointedTyIdx()] = nType.GetTypeIndex(); } } else { - (void)typeHashTable.insert(nType); + (void)typeHashTable.insert(&nType); } } else { - (void)typeHashTable.insert(nType); + (void)typeHashTable.insert(&nType); } +} + +// used only by bin_mpl_import +void TypeTable::CreateMirTypeNodeAt(MIRType &pType, TyIdx tyIdxUsed, MIRModule *module, + bool isObject, bool isIncomplete) { + MIRType *nType = pType.CopyMIRTypeNode(); + nType->SetTypeIndex(tyIdxUsed); + typeTable[tyIdxUsed] = nType; + + FillinTypeMapOrHashTable(pType, *nType); GStrIdx stridx = pType.GetNameStrIdx(); if (stridx != 0) { @@ -110,20 +114,8 @@ MIRType *TypeTable::CreateAndUpdateMirTypeNode(MIRType &pType) { nType->SetTypeIndex(TyIdx(typeTable.size())); typeTable.push_back(nType); - if (pType.IsMIRPtrType()) { - auto &pty = static_cast(pType); - if (pty.GetTypeAttrs() == TypeAttrs()) { - if (pty.GetPrimType() != PTY_ref) { - ptrTypeMap[pty.GetPointedTyIdx()] = nType->GetTypeIndex(); - } else { - refTypeMap[pty.GetPointedTyIdx()] = nType->GetTypeIndex(); - } - } else { - (void)typeHashTable.insert(nType); - } - } else { - (void)typeHashTable.insert(nType); - } + FillinTypeMapOrHashTable(pType, *nType); + return nType; } @@ -183,8 +175,13 @@ const MIRType *TypeTable::GetPointedTypeIfApplicable(MIRType &type) const { auto &ptrType = static_cast(type); return GetTypeFromTyIdx(ptrType.GetPointedTyIdx()); } + MIRType *TypeTable::GetPointedTypeIfApplicable(MIRType &type) { - return const_cast(const_cast(this)->GetPointedTypeIfApplicable(type)); + if (type.GetKind() != kTypePointer) { + return &type; + } + auto &ptrType = static_cast(type); + return GetTypeFromTyIdx(ptrType.GetPointedTyIdx()); } MIRArrayType *TypeTable::GetOrCreateArrayType(const MIRType &elem, uint8 dim, const uint32 *sizeArray, diff --git a/src/mapleall/maple_ir/src/intrinsics.cpp b/src/mapleall/maple_ir/src/intrinsics.cpp index 65d9516595..3340906287 100644 --- a/src/mapleall/maple_ir/src/intrinsics.cpp +++ b/src/mapleall/maple_ir/src/intrinsics.cpp @@ -21,8 +21,7 @@ namespace maple { MIRType *IntrinDesc::jsValueType = nullptr; MIRModule *IntrinDesc::mirModule = nullptr; IntrinDesc IntrinDesc::intrinTable[INTRN_LAST + 1] = { -#define DEF_MIR_INTRINSIC(X, NAME, NUM_INSN, INTRN_CLASS, RETURN_TYPE, ...) \ - { (NAME), (NUM_INSN), (INTRN_CLASS), { (RETURN_TYPE), ##__VA_ARGS__ } }, +#define DEF_MIR_INTRINSIC(X, ...) { __VA_ARGS__ }, #include "intrinsics.def" #undef DEF_MIR_INTRINSIC }; @@ -176,59 +175,23 @@ MIRType *IntrinDesc::GetTypeFromArgTy(IntrinArgType argType) const { MIRType *IntrinDesc::GetArgType(uint32 index) const { // 0 is the arg of return type - CHECK_FATAL(index < kMaxArgsNum, "index out of range"); - return GetTypeFromArgTy(argTypes[index + 1]); + CHECK_FATAL(index < argInfo.size(), "index out of range"); + return GetTypeFromArgTy(argInfo[index].argType); } MIRType *IntrinDesc::GetReturnType() const { - return GetTypeFromArgTy(argTypes[0]); -} - -bool IntrinDesc::IsNthOpndMarkedToWrite(uint32 opndIdx) const { - CHECK_FATAL(opndIdx < 6, "intrinsic has <= 6 arguments."); - constexpr uint32 kIntrnWriteFlags[] = { - INTRNWRITEFIRSTOPND, INTRNWRITESECONDOPND, INTRNWRITETHIRDOPND, - INTRNWRITEFOURTHOPND, INTRNWRITEFIFTHOPND, INTRNWRITESIXTHOPND - }; - return (properties & kIntrnWriteFlags[opndIdx]) != 0; -} - -bool IntrinDesc::IsNthOpndMarkedToRead(uint32 opndIdx) const { - CHECK_FATAL(opndIdx < 6, "intrinsic has <= 6 arguments."); - constexpr uint32 kIntrnReadFlags[] = { - INTRNREADFIRSTOPND, INTRNREADSECONDOPND, INTRNREADTHIRDOPND, - INTRNREADFOURTHOPND, INTRNREADFIFTHOPND, INTRNREADSIXTHOPND - }; - return (properties & kIntrnReadFlags[opndIdx]) != 0; + return GetTypeFromArgTy(returnInfo.returnType); } bool IntrinDesc::WriteNthOpnd(uint32 opndIdx) const { - // when to write the argument: - // 1. has side effect, and - // 2. marked with WRITE or marked with nothing - if (HasNoSideEffect()) { - return false; // read only - } - if (IsNthOpndMarkedToWrite(opndIdx)) { - return true; - } - // marked with nothing --> by default: write the argument - return !IsNthOpndMarkedToRead(opndIdx); + return argInfo[opndIdx].GetMemEffectAttr(MemEffect::kStoreMemory); } bool IntrinDesc::ReadNthOpnd(uint32 opndIdx) const { - // when to read the argument: - // 1. has no side effect, or - // 2. has side effect but marked with READ, or - // 3. has side effect but marked with nothing - if (HasNoSideEffect()) { - return true; - } - if (IsNthOpndMarkedToRead(opndIdx)) { - return true; - } - // marked with nothing --> by default: read the argument - return !IsNthOpndMarkedToWrite(opndIdx); + return argInfo[opndIdx].GetMemEffectAttr(MemEffect::kLoadMemory); } +bool IntrinDesc::ReturnNthOpnd(uint32 opndIdx) const { + return argInfo[opndIdx].GetMemEffectAttr(MemEffect::kReturned); +} } // namespace maple diff --git a/src/mapleall/maple_ir/src/lexer.cpp b/src/mapleall/maple_ir/src/lexer.cpp index 4e2a2daa4e..201f5d577e 100644 --- a/src/mapleall/maple_ir/src/lexer.cpp +++ b/src/mapleall/maple_ir/src/lexer.cpp @@ -517,9 +517,11 @@ TokenKind MIRLexer::GetTokenWithPrefixDoubleQuotation() { const uint32 octLength = 3; ASSERT(curIdx + octLength < line.size(), "index out of range"); uint32 cNew = - static_cast(static_cast(GetCharAtWithLowerCheck(curIdx + 1) - '0') << octShift2) + - static_cast(static_cast(GetCharAtWithLowerCheck(curIdx + 2) - '0') << octShift1) + - static_cast(GetCharAtWithLowerCheck(curIdx + 3) - '0'); + (static_cast(static_cast(GetCharAtWithLowerCheck(curIdx + 1)) - static_cast('0')) << + octShift2) + + (static_cast(static_cast(GetCharAtWithLowerCheck(curIdx + 2)) - static_cast('0')) << + octShift1) + + static_cast(static_cast(GetCharAtWithLowerCheck(curIdx + 3)) - static_cast('0')); line[curIdx - shift] = cNew; curIdx += octLength; shift += octLength; diff --git a/src/mapleall/maple_ir/src/mir_builder.cpp b/src/mapleall/maple_ir/src/mir_builder.cpp index 4941443760..3b3b809764 100644 --- a/src/mapleall/maple_ir/src/mir_builder.cpp +++ b/src/mapleall/maple_ir/src/mir_builder.cpp @@ -206,7 +206,7 @@ void MIRBuilder::SetStructFieldIDFromFieldName(MIRStructType &structType, const } // create a function named str -MIRFunction *MIRBuilder::GetOrCreateFunction(const std::string &str, TyIdx retTyIdx) { +MIRFunction *MIRBuilder::GetOrCreateFunction(const std::string &str, const TyIdx &retTyIdx, bool *isNewCreated) { GStrIdx strIdx = GetStringIndex(str); MIRSymbol *funcSt = nullptr; if (strIdx != 0u) { @@ -221,6 +221,9 @@ MIRFunction *MIRBuilder::GetOrCreateFunction(const std::string &str, TyIdx retTy strIdx = GetOrCreateStringIndex(str); funcSt = CreateSymbol(TyIdx(0), strIdx, kStFunc, kScText, nullptr, kScopeGlobal); } + if (isNewCreated != nullptr) { + *isNewCreated = true; + } auto *fn = mirModule->GetMemPool()->New(mirModule, funcSt->GetStIdx()); fn->SetPuidx(GlobalTables::GetFunctionTable().GetFuncTable().size()); MIRFuncType funcType; @@ -885,7 +888,7 @@ IcallNode *MIRBuilder::CreateStmtIcallprotoAssigned(const MapleVector ret.GetStorageClass() == kScExtern || ret.GetStorageClass() == kScGlobal), "unknown classtype! check it!"); nrets.emplace_back(CallReturnPair(ret.GetStIdx(), RegFieldPair(0, 0))); - stmt->SetNumOpnds(args.size()); + stmt->SetNumOpnds(static_cast(args.size())); stmt->GetNopnd().resize(stmt->GetNumOpnds()); stmt->SetReturnVec(nrets); for (size_t i = 0; i < stmt->GetNopndSize(); ++i) { diff --git a/src/mapleall/maple_ir/src/mir_function.cpp b/src/mapleall/maple_ir/src/mir_function.cpp index 927731cb0d..9ace18487b 100644 --- a/src/mapleall/maple_ir/src/mir_function.cpp +++ b/src/mapleall/maple_ir/src/mir_function.cpp @@ -21,6 +21,7 @@ #include "ipa_side_effect.h" #include "inline_summary.h" #include "driver_options.h" +#include "mem_reference_table.h" namespace { using namespace maple; @@ -43,9 +44,7 @@ const MIRSymbol *MIRFunction::GetFuncSymbol() const { return GlobalTables::GetGsymTable().GetSymbolFromStidx(symbolTableIdx.Idx()); } MIRSymbol *MIRFunction::GetFuncSymbol() { - const MIRFunction *mirFunc = const_cast(this); - ASSERT(mirFunc != nullptr, "null ptr check"); - return const_cast(mirFunc->GetFuncSymbol()); + return GlobalTables::GetGsymTable().GetSymbolFromStidx(symbolTableIdx.Idx()); } const std::string &MIRFunction::GetName() const { @@ -85,7 +84,7 @@ const MIRType *MIRFunction::GetReturnType() const { return GlobalTables::GetTypeTable().GetTypeFromTyIdx(funcType->GetRetTyIdx()); } MIRType *MIRFunction::GetReturnType() { - return const_cast(const_cast(this)->GetReturnType()); + return GlobalTables::GetTypeTable().GetTypeFromTyIdx(funcType->GetRetTyIdx()); } const MIRType *MIRFunction::GetClassType() const { return GlobalTables::GetTypeTable().GetTypeFromTyIdx(classTyIdx); @@ -96,7 +95,7 @@ const MIRType *MIRFunction::GetNthParamType(size_t i) const { return GlobalTables::GetTypeTable().GetTypeFromTyIdx(funcType->GetParamTypeList()[i]); } MIRType *MIRFunction::GetNthParamType(size_t i) { - return const_cast(const_cast(this)->GetNthParamType(i)); + return GlobalTables::GetTypeTable().GetTypeFromTyIdx(funcType->GetParamTypeList()[i]); } // reconstruct formals, and return a new MIRFuncType @@ -382,9 +381,9 @@ void MIRFunction::Dump(bool withoutBody) { StmtNode::lastPrintedLineNum = 0; StmtNode::lastPrintedColumnNum = 0; ResetInfoPrinted(); // this ensures funcinfo will be printed - GetBody()->Dump(0, module->GetFlavor() == kMmpl ? nullptr : GetSymTab(), - module->GetFlavor() < kMmpl ? GetPregTab() : nullptr, false, - true, module->GetFlavor()); // Dump body + GetBody()->DoDump(0, module->GetFlavor() == kMmpl ? nullptr : GetSymTab(), + module->GetFlavor() < kMmpl ? GetPregTab() : nullptr, false, + true, module->GetFlavor()); // Dump body } else { LogInfo::MapleLogger() << '\n'; } @@ -595,11 +594,12 @@ void MIRFunction::SetBaseClassFuncNames(GStrIdx strIdx) { } const MIRSymbol *MIRFunction::GetLocalOrGlobalSymbol(const StIdx &idx, bool checkFirst) const { - return idx.Islocal() ? GetSymbolTabItem(idx.Idx(), checkFirst) - : GlobalTables::GetGsymTable().GetSymbolFromStidx(idx.Idx(), checkFirst); + return idx.Islocal() ? + GetSymbolTabItem(idx.Idx(), checkFirst) : GlobalTables::GetGsymTable().GetSymbolFromStidx(idx.Idx(), checkFirst); } MIRSymbol *MIRFunction::GetLocalOrGlobalSymbol(const StIdx &idx, bool checkFirst) { - return const_cast(const_cast(this)->GetLocalOrGlobalSymbol(idx, checkFirst)); + return idx.Islocal() ? + GetSymbolTabItem(idx.Idx(), checkFirst) : GlobalTables::GetGsymTable().GetSymbolFromStidx(idx.Idx(), checkFirst); } const MIRType *MIRFunction::GetNodeType(const BaseNode &node) const { @@ -690,6 +690,19 @@ InlineSummary *MIRFunction::GetOrCreateInlineSummary() { return GetInlineSummary(); } +void MIRFunction::CreateMemReferenceTable() { + auto &memReferenceTableAllocator = module->GetMemReferenceTableAllocator(); + CHECK_FATAL(memReferenceTableAllocator.GetMemPool() != nullptr, "memReferenceTableAllocator has been released?"); + memReferenceTable = memReferenceTableAllocator.New(memReferenceTableAllocator, *this); +} + +MemReferenceTable *MIRFunction::GetOrCreateMemReferenceTable() { + if (memReferenceTable == nullptr) { + CreateMemReferenceTable(); + } + return GetMemReferenceTable(); +} + void MIRFunction::NewBody() { SetBody(GetCodeMemPool()->New()); // If mir_function.has been seen as a declaration, its symtab has to be moved diff --git a/src/mapleall/maple_ir/src/mir_module.cpp b/src/mapleall/maple_ir/src/mir_module.cpp index d734c8aeb3..4336e4828f 100644 --- a/src/mapleall/maple_ir/src/mir_module.cpp +++ b/src/mapleall/maple_ir/src/mir_module.cpp @@ -29,6 +29,7 @@ MIRModule::MIRModule(const std::string &fn) memPoolAllocator(memPool), pragmaMemPoolAllocator(pragmaMemPool), inlineSummaryAlloc(memPoolCtrler.NewMemPool("inline summary mempool", false)), + memReferenceTableAllocator(memPoolCtrler.NewMemPool("mem table mempool", false)), functionList(memPoolAllocator.Adapter()), importedMplt(memPoolAllocator.Adapter()), typeDefOrder(memPoolAllocator.Adapter()), @@ -73,6 +74,7 @@ MIRModule::~MIRModule() { // inlineSummaryAlloc is supposed to be released just after inlining. // The following code is to ensure unexpected memory leak. ReleaseInlineSummaryAlloc(); + ReleaseMemReferenceAllocator(); } MemPool *MIRModule::CurFuncCodeMemPool() const { @@ -116,6 +118,19 @@ void MIRModule::AddSymbol(const MIRSymbol *s) { AddSymbol(s->GetStIdx()); } +void PrintTypedefInfo(const GStrIdx &idx, const MIRType &type) { + const std::string &name = GlobalTables::GetStrTable().GetStringFromStrIdx(idx); + LogInfo::MapleLogger() << "type $" << name << " "; + if (type.GetKind() == kTypeByName) { + LogInfo::MapleLogger() << "void"; + } else if (type.GetNameStrIdx() == idx) { + type.Dump(1, true); + } else { + type.Dump(1); + } + LogInfo::MapleLogger() << '\n'; +} + void MIRModule::DumpGlobals(bool emitStructureType) const { if (flavor != kFlavorUnknown) { LogInfo::MapleLogger() << "flavor " << flavor << '\n'; @@ -239,7 +254,6 @@ void MIRModule::DumpGlobals(bool emitStructureType) const { if (flavor < kMmpl || flavor >= kFlavorLmbc) { for (auto it = typeDefOrder.begin(); it != typeDefOrder.end(); ++it) { TyIdx tyIdx = typeNameTab->GetTyIdxFromGStrIdx(*it); - const std::string &name = GlobalTables::GetStrTable().GetStringFromStrIdx(*it); MIRType *type = GlobalTables::GetTypeTable().GetTypeFromTyIdx(tyIdx); ASSERT(type != nullptr, "type should not be nullptr here"); bool isStructType = type->IsStructType(); @@ -254,15 +268,7 @@ void MIRModule::DumpGlobals(bool emitStructureType) const { } } - LogInfo::MapleLogger() << "type $" << name << " "; - if (type->GetKind() == kTypeByName) { - LogInfo::MapleLogger() << "void"; - } else if (type->GetNameStrIdx() == *it) { - type->Dump(1, true); - } else { - type->Dump(1); - } - LogInfo::MapleLogger() << '\n'; + PrintTypedefInfo(*it, *type); } if (someSymbolNeedForwDecl) { // an extra pass thru the global symbol table to print forward decl @@ -400,7 +406,6 @@ void MIRModule::DumpToFile(const std::string &fileNameStr, bool emitStructureTyp void MIRModule::DumpDefType() { for (auto it = typeDefOrder.begin(); it != typeDefOrder.end(); ++it) { TyIdx tyIdx = typeNameTab->GetTyIdxFromGStrIdx(*it); - const std::string &name = GlobalTables::GetStrTable().GetStringFromStrIdx(*it); MIRType *type = GlobalTables::GetTypeTable().GetTypeFromTyIdx(tyIdx); ASSERT(type != nullptr, "type should not be nullptr here"); bool isStructType = type->IsStructType(); @@ -410,15 +415,7 @@ void MIRModule::DumpDefType() { continue; } } - LogInfo::MapleLogger() << "type $" << name << " "; - if (type->GetKind() == kTypeByName) { - LogInfo::MapleLogger() << "void"; - } else if (type->GetNameStrIdx() == *it) { - type->Dump(1, true); - } else { - type->Dump(1); - } - LogInfo::MapleLogger() << '\n'; + PrintTypedefInfo(*it, *type); } } diff --git a/src/mapleall/maple_ir/src/mir_nodes.cpp b/src/mapleall/maple_ir/src/mir_nodes.cpp index f59114c2ac..8c73dbbeee 100644 --- a/src/mapleall/maple_ir/src/mir_nodes.cpp +++ b/src/mapleall/maple_ir/src/mir_nodes.cpp @@ -44,8 +44,8 @@ const char *GetIntrinsicName(MIRIntrinsicID intrn) { } } -const char *BaseNode::GetOpName() const { - return kOpcodeInfo.GetTableItemAt(GetOpCode()).name.c_str(); +const std::string &BaseNode::GetOpName() const { + return kOpcodeInfo.GetTableItemAt(GetOpCode()).name; } bool BaseNode::MayThrowException() const { @@ -583,7 +583,10 @@ const BaseNode *ArrayNode::GetDim(const MIRModule &mod, TypeTable &tt, int i) co return mod.CurFuncCodeMemPool()->New(mirConst); } BaseNode *ArrayNode::GetDim(const MIRModule &mod, TypeTable &tt, int i) { - return const_cast(const_cast(this)->GetDim(mod, tt, i)); + auto *arrayType = static_cast(GetArrayType(tt)); + auto *mirConst = GlobalTables::GetIntConstTable().GetOrCreateIntConst( + static_cast(i), *tt.GetTypeFromTyIdx(arrayType->GetElemTyIdx())); + return mod.CurFuncCodeMemPool()->New(mirConst); } void ArrayNode::Dump(int32 indent) const { @@ -1206,11 +1209,10 @@ MIRType *CallNode::GetCallReturnType() { return mirFunc->GetReturnType(); } -const MIRSymbol *CallNode::GetCallReturnSymbol(const MIRModule &mod) const { - if (!kOpcodeInfo.IsCallAssigned(GetOpCode())) { +const MIRSymbol *GetCallOrIcallNodeReturnSymbol(Opcode op, const CallReturnVector &nRets, const MIRModule &mod) { + if (!kOpcodeInfo.IsCallAssigned(op)) { return nullptr; } - const CallReturnVector &nRets = this->GetReturnVec(); if (nRets.size() == 1) { StIdx stIdx = nRets.begin()->first; RegFieldPair regFieldPair = nRets.begin()->second; @@ -1223,6 +1225,10 @@ const MIRSymbol *CallNode::GetCallReturnSymbol(const MIRModule &mod) const { return nullptr; } +const MIRSymbol *CallNode::GetCallReturnSymbol(const MIRModule &mod) const { + return GetCallOrIcallNodeReturnSymbol(op, this->GetReturnVec(), mod); +} + void CallNode::Dump(int32 indent, bool newline) const { StmtNode::DumpBase(indent); if (tyIdx != 0u) { @@ -1257,20 +1263,7 @@ MIRType *IcallNode::GetCallReturnType() { } const MIRSymbol *IcallNode::GetCallReturnSymbol(const MIRModule &mod) const { - if (!kOpcodeInfo.IsCallAssigned(GetOpCode())) { - return nullptr; - } - const CallReturnVector &nRets = this->GetReturnVec(); - if (nRets.size() == 1) { - StIdx stIdx = nRets.begin()->first; - RegFieldPair regFieldPair = nRets.begin()->second; - if (!regFieldPair.IsReg()) { - const MIRFunction *mirFunc = mod.CurFunction(); - const MIRSymbol *st = mirFunc->GetLocalOrGlobalSymbol(stIdx); - return st; - } - } - return nullptr; + return GetCallOrIcallNodeReturnSymbol(op, this->GetReturnVec(), mod); } void IcallNode::Dump(int32 indent, bool newline) const { @@ -1330,8 +1323,8 @@ void CallinstantNode::Dump(int32 indent, bool newline) const { } } -void BlockNode::Dump(int32 indent, const MIRSymbolTable *theSymTab, MIRPregTable *thePregTab, bool withInfo, - bool isFuncbody, MIRFlavor flavor) const { +void BlockNode::DoDump(int32 indent, const MIRSymbolTable *theSymTab, MIRPregTable *thePregTab, bool withInfo, + bool isFuncbody, MIRFlavor flavor) const { if (!withInfo) { LogInfo::MapleLogger() << " {\n"; } diff --git a/src/mapleall/maple_ir/src/mir_parser.cpp b/src/mapleall/maple_ir/src/mir_parser.cpp index 18d01ae685..7f78fe1c8a 100644 --- a/src/mapleall/maple_ir/src/mir_parser.cpp +++ b/src/mapleall/maple_ir/src/mir_parser.cpp @@ -12,9 +12,9 @@ * FIT FOR A PARTICULAR PURPOSE. * See the Mulan PSL v2 for more details. */ -#include "mir_parser.h" #include "mir_function.h" #include "opcode_info.h" +#include "mir_parser.h" namespace maple { std::map MIRParser::funcPtrMapForParseExpr = @@ -24,14 +24,9 @@ std::map MIRParser::funcPtrMapForParseSt std::map MIRParser::funcPtrMapForParseStmtBlock = MIRParser::InitFuncPtrMapForParseStmtBlock(); -bool MIRParser::ParseStmtDassign(StmtNodePtr &stmt) { - if (lexer.GetTokenKind() != TK_dassign) { - Error("expect dassign but get "); - return false; - } +bool MIRParser::GetStIdxForStmtDassignOrDassignoffNode(StIdx &stidx) { // parse %i lexer.NextToken(); - StIdx stidx; if (!ParseDeclaredSt(stidx)) { return false; } @@ -44,7 +39,31 @@ bool MIRParser::ParseStmtDassign(StmtNodePtr &stmt) { ASSERT(sym != nullptr, "null ptr check"); sym->SetHasPotentialAssignment(); } + return true; +} + +bool MIRParser::SetRHSExprForStmtDassignOrDassignoffNode(UnaryStmtNode &assignStmt) { + // parse expression like (constval i32 0) + BaseNode *expr = nullptr; + if (!ParseExprOneOperand(expr)) { + return false; + } + assignStmt.SetRHS(expr); + lexer.NextToken(); + return true; +} + +bool MIRParser::ParseStmtDassign(StmtNodePtr &stmt) { + if (lexer.GetTokenKind() != TK_dassign) { + Error("expect dassign but get "); + return false; + } + StIdx stidx; + if (!GetStIdxForStmtDassignOrDassignoffNode(stidx)) { + return false; + } auto *assignStmt = mod.CurFuncCodeMemPool()->New(); + stmt = assignStmt; assignStmt->SetStIdx(stidx); TokenKind nextToken = lexer.NextToken(); // parse field id @@ -52,15 +71,7 @@ bool MIRParser::ParseStmtDassign(StmtNodePtr &stmt) { assignStmt->SetFieldID(lexer.GetTheIntVal()); (void)lexer.NextToken(); } - // parse expression like (constval i32 0) - BaseNode *expr = nullptr; - if (!ParseExprOneOperand(expr)) { - return false; - } - assignStmt->SetRHS(expr); - stmt = assignStmt; - lexer.NextToken(); - return true; + return SetRHSExprForStmtDassignOrDassignoffNode(*assignStmt); } bool MIRParser::ParseStmtDassignoff(StmtNodePtr &stmt) { @@ -73,22 +84,12 @@ bool MIRParser::ParseStmtDassignoff(StmtNodePtr &stmt) { return false; } PrimType primType = GetPrimitiveType(lexer.GetTokenKind()); - // parse %i - lexer.NextToken(); StIdx stidx; - if (!ParseDeclaredSt(stidx)) { + if (!GetStIdxForStmtDassignOrDassignoffNode(stidx)) { return false; } - if (stidx.FullIdx() == 0) { - Error("expect a symbol parsing ParseStmtDassign"); - return false; - } - if (stidx.IsGlobal()) { - MIRSymbol *sym = GlobalTables::GetGsymTable().GetSymbolFromStidx(stidx.Idx()); - ASSERT(sym != nullptr, "null ptr check"); - sym->SetHasPotentialAssignment(); - } DassignoffNode *assignStmt = mod.CurFuncCodeMemPool()->New(); + stmt = assignStmt; assignStmt->SetPrimType(primType); assignStmt->stIdx = stidx; TokenKind nextToken = lexer.NextToken(); @@ -100,15 +101,7 @@ bool MIRParser::ParseStmtDassignoff(StmtNodePtr &stmt) { Error("expect integer offset but get "); return false; } - // parse expression like (constval i32 0) - BaseNode *expr = nullptr; - if (!ParseExprOneOperand(expr)) { - return false; - } - assignStmt->SetRHS(expr); - stmt = assignStmt; - lexer.NextToken(); - return true; + return SetRHSExprForStmtDassignOrDassignoffNode(*assignStmt); } bool MIRParser::ParseStmtRegassign(StmtNodePtr &stmt) { @@ -517,7 +510,20 @@ bool MIRParser::ParseStmtLabel(StmtNodePtr &stmt) { return true; } +LabelIdx MIRParser::GetLabIdxForGotoOrBrNode() { + GStrIdx strIdx = GlobalTables::GetStrTable().GetOrCreateStrIdxFromName(lexer.GetName()); + LabelIdx labIdx = mod.CurFunction()->GetLabelTab()->GetLabelIdxFromStrIdx(strIdx); + if (labIdx == 0) { + labIdx = mod.CurFunction()->GetLabelTab()->CreateLabel(); + mod.CurFunction()->GetLabelTab()->SetSymbolFromStIdx(labIdx, strIdx); + mod.CurFunction()->GetLabelTab()->AddToStringLabelMap(labIdx); + } + return labIdx; +} + bool MIRParser::ParseStmtGoto(StmtNodePtr &stmt) { + auto *gotoNode = mod.CurFuncCodeMemPool()->New(OP_goto); + stmt = gotoNode; if (lexer.GetTokenKind() != TK_goto) { Error("expect goto but get "); return false; @@ -526,16 +532,8 @@ bool MIRParser::ParseStmtGoto(StmtNodePtr &stmt) { Error("expect label in goto but get "); return false; } - GStrIdx strIdx = GlobalTables::GetStrTable().GetOrCreateStrIdxFromName(lexer.GetName()); - LabelIdx labIdx = mod.CurFunction()->GetLabelTab()->GetLabelIdxFromStrIdx(strIdx); - if (labIdx == 0) { - labIdx = mod.CurFunction()->GetLabelTab()->CreateLabel(); - mod.CurFunction()->GetLabelTab()->SetSymbolFromStIdx(labIdx, strIdx); - mod.CurFunction()->GetLabelTab()->AddToStringLabelMap(labIdx); - } - auto *gotoNode = mod.CurFuncCodeMemPool()->New(OP_goto); + LabelIdx labIdx = GetLabIdxForGotoOrBrNode(); gotoNode->SetOffset(labIdx); - stmt = gotoNode; lexer.NextToken(); return true; } @@ -547,17 +545,12 @@ bool MIRParser::ParseStmtBr(StmtNodePtr &stmt) { return false; } if (lexer.NextToken() != TK_label) { - Error("expect label in goto but get "); + Error("expect label in brtrue/brfalse but get "); return false; } - GStrIdx strIdx = GlobalTables::GetStrTable().GetOrCreateStrIdxFromName(lexer.GetName()); - LabelIdx labIdx = mod.CurFunction()->GetLabelTab()->GetLabelIdxFromStrIdx(strIdx); - if (labIdx == 0) { - labIdx = mod.CurFunction()->GetLabelTab()->CreateLabel(); - mod.CurFunction()->GetLabelTab()->SetSymbolFromStIdx(labIdx, strIdx); - mod.CurFunction()->GetLabelTab()->AddToStringLabelMap(labIdx); - } + LabelIdx labIdx = GetLabIdxForGotoOrBrNode(); auto *condGoto = mod.CurFuncCodeMemPool()->New(tk == TK_brtrue ? OP_brtrue : OP_brfalse); + stmt = condGoto; condGoto->SetOffset(labIdx); lexer.NextToken(); // parse () @@ -566,7 +559,6 @@ bool MIRParser::ParseStmtBr(StmtNodePtr &stmt) { return false; } condGoto->SetOpnd(expr, 0); - stmt = condGoto; lexer.NextToken(); return true; } @@ -986,24 +978,14 @@ bool MIRParser::ParseStmtIcallprotoassigned(StmtNodePtr &stmt) { return ParseStmtIcall(stmt, OP_icallprotoassigned); } -bool MIRParser::ParseStmtIntrinsiccall(StmtNodePtr &stmt, bool isAssigned) { - Opcode o = !isAssigned ? (lexer.GetTokenKind() == TK_intrinsiccall ? OP_intrinsiccall : OP_xintrinsiccall) - : (lexer.GetTokenKind() == TK_intrinsiccallassigned ? OP_intrinsiccallassigned - : OP_xintrinsiccallassigned); - auto *intrnCallNode = mod.CurFuncCodeMemPool()->New(mod, o); - lexer.NextToken(); - if (o == ((!isAssigned) ? OP_intrinsiccall : OP_intrinsiccallassigned)) { - intrnCallNode->SetIntrinsic(GetIntrinsicID(lexer.GetTokenKind())); - } else { - intrnCallNode->SetIntrinsic(static_cast(lexer.GetTheIntVal())); - } +bool MIRParser::SetDataForIntrinsiccallNode(IntrinsiccallNode &intrnCallNode, bool isAssigned) { lexer.NextToken(); MapleVector opndsVec(mod.CurFuncCodeMemPoolAllocator()->Adapter()); if (!ParseExprNaryOperand(opndsVec)) { return false; } - intrnCallNode->SetNOpnd(opndsVec); - intrnCallNode->SetNumOpnds(opndsVec.size()); + intrnCallNode.SetNOpnd(opndsVec); + intrnCallNode.SetNumOpnds(opndsVec.size()); if (isAssigned) { CallReturnVector retsVec(mod.CurFuncCodeMemPoolAllocator()->Adapter()); if (!ParseCallReturns(retsVec)) { @@ -1013,16 +995,30 @@ bool MIRParser::ParseStmtIntrinsiccall(StmtNodePtr &stmt, bool isAssigned) { if (retsVec.size() == 1 && retsVec[0].first.Idx() != 0) { MIRSymbol *retSymbol = curFunc->GetSymTab()->GetSymbolFromStIdx(retsVec[0].first.Idx()); MIRType *retType = GlobalTables::GetTypeTable().GetTypeFromTyIdx(retSymbol->GetTyIdx()); - CHECK_FATAL(retType != nullptr, "rettype is null in MIRParser::ParseStmtIntrinsiccallAssigned"); - intrnCallNode->SetPrimType(retType->GetPrimType()); + CHECK_FATAL(retType != nullptr, "rettype is null in MIRParser::ParseStmtIntrinsiccallwithtypeAssigned"); + intrnCallNode.SetPrimType(retType->GetPrimType()); } - intrnCallNode->SetReturnVec(retsVec); + intrnCallNode.SetReturnVec(retsVec); } - stmt = intrnCallNode; lexer.NextToken(); return true; } +bool MIRParser::ParseStmtIntrinsiccall(StmtNodePtr &stmt, bool isAssigned) { + Opcode o = !isAssigned ? (lexer.GetTokenKind() == TK_intrinsiccall ? OP_intrinsiccall : OP_xintrinsiccall) + : (lexer.GetTokenKind() == TK_intrinsiccallassigned ? OP_intrinsiccallassigned + : OP_xintrinsiccallassigned); + auto *intrnCallNode = mod.CurFuncCodeMemPool()->New(mod, o); + stmt = intrnCallNode; + lexer.NextToken(); + if (o == ((!isAssigned) ? OP_intrinsiccall : OP_intrinsiccallassigned)) { + intrnCallNode->SetIntrinsic(GetIntrinsicID(lexer.GetTokenKind())); + } else { + intrnCallNode->SetIntrinsic(static_cast(lexer.GetTheIntVal())); + } + return SetDataForIntrinsiccallNode(*intrnCallNode, isAssigned); +} + bool MIRParser::ParseStmtIntrinsiccall(StmtNodePtr &stmt) { return ParseStmtIntrinsiccall(stmt, false); } @@ -1034,6 +1030,7 @@ bool MIRParser::ParseStmtIntrinsiccallassigned(StmtNodePtr &stmt) { bool MIRParser::ParseStmtIntrinsiccallwithtype(StmtNodePtr &stmt, bool isAssigned) { Opcode o = (!isAssigned) ? OP_intrinsiccallwithtype : OP_intrinsiccallwithtypeassigned; IntrinsiccallNode *intrnCallNode = mod.CurFuncCodeMemPool()->New(mod, o); + stmt = intrnCallNode; TokenKind tk = lexer.NextToken(); TyIdx tyIdx(0); if (IsPrimitiveType(tk)) { @@ -1047,30 +1044,7 @@ bool MIRParser::ParseStmtIntrinsiccallwithtype(StmtNodePtr &stmt, bool isAssigne } intrnCallNode->SetTyIdx(tyIdx); intrnCallNode->SetIntrinsic(GetIntrinsicID(lexer.GetTokenKind())); - lexer.NextToken(); - MapleVector opndsVec(mod.CurFuncCodeMemPoolAllocator()->Adapter()); - if (!ParseExprNaryOperand(opndsVec)) { - return false; - } - intrnCallNode->SetNOpnd(opndsVec); - intrnCallNode->SetNumOpnds(opndsVec.size()); - if (isAssigned) { - CallReturnVector retsVec(mod.CurFuncCodeMemPoolAllocator()->Adapter()); - if (!ParseCallReturns(retsVec)) { - return false; - } - // store return type of IntrinsiccallNode - if (retsVec.size() == 1 && retsVec[0].first.Idx() != 0) { - MIRSymbol *retSymbol = curFunc->GetSymTab()->GetSymbolFromStIdx(retsVec[0].first.Idx()); - MIRType *retType = GlobalTables::GetTypeTable().GetTypeFromTyIdx(retSymbol->GetTyIdx()); - CHECK_FATAL(retType != nullptr, "rettype is null in MIRParser::ParseStmtIntrinsiccallwithtypeAssigned"); - intrnCallNode->SetPrimType(retType->GetPrimType()); - } - intrnCallNode->SetReturnVec(retsVec); - } - stmt = intrnCallNode; - lexer.NextToken(); - return true; + return SetDataForIntrinsiccallNode(*intrnCallNode, isAssigned); } bool MIRParser::ParseStmtIntrinsiccallwithtype(StmtNodePtr &stmt) { @@ -1354,6 +1328,19 @@ bool MIRParser::ParseStmtSafeRegion(StmtNodePtr &stmt) { return true; } +bool MIRParser::AddLabelForTryOrJsTryNode(LabelIdx &labidx, const GStrIdx &stridx) { + if (lexer.GetTokenKind() != TK_label) { + Error("expect handler label in try but get "); + return false; + } + if (labidx == 0) { + labidx = mod.CurFunction()->GetLabelTab()->CreateLabel(); + mod.CurFunction()->GetLabelTab()->SetSymbolFromStIdx(labidx, stridx); + mod.CurFunction()->GetLabelTab()->AddToStringLabelMap(labidx); + } + return true; +} + bool MIRParser::ParseStmtJsTry(StmtNodePtr &stmt) { auto *tryNode = mod.CurFuncCodeMemPool()->New(); lexer.NextToken(); @@ -1361,16 +1348,10 @@ bool MIRParser::ParseStmtJsTry(StmtNodePtr &stmt) { if (lexer.GetTokenKind() == TK_intconst && lexer.GetTheIntVal() == 0) { tryNode->SetCatchOffset(0); } else { - if (lexer.GetTokenKind() != TK_label) { - Error("expect handler label in try but get "); - return false; - } GStrIdx stridx = GlobalTables::GetStrTable().GetOrCreateStrIdxFromName(lexer.GetName()); LabelIdx labidx = mod.CurFunction()->GetLabelTab()->GetLabelIdxFromStrIdx(stridx); - if (labidx == 0) { - labidx = mod.CurFunction()->GetLabelTab()->CreateLabel(); - mod.CurFunction()->GetLabelTab()->SetSymbolFromStIdx(labidx, stridx); - mod.CurFunction()->GetLabelTab()->AddToStringLabelMap(labidx); + if (!AddLabelForTryOrJsTryNode(labidx, stridx)) { + return false; } tryNode->SetCatchOffset(labidx); } @@ -1379,16 +1360,10 @@ bool MIRParser::ParseStmtJsTry(StmtNodePtr &stmt) { if (lexer.GetTokenKind() == TK_intconst && lexer.GetTheIntVal() == 0) { tryNode->SetFinallyOffset(0); } else { - if (lexer.GetTokenKind() != TK_label) { - Error("expect finally label in try but get "); - return false; - } GStrIdx stridx = GlobalTables::GetStrTable().GetOrCreateStrIdxFromName(lexer.GetName()); LabelIdx labidx = mod.CurFunction()->GetLabelTab()->GetLabelIdxFromStrIdx(stridx); - if (labidx == 0) { - labidx = mod.CurFunction()->GetLabelTab()->CreateLabel(); - mod.CurFunction()->GetLabelTab()->SetSymbolFromStIdx(labidx, stridx); - mod.CurFunction()->GetLabelTab()->AddToStringLabelMap(labidx); + if (!AddLabelForTryOrJsTryNode(labidx, stridx)) { + return false; } tryNode->SetFinallyOffset(labidx); } @@ -1404,16 +1379,10 @@ bool MIRParser::ParseStmtTry(StmtNodePtr &stmt) { lexer.NextToken(); // parse handler label while (lexer.GetTokenKind() != TK_rbrace) { - if (lexer.GetTokenKind() != TK_label) { - Error("expect handler label in try but get "); - return false; - } GStrIdx stridx = GlobalTables::GetStrTable().GetOrCreateStrIdxFromName(lexer.GetName()); LabelIdx labidx = mod.CurFunction()->GetLabelTab()->GetLabelIdxFromStrIdx(stridx); - if (labidx == 0) { - labidx = mod.CurFunction()->GetLabelTab()->CreateLabel(); - mod.CurFunction()->GetLabelTab()->SetSymbolFromStIdx(labidx, stridx); - mod.CurFunction()->GetLabelTab()->AddToStringLabelMap(labidx); + if (!AddLabelForTryOrJsTryNode(labidx, stridx)) { + return false; } tryNode->AddOffset(labidx); lexer.NextToken(); @@ -1815,12 +1784,12 @@ bool MIRParser::ParseLoc() { Error("expect intconst in LOC but get "); return false; } - lastFileNum = lexer.GetTheIntVal(); + lastFileNum = static_cast(lexer.GetTheIntVal()); if (lexer.NextToken() != TK_intconst) { Error("expect intconst in LOC but get "); return false; } - lastLineNum = lexer.GetTheIntVal(); + lastLineNum = static_cast(lexer.GetTheIntVal()); if (firstLineNum == 0) { firstLineNum = lastLineNum; } @@ -2303,13 +2272,7 @@ bool MIRParser::ParseDeclaredFunc(PUIdx &puidx) { return true; } -bool MIRParser::ParseExprDread(BaseNodePtr &expr) { - if (lexer.GetTokenKind() != TK_dread) { - Error("expect dread but get "); - return false; - } - AddrofNode *dexpr = mod.CurFuncCodeMemPool()->New(OP_dread); - expr = dexpr; +bool MIRParser::SetPrimTypeAndStIdxForDreadOrDreadoffNode(BaseNode &dexpr, StIdx &stidx) { lexer.NextToken(); TyIdx tyidx(0); bool parseRet = ParsePrimType(tyidx); @@ -2317,8 +2280,7 @@ bool MIRParser::ParseExprDread(BaseNodePtr &expr) { Error("expect primitive type but get "); return false; } - expr->SetPrimType(GlobalTables::GetTypeTable().GetPrimTypeFromTyIdx(tyidx)); - StIdx stidx; + dexpr.SetPrimType(GlobalTables::GetTypeTable().GetPrimTypeFromTyIdx(tyidx)); if (!ParseDeclaredSt(stidx)) { return false; } @@ -2326,6 +2288,20 @@ bool MIRParser::ParseExprDread(BaseNodePtr &expr) { Error("expect a symbol ParseExprDread failed"); return false; } + return true; +} + +bool MIRParser::ParseExprDread(BaseNodePtr &expr) { + if (lexer.GetTokenKind() != TK_dread) { + Error("expect dread but get "); + return false; + } + AddrofNode *dexpr = mod.CurFuncCodeMemPool()->New(OP_dread); + expr = dexpr; + StIdx stidx; + if (!SetPrimTypeAndStIdxForDreadOrDreadoffNode(*dexpr, stidx)) { + return false; + } dexpr->SetStIdx(stidx); TokenKind endtk = lexer.NextToken(); if (endtk == TK_intconst) { @@ -2351,20 +2327,8 @@ bool MIRParser::ParseExprDreadoff(BaseNodePtr &expr) { } DreadoffNode *dexpr = mod.CurFuncCodeMemPool()->New(OP_dreadoff); expr = dexpr; - lexer.NextToken(); - TyIdx tyidx(0); - bool parseRet = ParsePrimType(tyidx); - if (tyidx == 0u || !parseRet) { - Error("expect primitive type but get "); - return false; - } - expr->SetPrimType(GlobalTables::GetTypeTable().GetPrimTypeFromTyIdx(tyidx)); StIdx stidx; - if (!ParseDeclaredSt(stidx)) { - return false; - } - if (stidx.FullIdx() == 0) { - Error("expect a symbol ParseExprDread failed"); + if (!SetPrimTypeAndStIdxForDreadOrDreadoffNode(*dexpr, stidx)) { return false; } dexpr->stIdx = stidx; @@ -2531,6 +2495,19 @@ bool MIRParser::ParseExprFieldsDist(BaseNodePtr &expr) { return true; } +bool MIRParser::SetBOpndForBinaryOrCompareNode(BinaryNode &addExpr) { + lexer.NextToken(); + BaseNode *opnd0 = nullptr; + BaseNode *opnd1 = nullptr; + if (!ParseExprTwoOperand(opnd0, opnd1)) { + return false; + } + addExpr.SetBOpnd(opnd0, 0); + addExpr.SetBOpnd(opnd1, 1); + lexer.NextToken(); + return true; +} + bool MIRParser::ParseExprBinary(BaseNodePtr &expr) { Opcode opcode = GetBinaryOp(lexer.GetTokenKind()); if (opcode == OP_undef) { @@ -2538,27 +2515,19 @@ bool MIRParser::ParseExprBinary(BaseNodePtr &expr) { return false; } auto *addExpr = mod.CurFuncCodeMemPool()->New(opcode); + expr = addExpr; if (!IsPrimitiveType(lexer.NextToken())) { Error("expect type parsing binary operator but get "); return false; } addExpr->SetPrimType(GetPrimitiveType(lexer.GetTokenKind())); - lexer.NextToken(); - BaseNode *opnd0 = nullptr; - BaseNode *opnd1 = nullptr; - if (!ParseExprTwoOperand(opnd0, opnd1)) { - return false; - } - addExpr->SetBOpnd(opnd0, 0); - addExpr->SetBOpnd(opnd1, 1); - expr = addExpr; - lexer.NextToken(); - return true; + return SetBOpndForBinaryOrCompareNode(*addExpr); } bool MIRParser::ParseExprCompare(BaseNodePtr &expr) { Opcode opcode = GetBinaryOp(lexer.GetTokenKind()); auto *addExpr = mod.CurFuncCodeMemPool()->New(opcode); + expr = addExpr; if (!IsPrimitiveType(lexer.NextToken())) { Error("expect type parsing compare operator but get "); return false; @@ -2569,17 +2538,7 @@ bool MIRParser::ParseExprCompare(BaseNodePtr &expr) { return false; } addExpr->SetOpndType(GetPrimitiveType(lexer.GetTokenKind())); - lexer.NextToken(); - BaseNode *opnd0 = nullptr; - BaseNode *opnd1 = nullptr; - if (!ParseExprTwoOperand(opnd0, opnd1)) { - return false; - } - addExpr->SetBOpnd(opnd0, 0); - addExpr->SetBOpnd(opnd1, 1); - expr = addExpr; - lexer.NextToken(); - return true; + return SetBOpndForBinaryOrCompareNode(*addExpr); } bool MIRParser::ParseExprDepositbits(BaseNodePtr &expr) { @@ -2671,10 +2630,7 @@ bool MIRParser::ParseExprIaddrof(BaseNodePtr &expr) { return true; } -bool MIRParser::ParseExprIreadoff(BaseNodePtr &expr) { - // syntax : iread () - auto *iReadOff = mod.CurFuncCodeMemPool()->New(); - expr = iReadOff; +bool MIRParser::SetPrimTypeAndOffsetForIreadoffOrIreadFPoffNode(BaseNode &iReadOff, bool isIreadoff) { if (!IsPrimitiveType(lexer.NextToken())) { Error("expect primitive type but get "); return false; @@ -2683,8 +2639,8 @@ bool MIRParser::ParseExprIreadoff(BaseNodePtr &expr) { if (!ParsePrimType(tyidx)) { return false; } - iReadOff->SetPrimType(GlobalTables::GetTypeTable().GetPrimTypeFromTyIdx(tyidx)); - if (!IsPrimitiveScalar(iReadOff->GetPrimType())) { + iReadOff.SetPrimType(GlobalTables::GetTypeTable().GetPrimTypeFromTyIdx(tyidx)); + if (isIreadoff && !IsPrimitiveScalar(iReadOff.GetPrimType())) { Error("only scalar types allowed for ireadoff"); return false; } @@ -2692,6 +2648,16 @@ bool MIRParser::ParseExprIreadoff(BaseNodePtr &expr) { Error("expect offset but get "); return false; } + return true; +} + +bool MIRParser::ParseExprIreadoff(BaseNodePtr &expr) { + // syntax : iread () + auto *iReadOff = mod.CurFuncCodeMemPool()->New(); + expr = iReadOff; + if (!SetPrimTypeAndOffsetForIreadoffOrIreadFPoffNode(*iReadOff, true)) { + return false; + } iReadOff->SetOffset(lexer.GetTheIntVal()); lexer.NextToken(); BaseNode *opnd = nullptr; @@ -2708,17 +2674,7 @@ bool MIRParser::ParseExprIreadFPoff(BaseNodePtr &expr) { // syntax : iread auto *iReadOff = mod.CurFuncCodeMemPool()->New(); expr = iReadOff; - if (!IsPrimitiveType(lexer.NextToken())) { - Error("expect primitive type but get "); - return false; - } - TyIdx tyidx(0); - if (!ParsePrimType(tyidx)) { - return false; - } - iReadOff->SetPrimType(GlobalTables::GetTypeTable().GetPrimTypeFromTyIdx(tyidx)); - if (lexer.GetTokenKind() != TK_intconst) { - Error("expect offset but get "); + if (!SetPrimTypeAndOffsetForIreadoffOrIreadFPoffNode(*iReadOff, false)) { return false; } iReadOff->SetOffset(lexer.GetTheIntVal()); @@ -2726,22 +2682,14 @@ bool MIRParser::ParseExprIreadFPoff(BaseNodePtr &expr) { return true; } -bool MIRParser::ParseExprAddrof(BaseNodePtr &expr) { - // syntax: addrof - auto *addrofNode = mod.CurFuncCodeMemPool()->New(OP_addrof); - expr = addrofNode; - if (lexer.GetTokenKind() != TK_addrof) { - Error("expect addrof but get "); - return false; - } +bool MIRParser::SetStIdxForAddrofOrAddrofoffNode(BaseNode &aNode, StIdx &stidx) { lexer.NextToken(); TyIdx tyidx(0); if (!ParsePrimType(tyidx)) { Error("expect primitive type but get "); return false; } - addrofNode->SetPrimType(GlobalTables::GetTypeTable().GetPrimTypeFromTyIdx(tyidx)); - StIdx stidx; + aNode.SetPrimType(GlobalTables::GetTypeTable().GetPrimTypeFromTyIdx(tyidx)); if (!ParseDeclaredSt(stidx)) { return false; } @@ -2754,6 +2702,21 @@ bool MIRParser::ParseExprAddrof(BaseNodePtr &expr) { ASSERT(sym != nullptr, "null ptr check"); sym->SetHasPotentialAssignment(); } + return true; +} + +bool MIRParser::ParseExprAddrof(BaseNodePtr &expr) { + // syntax: addrof + auto *addrofNode = mod.CurFuncCodeMemPool()->New(OP_addrof); + expr = addrofNode; + if (lexer.GetTokenKind() != TK_addrof) { + Error("expect addrof but get "); + return false; + } + StIdx stidx; + if (!SetStIdxForAddrofOrAddrofoffNode(*addrofNode, stidx)) { + return false; + } addrofNode->SetStIdx(stidx); TokenKind tk = lexer.NextToken(); if (IsDelimitationTK(tk)) { @@ -2775,26 +2738,10 @@ bool MIRParser::ParseExprAddrofoff(BaseNodePtr &expr) { Error("expect addrofoff but get "); return false; } - lexer.NextToken(); - TyIdx tyidx(0); - if (!ParsePrimType(tyidx)) { - Error("expect primitive type but get "); - return false; - } - addrofoffNode->SetPrimType(GlobalTables::GetTypeTable().GetPrimTypeFromTyIdx(tyidx)); StIdx stidx; - if (!ParseDeclaredSt(stidx)) { + if (!SetStIdxForAddrofOrAddrofoffNode(*addrofoffNode, stidx)) { return false; } - if (stidx.FullIdx() == 0) { - Error("expect symbol ParseExprAddroffunc"); - return false; - } - if (stidx.IsGlobal()) { - MIRSymbol *sym = GlobalTables::GetGsymTable().GetSymbolFromStidx(stidx.Idx()); - ASSERT(sym != nullptr, "null ptr check"); - sym->SetHasPotentialAssignment(); - } addrofoffNode->stIdx = stidx; TokenKind tk = lexer.NextToken(); if (tk == TK_intconst) { @@ -3139,7 +3086,7 @@ bool MIRParser::ParseExprArray(BaseNodePtr &expr) { bool MIRParser::ParseIntrinsicId(IntrinsicopNode &intrnOpNode) { MIRIntrinsicID intrinId = GetIntrinsicID(lexer.GetTokenKind()); - if (intrinId <= INTRN_UNDEFINED || intrinId >= INTRN_LAST) { + if (intrinId == INTRN_UNDEFINED || intrinId >= INTRN_LAST) { Error("wrong intrinsic id "); return false; } @@ -3199,7 +3146,7 @@ bool MIRParser::ParseScalarValue(MIRConstPtr &stype, MIRType &type) { if (IsInt128Ty(ptp)) { stype = GlobalTables::GetIntConstTable().GetOrCreateIntConst(lexer.GetTheInt128Val(), type); } else { - stype = GlobalTables::GetIntConstTable().GetOrCreateIntConst(lexer.GetTheIntVal(), type); + stype = GlobalTables::GetIntConstTable().GetOrCreateIntConst(static_cast(lexer.GetTheIntVal()), type); } } else if (ptp == PTY_f32) { if (lexer.GetTokenKind() != TK_floatconst) { diff --git a/src/mapleall/maple_ir/src/mir_type.cpp b/src/mapleall/maple_ir/src/mir_type.cpp index 70affa8652..cdf7879913 100644 --- a/src/mapleall/maple_ir/src/mir_type.cpp +++ b/src/mapleall/maple_ir/src/mir_type.cpp @@ -569,7 +569,7 @@ const char *GetPrimTypeJavaName(PrimType primType) { case PTY_void: return "V"; case PTY_constStr: - return kJstrTypeName.c_str(); + return "constStr"; case kPtyInvalid: return "invalid"; default: @@ -806,9 +806,9 @@ static constexpr uint64 RoundUpConst(uint64 offset, uint32 align) { } static constexpr uint32 RoundUpConst(uint32 offset, uint32 align) { - uint32 tempFirst = -align; - uint32 tempSecond = offset + align - 1; - return tempFirst & tempSecond; + int32 tempFirst = -static_cast(align); + int32 tempSecond = static_cast(offset + align - 1); + return static_cast(tempFirst) & static_cast(tempSecond); } static inline uint64 RoundUp(uint64 offset, uint32 align) { @@ -1327,9 +1327,42 @@ size_t MIRStructType::GetSize() const { return size; } +// Used to determine date alignment in ABI. +// In fact, this alignment of type should be in the context of language/ABI, not MIRType. +// For simplicity, we implement it in MIRType now. +// Need check why "packed" is within the context of ABI. +uint32 MIRStructType::GetUnadjustedAlign() const { + if (fields.size() == 0) { + return 1u; + } + uint32 maxAlign = 1; + uint32 maxZeroBitFieldAlign = 1; + auto structPack = GetTypeAttrs().GetPack(); + auto packed = GetTypeAttrs().IsPacked(); + for (size_t i = 0; i < fields.size(); ++i) { + TyIdxFieldAttrPair tfap = GetTyidxFieldAttrPair(i); + MIRType *fieldType = GlobalTables::GetTypeTable().GetTypeFromTyIdx(tfap.first); + auto originAlign = fieldType->GetKind() != kTypeBitField ? fieldType->GetAlign() : + GetPrimTypeSize(fieldType->GetPrimType()); + uint32 fieldAlign = (packed || tfap.second.IsPacked()) ? static_cast(1U) : + std::min(originAlign, structPack); + fieldAlign = tfap.second.HasAligned() ? std::max(fieldAlign, tfap.second.GetAlign()) : fieldAlign; + fieldAlign = GetTypeAttrs().HasPack() ? std::min(GetTypeAttrs().GetPack(), fieldAlign) : fieldAlign; + CHECK_FATAL(fieldAlign != 0, "expect fieldAlign not equal 0"); + maxAlign = std::max(maxAlign, fieldAlign); + if (fieldType->IsMIRBitFieldType() && static_cast(fieldType)->GetFieldSize() == 0) { + maxZeroBitFieldAlign = std::max(maxZeroBitFieldAlign, GetPrimTypeSize(fieldType->GetPrimType())); + } + } + if (HasZeroWidthBitField()) { + return std::max(maxZeroBitFieldAlign, maxAlign); + } + return maxAlign; +} + uint32 MIRStructType::GetAlign() const { if (fields.size() == 0) { - return 1; + return std::max(1u, GetTypeAttrs().GetAlign()); } uint32 maxAlign = 1; uint32 maxZeroBitFieldAlign = 1; @@ -1356,6 +1389,23 @@ uint32 MIRStructType::GetAlign() const { return std::max(GetTypeAttrs().GetAlign(), maxAlign); } + +uint32 MIRStructType::GetFieldTypeAlignByFieldPair(const FieldPair &fieldPair) { + MIRType *fieldType = GlobalTables::GetTypeTable().GetTypeFromTyIdx(fieldPair.second.first); + auto fieldAttr = fieldPair.second.second; + auto fieldTypeAlign = fieldType->GetKind() == kTypeBitField ? GetPrimTypeSize(fieldType->GetPrimType()) : + fieldType->GetAlign(); + auto fieldPacked = GetTypeAttrs().IsPacked() || fieldAttr.IsPacked(); + auto fieldAlign = fieldPacked ? 1u : fieldTypeAlign; + fieldAlign = fieldAttr.HasAligned() ? std::max(fieldAlign, fieldAttr.GetAlign()) : fieldAlign; + return GetTypeAttrs().HasPack() ? std::min(GetTypeAttrs().GetPack(), fieldAlign) : fieldAlign; +} + +uint32 MIRStructType::GetFieldTypeAlign(FieldID fieldID) { + const FieldPair &fieldPair = TraverseToFieldRef(fieldID); + return GetFieldTypeAlignByFieldPair(fieldPair); +} + void MIRStructType::DumpFieldsAndMethods(int indent, bool hasMethod) const { DumpFields(fields, indent); bool hasField = !fields.empty(); @@ -2053,20 +2103,15 @@ void MIRStructType::ComputeLayout() { } uint32 allocedSize = 0; // space need for all fields before currentField uint32 allocedBitSize = 0; - auto pack = GetTypeAttrs().GetPack(); auto hasPack = GetTypeAttrs().HasPack(); auto packed = GetTypeAttrs().IsPacked(); constexpr uint8 bitsPerByte = 8; // 8 bits per byte - for (uint32 j = 0; j < fields.size(); ++j) { - TyIdx fieldTyIdx = fields[j].second.first; - auto fieldAttr = fields[j].second.second; + for (FieldPair filedPair : fields) { + TyIdx fieldTyIdx = filedPair.second.first; + auto fieldAttr = filedPair.second.second; MIRType *fieldType = GlobalTables::GetTypeTable().GetTypeFromTyIdx(fieldTyIdx); - auto fieldTypeAlign = fieldType->GetKind() == kTypeBitField ? GetPrimTypeSize(fieldType->GetPrimType()) : - fieldType->GetAlign(); auto fieldPacked = packed || fieldAttr.IsPacked(); - auto fieldAlign = fieldPacked ? 1u : fieldTypeAlign; - fieldAlign = fieldAttr.HasAligned() ? std::max(fieldAlign, fieldAttr.GetAlign()) : fieldAlign; - fieldAlign = hasPack ? std::min(pack, fieldAlign) : fieldAlign; + uint32 fieldAlign = GetFieldTypeAlignByFieldPair(filedPair); uint32 fieldAlignBits = fieldAlign * bitsPerByte; OffsetPair pair; uint32 fieldBitSize; diff --git a/src/mapleall/maple_ir/src/option.cpp b/src/mapleall/maple_ir/src/option.cpp index fc4448580e..3d31e583f2 100644 --- a/src/mapleall/maple_ir/src/option.cpp +++ b/src/mapleall/maple_ir/src/option.cpp @@ -50,7 +50,7 @@ uint32 Options::inlineRecursiveFunctionThreshold = 15; uint32 Options::inlineDepth = 8; uint32 Options::inlineModuleGrowth = 10; uint32 Options::inlineColdFunctionThreshold = 3; -bool Options::respectAlwaysInline = false; +bool Options::respectAlwaysInline = true; bool Options::inlineToAllCallers = true; uint32 Options::ginlineMaxNondeclaredInlineCallee = 400; bool Options::ginlineAllowNondeclaredInlineSizeGrow = false; diff --git a/src/mapleall/maple_ir/src/parser.cpp b/src/mapleall/maple_ir/src/parser.cpp index 20fc208f5d..f7d2cba855 100644 --- a/src/mapleall/maple_ir/src/parser.cpp +++ b/src/mapleall/maple_ir/src/parser.cpp @@ -204,9 +204,9 @@ bool MIRParser::ParseSpecialReg(PregIdx &pRegIdx) { size_t retValSize = strlen(kLexerStringRetval); if (strncmp(lexName.c_str(), kLexerStringRetval, retValSize) == 0 && (lexSize > retValSize) && isdigit(lexName[retValSize])) { - int32 retValNo = lexName[retValSize] - '0'; + int32 retValNo = lexName[retValSize] - static_cast('0'); for (size_t i = retValSize + 1; (i < lexSize) && isdigit(lexName[i]); ++i) { - retValNo = retValNo * 10 + lexName[i] - '0'; + retValNo = retValNo * 10 + lexName[i] - static_cast('0'); // 10: decimal digit } pRegIdx = -kSregRetval0 - retValNo; lexer.NextToken(); @@ -472,13 +472,13 @@ bool MIRParser::ParsePragmaElementForAnnotation(MIRPragmaElement &elem) { Error("parsing pragma error: expecting int but get "); return false; } - uint64 size = lexer.GetTheIntVal(); + int64 size = lexer.GetTheIntVal(); tk = lexer.NextToken(); if (tk != TK_coma && size > 0) { Error("parsing pragma error: expecting , but get "); return false; } - for (uint64 i = 0; i < size; ++i) { + for (int64 i = 0; i < size; ++i) { auto *e0 = mod.GetMemPool()->New(mod); tk = lexer.NextToken(); if (tk != TK_label) { @@ -2419,7 +2419,7 @@ bool MIRParser::ParseFuncInfo() { GStrIdx strIdx = GlobalTables::GetStrTable().GetOrCreateStrIdxFromName(lexer.GetName()); tokenKind = lexer.NextToken(); if (tokenKind == TK_intconst) { - uint32 fieldVal = lexer.GetTheIntVal(); + uint32 fieldVal = static_cast(lexer.GetTheIntVal()); func->PushbackMIRInfo(MIRInfoPair(strIdx, fieldVal)); func->PushbackIsString(false); } else if (tokenKind == TK_string) { @@ -2537,7 +2537,7 @@ bool MIRParser::ParseOneScope(MIRScope &scope) { } scope.SetRange(low, high); nameTk = lexer.NextToken(); - while (1) { + for (;;) { bool status = false; switch (lexer.GetTokenKind()) { case TK_ALIAS: { @@ -3201,7 +3201,7 @@ bool MIRParser::ParseMIRForFileInfo() { GStrIdx strIdx = GlobalTables::GetStrTable().GetOrCreateStrIdxFromName(lexer.GetName()); tk = lexer.NextToken(); if (tk == TK_intconst) { - uint32 fieldVal = lexer.GetTheIntVal(); + uint32 fieldVal = static_cast(lexer.GetTheIntVal()); mod.PushFileInfoPair(MIRInfoPair(strIdx, fieldVal)); mod.PushFileInfoIsString(false); } else if (tk == TK_string) { @@ -3240,7 +3240,7 @@ bool MIRParser::ParseMIRForFileData() { tk = lexer.NextToken(); std::vector data; while (tk == TK_intconst) { - uint32 fieldVal = lexer.GetTheIntVal(); + uint32 fieldVal = static_cast(lexer.GetTheIntVal()); data.push_back(fieldVal); tk = lexer.NextToken(); } @@ -3267,7 +3267,7 @@ bool MIRParser::ParseMIRForSrcFileInfo() { } TokenKind tk = lexer.NextToken(); while (tk == TK_intconst) { - uint32 fieldVal = lexer.GetTheIntVal(); + uint32 fieldVal = static_cast(lexer.GetTheIntVal()); tk = lexer.NextToken(); if (tk == TK_string) { GStrIdx strIdx = GlobalTables::GetStrTable().GetOrCreateStrIdxFromName(lexer.GetName()); diff --git a/src/mapleall/maple_me/BUILD.gn b/src/mapleall/maple_me/BUILD.gn index d9dbedd868..ed05ecc780 100755 --- a/src/mapleall/maple_me/BUILD.gn +++ b/src/mapleall/maple_me/BUILD.gn @@ -135,6 +135,8 @@ src_libmplme = [ "src/mc_ssa_pre.cpp", "src/me_tailcall.cpp", "src/me_simplifyexpr.cpp", + "src/me_combine_expr.cpp", + "src/me_expr_utils.cpp", ] src_libmplmewpo = [ @@ -147,7 +149,6 @@ src_libmplmewpo = [ "src/irmap_build.cpp", "src/irmap_emit.cpp", "src/me_ir.cpp", - "src/orig_symbol.cpp", "src/ssa.cpp", "src/ssa_mir_nodes.cpp", "src/ssa_tab.cpp", diff --git a/src/mapleall/maple_me/CMakeLists.txt b/src/mapleall/maple_me/CMakeLists.txt index 5ab5df288c..3a53611437 100755 --- a/src/mapleall/maple_me/CMakeLists.txt +++ b/src/mapleall/maple_me/CMakeLists.txt @@ -137,6 +137,8 @@ set(src_libmplme src/mc_ssa_pre.cpp src/me_tailcall.cpp src/me_simplifyexpr.cpp + src/me_combine_expr.cpp + src/me_expr_utils.cpp ) set(src_libmplmewpo @@ -149,7 +151,6 @@ set(src_libmplmewpo src/irmap_build.cpp src/irmap_emit.cpp src/me_ir.cpp - src/orig_symbol.cpp src/ssa.cpp src/ssa_mir_nodes.cpp src/ssa_tab.cpp diff --git a/src/mapleall/maple_me/include/alias_class.h b/src/mapleall/maple_me/include/alias_class.h index 3fbffc5e00..75abe5de7b 100644 --- a/src/mapleall/maple_me/include/alias_class.h +++ b/src/mapleall/maple_me/include/alias_class.h @@ -32,74 +32,11 @@ inline bool IsMemoryOverlap(OffsetType startA, int64 sizeA, OffsetType startB, i startB < (startA + sizeA); } -class AliasElem { - friend class AliasClass; +class OstHash { public: - AliasElem(uint32 i, OriginalSt &origst) - : id(i), - ost(origst) {} - - ~AliasElem() = default; - - void Dump() const; - - uint32 GetClassID() const { - return id; - } - - OriginalSt &GetOriginalSt() { - return ost; - } - const OriginalSt &GetOriginalSt() const { - return ost; - } - - OriginalSt *GetOst() { - return &ost; - } - - bool IsNotAllDefsSeen() const { - return notAllDefsSeen; - } - void SetNotAllDefsSeen(bool allDefsSeen) { - notAllDefsSeen = allDefsSeen; - } - - bool IsNextLevNotAllDefsSeen() const { - return nextLevNotAllDefsSeen; - } - void SetNextLevNotAllDefsSeen(bool allDefsSeen) { - nextLevNotAllDefsSeen = allDefsSeen; + const uint32 operator() (const OriginalSt *ost) const { + return ost->GetIndex().GetIdx(); } - - const MapleSet *GetClassSet() const { - return classSet; - } - - void AddClassToSet(unsigned int classId) { - (void)classSet->emplace(classId); - } - - void SetClassSet(MapleSet *newClassSet) { - classSet = newClassSet; - } - - const MapleSet *GetAssignSet() const { - return assignSet; - } - - void AddAssignToSet(unsigned int classId) { - (void)assignSet->emplace(classId); - } - - private: - uint32 id; // the original alias class id, before any union; start from 0 - OriginalSt &ost; - bool notAllDefsSeen = false; // applied to current level; unused for lev -1 - bool nextLevNotAllDefsSeen = false; // remember that next level's elements need to be made notAllDefsSeen - MapleSet *classSet = nullptr; // points to the set of members of its class; nullptr for - // single-member classes - MapleSet *assignSet = nullptr; // points to the set of members that have assignments among themselves }; // this is only for use as return value of CreateAliasInfoExpr() @@ -146,7 +83,6 @@ class AliasClass : public AnalysisResult { using VstIdx2AssignSet = MapleVector; // index is VersionSt index using AliasSet = MapleSet; // value is OStIdx using OstIdx2AliasSet = MapleVector; // index is OStIdx - using Vst2AliasElem = MapleVector; // index is VersionSt index using AliasAttrVec = MapleVector; // index is OStIdx/VersionSt index void SetAnalyzedOstNum(size_t num) { @@ -262,6 +198,7 @@ class AliasClass : public AnalysisResult { void SetPtrFieldsOfAggNextLevNADS(const BaseNode *opnd, const VersionSt *vst); void SetAggOpndPtrFieldsNextLevNADS(MapleVector &opnds); void ApplyUnionForDassignCopy(const VersionSt &lhsVst, VersionSt *rhsVst, BaseNode &rhs); + bool EfficientUnionTarget(const OriginalSt &ost, const BaseNode &expr); bool SetNextLevNADSForEscapePtr(const VersionSt &lhsVst, BaseNode &rhs); void UnionNextLevelOfAliasOst(OstPtrSet &ostsToUnionNextLev); VersionSt *FindOrCreateDummyNADSVst(); @@ -332,6 +269,11 @@ class AliasClass : public AnalysisResult { addrofVstNextLevNotAllDefsSeen[vstIdx] = true; } + bool HasNextLevelNotAllDefSeen(size_t vstIdx) { + auto *ost = ssaTab.GetVerSt(vstIdx)->GetOst(); + return ost->GetIndirectLev() > 0 || IsNotAllDefsSeen(ost->GetIndex()) || IsNextLevNotAllDefsSeen(vstIdx); + } + bool IsNextLevNotAllDefsSeen(size_t vstIdx) { if (vstIdx >= vstNextLevNotAllDefsSeen.size()) { return false; @@ -372,7 +314,8 @@ class AliasClass : public AnalysisResult { MapleSet globalsAffectedByCalls; // aliased at calls; needed only when wholeProgramScope is true MapleSet globalsMayAffectedByClinitCheck; - MapleUnorderedMultiMap aggsToUnion; // aggs are copied, their fields should be unioned + // aggs are copied, their fields should be unioned + MapleUnorderedMultiMap aggsToUnion; MapleSet nadsOsts; MapleVector ostWithUndefinedOffsets; VstIdx2AssignSet assignSetOfVst; diff --git a/src/mapleall/maple_me/include/demand_driven_alias_analysis.h b/src/mapleall/maple_me/include/demand_driven_alias_analysis.h index 06bba85b9d..71a6bdc49c 100644 --- a/src/mapleall/maple_me/include/demand_driven_alias_analysis.h +++ b/src/mapleall/maple_me/include/demand_driven_alias_analysis.h @@ -100,6 +100,14 @@ class PEGNode { attr[kAliasAttrEscaped] || other->attr[kAliasAttrEscaped] || other->attr[kAliasAttrGlobal]; } + bool UpdateAttr(AliasAttribute newAttr) { + if (attr[newAttr]) { + return false; + } + attr[newAttr] = true; + return true; + } + void SetMultiDefined() { multiDefed = true; } diff --git a/src/mapleall/maple_me/include/mc_ssa_pre.h b/src/mapleall/maple_me/include/mc_ssa_pre.h index 53c251bc4c..fdefae4b43 100644 --- a/src/mapleall/maple_me/include/mc_ssa_pre.h +++ b/src/mapleall/maple_me/include/mc_ssa_pre.h @@ -88,7 +88,7 @@ class McSSAPre : public SSAPre { // step 7 max flow/min cut bool AmongMinCut(const RGNode *nd, uint32 idx) const; void DumpRGToFile(); // dump reduced graph to dot file - bool IncludedEarlier(Visit **cut, const Visit &curVisit, uint32 nextRouteIdx) const; + bool IncludedEarlier(Visit * const *cut, const Visit &curVisit, uint32 nextRouteIdx) const; void RemoveRouteNodesFromCutSet(std::unordered_multiset &cutSet, Route &route) const; bool SearchRelaxedMinCut(Visit **cut, std::unordered_multiset &cutSet, uint32 nextRouteIdx, FreqType flowSoFar); diff --git a/src/mapleall/maple_me/include/me_bb_layout.h b/src/mapleall/maple_me/include/me_bb_layout.h index e10daf992f..1c6c7fbfa6 100644 --- a/src/mapleall/maple_me/include/me_bb_layout.h +++ b/src/mapleall/maple_me/include/me_bb_layout.h @@ -19,6 +19,7 @@ #include "maple_phase_manager.h" #include "me_dominance.h" #include "me_loop_analysis.h" +#include "me_predict.h" namespace maple { class BBLayout { @@ -116,7 +117,7 @@ class BBLayout { void DealWithStartTryBB(); void UpdateNewBBWithAttrTry(const BB &bb, BB &fallthru) const; void SetAttrTryForTheCanBeMovedBB(BB &bb, BB &canBeMovedBB) const; - void RebuildFreq(); + void RebuildFreq(BuiltinExpectInfo *expectInfo = nullptr); MeFunction &func; MapleAllocator layoutAlloc; diff --git a/src/mapleall/maple_me/include/me_cfg_mst.h b/src/mapleall/maple_me/include/me_cfg_mst.h index caf356e9a8..21fe2028fe 100644 --- a/src/mapleall/maple_me/include/me_cfg_mst.h +++ b/src/mapleall/maple_me/include/me_cfg_mst.h @@ -55,10 +55,10 @@ class CFGMST { void BuildEdges(); void DumpEdgesInfo() const; private: - static constexpr int normalEdgeWeight = 2; - static constexpr int exitEdgeWeight = 3; - static constexpr int fakeExitEdgeWeight = 4; - static constexpr int criticalEdgeWeight = 4; + static constexpr int kNormalEdgeWeight = 2; + static constexpr int kExitEdgeWeight = 3; + static constexpr int kFakeExitEdgeWeight = 4; + static constexpr int kCriticalEdgeWeight = 4; std::vector allEdges; MeFunction *func; MemPool *mp; @@ -169,19 +169,19 @@ void CFGMST::BuildEdges() { for (auto *succBB : bb->GetSucc()) { /* exitBB incoming edge allocate high weight */ if (succBB->GetKind() == BBKind::kBBReturn) { - AddEdge(bb, succBB, exitEdgeWeight); + AddEdge(bb, succBB, kExitEdgeWeight); continue; } if (IsCritialEdge(bb, succBB)) { - AddEdge(bb, succBB, criticalEdgeWeight, true); + AddEdge(bb, succBB, kCriticalEdgeWeight, true); continue; } - AddEdge(bb, succBB, normalEdgeWeight); + AddEdge(bb, succBB, kNormalEdgeWeight); } } for (BB *bb : func->GetCfg()->GetCommonExitBB()->GetPred()) { - AddEdge(bb, exit, fakeExitEdgeWeight, false, true); + AddEdge(bb, exit, kFakeExitEdgeWeight, false, true); } /* insert fake edge to keep consistent */ AddEdge(exit, entry, UINT64_MAX, false, true); diff --git a/src/mapleall/maple_me/include/me_combine_expr.h b/src/mapleall/maple_me/include/me_combine_expr.h new file mode 100644 index 0000000000..e0cca3e25d --- /dev/null +++ b/src/mapleall/maple_me/include/me_combine_expr.h @@ -0,0 +1,72 @@ +/* + * Copyright (c) [2023] Huawei Technologies Co.,Ltd.All rights reserved. + * + * OpenArkCompiler is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * + * http://license.coscl.org.cn/MulanPSL2 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ +#ifndef MAPLE_ME_INCLUDE_ME_COMBINEEXPR_H +#define MAPLE_ME_INCLUDE_ME_COMBINEEXPR_H + +#include "bit_value.h" +#include "me_dominance.h" +#include "me_function.h" +#include "me_ir.h" +#include "me_irmap.h" +#include "meexpr_use_info.h" + +namespace maple { +class ExprCombiner { + public: + ExprCombiner(MeIRMap &argIRMap, MeExprUseInfo &argUseInfo, bool isDebug) + : irMap(argIRMap), useInfo(argUseInfo), debug(isDebug) {} + void VisitStmt(MeStmt &stmt); + + private: + MeExpr *VisitMeExpr(MeExpr &expr); + MeExpr *VisitOpExpr(OpMeExpr &expr); + MeExpr *VisitBior(OpMeExpr &expr); + MeExpr *VisitBxor(OpMeExpr &expr); + MeExpr *VisitBand(OpMeExpr &expr); + MeExpr *VisitCmp(OpMeExpr &expr); + MeExpr *SimplifyOpWithConst(OpMeExpr &expr); + MeExpr *FoldCmpWithConst(OpMeExpr &expr); + MeExpr *FoldCmpBinOpWithConst(OpMeExpr &cmpExpr, const MeExpr &binOpExpr, const IntVal &c1); + MeExpr *SimplifyByDemandedBits(OpMeExpr &expr); + MeExpr *SimplifyDemandedUseBits(MeExpr &expr, const IntVal &demanded, BitValue &known, uint32 depth); + MeExpr *SimplifyIntrinsicByDUB(const MeExpr &expr, const IntVal &demanded); + bool HasOneUse(const MeExpr &expr); + void ReplaceExprInExpr(MeExpr &parentExpr, MeExpr &newExpr, size_t opndIdx); + void ReplaceExprInStmt(MeStmt &parentStmt, MeExpr &newExpr, size_t opndIdx); + MeIRMap &irMap; + MeExprUseInfo &useInfo; + bool debug = false; +}; + +class CombineExpr { + public: + CombineExpr(MeFunction &meFunc, MeIRMap &argIRMap, Dominance &argDom, bool isDebug) + : func(meFunc), + irMap(argIRMap), + dom(argDom), + debug(isDebug) {} + ~CombineExpr() = default; + void Execute(); + + private: + MeFunction &func; + MeIRMap &irMap; + Dominance &dom; + bool debug; +}; + +MAPLE_FUNC_PHASE_DECLARE(MECombineExpr, MeFunction) +} // namespace maple +#endif \ No newline at end of file diff --git a/src/mapleall/maple_me/include/me_expr_utils.h b/src/mapleall/maple_me/include/me_expr_utils.h new file mode 100644 index 0000000000..7eb1892aff --- /dev/null +++ b/src/mapleall/maple_me/include/me_expr_utils.h @@ -0,0 +1,31 @@ +/* + * Copyright (c) [2023] Huawei Technologies Co.,Ltd.All rights reserved. + * + * OpenArkCompiler is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * + * http://license.coscl.org.cn/MulanPSL2 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ +#ifndef MAPLE_ME_INCLUDE_EXPR_UTIL_H +#define MAPLE_ME_INCLUDE_EXPR_UTIL_H +#include "bit_value.h" +#include "me_ir.h" + +namespace maple { + +const MIRIntConst *GetIntConst(const MeExpr &expr); +std::pair GetIntConstOpndOfBinExpr(const MeExpr &expr); + +MeExpr *SimplifyMultiUseByDemanded(IRMap &irMap, const MeExpr &expr); +MeExpr *SimplifyBinOpByDemanded(IRMap &irMap, const MeExpr &expr, const IntVal &demanded, BitValue &known, + const BitValue &lhsKnown, const BitValue &rhsKnown); +MeExpr *SimplifyMultiUseByDemanded(IRMap &irMap, const MeExpr &expr, const IntVal &demanded, BitValue &known, + uint32 depth); +} // namespace maple +#endif \ No newline at end of file diff --git a/src/mapleall/maple_me/include/me_ir.h b/src/mapleall/maple_me/include/me_ir.h index 870b8a3608..5974671da5 100644 --- a/src/mapleall/maple_me/include/me_ir.h +++ b/src/mapleall/maple_me/include/me_ir.h @@ -46,7 +46,6 @@ enum MeExprOp : uint8 { }; // cache the op to avoid dynamic cast constexpr int kInvalidExprID = -1; -constexpr size_t kInvalidIndex = std::numeric_limits::max(); class MeExpr { public: MeExpr(int32 exprId, MeExprOp meop, Opcode op, PrimType t, size_t n) @@ -1545,7 +1544,7 @@ class MeStmt { private: uint32 originalId = 0xdeadbeef; uint32 meStmtId = 0xdeadbeef; - size_t stmtInfoId = kInvalidIndex; + size_t stmtInfoId = utils::kInvalidIndex; Opcode op; bool isLive = true; BB *bb = nullptr; @@ -1808,6 +1807,7 @@ class AssignMeStmt : public MeStmt { ScalarMeExpr *lhs = nullptr; bool needIncref = false; // to be determined by analyzerc phase bool needDecref = false; // to be determined by analyzerc phase + public: bool isIncDecStmt = false; // has the form of an increment or decrement stmt }; @@ -2655,6 +2655,10 @@ class IntrinsiccallMeStmt : public NaryMeStmt, public MuChiMePart, public Assign return retPType; } + IntrinDesc &GetIntrinsicDescription() const { + return IntrinDesc::intrinTable[intrinsic]; + } + private: MIRIntrinsicID intrinsic; TyIdx tyIdx; @@ -2753,7 +2757,7 @@ class UnaryMeStmt : public MeStmt { explicit UnaryMeStmt(const UnaryMeStmt *umestmt) : MeStmt(umestmt->GetOp()), opnd(umestmt->opnd) {} ~UnaryMeStmt() override = default; - + UnaryMeStmt(const UnaryMeStmt &other) = default; size_t NumMeStmtOpnds() const override { @@ -2871,14 +2875,22 @@ class CallAssertNonnullMeStmt : public UnaryMeStmt, public SafetyCallCheckMeStmt explicit CallAssertNonnullMeStmt(const CallAssertNonnullStmtNode *stt) : UnaryMeStmt(stt), SafetyCallCheckMeStmt(stt->GetFuncNameIdx(), stt->GetParamIndex(), stt->GetStmtFuncNameIdx()) {} + CallAssertNonnullMeStmt(Opcode o, GStrIdx funcNameIdx, size_t paramIndex, GStrIdx stmtFuncNameIdx) : UnaryMeStmt(o), SafetyCallCheckMeStmt(funcNameIdx, paramIndex, stmtFuncNameIdx) {} - explicit CallAssertNonnullMeStmt(const CallAssertNonnullMeStmt &stt) + + CallAssertNonnullMeStmt(const CallAssertNonnullMeStmt &stt) : UnaryMeStmt(stt), SafetyCallCheckMeStmt(static_cast(stt)) {} + explicit CallAssertNonnullMeStmt(const CallAssertNonnullMeStmt *stt) : UnaryMeStmt(*stt), SafetyCallCheckMeStmt(static_cast(*stt)) {} + ~CallAssertNonnullMeStmt() override = default; + StmtNode &EmitStmt(MapleAllocator &alloc) override; + + private: + CallAssertNonnullMeStmt& operator=(const CallAssertNonnullMeStmt &condGoto) = delete; }; class AssertBoundaryMeStmt : public NaryMeStmt, public SafetyCheckMeStmt { @@ -2979,6 +2991,7 @@ class CondGotoMeStmt : public UnaryMeStmt { StmtNode &EmitStmt(MapleAllocator &alloc) override; private: + CondGotoMeStmt& operator=(const CondGotoMeStmt &condGoto) = delete; uint32 offset; // the label int32 branchProb = -1; // branch probability, a negative number indicates that the probability is invalid }; diff --git a/src/mapleall/maple_me/include/me_pgo_instrument.h b/src/mapleall/maple_me/include/me_pgo_instrument.h index ebafa3a9c5..b0f7668441 100644 --- a/src/mapleall/maple_me/include/me_pgo_instrument.h +++ b/src/mapleall/maple_me/include/me_pgo_instrument.h @@ -146,7 +146,7 @@ class PGOInstrument { } } uint32 hashCode = DJBHash(ss.str().c_str()); - return (allEdgeSize << edgeSizeInfoShift) | hashCode; + return (allEdgeSize << kEdgeSizeInfoShift) | hashCode; } uint64 ComputeLinenoHash() const { @@ -168,7 +168,7 @@ class PGOInstrument { protected: bool dump; private: - static constexpr uint32 edgeSizeInfoShift = 32; + static constexpr uint32 kEdgeSizeInfoShift = 32; CFGMST mst; MeFunction *func; MemPool *mp; diff --git a/src/mapleall/maple_me/include/me_scalar_analysis.h b/src/mapleall/maple_me/include/me_scalar_analysis.h index fa20e280f6..fb1830672d 100644 --- a/src/mapleall/maple_me/include/me_scalar_analysis.h +++ b/src/mapleall/maple_me/include/me_scalar_analysis.h @@ -329,6 +329,7 @@ class LoopScalarAnalysisResult { CRNode *CreateCRForPhi(const MePhiNode &phiNode); CRNode *GetOrCreateCRNode(MeExpr &expr); CRNode *DealWithMeOpOp(MeExpr &currOpMeExpr, MeExpr &expr); + CRNode *DealWithIaddrof(const OpMeExpr &opMeExpr, MeExpr &expr); TripCountType ComputeTripCount(const MeFunction &func, uint64 &tripCountResult, CRNode *&conditionCRNode, CR *&itCR); void PutTheAddrExprAtTheFirstOfVector(std::vector &crNodeOperands, const MeExpr &addrExpr) const; CRNode &SortCROperand(CRNode &crNode, MeExpr &addrExpr); diff --git a/src/mapleall/maple_me/include/me_value_range_prop.h b/src/mapleall/maple_me/include/me_value_range_prop.h index 481c13b30e..7e3d47b1d9 100644 --- a/src/mapleall/maple_me/include/me_value_range_prop.h +++ b/src/mapleall/maple_me/include/me_value_range_prop.h @@ -788,8 +788,8 @@ class ValueRangePropagation { std::unique_ptr CopyValueRange(ValueRange &valueRange, PrimType primType = PTY_begin) const; bool LowerInRange(const BB &bb, Bound lowerTemp, Bound lower, bool lowerIsZero); bool UpperInRange(const BB &bb, Bound upperTemp, Bound upper, bool upperIsArrayLength); - void PrepareForSSAUpdateWhenPredBBIsRemoved(const BB &pred, BB &bb, ScalarMeExpr *updateSSAExceptTheScalarExpr, - std::map> &ssaupdateCandsForCondExpr); + void PrepareForSSAUpdateWhenPredBBIsRemoved(const BB &pred, BB &bb, BB *trueBr, + ScalarMeExpr *updateSSAExceptTheScalarExpr, std::map> &ssaupdateCandsForCondExpr); void InsertOstOfPhi2Cands(BB &bb, size_t i, const ScalarMeExpr *updateSSAExceptTheScalarExpr, std::map> &ssaupdateCandsForCondExpr, bool setPhiIsDead = false); void InsertOstOfPhi2Cands(BB &bb, size_t i); diff --git a/src/mapleall/maple_me/include/meexpr_use_info.h b/src/mapleall/maple_me/include/meexpr_use_info.h index 451e5bd75e..16dcefdcce 100644 --- a/src/mapleall/maple_me/include/meexpr_use_info.h +++ b/src/mapleall/maple_me/include/meexpr_use_info.h @@ -60,6 +60,10 @@ class UseItem final { ref++; } + void DecreaseRef() { + ref--; + } + bool operator==(const UseItem &other) const { return useNode == other.useNode; } @@ -104,7 +108,12 @@ class MeExprUseInfo final { template void AddUseSiteOfExpr(MeExpr *expr, T *useSite); + template + void DelUseSiteOfExpr(MeExpr *expr, T *useSite); + void CollectUseInfoInExpr(MeExpr *expr, MeStmt *stmt); + void DelUseInfoInExpr(MeExpr *expr, MeStmt *stmt); + void ReplaceUseInfoInExpr(MeExpr *old, MeExpr *newExpr); void CollectUseInfoInStmt(MeStmt *stmt); void CollectUseInfoInBB(BB *bb); diff --git a/src/mapleall/maple_me/include/pme_emit.h b/src/mapleall/maple_me/include/pme_emit.h index 9e26c40b6a..1a68b4620f 100644 --- a/src/mapleall/maple_me/include/pme_emit.h +++ b/src/mapleall/maple_me/include/pme_emit.h @@ -111,6 +111,9 @@ class PreMeEmitter : public AnalysisResult { ArrayNode *ConvertToArray(BaseNode &x, const TyIdx &ptrTyIdx); BaseNode *EmitPreMeExpr(MeExpr &meExpr, BaseNode *parent); StmtNode* EmitPreMeStmt(MeStmt &meStmt, BaseNode *parent); + template + void SetAssertBoundaryNode(const MeStmt &meStmt, const Stmt *assertBoundaryStmt, + Node *assertBoundaryNode, PreMeMIRExtension *pmeExt); void EmitBB(BB &bb, BlockNode &curBlk); DoloopNode *EmitPreMeDoloop(BB &meWhileBB, BlockNode &curBlk, PreMeWhileInfo &whileInfo); WhileStmtNode *EmitPreMeWhile(BB &meWhileBB, BlockNode &curBlk); diff --git a/src/mapleall/maple_me/src/alias_class.cpp b/src/mapleall/maple_me/src/alias_class.cpp index 1b2c6b672d..cd9ca23205 100644 --- a/src/mapleall/maple_me/src/alias_class.cpp +++ b/src/mapleall/maple_me/src/alias_class.cpp @@ -15,6 +15,7 @@ #include "alias_class.h" #include "mpl_logging.h" #include "opcode_info.h" +#include "opcodes.h" #include "ssa_mir_nodes.h" #include "mir_function.h" #include "mir_builder.h" @@ -237,6 +238,9 @@ OffsetType AliasClass::OffsetInBitOfArrayElement(const ArrayNode *arrayNode) { static void UpdateFieldIdAndPtrType(const MIRType &baseType, FieldID baseFieldId, OffsetType &offset, TyIdx &memPtrTyIdx, FieldID &fieldId) { MIRType *memPtrType = GlobalTables::GetTypeTable().GetTypeFromTyIdx(memPtrTyIdx); + if (memPtrType->IsScalarType() && IsPotentialAddress(memPtrType->GetPrimType())) { + return; + } ASSERT(memPtrType->IsMIRPtrType(), "tyIdx is TyIdx of iread/iassign, must be pointer type!"); auto *memType = static_cast(memPtrType)->GetPointedType(); if (fieldId != 0) { @@ -410,6 +414,7 @@ AliasInfo AliasClass::CreateAliasInfoExpr(BaseNode &expr) { } else { ASSERT(expr.GetOpCode() == OP_add, "Wrong operation!"); } + // use static_cast to avoid overflow from triggering err in debug compile, do not delete cast OffsetType newOffset = aliasInfo.offset + static_cast(constVal) * static_cast(kBitsPerByte); return AliasInfo(aliasInfo.vst, aliasInfo.fieldID, newOffset); } @@ -549,7 +554,8 @@ void AliasClass::ApplyUnionForFieldsInCopiedAgg() { auto *zeroVersionStOfFieldOstRHS = ssaTab.GetVersionStTable().GetOrCreateZeroVersionSt(*fieldOstRHS); RecordAliasAnalysisInfo(*zeroVersionStOfFieldOstRHS); RecordAliasAnalysisInfo(*zeroVersionStOfFieldOstLHS); - if (IsNextLevNotAllDefsSeen(fieldOstLHS->GetZeroVersionIndex())) { + if (IsNextLevNotAllDefsSeen(fieldOstLHS->GetZeroVersionIndex()) || + IsNextLevNotAllDefsSeen(lhsost->GetZeroVersionIndex())) { ASSERT_NOT_NULL(fieldOstRHS); SetNextLevNotAllDefsSeen(fieldOstRHS->GetZeroVersionIndex()); } @@ -598,6 +604,23 @@ bool AliasClass::SetNextLevNADSForEscapePtr(const VersionSt &lhsVst, BaseNode &r return false; } +bool AliasClass::EfficientUnionTarget(const OriginalSt &ost, const BaseNode &expr) { + PrimType primType = ost.GetType()->GetPrimType(); + if (primType != PTY_agg && !(IsPrimitiveInteger(primType) && GetPrimTypeSize(primType) == GetPrimTypeSize(PTY_ptr))) { + return false; + } + if (kOpcodeInfo.NotPure(expr.GetOpCode())) { + return false; + } + if (HasMallocOpnd(&expr)) { + return false; + } + if (expr.GetOpCode() == OP_addrof && IsReadOnlyOst(ost)) { + return false; + } + return true; +} + void AliasClass::ApplyUnionForDassignCopy(const VersionSt &lhsVst, VersionSt *rhsVst, BaseNode &rhs) { if (SetNextLevNADSForEscapePtr(lhsVst, rhs)) { return; @@ -642,10 +665,7 @@ void AliasClass::ApplyUnionForDassignCopy(const VersionSt &lhsVst, VersionSt *rh SetNextLevNotAllDefsSeen(lhsVst.GetIndex()); return; } - PrimType rhsPtyp = rhsOst->GetType()->GetPrimType(); - if (!(IsPrimitiveInteger(rhsPtyp) && GetPrimTypeSize(rhsPtyp) == GetPrimTypeSize(PTY_ptr)) || - kOpcodeInfo.NotPure(rhs.GetOpCode()) || HasMallocOpnd(&rhs) || - (rhs.GetOpCode() == OP_addrof && IsReadOnlyOst(*rhsOst))) { + if (!EfficientUnionTarget(*rhsOst, rhs)) { return; } unionFind.Union(lhsVst.GetIndex(), rhsVst->GetIndex()); @@ -968,29 +988,37 @@ void AliasClass::SetTypeUnsafeForTypeConversion(const VersionSt *lhsVst, BaseNod void AliasClass::ApplyUnionForIntrinsicCall(const IntrinsiccallNode &intrinsicCall) { auto intrinsicId = intrinsicCall.GetIntrinsic(); - bool opndsNextLevNADS = (intrinsicId == INTRN_JAVA_POLYMORPHIC_CALL); + auto *intrinsicDesc = &IntrinDesc::intrinTable[intrinsicCall.GetIntrinsic()]; + bool opndsNextLevNADS = (intrinsicId == INTRN_JAVA_POLYMORPHIC_CALL) || intrinsicDesc->IsMemoryBarrier(); for (uint32 i = 0; i < intrinsicCall.NumOpnds(); ++i) { auto opnd = intrinsicCall.Opnd(i); const AliasInfo &ainfo = CreateAliasInfoExpr(*opnd); + if (!ainfo.vst) { + continue; + } if (opndsNextLevNADS) { SetPtrOpndNextLevNADS(*opnd, ainfo.vst, false); } - - // intrinsic call memset/memcpy return value of first opnd. - // create copy relation between first opnd and the returned value. - if (i == 0 && intrinsicCall.GetOpCode() == OP_intrinsiccallassigned && - (intrinsicId == INTRN_C_memset || intrinsicId == INTRN_C_memcpy)) { - auto &mustDefs = ssaTab.GetStmtsSSAPart().GetMustDefNodesOf(intrinsicCall); - if (mustDefs.empty()) { - continue; - } - CHECK_FATAL(mustDefs.size() == 1, "multi-assign-part for C_memset/memcpy not supported"); - auto *assignedPtr = mustDefs.front().GetResult(); - if (ainfo.vst == nullptr) { - continue; - } - ApplyUnionForDassignCopy(*ainfo.vst, assignedPtr, *opnd); + if (intrinsicDesc->ReadNthOpnd(i) || intrinsicDesc->WriteNthOpnd(i)) { + (void)FindOrCreateVstOfExtraLevOst(*opnd, ainfo.vst->GetOst()->GetType()->GetTypeIndex(), 0, true, false); } + // intrinsic calls may return value of opnd. + // create copy relation between opnd and the returned value. + if (!IsCallAssigned(intrinsicCall.GetOpCode())) { + continue; + } + if (!intrinsicDesc->ReturnNthOpnd(i)) { + continue; + } + auto &mustDefs = ssaTab.GetStmtsSSAPart().GetMustDefNodesOf(intrinsicCall); + if (mustDefs.empty()) { + continue; + } + CHECK_FATAL(mustDefs.size() == 1, "multi-assign-part for intrinsics not supported"); + if (ainfo.vst == nullptr) { + continue; + } + ApplyUnionForDassignCopy(*ainfo.vst, mustDefs.front().GetResult(), *opnd); } } @@ -1036,19 +1064,19 @@ void AliasClass::ApplyUnionForCommonDirectCalls(StmtNode &stmt) { if (desc.IsReturnNoAlias() && desc.IsArgReadSelfOnly(i)) { continue; } + auto *vst = ainfo.vst; if (desc.IsReturnNoAlias() && desc.IsArgReadMemoryOnly(i) && - ainfo.vst != nullptr && ssaTab.GetNextLevelOsts(*ainfo.vst) != nullptr) { + vst != nullptr && ssaTab.GetNextLevelOsts(*ainfo.vst) != nullptr) { // Arg reads memory, we should set mayUse(*arg) here. // If it has next level, memory alias of its nextLev will be inserted to MayUse later. // If it has no next level, no elements will be inserted thru this arg. continue; } - SetPtrOpndNextLevNADS(*stmt.Opnd(i), ainfo.vst, hasnoprivatedefeffect); - SetPtrFieldsOfAggNextLevNADS(stmt.Opnd(i), ainfo.vst); + SetPtrOpndNextLevNADS(*stmt.Opnd(i), vst, hasnoprivatedefeffect); + SetPtrFieldsOfAggNextLevNADS(stmt.Opnd(i), vst); if (!desc.NoDirectGlobleAccess()) { continue; } - auto *vst = ainfo.vst; if (!vst) { continue; } @@ -1160,7 +1188,11 @@ void AliasClass::ApplyUnionForCopies(StmtNode &stmt) { break; } case OP_intrinsiccall: - case OP_intrinsiccallassigned: { + case OP_xintrinsiccall: + case OP_intrinsiccallassigned: + case OP_xintrinsiccallassigned: + case OP_intrinsiccallwithtype: + case OP_intrinsiccallwithtypeassigned: { ApplyUnionForIntrinsicCall(static_cast(stmt)); break; } @@ -1231,7 +1263,14 @@ void AliasClass::DumpAssignSets() { } else { LogInfo::MapleLogger() << "Members of assign set " << vstIdx << ": "; for (auto valueAliasVst : *assignSet) { - ssaTab.GetVerSt(valueAliasVst)->Dump(); + auto *valueAliasvst = ssaTab.GetVerSt(valueAliasVst); + valueAliasvst->Dump(); + if (IsNextLevNotAllDefsSeen(valueAliasVst)) { + LogInfo::MapleLogger() << "*"; + } + if (IsNotAllDefsSeen(valueAliasvst->GetOrigIdx())) { + LogInfo::MapleLogger() << "? "; + } LogInfo::MapleLogger() << ", "; } LogInfo::MapleLogger() << '\n'; @@ -1412,8 +1451,7 @@ void AliasClass::ApplyUnionForPointedTos() { // or if any has nextLevNotAllDefsSeen being true bool hasNextLevNotAllDefsSeen = false; for (auto vstIdxB : *assignSet) { - auto *ost = ssaTab.GetVerSt(vstIdxB)->GetOst(); - if (ost->GetIndirectLev() > 0 || IsNotAllDefsSeen(ost->GetIndex()) || IsNextLevNotAllDefsSeen(vstIdxB)) { + if (HasNextLevelNotAllDefSeen(vstIdxB)) { hasNextLevNotAllDefsSeen = true; break; } @@ -1881,11 +1919,6 @@ void AliasClass::CreateClassSets() { #endif } -void AliasElem::Dump() const { - ost.Dump(); - LogInfo::MapleLogger() << "id" << id << ((notAllDefsSeen) ? "? " : " "); -} - void AliasClass::DumpClassSets(bool onlyDumpRoot) { LogInfo::MapleLogger() << "/////// class sets ///////\n"; for (auto *ost : ssaTab.GetOriginalStTable()) { @@ -2488,11 +2521,13 @@ void AliasClass::CollectMayUseForIntrnCallOpnd(const StmtNode &stmt, OstPtrSet &mayDefOsts, OstPtrSet &mayUseOsts) { auto &intrinNode = static_cast(stmt); IntrinDesc *intrinDesc = &IntrinDesc::intrinTable[intrinNode.GetIntrinsic()]; - if (intrinDesc->IsAtomic()) { + if (intrinDesc->IsMemoryBarrier()) { // No matter which memorder is selected or whether the atomic operation defines ost or not, // args or globals will be considered as being rewritten by other threads and hence need to be reloaded CollectMayUseFromGlobalsAffectedByCalls(mayDefOsts); CollectMayUseFromFormals(mayDefOsts, false); + mayDefOsts.insert(nadsOsts.begin(), nadsOsts.end()); + mayUseOsts.insert(nadsOsts.begin(), nadsOsts.end()); } for (uint32 opndId = 0; opndId < stmt.NumOpnds(); ++opndId) { BaseNode *expr = stmt.Opnd(opndId); @@ -2506,20 +2541,10 @@ void AliasClass::CollectMayUseForIntrnCallOpnd(const StmtNode &stmt, if (vst->GetOst()->GetType()->PointsToConstString()) { continue; } + OstPtrSet mayDefUseOsts; CollectMayDefUseForIthOpnd(*vst, mayDefUseOsts, stmt, opndId == 0); - bool writeOpnd = intrinDesc->WriteNthOpnd(opndId); - if (mayDefUseOsts.size() == 0 && writeOpnd) { - // create next-level ost as it not seen before - auto nextLevOst = ssaTab.FindOrCreateExtraLevOst(*vst, vst->GetOst()->GetTyIdx(), 0, OffsetType(0)); - CHECK_FATAL(nextLevOst != nullptr, "Failed to create next-level ost"); - auto *zeroVersionOfNextLevOst = ssaTab.GetVerSt(nextLevOst->GetZeroVersionIndex()); - RecordAliasAnalysisInfo(*zeroVersionOfNextLevOst); - // add this into nads - (void)nadsOsts.insert(nextLevOst); - mayDefUseOsts.insert(nadsOsts.begin(), nadsOsts.end()); - } - if (writeOpnd) { + if (intrinDesc->WriteNthOpnd(opndId)) { mayDefOsts.insert(mayDefUseOsts.begin(), mayDefUseOsts.end()); } if (intrinDesc->ReadNthOpnd(opndId)) { diff --git a/src/mapleall/maple_me/src/cast_opt.cpp b/src/mapleall/maple_me/src/cast_opt.cpp index e4848d12a4..36ff851b05 100644 --- a/src/mapleall/maple_me/src/cast_opt.cpp +++ b/src/mapleall/maple_me/src/cast_opt.cpp @@ -711,9 +711,10 @@ BaseNode *MapleCastOpt::SimplifyCastPair(MIRBuilder &mirBuidler, const BaseNodeC bool isFirstCastImplicit = !IsExplicitCastOp(firstCastExpr->GetOpCode()); if (isFirstCastImplicit) { // Wrong example: zext u32 u8 (iread u32 <* u16>) =[x]=> iread u32 <* u16> + // Wrong example: sext u32 8 (iread u32 <* u8>) =[x]=> iread u32 <* u8> // srcType may be modified, we should use origSrcType if (resultCastKind != CAST_unknown && dstType == midType1 && - GetPrimTypeActualBitSize(midType2) >= GetPrimTypeActualBitSize(origSrcType)) { + GetPrimTypeActualBitSize(midType2) > GetPrimTypeActualBitSize(origSrcType)) { return firstCastExpr; } else { return nullptr; diff --git a/src/mapleall/maple_me/src/copy_prop.cpp b/src/mapleall/maple_me/src/copy_prop.cpp index 5f9934c28f..be781a4324 100644 --- a/src/mapleall/maple_me/src/copy_prop.cpp +++ b/src/mapleall/maple_me/src/copy_prop.cpp @@ -180,8 +180,8 @@ bool CopyProp::CanPropSingleUse(const ScalarMeExpr &lhs, const MeExpr &rhs) { } int32 badPropCnt = 0; CheckLiveRange(rhs, badPropCnt); - static const int32 allowedBPC = 2; - return badPropCnt <= allowedBPC; + static const int32 kAllowedBPC = 2; + return badPropCnt <= kAllowedBPC; } void CopyProp::ReplaceSelfAssign() { diff --git a/src/mapleall/maple_me/src/demand_driven_alias_analysis.cpp b/src/mapleall/maple_me/src/demand_driven_alias_analysis.cpp index d01b13594a..60f8e47c50 100644 --- a/src/mapleall/maple_me/src/demand_driven_alias_analysis.cpp +++ b/src/mapleall/maple_me/src/demand_driven_alias_analysis.cpp @@ -781,26 +781,15 @@ void PEGBuilder::UpdateAttributes() const { } if (node->attr[kAliasAttrNotAllDefsSeen]) { for (auto *nextLevNode : node->nextLevNodes) { - auto &attr = nextLevNode->attr; - if (!attr[kAliasAttrNotAllDefsSeen]) { - attr[kAliasAttrNotAllDefsSeen] = true; - changed = true; - } + changed |= nextLevNode->UpdateAttr(kAliasAttrNotAllDefsSeen); } for (const auto &assignFrom : node->assignFrom) { - auto &attr = assignFrom.pegNode->attr; - if (!attr[kAliasAttrEscaped]) { - attr[kAliasAttrEscaped] = true; - changed = true; - } + changed |= assignFrom.pegNode->UpdateAttr(kAliasAttrEscaped); + changed |= assignFrom.pegNode->UpdateAttr(kAliasAttrNextLevNotAllDefsSeen); } // update alias attribute of assign-to nodes for (const auto &assignTo : node->assignTo) { - auto &attr = assignTo.pegNode->attr; - if (!attr[kAliasAttrNextLevNotAllDefsSeen]) { - attr[kAliasAttrNextLevNotAllDefsSeen] = true; - changed = true; - } + changed |= assignTo.pegNode->UpdateAttr(kAliasAttrNextLevNotAllDefsSeen); } // AliasAttrNotAllDefsSeen is the most conservative attribute, we can stop to update other attr. continue; @@ -808,49 +797,36 @@ void PEGBuilder::UpdateAttributes() const { if (node->attr[kAliasAttrNextLevNotAllDefsSeen]) { for (auto *nextLevNode : node->nextLevNodes) { - auto &attr = nextLevNode->attr; - if (!attr[kAliasAttrNotAllDefsSeen]) { - attr[kAliasAttrNotAllDefsSeen] = true; - changed = true; - } + changed |= nextLevNode->UpdateAttr(kAliasAttrNotAllDefsSeen); + } + for (const auto &assignFrom : node->assignFrom) { + changed |= assignFrom.pegNode->UpdateAttr(kAliasAttrNextLevNotAllDefsSeen); + } + // update alias attribute of assign-to nodes + for (const auto &assignTo : node->assignTo) { + changed |= assignTo.pegNode->UpdateAttr(kAliasAttrNextLevNotAllDefsSeen); } } if (node->attr[kAliasAttrGlobal]) { for (auto *nextLevNode : node->nextLevNodes) { - auto &attr = nextLevNode->attr; - if (!attr[kAliasAttrNotAllDefsSeen]) { - attr[kAliasAttrNotAllDefsSeen] = true; - changed = true; - } + changed |= nextLevNode->UpdateAttr(kAliasAttrNotAllDefsSeen); } } if (node->attr[kAliasAttrFormal]) { for (auto *nextLevNode : node->nextLevNodes) { - auto &attr = nextLevNode->attr; - if (!attr[kAliasAttrNotAllDefsSeen]) { - attr[kAliasAttrNotAllDefsSeen] = true; - changed = true; - } + changed |= nextLevNode->UpdateAttr(kAliasAttrNotAllDefsSeen); } } // update alias attribute of next-level nodes if (node->attr[kAliasAttrEscaped]) { for (auto *nextLevNode : node->nextLevNodes) { - auto &attr = nextLevNode->attr; - if (!attr[kAliasAttrNextLevNotAllDefsSeen]) { - attr[kAliasAttrNextLevNotAllDefsSeen] = true; - changed = true; - } + changed |= nextLevNode->UpdateAttr(kAliasAttrNotAllDefsSeen); } for (auto &assignFrom : node->assignFrom) { - auto &attr = assignFrom.pegNode->attr; - if (!attr[kAliasAttrEscaped]) { - attr[kAliasAttrEscaped] = true; - changed = true; - } + changed |= assignFrom.pegNode->UpdateAttr(kAliasAttrEscaped); } } diff --git a/src/mapleall/maple_me/src/dse.cpp b/src/mapleall/maple_me/src/dse.cpp index b482247ad5..7e36d789b5 100644 --- a/src/mapleall/maple_me/src/dse.cpp +++ b/src/mapleall/maple_me/src/dse.cpp @@ -175,10 +175,11 @@ bool DSE::StmtMustRequired(const StmtNode &stmt, const BB &bb) const { if (IsStmtMustRequire(op)) { return true; } - // atomic intrinsic call cannot be eliminated + + // Cannot delete special intrinsiccalls and membarriers. if (op == OP_intrinsiccall) { - IntrinDesc *intrinDesc = &IntrinDesc::intrinTable[static_cast(stmt).GetIntrinsic()]; - if (intrinDesc->IsAtomic()) { + auto &intrinDesc = static_cast(stmt).GetIntrinsicDescription(); + if (intrinDesc.IsMemoryBarrier() || intrinDesc.IsSpecial()) { return true; } } diff --git a/src/mapleall/maple_me/src/hdse.cpp b/src/mapleall/maple_me/src/hdse.cpp index abc00836d9..0b92875930 100644 --- a/src/mapleall/maple_me/src/hdse.cpp +++ b/src/mapleall/maple_me/src/hdse.cpp @@ -820,11 +820,15 @@ bool HDSE::StmtMustRequired(const MeStmt &meStmt, const BB &bb) const { if (IsStmtMustRequire(op) || op == OP_comment) { return true; } - // Cannot delete a statement with a divisor of 0. - if (op == OP_intrinsiccall && - static_cast(meStmt).GetIntrinsic() == INTRN_C___builtin_division_exception) { - return true; + + // Cannot delete special intrinsiccalls and membarriers. + if (op == OP_intrinsiccall) { + auto &intrinDesc = static_cast(meStmt).GetIntrinsicDescription(); + if (intrinDesc.IsMemoryBarrier() || intrinDesc.IsSpecial()) { + return true; + } } + // control flow in an infinite loop cannot be eliminated if (ControlFlowInInfiniteLoop(bb, op)) { return true; diff --git a/src/mapleall/maple_me/src/irmap.cpp b/src/mapleall/maple_me/src/irmap.cpp index 6dd9e1a383..40dd2c858f 100644 --- a/src/mapleall/maple_me/src/irmap.cpp +++ b/src/mapleall/maple_me/src/irmap.cpp @@ -22,6 +22,7 @@ #include "mir_builder.h" #include "constantfold.h" #include "cast_opt.h" +#include "me_expr_utils.h" namespace maple { void IRMap::UpdateIncDecAttr(MeStmt &meStmt) const { @@ -1292,7 +1293,7 @@ static MeExpr *SimplifyBandWithConst(IRMap &irMap, const OpMeExpr &bandExpr) { auto opExpr = static_cast(opnd0); auto offset = opExpr->GetBitsOffSet(); auto size = opExpr->GetBitsSize(); - if (offset == 0 && (1ull << size) > c1.GetZXTValue()) { + if (offset == 0UL && (1ULL << size) > c1.GetZXTValue()) { return irMap.CreateMeExprBinary(OP_band, bandExpr.GetPrimType(), *opnd0->GetOpnd(0), *opnd1); } } @@ -1316,11 +1317,11 @@ static MeExpr *DoBandEliminate(const OpMeExpr &bandExpr) { if (expr2->GetMeOp() != kMeOpConst) { return nullptr; } - auto srcType = expr1->GetPrimType(); + auto srcType = opnd0->GetPrimType(); auto c1 = static_cast(opnd1)->GetIntValue().TruncOrExtend(srcType); auto c2 = static_cast(expr2)->GetIntValue().TruncOrExtend(srcType); auto c3 = ~c1.TruncOrExtend(srcType); - if (c2.GetZXTValue() >= GetPrimTypeBitSize(expr1->GetPrimType())) { + if (c2.GetZXTValue() >= GetPrimTypeActualBitSize(expr1->GetPrimType())) { return nullptr; } if (opnd0->GetOp() == OP_lshr) { @@ -1362,6 +1363,11 @@ MeExpr *IRMap::SimplifyBandExpr(const OpMeExpr *bandExpr) { return opnd0; } + // should be simplified by const fold + if (opnd0->GetMeOp() == kMeOpConst && opnd1->GetMeOp() == kMeOpConst) { + return nullptr; + } + if (MeExpr *res = SimplifyBandWithConst(*this, *bandExpr)) { return res; } @@ -1374,6 +1380,10 @@ MeExpr *IRMap::SimplifyBandExpr(const OpMeExpr *bandExpr) { return res; } + if (MeExpr *res = SimplifyMultiUseByDemanded(*this, *bandExpr)) { + return res; + } + if (IsCompareHasReverseOp(opnd0->GetOp()) || IsCompareHasReverseOp(opnd1->GetOp())) { return ConstantFold::FoldCmpExpr(*this, *opnd0, *opnd1, true); } @@ -2087,7 +2097,7 @@ class BitPart { // the source oprand. MeExpr *provider; - // provenance[A] = B means that bit A in Provider becomes bit B in the result of expression. + // provenance[A] = B means that bit B in Provider becomes bit A in the result of expression. std::vector provenance; static constexpr int kUnset = -1; @@ -2223,6 +2233,26 @@ std::optional &CollectBitparts(MeExpr *expr, std::map(expr)->GetIntrinsic(); + if (incID < INTRN_C_rev16_2 || incID > INTRN_C_bswap64) { + return result; + } + auto &res = CollectBitparts(expr->GetOpnd(0), bps, depth + 1); + if (!res) { + return result; + } + result = BitPart(res->provider, bitwidth); + auto byteWidth = bitwidth / k8BitSize; + for (uint32 byteIdx = 0; byteIdx < byteWidth; ++byteIdx) { + for (uint32 bitIdx = 0; bitIdx < k8BitSize; ++bitIdx) { + result->provenance[byteIdx * k8BitSize + bitIdx] = + res->provenance[(bitwidth - (byteIdx + 1) * k8BitSize) + bitIdx]; + } + } + return result; + } + result = BitPart(expr, bitwidth); for (uint8 i = 0; i < bitwidth; ++i) { result->provenance[i] = static_cast(i); @@ -2232,12 +2262,12 @@ std::optional &CollectBitparts(MeExpr *expr, std::map to) is symmetry about bitwidth static bool BitMapIsValidForReverse(uint32 from, uint32 to, uint32 bitwidth) { - if (from % 8 != to % 8) { + if (from % k8BitSize != to % k8BitSize) { return false; } - from >>= 3; - to >>= 3; - bitwidth >>= 3; + from >>= k3BitSize; + to >>= k3BitSize; + bitwidth >>= k3BitSize; return from == (bitwidth - to - 1); } @@ -2478,14 +2508,23 @@ MeExpr *IRMap::SimplifyOrMeExpr(OpMeExpr *opmeexpr) { if (opcode != OP_bior) { return nullptr; } + MeExpr *opnd0 = opmeexpr->GetOpnd(0); + MeExpr *opnd1 = opmeexpr->GetOpnd(1); + + // should be simplified by const fold + if (opnd0->GetMeOp() == kMeOpConst && opnd1->GetMeOp() == kMeOpConst) { + return nullptr; + } if (MeExpr *res = PullOutZext(*this, *opmeexpr)) { return res; } + if (MeExpr *res = SimplifyMultiUseByDemanded(*this, *opmeexpr)) { + return res; + } + auto bitwidth = GetPrimTypeBitSize(opmeexpr->GetPrimType()); - MeExpr *opnd0 = opmeexpr->GetOpnd(0); - MeExpr *opnd1 = opmeexpr->GetOpnd(1); Opcode opcode0 = opnd0->GetOp(); Opcode opcode1 = opnd1->GetOp(); @@ -2554,7 +2593,13 @@ MeExpr *IRMap::SimplifyOrMeExpr(OpMeExpr *opmeexpr) { demandBitWidth = static_cast(bitProvenance.size()); } + IntVal demandedBits(IntVal::kAllOnes, demandBitWidth, false); + for (uint8 i = 0; i < demandBitWidth; ++i) { + if (bitProvenance[i] == BitPart::kUnset) { + demandedBits.ClearBit(i); + continue; + } if (!BitMapIsValidForReverse(i, static_cast(bitProvenance[i]), demandBitWidth)) { return nullptr; } @@ -2576,6 +2621,10 @@ MeExpr *IRMap::SimplifyOrMeExpr(OpMeExpr *opmeexpr) { } auto provider = res->provider; + if (!demandedBits.AreAllBitsOne()) { + provider = + CreateMeExprBinary(OP_band, demandType, *provider, *CreateIntConstMeExpr(demandedBits.ByteSwap(), demandType)); + } NaryMeExpr revExpr(&irMapAlloc, kInvalidExprID, OP_intrinsicop, demandType, 1, TyIdx(0), intrin, false); revExpr.PushOpnd(provider); auto result = CreateNaryMeExpr(revExpr); @@ -2727,12 +2776,21 @@ MeExpr *IRMap::SimplifyXorMeExpr(OpMeExpr *opmeexpr) { return nullptr; } + auto opnd0 = opmeexpr->GetOpnd(0); + auto opnd1 = opmeexpr->GetOpnd(1); + // should be simplified by const fold + if (opnd0->GetMeOp() == kMeOpConst && opnd1->GetMeOp() == kMeOpConst) { + return nullptr; + } + if (MeExpr *res = PullOutZext(*this, *opmeexpr)) { return res; } - auto opnd0 = opmeexpr->GetOpnd(0); - auto opnd1 = opmeexpr->GetOpnd(1); + if (MeExpr *res = SimplifyMultiUseByDemanded(*this, *opmeexpr)) { + return res; + } + // (X & C) ^ (Y & C) --> (X ^ Y) & C if (opnd0->GetOp() == OP_band && opnd1->GetOp() == OP_band) { auto constExpr1 = opnd0->GetOpnd(1); diff --git a/src/mapleall/maple_me/src/irmap_emit.cpp b/src/mapleall/maple_me/src/irmap_emit.cpp index 4c320548bd..8235da9942 100644 --- a/src/mapleall/maple_me/src/irmap_emit.cpp +++ b/src/mapleall/maple_me/src/irmap_emit.cpp @@ -16,13 +16,47 @@ #include "me_ir.h" #include "irmap.h" #include "mir_builder.h" +#include "mir_nodes.h" #include "orig_symbol.h" +#include "mem_reference_table.h" namespace maple { static MIRFunction *GetCurFunction() { return theMIRModule->CurFunction(); } +static void CollectMemDefUseInfo(StmtNode &stmt, MeStmt &meStmt) { + auto *memReferenceTable = GetCurFunction()->GetMemReferenceTable(); + if (!memReferenceTable) { + return; + } + auto *memDefUse = memReferenceTable->GetOrCreateMemDefUseFromBaseNode(&stmt); + if (meStmt.GetMuList()) { + for (auto pair : *meStmt.GetMuList()) { + (void)memDefUse->GetUseSet().insert(pair.first); + } + } + if (meStmt.GetChiList()) { + for (auto pair : *meStmt.GetChiList()) { + (void)memDefUse->GetDefSet().insert(pair.first); + } + } +} + +static void CollectMemMu(IreadNode &iread, IvarMeExpr &ivar) { + auto *memReferenceTable = GetCurFunction()->GetMemReferenceTable(); + if (!memReferenceTable) { + return; + } + auto *memDefUse = memReferenceTable->GetOrCreateMemDefUseFromBaseNode(&iread); + for (auto *scalar : ivar.GetMuList()) { + if (!scalar) { + continue; + } + (void)memDefUse->GetUseSet().insert(scalar->GetOstIdx()); + } +} + bool VarMeExpr::IsValidVerIdx() const { if (!GetOst()->IsSymbolOst()) { return false; @@ -272,6 +306,7 @@ BaseNode &IvarMeExpr::EmitExpr(MapleAllocator &alloc) { ASSERT(ireadNode->GetPrimType() != kPtyInvalid, ""); ASSERT(tyIdx != 0, "wrong tyIdx for iread node in me emit"); ireadNode->SetTyIdx(tyIdx); + CollectMemMu(*ireadNode, *this); return *ireadNode; } @@ -689,6 +724,7 @@ void BB::EmitBB(BlockNode &curblk, bool needAnotherPass) { } } StmtNode *stmt = &meStmt.EmitStmt(GetCurFunction()->GetCodeMPAllocator()); + CollectMemDefUseInfo(*stmt, meStmt); stmt->SetSrcPos(meStmt.GetSrcPosition()); stmt->SetOriginalID(meStmt.GetOriginalId()); stmt->CopySafeRegionAttr(meStmt.GetStmtAttr()); diff --git a/src/mapleall/maple_me/src/mc_ssa_pre.cpp b/src/mapleall/maple_me/src/mc_ssa_pre.cpp index 114e4fb6b7..898c23deab 100644 --- a/src/mapleall/maple_me/src/mc_ssa_pre.cpp +++ b/src/mapleall/maple_me/src/mc_ssa_pre.cpp @@ -150,7 +150,7 @@ void McSSAPre::DumpRGToFile() { mirModule->GetOut() << "++++ ssapre candidate " << workCand->GetIndex() << " dumped to " << fileName << "\n"; } -bool McSSAPre::IncludedEarlier(Visit **cut, const Visit &curVisit, uint32 nextRouteIdx) const { +bool McSSAPre::IncludedEarlier(Visit * const *cut, const Visit &curVisit, uint32 nextRouteIdx) const { uint32 i = nextRouteIdx; while (i != 0) { i--; diff --git a/src/mapleall/maple_me/src/me_bb_layout.cpp b/src/mapleall/maple_me/src/me_bb_layout.cpp index 6e9d0e5162..5b27f55cc7 100644 --- a/src/mapleall/maple_me/src/me_bb_layout.cpp +++ b/src/mapleall/maple_me/src/me_bb_layout.cpp @@ -1037,7 +1037,7 @@ BB *BBLayout::NextBBProf(BB &bb) { return GetBBFromEdges(); } -void BBLayout::RebuildFreq() { +void BBLayout::RebuildFreq(BuiltinExpectInfo *expectInfo) { auto *hook = phase->GetAnalysisInfoHook(); hook->ForceEraseAnalysisPhase(func.GetUniqueID(), &MEDominance::id); hook->ForceEraseAnalysisPhase(func.GetUniqueID(), &MELoopAnalysis::id); @@ -1051,14 +1051,15 @@ void BBLayout::RebuildFreq() { hook->ForceRunAnalysisPhase>(&MELoopAnalysis::id, func)) ->GetResult(); if (!cfg->UpdateCFGFreq()) { - MePrediction::RebuildFreq(func, *dom, *pdom, *meLoop); + MePrediction::RebuildFreq(func, *dom, *pdom, *meLoop, expectInfo); } } void BBLayout::LayoutWithProf(bool useChainLayout) { OptimiseCFG(); // We rebuild freq after OptimiseCFG - RebuildFreq(); + BuiltinExpectInfo savedExpectInfo; + RebuildFreq(&savedExpectInfo); if (enabledDebug) { cfg->DumpToFile("cfgopt", false, true); } @@ -1096,6 +1097,7 @@ void BBLayout::LayoutWithProf(bool useChainLayout) { (void)CreateGotoBBAfterCondBB(*lastBB, *fallthru); } } + MePrediction::RecoverBuiltinExpectInfo(savedExpectInfo); } void BBLayout::RunLayout() { diff --git a/src/mapleall/maple_me/src/me_cfg_opt.cpp b/src/mapleall/maple_me/src/me_cfg_opt.cpp index 6dba1aa0ef..80116d9f5d 100644 --- a/src/mapleall/maple_me/src/me_cfg_opt.cpp +++ b/src/mapleall/maple_me/src/me_cfg_opt.cpp @@ -338,7 +338,7 @@ bool CheckAnalysisResult(const MeFunction &func) { return false; } -extern void ResetDependentedSymbolLive(MIRFunction *mirFunction); +extern void ResetDependentedSymbolLive(MIRFunction *mirFunction); // circular dependency exists, no other choice void EmitMapleIr(MeFunction &func) { CHECK_FATAL(func.HasLaidOut(), "Check bb layout phase."); diff --git a/src/mapleall/maple_me/src/me_combine_expr.cpp b/src/mapleall/maple_me/src/me_combine_expr.cpp new file mode 100644 index 0000000000..2bd3e25bd7 --- /dev/null +++ b/src/mapleall/maple_me/src/me_combine_expr.cpp @@ -0,0 +1,470 @@ +/* + * Copyright (c) [2023] Huawei Technologies Co.,Ltd.All rights reserved. + * + * OpenArkCompiler is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * + * http://license.coscl.org.cn/MulanPSL2 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ + +#include "me_combine_expr.h" + +#include "cast_opt.h" +#include "me_expr_utils.h" +#include "me_irmap_build.h" + +namespace maple { + +bool ExprCombiner::HasOneUse(const MeExpr &expr) { + auto site = useInfo.GetUseSitesOfExpr(&expr); + return site && site->size() == 1 && site->front().GetRef() == 1; +} + +MeExpr *ExprCombiner::SimplifyIntrinsicByDUB(const MeExpr &expr, const IntVal &demanded) { + auto intrinsicID = static_cast(expr).GetIntrinsic(); + if (intrinsicID >= INTRN_C_rev_4 && intrinsicID <= INTRN_C_bswap64) { + auto bitwidth = GetPrimTypeBitSize(expr.GetPrimType()); + uint32 lzeroNum = demanded.CountLeadingZeros(); + uint32 rzeroNum = demanded.CountTrallingZeros(); + // aligndown to 8 + lzeroNum &= ~(k8BitSize - 1); + rzeroNum &= ~(k8BitSize - 1); + if (demanded.GetBitWidth() > bitwidth) { + lzeroNum -= demanded.GetBitWidth() - bitwidth; + } + // if there is exactly 1 byte which is not zero + if (lzeroNum + rzeroNum + k8BitSize == bitwidth) { + auto shiftOp = lzeroNum > rzeroNum ? OP_lshr : OP_shl; + auto shiftNum = lzeroNum > rzeroNum ? lzeroNum - rzeroNum : rzeroNum - lzeroNum; + auto newOpnd0 = irMap.CreateMeExprBinary(shiftOp, expr.GetPrimType(), *expr.GetOpnd(0), + *irMap.CreateIntConstMeExpr(shiftNum, expr.GetPrimType())); + return newOpnd0; + } + } + + return nullptr; +} + +MeExpr *ExprCombiner::SimplifyDemandedUseBits(MeExpr &expr, const IntVal &demanded, BitValue &known, uint32 depth) { + // exprs having multi uses are not simplified, otherwise it will block some epre oppotunities + if (depth != 0 && !HasOneUse(expr)) { + return nullptr; + } + + auto op = expr.GetOp(); + auto bitWidth = demanded.GetBitWidth(); + BitValue lhsKnown(bitWidth); + BitValue rhsKnown(bitWidth); + switch (op) { + case OP_band: { + auto opnd0 = expr.GetOpnd(0); + auto opnd1 = expr.GetOpnd(1); + if (auto newExpr = SimplifyDemandedUseBits(*opnd1, demanded, rhsKnown, depth + 1)) { + ReplaceExprInExpr(expr, *newExpr, 1); + return nullptr; + } + if (auto newExpr = SimplifyDemandedUseBits(*opnd0, demanded & ~rhsKnown.zeroBits, lhsKnown, depth + 1)) { + ReplaceExprInExpr(expr, *newExpr, 0); + return nullptr; + } + return SimplifyBinOpByDemanded(irMap, expr, demanded, known, lhsKnown, rhsKnown); + } + case OP_bior: { + auto opnd0 = expr.GetOpnd(0); + auto opnd1 = expr.GetOpnd(1); + if (auto newExpr = SimplifyDemandedUseBits(*opnd1, demanded, rhsKnown, depth + 1)) { + ReplaceExprInExpr(expr, *newExpr, 1); + return nullptr; + } + if (auto newExpr = SimplifyDemandedUseBits(*opnd0, demanded & ~rhsKnown.oneBits, lhsKnown, depth + 1)) { + ReplaceExprInExpr(expr, *newExpr, 0); + return nullptr; + } + return SimplifyBinOpByDemanded(irMap, expr, demanded, known, lhsKnown, rhsKnown); + } + case OP_bxor: { + auto opnd0 = expr.GetOpnd(0); + auto opnd1 = expr.GetOpnd(1); + if (auto newExpr = SimplifyDemandedUseBits(*opnd1, demanded, rhsKnown, depth + 1)) { + ReplaceExprInExpr(expr, *newExpr, 1); + return nullptr; + } + if (auto newExpr = SimplifyDemandedUseBits(*opnd0, demanded, lhsKnown, depth + 1)) { + ReplaceExprInExpr(expr, *newExpr, 0); + return nullptr; + } + return SimplifyBinOpByDemanded(irMap, expr, demanded, known, lhsKnown, rhsKnown); + } + case OP_cvt: { + MeExprCastInfo castInfo(&expr); + MeCastOpt::ComputeCastInfo(castInfo); + if (!(castInfo.kind == CAST_zext || castInfo.kind == CAST_intTrunc)) { + break; + } + auto opnd = expr.GetOpnd(0); + auto srcWidth = GetPrimTypeActualBitSize(opnd->GetPrimType()); + auto demandedByOpnd = demanded.TruncOrExtend(static_cast(srcWidth), false); + BitValue opndBits(srcWidth); + if (auto newExpr = SimplifyDemandedUseBits(*opnd, demandedByOpnd, opndBits, depth + 1)) { + ReplaceExprInExpr(expr, *newExpr, 0); + return nullptr; + } + known = opndBits.TruncOrExtend(bitWidth); + break; + } + case OP_zext: { + auto opnd = expr.GetOpnd(0); + auto srcWidth = static_cast(expr).GetBitsSize(); + auto demandedByOpnd = demanded.TruncOrExtend(static_cast(srcWidth), false); + BitValue opndBits(srcWidth); + if (auto newExpr = SimplifyDemandedUseBits(*opnd, demandedByOpnd, opndBits, depth + 1)) { + ReplaceExprInExpr(expr, *newExpr, 0); + return nullptr; + } + known = opndBits.TruncOrExtend(bitWidth); + break; + } + case OP_intrinsicop: { + return SimplifyIntrinsicByDUB(expr, demanded); + } + default: + ComputeBitValueOfExpr(expr, demanded, known, depth); + break; + } + return nullptr; +} + +MeExpr *ExprCombiner::SimplifyByDemandedBits(OpMeExpr &expr) { + if (!IsPrimitiveInteger(expr.GetPrimType())) { + return nullptr; + } + auto bitWidth = GetPrimTypeBitSize(expr.GetPrimType()); + BitValue knownBits(bitWidth); + IntVal demandedBits(IntVal::kAllOnes, bitWidth, false); + + return SimplifyDemandedUseBits(expr, demandedBits, knownBits, 0); +} + +MeExpr *ExprCombiner::VisitBior(OpMeExpr &expr) { + if (auto res = SimplifyByDemandedBits(expr)) { + return res; + } + return nullptr; +} + +MeExpr *ExprCombiner::VisitBxor(OpMeExpr &expr) { + if (auto res = SimplifyByDemandedBits(expr)) { + return res; + } + return nullptr; +} + +MeExpr *ExprCombiner::VisitBand(OpMeExpr &expr) { + if (auto res = SimplifyByDemandedBits(expr)) { + return res; + } + return nullptr; +} + +/// return ture if \p c is equal after trunc by \p type +bool IsEqualByTrunc(const IntVal &c, PrimType type) { + return c.Trunc(type).GetZXTValue() == c.GetZXTValue(); +} + +// fold cmp(and(sh(a, c3), c2), c1) +static MeExpr *FoldCmpAndShift(IRMap &irMap, Opcode cmpOp, const MeExpr &andOpnd0, IntVal c1, const IntVal &c2) { + auto shiftOp = andOpnd0.GetOp(); + if (shiftOp == OP_cvt || shiftOp == OP_zext) { + auto opnd0 = andOpnd0.GetOpnd(0); + if (IsEqualByTrunc(c1, opnd0->GetPrimType()) && IsEqualByTrunc(c2, opnd0->GetPrimType())) { + return FoldCmpAndShift(irMap, cmpOp, *opnd0, c1.Trunc(opnd0->GetPrimType()), c2.Trunc(opnd0->GetPrimType())); + } + return nullptr; + } + if (!IsShift(shiftOp)) { + return nullptr; + } + auto c3 = GetIntConst(*andOpnd0.GetOpnd(1)); + MeExpr *shiftOpnd0 = andOpnd0.GetOpnd(0); + if (!c3) { + return nullptr; + } + IntVal newC1Val; + IntVal newC2Val; + bool shiftedOutBitsUsed; + auto type = andOpnd0.GetPrimType(); + if (!c2.IsSigned()) { + type = GetUnsignedPrimType(type); + } + if (c1.TruncOrExtend(type).GetZXTValue() != c1.GetZXTValue()) { + return nullptr; + } + c1.Assign(c1.TruncOrExtend(type)); + if (shiftOp == OP_shl) { + if ((c1.IsSigned() && c1.GetSignBit()) || (c2.IsSigned() && c2.GetSignBit())) { + return nullptr; + } + newC1Val = c1.LShr(c3->GetValue(), type); + newC2Val = c2.LShr(c3->GetValue(), type); + shiftedOutBitsUsed = newC1Val.Shl(c3->GetValue(), type) != c1; + } else if (shiftOp == OP_lshr) { + if ((c1.IsSigned() && c1.GetSignBit()) || (c2.IsSigned() && c2.GetSignBit())) { + return nullptr; + } + newC1Val = c1.Shl(c3->GetValue(), type); + newC2Val = c2.Shl(c3->GetValue(), type); + shiftedOutBitsUsed = newC1Val.LShr(c3->GetValue(), type) != c1; + } else { + ASSERT(shiftOp == OP_ashr, "Unknown shift opcode"); + newC1Val = c1.Shl(c3->GetValue(), type); + newC2Val = c2.Shl(c3->GetValue(), type); + shiftedOutBitsUsed = newC1Val.LShr(c3->GetValue(), type) != c1; + if (newC2Val.AShr(c3->GetValue(), type) != c2) { + return nullptr; + } + } + + // if shifted out bits are used, always not eq + if (shiftedOutBitsUsed) { + if (cmpOp == OP_eq) { + return irMap.CreateIntConstMeExpr(0, PTY_u1); + } + if (cmpOp == OP_ne) { + return irMap.CreateIntConstMeExpr(1, PTY_u1); + } + } else { + auto newAnd = irMap.CreateMeExprBinary(OP_band, type, *shiftOpnd0, *irMap.CreateIntConstMeExpr(newC2Val, type)); + auto newCmp = irMap.CreateMeExprCompare(cmpOp, PTY_u1, type, *newAnd, *irMap.CreateIntConstMeExpr(newC1Val, type)); + return newCmp; + } + (void)shiftOpnd0; + return nullptr; +} + +// fold cmp(binop(x, c2), c1) +MeExpr *ExprCombiner::FoldCmpBinOpWithConst(OpMeExpr &cmpExpr, const MeExpr &binOpExpr, const IntVal &c1) { + if (!HasOneUse(cmpExpr)) { + return nullptr; + } + auto cmpOp = cmpExpr.GetOp(); + if (!IsCompareHasReverseOp(cmpOp)) { + return nullptr; + } + auto op = binOpExpr.GetOp(); + auto opnd0 = binOpExpr.GetOpnd(0); + if (op == OP_cvt || op == OP_zext) { + if (IsEqualByTrunc(c1, opnd0->GetPrimType())) { + return FoldCmpBinOpWithConst(cmpExpr, *opnd0, c1.Trunc(opnd0->GetPrimType())); + } + } + if (cmpExpr.GetOpnd(1)->GetMeOp() != kMeOpConst && cmpOp != OP_eq && cmpOp != OP_ne) { + cmpOp = GetReverseCmpOp(cmpOp); + } + if (op == OP_band) { + const MIRIntConst *c2 = nullptr; + uint8_t c2Idx = 0; + std::tie(c2, c2Idx) = GetIntConstOpndOfBinExpr(binOpExpr); + opnd0 = binOpExpr.GetOpnd(1u - c2Idx); + if (!c2) { + return nullptr; + } + if (auto res = FoldCmpAndShift(irMap, cmpOp, *opnd0, c1, c2->GetValue())) { + return res; + } + } + return nullptr; +} + +MeExpr *ExprCombiner::FoldCmpWithConst(OpMeExpr &expr) { + const MIRIntConst *c1 = nullptr; + uint8_t c1Idx = 0; + std::tie(c1, c1Idx) = GetIntConstOpndOfBinExpr(expr); + MeExpr *binOpnd = expr.GetOpnd(1u - c1Idx); + if (!c1 || binOpnd->GetMeOp() != kMeOpOp) { + return nullptr; + } + + if (auto res = FoldCmpBinOpWithConst(expr, *binOpnd, c1->GetValue())) { + return res; + } + return nullptr; +} + +MeExpr *ExprCombiner::VisitCmp(OpMeExpr &expr) { + MeExpr *opnd0 = expr.GetOpnd(0); + MeExpr *opnd1 = expr.GetOpnd(1); + if (opnd0->GetMeOp() == kMeOpConst || opnd1->GetMeOp() == kMeOpConst) { + if (auto res = FoldCmpWithConst(expr)) { + return res; + } + } + return nullptr; +} + +MeExpr *ExprCombiner::VisitOpExpr(OpMeExpr &expr) { + if (IsPrimitiveVector(expr.GetPrimType())) { + return nullptr; + } + auto opcode = expr.GetOp(); + switch (opcode) { + case OP_add: + case OP_sub: + case OP_mul: + case OP_lnot: + case OP_div: + case OP_rem: + case OP_ashr: + case OP_shl: + case OP_max: + case OP_min: + case OP_bior: { + return VisitBior(expr); + } + case OP_bxor: { + return VisitBxor(expr); + } + case OP_cand: + case OP_land: + case OP_cior: + case OP_lior: + case OP_lshr: + break; + case OP_band: { + return VisitBand(expr); + } + case OP_ne: + case OP_eq: + case OP_lt: + case OP_le: + case OP_ge: + case OP_gt: + case OP_cmp: + case OP_cmpl: + case OP_cmpg: { + return VisitCmp(expr); + } + default: + break; + } + return nullptr; +} +void ExprCombiner::ReplaceExprInExpr(MeExpr &parentExpr, MeExpr &newExpr, size_t opndIdx) { + if (debug) { + LogInfo::MapleLogger() << "replace expr \nOld:\n"; + parentExpr.GetOpnd(opndIdx)->Dump(&irMap); + LogInfo::MapleLogger() << "\nNew:\n"; + newExpr.Dump(&irMap); + } + useInfo.ReplaceUseInfoInExpr(parentExpr.GetOpnd(opndIdx), &newExpr); + parentExpr.SetOpnd(opndIdx, &newExpr); +} + +void ExprCombiner::ReplaceExprInStmt(MeStmt &parentStmt, MeExpr &newExpr, size_t opndIdx) { + if (debug) { + LogInfo::MapleLogger() << "replace expr \nOld:\n"; + parentStmt.GetOpnd(opndIdx)->Dump(&irMap); + LogInfo::MapleLogger() << "\nNew:\n"; + newExpr.Dump(&irMap); + } + useInfo.DelUseInfoInExpr(parentStmt.GetOpnd(opndIdx), &parentStmt); + useInfo.CollectUseInfoInExpr(&newExpr, &parentStmt); + parentStmt.SetOpnd(opndIdx, &newExpr); + irMap.SimplifyCastForAssign(&parentStmt); +} + +MeExpr *ExprCombiner::VisitMeExpr(MeExpr &expr) { + if (IsPrimitiveVector(expr.GetPrimType())) { + return nullptr; + } + switch (expr.GetMeOp()) { + case kMeOpAddrof: + case kMeOpAddroffunc: + case kMeOpConst: + case kMeOpConststr: + case kMeOpConststr16: + case kMeOpSizeoftype: + case kMeOpFieldsDist: + case kMeOpVar: + case kMeOpReg: + case kMeOpIvar: + return nullptr; + case kMeOpOp: { + OpMeExpr &opexp = static_cast(expr); + for (uint8_t i = 0; i < opexp.GetNumOpnds(); i++) { + auto newOpnd = VisitMeExpr(*opexp.GetOpnd(i)); + if (newOpnd) { + ReplaceExprInExpr(expr, *newOpnd, i); + } + } + if (auto newExpr = VisitOpExpr(opexp)) { + return newExpr; + } + return nullptr; + } + case kMeOpNary: { + NaryMeExpr &opexp = static_cast(expr); + for (uint8_t i = 0; i < opexp.GetNumOpnds(); i++) { + auto newOpnd = VisitMeExpr(*opexp.GetOpnd(i)); + if (newOpnd) { + ReplaceExprInExpr(expr, *newOpnd, i); + } + } + return nullptr; + } + default: + break; + } + return nullptr; +} + +void ExprCombiner::VisitStmt(MeStmt &stmt) { + if (debug) { + LogInfo::MapleLogger() << "visit stmt: "; + stmt.Dump(&irMap); + LogInfo::MapleLogger() << "\n"; + } + for (size_t i = 0; i < stmt.NumMeStmtOpnds(); ++i) { + auto newExpr = VisitMeExpr(*stmt.GetOpnd(0)); + if (newExpr) { + ReplaceExprInStmt(stmt, *newExpr, i); + } + } +} + +void CombineExpr::Execute() { + auto useInfo = irMap.GetExprUseInfo(); + if (useInfo.IsInvalid()) { + useInfo.CollectUseInfoInFunc(&irMap, &dom, kUseInfoOfAllExpr); + } + ExprCombiner combiner(irMap, useInfo, debug); + for (auto bIt = dom.GetReversePostOrder().begin(); bIt != dom.GetReversePostOrder().end(); ++bIt) { + auto curBB = func.GetCfg()->GetBBFromID(BBId((*bIt)->GetID())); + for (auto &meStmt : curBB->GetMeStmts()) { + combiner.VisitStmt(meStmt); + } + } + useInfo.InvalidUseInfo(); +} + +void MECombineExpr::GetAnalysisDependence(maple::AnalysisDep &aDep) const { + aDep.AddRequired(); + aDep.AddRequired(); + aDep.SetPreservedAll(); +} + +bool MECombineExpr::PhaseRun(maple::MeFunction &f) { + auto *irMap = GET_ANALYSIS(MEIRMapBuild, f); + CHECK_FATAL(irMap != nullptr, "irMap phase has problem"); + auto *dom = EXEC_ANALYSIS(MEDominance, f)->GetDomResult(); + CHECK_FATAL(dom != nullptr, "dominance phase has problem"); + CombineExpr combineExpr(f, *irMap, *dom, DEBUGFUNC_NEWPM(f)); + combineExpr.Execute(); + return true; +} +} // namespace maple \ No newline at end of file diff --git a/src/mapleall/maple_me/src/me_emit.cpp b/src/mapleall/maple_me/src/me_emit.cpp index cbce327631..d8a935445b 100644 --- a/src/mapleall/maple_me/src/me_emit.cpp +++ b/src/mapleall/maple_me/src/me_emit.cpp @@ -21,6 +21,7 @@ #include "me_cfg.h" #include "constantfold.h" #include "me_merge_stmts.h" +#include "mem_reference_table.h" namespace maple { void MEEmit::GetAnalysisDependence(maple::AnalysisDep &aDep) const { @@ -79,6 +80,7 @@ bool MEEmit::PhaseRun(maple::MeFunction &f) { mirFunction->ReleaseCodeMemory(); mirFunction->SetMemPool(new ThreadLocalMemPool(memPoolCtrler, "IR from IRMap::Emit()")); mirFunction->SetBody(mirFunction->GetCodeMempool()->New()); + mirFunction->CreateMemReferenceTable(); if (Options::profileUse && mirFunction->GetFuncProfData()) { mirFunction->GetFuncProfData()->SetStmtFreq(mirFunction->GetBody()->GetStmtID(), mirFunction->GetFuncProfData()->entryFreq); diff --git a/src/mapleall/maple_me/src/me_expr_utils.cpp b/src/mapleall/maple_me/src/me_expr_utils.cpp new file mode 100644 index 0000000000..cdf988c61c --- /dev/null +++ b/src/mapleall/maple_me/src/me_expr_utils.cpp @@ -0,0 +1,136 @@ +/* + * Copyright (c) [2023] Huawei Technologies Co.,Ltd.All rights reserved. + * + * OpenArkCompiler is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * + * http://license.coscl.org.cn/MulanPSL2 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ +#include "me_expr_utils.h" + +#include "irmap.h" +namespace maple { + +const MIRIntConst *GetIntConst(const MeExpr &expr) { + if (expr.GetMeOp() != kMeOpConst) { + return nullptr; + } + auto cval = static_cast(expr).GetConstVal(); + if (cval->GetKind() != kConstInt) { + return nullptr; + } + return static_cast(cval); +} + +std::pair GetIntConstOpndOfBinExpr(const MeExpr &expr) { + if (auto res = GetIntConst(*expr.GetOpnd(1))) { + return {res, 1}; + } + if (auto res = GetIntConst(*expr.GetOpnd(0))) { + return {res, 0}; + } + return {nullptr, 0}; +} + +MeExpr *SimplifyBinOpByDemanded(IRMap &irMap, const MeExpr &expr, const IntVal &demanded, BitValue &known, + const BitValue &lhsKnown, const BitValue &rhsKnown) { + ASSERT(!lhsKnown.HasConflict() && !rhsKnown.HasConflict(), "BitValue has conflict"); + auto op = expr.GetOp(); + auto type = expr.GetPrimType(); + switch (op) { + case OP_band: { + known = lhsKnown & rhsKnown; + + // all demanded bits are known as 0 or 1 + if (demanded.IsSubsetOf(known.zeroBits | known.oneBits)) { + return irMap.CreateIntConstMeExpr(known.oneBits, type); + } + + // all demanded bits are known as 1 on rhs, return lhs + if (demanded.IsSubsetOf(lhsKnown.zeroBits | rhsKnown.oneBits)) { + return expr.GetOpnd(0); + } + // all demanded bits are known as 1 on lhs, return rhs + if (demanded.IsSubsetOf(rhsKnown.zeroBits | lhsKnown.oneBits)) { + return expr.GetOpnd(1); + } + break; + } + case OP_bior: { + known = lhsKnown | rhsKnown; + + // all demanded bits are known as 0 or 1 + if (demanded.IsSubsetOf(known.zeroBits | known.oneBits)) { + return irMap.CreateIntConstMeExpr(known.oneBits, type); + } + + // all demanded bits are known as 1 on lhs, return lhs + if (demanded.IsSubsetOf(lhsKnown.oneBits | rhsKnown.zeroBits)) { + return expr.GetOpnd(0); + } + // all demanded bits are known as 1 on rhs, return rhs + if (demanded.IsSubsetOf(rhsKnown.oneBits | lhsKnown.zeroBits)) { + return expr.GetOpnd(1); + } + break; + } + case OP_bxor: { + known = lhsKnown ^ rhsKnown; + + // all demanded bits are known as 0 or 1 + if (demanded.IsSubsetOf(known.zeroBits | known.oneBits)) { + return irMap.CreateIntConstMeExpr(known.oneBits, type); + } + + // all demanded bits are known as 0 on rhs(means that bits are decided by lhs), return lhs + if (demanded.IsSubsetOf(rhsKnown.zeroBits)) { + return expr.GetOpnd(0); + } + // all demanded bits are known as 1 on lhs(means that bits are decided by rhs), return rhs + if (demanded.IsSubsetOf(lhsKnown.zeroBits)) { + return expr.GetOpnd(1); + } + break; + } + default: + break; + } + return nullptr; +} + +MeExpr *SimplifyMultiUseByDemanded(IRMap &irMap, const MeExpr &expr, const IntVal &demanded, BitValue &known, + uint32 depth) { + auto bitWidth = demanded.GetBitWidth(); + BitValue lhsKnown(bitWidth); + BitValue rhsKnown(bitWidth); + auto op = expr.GetOp(); + + switch (op) { + case OP_band: + case OP_bior: + case OP_bxor: { + ComputeBitValueOfExpr(*expr.GetOpnd(0), demanded, lhsKnown, depth + 1); + ComputeBitValueOfExpr(*expr.GetOpnd(1), demanded, rhsKnown, depth + 1); + if (auto res = SimplifyBinOpByDemanded(irMap, expr, demanded, known, lhsKnown, rhsKnown)) { + return res; + } + break; + } + default: + break; + } + return nullptr; +} +MeExpr *SimplifyMultiUseByDemanded(IRMap &irMap, const MeExpr &expr) { + auto bitWidth = GetPrimTypeBitSize(expr.GetPrimType()); + IntVal demanded(IntVal::kAllOnes, bitWidth, false); + BitValue known(bitWidth); + return SimplifyMultiUseByDemanded(irMap, expr, demanded, known, 0); +} +} // namespace maple \ No newline at end of file diff --git a/src/mapleall/maple_me/src/me_ivopts.cpp b/src/mapleall/maple_me/src/me_ivopts.cpp index ee1b0ac81a..23f829fd7c 100644 --- a/src/mapleall/maple_me/src/me_ivopts.cpp +++ b/src/mapleall/maple_me/src/me_ivopts.cpp @@ -400,7 +400,26 @@ IV *IVOptData::GetIV(const MeExpr &expr) { return iter == ivs.end() ? nullptr : iter->second.get(); } +static bool MayThrowException(const MeExpr &expr) { + if (!expr.CouldThrowException()) { + return false; + } + if (expr.GetOp() != OP_div && expr.GetOp() != OP_rem) { + return true; + } + auto *opnd1 = expr.GetOpnd(1); + CHECK_NULL_FATAL(opnd1); + if (opnd1->GetMeOp() != kMeOpConst || + static_cast(opnd1)->GetConstVal()->GetKind() != kConstInt) { + return true; + } + return opnd1->IsIntZero(); +} + bool IVOptData::IsLoopInvariant(const MeExpr &expr) { + if (MayThrowException(expr)) { + return false; + } switch (expr.GetMeOp()) { case kMeOpConst: { if (!IsSignedInteger(expr.GetPrimType())) { @@ -490,6 +509,14 @@ MeExpr *IVOptimizer::ResolveBasicIV(const ScalarMeExpr *backValue, ScalarMeExpr return nullptr; } auto *backRhs = backValue->GetDefStmt()->GetRHS(); + if (GetPrimTypeSize(backRhs->GetPrimType()) < GetPrimTypeSize(backValue->GetPrimType())) { + // There is an implicit conversion from u16 to u32, which cannot be considered as iv. + // ||MEIR|| regassign REGINDX:16 u32 %16 mx1626 + // rhs = OP sub u16 kPtyInvalid mx1625 + // opnd[0] = REGINDX:16 u32 %16 mx1624 + // opnd[1] = CONST u16 1 mx1173 + return nullptr; + } while (backRhs->IsScalar()) { if (static_cast(backRhs)->GetDefBy() != kDefByStmt) { return nullptr; @@ -1165,8 +1192,7 @@ bool IVOptimizer::LHSEscape(const ScalarMeExpr *lhs) { MeExpr *IVOptimizer::OptimizeInvariable(MeExpr *expr) { for (size_t i = 0; i < expr->GetNumOpnds(); ++i) { auto *opnd = expr->GetOpnd(i); - if (opnd->GetMeOp() == kMeOpOp && opnd->GetOp() != OP_div && opnd->GetOp() != OP_rem && - data->IsLoopInvariant(*opnd)) { + if (opnd->GetMeOp() == kMeOpOp && data->IsLoopInvariant(*opnd)) { // move loop invariant out of current loop auto found = invariables.find(opnd->GetExprID()); RegMeExpr *outValue = nullptr; @@ -1185,8 +1211,7 @@ MeExpr *IVOptimizer::OptimizeInvariable(MeExpr *expr) { auto *res = OptimizeInvariable(opnd); expr = irMap->ReplaceMeExprExpr(*expr, *opnd, *res); } - if (expr->GetMeOp() == kMeOpOp && expr->GetOp() != OP_div && expr->GetOp() != OP_rem && - data->IsLoopInvariant(*expr)) { + if (expr->GetMeOp() == kMeOpOp && data->IsLoopInvariant(*expr)) { // move loop invariant out of current loop auto found = invariables.find(expr->GetExprID()); RegMeExpr *outValue = nullptr; @@ -1630,6 +1655,9 @@ void FindScalarFactor(MeExpr &expr, OpMeExpr *parentCvt, std::unordered_mapGetPrimType())) { + needSext = IsSignedInteger(expr.GetPrimType()); + } int64 constVal = needSext ? static_cast(expr).GetSXTIntValue() : static_cast(expr).GetExtIntValue(); auto it = record.find(kInvalidExprID); @@ -2356,7 +2384,7 @@ bool IVOptimizer::PrepareCompareUse(int64 &ratio, IVUse *use, IVCand *cand, cons use->expr = hashed; } // compute extra expr after replaced by new iv - if (incPos != nullptr && incPos->IsCondBr() && use->stmt == incPos) { + if (incPos != nullptr && IsBranch(incPos->GetOp()) && use->stmt == incPos) { // use inc version to replace auto *newBase = irMap->CreateMeExprBinary(OP_add, cand->iv->base->GetPrimType(), *cand->iv->base, *cand->iv->step); @@ -2374,7 +2402,7 @@ bool IVOptimizer::PrepareCompareUse(int64 &ratio, IVUse *use, IVCand *cand, cons replaceCompare = true; } else { bool mayOverflow = true; - if (incPos != nullptr && incPos->IsCondBr() && use->stmt == incPos) { + if (incPos != nullptr && IsBranch(incPos->GetOp()) && use->stmt == incPos) { // use inc version to replace auto *newBase = irMap->CreateMeExprBinary(OP_add, cand->iv->base->GetPrimType(), *cand->iv->base, *cand->iv->step); @@ -2539,7 +2567,7 @@ void IVOptimizer::UseReplace() { ratio = ComputeRatioOfStep(*cand->iv->step, *use->iv->step); extraExpr = ComputeExtraExprOfBase(*cand->iv->base, *use->iv->base, static_cast(ratio), replaced, false); - if (incPos != nullptr && incPos->IsCondBr() && use->stmt == incPos) { + if (incPos != nullptr && IsBranch(incPos->GetOp()) && use->stmt == incPos) { if (extraExpr == nullptr || (extraExpr->IsLeaf() && extraExpr->GetMeOp() != kMeOpConst)) { auto *tmpExpr = irMap->CreateRegMeExpr(use->expr->GetPrimType()); auto *assignStmt = irMap->CreateAssignMeStmt(*tmpExpr, *use->expr, *incPos->GetBB()); @@ -2631,7 +2659,7 @@ void IVOptimizer::UseReplace() { if (incPos == nullptr) { latchBB->AddMeStmtFirst(incStmt); incPos = incStmt; - } else if (incPos->IsCondBr()) { + } else if (IsBranch(incPos->GetOp())) { incPos->GetBB()->InsertMeStmtBefore(incPos, incStmt); } else { incPos->GetBB()->InsertMeStmtAfter(incPos, incStmt); @@ -2771,7 +2799,7 @@ void IVOptimizer::Run() { useInfo->CollectUseInfoInFunc(irMap, dom, kUseInfoOfScalar); } for (int32 i = static_cast(loops->GetMeLoops().size()) - 1; i >= 0; i--) { - auto *loop = loops->GetMeLoops()[i]; + auto *loop = loops->GetMeLoops()[static_cast(i)]; if (loop->head == nullptr || loop->preheader == nullptr || loop->latch == nullptr) { // not canonicalized continue; @@ -2789,7 +2817,7 @@ void IVOptimizer::Run() { } } for (int32 i = static_cast(loops->GetMeLoops().size()) - 1; i >= 0; --i) { - auto *loop = loops->GetMeLoops()[i]; + auto *loop = loops->GetMeLoops()[static_cast(i)]; if (loop->head == nullptr || loop->preheader == nullptr || loop->latch == nullptr) { // not canonicalized continue; diff --git a/src/mapleall/maple_me/src/me_loop_unrolling.cpp b/src/mapleall/maple_me/src/me_loop_unrolling.cpp index 102695dd8f..81eb2ca2f0 100644 --- a/src/mapleall/maple_me/src/me_loop_unrolling.cpp +++ b/src/mapleall/maple_me/src/me_loop_unrolling.cpp @@ -406,7 +406,7 @@ void LoopUnrolling::CopyAndInsertBB(bool isPartial) { ResetFrequency(*loop->head); ResetFrequency(); } - profValid &&resetFreqForAfterInsertGoto + profValid && resetFreqForAfterInsertGoto ? (loop->head->GetFrequency() - 1 == 0 ? newHeadBB->SetFrequency(loop->head->GetFrequency()) : newHeadBB->SetFrequency(loop->head->GetFrequency() - 1)) : newHeadBB->SetFrequency(loop->head->GetFrequency()); diff --git a/src/mapleall/maple_me/src/me_merge_stmts.cpp b/src/mapleall/maple_me/src/me_merge_stmts.cpp index 330839e99f..190b1cb064 100644 --- a/src/mapleall/maple_me/src/me_merge_stmts.cpp +++ b/src/mapleall/maple_me/src/me_merge_stmts.cpp @@ -32,7 +32,7 @@ uint32 MergeStmts::GetStructFieldBitSize(const MIRStructType *structType, FieldI uint32 MergeStmts::GetPointedTypeBitSize(const TyIdx &ptrTypeIdx) const { MIRPtrType *ptrMirType = static_cast(GlobalTables::GetTypeTable().GetTypeFromTyIdx(ptrTypeIdx)); MIRType *pointedMirType = ptrMirType->GetPointedType(); - return static_cast(pointedMirType->GetSize() * 8); + return static_cast(pointedMirType->GetSize() * k8BitSize); } // Candidate stmts LHS must cover contiguous memory and RHS expr must be const diff --git a/src/mapleall/maple_me/src/me_obj_size.cpp b/src/mapleall/maple_me/src/me_obj_size.cpp index 30f4622f9a..0eb18990ca 100644 --- a/src/mapleall/maple_me/src/me_obj_size.cpp +++ b/src/mapleall/maple_me/src/me_obj_size.cpp @@ -514,6 +514,10 @@ size_t OBJSize::ComputeObjectSizeWithType(MeExpr &opnd, int64 type) const { if (constMeExpr.GetConstVal()->GetKind() != kConstInt) { return kInvalidDestSize; } + if (IsPrimitivePoint(opnd.GetPrimType()) && opnd.IsZero()) { + // Can not compute the size of null, return kInvalidDestSize. + return kInvalidDestSize; + } return static_cast(opnd).GetIntValue().GetZXTValue(); } case OP_conststr: { diff --git a/src/mapleall/maple_me/src/me_phase_manager.cpp b/src/mapleall/maple_me/src/me_phase_manager.cpp index ec7dcc6837..c792349326 100644 --- a/src/mapleall/maple_me/src/me_phase_manager.cpp +++ b/src/mapleall/maple_me/src/me_phase_manager.cpp @@ -18,6 +18,7 @@ #include "lower.h" #include "lmbc_memlayout.h" #include "lmbc_lower.h" +#include "me_combine_expr.h" #define JAVALANG (mirModule.IsJavaModule()) #define CLANG (mirModule.IsCModule()) @@ -177,6 +178,7 @@ bool MeFuncPM::PhaseRun(maple::MIRModule &m) { binMplt.Export(filestem + ".lmbc", nullptr); } if (MeFuncPM::timePhases) { + LogInfo::MapleLogger() << "================== MeFuncPM =================="; DumpPhaseTime(); } return changed; @@ -288,4 +290,5 @@ MAPLE_TRANSFORM_PHASE_REGISTER_CANSKIP(MEABCOpt, abcopt) MAPLE_TRANSFORM_PHASE_REGISTER(MEEmit, meemit) MAPLE_TRANSFORM_PHASE_REGISTER_CANSKIP(ProfileGenEmit, profgenEmit) MAPLE_TRANSFORM_PHASE_REGISTER_CANSKIP(MESimplifyExpr, simplifyexpr); +MAPLE_TRANSFORM_PHASE_REGISTER_CANSKIP(MECombineExpr, combineexpr); } // namespace maple diff --git a/src/mapleall/maple_me/src/me_predict.cpp b/src/mapleall/maple_me/src/me_predict.cpp index a3cea7b365..8e8b2061a7 100644 --- a/src/mapleall/maple_me/src/me_predict.cpp +++ b/src/mapleall/maple_me/src/me_predict.cpp @@ -993,14 +993,6 @@ void MePrediction::SavePredictResultIntoCfg() { BB &destBB = edge->dest; srcBB.SetEdgeFreq(&destBB, edge->frequency); // Set branchProb for condgoto stmt - if (srcBB.GetKind() == kBBCondGoto && &destBB == srcBB.GetSucc(1)) { - auto *lastMeStmt = srcBB.GetLastMe(); - if (lastMeStmt != nullptr) { - Opcode op = lastMeStmt->GetOp(); - CHECK_FATAL(op == OP_brtrue || op == OP_brfalse, "must be"); - static_cast(lastMeStmt)->SetBranchProb(static_cast(edge->probability)); - } - } edge = edge->next; } } diff --git a/src/mapleall/maple_me/src/me_scalar_analysis.cpp b/src/mapleall/maple_me/src/me_scalar_analysis.cpp index ba980fe609..7cb359c8c7 100644 --- a/src/mapleall/maple_me/src/me_scalar_analysis.cpp +++ b/src/mapleall/maple_me/src/me_scalar_analysis.cpp @@ -1036,6 +1036,48 @@ CRNode *LoopScalarAnalysisResult::CreateCRForPhi(const MePhiNode &phiNode) { } } +// Deal with iaddrof, such as +// ||MEIR|| assertlt +// opnd[0] = OP add a64 kPtyInvalid mx6 +// opnd[0] = OP iaddrof a64 kPtyInvalid (field)2 mx2 +// opnd[0] = VAR %retVar_37{offset:0}<0>[idx:3] (field)0 mx1 +// opnd[1] = CONST a64 48 mx3 +// opnd[1] = OP add a64 kPtyInvalid mx8 +// opnd[0] = VAR %retVar_37{offset:0}<0>[idx:3] (field)0 mx1 +// opnd[1] = CONST a64 44 mx7 +// the type of retVar_37 is struct A (int len, int fa[] __attribute__((count("len")))) +// CRNode of mx6 is: 52 + retVar_37_mx1 +// CRNode of mx6 is: 44 + retVar_37_mx1 +CRNode *LoopScalarAnalysisResult::DealWithIaddrof(const OpMeExpr &opMeExpr, MeExpr &expr) { + if (opMeExpr.GetNumOpnds() != 1 || !opMeExpr.GetOpnd(0)->IsLeaf() || opMeExpr.GetBitsOffSet() % k8BitSize != 0) { + InsertExpr2CR(expr, nullptr); + return nullptr; + } + auto baseCRNode = GetOrCreateCRNode(*opMeExpr.GetOpnd(0)); + if (baseCRNode == nullptr) { + InsertExpr2CR(expr, nullptr); + return nullptr; + } + auto fieldIDOfIaddrof = opMeExpr.GetFieldID(); + auto *typeOfBase = GlobalTables::GetTypeTable().GetTypeFromTyIdx(opMeExpr.GetTyIdx()); + if (typeOfBase->GetKind() == kTypePointer) { + typeOfBase = static_cast(typeOfBase)->GetPointedType(); + } + if (typeOfBase->GetKind() != kTypeStruct) { + InsertExpr2CR(expr, nullptr); + return nullptr; + } + auto offset = static_cast(typeOfBase)->GetBitOffsetFromBaseAddr(fieldIDOfIaddrof); + if (static_cast(offset) % static_cast(k8BitSize) != 0) { + InsertExpr2CR(expr, nullptr); + return nullptr; + } + offset = (offset + static_cast(static_cast(opMeExpr.GetBitsOffSet()))) / + static_cast(static_cast(k8BitSize)); + auto offsetConstCR = GetOrCreateCRConstNode(nullptr, offset); + return ComputeCRNodeWithOperator(expr, *baseCRNode, *offsetConstCR, OP_add); +} + CRNode *LoopScalarAnalysisResult::DealWithMeOpOp(MeExpr &currOpMeExpr, MeExpr &expr) { OpMeExpr &opMeExpr = static_cast(currOpMeExpr); switch (opMeExpr.GetOp()) { @@ -1072,7 +1114,7 @@ CRNode *LoopScalarAnalysisResult::DealWithMeOpOp(MeExpr &currOpMeExpr, MeExpr &e return nullptr; } case OP_iaddrof: { - return GetOrCreateCRNode(*opMeExpr.GetOpnd(0)); + return DealWithIaddrof(opMeExpr, expr); } case OP_rem: { return GetOrCreateCRVarNode(expr); diff --git a/src/mapleall/maple_me/src/me_slp.cpp b/src/mapleall/maple_me/src/me_slp.cpp index 8bd8097dde..aa929bb804 100644 --- a/src/mapleall/maple_me/src/me_slp.cpp +++ b/src/mapleall/maple_me/src/me_slp.cpp @@ -35,6 +35,7 @@ do { if (debug) { LogInfo::MapleLogger() << "[SLP FAILURE] "; (X); } } while (fa namespace { using namespace maple; constexpr maple::int32 kHugeCost = 10000; // Used for impossible vectorized node +constexpr size_t kMaxNumStores = 1000; const std::vector supportedOps = { OP_iread, OP_ireadoff, OP_add, OP_sub, OP_constval, OP_bxor, OP_band, OP_mul, OP_intrinsicop @@ -2269,6 +2270,10 @@ void SLPVectorizer::VectorizeStoreVecMap() { tmpAlloc = &stackAlloc; for (auto &entry : storeVecMap) { StoreVec &storeVec = entry.second; + // If the number of stores exceeds the threshold, slp will not be performed for build time considerations + if (storeVec.size() > kMaxNumStores) { + continue; + } CHECK_FATAL(storeVec.size() >= 2, "storeVec with size less than 2 should have been removed before"); VectorizeStores(storeVec); } @@ -3340,7 +3345,12 @@ bool SLPVectorizer::DoVectTreeNodeGatherNeeded(TreeNode &treeNode) { // Create vector intrinsicop NaryMeExpr naryExpr(&irMap.GetIRMapAlloc(), kInvalidExprID, OP_intrinsicop, vecType->GetPrimType(), 1, TyIdx(0), intrnId, false); - naryExpr.PushOpnd(treeNode.GetExprs()[0]); + MeExpr *expr0 = treeNode.GetExprs()[0]; + // When tree node type is different from tree type, add cvt if needed + if (!IsNoCvtNeeded(elemType, expr0->GetPrimType())) { + expr0 = irMap.CreateMeExprTypeCvt(elemType, expr0->GetPrimType(), *expr0); + } + naryExpr.PushOpnd(expr0); vecRegNew = irMap.CreateNaryMeExpr(naryExpr); } else { vecRegNew = BuildExprAfterVectorSetElement(func, vecReg, posExprVec, elemType); diff --git a/src/mapleall/maple_me/src/me_sra.cpp b/src/mapleall/maple_me/src/me_sra.cpp index 9fbae3d9ea..6677d67756 100644 --- a/src/mapleall/maple_me/src/me_sra.cpp +++ b/src/mapleall/maple_me/src/me_sra.cpp @@ -532,6 +532,7 @@ void SRA::RemoveUnsplittable() { } bool notCopyUse = false; + bool notCanon = false; size_t useCount = 0; for (auto &use : group->uses) { auto *fieldTy = static_cast(symbol->GetType())->GetFieldType(use->fid); @@ -539,6 +540,10 @@ void SRA::RemoveUnsplittable() { useCount++; continue; } + if (!notCanon && fieldTy->GetSize() != k1ByteSize && fieldTy->GetSize() != k2ByteSize && + fieldTy->GetSize() != k4ByteSize && fieldTy->GetSize() != k8ByteSize) { + notCanon = true; + } if (use->parent->GetOpCode() != OP_dassign && use->parent->GetOpCode() != OP_iassign) { notCopyUse = true; break; @@ -555,6 +560,11 @@ void SRA::RemoveUnsplittable() { it = groups.erase(it); continue; } + if (symbol->GetType()->GetKind() == kTypeUnion) { + symbol->SeUnionReplaceCand(!notCanon && symbol->GetType()->GetSize() <= GetPointerSize()); + it = groups.erase(it); + continue; + } ++it; } } @@ -566,7 +576,7 @@ void SRA::CollectCandidates() { continue; } auto *type = symbol->GetType(); - if (type->GetKind() != kTypeStruct) { + if (type->GetKind() != kTypeStruct && type->GetKind() != kTypeUnion) { continue; } auto group = std::make_unique(); diff --git a/src/mapleall/maple_me/src/me_stack_protect.cpp b/src/mapleall/maple_me/src/me_stack_protect.cpp index d1ccdd1e9d..a3f22a0b25 100644 --- a/src/mapleall/maple_me/src/me_stack_protect.cpp +++ b/src/mapleall/maple_me/src/me_stack_protect.cpp @@ -81,6 +81,9 @@ bool MeStackProtect::IsDefInvolveAddressOfStackVar(const ScalarMeExpr &expr, std } case kDefByStmt: { const auto defStmt = expr.GetDefStmt(); + if (!RecordExpr(visitedDefs, *defStmt->GetLHS())) { + return false; + } return IsPointToAddressOfStackVar(*defStmt->GetRHS(), visitedDefs); } case kDefByNo: { diff --git a/src/mapleall/maple_me/src/me_stmt_pre.cpp b/src/mapleall/maple_me/src/me_stmt_pre.cpp index da2898cf3a..f90cbe0095 100644 --- a/src/mapleall/maple_me/src/me_stmt_pre.cpp +++ b/src/mapleall/maple_me/src/me_stmt_pre.cpp @@ -931,12 +931,12 @@ void MeStmtPre::BuildWorkListBB(BB *bb) { auto &iass = static_cast(stmt); auto *lhs = iass.GetLHSVal(); auto *rhs = iass.GetRHS(); - const static auto identicalAssign = [](const IvarMeExpr *lhs, const IvarMeExpr *rhs) -> bool { + const static auto kIdenticalAssign = [](const IvarMeExpr *lhs, const IvarMeExpr *rhs) -> bool { return lhs->GetOp() == rhs->GetOp() && lhs->GetBase() == rhs->GetBase() && lhs->GetPrimType() == rhs->GetPrimType() && lhs->GetTyIdx() == rhs->GetTyIdx() && lhs->GetOffset() == rhs->GetOffset() && lhs->GetFieldID() == rhs->GetFieldID(); }; - if (rhs->GetMeOp() == kMeOpIvar && identicalAssign(lhs, static_cast(rhs))) { + if (rhs->GetMeOp() == kMeOpIvar && kIdenticalAssign(lhs, static_cast(rhs))) { RemoveUnnecessaryAssign(stmt); } VersionStackChiListUpdate(*iass.GetChiList()); diff --git a/src/mapleall/maple_me/src/me_value_range_prop.cpp b/src/mapleall/maple_me/src/me_value_range_prop.cpp index 1303650e5b..0eb60db37f 100644 --- a/src/mapleall/maple_me/src/me_value_range_prop.cpp +++ b/src/mapleall/maple_me/src/me_value_range_prop.cpp @@ -369,7 +369,12 @@ void ValueRangePropagation::DealWithSwitch(BB &bb, MeStmt &stmt) { } auto upper = valueRange->GetUpper().GetConstant(); auto lower = valueRange->GetLower().GetConstant(); - if (upper < lower || static_cast(upper - lower + 1) != valueOfCase.size()) { + int64 res = 0; + if (!AddOrSubWithConstant(PTY_i64, OP_sub, upper, lower, res) || + !AddOrSubWithConstant(PTY_i64, OP_add, res, 1, res)) { + return; + } + if (upper < lower || static_cast(res) != valueOfCase.size()) { return; } std::sort(valueOfCase.begin(), valueOfCase.end()); @@ -1775,6 +1780,14 @@ bool ValueRangePropagation::DealWithCVT(const BB &bb, MeStmt &stmt, OpMeExpr &op auto *opnd0 = addOrSubExpr->GetOpnd(0); auto *opnd1 = addOrSubExpr->GetOpnd(1); if (opnd0->GetMeOp() == kMeOpConst || opnd1->GetMeOp() == kMeOpConst) { + auto *opnd0VR = FindValueRangeAndInitNumOfRecursion(bb, *opnd0); + auto *opnd1VR = FindValueRangeAndInitNumOfRecursion(bb, *opnd1); + if ((opnd0VR != nullptr && + (!opnd0VR->IsEqualAfterCVT(fromType, toType) || !opnd0VR->IsConstantLowerAndUpper())) || + (opnd1VR != nullptr && + (!opnd1VR->IsEqualAfterCVT(fromType, toType) || !opnd1VR->IsConstantLowerAndUpper()))) { + return false; + } // If the op of opnd is OP_add or OP_sub and the vr before and after cvt is the same, then fold cvt: // rhs = OP cvt i64 i32 mx4 // opnd[0] = OP add i32 kPtyInvalid mx3 @@ -1871,7 +1884,7 @@ void ValueRangePropagation::InsertOstOfPhi2Cands( // / \ | / \ // true false true false void ValueRangePropagation::PrepareForSSAUpdateWhenPredBBIsRemoved( - const BB &pred, BB &bb, ScalarMeExpr *updateSSAExceptTheScalarExpr, + const BB &pred, BB &bb, BB *trueBr, ScalarMeExpr *updateSSAExceptTheScalarExpr, std::map> &ssaupdateCandsForCondExpr) { int index = bb.GetPredIndex(pred); CHECK_FATAL(index != -1, "pred is not in preds of bb"); @@ -1885,6 +1898,22 @@ void ValueRangePropagation::PrepareForSSAUpdateWhenPredBBIsRemoved( auto updateSSAExceptTheOstIdx = updateSSAExceptTheScalarExpr == nullptr ? OStIdx(0) : updateSSAExceptTheScalarExpr->GetOstIdx(); MeSSAUpdate::InsertDefPointsOfBBToSSACands(bb, cands, updateSSAExceptTheOstIdx); + if (trueBr == nullptr) { + return; + } + // When bb2 remove succ trueBr, the phiList while be update by func RemoveBB(), after bb1 add succ trueBr, the size of + // phi opnds in trueBr will not equal to the pred size of trueBr. So need insert the ost of philist to trueBr. + // bb1 + // | + // bb2 bb3 ==> bb1 bb3 + // / \ / \ / + // falseBr trueBr trueBr + for (auto &it : std::as_const(trueBr->GetMePhiList())) { + if (it.first == updateSSAExceptTheOstIdx) { + continue; + } + MeSSAUpdate::InsertOstToSSACands(it.first, *trueBr, &cands); + } } void ValueRangePropagation::DeleteUnreachableBBs() { @@ -2751,14 +2780,14 @@ bool ValueRangePropagation::MergeVrOrInitAndBackedge(const MePhiNode &mePhiNode, bool isOnlyHasLowerBound = vrOfInitExpr.GetRangeType() == kOnlyHasLowerBound; auto pType = mePhiNode.GetLHS()->GetPrimType(); auto upperBound = isOnlyHasLowerBound ? valueRange.GetBound() : vrOfInitExpr.GetBound(); - auto LowerBound = isOnlyHasLowerBound ? vrOfInitExpr.GetBound() : valueRange.GetBound(); + auto lowerBound = isOnlyHasLowerBound ? vrOfInitExpr.GetBound() : valueRange.GetBound(); if (valueRange.GetRangeType() == kNotEqual) { if (vrOfInitExpr.GetBound().IsConstantBound() && valueRange.IsConstantRange()) { - if (LowerBound.IsGreaterThan(upperBound, pType)) { + if (lowerBound.IsGreaterThan(upperBound, pType)) { return false; } int64 res = 0; - if (!AddOrSubWithConstant(pType, OP_sub, upperBound.GetConstant(), LowerBound.GetConstant(), res)) { + if (!AddOrSubWithConstant(pType, OP_sub, upperBound.GetConstant(), lowerBound.GetConstant(), res)) { return false; } if (Bound(res, pType).IsLessThanOrEqualTo(Bound(vrOfInitExpr.GetStride(), pType), pType)) { @@ -4025,7 +4054,8 @@ bool ValueRangePropagation::ChangeTheSuccOfPred2TrueBranch( std::map> &ssaupdateCandsForCondExpr) { auto *exitCopyFallthru = GetNewCopyFallthruBB(trueBranch, bb); if (exitCopyFallthru != nullptr) { - PrepareForSSAUpdateWhenPredBBIsRemoved(pred, bb, updateSSAExceptTheScalarExpr, ssaupdateCandsForCondExpr); + PrepareForSSAUpdateWhenPredBBIsRemoved( + pred, bb, &trueBranch, updateSSAExceptTheScalarExpr, ssaupdateCandsForCondExpr); size_t index = FindBBInSuccs(pred, bb); FreqType edgeFreq = 0; if (func.GetCfg()->UpdateCFGFreq()) { @@ -4065,16 +4095,17 @@ bool ValueRangePropagation::ChangeTheSuccOfPred2TrueBranch( currBB = currBB->GetSucc(0); CopyMeStmts(*currBB, *mergeAllFallthruBBs); PrepareForSSAUpdateWhenPredBBIsRemoved( - *predOfCurrBB, *currBB, updateSSAExceptTheScalarExpr, ssaupdateCandsForCondExpr); + *predOfCurrBB, *currBB, nullptr, updateSSAExceptTheScalarExpr, ssaupdateCandsForCondExpr); } if (predOfCurrBB != nullptr) { PrepareForSSAUpdateWhenPredBBIsRemoved( - *predOfCurrBB, *currBB, updateSSAExceptTheScalarExpr, ssaupdateCandsForCondExpr); + *predOfCurrBB, *currBB, nullptr, updateSSAExceptTheScalarExpr, ssaupdateCandsForCondExpr); } CHECK_FATAL(currBB->GetKind() == kBBCondGoto, "must be condgoto bb"); auto *gotoMeStmt = irMap.New(func.GetOrCreateBBLabel(trueBranch)); mergeAllFallthruBBs->AddMeStmtLast(gotoMeStmt); - PrepareForSSAUpdateWhenPredBBIsRemoved(pred, bb, updateSSAExceptTheScalarExpr, ssaupdateCandsForCondExpr); + PrepareForSSAUpdateWhenPredBBIsRemoved( + pred, bb, &trueBranch, updateSSAExceptTheScalarExpr, ssaupdateCandsForCondExpr); size_t index = FindBBInSuccs(pred, bb); FreqType edgeFreq = 0; if (func.GetCfg()->UpdateCFGFreq()) { @@ -4162,7 +4193,8 @@ bool ValueRangePropagation::RemoveTheEdgeOfPredBB( return true; } if (OnlyHaveCondGotoStmt(bb)) { - PrepareForSSAUpdateWhenPredBBIsRemoved(pred, bb, updateSSAExceptTheScalarExpr, ssaupdateCandsForCondExpr); + PrepareForSSAUpdateWhenPredBBIsRemoved( + pred, bb, &trueBranch, updateSSAExceptTheScalarExpr, ssaupdateCandsForCondExpr); size_t index = FindBBInSuccs(pred, bb); FreqType edgeFreq = 0; if (func.GetCfg()->UpdateCFGFreq()) { @@ -4186,7 +4218,8 @@ bool ValueRangePropagation::RemoveTheEdgeOfPredBB( } else { auto *exitCopyFallthru = GetNewCopyFallthruBB(trueBranch, bb); if (exitCopyFallthru != nullptr) { - PrepareForSSAUpdateWhenPredBBIsRemoved(pred, bb, updateSSAExceptTheScalarExpr, ssaupdateCandsForCondExpr); + PrepareForSSAUpdateWhenPredBBIsRemoved( + pred, bb, &trueBranch, updateSSAExceptTheScalarExpr, ssaupdateCandsForCondExpr); size_t index = FindBBInSuccs(pred, bb); FreqType edgeFreq = 0; if (func.GetCfg()->UpdateCFGFreq()) { @@ -4221,7 +4254,8 @@ bool ValueRangePropagation::RemoveTheEdgeOfPredBB( } auto *gotoMeStmt = irMap.New(func.GetOrCreateBBLabel(trueBranch)); newBB->AddMeStmtLast(gotoMeStmt); - PrepareForSSAUpdateWhenPredBBIsRemoved(pred, bb, updateSSAExceptTheScalarExpr, ssaupdateCandsForCondExpr); + PrepareForSSAUpdateWhenPredBBIsRemoved( + pred, bb, &trueBranch, updateSSAExceptTheScalarExpr, ssaupdateCandsForCondExpr); size_t index = FindBBInSuccs(pred, bb); FreqType edgeFreq = 0; if (func.GetCfg()->UpdateCFGFreq()) { diff --git a/src/mapleall/maple_me/src/meexpr_use_info.cpp b/src/mapleall/maple_me/src/meexpr_use_info.cpp index 69704f8940..07ac63e68b 100644 --- a/src/mapleall/maple_me/src/meexpr_use_info.cpp +++ b/src/mapleall/maple_me/src/meexpr_use_info.cpp @@ -44,6 +44,33 @@ void MeExprUseInfo::AddUseSiteOfExpr(MeExpr *expr, T *useSite) { } } +template +void MeExprUseInfo::DelUseSiteOfExpr(MeExpr *expr, T *useSite) { + ASSERT_NOT_NULL(expr); + if (expr->GetExprID() == kInvalidExprID) { + return; + } + + auto uintExprID = static_cast(expr->GetExprID()); + auto useList = (*useSites)[uintExprID].second; + if (useList == nullptr) { + return; + } + for (auto iter = useList->begin(); iter != useList->end(); ++iter) { + UseItem use(useSite); + if (*iter == use) { + iter->DecreaseRef(); + if (iter->GetRef() == 0) { + (void)useList->erase(iter); + } + break; + } + } + if (useList->empty()) { + (*useSites)[uintExprID] = {expr, nullptr}; + } +} + MapleList *MeExprUseInfo::GetUseSitesOfExpr(const MeExpr *expr) const { if (IsInvalid()) { CHECK_FATAL(false, "Expr use info is invalid"); @@ -89,6 +116,63 @@ void MeExprUseInfo::CollectUseInfoInExpr(MeExpr *expr, MeStmt *stmt) { } } +void MeExprUseInfo::DelUseInfoInExpr(MeExpr *expr, MeStmt *stmt) { + if (expr == nullptr) { + return; + } + if (expr->IsScalar()) { + DelUseSiteOfExpr(expr, stmt); + return; + } + DelUseSiteOfExpr(expr, stmt); + + if (expr->GetMeOp() == kMeOpIvar) { + for (auto *mu : static_cast(expr)->GetMuList()) { + DelUseSiteOfExpr(mu, stmt); + } + } + + for (size_t opndId = 0; opndId < expr->GetNumOpnds(); ++opndId) { + auto opnd = expr->GetOpnd(opndId); + DelUseInfoInExpr(opnd, stmt); + } +} + +/// Replace all use site of \p old with \p newExpr, recursively +void MeExprUseInfo::ReplaceUseInfoInExpr(MeExpr *old, MeExpr *newExpr) { + if (!old || !newExpr) { + return; + } + + // not work for scalar, use ReplaceScalar instead + if (old->IsScalar() || useInfoState != kUseInfoOfAllExpr) { + return; + } + + auto *useList = GetUseSitesOfExpr(old); + + if (!useList || useList->empty()) { + return; + } + + auto end = useList->end(); + decltype(end) next; + + for (auto it = useList->begin(); it != end; it = next) { + next = std::next(it); + auto &useSite = *it; + + if (useSite.IsUseByStmt()) { + auto *useStmt = useSite.GetStmt(); + + DelUseSiteOfExpr(old, useStmt); + CollectUseInfoInExpr(newExpr, useStmt); + } else { + CHECK_FATAL(false, "expr's use site can't be phi"); + } + } +} + void MeExprUseInfo::CollectUseInfoInStmt(MeStmt *stmt) { for (size_t opndId = 0; opndId < stmt->NumMeStmtOpnds(); ++opndId) { auto *opnd = stmt->GetOpnd(opndId); diff --git a/src/mapleall/maple_me/src/optimizeCFG.cpp b/src/mapleall/maple_me/src/optimizeCFG.cpp index b1d8d80612..c115a6aa2e 100644 --- a/src/mapleall/maple_me/src/optimizeCFG.cpp +++ b/src/mapleall/maple_me/src/optimizeCFG.cpp @@ -23,6 +23,7 @@ #include "mpl_logging.h" #include "orig_symbol.h" #include "types_def.h" +#include "me_expr_utils.h" namespace maple { namespace { @@ -451,6 +452,7 @@ bool CompareBBContent(BB *bb1, BB *bb2) { if (offset1 != offset2) { return false; } + break; } case OP_return: break; @@ -635,81 +637,64 @@ bool UnreachBBAnalysis(const maple::MeFunction &f) { } } // anonymous namespace -// contains only one valid goto stmt -bool HasOnlyMeGotoStmt(BB &bb) { - if (IsMeEmptyBB(bb) || !bb.IsGoto()) { +bool MplStmtVisitor(BB &bb, const std::function &bbMatcher, + const std::function &stmtMatcher) { + if (bb.IsEmpty() || !bbMatcher(bb)) { + return false; + } + StmtNode *stmt = &bb.GetFirst(); + while (stmt != nullptr && stmt->GetOpCode() == OP_comment) { + stmt = stmt->GetRealNext(); + } + return stmt != nullptr && stmtMatcher(*stmt); +} + +bool MeStmtVisitor(BB &bb, std::function bbMatcher, std::function stmtMatcher) { + if (bb.IsMeStmtEmpty() || !bbMatcher(bb)) { return false; } MeStmt *stmt = bb.GetFirstMe(); - // Skip comment stmt while (stmt != nullptr && stmt->GetOp() == OP_comment) { stmt = stmt->GetNextMeStmt(); } - return (stmt->GetOp() == OP_goto); + return stmt != nullptr && stmtMatcher(*stmt); +} + +// contains only one valid goto stmt +bool HasOnlyMeGotoStmt(BB &bb) { + return MeStmtVisitor(bb, + [](const BB &bb) { return bb.IsGoto(); }, + [](const MeStmt &stmt) { return stmt.GetOp() == OP_goto; }); } // contains only one valid goto mpl stmt bool HasOnlyMplGotoStmt(BB &bb) { - if (IsMplEmptyBB(bb) || !bb.IsGoto()) { - return false; - } - StmtNode *stmt = &bb.GetFirst(); - // Skip comment stmt - if (stmt != nullptr && stmt->GetOpCode() == OP_comment) { - stmt = stmt->GetRealNext(); - } - return (stmt->GetOpCode() == OP_goto); + return MplStmtVisitor(bb, + [](const BB &bb) { return bb.IsGoto(); }, + [](const StmtNode &stmt) { return stmt.GetOpCode() == OP_goto; }); } // contains only one valid condgoto stmt bool HasOnlyMeCondGotoStmt(BB &bb) { - if (IsMeEmptyBB(bb) || bb.GetKind() != kBBCondGoto) { - return false; - } - MeStmt *stmt = bb.GetFirstMe(); - // Skip comment stmt - while (stmt != nullptr && stmt->GetOp() == OP_comment) { - stmt = stmt->GetNextMeStmt(); - } - return (stmt != nullptr && kOpcodeInfo.IsCondBr(stmt->GetOp())); + return MeStmtVisitor(bb, + [](const BB &bb) { return bb.GetKind() == kBBCondGoto; }, + [](const MeStmt &stmt) { return kOpcodeInfo.IsCondBr(stmt.GetOp()); }); } // contains only one valid condgoto mpl stmt bool HasOnlyMplCondGotoStmt(BB &bb) { - if (IsMplEmptyBB(bb) || bb.GetKind() != kBBCondGoto) { - return false; - } - StmtNode *stmt = &bb.GetFirst(); - // Skip comment stmt - if (stmt != nullptr && stmt->GetOpCode() == OP_comment) { - stmt = stmt->GetRealNext(); - } - return (stmt != nullptr && kOpcodeInfo.IsCondBr(stmt->GetOpCode())); + return MplStmtVisitor(bb, + [](const BB &bb) { return bb.GetKind() == kBBCondGoto; }, + [](const StmtNode &stmt) { return kOpcodeInfo.IsCondBr(stmt.GetOpCode()); }); } bool IsMeEmptyBB(BB &bb) { - if (bb.IsMeStmtEmpty()) { - return true; - } - MeStmt *stmt = bb.GetFirstMe(); - // Skip comment stmt - while (stmt != nullptr && stmt->GetOp() == OP_comment) { - stmt = stmt->GetNextMeStmt(); - } - return stmt == nullptr; + return !MeStmtVisitor(bb, [](auto&) { return true; }, [](auto&) { return true; }); } // contains no valid mpl stmt bool IsMplEmptyBB(BB &bb) { - if (bb.IsEmpty()) { - return true; - } - StmtNode *stmt = &bb.GetFirst(); - // Skip comment stmt - if (stmt != nullptr && stmt->GetOpCode() == OP_comment) { - stmt = stmt->GetRealNext(); - } - return stmt == nullptr; + return !MplStmtVisitor(bb, [](auto&) { return true; }, [](auto&) { return true; }); } // pred-connecting-succ @@ -1649,12 +1634,15 @@ bool OptimizeBB::CondBranchToSelect() { } (void)BranchBB2UncondBB(*currBB); // update phi - if (jointBB->GetPred().size() == 1) { // jointBB has only currBB as its pred + if (resLHS->IsVolatile()) { + // volatile symbols do not need phi, skip + } else if (jointBB->GetPred().size() == 1) { // jointBB has only currBB as its pred // just remove phinode jointBB->GetMePhiList().erase(resLHS->GetOstIdx()); } else { // set phi opnd as resLHS MePhiNode *phiNode = jointBB->GetMePhiList()[resLHS->GetOstIdx()]; + ASSERT_NOT_NULL(phiNode); int predIdx = GetRealPredIdx(*jointBB, *currBB); ASSERT(predIdx != -1, "[FUNC: %s]currBB is not a pred of jointBB", funcName.c_str()); phiNode->SetOpnd(static_cast(predIdx), resLHS); @@ -1864,7 +1852,7 @@ bool OptimizeBB::FoldCondBranchWithPredAdjacentIread() { if (foldExpr1 == nullptr || foldExpr2 == nullptr || foldExpr1->GetPrimType() != foldExpr2->GetPrimType()) { auto optBand1 = irmap->OptBandWithIread(*brInfo.opMeExpr1->GetOpnd(0), *brInfo.opMeExpr2->GetOpnd(0)); auto optBand2 = irmap->OptBandWithIread(*brInfo.opMeExpr1->GetOpnd(1), *brInfo.opMeExpr2->GetOpnd(1)); - if (optBand1 == nullptr || optBand2 == nullptr|| optBand1->GetPrimType() != optBand2->GetPrimType()) { + if (optBand1 == nullptr || optBand2 == nullptr || optBand1->GetPrimType() != optBand2->GetPrimType()) { return false; } MeExpr *newOpMeExpr = irmap->CreateMeExprCompare(brInfo.opMeExpr1->GetOp(), brInfo.opMeExpr1->GetPrimType(), @@ -2557,17 +2545,6 @@ bool OptimizeBB::OptimizeSwitchBB() { return true; } -MIRIntConst *GetIntConst(MeExpr &expr) { - if (expr.GetMeOp() != kMeOpConst) { - return nullptr; - } - auto cval = static_cast(expr).GetConstVal(); - if (cval->GetKind() != kConstInt) { - return nullptr; - } - return static_cast(cval); -} - MeExpr *SimplifyByVrp(MeIRMap &irmap, const MeExpr &expr1, const MeExpr &expr2, Opcode op) { auto vr1 = GetVRForSimpleCmpExpr(expr1); auto vr2 = GetVRForSimpleCmpExpr(expr2); diff --git a/src/mapleall/maple_me/src/pme_emit.cpp b/src/mapleall/maple_me/src/pme_emit.cpp index 90260d056c..895a7c7e36 100644 --- a/src/mapleall/maple_me/src/pme_emit.cpp +++ b/src/mapleall/maple_me/src/pme_emit.cpp @@ -136,22 +136,7 @@ BaseNode *PreMeEmitter::EmitPreMeExpr(MeExpr &meExpr, BaseNode *parent) { preMeExprExtensionMap[arrNode] = pmeExt; return arrNode; } - case OP_ashr: - case OP_band: - case OP_bior: - case OP_bxor: - case OP_cand: - case OP_cior: - case OP_div: - case OP_land: - case OP_lior: - case OP_lshr: - case OP_max: - case OP_min: - case OP_mul: - case OP_rem: - case OP_shl: - case OP_sub: + OP_CASE_GROUP: case OP_add: { OpMeExpr *opExpr = static_cast(&meExpr); BinaryNode *binNode = codeMP->New(meExpr.GetOp(), meExpr.GetPrimType()); @@ -360,6 +345,19 @@ BaseNode *PreMeEmitter::EmitPreMeExpr(MeExpr &meExpr, BaseNode *parent) { } } +template +void PreMeEmitter::SetAssertBoundaryNode(const MeStmt &meStmt, const Stmt *assertBoundaryStmt, + Node *assertBoundaryNode, PreMeMIRExtension *pmeExt) { + assertBoundaryNode->SetSrcPos(meStmt.GetSrcPosition()); + for (uint32 i = 0; i < assertBoundaryStmt->GetOpnds().size(); i++) { + assertBoundaryNode->GetNopnd().push_back(EmitPreMeExpr(*assertBoundaryStmt->GetOpnd(i), assertBoundaryNode)); + } + assertBoundaryNode->SetNumOpnds(static_cast(assertBoundaryNode->GetNopndSize())); + assertBoundaryNode->CopySafeRegionAttr(meStmt.GetStmtAttr()); + assertBoundaryNode->SetOriginalID(meStmt.GetOriginalId()); + preMeStmtExtensionMap[assertBoundaryNode->GetStmtID()] = pmeExt; +} + StmtNode* PreMeEmitter::EmitPreMeStmt(MeStmt &meStmt, BaseNode *parent) { PreMeMIRExtension *pmeExt = preMeMP->New(parent, &meStmt); switch (meStmt.GetOp()) { @@ -683,14 +681,7 @@ StmtNode* PreMeEmitter::EmitPreMeStmt(MeStmt &meStmt, BaseNode *parent) { CallAssertBoundaryStmtNode *assertBoundaryNode = codeMP->New( *codeMPAlloc, meStmt.GetOp(), assertBoundaryStmt->GetFuncNameIdx(), assertBoundaryStmt->GetParamIndex(), assertBoundaryStmt->GetStmtFuncNameIdx()); - assertBoundaryNode->SetSrcPos(meStmt.GetSrcPosition()); - for (uint32 i = 0; i < assertBoundaryStmt->GetOpnds().size(); i++) { - assertBoundaryNode->GetNopnd().push_back(EmitPreMeExpr(*assertBoundaryStmt->GetOpnd(i), assertBoundaryNode)); - } - assertBoundaryNode->SetNumOpnds(static_cast(assertBoundaryNode->GetNopndSize())); - assertBoundaryNode->CopySafeRegionAttr(meStmt.GetStmtAttr()); - assertBoundaryNode->SetOriginalID(meStmt.GetOriginalId()); - preMeStmtExtensionMap[assertBoundaryNode->GetStmtID()] = pmeExt; + SetAssertBoundaryNode(meStmt, assertBoundaryStmt, assertBoundaryNode, pmeExt); return assertBoundaryNode; } case OP_eval: @@ -740,14 +731,7 @@ StmtNode* PreMeEmitter::EmitPreMeStmt(MeStmt &meStmt, BaseNode *parent) { AssertBoundaryMeStmt *assertBoundaryStmt = static_cast(&meStmt); AssertBoundaryStmtNode *assertBoundaryNode = codeMP->New( *codeMPAlloc, meStmt.GetOp(), assertBoundaryStmt->GetFuncNameIdx()); - assertBoundaryNode->SetSrcPos(meStmt.GetSrcPosition()); - for (uint32 i = 0; i < assertBoundaryStmt->GetOpnds().size(); i++) { - assertBoundaryNode->GetNopnd().push_back(EmitPreMeExpr(*assertBoundaryStmt->GetOpnd(i), assertBoundaryNode)); - } - assertBoundaryNode->SetNumOpnds(static_cast(assertBoundaryNode->GetNopndSize())); - assertBoundaryNode->CopySafeRegionAttr(meStmt.GetStmtAttr()); - assertBoundaryNode->SetOriginalID(meStmt.GetOriginalId()); - preMeStmtExtensionMap[assertBoundaryNode->GetStmtID()] = pmeExt; + SetAssertBoundaryNode(meStmt, assertBoundaryStmt, assertBoundaryNode, pmeExt); return assertBoundaryNode; } case OP_syncenter: @@ -774,7 +758,7 @@ void PreMeEmitter::UpdateStmtInfoForLabelNode(LabelNode &label, BB &bb) const { void PreMeEmitter::UpdateStmtInfo(const MeStmt &meStmt, StmtNode &stmt, BlockNode &currBlock, FreqType frequency) const { - if (ipaInfo == nullptr || meStmt.GetStmtInfoId() == kInvalidIndex) { + if (ipaInfo == nullptr || meStmt.GetStmtInfoId() == utils::kInvalidIndex) { return; } auto &stmtInfo = ipaInfo->GetStmtInfo()[meStmt.GetStmtInfoId()]; diff --git a/src/mapleall/maple_me/src/prop.cpp b/src/mapleall/maple_me/src/prop.cpp index 5fc64efb61..235b341f3b 100644 --- a/src/mapleall/maple_me/src/prop.cpp +++ b/src/mapleall/maple_me/src/prop.cpp @@ -295,6 +295,9 @@ Propagatability Prop::Propagatable(MeExpr *x, BB *fromBB, bool atParm, bool chec if (!config.propagateGlobalRef && st->IsGlobal() && !st->IsFinal() && !st->IgnoreRC()) { return kPropNo; } + if (st->IsUnionReplaceCand()) { + return kPropNo; + } if (LocalToDifferentPU(st->GetStIdx(), *fromBB)) { return kPropNo; } diff --git a/src/mapleall/maple_me/src/seqvec.cpp b/src/mapleall/maple_me/src/seqvec.cpp index e566708273..0f435e518f 100644 --- a/src/mapleall/maple_me/src/seqvec.cpp +++ b/src/mapleall/maple_me/src/seqvec.cpp @@ -536,7 +536,7 @@ bool SeqVectorize::CanSeqVec(const IassignNode *s1, const IassignNode *s2, bool } static uint32 PreviousPowerOfTwo(unsigned int x) { - return 1U << ((sizeof(x) * 8 - 1) - static_cast(__builtin_clz(x))); + return 1U << ((sizeof(x) * 8 - 1) - static_cast(__builtin_clz(x))); } void SeqVectorize::MergeIassigns(MapleVector &cands) { diff --git a/src/mapleall/maple_me/src/ssa_devirtual.cpp b/src/mapleall/maple_me/src/ssa_devirtual.cpp index 03454c2b11..654bcbe46a 100644 --- a/src/mapleall/maple_me/src/ssa_devirtual.cpp +++ b/src/mapleall/maple_me/src/ssa_devirtual.cpp @@ -25,7 +25,7 @@ namespace maple { bool SSADevirtual::debug = false; static bool NonNullRetValue(const MIRFunction &called) { - static const std::unordered_set nonNullRetValueFuncs = { + static const std::unordered_set kNonNullRetValueFuncs = { "Ljava_2Futil_2FArrayList_3B_7Citerator_7C_28_29Ljava_2Futil_2FIterator_3B", "Ljava_2Futil_2FHashSet_3B_7Citerator_7C_28_29Ljava_2Futil_2FIterator_3B", "Lsun_2Fsecurity_2Fjca_2FProviderList_24ServiceList_3B_7Citerator_7C_28_29Ljava_2Futil_2FIterator_3B", @@ -36,7 +36,7 @@ static bool NonNullRetValue(const MIRFunction &called) { "Ljava_2Futil_2Fconcurrent_2FConcurrentSkipListMap_24KeySet_3B_7Citerator_7C_28_29Ljava_2Futil_2FIterator_3B", "Ljava_2Futil_2FCollections_24CheckedCollection_3B_7Citerator_7C_28_29Ljava_2Futil_2FIterator_3B" }; - return nonNullRetValueFuncs.find(called.GetName()) != nonNullRetValueFuncs.end(); + return kNonNullRetValueFuncs.find(called.GetName()) != kNonNullRetValueFuncs.end(); } static bool MaybeNull(const MeExpr &expr) { diff --git a/src/mapleall/maple_me/src/ssa_pre_for_hoist.cpp b/src/mapleall/maple_me/src/ssa_pre_for_hoist.cpp index feee624c18..97bdddb931 100644 --- a/src/mapleall/maple_me/src/ssa_pre_for_hoist.cpp +++ b/src/mapleall/maple_me/src/ssa_pre_for_hoist.cpp @@ -374,6 +374,7 @@ void ExprHoist::HoistExpr(const MapleVector &allOccs, int32 candId) { } } auto *hoistedOcc = GetHoistedOcc(*hs->cdHS, realocc->GetMeExpr(), realocc->GetDef()); + ASSERT_NOT_NULL(hoistedOcc); auto *hoistedOccDef = (hoistedOcc->GetOccType() == kOccReal && hoistedOcc->GetDef()) ? hoistedOcc->GetDef() : hoistedOcc; if (hoistedOccDef->GetClassID() != realocc->GetClassID()) { diff --git a/src/mapleall/maple_pgo/include/cfg_mst.h b/src/mapleall/maple_pgo/include/cfg_mst.h index ea1ce851c2..1b85f37f44 100644 --- a/src/mapleall/maple_pgo/include/cfg_mst.h +++ b/src/mapleall/maple_pgo/include/cfg_mst.h @@ -56,10 +56,10 @@ class CFGMST { private: uint32 FindGroup(uint32 bbId); bool UnionGroups(uint32 srcId, uint32 destId); - static constexpr int normalEdgeWeight = 2; - static constexpr int exitEdgeWeight = 3; - static constexpr int fakeExitEdgeWeight = 4; - static constexpr int criticalEdgeWeight = 4; + static constexpr int kNormalEdgeWeight = 2; + static constexpr int kExitEdgeWeight = 3; + static constexpr int kFakeExitEdgeWeight = 4; + static constexpr int kCriticalEdgeWeight = 4; MemPool *mp; MapleAllocator alloc; MapleVector allEdges; diff --git a/src/mapleall/maple_pgo/include/instrument.h b/src/mapleall/maple_pgo/include/instrument.h index f2170b4d7b..cf953d8fe6 100644 --- a/src/mapleall/maple_pgo/include/instrument.h +++ b/src/mapleall/maple_pgo/include/instrument.h @@ -30,11 +30,11 @@ class BBEdge { ~BBEdge() = default; - BB *GetSrcBB() const { + BB *GetSrcBB() { return srcBB; } - BB *GetDestBB() const { + BB *GetDestBB() { return destBB; } diff --git a/src/mapleall/maple_pgo/pgo_lib/CMakeLists.txt b/src/mapleall/maple_pgo/pgo_lib/CMakeLists.txt index 32eea4c0af..6d9502ec32 100644 --- a/src/mapleall/maple_pgo/pgo_lib/CMakeLists.txt +++ b/src/mapleall/maple_pgo/pgo_lib/CMakeLists.txt @@ -10,6 +10,14 @@ set(CMAKE_C_COMPILER ${GCC_LINARO_PATH}/bin/aarch64-linux-gnu-gcc) add_compile_options(-fpic -O2) +if (SYS_NAME STREQUAL "SUSE") + set(CMAKE_C_COMPILER aarch64-hpe-gcc) +elseif (SYS_NAME STREQUAL "Ubuntu") + set(CMAKE_C_COMPILER ${GCC_LINARO_PATH}/bin/aarch64-linux-gnu-gcc) +else () + message("error: unsupported target OS!") +endif() + add_library(mplpgo SHARED mplpgo.c mplpgo.h common_util.h) add_library(mplpgo_static STATIC mplpgo.c mplpgo.h common_util.h) diff --git a/src/mapleall/maple_pgo/src/cfg_mst.cpp b/src/mapleall/maple_pgo/src/cfg_mst.cpp index a709c20bb2..98860bb7ae 100644 --- a/src/mapleall/maple_pgo/src/cfg_mst.cpp +++ b/src/mapleall/maple_pgo/src/cfg_mst.cpp @@ -28,19 +28,19 @@ void CFGMST::BuildEdges(BB *commonEntry, BB *commonExit) { for (auto *succBB : curbb->GetSuccs()) { // exitBB incoming edge allocate high weight if (succBB->GetKind() == BB::BBKind::kBBReturn) { - AddEdge(curbb, succBB, exitEdgeWeight); + AddEdge(curbb, succBB, kExitEdgeWeight); continue; } if (IsCritialEdge(curbb, succBB)) { - AddEdge(curbb, succBB, criticalEdgeWeight, true); + AddEdge(curbb, succBB, kCriticalEdgeWeight, true); continue; } - AddEdge(curbb, succBB, normalEdgeWeight); + AddEdge(curbb, succBB, kNormalEdgeWeight); } } for (BB *bb : commonExit->GetPreds()) { - AddEdge(bb, commonExit, fakeExitEdgeWeight, false, true); + AddEdge(bb, commonExit, kFakeExitEdgeWeight, false, true); } bbGroups[commonExit->GetId()] = commonExit->GetId(); // insert fake edge to keep consistent diff --git a/src/mapleall/maple_pgo/src/litepgo.cpp b/src/mapleall/maple_pgo/src/litepgo.cpp index a9329ebc4b..310ea3b38e 100644 --- a/src/mapleall/maple_pgo/src/litepgo.cpp +++ b/src/mapleall/maple_pgo/src/litepgo.cpp @@ -122,7 +122,7 @@ void LiteProfile::ParseFuncProfile(MIRLexer &fdLexer, const std::string &moduleN if (fdLexer.GetTokenKind() != TK_intconst) { CHECK_FATAL_FALSE("expect integer after funcid "); } - uint64 identity = fdLexer.GetTheIntVal(); + uint64 identity = static_cast(fdLexer.GetTheIntVal()); if (!VerifyModuleHash(identity, moduleName)) { if (debugPrint) { LogInfo::MapleLogger() << "LITEPGO log : func " << @@ -137,7 +137,7 @@ void LiteProfile::ParseFuncProfile(MIRLexer &fdLexer, const std::string &moduleN if (fdLexer.GetTokenKind() != TK_intconst) { CHECK_FATAL_FALSE("expect integer after counterSz "); } - uint64 countersize = fdLexer.GetTheIntVal(); + int64 countersize = fdLexer.GetTheIntVal(); // parse cfghash ParseLitePgoKeyWord(fdLexer, "cfghash"); @@ -145,7 +145,7 @@ void LiteProfile::ParseFuncProfile(MIRLexer &fdLexer, const std::string &moduleN if (fdLexer.GetTokenKind() != TK_intconst) { CHECK_FATAL_FALSE("expect integer after counterSz "); } - uint64 cfghash = fdLexer.GetTheIntVal(); + uint64 cfghash = static_cast(fdLexer.GetTheIntVal()); if (cfghash > UINT32_MAX) { CHECK_FATAL_FALSE("unexpect cfg hash data type"); } @@ -171,7 +171,7 @@ void LiteProfile::ParseCounters(MIRLexer &fdLexer, const std::string &funcName, extremelyColdFuncs.emplace(funcName); } while (fdLexer.GetTokenKind() == TK_intconst) { - uint64 counterVal = fdLexer.GetTheIntVal(); + uint64 counterVal = static_cast(fdLexer.GetTheIntVal()); if (funcBBProfData.find(funcName) != funcBBProfData.end()) { funcBBProfData.find(funcName)->second.counter.emplace_back(counterVal); } else { diff --git a/src/mapleall/maple_phase/include/maple_phase_support.h b/src/mapleall/maple_phase/include/maple_phase_support.h index f175af19bb..a35e8c4f15 100644 --- a/src/mapleall/maple_phase/include/maple_phase_support.h +++ b/src/mapleall/maple_phase/include/maple_phase_support.h @@ -129,6 +129,7 @@ class PhaseTimeHandler { MPLTimer timer; bool isMultithread = false; MapleMap multiTimers; + uint32 depth = 0; // Nested timer is invalid, make sure only the outermost timer is valid. }; // usasge :: analysis dependency diff --git a/src/mapleall/maple_phase/include/phases.def b/src/mapleall/maple_phase/include/phases.def index 505cd6962c..a441fb1da2 100644 --- a/src/mapleall/maple_phase/include/phases.def +++ b/src/mapleall/maple_phase/include/phases.def @@ -20,10 +20,12 @@ ADDMODULEPHASE("outline", CLANG && Options::doOutline) // ginline ADDMODULEPHASE("ginline", CLANG && Options::O2 && Options::useInline && !Options::profileUse && Options::enableGInline) +ADDMODULEPHASE("CallTargetReplace", CLANG && opts::linkerTimeOpt.IsEnabledByUser() && + (!Options::profileUse && !Options::profileGen)) // run callgraph, simplify, constantfold again after ginline ADDMODULEPHASE("callgraph", CLANG && Options::O2 && Options::useInline && Options::enableGInline) ADDMODULEPHASE("simplify", CLANG && Options::O2 && !Options::genLMBC && Options::enableGInline) -ADDMODULEPHASE("Expand128Floats", CLANG) +ADDMODULEPHASE("LegalizeNumericTypes", CLANG) ADDMODULEPHASE("ConstantFold", CLANG && Options::O2 && Options::enableGInline) ADDMODULEPHASE("inline", CLANG && (Options::O2 && Options::useInline && Options::profileUse)) @@ -40,7 +42,7 @@ ADDMODULEPHASE("VtableImpl", JAVALANG) ADDMODULEPHASE("CodeReLayout", MeOption::optLevel == 2 && JAVALANG) ADDMODULEPHASE("javaehlower", JAVALANG) ADDMODULEPHASE("MUIDReplacement", JAVALANG) -ADDMODULEPHASE("Expand128Floats", true) +ADDMODULEPHASE("LegalizeNumericTypes", true) ADDMAPLEMEPHASE("VerifyMemorder", true) ADDMODULEPHASE("ConstantFold", JAVALANG || Options::O2) #endif @@ -88,6 +90,7 @@ ADDMAPLEMEPHASE("ssaprop", MeOption::optLevel >= 2) ADDMAPLEMEPHASE("aliasclass", MeOption::optLevel >= 2 || JAVALANG) ADDMAPLEMEPHASE("ssa", MeOption::optLevel >= 2 || JAVALANG) ADDMAPLEMEPHASE("dse", MeOption::optLevel >= 2) +ADDMAPLEMEPHASE("combineexpr", MeOption::optLevel >= 2 && CLANG) ADDMAPLEMEPHASE("analyzector", JAVALANG) ADDMAPLEMEPHASE("abcopt", false && JAVALANG && MeOption::optLevel >= 2) ADDMAPLEMEPHASE("loopcanon", MeOption::optLevel >= 2) diff --git a/src/mapleall/maple_phase/src/maple_phase_support.cpp b/src/mapleall/maple_phase/src/maple_phase_support.cpp index 528ff3abc1..57a45dc31c 100644 --- a/src/mapleall/maple_phase/src/maple_phase_support.cpp +++ b/src/mapleall/maple_phase/src/maple_phase_support.cpp @@ -18,6 +18,9 @@ namespace maple { void PhaseTimeHandler::RunBeforePhase(const MaplePhaseInfo &pi) { (void)pi; + if (depth++ > 0) { + return; + } if (isMultithread) { static std::mutex mtx; ParallelGuard guard(mtx, true); @@ -32,6 +35,9 @@ void PhaseTimeHandler::RunBeforePhase(const MaplePhaseInfo &pi) { } void PhaseTimeHandler::RunAfterPhase(const MaplePhaseInfo &pi) { + if (--depth > 0) { + return; + } static std::mutex mtx; ParallelGuard guard(mtx, true); long usedTime = 0; diff --git a/src/mapleall/maple_util/BUILD.gn b/src/mapleall/maple_util/BUILD.gn index bbd45b4af4..6130a498dd 100755 --- a/src/mapleall/maple_util/BUILD.gn +++ b/src/mapleall/maple_util/BUILD.gn @@ -30,11 +30,12 @@ src_libmplutil = [ "src/chain_layout.cpp", "src/mpl_profdata.cpp", "src/suffix_array.cpp", - "src/mpl_posix_sighandler.cpp" + "src/mpl_posix_sighandler.cpp", + "src/bit_value.cpp", + "src/orig_symbol.cpp", ] src_libcommandline = [ - "src/set_spec.cpp", "src/cl_option.cpp", "src/cl_option_parser.cpp", "src/cl_parser.cpp", @@ -57,8 +58,6 @@ include_libmplutil = [ include_libcommandline = [ "${MAPLEALL_ROOT}/maple_util/include", "${MAPLEALL_ROOT}/maple_ir/include", - "${THIRD_PARTY_ROOT}/bounds_checking_function/include", - "${MAPLEALL_ROOT}/mempool/include", "${MAPLEALL_ROOT}/maple_driver/include", ] diff --git a/src/mapleall/maple_util/CMakeLists.txt b/src/mapleall/maple_util/CMakeLists.txt index de60ad433e..acf3b6e6be 100644 --- a/src/mapleall/maple_util/CMakeLists.txt +++ b/src/mapleall/maple_util/CMakeLists.txt @@ -32,10 +32,11 @@ set(src_libmplutil src/mpl_profdata.cpp src/suffix_array.cpp src/mpl_posix_sighandler.cpp + src/bit_value.cpp + src/orig_symbol.cpp ) set(src_libcommandline - src/set_spec.cpp src/cl_option.cpp src/cl_option_parser.cpp src/cl_parser.cpp @@ -65,7 +66,7 @@ set(CMAKE_USE_PTHREADS_INIT 1) set(THREADS_PREFER_PTHREAD_FLAG ON) find_package(Threads REQUIRED) #target_link_libraries(libmplutil pthread) -set_target_properties(libmplutil PROPERTIES +set_target_properties(libmplutil PROPERTIES ARCHIVE_OUTPUT_DIRECTORY ${MAPLE_BUILD_OUTPUT}/lib/${HOST_ARCH} # STATIC_LIBRARY_FLAGS "${CMAKE_STATIC_LINKER_FLAGS} -lpthread -ldl" ) @@ -76,12 +77,10 @@ add_library(libcommandline STATIC ${src_libcommandline}) target_include_directories(libcommandline PRIVATE ${MAPLEALL_ROOT}/maple_util/include ${MAPLEALL_ROOT}/maple_ir/include - ${THIRD_PARTY_ROOT}/bounds_checking_function/include - ${MAPLEALL_ROOT}/mempool/include ${MAPLEALL_ROOT}/maple_driver/include include ) -set_target_properties(libcommandline PROPERTIES +set_target_properties(libcommandline PROPERTIES ARCHIVE_OUTPUT_DIRECTORY ${MAPLE_BUILD_OUTPUT}/lib/${HOST_ARCH} ) diff --git a/src/mapleall/maple_util/include/bit_value.h b/src/mapleall/maple_util/include/bit_value.h new file mode 100644 index 0000000000..50ee8d01e6 --- /dev/null +++ b/src/mapleall/maple_util/include/bit_value.h @@ -0,0 +1,89 @@ +/* + * Copyright (c) [2023] Huawei Technologies Co.,Ltd.All rights reserved. + * + * OpenArkCompiler is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * + * http://license.coscl.org.cn/MulanPSL2 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ +#ifndef MAPLE_UTIL_INCLUDE_BIT_VALUE_H +#define MAPLE_UTIL_INCLUDE_BIT_VALUE_H +#include "me_ir.h" +#include "mpl_int_val.h" + +namespace maple { +class BitValue { + public: + explicit BitValue(uint32 bitwidth) : zeroBits(0, bitwidth, false), oneBits(0, bitwidth, false) {} + BitValue(IntVal zero, IntVal one) : zeroBits(std::move(zero)), oneBits(std::move(one)) { + ASSERT(zeroBits.GetBitWidth() == oneBits.GetBitWidth() && zeroBits.IsSigned() == oneBits.IsSigned(), + "zeroBits and oneBits does not have same bit width or sign flag"); + } + IntVal GetZero() const { + return zeroBits; + } + IntVal GetOne() const { + return oneBits; + } + + bool IsConstant() const { + return (zeroBits | oneBits).AreAllBitsOne(); + } + + bool HasConflict() const { + return !(zeroBits & oneBits).AreAllBitsZeros(); + } + + uint16 GetBitWidth() const { + ASSERT(zeroBits.GetBitWidth() == oneBits.GetBitWidth(), "zeroBits and oneBits does not have same bit width"); + return zeroBits.GetBitWidth(); + } + + BitValue Extend(uint16 bitWidth) const { + bool isSigned = zeroBits.IsSigned(); + IntVal newZero = zeroBits.Extend(bitWidth, isSigned); + if (!isSigned) { + newZero.SetBits(oneBits.GetBitWidth(), bitWidth); + } + return BitValue(newZero, oneBits.Extend(bitWidth, isSigned)); + } + + BitValue Trunc(uint16 bitwidth) const { + bool isSigned = zeroBits.IsSigned(); + return BitValue(zeroBits.Trunc(bitwidth, isSigned), oneBits.Trunc(bitwidth, isSigned)); + } + + BitValue TruncOrExtend(uint16 bitwidth) const { + if (bitwidth > GetBitWidth()) { + return Extend(bitwidth); + } + if (bitwidth < GetBitWidth()) { + return Trunc(bitwidth); + } + return *this; + } + + BitValue operator&(const BitValue &rhs) const; + BitValue operator|(const BitValue &rhs) const; + BitValue operator^(const BitValue &rhs) const; + + public: + IntVal zeroBits; + IntVal oneBits; +}; + +inline BitValue CreateFromConst(const IntVal &c, bool isSigned = false) { + return BitValue(IntVal(~c, isSigned), IntVal(c, isSigned)); +} + +void ComputeBitValueOfExpr(const MeExpr &expr, const IntVal &demandedBits, BitValue &known, uint32 depth); +BitValue GetBitValueOfAndOrXorExpr(const MeExpr &expr, const IntVal &demandedBits, const BitValue &lhsKnown, + const BitValue &rhsKnown, uint32 depth); +} // namespace maple +#endif \ No newline at end of file diff --git a/src/mapleall/maple_util/include/chain_layout.h b/src/mapleall/maple_util/include/chain_layout.h index 6444d94709..5880471087 100644 --- a/src/mapleall/maple_util/include/chain_layout.h +++ b/src/mapleall/maple_util/include/chain_layout.h @@ -766,6 +766,10 @@ class ChainLayout { considerBetterPred = val; } + void SetMarkNeverExe(bool val) { + markNeverExe = val; + } + void SetNodeTemp(uint32 nodeId, ExeTemperature temp) { CHECK_FATAL(nodeTemps != nullptr, "nodeTemps should have been reset"); CHECK_FATAL(nodeId < nodeTemps->size(), "container check"); diff --git a/src/mapleall/maple_util/include/cl_parser.h b/src/mapleall/maple_util/include/cl_parser.h index 6b3cbe5de6..bbd98242e8 100644 --- a/src/mapleall/maple_util/include/cl_parser.h +++ b/src/mapleall/maple_util/include/cl_parser.h @@ -72,6 +72,7 @@ struct OptionCategory { } } + void ClearJoinedOpt(); const std::vector &GetEnabledOptions() { return enabledOptions; } diff --git a/src/mapleall/maple_util/include/dominance.h b/src/mapleall/maple_util/include/dominance.h index 29e818770d..058680c161 100644 --- a/src/mapleall/maple_util/include/dominance.h +++ b/src/mapleall/maple_util/include/dominance.h @@ -226,7 +226,7 @@ class Dominance { if (postOrderNo == -1) { continue; } - reversePostOrder[maxPostOrderID - static_cast(postOrderNo)] = nodeVec[i]; + reversePostOrder[maxPostOrderID - static_cast(postOrderNo)] = nodeVec[i]; } } diff --git a/src/mapleall/maple_util/include/error_code.h b/src/mapleall/maple_util/include/error_code.h index a91f34aa9d..97b1cf6a90 100644 --- a/src/mapleall/maple_util/include/error_code.h +++ b/src/mapleall/maple_util/include/error_code.h @@ -26,7 +26,8 @@ enum ErrorCode { kErrorToolNotFound, kErrorCompileFail, kErrorNotImplement, - kErrorUnKnownFileType + kErrorUnKnownFileType, + kErrorCreateFile }; void PrintErrorMessage(int ret); diff --git a/src/mapleall/maple_util/include/file_utils.h b/src/mapleall/maple_util/include/file_utils.h index b0b2721b6e..a6e06ab8f9 100644 --- a/src/mapleall/maple_util/include/file_utils.h +++ b/src/mapleall/maple_util/include/file_utils.h @@ -15,9 +15,9 @@ #ifndef MAPLE_DRIVER_INCLUDE_FILE_UTILS_H #define MAPLE_DRIVER_INCLUDE_FILE_UTILS_H #include +#include #include "types_def.h" #include "mpl_logging.h" -#include "mempool.h" #include "string_utils.h" namespace maple { @@ -78,26 +78,23 @@ class FileUtils { const std::string &defaultRoot = "." + kFileSeperatorStr); static InputFileType GetFileType(const std::string &filePath); static InputFileType GetFileTypeByMagicNumber(const std::string &pathName); - static char* LoadFile(const char *filename); static std::string ExecuteShell(const char *cmd); static bool GetAstFromLib(const std::string libPath, std::vector &astInputs); + static bool CreateFile(const std::string &file); + static std::string GetGccBin(); + static bool Rmdirs(const std::string &dirPath); const std::string &GetTmpFolder() const { return tmpFolderPath; }; - MemPool &GetMemPool() { - return *tempMP; - }; static std::string GetOutPutDir(); bool DelTmpDir() const; std::string GetTmpFolderPath() const; private: std::string tmpFolderPath; - MemPool *tempMP = nullptr; - FileUtils() : tmpFolderPath(GetTmpFolderPath()), tempMP(memPoolCtrler.NewMemPool("file_utils", true)) {} + FileUtils() : tmpFolderPath(GetTmpFolderPath()) {} ~FileUtils() { - memPoolCtrler.DeleteMemPool(tempMP); if (!DelTmpDir()) { maple::LogInfo::MapleLogger() << "DelTmpDir failed" << '\n'; }; diff --git a/src/mapleall/maple_util/include/mem_reference_table.h b/src/mapleall/maple_util/include/mem_reference_table.h new file mode 100644 index 0000000000..22f02cb81f --- /dev/null +++ b/src/mapleall/maple_util/include/mem_reference_table.h @@ -0,0 +1,86 @@ +/* + * Copyright (c) [2023] Huawei Technologies Co.,Ltd.All rights reserved. + * + * OpenArkCompiler is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * + * http://license.coscl.org.cn/MulanPSL2 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ +#ifndef MAPLE_IR_INCLUDE_MEM_REFERENCE_TABLE_H +#define MAPLE_IR_INCLUDE_MEM_REFERENCE_TABLE_H + +#include "mempool_allocator.h" +#include "mir_module.h" +#include "orig_symbol.h" + +namespace maple { + +using MemDefUseSet = MapleUnorderedSet; + +class MemDefUse { + public: + explicit MemDefUse(MapleAllocator &allocator) + : defSet(allocator.Adapter()), + useSet(allocator.Adapter()) {} + ~MemDefUse(); + + MemDefUseSet &GetDefSet() { + return defSet; + } + + MemDefUseSet &GetUseSet() { + return useSet; + } + + private: + MemDefUseSet defSet; + MemDefUseSet useSet; +}; + +using MemDefUsePart = MapleUnorderedMap; +using OstTable = MapleVector; +class MemReferenceTable { + public: + MemReferenceTable(MapleAllocator &allocator, MIRFunction &func) + : allocator(allocator), + func(func), + ostTable(allocator.Adapter()), + memDefUsePart(allocator.Adapter()) {} + ~MemReferenceTable() {} + + MIRFunction &GetFunction() { + return func; + } + + MemDefUsePart &GetMemDefUsePart() { + return memDefUsePart; + } + + OstTable &GetOstTable() { + return ostTable; + } + + MemDefUse *GetOrCreateMemDefUseFromBaseNode(BaseNode *node) { + auto iter = memDefUsePart.find(node); + if (iter != memDefUsePart.end()) { + return iter->second; + } + auto *newDefUse = allocator.New(allocator); + memDefUsePart[node] = newDefUse; + return newDefUse; + } + + private: + MapleAllocator &allocator; + MIRFunction &func; + OstTable ostTable; + MemDefUsePart memDefUsePart; +}; +} // namespace maple +#endif // MAPLE_IR_INCLUDE_MEM_REFERENCE_TABLE_H diff --git a/src/mapleall/maple_util/include/mpl_int_val.h b/src/mapleall/maple_util/include/mpl_int_val.h index 37bbfdca0a..28f9dca976 100644 --- a/src/mapleall/maple_util/include/mpl_int_val.h +++ b/src/mapleall/maple_util/include/mpl_int_val.h @@ -30,24 +30,17 @@ class IntVal { u.value = 0; } - IntVal(uint64 val, uint16 bitWidth, bool isSigned) : width(bitWidth), sign(isSigned) { + template>>> + IntVal(T val, uint16 bitWidth, bool isSigned) : width(bitWidth), sign(isSigned) { Init(val); TruncInPlace(); } - IntVal(const uint64 pVal[], uint16 bitWidth, bool isSigned) : width(bitWidth), sign(isSigned) { - Init(pVal); - TruncInPlace(); - } - - IntVal(uint64 val, PrimType type) : IntVal(val, GetPrimTypeActualBitSize(type), IsSignedInteger(type)) { + template>>> + IntVal(T val, PrimType type) : IntVal(val, GetPrimTypeActualBitSize(type), IsSignedInteger(type)) { ASSERT(IsPrimitiveInteger(type) || IsPrimitiveVectorInteger(type), "Type must be integral"); } - IntVal(const uint64 pVal[], PrimType type) : IntVal(pVal, GetPrimTypeActualBitSize(type), IsSignedInteger(type)) { - ASSERT(IsPrimitiveInteger(type), "Type must be integral"); - } - IntVal(const IntVal &val, PrimType type) : width(GetPrimTypeActualBitSize(type)), sign(IsSignedInteger(type)) { ASSERT(IsPrimitiveInteger(type), "Type must be integral"); Init(val.u, !val.IsOneWord()); @@ -169,9 +162,9 @@ class IntVal { ASSERT(IsOneSignificantWord(), "value doesn't fit into 64 bits"); uint64 value = IsOneWord() ? u.value : u.pValue[0]; // if size == 0, just return the value itself because it's already truncated for an appropriate width - ASSERT(wordBitSize >= size, "wordBitSize should >= size"); + ASSERT(kWordBitSize >= size, "kWordBitSize should >= size"); return (size != 0) ? - (value << static_cast(wordBitSize - size)) >> static_cast(wordBitSize - size) : value; + (value << static_cast(kWordBitSize - size)) >> static_cast(kWordBitSize - size) : value; } /// @return sign extended value @@ -181,10 +174,10 @@ class IntVal { uint8 bitWidth = (size != 0) ? size : static_cast(width); ASSERT(size <= width, "size should <= %u, but got %u", width, size); // Do not rely on compiler implement-defined behavior for signed integer shifting - uint8 shift = static_cast(static_cast(wordBitSize - bitWidth)); + uint8 shift = static_cast(static_cast(kWordBitSize - bitWidth)); value <<= shift; // prepare leading ones for negative value - uint64 leadingOnes = allOnes << ((bitWidth < wordBitSize) ? bitWidth : static_cast(wordBitSize - 1U)); + uint64 leadingOnes = kAllOnes << ((bitWidth < kWordBitSize) ? bitWidth : static_cast(kWordBitSize - 1U)); if (bitWidth != 0) { return static_cast(GetBit(static_cast(static_cast(bitWidth - 1U))) ? ((value >> shift) | leadingOnes) : (value >> shift)); @@ -204,7 +197,7 @@ class IntVal { /// @return true if all bits are 1 bool AreAllBitsOne() const { if (IsOneWord()) { - return u.value == (allOnes >> static_cast(wordBitSize - width)); + return u.value == (kAllOnes >> static_cast(kWordBitSize - width)); } return CountTrallingOnes() == width; @@ -246,9 +239,9 @@ class IntVal { return WideIsMinValue(); } - /// @return true if the value doesn't fit in wordBitSize + /// @return true if the value doesn't fit in kWordBitSize bool IsOneWord() const { - return width <= wordBitSize; + return width <= kWordBitSize; } void SetMaxValue() { @@ -260,7 +253,8 @@ class IntVal { sign = isSigned; width = bitWidth; if (IsOneWord()) { - u.value = sign ? ((uint64(1) << (width - 1)) - 1) : (allOnes >> (wordBitSize - width)); + u.value = sign ? ((uint64(1) << static_cast(width - 1UL)) - 1UL) : + (kAllOnes >> static_cast(kWordBitSize - width)); } else { WideSetMaxValue(); } @@ -299,6 +293,15 @@ class IntVal { /// @return quiantity of non-zero bits uint16 CountPopulation() const; + /// @return true if all bits set in this IntVal are also set in rhs + bool IsSubsetOf(const IntVal &rhs) const { + ASSERT(width == rhs.width && sign == rhs.sign, "bit-width and sign must be the same"); + if (IsOneWord()) { + return (u.value & ~rhs.u.value) == 0; + } + return WideIsSubsetOf(rhs); + } + // Comparison operators that manipulate on values with the same sign and bit-width bool operator==(const IntVal &rhs) const { ASSERT(width == rhs.width && sign == rhs.sign, "bit-width and sign must be the same"); @@ -651,11 +654,11 @@ class IntVal { if (IsOneWord()) { uint16 truncWidth = (bitWidth != 0) ? bitWidth : width; - u.value &= allOnes >> (wordBitSize - truncWidth); + u.value &= kAllOnes >> (kWordBitSize - truncWidth); } else { uint16 truncWidth = (bitWidth == 0) ? bitWidth : width; - uint16 lastWord = GetNumWords() - 1; - u.pValue[lastWord] &= allOnes >> (truncWidth % wordBitSize); + uint16 lastWord = static_cast(GetNumWords() - 1UL); + u.pValue[lastWord] &= kAllOnes >> static_cast(truncWidth % kWordBitSize); } if (bitWidth != 0) { @@ -685,7 +688,7 @@ class IntVal { IntVal Extend(uint16 newWidth, bool isSigned) const { ASSERT(newWidth > width, "invalid size for extension"); - if (IsOneWord() && newWidth <= wordBitSize) { + if (IsOneWord() && newWidth <= kWordBitSize) { return IntVal(GetExtValue(), newWidth, isSigned); } @@ -702,9 +705,74 @@ class IntVal { return newWidth <= width ? Trunc(newWidth, isSigned) : Extend(newWidth, isSigned); } + IntVal ByteSwap() const{ + if (width == k16BitSize) { + return IntVal(__builtin_bswap16(static_cast(u.value)), width, sign); + } + if (width == k32BitSize) { + return IntVal(__builtin_bswap32(static_cast(u.value)), width, sign); + } + if (width == k64BitSize) { + return IntVal(__builtin_bswap64(u.value), width, sign); + } + + CHECK_FATAL(width % k64BitSize == 0, "unsupport bswap bit width of %d", width); + + IntVal res(0, width, sign); + for (uint16 i = 0 ; i < GetNumWords(); ++i) { + res.u.pValue[i] = __builtin_bswap64(u.pValue[GetNumWords() - i - 1]); + } + return res; + } + /// @return true if all significant bits fit into one word bool IsOneSignificantWord() const { - return IsOneWord() || (CountSignificantBits() <= wordBitSize); + return IsOneWord() || (CountSignificantBits() <= kWordBitSize); + } + + /// set bits form \p low to \p high + void SetBits(uint16 low, uint16 high) { + ASSERT(high <= width, "high bit out of value range"); + ASSERT(low <= width, "high bit out of value range"); + ASSERT(low <= high, "low is greater than high"); + if (low == high) { + return; + } + if (low < kWordBitSize && high <= kWordBitSize) { + uint64 mask = kAllOnes >> (kWordBitSize - (high - low)); + mask <<= low; + if (IsOneWord()) { + u.value |= mask; + } else { + u.pValue[0] |= mask; + } + } else { + WideSetBits(low, high); + } + } + + bool GetBit(uint16 bit) const { + ASSERT(bit < width, "Required bit is out of value range"); + if (IsOneWord()) { + return (u.value & (uint64(1) << bit)) != 0; + } + + uint8 word = static_cast(GetNumWords(static_cast(bit + 1UL)) - 1UL); + uint8 wordOffset = bit % kWordBitSize; + + return (u.pValue[word] & (uint64(1) << wordOffset)) != 0; + } + + /// @brief set the given bit to zero + void ClearBit(uint16 bit) { + ASSERT(bit < width, "Required bit is out of value range"); + uint64 mask = ~(uint64(1) << (bit % kWordBitSize)); + if (IsOneWord()) { + u.value = u.value & mask; + } else { + uint16 word = WordNumber(bit); + u.pValue[word] = u.pValue[word] & mask; + } } /// @brief get as string @@ -717,9 +785,19 @@ class IntVal { /// @brief dump to ostream void Dump(std::ostream &os) const; + static constexpr uint64 kAllOnes = uint64(~0); + private: static uint8 GetNumWords(uint16 bitWidth) { - return static_cast((bitWidth + wordBitSize - 1) / wordBitSize); + return static_cast(static_cast(bitWidth + kWordBitSize - 1) / kWordBitSize); + } + + static uint16 WordNumber(uint16 bitPos) { + return bitPos / kWordBitSize; + } + + static uint16 BitNumber(uint16 bitPos) { + return bitPos % kWordBitSize; } /// @brief compare two Wide integers @@ -800,13 +878,18 @@ class IntVal { /// @brief set max maximum value for wide integer void WideMinMaxValue(); + bool WideIsSubsetOf(const IntVal &rhs) const; + + /// set bits form \p low to \p high + void WideSetBits(uint16 low, uint16 high); + /// @return value which sign/zero extended to wide integer IntVal ExtendToWideInt(uint16 newWidth, bool isSigned) const; /// @brief set the given bit to one void SetBit(uint16 bit) { ASSERT(bit < width, "Required bit is out of value range"); - uint64 mask = uint64(1) << (bit % wordBitSize); + uint64 mask = uint64(1) << static_cast(bit % kWordBitSize); if (IsOneWord()) { u.value = u.value | mask; } else { @@ -817,21 +900,8 @@ class IntVal { /// @brief set the sign bit to one and set 'sign' to true void SetSignBit() { - SetBit(width - static_cast(1)); + SetBit(static_cast(width - 1UL)); } - - bool GetBit(uint16 bit) const { - ASSERT(bit < width, "Required bit is out of value range"); - if (IsOneWord()) { - return (u.value & (uint64(1) << bit)) != 0; - } - - uint8 word = static_cast(GetNumWords(bit + 1) - 1); - uint8 wordOffset = bit % wordBitSize; - - return (u.pValue[word] & (uint64(1) << wordOffset)) != 0; - } - using Storage = union U { uint64 value; // Used to process the <= 64 bits values uint64 *pValue; // Used to store wide values @@ -871,10 +941,7 @@ class IntVal { void WideInit(const uint64 *val); Storage u; - - static constexpr uint8 wordBitSize = sizeof(uint64) * CHAR_BIT; - static constexpr uint64 allOnes = uint64(~0); - + static constexpr uint8 kWordBitSize = sizeof(uint64) * CHAR_BIT; uint16 width = 0; bool sign; }; diff --git a/src/mapleall/maple_util/include/mpl_timer.h b/src/mapleall/maple_util/include/mpl_timer.h index 256329157a..333e96b53d 100644 --- a/src/mapleall/maple_util/include/mpl_timer.h +++ b/src/mapleall/maple_util/include/mpl_timer.h @@ -16,6 +16,10 @@ #define MAPLE_UTIL_INCLUDE_MPL_TIMER_H #include +#include +#include +#include +#include namespace maple { class MPLTimer { @@ -24,13 +28,94 @@ class MPLTimer { ~MPLTimer(); void Start(); void Stop(); - long Elapsed(); - long ElapsedMilliseconds(); - long ElapsedMicroseconds(); - + long Elapsed() const; + long ElapsedMilliseconds() const; + long ElapsedMicroseconds() const; private: std::chrono::system_clock::time_point startTime; std::chrono::system_clock::time_point endTime; }; + +class MPLTimerManager { + public: + enum class Unit { + kMicroSeconds, // us + kMilliSeconds, // ms + kSeconds, // s + }; + + // time data + struct Timer { + void Start() noexcept { + startTime = std::chrono::system_clock::now(); + ++count; + } + + void Stop() noexcept { + useTime += (std::chrono::system_clock::now() - startTime); + } + + template + long Elapsed() const noexcept { + return std::chrono::duration_cast(useTime).count(); + } + + std::chrono::system_clock::time_point startTime; + std::chrono::nanoseconds useTime; + uint32_t count = 0; // run count + }; + + MPLTimerManager() = default; + virtual ~MPLTimerManager() = default; + + void Clear() { + allTimer.clear(); + } + + Timer &GetTimerFormKey(const std::string &key) { + return allTimer[key]; + } + + template + std::string ConvertAllTimer2Str() const { + std::ostringstream os; + for (auto &[key, timer] : allTimer) { + os << "\t" << key << ": "; + if constexpr (unit == Unit::kMicroSeconds) { + os << timer.Elapsed() << "us"; + } else if constexpr (unit == Unit::kMilliSeconds) { + os << timer.Elapsed() << "ms"; + } else { + static_assert(unit == Unit::kSeconds, "unknown units"); + os << timer.Elapsed() << "s"; + } + os << ", count: " << timer.count << std::endl; + } + return os.str(); + } + private: + std::map allTimer; +}; + +class MPLTimerRegister { + public: + MPLTimerRegister(MPLTimerManager &timerM, const std::string &key) { + timer = &timerM.GetTimerFormKey(key); + timer->Start(); + } + + ~MPLTimerRegister() { + Stop(); + } + + void Stop() noexcept { + if (timer != nullptr) { + timer->Stop(); + timer = nullptr; + } + } + private: + MPLTimerManager::Timer *timer = nullptr; +}; } // namespace maple #endif // MAPLE_UTIL_INCLUDE_MPL_TIMER_H diff --git a/src/mapleall/maple_me/include/orig_symbol.h b/src/mapleall/maple_util/include/orig_symbol.h similarity index 99% rename from src/mapleall/maple_me/include/orig_symbol.h rename to src/mapleall/maple_util/include/orig_symbol.h index 485e4122b5..6dc582c7a0 100644 --- a/src/mapleall/maple_me/include/orig_symbol.h +++ b/src/mapleall/maple_util/include/orig_symbol.h @@ -17,7 +17,6 @@ #include "mir_module.h" #include "mir_symbol.h" #include "mir_preg.h" -#include "mir_function.h" #include "mpl_number.h" #include "class_hierarchy.h" @@ -352,7 +351,7 @@ class SymbolFieldPair { SymbolFieldPair(const StIdx &stIdx, FieldID fld, const TyIdx &tyIdx, const OffsetType &offset = OffsetType(kOffsetUnknown)) : stIdx(stIdx), - fldIDAndOffset(static_cast(static_cast(static_cast(offset.val)) << 32U) + fld), + fldIDAndOffset(static_cast(static_cast(static_cast(offset.val)) << 32U) + fld), tyIdx(tyIdx) {} ~SymbolFieldPair() = default; bool operator==(const SymbolFieldPair& pairA) const { diff --git a/src/mapleall/maple_util/include/profile.h b/src/mapleall/maple_util/include/profile.h index 130a017e17..dd5646c6cb 100644 --- a/src/mapleall/maple_util/include/profile.h +++ b/src/mapleall/maple_util/include/profile.h @@ -52,7 +52,7 @@ class Profile { ~BBInfo() = default; }; - static const uint8 stringEnd; + static const uint8 kStringEnd; void InitTestData(); bool CheckFuncHot(const std::string &funcName) const; bool CheckMethodHot(const std::string &className) const; diff --git a/src/mapleall/maple_util/include/ptr_list_ref.h b/src/mapleall/maple_util/include/ptr_list_ref.h index 0c48eaedd8..8f52e0a3a0 100644 --- a/src/mapleall/maple_util/include/ptr_list_ref.h +++ b/src/mapleall/maple_util/include/ptr_list_ref.h @@ -131,10 +131,10 @@ class PtrListRefIterator { PtrListRefIterator() = default; - explicit PtrListRefIterator(pointer _Ptr) : ptr(_Ptr) {} + explicit PtrListRefIterator(pointer pointr) : ptr(pointr) {} template >::value>> - PtrListRefIterator(const PtrListRefIterator &_Iter) : ptr(_Iter.d()) {} + PtrListRefIterator(const PtrListRefIterator &iter) : ptr(iter.d()) {} ~PtrListRefIterator() = default; @@ -201,9 +201,9 @@ class PtrListRef { using const_reverse_iterator = ReversePtrListRefIterator; PtrListRef() = default; - explicit PtrListRef(pointer _Value) : first(_Value), last(_Value) {} + explicit PtrListRef(pointer value) : first(value), last(value) {} - PtrListRef(pointer _First, pointer _Last) : first(_First), last(_Last == nullptr ? _First : _Last) {} + PtrListRef(pointer firster, pointer laster) : first(firster), last(laster == nullptr ? firster : laster) {} ~PtrListRef() = default; @@ -275,27 +275,27 @@ class PtrListRef { return first == nullptr; } - void update_front(pointer _Value) { - if (_Value != nullptr) { - _Value->SetPrev(nullptr); + void update_front(pointer value) { + if (value != nullptr) { + value->SetPrev(nullptr); } - this->first = _Value; + this->first = value; } - void push_front(pointer _Value) { + void push_front(pointer val) { if (this->last == nullptr) { - this->first = _Value; - this->last = _Value; - ASSERT(_Value != nullptr, "null ptr check"); - _Value->SetPrev(nullptr); - _Value->SetNext(nullptr); + this->first = val; + this->last = val; + ASSERT(val != nullptr, "null ptr check"); + val->SetPrev(nullptr); + val->SetNext(nullptr); } else { ASSERT(this->first != nullptr, "null ptr check"); - this->first->SetPrev(_Value); - ASSERT(_Value != nullptr, "null ptr check"); - _Value->SetPrev(nullptr); - _Value->SetNext(this->first); - this->first = _Value; + this->first->SetPrev(val); + ASSERT(val != nullptr, "null ptr check"); + val->SetPrev(nullptr); + val->SetNext(this->first); + this->first = val; } } @@ -310,24 +310,24 @@ class PtrListRef { } } - void update_back(pointer _Value) { - if (_Value != nullptr) { - _Value->SetNext(nullptr); + void update_back(pointer val) { + if (val != nullptr) { + val->SetNext(nullptr); } - this->last = _Value; + this->last = val; } - void push_back(pointer _Value) { + void push_back(pointer val) { if (this->last == nullptr) { - this->first = _Value; - this->last = _Value; - _Value->SetPrev(nullptr); + this->first = val; + this->last = val; + val->SetPrev(nullptr); } else { - this->last->SetNext(_Value); - _Value->SetPrev(this->last); - this->last = _Value; + this->last->SetNext(val); + val->SetPrev(this->last); + this->last = val; } - _Value->SetNext(nullptr); + val->SetNext(nullptr); } void pop_back() { @@ -344,69 +344,69 @@ class PtrListRef { } } - void insert(const_iterator _Where, pointer _Value) { - if (_Where == const_iterator(this->first)) { - this->push_front(_Value); - } else if (_Where == this->cend()) { - this->push_back(_Value); + void insert(const_iterator where, pointer value) { + if (where == const_iterator(this->first)) { + this->push_front(value); + } else if (where == this->cend()) { + this->push_back(value); } else { // `_Where` stands for the position, however we made the data and node combined, so a const_cast is needed. - auto *ptr = const_cast(&*_Where); - _Value->SetPrev(ptr->GetPrev()); - _Value->SetNext(ptr); - _Value->GetPrev()->SetNext(_Value); - ptr->SetPrev(_Value); + auto *ptr = const_cast(&*where); + value->SetPrev(ptr->GetPrev()); + value->SetNext(ptr); + value->GetPrev()->SetNext(value); + ptr->SetPrev(value); } } - void insert(const_pointer _Where, pointer _Value) { - this->insert(const_iterator(_Where), _Value); + void insert(const_pointer where, pointer val) { + this->insert(const_iterator(where), val); } - void insertAfter(const_iterator _Where, pointer _Value) { - if (_Where == const_iterator(nullptr)) { - this->push_front(_Value); - } else if (_Where == const_iterator(this->last)) { - this->push_back(_Value); + void insertAfter(const_iterator where, pointer val) { + if (where == const_iterator(nullptr)) { + this->push_front(val); + } else if (where == const_iterator(this->last)) { + this->push_back(val); } else { // `_Where` stands for the position, however we made the data and node combined, so a const_cast is needed. - auto *ptr = const_cast(&*_Where); - ASSERT(_Value != nullptr, "null ptr check"); - _Value->SetPrev(ptr); - _Value->SetNext(ptr->GetNext()); - _Value->GetNext()->SetPrev(_Value); - ptr->SetNext(_Value); + auto *ptr = const_cast(&*where); + ASSERT(val != nullptr, "null ptr check"); + val->SetPrev(ptr); + val->SetNext(ptr->GetNext()); + val->GetNext()->SetPrev(val); + ptr->SetNext(val); } } - void insertAfter(const_pointer _Where, pointer _Value) { - this->insertAfter(const_iterator(_Where), _Value); + void insertAfter(const_pointer where, pointer val) { + this->insertAfter(const_iterator(where), val); } - void splice(const_iterator _Where, PtrListRef &_Other) { - ASSERT(!_Other.empty(), "NYI"); + void splice(const_iterator where, PtrListRef &other) { + ASSERT(!other.empty(), "NYI"); if (this->empty()) { - this->first = &(_Other.front()); - this->last = &(_Other.back()); - } else if (_Where == this->cend() || _Where == const_iterator(this->last)) { + this->first = &(other.front()); + this->last = &(other.back()); + } else if (where == this->cend() || where == const_iterator(this->last)) { ASSERT(this->last != nullptr, "null ptr check"); - this->last->SetNext(&(_Other.front())); - _Other.front().SetPrev(this->last); - this->last = &(_Other.back()); + this->last->SetNext(&(other.front())); + other.front().SetPrev(this->last); + this->last = &(other.back()); } else { - ASSERT(to_ptr(_Where) != nullptr, "null ptr check"); - ASSERT(_Where->GetNext() != nullptr, "null ptr check"); + ASSERT(to_ptr(where) != nullptr, "null ptr check"); + ASSERT(where->GetNext() != nullptr, "null ptr check"); // `_Where` stands for the position, however we made the data and node combined, so a const_cast is needed. - auto *ptr = const_cast(&*_Where); - _Other.front().SetPrev(ptr); - _Other.back().SetNext(ptr->GetNext()); - ptr->GetNext()->SetPrev(&(_Other.back())); - ptr->SetNext(&(_Other.front())); + auto *ptr = const_cast(&*where); + other.front().SetPrev(ptr); + other.back().SetNext(ptr->GetNext()); + ptr->GetNext()->SetPrev(&(other.back())); + ptr->SetNext(&(other.front())); } } - void splice(const_pointer _Where, PtrListRef &_Other) { - splice(const_iterator(_Where), _Other); + void splice(const_pointer where, PtrListRef &other) { + splice(const_iterator(where), other); } void clear() { @@ -414,22 +414,22 @@ class PtrListRef { this->last = nullptr; } - iterator erase(const_iterator _Where) { - if (_Where == this->cbegin() && _Where == this->rbegin().base()) { + iterator erase(const_iterator where) { + if (where == this->cbegin() && where == this->rbegin().base()) { this->first = nullptr; this->last = nullptr; - } else if (_Where == this->cbegin()) { + } else if (where == this->cbegin()) { // `_Where` stands for the position, however we made the data and node combined, so a const_cast is needed. - auto *ptr = const_cast(&*_Where); + auto *ptr = const_cast(&*where); this->first = ptr->GetNext(); ASSERT(this->first != nullptr, "null ptr check"); this->first->SetPrev(nullptr); - } else if (_Where == this->rbegin().base()) { + } else if (where == this->rbegin().base()) { pop_back(); } else { - ASSERT(_Where->GetPrev() != nullptr, "null ptr check"); + ASSERT(where->GetPrev() != nullptr, "null ptr check"); // `_Where` stands for the position, however we made the data and node combined, so a const_cast is needed. - auto *ptr = const_cast(&*_Where); + auto *ptr = const_cast(&*where); ptr->GetPrev()->SetNext(ptr->GetNext()); if (ptr->GetNext()) { ptr->GetNext()->SetPrev(ptr->GetPrev()); @@ -438,8 +438,8 @@ class PtrListRef { return iterator(nullptr); } - iterator erase(const_pointer _Where) { - return this->erase(const_iterator(_Where)); + iterator erase(const_pointer where) { + return this->erase(const_iterator(where)); } void set_first(T *f) { diff --git a/src/mapleall/maple_util/include/string_utils.h b/src/mapleall/maple_util/include/string_utils.h index 50136dee45..4cfc8887e9 100644 --- a/src/mapleall/maple_util/include/string_utils.h +++ b/src/mapleall/maple_util/include/string_utils.h @@ -60,6 +60,9 @@ class StringUtils { static void Split(const std::string &src, std::unordered_set &container, char delim); static std::string Trim(const std::string &src); + static std::string LTrim(const std::string &src); + static std::string RTrim(const std::string &src); + static std::string TrimWhitespace(const std::string &src); static std::string Replace(const std::string &src, const std::string &target, const std::string &replacement); static std::string Append(const std::string &src, const std::string &target, const std::string &spliter); static std::string GetStrAfterLast(const std::string &src, const std::string &target, diff --git a/src/mapleall/maple_util/include/utils.h b/src/mapleall/maple_util/include/utils.h index 1d6d5fda35..5a0da8fc79 100644 --- a/src/mapleall/maple_util/include/utils.h +++ b/src/mapleall/maple_util/include/utils.h @@ -22,6 +22,7 @@ namespace utils { const int kNumLimit = 10; constexpr int32_t kAAsciiNum = 65; constexpr int32_t kaAsciiNum = 97; +constexpr size_t kInvalidIndex = std::numeric_limits::max(); // Operations on char constexpr bool IsDigit(char c) { @@ -52,7 +53,7 @@ template struct ToDigitImpl<10, T> { static T DoIt(char c) { if (utils::IsDigit(c)) { - return c - '0'; + return static_cast(c) - static_cast('0'); } return std::numeric_limits::max(); } @@ -62,7 +63,7 @@ template struct ToDigitImpl<8, T> { static T DoIt(char c) { if (c >= '0' && c < '8') { - return c - '0'; + return static_cast(c) - static_cast('0'); } return std::numeric_limits::max(); } diff --git a/src/mapleall/maple_util/src/bit_value.cpp b/src/mapleall/maple_util/src/bit_value.cpp new file mode 100644 index 0000000000..b4f8a138d4 --- /dev/null +++ b/src/mapleall/maple_util/src/bit_value.cpp @@ -0,0 +1,76 @@ +/* + * Copyright (c) [2023] Huawei Technologies Co.,Ltd.All rights reserved. + * + * OpenArkCompiler is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * + * http://license.coscl.org.cn/MulanPSL2 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ +#include "bit_value.h" + +#include "me_expr_utils.h" + +namespace maple { + +BitValue BitValue::operator&(const BitValue &rhs) const { + return BitValue(zeroBits | rhs.zeroBits, oneBits & rhs.oneBits); +} + +BitValue BitValue::operator|(const BitValue &rhs) const { + return BitValue(zeroBits & rhs.zeroBits, oneBits | rhs.oneBits); +} + +BitValue BitValue::operator^(const BitValue &rhs) const { + return BitValue((zeroBits & rhs.zeroBits) | (oneBits & rhs.oneBits), + (zeroBits & rhs.oneBits) | (oneBits & rhs.zeroBits)); +} + +BitValue GetBitValueOfAndOrXorExpr(const MeExpr &expr, const IntVal &demandedBits, const BitValue &lhsKnown, + const BitValue &rhsKnown, uint32 depth) { + (void)depth; + auto bitWidth = demandedBits.GetBitWidth(); + BitValue res(bitWidth); + switch (expr.GetOp()) { + case OP_band: + res = lhsKnown & rhsKnown; + break; + case OP_bior: + res = lhsKnown | rhsKnown; + break; + case OP_bxor: + res = lhsKnown ^ rhsKnown; + break; + default: + break; + } + return res; +} + +void ComputeBitValueOfExpr(const MeExpr &expr, const IntVal &demandedBits, BitValue &known, uint32 depth) { + auto bitWidth = known.GetBitWidth(); + if (auto c = GetIntConst(expr)) { + known = CreateFromConst(c->GetValue().TruncOrExtend(bitWidth, false)); + return; + } + BitValue lhsKnown(bitWidth); + BitValue rhsKnown(bitWidth); + switch (expr.GetOp()) { + case OP_band: + case OP_bior: + case OP_bxor: { + ComputeBitValueOfExpr(*expr.GetOpnd(0), demandedBits, lhsKnown, depth + 1); + ComputeBitValueOfExpr(*expr.GetOpnd(1), demandedBits, lhsKnown, depth + 1); + known = GetBitValueOfAndOrXorExpr(expr, demandedBits, lhsKnown, rhsKnown, depth); + break; + } + default: + break; + } +} +} // namespace maple \ No newline at end of file diff --git a/src/mapleall/maple_util/src/cl_parser.cpp b/src/mapleall/maple_util/src/cl_parser.cpp index 89fedb381d..9850312250 100644 --- a/src/mapleall/maple_util/src/cl_parser.cpp +++ b/src/mapleall/maple_util/src/cl_parser.cpp @@ -20,11 +20,22 @@ #include "mpl_logging.h" #include "string_utils.h" -#include "set_spec.h" +#include "file_utils.h" using namespace maplecl; + +// clear joined option in clangCategory +void OptionCategory::ClearJoinedOpt() { + std::vector enabledOptionsBak = enabledOptions; + for (size_t index = 0; index < enabledOptionsBak.size(); index++) { + if (enabledOptionsBak[index]->IsJoinedValPermitted()) { + enabledOptionsBak[index]->Clear(); + } + } +} + CommandLine &CommandLine::GetCommandLine() { static CommandLine cl; return cl; @@ -154,6 +165,18 @@ RetCode CommandLine::ParseOption(size_t &argsIndex, DeleteEnabledOptions(argsIndex, args, optCategory); } + if (args[argsIndex] == "-fpic" || args[argsIndex] == "--fpic" || + args[argsIndex] == "-fPIC" || args[argsIndex] == "--fPIC") { + auto item = optCategory.options.find("-fPIE"); + if (item != optCategory.options.end()) { + item->second->UnSetEnabledByUser(); + } + item = optCategory.options.find("-fpie"); + if (item != optCategory.options.end()) { + item->second->UnSetEnabledByUser(); + } + } + if (args[argsIndex] == "--O0" || args[argsIndex] == "-O0" || args[argsIndex] == "--O1" || args[argsIndex] == "-O1" || args[argsIndex] == "--O2" || args[argsIndex] == "-O2" || args[argsIndex] == "--O3" || args[argsIndex] == "-O3" || args[argsIndex] == "--Os" || args[argsIndex] == "-Os") { @@ -247,6 +270,11 @@ RetCode CommandLine::HandleInputArgs(const std::deque &args, continue; } + if (arg == "-march=armv8-a+crc") { + maple::LogInfo::MapleLogger(maple::kLlWarn) << "Warning: " + << "The crc instruction is not fully implemented!" << '\n'; + } + if (arg.find("_FORTIFY_SOURCE") != std::string::npos) { auto item = clangCategory.options.find("-pO2ToCl"); item->second->SetEnabledByUser(); @@ -312,23 +340,13 @@ RetCode CommandLine::Parse(int argc, char **argv, OptionCategory &optCategory) { } else { (void)args.emplace_back(*argv); } - if (tmp == "-specs") { - ++argv; - --argc; - specsFile = *argv; - } else { - if (tmp.find("-specs=") != std::string::npos) { - specsFile = maple::StringUtils::GetStrAfterLast(tmp, "="); - } - ++argv; - --argc; - } + ++argv; + --argc; } for (auto astFile = GetAstInputs().begin(); astFile != GetAstInputs().end(); ++astFile) { std::string_view tmp(*astFile); (void)args.emplace_back(tmp); } - maple::SetSpec::SetUpSpecs(args, specsFile); return HandleInputArgs(args, optCategory); } diff --git a/src/mapleall/maple_util/src/error_code.cpp b/src/mapleall/maple_util/src/error_code.cpp index aba1e0a679..c31d1613be 100644 --- a/src/mapleall/maple_util/src/error_code.cpp +++ b/src/mapleall/maple_util/src/error_code.cpp @@ -12,7 +12,7 @@ * FIT FOR A PARTICULAR PURPOSE. * See the Mulan PSL v2 for more details. */ -#include +#include "error_code.h" #include "mpl_logging.h" namespace maple { @@ -45,6 +45,9 @@ void PrintErrorMessage(int ret) { case kErrorUnKnownFileType: ERR(kLncErr, "File Format Not Recognized!"); break; + case kErrorCreateFile: + ERR(kLncErr, "Fail To Create File Under Tmpdir!"); + break; default: break; } diff --git a/src/mapleall/maple_util/src/file_utils.cpp b/src/mapleall/maple_util/src/file_utils.cpp index cb52470f98..c6083f31dc 100644 --- a/src/mapleall/maple_util/src/file_utils.cpp +++ b/src/mapleall/maple_util/src/file_utils.cpp @@ -17,6 +17,8 @@ #include #include #include +#include +#include #include "mpl_logging.h" #include "file_utils.h" @@ -241,6 +243,16 @@ bool FileUtils::IsFileExists(const std::string &filePath) { return f.good(); } +bool FileUtils::CreateFile(const std::string &file) { + if (IsFileExists(file)) { + return true; + } + std::ofstream fileCreate; + fileCreate.open(file); + fileCreate.close(); + return IsFileExists(file); +} + std::string FileUtils::AppendMapleRootIfNeeded(bool needRootPath, const std::string &path, const std::string &defaultRoot) { if (!needRootPath) { @@ -259,12 +271,7 @@ bool FileUtils::DelTmpDir() const { if (FileUtils::GetInstance().GetTmpFolder() == "") { return true; } - std::string tmp = "rm -rf " + FileUtils::GetInstance().GetTmpFolder(); - std::string result = ExecuteShell(tmp.c_str()); - if (result != "") { - return false; - } - return true; + return Rmdirs(FileUtils::GetInstance().GetTmpFolder()); } InputFileType FileUtils::GetFileTypeByMagicNumber(const std::string &pathName) { @@ -281,46 +288,6 @@ InputFileType FileUtils::GetFileTypeByMagicNumber(const std::string &pathName) { InputFileType::kFileTypeNone; } -char* FileUtils::LoadFile(const char *filename) { - size_t maxlength = 102400; // 100K - std::string specFile = GetRealPath(filename); - char *specs; - char *content; - std::ifstream readSpecFile(specFile); - if (!readSpecFile.is_open()) { - CHECK_FATAL(false, "unable to open file %s", specFile.c_str()); - return nullptr; - } - content = FileUtils::GetInstance().GetMemPool().NewArray(maxlength); - if (content) { - char buffer[maxlength]; - size_t len = 0; - while (readSpecFile.getline(buffer, static_cast(maxlength))) { - for (size_t i = 0; i < maxlength; i++) { - char tmp = buffer[i]; - if (tmp == '\0') { - content[len] = '\n'; - len++; - break; - } - content[len] = tmp; - len++; - } - } - content[len] = '\0'; - specs = FileUtils::GetInstance().GetMemPool().NewArray(++len); - if (!specs) { - CHECK_FATAL(false, "unable to open file %s", specFile.c_str()); - } - for (size_t i = 0; i < len; i++) { - specs[i] = content[i]; - } - return specs; - } - return nullptr; -} - - bool FileUtils::GetAstFromLib(const std::string libPath, std::vector &astInputs) { bool elfFlag = false; std::string binAr = ""; @@ -355,4 +322,51 @@ bool FileUtils::GetAstFromLib(const std::string libPath, std::vectord_name, ".") == 0 || strcmp(entry->d_name, "..") == 0) { + continue; + } + std::string fullPath = std::string(dirPath) + kFileSeperatorChar + entry->d_name; + if (entry->d_type == DT_DIR) { + if (!Rmdirs(fullPath)) { + (void)closedir(dir); + return false; + } + } else { + if (remove(fullPath.c_str()) != 0) { + (void)closedir(dir); + return false; + } + } + } + (void)closedir(dir); + if (rmdir(dirPath.c_str()) != 0) { + return false; + } + return true; +} + } // namespace maple diff --git a/src/mapleall/maple_util/src/mpl_int_val.cpp b/src/mapleall/maple_util/src/mpl_int_val.cpp index 858103b772..d862259151 100644 --- a/src/mapleall/maple_util/src/mpl_int_val.cpp +++ b/src/mapleall/maple_util/src/mpl_int_val.cpp @@ -144,7 +144,7 @@ IntVal IntVal::ExtendToWideInt(uint16 newWidth, bool isSigned) const { uint16 oldNumWords = GetNumWords(); uint16 newNumWords = GetNumWords(newWidth); - uint16 numExtendBits = static_cast(newWidth - width) % wordBitSize; + uint16 numExtendBits = static_cast(newWidth - width) % kWordBitSize; uint64 newValue[newNumWords]; if (!IsOneWord()) { @@ -157,7 +157,7 @@ IntVal IntVal::ExtendToWideInt(uint16 newWidth, bool isSigned) const { int filler = sign && GetSignBit() ? ~0 : 0; if (numExtendBits != 0 && filler != 0) { // sign-extend the last word from given value - newValue[oldNumWords - 1] |= allOnes << (wordBitSize - numExtendBits); + newValue[oldNumWords - 1] |= kAllOnes << (kWordBitSize - numExtendBits); } size_t size = (newNumWords - oldNumWords) * sizeof(uint64); @@ -808,7 +808,8 @@ std::pair IntVal::WideUnsignedDivRem(const IntVal &delimer, cons // copy quotient and remainder to uint64 arrays uint16 numWords = delimer.GetNumWords(); - uint64 quotient[numWords], remainder[numWords]; + uint64 quotient[numWords]; + uint64 remainder[numWords]; ASSERT(q[m] == 0, "must be zero because the last elem is temporary"); CopyUint32ToUint64(quotient, numWords, q, m); CopyUint32ToUint64(remainder, numWords, r, n + m - 1); @@ -836,7 +837,7 @@ std::pair IntVal::WideDivRem(const IntVal &rhs) const { if (delimer < divisor) { return {IntVal(uint64(0), width, sign), *this}; } else if (delimer == divisor) { - return {IntVal(isResultNeg ? allOnes : uint64(1), width, sign), IntVal(uint64(0), width, sign)}; + return {IntVal(isResultNeg ? kAllOnes : uint64(1), width, sign), IntVal(uint64(0), width, sign)}; } auto uRes = WideUnsignedDivRem(delimer, divisor); @@ -875,8 +876,8 @@ void IntVal::WideSetMaxValue() { // set the sign bit if (sign) { - uint8 shift = width % wordBitSize + 1; - u.pValue[GetNumWords() - 1] = allOnes >> shift; + uint8 shift = width % kWordBitSize + 1; + u.pValue[GetNumWords() - 1] = kAllOnes >> shift; } TruncInPlace(); @@ -890,17 +891,45 @@ void IntVal::WideSetMinValue() { // set the sign bit if (sign) { - uint8 shift = (wordBitSize - (width + 1)) % wordBitSize; + uint8 shift = static_cast((static_cast(kWordBitSize) - (width + 1)) % static_cast(kWordBitSize)); u.pValue[GetNumWords() - 1] = uint64(1) << shift; } TruncInPlace(); } +bool IntVal::WideIsSubsetOf(const IntVal &rhs) const { + for (uint16_t i = 0; i < GetNumWords(); ++i) { + if ((u.pValue[i] & ~rhs.u.pValue[i]) != 0) { + return false; + } + } + return true; +} + +void IntVal::WideSetBits(uint16 low, uint16 high) { + auto lWord = WordNumber(low); + auto hWord = WordNumber(high); + uint64 lMask = kAllOnes << BitNumber(low); + if (BitNumber(high) != 0) { + uint64 hMask = kAllOnes >> (kWordBitSize - BitNumber(high)); + if (lWord == hWord) { + lMask &= hMask; + } else { + u.pValue[hWord] |= hMask; + } + } + u.pValue[lWord] |= lMask; + + for (uint16 i = lWord + 1; i < hWord; ++i) { + u.pValue[i] = kAllOnes; + } +} + uint16 IntVal::CountLeadingOnes() const { // mask in neccessary because the high bits of value can be zero - uint8 startPos = width % wordBitSize; - uint64 mask = (startPos != 0) ? allOnes << static_cast(wordBitSize - startPos) : 0; + uint8 startPos = width % kWordBitSize; + uint64 mask = (startPos != 0) ? kAllOnes << static_cast(kWordBitSize - startPos) : 0; if (IsOneWord()) { return maple::CountLeadingOnes(u.value | mask) - startPos; @@ -929,8 +958,8 @@ uint16 IntVal::CountTrallingOnes() const { uint16 count = 0; uint16 i = 0; - while (i < GetNumWords() && u.pValue[i] == allOnes) { - count += wordBitSize; + while (i < GetNumWords() && u.pValue[i] == kAllOnes) { + count += kWordBitSize; ++i; } @@ -942,7 +971,7 @@ uint16 IntVal::CountTrallingOnes() const { } uint16 IntVal::CountLeadingZeros() const { - uint16 emptyBits = static_cast(wordBitSize) * GetNumWords() - width; + uint16 emptyBits = static_cast((kWordBitSize * GetNumWords()) - static_cast(width)); if (IsOneWord()) { return maple::CountLeadingZeros(u.value) - emptyBits; @@ -953,7 +982,7 @@ uint16 IntVal::CountLeadingZeros() const { for (int16 i = static_cast(GetNumWords() - 1); i >= 0; --i) { zeros = maple::CountLeadingZeros(u.pValue[i]); count += zeros; - if (zeros != wordBitSize) { + if (zeros != kWordBitSize) { break; } } @@ -970,7 +999,7 @@ uint16 IntVal::CountTrallingZeros() const { uint16 count = 0; uint16 i = 0; while (i < GetNumWords() && u.pValue[i] == 0) { - count += wordBitSize; + count += kWordBitSize; ++i; } @@ -1034,7 +1063,7 @@ void IntVal::Dump(std::ostream &os) const { } } else { constexpr size_t fillWidth = 16; - uint16 numZeroWords = CountLeadingZeros() / wordBitSize; + uint16 numZeroWords = CountLeadingZeros() / kWordBitSize; uint16 numWords = GetNumWords(); ASSERT(numWords >= numZeroWords, "invalid count of zero words"); diff --git a/src/mapleall/maple_util/src/mpl_timer.cpp b/src/mapleall/maple_util/src/mpl_timer.cpp index d36ee2188a..e1ffd1a24b 100644 --- a/src/mapleall/maple_util/src/mpl_timer.cpp +++ b/src/mapleall/maple_util/src/mpl_timer.cpp @@ -27,15 +27,15 @@ void MPLTimer::Stop() { endTime = std::chrono::system_clock::now(); } -long MPLTimer::Elapsed() { +long MPLTimer::Elapsed() const { return std::chrono::duration_cast(endTime - startTime).count(); } -long MPLTimer::ElapsedMilliseconds() { +long MPLTimer::ElapsedMilliseconds() const { return std::chrono::duration_cast(endTime - startTime).count(); } -long MPLTimer::ElapsedMicroseconds() { +long MPLTimer::ElapsedMicroseconds() const { return std::chrono::duration_cast(endTime - startTime).count(); } } diff --git a/src/mapleall/maple_me/src/orig_symbol.cpp b/src/mapleall/maple_util/src/orig_symbol.cpp similarity index 100% rename from src/mapleall/maple_me/src/orig_symbol.cpp rename to src/mapleall/maple_util/src/orig_symbol.cpp diff --git a/src/mapleall/maple_util/src/profile.cpp b/src/mapleall/maple_util/src/profile.cpp index 4050f91363..fa49051239 100644 --- a/src/mapleall/maple_util/src/profile.cpp +++ b/src/mapleall/maple_util/src/profile.cpp @@ -30,7 +30,7 @@ #include "types_def.h" namespace maple { -constexpr uint8 Profile::stringEnd = 0x00; +constexpr uint8 Profile::kStringEnd = 0x00; uint32 Profile::hotFuncCountThreshold = 0; bool Profile::debug = false; bool Profile::initialized = false; diff --git a/src/mapleall/maple_util/src/set_spec.cpp b/src/mapleall/maple_util/src/set_spec.cpp deleted file mode 100644 index 179b6a81ec..0000000000 --- a/src/mapleall/maple_util/src/set_spec.cpp +++ /dev/null @@ -1,336 +0,0 @@ -/* - * Copyright (c) [2023] Huawei Technologies Co.,Ltd.All rights reserved. - * - * OpenArkCompiler is licensed under Mulan PSL v2. - * You can use this software according to the terms and conditions of the Mulan PSL v2. - * You may obtain a copy of Mulan PSL v2 at: - * - * http://license.coscl.org.cn/MulanPSL2 - * - * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR - * FIT FOR A PARTICULAR PURPOSE. - * See the Mulan PSL v2 for more details. - */ -#include - -#include "set_spec.h" -#include "securec.h" -#include "driver_options.h" - -namespace maple { - -std::vector SetSpec::specs; -std::deque SetSpec::args; - -static SpecList cc1({"cc1", 3, nullptr}); -static SpecList cppOptions({"cpp_options", 11, nullptr}); - - -// Nonzero means %s has been seen; the next arg to be terminated is the name of a library file and -// we should try the standard search dirs for it. -static int thisIsLibraryFile; - -// Nonzero if an arg has been started and not yet terminated (with space, tab or newline). -static bool argGoing = false; - -void SetSpec::SetUpSpecs(std::deque &arg, const std::string &specsFile) { - if (specsFile == "") { - return; - } - InitSpec(); - ReadSpec(specsFile); - args.clear(); - // 2 is speclist original length - for (size_t i = 0; i < 2; i++) { - if (specs[i]->value != nullptr) { - DoSpecs(specs[i]->value); - } - } - for (int index = static_cast(args.size() - 1); index >= 0; index--) { - std::string_view tmp(args[index]); - arg.emplace_front(tmp); - } -} - -void SetSpec::InitSpec() { - SetSpec::specs.push_back(&cc1); - SetSpec::specs.push_back(&cppOptions); -} - -char* SkipWhitespace(char *p) { - for (;;) { - // A fully-blank line is a delimiter in the SPEC file and shouldn't be considered whitespace. - // 2 is index of one line - if (p[0] == '\n' && p[1] == '\n' && p[2] == '\n') { - return p + 1; - } else if (*p == '\n' || *p == ' ' || *p == '\t') { - p++; - } else if (*p == '#') { - while (*p != '\n') { - p++; - } - p++; - } else { - break; - } - } - return p; -} - -bool StartsWith(const char *str, const char *prefix) { - return strncmp(str, prefix, strlen (prefix)) == 0; -} - -char* SaveString(const char *s, size_t len) { - char *result = FileUtils::GetInstance().GetMemPool().NewArray(len + 1); - errno_t err = memcpy_s(result, len, s, len); - CHECK_FATAL(err == EOK, "memcpy_s failed"); - result[len] = 0; - return result; -} - -void SetSpec::ReadSpec(const std::string &specsFile) { - char *buffer; - char *p; - buffer = FileUtils::LoadFile(specsFile.c_str()); - p = buffer; - for (;;) { - char *suffix; - char *spec; - char *in, *out, *p1, *p2, *p3; - p = SkipWhitespace(p); - if (*p == 0) { - break; - } - if (*p == '%') { - p1 = p; - while (*p != '\0' && *p != '\n') { - p++; - } - // Skip '\n'. - p++; - if (StartsWith(p1, "%include") && (p1[sizeof "%include" - 1] == ' ' || - p1[sizeof "%include" - 1] == '\t')) { - CHECK_FATAL(false, "Currently does not support parsing %include.\n"); - } else if (StartsWith(p1, "%include_noerr") && (p1[sizeof "%include_noerr" - 1] == ' ' || - p1[sizeof "%include_noerr" - 1] == '\t')) { - CHECK_FATAL(false, "Currently does not support parsing %include_noerr.\n"); - } else if (StartsWith(p1, "%rename") && (p1[sizeof "%rename" - 1] == ' ' || - p1[sizeof "%rename" - 1] == '\t')) { - int nameLen; - struct SpecList *sl; - // Get original name. - p1 += sizeof "%rename"; - while (*p1 == ' ' || *p1 == '\t') { - p1++; - } - if (!isalpha(static_cast(*p1))) { - CHECK_FATAL(false, "specs %%rename syntax malformed after %ld characters.\n", static_cast(p1 - buffer)); - } - p2 = p1; - while (*p2 != '\0' && !isspace(static_cast(*p2))) { - p2++; - } - if (*p2 != ' ' && *p2 != '\t') { - CHECK_FATAL(false, "specs %%rename syntax malformed after %ld characters.\n", static_cast(p2 - buffer)); - } - nameLen = static_cast(p2 - p1); - *p2++ = '\0'; - while (*p2 == ' ' || *p2 == '\t') { - p2++; - } - if (!isalpha(static_cast(*p2))) { - CHECK_FATAL(false, "specs %%rename syntax malformed after %ld characters.\n", static_cast(p2 - buffer)); - } - /* Get new spec name. */ - p3 = p2; - while (*p3 != '\0' && !isspace(static_cast(*p3))) { - p3++; - } - if (p3 != p - 1) { - CHECK_FATAL(false, "specs %%rename syntax malformed after %ld characters.\n", static_cast(p3 - buffer)); - } - *p3 = '\0'; - for (auto sl1 : specs) { - if (nameLen == sl1->nameLen && strcmp(sl1->name, p1) == 0) { - sl = sl1; - break; - } - } - if (!sl) { - CHECK_FATAL(false, "specs %s spec was not found to be renamed.\n", p1); - } - if (strcmp(p1, p2) == 0) { - continue; - } - for (auto newsl : specs) { - if (strcmp(newsl->name, p2) == 0) { - CHECK_FATAL(false, "Attempt to rename spec %qs to already defined spec %qs.\n", p1, p2); - } - } - SetSpecs(p2, sl->value); - continue; - } - } - p1 = p; - while (*p1 != '\0' && *p1 != ':' && *p1 != '\n') { - p1++; - } - if (*p1 != ':') { - CHECK_FATAL(false, "specs file malformed after %ld characters.\n", static_cast(p1 - buffer)); - } - p2 = p1; - while (p2 > buffer && (p2[-1] == ' ' || p2[-1] == '\t')) { - p2--; - } - suffix = SaveString(p, static_cast(p2 - p)); - std::string tmpSuffix(suffix); - p = SkipWhitespace(p1 + 1); - if (p[1] == 0) { - CHECK_FATAL(false, "specs file malformed after %ld characters.\n", static_cast(p - buffer)); - } - p1 = p; - while (*p1 != '\0' && !(*p1 == '\n' && (p1[1] == '\n' || p1[1] == '\0'))) { - p1++; - } - if ((p1 - p) > 0) { - spec = SaveString(p, static_cast(p1 - p)); - in = spec; - out = spec; - while (*in != 0) { - if (in[0] == '\\' && in[1] == '\n') { - in += 2; // 2 is skip "\\" or "\n" - } else if (in[0] == '#') { - while (*in != '\0' && *in != '\n') { - in++; - } - } else { - *out++ = *in++; - } - } - *out = 0; - } - p = p1; - if (tmpSuffix == "*cpp_options" || tmpSuffix == "*cc1") { - SetSpecs(suffix + 1, spec); - } - } -} - -void SetSpec::SetSpecs(const char *name, const char *spec) { - struct SpecList *sl; - int nameLen = static_cast(strlen(name)); - - // See if the spec already exists. - for (auto sl1 : specs) { - if (nameLen == sl1->nameLen && strcmp(sl1->name, name) == 0) { - sl = sl1; - break; - } - } - - if (strcmp(sl->name, "") == 0) { - // Not found - make it. - sl->name = name; - sl->nameLen = nameLen; - sl->value = spec; - specs.push_back(sl); - } - - sl->value = spec; -} - -std::string SetSpec::FindPath(const std::string tmpArg) { - std::string result = ""; - std::string cmd = ""; - std::vector libPathVec; - std::vector resVec; - - if (FileUtils::SafeGetenv(kGccLibPath) != "") { - StringUtils::Split(FileUtils::SafeGetenv(kGccLibPath), libPathVec, ':'); - } - if (opts::sysRoot.IsEnabledByUser()) { - libPathVec.push_back(opts::sysRoot.GetValue() + "/lib/"); - libPathVec.push_back(opts::sysRoot.GetValue() + "/usr/lib/"); - } - for (auto libPath : libPathVec) { - cmd = "ls " + libPath + " | grep " + tmpArg; - result = FileUtils::ExecuteShell(cmd.c_str()); - if (result != "") { - StringUtils::Split(result, resVec, '\n'); - return libPath + resVec[0]; - } - } - return tmpArg; -} - -void SetSpec::EndGoingArg(const std::string tmpArg) { - if (argGoing != 0) { - if (thisIsLibraryFile == 1) { - std::string path = FindPath(tmpArg); - args.push_back(path); - } else { - args.push_back(tmpArg); - } - } -} - -void SetSpec::DoSpecs(const char *spec) { - const char *p = spec; - int c; - std::string tmpArg = ""; - - while ((c = *p++)) { - switch (c) { - case '\n': - case '\t': - case ' ': - EndGoingArg(tmpArg); - tmpArg = ""; - argGoing = false; - thisIsLibraryFile = 0; - break; - case '%': - switch (c = *p++) { - case 's': - thisIsLibraryFile = 1; - break; - case '(': - { - const char *name = p; - size_t len; - while (*p != '\0' && *p != ')') { - p++; - } - len = static_cast(p - name); - for (auto sl1 : specs) { - if (sl1->nameLen == static_cast(len) && strncmp(sl1->name, name, len) == 0) { - name = sl1->value; - break; - } - } - if (*p) { - p++; - } - break; - } - default: - CHECK_FATAL(false, "spec failure: unrecognized spec option %qc", c); - } - break; - default: - std::string tmp(1, c); - tmpArg += tmp; - argGoing = true; - } - } - if (tmpArg != "") { - EndGoingArg(tmpArg); - tmpArg = ""; - argGoing = false; - thisIsLibraryFile = 0; - } -} - -} // namespace maple \ No newline at end of file diff --git a/src/mapleall/maple_util/src/string_utils.cpp b/src/mapleall/maple_util/src/string_utils.cpp index f253b4ca27..bee9b2585e 100644 --- a/src/mapleall/maple_util/src/string_utils.cpp +++ b/src/mapleall/maple_util/src/string_utils.cpp @@ -20,6 +20,20 @@ std::string StringUtils::Trim(const std::string &src) { return std::regex_replace(src, std::regex("\\s+"), ""); } +std::string StringUtils::LTrim(const std::string &src) { + size_t start = src.find_first_not_of(" "); + return (start == std::string::npos) ? "" : src.substr(start); +} + +std::string StringUtils::RTrim(const std::string &src) { + size_t end = src.find_last_not_of(" "); + return (end == std::string::npos) ? "" : src.substr(0, end + 1); +} + +std::string StringUtils::TrimWhitespace(const std::string &src) { + return RTrim(LTrim(src)); +} + std::string StringUtils::Replace(const std::string &src, const std::string &target, const std::string &replacement) { std::string::size_type replaceLen = replacement.size(); diff --git a/src/mapleall/mempool/include/maple_sparse_bitvector.h b/src/mapleall/mempool/include/maple_sparse_bitvector.h index 6f3cbe6dd7..e7945bd904 100644 --- a/src/mapleall/mempool/include/maple_sparse_bitvector.h +++ b/src/mapleall/mempool/include/maple_sparse_bitvector.h @@ -49,7 +49,7 @@ template struct MapleSparseBitVectorElement { } bool Test(unsigned idx) const { - return bitVector[idx / kBitWordSize] & (1ULL << (idx % kBitWordSize)); + return ((bitVector[idx / kBitWordSize] & (1ULL << (idx % kBitWordSize))) != 0); } bool Empty() const { diff --git a/src/mapleall/mempool/include/mempool_allocator.h b/src/mapleall/mempool/include/mempool_allocator.h index f66520b5b4..7f2f1dc4b7 100644 --- a/src/mapleall/mempool/include/mempool_allocator.h +++ b/src/mapleall/mempool/include/mempool_allocator.h @@ -35,7 +35,7 @@ class MapleAllocator { virtual ~MapleAllocator() = default; // Get adapter for use in STL containers. See arena_containers.h . - const MapleAllocatorAdapter Adapter(); + inline const MapleAllocatorAdapter Adapter(); virtual void *Alloc(size_t bytes) { return (memPool != nullptr) ? memPool->Malloc(bytes) : nullptr; } diff --git a/src/mapleall/mpl2mpl/BUILD.gn b/src/mapleall/mpl2mpl/BUILD.gn index ddebbc406a..b7ded10c7c 100644 --- a/src/mapleall/mpl2mpl/BUILD.gn +++ b/src/mapleall/mpl2mpl/BUILD.gn @@ -44,7 +44,7 @@ src_libmpl2mpl = [ "src/class_hierarchy.cpp", "src/class_hierarchy_phase.cpp", "src/constantfold.cpp", - "src/expand128floats.cpp", + "src/legalize_numeric_types.cpp", "src/ext_constantfold.cpp", "src/coderelayout.cpp", diff --git a/src/mapleall/mpl2mpl/CMakeLists.txt b/src/mapleall/mpl2mpl/CMakeLists.txt index 05f7ad7745..dc1436526a 100755 --- a/src/mapleall/mpl2mpl/CMakeLists.txt +++ b/src/mapleall/mpl2mpl/CMakeLists.txt @@ -44,7 +44,7 @@ set(src_libmpl2mpl src/vtable_impl.cpp src/class_hierarchy.cpp src/class_hierarchy_phase.cpp - src/expand128floats.cpp + src/legalize_numeric_types.cpp src/constantfold.cpp src/ext_constantfold.cpp src/coderelayout.cpp diff --git a/src/mapleall/mpl2mpl/include/call_graph.h b/src/mapleall/mpl2mpl/include/call_graph.h index 5e99e4e967..282f516966 100644 --- a/src/mapleall/mpl2mpl/include/call_graph.h +++ b/src/mapleall/mpl2mpl/include/call_graph.h @@ -143,11 +143,19 @@ class CallInfo { return callee; } - MIRFunction *GetCaller() const { + const MIRFunction *GetCaller() const { return caller; } - MIRFunction *GetCallee() const { + MIRFunction *GetCaller() { + return caller; + } + + MIRFunction &GetCallee() const { + return *callee; + } + + MIRFunction *GetCallee() { return callee; } @@ -707,5 +715,6 @@ OVERRIDE_DEPENDENCE MAPLE_MODULE_PHASE_DECLARE_END MAPLE_MODULE_PHASE_DECLARE(M2MIPODevirtualize) MAPLE_MODULE_PHASE_DECLARE(M2MFuncDeleter) +MAPLE_MODULE_PHASE_DECLARE(M2MCallTargetReplace) } // namespace maple #endif // MPL2MPL_INCLUDE_CALLGRAPH_H diff --git a/src/mapleall/mpl2mpl/include/clone.h b/src/mapleall/mpl2mpl/include/clone.h index 7dc89134a2..aee9cfc160 100644 --- a/src/mapleall/mpl2mpl/include/clone.h +++ b/src/mapleall/mpl2mpl/include/clone.h @@ -74,7 +74,6 @@ class Clone : public AnalysisResult { MIRType *returnType = nullptr) const; MIRFunction *CloneFunctionNoReturn(MIRFunction &originalFunction); void DoClone(); - void CopyFuncInfo(MIRFunction &originalFunction, MIRFunction &newFunc) const; void UpdateFuncInfo(MIRFunction &newFunc); void CloneArgument(MIRFunction &originalFunction, ArgVector &argument) const; const ReplaceRetIgnored &GetReplaceRetIgnored() const { @@ -91,6 +90,30 @@ class Clone : public AnalysisResult { ReplaceRetIgnored *replaceRetIgnored; }; +inline void CopyFuncInfo(MIRFunction &originalFunction, MIRFunction &newFunc, const MIRBuilder &mirBuilder) { + auto funcNameIdx = newFunc.GetBaseFuncNameStrIdx(); + auto fullNameIdx = newFunc.GetNameStrIdx(); + auto classNameIdx = newFunc.GetBaseClassNameStrIdx(); + auto metaFullNameIdx = mirBuilder.GetOrCreateStringIndex(kFullNameStr); + auto metaClassNameIdx = mirBuilder.GetOrCreateStringIndex(kClassNameStr); + auto metaFuncNameIdx = mirBuilder.GetOrCreateStringIndex(kFuncNameStr); + MIRInfoVector &fnInfo = originalFunction.GetInfoVector(); + const MapleVector &infoIsString = originalFunction.InfoIsString(); + size_t size = fnInfo.size(); + for (size_t i = 0; i < size; ++i) { + if (fnInfo[i].first == metaFullNameIdx) { + newFunc.PushbackMIRInfo(std::pair(fnInfo[i].first, fullNameIdx)); + } else if (fnInfo[i].first == metaFuncNameIdx) { + newFunc.PushbackMIRInfo(std::pair(fnInfo[i].first, funcNameIdx)); + } else if (fnInfo[i].first == metaClassNameIdx) { + newFunc.PushbackMIRInfo(std::pair(fnInfo[i].first, classNameIdx)); + } else { + newFunc.PushbackMIRInfo(std::pair(fnInfo[i].first, fnInfo[i].second)); + } + newFunc.PushbackIsString(infoIsString[i]); + } +} + MAPLE_MODULE_PHASE_DECLARE_BEGIN(M2MClone) Clone *GetResult() { return cl; diff --git a/src/mapleall/mpl2mpl/include/constantfold.h b/src/mapleall/mpl2mpl/include/constantfold.h index 31e29914c7..cb56513ae8 100644 --- a/src/mapleall/mpl2mpl/include/constantfold.h +++ b/src/mapleall/mpl2mpl/include/constantfold.h @@ -146,6 +146,24 @@ class ConstantFold : public FuncOptimizeImpl { CFConfig cfc; }; +#define OP_CASE_GROUP \ + case OP_ashr: \ + case OP_band: \ + case OP_bior: \ + case OP_bxor: \ + case OP_cand: \ + case OP_cior: \ + case OP_div: \ + case OP_land: \ + case OP_lior: \ + case OP_lshr: \ + case OP_max: \ + case OP_min: \ + case OP_mul: \ + case OP_rem: \ + case OP_shl: \ + case OP_sub + MAPLE_MODULE_PHASE_DECLARE(M2MConstantFold) } // namespace maple #endif // MPL2MPL_INCLUDE_CONSTANTFOLD_H diff --git a/src/mapleall/mpl2mpl/include/gen_check_cast.h b/src/mapleall/mpl2mpl/include/gen_check_cast.h index 231a836077..6e22f9b15e 100644 --- a/src/mapleall/mpl2mpl/include/gen_check_cast.h +++ b/src/mapleall/mpl2mpl/include/gen_check_cast.h @@ -29,7 +29,7 @@ class PreCheckCast : public FuncOptimizeImpl { return new PreCheckCast(*this); } - StmtNode *GetAssignRet(IntrinsiccallNode &callnode); + StmtNode *GetAssignRet(IntrinsiccallNode &callnode) const; void ProcessFunc(MIRFunction *func) override; }; @@ -62,15 +62,15 @@ class CheckCastGenerator : public FuncOptimizeImpl { MIRSymbol *GetOrCreateClassInfoSymbol(const std::string &className) const; void GenAllCheckCast(bool isHotFunc); void OptimizeInstanceof(); - void OptimizeIsAssignableFrom() const; - void CheckIsAssignableFrom(BlockNode &blockNode, StmtNode &stmt, const IntrinsicopNode &intrinsicNode) const; + void OptimizeIsAssignableFrom(); + void CheckIsAssignableFrom(BlockNode &blockNode, StmtNode &stmt, const IntrinsicopNode &intrinsicNode); void ConvertCheckCastToIsAssignableFrom(StmtNode &stmt); void AssignedCastValue(StmtNode &stmt) const; void ConvertInstanceofToIsAssignableFrom(StmtNode &stmt, const IntrinsicopNode &intrinsicNode) const; void ReplaceNoSubClassIsAssignableFrom(BlockNode &blockNode, StmtNode &stmt, const MIRPtrType &ptrType, const IntrinsicopNode &intrinsicNode) const; void ReplaceIsAssignableFromUsingCache(BlockNode &blockNode, StmtNode &stmt, const MIRPtrType &targetClassType, - const IntrinsicopNode &intrinsicNode) const; + const IntrinsicopNode &intrinsicNode); bool IsDefinedConstClass(const StmtNode &stmt, const MIRPtrType &targetClassType, PregIdx &classSymPregIdx, MIRSymbol *&classSym) const; MIRType *pointerObjType = nullptr; diff --git a/src/mapleall/mpl2mpl/include/ginline.h b/src/mapleall/mpl2mpl/include/ginline.h index 893180ac78..083f85f6e4 100644 --- a/src/mapleall/mpl2mpl/include/ginline.h +++ b/src/mapleall/mpl2mpl/include/ginline.h @@ -37,7 +37,11 @@ class CallSiteNode { CallSiteNode(CallInfo *info, const BadnessInfo &badnessInfo, uint32 inlineDepth) : callInfo(info), badInfo(badnessInfo), depth(inlineDepth) {} - auto *GetCallInfo() const { + const CallInfo *GetCallInfo() const { + return callInfo; + } + + CallInfo *GetCallInfo() { return callInfo; } @@ -122,7 +126,7 @@ class GInline { void CleanupInline(); void InitParams(); void PrepareCallsiteSet(); - void AfterInlineSuccess(const CallSiteNode &heapNode, const std::vector &newCallInfo, bool canBeRemoved, + void AfterInlineSuccess(CallSiteNode &heapNode, const std::vector &newCallInfo, bool canBeRemoved, int64 lastSize); void InlineCallsiteSet(); bool FuncInlinable(const MIRFunction&) const; diff --git a/src/mapleall/mpl2mpl/include/inline_mplt.h b/src/mapleall/mpl2mpl/include/inline_mplt.h index d3d07a4dd2..cb797ffe8e 100644 --- a/src/mapleall/mpl2mpl/include/inline_mplt.h +++ b/src/mapleall/mpl2mpl/include/inline_mplt.h @@ -21,6 +21,12 @@ #include "mir_function.h" namespace maple { +struct FuncComparator { + bool operator()(const MIRFunction *lhs, const MIRFunction *rhs) const { + return lhs->GetPuidx() < rhs->GetPuidx(); + } +}; + class InlineMplt { public: explicit InlineMplt(MIRModule &module) : mirModule(module) {} @@ -43,10 +49,10 @@ class InlineMplt { uint32 GetFunctionSize(MIRFunction &mirFunc) const; private: - std::set optimizedFuncs; + std::set optimizedFuncs; std::set optimizedFuncsType; std::set inliningGlobals; MIRModule &mirModule; }; } // namespace maple -#endif // MPL2MPL_INLINE_MPLT_H \ No newline at end of file +#endif // MPL2MPL_INLINE_MPLT_H diff --git a/src/mapleall/mpl2mpl/include/expand128floats.h b/src/mapleall/mpl2mpl/include/legalize_numeric_types.h similarity index 62% rename from src/mapleall/mpl2mpl/include/expand128floats.h rename to src/mapleall/mpl2mpl/include/legalize_numeric_types.h index 95fcfcc095..56387c30f1 100644 --- a/src/mapleall/mpl2mpl/include/expand128floats.h +++ b/src/mapleall/mpl2mpl/include/legalize_numeric_types.h @@ -1,5 +1,5 @@ /* - * Copyright (c) [2022] Huawei Technologies Co.,Ltd.All rights reserved. + * Copyright (c) [2023] Huawei Technologies Co.,Ltd.All rights reserved. * * OpenArkCompiler is licensed under Mulan PSL v2. * You can use this software according to the terms and conditions of the Mulan PSL v2. @@ -12,6 +12,7 @@ * FIT FOR A PARTICULAR PURPOSE. * See the Mulan PSL v2 for more details. */ + #ifndef MPL2MPL_INCLUDE_EXPAND128FLOATS_H #define MPL2MPL_INCLUDE_EXPAND128FLOATS_H #include "phase_impl.h" @@ -20,14 +21,14 @@ #include namespace maple { -class Expand128Floats : public FuncOptimizeImpl { +class LegalizeNumericTypes : public FuncOptimizeImpl { public: - Expand128Floats(MIRModule &mod, KlassHierarchy *kh, bool trace) : FuncOptimizeImpl(mod, kh, trace) {} - explicit Expand128Floats(MIRModule &mod) : FuncOptimizeImpl(mod, nullptr, false) {} - ~Expand128Floats() override = default; + LegalizeNumericTypes(MIRModule &mod, KlassHierarchy *kh, bool trace) : FuncOptimizeImpl(mod, kh, trace) {} + explicit LegalizeNumericTypes(MIRModule &mod) : FuncOptimizeImpl(mod, nullptr, false) {} + ~LegalizeNumericTypes() override = default; FuncOptimizeImpl *Clone() override { - return new Expand128Floats(*this); + return new LegalizeNumericTypes(*this); } void ProcessFunc(MIRFunction *func) override; @@ -37,15 +38,15 @@ class Expand128Floats : public FuncOptimizeImpl { std::string GetSequentialName0(const std::string &prefix, uint32_t num) const; uint32 GetSequentialNumber() const; std::string GetSequentialName(const std::string &prefix) const; - std::string SelectSoftFPCall(Opcode opCode, BaseNode *node) const; + std::string SelectSoftFPCall(Opcode opCode, BaseNode &node) const; + std::string SelectInt128Call(Opcode opCode, const BaseNode &node) const; void ReplaceOpNode(BlockNode *block, BaseNode *baseNode, size_t opndId, - BaseNode &currNode, MIRFunction *func, StmtNode *stmt) const; - bool CheckAndUpdateOp(BlockNode *block, BaseNode *node, - MIRFunction *func, StmtNode *stmt); + BaseNode &currNode, MIRFunction *func, const StmtNode &stmt) const; + bool CheckAndUpdateOp(BlockNode *block, BaseNode *node, MIRFunction *func, StmtNode &stmt); void ProcessBody(BlockNode *block, MIRFunction *func); void ProcessBody(BlockNode *block, StmtNode *stmt, MIRFunction *func); }; -MAPLE_MODULE_PHASE_DECLARE(M2MExpand128Floats) +MAPLE_MODULE_PHASE_DECLARE(M2MLegalizeNumericTypes) } // namespace maple #endif // MPL2MPL_INCLUDE_EXPAND128FLOATS_H diff --git a/src/mapleall/mpl2mpl/include/module_phase_manager.h b/src/mapleall/mpl2mpl/include/module_phase_manager.h index e109690fd1..9d1e487049 100644 --- a/src/mapleall/mpl2mpl/include/module_phase_manager.h +++ b/src/mapleall/mpl2mpl/include/module_phase_manager.h @@ -39,7 +39,7 @@ #include "muid_replacement.h" #include "gen_check_cast.h" #include "coderelayout.h" -#include "expand128floats.h" +#include "legalize_numeric_types.h" #include "constantfold.h" #include "preme.h" #include "scalarreplacement.h" diff --git a/src/mapleall/mpl2mpl/include/muid_replacement.h b/src/mapleall/mpl2mpl/include/muid_replacement.h index c3efc0da67..7fc183e409 100644 --- a/src/mapleall/mpl2mpl/include/muid_replacement.h +++ b/src/mapleall/mpl2mpl/include/muid_replacement.h @@ -120,7 +120,7 @@ class MUIDReplacement : public FuncOptimizeImpl { void ReplaceDreadStmt(MIRFunction *currentFunc, StmtNode *stmt); void ClearVtabItab(const std::string &name); void ReplaceDecoupleKeyTable(MIRAggConst *oldConst); - bool IsMIRAggConstNull(MIRSymbol *tabSym) const; + bool IsMIRAggConstNull(const MIRSymbol *tabSym) const; void ReplaceFieldTypeTable(const std::string &name); BaseNode *ReplaceDreadExpr(MIRFunction *currentFunc, StmtNode *stmt, BaseNode *expr); BaseNode *ReplaceDread(MIRFunction ¤tFunc, const StmtNode *stmt, BaseNode *opnd); diff --git a/src/mapleall/mpl2mpl/src/call_graph.cpp b/src/mapleall/mpl2mpl/src/call_graph.cpp index 90db43da6a..cf122f3920 100644 --- a/src/mapleall/mpl2mpl/src/call_graph.cpp +++ b/src/mapleall/mpl2mpl/src/call_graph.cpp @@ -18,6 +18,7 @@ #include "retype.h" #include "string_utils.h" #include "inline_summary.h" +#include "phase_impl.h" // Call Graph Analysis // This phase is a foundation phase of compilation. This phase build @@ -170,7 +171,7 @@ bool FuncMustBeEmitted(const MIRFunction &func) { const std::string CallInfo::GetCalleeName() const { if ((cType >= kCallTypeCall) && (cType <= kCallTypeInterfaceCall)) { - MIRFunction &mirf = *GetCallee(); + MIRFunction &mirf = GetCallee(); return mirf.GetName(); } else if (cType == kCallTypeIcall) { return "IcallUnknown"; @@ -746,7 +747,7 @@ void CallGraph::HandleICall(BlockNode &body, CGNode &node, StmtNode *stmt, uint3 } if (symbol->GetKonst()->GetKind() == kConstAggConst) { auto *aggConst = static_cast(symbol->GetKonst()); - auto *elem = aggConst->GetAggConstElement(dread->GetFieldID()); + auto *elem = aggConst->GetAggConstElement(static_cast(dread->GetFieldID())); if (elem->GetKind() == kConstAddrofFunc) { auto *addrofFuncConst = static_cast(elem); stmt = ReplaceIcallToCall(body, *icall, addrofFuncConst->GetValue()); @@ -873,7 +874,7 @@ void CallGraph::HandleICall(BlockNode &body, CGNode &node, StmtNode *stmt, uint3 (void)icallToFix.at(funcType->GetTypeIndex())->emplace(node.GetPuIdx(), callSite); } -MapleVector *SearchImplinterfaces(Klass *klass, const MIRFunction &calleeFunc) { +MapleVector *SearchImplinterfaces(const Klass *klass, const MIRFunction &calleeFunc) { if (klass == nullptr) { // Fix CI return nullptr; } @@ -1246,17 +1247,14 @@ void IPODevirtulize::SearchDefInMemberMethods(const Klass &klass) const { return; } ASSERT(!initMethods.empty(), "Must have initializor"); - StmtNode *stmtNext = nullptr; for (size_t i = 0; i < initMethods.size(); ++i) { MIRFunction *func = initMethods[i]; if (func->GetBody() == nullptr) { continue; } std::vector gcmallocSymbols; - for (StmtNode *stmt = func->GetBody()->GetFirst(); stmt != nullptr; stmt = stmtNext) { - stmtNext = stmt->GetNext(); - Opcode op = stmt->GetOpCode(); - switch (op) { + for (StmtNode *stmt = func->GetBody()->GetFirst(); stmt != nullptr; stmt = stmt->GetNext()) { + switch (stmt->GetOpCode()) { case OP_comment: break; case OP_dassign: { @@ -2106,4 +2104,77 @@ bool M2MFuncDeleter::PhaseRun(maple::MIRModule &m) { void M2MFuncDeleter::GetAnalysisDependence(maple::AnalysisDep &aDep) const { aDep.PreservedAllExcept(); } + +class CallTargetReplace : public FuncOptimizeImpl { + public: + explicit CallTargetReplace(MIRModule &module, bool dump) + : FuncOptimizeImpl(module, nullptr, dump), mirModule(module) {} + + FuncOptimizeImpl *Clone() override { + CHECK_FATAL(false, "should not be Cloned"); + } + + protected: + void ProcessStmt(StmtNode &stmt) override; + + private: + void InitMIRBuilder() { + mirBuilder = mirModule.GetMemPool()->New(&mirModule); + } + bool ReplaceCallTargetWithExternalFunc(CallNode &callStmt); + MIRModule &mirModule; + MIRBuilder *mirBuilder = nullptr; + uint32 replacedCnt = 0; +}; + +// replace call target that must be deleted and has been mangled before with its orig external version +// return true if replacing occured. +bool CallTargetReplace::ReplaceCallTargetWithExternalFunc(CallNode &callStmt) { + auto *targetFunc = GlobalTables::GetFunctionTable().GetFunctionFromPuidx(callStmt.GetPUIdx()); + CHECK_NULL_FATAL(targetFunc); + if (!FuncMustBeDeleted(*targetFunc)) { + return false; + } + const auto &funcName = targetFunc->GetName(); + size_t index = funcName.rfind(kRenameKeyWord); + if (index == std::string::npos) { + return false; + } + std::string externalFuncName = funcName.substr(0, index); + if (mirBuilder == nullptr) { + InitMIRBuilder(); + } + auto *externalFunc = mirBuilder->GetFunctionFromName(externalFuncName); + CHECK_FATAL(externalFunc != nullptr, "externalFunc should not be null"); + callStmt.SetPUIdx(externalFunc->GetPuidx()); + if (dump) { + LogInfo::MapleLogger() << "[CallTargetReplace] replace " << funcName << " with " << externalFuncName; + LogInfo::MapleLogger() << std::endl; + } + return true; +} + +void CallTargetReplace::ProcessStmt(StmtNode &stmt) { + Opcode op = stmt.GetOpCode(); + if (op == OP_call || op == OP_callassigned) { + auto &callStmt = static_cast(stmt); + bool result = ReplaceCallTargetWithExternalFunc(callStmt); + if (result) { + ++replacedCnt; + } + } +} + +void M2MCallTargetReplace::GetAnalysisDependence(maple::AnalysisDep &aDep) const { + aDep.PreservedAllExcept(); +} + +bool M2MCallTargetReplace::PhaseRun(maple::MIRModule &m) { + std::unique_ptr funcOptImpl = std::make_unique(m, TRACE_MAPLE_PHASE); + ASSERT_NOT_NULL(funcOptImpl); + FuncOptimizeIterator opt(PhaseName(), std::move(funcOptImpl)); + opt.Init(); + opt.Run(); + return true; +} } // namespace maple diff --git a/src/mapleall/mpl2mpl/src/class_hierarchy.cpp b/src/mapleall/mpl2mpl/src/class_hierarchy.cpp index 73d153ee81..6ee63280d8 100644 --- a/src/mapleall/mpl2mpl/src/class_hierarchy.cpp +++ b/src/mapleall/mpl2mpl/src/class_hierarchy.cpp @@ -214,7 +214,8 @@ bool Klass::IsVirtualMethod(const MIRFunction &func) const { } void Klass::CountVirtMethTopDown(const KlassHierarchy &kh) { - MapleVector *vec, *pvec; + MapleVector *vec; + MapleVector *pvec; GStrIdx strIdx; auto *superAndImplClasses = alloc->GetMemPool()->New>(alloc->Adapter()); // Add default methods of interface. Add them first because they have lowest @@ -475,7 +476,8 @@ bool KlassHierarchy::NeedClinitCheckRecursively(const Klass &kl) const { // Get lowest common ancestor for two classes Klass *KlassHierarchy::GetLCA(Klass *klass1, Klass *klass2) const { - std::vector v1, v2; + std::vector v1; + std::vector v2; while (klass1 != nullptr) { v1.push_back(klass1); klass1 = klass1->GetSuperKlass(); diff --git a/src/mapleall/mpl2mpl/src/clone.cpp b/src/mapleall/mpl2mpl/src/clone.cpp index 7b5191a1ea..81aec04dc5 100644 --- a/src/mapleall/mpl2mpl/src/clone.cpp +++ b/src/mapleall/mpl2mpl/src/clone.cpp @@ -121,7 +121,7 @@ MIRFunction *Clone::CloneFunction(MIRFunction &originalFunction, const std::stri newFunc->SetFuncAttrs(originalFunction.GetFuncAttrs()); newFunc->SetBaseClassFuncNames(GlobalTables::GetStrTable().GetOrCreateStrIdxFromName(fullName)); if (originalFunction.GetBody() != nullptr) { - CopyFuncInfo(originalFunction, *newFunc); + maple::CopyFuncInfo(originalFunction, *newFunc, mirBuilder); MIRFunction *originalCurrFunction = mirBuilder.GetCurrentFunctionNotNull(); mirBuilder.SetCurrentFunction(*newFunc); newFunc->SetBody( @@ -140,30 +140,6 @@ void Clone::CloneArgument(MIRFunction &originalFunction, ArgVector &argument) co } } -void Clone::CopyFuncInfo(MIRFunction &originalFunction, MIRFunction &newFunc) const { - auto funcNameIdx = newFunc.GetBaseFuncNameStrIdx(); - auto fullNameIdx = newFunc.GetNameStrIdx(); - auto classNameIdx = newFunc.GetBaseClassNameStrIdx(); - auto metaFullNameIdx = mirBuilder.GetOrCreateStringIndex(kFullNameStr); - auto metaClassNameIdx = mirBuilder.GetOrCreateStringIndex(kClassNameStr); - auto metaFuncNameIdx = mirBuilder.GetOrCreateStringIndex(kFuncNameStr); - MIRInfoVector &fnInfo = originalFunction.GetInfoVector(); - const MapleVector &infoIsString = originalFunction.InfoIsString(); - size_t size = fnInfo.size(); - for (size_t i = 0; i < size; ++i) { - if (fnInfo[i].first == metaFullNameIdx) { - newFunc.PushbackMIRInfo(std::pair(fnInfo[i].first, fullNameIdx)); - } else if (fnInfo[i].first == metaFuncNameIdx) { - newFunc.PushbackMIRInfo(std::pair(fnInfo[i].first, funcNameIdx)); - } else if (fnInfo[i].first == metaClassNameIdx) { - newFunc.PushbackMIRInfo(std::pair(fnInfo[i].first, classNameIdx)); - } else { - newFunc.PushbackMIRInfo(std::pair(fnInfo[i].first, fnInfo[i].second)); - } - newFunc.PushbackIsString(infoIsString[i]); - } -} - void Clone::UpdateFuncInfo(MIRFunction &newFunc) { auto fullNameIdx = newFunc.GetNameStrIdx(); auto metaFullNameIdx = mirBuilder.GetOrCreateStringIndex(kFullNameStr); diff --git a/src/mapleall/mpl2mpl/src/constantfold.cpp b/src/mapleall/mpl2mpl/src/constantfold.cpp index c4e42c9caa..02093ac012 100644 --- a/src/mapleall/mpl2mpl/src/constantfold.cpp +++ b/src/mapleall/mpl2mpl/src/constantfold.cpp @@ -262,22 +262,7 @@ std::pair> ConstantFold::DispatchFold(BaseNode case OP_iread: return FoldIread(static_cast(node)); case OP_add: - case OP_ashr: - case OP_band: - case OP_bior: - case OP_bxor: - case OP_cand: - case OP_cior: - case OP_div: - case OP_land: - case OP_lior: - case OP_lshr: - case OP_max: - case OP_min: - case OP_mul: - case OP_rem: - case OP_shl: - case OP_sub: + OP_CASE_GROUP: return FoldBinary(static_cast(node)); case OP_eq: case OP_ne: @@ -822,7 +807,8 @@ MIRIntConst *ConstantFold::FoldIntConstUnaryMIRConst(Opcode opcode, PrimType res break; } case OP_lnot: { - result = { result == 0, resultType }; + uint64 resultInt = result == 0 ? 1 : 0; + result = {resultInt, resultType}; break; } case OP_neg: { @@ -1262,6 +1248,11 @@ MIRConst *ConstantFold::FoldTypeCvtMIRConst(const MIRConst &cst, PrimType fromTy // do not fold return nullptr; } + if (fromType == PTY_f128 || toType == PTY_f128) { + // folding while Cvt float128 is not supported yet + return nullptr; + } + if (IsPrimitiveInteger(fromType) && IsPrimitiveInteger(toType)) { MIRConst *toConst = nullptr; uint32 fromSize = GetPrimTypeBitSize(fromType); @@ -2722,8 +2713,26 @@ class ConstIntSet { // generate an interval from meExpr std::optional GenerateIntSet(const OpMeExpr &meExpr, PrimType type) { auto opnd1 = meExpr.GetOpnd(1); - auto intVal = static_cast(opnd1)->GetIntValue().TruncOrExtend(type); + auto c = static_cast(opnd1)->GetIntValue(); + auto intVal = c.TruncOrExtend(type); + auto valueType = meExpr.GetOpnd(0)->GetPrimType(); auto res = std::make_optional(); + if (type != valueType && intVal.Trunc(valueType).GetZXTValue() != c.GetZXTValue()) { + if (meExpr.GetOp() == OP_eq) { + res->isEmpty = true; + return res; + } + if (meExpr.GetOp() == OP_ne) { + res->isFull = true; + return res; + } + if (IsSignedInteger(valueType) && intVal.GetSignBit()) { + intVal.SetMinValue(); + } else { + intVal.SetMaxValue(); + } + } + bool isSigned = intVal.IsSigned(); uint16 width = intVal.GetBitWidth(); switch (meExpr.GetOp()) { @@ -2793,6 +2802,10 @@ std::optional Union(ConstIntSet s1, ConstIntSet s2) { return s3; } + if (s1.lower.IsSigned() != s2.lower.IsSigned()) { + return std::nullopt; + } + if (s2.lower > s2.upper || s1.upper.IsMaxValue()) { if (!s2.EqMax()) { std::swap(s1, s2); @@ -2932,19 +2945,21 @@ MeExpr *ConstantFold::FoldCmpExpr(IRMap &irMap, const MeExpr &cmp1, const MeExpr return nullptr; } auto value = cmp1.GetOpnd(0); - auto type = value->GetPrimType(); - auto constValType = cmp1.GetOpnd(1)->GetPrimType(); - if (type != constValType && IsUnsignedInteger(constValType)) { - type = constValType; + auto type1 = static_cast(cmp1).GetOpndType(); + auto type2 = static_cast(cmp2).GetOpndType(); + if (type1 != type2) { + return nullptr; + } + auto type = type1; + if (IsUnsignedInteger(value->GetPrimType())) { + type = GetUnsignedPrimType(type1); } + auto s1 = GenerateIntSet(static_cast(cmp1), type); auto s2 = GenerateIntSet(static_cast(cmp2), type); if (!s1 || !s2) { return nullptr; } - if (s1->lower.IsSigned() != s2->lower.IsSigned()) { - return nullptr; - } // if foldType is AND, we could do union instead of intersection if (isAnd) { s1->DoNegation(); @@ -2952,6 +2967,9 @@ MeExpr *ConstantFold::FoldCmpExpr(IRMap &irMap, const MeExpr &cmp1, const MeExpr } auto s3 = Union(*s1, *s2); if (!s3) { + if (s1->lower.IsSigned() != s2->lower.IsSigned()) { + return nullptr; + } // s3 is not continuous, the size of s1 and s2 must be same if (s1->upper - s1->lower != s2->upper - s2->lower) { return nullptr; diff --git a/src/mapleall/mpl2mpl/src/gen_check_cast.cpp b/src/mapleall/mpl2mpl/src/gen_check_cast.cpp index 55abc3c71e..97a384fabe 100644 --- a/src/mapleall/mpl2mpl/src/gen_check_cast.cpp +++ b/src/mapleall/mpl2mpl/src/gen_check_cast.cpp @@ -273,6 +273,7 @@ void CheckCastGenerator::GenCheckCast(StmtNode &stmt) { fromType = GlobalTables::GetTypeTable().GetTypeTable()[PTY_ptr]; } } + CHECK_NULL_FATAL(fromType); CHECK_FATAL((fromType->GetPrimType() == maple::PTY_ptr || fromType->GetPrimType() == maple::PTY_ref), "unknown fromType! check it!"); CHECK_FATAL(GlobalTables::GetTypeTable().GetTypeFromTyIdx(callNode->GetTyIdx())->GetPrimType() == maple::PTY_ptr || @@ -612,7 +613,7 @@ bool CheckCastGenerator::IsDefinedConstClass(const StmtNode &stmt, const MIRPtrT // inline check cache, it implements __MRT_IsAssignableFromCheckCache void CheckCastGenerator::ReplaceIsAssignableFromUsingCache(BlockNode &blockNode, StmtNode &stmt, const MIRPtrType &targetClassType, - const IntrinsicopNode &intrinsicNode) const { + const IntrinsicopNode &intrinsicNode) { StmtNode *resultFalse = nullptr; StmtNode *resultTrue = nullptr; StmtNode *cacheFalseClassesAssign = nullptr; @@ -736,7 +737,7 @@ void CheckCastGenerator::ReplaceIsAssignableFromUsingCache(BlockNode &blockNode, } void CheckCastGenerator::CheckIsAssignableFrom(BlockNode &blockNode, StmtNode &stmt, - const IntrinsicopNode &intrinsicNode) const { + const IntrinsicopNode &intrinsicNode) { MIRType *targetClassType = GlobalTables::GetTypeTable().GetTypeFromTyIdx(intrinsicNode.GetTyIdx()); auto *ptrType = static_cast(targetClassType); MIRType *ptype = ptrType->GetPointedType(); @@ -828,7 +829,7 @@ void CheckCastGenerator::OptimizeInstanceof() { } } -void CheckCastGenerator::OptimizeIsAssignableFrom() const { +void CheckCastGenerator::OptimizeIsAssignableFrom() { StmtNode *stmt = currFunc->GetBody()->GetFirst(); StmtNode *next = nullptr; while (stmt != nullptr) { @@ -858,7 +859,7 @@ void CheckCastGenerator::OptimizeIsAssignableFrom() const { } } -StmtNode *PreCheckCast::GetAssignRet(IntrinsiccallNode &callnode) { +StmtNode *PreCheckCast::GetAssignRet(IntrinsiccallNode &callnode) const { BaseNode *opnd = callnode.Opnd(0); ASSERT(!callnode.GetReturnVec().empty(), "container check"); CallReturnPair callretpair = callnode.GetCallReturnPair(0); diff --git a/src/mapleall/mpl2mpl/src/ginline.cpp b/src/mapleall/mpl2mpl/src/ginline.cpp index 6134dcb873..b38dccc13c 100644 --- a/src/mapleall/mpl2mpl/src/ginline.cpp +++ b/src/mapleall/mpl2mpl/src/ginline.cpp @@ -233,12 +233,12 @@ bool GInline::CanIgnoreGrowthLimit(const CallSiteNode &callSiteNode) const { if (depth > Options::ginlineMaxDepthIgnoreGrowthLimit) { return false; } - auto *callee = callSiteNode.GetCallInfo()->GetCallee(); + auto &callee = callSiteNode.GetCallInfo()->GetCallee(); uint32 thresholdSmallFunc = Options::ginlineSmallFunc; uint32 relaxThreshold = 1; if (CalleeCanBeRemovedIfInlined(*callSiteNode.GetCallInfo(), *cg)) { relaxThreshold = Options::ginlineRelaxSmallFuncCanbeRemoved; - } else if (callee->IsInline()) { + } else if (callee.IsInline()) { constexpr uint32 defaultRelaxForInlineNormalFreq = 2; relaxThreshold = callSiteNode.GetCallFreqPercent() >= 1 ? Options::ginlineRelaxSmallFuncDecalredInline : defaultRelaxForInlineNormalFreq; @@ -274,7 +274,7 @@ void GInline::PrepareCallsiteSet() { } } -void GInline::AfterInlineSuccess(const CallSiteNode &heapNode, const std::vector &newCallInfo, +void GInline::AfterInlineSuccess(CallSiteNode &heapNode, const std::vector &newCallInfo, bool canBeRemoved, int64 lastSize) { ++totalSuccessCnt; CallInfo *callsite = heapNode.GetCallInfo(); diff --git a/src/mapleall/mpl2mpl/src/inline_analyzer.cpp b/src/mapleall/mpl2mpl/src/inline_analyzer.cpp index 712240bae8..b77f6533ba 100644 --- a/src/mapleall/mpl2mpl/src/inline_analyzer.cpp +++ b/src/mapleall/mpl2mpl/src/inline_analyzer.cpp @@ -572,7 +572,8 @@ std::pair InlineAnalyzer::CanInlineImpl(std::pair GetFuncSize(const MIRFunction &func) { // called before performing inline bool CalleeCanBeRemovedIfInlined(const CallInfo &info, const CallGraph &cg) { - auto *callee = info.GetCallee(); - CHECK_NULL_FATAL(callee); - auto *calleeNode = cg.GetCGNode(callee); + auto &callee = info.GetCallee(); + auto *calleeNode = cg.GetCGNode(&callee); CHECK_NULL_FATAL(calleeNode); bool calledOnce = calleeNode->NumberOfUses() == 1 && calleeNode->NumReferences() == 1 && !calleeNode->IsAddrTaken(); if (!calledOnce) { return false; } - bool localAccess = callee->IsStatic() || (callee->IsInline() && !callee->IsExtern()); + bool localAccess = callee.IsStatic() || (callee.IsInline() && !callee.IsExtern()); return localAccess; } double ComputeUninlinedTimeCost(const CallInfo &callInfo, double callFreqPercent) { auto *callerSummary = callInfo.GetCaller()->GetInlineSummary(); CHECK_NULL_FATAL(callerSummary); - auto *calleeSummary = callInfo.GetCallee()->GetInlineSummary(); + auto *calleeSummary = callInfo.GetCallee().GetInlineSummary(); CHECK_NULL_FATAL(calleeSummary); // `callerTime` includes time for preparing call const double callerTime = callerSummary->GetStaticCycles(); diff --git a/src/mapleall/mpl2mpl/src/java_intrn_lowering.cpp b/src/mapleall/mpl2mpl/src/java_intrn_lowering.cpp index dcda988ad7..e0cf849049 100644 --- a/src/mapleall/mpl2mpl/src/java_intrn_lowering.cpp +++ b/src/mapleall/mpl2mpl/src/java_intrn_lowering.cpp @@ -143,7 +143,7 @@ void JavaIntrnLowering::CheckClassLoaderInvocation(const CallNode &callNode) con } CHECK_FATAL(false, "Check ClassLoader Invocation, failed. \ - Please copy \"%s,%s\" into %s, and submit it to review. mpl file:%s", + Please copy \"%s, %s\" into %s, and submit it to review. mpl file:%s", namemangler::DecodeName(currFunc->GetName()).c_str(), namemangler::DecodeName(callee->GetName()).c_str(), Options::classLoaderInvocationList.c_str(), GetMIRModule().GetFileName().c_str()); diff --git a/src/mapleall/mpl2mpl/src/expand128floats.cpp b/src/mapleall/mpl2mpl/src/legalize_numeric_types.cpp similarity index 51% rename from src/mapleall/mpl2mpl/src/expand128floats.cpp rename to src/mapleall/mpl2mpl/src/legalize_numeric_types.cpp index 2243b42c21..28750dffe7 100644 --- a/src/mapleall/mpl2mpl/src/expand128floats.cpp +++ b/src/mapleall/mpl2mpl/src/legalize_numeric_types.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) [2022] Huawei Technologies Co.,Ltd.All rights reserved. + * Copyright (c) [2023] Huawei Technologies Co.,Ltd.All rights reserved. * * OpenArkCompiler is licensed under Mulan PSL v2. * You can use this software according to the terms and conditions of the Mulan @@ -13,7 +13,7 @@ * Mulan PSL v2 for more details. */ -#include "expand128floats.h" +#include "legalize_numeric_types.h" #include "cfg_primitive_types.h" namespace maple { @@ -23,47 +23,91 @@ using F128OpRes = struct { Opcode negativeRes; }; -std::array cmpOps{OP_eq, OP_ne, OP_gt, OP_lt, OP_ge, OP_le}; +const static std::array kCmpOps{OP_eq, OP_ne, OP_gt, OP_lt, OP_ge, OP_le}; -std::unordered_map f128OpsRes = { - {OP_eq, {OP_eq, OP_ne}}, - {OP_ne, {OP_ne, OP_eq}}, - {OP_gt, {OP_gt, OP_le}}, - {OP_lt, {OP_lt, OP_ge}}, - {OP_ge, {OP_ge, OP_lt}}, - {OP_le, {OP_le, OP_gt}} -}; +const static std::unordered_map kF128OpsRes = {{OP_eq, {OP_eq, OP_ne}}, {OP_ne, {OP_ne, OP_eq}}, + {OP_gt, {OP_gt, OP_le}}, {OP_lt, {OP_lt, OP_ge}}, + {OP_ge, {OP_ge, OP_lt}}, {OP_le, {OP_le, OP_gt}}}; -std::string Expand128Floats::GetSequentialName0(const std::string &prefix, uint32_t num) const { +std::string LegalizeNumericTypes::GetSequentialName0(const std::string &prefix, uint32_t num) const { std::stringstream ss; ss << prefix << num; return ss.str(); } -uint32 Expand128Floats::GetSequentialNumber() const { +uint32 LegalizeNumericTypes::GetSequentialNumber() const { static uint32 unnamedSymbolIdx = 1; return unnamedSymbolIdx++; } -std::string Expand128Floats::GetSequentialName(const std::string &prefix) const { +std::string LegalizeNumericTypes::GetSequentialName(const std::string &prefix) const { std::string name = GetSequentialName0(prefix, GetSequentialNumber()); return name; } -std::string Expand128Floats::SelectSoftFPCall(Opcode opCode, BaseNode *node) const { - CHECK_FATAL(node, "Nullptr at Expand129Floats::SelectSoftFPCall method"); +std::string LegalizeNumericTypes::SelectInt128Call(Opcode opCode, const BaseNode &node) const { + switch (opCode) { + case OP_cvt: + case OP_trunc: { + PrimType fromType = static_cast(node).FromType(); + PrimType toType = static_cast(node).ptyp; + if (IsInt128Ty(fromType)) { + bool isSigned = IsSignedInteger(fromType); + (void)isSigned; + switch (toType) { + case PTY_f32: + return isSigned ? "__floattisf" : "__floatuntisf"; + case PTY_f64: + return isSigned ? "__floattidf" : "__floatuntidf"; + case PTY_f128: + return isSigned ? "__floattitf" : "__floatuntitf"; + default: + CHECK_FATAL(false, "unexpected destination type"); + return ""; + } + } else if (IsInt128Ty(toType)) { + bool isSigned = IsSignedInteger(toType); + (void)isSigned; + switch (fromType) { + case PTY_f32: + return isSigned ? "__fixsfti" : "__fixunssfti"; + case PTY_f64: + return isSigned ? "__fixdfti" : "__fixunsdfti"; + case PTY_f128: + return isSigned ? "__fixtfti" : "__fixunstfti"; + default: + CHECK_FATAL(false, "unexpected source type"); + break; + } + } else { + CHECK_FATAL(false, "unexpected cvt/trunc from %s to %s", GetPrimTypeName(fromType), GetPrimTypeName(toType)); + return ""; + } + break; + } + case OP_div: + return IsSignedInteger(node.ptyp) ? "__divti3" : "__udivti3"; + case OP_rem: + return IsSignedInteger(node.ptyp) ? "__modti3" : "__umodti3"; + default: + CHECK_FATAL(false, "unexpected opcode"); + return ""; + } +} + +std::string LegalizeNumericTypes::SelectSoftFPCall(Opcode opCode, BaseNode &node) const { switch (opCode) { case OP_cvt: case OP_trunc: - if (static_cast(node)->FromType() == PTY_f128) { - switch (static_cast(node)->ptyp) { + if (static_cast(node).FromType() == PTY_f128) { + switch (static_cast(node).ptyp) { case PTY_i8: case PTY_i16: - node->ptyp = PTY_i32; + node.ptyp = PTY_i32; return "__fixtfsi"; case PTY_u8: case PTY_u16: - node->ptyp = PTY_u32; + node.ptyp = PTY_u32; return "__fixunstfsi"; case PTY_i32: return "__fixtfsi"; @@ -79,26 +123,30 @@ std::string Expand128Floats::SelectSoftFPCall(Opcode opCode, BaseNode *node) con return "__trunctfsf2"; case PTY_f64: return "__trunctfdf2"; + case PTY_u128: + return "__floatuntitf"; + case PTY_i128: + return "__floattitf"; default: CHECK_FATAL(false, "unexpected destination type"); break; } - } else if (static_cast(node)->ptyp == PTY_f128) { - switch (static_cast(node)->FromType()) { + } else if (static_cast(node).ptyp == PTY_f128) { + switch (static_cast(node).FromType()) { case PTY_i8: case PTY_i16: { - auto *cvtNode = static_cast(node); - cvtNode->SetFromType(PTY_i32); - cvtNode->Opnd(0)->ptyp = PTY_i32; + auto &cvtNode = static_cast(node); + cvtNode.SetFromType(PTY_i32); + cvtNode.Opnd(0)->ptyp = PTY_i32; return "__floatsitf"; } case PTY_i32: return "__floatsitf"; case PTY_u8: case PTY_u16: { - auto *cvtNode = static_cast(node); - cvtNode->SetFromType(PTY_u32); - cvtNode->Opnd(0)->ptyp = PTY_u32; + auto &cvtNode = static_cast(node); + cvtNode.SetFromType(PTY_u32); + cvtNode.Opnd(0)->ptyp = PTY_u32; return "__floatunsitf"; } case PTY_u32: @@ -113,6 +161,10 @@ std::string Expand128Floats::SelectSoftFPCall(Opcode opCode, BaseNode *node) con return "__extendsftf2"; case PTY_f64: return "__extenddftf2"; + case PTY_u128: + return "__fixunstfti"; + case PTY_i128: + return "__fixtfti"; default: CHECK_FATAL(false, "unexpected source type"); break; @@ -157,55 +209,85 @@ std::string Expand128Floats::SelectSoftFPCall(Opcode opCode, BaseNode *node) con return ""; } -void Expand128Floats::ReplaceOpNode(BlockNode *block, BaseNode *baseNode, size_t opndId, - BaseNode &currNode, MIRFunction *func, StmtNode *stmt) const { - auto opCode = currNode.GetOpCode(); +enum LegalizeNumericTypesType : uint8 { + kNoLegalize = 0, + kLegalizeInt128, + kLegalizeFloat128 +}; + +static LegalizeNumericTypesType GetLegalizeType(const BaseNode &currNode) { + bool opndIsF128 = false; + bool opndIsInt128 = false; + for (size_t i = 0; i < currNode.numOpnds; ++i) { + if (currNode.Opnd(i)->ptyp == PTY_f128) { + opndIsF128 = true; + break; + } + + if (IsInt128Ty(currNode.Opnd(i)->ptyp)) { + opndIsInt128 = true; + break; + } + } + + if (opndIsF128 || currNode.ptyp == PTY_f128) { + return kLegalizeFloat128; + } + + if (opndIsInt128 || IsInt128Ty(currNode.ptyp)) { + auto opCode = currNode.GetOpCode(); + if (opCode == OP_div || opCode == OP_rem) { + return kLegalizeInt128; + } else if (opCode == OP_cvt || opCode == OP_trunc) { + PrimType fromType = static_cast(currNode).FromType(); + PrimType toType = static_cast(currNode).ptyp; + if (IsPrimitiveFloat(fromType) || IsPrimitiveFloat(toType)) { + return kLegalizeInt128; + } + } + } + + return kNoLegalize; +} +void LegalizeNumericTypes::ReplaceOpNode(BlockNode *block, BaseNode *baseNode, size_t opndId, BaseNode &currNode, + MIRFunction *func, const StmtNode &stmt) const { PrimType pType; - if (std::find(cmpOps.begin(), cmpOps.end(), opCode) == cmpOps.end()) { + if (std::find(kCmpOps.begin(), kCmpOps.end(), currNode.GetOpCode()) == kCmpOps.end()) { pType = currNode.ptyp; } else { pType = PTY_i32; } + auto kLegalizeType = GetLegalizeType(currNode); + if (kLegalizeType == kNoLegalize) { + return; + } + MapleVector args(builder->GetCurrentFuncCodeMpAllocator()->Adapter()); - if (opCode == OP_cvt || opCode == OP_trunc) { - TypeCvtNode &cvtNode = static_cast(currNode); - if (cvtNode.FromType() == PTY_f128 || cvtNode.ptyp == PTY_f128) { - args.push_back(currNode.Opnd(0)); - } else { - return; - } - } else { - bool opndIsF128 = false; - for (size_t i = 0; i < currNode.numOpnds; ++i) { - if (currNode.Opnd(i)->ptyp == PTY_f128) { - opndIsF128 = true; - break; - } - } - if (!opndIsF128 && currNode.ptyp != PTY_f128) { - return; - } - for (size_t i = 0; i < currNode.numOpnds; ++i) { - args.push_back(currNode.Opnd(i)); - } + for (size_t i = 0; i < currNode.numOpnds; ++i) { + args.push_back(currNode.Opnd(i)); } + Opcode currOpCode = currNode.GetOpCode(); - std::string funcName = SelectSoftFPCall(currOpCode, &currNode); + const std::string funcName = (kLegalizeType == kLegalizeFloat128) ? + SelectSoftFPCall(currOpCode, currNode) : + SelectInt128Call(currOpCode, currNode); auto cvtFunc = builder->GetOrCreateFunction(funcName, TyIdx(currNode.ptyp)); cvtFunc->SetAttr(FUNCATTR_public); cvtFunc->SetAttr(FUNCATTR_extern); cvtFunc->SetAttr(FUNCATTR_used); ASSERT_NOT_NULL(cvtFunc->GetFuncSymbol()); - cvtFunc->GetFuncSymbol()->SetAppearsInCode(true); + auto *funcSymbol = cvtFunc->GetFuncSymbol(); + CHECK_FATAL(funcSymbol != nullptr, "funcSymbol is nullptr"); + funcSymbol->SetAppearsInCode(true); cvtFunc->AllocSymTab(); MIRSymbol *stubFuncRet = builder->CreateSymbol(TyIdx(pType), - GetSequentialName("expand128floats_stub"), + GetSequentialName("legalize_stub"), kStVar, kScAuto, func, kScopeLocal); auto opCall = builder->CreateStmtCallAssigned(cvtFunc->GetPuidx(), args, stubFuncRet, OP_callassigned); - block->InsertBefore(stmt, opCall); + block->InsertBefore(&stmt, opCall); auto cvtDread = builder->CreateDread(*stubFuncRet, currNode.ptyp); if (!kOpcodeInfo.IsCompare(currOpCode)) { @@ -213,24 +295,23 @@ void Expand128Floats::ReplaceOpNode(BlockNode *block, BaseNode *baseNode, size_t } else { auto *zero = GlobalTables::GetIntConstTable().GetOrCreateIntConst(0, *GlobalTables::GetTypeTable().GetInt32()); Opcode newOpCode; - if (stmt->GetOpCode() == OP_brtrue || stmt->GetOpCode() == OP_brfalse) { - newOpCode = f128OpsRes[currOpCode].positiveRes; + if (stmt.GetOpCode() == OP_brtrue || stmt.GetOpCode() == OP_brfalse) { + newOpCode = kF128OpsRes.at(currOpCode).positiveRes; } else { if (baseNode->GetOpCode() == OP_while) { - newOpCode = f128OpsRes[currOpCode].negativeRes; + newOpCode = kF128OpsRes.at(currOpCode).negativeRes; } else { newOpCode = currOpCode; } } - auto newCond = builder->CreateExprCompare(newOpCode, *GlobalTables::GetTypeTable().GetUInt1(), - *GlobalTables::GetTypeTable().GetInt32(), - cvtDread, builder->CreateConstval(zero)); + auto newCond = + builder->CreateExprCompare(newOpCode, *GlobalTables::GetTypeTable().GetUInt1(), + *GlobalTables::GetTypeTable().GetInt32(), cvtDread, builder->CreateConstval(zero)); baseNode->SetOpnd(newCond, opndId); } } -bool Expand128Floats::CheckAndUpdateOp(BlockNode *block, BaseNode *node, - MIRFunction *func, StmtNode *stmt) { +bool LegalizeNumericTypes::CheckAndUpdateOp(BlockNode *block, BaseNode *node, MIRFunction *func, StmtNode &stmt) { auto nOp = node->NumOpnds(); for (size_t i = 0; i < nOp; ++i) { bool isCvt = CheckAndUpdateOp(block, node->Opnd(i), func, stmt); @@ -244,6 +325,7 @@ bool Expand128Floats::CheckAndUpdateOp(BlockNode *block, BaseNode *node, node->GetOpCode() == OP_sub || node->GetOpCode() == OP_add || node->GetOpCode() == OP_div || + node->GetOpCode() == OP_rem || node->GetOpCode() == OP_mul || node->GetOpCode() == OP_neg || node->GetOpCode() == OP_cmp || @@ -259,7 +341,7 @@ bool Expand128Floats::CheckAndUpdateOp(BlockNode *block, BaseNode *node, return false; } -void Expand128Floats::ProcessBody(BlockNode *block, StmtNode *stmt, MIRFunction *func) { +void LegalizeNumericTypes::ProcessBody(BlockNode *block, StmtNode *stmt, MIRFunction *func) { StmtNode *next = nullptr; while (stmt != nullptr) { next = stmt->GetNext(); @@ -269,9 +351,9 @@ void Expand128Floats::ProcessBody(BlockNode *block, StmtNode *stmt, MIRFunction auto *iNode = static_cast(stmt); ProcessBody(block, iNode->GetThenPart(), func); ProcessBody(block, iNode->GetElsePart(), func); - if (CheckAndUpdateOp(block, stmt->Opnd(0), func, stmt)) { + if (CheckAndUpdateOp(block, stmt->Opnd(0), func, *stmt)) { ReplaceOpNode(block, stmt, 0, - static_cast(*stmt->Opnd(0)), func, stmt); + static_cast(*stmt->Opnd(0)), func, *stmt); } break; } @@ -286,9 +368,9 @@ void Expand128Floats::ProcessBody(BlockNode *block, StmtNode *stmt, MIRFunction auto *wNode = static_cast(stmt); ASSERT(block != nullptr, "null ptr check!"); ProcessBody(block, wNode->GetBody(), func); - if (CheckAndUpdateOp(block, stmt->Opnd(0), func, stmt)) { + if (CheckAndUpdateOp(block, stmt->Opnd(0), func, *stmt)) { ReplaceOpNode(block, stmt, 0, - static_cast(*stmt->Opnd(0)), func, stmt); + static_cast(*stmt->Opnd(0)), func, *stmt); } break; } @@ -296,10 +378,10 @@ void Expand128Floats::ProcessBody(BlockNode *block, StmtNode *stmt, MIRFunction default: { auto nOp = stmt->NumOpnds(); for (size_t i = 0; i < nOp; ++i) { - bool isCvt = CheckAndUpdateOp(block, stmt->Opnd(i), func, stmt); + bool isCvt = CheckAndUpdateOp(block, stmt->Opnd(i), func, *stmt); if (isCvt) { ReplaceOpNode(block, stmt, i, - static_cast(*stmt->Opnd(i)), func, stmt); + static_cast(*stmt->Opnd(i)), func, *stmt); } } break; @@ -309,12 +391,12 @@ void Expand128Floats::ProcessBody(BlockNode *block, StmtNode *stmt, MIRFunction } } -void Expand128Floats::ProcessBody(BlockNode *block, MIRFunction *func) { +void LegalizeNumericTypes::ProcessBody(BlockNode *block, MIRFunction *func) { CHECK_NULL_FATAL(block); ProcessBody(block, block->GetFirst(), func); } -void Expand128Floats::ProcessFunc(MIRFunction *func) { +void LegalizeNumericTypes::ProcessFunc(MIRFunction *func) { if (func->IsEmpty()) { return; } @@ -323,13 +405,13 @@ void Expand128Floats::ProcessFunc(MIRFunction *func) { ProcessBody(func->GetBody(), func); } -void M2MExpand128Floats::GetAnalysisDependence(maple::AnalysisDep &aDep) const { +void M2MLegalizeNumericTypes::GetAnalysisDependence(maple::AnalysisDep &aDep) const { aDep.AddRequired(); aDep.SetPreservedAll(); } -bool M2MExpand128Floats::PhaseRun(maple::MIRModule &m) { - OPT_TEMPLATE_NEWPM(Expand128Floats, m); +bool M2MLegalizeNumericTypes::PhaseRun(maple::MIRModule &m) { + OPT_TEMPLATE_NEWPM(LegalizeNumericTypes, m); return true; } } // namespace maple diff --git a/src/mapleall/mpl2mpl/src/module_phase_manager.cpp b/src/mapleall/mpl2mpl/src/module_phase_manager.cpp index 393411a482..a14504b582 100644 --- a/src/mapleall/mpl2mpl/src/module_phase_manager.cpp +++ b/src/mapleall/mpl2mpl/src/module_phase_manager.cpp @@ -29,7 +29,10 @@ void DumpModule(const MIRModule &mod, const std::string phaseName, bool isBefore MIRFunction *func = nullptr; if (Options::DumpFunc()) { GStrIdx gStrIdxOfFunc = GlobalTables::GetStrTable().GetStrIdxFromName(Options::dumpFunc); - func = GlobalTables::GetGsymTable().GetSymbolFromStrIdx(gStrIdxOfFunc)->GetFunction(); + MIRSymbol *symbol = GlobalTables::GetGsymTable().GetSymbolFromStrIdx(gStrIdxOfFunc); + if (symbol != nullptr) { + func = symbol->GetFunction(); + } } bool dumpPhase = Options::DumpPhase(phaseName); if (Options::dumpBefore && dumpPhase && isBefore) { @@ -54,10 +57,7 @@ void DumpModule(const MIRModule &mod, const std::string phaseName, bool isBefore } void MEBETopLevelManager::InitFuncDescWithWhiteList(const maple::MIRModule &mod) { - if (!Options::sideEffectWhiteList) { - return; - } - for (auto &pair : SideEffect::GetWhiteList()) { + for (auto &pair : *IpaSideEffectAnalyzer::GetWhiteList()) { auto *funcSymbol = GlobalTables::GetGsymTable().GetSymbolFromStrIdx(GlobalTables::GetStrTable().GetStrIdxFromName(pair.first)); MIRFunction *func = nullptr; @@ -125,6 +125,7 @@ MAPLE_TRANSFORM_PHASE_REGISTER(M2MGInline, ginline) MAPLE_TRANSFORM_PHASE_REGISTER(M2MOutline, outline) MAPLE_TRANSFORM_PHASE_REGISTER(M2MIPODevirtualize, ipodevirtulize) MAPLE_TRANSFORM_PHASE_REGISTER(M2MFuncDeleter, funcdeleter) +MAPLE_TRANSFORM_PHASE_REGISTER(M2MCallTargetReplace, CallTargetReplace) MAPLE_TRANSFORM_PHASE_REGISTER(M2MMethodReplace, methodreplace) MAPLE_TRANSFORM_PHASE_REGISTER(M2MScalarReplacement, ScalarReplacement) MAPLE_TRANSFORM_PHASE_REGISTER(M2MOpenprofile, openprofile) @@ -141,7 +142,7 @@ MAPLE_TRANSFORM_PHASE_REGISTER(M2MSimplify, simplify) MAPLE_TRANSFORM_PHASE_REGISTER(M2MUpdateMplt, updatemplt) MAPLE_TRANSFORM_PHASE_REGISTER(M2MReflectionAnalysis, reflectionanalysis) MAPLE_TRANSFORM_PHASE_REGISTER(M2MVtableImpl, VtableImpl) -MAPLE_TRANSFORM_PHASE_REGISTER(M2MExpand128Floats, Expand128Floats) +MAPLE_TRANSFORM_PHASE_REGISTER(M2MLegalizeNumericTypes, LegalizeNumericTypes) MAPLE_TRANSFORM_PHASE_REGISTER(M2MConstantFold, ConstantFold) MAPLE_TRANSFORM_PHASE_REGISTER(M2MVtableAnalysis, vtableanalysis) MAPLE_TRANSFORM_PHASE_REGISTER(M2MVerifyMemorder, VerifyMemorder) diff --git a/src/mapleall/mpl2mpl/src/muid_replacement.cpp b/src/mapleall/mpl2mpl/src/muid_replacement.cpp index cbc192d98d..76aa028aef 100644 --- a/src/mapleall/mpl2mpl/src/muid_replacement.cpp +++ b/src/mapleall/mpl2mpl/src/muid_replacement.cpp @@ -308,7 +308,8 @@ void MUIDReplacement::CollectFuncAndDataFromFuncList() { StmtNode *stmt = mirFunc->GetBody()->GetFirst(); while (stmt != nullptr) { PUIdx puidx = 0; - switch (stmt->GetOpCode()) { + Opcode op = stmt->GetOpCode(); + switch (op) { case OP_call: case OP_callassigned: { puidx = static_cast(stmt)->GetPUIdx(); @@ -1235,7 +1236,7 @@ void MUIDReplacement::ReplaceAddroffuncConst(MIRConst *&entry, uint32 fieldID, b entry = constNode; } -bool MUIDReplacement::IsMIRAggConstNull(MIRSymbol *tabSym) const { +bool MUIDReplacement::IsMIRAggConstNull(const MIRSymbol *tabSym) const { return (tabSym == nullptr) || (tabSym->GetKonst() == nullptr); } diff --git a/src/mapleall/mpl2mpl/src/reflection_analysis.cpp b/src/mapleall/mpl2mpl/src/reflection_analysis.cpp index 55b493e824..8899e0ffa1 100644 --- a/src/mapleall/mpl2mpl/src/reflection_analysis.cpp +++ b/src/mapleall/mpl2mpl/src/reflection_analysis.cpp @@ -189,8 +189,7 @@ void ReflectionAnalysis::GenFieldTypeClassInfo(const MIRType &type, const Klass classInfo = CLASSINFO_PREFIX_STR + classTypeSecond->GetName(); isClass = true; } else { - CHECK_FATAL(false, "In class %s: field %s 's type is UNKNOWN", klass.GetKlassName().c_str(), - fieldName.c_str()); + CHECK_FATAL(false, "In class %s: field %s 's type is UNKNOWN", klass.GetKlassName().c_str(), fieldName.c_str()); } break; } @@ -1066,7 +1065,8 @@ MIRSymbol *ReflectionAnalysis::GenMethodsMetaData(const Klass &klass, bool isHot methodinfoVec.push_back(std::make_pair(&methodPair, -1)); } - std::unordered_map baseNameMp, fullNameMp; + std::unordered_map baseNameMp; + std::unordered_map fullNameMp; GenAllMethodHash(methodinfoVec, baseNameMp, fullNameMp); // Sort constVec by hashcode. HashCodeComparator comparator(baseNameMp, fullNameMp); diff --git a/src/mapleall/mpl2mpl/src/simplify.cpp b/src/mapleall/mpl2mpl/src/simplify.cpp index b5dffc01fb..c4791a038b 100644 --- a/src/mapleall/mpl2mpl/src/simplify.cpp +++ b/src/mapleall/mpl2mpl/src/simplify.cpp @@ -770,22 +770,6 @@ bool Simplify::IsConstRepalceable(const MIRConst &mirConst) const { } } -static size_t GetRealFieldsSize(MIRType &currType) { - auto *currStructType = currType.EmbeddedStructType(); - if (!currStructType) { - return 0; - } - auto fieldSize = currStructType->GetFieldsSize(); - for (auto field : currStructType->GetFields()) { - auto tyIdx = field.second.first; - auto *type = GlobalTables::GetTypeTable().GetTypeFromTyIdx(tyIdx); - if (type->EmbeddedStructType()) { - fieldSize += GetRealFieldsSize(*type); - } - } - return fieldSize; -} - MIRConst *Simplify::GetElementConstFromFieldId(FieldID fieldId, MIRConst &mirConst) const { FieldID currFieldId = 1; MIRConst *resultConst = nullptr; @@ -795,7 +779,7 @@ MIRConst *Simplify::GetElementConstFromFieldId(FieldID fieldId, MIRConst &mirCon bool isUpperLayerUnion = false; std::function traverseAgg = [&] (MIRConst *currConst, MIRType *currType) { if (currType->GetKind() == kTypeArray) { - currFieldId += static_cast(GetRealFieldsSize(*currType)); + currFieldId += static_cast(currType->NumberOfFieldIDs()); return; } if (!currConst || currConst->GetKind() != kConstAggConst) { @@ -2079,7 +2063,9 @@ StmtNode *SimplifyOp::PartiallyExpandMemsetS(StmtNode &stmt, BlockNode &block) c block.RemoveStmt(&stmt); return nullptr; } else { - LabelIdx dstSizeCheckLabIdx, srcSizeCheckLabIdx, nullPtrLabIdx = std::numeric_limits::max(); + LabelIdx dstSizeCheckLabIdx = std::numeric_limits::max(); + LabelIdx srcSizeCheckLabIdx = std::numeric_limits::max(); + LabelIdx nullPtrLabIdx = std::numeric_limits::max(); if (!isDstSizeConst) { // check if dst size is greater than maxlen dstSizeCheckLabIdx = func->GetLabelTab()->CreateLabelWithPrefix('n'); // 'n' means nullptr @@ -2284,7 +2270,12 @@ StmtNode *SimplifyOp::PartiallyExpandMemcpyS(StmtNode &stmt, BlockNode &block) { block.RemoveStmt(&stmt); return nullptr; } else { - LabelIdx dstSizeCheckLabIdx, srcSizeCheckLabIdx, dstNullPtrLabIdx, srcNullPtrLabIdx, addrEqLabIdx, overlapLabIdx; + LabelIdx dstSizeCheckLabIdx; + LabelIdx srcSizeCheckLabIdx; + LabelIdx dstNullPtrLabIdx; + LabelIdx srcNullPtrLabIdx; + LabelIdx addrEqLabIdx; + LabelIdx overlapLabIdx; if (!isDstSizeConst) { // check if dst size is greater than maxlen or equal to 0 dstSizeCheckLabIdx = func->GetLabelTab()->CreateLabelWithPrefix('n'); // 'n' means nullptr diff --git a/src/mapleall/test/peep_test.cpp b/src/mapleall/test/peep_test.cpp index d659baca54..85306eb8b7 100644 --- a/src/mapleall/test/peep_test.cpp +++ b/src/mapleall/test/peep_test.cpp @@ -132,7 +132,7 @@ TEST(peep, normRevTbzToTbzPattern40) { maplebe::Insn &insn = aarchCGFunc->GetInsnBuilder()->BuildInsn(mOp, regOpnd0, regOpnd0); aarchCGFunc->GetCurBB()->AppendInsn(insn); - MOperator mOp1 = MOP_wtbz; + MOperator mOp1 = MOP_xtbz; RegOperand ®Opnd1 = aarchCGFunc->GetOrCreatePhysicalRegisterOperand(R0, maple::k64BitSize, kRegTyInt); ImmOperand ImmOpnd0(maplebe::k40BitSize, maplebe::k6BitSize, 0); LabelOperand &labelOpnd = aarchCGFunc->GetOpndBuilder()->CreateLabel(".L.", maple::k1BitSize, usePool); @@ -145,7 +145,7 @@ TEST(peep, normRevTbzToTbzPattern40) { MOperator mop = newInsn->GetMachineOpcode(); RegOperand opnd1 = static_cast(newInsn->GetOperand(kInsnFirstOpnd)); ImmOperand &newImmOpnd1 = static_cast(newInsn->GetOperand(kInsnSecondOpnd)); - ASSERT_EQ(mop, MOP_wtbz); + ASSERT_EQ(mop, MOP_xtbz); ASSERT_EQ(opnd1.GetRegisterNumber(), R0); ASSERT_EQ(newImmOpnd1.GetValue(), maplebe::k32BitSize); delete usePool; @@ -164,7 +164,7 @@ TEST(peep, normRevTbzToTbzPattern56) { maplebe::Insn &insn = aarchCGFunc->GetInsnBuilder()->BuildInsn(mOp, regOpnd0, regOpnd0); aarchCGFunc->GetCurBB()->AppendInsn(insn); - MOperator mOp1 = MOP_wtbz; + MOperator mOp1 = MOP_xtbz; RegOperand ®Opnd1 = aarchCGFunc->GetOrCreatePhysicalRegisterOperand(R0, maple::k64BitSize, kRegTyInt); ImmOperand ImmOpnd0(maplebe::k56BitSize, maplebe::k6BitSize, 0); LabelOperand &labelOpnd = aarchCGFunc->GetOpndBuilder()->CreateLabel(".L.", maple::k1BitSize, usePool); @@ -177,7 +177,7 @@ TEST(peep, normRevTbzToTbzPattern56) { MOperator mop = newInsn->GetMachineOpcode(); RegOperand opnd1 = static_cast(newInsn->GetOperand(kInsnFirstOpnd)); ImmOperand &newImmOpnd1 = static_cast(newInsn->GetOperand(kInsnSecondOpnd)); - ASSERT_EQ(mop, MOP_wtbz); + ASSERT_EQ(mop, MOP_xtbz); ASSERT_EQ(opnd1.GetRegisterNumber(), R0); ASSERT_EQ(newImmOpnd1.GetValue(), maplebe::k48BitSize); delete usePool; diff --git a/testsuite/c_test/ast_test/AST0098-UnionCast/HelloWorld.c b/testsuite/c_test/ast_test/AST0098-UnionCast/HelloWorld.c index 630b6bf552..184c2581d7 100644 --- a/testsuite/c_test/ast_test/AST0098-UnionCast/HelloWorld.c +++ b/testsuite/c_test/ast_test/AST0098-UnionCast/HelloWorld.c @@ -14,6 +14,7 @@ */ #include +// CHECK: [[# FILENUM:]] "{{.*}}/HelloWorld.c" struct tree_string { char str[1]; @@ -26,12 +27,15 @@ union tree_node char *Foo (char *str) { + // CHECK: LOC {{.*}} 32 17 + // CHECK-NEXT: dassign %anon.union.78 2 (dread ptr %str) char *str1 = ((union {const char * _q; char * _nq;}) str)._nq; return str1; } - char *Foo1 (union tree_node * num_string) { + // CHECK: LOC {{.*}} 39 16 + // CHECK-NEXT: dassign %anon.union.80 1 (iaddrof ptr <* <$tree_node_MNO2304581391>> 2 (dread ptr %__t_40_63)) char *str = ((union {const char * _q; char * _nq;}) ((const char *)(({ __typeof (num_string) const __t = num_string; __t; }) diff --git a/testsuite/c_test/ast_test/AST0098-UnionCast/test.cfg b/testsuite/c_test/ast_test/AST0098-UnionCast/test.cfg index ebca2916da..9d090abad8 100644 --- a/testsuite/c_test/ast_test/AST0098-UnionCast/test.cfg +++ b/testsuite/c_test/ast_test/AST0098-UnionCast/test.cfg @@ -1,2 +1,4 @@ +ASTO2: compile(HelloWorld) run(HelloWorld) +cat HelloWorld.mpl | ${MAPLE_ROOT}/tools/bin/FileCheck HelloWorld.c diff --git a/testsuite/c_test/ast_test/AST0140-MulAttrOffset/HelloWorld.c b/testsuite/c_test/ast_test/AST0140-MulAttrOffset/HelloWorld.c index be0e8ce34f..9382348fab 100644 --- a/testsuite/c_test/ast_test/AST0140-MulAttrOffset/HelloWorld.c +++ b/testsuite/c_test/ast_test/AST0140-MulAttrOffset/HelloWorld.c @@ -10,10 +10,38 @@ struct { // CHECK: LOC {{.*}} 12 9 // CHECK-NEXT: var $f <* i8> used = addrof ptr $e (4) int8_t *f = &e.d.b; -int32_t g() { + +struct A { + int64_t b; +} __attribute__((aligned, aligned)); +struct C { + struct A d; +}; +struct { + struct C e; +} h; +// CHECK: LOC {{.*}} 25 10 +// CHECK-NEXT: var $g <* i64> used = addrof ptr $h +int64_t *g = &h.e.d.b; + +struct S0 { + unsigned f4; +} __attribute__((aligned, warn_if_not_aligned0, deprecated, unused)) +__attribute__((aligned(1), deprecated, unused, transparent_union)); +struct { + struct S0 f1; + unsigned long f7; +} __attribute__(()) a, b; +// CHECK: LOC {{.*}} 37 17 +// CHECK-NEXT: var $c <* u64> = addrof ptr $b (8) +unsigned long * c = &b.f7; + +int32_t funcA() { if (*f = 5) return 0; + if (*g = 0) + return 0; } int main() { - g(); + funcA(); } diff --git a/testsuite/c_test/ast_test/AST0141-NoReturnStmt/HelloWorld.c b/testsuite/c_test/ast_test/AST0141-NoReturnStmt/HelloWorld.c new file mode 100644 index 0000000000..761b294530 --- /dev/null +++ b/testsuite/c_test/ast_test/AST0141-NoReturnStmt/HelloWorld.c @@ -0,0 +1,87 @@ +// CHECK: [[# FILENUM:]] "{{.*}}/HelloWorld.c" +#include + +typedef char CHAR; +typedef short SHORT; +typedef int INT; +typedef long LONG; +typedef float FLOAT; +typedef unsigned int UINT; +typedef double DOUBLE; +typedef signed char SCHAR; +typedef long double LDOUBLE; +struct XX { + CHAR c; + SCHAR sc; + SHORT s; + INT i; + unsigned char uc; + unsigned short us; + UINT ui; + LONG l; + unsigned long ul; + FLOAT f; + DOUBLE d; + LDOUBLE ld; +}; + +struct XX funcB() { + struct XX a; + // CHECK: LOC {{.*}} 32 5 + // CHECK-NEXT: iassign <* <$XX>> 0 (dread ptr %first_arg_return, dread agg %a_29_15) + return a; +} + +struct XX funcA() { + // CHECK: LOC {{.*}} 38 + // CHECK-NEXT: return () +} + +struct XX funcC(bool flag) { + int i = 1; + if (flag) { + struct XX a; + // CHECK: LOC {{.*}} 46 5 + // CHECK-NEXT: iassign <* <$XX>> 0 (dread ptr %first_arg_return, dread agg %a_43_15) + return a; + } else { + struct XX b; + // CHECK: LOC {{.*}} 51 5 + // CHECK-NEXT: iassign <* <$XX>> 0 (dread ptr %first_arg_return, dread agg %b_48_15) + return b; + } + if (i) { + struct XX c; + // CHECK: LOC {{.*}} 57 5 + // CHECK-NEXT: iassign <* <$XX>> 0 (dread ptr %first_arg_return, dread agg %c_54_15) + return c; + } + switch (i) { + case 0:{ + struct XX d; + // CHECK: @label1 LOC {{.*}} 64 7 + // CHECK-NEXT: iassign <* <$XX>> 0 (dread ptr %first_arg_return, dread agg %d_61_17) + return d; + } + } + while(i) { + struct XX e; + // CHECK: LOC {{.*}} 71 5 + // CHECK-NEXT: iassign <* <$XX>> 0 (dread ptr %first_arg_return, dread agg %e_68_15) + return e; + } + do + { + struct XX f; + // CHECK: LOC {{.*}} 78 5 + // CHECK-NEXT: iassign <* <$XX>> 0 (dread ptr %first_arg_return, dread agg %f_75_15) + return f; + } while(i); + // CHECK: LOC {{.*}} 82 + // CHECK-NEXT: return () +} + +int main() { + struct XX tmp = funcA(); + return 0; +} diff --git a/testsuite/c_test/ast_test/AST0141-NoReturnStmt/test.cfg b/testsuite/c_test/ast_test/AST0141-NoReturnStmt/test.cfg new file mode 100644 index 0000000000..80e564f577 --- /dev/null +++ b/testsuite/c_test/ast_test/AST0141-NoReturnStmt/test.cfg @@ -0,0 +1,3 @@ +ASTO0: +compile(HelloWorld) +cat HelloWorld.mpl | ${MAPLE_ROOT}/tools/bin/FileCheck HelloWorld.c \ No newline at end of file diff --git a/testsuite/c_test/ast_test/AST0142-TypeAlignSet/HelloWorld.c b/testsuite/c_test/ast_test/AST0142-TypeAlignSet/HelloWorld.c new file mode 100644 index 0000000000..b1f223c2a2 --- /dev/null +++ b/testsuite/c_test/ast_test/AST0142-TypeAlignSet/HelloWorld.c @@ -0,0 +1,18 @@ +// CHECK: [[# FILENUM:]] "{{.*}}/HelloWorld.c" + +#include +struct S1 { + uint32_t f0; +} __attribute__((aligned, warn_if_not_aligned(0))) +__attribute__((aligned(2), warn_if_not_aligned(0))); + +// CHECK: LOC {{.*}} 11 11 +// CHECK-NEXT: var $g_a <[7][5] <$S1>> used +struct S1 g_a[7][5]; +// CHECK: LOC {{.*}} 14 21 +// CHECK-NEXT: var $g_b <* <$S1>> volatile = addrof ptr $g_a (128) +struct S1 *volatile g_b = &g_a[6][2]; + +int main() { + return 0; +} diff --git a/testsuite/c_test/ast_test/AST0142-TypeAlignSet/test.cfg b/testsuite/c_test/ast_test/AST0142-TypeAlignSet/test.cfg new file mode 100644 index 0000000000..80e564f577 --- /dev/null +++ b/testsuite/c_test/ast_test/AST0142-TypeAlignSet/test.cfg @@ -0,0 +1,3 @@ +ASTO0: +compile(HelloWorld) +cat HelloWorld.mpl | ${MAPLE_ROOT}/tools/bin/FileCheck HelloWorld.c \ No newline at end of file diff --git a/testsuite/c_test/driver_test/DRIVER0033-fpie-uninit-global/test.cfg b/testsuite/c_test/driver_test/DRIVER0033-fpie-uninit-global/test.cfg index 63dacf8614..7b3a5560cf 100644 --- a/testsuite/c_test/driver_test/DRIVER0033-fpie-uninit-global/test.cfg +++ b/testsuite/c_test/driver_test/DRIVER0033-fpie-uninit-global/test.cfg @@ -1,2 +1,2 @@ -compile(APP=main.c,OPTION="-O2 -fpie -fPIC -Wl,--gc-sections -rdynamic -w -S") +compile(APP=main.c,OPTION="-O2 -fPIC -fpie -Wl,--gc-sections -rdynamic -w -S") cat main.s | ${MAPLE_ROOT}/tools/bin/FileCheck main.c \ No newline at end of file diff --git a/testsuite/c_test/driver_test/DRIVER0034-fnoplt_nofunc/expected.txt b/testsuite/c_test/driver_test/DRIVER0034-fnoplt_nofunc/expected.txt new file mode 100644 index 0000000000..e69de29bb2 diff --git a/testsuite/c_test/driver_test/DRIVER0034-fnoplt_nofunc/main.c b/testsuite/c_test/driver_test/DRIVER0034-fnoplt_nofunc/main.c new file mode 100644 index 0000000000..aafa6e71b5 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0034-fnoplt_nofunc/main.c @@ -0,0 +1,9 @@ +struct a { + char b; +} __attribute__((aligned(128))) c; + +struct a d() { + return c; +} + +int main() {} \ No newline at end of file diff --git a/testsuite/c_test/driver_test/DRIVER0034-fnoplt_nofunc/test.cfg b/testsuite/c_test/driver_test/DRIVER0034-fnoplt_nofunc/test.cfg new file mode 100644 index 0000000000..acd96c1518 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0034-fnoplt_nofunc/test.cfg @@ -0,0 +1,2 @@ +compile(APP=main.c,OPTION="-O0 -fno-plt") +run(a) \ No newline at end of file diff --git a/testsuite/c_test/driver_test/DRIVER0035-targetprop-fpie/expected.txt b/testsuite/c_test/driver_test/DRIVER0035-targetprop-fpie/expected.txt new file mode 100644 index 0000000000..e69de29bb2 diff --git a/testsuite/c_test/driver_test/DRIVER0035-targetprop-fpie/main.c b/testsuite/c_test/driver_test/DRIVER0035-targetprop-fpie/main.c new file mode 100644 index 0000000000..09cae66c92 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0035-targetprop-fpie/main.c @@ -0,0 +1,13 @@ +#include + +a = 208, b = 5; +c() { + int8_t *d = &b; + // CHECK: adrp {{x[0-9]}}, b + // CHECK: add {{x[0-9]}}, {{x[0-9]}}, :lo12:b + // CHECK-NEXT: ldr {{x[0-9]}}, [{{x[0-9]}}] + // CHECK: str {{x[0-9]}}, [{{x[0-9]}}] + uint64_t *e; + __atomic_compare_exchange_n(e, d, 0, 0, 0, 0); +} +main() {} \ No newline at end of file diff --git a/testsuite/c_test/driver_test/DRIVER0035-targetprop-fpie/test.cfg b/testsuite/c_test/driver_test/DRIVER0035-targetprop-fpie/test.cfg new file mode 100644 index 0000000000..7290b88e38 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0035-targetprop-fpie/test.cfg @@ -0,0 +1,3 @@ +compile(APP=main.c,OPTION="-O2 -fpie -w --save-temps") +cat main.s | ${MAPLE_ROOT}/tools/bin/FileCheck main.c +run(a) \ No newline at end of file diff --git a/testsuite/c_test/driver_test/DRIVER0036-fpiefpic-comb/expected.txt b/testsuite/c_test/driver_test/DRIVER0036-fpiefpic-comb/expected.txt new file mode 100644 index 0000000000..e69de29bb2 diff --git a/testsuite/c_test/driver_test/DRIVER0036-fpiefpic-comb/main.c b/testsuite/c_test/driver_test/DRIVER0036-fpiefpic-comb/main.c new file mode 100644 index 0000000000..a918ff7b91 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0036-fpiefpic-comb/main.c @@ -0,0 +1,12 @@ +#include + +a = 208, b = 5; +c() { + int8_t *d = &b; + // CHECK: adrp {{x[0-9]}}, :got:b + // CHECK: ldr {{x[0-9]}}, [{{x[0-9]}}, #:got_lo12:b] + // CHECK-NEXT: ldr {{x[0-9]}}, [{{x[0-9]}}] + uint64_t *e; + __atomic_compare_exchange_n(e, d, 0, 0, 0, 0); +} +main() {} \ No newline at end of file diff --git a/testsuite/c_test/driver_test/DRIVER0036-fpiefpic-comb/test.cfg b/testsuite/c_test/driver_test/DRIVER0036-fpiefpic-comb/test.cfg new file mode 100644 index 0000000000..e1dfeb60a2 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0036-fpiefpic-comb/test.cfg @@ -0,0 +1,3 @@ +compile(APP=main.c,OPTION="-O2 -fpie -fpic -w --save-temps") +cat main.s | ${MAPLE_ROOT}/tools/bin/FileCheck main.c +run(a) \ No newline at end of file diff --git a/testsuite/c_test/driver_test/DRIVER0037-strldr-fpie/expected.txt b/testsuite/c_test/driver_test/DRIVER0037-strldr-fpie/expected.txt new file mode 100644 index 0000000000..e69de29bb2 diff --git a/testsuite/c_test/driver_test/DRIVER0037-strldr-fpie/main.c b/testsuite/c_test/driver_test/DRIVER0037-strldr-fpie/main.c new file mode 100644 index 0000000000..af8941a81a --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0037-strldr-fpie/main.c @@ -0,0 +1,15 @@ +#include + +a = 3, b = 2; +c() { + uint64_t d; + uint64_t *e; + // CHECK: adrp {{x[0-9]}}, b + // CHECK: add {{x[0-9]}}, {{x[0-9]}}, :lo12:b + // CHECK-NEXT: ldr {{x[0-9]}}, [{{x[0-9]}}] + int32_t *f = &b; + __atomic_compare_exchange_n(e, f, 0, a, d, 0); + uint64_t *g; + f + *g &&c; +} +main() {} \ No newline at end of file diff --git a/testsuite/c_test/driver_test/DRIVER0037-strldr-fpie/test.cfg b/testsuite/c_test/driver_test/DRIVER0037-strldr-fpie/test.cfg new file mode 100644 index 0000000000..7290b88e38 --- /dev/null +++ b/testsuite/c_test/driver_test/DRIVER0037-strldr-fpie/test.cfg @@ -0,0 +1,3 @@ +compile(APP=main.c,OPTION="-O2 -fpie -w --save-temps") +cat main.s | ${MAPLE_ROOT}/tools/bin/FileCheck main.c +run(a) \ No newline at end of file diff --git a/testsuite/c_test/enhancec_test/ENC0001-nonnull_check_insert/test.cfg b/testsuite/c_test/enhancec_test/ENC0001-nonnull_check_insert/test.cfg index 7cef793034..4d3e34eb67 100644 --- a/testsuite/c_test/enhancec_test/ENC0001-nonnull_check_insert/test.cfg +++ b/testsuite/c_test/enhancec_test/ENC0001-nonnull_check_insert/test.cfg @@ -3,14 +3,14 @@ compile(nonnull_check_insert) run(nonnull_check_insert) cat nonnull_check_insert.mpl | ${MAPLE_ROOT}/tools/bin/FileCheck nonnull_check_insert.c python3 ${TEST_BIN}/check.py --check=num --n=1 --str="assertnonnull" --result=nonnull_check_insert.me.mpl -python3 ${TEST_BIN}/check.py --check=num --n=3 --str="Dereference of nullable pointer" --result=compile.log +python3 ${TEST_BIN}/check.py --check=num --n=1 --str="Dereference of nullable pointer" --result=compile.log python3 ${TEST_BIN}/check.py --check=num --n=1 --str="nullable pointer assignment of nonnull pointer" --result=compile.log ENCO2_N_D_ALL: compile(nonnull_check_insert) run(nonnull_check_insert) cat nonnull_check_insert.mpl | ${MAPLE_ROOT}/tools/bin/FileCheck nonnull_check_insert.c -python3 ${TEST_BIN}/check.py --check=num --n=4 --str="assertnonnull" --result=nonnull_check_insert.me.mpl -python3 ${TEST_BIN}/check.py --check=num --n=3 --str="Dereference of nullable pointer" --result=compile.log +python3 ${TEST_BIN}/check.py --check=num --n=2 --str="assertnonnull" --result=nonnull_check_insert.me.mpl +python3 ${TEST_BIN}/check.py --check=num --n=1 --str="Dereference of nullable pointer" --result=compile.log python3 ${TEST_BIN}/check.py --check=num --n=1 --str="nullable pointer assignment of nonnull pointer" --result=compile.log ENCO2_B_D: compile(nonnull_check_insert) diff --git a/testsuite/c_test/enhancec_test/ENC0086-boundary_bytecount_funcptr/boundary_check_funcptr.c b/testsuite/c_test/enhancec_test/ENC0086-boundary_bytecount_funcptr/boundary_check_funcptr.c index 905aaeac4c..a0780181b0 100644 --- a/testsuite/c_test/enhancec_test/ENC0086-boundary_bytecount_funcptr/boundary_check_funcptr.c +++ b/testsuite/c_test/enhancec_test/ENC0086-boundary_bytecount_funcptr/boundary_check_funcptr.c @@ -24,6 +24,57 @@ int* (*func4)(int*, int*, int*) __attribute__((byte_count(10,1,3))); int* (*func5)(int*, int*, int*) __attribute__((byte_count(10,1), returns_byte_count(10))); int* (*func6)(int*, int*, int*) __attribute__((byte_count(10,1,3), returns_byte_count(5))); int* (*func7)(int*, int*, int*) __attribute__((count(10,1,3), returns_count(10))); + +/* check funcPtr has index and no index attribute at the same time */ +int* (*func8)(int*, int*, int) __attribute__((count_index(3,1,2), returns_count(10))); +int* (*func9)(int*, int*, int) __attribute__((byte_count_index(3,1,2), returns_count(10))); +int* (*func10)(int*, int*, int) __attribute__((count_index(3,1,2), returns_byte_count(10))); +int* (*func11)(int*, int*, int) __attribute__((byte_count_index(3,1,2), returns_byte_count(10))); +int* (*func12)(int*, int*, int) __attribute__((count(3,1,2), returns_count_index(3))); +int* (*func13)(int*, int*, int) __attribute__((byte_count(3,1,2), returns_count_index(3))); +int* (*func14)(int*, int*, int) __attribute__((count(3,1,2), returns_byte_count_index(3))); +int* (*func15)(int*, int*, int) __attribute__((byte_count(3,1,2), returns_byte_count_index(3))); + +__attribute__((count_index(3,1,2), returns_count(10))) +int *Test8(int* p, int *q, int w) { + return p; +} + +__attribute__((byte_count_index(3,1,2), returns_count(10))) +int *Test9(int* p, int *q, int w) { + return p; +} + +__attribute__((count_index(3,1,2), returns_byte_count(10))) +int *Test10(int* p, int *q, int w) { + return p; +} + +__attribute__((byte_count_index(3,1,2), returns_byte_count(10))) +int *Test11(int* p, int *q, int w) { + return p; +} + +__attribute__((count(3,1,2), returns_count_index(3))) +int *Test12(int* p, int *q, int w) { + return p; +} + +__attribute__((byte_count(3,1,2), returns_count_index(3))) +int *Test13(int* p, int *q, int w) { + return p; +} + +__attribute__((count(3,1,2), returns_byte_count_index(3))) +int *Test14(int* p, int *q, int w) { + return p; +} + +__attribute__((byte_count(3,1,2), returns_byte_count_index(3))) +int *Test15(int* p, int *q, int w) { + return p; +} + int * vc __attribute__((returns_byte_count(10))); struct AA { @@ -88,7 +139,17 @@ int Test() { func1 = func6; // CHECK: [[# @LINE ]] error: func1 = func7; // CHECK: [[# @LINE ]] error: - struct AA a; + /* check funcPtr has index and no index attribute at the same time */ + func8 = &Test8; // CHECK-NOT: [[# @LINE ]] error: + func9 = &Test9; // CHECK-NOT: [[# @LINE ]] error: + func10 = &Test10; // CHECK-NOT: [[# @LINE ]] error: + func11 = &Test11; // CHECK-NOT: [[# @LINE ]] error: + func12 = &Test12; // CHECK-NOT: [[# @LINE ]] error: + func13 = &Test13; // CHECK-NOT: [[# @LINE ]] error: + func14 = &Test14; // CHECK-NOT: [[# @LINE ]] error: + func15 = &Test15; // CHECK-NOT: [[# @LINE ]] error: + + struct AA a; a.func1 = &Test1; // CHECK-NOT: [[# @LINE ]] error: a.func1 = &Test2; // CHECK: [[# @LINE ]] error: a.func1 = &Test3; // CHECK: [[# @LINE ]] error: diff --git a/testsuite/c_test/enhancec_test/ENC0152-boundary-check-for-func-return/main.c b/testsuite/c_test/enhancec_test/ENC0152-boundary-check-for-func-return/main.c new file mode 100644 index 0000000000..04a560e7d1 --- /dev/null +++ b/testsuite/c_test/enhancec_test/ENC0152-boundary-check-for-func-return/main.c @@ -0,0 +1,118 @@ +// CHECK: [[# FILENUM:]] "{{.*}}/main.c" + +int q[10] = {0}; +// CHECK: dassign %_boundary.return.size 0 (dread i32 %m) +__attribute__((returns_byte_count_index(2))) +int *func2(int n, int m) { + if (n == 0) { + // CHECK: LOC [[# FILENUM]] 12 + // CHECK-NEXT: returnassertle <&func2> ( + // CHECK-NEXT: add ptr (addrof ptr $q, dread i32 %_boundary.return.size), + // CHECK-NEXT: add ptr (addrof ptr $q, constval ptr 40)) + return q; + } else { + if (n == 1) { + // CHECK: LOC [[# FILENUM]] 19 + // CHECK-NEXT: returnassertle <&func2> ( + // CHECK-NEXT: add ptr (addrof ptr $q, dread i32 %_boundary.return.size), + // CHECK-NEXT: add ptr (addrof ptr $q, constval ptr 40)) + return q; + } else { + // CHECK: LOC [[# FILENUM]] 25 + // CHECK-NEXT: returnassertle <&func2> ( + // CHECK-NEXT: add ptr (addrof ptr $q, dread i32 %_boundary.return.size), + // CHECK-NEXT: add ptr (addrof ptr $q, constval ptr 40)) + return q; + } + } + for (int i = 0; i < n; i++) { + // CHECK: LOC [[# FILENUM]] 33 + // CHECK-NEXT: returnassertle <&func2> ( + // CHECK-NEXT: add ptr (addrof ptr $q, dread i32 %_boundary.return.size), + // CHECK-NEXT: add ptr (addrof ptr $q, constval ptr 40)) + return q; + } + switch(n) { + case 1:{ + if (n == 2) { + // CHECK: LOC [[# FILENUM]] 42 + // CHECK-NEXT: returnassertle <&func2> ( + // CHECK-NEXT: add ptr (addrof ptr $q, dread i32 %_boundary.return.size), + // CHECK-NEXT: add ptr (addrof ptr $q, constval ptr 40)) + return q; + } + // CHECK: LOC [[# FILENUM]] 48 + // CHECK-NEXT: returnassertle <&func2> ( + // CHECK-NEXT: add ptr (addrof ptr $q, dread i32 %_boundary.return.size), + // CHECK-NEXT: add ptr (addrof ptr $q, constval ptr 40)) + return q; + break; + } + default: + // CHECK: LOC [[# FILENUM]] 56 + // CHECK-NEXT: returnassertle <&func2> ( + // CHECK-NEXT: add ptr (addrof ptr $q, dread i32 %_boundary.return.size), + // CHECK-NEXT: add ptr (addrof ptr $q, constval ptr 40)) + return q; + } + while (n) { + for (;;) { + if (n == 1) { + // CHECK: LOC [[# FILENUM]] 65 + // CHECK-NEXT: returnassertle <&func2> ( + // CHECK-NEXT: add ptr (addrof ptr $q, dread i32 %_boundary.return.size), + // CHECK-NEXT: add ptr (addrof ptr $q, constval ptr 40)) + return q; + } + // CHECK: LOC [[# FILENUM]] 71 + // CHECK-NEXT: returnassertle <&func2> ( + // CHECK-NEXT: add ptr (addrof ptr $q, dread i32 %_boundary.return.size), + // CHECK-NEXT: add ptr (addrof ptr $q, constval ptr 40)) + return q; + } + // CHECK: LOC [[# FILENUM]] 77 + // CHECK-NEXT: returnassertle <&func2> ( + // CHECK-NEXT: add ptr (addrof ptr $q, dread i32 %_boundary.return.size), + // CHECK-NEXT: add ptr (addrof ptr $q, constval ptr 40)) + return q; + } + do { + switch(n) { + case 1:{ + if (n == 2) { + // CHECK: LOC [[# FILENUM]] 87 + // CHECK-NEXT: returnassertle <&func2> ( + // CHECK-NEXT: add ptr (addrof ptr $q, dread i32 %_boundary.return.size), + // CHECK-NEXT: add ptr (addrof ptr $q, constval ptr 40)) + return q; + } + // CHECK: LOC [[# FILENUM]] 93 + // CHECK-NEXT: returnassertle <&func2> ( + // CHECK-NEXT: add ptr (addrof ptr $q, dread i32 %_boundary.return.size), + // CHECK-NEXT: add ptr (addrof ptr $q, constval ptr 40)) + return q; + break; + } + default: + // CHECK: LOC [[# FILENUM]] 101 + // CHECK-NEXT: returnassertle <&func2> ( + // CHECK-NEXT: add ptr (addrof ptr $q, dread i32 %_boundary.return.size), + // CHECK-NEXT: add ptr (addrof ptr $q, constval ptr 40)) + return q; + } + // CHECK: LOC [[# FILENUM]] 107 + // CHECK-NEXT: returnassertle <&func2> ( + // CHECK-NEXT: add ptr (addrof ptr $q, dread i32 %_boundary.return.size), + // CHECK-NEXT: add ptr (addrof ptr $q, constval ptr 40)) + return q; + } while(n); + // CHECK: LOC [[# FILENUM]] 113 + // CHECK-NEXT: returnassertle <&func2> ( + // CHECK-NEXT: add ptr (addrof ptr $q, dread i32 %_boundary.return.size), + // CHECK-NEXT: add ptr (addrof ptr $q, constval ptr 40)) + return q; +} + +int main() { + return 0; +} diff --git a/testsuite/c_test/enhancec_test/ENC0152-boundary-check-for-func-return/test.cfg b/testsuite/c_test/enhancec_test/ENC0152-boundary-check-for-func-return/test.cfg new file mode 100644 index 0000000000..90d29ba668 --- /dev/null +++ b/testsuite/c_test/enhancec_test/ENC0152-boundary-check-for-func-return/test.cfg @@ -0,0 +1,3 @@ +ENCO2_B_D: +compile(main) +cat main.mpl | ${MAPLE_ROOT}/tools/bin/FileCheck main.c diff --git a/testsuite/c_test/enhancec_test/ENC0152-flexibleArray_check_warn/flexibleArray.c b/testsuite/c_test/enhancec_test/ENC0152-flexibleArray_check_warn/flexibleArray.c new file mode 100644 index 0000000000..56735c85d2 --- /dev/null +++ b/testsuite/c_test/enhancec_test/ENC0152-flexibleArray_check_warn/flexibleArray.c @@ -0,0 +1,227 @@ +/* + * Copyright (c) [2023-2023] Huawei Technologies Co.,Ltd.All rights reserved. + * + * OpenArkCompiler is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * + * http://license.coscl.org.cn/MulanPSL2 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ +#include +struct A { + int len; + int fa[] __attribute__((count("len"))); +}; + +__attribute__((returns_byte_count_index(1))) +int *func(int size, int *p __attribute__((count(10)))) { + struct A a; + return a.fa; +} + +int* (*func1)(int*, int*) __attribute__((byte_count(10, 1))); + +int *Test(int *p __attribute__((byte_count(10))), int *q) { + return p; +} +int n; +void addrof_check_fa_index_warning() { + struct A a; + a.len = 10; + // CHECK: [[# @LINE + 2]] warning: can't prove the pointer >= the lower bounds when accessing the memory + // CHECK: [[# @LINE + 1]] warning: can't prove the pointer < the upper bounds when accessing the memory + a.fa[n] = 1; +} + +void iaddrof_check_fa_index_warning() { + struct A *a = (struct A *)malloc(sizeof(struct A) + 10); + a->len = 10; + // CHECK: [[# @LINE + 2]] warning: can't prove the pointer >= the lower bounds when accessing the memory + // CHECK: [[# @LINE + 1]] warning: can't prove the pointer < the upper bounds when accessing the memory + a->fa[n] = 1; +} + +static inline void addrof_check_fa_index_warning_inline() { + struct A a; + a.len = 10; + // CHECK: [[# @LINE + 2]] warning: can't prove the pointer >= the lower bounds when accessing the memory and inlined to main + // CHECK: [[# @LINE + 1]] warning: can't prove the pointer < the upper bounds when accessing the memory and inlined to main + a.fa[n] = 1; +} + +static inline void iaddrof_check_fa_index_warning_inline() { + struct A *a = (struct A *)malloc(sizeof(struct A) + 10); + a->len = 10; + // CHECK: [[# @LINE + 2]] warning: can't prove the pointer >= the lower bounds when accessing the memory and inlined to main + // CHECK: [[# @LINE + 1]] warning: can't prove the pointer < the upper bounds when accessing the memory and inlined to main + a->fa[n] = 1; +} + +int *addrof_check_call_func_warning() { + struct A a; + // CHECK: [[# @LINE + 1]] warning: can't prove pointer's bounds match the function func declaration for the 2nd argument + int *p = func(1, a.fa); + a.len = 10; + // CHECK-NOT: [[# @LINE + 1]] warning: can't prove pointer's bounds match the function func declaration for the 2nd argument + p = func(1, a.fa); + return p; +} + +int *iaddrof_check_call_func_warning() { + struct A *a = (struct A *)malloc(sizeof(struct A) + 10); + // CHECK: [[# @LINE + 1]] warning: can't prove pointer's bounds match the function func declaration for the 2nd argument + int *p = func(1, a->fa); + a->len = 10; + // CHECK-NOT: [[# @LINE + 1]] warning: can't prove pointer's bounds match the function func declaration for the 2nd argument + p = func(1, a->fa); + return p; +} + +static inline int *addrof_check_call_func_warning_inline() { + struct A a; + // CHECK: [[# @LINE + 1]] warning: can't prove pointer's bounds match the function func declaration for the 2nd argument when inlined to main + int *p = func(1, a.fa); + return p; +} + +static inline int *iaddrof_check_call_func_warning_inline() { + struct A *a = (struct A *)malloc(sizeof(struct A) + 10); + // CHECK: [[# @LINE + 1]] warning: can't prove pointer's bounds match the function func declaration for the 2nd argument when inlined to main + int *p = func(1, a->fa); + return p; +} + +__attribute__((returns_byte_count_index(1))) +int *addrof_check_return_warning(int size) { + struct A a; + // CHECK: [[# @LINE + 1]] warning: can't prove return value's bounds match the function declaration for addrof_check_return_warning + return a.fa; +} + +__attribute__((returns_byte_count_index(1))) +int *iaddrof_check_return_warning(int size) { + struct A *a = (struct A *)malloc(sizeof(struct A) + 10); + // CHECK: [[# @LINE + 1]] warning: can't prove return value's bounds match the function declaration for iaddrof_check_return_warning + return a->fa; +} + +__attribute__((returns_byte_count_index(1))) +static inline int *addrof_check_return_warning_inline(int size) { + struct A a; + // CHECK: [[# @LINE + 1]] warning: can't prove return value's bounds match the function declaration for addrof_check_return_warning_inline when inlined to main + return a.fa; +} + +__attribute__((returns_byte_count_index(1))) +static inline int *iaddrof_check_return_warning_inline(int size) { + struct A *a = (struct A *)malloc(sizeof(struct A) + 10); + // CHECK: [[# @LINE + 1]] warning: can't prove return value's bounds match the function declaration for iaddrof_check_return_warning_inline when inlined to main + return a->fa; +} + +int *addof_check_calcu_warning() { + struct A a; + // CHECK: [[# @LINE + 1]] warning: can't prove the pointer < the upper bounds after calculation + int *p = a.fa + 1; + return p; +} + +int *iaddof_check_calcu_warning() { + struct A *a = (struct A *)malloc(sizeof(struct A) + 10); + // CHECK: [[# @LINE + 1]] warning: can't prove the pointer < the upper bounds after calculation + int *p = a->fa + 1; + return p; +} + +static inline int *addof_check_calcu_warning_inline() { + struct A a; + // CHECK: [[# @LINE + 1]] warning: can't prove the pointer < the upper bounds after calculation when inlined to main + int *p = a.fa + 1; + return p; +} + +static inline int *iaddof_check_calcu_warning_inline() { + struct A *a = (struct A *)malloc(sizeof(struct A) + 10); + // CHECK: [[# @LINE + 1]] warning: can't prove the pointer < the upper bounds after calculation when inlined to main + int *p = a->fa + 1; + return p; +} + +void addof_check_assign_warning() { + struct A a; + int *t __attribute__((count((10)))); + // CHECK: [[# @LINE + 1]] warning: can't prove l-value's upper bounds <= r-value's upper bounds + t = a.fa; +} + +void iaddof_check_assign_warning() { + struct A *a = (struct A *)malloc(sizeof(struct A) + 10); + int *t __attribute__((count((10)))); + // CHECK: [[# @LINE + 1]] warning: can't prove l-value's upper bounds <= r-value's upper bounds + t = a->fa; +} + +static inline void addof_check_assign_warning_inline() { + struct A a; + int *t __attribute__((count((10)))); + // CHECK: [[# @LINE + 1]] warning: can't prove l-value's upper bounds <= r-value's upper bounds when inlined to main + t = a.fa; +} + +static inline void iaddof_check_assign_warning_inline() { + struct A *a = (struct A *)malloc(sizeof(struct A) + 10); + int *t __attribute__((count((10)))); + // CHECK: [[# @LINE + 1]] warning: can't prove l-value's upper bounds <= r-value's upper bounds when inlined to main + t = a->fa; +} + +void addof_check_funcPtr_warning() { + struct A a; + func1 = &Test; + // CHECK: [[# @LINE + 1]] warning: can't prove pointer's bounds match the function function_pointer declaration for the 1st argument + (void)(*func1)(a.fa, a.fa); +} + +void iaddof_check_funcPtr_warning() { + struct A *a = (struct A *)malloc(sizeof(struct A) + 10); + func1 = &Test; + // CHECK: [[# @LINE + 1]] warning: can't prove pointer's bounds match the function function_pointer declaration for the 1st argument + (void)(*func1)(a->fa, a->fa); +} + +static inline void addof_check_funcPtr_warning_inline() { + struct A a; + func1 = &Test; + // CHECK: [[# @LINE + 1]] warning: can't prove pointer's bounds match the function function_pointer declaration for the 1st argument when inlined to main + (void)(*func1)(a.fa, a.fa); +} + +static inline void iaddof_check_funcPtr_warning_inline() { + struct A *a = (struct A *)malloc(sizeof(struct A) + 10); + func1 = &Test; + // CHECK: [[# @LINE + 1]] warning: can't prove pointer's bounds match the function function_pointer declaration for the 1st argument when inlined to main + (void)(*func1)(a->fa, a->fa); +} + +int main() { + int n = 5; + addrof_check_fa_index_warning_inline(); + iaddrof_check_fa_index_warning_inline(); + (void)addrof_check_call_func_warning_inline(); + (void)iaddrof_check_call_func_warning_inline(); + (void)addrof_check_return_warning_inline(n); + (void)iaddrof_check_return_warning_inline(n); + (void)addof_check_calcu_warning_inline(); + (void)iaddof_check_calcu_warning_inline(); + addof_check_assign_warning_inline(); + iaddof_check_assign_warning_inline(); + addof_check_funcPtr_warning_inline(); + iaddof_check_funcPtr_warning_inline(); + + return 0; +} diff --git a/testsuite/c_test/enhancec_test/ENC0152-flexibleArray_check_warn/test.cfg b/testsuite/c_test/enhancec_test/ENC0152-flexibleArray_check_warn/test.cfg new file mode 100644 index 0000000000..a65b289962 --- /dev/null +++ b/testsuite/c_test/enhancec_test/ENC0152-flexibleArray_check_warn/test.cfg @@ -0,0 +1,5 @@ +ENCO2_B_D: +compile(flexibleArray) +sort compile.log -t ':' -k 3 -n -o compile.log +cat compile.log | ${MAPLE_ROOT}/tools/bin/FileCheck flexibleArray.c + diff --git a/testsuite/c_test/enhancec_test/ENC0153-flexibleArray_check_index_err/flexibleArrayAddrof.c b/testsuite/c_test/enhancec_test/ENC0153-flexibleArray_check_index_err/flexibleArrayAddrof.c new file mode 100644 index 0000000000..d515fe097a --- /dev/null +++ b/testsuite/c_test/enhancec_test/ENC0153-flexibleArray_check_index_err/flexibleArrayAddrof.c @@ -0,0 +1,30 @@ +/* + * Copyright (c) [2023-2023] Huawei Technologies Co.,Ltd.All rights reserved. + * + * OpenArkCompiler is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * + * http://license.coscl.org.cn/MulanPSL2 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ +#include +struct A { + int len; + int fa[] __attribute__((count("len"))); +}; + +void addrof_check_fa_index_err() { + struct A a; + a.len = 10; + // CHECK: [[# @LINE + 1]] error: the pointer >= the upper bounds when accessing the memory + a.fa[12] = 1; +} + +int main() { + return 0; +} diff --git a/testsuite/c_test/enhancec_test/ENC0153-flexibleArray_check_index_err/flexibleArrayIaddrof.c b/testsuite/c_test/enhancec_test/ENC0153-flexibleArray_check_index_err/flexibleArrayIaddrof.c new file mode 100644 index 0000000000..d43f2017bd --- /dev/null +++ b/testsuite/c_test/enhancec_test/ENC0153-flexibleArray_check_index_err/flexibleArrayIaddrof.c @@ -0,0 +1,43 @@ +/* + * Copyright (c) [2023-2023] Huawei Technologies Co.,Ltd.All rights reserved. + * + * OpenArkCompiler is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * + * http://license.coscl.org.cn/MulanPSL2 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ +#include +struct A { + int len; + int fa[] __attribute__((count("len"))); +}; + +struct B { + int len; + int fa[]; +}; + +void iaddrof_check_fa_index_err() { + struct A *a = (struct A*)malloc(sizeof(struct A) + 10); + a->len = 10; + // CHECK: [[# @LINE + 1]] error: the pointer >= the upper bounds when accessing the memory + a->fa[12] = 1; + // CHECK-NOT: [[# @LINE + 1]] error: the pointer >= the upper bounds when accessing the memory + a->fa[9] = 1; + + struct B *b = (struct B*)malloc(sizeof(struct B) + 10 * sizeof(int)); + // CHECK-NOT: [[# @LINE + 1]] error: the pointer >= the upper bounds when accessing the memory + b->fa[8] = 1; + // CHECK-NOT: [[# @LINE + 1]] error: the pointer >= the upper bounds when accessing the memory + b->fa[11] = 2; +} + +int main() { + return 0; +} diff --git a/testsuite/c_test/enhancec_test/ENC0153-flexibleArray_check_index_err/test.cfg b/testsuite/c_test/enhancec_test/ENC0153-flexibleArray_check_index_err/test.cfg new file mode 100644 index 0000000000..faeca778b7 --- /dev/null +++ b/testsuite/c_test/enhancec_test/ENC0153-flexibleArray_check_index_err/test.cfg @@ -0,0 +1,8 @@ +ENCO2_B_D: +compile_err(flexibleArrayAddrof) +compile_err(flexibleArrayIaddrof) +sort compile.log -t ':' -k 3 -n -o compile.log +cat compile.log | ${MAPLE_ROOT}/tools/bin/FileCheck flexibleArrayAddrof.c +cat compile.log | ${MAPLE_ROOT}/tools/bin/FileCheck flexibleArrayIaddrof.c + + diff --git a/testsuite/c_test/enhancec_test/ENC0154-flexibleArray_check_index_err_inline/flexibleArrayAddrof.c b/testsuite/c_test/enhancec_test/ENC0154-flexibleArray_check_index_err_inline/flexibleArrayAddrof.c new file mode 100644 index 0000000000..feb2a8534c --- /dev/null +++ b/testsuite/c_test/enhancec_test/ENC0154-flexibleArray_check_index_err_inline/flexibleArrayAddrof.c @@ -0,0 +1,31 @@ +/* + * Copyright (c) [2023-2023] Huawei Technologies Co.,Ltd.All rights reserved. + * + * OpenArkCompiler is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * + * http://license.coscl.org.cn/MulanPSL2 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ +#include +struct A { + int len; + int fa[] __attribute__((count("len"))); +}; + +static inline void addrof_check_fa_index_err_inline(int n) { + struct A a; + a.len = 10; + // CHECK: [[# @LINE + 1]] error: the pointer >= the upper bounds when accessing the memory and inlined to main + a.fa[n] = 1; +} + +int main() { + addrof_check_fa_index_err_inline(12); + return 0; +} diff --git a/testsuite/c_test/enhancec_test/ENC0154-flexibleArray_check_index_err_inline/flexibleArrayIaddrof.c b/testsuite/c_test/enhancec_test/ENC0154-flexibleArray_check_index_err_inline/flexibleArrayIaddrof.c new file mode 100644 index 0000000000..1169fbdbf5 --- /dev/null +++ b/testsuite/c_test/enhancec_test/ENC0154-flexibleArray_check_index_err_inline/flexibleArrayIaddrof.c @@ -0,0 +1,31 @@ +/* + * Copyright (c) [2023-2023] Huawei Technologies Co.,Ltd.All rights reserved. + * + * OpenArkCompiler is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * + * http://license.coscl.org.cn/MulanPSL2 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ +#include +struct A { + int len; + int fa[] __attribute__((count("len"))); +}; + +static inline void iaddrof_check_fa_index_err_inline(int n) { + struct A *a = (struct A*)malloc(sizeof(struct A) + 10); + a->len = 10; + // CHECK: [[# @LINE + 1]] error: the pointer >= the upper bounds when accessing the memory and inlined to main + a->fa[n] = 1; +} + +int main() { + iaddrof_check_fa_index_err_inline(12); + return 0; +} diff --git a/testsuite/c_test/enhancec_test/ENC0154-flexibleArray_check_index_err_inline/test.cfg b/testsuite/c_test/enhancec_test/ENC0154-flexibleArray_check_index_err_inline/test.cfg new file mode 100644 index 0000000000..30f1590de0 --- /dev/null +++ b/testsuite/c_test/enhancec_test/ENC0154-flexibleArray_check_index_err_inline/test.cfg @@ -0,0 +1,6 @@ +ENCO2_B_D: +compile_err(flexibleArrayAddrof) +compile_err(flexibleArrayIaddrof) +sort compile.log -t ':' -k 3 -n -o compile.log +cat compile.log | ${MAPLE_ROOT}/tools/bin/FileCheck flexibleArrayAddrof.c +cat compile.log | ${MAPLE_ROOT}/tools/bin/FileCheck flexibleArrayIaddrof.c diff --git a/testsuite/c_test/enhancec_test/ENC0155-flexibleArray_check_call_err/flexibleArrayAddrof.c b/testsuite/c_test/enhancec_test/ENC0155-flexibleArray_check_call_err/flexibleArrayAddrof.c new file mode 100644 index 0000000000..192ada7357 --- /dev/null +++ b/testsuite/c_test/enhancec_test/ENC0155-flexibleArray_check_call_err/flexibleArrayAddrof.c @@ -0,0 +1,33 @@ +/* + * Copyright (c) [2023-2023] Huawei Technologies Co.,Ltd.All rights reserved. + * + * OpenArkCompiler is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * + * http://license.coscl.org.cn/MulanPSL2 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ +#include +struct A { + int len; + int fa[] __attribute__((count("len"))); +}; + +void func(int size, int *p __attribute__((count(10)))) { +} + +void addrof_check_call_func_err() { + struct A a; + a.len = 9; + // CHECK: [[# @LINE + 1]] error: the pointer's bounds does not match the function func declaration for the 2nd argument + func(1, a.fa); +} + +int main() { + return 0; +} diff --git a/testsuite/c_test/enhancec_test/ENC0155-flexibleArray_check_call_err/flexibleArrayIaddrof.c b/testsuite/c_test/enhancec_test/ENC0155-flexibleArray_check_call_err/flexibleArrayIaddrof.c new file mode 100644 index 0000000000..157b7325cd --- /dev/null +++ b/testsuite/c_test/enhancec_test/ENC0155-flexibleArray_check_call_err/flexibleArrayIaddrof.c @@ -0,0 +1,33 @@ +/* + * Copyright (c) [2023-2023] Huawei Technologies Co.,Ltd.All rights reserved. + * + * OpenArkCompiler is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * + * http://license.coscl.org.cn/MulanPSL2 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ +#include +struct A { + int len; + int fa[] __attribute__((count("len"))); +}; + +void func(int size, int *p __attribute__((count(10)))) { +} + +void iaddrof_check_call_func_err() { + struct A *a = (struct A*)malloc(sizeof(struct A) + 10); + a->len = 9; + // CHECK: [[# @LINE + 1]] error: the pointer's bounds does not match the function func declaration for the 2nd argument + func(1, a->fa); +} + +int main() { + return 0; +} diff --git a/testsuite/c_test/enhancec_test/ENC0155-flexibleArray_check_call_err/test.cfg b/testsuite/c_test/enhancec_test/ENC0155-flexibleArray_check_call_err/test.cfg new file mode 100644 index 0000000000..30f1590de0 --- /dev/null +++ b/testsuite/c_test/enhancec_test/ENC0155-flexibleArray_check_call_err/test.cfg @@ -0,0 +1,6 @@ +ENCO2_B_D: +compile_err(flexibleArrayAddrof) +compile_err(flexibleArrayIaddrof) +sort compile.log -t ':' -k 3 -n -o compile.log +cat compile.log | ${MAPLE_ROOT}/tools/bin/FileCheck flexibleArrayAddrof.c +cat compile.log | ${MAPLE_ROOT}/tools/bin/FileCheck flexibleArrayIaddrof.c diff --git a/testsuite/c_test/enhancec_test/ENC0156-flexibleArray_check_call_err_inline/flexibleArrayAddrof.c b/testsuite/c_test/enhancec_test/ENC0156-flexibleArray_check_call_err_inline/flexibleArrayAddrof.c new file mode 100644 index 0000000000..08f5bbf899 --- /dev/null +++ b/testsuite/c_test/enhancec_test/ENC0156-flexibleArray_check_call_err_inline/flexibleArrayAddrof.c @@ -0,0 +1,34 @@ +/* + * Copyright (c) [2023-2023] Huawei Technologies Co.,Ltd.All rights reserved. + * + * OpenArkCompiler is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * + * http://license.coscl.org.cn/MulanPSL2 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ +#include +struct A { + int len; + int fa[] __attribute__((count("len"))); +}; + +void func(int size, int *p __attribute__((count(10)))) { +} + +static inline void addrof_check_call_func_err() { + struct A a; + a.len = 9; + // CHECK: [[# @LINE + 1]] error: the pointer's bounds does not match the function func declaration for the 2nd argument when inlined to main + func(1, a.fa); +} + +int main() { + addrof_check_call_func_err(); + return 0; +} diff --git a/testsuite/c_test/enhancec_test/ENC0156-flexibleArray_check_call_err_inline/flexibleArrayIaddrof.c b/testsuite/c_test/enhancec_test/ENC0156-flexibleArray_check_call_err_inline/flexibleArrayIaddrof.c new file mode 100644 index 0000000000..30fa62a067 --- /dev/null +++ b/testsuite/c_test/enhancec_test/ENC0156-flexibleArray_check_call_err_inline/flexibleArrayIaddrof.c @@ -0,0 +1,34 @@ +/* + * Copyright (c) [2023-2023] Huawei Technologies Co.,Ltd.All rights reserved. + * + * OpenArkCompiler is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * + * http://license.coscl.org.cn/MulanPSL2 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ +#include +struct A { + int len; + int fa[] __attribute__((count("len"))); +}; + +void func(int size, int *p __attribute__((count(10)))) { +} + +static inline void iaddrof_check_call_func_err() { + struct A *a = (struct A*)malloc(sizeof(struct A) + 10); + a->len = 9; + // CHECK: [[# @LINE + 1]] error: the pointer's bounds does not match the function func declaration for the 2nd argument when inlined to main + func(1, a->fa); +} + +int main() { + iaddrof_check_call_func_err(); + return 0; +} diff --git a/testsuite/c_test/enhancec_test/ENC0156-flexibleArray_check_call_err_inline/test.cfg b/testsuite/c_test/enhancec_test/ENC0156-flexibleArray_check_call_err_inline/test.cfg new file mode 100644 index 0000000000..30f1590de0 --- /dev/null +++ b/testsuite/c_test/enhancec_test/ENC0156-flexibleArray_check_call_err_inline/test.cfg @@ -0,0 +1,6 @@ +ENCO2_B_D: +compile_err(flexibleArrayAddrof) +compile_err(flexibleArrayIaddrof) +sort compile.log -t ':' -k 3 -n -o compile.log +cat compile.log | ${MAPLE_ROOT}/tools/bin/FileCheck flexibleArrayAddrof.c +cat compile.log | ${MAPLE_ROOT}/tools/bin/FileCheck flexibleArrayIaddrof.c diff --git a/testsuite/c_test/enhancec_test/ENC0157-flexibleArray_check_return_err/flexibleArrayAddrof.c b/testsuite/c_test/enhancec_test/ENC0157-flexibleArray_check_return_err/flexibleArrayAddrof.c new file mode 100644 index 0000000000..d52f1f5155 --- /dev/null +++ b/testsuite/c_test/enhancec_test/ENC0157-flexibleArray_check_return_err/flexibleArrayAddrof.c @@ -0,0 +1,31 @@ +/* + * Copyright (c) [2023-2023] Huawei Technologies Co.,Ltd.All rights reserved. + * + * OpenArkCompiler is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * + * http://license.coscl.org.cn/MulanPSL2 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ +#include +struct A { + int len; + int fa[] __attribute__((count("len"))); +}; + +__attribute__((returns_count(10))) +int *addrof_check_return_warning() { + struct A a; + a.len = 9; + // CHECK: [[# @LINE + 1]] error: return value's bounds does not match the function declaration for addrof_check_return_warning + return a.fa; +} + +int main() { + return 0; +} diff --git a/testsuite/c_test/enhancec_test/ENC0157-flexibleArray_check_return_err/flexibleArrayIaddrof.c b/testsuite/c_test/enhancec_test/ENC0157-flexibleArray_check_return_err/flexibleArrayIaddrof.c new file mode 100644 index 0000000000..024cf30066 --- /dev/null +++ b/testsuite/c_test/enhancec_test/ENC0157-flexibleArray_check_return_err/flexibleArrayIaddrof.c @@ -0,0 +1,31 @@ +/* + * Copyright (c) [2023-2023] Huawei Technologies Co.,Ltd.All rights reserved. + * + * OpenArkCompiler is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * + * http://license.coscl.org.cn/MulanPSL2 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ +#include +struct A { + int len; + int fa[] __attribute__((count("len"))); +}; + +__attribute__((returns_count(10))) +int *iaddrof_check_return_warning() { + struct A *a = (struct A*)malloc(sizeof(struct A) + 10); + a->len = 9; + // CHECK: [[# @LINE + 1]] error: return value's bounds does not match the function declaration for addrof_check_return_warning + return a->fa; +} + +int main() { + return 0; +} diff --git a/testsuite/c_test/enhancec_test/ENC0157-flexibleArray_check_return_err/test.cfg b/testsuite/c_test/enhancec_test/ENC0157-flexibleArray_check_return_err/test.cfg new file mode 100644 index 0000000000..30f1590de0 --- /dev/null +++ b/testsuite/c_test/enhancec_test/ENC0157-flexibleArray_check_return_err/test.cfg @@ -0,0 +1,6 @@ +ENCO2_B_D: +compile_err(flexibleArrayAddrof) +compile_err(flexibleArrayIaddrof) +sort compile.log -t ':' -k 3 -n -o compile.log +cat compile.log | ${MAPLE_ROOT}/tools/bin/FileCheck flexibleArrayAddrof.c +cat compile.log | ${MAPLE_ROOT}/tools/bin/FileCheck flexibleArrayIaddrof.c diff --git a/testsuite/c_test/enhancec_test/ENC0158-flexibleArray_check_return_err_inline/flexibleArrayAddrof.c b/testsuite/c_test/enhancec_test/ENC0158-flexibleArray_check_return_err_inline/flexibleArrayAddrof.c new file mode 100644 index 0000000000..96498a84b6 --- /dev/null +++ b/testsuite/c_test/enhancec_test/ENC0158-flexibleArray_check_return_err_inline/flexibleArrayAddrof.c @@ -0,0 +1,32 @@ +/* + * Copyright (c) [2023-2023] Huawei Technologies Co.,Ltd.All rights reserved. + * + * OpenArkCompiler is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * + * http://license.coscl.org.cn/MulanPSL2 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ +#include +struct A { + int len; + int fa[] __attribute__((count("len"))); +}; + +__attribute__((returns_count(10))) +static inline int *addrof_check_return_err() { + struct A a; + a.len = 9; + // CHECK: [[# @LINE + 1]] error: return value's bounds does not match the function declaration for addrof_check_return_err when inlined to main + return a.fa; +} + +int main() { + addrof_check_return_err(); + return 0; +} diff --git a/testsuite/c_test/enhancec_test/ENC0158-flexibleArray_check_return_err_inline/flexibleArrayIaddrof.c b/testsuite/c_test/enhancec_test/ENC0158-flexibleArray_check_return_err_inline/flexibleArrayIaddrof.c new file mode 100644 index 0000000000..79e47a417d --- /dev/null +++ b/testsuite/c_test/enhancec_test/ENC0158-flexibleArray_check_return_err_inline/flexibleArrayIaddrof.c @@ -0,0 +1,32 @@ +/* + * Copyright (c) [2023-2023] Huawei Technologies Co.,Ltd.All rights reserved. + * + * OpenArkCompiler is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * + * http://license.coscl.org.cn/MulanPSL2 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ +#include +struct A { + int len; + int fa[] __attribute__((count("len"))); +}; + +__attribute__((returns_count(10))) +static inline int *iaddrof_check_return_err() { + struct A *a = (struct A*)malloc(sizeof(struct A) + 10); + a->len = 9; + // CHECK: [[# @LINE + 1]] error: return value's bounds does not match the function declaration for iaddrof_check_return_err when inlined to main + return a->fa; +} + +int main() { + iaddrof_check_return_err(); + return 0; +} diff --git a/testsuite/c_test/enhancec_test/ENC0158-flexibleArray_check_return_err_inline/test.cfg b/testsuite/c_test/enhancec_test/ENC0158-flexibleArray_check_return_err_inline/test.cfg new file mode 100644 index 0000000000..30f1590de0 --- /dev/null +++ b/testsuite/c_test/enhancec_test/ENC0158-flexibleArray_check_return_err_inline/test.cfg @@ -0,0 +1,6 @@ +ENCO2_B_D: +compile_err(flexibleArrayAddrof) +compile_err(flexibleArrayIaddrof) +sort compile.log -t ':' -k 3 -n -o compile.log +cat compile.log | ${MAPLE_ROOT}/tools/bin/FileCheck flexibleArrayAddrof.c +cat compile.log | ${MAPLE_ROOT}/tools/bin/FileCheck flexibleArrayIaddrof.c diff --git a/testsuite/c_test/enhancec_test/ENC0159-flexibleArray_check_assign_err/flexibleArrayAddrof.c b/testsuite/c_test/enhancec_test/ENC0159-flexibleArray_check_assign_err/flexibleArrayAddrof.c new file mode 100644 index 0000000000..1b79f9e462 --- /dev/null +++ b/testsuite/c_test/enhancec_test/ENC0159-flexibleArray_check_assign_err/flexibleArrayAddrof.c @@ -0,0 +1,31 @@ +/* + * Copyright (c) [2023-2023] Huawei Technologies Co.,Ltd.All rights reserved. + * + * OpenArkCompiler is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * + * http://license.coscl.org.cn/MulanPSL2 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ +#include +struct A { + int len; + int fa[] __attribute__((count("len"))); +}; + +void addof_check_assign_err() { + struct A a; + int *t __attribute__((count((10)))); + a.len = 9; + // CHECK: [[# @LINE + 1]] error: l-value boundary should not be larger than r-value boundary + t = a.fa; +} + +int main() { + return 0; +} diff --git a/testsuite/c_test/enhancec_test/ENC0159-flexibleArray_check_assign_err/flexibleArrayIaddrof.c b/testsuite/c_test/enhancec_test/ENC0159-flexibleArray_check_assign_err/flexibleArrayIaddrof.c new file mode 100644 index 0000000000..bc61f5b4ab --- /dev/null +++ b/testsuite/c_test/enhancec_test/ENC0159-flexibleArray_check_assign_err/flexibleArrayIaddrof.c @@ -0,0 +1,31 @@ +/* + * Copyright (c) [2023-2023] Huawei Technologies Co.,Ltd.All rights reserved. + * + * OpenArkCompiler is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * + * http://license.coscl.org.cn/MulanPSL2 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ +#include +struct A { + int len; + int fa[] __attribute__((count("len"))); +}; + +void iaddof_check_assign_err() { + struct A *a = (struct A*)malloc(sizeof(struct A) + 10); + int *t __attribute__((count((10)))); + a->len = 9; + // CHECK: [[# @LINE + 1]] error: l-value boundary should not be larger than r-value boundary + t = a->fa; +} + +int main() { + return 0; +} diff --git a/testsuite/c_test/enhancec_test/ENC0159-flexibleArray_check_assign_err/test.cfg b/testsuite/c_test/enhancec_test/ENC0159-flexibleArray_check_assign_err/test.cfg new file mode 100644 index 0000000000..30f1590de0 --- /dev/null +++ b/testsuite/c_test/enhancec_test/ENC0159-flexibleArray_check_assign_err/test.cfg @@ -0,0 +1,6 @@ +ENCO2_B_D: +compile_err(flexibleArrayAddrof) +compile_err(flexibleArrayIaddrof) +sort compile.log -t ':' -k 3 -n -o compile.log +cat compile.log | ${MAPLE_ROOT}/tools/bin/FileCheck flexibleArrayAddrof.c +cat compile.log | ${MAPLE_ROOT}/tools/bin/FileCheck flexibleArrayIaddrof.c diff --git a/testsuite/c_test/enhancec_test/ENC0160-flexibleArray_check_assign_err_inline/flexibleArrayAddrof.c b/testsuite/c_test/enhancec_test/ENC0160-flexibleArray_check_assign_err_inline/flexibleArrayAddrof.c new file mode 100644 index 0000000000..8065775032 --- /dev/null +++ b/testsuite/c_test/enhancec_test/ENC0160-flexibleArray_check_assign_err_inline/flexibleArrayAddrof.c @@ -0,0 +1,32 @@ +/* + * Copyright (c) [2023-2023] Huawei Technologies Co.,Ltd.All rights reserved. + * + * OpenArkCompiler is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * + * http://license.coscl.org.cn/MulanPSL2 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ +#include +struct A { + int len; + int fa[] __attribute__((count("len"))); +}; + +static inline void addof_check_assign_err() { + struct A a; + int *t __attribute__((count((10)))); + a.len = 9; + // CHECK: [[# @LINE + 1]] error: l-value boundary should not be larger than r-value boundary when inlined to main + t = a.fa; +} + +int main() { + addof_check_assign_err(); + return 0; +} diff --git a/testsuite/c_test/enhancec_test/ENC0160-flexibleArray_check_assign_err_inline/flexibleArrayIaddrof.c b/testsuite/c_test/enhancec_test/ENC0160-flexibleArray_check_assign_err_inline/flexibleArrayIaddrof.c new file mode 100644 index 0000000000..fb7fc91726 --- /dev/null +++ b/testsuite/c_test/enhancec_test/ENC0160-flexibleArray_check_assign_err_inline/flexibleArrayIaddrof.c @@ -0,0 +1,32 @@ +/* + * Copyright (c) [2023-2023] Huawei Technologies Co.,Ltd.All rights reserved. + * + * OpenArkCompiler is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * + * http://license.coscl.org.cn/MulanPSL2 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ +#include +struct A { + int len; + int fa[] __attribute__((count("len"))); +}; + +static inline void iaddof_check_assign_err() { + struct A *a = (struct A*)malloc(sizeof(struct A) + 10); + int *t __attribute__((count((10)))); + a->len = 9; + // CHECK: [[# @LINE + 1]] error: l-value boundary should not be larger than r-value boundary when inlined to main + t = a->fa; +} + +int main() { + iaddof_check_assign_err(); + return 0; +} diff --git a/testsuite/c_test/enhancec_test/ENC0160-flexibleArray_check_assign_err_inline/test.cfg b/testsuite/c_test/enhancec_test/ENC0160-flexibleArray_check_assign_err_inline/test.cfg new file mode 100644 index 0000000000..30f1590de0 --- /dev/null +++ b/testsuite/c_test/enhancec_test/ENC0160-flexibleArray_check_assign_err_inline/test.cfg @@ -0,0 +1,6 @@ +ENCO2_B_D: +compile_err(flexibleArrayAddrof) +compile_err(flexibleArrayIaddrof) +sort compile.log -t ':' -k 3 -n -o compile.log +cat compile.log | ${MAPLE_ROOT}/tools/bin/FileCheck flexibleArrayAddrof.c +cat compile.log | ${MAPLE_ROOT}/tools/bin/FileCheck flexibleArrayIaddrof.c diff --git a/testsuite/c_test/enhancec_test/ENC0161-flexibleArray_check_funcptr_err/flexibleArrayAddrof.c b/testsuite/c_test/enhancec_test/ENC0161-flexibleArray_check_funcptr_err/flexibleArrayAddrof.c new file mode 100644 index 0000000000..6245cc1a4e --- /dev/null +++ b/testsuite/c_test/enhancec_test/ENC0161-flexibleArray_check_funcptr_err/flexibleArrayAddrof.c @@ -0,0 +1,38 @@ +/* + * Copyright (c) [2023-2023] Huawei Technologies Co.,Ltd.All rights reserved. + * + * OpenArkCompiler is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * + * http://license.coscl.org.cn/MulanPSL2 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ +#include +struct A { + int len; + int fa[] __attribute__((count("len"))); +}; + +int* (*func1)(int*, int*) __attribute__((byte_count(10, 1))); + +__attribute__((byte_count(10, 1))) +int *Test1(int* p, int *q) { + return p; +} + +void addof_check_funcPtr_err() { + struct A a; + a.len = 1; + func1 = &Test1; + // CHECK: [[# @LINE + 1]] error: the pointer's bounds does not match the function function_pointer declaration for the 1st argument + (void)(*func1)(a.fa, a.fa); +} + +int main() { + return 0; +} diff --git a/testsuite/c_test/enhancec_test/ENC0161-flexibleArray_check_funcptr_err/flexibleArrayIaddrof.c b/testsuite/c_test/enhancec_test/ENC0161-flexibleArray_check_funcptr_err/flexibleArrayIaddrof.c new file mode 100644 index 0000000000..9c72940209 --- /dev/null +++ b/testsuite/c_test/enhancec_test/ENC0161-flexibleArray_check_funcptr_err/flexibleArrayIaddrof.c @@ -0,0 +1,38 @@ +/* + * Copyright (c) [2023-2023] Huawei Technologies Co.,Ltd.All rights reserved. + * + * OpenArkCompiler is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * + * http://license.coscl.org.cn/MulanPSL2 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ +#include +struct A { + int len; + int fa[] __attribute__((count("len"))); +}; + +int* (*func1)(int*, int*) __attribute__((byte_count(10, 1))); + +__attribute__((byte_count(10, 1))) +int *Test1(int* p, int *q) { + return p; +} + +void iaddof_check_funcPtr_err() { + struct A *a = (struct A*)malloc(sizeof(struct A) + 10); + a->len = 1; + func1 = &Test1; + // CHECK: [[# @LINE + 1]] error: the pointer's bounds does not match the function function_pointer declaration for the 1st argument + (void)(*func1)(a->fa, a->fa); +} + +int main() { + return 0; +} diff --git a/testsuite/c_test/enhancec_test/ENC0161-flexibleArray_check_funcptr_err/test.cfg b/testsuite/c_test/enhancec_test/ENC0161-flexibleArray_check_funcptr_err/test.cfg new file mode 100644 index 0000000000..30f1590de0 --- /dev/null +++ b/testsuite/c_test/enhancec_test/ENC0161-flexibleArray_check_funcptr_err/test.cfg @@ -0,0 +1,6 @@ +ENCO2_B_D: +compile_err(flexibleArrayAddrof) +compile_err(flexibleArrayIaddrof) +sort compile.log -t ':' -k 3 -n -o compile.log +cat compile.log | ${MAPLE_ROOT}/tools/bin/FileCheck flexibleArrayAddrof.c +cat compile.log | ${MAPLE_ROOT}/tools/bin/FileCheck flexibleArrayIaddrof.c diff --git a/testsuite/c_test/enhancec_test/ENC0162-flexibleArray_check_funcptr_err_inline/flexibleArrayAddrof.c b/testsuite/c_test/enhancec_test/ENC0162-flexibleArray_check_funcptr_err_inline/flexibleArrayAddrof.c new file mode 100644 index 0000000000..485582be9d --- /dev/null +++ b/testsuite/c_test/enhancec_test/ENC0162-flexibleArray_check_funcptr_err_inline/flexibleArrayAddrof.c @@ -0,0 +1,39 @@ +/* + * Copyright (c) [2023-2023] Huawei Technologies Co.,Ltd.All rights reserved. + * + * OpenArkCompiler is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * + * http://license.coscl.org.cn/MulanPSL2 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ +#include +struct A { + int len; + int fa[] __attribute__((count("len"))); +}; + +int* (*func1)(int*, int*) __attribute__((byte_count(10, 1))); + +__attribute__((byte_count(10, 1))) +int *Test1(int* p, int *q) { + return p; +} + +static inline void addof_check_funcPtr_err() { + struct A a; + a.len = 1; + func1 = &Test1; + // CHECK: [[# @LINE + 1]] error: the pointer's bounds does not match the function function_pointer declaration for the 1st argument when inlined to main + (void)(*func1)(a.fa, a.fa); +} + +int main() { + addof_check_funcPtr_err(); + return 0; +} diff --git a/testsuite/c_test/enhancec_test/ENC0162-flexibleArray_check_funcptr_err_inline/flexibleArrayIaddrof.c b/testsuite/c_test/enhancec_test/ENC0162-flexibleArray_check_funcptr_err_inline/flexibleArrayIaddrof.c new file mode 100644 index 0000000000..df16a12f29 --- /dev/null +++ b/testsuite/c_test/enhancec_test/ENC0162-flexibleArray_check_funcptr_err_inline/flexibleArrayIaddrof.c @@ -0,0 +1,39 @@ +/* + * Copyright (c) [2023-2023] Huawei Technologies Co.,Ltd.All rights reserved. + * + * OpenArkCompiler is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * + * http://license.coscl.org.cn/MulanPSL2 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ +#include +struct A { + int len; + int fa[] __attribute__((count("len"))); +}; + +int* (*func1)(int*, int*) __attribute__((byte_count(10, 1))); + +__attribute__((byte_count(10, 1))) +int *Test1(int* p, int *q) { + return p; +} + +static inline void iaddof_check_funcPtr_err() { + struct A *a = (struct A*)malloc(sizeof(struct A) + 10); + a->len = 1; + func1 = &Test1; + // CHECK: [[# @LINE + 1]] error: the pointer's bounds does not match the function function_pointer declaration for the 1st argument when inlined to main + (void)(*func1)(a->fa, a->fa); +} + +int main() { + iaddof_check_funcPtr_err(); + return 0; +} diff --git a/testsuite/c_test/enhancec_test/ENC0162-flexibleArray_check_funcptr_err_inline/test.cfg b/testsuite/c_test/enhancec_test/ENC0162-flexibleArray_check_funcptr_err_inline/test.cfg new file mode 100644 index 0000000000..30f1590de0 --- /dev/null +++ b/testsuite/c_test/enhancec_test/ENC0162-flexibleArray_check_funcptr_err_inline/test.cfg @@ -0,0 +1,6 @@ +ENCO2_B_D: +compile_err(flexibleArrayAddrof) +compile_err(flexibleArrayIaddrof) +sort compile.log -t ':' -k 3 -n -o compile.log +cat compile.log | ${MAPLE_ROOT}/tools/bin/FileCheck flexibleArrayAddrof.c +cat compile.log | ${MAPLE_ROOT}/tools/bin/FileCheck flexibleArrayIaddrof.c diff --git a/testsuite/c_test/enhancec_test/ENC0163-flexibleArray_check_assign/flexibleArray.c b/testsuite/c_test/enhancec_test/ENC0163-flexibleArray_check_assign/flexibleArray.c new file mode 100644 index 0000000000..a38779b974 --- /dev/null +++ b/testsuite/c_test/enhancec_test/ENC0163-flexibleArray_check_assign/flexibleArray.c @@ -0,0 +1,35 @@ +/* + * Copyright (c) [2023-2023] Huawei Technologies Co.,Ltd.All rights reserved. + * + * OpenArkCompiler is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * + * http://license.coscl.org.cn/MulanPSL2 + * + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ +#include +struct A { + int len; + int fa[] __attribute__((count("len"))); +}; + +void check_flex_array_assign() { + struct A *a = (struct A*)malloc(sizeof(struct A) + 10); + int *t; + //CHECK: dassign %_boundary.t_{{.*}}.lower 0 (iaddrof ptr <* <$A>> 2 (dread ptr %a_{{.*}})) + //CHECK: dassign %_boundary.t_{{.*}}.upper 0 (add ptr ( + //CHECK: iaddrof ptr <* <$A>> 2 (dread ptr %a_{{.*}}), + //CHECK: mul i64 ( + //CHECK: cvt i64 i32 (iread i32 <* <$A>> 1 (dread ptr %a_{{.*}})), + //CHECK: constval i64 4))) + t = a->fa; +} + +int main() { + return 0; +} diff --git a/testsuite/c_test/enhancec_test/ENC0163-flexibleArray_check_assign/test.cfg b/testsuite/c_test/enhancec_test/ENC0163-flexibleArray_check_assign/test.cfg new file mode 100644 index 0000000000..122117925f --- /dev/null +++ b/testsuite/c_test/enhancec_test/ENC0163-flexibleArray_check_assign/test.cfg @@ -0,0 +1,3 @@ +ENCO2_B_D: +compile(flexibleArray) +cat flexibleArray.mpl | ${MAPLE_ROOT}/tools/bin/FileCheck flexibleArray.c diff --git a/testsuite/c_test/gtorture_test/ilp32_lp64.testlist b/testsuite/c_test/gtorture_test/ilp32_lp64.testlist index 52e9b70ed3..f25308f5f9 100644 --- a/testsuite/c_test/gtorture_test/ilp32_lp64.testlist +++ b/testsuite/c_test/gtorture_test/ilp32_lp64.testlist @@ -1376,7 +1376,8 @@ GCC01375-g.torture.execute-pr84339 GCC01376-g.torture.execute-pr84478 GCC01377-g.torture.execute-pr84521 GCC01378-g.torture.execute-pr84524 -GCC01379-g.torture.execute-pr84748 +# pr84748 was disabled due to int128 isn't fully supported +# GCC01379-g.torture.execute-pr84748 # GCC01380-g.torture.execute-pr85095 GCC01381-g.torture.execute-pr85156 # GCC01382-g.torture.execute-pr85169 diff --git a/testsuite/c_test/struct_test/STRUCT0018-empty-struct/expected.txt b/testsuite/c_test/struct_test/STRUCT0018-empty-struct/expected.txt new file mode 100644 index 0000000000..79ebd0860f --- /dev/null +++ b/testsuite/c_test/struct_test/STRUCT0018-empty-struct/expected.txt @@ -0,0 +1,2 @@ +ok +ok diff --git a/testsuite/c_test/struct_test/STRUCT0018-empty-struct/test.c b/testsuite/c_test/struct_test/STRUCT0018-empty-struct/test.c new file mode 100644 index 0000000000..c6bffd32a3 --- /dev/null +++ b/testsuite/c_test/struct_test/STRUCT0018-empty-struct/test.c @@ -0,0 +1,38 @@ +#include "stdio.h" + +struct a { + short a; +}; + +struct c { +} __attribute__((aligned)); + +struct d { +} __attribute__((aligned(8))); + +struct { + int d; + struct c e; + struct a b; +}j; + +struct { + int d; + struct d e; + struct a b; +}f; + +void f_check_offset(void* ps, void* pf, int ofst) +{ + if ((((char*)ps) + ofst) != ((char*)pf)) { + printf("error\n"); + } else { + printf("ok\n"); + } +} + +int main() { + f_check_offset(&j, &j.e, 16); + f_check_offset(&f, &f.e, 8); + return 0; +} \ No newline at end of file diff --git a/testsuite/c_test/struct_test/STRUCT0018-empty-struct/test.cfg b/testsuite/c_test/struct_test/STRUCT0018-empty-struct/test.cfg new file mode 100644 index 0000000000..afc8503e78 --- /dev/null +++ b/testsuite/c_test/struct_test/STRUCT0018-empty-struct/test.cfg @@ -0,0 +1,2 @@ +compile(test) +run(test) \ No newline at end of file diff --git a/testsuite/c_test/struct_test/STRUCT0019-DTS2023062606472/expected.txt b/testsuite/c_test/struct_test/STRUCT0019-DTS2023062606472/expected.txt new file mode 100644 index 0000000000..d00491fd7e --- /dev/null +++ b/testsuite/c_test/struct_test/STRUCT0019-DTS2023062606472/expected.txt @@ -0,0 +1 @@ +1 diff --git a/testsuite/c_test/struct_test/STRUCT0019-DTS2023062606472/test.c b/testsuite/c_test/struct_test/STRUCT0019-DTS2023062606472/test.c new file mode 100644 index 0000000000..aaedc0ab75 --- /dev/null +++ b/testsuite/c_test/struct_test/STRUCT0019-DTS2023062606472/test.c @@ -0,0 +1,15 @@ +#include +struct a { + signed b; + signed c; +} __attribute__((aligned)); +#pragma pack(1) +struct { + signed : 4; + struct a d; +} e; +struct a f = {2, 1}; +int main() { + e.d = f; + printf("%d\n", e.d.c); +} \ No newline at end of file diff --git a/testsuite/c_test/struct_test/STRUCT0019-DTS2023062606472/test.cfg b/testsuite/c_test/struct_test/STRUCT0019-DTS2023062606472/test.cfg new file mode 100644 index 0000000000..afc8503e78 --- /dev/null +++ b/testsuite/c_test/struct_test/STRUCT0019-DTS2023062606472/test.cfg @@ -0,0 +1,2 @@ +compile(test) +run(test) \ No newline at end of file diff --git a/testsuite/c_test/unit_test/UNIT00141-CannotPropDefUseOpnd/expected.txt b/testsuite/c_test/unit_test/UNIT00141-CannotPropDefUseOpnd/expected.txt new file mode 100644 index 0000000000..aa47d0d46d --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT00141-CannotPropDefUseOpnd/expected.txt @@ -0,0 +1,2 @@ +0 +0 diff --git a/testsuite/c_test/unit_test/UNIT00141-CannotPropDefUseOpnd/main.c b/testsuite/c_test/unit_test/UNIT00141-CannotPropDefUseOpnd/main.c new file mode 100644 index 0000000000..eead39be74 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT00141-CannotPropDefUseOpnd/main.c @@ -0,0 +1,25 @@ +#include + +struct { + signed f4 : 20; + unsigned f8; +} __attribute__(()) __attribute__0, g_479[]; +int g_79 = 2; +unsigned int g_815 = 7; + +int func_66(int p_67, unsigned int* p_68, short p_69) { + const unsigned int* l_429 = 0; + for (g_79 = 0; g_79 >= -21; g_79 -= 6) { + const unsigned int** l_560[5]; + for (int i = 0; i < 5; i++) + l_560[i] = &l_429; + g_479[0].f4 ^= 3 | 0; + } + return 0; +} +int main() { + func_66(1, &g_815, 0); + for (int main_i = 0; main_i < 2; main_i++) + printf("%d\n", g_479[0].f4); + return 0; +} diff --git a/testsuite/c_test/unit_test/UNIT00141-CannotPropDefUseOpnd/test.cfg b/testsuite/c_test/unit_test/UNIT00141-CannotPropDefUseOpnd/test.cfg new file mode 100644 index 0000000000..bfd783d51c --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT00141-CannotPropDefUseOpnd/test.cfg @@ -0,0 +1,2 @@ +compile(main) +run(main) diff --git a/testsuite/c_test/unit_test/UNIT0064-parameter-validbit-muxed/.raw_file_list.txt b/testsuite/c_test/unit_test/UNIT0064-parameter-validbit-muxed/.raw_file_list.txt deleted file mode 100644 index e06246d58f..0000000000 --- a/testsuite/c_test/unit_test/UNIT0064-parameter-validbit-muxed/.raw_file_list.txt +++ /dev/null @@ -1,7 +0,0 @@ -main.c -gcc_main.o -gcc_main.s -test.cfg -func.c -expected.txt ------ diff --git a/testsuite/c_test/unit_test/UNIT0064-parameter-validbit-muxed/test.cfg b/testsuite/c_test/unit_test/UNIT0064-parameter-validbit-muxed/test.cfg index 2dea90a0f4..a6f12eeaee 100644 --- a/testsuite/c_test/unit_test/UNIT0064-parameter-validbit-muxed/test.cfg +++ b/testsuite/c_test/unit_test/UNIT0064-parameter-validbit-muxed/test.cfg @@ -1,4 +1,4 @@ CO2_MUXED: compile(func) -link() -run() +link(func.o gcc_main.o,TARGET="a") +run(a) diff --git a/testsuite/c_test/unit_test/UNIT0129-string-func-for-FORTIFY-SOURCE-2/expected.txt b/testsuite/c_test/unit_test/UNIT0129-string-func-for-FORTIFY-SOURCE-2/expected.txt new file mode 100644 index 0000000000..e69de29bb2 diff --git a/testsuite/c_test/unit_test/UNIT0129-string-func-for-FORTIFY-SOURCE-2/main.c b/testsuite/c_test/unit_test/UNIT0129-string-func-for-FORTIFY-SOURCE-2/main.c new file mode 100644 index 0000000000..92ab1264ea --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0129-string-func-for-FORTIFY-SOURCE-2/main.c @@ -0,0 +1,10 @@ +#include +int main() { + __builtin_strcspn("aaabbbccc", "a"); + // CHECK: bl strcspn + __builtin_strspn("aaabbbccc", "a"); + // CHECK: bl strspn + __builtin_strpbrk("Hello world!", "world"); + // CHECK: bl strpbrk + return 0; +} diff --git a/testsuite/c_test/unit_test/UNIT0129-string-func-for-FORTIFY-SOURCE-2/test.cfg b/testsuite/c_test/unit_test/UNIT0129-string-func-for-FORTIFY-SOURCE-2/test.cfg new file mode 100644 index 0000000000..d82c1c3261 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0129-string-func-for-FORTIFY-SOURCE-2/test.cfg @@ -0,0 +1,4 @@ +CO0: +compile(APP=main,OPTION="-S") +cat main.s | ${MAPLE_ROOT}/tools/bin/FileCheck main.c + diff --git a/testsuite/c_test/unit_test/UNIT0135-DivByZeroInLoop/expected.txt b/testsuite/c_test/unit_test/UNIT0135-DivByZeroInLoop/expected.txt new file mode 100644 index 0000000000..e69de29bb2 diff --git a/testsuite/c_test/unit_test/UNIT0135-DivByZeroInLoop/main.c b/testsuite/c_test/unit_test/UNIT0135-DivByZeroInLoop/main.c new file mode 100644 index 0000000000..3a01e63222 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0135-DivByZeroInLoop/main.c @@ -0,0 +1,18 @@ +int g = 0; + +// "localZero / a" is a loop invariant, but do not +// move it out of the loop, because it may throw exception +// and kills the whole program. +__attribute__ ((noinline)) +void testDivByZeroInLoop(int a, int count) { + int localZero = 0; + for (int i = 0; i < count; i++) { + g += (a ? a : (localZero / a) ? 0 : 1); // In fact, it's "localZero / 0". + } +} + +int main() { + testDivByZeroInLoop(5, 6); + return 0; +} + diff --git a/testsuite/c_test/unit_test/UNIT0135-DivByZeroInLoop/test.cfg b/testsuite/c_test/unit_test/UNIT0135-DivByZeroInLoop/test.cfg new file mode 100644 index 0000000000..bfd783d51c --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0135-DivByZeroInLoop/test.cfg @@ -0,0 +1,2 @@ +compile(main) +run(main) diff --git a/testsuite/c_test/unit_test/UNIT0137-ivopt-switchLoop/expected.txt b/testsuite/c_test/unit_test/UNIT0137-ivopt-switchLoop/expected.txt new file mode 100644 index 0000000000..e69de29bb2 diff --git a/testsuite/c_test/unit_test/UNIT0137-ivopt-switchLoop/main.c b/testsuite/c_test/unit_test/UNIT0137-ivopt-switchLoop/main.c new file mode 100644 index 0000000000..6ade64e0ff --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0137-ivopt-switchLoop/main.c @@ -0,0 +1,25 @@ +struct A { + short a; +}; + +struct A *x; +int b; + +__attribute__ ((noinline)) +void func() { + while(1) { + x->a++; + switch(b) { + case 7: + case 9: + return; + default: + continue; + } + } +} + +int main() { + func(); + return 0; +} diff --git a/testsuite/c_test/unit_test/UNIT0137-ivopt-switchLoop/test.cfg b/testsuite/c_test/unit_test/UNIT0137-ivopt-switchLoop/test.cfg new file mode 100644 index 0000000000..a85a5e20bf --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0137-ivopt-switchLoop/test.cfg @@ -0,0 +1 @@ +compile(main) diff --git a/testsuite/c_test/unit_test/UNIT0138-always-sweep-static-symbol/expected.txt b/testsuite/c_test/unit_test/UNIT0138-always-sweep-static-symbol/expected.txt new file mode 100644 index 0000000000..e69de29bb2 diff --git a/testsuite/c_test/unit_test/UNIT0138-always-sweep-static-symbol/main.c b/testsuite/c_test/unit_test/UNIT0138-always-sweep-static-symbol/main.c new file mode 100644 index 0000000000..accfd76fcd --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0138-always-sweep-static-symbol/main.c @@ -0,0 +1,5 @@ +static int a = 0; +// CHECK: .type a, %object +int main() { + return 0; +} diff --git a/testsuite/c_test/unit_test/UNIT0138-always-sweep-static-symbol/test.cfg b/testsuite/c_test/unit_test/UNIT0138-always-sweep-static-symbol/test.cfg new file mode 100644 index 0000000000..6b87a27a54 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0138-always-sweep-static-symbol/test.cfg @@ -0,0 +1,3 @@ +CO0_GDB: +compile(APP=main,OPTION="-S") +cat main.s | ${MAPLE_ROOT}/tools/bin/FileCheck main.c diff --git a/testsuite/c_test/unit_test/UNIT0139-aarch64-abi-B6/expected.txt b/testsuite/c_test/unit_test/UNIT0139-aarch64-abi-B6/expected.txt new file mode 100644 index 0000000000..e69de29bb2 diff --git a/testsuite/c_test/unit_test/UNIT0139-aarch64-abi-B6/main.c b/testsuite/c_test/unit_test/UNIT0139-aarch64-abi-B6/main.c new file mode 100644 index 0000000000..8a50b96acf --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0139-aarch64-abi-B6/main.c @@ -0,0 +1,21 @@ +#pragma pack(push) +#pragma pack(1) +struct S2 { + unsigned f0 : 6; +} __attribute__((aligned(16))); +#pragma pack(pop) + +char a = 1; +struct S2 b = {2}; + +int foo(char a, struct S2 b) { + return 0; +} + +int main() { + // CHECK: ldr x1,{{.*}} + // CHECK-NEXT: ldr x2,{{.*}} + // CHECK-NEXT: bl foo + int c = foo(a, b); + return 0; +} diff --git a/testsuite/c_test/unit_test/UNIT0139-aarch64-abi-B6/test.cfg b/testsuite/c_test/unit_test/UNIT0139-aarch64-abi-B6/test.cfg new file mode 100644 index 0000000000..3adebc5684 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0139-aarch64-abi-B6/test.cfg @@ -0,0 +1,3 @@ +CO0: +compile(main) +cat main.s | ${MAPLE_ROOT}/tools/bin/FileCheck main.c diff --git a/testsuite/c_test/unit_test/UNIT0140-ivopt-cvt/expected.txt b/testsuite/c_test/unit_test/UNIT0140-ivopt-cvt/expected.txt new file mode 100644 index 0000000000..e69de29bb2 diff --git a/testsuite/c_test/unit_test/UNIT0140-ivopt-cvt/main.c b/testsuite/c_test/unit_test/UNIT0140-ivopt-cvt/main.c new file mode 100644 index 0000000000..f9ee0032f5 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0140-ivopt-cvt/main.c @@ -0,0 +1,82 @@ +#include "csmith.h" +int32_t g_4, g_1330 = 8; +int32_t *g_41 = 0; +int32_t **g_40 = &g_41; +const int32_t g_69 = 2; +const int32_t *g_68 = &g_69; +uint64_t g_93 = 2; +uint16_t g_106[]; +uint32_t g_129 = 1; +int32_t *g_218 = 0; +int64_t g_454 = 0; +int32_t g_565 = 1; +int8_t g_571[][1]; +uint8_t g_614 = 0; +const int32_t **g_866 = &g_68; +int16_t func_5(); +int16_t func_13(); +int32_t **func_16(uint32_t p_17, uint8_t p_18, int8_t p_19); +uint8_t func_20(); +uint16_t func_30(); +uint8_t func_34(int32_t **p_35, const uint64_t p_36, uint16_t p_37, + int32_t *p_38, int32_t *p_39); +int32_t *func_49(); +const uint64_t func_1() { + int32_t *l_11 = &g_4; + int8_t l_29 = 5; + uint8_t l_936[0]; + int8_t l_1532 = 0; + if (func_5( + g_4, l_11, + func_13( + func_16( + g_4, + func_20(safe_add_func_uint8_t_u_u( + safe_lshift_func_uint32_t_u_s( + l_29 | func_30(g_4, safe_sub_func_int16_t_s_s( + g_4 & + func_34(g_40, 0, + 0, 0, 0) & + 8, + g_614)), + 5), + 1), + 0, 0, 0), + g_571[7][0]), + l_936), + g_1330, g_866), + l_1532) + ; + return 0; +} +int16_t func_5() { return 0; } +int16_t func_13() { return 0; } +int32_t **func_16(uint32_t p_17, uint8_t p_18, int8_t p_19) { + int32_t **l_935 = &g_218; + for (0; 0; g_565--) + ; + return l_935; +} +uint8_t func_20() { return g_454; } +uint16_t func_30() { return g_93; } +uint8_t func_34(int32_t **p_35, const uint64_t p_36, uint16_t p_37, + int32_t *p_38, int32_t *p_39) { + int32_t l_408 = 4; + uint16_t l_409 = 3; + uint16_t *l_420 = &g_106[0]; + int32_t l_421; + for (l_409 = 0; l_409 <= 3; l_409++) { + int32_t l_480 = 4; + for (g_129 = 0; l_480 >= 0; l_480--) { + int32_t *l_623 = &l_408; + *p_35 = func_49( + l_623, &l_623, l_421, + p_37 < (*l_623 = safe_sub_func_uint8_t_u_u((*l_420)-- <= 0, p_36)) != + 1, + p_36); + } + } + return p_36; +} +int32_t *func_49() { return 0; } +void main() { func_1(); } diff --git a/testsuite/c_test/unit_test/UNIT0140-ivopt-cvt/test.cfg b/testsuite/c_test/unit_test/UNIT0140-ivopt-cvt/test.cfg new file mode 100644 index 0000000000..dee66f120f --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0140-ivopt-cvt/test.cfg @@ -0,0 +1,4 @@ +COS: +compile(main) +timeout 3 ${MAPLE_ROOT}/tools/bin/qemu-aarch64 -L ${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc main.out > output.log 2>&1 +diff output.log expected.txt diff --git a/testsuite/c_test/unit_test/UNIT0141-cmp-extendShiftOpt/expected.txt b/testsuite/c_test/unit_test/UNIT0141-cmp-extendShiftOpt/expected.txt new file mode 100644 index 0000000000..7f8f011eb7 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0141-cmp-extendShiftOpt/expected.txt @@ -0,0 +1 @@ +7 diff --git a/testsuite/c_test/unit_test/UNIT0141-cmp-extendShiftOpt/main.c b/testsuite/c_test/unit_test/UNIT0141-cmp-extendShiftOpt/main.c new file mode 100644 index 0000000000..bd49d03172 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0141-cmp-extendShiftOpt/main.c @@ -0,0 +1,36 @@ +#include +long long a; +short aa[1][10][21], ab[1][10][21]; +char ac[1][10][21][5][6]; +int ad[1][10][21][25][6]; + +void func_2(long long *p1, int p2) { *p1 ^= p2; } + +void func_1(short p102[][10][21], short p103[][10][21]) { + long i_68 = 0; + for (int i_71 = 0; i_71 < 21; i_71 += (p103[i_68][2][2] >= (unsigned long)(unsigned)(signed char)p102[i_68][2][2]) + 4) { + ad[i_68][2][2][i_71][4] = ac[i_68][2][2][1][4]; + } +} + +int main() { + for (size_t af = 0; af < 10; ++af) + for (size_t ag = 0; ag < 21; ++ag) + aa[a][af][ag] = -4450; + for (size_t af = 0; af < 10; ++af) + for (size_t ag = 0; ag < 21; ++ag) + ab[a][af][ag] = -29350; + for (size_t af = 0; af < 10; ++af) + for (size_t ag = 0; ag < 21; ++ag) + for (size_t ah = 0; ah < 5; ++ah) + for (size_t aj = 0; aj < 6; ++aj) + ac[a][af][ag][ah][aj] = 7; + func_1(aa, ab); + for (size_t ai = 0; ai < 1; ++ai) + for (size_t af = 0; af < 10; ++af) + for (size_t ag = 0; ag < 21; ++ag) + for (size_t ah = 0; ah < 5; ++ah) + for (size_t aj = 0; aj < 6; ++aj) + func_2(&a, ad[ai][af][ag][ah][aj]); + printf("%llu\n", a); +} diff --git a/testsuite/c_test/unit_test/UNIT0141-cmp-extendShiftOpt/test.cfg b/testsuite/c_test/unit_test/UNIT0141-cmp-extendShiftOpt/test.cfg new file mode 100644 index 0000000000..bfd783d51c --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0141-cmp-extendShiftOpt/test.cfg @@ -0,0 +1,2 @@ +compile(main) +run(main) diff --git a/testsuite/c_test/unit_test/UNIT0142-bugfix-ico/driver.c b/testsuite/c_test/unit_test/UNIT0142-bugfix-ico/driver.c new file mode 100644 index 0000000000..792d807841 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0142-bugfix-ico/driver.c @@ -0,0 +1,106 @@ +#include + +unsigned long long int seed = 0; +void hash(unsigned long long int *seed, unsigned long long int const v) { + *seed ^= v + 0x9e3779b9 + ((*seed) << 6) + ((*seed) >> 2); +} + +unsigned int var_0 = 241429283U; +long long int var_1 = 5837214733273594058LL; +_Bool var_2 = (_Bool)1; +signed char var_3 = (signed char)42; +unsigned int var_4 = 2135023861U; +unsigned long long int var_5 = 991743411189159239ULL; +int var_6 = 869598879; +unsigned short var_7 = (unsigned short)58971; +unsigned long long int var_8 = 11399711916651176405ULL; +long long int var_9 = -3965251633771929298LL; +unsigned long long int var_10 = 2904209907058274201ULL; +unsigned int var_11 = 3479243816U; +short var_12 = (short)13292; +short var_13 = (short)-17655; +signed char var_14 = (signed char)-27; +int var_15 = -219605940; +unsigned char var_16 = (unsigned char)73; +_Bool var_17 = (_Bool)0; +short var_18 = (short)-14699; +int arr_0[11]; +unsigned short arr_1[11]; +_Bool arr_3[11][21]; +_Bool arr_13[11][17][21]; +unsigned char arr_2[11]; +signed char arr_8[11][21][24]; +signed char arr_9[11]; +long long int arr_14[11][17][21]; +signed char arr_15[11]; +int arr_16[11]; + +void init() { + for (size_t i_0 = 0; i_0 < 11; ++i_0) + arr_0[i_0] = 2086668070; + for (size_t i_0 = 0; i_0 < 11; ++i_0) + arr_1[i_0] = (unsigned short)33276; + for (size_t i_0 = 0; i_0 < 11; ++i_0) + for (size_t i_1 = 0; i_1 < 21; ++i_1) + arr_3[i_0][i_1] = (_Bool)1; + for (size_t i_0 = 0; i_0 < 11; ++i_0) + for (size_t i_1 = 0; i_1 < 17; ++i_1) + for (size_t i_2 = 0; i_2 < 21; ++i_2) + arr_13[i_0][i_1][i_2] = (_Bool)0; + for (size_t i_0 = 0; i_0 < 11; ++i_0) + arr_2[i_0] = (unsigned char)253; + for (size_t i_0 = 0; i_0 < 11; ++i_0) + for (size_t i_1 = 0; i_1 < 21; ++i_1) + for (size_t i_2 = 0; i_2 < 24; ++i_2) + arr_8[i_0][i_1][i_2] = (signed char)89; + for (size_t i_0 = 0; i_0 < 11; ++i_0) + arr_9[i_0] = (signed char)-91; + for (size_t i_0 = 0; i_0 < 11; ++i_0) + for (size_t i_1 = 0; i_1 < 17; ++i_1) + for (size_t i_2 = 0; i_2 < 21; ++i_2) + arr_14[i_0][i_1][i_2] = 7060654226781065427LL; + for (size_t i_0 = 0; i_0 < 11; ++i_0) + arr_15[i_0] = (signed char)-55; + for (size_t i_0 = 0; i_0 < 11; ++i_0) + arr_16[i_0] = -1100771191; +} + +void checksum() { + hash(&seed, var_10); + hash(&seed, var_11); + hash(&seed, var_12); + hash(&seed, var_13); + hash(&seed, var_14); + hash(&seed, var_15); + hash(&seed, var_16); + hash(&seed, var_17); + hash(&seed, var_18); + for (size_t i_0 = 0; i_0 < 11; ++i_0) + hash(&seed, arr_2[i_0]); + for (size_t i_0 = 0; i_0 < 11; ++i_0) + for (size_t i_1 = 0; i_1 < 21; ++i_1) + for (size_t i_2 = 0; i_2 < 24; ++i_2) + hash(&seed, arr_8[i_0][i_1][i_2]); + for (size_t i_0 = 0; i_0 < 11; ++i_0) + hash(&seed, arr_9[i_0]); + for (size_t i_0 = 0; i_0 < 11; ++i_0) + for (size_t i_1 = 0; i_1 < 17; ++i_1) + for (size_t i_2 = 0; i_2 < 21; ++i_2) + hash(&seed, arr_14[i_0][i_1][i_2]); + for (size_t i_0 = 0; i_0 < 11; ++i_0) + hash(&seed, arr_15[i_0]); + for (size_t i_0 = 0; i_0 < 11; ++i_0) { + hash(&seed, arr_16[i_0]); + } +} + +void test(unsigned int var_0, long long int var_1, _Bool var_2, signed char var_3, unsigned int var_4, + unsigned long long int var_5, int var_6, unsigned short var_7, unsigned long long int var_8, + long long int var_9, int arr_0[11], unsigned short arr_1[11], _Bool arr_3[11][21], _Bool arr_13[11][17][21]); + +int main() { + init(); + test(var_0, var_1, var_2, var_3, var_4, var_5, var_6, var_7, var_8, var_9, arr_0 , arr_1 , arr_3 , arr_13); + checksum(); + printf("%llu\n", seed); +} diff --git a/testsuite/c_test/unit_test/UNIT0142-bugfix-ico/expected.txt b/testsuite/c_test/unit_test/UNIT0142-bugfix-ico/expected.txt new file mode 100644 index 0000000000..a2c54ec499 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0142-bugfix-ico/expected.txt @@ -0,0 +1,2 @@ +var_18 = 0 +13600194331927394408 diff --git a/testsuite/c_test/unit_test/UNIT0142-bugfix-ico/main.c b/testsuite/c_test/unit_test/UNIT0142-bugfix-ico/main.c new file mode 100644 index 0000000000..08c09d80b0 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0142-bugfix-ico/main.c @@ -0,0 +1,15 @@ +#include "stdio.h" + +#define c(a, b) \ + { \ + __typeof__(a) d = a; \ + __typeof__(b) n = b; \ + d < n; \ + } + +extern short var_18; + +void test(int e, int f, _Bool g, char h, unsigned i, int o, int j, short k, unsigned long l, int m) { + var_18 = (c(m ? l : i + 2, k ? j : 0)); + printf("var_18 = %d\n", var_18); +} \ No newline at end of file diff --git a/testsuite/c_test/unit_test/UNIT0142-bugfix-ico/test.cfg b/testsuite/c_test/unit_test/UNIT0142-bugfix-ico/test.cfg new file mode 100644 index 0000000000..4e684dc93c --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0142-bugfix-ico/test.cfg @@ -0,0 +1,5 @@ +TEST_OS,TEST_O2: +generate_shared_lib(APP1=main,LIB=main) +compile(APP2=driver) +link(APP2=driver,LIB=main) +run() \ No newline at end of file diff --git a/testsuite/c_test/unit_test/UNIT0142-castopt-implicit-cast/expected.txt b/testsuite/c_test/unit_test/UNIT0142-castopt-implicit-cast/expected.txt new file mode 100644 index 0000000000..5e17d34fb3 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0142-castopt-implicit-cast/expected.txt @@ -0,0 +1 @@ +18446744073709551598 diff --git a/testsuite/c_test/unit_test/UNIT0142-castopt-implicit-cast/main.c b/testsuite/c_test/unit_test/UNIT0142-castopt-implicit-cast/main.c new file mode 100644 index 0000000000..a68b810561 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0142-castopt-implicit-cast/main.c @@ -0,0 +1,16 @@ +#include + +long long a; +char c[2]; +unsigned d[6]; +void b(long long *e, int p2) { *e ^= p2; } +int main() { + for (size_t f = 0; f < 2; ++f) + c[f] = 238; + for (_Bool g = 0; g < (_Bool)3; g = 7) + d[2] = (long)(signed char)c[g]; + for (size_t f = 0; f < 6; ++f) + b(&a, d[f]); + printf("%llu\n", a); +} + diff --git a/testsuite/c_test/unit_test/UNIT0142-castopt-implicit-cast/test.cfg b/testsuite/c_test/unit_test/UNIT0142-castopt-implicit-cast/test.cfg new file mode 100644 index 0000000000..12276add4f --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0142-castopt-implicit-cast/test.cfg @@ -0,0 +1,3 @@ +CO2: +compile(main) +run(main) diff --git a/testsuite/c_test/unit_test/UNIT0142-sps-timeout/expected.txt b/testsuite/c_test/unit_test/UNIT0142-sps-timeout/expected.txt new file mode 100644 index 0000000000..e69de29bb2 diff --git a/testsuite/c_test/unit_test/UNIT0142-sps-timeout/main.c b/testsuite/c_test/unit_test/UNIT0142-sps-timeout/main.c new file mode 100644 index 0000000000..b065806874 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0142-sps-timeout/main.c @@ -0,0 +1,41 @@ +#include +unsigned long long int seed = 0; +void hash(unsigned long long int *seed, unsigned long long int const v) { + *seed ^= v + 9 + 0 + (*seed >> 2); +} + +signed char var_11 = 0 - 7; +unsigned long long int arr_6[1][18][12]; +unsigned int arr_22[1][23][23][17]; +short arr_26[1][23][23][17][17]; +unsigned char arr_34[1][12][23][24]; +signed char arr_42[4][2][3][4][10]; +signed char arr_45_0_0_0_0_0; +void test(char var_2, signed char var_11, unsigned long long int var_13, + unsigned long long int arr_6[][18][12], + unsigned int arr_22[][23][23][17], short arr_26[][23][23][17][17], + unsigned char arr_34[][12][23][24]) { + for (short i_0 = 0; i_0 < 0 + 4; i_0 = 0 + 72) + for (short i_8 = 0; i_8 < 1; i_8 = var_13) + for (short i_9 = 0; i_9 < (short)var_13; i_9 = 6) + for (short i_10 = 0; i_10 < (unsigned short)var_11 - 0; + i_10 = 0 - 2) + for (signed char i_11 = 0; i_11 < 0 + 10; i_11 += 0 + 3) + arr_42[i_0][i_8][1][i_10][i_11] = 1 ? var_2 | 063 : 0; +} + +int main() { + test(0, var_11, 309358634004439785, arr_6, arr_22, arr_26, arr_34); + for (size_t i_0 = 0; i_0 < 4; ++i_0) + for (size_t i_1 = 0; i_1 < 2; ++i_1) + for (size_t i_2 = 0; i_2 < 3; ++i_2) + for (size_t i_3 = 0; i_3 < 4; ++i_3) + for (size_t i_4 = 0; i_4 < 10; ++i_4) + hash(&seed, arr_42[i_0][i_1][i_2][i_3][i_4]); + + if (seed != 55) { + printf("expect 55, actual is %lld\n", seed); + return 1; + } + return 0; +} diff --git a/testsuite/c_test/unit_test/UNIT0142-sps-timeout/test.cfg b/testsuite/c_test/unit_test/UNIT0142-sps-timeout/test.cfg new file mode 100644 index 0000000000..30047540d7 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0142-sps-timeout/test.cfg @@ -0,0 +1 @@ +timeout 3 ${MAPLE_BUILD_OUTPUT}/bin/maple -O2 --stack-protector-strong main.c -o main.s -S diff --git a/testsuite/c_test/unit_test/UNIT0143-duplicate-atomic-builtins/expected.txt b/testsuite/c_test/unit_test/UNIT0143-duplicate-atomic-builtins/expected.txt new file mode 100644 index 0000000000..e69de29bb2 diff --git a/testsuite/c_test/unit_test/UNIT0143-duplicate-atomic-builtins/main.c b/testsuite/c_test/unit_test/UNIT0143-duplicate-atomic-builtins/main.c new file mode 100644 index 0000000000..7c1cf59e2e --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0143-duplicate-atomic-builtins/main.c @@ -0,0 +1,22 @@ +int main () +{ + int v = 1; + int count = 0; + + v = __atomic_load_n (&v, __ATOMIC_RELAXED); + if (v != ++count) + return 1; + __atomic_store_n (&v, count + 1, __ATOMIC_RELAXED); + if (v != ++count) + return 2; + + __atomic_store_n (&v, count + 1, __ATOMIC_RELEASE); + if (v != ++count) + return 3; + + __atomic_store_n (&v, count + 1, __ATOMIC_SEQ_CST); + if (v != ++count) + return 4; + return 0; +} + diff --git a/testsuite/c_test/unit_test/UNIT0143-duplicate-atomic-builtins/test.cfg b/testsuite/c_test/unit_test/UNIT0143-duplicate-atomic-builtins/test.cfg new file mode 100644 index 0000000000..bfd783d51c --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0143-duplicate-atomic-builtins/test.cfg @@ -0,0 +1,2 @@ +compile(main) +run(main) diff --git a/testsuite/c_test/unit_test/UNIT0143-objsize-null/expected.txt b/testsuite/c_test/unit_test/UNIT0143-objsize-null/expected.txt new file mode 100644 index 0000000000..3a2e3f4984 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0143-objsize-null/expected.txt @@ -0,0 +1 @@ +-1 diff --git a/testsuite/c_test/unit_test/UNIT0143-objsize-null/h/cvaltarget.h b/testsuite/c_test/unit_test/UNIT0143-objsize-null/h/cvaltarget.h new file mode 100644 index 0000000000..d57ee7124b --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0143-objsize-null/h/cvaltarget.h @@ -0,0 +1,165 @@ +/* + * Always included file that describes the implementation's data model. + */ + +#ifndef CVAL_TARGET_H +#define CVAL_TARGET_H + +/* + * SuperTest Usage configuration + */ + + /* Uncomment this #define to compile tests without the diagnostic + * library. It makes tests smaller and tests do not generate any + * output, which is useful on bare-metal targets. See also CVAL_EXIT() + * below. + */ +/* #define CVAL_SILENT_LIBRARY */ + + /* Remove this #define when C complex types are not supported. For C90 + * or C++ compilers, this macro will automatically be undefined, since + * C complex types are only supported by C99 and later versions of C. + */ +/* #define CVAL_HAVE_COMPLEX */ + + /* If the compiler does not support floating point, + * this #define skips floating point support in the + * SuperTest diagnostic library. It does NOT automatically + * skip tests with floating point. To achieve that, + * subtract any or all of the predefined test sets + * float/double/longdouble in SETS/ in the test set + * definition. + */ +/* #define CVAL_NOFLOAT */ + + /* The SuperTest diagnostic library reads the arguments to the + * main() function called argc and argv. If they are inconsistent + * (happens rarely and only on embedded systems), this can be + * turned off by enabling the #define CVAL_NO_ARGC_ARGV. + */ +/* #define CVAL_NO_ARGC_ARGV */ + + /* + * Uncomment this define to use static arrays instead + * of dynamically allocated memory in the test suite + * "optimize/". This is useful if your target does + * not support dynamically allocated memory. + */ +/* #define CVAL_STATIC_MEMORY */ + +/* + * SuperTest has a very small footprint. When CVAL_SILENT_LIBRARY + * is set, it only needs to return its exit value. It uses the + * macro CVAL_EXIT(x) to do this. This macro can be redefined here + * its default definition of 'exit(x)' is not correct. + * + * If CVAL_SILENT_LIBRARY is not defined (which is the default), + * then additionally the tests use CVAL_PUTCHAR(x) to print + * diagnostic output. It can be redefined here is 'putchar(x)' + * is not the right way to do this. + */ +#ifdef COMPILING_CVAL_LIB + + #include + #define CVAL_EXIT(x) exit(x) + + #ifdef CVAL_SILENT_LIBRARY + /* No output needed for CVAL_SILENT_LIBRARY, no + * stdio.h included. + */ + #define CVAL_PUTCHAR(x) /* No output */ + #else + #include + #define CVAL_PUTCHAR(x) putchar(x) + #endif + +#endif + +/* + * Target dependent values. + * + * These values must be adapted to the data-model of the target architecture. + * This default file target/cvaltarget.h in SuperTest is set to work for + * the common 32 and 64 bit data models. For many not-so mainstream + * processors, they may need to be modified. + * If these value are not set up to match the target, SuperTest will fail + * with an error "Null test failed", when testing "suite/FIRST/test0.c" + */ + +#include /* Only needed for INT_MAX==LONG_MAX compare */ +#if INT_MAX == LONG_MAX + #define CVAL_LONGSIZE 32 /* The size of a long in bits. */ + #define CVAL_POINTERSIZE 32 /* The size of a void* in bits. */ +#else + #define CVAL_LONGSIZE 64 /* The size of a long in bits. */ + #define CVAL_POINTERSIZE 64 /* The size of a void* in bits. */ +#endif + +#define CVAL_LONGLONGSIZE 64 /* The size of a long long in bits. */ +#define CVAL_INTSIZE 32 /* The size of an int in bits. */ +#define CVAL_SHORTSIZE 16 /* The size of a short in bits. */ +#define CVAL_CHARSIZE 8 /* The size of a char in bits. */ +#define CVAL_WCHARSIZE 32 /* The size of wchar_t in bits. */ + +/* #define ONECOMPL */ /* machine is one's complement */ +#define TWOCOMPL /* machine is two's complement */ + +/* + * IEEE-754 example values + */ +#define FLOAT_MANTISSA 24 +#define DOUBLE_MANTISSA 53 + +/* + * Floating point absolute and relative precision for float and double. + */ + +#ifdef CVAL_FP_IEEE +/* + * These values should be attainable for IEEE-754. + * Accumulating errors in eg math functions might exceed the bounds. + * From considerations of quality, an attempt should be made to fix such + * math functions. + * Otherwise these values might be adapted. + */ +#define CVAL_A_FLOAT_PRECISION 5E-6 +#define CVAL_R_FLOAT_PRECISION 5E-7 + +#define CVAL_A_DOUBLE_PRECISION 1E-14 +#define CVAL_R_DOUBLE_PRECISION 1E-15 + +#define CVAL_A_LDOUBLE_PRECISION 1E-14 +#define CVAL_R_LDOUBLE_PRECISION 1E-15 + +#else /* ! CVAL_FP_IEEE */ + +/* + * These are well within ISO-C minimum precision requirements for + * the accuracy of floating point representation. + */ +#define CVAL_A_FLOAT_PRECISION 5E-4 +#define CVAL_R_FLOAT_PRECISION 5E-5 + +#define CVAL_A_DOUBLE_PRECISION 5E-8 +#define CVAL_R_DOUBLE_PRECISION 5E-9 + +#define CVAL_A_LDOUBLE_PRECISION 5E-8 +#define CVAL_R_LDOUBLE_PRECISION 5E-9 + +#endif /* CVAL_FP_IEEE */ + +/* + * The locale category LC_CTYPE affects the behavior of the + * character handling functions and the multibyte and wide + * character functions. To test UTF-16 and UTF-32 Unicode + * utilities (Section C11:7.28) a specific UTF-8 encoding + * locale should be set. The default locale "C" commonly + * does not provide UTF-8 and the existence of any other + * locale is user defined. In this case, the well-known + * "en_US.UTF-8" locale is selected, however, any other + * UTF-8 compliant locale would be also suitable. + */ +#define CVAL_LOCALE "en_US.UTF-8" + +#endif /* CVAL_TARGET_H */ + diff --git a/testsuite/c_test/unit_test/UNIT0143-objsize-null/h/def.h b/testsuite/c_test/unit_test/UNIT0143-objsize-null/h/def.h new file mode 100644 index 0000000000..5e2f8c2842 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0143-objsize-null/h/def.h @@ -0,0 +1,481 @@ +/* + * + * COPYRIGHT NOTICE (NOT TO BE REMOVED): + * + * This file, or parts of it, or modified versions of it, may not be copied, + * reproduced or transmitted in any form, including reprinting, translation, + * photocopying or microfilming, or by any means, electronic, mechanical or + * otherwise, or stored in a retrieval system, or used for any purpose, without + * the prior written permission of all Owners unless it is explicitly marked as + * having Classification `Public'. + * + * Owners of this file give notice: + * (c) Copyright 2015-2019 by Solid Sands B.V., + * Amsterdam, the Netherlands. All rights reserved. + * (c) Copyright 1996-2012 ACE Associated Compiler Experts bv + * (c) Copyright 1995-2012 ACE Associated Computer Experts bv + * All rights, including copyrights, reserved. + * + * This file contains or may contain restricted information and is UNPUBLISHED + * PROPRIETARY SOURCE CODE OF THE Owners. The Copyright Notice(s) above do not + * evidence any actual or intended publication of such source code. This file + * is additionally subject to the conditions listed in the RESTRICTIONS file + * and is with NO WARRANTY. + * + * END OF COPYRIGHT NOTICE + */ + +#ifndef CVAL_DEF_H +#define CVAL_DEF_H + +#ifdef __cplusplus + extern "C" { +#endif + +#include + +#include "cvaltarget.h" + +/******************************** + * The following section define SuperTest specific macros used by the + * tests or by the diagnostic library. They are protected by #ifdefs, so + * that they can be overruled easily in the cvaltarget.h file. + */ + +#ifndef CVAL_A_LDOUBLE_PRECISION +#define CVAL_A_LDOUBLE_PRECISION CVAL_A_DOUBLE_PRECISION +#endif + +#ifndef CVAL_R_LDOUBLE_PRECISION +#define CVAL_R_LDOUBLE_PRECISION CVAL_R_DOUBLE_PRECISION +#endif + +/* + * This file does not (and should not) #include standard headers. + * If testfiles need them, they should include them. + */ + +#ifdef CVAL_SILENT_LIBRARY + /* Just shorthands */ + #define CVAL_NODIAG +#else + #define CVAL_YESDIAG +#endif /* CVAL_SILENT_LIBRARY */ + +#ifndef CVAL_HEADER + #ifdef CVAL_YESDIAG + #define CVAL_HEADER(s) CVAL_HEADER_FUNC(s) + #else + #define CVAL_HEADER(s) /* Nothing here */ + #endif +#endif + +#ifndef CVAL_SECTION + #ifdef CVAL_YESDIAG + #define CVAL_SECTION(s) CVAL_SECTION_FUNC(s) + #else + #define CVAL_SECTION(s) /* Nothing here */ + #endif +#endif + +#ifndef CVAL_ENDSECTION + #ifdef CVAL_YESDIAG + #define CVAL_ENDSECTION() CVAL_ENDSECTION_FUNC() + #else + #define CVAL_ENDSECTION() /* Nothing here */ + #endif +#endif + +#ifndef CVAL_ACTION + #ifdef CVAL_YESDIAG + #define CVAL_ACTION(s) CVAL_ACTION_FUNC(s) + #else + #define CVAL_ACTION(s) + #endif +#endif + +#ifndef CVAL_DOTEST + #ifdef CVAL_YESDIAG + #define CVAL_DOTEST(do_str) CVAL_ACTION (#do_str); do_str; + #else + #define CVAL_DOTEST(do_str) do_str; + #endif +#endif + +#ifndef CVAL_NOTEST + #ifdef CVAL_YESDIAG + #define CVAL_NOTEST() CVAL_NOTEST_FUNC() + #else + #define CVAL_NOTEST() /* Nothing here */ + #endif +#endif + +#ifndef CVAL_CASE + #ifdef CVAL_YESDIAG + #define CVAL_CASE(c) CVAL_CASE_FUNC(c) + #else + #define CVAL_CASE(c) (void)(c); + #endif +#endif + +#ifndef CVAL_NOCASE + #ifdef CVAL_YESDIAG + #define CVAL_NOCASE() CVAL_NOCASE_FUNC() + #else + #define CVAL_NOCASE() /* Nothing here */ + #endif +#endif + +#ifndef CVAL_RFLAG +#define CVAL_RFLAG 1 +#endif + +#ifndef CVAL_VFLAG +#define CVAL_VFLAG 1 +#endif + +#ifndef CVAL_VERIFY + #ifdef CVAL_NODIAG + /* Use a library call because CVAL_EXIT is not + * available here, and is available in library. + */ + #define CVAL_VERIFY(cond) CVAL_VERIFY_MINIFUNC(cond) + #endif /* CVAL_NODIAG */ +#endif /* CVAL_VERIFY */ + +#ifndef CVAL_VERIFY + #define CVAL_VERIFY(be) CVAL_VERIFY_FUNC(be, #be, __LINE__) +#endif /* CVAL_VERIFY */ + + +#define CVAL_ARRAY_COUNT(x) (sizeof(x) / sizeof(x[0])) + +/* + * For backwards compatibility. + */ +#define do_exit(eval) (cval_exit_func(eval)) +#define CVAL_CONST const + +#ifndef NULLCHAR + #define NULLCHAR '\0' +#endif /* NULLCHAR */ + +/* + * The following is used to check floating point against some other value + * with a predefined precision. + */ +#ifndef CVAL_FC +#define CVAL_FC(f, val) cval_float_approximates((f), (val)) +#endif +#ifndef CVAL_DC +#define CVAL_DC(f, val) cval_double_approximates((f), (val)) +#endif +#ifndef CVAL_QC +#define CVAL_QC(f, val) cval_ldouble_approximates((f), (val)) +#endif + +/****************************************** + * The following section defines SuperTest specific macros to identify + * the C or C++ version of the compiler. This is done to make it easier + * to write version specific code in tests. (The macros defined by the + * language standard are harder to memorize and not so orthogonal.) + * + * Two sets of macros exists, and from each set EXACTLY ONE macro must + * be defined. The first set defines the current language that is compiled, + * C or C++. It respectively contains the macros: + * + * CVAL_STDC, CVAL_CXX + * + * The other set defines the specific version of C or C++ that is compiled - + * C90, C99, C11, C++03, C++11, C++14 or C++17, respectively defined by: + * + * CVAL_C90, CVAL_C99, CVAL_C11, CVAL_C18 + * CVAL_CXX03, CVAL_CXX11, CVAL_CXX14, CVAL_CXX17 + * + * Notes: + * - C89 and C90 are the same language. + * - C++03 is an amendment ("fix update") of C++98. It is treated + * the same in SuperTest and named CXX03. + * - The C language committee has published corrigenda of language + * revisions. They are named after the 'base' revision. + * - The C++ language committee does not publish corrigenda, yet + * C++03 is commonly considered, by the market and by compiler + * developers, as a corrigendum of C++98. + * + * The code below computes the correct setting of the macros from the + * macros defined by the language standards. This code can be overruled + * by setting the macros (one from each set) explicitly in the target + * file "cvaltarget.h" + */ + + /* If not one of CVAL_STDC and CVAL_CXX is set explictly, figure + * it out in the enclosed block. + */ +#ifndef CVAL_STDC +#ifndef CVAL_CXX + + #ifdef __cplusplus + #define CVAL_CXX 1 + #else + #ifdef __STDC__ + #define CVAL_STDC 1 + #else + #error "Expected definition of one of __STDC__ or __cplusplus__ \ + not found - Explictly define CVAL_STDC or CVAL_CXX in cvaltarget.h" + #endif + #endif + +#endif /* CVAL_CXX */ +#endif /* CVAL_STDC */ + + + /* If not one of CVAL_C* specific version macros is set, figure it out + * in the enclosed block. + */ +#ifndef CVAL_C90 +#ifndef CVAL_C99 +#ifndef CVAL_C11 +#ifndef CVAL_C18 +#ifndef CVAL_CXX03 +#ifndef CVAL_CXX11 +#ifndef CVAL_CXX14 +#ifndef CVAL_CXX17 + + #ifdef CVAL_CXX + #if __cplusplus == 199711L + #define CVAL_CXX03 1 + #elif __cplusplus == 201103L + #define CVAL_CXX11 1 + #elif __cplusplus == 201402L + #define CVAL_CXX14 1 + #elif __cplusplus == 201703L + #define CVAL_CXX17 1 + #else + #error "__cplusplus version is not recognized, set one of: \ +CVAL_CXX03, CVAL_CXX11, CVAL_CXX14 or CVAL_CXX17 explicitly in cvaltarget.h" + #endif + #endif + + #ifdef CVAL_STDC + #ifndef __STDC_VERSION__ + #define CVAL_C90 1 + #elif __STDC_VERSION__ == 199409L /* C90:Corrigendum 1 */ + #define CVAL_C90 1 + #elif __STDC_VERSION__ == 199603L /* C90:Corrigendum 2 */ + #define CVAL_C90 1 + #elif __STDC_VERSION__ == 199901L + #define CVAL_C99 1 + #elif __STDC_VERSION__ == 201112L + #define CVAL_C11 1 + #elif __STDC_VERSION__ == 201710L + #define CVAL_C18 1 + #else + #error "__STDC_VERSION__ is not recognized, set one of: \ +CVAL_C90, CVAL_C99 or CVAL_C11 explicitly in cvaltarget.h" + #endif + #endif + +#endif /* CVAL_CXX17 */ +#endif /* CVAL_CXX14 */ +#endif /* CVAL_CXX11 */ +#endif /* CVAL_CXX03 */ +#endif /* CVAL_C18 */ +#endif /* CVAL_C11 */ +#endif /* CVAL_C99 */ +#endif /* CVAL_C90 */ + +#ifndef CVAL_C99_ONWARD +#ifndef CVAL_C11_ONWARD +#ifndef CVAL_C18_ONWARD +#ifndef CVAL_CXX11_ONWARD +#ifndef CVAL_CXX14_ONWARD +#ifndef CVAL_CXX17_ONWARD + + #ifdef CVAL_STDC + #if defined( CVAL_C18 ) + #define CVAL_C99_ONWARD + #define CVAL_C11_ONWARD + #define CVAL_C18_ONWARD + #elif defined( CVAL_C11 ) + #define CVAL_C99_ONWARD + #define CVAL_C11_ONWARD + #elif defined( CVAL_C99 ) + #define CVAL_C99_ONWARD + #endif + #endif + + #ifdef CVAL_CXX + #if defined( CVAL_CXX17 ) + #define CVAL_CXX11_ONWARD + #define CVAL_CXX14_ONWARD + #define CVAL_CXX17_ONWARD + #elif defined( CVAL_CXX14 ) + #define CVAL_CXX11_ONWARD + #define CVAL_CXX14_ONWARD + #elif defined( CVAL_CXX11 ) + #define CVAL_CXX11_ONWARD + #endif + #endif + +#endif /* CVAL_C99_ONWARD */ +#endif /* CVAL_C11_ONWARD */ +#endif /* CVAL_C18_ONWARD */ +#endif /* CVAL_CXX11_ONWARD */ +#endif /* CVAL_CXX14_ONWARD */ +#endif /* CVAL_CXX17_ONWARD */ + +/* Undefine CVAL_HAVE_COMPLEX on C90 and C++ compilers, since C complex types + * are only supported on C99 and later. + */ +#ifdef CVAL_HAVE_COMPLEX + #ifdef CVAL_C90 + #undef CVAL_HAVE_COMPLEX + #endif /* CVAL_C90 */ + + #ifdef CVAL_CXX + #undef CVAL_HAVE_COMPLEX + #endif /* CVAL_CXX */ +#endif /* CVAL_HAVE_COMPLEX */ + +/************************************* + * Declaration of library functions + */ + +void CVAL_VERBOSE (int); +void CVAL_VERIFY_FUNC (int, const char *, int); +void CVAL_VERIFY_MINIFUNC (int cond); +void CVAL_ACTION_FUNC (const char *); +void CVAL_HEADER_FUNC (const char *); +void CVAL_SECTION_FUNC (const char *); +void CVAL_ENDSECTION_FUNC (void); +void CVAL_NOTEST_FUNC (void); +void CVAL_CASE_FUNC (int); +void CVAL_NOCASE_FUNC (void); + +void cval_exit_func (int); +void cval_exit_nolib (int); /* For tests with own main() */ +void cval_anyeffect (void); + +int cval_identity_int (int); +unsigned int cval_identity_uint (unsigned int); +long cval_identity_long (long); +unsigned long cval_identity_ulong (unsigned long); +void *cval_identity_pointer (void *); + +/* Compatibility: Preprocessor condition intended */ +#if defined( CVAL_C90 ) || \ + defined( CVAL_CXX03 ) + /* Empty Case */ +#else + /* Have long long */ + long long cval_identity_longlong (long long); + unsigned long long cval_identity_ulonglong (unsigned long long); +#endif + +#ifndef CVAL_NOFLOAT +float cval_identity_float (float x); +double cval_identity_double (double x); +long double cval_identity_ldouble (long double x); +int cval_float_approximates (double, double); +int cval_double_approximates (double, double); +int cval_ldouble_approximates (long double, long double); + +#ifdef CVAL_HAVE_COMPLEX +float _Complex cval_identity_fcmplx (float _Complex); +double _Complex cval_identity_cmplx (double _Complex); +long double _Complex cval_identity_lcmplx (long double _Complex); + +int cval_fcmplx_approximates (float _Complex, float _Complex); +int cval_cmplx_approximates (double _Complex, double _Complex); +int cval_lcmplx_approximates ( + long double _Complex, long double _Complex); +#endif +#endif + +#ifdef __DSPC__ +__fixed cval_identity_fixed(__fixed x); +long __fixed cval_identity_lfixed(long __fixed x); +__accum cval_identity_accum(__accum x); +long __accum cval_identity_laccum(long __accum x); +#endif + +#ifdef __EMBEDDEDC__ +signed short _Fract cval_identity_shr( signed short _Fract ); +signed short _Accum cval_identity_shk( signed short _Accum ); +signed _Fract cval_identity_sr( signed _Fract ); +signed _Accum cval_identity_sk( signed _Accum ); +signed long _Fract cval_identity_slr( signed long _Fract ); +signed long _Accum cval_identity_slk( signed long _Accum ); +unsigned short _Fract cval_identity_uhr( unsigned short _Fract ); +unsigned short _Accum cval_identity_uhk( unsigned short _Accum ); +unsigned _Fract cval_identity_ur( unsigned _Fract ); +unsigned _Accum cval_identity_uk( unsigned _Accum ); +unsigned long _Fract cval_identity_ulr( unsigned long _Fract ); +unsigned long _Accum cval_identity_ulk( unsigned long _Accum ); +#endif + + /* Temporary solution for cval_put*: these should not be used in + * tests at all. This stuff is instrumentation for debugging, which + * tests should not have. Instead, fail of comment + */ +#ifdef COMPILING_CVAL_LIB + extern int cval_put_string(const char *); + extern void cval_put_decimal(long); + extern void cval_put_hex(long); +#else + #ifdef CVAL_YESDIAG + extern int cval_put_string(const char *); + extern void cval_put_decimal(long); + extern void cval_put_hex(long); + #else + #define cval_put_string(s) 0 + #define cval_put_decimal(l) /* Nothing here */ + #define cval_put_hex(l) /* Nothing here */ + #endif /* CVAL_YESDIAG */ +#endif /* COMPILING_CVAL_LIB */ + + +extern char* cval_strcat (char *, const char *); +extern void cval_reverse (char *s); +extern int cval_strlen (const char *); +extern void cval_itoa (int, char *); +extern char* cval_strcpy (char *, const char *); +extern char* cval_strncpy (char *s1, const char *s2, int n); +extern int cval_strcmp (const char *, const char *); +extern int cval_strncmp (const char *s1, const char *s2, int n); +extern int cval_memcmp (const void *, const void *, int); +extern void* cval_memcpy (void *, const void *, int); +extern void* cval_memset (void *, int, int); +extern void cval_exit_nolib (int); + +#define cval_never() cval_identity_int(0) +#define cval_always() cval_identity_int(1) + +#ifndef MAIN + #ifdef CVAL_YESDIAG + /* Create the entry TEST__MAIN that is called by the real + * main in report.o the supertest library stlib.a + */ + void TEST__MAIN (void); + # define MAIN void TEST__MAIN(void) + #else + /* Place the main() function inline in the test. So main + * from library is not used, linker should not include + * report.o + */ + #define MAIN \ + void TEST__MAIN (void); \ + int main (void) { \ + TEST__MAIN (); \ + cval_exit_func (0); \ + return 0; \ + } \ + void TEST__MAIN (void) + #endif /* CVAL_YESDIAG */ +#endif + +#ifdef __cplusplus + } +#endif /* __cplusplus */ + +#endif /* CVAL_DEF_H */ diff --git a/testsuite/c_test/unit_test/UNIT0143-objsize-null/main.c b/testsuite/c_test/unit_test/UNIT0143-objsize-null/main.c new file mode 100644 index 0000000000..92e72dd879 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0143-objsize-null/main.c @@ -0,0 +1,30 @@ +/* + * (c) Copyright 2015-2019 by Solid Sands B.V., + * Amsterdam, the Netherlands. All rights reserved. + * Subject to conditions in the RESTRICTIONS file. + * (c) Copyright 1989,2005-2006,2009 ACE Associated Computer Experts bv + * (c) Copyright 2005-2006,2009 ACE Associated Computer Experts bv + * All rights reserved. Subject to conditions in RESTRICTIONS file. + */ + +#include "def.h" + +/* Compatibility: Preprocessor condition intended */ +#if defined( CVAL_STDC ) +#include +#include +#else +#include +#include +#endif +#include +void main() +{ + int res, res2; + wchar_t wc; + wc = (wchar_t) 0; + printf("%d\n", __builtin_object_size (NULL, 1)); + res = wctomb(NULL, wc); + wc = (wchar_t) 0177; + res2 = wctomb(NULL, wc); +} diff --git a/testsuite/c_test/unit_test/UNIT0143-objsize-null/test.cfg b/testsuite/c_test/unit_test/UNIT0143-objsize-null/test.cfg new file mode 100644 index 0000000000..2576f49165 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0143-objsize-null/test.cfg @@ -0,0 +1,2 @@ +${MAPLE_BUILD_OUTPUT}/bin/maple -Ih -I. -D_FORTIFY_SOURCE=2 -O2 main.c --debug --save-temps -o main.out +run(main) diff --git a/testsuite/c_test/unit_test/UNIT0144-multilayer-address-assignment/expected.txt b/testsuite/c_test/unit_test/UNIT0144-multilayer-address-assignment/expected.txt new file mode 100644 index 0000000000..e69de29bb2 diff --git a/testsuite/c_test/unit_test/UNIT0144-multilayer-address-assignment/main.c b/testsuite/c_test/unit_test/UNIT0144-multilayer-address-assignment/main.c new file mode 100644 index 0000000000..479d92a6ab --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0144-multilayer-address-assignment/main.c @@ -0,0 +1,28 @@ +int volatile a = 7; + +unsigned char **b; +//unsigned char b; +unsigned char ***c = &b; +unsigned char ****volatile d = &c; +unsigned char f = 6; +signed char fn1(); +void fn2() { + signed char e; + e = fn1(); +} +signed char fn1(int p1, long long p2, unsigned long long p3, int p4) { + unsigned char *g = &f; + unsigned char **h = &g; + *d = &h; // *d 代表c的值，相当于c指针指向了 h的地址，三层解引用后指向的是f + (***c)++; + for (0;; 0) + if (a) + break; + for (0; 0; 0) + ; + return p1; +} + +int main() { fn2(); } + + diff --git a/testsuite/c_test/unit_test/UNIT0144-multilayer-address-assignment/test.cfg b/testsuite/c_test/unit_test/UNIT0144-multilayer-address-assignment/test.cfg new file mode 100644 index 0000000000..bfd783d51c --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0144-multilayer-address-assignment/test.cfg @@ -0,0 +1,2 @@ +compile(main) +run(main) diff --git a/testsuite/c_test/unit_test/UNIT0144-vrp-ssaupdate/expected.txt b/testsuite/c_test/unit_test/UNIT0144-vrp-ssaupdate/expected.txt new file mode 100644 index 0000000000..e69de29bb2 diff --git a/testsuite/c_test/unit_test/UNIT0144-vrp-ssaupdate/main.c b/testsuite/c_test/unit_test/UNIT0144-vrp-ssaupdate/main.c new file mode 100644 index 0000000000..d29e426ae5 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0144-vrp-ssaupdate/main.c @@ -0,0 +1,18 @@ +#define bool _Bool +#define true 1 +#define NULL 0 +static float global_array_5_float_1[5]; +static unsigned char global_unsigned_char_1 = 150U; +void a() +{ + int b; + do global_array_5_float_1[b]++; + while (global_unsigned_char_1 && 1.194720657959972e38); + for (;;) + global_unsigned_char_1 = 0; +} + +int main() { + return 0; +} + diff --git a/testsuite/c_test/unit_test/UNIT0144-vrp-ssaupdate/test.cfg b/testsuite/c_test/unit_test/UNIT0144-vrp-ssaupdate/test.cfg new file mode 100644 index 0000000000..bfd783d51c --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0144-vrp-ssaupdate/test.cfg @@ -0,0 +1,2 @@ +compile(main) +run(main) diff --git a/testsuite/c_test/unit_test/UNIT0145-cmp-fold/expected.txt b/testsuite/c_test/unit_test/UNIT0145-cmp-fold/expected.txt new file mode 100644 index 0000000000..e69de29bb2 diff --git a/testsuite/c_test/unit_test/UNIT0145-cmp-fold/main.c b/testsuite/c_test/unit_test/UNIT0145-cmp-fold/main.c new file mode 100644 index 0000000000..2791ef785f --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0145-cmp-fold/main.c @@ -0,0 +1,26 @@ +#include +unsigned long long int seed = 0; +unsigned char arr_146[1][23][20][22]; +unsigned short arr_149[1][23][20][22]; + +void hash(unsigned long long int *p1, unsigned long long int const p2) { + *p1 ^= p2 + 9 + 0 + 0; +} + +#define max(x, y) x > y ? 0 : y +void test() { + for (long long int i_38 = 0; i_38 < 22; i_38 += 3) { + arr_149[0][0][0][i_38] = max(((_Bool)arr_146[0][0][0][i_38] ? arr_146[0][0][0][i_38] : 0), 578); + } +} + +int main() { + for (size_t i_1 = 0; i_1 < 10; ++i_1) + for (size_t i_3 = 0; i_3 < 2; ++i_3) arr_146[0][i_1][0][i_3] = 254; + test(); + for (size_t i_1 = 0; i_1 < 10; ++i_1) + for (size_t i_3 = 0; i_3 < 9; ++i_3) hash(&seed, arr_149[0][i_1][0][i_3]); + if (seed != 578) { + __builtin_abort(); + } +} \ No newline at end of file diff --git a/testsuite/c_test/unit_test/UNIT0145-cmp-fold/test.cfg b/testsuite/c_test/unit_test/UNIT0145-cmp-fold/test.cfg new file mode 100644 index 0000000000..bfd783d51c --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0145-cmp-fold/test.cfg @@ -0,0 +1,2 @@ +compile(main) +run(main) diff --git a/testsuite/c_test/unit_test/UNIT0145-f128-cross-call/expected.txt b/testsuite/c_test/unit_test/UNIT0145-f128-cross-call/expected.txt new file mode 100644 index 0000000000..e69de29bb2 diff --git a/testsuite/c_test/unit_test/UNIT0145-f128-cross-call/main.c b/testsuite/c_test/unit_test/UNIT0145-f128-cross-call/main.c new file mode 100644 index 0000000000..1bb017ee60 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0145-f128-cross-call/main.c @@ -0,0 +1,36 @@ +#include +#include +#include + +long double power(int, int); +long double radpow(int); + +int main() { + float x, y, z; + x = FLT_MAX / FLT_RADIX; + y = x + radpow(FLT_MAX_EXP - FLT_MANT_DIG - 1); + z = radpow(FLT_MAX_EXP - 1); + if (y != z) { + printf("error %f != %f\n", y, z); + return 1; + } + return 0; +} + +long double power(int base, int n) { + int i; + long double x = 1; + + if (n >= 0) + for (i = 0; i < n; ++i) x *= base; + else + for (i = 0; i < -n; ++i) x /= base; + return (x); +} +/*---------------------------------------------------------------------*\ + * return FLT_RADIX to power n should be exact, * + * if no overflow or underflow. * +\*---------------------------------------------------------------------*/ +long double radpow(int n) { + return power(FLT_RADIX, n); +} diff --git a/testsuite/c_test/unit_test/UNIT0145-f128-cross-call/test.cfg b/testsuite/c_test/unit_test/UNIT0145-f128-cross-call/test.cfg new file mode 100644 index 0000000000..bfd783d51c --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0145-f128-cross-call/test.cfg @@ -0,0 +1,2 @@ +compile(main) +run(main) diff --git a/testsuite/c_test/unit_test/UNIT0145-multi-agg-assign/expected.txt b/testsuite/c_test/unit_test/UNIT0145-multi-agg-assign/expected.txt new file mode 100644 index 0000000000..e69de29bb2 diff --git a/testsuite/c_test/unit_test/UNIT0145-multi-agg-assign/main.c b/testsuite/c_test/unit_test/UNIT0145-multi-agg-assign/main.c new file mode 100644 index 0000000000..d25ad1b1f8 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0145-multi-agg-assign/main.c @@ -0,0 +1,21 @@ +#include + +struct a { + int x; + int *y; +}; + +int g = -1; + +int main() { + int c = 1; + struct a x,y,z,o; + o.y = &c; + x.y = &g; + y = x; + z = y; + o = z; + g++; + return *o.y; +} + diff --git a/testsuite/c_test/unit_test/UNIT0145-multi-agg-assign/test.cfg b/testsuite/c_test/unit_test/UNIT0145-multi-agg-assign/test.cfg new file mode 100644 index 0000000000..bfd783d51c --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0145-multi-agg-assign/test.cfg @@ -0,0 +1,2 @@ +compile(main) +run(main) diff --git a/testsuite/c_test/unit_test/UNIT0146-cmp-fold2/expected.txt b/testsuite/c_test/unit_test/UNIT0146-cmp-fold2/expected.txt new file mode 100644 index 0000000000..e69de29bb2 diff --git a/testsuite/c_test/unit_test/UNIT0146-cmp-fold2/main.c b/testsuite/c_test/unit_test/UNIT0146-cmp-fold2/main.c new file mode 100644 index 0000000000..7613b88b93 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0146-cmp-fold2/main.c @@ -0,0 +1,23 @@ +#define ABORT __builtin_abort +__attribute((noinline)) int foo(int a){ + return (a < 8) || (a > 0x1ffffff) ? 0 : 1; +} + +unsigned int b = 0; +signed char e = 0; + +static long fn2(long p1, unsigned int p2) { + return (p1 < 0) || (p1 > 0x1ffffffffffffff) ? 0 : p1 << p2; +} + +int main(){ + if(!foo(10)){ + ABORT(); + } + if(foo(-1)){ + ABORT(); + } + if(fn2((1 == e) != (b || 3), 6) != 64){ + ABORT(); + } +} diff --git a/testsuite/c_test/unit_test/UNIT0146-cmp-fold2/test.cfg b/testsuite/c_test/unit_test/UNIT0146-cmp-fold2/test.cfg new file mode 100644 index 0000000000..bfd783d51c --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0146-cmp-fold2/test.cfg @@ -0,0 +1,2 @@ +compile(main) +run(main) diff --git a/testsuite/c_test/unit_test/UNIT0146-ret_size_is_32/expected.txt b/testsuite/c_test/unit_test/UNIT0146-ret_size_is_32/expected.txt new file mode 100644 index 0000000000..573541ac97 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0146-ret_size_is_32/expected.txt @@ -0,0 +1 @@ +0 diff --git a/testsuite/c_test/unit_test/UNIT0146-ret_size_is_32/main.c b/testsuite/c_test/unit_test/UNIT0146-ret_size_is_32/main.c new file mode 100644 index 0000000000..46eb01346e --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0146-ret_size_is_32/main.c @@ -0,0 +1,41 @@ +unsigned char a, e, f; +struct U2 { + int f1; +} b, j, l; +int c[32]; +int *d; +volatile long g; +short h = 6; +int i, n = 0, r, s; +unsigned short m, p = 9; +int *o = &n; +void(fn1)(); +static unsigned char(fn2)(unsigned char p1) { + return a + p1; +} +unsigned short fn3() { + for (i; i < 3; i++) g = 0; + g++; + for (1; 1 < 1; 1) + ; + return 9; +} +struct U2 fn4() { + int k[] = {1, 3, 1, 0, 4, 4, 0, 1, 3, 3, 4, 1, 0, 1, 4, 3}; + return j; +} +unsigned int fn5() { + int q = 4; + for (q;; q) { + l = fn4(); + m = fn3(); + p = 0 == ((d = o = &q) != &c); + for (f; f <= 4; f++) h = 0; + for (0; e <= 5; e++) c[q * 4 + 0] = fn2(fn1 || 0); + return 1; + } +} +int main() { + fn5(); + printf("%d\n", c[0]); +} \ No newline at end of file diff --git a/testsuite/c_test/unit_test/UNIT0146-ret_size_is_32/test.cfg b/testsuite/c_test/unit_test/UNIT0146-ret_size_is_32/test.cfg new file mode 100644 index 0000000000..bfd783d51c --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0146-ret_size_is_32/test.cfg @@ -0,0 +1,2 @@ +compile(main) +run(main) diff --git a/testsuite/c_test/unit_test/UNIT0147-band-eliminate/expected.txt b/testsuite/c_test/unit_test/UNIT0147-band-eliminate/expected.txt new file mode 100644 index 0000000000..aa47d0d46d --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0147-band-eliminate/expected.txt @@ -0,0 +1,2 @@ +0 +0 diff --git a/testsuite/c_test/unit_test/UNIT0147-band-eliminate/main.c b/testsuite/c_test/unit_test/UNIT0147-band-eliminate/main.c new file mode 100644 index 0000000000..0ea5b5b0a2 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0147-band-eliminate/main.c @@ -0,0 +1,30 @@ +#include "stdio.h" + +typedef struct { + unsigned long int member_5_0; + unsigned long long int member_5_1; + unsigned long long int member_5_2; +} tf_3_struct_5; + +int a[6]; +int b = 3; + +tf_3_struct_5 tf_3_array_6[1] = {{5566634620210400175UL, 3633139089054659200ULL, 16380977235067372784ULL}}; +int tf_3_var_334 = -2007184200; + +__attribute__((noinline)) void tf_2_foo() { + if ((0 < b) << (0 <= 0) & 0 - 90 - 1) + a[3] = 2; +} + + +__attribute__((noinline)) void tf_3_foo() { + tf_3_var_334 = (0 != tf_3_array_6[0].member_5_0) << 8 & 0x1F40A465; +} + +int main(){ + tf_2_foo(); + tf_3_foo(); + printf("%d\n",a[3]); + printf("%d\n",tf_3_var_334); +} diff --git a/testsuite/c_test/unit_test/UNIT0147-band-eliminate/test.cfg b/testsuite/c_test/unit_test/UNIT0147-band-eliminate/test.cfg new file mode 100644 index 0000000000..bfd783d51c --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0147-band-eliminate/test.cfg @@ -0,0 +1,2 @@ +compile(main) +run(main) diff --git a/testsuite/c_test/unit_test/UNIT0147-ret_size_is_8/expected.txt b/testsuite/c_test/unit_test/UNIT0147-ret_size_is_8/expected.txt new file mode 100644 index 0000000000..f599e28b8a --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0147-ret_size_is_8/expected.txt @@ -0,0 +1 @@ +10 diff --git a/testsuite/c_test/unit_test/UNIT0147-ret_size_is_8/main.c b/testsuite/c_test/unit_test/UNIT0147-ret_size_is_8/main.c new file mode 100644 index 0000000000..ef3790c706 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0147-ret_size_is_8/main.c @@ -0,0 +1,19 @@ +struct { + char a; +} b; +struct c { + char : 1; +} e, f; +int d, g, h; +char *i; +struct c j() { + for (; h;) g = d = 0; + return e; +} +int main() { + char k = 10; + f = j(); + i = &k; + b.a = *i; + printf("%d\n", b); +} \ No newline at end of file diff --git a/testsuite/c_test/unit_test/UNIT0147-ret_size_is_8/test.cfg b/testsuite/c_test/unit_test/UNIT0147-ret_size_is_8/test.cfg new file mode 100644 index 0000000000..bfd783d51c --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0147-ret_size_is_8/test.cfg @@ -0,0 +1,2 @@ +compile(main) +run(main) diff --git a/testsuite/c_test/unit_test/UNIT0150-vrp-deal-switch-overflow/expected.txt b/testsuite/c_test/unit_test/UNIT0150-vrp-deal-switch-overflow/expected.txt new file mode 100644 index 0000000000..e69de29bb2 diff --git a/testsuite/c_test/unit_test/UNIT0150-vrp-deal-switch-overflow/main.c b/testsuite/c_test/unit_test/UNIT0150-vrp-deal-switch-overflow/main.c new file mode 100644 index 0000000000..0cfb9207e8 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0150-vrp-deal-switch-overflow/main.c @@ -0,0 +1,23 @@ +#include "stdint.h" + +int64_t a = -765048523176745064LL; +int64_t b = -922337203685477580; +int64_t c = 922337203685477580; + +void f163(void) { + switch (a) { + case 9223372036854775806: + ++c; + break; + case 0: + --b; + break; + default: + break; + } +} + +int main() { + f163(); + return 0; +} diff --git a/testsuite/c_test/unit_test/UNIT0150-vrp-deal-switch-overflow/test.cfg b/testsuite/c_test/unit_test/UNIT0150-vrp-deal-switch-overflow/test.cfg new file mode 100644 index 0000000000..bfd783d51c --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0150-vrp-deal-switch-overflow/test.cfg @@ -0,0 +1,2 @@ +compile(main) +run(main) diff --git a/testsuite/c_test/unit_test/UNIT0151-agg_param_copy_offset/expected.txt b/testsuite/c_test/unit_test/UNIT0151-agg_param_copy_offset/expected.txt new file mode 100644 index 0000000000..e69de29bb2 diff --git a/testsuite/c_test/unit_test/UNIT0151-agg_param_copy_offset/main.c b/testsuite/c_test/unit_test/UNIT0151-agg_param_copy_offset/main.c new file mode 100644 index 0000000000..f8b149d6a7 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0151-agg_param_copy_offset/main.c @@ -0,0 +1,13 @@ +struct { + unsigned : 3; + long a; + unsigned : 1; +} b; +struct c { + int d; +} __attribute__((aligned(64))); +struct c e; +void f() {} +int main() { + f(e, b); +} diff --git a/testsuite/c_test/unit_test/UNIT0151-agg_param_copy_offset/test.cfg b/testsuite/c_test/unit_test/UNIT0151-agg_param_copy_offset/test.cfg new file mode 100644 index 0000000000..bfd783d51c --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0151-agg_param_copy_offset/test.cfg @@ -0,0 +1,2 @@ +compile(main) +run(main) diff --git a/testsuite/c_test/unit_test/UNIT0152-agg_param_copy_offset2/expected.txt b/testsuite/c_test/unit_test/UNIT0152-agg_param_copy_offset2/expected.txt new file mode 100644 index 0000000000..e69de29bb2 diff --git a/testsuite/c_test/unit_test/UNIT0152-agg_param_copy_offset2/main.c b/testsuite/c_test/unit_test/UNIT0152-agg_param_copy_offset2/main.c new file mode 100644 index 0000000000..5feaf04aa6 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0152-agg_param_copy_offset2/main.c @@ -0,0 +1,39 @@ +#include + +#pragma pack(push) +#pragma pack(1) +struct S0 { + signed f0 : 31; + signed f1 : 24; + unsigned f2 : 26; + uint32_t f3; + unsigned f4 : 31; + unsigned f5 : 15; +} __attribute__((aligned(128))) __attribute__((aligned(2))); +#pragma pack(pop) + +union U1 { + uint8_t f0; + int32_t f1; + int64_t f2; + const uint32_t f3; +} __attribute__((aligned(32))); + +struct S0 g_154[10][4]; +int64_t func_29(); +__attribute__((noinline)) union U1 func_12(union U1 e) { + union U1 f = {}; + func_29(e, g_154[8][3]); + return f; +} + +__attribute__((noinline)) int64_t func_29() { + uint64_t g = 4073709551615; + return g; +} + +int main() { + union U1 e; + func_12(e); + return 0; +} \ No newline at end of file diff --git a/testsuite/c_test/unit_test/UNIT0152-agg_param_copy_offset2/test.cfg b/testsuite/c_test/unit_test/UNIT0152-agg_param_copy_offset2/test.cfg new file mode 100644 index 0000000000..bfd783d51c --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0152-agg_param_copy_offset2/test.cfg @@ -0,0 +1,2 @@ +compile(main) +run(main) diff --git a/testsuite/c_test/unit_test/UNIT0153-cmp-fold3/expected.txt b/testsuite/c_test/unit_test/UNIT0153-cmp-fold3/expected.txt new file mode 100644 index 0000000000..d00491fd7e --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0153-cmp-fold3/expected.txt @@ -0,0 +1 @@ +1 diff --git a/testsuite/c_test/unit_test/UNIT0153-cmp-fold3/main.c b/testsuite/c_test/unit_test/UNIT0153-cmp-fold3/main.c new file mode 100644 index 0000000000..6019a46cee --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0153-cmp-fold3/main.c @@ -0,0 +1,13 @@ +#include +int a; +long b; +long *c = &b; +short d; +unsigned e; +short *f = &d; +int main() { + int *g = &a; + *g = *c = 18446744073709551613; + *f = (e = a) && *g; + printf("%d\n", d); +} diff --git a/testsuite/c_test/unit_test/UNIT0153-cmp-fold3/test.cfg b/testsuite/c_test/unit_test/UNIT0153-cmp-fold3/test.cfg new file mode 100644 index 0000000000..bfd783d51c --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0153-cmp-fold3/test.cfg @@ -0,0 +1,2 @@ +compile(main) +run(main) diff --git a/testsuite/c_test/unit_test/UNIT0153-lower_bitfield_read/expected.txt b/testsuite/c_test/unit_test/UNIT0153-lower_bitfield_read/expected.txt new file mode 100644 index 0000000000..e93f68a7a7 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0153-lower_bitfield_read/expected.txt @@ -0,0 +1,3 @@ +g_569.f8 = 431a810 +e.b = 431bed7 +b.a = f4b95f7 diff --git a/testsuite/c_test/unit_test/UNIT0153-lower_bitfield_read/main.c b/testsuite/c_test/unit_test/UNIT0153-lower_bitfield_read/main.c new file mode 100644 index 0000000000..16818cb752 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0153-lower_bitfield_read/main.c @@ -0,0 +1,45 @@ +#pragma pack(push) +#pragma pack(1) +struct S0 { + signed f0 : 16; + volatile unsigned f1 : 5; + signed f2 : 19; + unsigned f3 : 19; + signed f4 : 22; + volatile signed f5 : 21; + unsigned f6 : 31; + signed f7 : 24; + signed f8 : 28; +} __attribute__((aligned(16), warn_if_not_aligned(8), unused)) __attribute__((deprecated)); +#pragma pack(pop) + +struct S0 g_569 = {4, 2, 122, 200, -1797, 502, 21441, -2866, -6088}; + +#pragma pack(1) +struct { + signed a; + unsigned : 19; + signed : 22; + signed : 21; + unsigned : 31; + signed : 24; + signed b : 28; +} e; + +#pragma pack(1) +struct { + unsigned : 29; + signed a : 30 +} b; + +int main(int argc, char *argv[]) { + g_569.f8 &= 0x5431BED5L; + printf("g_569.f8 = %x\n", g_569.f8); + + e.b = 70368983; + printf("e.b = %x\n", e.b); + + b.a = 256611831; + printf("b.a = %x\n", b.a); + return 0; +} \ No newline at end of file diff --git a/testsuite/c_test/unit_test/UNIT0153-lower_bitfield_read/test.cfg b/testsuite/c_test/unit_test/UNIT0153-lower_bitfield_read/test.cfg new file mode 100644 index 0000000000..bfd783d51c --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0153-lower_bitfield_read/test.cfg @@ -0,0 +1,2 @@ +compile(main) +run(main) diff --git a/testsuite/c_test/unit_test/UNIT0156-slp-cvt/expected.txt b/testsuite/c_test/unit_test/UNIT0156-slp-cvt/expected.txt new file mode 100644 index 0000000000..e69de29bb2 diff --git a/testsuite/c_test/unit_test/UNIT0156-slp-cvt/main.c b/testsuite/c_test/unit_test/UNIT0156-slp-cvt/main.c new file mode 100644 index 0000000000..756a8ad9ee --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0156-slp-cvt/main.c @@ -0,0 +1,19 @@ +typedef int i32; +typedef unsigned long long u64; + +__attribute__((noinline)) +void foo(i32 * __restrict__ dst, u64 x) { + // When tree node type (u64 here) is different from tree type (i32 here), + // SLP should add extra cvt if needed. + dst[0] &= x; + dst[1] &= x; + dst[2] &= x; + dst[3] &= x; +} + +int main() { + i32 arr[] = { 1, 2, 3, 4 }; + foo(arr, 42); + return 0; +} + diff --git a/testsuite/c_test/unit_test/UNIT0156-slp-cvt/test.cfg b/testsuite/c_test/unit_test/UNIT0156-slp-cvt/test.cfg new file mode 100644 index 0000000000..bfd783d51c --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0156-slp-cvt/test.cfg @@ -0,0 +1,2 @@ +compile(main) +run(main) diff --git a/testsuite/c_test/unit_test/UNIT0157-unionreplace-blockprop/expected.txt b/testsuite/c_test/unit_test/UNIT0157-unionreplace-blockprop/expected.txt new file mode 100644 index 0000000000..e69de29bb2 diff --git a/testsuite/c_test/unit_test/UNIT0157-unionreplace-blockprop/main.c b/testsuite/c_test/unit_test/UNIT0157-unionreplace-blockprop/main.c new file mode 100644 index 0000000000..11c143f711 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0157-unionreplace-blockprop/main.c @@ -0,0 +1,29 @@ +union A { + struct { + short a; + char b; + char c; + } x; + int y; +}; + +union A bar() { + union A tmp; + tmp.y = -1; + tmp.x.c = 0; + return tmp; +} + +__attribute__ ((noinline)) +union A foo() { + union A tmp = bar(); + return tmp; +} + +int main() { + union A a = foo(); + if (a.y != 0xffffff) { + abort(); + } + return 0; +} diff --git a/testsuite/c_test/unit_test/UNIT0157-unionreplace-blockprop/test.cfg b/testsuite/c_test/unit_test/UNIT0157-unionreplace-blockprop/test.cfg new file mode 100644 index 0000000000..e34d4e6a74 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0157-unionreplace-blockprop/test.cfg @@ -0,0 +1,3 @@ +CO2: +${MAPLE_BUILD_OUTPUT}/bin/maple -O2 -w --me-opt=--no-lfo --mpl2mpl-opt=skip-phase=inline main.c -o main.out +run(main) diff --git a/testsuite/c_test/unit_test/UNIT0158-combine-expr/expected.txt b/testsuite/c_test/unit_test/UNIT0158-combine-expr/expected.txt new file mode 100644 index 0000000000..bf5ac316de --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0158-combine-expr/expected.txt @@ -0,0 +1 @@ +57599 diff --git a/testsuite/c_test/unit_test/UNIT0158-combine-expr/main.c b/testsuite/c_test/unit_test/UNIT0158-combine-expr/main.c new file mode 100644 index 0000000000..4d67f3bfec --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0158-combine-expr/main.c @@ -0,0 +1,13 @@ +#include +unsigned long long v1 = 5377200902884199157ULL; +unsigned long long v2 = 1472021309062005192ULL; +unsigned long long a3[4] = {2906898799466251612ULL, 12047080636815031788ULL, 5720228187380325504ULL, 4686459395656900808ULL}; +__attribute__((noinline)) void foo() { + v1 = 0 | 64513 & a3[3] ^ 0 | 0 | 0 | + (unsigned char)(0 | v2 | 5198792770519039); +} + +int main(){ + foo(); + printf("%llu\n", v1); +} diff --git a/testsuite/c_test/unit_test/UNIT0158-combine-expr/test.cfg b/testsuite/c_test/unit_test/UNIT0158-combine-expr/test.cfg new file mode 100644 index 0000000000..bfd783d51c --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0158-combine-expr/test.cfg @@ -0,0 +1,2 @@ +compile(main) +run(main) diff --git a/testsuite/c_test/unit_test/UNIT0158-ivopt-implicitcvt/expected.txt b/testsuite/c_test/unit_test/UNIT0158-ivopt-implicitcvt/expected.txt new file mode 100644 index 0000000000..e69de29bb2 diff --git a/testsuite/c_test/unit_test/UNIT0158-ivopt-implicitcvt/main.c b/testsuite/c_test/unit_test/UNIT0158-ivopt-implicitcvt/main.c new file mode 100644 index 0000000000..e6339f2b91 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0158-ivopt-implicitcvt/main.c @@ -0,0 +1,18 @@ +long long a[8]; + +__attribute__ ((noinline)) +void test(int step, int cond) { + // we will generate add with implicit conversion for "i", + // this may cause unexpected optimization behavior. + for (int i = ((unsigned long long)cond >= 0); i < 6; i += step + 1) { + a[i] = 1; + } +} + +int main() { + test(1, 1); + if (a[7] != 0) { + abort(); + } + return 0; +} diff --git a/testsuite/c_test/unit_test/UNIT0158-ivopt-implicitcvt/test.cfg b/testsuite/c_test/unit_test/UNIT0158-ivopt-implicitcvt/test.cfg new file mode 100644 index 0000000000..12276add4f --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0158-ivopt-implicitcvt/test.cfg @@ -0,0 +1,3 @@ +CO2: +compile(main) +run(main) diff --git a/testsuite/c_test/unit_test/UNIT0158-ra-loopsplit/expected.txt b/testsuite/c_test/unit_test/UNIT0158-ra-loopsplit/expected.txt new file mode 100644 index 0000000000..e69de29bb2 diff --git a/testsuite/c_test/unit_test/UNIT0158-ra-loopsplit/main.c b/testsuite/c_test/unit_test/UNIT0158-ra-loopsplit/main.c new file mode 100644 index 0000000000..32af44e357 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0158-ra-loopsplit/main.c @@ -0,0 +1,515 @@ +int r, k, z, m, p, q, s, v, w, x, ab, ad, ae, af, ag, ah, ai, aj, ak, al, am, + an, ao, ap, aq, ar; +struct w { + signed x; + signed y; + unsigned b : 7; +} __attribute__((aligned(32))); +struct aa { + int x; +} j, u, as; +union { + int x; + struct aa ac; +} y, at, au; +char a, g, l, av, aw, ax, ay, az, ba; +short h, bb, bc, bd, be, bf, bg, bh, bi, bj, bk; +int* n; +long long t, bl; +int** bm = &n; +struct w bn; +long long bo[][10150]; +char* bp = &a; +long bq, br, bs, bt, bu; +unsigned bv; +long long* bw; +char(bx)(); +char(by)(bz) { + return bz < 0 || bz; +} +static short(ca)() {} +int(cb)(); +static int(cc)() {} +static int(cd)() {} +static long(ce)() {} +static char(cf)() {} +static short(cg)() {} +short(ch)(); +int(ci)() { + return r; +} +static int(cj)() {} +static int(ck)() {} +static int(cl)(bz) {} +static long(cm)(bz) {} +static long(cn)() {} +long(co)(bz, cp) { + return cp; +} +struct w cq() { + long cr; + 0; + 0; + 2; + 2; + 9; + struct w cs = {80119786146}; + 6; + long long* ct = &t; + 0; + char cu[0]; + 0; + 5; + 1; + 9; + 6; + 0; + 0; + for (ca; aj < 10; aj++) + 4; + int c = c = 0, cv = 0; + 0; + g = c = c && 2; + 0; + 0; + 0; + short cw = br = 2, o = bf = 9; + 0; + *ct = bj = 0; + 0; + if (9) + 0; + c; + x; + 3; + 0; + 1; + 0; + for (c; aj < 4; aj++) { + 0; + for (0;; ak++) + 0; + for (0;; al++) + 0; + } + by; + if (0) + ; + else { + short cx[] = {5, 5, 5, 5, 5, 5}; + 5; + 5; + int cy = 6, cz = 7, db = c = x; + struct aa dd[] = { + j, j, j, j, j, 0, j, j, j, j, j, j, j, j, 0, j, j, j, j, j, j, j, j, j, + j, j, j, j, j, j, j, j, 0, 0, j, j, j, j, j, 0, 0, j, j, j, j, j, j, j, + j, 0, j, j, j, j, j, j, j, j, j, j, j, j, 0, j, j, j, j, j, j, j, j, j, + j, 0, j, j, j, j, 0, j, j, j, 0, j, j, j, j, 0, j, j, j, j, j, j, j, j, + j, j, j, j, j, j, 0, j, j, j, j, j, j, 0, 0, j, j, j, j, 0, j, j, j, j, + 0, j, j, j, j, j, j, j, j, j, j, j, j, j, j, 0, j, j, j, j, 0, j, j, j, + 0, j, j, j, j, j, j, j, j, j, j, j, j, 0, 0, j, j, j, j, 0, 0, j, j, j, + j, j, j, j, j, j, j, j, j, j, j, j, j, j, 0, 0, j, j, j, j, j, 0, 0, j, + j, j, j, j, j, j, j, 0, j, j, j, j, j, j, j, j, 0, j, j, 0, j, j, 0, j}; + ca; + long long de = 1; + long long* df = &de; + const unsigned long long* dg = &bl; + const unsigned long long** dh = &dg; + struct w di[] = {80369097, 0, 5, 0, 308, 8, 2, 0, 5, 0, 80, 0, 7, 0, 0, + 7, 0, 5, 0, 308, 8, 2, 0, 5, 0, 80, 0, 7, 0, 0, + 7, 0, 5, 0, 308, 8, 2, 0, 5, 0, 80, 0, 7, 0, 0, + 7, 0, 5, 0, 308, 8, 2, 0, 5, 0, 80, 0, 7}; + 2; + by; + int e[] = {bv, bv, bv}; + int* dj = 0; + for (x; aj < 2; aj++) { + 0; + for (0;; ak++) + dj = &z; + } + bd = 2; + for (bd; bd; bd--) { + int d[] = {au.x, au.x, au.x, au.x}; + int* dk = &au.x; + cc; + char f[] = {6, 8, 8, 6, 5, 5, 6, 5, 5, 2, 5, 5, 2, 1, 4, 2, 4, 1, + 6, 8, 8, 6, 5, 5, 6, 5, 5, 2, 5, 5, 2, 1, 4, 2, 4, 1, + 6, 8, 8, 6, 5, 5, 6, 5, 5, 2, 5, 5, 2, 1, 4, 2, 4, 1}; + z = 0; + for (z; z <= 0; z++) { + f; + 0; + char* dl = &l; + struct w dm = {6}; + *(*bm = dk); + cy = 0 ? 0 : bo[z][bd + 1]; + by(4 ^ (af = 0)); + cr = co(cy, bq); + (*dl = bo[z][0]) ^ 0; + cz = *bp; + if (cz) { + short dn = x = av; + int d[] = {1, 0, 0, 1, 0, 0, 1}; + d; + 0; + ae = dn = (c = *dl = 9) && f; + by; + return dm; + } else + 0; + ++cu[4]; + } + bc = 0; + for (bc; bc <= 0; bc++) + cy |= bo[bc][bd] & ci(); + } + da: + if (cu) + 8; + c = c = *ct = 0 || k; + ai = ck(); + 0; + 0; + 0; + 7; + int b[] = {1, 0, 1, 1, 0, 1, 1, 0, 1}; + 0; + ad = cy; + 0; + 0; + 0; + b; + 0; + *dh = df = bw = &bo[0][8]; + if (*dh) { + at; + 0; + av; + if (0) { + c = p = cv = cv--; + for (1;;) + u; + struct aa t58[] = { + u, 0, u, 0, u, u, u, u, u, 0, u, u, u, u, u, u, 0, u, u, u, 0, 0, + 0, u, u, u, u, u, 0, u, u, u, u, u, u, 0, u, u, u, u, u, u, u, u, + u, u, u, 0, u, u, u, u, u, u, u, u, u, u, u, u, 0, 0, 0, u, u, u, + u, u, u, u, u, u, u, u, u, u, u, u, u, u, u, u, u, u, u, u, 0, u, + u, u, u, u, u, u, u, u, 0, u, u, u, u, u, u, u, 0, 0, u, 0, u, u, + u, u, u, u, 0, 0, u, u, 0, u, u, u, u, 0, u, u, u, u, u, u, u, u, + u, u, u, u, u, u, u, u, u, u, u, u, u, 0, u, u, u, u, u, u, 0, u, + u, u, u, u, u, u, 0, u, u, u, u, u, u, u, u, u, u, u, 0, u, 0, u, + u, 0, u, u, u, u, u, 0, 0, 0, 0, u, u, u, u, u, 0, u, u, 0, u, 0, + u, u, u, u, 0, u, u, u, 0, u, u, u, u, 0, u, u, u, 0, u, u, u, u, + u, u, u, 0, u, u, 0, u, u, u, u, u, u, u, u, u, u, u, 0, u}; + ca; + if (5048255640698476) + goto dc; + 0; + e; + } else + 1; + 8; + be; + dc: + for (8;;) + return bn; + 0; + } else + 2; + struct aa t59[6] = {{}, {}, {}, {}, 1}; + struct w t60 = {6}; + 0; + 0; + ay = cf(); + 0; + c = co(bq && 0); + bh = cg(); + bi = ca(); + 0; + c = ce(); + c = h = c = ah = cc(); + cc; + 0; + db = cg(); + c; + c; + for (c;;) { + 0; + 0; + 0; + int f[] = {208531365, 905889, 905889, 208531365, 8, 5, 8, + 208531365, 905889, 8, 905889, 1, 0, 0, + 1, 905889, 8, 8, 0, 5, 0, + 5, 0, 8, 8, 905889, 1, 0, + 0, 1, 905889, 8, 905889, 208531365, 8, + 5, 8, 208531365, 905889, 1}; + 0; + 0; + char t61 = 0; + 5; + bs = cn(); + bt = cm(0 || bs); + ax = cf(); + bg = ca(); + ag = cj(); + (t61 = (bw = 0) && 1) || 4; + bc = cd(); + if (bc) { + be; + f; + f; + bm; + *bm = dj; + } else if (4073709551615) + goto da; + 0; + 1; + for (1;;) + return t60; + } + 6; + 0; + } + 0; + aw; + for (0;;) + cb; +} +void fn19() { + int t73 = 5, t74 = 0; + 1; + 0; + bb; + 4; + long t75 = 5; + for (1;;) { + short t76 = 5, t77 = t76 = 0; + 0; + int t78[] = {9, 9, 9, 9}; + 9; + 6; + int t79 = be, t80 = t73 = t73++; + for (as;;) + 0; + 0; + int t81[250] = {v, v, v, v, 0, v, v, v, v, v, v, v, v, v, v, v, v, v, v, + v, v, v, v, v, v, v, v, v, v, 0, v, v, v, v, v, v, v, v, + v, v, v, v, v, v, v, v, 0, v, v, v, v, v, v, 0, v, v, v, + v, v, 0, v, v, 0, 0, v, v, v, v, 0, v, v, v, 0, v, v, v, + v, v, v, v, v, 0, v, v, 0, v, v, v, v, v, v, v, v, v, v, + v, v, v, v, v, v, v, v, v, v, v, v, 0, 0, v, v, v, v, v, + v, v, v, v, v, v, v, v, v, v, v, v, v, v, v, v, 0, v, v, + v, v, v, v, v, v, v, v, v, v, v, v, v, 0, v, v, v}; + 0; + 0; + char t82 = m = m++; + for (1;;) { + struct aa t83[] = {y.ac, y.ac, j, y.ac, y.ac, j, y.ac, y.ac, j, + y.ac, y.ac, j, y.ac, y.ac, j, y.ac, y.ac, j, + y.ac, y.ac, j, y.ac, y.ac, j, y.ac, y.ac, j}; + 1; + int t84 = w = w++; + for (1;;) { + short t85[] = {t76, t76, 0, 0, t76, t76, 0, 0, t76, t76, t76, 0, + 0, t76, t76, 0, 0, t76, t76, 0, t76, t76, 0, 0, + t76, t76, 0, 0, t76, t76, t76, 0, 0, t76, t76, 0, + 0, t76, t76, 0, t76, t76, 0, 0, t76, t76, 0, 0, + t76, t76, t76, 0, 0, t76, t76, 0, 0, t76, t76, 0}; + 0; + 1; + for (1;;) + 4; + 0; + 1; + for (1;;) + 8; + int t86[][24] = { + 3, 0, 8, 1, 0, 7, + 0, 1, 0, 0, 4, 1, + 0, 7, 1, 0, 1, 0, + 0, 4, 5, 7, 5, 8, + 0, 0, 0, 5, 8, 4, + 9, 4, 0, 6, 2, 9, + 9, 4, 7, 1, 0, 5, + 0, 4, 1, 7, 5, 0, + 4, 0, 1, 0, 2, 7, + 0, 9, 7, 4, 4, 3, + 7, 1, 2, 0, 2, 1, + 9, 4, 0, 6, 5, 4, + 9, 5, 1, 1, 4, 3, + 1, 0, 1, 2, 0, 9, + 0, 3, 0, 3, 0, 4, + 1, 0, 1, 0, 0, 0, + {}, {7, 4, 0}, {0, 1, 1}, {7, 0, 0}, {4, 2, 1}, {7, 0, 0}, + {0, 1, 4}, {9, 4, 1}, 0, 0, 7, 4, + 0, 5, 0, 0, 5, 0, + 7, 7, 3, 1, 8, 0, + 3, 2, 0, 0, 4, 4, + 3, 0, 5, 1, 1, 5, + 0, 8, 4, 1, 0, 2, + 9, 0, 1, 0, 0, 4, + 1, 7, 9, 6, 1, 2, + 6, 0, 0, 1, 4, 5, + 0, 8, 4, 9, 1, 1, + 1, 1, 4, 0, 0, 1, + 1, 8, 0, 3, 0, 7, + 0, 1, 5, 3, 3, 4, + 1, 0, 1, 7, 4, 0, + 5, 1, 5, 5, 9, 1, + 7, 1, 6, 1, 0, 1, + 4, 1, 0, 0, 0, 0, + 1, 0, 1, 0, 0, 3, + 1, 1, 3, 0, 1, 4, + 1, 0, 0, 8, 8, 5, + 0}; + 1; + by; + by; + } + 0; + 1; + for (1;;) + 0; + 0; + 1; + for (1;;) + 0; + 8; + 8; + char t87[] = {8, 8, 8, 8, 0, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 0, 0, 8, + 8, 8, 8, 0, 8, 0, 0, 0, 8, 8, 8, 8, 8, 0, 8, 0, 8, 0, + 8, 0, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 0, 8, 8, 8, 8, 8}; + 0; + 0; + 0; + break; + 0; + as; + if (0) + continue; + 0; + 1; + for (1;;) { + ca; + int t88[] = {ab, 1, av, 1, ab, ab, 1, av, t73, av, t73, + t73, av, t73, 1, 1, av, av, 1, 1, 1, av, + t73, t73, av, t73, av, t73, ab, ab, 1, av, 1, + ab, ab, t73, t73, 0, t73, t73, t73, t73}; + struct aa t89 = {}; + as; + if (0) { + int t90 = ap = 0; + 0; + short t91[] = {bb, bb, bb, bb, bb, bb, bb, bb, bb, bb, bb, bb, bb, bb, + bb, bb, bb, bb, bb, bb, bb, bb, bb, bb, bb, bb, bb, bb, + bb, bb, bb, bb, bb, bb, bb, bb, bb, bb, bb, bb, bb, bb, + bb, bb, bb, bb, bb, bb, bb, bb, bb, bb, bb, bb, bb, bb, + bb, bb, bb, bb, bb, bb, bb, bb, bb, bb, bb, bb, bb, bb, + bb, bb, bb, bb, bb, bb, bb, bb, bb, bb, bb, bb, bb, bb, + bb, bb, bb, bb, bb, bb, bb, bb, bb, bb, bb, bb, bb, bb, + bb, bb, bb, bb, bb, bb, bb, bb, bb, bb, bb, bb, bb, bb, + bb, bb, bb, bb, bb, bb, bb, bb}; + 5; + 0; + 0; + 0; + for (0;; aq++) + 0; + for (0;; ao++) + 0; + for (0;; ar++) + 0; + 0; + 1; + 0; + ca; + 0; + 0; + 0; + ca; + ca; + } else + 0; + if (0) + break; + } + } + 0; + 1; + for (1;;) { + int t92 = 5, t93 = q = q++, o = am = 0; + 5; + 0; + 1; + for (1;;) + 9; + for (1;;) { + int i = 0; + for (0;; i++) + 3; + 0; + ca; + } + if (0) { + 0; + 3; + int t94 = s = 0; + t82; + } else + 1; + 5; + 0; + 0; + 0; + 0; + ca; + 0; + cl(bk && 5) && t73; + 0; + 0; + an; + 0; + ca; + 0; + 8; + am; + t92 = ch(am && t73); + 0; + 1; + for (1;;) + 1; + if (1) + break; + 0; + 1; + for (1;;) + ; + } + az = by(4); + 0; + t74 = t75 = 0; + 0; + as; + long o = bu = 0 ? 0 : t73; + ca; + 0; + 0; + 0; + bx() || 6; + 0; + 0; + ba; + cb() || 0; + 0; + ch() && 8; + t80 = t79 = 0; + 0; + 1; + for (1;;) + ; + } +} +void main() { + cq(); +} diff --git a/testsuite/c_test/unit_test/UNIT0158-ra-loopsplit/test.cfg b/testsuite/c_test/unit_test/UNIT0158-ra-loopsplit/test.cfg new file mode 100644 index 0000000000..bfd783d51c --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0158-ra-loopsplit/test.cfg @@ -0,0 +1,2 @@ +compile(main) +run(main) diff --git a/testsuite/c_test/unit_test/UNIT0158-vrp-deal-cvt/expected.txt b/testsuite/c_test/unit_test/UNIT0158-vrp-deal-cvt/expected.txt new file mode 100644 index 0000000000..c6fffe699a --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0158-vrp-deal-cvt/expected.txt @@ -0,0 +1 @@ +left - right = 1698283974 diff --git a/testsuite/c_test/unit_test/UNIT0158-vrp-deal-cvt/main.c b/testsuite/c_test/unit_test/UNIT0158-vrp-deal-cvt/main.c new file mode 100644 index 0000000000..961ef1a041 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0158-vrp-deal-cvt/main.c @@ -0,0 +1,20 @@ +#include "stdio.h" +#define max(a, b) \ + ({ \ + __typeof__(a) _a = (a); \ + __typeof__(b) _b = (b); \ + _a > _b ? _a : _b; \ + }) +#define min(a, b) \ + ({ \ + __typeof__(a) _a = (a); \ + __typeof__(b) _b = (b); \ + _a < _b ? _a : _b; \ + }) +int main() { + printf("left - right = %llu\n", ((unsigned long long int)(/*left*/(min((1648961877U), + (((unsigned int)(unsigned char)8)))) - /*right*/(((unsigned int)min( + (min((-1698283966), (((/* implicit */ int)(_Bool)1)))), + (((/* implicit */int)(unsigned char)90)))))))); + return 0; +} diff --git a/testsuite/c_test/unit_test/UNIT0158-vrp-deal-cvt/test.cfg b/testsuite/c_test/unit_test/UNIT0158-vrp-deal-cvt/test.cfg new file mode 100644 index 0000000000..bfd783d51c --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0158-vrp-deal-cvt/test.cfg @@ -0,0 +1,2 @@ +compile(main) +run(main) diff --git a/testsuite/c_test/unit_test/UNIT0159-ra-loopspilt-with-nested/expected.txt b/testsuite/c_test/unit_test/UNIT0159-ra-loopspilt-with-nested/expected.txt new file mode 100644 index 0000000000..573541ac97 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0159-ra-loopspilt-with-nested/expected.txt @@ -0,0 +1 @@ +0 diff --git a/testsuite/c_test/unit_test/UNIT0159-ra-loopspilt-with-nested/main.c b/testsuite/c_test/unit_test/UNIT0159-ra-loopspilt-with-nested/main.c new file mode 100644 index 0000000000..fd837067b3 --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0159-ra-loopspilt-with-nested/main.c @@ -0,0 +1,255 @@ +int printf(const char *, ...); +union aa { + long a; +} __attribute__((aligned(64))); +long long a; +short b, j, w, m, t, ab, ac, ad, ae, af, ag, ah, ai, aj, ak, al, t34, am, an, ao, ap; +int c, d, v, k, o, x, aq, ar, as, at, au, av, aw, ax, y, ay, az, ba, bb, bc, bd, z, be, bf, bg, bh, bi; +char f, q, r, s, u, bj, bk, bl, bm, bn, bo, bp, bq, br, bs, bt, bu, bv, bw, bx; +int g[][2]; +long h, n, by, bz, ca, cb, cc, cd, ce, cf, cg, ch, ci, cj, ck, cl; +int *volatile l = &k, *cm; +int ***p; +union aa cn, co, cp, cq; +static char(cr)() {} +static char(cs)() {} +static char(ct)() {} +short(cu)(); +static short(cv)(cw) {} +static int(cx)() {} +static int(cy)() {} +static int(cz)() {} +static int(da)(cw) {} +static int(db)(cw) {} +static int(dc)() {} +static long(dd)() {} +long(de)(cw, df) { + return df; +} +long(dg)(); +void(dh)(cw) {} +static char(di)() {} +static char(dj)(cw) {} +char(dk)(); +static short(dl)(cw) {} +static long(dm)() {} +long(dn)(cw) { + return cw; +} +union aa fn22() { + int *t70 = &o; + int t71 = 7, t72 = 2, t73 = 4, t74 = 0, t75 = 5, t77 = 0, i = 0; + int t76[75] = {9, 2, 0, 7, 0, 1, 9, 0, 0, 0, 3, 3, 3, 2, 2, 2, 3, 2, 0, 1, 9, 3, 7, 9}; + union aa t78 = {}; + for (0; 0; i++) bc = 0; + for (ct; bc; bc++) bu = 1; + for (ct; h != 1; h--) { + union aa t79 = co; + int t80 = 0, t81 = 0; + int t82[][40] = {{9, 9, 4073709551609, 6, 3, 8, 7, 9, 1, 9, 9, 1, 4073709551609, 6, 3, 6, 7, 4, 1, 4, + 9, 9, 4073709551609, 6, 3, 8, 7, 9, 1, 9, 9, 1, 4073709551609, 6, 3, 6, 7, 4, 1}, + 9, + 9, + 4073709551609, + 6, + 3, + 8, + 7, + 9, + 1, + 9, + 9, + 1, + 4073709551609, + 6, + 3, + 6, + 7, + 4, + 1, + 4, + 9, + 9, + 4073709551609, + 6, + 3, + 8, + 7, + 9, + 1, + 9, + 9, + 1, + 4073709551609, + 6, + 3, + 6, + 7, + 4, + 1}; + 6; + int ***t83[] = {p, p, p, p, p, p, p, 0, 0, p, p, p, 0, 0, p, p, p, p, p, p, p, 0, p, p, p, + 0, p, 0, p, p, p, p, p, p, p, p, p, p, 0, 0, 0, p, p, p, p, p, p, p, p}; + short t84[] = {4, 3, 3, 4, 3, 3, 4, 3}; + 4; + short t85 = ae = 0; + for (cs;; ++ae) { + 0; + 6; + long long *t86 = &a; + int t87 = 0, t88; + short *t89 = ∾ + int *t90[] = {0, 0, 0, 0, &v, 0, 0, &v, 0, 0, 0, 0, 0, 0, 0, + &g[2][1], 0, 0, 0, &v, &g[2][1], &g[2][1], &v, 0, 0, 0, &g[2][1], 0, 0, 0, + 0, 0, 0, 0, &v, 0, 0, &v, 0, 0, 0, 0, 0, 0, 0, + &g[2][1], 0, 0, 0, 0, &v, &v, 0, 0, 0, 0, &v, 0, 0, 0, + &g[2][1], 0, 0, &g[2][1], 0, &g[2][1], &g[2][1], 0, &g[2][1], 0, 0, &g[2][1], 0, 0, 0, + &v, 0, 0, 0, 0, &v, &v, 0, 0, 0, 0, &v, 0, 0, 0, + &g[2][1], 0, 0, &g[2][1], 0, &g[2][1], &g[2][1], 0, &g[2][1], 0, 0, &g[2][1], 0, 0, 0, + &v, 0, 0, 0, 0, &v, &v, 0, 0, 0, 0, &v, 0, 0, 0, + &g[2][1], 0, 0, &g[2][1], 0, &g[2][1], &g[2][1], 0, &g[2][1], 0, 0, &g[2][1], 0, 0, 0, + &v, 0, 0, 0, 0, &v, &v, 0, 0, 0, 0, &v, 0, 0, 0, + &g[2][1], 0, 0, &g[2][1], 0, &g[2][1], &g[2][1], 0, &g[2][1], 0, 0, &g[2][1], 0, 0, 0, + &v, 0, 0}; + char *t91 = &s; + union aa t92 = cn; + long t93 = i = 0; + for (i; i < 2; i++) t88 = ad = ad = ca; + for (5; 0;) { + int t94 = 0, t100 = 1, t102 = 2; + union aa t95 = {4073709551615}, t103 = {2}; + int t96[] = {0, 0, 6, 6, 0, 0, 0, 6, 6, 0}; + for (0;; i++) cq = co; + for (0;; i++) 4073709551615; + if (at) break; + 0; + 0; + for (0;;) { + char t97[] = {u, u, 0, 0, u, 0, 0, u, 0, u, u, u, bk, bk, u, u, 0, bk, u, 0, 0, 0, u, bk, + u, 0, u, bk, bk, u, 0, u, bk, u, 0, u, 0, u, 0, 0, 0, u, bk, 0, u, u, bk, 0}; + int t98 = u = u = bz; + for (ct;;) 0; + c = *t70 = bw; + af && (t98 = 0); + return t95; + } + if (0) { + long t99 = a = bw; + for (0;; i++) be = x; + for (i;; i++) bf = 0; + for (i;; i++) ck = q = 0; + for (0;;) t94 = at = t80 = ae; + ap = cu() && ci; + bt = *t86 = q = bt = *t70 = ct(); + 0; + ct; + bb = ct(); + ch = dg(); + t81 = cv(t70 && bv && (t99 = *t70 = 1)); + } else + by; + int t101[] = {4, 4, 1, 0, 1, 2, 3, 1, 2, 2, 2, 1, 0, 7, 4, 1, 2, 3, 0, 1, 4, 4, 1, 0}; + for (1;;) bv; + t102 = t100 = *t70 = *t70; + for (1;;) w; + for (i;; i++) + for (ct;; bc++) + for (bd;; bd++) bg = 0; + 0; + bs = *t70 = z = dg(); + *t70 = cj++; + return t103; + } + t80 = dl(&bv != (cp, (void *)0) || cl) != 6; + if (t80) { + int ***t104 = p; + short t105 = ac; + int t106[][10][1] = {{}, {}, {}, {}, {}, {}, {}, {}, {1}, {{}, {}, {}, {}, {}, {}, {}, {}, 1}, + {}, {}, {}, {}, {}, {}, {}, {}, 1}; + for (i; i < 1;) 0; + for (i; i < 5; i++) 5; + if (ae) break; + t73 = 1; + for (t73; t73 <= 6; t73++) { + t72 = *t70 = p != t83 & bl; + 0; + if ((*t86 = ae) ^ 1) { + short t107 = 4, t109 = 6; + short t108[] = {b, 0, 0, b, 0, b, b, 0, b, b, 0, b, 0, 0, b, b, j, j, b, j, b, b, b, b, b}; + int t110 = aq; + an = ct(); + az = db(&bv == t91 || cr); + *t89 = *t70 = cv(); + ba = da(ao || cl); + m = t107 = cl < (t109 = cl | cl); + bh = ct(); + bx = cr(); + ce = dn((*l = 4) <= (dh(bx && cs), *t70)); + *t91 = f = 0; + bp = di(); + bq = cs(); + cf = de(bq <= t, *t70); + y = cy(); + 4073709551615; + ay = cx(); + br = dj(*t86--); + am = cs(); + cg = dd(); + *t70 = dc(); + if (t109) break; + } + } + ax = cz(); + co; + ak = cs(); + al = cs(); + cd = dm(); + t34 = cs() & (t106[2][7][0] < cl || bv) && r; + bo = cs(); + *t89 &= ct() >= bv || 0; + if (*t89) { + char t111[][4] = {{bz, 0, bz}, bk, bz, q, q, bz, q, q, bz, {q, q, bz}, bz, bk, q}; + char t112 = bz, t113 = bz = 0, t114 = 1; + for (7; 0; --t71) { + int *t115 = &t73; + aw = ct(); + bv || de(bj & (t88 = *t70 = 0)); + *t91 || t93; + aj = cu(); + cc = dg(); + bm = dk(); + *t70 = ah = cu(); + au = db(); + ai = cu(); + t114 = bv = ar-- & 7 ^ ai; + av = ct(); + bn = cs(); + t77 = dg() < 9; + t115 = cm = &t74; + } + } else { + union aa t116 = {5}; + for (i; i < 3; i++) bi = n = 2; + for (cr; n; n--) 0; + return t116; + } + for (0; 0; t75--) return cn; + } + at = 0; + for (at; at <= 4; at++) { + int t117[] = {0, 0, 0, 0, 1, 0, 0, 5, 0, 5, 0, 0, 0, 1, 1, 0, 0, 0, + 1, 3, 0, 8, 1, 0, 0, 0, 6, 5, 5, 0, 0, 4, 0, 0, 5, 5}; + int t118 = 0, e = cb = *t70 = t118; + for (0; 0; o--) t118 = ab = ab <= as; + *t70 = d; + for (0; 0; t87++) ag = cu(); + } + } + } + return t78; +} +int main() { + s--; + fn22(); + printf("%d\n", s); +} diff --git a/testsuite/c_test/unit_test/UNIT0159-ra-loopspilt-with-nested/test.cfg b/testsuite/c_test/unit_test/UNIT0159-ra-loopspilt-with-nested/test.cfg new file mode 100644 index 0000000000..bfd783d51c --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0159-ra-loopspilt-with-nested/test.cfg @@ -0,0 +1,2 @@ +compile(main) +run(main) diff --git a/testsuite/c_test/unit_test/UNIT0160-select-volatile/main.c b/testsuite/c_test/unit_test/UNIT0160-select-volatile/main.c new file mode 100644 index 0000000000..0f8cb18fae --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0160-select-volatile/main.c @@ -0,0 +1,15 @@ +int a, b, c, d; + +void testSelectVolatile() { + for (0;; 0) { + volatile unsigned long e = 1; + for (1;; 1) { + d = a > 0 && c > 0 && a > 7; + e = b; + // will generate select opt chance here + if (c) + break; + } + } +} +int main() {} diff --git a/testsuite/c_test/unit_test/UNIT0160-select-volatile/test.cfg b/testsuite/c_test/unit_test/UNIT0160-select-volatile/test.cfg new file mode 100644 index 0000000000..db62dbd2ca --- /dev/null +++ b/testsuite/c_test/unit_test/UNIT0160-select-volatile/test.cfg @@ -0,0 +1,2 @@ +CO2: +compile(main) diff --git a/testsuite/driver/config/aarch64-clang-debug.conf b/testsuite/driver/.config/aarch64-clang-debug.conf similarity index 96% rename from testsuite/driver/config/aarch64-clang-debug.conf rename to testsuite/driver/.config/aarch64-clang-debug.conf index 209e1de755..aec4dd1a41 100644 --- a/testsuite/driver/config/aarch64-clang-debug.conf +++ b/testsuite/driver/.config/aarch64-clang-debug.conf @@ -1,7 +1,7 @@ [MODE_SET] java_common_mode_set: O0, O2, GC_O0, GC_O2 c_common_mode_set: CO0, CO2, CMBCO2 - spec_mode_set: SCO0_TEST, SCO2_TEST, SCO0_TRAIN, SCO2_TRAIN, SCOS_TRAIN, SAFEO2_TEST, SAFEO2_TRAIN, SCO0_TEST_MERGE, SCO2_TEST_MERGE, SCO0_TRAIN_MERGE, SCO2_TRAIN_MERGE, SCOS_TRAIN_MERGE, SCMBCO2_TEST, SCMBCO2_TRAIN + spec_mode_set: SCO0_TEST, SCO2_TEST, SCO0_TRAIN, SCO2_TRAIN, SCOS_TRAIN, SAFEO2_TEST, SAFEO2_TRAIN, SCO0_TEST_MERGE, SCO2_TEST_MERGE, SCO0_TRAIN_MERGE, SCO2_TRAIN_MERGE, SCOS_TRAIN_MERGE, SCMBCO2_TEST, SCMBCO2_TRAIN, SCOS_TEST, SCOS_TEST_MERGE co3_set: CO3, CO3_NOINLINE c_driver_mode_set: DRIVER @@ -19,6 +19,7 @@ c_test/stackprotect_test: SP_STRONG, SP_ALL c_test/gnu_test: CO0, CO2 c_test/tsvc_test: TSVO2 + c_test/int128_test: CO0 java_test/app_test: java_common_mode_set java_test/arrayboundary_test: java_common_mode_set java_test/clinit_test: java_common_mode_set @@ -48,6 +49,10 @@ c_test/unit_test/UNIT0109-reach-def-for-undef-behavior: DRIVER c_test/unit_test/UNIT0110-prepeephole-verify-immopnd: DRIVER c_test/unit_test/UNIT0128-atomic-invalid-memorder: CO0, CO2 + c_test/unit_test/UNIT0142-bugfix-ico: TEST_OS, TEST_O2 + c_test/unit_test/UNIT0151-struct_arg_copy_offset: CO0 + c_test/unit_test/UNIT0152-struct_arg_copy_offset2: CO0 + c_test/unit_test/UNIT0153-lower_bitfield_read: CO0, CO2, CMBCO2, FORTIFY_O2, FORTIFY_O1, COS c_test/aapcs64_test: AAPCS64_O0, AAPCS64_O2 c_test/lto_test/LTO0001-OneHeadFile: LTOASTO0 c_test/lto_test/LTO0002-DiffCFile: LTOASTO0 @@ -70,10 +75,15 @@ [BAN_TEST_SUITE] c_test/unit_test/UNIT0023-FORTIFY_O2_Strcpy: FORTIFY_O2 + # The testcases disabled due to int128 isn't fully supported + c_test/gtorture_test/GCC01379-g.torture.execute-pr84748: CO3_NOINLINE,CMBCO2, CO2,CO3 + c_test/int128_test/GCC0004-fp-int-convert-float128-timode-2: CO0 + c_test/int128_test/GCC0027-pr89037: CO0 + # The testcase has problem when ebo phase is enabled in dwarf. c_test/gtorture_test/GCC00238-g.torture.execute-20030811-1: CO3 - # NEON TEST + # NEON TEST, These interfaces are not supported. c_test/neon_test/NEON01039-vld1_lane_s8: NEONO2,NEONO0 c_test/neon_test/NEON01040-vld1q_lane_s8: NEONO2,NEONO0 c_test/neon_test/NEON01041-vld1_lane_s16: NEONO2,NEONO0 @@ -474,5 +484,6 @@ c_test/sanity_test/SANITY0054-asan5: c_common_mode_set, ASAN_O0 c_test/sanity_test/SANITY0055-asan6: c_common_mode_set, ASAN_O0 - #struct unused bits have undefined value - c_test/aapcs64_test/AAPCS0005-StructAlign: AAPCS64_O2 \ No newline at end of file + #struct unused bits have undefined value(undefined behavior) + c_test/aapcs64_test/AAPCS0005-StructAlign: AAPCS64_O2 + diff --git a/testsuite/driver/config/aarch64-clang-release.conf b/testsuite/driver/.config/aarch64-clang-release.conf similarity index 98% rename from testsuite/driver/config/aarch64-clang-release.conf rename to testsuite/driver/.config/aarch64-clang-release.conf index e4f17370cc..4b3d633ebc 100644 --- a/testsuite/driver/config/aarch64-clang-release.conf +++ b/testsuite/driver/.config/aarch64-clang-release.conf @@ -1,7 +1,7 @@ [MODE_SET] java_common_mode_set: O0, O2, GC_O0, GC_O2 c_common_mode_set: CO0, CO2, CMBCO2 - spec_mode_set: SCO0_TEST, SCO2_TEST, SCO0_TRAIN, SCO2_TRAIN, SCOS_TRAIN, SAFEO2_TEST, SAFEO2_TRAIN, SCO0_TEST_MERGE, SCO2_TEST_MERGE, SCO0_TRAIN_MERGE, SCO2_TRAIN_MERGE, SCOS_TRAIN_MERGE, SCMBCO2_TEST, SCMBCO2_TRAIN + spec_mode_set: SCO0_TEST, SCO2_TEST, SCO0_TRAIN, SCO2_TRAIN, SCOS_TRAIN, SAFEO2_TEST, SAFEO2_TRAIN, SCO0_TEST_MERGE, SCO2_TEST_MERGE, SCO0_TRAIN_MERGE, SCO2_TRAIN_MERGE, SCOS_TRAIN_MERGE, SCMBCO2_TEST, SCMBCO2_TRAIN, SCOS_TEST, SCOS_TEST_MERGE co3_set: CO3, CO3_NOINLINE c_driver_mode_set: DRIVER x64_common_mode_set: X64_O0, X64_LITECG, X64_LITECG_ME_O2, X64_LITECG_MPL2MPL_O2 @@ -23,6 +23,7 @@ c_test/gdb_test: DEJAO0 c_test/gnu_test: CO0, CO2 c_test/gnu_test/arm_builtin_function_test: CO0, CO2 + c_test/int128_test: CO0 java_test/app_test: java_common_mode_set java_test/arrayboundary_test: java_common_mode_set java_test/clinit_test: java_common_mode_set @@ -60,6 +61,13 @@ c_test/unit_test/UNIT0121-first-bb-lable: DRIVER c_test/unit_test/UNIT0122-float-const-lable-name: DRIVER c_test/unit_test/UNIT0128-atomic-invalid-memorder: CO0, CO2 + c_test/unit_test/UNIT0129-string-func-for-FORTIFY-SOURCE-2: CO0 + c_test/unit_test/UNIT0142-bugfix-ico: TEST_OS, TEST_O2 + c_test/unit_test/UNIT0138-always-sweep-static-symbol: CO0_GDB + c_test/unit_test/UNIT0139-aarch64-abi-B6: CO0 + c_test/unit_test/UNIT0151-agg_param_copy_offset: CO0 + c_test/unit_test/UNIT0152-agg_param_copy_offset2: CO0 + c_test/unit_test/UNIT0153-lower_bitfield_read: CO0, CO2, CMBCO2, FORTIFY_O2, FORTIFY_O1, COS c_test/aapcs64_test: AAPCS64_O0, AAPCS64_O2 c_test/lto_test/LTO0001-OneHeadFile: LTOASTO0 c_test/lto_test/LTO0002-DiffCFile: LTOASTO0 @@ -417,6 +425,11 @@ c_test/gtorture_test/GCC01553-g.torture.execute-va-arg-pack-1: CO0, CO2, CMBCO2 c_test/gtorture_test/GCC00019-g.torture.execute-20000412-4: CO3 + # The testcases disabled due to int128 isn't fully supported + c_test/gtorture_test/GCC01379-g.torture.execute-pr84748: CO3_NOINLINE,CMBCO2, CO2,CO3 + c_test/int128_test/GCC0004-fp-int-convert-float128-timode-2: CO0 + c_test/int128_test/GCC0027-pr89037: CO0 + # mbc test fail #0xdeadbeef @@ -683,6 +696,7 @@ # C_ENHANCED CHECK FAIL # 0xdeadbeef + # C_ENHANCED has not implemented the filtering of unreachable areas # LLVM TEST @@ -690,7 +704,7 @@ c_test/gdb_test/GD0037-gdb.base-prologue.exp: DEJAO0 - # NEON TEST + # NEON TEST, These interfaces are not supported. c_test/neon_test/NEON01039-vld1_lane_s8: NEONO2,NEONO0 c_test/neon_test/NEON01040-vld1q_lane_s8: NEONO2,NEONO0 c_test/neon_test/NEON01041-vld1_lane_s16: NEONO2,NEONO0 @@ -1127,8 +1141,9 @@ c_test/sanity_test/SANITY0054-asan5: c_common_mode_set, ASAN_O0 c_test/sanity_test/SANITY0055-asan6: c_common_mode_set, ASAN_O0 - #struct unused bits have undefined value + #struct unused bits have undefined value(undefined behavior) c_test/aapcs64_test/AAPCS0005-StructAlign: AAPCS64_O2 #should not raise error c_test/unit_test/UNIT0023-FORTIFY_O2_Strcpy: FORTIFY_O2 + diff --git a/testsuite/driver/config/x86_64-clang-debug.conf b/testsuite/driver/.config/x86_64-clang-debug.conf similarity index 93% rename from testsuite/driver/config/x86_64-clang-debug.conf rename to testsuite/driver/.config/x86_64-clang-debug.conf index 4271ec01f9..b78b295817 100644 --- a/testsuite/driver/config/x86_64-clang-debug.conf +++ b/testsuite/driver/.config/x86_64-clang-debug.conf @@ -113,6 +113,7 @@ c_test/x64_copy_test/SUP04158-misra2004-generic-C90-rule12_8-trule_12_8v0: X64_LITECG_MPL2MPL_O2,X64_O2 c_test/x64_copy_test/SUP04129-misra2004-generic-C90-rule12_7-trule_12_7v0: X64_LITECG_ME_O2 c_test/x64_copy_test/GCC00924-g.torture.execute-pr19606: X64_LITECG_MPL2MPL_O2,X64_O2,X64_LITECG_ME_O2 + c_test/x64_copy_test/GCC00424-g.torture.execute-20101011-1: X64_O2,X64_LITECG_ME_O2,X64_LITECG_MPL2MPL_O2 # unsupported intrinsicop c_test/x64_copy_test/GCC00223-g.torture.execute-20030323-1: X64_O0,X64_LITECG,X64_LITECG_ME_O2,X64_LITECG_MPL2MPL_O2,X64_O2 @@ -123,5 +124,15 @@ c_test/struct_test/STRUCT0012-2023030708359: X64_O2,X64_O0,X64_LITECG_ME_O2,X64_LITECG,X64_LITECG_MPL2MPL_O2 c_test/struct_test/STRUCT0013-2023042404640: X64_O2,X64_O0,X64_LITECG_ME_O2,X64_LITECG,X64_LITECG_MPL2MPL_O2 c_test/struct_test/STRUCT0017-uname-bit-field: X64_LITECG,X64_LITECG_ME_O2,X64_LITECG_MPL2MPL_O2,X64_O2,X64_O0 + c_test/struct_test/STRUCT0018-empty-struct: X64_LITECG,X64_LITECG_ME_O2,X64_LITECG_MPL2MPL_O2,X64_O2,X64_O0 # sudo ln -f /usr/include/asm-generic /usr/include/asm c_test/x64_copy_test/SUP03985-misra2004-cconform-C90-rule20_5-txrule_20_5: X64_O0, X64_LITECG_ME_O2,X64_LITECG,X64_LITECG_MPL2MPL_O2,X64_O2 + + #union bug + c_test/x64_be_enable_test/GCC00376-g.torture.execute-comp-goto-1: X64_O2,X64_LITECG_MPL2MPL_O2 + c_test/x64_copy_test/LLVM01615-SingleSource-Regression-C-gcc-c-torture-execute-GCC-C-execute-930208-1: X64_O2,X64_LITECG_MPL2MPL_O2 + c_test/x64_copy_test/GCC00806-g.torture.execute-comp-goto-1: X64_O2,X64_LITECG_MPL2MPL_O2 + c_test/x64_copy_test/LLVM01239-SingleSource-Regression-C-gcc-c-torture-execute-GCC-C-execute-comp-goto-1: X64_O2,X64_LITECG_MPL2MPL_O2 + c_test/x64_copy_test/GCC00540-g.torture.execute-930208-1: X64_O2,X64_LITECG_MPL2MPL_O2 + c_test/x64_copy_test/LLVM00234-SingleSource-UnitTests-2010-05-24-BitfieldTest: X64_O2,X64_LITECG_MPL2MPL_O2 + c_test/x64_copy_test/LLVM00228-SingleSource-UnitTests-2007-04-10-BitfieldTest: X64_O2,X64_LITECG_MPL2MPL_O2 diff --git a/testsuite/driver/config/x86_64-clang-release.conf b/testsuite/driver/.config/x86_64-clang-release.conf similarity index 93% rename from testsuite/driver/config/x86_64-clang-release.conf rename to testsuite/driver/.config/x86_64-clang-release.conf index 8ddd0d92d8..ee7ce9f6d3 100644 --- a/testsuite/driver/config/x86_64-clang-release.conf +++ b/testsuite/driver/.config/x86_64-clang-release.conf @@ -111,6 +111,7 @@ c_test/x64_copy_test/SUP03879-misra2004-cconform-C90-rule12_7-trule_12_7v0: X64_LITECG_ME_O2 c_test/x64_copy_test/SUP04129-misra2004-generic-C90-rule12_7-trule_12_7v0: X64_LITECG_ME_O2 c_test/x64_copy_test/GCC00924-g.torture.execute-pr19606: X64_LITECG_MPL2MPL_O2,X64_O2,X64_LITECG_ME_O2 + c_test/x64_copy_test/GCC00424-g.torture.execute-20101011-1: X64_O2,X64_LITECG_ME_O2,X64_LITECG_MPL2MPL_O2 # unsupported intrinsicop c_test/x64_copy_test/GCC00223-g.torture.execute-20030323-1: X64_O0,X64_LITECG,X64_LITECG_ME_O2,X64_LITECG_MPL2MPL_O2,X64_O2 @@ -121,6 +122,16 @@ c_test/struct_test/STRUCT0012-2023030708359: X64_O2,X64_O0,X64_LITECG_ME_O2,X64_LITECG,X64_LITECG_MPL2MPL_O2 c_test/struct_test/STRUCT0013-2023042404640: X64_O2,X64_O0,X64_LITECG_ME_O2,X64_LITECG,X64_LITECG_MPL2MPL_O2 c_test/struct_test/STRUCT0017-uname-bit-field: X64_LITECG,X64_LITECG_ME_O2,X64_LITECG_MPL2MPL_O2,X64_O2,X64_O0 + c_test/struct_test/STRUCT0018-empty-struct: X64_LITECG,X64_LITECG_ME_O2,X64_LITECG_MPL2MPL_O2,X64_O2,X64_O0 # sudo ln -f /usr/include/asm-generic /usr/include/asm c_test/x64_copy_test/SUP03985-misra2004-cconform-C90-rule20_5-txrule_20_5: X64_O0, X64_LITECG_ME_O2,X64_LITECG,X64_LITECG_MPL2MPL_O2,X64_O2 + + #union bug + c_test/x64_be_enable_test/GCC00376-g.torture.execute-comp-goto-1: X64_O2,X64_LITECG_MPL2MPL_O2 + c_test/x64_copy_test/LLVM01615-SingleSource-Regression-C-gcc-c-torture-execute-GCC-C-execute-930208-1: X64_O2,X64_LITECG_MPL2MPL_O2 + c_test/x64_copy_test/GCC00806-g.torture.execute-comp-goto-1: X64_O2,X64_LITECG_MPL2MPL_O2 + c_test/x64_copy_test/LLVM01239-SingleSource-Regression-C-gcc-c-torture-execute-GCC-C-execute-comp-goto-1: X64_O2,X64_LITECG_MPL2MPL_O2 + c_test/x64_copy_test/GCC00540-g.torture.execute-930208-1: X64_O2,X64_LITECG_MPL2MPL_O2 + c_test/x64_copy_test/LLVM00234-SingleSource-UnitTests-2010-05-24-BitfieldTest: X64_O2,X64_LITECG_MPL2MPL_O2 + c_test/x64_copy_test/LLVM00228-SingleSource-UnitTests-2007-04-10-BitfieldTest: X64_O2,X64_LITECG_MPL2MPL_O2 diff --git a/testsuite/driver/config b/testsuite/driver/config new file mode 120000 index 0000000000..7774cc3d5e --- /dev/null +++ b/testsuite/driver/config @@ -0,0 +1 @@ +/home/maple/workspace/OpenArkCompiler/testsuite/driver/.config \ No newline at end of file diff --git a/testsuite/driver/src/api/.api/__init__.py b/testsuite/driver/src/.api/__init__.py similarity index 100% rename from testsuite/driver/src/api/.api/__init__.py rename to testsuite/driver/src/.api/__init__.py diff --git a/testsuite/driver/src/api/.api/c2ast.py b/testsuite/driver/src/.api/c2ast.py similarity index 100% rename from testsuite/driver/src/api/.api/c2ast.py rename to testsuite/driver/src/.api/c2ast.py diff --git a/testsuite/driver/src/api/.api/c_linker.py b/testsuite/driver/src/.api/c_linker.py similarity index 100% rename from testsuite/driver/src/api/.api/c_linker.py rename to testsuite/driver/src/.api/c_linker.py diff --git a/testsuite/driver/src/api/.api/c_linker_all.py b/testsuite/driver/src/.api/c_linker_all.py similarity index 100% rename from testsuite/driver/src/api/.api/c_linker_all.py rename to testsuite/driver/src/.api/c_linker_all.py diff --git a/testsuite/driver/src/api/.api/check_file_equal.py b/testsuite/driver/src/.api/check_file_equal.py similarity index 100% rename from testsuite/driver/src/api/.api/check_file_equal.py rename to testsuite/driver/src/.api/check_file_equal.py diff --git a/testsuite/driver/src/api/.api/check_reg_contain.py b/testsuite/driver/src/.api/check_reg_contain.py similarity index 100% rename from testsuite/driver/src/api/.api/check_reg_contain.py rename to testsuite/driver/src/.api/check_reg_contain.py diff --git a/testsuite/driver/src/api/.api/clang_linker.py b/testsuite/driver/src/.api/clang_linker.py similarity index 100% rename from testsuite/driver/src/api/.api/clang_linker.py rename to testsuite/driver/src/.api/clang_linker.py diff --git a/testsuite/driver/src/api/.api/driver.py b/testsuite/driver/src/.api/driver.py similarity index 100% rename from testsuite/driver/src/api/.api/driver.py rename to testsuite/driver/src/.api/driver.py diff --git a/testsuite/driver/src/api/.api/gen_bin.py b/testsuite/driver/src/.api/gen_bin.py similarity index 100% rename from testsuite/driver/src/api/.api/gen_bin.py rename to testsuite/driver/src/.api/gen_bin.py diff --git a/testsuite/driver/src/api/.api/hir2mpl.py b/testsuite/driver/src/.api/hir2mpl.py similarity index 100% rename from testsuite/driver/src/api/.api/hir2mpl.py rename to testsuite/driver/src/.api/hir2mpl.py diff --git a/testsuite/driver/src/api/.api/irbuild.py b/testsuite/driver/src/.api/irbuild.py similarity index 100% rename from testsuite/driver/src/api/.api/irbuild.py rename to testsuite/driver/src/.api/irbuild.py diff --git a/testsuite/driver/src/api/.api/java2dex.py b/testsuite/driver/src/.api/java2dex.py similarity index 100% rename from testsuite/driver/src/api/.api/java2dex.py rename to testsuite/driver/src/.api/java2dex.py diff --git a/testsuite/driver/src/api/.api/linker.py b/testsuite/driver/src/.api/linker.py similarity index 100% rename from testsuite/driver/src/api/.api/linker.py rename to testsuite/driver/src/.api/linker.py diff --git a/testsuite/driver/src/api/.api/maple.py b/testsuite/driver/src/.api/maple.py similarity index 100% rename from testsuite/driver/src/api/.api/maple.py rename to testsuite/driver/src/.api/maple.py diff --git a/testsuite/driver/src/api/.api/maple_cg.py b/testsuite/driver/src/.api/maple_cg.py similarity index 100% rename from testsuite/driver/src/api/.api/maple_cg.py rename to testsuite/driver/src/.api/maple_cg.py diff --git a/testsuite/driver/src/api/.api/maple_driver.py b/testsuite/driver/src/.api/maple_driver.py similarity index 100% rename from testsuite/driver/src/api/.api/maple_driver.py rename to testsuite/driver/src/.api/maple_driver.py diff --git a/testsuite/driver/src/api/.api/mplsh.py b/testsuite/driver/src/.api/mplsh.py similarity index 100% rename from testsuite/driver/src/api/.api/mplsh.py rename to testsuite/driver/src/.api/mplsh.py diff --git a/testsuite/driver/src/api/.api/qemu.py b/testsuite/driver/src/.api/qemu.py similarity index 100% rename from testsuite/driver/src/api/.api/qemu.py rename to testsuite/driver/src/.api/qemu.py diff --git a/testsuite/driver/src/api/.api/shell.py b/testsuite/driver/src/.api/shell.py similarity index 100% rename from testsuite/driver/src/api/.api/shell.py rename to testsuite/driver/src/.api/shell.py diff --git a/testsuite/driver/src/api/.api/shell_operator.py b/testsuite/driver/src/.api/shell_operator.py similarity index 100% rename from testsuite/driver/src/api/.api/shell_operator.py rename to testsuite/driver/src/.api/shell_operator.py diff --git a/testsuite/driver/src/api/.api/simple_maple.py b/testsuite/driver/src/.api/simple_maple.py similarity index 100% rename from testsuite/driver/src/api/.api/simple_maple.py rename to testsuite/driver/src/.api/simple_maple.py diff --git a/testsuite/driver/src/mode/.mode/AAPCS64_O0.py b/testsuite/driver/src/.mode/AAPCS64_O0.py similarity index 100% rename from testsuite/driver/src/mode/.mode/AAPCS64_O0.py rename to testsuite/driver/src/.mode/AAPCS64_O0.py diff --git a/testsuite/driver/src/mode/.mode/AAPCS64_O2.py b/testsuite/driver/src/.mode/AAPCS64_O2.py similarity index 100% rename from testsuite/driver/src/mode/.mode/AAPCS64_O2.py rename to testsuite/driver/src/.mode/AAPCS64_O2.py diff --git a/testsuite/driver/src/mode/.mode/ASAN_O0.py b/testsuite/driver/src/.mode/ASAN_O0.py similarity index 100% rename from testsuite/driver/src/mode/.mode/ASAN_O0.py rename to testsuite/driver/src/.mode/ASAN_O0.py diff --git a/testsuite/driver/src/mode/.mode/AST2MPL.py b/testsuite/driver/src/.mode/AST2MPL.py similarity index 100% rename from testsuite/driver/src/mode/.mode/AST2MPL.py rename to testsuite/driver/src/.mode/AST2MPL.py diff --git a/testsuite/driver/src/mode/.mode/ASTMBC.py b/testsuite/driver/src/.mode/ASTMBC.py similarity index 100% rename from testsuite/driver/src/mode/.mode/ASTMBC.py rename to testsuite/driver/src/.mode/ASTMBC.py diff --git a/testsuite/driver/src/mode/.mode/ASTO0.py b/testsuite/driver/src/.mode/ASTO0.py similarity index 100% rename from testsuite/driver/src/mode/.mode/ASTO0.py rename to testsuite/driver/src/.mode/ASTO0.py diff --git a/testsuite/driver/src/mode/.mode/ASTO0_OLD.py b/testsuite/driver/src/.mode/ASTO0_OLD.py similarity index 100% rename from testsuite/driver/src/mode/.mode/ASTO0_OLD.py rename to testsuite/driver/src/.mode/ASTO0_OLD.py diff --git a/testsuite/driver/src/mode/.mode/ASTO2.py b/testsuite/driver/src/.mode/ASTO2.py similarity index 100% rename from testsuite/driver/src/mode/.mode/ASTO2.py rename to testsuite/driver/src/.mode/ASTO2.py diff --git a/testsuite/driver/src/mode/.mode/ASTO2_OLD.py b/testsuite/driver/src/.mode/ASTO2_OLD.py similarity index 100% rename from testsuite/driver/src/mode/.mode/ASTO2_OLD.py rename to testsuite/driver/src/.mode/ASTO2_OLD.py diff --git a/testsuite/driver/src/mode/.mode/CMBCO2.py b/testsuite/driver/src/.mode/CMBCO2.py similarity index 100% rename from testsuite/driver/src/mode/.mode/CMBCO2.py rename to testsuite/driver/src/.mode/CMBCO2.py diff --git a/testsuite/driver/src/mode/.mode/CO0.py b/testsuite/driver/src/.mode/CO0.py similarity index 100% rename from testsuite/driver/src/mode/.mode/CO0.py rename to testsuite/driver/src/.mode/CO0.py diff --git a/testsuite/driver/src/mode/.mode/CO0_PIE.py b/testsuite/driver/src/.mode/CO0_GDB.py similarity index 52% rename from testsuite/driver/src/mode/.mode/CO0_PIE.py rename to testsuite/driver/src/.mode/CO0_GDB.py index 67b9cfd020..717b45744c 100644 --- a/testsuite/driver/src/mode/.mode/CO0_PIE.py +++ b/testsuite/driver/src/.mode/CO0_GDB.py @@ -16,76 +16,46 @@ from api import * -CO0_PIE = { - "compile_main": [ - C2ast( - clang="${ENHANCED_CLANG_PATH}/bin/clang", +CO0_GDB = { + "compile": [ + MapleDriver( + maple="${MAPLE_BUILD_OUTPUT}/bin/maple", + infiles=["${APP}.c"], + outfile="${APP}.out", include_path=[ "${MAPLE_BUILD_OUTPUT}/lib/include", "${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc/usr/include", "${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/lib/gcc/aarch64-linux-gnu/7.5.0/include", - "../lib/include" + "../lib/include", + "${MAPLE_ROOT}/testsuite/c_test/csmith_test/runtime_x86" ], - option="--target=aarch64 -U __SIZEOF_INT128__ -Wno-error=int-conversion", - infile="${APP}.c", - outfile="${APP}.ast" - ), - Hir2mpl( - hir2mpl="${MAPLE_BUILD_OUTPUT}/bin/hir2mpl -g", - infile="${APP}.ast", - outfile="${APP}.mpl" - ), - Maple( - maple="${MAPLE_BUILD_OUTPUT}/bin/maple", - run=["mplcg"], - option={ - "mplcg": "--quiet --fPIC --fPIE" - }, - global_option="-g", - infiles=["${APP}.mpl"] + option="-O0 -no-opt-O0 -fPIC -g -lpthread -lm --save-temps -Wno-error=int-conversion" ) ], - "compile": [ - C2ast( - clang="${ENHANCED_CLANG_PATH}/bin/clang", + "compile_err": [ + Shell("EXPECT_ERR_START"), + MapleDriver( + maple="${MAPLE_BUILD_OUTPUT}/bin/maple", + infiles=["${APP}.c"], + outfile="${APP}.out", include_path=[ "${MAPLE_BUILD_OUTPUT}/lib/include", "${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc/usr/include", "${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/lib/gcc/aarch64-linux-gnu/7.5.0/include", "../lib/include" ], - option="--target=aarch64 -U __SIZEOF_INT128__", - infile="${APP}.c", - outfile="${APP}.ast" - ), - Hir2mpl( - hir2mpl="${MAPLE_BUILD_OUTPUT}/bin/hir2mpl -g", - infile="${APP}.ast", - outfile="${APP}.mpl" - ), - Maple( - maple="${MAPLE_BUILD_OUTPUT}/bin/maple", - run=["mplcg"], - option={ - "mplcg": "--quiet --fPIC --fPIE" - }, - global_option="-g", - infiles=["${APP}.mpl"] + option="-O0 -g -lm -Wno-error=int-conversion", + redirection="compile.log", ), - CLinker( - infiles=["main.s", "${APP}.s"], - front_option="-pie", - outfile="${APP}.out", - back_option="-lm" - ) + Shell("EXPECT_ERR_END"), ], "run": [ Shell( "${MAPLE_ROOT}/tools/bin/qemu-aarch64 -L ${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc ${APP}.out > output.log 2>&1" ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ) + CheckFileEqual( + file1="output.log", + file2="expected.txt" + ) ] } diff --git a/testsuite/driver/src/mode/.mode/CO0_MPL_C2M.py b/testsuite/driver/src/.mode/CO0_MPL_C2M.py similarity index 100% rename from testsuite/driver/src/mode/.mode/CO0_MPL_C2M.py rename to testsuite/driver/src/.mode/CO0_MPL_C2M.py diff --git a/testsuite/driver/src/mode/.mode/CO0_OLD.py b/testsuite/driver/src/.mode/CO0_OLD.py similarity index 100% rename from testsuite/driver/src/mode/.mode/CO0_OLD.py rename to testsuite/driver/src/.mode/CO0_OLD.py diff --git a/testsuite/driver/src/mode/CORT.py b/testsuite/driver/src/.mode/CO0_PIE.py similarity index 35% rename from testsuite/driver/src/mode/CORT.py rename to testsuite/driver/src/.mode/CO0_PIE.py index 1ed57913e8..734a879e4f 100644 --- a/testsuite/driver/src/mode/CORT.py +++ b/testsuite/driver/src/.mode/CO0_PIE.py @@ -1,3 +1,5 @@ +#!/usr/bin/env python +# coding=utf-8 # # Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. # @@ -14,13 +16,35 @@ from api import * -CORT = { +CO0_PIE = { "compile": [ - Shell("/usr/bin/clang-9 -O2 -g3 -c -fPIC -march=armv8-a -target aarch64-linux-gnu -I${MAPLE_ROOT}/mrt/coroutine/api/ ${APP}.c;/usr/bin/clang++-9 -s -fuse-ld=lld -O2 -g -Wall -fstack-protector-strong -fPIC -Werror -fPIE -rdynamic -pie -W -Wno-macro-redefined -Wno-inconsistent-missing-override -Wno-deprecated -Wno-unused-command-line-argument -isystem /usr/lib/gcc-cross/aarch64-linux-gnu/5/../../../../aarch64-linux-gnu/include/c++/5 -isystem /usr/lib/gcc-cross/aarch64-linux-gnu/5/../../../../aarch64-linux-gnu/include/c++/5/aarch64-linux-gnu -isystem /usr/lib/gcc-cross/aarch64-linux-gnu/5/../../../../aarch64-linux-gnu/include/c++/5/backward -isystem /usr/lib/gcc-cross/aarch64-linux-gnu/5/include -isystem /usr/lib/gcc-cross/aarch64-linux-gnu/5/include-fixed -isystem /usr/aarch64-linux-gnu/include -target aarch64-linux-gnu -Wl,-z,relro -Wl,-z,now -Wl,-z,noexecstack -fPIE -o test.out -Wl,--start-group test.o -L${OUT_ROOT}/target/product/maple_arm64-clang-release/lib/host-x86_64-O2/ -lcoroutine -ldl -lhuawei_secure_c -Wl,--end-group") + MapleDriver( + maple="${MAPLE_BUILD_OUTPUT}/bin/maple", + infiles=["${APP}.c"], + outfile="${APP}.s", + include_path=[ + "${MAPLE_BUILD_OUTPUT}/lib/include", + "${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc/usr/include", + "${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/lib/gcc/aarch64-linux-gnu/7.5.0/include", + "../lib/include", + "${MAPLE_ROOT}/testsuite/c_test/csmith_test/runtime_x86" + ], + option="-O0 -fPIC -fPIE -S -g -lpthread -lm --save-temps -Wno-error=int-conversion" + ) + ], + "link": [ + MapleDriver( + maple="${OUT_ROOT}/aarch64-clang-release/bin/maple", + infiles=["${APP}"], + outfile="${TARGET}.out", + option="-std=gnu99 -lm -L${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc/lib/", + extra_opt="-pie" + ) ], + "run": [ - Shell( - "/usr/bin/qemu-aarch64 -L /usr/aarch64-linux-gnu -E LD_LIBRARY_PATH=${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O2:./ ./${APP}.out > output.log 2>&1" + Shell( + "${MAPLE_ROOT}/tools/bin/qemu-aarch64 -L ${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc ${APP}.out > output.log 2>&1" ), CheckFileEqual( file1="output.log", diff --git a/testsuite/driver/src/mode/.mode/CO0_SHARED.py b/testsuite/driver/src/.mode/CO0_SHARED.py similarity index 100% rename from testsuite/driver/src/mode/.mode/CO0_SHARED.py rename to testsuite/driver/src/.mode/CO0_SHARED.py diff --git a/testsuite/driver/src/mode/.mode/CO0_SHARED_OLD.py b/testsuite/driver/src/.mode/CO0_SHARED_OLD.py similarity index 100% rename from testsuite/driver/src/mode/.mode/CO0_SHARED_OLD.py rename to testsuite/driver/src/.mode/CO0_SHARED_OLD.py diff --git a/testsuite/driver/src/mode/.mode/CO2.py b/testsuite/driver/src/.mode/CO2.py similarity index 100% rename from testsuite/driver/src/mode/.mode/CO2.py rename to testsuite/driver/src/.mode/CO2.py diff --git a/testsuite/driver/src/mode/.mode/CO2_BPL_C2M.py b/testsuite/driver/src/.mode/CO2_BPL_C2M.py similarity index 100% rename from testsuite/driver/src/mode/.mode/CO2_BPL_C2M.py rename to testsuite/driver/src/.mode/CO2_BPL_C2M.py diff --git a/testsuite/driver/src/mode/.mode/CO2_MPL_C2M.py b/testsuite/driver/src/.mode/CO2_MPL_C2M.py similarity index 100% rename from testsuite/driver/src/mode/.mode/CO2_MPL_C2M.py rename to testsuite/driver/src/.mode/CO2_MPL_C2M.py diff --git a/testsuite/driver/src/mode/.mode/CO2_MPL_NOINLINE_C2M.py b/testsuite/driver/src/.mode/CO2_MPL_NOINLINE_C2M.py similarity index 100% rename from testsuite/driver/src/mode/.mode/CO2_MPL_NOINLINE_C2M.py rename to testsuite/driver/src/.mode/CO2_MPL_NOINLINE_C2M.py diff --git a/testsuite/driver/src/mode/.mode/CO2_MUXED.py b/testsuite/driver/src/.mode/CO2_MUXED.py similarity index 56% rename from testsuite/driver/src/mode/.mode/CO2_MUXED.py rename to testsuite/driver/src/.mode/CO2_MUXED.py index 302424be41..9064e105ac 100644 --- a/testsuite/driver/src/mode/.mode/CO2_MUXED.py +++ b/testsuite/driver/src/.mode/CO2_MUXED.py @@ -18,8 +18,10 @@ from api import * CO2_MUXED = { "compile": [ - C2ast( - clang="${ENHANCED_CLANG_PATH}/bin/clang", + MapleDriver( + maple="${MAPLE_BUILD_OUTPUT}/bin/maple", + infiles=["${APP}.c"], + outfile="${APP}.o", include_path=[ "${MAPLE_BUILD_OUTPUT}/lib/include", "${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc/usr/include", @@ -27,38 +29,25 @@ CO2_MUXED = { "../lib/include", "${MAPLE_ROOT}/testsuite/c_test/csmith_test/runtime_x86" ], - option="--target=aarch64 -U __SIZEOF_INT128__ -Wno-error=int-conversion", - infile="${APP}.c", - outfile="${APP}.ast" - ), - Hir2mpl( - hir2mpl="${MAPLE_BUILD_OUTPUT}/bin/hir2mpl", - infile="${APP}.ast", - outfile="${APP}.mpl" - ), - Maple( - maple="${MAPLE_BUILD_OUTPUT}/bin/maple", - run=["me", "mpl2mpl", "mplcg"], - option={ - "me": "-O2 --quiet", - "mpl2mpl": "-O2", - "mplcg": "-O2 --fPIC --quiet" - }, - global_option="", - infiles=["${APP}.mpl"] - ), - Shell("${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/bin/aarch64-linux-gnu-gcc -std=c99 -o ${APP}.o -c ${APP}.s") + option="-O2 -fPIC -c -lpthread -lm ${option} -Wno-error=int-conversion" + ) ], "link": [ - Shell("${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/bin/aarch64-linux-gnu-gcc -std=gnu99 -no-pie *.o -lm -o a.out") + MapleDriver( + maple="${OUT_ROOT}/aarch64-clang-release/bin/maple", + infiles=["${APP}"], + outfile="${TARGET}.out", + option="-std=gnu99 -lm -L${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc/lib/", + extra_opt="-no-pie" + ) ], "run": [ Shell( - "${MAPLE_ROOT}/tools/bin/qemu-aarch64 -L ${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc a.out > output.log 2>&1" + "${MAPLE_ROOT}/tools/bin/qemu-aarch64 -L ${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc ${APP}.out > output.log 2>&1" ), CheckFileEqual( file1="output.log", file2="expected.txt" - ) + ) ] } diff --git a/testsuite/driver/src/mode/.mode/CO2_OLD.py b/testsuite/driver/src/.mode/CO2_OLD.py similarity index 100% rename from testsuite/driver/src/mode/.mode/CO2_OLD.py rename to testsuite/driver/src/.mode/CO2_OLD.py diff --git a/testsuite/driver/src/mode/.mode/CO2_PIE.py b/testsuite/driver/src/.mode/CO2_PIE.py similarity index 39% rename from testsuite/driver/src/mode/.mode/CO2_PIE.py rename to testsuite/driver/src/.mode/CO2_PIE.py index 3595b8b092..e42f99c433 100644 --- a/testsuite/driver/src/mode/.mode/CO2_PIE.py +++ b/testsuite/driver/src/.mode/CO2_PIE.py @@ -17,72 +17,31 @@ from api import * CO2_PIE = { - "compile_main": [ - C2ast( - clang="${ENHANCED_CLANG_PATH}/bin/clang", - include_path=[ - "${MAPLE_BUILD_OUTPUT}/lib/include", - "${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc/usr/include", - "${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/lib/gcc/aarch64-linux-gnu/7.5.0/include", - "../lib/include" - ], - option="--target=aarch64 -U __SIZEOF_INT128__ -Wno-error=int-conversion", - infile="${APP}.c", - outfile="${APP}.ast" - ), - Hir2mpl( - hir2mpl="${MAPLE_BUILD_OUTPUT}/bin/hir2mpl", - infile="${APP}.ast", - outfile="${APP}.mpl" - ), - Maple( - maple="${MAPLE_BUILD_OUTPUT}/bin/maple", - run=["me", "mpl2mpl", "mplcg"], - option={ - "me": "-O2 --quiet", - "mpl2mpl": "-O2", - "mplcg": "-O2 --fPIC --fPIE --quiet" - }, - global_option="", - infiles=["${APP}.mpl"] - ) - ], "compile": [ - C2ast( - clang="${ENHANCED_CLANG_PATH}/bin/clang", + MapleDriver( + maple="${MAPLE_BUILD_OUTPUT}/bin/maple", + infiles=["${APP}.c"], + outfile="${APP}.s", include_path=[ "${MAPLE_BUILD_OUTPUT}/lib/include", "${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc/usr/include", "${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/lib/gcc/aarch64-linux-gnu/7.5.0/include", - "../lib/include" + "../lib/include", + "${MAPLE_ROOT}/testsuite/c_test/csmith_test/runtime_x86" ], - option="--target=aarch64 -U __SIZEOF_INT128__", - infile="${APP}.c", - outfile="${APP}.ast" - ), - Hir2mpl( - hir2mpl="${MAPLE_BUILD_OUTPUT}/bin/hir2mpl", - infile="${APP}.ast", - outfile="${APP}.mpl" - ), - Maple( - maple="${MAPLE_BUILD_OUTPUT}/bin/maple", - run=["me", "mpl2mpl", "mplcg"], - option={ - "me": "-O2 --quiet", - "mpl2mpl": "-O2", - "mplcg": "-O2 --fPIC --fPIE --quiet" - }, - global_option="", - infiles=["${APP}.mpl"] - ), - CLinker( - infiles=["main.s", "${APP}.s"], - front_option="-pie", - outfile="${APP}.out", - back_option="-lm" + option="-O2 -fPIC -fPIE -S -g -lpthread -lm --save-temps -Wno-error=int-conversion" ) ], + "link": [ + MapleDriver( + maple="${OUT_ROOT}/aarch64-clang-release/bin/maple", + infiles=["${APP}"], + outfile="${TARGET}.out", + option="-std=gnu99 -lm -L${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc/lib/", + extra_opt="-pie" + ) + ], + "run": [ Shell( "${MAPLE_ROOT}/tools/bin/qemu-aarch64 -L ${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc ${APP}.out > output.log 2>&1" @@ -90,6 +49,6 @@ CO2_PIE = { CheckFileEqual( file1="output.log", file2="expected.txt" - ) + ) ] } diff --git a/testsuite/driver/src/mode/.mode/CO2_SHARED.py b/testsuite/driver/src/.mode/CO2_SHARED.py similarity index 100% rename from testsuite/driver/src/mode/.mode/CO2_SHARED.py rename to testsuite/driver/src/.mode/CO2_SHARED.py diff --git a/testsuite/driver/src/mode/.mode/CO2_SHARED_OLD.py b/testsuite/driver/src/.mode/CO2_SHARED_OLD.py similarity index 100% rename from testsuite/driver/src/mode/.mode/CO2_SHARED_OLD.py rename to testsuite/driver/src/.mode/CO2_SHARED_OLD.py diff --git a/testsuite/driver/src/mode/.mode/CO3.py b/testsuite/driver/src/.mode/CO3.py similarity index 100% rename from testsuite/driver/src/mode/.mode/CO3.py rename to testsuite/driver/src/.mode/CO3.py diff --git a/testsuite/driver/src/mode/.mode/CO3_BPL_C2M.py b/testsuite/driver/src/.mode/CO3_BPL_C2M.py similarity index 100% rename from testsuite/driver/src/mode/.mode/CO3_BPL_C2M.py rename to testsuite/driver/src/.mode/CO3_BPL_C2M.py diff --git a/testsuite/driver/src/mode/.mode/CO3_BPL_NOINLINE_C2M.py b/testsuite/driver/src/.mode/CO3_BPL_NOINLINE_C2M.py similarity index 100% rename from testsuite/driver/src/mode/.mode/CO3_BPL_NOINLINE_C2M.py rename to testsuite/driver/src/.mode/CO3_BPL_NOINLINE_C2M.py diff --git a/testsuite/driver/src/mode/.mode/CO3_MPL_C2M.py b/testsuite/driver/src/.mode/CO3_MPL_C2M.py similarity index 100% rename from testsuite/driver/src/mode/.mode/CO3_MPL_C2M.py rename to testsuite/driver/src/.mode/CO3_MPL_C2M.py diff --git a/testsuite/driver/src/mode/.mode/CO3_MPL_NOINLINE_C2M.py b/testsuite/driver/src/.mode/CO3_MPL_NOINLINE_C2M.py similarity index 100% rename from testsuite/driver/src/mode/.mode/CO3_MPL_NOINLINE_C2M.py rename to testsuite/driver/src/.mode/CO3_MPL_NOINLINE_C2M.py diff --git a/testsuite/driver/src/mode/.mode/CO3_NOINLINE.py b/testsuite/driver/src/.mode/CO3_NOINLINE.py similarity index 100% rename from testsuite/driver/src/mode/.mode/CO3_NOINLINE.py rename to testsuite/driver/src/.mode/CO3_NOINLINE.py diff --git a/testsuite/driver/src/mode/.mode/CO3_NOINLINE_OLD.py b/testsuite/driver/src/.mode/CO3_NOINLINE_OLD.py similarity index 100% rename from testsuite/driver/src/mode/.mode/CO3_NOINLINE_OLD.py rename to testsuite/driver/src/.mode/CO3_NOINLINE_OLD.py diff --git a/testsuite/driver/src/mode/.mode/CO3_OLD.py b/testsuite/driver/src/.mode/CO3_OLD.py similarity index 100% rename from testsuite/driver/src/mode/.mode/CO3_OLD.py rename to testsuite/driver/src/.mode/CO3_OLD.py diff --git a/testsuite/driver/src/mode/.mode/COS.py b/testsuite/driver/src/.mode/COS.py similarity index 100% rename from testsuite/driver/src/mode/.mode/COS.py rename to testsuite/driver/src/.mode/COS.py diff --git a/testsuite/driver/src/mode/.mode/COS_OLD.py b/testsuite/driver/src/.mode/COS_OLD.py similarity index 100% rename from testsuite/driver/src/mode/.mode/COS_OLD.py rename to testsuite/driver/src/.mode/COS_OLD.py diff --git a/testsuite/driver/src/mode/.mode/DEJAO0.py b/testsuite/driver/src/.mode/DEJAO0.py similarity index 100% rename from testsuite/driver/src/mode/.mode/DEJAO0.py rename to testsuite/driver/src/.mode/DEJAO0.py diff --git a/testsuite/driver/src/mode/.mode/DEJAO0_OLD.py b/testsuite/driver/src/.mode/DEJAO0_OLD.py similarity index 100% rename from testsuite/driver/src/mode/.mode/DEJAO0_OLD.py rename to testsuite/driver/src/.mode/DEJAO0_OLD.py diff --git a/testsuite/driver/src/mode/.mode/DRIVER.py b/testsuite/driver/src/.mode/DRIVER.py similarity index 100% rename from testsuite/driver/src/mode/.mode/DRIVER.py rename to testsuite/driver/src/.mode/DRIVER.py diff --git a/testsuite/driver/src/mode/.mode/ENCO2_B_D.py b/testsuite/driver/src/.mode/ENCO2_B_D.py similarity index 100% rename from testsuite/driver/src/mode/.mode/ENCO2_B_D.py rename to testsuite/driver/src/.mode/ENCO2_B_D.py diff --git a/testsuite/driver/src/mode/.mode/ENCO2_B_D_A_C.py b/testsuite/driver/src/.mode/ENCO2_B_D_A_C.py similarity index 100% rename from testsuite/driver/src/mode/.mode/ENCO2_B_D_A_C.py rename to testsuite/driver/src/.mode/ENCO2_B_D_A_C.py diff --git a/testsuite/driver/src/mode/.mode/ENCO2_B_D_A_C_OLD.py b/testsuite/driver/src/.mode/ENCO2_B_D_A_C_OLD.py similarity index 100% rename from testsuite/driver/src/mode/.mode/ENCO2_B_D_A_C_OLD.py rename to testsuite/driver/src/.mode/ENCO2_B_D_A_C_OLD.py diff --git a/testsuite/driver/src/mode/.mode/ENCO2_B_D_OLD.py b/testsuite/driver/src/.mode/ENCO2_B_D_OLD.py similarity index 100% rename from testsuite/driver/src/mode/.mode/ENCO2_B_D_OLD.py rename to testsuite/driver/src/.mode/ENCO2_B_D_OLD.py diff --git a/testsuite/driver/src/mode/.mode/ENCO2_N_D.py b/testsuite/driver/src/.mode/ENCO2_N_D.py similarity index 100% rename from testsuite/driver/src/mode/.mode/ENCO2_N_D.py rename to testsuite/driver/src/.mode/ENCO2_N_D.py diff --git a/testsuite/driver/src/mode/.mode/ENCO2_N_D_ALL.py b/testsuite/driver/src/.mode/ENCO2_N_D_ALL.py similarity index 100% rename from testsuite/driver/src/mode/.mode/ENCO2_N_D_ALL.py rename to testsuite/driver/src/.mode/ENCO2_N_D_ALL.py diff --git a/testsuite/driver/src/mode/.mode/ENCO2_N_D_ALL_OLD.py b/testsuite/driver/src/.mode/ENCO2_N_D_ALL_OLD.py similarity index 100% rename from testsuite/driver/src/mode/.mode/ENCO2_N_D_ALL_OLD.py rename to testsuite/driver/src/.mode/ENCO2_N_D_ALL_OLD.py diff --git a/testsuite/driver/src/mode/.mode/ENCO2_N_D_NO_LINK.py b/testsuite/driver/src/.mode/ENCO2_N_D_NO_LINK.py similarity index 100% rename from testsuite/driver/src/mode/.mode/ENCO2_N_D_NO_LINK.py rename to testsuite/driver/src/.mode/ENCO2_N_D_NO_LINK.py diff --git a/testsuite/driver/src/mode/.mode/ENCO2_N_D_NO_LINK_OLD.py b/testsuite/driver/src/.mode/ENCO2_N_D_NO_LINK_OLD.py similarity index 100% rename from testsuite/driver/src/mode/.mode/ENCO2_N_D_NO_LINK_OLD.py rename to testsuite/driver/src/.mode/ENCO2_N_D_NO_LINK_OLD.py diff --git a/testsuite/driver/src/mode/.mode/ENCO2_N_D_OLD.py b/testsuite/driver/src/.mode/ENCO2_N_D_OLD.py similarity index 100% rename from testsuite/driver/src/mode/.mode/ENCO2_N_D_OLD.py rename to testsuite/driver/src/.mode/ENCO2_N_D_OLD.py diff --git a/testsuite/driver/src/mode/.mode/ENCO2_S_D.py b/testsuite/driver/src/.mode/ENCO2_S_D.py similarity index 100% rename from testsuite/driver/src/mode/.mode/ENCO2_S_D.py rename to testsuite/driver/src/.mode/ENCO2_S_D.py diff --git a/testsuite/driver/src/mode/.mode/ENCO2_S_D_OLD.py b/testsuite/driver/src/.mode/ENCO2_S_D_OLD.py similarity index 100% rename from testsuite/driver/src/mode/.mode/ENCO2_S_D_OLD.py rename to testsuite/driver/src/.mode/ENCO2_S_D_OLD.py diff --git a/testsuite/driver/src/mode/.mode/FORTIFY_O1.py b/testsuite/driver/src/.mode/FORTIFY_O1.py similarity index 100% rename from testsuite/driver/src/mode/.mode/FORTIFY_O1.py rename to testsuite/driver/src/.mode/FORTIFY_O1.py diff --git a/testsuite/driver/src/mode/.mode/FORTIFY_O1_OLD.py b/testsuite/driver/src/.mode/FORTIFY_O1_OLD.py similarity index 100% rename from testsuite/driver/src/mode/.mode/FORTIFY_O1_OLD.py rename to testsuite/driver/src/.mode/FORTIFY_O1_OLD.py diff --git a/testsuite/driver/src/mode/.mode/FORTIFY_O2.py b/testsuite/driver/src/.mode/FORTIFY_O2.py similarity index 100% rename from testsuite/driver/src/mode/.mode/FORTIFY_O2.py rename to testsuite/driver/src/.mode/FORTIFY_O2.py diff --git a/testsuite/driver/src/mode/.mode/FORTIFY_O2_OLD.py b/testsuite/driver/src/.mode/FORTIFY_O2_OLD.py similarity index 100% rename from testsuite/driver/src/mode/.mode/FORTIFY_O2_OLD.py rename to testsuite/driver/src/.mode/FORTIFY_O2_OLD.py diff --git a/testsuite/driver/src/mode/.mode/GC_O0.py b/testsuite/driver/src/.mode/GC_O0.py similarity index 100% rename from testsuite/driver/src/mode/.mode/GC_O0.py rename to testsuite/driver/src/.mode/GC_O0.py diff --git a/testsuite/driver/src/mode/.mode/GC_O2.py b/testsuite/driver/src/.mode/GC_O2.py similarity index 100% rename from testsuite/driver/src/mode/.mode/GC_O2.py rename to testsuite/driver/src/.mode/GC_O2.py diff --git a/testsuite/driver/src/mode/.mode/IR.py b/testsuite/driver/src/.mode/IR.py similarity index 100% rename from testsuite/driver/src/mode/.mode/IR.py rename to testsuite/driver/src/.mode/IR.py diff --git a/testsuite/driver/src/mode/.mode/LTOASTO0.py b/testsuite/driver/src/.mode/LTOASTO0.py similarity index 100% rename from testsuite/driver/src/mode/.mode/LTOASTO0.py rename to testsuite/driver/src/.mode/LTOASTO0.py diff --git a/testsuite/driver/src/mode/.mode/LTO_ENC.py b/testsuite/driver/src/.mode/LTO_ENC.py similarity index 100% rename from testsuite/driver/src/mode/.mode/LTO_ENC.py rename to testsuite/driver/src/.mode/LTO_ENC.py diff --git a/testsuite/driver/src/mode/.mode/LTO_TEST.py b/testsuite/driver/src/.mode/LTO_TEST.py similarity index 100% rename from testsuite/driver/src/mode/.mode/LTO_TEST.py rename to testsuite/driver/src/.mode/LTO_TEST.py diff --git a/testsuite/driver/src/mode/.mode/LVMMBCO2.py b/testsuite/driver/src/.mode/LVMMBCO2.py similarity index 100% rename from testsuite/driver/src/mode/.mode/LVMMBCO2.py rename to testsuite/driver/src/.mode/LVMMBCO2.py diff --git a/testsuite/driver/src/mode/.mode/LVMO0_DEBUG.py b/testsuite/driver/src/.mode/LVMO0_DEBUG.py similarity index 100% rename from testsuite/driver/src/mode/.mode/LVMO0_DEBUG.py rename to testsuite/driver/src/.mode/LVMO0_DEBUG.py diff --git a/testsuite/driver/src/mode/.mode/LVMO0_DEBUG_OLD.py b/testsuite/driver/src/.mode/LVMO0_DEBUG_OLD.py similarity index 100% rename from testsuite/driver/src/mode/.mode/LVMO0_DEBUG_OLD.py rename to testsuite/driver/src/.mode/LVMO0_DEBUG_OLD.py diff --git a/testsuite/driver/src/mode/.mode/LVMO2.py b/testsuite/driver/src/.mode/LVMO2.py similarity index 100% rename from testsuite/driver/src/mode/.mode/LVMO2.py rename to testsuite/driver/src/.mode/LVMO2.py diff --git a/testsuite/driver/src/mode/.mode/LVMO2_OLD.py b/testsuite/driver/src/.mode/LVMO2_OLD.py similarity index 100% rename from testsuite/driver/src/mode/.mode/LVMO2_OLD.py rename to testsuite/driver/src/.mode/LVMO2_OLD.py diff --git a/testsuite/driver/src/mode/.mode/LVMO2_SAFE.py b/testsuite/driver/src/.mode/LVMO2_SAFE.py similarity index 100% rename from testsuite/driver/src/mode/.mode/LVMO2_SAFE.py rename to testsuite/driver/src/.mode/LVMO2_SAFE.py diff --git a/testsuite/driver/src/mode/.mode/LVMO2_SAFE_OLD.py b/testsuite/driver/src/.mode/LVMO2_SAFE_OLD.py similarity index 100% rename from testsuite/driver/src/mode/.mode/LVMO2_SAFE_OLD.py rename to testsuite/driver/src/.mode/LVMO2_SAFE_OLD.py diff --git a/testsuite/driver/src/mode/.mode/MPLIR.py b/testsuite/driver/src/.mode/MPLIR.py similarity index 100% rename from testsuite/driver/src/mode/.mode/MPLIR.py rename to testsuite/driver/src/.mode/MPLIR.py diff --git a/testsuite/driver/src/mode/.mode/NEONO0.py b/testsuite/driver/src/.mode/NEONO0.py similarity index 100% rename from testsuite/driver/src/mode/.mode/NEONO0.py rename to testsuite/driver/src/.mode/NEONO0.py diff --git a/testsuite/driver/src/mode/.mode/NEONO0_OLD.py b/testsuite/driver/src/.mode/NEONO0_OLD.py similarity index 100% rename from testsuite/driver/src/mode/.mode/NEONO0_OLD.py rename to testsuite/driver/src/.mode/NEONO0_OLD.py diff --git a/testsuite/driver/src/mode/.mode/NEONO2.py b/testsuite/driver/src/.mode/NEONO2.py similarity index 100% rename from testsuite/driver/src/mode/.mode/NEONO2.py rename to testsuite/driver/src/.mode/NEONO2.py diff --git a/testsuite/driver/src/mode/.mode/NEONO2_OLD.py b/testsuite/driver/src/.mode/NEONO2_OLD.py similarity index 100% rename from testsuite/driver/src/mode/.mode/NEONO2_OLD.py rename to testsuite/driver/src/.mode/NEONO2_OLD.py diff --git a/testsuite/driver/src/mode/.mode/O0.py b/testsuite/driver/src/.mode/O0.py similarity index 100% rename from testsuite/driver/src/mode/.mode/O0.py rename to testsuite/driver/src/.mode/O0.py diff --git a/testsuite/driver/src/mode/.mode/O2.py b/testsuite/driver/src/.mode/O2.py similarity index 100% rename from testsuite/driver/src/mode/.mode/O2.py rename to testsuite/driver/src/.mode/O2.py diff --git a/testsuite/driver/src/mode/.mode/OPTMBCO2.py b/testsuite/driver/src/.mode/OPTMBCO2.py similarity index 100% rename from testsuite/driver/src/mode/.mode/OPTMBCO2.py rename to testsuite/driver/src/.mode/OPTMBCO2.py diff --git a/testsuite/driver/src/mode/.mode/OPTO2.py b/testsuite/driver/src/.mode/OPTO2.py similarity index 100% rename from testsuite/driver/src/mode/.mode/OPTO2.py rename to testsuite/driver/src/.mode/OPTO2.py diff --git a/testsuite/driver/src/mode/.mode/OPTO2_OLD.py b/testsuite/driver/src/.mode/OPTO2_OLD.py similarity index 100% rename from testsuite/driver/src/mode/.mode/OPTO2_OLD.py rename to testsuite/driver/src/.mode/OPTO2_OLD.py diff --git a/testsuite/driver/src/mode/.mode/OPTO2_SAFE.py b/testsuite/driver/src/.mode/OPTO2_SAFE.py similarity index 100% rename from testsuite/driver/src/mode/.mode/OPTO2_SAFE.py rename to testsuite/driver/src/.mode/OPTO2_SAFE.py diff --git a/testsuite/driver/src/mode/.mode/OPTO2_SAFE_OLD.py b/testsuite/driver/src/.mode/OPTO2_SAFE_OLD.py similarity index 100% rename from testsuite/driver/src/mode/.mode/OPTO2_SAFE_OLD.py rename to testsuite/driver/src/.mode/OPTO2_SAFE_OLD.py diff --git a/testsuite/driver/src/mode/.mode/SAFEO2_TEST.py b/testsuite/driver/src/.mode/SAFEO2_TEST.py similarity index 100% rename from testsuite/driver/src/mode/.mode/SAFEO2_TEST.py rename to testsuite/driver/src/.mode/SAFEO2_TEST.py diff --git a/testsuite/driver/src/mode/.mode/SAFEO2_TRAIN.py b/testsuite/driver/src/.mode/SAFEO2_TRAIN.py similarity index 100% rename from testsuite/driver/src/mode/.mode/SAFEO2_TRAIN.py rename to testsuite/driver/src/.mode/SAFEO2_TRAIN.py diff --git a/testsuite/driver/src/mode/.mode/SCMBCO2_TEST.py b/testsuite/driver/src/.mode/SCMBCO2_TEST.py similarity index 100% rename from testsuite/driver/src/mode/.mode/SCMBCO2_TEST.py rename to testsuite/driver/src/.mode/SCMBCO2_TEST.py diff --git a/testsuite/driver/src/mode/.mode/SCMBCO2_TRAIN.py b/testsuite/driver/src/.mode/SCMBCO2_TRAIN.py similarity index 100% rename from testsuite/driver/src/mode/.mode/SCMBCO2_TRAIN.py rename to testsuite/driver/src/.mode/SCMBCO2_TRAIN.py diff --git a/testsuite/driver/src/mode/.mode/SCO0_TEST.py b/testsuite/driver/src/.mode/SCO0_TEST.py similarity index 100% rename from testsuite/driver/src/mode/.mode/SCO0_TEST.py rename to testsuite/driver/src/.mode/SCO0_TEST.py diff --git a/testsuite/driver/src/mode/.mode/SCO0_TEST_MERGE.py b/testsuite/driver/src/.mode/SCO0_TEST_MERGE.py similarity index 56% rename from testsuite/driver/src/mode/.mode/SCO0_TEST_MERGE.py rename to testsuite/driver/src/.mode/SCO0_TEST_MERGE.py index ecb1d5eeb1..caf001aa36 100644 --- a/testsuite/driver/src/mode/.mode/SCO0_TEST_MERGE.py +++ b/testsuite/driver/src/.mode/SCO0_TEST_MERGE.py @@ -18,69 +18,41 @@ from api import * SCO0_TEST_MERGE = { - "c2ast": [ - C2ast( - clang="${ENHANCED_CLANG_PATH}/bin/clang", + "c2o": [ + MapleDriver( + maple="${MAPLE_BUILD_OUTPUT}/bin/maple", + infiles=["${APP}.c"], + outfile="${TARGET}", include_path=[ - "${OUT_ROOT}/aarch64-clang-release/lib/include", + "${MAPLE_BUILD_OUTPUT}/lib/include", "${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc/usr/include", "${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/lib/gcc/aarch64-linux-gnu/7.5.0/include" ], - option="--target=aarch64", - infile="${APP}.c", - outfile="${APP}.ast", + option="--O0 --patch-long-branch -fPIC --no-pie -std=gnu99 -lm -L${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc/lib/", extra_opt="${SPEC_PARAM}" ) ], - # multiple ast input - "ast2mpl": [ - Hir2mpl( - hir2mpl="${OUT_ROOT}/aarch64-clang-release/bin/hir2mpl", - option="-wpaa", - infile="${APP}", - outfile="${TARGET}" - ) - ], - "c2mpl": [ - C2ast( - clang="${ENHANCED_CLANG_PATH}/bin/clang", + "compile": [ + MapleDriver( + maple="${MAPLE_BUILD_OUTPUT}/bin/maple", + infiles=["${APP}.c"], + outfile="${APP}.o", include_path=[ - "${OUT_ROOT}/aarch64-clang-release/lib/include", + "${MAPLE_BUILD_OUTPUT}/lib/include", "${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc/usr/include", "${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/lib/gcc/aarch64-linux-gnu/7.5.0/include" ], - option="--target=aarch64", - infile="${APP}.c", - outfile="${APP}.ast", + option="--O0 --patch-long-branch -fPIC --no-pie -flto -c", extra_opt="${SPEC_PARAM}" - ), - Hir2mpl( - hir2mpl="${OUT_ROOT}/aarch64-clang-release/bin/hir2mpl", - option="-enable-variable-array -wpaa", - infile="${APP}.ast", - outfile="${APP}.mpl" ) ], - "merge_mpl":[ - Shell( - "cat ${APP} > ${TARGET}" - ) - ], - "mpl2o":[ + "link": [ MapleDriver( maple="${OUT_ROOT}/aarch64-clang-release/bin/maple", - infiles=["${APP}.mpl"], - outfile="${APP}.o", - option="--O0 --patch-long-branch -fPIC --no-pie -c" - ) - ], - "link": [ - CLinker( infiles=["${APP}"], - front_option="-std=gnu99 -no-pie", - outfile="${EXE}", - back_option="-lm -L${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc/lib/", - mid_opt="${MID_OPT}" + outfile="${TARGET}", + option="-std=gnu99 -lm -L${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc/lib/", + extra_opt="--O0 --patch-long-branch -fPIC --no-pie -flto" ) ], "cp_data":[ diff --git a/testsuite/driver/src/mode/.mode/SCO0_TRAIN.py b/testsuite/driver/src/.mode/SCO0_TRAIN.py similarity index 100% rename from testsuite/driver/src/mode/.mode/SCO0_TRAIN.py rename to testsuite/driver/src/.mode/SCO0_TRAIN.py diff --git a/testsuite/driver/src/mode/.mode/SCO0_TRAIN_MERGE.py b/testsuite/driver/src/.mode/SCO0_TRAIN_MERGE.py similarity index 59% rename from testsuite/driver/src/mode/.mode/SCO0_TRAIN_MERGE.py rename to testsuite/driver/src/.mode/SCO0_TRAIN_MERGE.py index 46bb1f3eab..9f3ecb7847 100644 --- a/testsuite/driver/src/mode/.mode/SCO0_TRAIN_MERGE.py +++ b/testsuite/driver/src/.mode/SCO0_TRAIN_MERGE.py @@ -18,68 +18,41 @@ from api import * SCO0_TRAIN_MERGE = { - "c2ast": [ - C2ast( - clang="${ENHANCED_CLANG_PATH}/bin/clang", + "c2o": [ + MapleDriver( + maple="${MAPLE_BUILD_OUTPUT}/bin/maple", + infiles=["${APP}.c"], + outfile="${TARGET}", include_path=[ - "${OUT_ROOT}/aarch64-clang-release/lib/include", + "${MAPLE_BUILD_OUTPUT}/lib/include", "${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc/usr/include", "${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/lib/gcc/aarch64-linux-gnu/7.5.0/include" ], - option="--target=aarch64", - infile="${APP}.c", - outfile="${APP}.ast", + option="--O0 --patch-long-branch -fPIC --no-pie -std=gnu99 -lm -L${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc/lib/", extra_opt="${SPEC_PARAM}" ) ], - # multiple ast input - "ast2mpl": [ - Hir2mpl( - hir2mpl="${OUT_ROOT}/aarch64-clang-release/bin/hir2mpl", - option="-wpaa", - infile="${APP}", - outfile="${TARGET}" - ) - ], - "c2mpl": [ - C2ast( - clang="${ENHANCED_CLANG_PATH}/bin/clang", + "compile": [ + MapleDriver( + maple="${MAPLE_BUILD_OUTPUT}/bin/maple", + infiles=["${APP}.c"], + outfile="${APP}.o", include_path=[ - "${OUT_ROOT}/aarch64-clang-release/lib/include", + "${MAPLE_BUILD_OUTPUT}/lib/include", "${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc/usr/include", "${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/lib/gcc/aarch64-linux-gnu/7.5.0/include" ], - option="--target=aarch64", - infile="${APP}.c", - outfile="${APP}.ast", + option="--O0 --patch-long-branch -fPIC --no-pie -flto -c", extra_opt="${SPEC_PARAM}" - ), - Hir2mpl( - hir2mpl="${OUT_ROOT}/aarch64-clang-release/bin/hir2mpl", - option="-enable-variable-array -wpaa", - infile="${APP}.ast", - outfile="${APP}.mpl" - ) - ], - "merge_mpl":[ - Shell( - "cat ${APP} > ${TARGET}" - ) - ], - "mpl2o":[ - MapleDriver( - maple="${OUT_ROOT}/aarch64-clang-release/bin/maple", - infiles=["${APP}.mpl"], - outfile="${APP}.o", - option="--O0 --patch-long-branch -fPIC --no-pie -c" ) ], "link": [ MapleDriver( maple="${OUT_ROOT}/aarch64-clang-release/bin/maple", infiles=["${APP}"], - outfile="${EXE}", - option="-std=gnu99 --no-pie -lm -L${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc/lib/" + outfile="${TARGET}", + option="-std=gnu99 --no-pie -lm -L${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc/lib/", + extra_opt="--O0 --patch-long-branch -fPIC --no-pie -flto ${SPEC_PARAM}" ) ], "cp_data":[ diff --git a/testsuite/driver/src/mode/.mode/SCO2_TEST.py b/testsuite/driver/src/.mode/SCO2_TEST.py similarity index 100% rename from testsuite/driver/src/mode/.mode/SCO2_TEST.py rename to testsuite/driver/src/.mode/SCO2_TEST.py diff --git a/testsuite/driver/src/mode/.mode/SCO2_TEST_MERGE.py b/testsuite/driver/src/.mode/SCO2_TEST_MERGE.py similarity index 52% rename from testsuite/driver/src/mode/.mode/SCO2_TEST_MERGE.py rename to testsuite/driver/src/.mode/SCO2_TEST_MERGE.py index 59d7aeb1df..c4c1565a1e 100644 --- a/testsuite/driver/src/mode/.mode/SCO2_TEST_MERGE.py +++ b/testsuite/driver/src/.mode/SCO2_TEST_MERGE.py @@ -18,81 +18,41 @@ from api import * SCO2_TEST_MERGE = { - "c2ast": [ - C2ast( - clang="${ENHANCED_CLANG_PATH}/bin/clang", + "c2o": [ + MapleDriver( + maple="${MAPLE_BUILD_OUTPUT}/bin/maple", + infiles=["${APP}.c"], + outfile="${TARGET}", include_path=[ - "${OUT_ROOT}/aarch64-clang-release/lib/include", + "${MAPLE_BUILD_OUTPUT}/lib/include", "${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc/usr/include", "${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/lib/gcc/aarch64-linux-gnu/7.5.0/include" ], - option="--target=aarch64", - infile="${APP}.c", - outfile="${APP}.ast", + option="--O2 --patch-long-branch -fPIC --no-pie -std=gnu99 -lm -L${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc/lib/", extra_opt="${SPEC_PARAM}" ) ], - # multiple ast input - "ast2mpl": [ - Hir2mpl( - hir2mpl="${OUT_ROOT}/aarch64-clang-release/bin/hir2mpl", - option="-wpaa", - infile="${APP}", - outfile="${TARGET}" - ) - ], - "c2mpl": [ - C2ast( - clang="${ENHANCED_CLANG_PATH}/bin/clang", + "compile": [ + MapleDriver( + maple="${MAPLE_BUILD_OUTPUT}/bin/maple", + infiles=["${APP}.c"], + outfile="${APP}.o", include_path=[ - "${OUT_ROOT}/aarch64-clang-release/lib/include", + "${MAPLE_BUILD_OUTPUT}/lib/include", "${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc/usr/include", "${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/lib/gcc/aarch64-linux-gnu/7.5.0/include" ], - option="--target=aarch64", - infile="${APP}.c", - outfile="${APP}.ast", + option="--O2 -fPIC -g --no-pie -flto -c", extra_opt="${SPEC_PARAM}" - ), - Hir2mpl( - hir2mpl="${OUT_ROOT}/aarch64-clang-release/bin/hir2mpl", - option="-enable-variable-array -wpaa", - infile="${APP}.ast", - outfile="${APP}.mpl" - ) - ], - "merge_mpl":[ - Shell( - "cat ${APP} > ${TARGET}" - ) - ], - "mpl2o":[ - Maple( - maple="${OUT_ROOT}/aarch64-clang-release/bin/maple", - run=["me", "mpl2mpl", "mplcg"], - option={ - "me": "-O2 --quiet", - "mpl2mpl": "-O2 --quiet", - "mplcg": "--O2 --quiet --no-pie --verbose-asm --fPIC" - }, - global_option="", - infiles=["${APP}.mpl"], - outfile="${APP}.s" - ), - CLinker( - infiles=["${APP}.s"], - front_option="-O2 -std=c99", - outfile="${APP}.o", - back_option="", - mid_opt="-c" ) ], "link": [ MapleDriver( maple="${OUT_ROOT}/aarch64-clang-release/bin/maple", infiles=["${APP}"], - outfile="${EXE}", - option="-std=gnu99 --no-pie -lm -L${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc/lib/" + outfile="${TARGET}", + option="-std=gnu99 --no-pie -lm -L${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc/lib/", + extra_opt="--O2 -fPIC -g --no-pie -flto ${SPEC_PARAM}" ) ], "cp_data":[ diff --git a/testsuite/driver/src/mode/.mode/SCO2_TRAIN.py b/testsuite/driver/src/.mode/SCO2_TRAIN.py similarity index 100% rename from testsuite/driver/src/mode/.mode/SCO2_TRAIN.py rename to testsuite/driver/src/.mode/SCO2_TRAIN.py diff --git a/testsuite/driver/src/mode/.mode/SCOS_TRAIN_MERGE.py b/testsuite/driver/src/.mode/SCO2_TRAIN_MERGE.py similarity index 56% rename from testsuite/driver/src/mode/.mode/SCOS_TRAIN_MERGE.py rename to testsuite/driver/src/.mode/SCO2_TRAIN_MERGE.py index dcb7999ade..ca495b9876 100644 --- a/testsuite/driver/src/mode/.mode/SCOS_TRAIN_MERGE.py +++ b/testsuite/driver/src/.mode/SCO2_TRAIN_MERGE.py @@ -1,3 +1,5 @@ +#!/usr/bin/env python +# coding=utf-8 # # Copyright (c) [2022] Huawei Technologies Co.,Ltd.All rights reserved. # @@ -15,69 +17,42 @@ from api import * -SCOS_TRAIN_MERGE = { - "c2ast": [ - C2ast( - clang="${MAPLE_ROOT}/tools/bin/clang", +SCO2_TRAIN_MERGE = { + "c2o": [ + MapleDriver( + maple="${MAPLE_BUILD_OUTPUT}/bin/maple", + infiles=["${APP}.c"], + outfile="${TARGET}", include_path=[ - "${OUT_ROOT}/aarch64-clang-release/lib/include", + "${MAPLE_BUILD_OUTPUT}/lib/include", "${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc/usr/include", "${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/lib/gcc/aarch64-linux-gnu/7.5.0/include" ], - option="--target=aarch64", - infile="${APP}.c", - outfile="${APP}.ast", + option="--O2 --patch-long-branch -fPIC --no-pie -std=gnu99 -lm -L${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc/lib/", extra_opt="${SPEC_PARAM}" ) ], - # multiple ast input - "ast2mpl": [ - Hir2mpl( - hir2mpl="${OUT_ROOT}/aarch64-clang-release/bin/hir2mpl", - option="-wpaa", - infile="${APP}", - outfile="${TARGET}" - ) - ], - "c2mpl": [ - C2ast( - clang="${MAPLE_ROOT}/tools/bin/clang", + "compile": [ + MapleDriver( + maple="${MAPLE_BUILD_OUTPUT}/bin/maple", + infiles=["${APP}.c"], + outfile="${APP}.o", include_path=[ - "${OUT_ROOT}/aarch64-clang-release/lib/include", + "${MAPLE_BUILD_OUTPUT}/lib/include", "${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc/usr/include", "${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/lib/gcc/aarch64-linux-gnu/7.5.0/include" ], - option="--target=aarch64", - infile="${APP}.c", - outfile="${APP}.ast", + option="--O2 -fPIC -g --no-pie -flto -c", extra_opt="${SPEC_PARAM}" - ), - Hir2mpl( - hir2mpl="${OUT_ROOT}/aarch64-clang-release/bin/hir2mpl", - option="-enable-variable-array -wpaa", - infile="${APP}.ast", - outfile="${APP}.mpl" - ) - ], - "merge_mpl":[ - Shell( - "cat ${APP} > ${TARGET}" - ) - ], - "mpl2o":[ - MapleDriver( - maple="${OUT_ROOT}/aarch64-clang-release/bin/maple", - infiles=["${APP}.mpl"], - outfile="${APP}.o", - option="--Os -fPIC --no-pie -c" ) ], "link": [ MapleDriver( maple="${OUT_ROOT}/aarch64-clang-release/bin/maple", infiles=["${APP}"], - outfile="${EXE}", - option="-std=gnu99 -no-pie -lm -L${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc/lib/" + outfile="${TARGET}", + option="-std=gnu99 --no-pie -lm -L${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc/lib/", + extra_opt="--O2 -fPIC -g --no-pie -flto ${SPEC_PARAM}" ) ], "cp_data":[ diff --git a/testsuite/driver/src/.mode/SCOS_TEST.py b/testsuite/driver/src/.mode/SCOS_TEST.py new file mode 100644 index 0000000000..847ddf18e8 --- /dev/null +++ b/testsuite/driver/src/.mode/SCOS_TEST.py @@ -0,0 +1,56 @@ +# +# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. +# +# OpenArkCompiler is licensed under Mulan PSL v2. +# You can use this software according to the terms and conditions of the Mulan PSL v2. +# +# http://license.coscl.org.cn/MulanPSL2 +# +# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER +# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR +# FIT FOR A PARTICULAR PURPOSE. +# See the Mulan PSL v2 for more details. +# + +from api import * + + +SCOS_TEST = { + "compile": [ + MapleDriver( + maple="${MAPLE_BUILD_OUTPUT}/bin/maple", + infiles=["${APP}.c"], + outfile="${APP}.o", + include_path=[ + "${MAPLE_BUILD_OUTPUT}/lib/include", + "${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc/usr/include", + "${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/lib/gcc/aarch64-linux-gnu/7.5.0/include" + ], + option="--Os -fPIC --no-pie -c", + extra_opt="${SPEC_PARAM}" + ) + ], + "link": [ + MapleDriver( + maple="${MAPLE_BUILD_OUTPUT}/bin/maple", + infiles=["${APP}"], + outfile="${EXE}", + option="-std=gnu99 -no-pie -lm -L${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc/lib/" + ) + ], + "cp_data":[ + Shell( + "cp -r data/test/${APP} ${TARGET}" + ) + ], + "run": [ + Shell( + "${MAPLE_ROOT}/tools/bin/qemu-aarch64 -L ${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc ${EXE} ${APP} > output.log" + ) + ], + "compare": [ + Shell( + "${MAPLE_ROOT}/testsuite/c_test/spec_test/specperl ${MAPLE_ROOT}/testsuite/c_test/spec_test/specdiff -m -l 10 ${EXTRA_COMPARE} output.log data/test/${APP}" + ) + ] +} diff --git a/testsuite/driver/src/.mode/SCOS_TEST_MERGE.py b/testsuite/driver/src/.mode/SCOS_TEST_MERGE.py new file mode 100644 index 0000000000..40d40f158b --- /dev/null +++ b/testsuite/driver/src/.mode/SCOS_TEST_MERGE.py @@ -0,0 +1,71 @@ +# +# Copyright (c) [2022] Huawei Technologies Co.,Ltd.All rights reserved. +# +# OpenArkCompiler is licensed under Mulan PSL v2. +# You can use this software according to the terms and conditions of the Mulan PSL v2. +# +# http://license.coscl.org.cn/MulanPSL2 +# +# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER +# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR +# FIT FOR A PARTICULAR PURPOSE. +# See the Mulan PSL v2 for more details. +# + +from api import * + + +SCOS_TEST_MERGE = { + "c2o": [ + MapleDriver( + maple="${MAPLE_BUILD_OUTPUT}/bin/maple", + infiles=["${APP}.c"], + outfile="${TARGET}", + include_path=[ + "${MAPLE_BUILD_OUTPUT}/lib/include", + "${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc/usr/include", + "${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/lib/gcc/aarch64-linux-gnu/7.5.0/include" + ], + option="--Os --patch-long-branch -fPIC --no-pie -std=gnu99 -lm -L${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc/lib/", + extra_opt="${SPEC_PARAM}" + ) + ], + "compile": [ + MapleDriver( + maple="${MAPLE_BUILD_OUTPUT}/bin/maple", + infiles=["${APP}.c"], + outfile="${APP}.o", + include_path=[ + "${MAPLE_BUILD_OUTPUT}/lib/include", + "${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc/usr/include", + "${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/lib/gcc/aarch64-linux-gnu/7.5.0/include" + ], + option="--Os -fPIC -g --no-pie -flto -c", + extra_opt="${SPEC_PARAM}" + ) + ], + "link": [ + MapleDriver( + maple="${OUT_ROOT}/aarch64-clang-release/bin/maple", + infiles=["${APP}"], + outfile="${TARGET}", + option="-std=gnu99 --no-pie -lm -L${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc/lib/", + extra_opt="--Os -fPIC -g --no-pie -flto ${SPEC_PARAM}" + ) + ], + "cp_data":[ + Shell( + "cp -r data/test/${APP} ${TARGET}" + ) + ], + "run": [ + Shell( + "${MAPLE_ROOT}/tools/bin/qemu-aarch64 -L ${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc ${EXE} ${APP} > output.log" + ) + ], + "compare": [ + Shell( + "${MAPLE_ROOT}/testsuite/c_test/spec_test/specperl ${MAPLE_ROOT}/testsuite/c_test/spec_test/specdiff -m -l 10 ${EXTRA_COMPARE} output.log data/test/${APP}" + ) + ] +} diff --git a/testsuite/driver/src/mode/.mode/SCOS_TRAIN.py b/testsuite/driver/src/.mode/SCOS_TRAIN.py similarity index 100% rename from testsuite/driver/src/mode/.mode/SCOS_TRAIN.py rename to testsuite/driver/src/.mode/SCOS_TRAIN.py diff --git a/testsuite/driver/src/mode/.mode/SCO2_TRAIN_MERGE.py b/testsuite/driver/src/.mode/SCOS_TRAIN_MERGE.py similarity index 43% rename from testsuite/driver/src/mode/.mode/SCO2_TRAIN_MERGE.py rename to testsuite/driver/src/.mode/SCOS_TRAIN_MERGE.py index e8e596243e..4e189a0e26 100644 --- a/testsuite/driver/src/mode/.mode/SCO2_TRAIN_MERGE.py +++ b/testsuite/driver/src/.mode/SCOS_TRAIN_MERGE.py @@ -1,5 +1,3 @@ -#!/usr/bin/env python -# coding=utf-8 # # Copyright (c) [2022] Huawei Technologies Co.,Ltd.All rights reserved. # @@ -17,82 +15,28 @@ from api import * -SCO2_TRAIN_MERGE = { - "c2ast": [ - C2ast( - clang="${ENHANCED_CLANG_PATH}/bin/clang", - include_path=[ - "${OUT_ROOT}/aarch64-clang-release/lib/include", - "${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc/usr/include", - "${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/lib/gcc/aarch64-linux-gnu/7.5.0/include" - ], - option="--target=aarch64", - infile="${APP}.c", - outfile="${APP}.ast", - extra_opt="${SPEC_PARAM}" - ) - ], - # multiple ast input - "ast2mpl": [ - Hir2mpl( - hir2mpl="${OUT_ROOT}/aarch64-clang-release/bin/hir2mpl", - option="-wpaa", - infile="${APP}", - outfile="${TARGET}" - ) - ], - "c2mpl": [ - C2ast( - clang="${ENHANCED_CLANG_PATH}/bin/clang", +SCOS_TRAIN_MERGE = { + "compile": [ + MapleDriver( + maple="${MAPLE_BUILD_OUTPUT}/bin/maple", + infiles=["${APP}.c"], + outfile="${APP}.o", include_path=[ - "${OUT_ROOT}/aarch64-clang-release/lib/include", + "${MAPLE_BUILD_OUTPUT}/lib/include", "${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc/usr/include", "${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/lib/gcc/aarch64-linux-gnu/7.5.0/include" ], - option="--target=aarch64", - infile="${APP}.c", - outfile="${APP}.ast", + option="--Os -fPIC -g --no-pie -flto -c", extra_opt="${SPEC_PARAM}" - ), - Hir2mpl( - hir2mpl="${OUT_ROOT}/aarch64-clang-release/bin/hir2mpl", - option="-enable-variable-array -wpaa", - infile="${APP}.ast", - outfile="${APP}.mpl" - ) - ], - "merge_mpl":[ - Shell( - "cat ${APP} > ${TARGET}" - ) - ], - "mpl2o":[ - Maple( - maple="${OUT_ROOT}/aarch64-clang-release/bin/maple", - run=["me", "mpl2mpl", "mplcg"], - option={ - "me": "-O2 --quiet", - "mpl2mpl": "-O2 --quiet", - "mplcg": "--O2 --quiet --no-pie --verbose-asm --fPIC" - }, - global_option="", - infiles=["${APP}.mpl"], - outfile="${APP}.s" - ), - CLinker( - infiles=["${APP}.s"], - front_option="-O2 -std=c99", - outfile="${APP}.o", - back_option="", - mid_opt="-c" ) ], "link": [ MapleDriver( maple="${OUT_ROOT}/aarch64-clang-release/bin/maple", infiles=["${APP}"], - outfile="${EXE}", - option="-std=gnu99 --no-pie -lm -L${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc/lib/" + outfile="${TARGET}", + option="-std=gnu99 --no-pie -lm -L${MAPLE_ROOT}/tools/gcc-linaro-7.5.0/aarch64-linux-gnu/libc/lib/", + extra_opt="--Os -fPIC -g --no-pie -flto ${SPEC_PARAM}" ) ], "cp_data":[ diff --git a/testsuite/driver/src/mode/.mode/SP_ALL.py b/testsuite/driver/src/.mode/SP_ALL.py similarity index 100% rename from testsuite/driver/src/mode/.mode/SP_ALL.py rename to testsuite/driver/src/.mode/SP_ALL.py diff --git a/testsuite/driver/src/mode/.mode/SP_ALL_OLD.py b/testsuite/driver/src/.mode/SP_ALL_OLD.py similarity index 100% rename from testsuite/driver/src/mode/.mode/SP_ALL_OLD.py rename to testsuite/driver/src/.mode/SP_ALL_OLD.py diff --git a/testsuite/driver/src/mode/.mode/SP_STRONG.py b/testsuite/driver/src/.mode/SP_STRONG.py similarity index 100% rename from testsuite/driver/src/mode/.mode/SP_STRONG.py rename to testsuite/driver/src/.mode/SP_STRONG.py diff --git a/testsuite/driver/src/mode/.mode/SP_STRONG_OLD.py b/testsuite/driver/src/.mode/SP_STRONG_OLD.py similarity index 100% rename from testsuite/driver/src/mode/.mode/SP_STRONG_OLD.py rename to testsuite/driver/src/.mode/SP_STRONG_OLD.py diff --git a/testsuite/driver/src/mode/.mode/SUPMBCO2.py b/testsuite/driver/src/.mode/SUPMBCO2.py similarity index 100% rename from testsuite/driver/src/mode/.mode/SUPMBCO2.py rename to testsuite/driver/src/.mode/SUPMBCO2.py diff --git a/testsuite/driver/src/mode/.mode/SUPO0.py b/testsuite/driver/src/.mode/SUPO0.py similarity index 100% rename from testsuite/driver/src/mode/.mode/SUPO0.py rename to testsuite/driver/src/.mode/SUPO0.py diff --git a/testsuite/driver/src/mode/.mode/SUPO0_OLD.py b/testsuite/driver/src/.mode/SUPO0_OLD.py similarity index 100% rename from testsuite/driver/src/mode/.mode/SUPO0_OLD.py rename to testsuite/driver/src/.mode/SUPO0_OLD.py diff --git a/testsuite/driver/src/mode/.mode/SUPO2.py b/testsuite/driver/src/.mode/SUPO2.py similarity index 100% rename from testsuite/driver/src/mode/.mode/SUPO2.py rename to testsuite/driver/src/.mode/SUPO2.py diff --git a/testsuite/driver/src/mode/.mode/SUPO2_OLD.py b/testsuite/driver/src/.mode/SUPO2_OLD.py similarity index 100% rename from testsuite/driver/src/mode/.mode/SUPO2_OLD.py rename to testsuite/driver/src/.mode/SUPO2_OLD.py diff --git a/testsuite/driver/src/mode/.mode/SUPO2_SAFE.py b/testsuite/driver/src/.mode/SUPO2_SAFE.py similarity index 100% rename from testsuite/driver/src/mode/.mode/SUPO2_SAFE.py rename to testsuite/driver/src/.mode/SUPO2_SAFE.py diff --git a/testsuite/driver/src/mode/.mode/SUPO2_SAFE_OLD.py b/testsuite/driver/src/.mode/SUPO2_SAFE_OLD.py similarity index 100% rename from testsuite/driver/src/mode/.mode/SUPO2_SAFE_OLD.py rename to testsuite/driver/src/.mode/SUPO2_SAFE_OLD.py diff --git a/testsuite/driver/src/mode/.mode/TEST_O2.py b/testsuite/driver/src/.mode/TEST_O2.py similarity index 88% rename from testsuite/driver/src/mode/.mode/TEST_O2.py rename to testsuite/driver/src/.mode/TEST_O2.py index e3af7492f2..cce3205597 100644 --- a/testsuite/driver/src/mode/.mode/TEST_O2.py +++ b/testsuite/driver/src/.mode/TEST_O2.py @@ -35,6 +35,14 @@ TEST_O2 = { ) ], "link": [ + MapleDriver( + maple="${MAPLE_BUILD_OUTPUT}/bin/maple", + infiles=["${APP2}.o"], + outfile="a.out", + option="-w -L. -l${LIB} -Wl,-rpath=." + ) + ], + "link2": [ MapleDriver( maple="${MAPLE_BUILD_OUTPUT}/bin/maple", infiles=["${APP2}.o","${APP3}.o"], diff --git a/testsuite/driver/src/mode/.mode/TEST_OS.py b/testsuite/driver/src/.mode/TEST_OS.py similarity index 88% rename from testsuite/driver/src/mode/.mode/TEST_OS.py rename to testsuite/driver/src/.mode/TEST_OS.py index 8c596ec79b..a17987f97f 100644 --- a/testsuite/driver/src/mode/.mode/TEST_OS.py +++ b/testsuite/driver/src/.mode/TEST_OS.py @@ -35,6 +35,14 @@ TEST_OS = { ) ], "link": [ + MapleDriver( + maple="${MAPLE_BUILD_OUTPUT}/bin/maple", + infiles=["${APP2}.o"], + outfile="a.out", + option="-w -L. -l${LIB} -Wl,-rpath=." + ) + ], + "link2": [ MapleDriver( maple="${MAPLE_BUILD_OUTPUT}/bin/maple", infiles=["${APP2}.o","${APP3}.o"], diff --git a/testsuite/driver/src/mode/.mode/TSVO2.py b/testsuite/driver/src/.mode/TSVO2.py similarity index 100% rename from testsuite/driver/src/mode/.mode/TSVO2.py rename to testsuite/driver/src/.mode/TSVO2.py diff --git a/testsuite/driver/src/mode/.mode/TSVO2_OLD.py b/testsuite/driver/src/.mode/TSVO2_OLD.py similarity index 100% rename from testsuite/driver/src/mode/.mode/TSVO2_OLD.py rename to testsuite/driver/src/.mode/TSVO2_OLD.py diff --git a/testsuite/driver/src/mode/.mode/X64_LITECG.py b/testsuite/driver/src/.mode/X64_LITECG.py similarity index 100% rename from testsuite/driver/src/mode/.mode/X64_LITECG.py rename to testsuite/driver/src/.mode/X64_LITECG.py diff --git a/testsuite/driver/src/mode/.mode/X64_LITECG_ME_O2.py b/testsuite/driver/src/.mode/X64_LITECG_ME_O2.py similarity index 100% rename from testsuite/driver/src/mode/.mode/X64_LITECG_ME_O2.py rename to testsuite/driver/src/.mode/X64_LITECG_ME_O2.py diff --git a/testsuite/driver/src/mode/.mode/X64_LITECG_MPL2MPL_O2.py b/testsuite/driver/src/.mode/X64_LITECG_MPL2MPL_O2.py similarity index 100% rename from testsuite/driver/src/mode/.mode/X64_LITECG_MPL2MPL_O2.py rename to testsuite/driver/src/.mode/X64_LITECG_MPL2MPL_O2.py diff --git a/testsuite/driver/src/mode/.mode/X64_O0.py b/testsuite/driver/src/.mode/X64_O0.py similarity index 100% rename from testsuite/driver/src/mode/.mode/X64_O0.py rename to testsuite/driver/src/.mode/X64_O0.py diff --git a/testsuite/driver/src/mode/.mode/X64_O2.py b/testsuite/driver/src/.mode/X64_O2.py similarity index 100% rename from testsuite/driver/src/mode/.mode/X64_O2.py rename to testsuite/driver/src/.mode/X64_O2.py diff --git a/testsuite/driver/src/mode/.mode/__init__.py b/testsuite/driver/src/.mode/__init__.py similarity index 100% rename from testsuite/driver/src/mode/.mode/__init__.py rename to testsuite/driver/src/.mode/__init__.py diff --git a/testsuite/driver/src/api b/testsuite/driver/src/api new file mode 120000 index 0000000000..6ef4a6bf7f --- /dev/null +++ b/testsuite/driver/src/api @@ -0,0 +1 @@ +/home/maple/workspace/OpenArkCompiler/testsuite/driver/src/.api \ No newline at end of file diff --git a/testsuite/driver/src/api/__init__.py b/testsuite/driver/src/api/__init__.py deleted file mode 100644 index 3a055c3126..0000000000 --- a/testsuite/driver/src/api/__init__.py +++ /dev/null @@ -1,32 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -import os - -names = locals() - -my_dir = os.path.dirname(__file__) -for py in os.listdir(my_dir): - if py == '__init__.py': - continue - - if py.endswith('.py'): - name = py[:-3] - - clsn = name.capitalize() - while clsn.find('_') > 0: - h = clsn.index('_') - clsn = clsn[0:h] + clsn[h + 1:].capitalize() - api = __import__("api." + name, fromlist=[clsn]) - names[clsn] = getattr(api, clsn) diff --git a/testsuite/driver/src/api/benchmark_native.py b/testsuite/driver/src/api/benchmark_native.py deleted file mode 100644 index c2c970cd97..0000000000 --- a/testsuite/driver/src/api/benchmark_native.py +++ /dev/null @@ -1,34 +0,0 @@ -import os -import re -from api.shell_operator import ShellOperator - - -class BenchmarkNative(ShellOperator): - - def __init__(self, return_value_list=None, redirection=None): - super().__init__(return_value_list, redirection) - self.command = "" - self.native_lib_name = "" - self.native_src = "" - self.native_include = "-I${MAPLE_ROOT}/../libnativehelper/include_jni" - self.native_linker = "" - - def get_command(self, variables): - if "NATIVE_LIB_NAME" in variables: - self.native_lib_name = variables["NATIVE_LIB_NAME"] - if "NATIVE_SRC" in variables: - srcs = variables["NATIVE_SRC"].split(":") - for src in srcs: - self.native_src += " " + src - if "NATIVE_INCLUDE" in variables: - includes = variables["NATIVE_INCLUDE"].split(":") - for include in includes: - if include != "": - self.native_include += " -I${MAPLE_ROOT}/../" + include - if "NATIVE_LINKE" in variables: - links = variables["NATIVE_LINKE"].split(":") - for link in links: - if link != "": - self.native_linker += " ${MAPLE_ROOT}/../" + link - self.command = "${MAPLE_ROOT}/../prebuilts/clang/host/linux-x86/clang-r353983c/bin/clang++ " + self.native_include + " " + self.native_src + " ${MAPLE_ROOT}/../out/soong/.intermediates/bionic/libc/crtbegin_so/android_arm64_armv8-a_core/crtbegin_so.o ${MAPLE_ROOT}/../prebuilts/clang/host/linux-x86/clang-r353983c/lib64/clang/9.0.3/lib/linux/libclang_rt.builtins-aarch64-android.a ${MAPLE_ROOT}/../prebuilts/gcc/linux-x86/aarch64/aarch64-linux-android-4.9/aarch64-linux-android/lib64/libatomic.a ${MAPLE_ROOT}/../out/soong/.intermediates/build/soong/libgcc_stripped/android_arm64_armv8-a_core_static/libgcc_stripped.a " + self.native_linker + " ${MAPLE_ROOT}/../out/soong/.intermediates/external/libcxx/libc++/android_arm64_armv8-a_core_shared/libc++.so ${MAPLE_ROOT}/../out/soong/.intermediates/bionic/libc/libc/android_arm64_armv8-a_core_shared_10000/libc.so ${MAPLE_ROOT}/../out/soong/.intermediates/bionic/libm/libm/android_arm64_armv8-a_core_shared_10000/libm.so ${MAPLE_ROOT}/../out/soong/.intermediates/bionic/libdl/libdl/android_arm64_armv8-a_core_shared_10000/libdl.so ${MAPLE_ROOT}/../out/soong/.intermediates/bionic/libc/crtend_so/android_arm64_armv8-a_core/obj/bionic/libc/arch-common/bionic/crtend_so.o -o ${BENCHMARK_ACTION}/lib" + self.native_lib_name + ".so -nostdlib -Wl,--gc-sections -shared -Wl,-soname,lib" + self.native_lib_name + ".so -target aarch64-linux-android -B${MAPLE_ROOT}/../prebuilts/gcc/linux-x86/aarch64/aarch64-linux-android-4.9/aarch64-linux-android/bin -Wl,-z,noexecstack -Wl,-z,relro -Wl,-z,now -Wl,--build-id=md5 -Wl,--warn-shared-textrel -Wl,--fatal-warnings -Wl,--no-undefined-version -Wl,--exclude-libs,libgcc.a -Wl,--exclude-libs,libgcc_stripped.a -fuse-ld=lld -Wl,--pack-dyn-relocs=android+relr -Wl,--use-android-relr-tags -Wl,--no-undefined -Wl,--hash-style=gnu -Wl,--icf=safe -Wl,-z,max-page-size=4096 ${MAPLE_ROOT}/../prebuilts/clang/host/linux-x86/clang-r353983c/lib64/clang/9.0.3/lib/linux/libclang_rt.ubsan_minimal-aarch64-android.a -Wl,--exclude-libs,libclang_rt.ubsan_minimal-aarch64-android.a -Wl,-execute-only -fPIC" - return super().get_final_command(variables) \ No newline at end of file diff --git a/testsuite/driver/src/api/benchmark_vogar.py b/testsuite/driver/src/api/benchmark_vogar.py deleted file mode 100644 index 67e55bccc4..0000000000 --- a/testsuite/driver/src/api/benchmark_vogar.py +++ /dev/null @@ -1,18 +0,0 @@ -import os -import re -from api.shell_operator import ShellOperator - - -class BenchmarkVogar(ShellOperator): - - def __init__(self, return_value_list=None, redirection=None): - super().__init__(return_value_list, redirection) - self.command = "" - self.vogar_deps_dir = "${MAPLE_ROOT}/zeiss/prebuilt/tools/mygote_script/benchmark_scripts" - self.sourcepath = "" - - def get_command(self, variables): - if "SOURCEPATH" in variables: - self.sourcepath = "--sourcepath " + variables["SOURCEPATH"] - self.command = "PATH=${MAPLE_ROOT}/../out/soong/host/linux-x86/bin:/$PATH ANDROID_BUILD_TOP=${MAPLE_ROOT}/.. VOGAR_DEPS_DIR=" + self.vogar_deps_dir + " java -classpath " + self.vogar_deps_dir + "/vogar.jar vogar.Vogar --results-dir . --toolchain D8 --mode DEVICE --variant X64 " + self.sourcepath + " --benchmark " + variables["BENCHMARK_CASE"] - return super().get_final_command(variables) \ No newline at end of file diff --git a/testsuite/driver/src/api/check_file_equal.py b/testsuite/driver/src/api/check_file_equal.py deleted file mode 100644 index d4472a1981..0000000000 --- a/testsuite/driver/src/api/check_file_equal.py +++ /dev/null @@ -1,27 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api.shell_operator import ShellOperator - - -class CheckFileEqual(ShellOperator): - - def __init__(self, file1, file2, return_value_list=None): - super().__init__(return_value_list) - self.file1 = file1 - self.file2 = file2 - - def get_command(self, variables): - self.command = "diff " + self.file1 + " " + self.file2 - return super().get_final_command(variables) \ No newline at end of file diff --git a/testsuite/driver/src/api/check_reg_contain.py b/testsuite/driver/src/api/check_reg_contain.py deleted file mode 100644 index 49007a19c3..0000000000 --- a/testsuite/driver/src/api/check_reg_contain.py +++ /dev/null @@ -1,31 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api.shell_operator import ShellOperator - - -class CheckRegContain(ShellOperator): - - def __init__(self, reg, file, choice=None, return_value_list=None): - super().__init__(return_value_list) - self.reg = reg - self.file = file - self.choice = choice - - def get_command(self, variables): - if self.choice is None: - self.command = "python3 ${OUT_ROOT}/target/product/public/bin/check.py --check=contain --str=\"" + self.reg + "\" --result=" + self.file - elif self.choice == "num": - self.command = "python3 ${OUT_ROOT}/target/product/public/bin/check.py --check=num --result=" + self.file + " --str=" + self.reg + " --num=${EXPECTNUM}" - return super().get_final_command(variables) diff --git a/testsuite/driver/src/api/class2panda.py b/testsuite/driver/src/api/class2panda.py deleted file mode 100644 index bdc94ccfb6..0000000000 --- a/testsuite/driver/src/api/class2panda.py +++ /dev/null @@ -1,28 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api.shell_operator import ShellOperator - - -class Class2panda(ShellOperator): - - def __init__(self, class2panda, infile, outfile, return_value_list=None, redirection=None): - super().__init__(return_value_list, redirection) - self.class2panda = class2panda - self.infile = infile - self.outfile = outfile - - def get_command(self, variables): - self.command = "LD_LIBRARY_PATH=${OUT_ROOT}/target/product/public/lib:$LD_LIBRARY_PATH " + self.class2panda + " " + self.infile + " " + self.outfile - return super().get_final_command(variables) \ No newline at end of file diff --git a/testsuite/driver/src/api/dex2mpl.py b/testsuite/driver/src/api/dex2mpl.py deleted file mode 100644 index cc5715b92c..0000000000 --- a/testsuite/driver/src/api/dex2mpl.py +++ /dev/null @@ -1,28 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api.shell_operator import ShellOperator - - -class Dex2mpl(ShellOperator): - - def __init__(self, dex2mpl, option, infile, return_value_list=None, redirection=None): - super().__init__(return_value_list, redirection) - self.dex2mpl = dex2mpl - self.option = option - self.infile = infile - - def get_command(self, variables): - self.command = self.dex2mpl + " " + self.option + " " + self.infile - return super().get_final_command(variables) \ No newline at end of file diff --git a/testsuite/driver/src/api/gendeps.py b/testsuite/driver/src/api/gendeps.py deleted file mode 100644 index 44dc09c503..0000000000 --- a/testsuite/driver/src/api/gendeps.py +++ /dev/null @@ -1,34 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api.shell_operator import ShellOperator - - -class Gendeps(ShellOperator): - - def __init__(self, gendeps, apk, emui, infile, return_value_list=None, redirection=None, extra_option=""): - super().__init__(return_value_list, redirection) - self.gendeps = gendeps - self.apk = apk - self.emui = emui - self.infile = infile - self.extra_option = extra_option - - def get_command(self, variables): - self.command = self.gendeps + " -emui-map ${OUT_ROOT}/target/product/public/lib/dex_module_map_sdk.list -classpath libmaplecore-all -verbose -out-module-name " - self.command += "-apk " + self.apk + " " - self.command += "-emui " + self.emui + " " - self.command += self.extra_option + " " - self.command +="-in-dex " + self.infile - return super().get_final_command(variables) \ No newline at end of file diff --git a/testsuite/driver/src/api/irbuild.py b/testsuite/driver/src/api/irbuild.py deleted file mode 100644 index 3688c00e93..0000000000 --- a/testsuite/driver/src/api/irbuild.py +++ /dev/null @@ -1,27 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api.shell_operator import ShellOperator - - -class Irbuild(ShellOperator): - - def __init__(self, irbuild, infile, return_value_list=None, redirection=None): - super().__init__(return_value_list, redirection) - self.irbuild = irbuild - self.infile = infile - - def get_command(self, variables): - self.command = self.irbuild + " " + self.infile - return super().get_final_command(variables) \ No newline at end of file diff --git a/testsuite/driver/src/api/jar2dex.py b/testsuite/driver/src/api/jar2dex.py deleted file mode 100644 index 327a2dbd55..0000000000 --- a/testsuite/driver/src/api/jar2dex.py +++ /dev/null @@ -1,27 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api.shell_operator import ShellOperator - - -class Jar2dex(ShellOperator): - - def __init__(self, jar_file, infile, return_value_list=None, redirection=None): - super().__init__(return_value_list, redirection) - self.jar_file = jar_file - self.infile = infile - - def get_command(self, variables): - self.command = "${OUT_ROOT}/target/product/public/bin/jar2dex " + " -p " + ":".join(self.jar_file) + " -i " + self.infile - return super().get_final_command(variables) diff --git a/testsuite/driver/src/api/jasm2jar.py b/testsuite/driver/src/api/jasm2jar.py deleted file mode 100644 index 252119e227..0000000000 --- a/testsuite/driver/src/api/jasm2jar.py +++ /dev/null @@ -1,26 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api.shell_operator import ShellOperator - - -class Jasm2jar(ShellOperator): - - def __init__(self, file, return_value_list=None, redirection=None): - super().__init__(return_value_list, redirection) - self.file = file - - def get_command(self, variables): - self.command = "java -jar ${OUT_ROOT}/target/product/public/bin/asmtools.jar jasm " + " ".join(self.file) + ";jar -cvf ${APP}.jar *.class" - return super().get_final_command(variables) \ No newline at end of file diff --git a/testsuite/driver/src/api/java2dex.py b/testsuite/driver/src/api/java2dex.py deleted file mode 100644 index fcc25c966e..0000000000 --- a/testsuite/driver/src/api/java2dex.py +++ /dev/null @@ -1,39 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api.shell_operator import ShellOperator - - -class Java2dex(ShellOperator): - - def __init__(self, jar_file, outfile, infile, usesimplejava=False, return_value_list=None, redirection=None): - super().__init__(return_value_list, redirection) - self.jar_file = jar_file - self.outfile = outfile - self.infile = infile - self.usesimplejava = usesimplejava - - def java2dex_i_output(self, variables): - if 'EXTRA_JAVA_FILE' in variables.keys(): - variables['EXTRA_JAVA_FILE'] = variables['EXTRA_JAVA_FILE'].replace('[','').replace(']','').replace(',',':') - return ':'.join(self.infile) - return self.infile[0] - - def get_command(self, variables): - if not self.usesimplejava: - self.command = "${OUT_ROOT}/target/product/public/bin/java2dex -o " + self.outfile + " -p " + ":".join(self.jar_file) + " -i " + self.java2dex_i_output(variables) - else: - self.command = "${OUT_ROOT}/target/product/public/bin/java2dex -o " + self.outfile + " -p " + ":".join(self.jar_file) + " -i " + self.java2dex_i_output(variables) + " -s useSimpleJava" - # print(super().get_final_command(variables)) - return super().get_final_command(variables) diff --git a/testsuite/driver/src/api/jcod2jar.py b/testsuite/driver/src/api/jcod2jar.py deleted file mode 100644 index bd066a69ca..0000000000 --- a/testsuite/driver/src/api/jcod2jar.py +++ /dev/null @@ -1,26 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api.shell_operator import ShellOperator - - -class Jcod2jar(ShellOperator): - - def __init__(self, file, return_value_list=None, redirection=None): - super().__init__(return_value_list, redirection) - self.file = file - - def get_command(self, variables): - self.command = "java -jar ${OUT_ROOT}/target/product/public/bin/asmtools.jar jcoder " + " ".join(self.file) + ";jar -cvf ${APP}.jar *.class" - return super().get_final_command(variables) \ No newline at end of file diff --git a/testsuite/driver/src/api/linker.py b/testsuite/driver/src/api/linker.py deleted file mode 100644 index f912c36ba9..0000000000 --- a/testsuite/driver/src/api/linker.py +++ /dev/null @@ -1,32 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api.shell_operator import ShellOperator - - -class Linker(ShellOperator): - - def __init__(self, infile, lib, model, native_src=None, return_value_list=None, redirection=None): - super().__init__(return_value_list, redirection) - self.model = model - self.lib = lib - self.native_src = native_src - self.infile = infile - - def get_command(self, variables): - if self.native_src: - self.command = "${OUT_ROOT}/target/product/public/bin/linker -m " + self.model + " -l " + self.lib + " -i " + self.infile + " -n " + self.native_src - else: - self.command = "${OUT_ROOT}/target/product/public/bin/linker -m " + self.model + " -l " + self.lib + " -i " + self.infile - return super().get_final_command(variables) \ No newline at end of file diff --git a/testsuite/driver/src/api/maple.py b/testsuite/driver/src/api/maple.py deleted file mode 100644 index 6417addd2d..0000000000 --- a/testsuite/driver/src/api/maple.py +++ /dev/null @@ -1,36 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api.shell_operator import ShellOperator - - -class Maple(ShellOperator): - - def __init__(self, maple, run, option, global_option, infile, return_value_list=None, redirection=None): - super().__init__(return_value_list, redirection) - self.maple = maple - self.run = run - self.option_dict = option - self.global_option = global_option - self.infile = infile - - def get_command(self, variables): - self.command = self.maple + " --run=" + ":".join(self.run) + " " - option = [] - for cmd in self.run: - option.append(self.option_dict[cmd]) - self.command += "--option=\"" + ":".join(option) + "\" " - self.command += self.global_option + " " - self.command += "--infile " + self.infile - return super().get_final_command(variables) diff --git a/testsuite/driver/src/api/mplme.py b/testsuite/driver/src/api/mplme.py deleted file mode 100644 index 627343c0ca..0000000000 --- a/testsuite/driver/src/api/mplme.py +++ /dev/null @@ -1,28 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api.shell_operator import ShellOperator - - -class Mplme(ShellOperator): - - def __init__(self, mplme, option, infile, return_value_list=None, redirection=None): - super().__init__(return_value_list, redirection) - self.mplme = mplme - self.option = option - self.infile = infile - - def get_command(self, variables): - self.command = self.mplme + " " + self.option + " " + self.infile - return super().get_final_command(variables) \ No newline at end of file diff --git a/testsuite/driver/src/api/mplsh.py b/testsuite/driver/src/api/mplsh.py deleted file mode 100644 index ec379177b9..0000000000 --- a/testsuite/driver/src/api/mplsh.py +++ /dev/null @@ -1,47 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api.shell_operator import ShellOperator - - -class Mplsh(ShellOperator): - - def __init__(self, mplsh, xbootclasspath, infile, garbage_collection_kind, return_value_list=None, env=None, qemu=None, qemu_libc=None, qemu_ld_lib=None, main="${APP}", args=None, redirection=None): - super().__init__(return_value_list, redirection) - self.env = env - self.qemu = qemu - self.qemu_libc = qemu_libc - self.qemu_ld_lib = qemu_ld_lib - self.mplsh = mplsh - self.garbage_collection_kind = garbage_collection_kind - self.xbootclasspath = xbootclasspath - self.infile = infile - self.main = main - self.args = args - - def get_command(self, variables): - self.command = "" - if self.env is not None: - for env_var in self.env.keys(): - self.command += env_var + "=" + self.env[env_var] + " " - if self.qemu is not None: - self.command += self.qemu + " -L " + self.qemu_libc + " -E LD_LIBRARY_PATH=" + ":".join(self.qemu_ld_lib) + " " - self.command += self.mplsh + " " - if self.garbage_collection_kind == "GC": - self.command += "-Xgconly " - if self.args is not None: - self.command +="-Xbootclasspath:" + self.xbootclasspath + " -cp " + self.infile + " " + self.main + " " + self.args - else: - self.command += "-Xbootclasspath:" + self.xbootclasspath + " -cp " + self.infile + " " + self.main - return super().get_final_command(variables) diff --git a/testsuite/driver/src/api/mplverf.py b/testsuite/driver/src/api/mplverf.py deleted file mode 100644 index 00297886b8..0000000000 --- a/testsuite/driver/src/api/mplverf.py +++ /dev/null @@ -1,27 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api.shell_operator import ShellOperator - - -class Mplverf(ShellOperator): - - def __init__(self, mplverf, infile, return_value_list=None, redirection=None): - super().__init__(return_value_list, redirection) - self.mplverf = mplverf - self.infile = infile - - def get_command(self, variables): - self.command = self.mplverf + " " + self.infile - return super().get_final_command(variables) \ No newline at end of file diff --git a/testsuite/driver/src/api/native_compile.py b/testsuite/driver/src/api/native_compile.py deleted file mode 100644 index 68cc06b815..0000000000 --- a/testsuite/driver/src/api/native_compile.py +++ /dev/null @@ -1,75 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api.shell_operator import ShellOperator - - -class NativeCompile(ShellOperator): - - def __init__(self, mpldep, infile, model, return_value_list=None, redirection=None): - super().__init__(return_value_list, redirection) - self.mpldep = mpldep - self.infile = infile - self.model =model - - def get_command(self, variables): - if self.model == "arm32_hard": - self.command = "/usr/bin/clang++-9 -O2 -g3 -c -fPIC -march=armv7-a -mfpu=vfpv4 -mfloat-abi=hard -target armv7a-linux-gnueabihf -c " - for file in self.mpldep: - self.command += "-I" + file + " " - self.command += " -isystem /usr/arm-linux-gnueabihf/include/c++/5 -isystem /usr/arm-linux-gnueabihf/include/c++/5/arm-linux-gnueabihf -isystem /usr/arm-linux-gnueabihf/include/c++/5/backward -isystem /usr/lib/gcc-cross/arm-linux-gnueabihf/5/include -isystem /usr/lib/gcc-cross/arm-linux-gnueabihf/5/include-fixed -isystem /usr/arm-linux-gnueabihf/include" - self.command += " " + self.infile + ".cpp; " - self.command += " /usr/bin/clang++-9 " - self.command += " " + self.infile + ".o" - self.command += " -O2 -Wall -Werror -Wno-unused-command-line-argument -fstack-protector-strong -std=c++14 -nostdlibinc -march=armv7-a -mfpu=vfpv4 -mfloat-abi=hard -target armv7a-linux-gnueabihf -fPIC -shared -fuse-ld=lld -rdynamic" - self.command += " -L" + self.mpldep[0] + " -lcore-all -lcommon-bridge" - self.command += " -Wl,-z,notext -o" - self.command += " lib" + self.infile + ".so;" - if self.model == "arm32_softfp": - self.command = "/usr/bin/clang++-9 -O2 -g3 -c -fPIC -march=armv7-a -mfpu=vfpv4 -mfloat-abi=softfp -target armv7a-linux-gnueabi -c " - for file in self.mpldep: - self.command += "-I" + file + " " - self.command += " -isystem /usr/arm-linux-gnueabi/include/c++/5 -isystem /usr/arm-linux-gnueabi/include/c++/5/arm-linux-gnueabi -isystem /usr/arm-linux-gnueabi/include/c++/5/backward -isystem /usr/lib/gcc-cross/arm-linux-gnueabi/5/include -isystem /usr/lib/gcc-cross/arm-linux-gnueabi/5/include-fixed -isystem /usr/arm-linux-gnueabi/include" - self.command += " " + self.infile + ".cpp; " - self.command += " /usr/bin/clang++-9 " - self.command += " " + self.infile + ".o" - self.command += " -O2 -Wall -Werror -Wno-unused-command-line-argument -fstack-protector-strong -std=c++14 -nostdlibinc -march=armv7-a -mfpu=vfpv4 -mfloat-abi=softfp -target armv7a-linux-gnueabi -fPIC -shared -fuse-ld=lld -rdynamic" - self.command += " -L" + self.mpldep[0] + " -lcore-all -lcommon-bridge" - self.command += " -Wl,-z,notext -o" - self.command += " lib" + self.infile + ".so;" - if self.model == "arm64": - self.command = " /usr/bin/clang++-9 -O2 -g3 -c -fPIC -march=armv8-a -target aarch64-linux-gnu " - for file in self.mpldep: - self.command += "-I" + file + " " - self.command += " -isystem /usr/aarch64-linux-gnu/include/c++/5 -isystem /usr/aarch64-linux-gnu/include/c++/5/aarch64-linux-gnu -isystem /usr/aarch64-linux-gnu/include/c++/5/backward -isystem /usr/lib/gcc-cross/aarch64-linux-gnu/5/include -isystem /usr/lib/gcc-cross/aarch64-linux-gnu/5/include-fixed -isystem /usr/aarch64-linux-gnu/include" - self.command += " " + self.infile + ".cpp; " - self.command += " /usr/bin/clang++-9 " - self.command += " " + self.infile + ".o" - self.command += " -O2 -Wall -Werror -Wno-unused-command-line-argument -fstack-protector-strong -std=c++14 -nostdlibinc -march=armv8-a -target aarch64-linux-gnu -fPIC -shared -fuse-ld=lld -rdynamic" - self.command += " -L" + self.mpldep[0] + " -lcore-all -lcommon-bridge" - self.command += " -Wl,-z,notext -o" - self.command += " lib" + self.infile + ".so;" - if self.model == "arm64_ifile": - self.command = " /usr/bin/clang++-9 -O2 -g3 -c -fPIC -march=armv8-a -target aarch64-linux-gnu " - for file in self.mpldep: - self.command += "-I" + file + " " - self.command += " -isystem /usr/aarch64-linux-gnu/include/c++/5 -isystem /usr/aarch64-linux-gnu/include/c++/5/aarch64-linux-gnu -isystem /usr/aarch64-linux-gnu/include/c++/5/backward -isystem /usr/lib/gcc-cross/aarch64-linux-gnu/5/include -isystem /usr/lib/gcc-cross/aarch64-linux-gnu/5/include-fixed -isystem /usr/aarch64-linux-gnu/include" - self.command += " " + self.infile + ".cpp; " - self.command += " /usr/bin/clang++-9 " - self.command += " " + self.infile + ".o" - self.command += " -O2 -Wall -Werror -Wno-unused-command-line-argument -fstack-protector-strong -std=c++14 -nostdlibinc -march=armv8-a -target aarch64-linux-gnu -fPIC -shared -fuse-ld=lld -rdynamic" - self.command += " -L" + self.mpldep[0] + " -lmrt -lcommon-bridge" - self.command += " -Wl,-z,notext -o" - self.command += " lib" + self.infile + ".so;" - return super().get_final_command(variables) diff --git a/testsuite/driver/src/api/qemu_linker_arm32.py b/testsuite/driver/src/api/qemu_linker_arm32.py deleted file mode 100644 index 429fe3b2be..0000000000 --- a/testsuite/driver/src/api/qemu_linker_arm32.py +++ /dev/null @@ -1,38 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api.shell_operator import ShellOperator - - -class QemuLinkerArm32(ShellOperator): - - def __init__(self, lib, model, parse=None, return_value_list=None, redirection=None): - super().__init__(return_value_list, redirection) - self.lib = lib - self.model = model - if parse is None: - self.parse = '${APP}' - else: - self.parse = parse - - def get_command(self, variables): - if self.model == "hard": - self.command = "/usr/bin/clang++-9 -march=armv7-a -mfpu=vfpv4 -mfloat-abi=hard -g3 -O2 -x assembler-with-cpp -target armv7a-linux-gnueabihf -c " + self.parse + ".VtableImpl.s -o " + self.parse + ".VtableImpl.qemu.o;/usr/bin/clang++-9 -g3 -O2 -march=armv7-a -mfpu=vfpv4 -mfloat-abi=hard -target armv7a-linux-gnueabihf -fPIC -shared -o " + self.parse + ".so ${OUT_ROOT}/target/product/maple_arm32/lib/hard/mrt_module_init.o -I${OUT_ROOT}/target/product/maple_arm32/lib/nativehelper " + self.parse + ".VtableImpl.qemu.o -fuse-ld=lld -rdynamic -L${OUT_ROOT}/target/product/maple_arm32/lib/" + self.lib + "/ -lcore-all -lcommon-bridge -Wl\,-z\,notext -Wl\,-T ${OUT_ROOT}/target/product/public/lib/linker/mapleArm32lld.so.lds" - if self.model == "native_hard": - self.command = "/usr/bin/clang++-9 -march=armv7-a -mfpu=vfpv4 -mfloat-abi=hard -g3 -O2 -x assembler-with-cpp -target armv7a-linux-gnueabihf -c " + self.parse + ".VtableImpl.s -o " + self.parse + ".VtableImpl.qemu.o;/usr/bin/clang++-9 -march=armv7-a -mfpu=vfpv4 -mfloat-abi=hard -g3 -O2 -Wall -Werror -Wno-unused-command-line-argument -fstack-protector-strong -fPIC -std=c++14 -nostdlibinc -isystem /usr/arm-linux-gnueabihf/include/c++/5 -isystem /usr/arm-linux-gnueabihf/include/c++/5/arm-linux-gnueabihf -isystem /usr/arm-linux-gnueabihf/include/c++/5/backward -isystem /usr/lib/gcc-cross/arm-linux-gnueabihf/5/include -isystem /usr/lib/gcc-cross/arm-linux-gnueabihf/5/include-fixed -isystem /usr/arm-linux-gnueabihf/include -target armv7a-linux-gnueabihf -fPIC -shared -o " + self.parse + ".so ${OUT_ROOT}/target/product/maple_arm32/lib/hard/mrt_module_init.o ${NATIVE_SRC} -I${OUT_ROOT}/target/product/public/lib " + self.parse + ".VtableImpl.qemu.o -fuse-ld=lld -rdynamic -L${OUT_ROOT}/target/product/maple_arm32/lib/" + self.lib + "/ -lcore-all -lcommon-bridge -Wl\,-z\,notext -Wl\,-T ${OUT_ROOT}/target/product/public/lib/linker/mapleArm32lld.so.lds" - if self.model == "native_softfp": - self.command = "/usr/bin/clang++-9 -march=armv7-a -mfpu=vfpv4 -mfloat-abi=softfp -g3 -O2 -x assembler-with-cpp -target armv7a-linux-gnueabi -c " + self.parse + ".VtableImpl.s -o " + self.parse + ".VtableImpl.qemu.o;/usr/bin/clang++-9 -march=armv7-a -mfpu=vfpv4 -mfloat-abi=softfp -g3 -O2 -Wall -Werror -Wno-unused-command-line-argument -fstack-protector-strong -fPIC -std=c++14 -nostdlibinc -isystem /usr/arm-linux-gnueabi/include/c++/5 -isystem /usr/arm-linux-gnueabi/include/c++/5/arm-linux-gnueabi -isystem /usr/arm-linux-gnueabi/include/c++/5/backward -isystem /usr/lib/gcc-cross/arm-linux-gnueabi/5/include -isystem /usr/lib/gcc-cross/arm-linux-gnueabi/5/include-fixed -isystem /usr/arm-linux-gnueabi/include -target armv7a-linux-gnueabi -fPIC -shared -o " + self.parse + ".so ${OUT_ROOT}/target/product/maple_arm32/lib/softfp/mrt_module_init.o ${NATIVE_SRC} -I${OUT_ROOT}/target/product/public/lib " + self.parse + ".VtableImpl.qemu.o -fuse-ld=lld -rdynamic -L${OUT_ROOT}/target/product/maple_arm32/lib/" + self.lib + "/ -lcore-all -lcommon-bridge -Wl\,-z\,notext -Wl\,-T ${OUT_ROOT}/target/product/public/lib/linker/mapleArm32lld.so.lds" - if self.model == "softfp": - self.command = "/usr/bin/clang++-9 -march=armv7-a -mfpu=vfpv4 -mfloat-abi=softfp -g3 -O2 -x assembler-with-cpp -target armv7a-linux-gnueabi -c " + self.parse + ".VtableImpl.s -o " + self.parse + ".VtableImpl.qemu.o;/usr/bin/clang++-9 -g3 -O2 -march=armv7-a -mfpu=vfpv4 -mfloat-abi=softfp -target armv7a-linux-gnueabi -fPIC -shared -o " + self.parse + ".so ${OUT_ROOT}/target/product/maple_arm32/lib/softfp/mrt_module_init.o -I${OUT_ROOT}/target/product/maple_arm32/lib/nativehelper " + self.parse + ".VtableImpl.qemu.o -fuse-ld=lld -rdynamic -L${OUT_ROOT}/target/product/maple_arm32/lib/" + self.lib + "/ -lcore-all -lcommon-bridge -Wl\,-z\,notext -Wl\,-T ${OUT_ROOT}/target/product/public/lib/linker/mapleArm32lld.so.lds" - return super().get_final_command(variables) diff --git a/testsuite/driver/src/api/qemu_linker_arm64.py b/testsuite/driver/src/api/qemu_linker_arm64.py deleted file mode 100644 index ddc7549c24..0000000000 --- a/testsuite/driver/src/api/qemu_linker_arm64.py +++ /dev/null @@ -1,30 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api.shell_operator import ShellOperator - - -class QemuLinkerArm64(ShellOperator): - - def __init__(self, lib, parse=None, return_value_list=None, redirection=None): - super().__init__(return_value_list, redirection) - self.lib = lib - if parse is None: - self.parse = '${APP}' - else: - self.parse = parse - - def get_command(self, variables): - self.command = "/usr/bin/clang++-9 -march=armv8-a -g3 -O2 -x assembler-with-cpp -target aarch64-linux-gnu -c " + self.parse + ".VtableImpl.s -o " + self.parse + ".VtableImpl.qemu.o;/usr/bin/clang++-9 -g3 -O2 -march=armv8-a -target aarch64-linux-gnu -fPIC -shared -o " + self.parse + ".so ${OUT_ROOT}/target/product/maple_arm64/lib/mrt_module_init.o -I${OUT_ROOT}/target/product/maple_arm64/lib/nativehelper " + self.parse + ".VtableImpl.qemu.o -fuse-ld=lld -rdynamic -L${OUT_ROOT}/target/product/maple_arm64/lib/" + self.lib + "/ -lcore-all -lcommon-bridge -Wl,-z,notext -Wl,-T ${OUT_ROOT}/target/product/public/lib/linker/maplelld.so.lds" - return super().get_final_command(variables) diff --git a/testsuite/driver/src/api/qemu_native_linker.py b/testsuite/driver/src/api/qemu_native_linker.py deleted file mode 100644 index 7007bff9a2..0000000000 --- a/testsuite/driver/src/api/qemu_native_linker.py +++ /dev/null @@ -1,25 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api.shell_operator import ShellOperator - - -class QemuNativeLinker(ShellOperator): - def __init__(self, lib, return_value_list=None, redirection=None): - super().__init__(return_value_list, redirection) - self.lib = lib - - def get_command(self, variables): - self.command = "/usr/bin/clang++-9 -march=armv8-a -g3 -O2 -x assembler-with-cpp -target aarch64-linux-gnu -c ${APP}.VtableImpl.s -o ${APP}.VtableImpl.qemu.o;/usr/bin/clang++-9 -g3 -O2 -Wall -Werror -Wno-unused-command-line-argument -fstack-protector-strong -fPIC -std=c++14 -nostdlibinc -march=armv8-a -isystem /usr/lib/gcc-cross/aarch64-linux-gnu/5/../../../../aarch64-linux-gnu/include/c++/5 -isystem /usr/lib/gcc-cross/aarch64-linux-gnu/5/../../../../aarch64-linux-gnu/include/c++/5/aarch64-linux-gnu -isystem /usr/lib/gcc-cross/aarch64-linux-gnu/5/../../../../aarch64-linux-gnu/include/c++/5/backward -isystem /usr/lib/gcc-cross/aarch64-linux-gnu/5/include -isystem /usr/lib/gcc-cross/aarch64-linux-gnu/5/include-fixed -isystem /usr/aarch64-linux-gnu/include -target aarch64-linux-gnu -fPIC -shared -o ${APP}.so ${OUT_ROOT}/target/product/maple_arm64/lib/mrt_module_init.o ${NATIVE_SRC} -I${OUT_ROOT}/target/product/public/lib ${APP}.VtableImpl.qemu.o -fuse-ld=lld -rdynamic -L${OUT_ROOT}/target/product/maple_arm64/lib/" + self.lib + "/ -lcore-all -lcommon-bridge -Wl\,-z\,notext -Wl\,-T ${OUT_ROOT}/target/product/public/lib/linker/maplelld.so.lds" - return super().get_final_command(variables) diff --git a/testsuite/driver/src/api/shell.py b/testsuite/driver/src/api/shell.py deleted file mode 100644 index 04d6a77610..0000000000 --- a/testsuite/driver/src/api/shell.py +++ /dev/null @@ -1,25 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api.shell_operator import ShellOperator - - -class Shell(ShellOperator): - - def __init__(self, command, return_value_list=None, redirection=None): - super().__init__(return_value_list, redirection) - self.command = command - - def get_command(self, variables): - return super().get_final_command(variables) \ No newline at end of file diff --git a/testsuite/driver/src/api/shell_operator.py b/testsuite/driver/src/api/shell_operator.py deleted file mode 100644 index a33412022d..0000000000 --- a/testsuite/driver/src/api/shell_operator.py +++ /dev/null @@ -1,53 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -class ShellOperator(object): - - def __init__(self, return_value_list, redirection=None): - self.command = "" - if return_value_list is None: - self.return_value_list = [0] - else: - self.return_value_list = return_value_list - self.redirection = redirection - - def get_redirection(self): - if self.redirection is not None: - return " > " + self.redirection + " 2>&1" - else: - return "" - - def get_check_command(self): - if len(self.return_value_list) == 1: - if 0 in self.return_value_list: - return "" - else: - return " || [ $? -eq " + str(self.return_value_list[0]) + " ]" - elif len(self.return_value_list) == 0: - return " || true" - else: - return_value_check_str_list = [] - for return_value in self.return_value_list: - return_value_check_str_list.append("[ ${return_value} -eq " + str(return_value) + " ]") - return " || (return_value=$? && (" + " || ".join(return_value_check_str_list) + "))" - - def get_final_command(self, variables): - final_command = self.command - if variables is not None: - for variable in variables.keys(): - if "${" + variable + "}" in final_command: - final_command = final_command.replace("${" + variable + "}", variables[variable]) - final_command += self.get_redirection() - final_command += self.get_check_command() - return final_command \ No newline at end of file diff --git a/testsuite/driver/src/api/smali2dex.py b/testsuite/driver/src/api/smali2dex.py deleted file mode 100644 index 3e8050ebfd..0000000000 --- a/testsuite/driver/src/api/smali2dex.py +++ /dev/null @@ -1,27 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api.shell_operator import ShellOperator - - -class Smali2dex(ShellOperator): - - def __init__(self, file, return_value_list=None, redirection=None): - super().__init__(return_value_list, redirection) - self.file = file - - def get_command(self, variables): - self.command = "java -jar ${OUT_ROOT}/target/product/public/bin/smali-2.2.4.jar ass " + " ".join(self.file) + "; mv out.dex ${APP}.dex" - self.command += super().get_redirection() - return super().get_final_command(variables) diff --git a/testsuite/driver/src/api/unzip.py b/testsuite/driver/src/api/unzip.py deleted file mode 100644 index 11faffe74b..0000000000 --- a/testsuite/driver/src/api/unzip.py +++ /dev/null @@ -1,27 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api.shell_operator import ShellOperator - - -class Unzip(ShellOperator): - - def __init__(self, file, target_path, return_value_list=None, redirection=None): - super().__init__(return_value_list, redirection) - self.file = file - self.target_path = target_path - - def get_command(self, variables): - self.command = "unzip -o " + self.file + " -d " + self.target_path - return super().get_final_command(variables) diff --git a/testsuite/driver/src/mode b/testsuite/driver/src/mode new file mode 120000 index 0000000000..ebf9aa657f --- /dev/null +++ b/testsuite/driver/src/mode @@ -0,0 +1 @@ +/home/maple/workspace/OpenArkCompiler/testsuite/driver/src/.mode \ No newline at end of file diff --git a/testsuite/driver/src/mode/AOT.py b/testsuite/driver/src/mode/AOT.py deleted file mode 100644 index 9a33481bf5..0000000000 --- a/testsuite/driver/src/mode/AOT.py +++ /dev/null @@ -1,116 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -AOT = { - "compile": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java","${EXTRA_JAVA_FILE}"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/bin_AOT/maple", - run=["dex2mpl", "mplipa", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-AOT/libcore-all.mplt -dexcatch -inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/to_inline.list -j=16 -j100 -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list -refine-catch -staticstringcheck", - "mplipa": "--effectipa --quiet", - "me": "--O2 --quiet --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea", - "mpl2mpl": "--O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal --dump-muid --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --emitVtableImpl", - "mplcg": "--O2 --quiet --no-pie --verbose-asm --fPIC --gen-c-macro-def --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/asm/duplicateFunc.s --maplelinker --gsrc --nativeopt --replaceasm" - }, - global_option="--save-temps --aot", - infile="${APP}.dex" - ), - Linker( - lib="host-x86_64-AOT", - model="arm64", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-AOT", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Mplsh( - env={ - "MAPLE_REPORT_RC_LEAK": "1" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-AOT", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="leak.log" - ), - CheckRegContain( - reg="Total none-cycle root objects 0", - file="leak.log" - ), - Mplsh( - env={ - "MAPLE_VERIFY_RC": "1", - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-AOT", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - infile="${APP}.so", - xbootclasspath="libcore-all.so", - redirection="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential early release", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential leak", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects weak rc are wrong", - file="rcverify.log" - ) - ] -} diff --git a/testsuite/driver/src/mode/ARM32O0HD.py b/testsuite/driver/src/mode/ARM32O0HD.py deleted file mode 100644 index c60923aba8..0000000000 --- a/testsuite/driver/src/mode/ARM32O0HD.py +++ /dev/null @@ -1,120 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -ARM32O0HD = { - "compile": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java","${EXTRA_JAVA_FILE}"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm32/bin/maple", - run=["dex2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-hard_O0/libcore-all.mplt -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list ", - "me": "--quiet", - "mpl2mpl": "--quiet --regnativefunc --maplelinker --FastNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/fastNative.list --CriticalNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/criticalNative.list --nativefunc-property-list=${OUT_ROOT}/target/product/public/lib/codetricks/native_binding/native_func_property.list", - "mplcg": "--quiet --no-pie --verbose-asm --maplelinker --fPIC" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Linker( - lib="host-x86_64-hard_O0", - model="arm32_hard", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1" - }, - qemu="/usr/bin/qemu-arm", - qemu_libc="/usr/arm-linux-gnueabihf", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm32/third-party/hard", - "${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-hard_O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm32/bin/mplsh_arm_hard", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "MAPLE_REPORT_RC_LEAK": "1" - }, - qemu="/usr/bin/qemu-arm", - qemu_libc="/usr/arm-linux-gnueabihf", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm32/third-party/hard", - "${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-hard_O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm32/bin/mplsh_arm_hard", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="leak.log" - ), - CheckRegContain( - reg="Total none-cycle root objects 0", - file="leak.log" - ), - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "MAPLE_VERIFY_RC": "1", - }, - qemu="/usr/bin/qemu-arm", - qemu_libc="/usr/arm-linux-gnueabihf", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm32/third-party/hard", - "${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-hard_O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm32/bin/mplsh_arm_hard", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential early release", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential leak", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects weak rc are wrong", - file="rcverify.log" - ) - ] -} diff --git a/testsuite/driver/src/mode/ARM32O0NATIVEHD.py b/testsuite/driver/src/mode/ARM32O0NATIVEHD.py deleted file mode 100644 index 031639fa11..0000000000 --- a/testsuite/driver/src/mode/ARM32O0NATIVEHD.py +++ /dev/null @@ -1,131 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -ARM32O0NATIVEHD = { - "compile": [ - NativeCompile( - mpldep=[ - "${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-hard_O0", - "${OUT_ROOT}/target/product/public/lib/libnativehelper/include" - ], - infile="${NATIVE_SRC}", - model="arm32_hard" - ), - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java","${EXTRA_JAVA_FILE}"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm32/bin/maple", - run=["dex2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-hard_O0/libcore-all.mplt -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list ", - "me": "--quiet", - "mpl2mpl": "--quiet --regnativefunc --maplelinker --FastNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/fastNative.list --CriticalNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/criticalNative.list --nativefunc-property-list=${OUT_ROOT}/target/product/public/lib/codetricks/native_binding/native_func_property.list", - "mplcg": "--quiet --no-pie --verbose-asm --maplelinker --fPIC" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Linker( - lib="host-x86_64-hard_O0", - model="arm32_hard", - infile="${APP}", - ) - ], - "run": [ - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "JNI_TEST": "true" - }, - qemu="/usr/bin/qemu-arm", - qemu_libc="/usr/arm-linux-gnueabihf", - qemu_ld_lib=[ - "./", - "${OUT_ROOT}/target/product/maple_arm32/third-party/hard", - "${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-hard_O0" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm32/bin/mplsh_arm_hard", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "MAPLE_REPORT_RC_LEAK": "1", - "JNI_TEST": "true" - }, - qemu="/usr/bin/qemu-arm", - qemu_libc="/usr/arm-linux-gnueabihf", - qemu_ld_lib=[ - "./", - "${OUT_ROOT}/target/product/maple_arm32/third-party/hard", - "${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-hard_O0" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm32/bin/mplsh_arm_hard", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="leak.log" - ), - CheckRegContain( - reg="Total none-cycle root objects 0", - file="leak.log" - ), - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "MAPLE_VERIFY_RC": "1", - "JNI_TEST": "true" - }, - qemu="/usr/bin/qemu-arm", - qemu_libc="/usr/arm-linux-gnueabihf", - qemu_ld_lib=[ - "./", - "${OUT_ROOT}/target/product/maple_arm32/third-party/hard", - "${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-hard_O0" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm32/bin/mplsh_arm_hard", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential early release", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential leak", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects weak rc are wrong", - file="rcverify.log" - ) - ] -} diff --git a/testsuite/driver/src/mode/ARM32O0NATIVESFP.py b/testsuite/driver/src/mode/ARM32O0NATIVESFP.py deleted file mode 100644 index 4b72c675e5..0000000000 --- a/testsuite/driver/src/mode/ARM32O0NATIVESFP.py +++ /dev/null @@ -1,131 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -ARM32O0NATIVESFP = { - "compile": [ - NativeCompile( - mpldep=[ - "${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-softfp_O0", - "${OUT_ROOT}/target/product/public/lib/libnativehelper/include" - ], - infile="${NATIVE_SRC}", - model="arm32_softfp" - ), - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java","${EXTRA_JAVA_FILE}"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm32/bin/maple", - run=["dex2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-softfp_O0/libcore-all.mplt -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list", - "me": "--quiet", - "mpl2mpl": "--quiet --regnativefunc --maplelinker --FastNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/fastNative.list --CriticalNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/criticalNative.list --nativefunc-property-list=${OUT_ROOT}/target/product/public/lib/codetricks/native_binding/native_func_property.list", - "mplcg": "--quiet --float-abi=softfp --no-pie --verbose-asm --maplelinker --fPIC" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Linker( - lib="host-x86_64-softfp_O0", - model="arm32_softfp", - infile="${APP}", - ) - ], - "run": [ - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "JNI_TEST": "true" - }, - qemu="/usr/bin/qemu-arm", - qemu_libc="/usr/arm-linux-gnueabi", - qemu_ld_lib=[ - "./", - "${OUT_ROOT}/target/product/maple_arm32/third-party/softfp", - "${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-softfp_O0", - ], - mplsh="${OUT_ROOT}/target/product/maple_arm32/bin/mplsh_arm_softfp", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "MAPLE_REPORT_RC_LEAK": "1", - "JNI_TEST": "true" - }, - qemu="/usr/bin/qemu-arm", - qemu_libc="/usr/arm-linux-gnueabi", - qemu_ld_lib=[ - "./", - "${OUT_ROOT}/target/product/maple_arm32/third-party/softfp", - "${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-softfp_O0", - ], - mplsh="${OUT_ROOT}/target/product/maple_arm32/bin/mplsh_arm_softfp", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="leak.log" - ), - CheckRegContain( - reg="Total none-cycle root objects 0", - file="leak.log" - ), - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "MAPLE_VERIFY_RC": "1", - "JNI_TEST": "true" - }, - qemu="/usr/bin/qemu-arm", - qemu_libc="/usr/arm-linux-gnueabi", - qemu_ld_lib=[ - "./", - "${OUT_ROOT}/target/product/maple_arm32/third-party/softfp", - "${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-softfp_O0", - ], - mplsh="${OUT_ROOT}/target/product/maple_arm32/bin/mplsh_arm_softfp", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential early release", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential leak", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects weak rc are wrong", - file="rcverify.log" - ) - ] -} diff --git a/testsuite/driver/src/mode/ARM32O0RCHD.py b/testsuite/driver/src/mode/ARM32O0RCHD.py deleted file mode 100644 index 204f4d1413..0000000000 --- a/testsuite/driver/src/mode/ARM32O0RCHD.py +++ /dev/null @@ -1,79 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -ARM32O0RCHD = { - "compile": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm32/bin/maple", - run=["dex2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-hard_O0/libcore-all.mplt -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list ", - "me": "--quiet", - "mpl2mpl": "--quiet --regnativefunc --maplelinker --FastNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/fastNative.list --CriticalNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/criticalNative.list --nativefunc-property-list=${OUT_ROOT}/target/product/public/lib/codetricks/native_binding/native_func_property.list", - "mplcg": "--quiet --no-pie --verbose-asm --maplelinker --fPIC" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Linker( - lib="host-x86_64-hard_O0", - model="arm32_hard", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "MAPLE_REPORT_RC_LEAK": "1", - "PATTERN_FROM_BACKUP_TRACING": "1" - }, - qemu="/usr/bin/qemu-arm", - qemu_libc="/usr/arm-linux-gnueabihf", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm32/third-party/hard", - "${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-hard_O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm32/bin/mplsh_arm_hard", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="cycle.log" - ), - CheckRegContain( - reg="ExpectResult", - file="cycle.log" - ), - CheckRegContain( - reg="Total Leak Count 0", - file="cycle.log" - ), - CheckRegContain( - choice="num", - reg="ExpectResult", - file="cycle.log" - ) - ] -} diff --git a/testsuite/driver/src/mode/ARM32O0RCSFP.py b/testsuite/driver/src/mode/ARM32O0RCSFP.py deleted file mode 100644 index 58655cbb47..0000000000 --- a/testsuite/driver/src/mode/ARM32O0RCSFP.py +++ /dev/null @@ -1,79 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -ARM32O0RCSFP = { - "compile": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm32/bin/maple", - run=["dex2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-softfp_O0/libcore-all.mplt -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list", - "me": "--quiet", - "mpl2mpl": "--quiet --regnativefunc --maplelinker --FastNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/fastNative.list --CriticalNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/criticalNative.list --nativefunc-property-list=${OUT_ROOT}/target/product/public/lib/codetricks/native_binding/native_func_property.list", - "mplcg": "--quiet --float-abi=softfp --no-pie --verbose-asm --maplelinker --fPIC" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Linker( - lib="host-x86_64-softfp_O0", - model="arm32_softfp", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "MAPLE_REPORT_RC_LEAK": "1", - "PATTERN_FROM_BACKUP_TRACING": "1" - }, - qemu="/usr/bin/qemu-arm", - qemu_libc="/usr/arm-linux-gnueabi", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm32/third-party/softfp", - "${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-softfp_O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm32/bin/mplsh_arm_softfp", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="cycle.log" - ), - CheckRegContain( - reg="ExpectResult", - file="cycle.log" - ), - CheckRegContain( - reg="Total Leak Count 0", - file="cycle.log" - ), - CheckRegContain( - choice="num", - reg="ExpectResult", - file="cycle.log" - ) - ] -} diff --git a/testsuite/driver/src/mode/ARM32O0SFP.py b/testsuite/driver/src/mode/ARM32O0SFP.py deleted file mode 100644 index 6506189a0f..0000000000 --- a/testsuite/driver/src/mode/ARM32O0SFP.py +++ /dev/null @@ -1,120 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -ARM32O0SFP = { - "compile": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java","${EXTRA_JAVA_FILE}"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm32/bin/maple", - run=["dex2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-softfp_O0/libcore-all.mplt -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list", - "me": "--quiet", - "mpl2mpl": "--quiet --regnativefunc --maplelinker --FastNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/fastNative.list --CriticalNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/criticalNative.list --nativefunc-property-list=${OUT_ROOT}/target/product/public/lib/codetricks/native_binding/native_func_property.list", - "mplcg": "--quiet --float-abi=softfp --no-pie --verbose-asm --maplelinker --fPIC" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Linker( - lib="host-x86_64-softfp_O0", - model="arm32_softfp", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1" - }, - qemu="/usr/bin/qemu-arm", - qemu_libc="/usr/arm-linux-gnueabi", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm32/third-party/softfp", - "${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-softfp_O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm32/bin/mplsh_arm_softfp", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "MAPLE_REPORT_RC_LEAK": "1" - }, - qemu="/usr/bin/qemu-arm", - qemu_libc="/usr/arm-linux-gnueabi", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm32/third-party/softfp", - "${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-softfp_O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm32/bin/mplsh_arm_softfp", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="leak.log" - ), - CheckRegContain( - reg="Total none-cycle root objects 0", - file="leak.log" - ), - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "MAPLE_VERIFY_RC": "1" - }, - qemu="/usr/bin/qemu-arm", - qemu_libc="/usr/arm-linux-gnueabi", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm32/third-party/softfp", - "${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-softfp_O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm32/bin/mplsh_arm_softfp", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential early release", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential leak", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects weak rc are wrong", - file="rcverify.log" - ) - ] -} diff --git a/testsuite/driver/src/mode/ARM32O2HD.py b/testsuite/driver/src/mode/ARM32O2HD.py deleted file mode 100644 index 011adf0a49..0000000000 --- a/testsuite/driver/src/mode/ARM32O2HD.py +++ /dev/null @@ -1,116 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -ARM32O2HD = { - "compile": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java","${EXTRA_JAVA_FILE}"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm32/bin/maple", - run=["dex2mpl","mplipa", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "-mplt=${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-hard_O2/libcore-all.mplt -dexcatch -inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/to_inline.list -j=16 -j100 -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list -refine-catch -staticstringcheck", - "mplipa": "--effectipa --quiet", - "me": "--O2 --quiet --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea", - "mpl2mpl": "--O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal --dump-muid --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --emitVtableImpl", - "mplcg":"--O2 --quiet --no-pie --verbose-asm --fPIC --gen-c-macro-def --maplelinker --gsrc --nativeopt --replaceasm" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Linker( - lib="host-x86_64-hard_O2", - model="arm32_hard", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - qemu="/usr/bin/qemu-arm", - qemu_libc="/usr/arm-linux-gnueabihf", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm32/third-party/hard", - "${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-hard_O2", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm32/bin/mplsh_arm_hard", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Mplsh( - env={ - "MAPLE_REPORT_RC_LEAK": "1" - }, - qemu="/usr/bin/qemu-arm", - qemu_libc="/usr/arm-linux-gnueabihf", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm32/third-party/hard", - "${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-hard_O2", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm32/bin/mplsh_arm_hard", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="leak.log" - ), - CheckRegContain( - reg="Total none-cycle root objects 0", - file="leak.log" - ), - Mplsh( - env={ - "MAPLE_VERIFY_RC": "1", - }, - qemu="/usr/bin/qemu-arm", - qemu_libc="/usr/arm-linux-gnueabihf", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm32/third-party/hard", - "${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-hard_O2", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm32/bin/mplsh_arm_hard", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential early release", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential leak", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects weak rc are wrong", - file="rcverify.log" - ) - ] -} diff --git a/testsuite/driver/src/mode/ARM32O2NATIVEHD.py b/testsuite/driver/src/mode/ARM32O2NATIVEHD.py deleted file mode 100644 index 01eb181bfe..0000000000 --- a/testsuite/driver/src/mode/ARM32O2NATIVEHD.py +++ /dev/null @@ -1,129 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -ARM32O2NATIVEHD = { - "compile": [ - NativeCompile( - mpldep=[ - "${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-hard_O2", - "${OUT_ROOT}/target/product/public/lib/libnativehelper/include" - ], - infile="${NATIVE_SRC}", - model="arm32_hard" - ), - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java","${EXTRA_JAVA_FILE}"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm32/bin/maple", - run=["dex2mpl","mplipa", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "-mplt=${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-hard_O2/libcore-all.mplt -dexcatch -inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/to_inline.list -j=16 -j100 -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list -refine-catch -staticstringcheck", - "mplipa": "--effectipa --quiet", - "me": "--O2 --quiet --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea", - "mpl2mpl": "--O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal --dump-muid --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --emitVtableImpl", - "mplcg":"--O2 --quiet --no-pie --verbose-asm --fPIC --gen-c-macro-def --maplelinker --gsrc --nativeopt --replaceasm" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Linker( - lib="host-x86_64-hard_O2", - model="arm32_hard", - infile="${APP}", - ) - ], - "run": [ - Mplsh( - env={ - "JNI_TEST": "true" - }, - qemu="/usr/bin/qemu-arm", - qemu_libc="/usr/arm-linux-gnueabihf", - qemu_ld_lib=[ - "./", - "${OUT_ROOT}/target/product/maple_arm32/third-party/hard", - "${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-hard_O2", - ], - mplsh="${OUT_ROOT}/target/product/maple_arm32/bin/mplsh_arm_hard", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Mplsh( - env={ - "MAPLE_REPORT_RC_LEAK": "1", - "JNI_TEST": "true" - }, - qemu="/usr/bin/qemu-arm", - qemu_libc="/usr/arm-linux-gnueabihf", - qemu_ld_lib=[ - "./", - "${OUT_ROOT}/target/product/maple_arm32/third-party/hard", - "${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-hard_O2", - ], - mplsh="${OUT_ROOT}/target/product/maple_arm32/bin/mplsh_arm_hard", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="leak.log" - ), - CheckRegContain( - reg="Total none-cycle root objects 0", - file="leak.log" - ), - Mplsh( - env={ - "MAPLE_VERIFY_RC": "1", - "JNI_TEST": "true" - }, - qemu="/usr/bin/qemu-arm", - qemu_libc="/usr/arm-linux-gnueabihf", - qemu_ld_lib=[ - "./", - "${OUT_ROOT}/target/product/maple_arm32/third-party/hard", - "${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-hard_O2", - ], - mplsh="${OUT_ROOT}/target/product/maple_arm32/bin/mplsh_arm_hard", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential early release", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential leak", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects weak rc are wrong", - file="rcverify.log" - ) - ] -} diff --git a/testsuite/driver/src/mode/ARM32O2NATIVESFP.py b/testsuite/driver/src/mode/ARM32O2NATIVESFP.py deleted file mode 100644 index 8cf5ff48a7..0000000000 --- a/testsuite/driver/src/mode/ARM32O2NATIVESFP.py +++ /dev/null @@ -1,129 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -ARM32O2NATIVESFP = { - "compile": [ - NativeCompile( - mpldep=[ - "${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-softfp_O2", - "${OUT_ROOT}/target/product/public/lib/libnativehelper/include" - ], - infile="${NATIVE_SRC}", - model="arm32_softfp" - ), - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java","${EXTRA_JAVA_FILE}"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm32/bin/maple", - run=["dex2mpl", "mplipa", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "-mplt=${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-softfp_O2/libcore-all.mplt -dexcatch -inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/to_inline.list -j=16 -j100 -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list -refine-catch -staticstringcheck", - "mplipa": "--effectipa --quiet", - "me": "--O2 --quiet --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea", - "mpl2mpl": "--O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal --dump-muid --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --emitVtableImpl", - "mplcg": "--O2 --quiet --float-abi=softfp --no-pie --verbose-asm --fPIC --gen-c-macro-def --maplelinker --gsrc --nativeopt --replaceasm" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Linker( - lib="host-x86_64-softfp_O2", - model="arm32_softfp", - infile="${APP}", - ) - ], - "run": [ - Mplsh( - env={ - "JNI_TEST": "true" - }, - qemu="/usr/bin/qemu-arm", - qemu_libc="/usr/arm-linux-gnueabi", - qemu_ld_lib=[ - "./", - "${OUT_ROOT}/target/product/maple_arm32/third-party/softfp", - "${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-softfp_O2" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm32/bin/mplsh_arm_softfp", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Mplsh( - env={ - "MAPLE_REPORT_RC_LEAK": "1", - "JNI_TEST": "true" - }, - qemu="/usr/bin/qemu-arm", - qemu_libc="/usr/arm-linux-gnueabi", - qemu_ld_lib=[ - "./", - "${OUT_ROOT}/target/product/maple_arm32/third-party/softfp", - "${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-softfp_O2" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm32/bin/mplsh_arm_softfp", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="leak.log" - ), - CheckRegContain( - reg="Total none-cycle root objects 0", - file="leak.log" - ), - Mplsh( - env={ - "MAPLE_VERIFY_RC": "1", - "JNI_TEST": "true" - }, - qemu="/usr/bin/qemu-arm", - qemu_libc="/usr/arm-linux-gnueabi", - qemu_ld_lib=[ - "./", - "${OUT_ROOT}/target/product/maple_arm32/third-party/softfp", - "${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-softfp_O2" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm32/bin/mplsh_arm_softfp", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential early release", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential leak", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects weak rc are wrong", - file="rcverify.log" - ) - ] -} diff --git a/testsuite/driver/src/mode/ARM32O2RCHD.py b/testsuite/driver/src/mode/ARM32O2RCHD.py deleted file mode 100644 index 4afbf9dc56..0000000000 --- a/testsuite/driver/src/mode/ARM32O2RCHD.py +++ /dev/null @@ -1,79 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -ARM32O2RCHD = { - "compile": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm32/bin/maple", - run=["dex2mpl", "mplipa", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "-mplt=${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-hard_O2/libcore-all.mplt -dexcatch -inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/to_inline.list -j=16 -j100 -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list -refine-catch -staticstringcheck", - "mplipa": "--effectipa --quiet", - "me": "--O2 --quiet --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea", - "mpl2mpl": "--O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal --dump-muid --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --emitVtableImpl", - "mplcg": "--O2 --quiet --no-pie --verbose-asm --fPIC --gen-c-macro-def --maplelinker --gsrc --nativeopt --replaceasm" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Linker( - lib="host-x86_64-hard_O2", - model="arm32_hard", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - env={ - "MAPLE_REPORT_RC_LEAK": "1", - "PATTERN_FROM_BACKUP_TRACING": "1" - }, - qemu="/usr/bin/qemu-arm", - qemu_libc="/usr/arm-linux-gnueabihf", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm32/third-party/hard", - "${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-hard_O2", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm32/bin/mplsh_arm_hard", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="cycle.log" - ), - CheckRegContain( - reg="ExpectResult", - file="cycle.log" - ), - CheckRegContain( - reg="Total Leak Count 0", - file="cycle.log" - ), - CheckRegContain( - choice="num", - reg="ExpectResult", - file="cycle.log" - ) - ] -} diff --git a/testsuite/driver/src/mode/ARM32O2RCSFP.py b/testsuite/driver/src/mode/ARM32O2RCSFP.py deleted file mode 100644 index e8fa848d2b..0000000000 --- a/testsuite/driver/src/mode/ARM32O2RCSFP.py +++ /dev/null @@ -1,79 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -ARM32O2RCSFP = { - "compile": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm32/bin/maple", - run=["dex2mpl", "mplipa", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "-mplt=${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-softfp_O2/libcore-all.mplt -dexcatch -inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/to_inline.list -j=16 -j100 -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list -refine-catch -staticstringcheck", - "mplipa": "--effectipa --quiet", - "me": "--O2 --quiet --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea", - "mpl2mpl": "--O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal --dump-muid --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --emitVtableImpl", - "mplcg": "--O2 --quiet --float-abi=softfp --no-pie --verbose-asm --fPIC --gen-c-macro-def --maplelinker --gsrc --nativeopt --replaceasm" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Linker( - lib="host-x86_64-softfp_O2", - model="arm32_softfp", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - env={ - "MAPLE_REPORT_RC_LEAK": "1", - "PATTERN_FROM_BACKUP_TRACING": "1" - }, - qemu="/usr/bin/qemu-arm", - qemu_libc="/usr/arm-linux-gnueabi", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm32/third-party/softfp", - "${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-softfp_O2", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm32/bin/mplsh_arm_softfp", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="cycle.log" - ), - CheckRegContain( - reg="ExpectResult", - file="cycle.log" - ), - CheckRegContain( - reg="Total Leak Count 0", - file="cycle.log" - ), - CheckRegContain( - choice="num", - reg="ExpectResult", - file="cycle.log" - ) - ] -} diff --git a/testsuite/driver/src/mode/ARM32O2SFP.py b/testsuite/driver/src/mode/ARM32O2SFP.py deleted file mode 100644 index 71adc72007..0000000000 --- a/testsuite/driver/src/mode/ARM32O2SFP.py +++ /dev/null @@ -1,116 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -ARM32O2SFP = { - "compile": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java","${EXTRA_JAVA_FILE}"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm32/bin/maple", - run=["dex2mpl", "mplipa", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "-mplt=${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-softfp_O2/libcore-all.mplt -dexcatch -inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/to_inline.list -j=16 -j100 -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list -refine-catch -staticstringcheck", - "mplipa": "--effectipa --quiet", - "me": "--O2 --quiet --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea", - "mpl2mpl": "--O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal --dump-muid --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --emitVtableImpl", - "mplcg": "--O2 --quiet --float-abi=softfp --no-pie --verbose-asm --fPIC --gen-c-macro-def --maplelinker --gsrc --nativeopt --replaceasm" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Linker( - lib="host-x86_64-softfp_O2", - model="arm32_softfp", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - qemu="/usr/bin/qemu-arm", - qemu_libc="/usr/arm-linux-gnueabi", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm32/third-party/softfp", - "${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-softfp_O2", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm32/bin/mplsh_arm_softfp", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Mplsh( - env={ - "MAPLE_REPORT_RC_LEAK": "1" - }, - qemu="/usr/bin/qemu-arm", - qemu_libc="/usr/arm-linux-gnueabi", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm32/third-party/softfp", - "${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-softfp_O2", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm32/bin/mplsh_arm_softfp", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="leak.log" - ), - CheckRegContain( - reg="Total none-cycle root objects 0", - file="leak.log" - ), - Mplsh( - env={ - "MAPLE_VERIFY_RC": "1", - }, - qemu="/usr/bin/qemu-arm", - qemu_libc="/usr/arm-linux-gnueabi", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm32/third-party/softfp", - "${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-softfp_O2", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm32/bin/mplsh_arm_softfp", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential early release", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential leak", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects weak rc are wrong", - file="rcverify.log" - ) - ] -} diff --git a/testsuite/driver/src/mode/ARM32ZTERPCLASSLOADERHD.py b/testsuite/driver/src/mode/ARM32ZTERPCLASSLOADERHD.py deleted file mode 100644 index 7d499e3af0..0000000000 --- a/testsuite/driver/src/mode/ARM32ZTERPCLASSLOADERHD.py +++ /dev/null @@ -1,299 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -ARM32ZTERPCLASSLOADERHD = { - "java2dex": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java"] - ) - ], - "compile": [ - Shell( - 'cp ../lib/child.jar ./ ' - ), - Shell( - 'cp ../lib/parent.jar ./ ' - ), - Shell( - 'cp ../lib/inject.jar ./ ' - ), - Jar2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/framework_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/services_intermediates/classes.jar" - ], - infile="child.jar" - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm32/bin/maple", - run=["dex2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-hard_O0/libcore-all.mplt -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list", - "me": "--quiet", - "mpl2mpl": "--quiet --regnativefunc --maplelinker --FastNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/fastNative.list --CriticalNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/criticalNative.list --nativefunc-property-list=${OUT_ROOT}/target/product/public/lib/codetricks/native_binding/native_func_property.list", - "mplcg": "--quiet --no-pie --verbose-asm --maplelinker --fPIC" - }, - global_option="--save-temps", - infile="child.dex" - ), - Linker( - lib="host-x86_64-hard_O0", - model="arm32_hard", - infile="child" - ), - Jar2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/framework_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/services_intermediates/classes.jar" - ], - infile="parent.jar" - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm32/bin/maple", - run=["dex2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-hard_O0/libcore-all.mplt -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list", - "me": "--quiet", - "mpl2mpl": "--quiet --regnativefunc --maplelinker --FastNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/fastNative.list --CriticalNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/criticalNative.list --nativefunc-property-list=${OUT_ROOT}/target/product/public/lib/codetricks/native_binding/native_func_property.list", - "mplcg": "--quiet --no-pie --verbose-asm --maplelinker --fPIC" - }, - global_option="--save-temps", - infile="parent.dex" - ), - Linker( - lib="host-x86_64-hard_O0", - model="arm32_hard", - infile="parent" - ), - Jar2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/framework_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/services_intermediates/classes.jar" - ], - infile="inject.jar" - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm32/bin/maple", - run=["dex2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-hard_O0/libcore-all.mplt -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list", - "me": "--quiet", - "mpl2mpl": "--quiet --regnativefunc --maplelinker --FastNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/fastNative.list --CriticalNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/criticalNative.list --nativefunc-property-list=${OUT_ROOT}/target/product/public/lib/codetricks/native_binding/native_func_property.list", - "mplcg": "--quiet --no-pie --verbose-asm --maplelinker --fPIC" - }, - global_option="--save-temps", - infile="inject.dex" - ), - Linker( - lib="host-x86_64-hard_O0", - model="arm32_hard", - infile="inject" - ), - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm32/bin/maple", - run=["dex2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-hard_O0/libcore-all.mplt -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list", - "me": "--quiet", - "mpl2mpl": "--quiet --regnativefunc --maplelinker --FastNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/fastNative.list --CriticalNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/criticalNative.list --nativefunc-property-list=${OUT_ROOT}/target/product/public/lib/codetricks/native_binding/native_func_property.list", - "mplcg": "--quiet --no-pie --verbose-asm --maplelinker --fPIC" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Linker( - lib="host-x86_64-hard_O0", - model="arm32_hard", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "USE_ZTERP": "true" - }, - qemu="/usr/bin/qemu-arm", - qemu_libc="/usr/arm-linux-gnueabihf", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm32/third-party/hard", - "${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-hard_O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm32/bin/mplsh_arm_hard", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.dex", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "USE_ZTERP": "true", - "MAPLE_REPORT_RC_LEAK": "1" - }, - qemu="/usr/bin/qemu-arm", - qemu_libc="/usr/arm-linux-gnueabihf", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm32/third-party/hard", - "${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-hard_O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm32/bin/mplsh_arm_hard", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.dex", - redirection="leak.log" - ), - CheckRegContain( - reg="Total none-cycle root objects 0", - file="leak.log" - ), - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "USE_ZTERP": "true", - "MAPLE_VERIFY_RC": "1" - }, - qemu="/usr/bin/qemu-arm", - qemu_libc="/usr/arm-linux-gnueabihf", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm32/third-party/hard", - "${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-hard_O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm32/bin/mplsh_arm_hard", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.dex", - redirection="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential early release", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential leak", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects weak rc are wrong", - file="rcverify.log" - ), - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "USE_ZTERP": "true", - "APP_SPECIFY_CLASSPATH": '$(echo ${APP}.so|cut -d "=" -f 2)' - }, - qemu="/usr/bin/qemu-arm", - qemu_libc="/usr/arm-linux-gnueabihf", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm32/third-party/hard", - "${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-hard_O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm32/bin/mplsh_arm_hard", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.dex", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "USE_ZTERP": "true", - "MAPLE_REPORT_RC_LEAK": "1", - "APP_SPECIFY_CLASSPATH": '$(echo ${APP}.so|cut -d "=" -f 2)' - }, - qemu="/usr/bin/qemu-arm", - qemu_libc="/usr/arm-linux-gnueabihf", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm32/third-party/hard", - "${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-hard_O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm32/bin/mplsh_arm_hard", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.dex", - redirection="leak.log" - ), - CheckRegContain( - reg="Total none-cycle root objects 0", - file="leak.log" - ), - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "USE_ZTERP": "true", - "MAPLE_VERIFY_RC": "1", - "APP_SPECIFY_CLASSPATH": '$(echo ${APP}.so|cut -d "=" -f 2)' - }, - qemu="/usr/bin/qemu-arm", - qemu_libc="/usr/arm-linux-gnueabihf", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm32/third-party/hard", - "${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-hard_O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm32/bin/mplsh_arm_hard", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.dex", - redirection="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential early release", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential leak", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects weak rc are wrong", - file="rcverify.log" - ) - ] -} diff --git a/testsuite/driver/src/mode/ARM32ZTERPCLASSLOADERSFP.py b/testsuite/driver/src/mode/ARM32ZTERPCLASSLOADERSFP.py deleted file mode 100644 index d934d314a8..0000000000 --- a/testsuite/driver/src/mode/ARM32ZTERPCLASSLOADERSFP.py +++ /dev/null @@ -1,299 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -ARM32ZTERPCLASSLOADERSFP = { - "java2dex": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java"] - ) - ], - "compile": [ - Shell( - 'cp ../lib/child.jar ./ ' - ), - Shell( - 'cp ../lib/parent.jar ./ ' - ), - Shell( - 'cp ../lib/inject.jar ./ ' - ), - Jar2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/framework_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/services_intermediates/classes.jar" - ], - infile="child.jar" - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm32/bin/maple", - run=["dex2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-softfp_O0/libcore-all.mplt -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list", - "me": "--quiet", - "mpl2mpl": "--quiet --regnativefunc --maplelinker --FastNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/fastNative.list --CriticalNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/criticalNative.list --nativefunc-property-list=${OUT_ROOT}/target/product/public/lib/codetricks/native_binding/native_func_property.list", - "mplcg": "--quiet --float-abi=softfp --no-pie --verbose-asm --maplelinker --fPIC" - }, - global_option="--save-temps", - infile="child.dex" - ), - Linker( - lib="host-x86_64-softfp_O0", - model="arm32_softfp", - infile="child" - ), - Jar2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/framework_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/services_intermediates/classes.jar" - ], - infile="parent.jar" - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm32/bin/maple", - run=["dex2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-softfp_O0/libcore-all.mplt -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list", - "me": "--quiet", - "mpl2mpl": "--quiet --regnativefunc --maplelinker --FastNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/fastNative.list --CriticalNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/criticalNative.list --nativefunc-property-list=${OUT_ROOT}/target/product/public/lib/codetricks/native_binding/native_func_property.list", - "mplcg": "--quiet --float-abi=softfp --no-pie --verbose-asm --maplelinker --fPIC" - }, - global_option="--save-temps", - infile="parent.dex" - ), - Linker( - lib="host-x86_64-softfp_O0", - model="arm32_softfp", - infile="parent" - ), - Jar2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/framework_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/services_intermediates/classes.jar" - ], - infile="inject.jar" - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm32/bin/maple", - run=["dex2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-softfp_O0/libcore-all.mplt -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list", - "me": "--quiet", - "mpl2mpl": "--quiet --regnativefunc --maplelinker --FastNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/fastNative.list --CriticalNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/criticalNative.list --nativefunc-property-list=${OUT_ROOT}/target/product/public/lib/codetricks/native_binding/native_func_property.list", - "mplcg": "--quiet --float-abi=softfp --no-pie --verbose-asm --maplelinker --fPIC" - }, - global_option="--save-temps", - infile="inject.dex" - ), - Linker( - lib="host-x86_64-softfp_O0", - model="arm32_softfp", - infile="inject" - ), - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm32/bin/maple", - run=["dex2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-softfp_O0/libcore-all.mplt -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list", - "me": "--quiet", - "mpl2mpl": "--quiet --regnativefunc --maplelinker--FastNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/fastNative.list --CriticalNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/criticalNative.list --nativefunc-property-list=${OUT_ROOT}/target/product/public/lib/codetricks/native_binding/native_func_property.list", - "mplcg": "--quiet --float-abi=softfp --no-pie --verbose-asm --maplelinker --fPIC" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Linker( - lib="host-x86_64-softfp_O0", - model="arm32_softfp", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "USE_ZTERP": "true" - }, - qemu="/usr/bin/qemu-arm", - qemu_libc="/usr/arm-linux-gnueabi", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm32/third-party/softfp", - "${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-softfp_O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm32/bin/mplsh_arm_softfp", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.dex", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "USE_ZTERP": "true", - "MAPLE_REPORT_RC_LEAK": "1" - }, - qemu="/usr/bin/qemu-arm", - qemu_libc="/usr/arm-linux-gnueabi", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm32/third-party/softfp", - "${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-softfp_O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm32/bin/mplsh_arm_softfp", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.dex", - redirection="leak.log" - ), - CheckRegContain( - reg="Total none-cycle root objects 0", - file="leak.log" - ), - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "USE_ZTERP": "true", - "MAPLE_VERIFY_RC": "1" - }, - qemu="/usr/bin/qemu-arm", - qemu_libc="/usr/arm-linux-gnueabi", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm32/third-party/softfp", - "${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-softfp_O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm32/bin/mplsh_arm_softfp", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.dex", - redirection="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential early release", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential leak", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects weak rc are wrong", - file="rcverify.log" - ), - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "USE_ZTERP": "true", - "APP_SPECIFY_CLASSPATH": '$(echo ${APP}.so|cut -d "=" -f 2)' - }, - qemu="/usr/bin/qemu-arm", - qemu_libc="/usr/arm-linux-gnueabi", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm32/third-party/softfp", - "${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-softfp_O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm32/bin/mplsh_arm_softfp", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.dex", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "USE_ZTERP": "true", - "MAPLE_REPORT_RC_LEAK": "1", - "APP_SPECIFY_CLASSPATH": '$(echo ${APP}.so|cut -d "=" -f 2)' - }, - qemu="/usr/bin/qemu-arm", - qemu_libc="/usr/arm-linux-gnueabi", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm32/third-party/softfp", - "${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-softfp_O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm32/bin/mplsh_arm_softfp", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.dex", - redirection="leak.log" - ), - CheckRegContain( - reg="Total none-cycle root objects 0", - file="leak.log" - ), - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "USE_ZTERP": "true", - "MAPLE_VERIFY_RC": "1", - "APP_SPECIFY_CLASSPATH": '$(echo ${APP}.so|cut -d "=" -f 2)' - }, - qemu="/usr/bin/qemu-arm", - qemu_libc="/usr/arm-linux-gnueabi", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm32/third-party/softfp", - "${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-softfp_O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm32/bin/mplsh_arm_softfp", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.dex", - redirection="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential early release", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential leak", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects weak rc are wrong", - file="rcverify.log" - ) - ] -} diff --git a/testsuite/driver/src/mode/ARM32ZTERPDEXSOHD.py b/testsuite/driver/src/mode/ARM32ZTERPDEXSOHD.py deleted file mode 100644 index 911b6f7577..0000000000 --- a/testsuite/driver/src/mode/ARM32ZTERPDEXSOHD.py +++ /dev/null @@ -1,144 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -ARM32ZTERPDEXSOHD = { - "java2dex":[ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java"] - ) - ], - "java2dex_simplejava":[ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java"], - usesimplejava=True - ) - ], - "compile": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm32/bin/maple", - run=["dex2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-hard_O0/libcore-all.mplt -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list ", - "me": "--quiet", - "mpl2mpl": "--quiet --regnativefunc --maplelinker --FastNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/fastNative.list --CriticalNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/criticalNative.list --nativefunc-property-list=${OUT_ROOT}/target/product/public/lib/codetricks/native_binding/native_func_property.list", - "mplcg": "--quiet --no-pie --verbose-asm --maplelinker --fPIC" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Linker( - lib="host-x86_64-hard_O0", - model="arm32_hard", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "USE_ZTERP": "true" - }, - qemu="/usr/bin/qemu-arm", - qemu_libc="/usr/arm-linux-gnueabihf", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm32/third-party/hard", - "${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-hard_O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm32/bin/mplsh_arm_hard", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${CP}", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "USE_ZTERP": "true", - "MAPLE_REPORT_RC_LEAK": "1" - }, - qemu="/usr/bin/qemu-arm", - qemu_libc="/usr/arm-linux-gnueabihf", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm32/third-party/hard", - "${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-hard_O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm32/bin/mplsh_arm_hard", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${CP}", - redirection="leak.log" - ), - CheckRegContain( - reg="Total none-cycle root objects 0", - file="leak.log" - ), - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "USE_ZTERP": "true", - "MAPLE_VERIFY_RC": "1" - }, - qemu="/usr/bin/qemu-arm", - qemu_libc="/usr/arm-linux-gnueabihf", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm32/third-party/hard", - "${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-hard_O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm32/bin/mplsh_arm_hard", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${CP}", - redirection="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential early release", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential leak", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects weak rc are wrong", - file="rcverify.log" - ) - ] -} diff --git a/testsuite/driver/src/mode/ARM32ZTERPDEXSOSFP.py b/testsuite/driver/src/mode/ARM32ZTERPDEXSOSFP.py deleted file mode 100644 index 36106bbe43..0000000000 --- a/testsuite/driver/src/mode/ARM32ZTERPDEXSOSFP.py +++ /dev/null @@ -1,144 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -ARM32ZTERPDEXSOSFP = { - "java2dex": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java"] - ) - ], - "java2dex_simplejava": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java"], - usesimplejava=True - ) - ], - "compile": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm32/bin/maple", - run=["dex2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-softfp_O0/libcore-all.mplt -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list", - "me": "--quiet", - "mpl2mpl": "--quiet --regnativefunc --maplelinker --FastNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/fastNative.list --CriticalNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/criticalNative.list --nativefunc-property-list=${OUT_ROOT}/target/product/public/lib/codetricks/native_binding/native_func_property.list", - "mplcg": "--quiet --float-abi=softfp --no-pie --verbose-asm --maplelinker --fPIC" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Linker( - lib="host-x86_64-softfp_O0", - model="arm32_softfp", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "USE_ZTERP": "true" - }, - qemu="/usr/bin/qemu-arm", - qemu_libc="/usr/arm-linux-gnueabi", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm32/third-party/softfp", - "${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-softfp_O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm32/bin/mplsh_arm_softfp", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${CP}", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "USE_ZTERP": "true", - "MAPLE_REPORT_RC_LEAK": "1" - }, - qemu="/usr/bin/qemu-arm", - qemu_libc="/usr/arm-linux-gnueabi", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm32/third-party/softfp", - "${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-softfp_O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm32/bin/mplsh_arm_softfp", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${CP}", - redirection="leak.log" - ), - CheckRegContain( - reg="Total none-cycle root objects 0", - file="leak.log" - ), - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "USE_ZTERP": "true", - "MAPLE_VERIFY_RC": "1" - }, - qemu="/usr/bin/qemu-arm", - qemu_libc="/usr/arm-linux-gnueabi", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm32/third-party/softfp", - "${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-softfp_O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm32/bin/mplsh_arm_softfp", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${CP}", - redirection="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential early release", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential leak", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects weak rc are wrong", - file="rcverify.log" - ) - ] -} diff --git a/testsuite/driver/src/mode/ARM32ZTERPHD.py b/testsuite/driver/src/mode/ARM32ZTERPHD.py deleted file mode 100644 index e6af20039d..0000000000 --- a/testsuite/driver/src/mode/ARM32ZTERPHD.py +++ /dev/null @@ -1,106 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -ARM32ZTERPHD = { - "compile": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java","${EXTRA_JAVA_FILE}"] - ) - ], - "run": [ - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "USE_ZTERP": "true" - }, - qemu="/usr/bin/qemu-arm", - qemu_libc="/usr/arm-linux-gnueabihf", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm32/third-party/hard", - "${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-hard_O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm32/bin/mplsh_arm_hard", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.dex", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "USE_ZTERP": "true", - "MAPLE_REPORT_RC_LEAK": "1" - }, - qemu="/usr/bin/qemu-arm", - qemu_libc="/usr/arm-linux-gnueabihf", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm32/third-party/hard", - "${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-hard_O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm32/bin/mplsh_arm_hard", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.dex", - redirection="leak.log" - ), - CheckRegContain( - reg="Total none-cycle root objects 0", - file="leak.log" - ), - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "USE_ZTERP": "true", - "MAPLE_VERIFY_RC": "1" - }, - qemu="/usr/bin/qemu-arm", - qemu_libc="/usr/arm-linux-gnueabihf", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm32/third-party/hard", - "${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-hard_O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm32/bin/mplsh_arm_hard", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.dex", - redirection="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential early release", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential leak", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects weak rc are wrong", - file="rcverify.log" - ) - ] -} diff --git a/testsuite/driver/src/mode/ARM32ZTERPRCHD.py b/testsuite/driver/src/mode/ARM32ZTERPRCHD.py deleted file mode 100644 index fa64e949b7..0000000000 --- a/testsuite/driver/src/mode/ARM32ZTERPRCHD.py +++ /dev/null @@ -1,63 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -ARM32ZTERPRCHD = { - "compile": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java"] - ) - ], - "run": [ - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "USE_ZTERP": "true", - "MAPLE_REPORT_RC_LEAK": "1", - "PATTERN_FROM_BACKUP_TRACING": "1" - }, - qemu="/usr/bin/qemu-arm", - qemu_libc="/usr/arm-linux-gnueabihf", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm32/third-party/hard", - "${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-hard_O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm32/bin/mplsh_arm_hard", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.dex", - redirection="cycle.log" - ), - CheckRegContain( - reg="ExpectResult", - file="cycle.log" - ), - CheckRegContain( - reg="Total Leak Count 0", - file="cycle.log" - ), - CheckRegContain( - reg="ExpectResult", - file="cycle.log", - choice="num" - ) - ] -} \ No newline at end of file diff --git a/testsuite/driver/src/mode/ARM32ZTERPRCSFP.py b/testsuite/driver/src/mode/ARM32ZTERPRCSFP.py deleted file mode 100644 index 2908566504..0000000000 --- a/testsuite/driver/src/mode/ARM32ZTERPRCSFP.py +++ /dev/null @@ -1,63 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -ARM32ZTERPRCSFP = { - "compile": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java"] - ) - ], - "run": [ - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "USE_ZTERP": "true", - "MAPLE_REPORT_RC_LEAK": "1", - "PATTERN_FROM_BACKUP_TRACING": "1" - }, - qemu="/usr/bin/qemu-arm", - qemu_libc="/usr/arm-linux-gnueabi", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm32/third-party/softfp", - "${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-softfp_O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm32/bin/mplsh_arm_softfp", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.dex", - redirection="cycle.log" - ), - CheckRegContain( - reg="ExpectResult", - file="cycle.log" - ), - CheckRegContain( - reg="Total Leak Count 0", - file="cycle.log" - ), - CheckRegContain( - reg="ExpectResult", - file="cycle.log", - choice="num" - ) - ] -} \ No newline at end of file diff --git a/testsuite/driver/src/mode/ARM32ZTERPSFP.py b/testsuite/driver/src/mode/ARM32ZTERPSFP.py deleted file mode 100644 index ef76cd430b..0000000000 --- a/testsuite/driver/src/mode/ARM32ZTERPSFP.py +++ /dev/null @@ -1,106 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -ARM32ZTERPSFP = { - "compile": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java","${EXTRA_JAVA_FILE}"] - ) - ], - "run": [ - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "USE_ZTERP": "true" - }, - qemu="/usr/bin/qemu-arm", - qemu_libc="/usr/arm-linux-gnueabi", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm32/third-party/softfp", - "${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-softfp_O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm32/bin/mplsh_arm_softfp", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.dex", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "USE_ZTERP": "true", - "MAPLE_REPORT_RC_LEAK": "1" - }, - qemu="/usr/bin/qemu-arm", - qemu_libc="/usr/arm-linux-gnueabi", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm32/third-party/softfp", - "${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-softfp_O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm32/bin/mplsh_arm_softfp", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.dex", - redirection="leak.log" - ), - CheckRegContain( - reg="Total none-cycle root objects 0", - file="leak.log" - ), - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "USE_ZTERP": "true", - "MAPLE_VERIFY_RC": "1", - }, - qemu="/usr/bin/qemu-arm", - qemu_libc="/usr/arm-linux-gnueabi", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm32/third-party/softfp", - "${OUT_ROOT}/target/product/maple_arm32/lib/host-x86_64-softfp_O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm32/bin/mplsh_arm_softfp", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.dex", - redirection="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential early release", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential leak", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects weak rc are wrong", - file="rcverify.log" - ) - ] -} \ No newline at end of file diff --git a/testsuite/driver/src/mode/COMPACT.py b/testsuite/driver/src/mode/COMPACT.py deleted file mode 100644 index ee855cadc2..0000000000 --- a/testsuite/driver/src/mode/COMPACT.py +++ /dev/null @@ -1,123 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -COMPACT = { - "compile": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/maple", - run=["dex2mpl", "mplipa", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O2/libcore-all.mplt -inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/to_inline.list -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list", - "mplipa": "--quiet --effectipa", - "me": "-O2 --quiet --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea", - "mpl2mpl": "-O2 --quiet --regnativefunc --no-nativeopt --maplelinker --compact-meta --FastNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/fastNative.list --CriticalNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/criticalNative.list --nativefunc-property-list=${OUT_ROOT}/target/product/public/lib/codetricks/native_binding/native_func_property.list", - "mplcg": "-O2 --quiet --no-pie --verbose-asm --gen-c-macro-def --maplelinker --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/arch/arm64/duplicateFunc.s --fPIC" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Shell( - "python3 ${OUT_ROOT}/target/product/public/bin/check_compact.py ${APP}.VtableImpl.s > output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Linker( - lib="host-x86_64-O2", - model="arm64", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O2", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Mplsh( - env={ - "MAPLE_REPORT_RC_LEAK": "1" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O2", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="leak.log" - ), - CheckRegContain( - reg="Total none-cycle root objects 0", - file="leak.log" - ), - Mplsh( - env={ - "MAPLE_VERIFY_RC": "1", - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O2", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential early release", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential leak", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects weak rc are wrong", - file="rcverify.log" - ) - ] -} diff --git a/testsuite/driver/src/mode/DEOPT.py b/testsuite/driver/src/mode/DEOPT.py deleted file mode 100644 index 02e5d55214..0000000000 --- a/testsuite/driver/src/mode/DEOPT.py +++ /dev/null @@ -1,60 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -DEOPT = { - "compile": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java","${EXTRA_JAVA_FILE}"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/bin_HIR2MPL_IFILE/maple", - run=["hir2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "hir2mpl": "-mplt=${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_IFILE/libcore-all.mplt", - "me": "--gconly --O2 --quiet --threads=4 --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea", - "mpl2mpl": "--gconly --O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal --dump-muid --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --emitVtableImpl", - "mplcg": "--gconly --O2 --quiet --threads=4 --no-pie --verbose-asm --gen-c-macro-def --maplelinker --duplicate_asm_list=${OUT_ROOT}/target/product/maple_arm64-clang-release/lib/codetricks/arch/arm64/duplicateFunc.s --nativeopt --fPIC --filetype=obj --with-ra-linear-scan --no-ico --no-cfgo --no-prepeep --no-peep --no-ebo --no-storeloadopt --no-globalopt --no-schedule --no-proepilogue --no-prelsra --no-const-fold" - }, - global_option="--save-temps --aot --deopt --ifile", - infile="${APP}.dex" - ) - ], - "run": [ - Mplsh( - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_IFILE", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="GC", - xbootclasspath="libcore-all.ohex", - infile="${APP}.ohex", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ) - ] -} diff --git a/testsuite/driver/src/mode/DEPENDENCE.py b/testsuite/driver/src/mode/DEPENDENCE.py deleted file mode 100644 index 03e887b1c5..0000000000 --- a/testsuite/driver/src/mode/DEPENDENCE.py +++ /dev/null @@ -1,27 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -DEPENDENCE = { - "gendeps": [ - Gendeps( - gendeps="${OUT_ROOT}/target/product/maple_arm64/bin/gendeps", - apk="${APK}", - emui="${EMUI}", - extra_option="${EXTRA_OPTION}", - infile="${APP}.dex" - ) - ] -} \ No newline at end of file diff --git a/testsuite/driver/src/mode/DEX.py b/testsuite/driver/src/mode/DEX.py deleted file mode 100644 index b01e76a088..0000000000 --- a/testsuite/driver/src/mode/DEX.py +++ /dev/null @@ -1,39 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -DEX = { - "compile": [ - Dex2mpl( - dex2mpl="${OUT_ROOT}/target/product/maple_arm64/bin/dex2mpl", - option="--mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O0/libcore-all.mplt -litprofile=/home/fuqun/maple3.0/out/target/product/maple_arm64/lib/codetricks/profile.pv/meta.list", - infile="${APP}.dex" - ), - Irbuild( - irbuild="${OUT_ROOT}/target/product/maple_arm64/bin/irbuild", - infile="${APP}.mpl" - ), - Mplverf( - mplverf="${OUT_ROOT}/target/product/maple_arm64/bin/mplverf", - infile="${APP}.mpl" - ), - Mplme( - mplme="${OUT_ROOT}/target/product/maple_arm64/bin/mplme", - option="-O2", - infile="${APP}.mpl" - ) - ], - "run": [] -} \ No newline at end of file diff --git a/testsuite/driver/src/mode/GCO0.py b/testsuite/driver/src/mode/GCO0.py deleted file mode 100644 index e8ec39d377..0000000000 --- a/testsuite/driver/src/mode/GCO0.py +++ /dev/null @@ -1,65 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -GCO0 = { - "compile": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java","${EXTRA_JAVA_FILE}"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/maple", - run=["dex2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "-mplt=${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-GCO0/libcore-all.mplt -anti-proguard-auto -dexcatch -gconly -gen-stringfieldvalue -inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/to_inline.list -j=32 -j100 -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list -opt-switch-disable -refine-catch -staticstringcheck", - "me": "--quiet --gconly", - "mpl2mpl": "--quiet --regnativefunc --maplelinker --maplelinker-nolocal --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --gen-pgo-report --gconly", - "mplcg": "--quiet --no-pie --fPIC --verbose-asm --maplelinker --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/asm/duplicateFunc.s --gsrc --gconly" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Linker( - lib="host-x86_64-GCO0", - model="arm64", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-GCO0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="GC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ) - ] -} diff --git a/testsuite/driver/src/mode/GCO0NATIVE.py b/testsuite/driver/src/mode/GCO0NATIVE.py deleted file mode 100644 index d0f748dcea..0000000000 --- a/testsuite/driver/src/mode/GCO0NATIVE.py +++ /dev/null @@ -1,76 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -GCO0NATIVE = { - "compile": [ - NativeCompile( - mpldep=[ - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-GCO0", - "${OUT_ROOT}/target/product/public/lib/libnativehelper/include" - ], - infile="${NATIVE_SRC}", - model="arm64" - ), - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java","${EXTRA_JAVA_FILE}"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/maple", - run=["dex2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "-mplt=${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-GCO0/libcore-all.mplt -anti-proguard-auto -dexcatch -gconly -gen-stringfieldvalue -inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/to_inline.list -j=32 -j100 -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list -opt-switch-disable -refine-catch -staticstringcheck", - "me": "--quiet --gconly", - "mpl2mpl": "--quiet --regnativefunc --maplelinker --maplelinker-nolocal --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --gen-pgo-report --gconly", - "mplcg": "--quiet --no-pie --fPIC --verbose-asm --maplelinker --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/asm/duplicateFunc.s --gsrc --gconly" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Linker( - lib="host-x86_64-GCO0", - model="arm64", - infile="${APP}", - ) - ], - "run": [ - Mplsh( - env={ - "JNI_TEST": "true" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "./", - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-GCO0", - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="GC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ) - ] -} diff --git a/testsuite/driver/src/mode/GCO2.py b/testsuite/driver/src/mode/GCO2.py deleted file mode 100644 index a98c34d594..0000000000 --- a/testsuite/driver/src/mode/GCO2.py +++ /dev/null @@ -1,66 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -GCO2 = { - "compile": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java","${EXTRA_JAVA_FILE}"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/maple", - run=["dex2mpl", "mplipa", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "-mplt=${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-GCO2/libcore-all.mplt -anti-proguard-auto -dexcatch -gconly -gen-stringfieldvalue -inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/to_inline.list -j=32 -j100 -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list -opt-switch-disable -refine-catch -staticstringcheck", - "mplipa": "--effectipa --quiet", - "me": "--O2 --quiet --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea --gconly", - "mpl2mpl": "--O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --gen-pgo-report --gconly", - "mplcg": "--O2 --quiet --no-pie --verbose-asm --fPIC --gen-c-macro-def --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/asm/duplicateFunc.s --maplelinker --gsrc --gconly" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Linker( - lib="host-x86_64-GCO2", - model="arm64", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-GCO2", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="GC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ) - ] -} diff --git a/testsuite/driver/src/mode/GCO2NATIVE.py b/testsuite/driver/src/mode/GCO2NATIVE.py deleted file mode 100644 index 7285ce51e1..0000000000 --- a/testsuite/driver/src/mode/GCO2NATIVE.py +++ /dev/null @@ -1,77 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -GCO2NATIVE = { - "compile": [ - NativeCompile( - mpldep=[ - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-GCO2", - "${OUT_ROOT}/target/product/public/lib/libnativehelper/include" - ], - infile="${NATIVE_SRC}", - model="arm64" - ), - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java","${EXTRA_JAVA_FILE}"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/maple", - run=["dex2mpl", "mplipa", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "-mplt=${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-GCO2/libcore-all.mplt -anti-proguard-auto -dexcatch -gconly -gen-stringfieldvalue -inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/to_inline.list -j=32 -j100 -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list -opt-switch-disable -refine-catch -staticstringcheck", - "mplipa": "--effectipa --quiet", - "me": "--O2 --quiet --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea --gconly", - "mpl2mpl": "--O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --gen-pgo-report --gconly", - "mplcg": "--O2 --quiet --no-pie --verbose-asm --fPIC --gen-c-macro-def --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/asm/duplicateFunc.s --maplelinker --gsrc --gconly" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Linker( - lib="host-x86_64-GCO2", - model="arm64", - infile="${APP}", - ) - ], - "run": [ - Mplsh( - env={ - "JNI_TEST": "true" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "./", - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-GCO2", - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="GC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ) - ] -} diff --git a/testsuite/driver/src/mode/GCONLY.py b/testsuite/driver/src/mode/GCONLY.py deleted file mode 100644 index 9a06ec9bc5..0000000000 --- a/testsuite/driver/src/mode/GCONLY.py +++ /dev/null @@ -1,79 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * -from env_var import EnvVar - -GCONLY = { - "compile": [ - BenchmarkVogar(), - Shell( - "mv ${BENCHMARK_ACTION}/${BENCHMARK_ACTION}.dex.jar ${BENCHMARK_ACTION}/${BENCHMARK_ACTION}.jar;" - "if [ -d \"${BENCHMARK_ACTION}/dex\" ]; then" - " rm -rf ${BENCHMARK_ACTION}/dex;" - "fi;" - "unzip -q ${BENCHMARK_ACTION}/${BENCHMARK_ACTION}.jar -d ${BENCHMARK_ACTION}/dex" - ), - Maple( - maple="${MAPLE_ROOT}/../out/soong/host/linux-x86/bin/maple", - run=["dex2mpl"], - option={ - "dex2mpl": "-checktool -check-invoke -invoke-checklist=${MAPLE_ROOT}/mrt/codetricks/profile.pv/classloaderInvocation.list -check-incomplete -incomplete-whitelist=${MAPLE_ROOT}/mrt/codetricks/compile/incomplete.list -incomplete-detail -staticstringcheck --inlinefunclist=${MAPLE_ROOT}/mrt/codetricks/profile.pv/to_inline.list -dexcatch -litprofile=${MAPLE_ROOT}/mrt/codetricks/profile.pv/meta.list -gconly -output=${BENCHMARK_ACTION}/dex/ -mplt=${MAPLE_ROOT}/../out/soong/.intermediates/vendor/huawei/maple/Lib/core/libmaplecore-all/android_arm64_armv8-a_core_shared/obj/classes.mplt" - }, - global_option="", - infile="${BENCHMARK_ACTION}/dex/classes.dex" - ), - Maple( - maple="${MAPLE_ROOT}/../out/soong/host/linux-x86/bin/maple", - run=["mplipa"], - option={ - "mplipa": "--effectipa --quiet --inlinefunclist=${MAPLE_ROOT}/mrt/codetricks/profile.pv/inline_funcs.list" - }, - global_option="", - infile="${BENCHMARK_ACTION}/dex/classes.mpl > /dev/null" - ), - Maple( - maple="${MAPLE_ROOT}/../out/soong/host/linux-x86/bin/maple", - run=["me", "mpl2mpl", "mplcg"], - option={ - "me": "--inlinefunclist=${MAPLE_ROOT}/mrt/codetricks/profile.pv/inline_funcs.list -O2 --quiet --no-ignoreipa --gconly", - "mpl2mpl": "-regnativefunc --quiet -O2 --usewhiteclass --maplelinker --dump-muid --check_cl_invocation=${MAPLE_ROOT}/mrt/codetricks/profile.pv/classloaderInvocation.list --regnative-dynamic-only", - "mplcg": "-O2 --quiet --no-pie --nativeopt --verbose-asm --gen-c-macro-def --maplelinker --gsrc --duplicate_asm_list2=${MAPLE_ROOT}/mrt/compiler-rt/src/arch/arm64/fastFuncs.S --gconly --fPIC" - }, - global_option="--genVtableImpl", - infile="${BENCHMARK_ACTION}/dex/classes.mpl" - ), - Shell( - "${MAPLE_ROOT}/../prebuilts/clang/host/linux-x86/clang-r353983c/bin/clang -target aarch64-linux-android -g -c -x assembler-with-cpp -D__ASSEMBLY__ -DUSE_32BIT_REF -DGCONLY=1 -MD -MF ${BENCHMARK_ACTION}/dex/classes.d -o ${BENCHMARK_ACTION}/dex/classes.o ${BENCHMARK_ACTION}/dex/classes.VtableImpl.s" - ), - Shell( - "${MAPLE_ROOT}/../prebuilts/clang/host/linux-x86/clang-r353983c/bin/llvm-objcopy --rename-section .debug_info=.maple_java_debug_info --rename-section .debug_abbrev=.maple_java_debug_abbrev --rename-section .debug_line=.maple_java_debug_line --rename-section .debug_aranges=.maple_java_debug_aranges --rename-section .debug_ranges=.maple_java_debug_ranges ${BENCHMARK_ACTION}/dex/classes.o" - ), - Shell( - "${MAPLE_ROOT}/../prebuilts/clang/host/linux-x86/clang-r353983c/bin/clang++ -nostdlib -Wl,-soname,libmaple${BENCHMARK_ACTION}.so -Wl,--gc-sections -shared ${MAPLE_ROOT}/../out/soong/.intermediates/bionic/libc/crtbegin_so/android_arm64_armv8-a_core/crtbegin_so.o ${BENCHMARK_ACTION}/dex/classes.o -Wl,--whole-archive ${MAPLE_ROOT}/../out/target/product/generic_a15/obj/STATIC_LIBRARIES/mrt_module_init_intermediates/mrt_module_init.a -Wl,--no-whole-archive ${MAPLE_ROOT}/../out/target/product/generic_a15/obj/STATIC_LIBRARIES/libclang_rt.ubsan_minimal-aarch64-android_intermediates/libclang_rt.ubsan_minimal-aarch64-android.a ${MAPLE_ROOT}/../prebuilts/clang/host/linux-x86/clang-r353983c/lib64/clang/9.0.3/lib/linux//libclang_rt.builtins-aarch64-android.a ${MAPLE_ROOT}/../out/target/product/generic_a15/obj/STATIC_LIBRARIES/libatomic_intermediates/libatomic.a ${MAPLE_ROOT}/../out/target/product/generic_a15/obj/STATIC_LIBRARIES/libgcc_intermediates/libgcc.a -Wl,-z,noexecstack -Wl,-z,relro -Wl,-z,now -Wl,--build-id=md5 -Wl,--warn-shared-textrel -Wl,--fatal-warnings -Wl,--no-undefined-version -Wl,--exclude-libs,libgcc.a -Wl,--exclude-libs,libgcc_stripped.a -fuse-ld=lld -Wl,--hash-style=gnu -Wl,--icf=safe -Wl,-z,max-page-size=4096 -target aarch64-linux-android -B${MAPLE_ROOT}/../prebuilts/gcc/linux-x86/aarch64/aarch64-linux-android-4.9/aarch64-linux-android/bin -Wl,-T,${MAPLE_ROOT}/mrt/maplert/linker/maplelld.so.lds -Wl,-execute-only -Wl,--exclude-libs,libclang_rt.ubsan_minimal-aarch64-android.a -Wl,--no-undefined ${MAPLE_ROOT}/../out/target/product/generic_a15/obj/SHARED_LIBRARIES/libmaplecore-all_intermediates/libmaplecore-all.so ${MAPLE_ROOT}/../out/target/product/generic_a15/obj/SHARED_LIBRARIES/libmrt_intermediates/libmrt.so ${MAPLE_ROOT}/../out/target/product/generic_a15/obj/SHARED_LIBRARIES/libcommon_bridge_intermediates/libcommon_bridge.so ${MAPLE_ROOT}/../out/target/product/generic_a15/obj/SHARED_LIBRARIES/libc++_intermediates/libc++.so ${MAPLE_ROOT}/../out/target/product/generic_a15/obj/SHARED_LIBRARIES/libc_intermediates/libc.so ${MAPLE_ROOT}/../out/target/product/generic_a15/obj/SHARED_LIBRARIES/libm_intermediates/libm.so ${MAPLE_ROOT}/../out/target/product/generic_a15/obj/SHARED_LIBRARIES/libdl_intermediates/libdl.so -o ${BENCHMARK_ACTION}/dex/libmaple${BENCHMARK_ACTION}Symbol.so ${MAPLE_ROOT}/../out/soong/.intermediates/bionic/libc/crtend_so/android_arm64_armv8-a_core/obj/bionic/libc/arch-common/bionic/crtend_so.o" - ), - Shell( - "CLANG_BIN=${MAPLE_ROOT}/../prebuilts/clang/host/linux-x86/clang-r353983c/bin CROSS_COMPILE=${MAPLE_ROOT}/../prebuilts/gcc/linux-x86/aarch64/aarch64-linux-android-4.9/bin/aarch64-linux-android- XZ=${MAPLE_ROOT}/../prebuilts/build-tools/linux-x86/bin/xz ${MAPLE_ROOT}/../build/soong/scripts/strip.sh -i ${BENCHMARK_ACTION}/dex/libmaple${BENCHMARK_ACTION}Symbol.so -o ${BENCHMARK_ACTION}/dex/libmaple${BENCHMARK_ACTION}.so -d ${BENCHMARK_ACTION}/dex/libmaple${BENCHMARK_ACTION}.so.d --keep-mini-debug-info" - ), - Shell( - "(${MAPLE_ROOT}/../prebuilts/gcc/linux-x86/aarch64/aarch64-linux-android-4.9/bin/aarch64-linux-android-readelf -d ${BENCHMARK_ACTION}/dex/libmaple${BENCHMARK_ACTION}.so | grep SONAME || echo \"No SONAME for ${BENCHMARK_ACTION}/dex/libmaple${BENCHMARK_ACTION}.so\") > ${BENCHMARK_ACTION}/dex/libmaple${BENCHMARK_ACTION}.so.toc.tmp;" - "${MAPLE_ROOT}/../prebuilts/gcc/linux-x86/aarch64/aarch64-linux-android-4.9/bin/aarch64-linux-android-readelf --dyn-syms ${BENCHMARK_ACTION}/dex/libmaple${BENCHMARK_ACTION}.so | awk '{$2=\"\"; $3=\"\"; print}' >> ${BENCHMARK_ACTION}/dex/libmaple${BENCHMARK_ACTION}.so.toc.tmp;" - "mv ${BENCHMARK_ACTION}/dex/libmaple${BENCHMARK_ACTION}.so.toc.tmp ${BENCHMARK_ACTION}/dex/libmaple${BENCHMARK_ACTION}.so.toc;" - "cp ${BENCHMARK_ACTION}/dex/libmaple${BENCHMARK_ACTION}.so ${BENCHMARK_ACTION}" - ), - ], - "native_compile": [ - BenchmarkNative() - ] -} diff --git a/testsuite/driver/src/mode/GC_IFILE.py b/testsuite/driver/src/mode/GC_IFILE.py deleted file mode 100644 index 3968771ed8..0000000000 --- a/testsuite/driver/src/mode/GC_IFILE.py +++ /dev/null @@ -1,61 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -GC_IFILE = { - "compile": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java","${EXTRA_JAVA_FILE}"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/bin_IFILE/maple", - run=["dex2mpl", "mplipa", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-GC_IFILE/libcore-all.mplt -dexcatch -gconly -inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/to_inline.list -j=16 -j100 -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list -refine-catch -staticstringcheck", - "mplipa": "--effectipa --quiet", - "me": "--O2 --threads=4 --quiet --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea --gconly", - "mpl2mpl": "--O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal --dump-muid --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --emitVtableImpl --gconly", - "mplcg": "--O2 --quiet --threads=4 --no-pie --verbose-asm --gen-c-macro-def --maplelinker --duplicate_asm_list=${OUT_ROOT}/target/product/maple_arm64-clang-release/lib/codetricks/arch/arm64/duplicateFunc.s --nativeopt --fPIC --filetype=obj --no-proepilogue --no-prelsra --no-const-fold --gconly" - }, - global_option="--save-temps --ifile --aot", - infile="${APP}.dex" - ) - ], - "run": [ - Mplsh( - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-GC_IFILE", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="GC", - xbootclasspath="libcore-all.ohex", - infile="${APP}.ohex", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ) - ] -} diff --git a/testsuite/driver/src/mode/GC_IFILE_NATIVE.py b/testsuite/driver/src/mode/GC_IFILE_NATIVE.py deleted file mode 100644 index a26247648f..0000000000 --- a/testsuite/driver/src/mode/GC_IFILE_NATIVE.py +++ /dev/null @@ -1,72 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -GC_IFILE_NATIVE = { - "compile": [ - NativeCompile( - mpldep=[ - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-GC_IFILE", - "${OUT_ROOT}/target/product/public/lib/libnativehelper/include" - ], - infile="${NATIVE_SRC}", - model="arm64_ifile" - ), - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java","${EXTRA_JAVA_FILE}"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/bin_IFILE/maple", - run=["dex2mpl", "mplipa", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-GC_IFILE/libcore-all.mplt -dexcatch -gconly -inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/to_inline.list -j=16 -j100 -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list -refine-catch -staticstringcheck", - "mplipa": "--effectipa --quiet", - "me": "--O2 --threads=4 --quiet --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea --gconly", - "mpl2mpl": "--O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal --dump-muid --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --emitVtableImpl --gconly", - "mplcg": "--O2 --quiet --threads=4 --no-pie --verbose-asm --gen-c-macro-def --maplelinker --duplicate_asm_list=${OUT_ROOT}/target/product/maple_arm64-clang-release/lib/codetricks/arch/arm64/duplicateFunc.s --nativeopt --fPIC --filetype=obj --no-proepilogue --no-prelsra --no-const-fold --gconly" - }, - global_option="--save-temps --ifile --aot", - infile="${APP}.dex" - ) - ], - "run": [ - Mplsh( - env={ - "JNI_TEST": "true" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "./", - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-GC_IFILE" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="GC", - xbootclasspath="libcore-all.ohex", - infile="${APP}.ohex", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ) - ] -} diff --git a/testsuite/driver/src/mode/HIR2MPL_COMMON_RC_IFILE.py b/testsuite/driver/src/mode/HIR2MPL_COMMON_RC_IFILE.py deleted file mode 100644 index d12907eed1..0000000000 --- a/testsuite/driver/src/mode/HIR2MPL_COMMON_RC_IFILE.py +++ /dev/null @@ -1,110 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -HIR2MPL_COMMON_RC_IFILE = { - "compile": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java","${EXTRA_JAVA_FILE}"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/bin_HIR2MPL_RC_IFILE/maple", - run=["hir2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "hir2mpl": "-rc -mplt=${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_RC_IFILE/libcore-all.mplt", - "me": "--O2 --quiet --threads=4 --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea", - "mpl2mpl": "--O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal --dump-muid --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --emitVtableImpl", - "mplcg": "--O2 --quiet --threads=4 --no-pie --verbose-asm --gen-c-macro-def --maplelinker --duplicate_asm_list=${OUT_ROOT}/target/product/maple_arm64-clang-release/lib/codetricks/arch/arm64/duplicateFunc.s --nativeopt --fPIC --filetype=obj --with-ra-linear-scan --no-ico --no-cfgo --no-prepeep --no-peep --no-ebo --no-storeloadopt --no-globalopt --no-schedule --no-proepilogue --no-prelsra --no-const-fold" - }, - global_option="--save-temps --ifile --aot", - infile="${APP}.dex" - ) - ], - "run": [ - Mplsh( - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_RC_IFILE", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.ohex", - infile="${APP}.ohex", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Mplsh( - env={ - "MAPLE_REPORT_RC_LEAK": "1" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_RC_IFILE", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.ohex", - infile="${APP}.ohex", - redirection="leak.log" - ), - CheckRegContain( - reg="Total none-cycle root objects 0", - file="leak.log" - ), - Mplsh( - env={ - "MAPLE_VERIFY_RC": "1", - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_RC_IFILE", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - infile="${APP}.ohex", - xbootclasspath="libcore-all.ohex", - redirection="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential early release", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential leak", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects weak rc are wrong", - file="rcverify.log" - ) - ] -} diff --git a/testsuite/driver/src/mode/HIR2MPL_COMMON_RC_IFILE_O0.py b/testsuite/driver/src/mode/HIR2MPL_COMMON_RC_IFILE_O0.py deleted file mode 100644 index 9fc85880e6..0000000000 --- a/testsuite/driver/src/mode/HIR2MPL_COMMON_RC_IFILE_O0.py +++ /dev/null @@ -1,109 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# -from api import * - -HIR2MPL_COMMON_RC_IFILE_O0 = { - "compile": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java","${EXTRA_JAVA_FILE}"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/bin_HIR2MPL_RC_IFILE_O0/maple", - run=["hir2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "hir2mpl": "-rc -mplt=${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_RC_IFILE_O0/libcore-all.mplt", - "me": "--quiet --enable-ea --aot", - "mpl2mpl": "--quiet --regnativefunc --maplelinker --maplelinker-nolocal --dump-muid --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --emitVtableImpl", - "mplcg": "--quiet --no-pie --verbose-asm --gen-c-macro-def --maplelinker --duplicate_asm_list=${OUT_ROOT}/target/product/maple_arm64-clang-release/lib/codetricks/arch/arm64/duplicateFunc.s --nativeopt --fPIC --filetype=obj --no-proepilogue --no-prelsra --no-const-fold" - }, - global_option="--save-temps --ifile --aot", - infile="${APP}.dex" - ) - ], - "run": [ - Mplsh( - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_RC_IFILE_O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.ohex", - infile="${APP}.ohex", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Mplsh( - env={ - "MAPLE_REPORT_RC_LEAK": "1" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_RC_IFILE_O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.ohex", - infile="${APP}.ohex", - redirection="leak.log" - ), - CheckRegContain( - reg="Total none-cycle root objects 0", - file="leak.log" - ), - Mplsh( - env={ - "MAPLE_VERIFY_RC": "1", - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_RC_IFILE_O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - infile="${APP}.ohex", - xbootclasspath="libcore-all.ohex", - redirection="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential early release", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential leak", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects weak rc are wrong", - file="rcverify.log" - ) - ] -} diff --git a/testsuite/driver/src/mode/HIR2MPL_CSTO0.py b/testsuite/driver/src/mode/HIR2MPL_CSTO0.py deleted file mode 100644 index 0fe9e86be8..0000000000 --- a/testsuite/driver/src/mode/HIR2MPL_CSTO0.py +++ /dev/null @@ -1,68 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -HIR2MPL_CSTO0 = { - "compile": [ - Shell( - "cp ${OUT_ROOT}/target/product/public/lib/libcore-all.dex ." - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/bin_HIR2MPL/maple", - run=["hir2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "hir2mpl": "", - "me": "--quiet --ignore-inferred-ret-type --gconly", - "mpl2mpl": "--quiet --regnativefunc --maplelinker --maplelinker-nolocal", - "mplcg": "--quiet --no-pie --verbose-asm --gen-c-macro-def --gconly --maplelinker --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/arch/arm64/duplicateFunc.s --fPIC" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Shell( - "mv ${APP}.mpl serial_${APP}.mpl;" - "mv ${APP}.VtableImpl.mpl serial_${APP}.VtableImpl.mpl;" - "mv ${APP}.VtableImpl.s serial_${APP}.VtableImpl.s" - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/bin_HIR2MPL/maple", - run=["hir2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "hir2mpl": "--np 4", - "me": "--quiet --threads=4 --gconly", - "mpl2mpl": "--quiet --regnativefunc --maplelinker --maplelinker-nolocal", - "mplcg": "--quiet --no-pie --verbose-asm --gen-c-macro-def --gconly --maplelinker --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/arch/arm64/duplicateFunc.s --fPIC" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Shell( - "mv ${APP}.mpl parallel_${APP}.mpl;" - "mv ${APP}.VtableImpl.mpl parallel_${APP}.VtableImpl.mpl;" - "mv ${APP}.VtableImpl.s parallel_${APP}.VtableImpl.s" - ) - ], - "check": [ - Shell( - "diff serial_${APP}.mpl parallel_${APP}.mpl" - ), - Shell( - "diff serial_${APP}.VtableImpl.mpl parallel_${APP}.VtableImpl.mpl" - ), - Shell( - "diff serial_${APP}.VtableImpl.s parallel_${APP}.VtableImpl.s" - ) - ] -} diff --git a/testsuite/driver/src/mode/HIR2MPL_CSTO2.py b/testsuite/driver/src/mode/HIR2MPL_CSTO2.py deleted file mode 100644 index 961a8777c0..0000000000 --- a/testsuite/driver/src/mode/HIR2MPL_CSTO2.py +++ /dev/null @@ -1,68 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -HIR2MPL_CSTO2 = { - "compile": [ - Shell( - "cp ${OUT_ROOT}/target/product/public/lib/libcore-all.dex ." - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/bin_HIR2MPL/maple", - run=["hir2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "hir2mpl": "", - "me": "--O2 --quiet --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --ignore-inferred-ret-type --gconly --movinggc --no-ignoreipa --enable-ea", - "mpl2mpl": "--O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal", - "mplcg": "--O2 --quiet --no-pie --verbose-asm --gen-c-macro-def --gconly --movinggc --maplelinker --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/arch/arm64/duplicateFunc.s --fPIC" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Shell( - "mv ${APP}.mpl serial_${APP}.mpl;" - "mv ${APP}.VtableImpl.mpl serial_${APP}.VtableImpl.mpl;" - "mv ${APP}.VtableImpl.s serial_${APP}.VtableImpl.s" - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/bin_HIR2MPL/maple", - run=["hir2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "hir2mpl": "--np 4", - "me": "--O2 --quiet --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --threads=4 --gconly --movinggc --no-ignoreipa --enable-ea", - "mpl2mpl": "--O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal", - "mplcg": "--O2 --quiet --no-pie --verbose-asm --gen-c-macro-def --gconly --movinggc --maplelinker --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/arch/arm64/duplicateFunc.s --fPIC" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Shell( - "mv ${APP}.mpl parallel_${APP}.mpl;" - "mv ${APP}.VtableImpl.mpl parallel_${APP}.VtableImpl.mpl;" - "mv ${APP}.VtableImpl.s parallel_${APP}.VtableImpl.s" - ) - ], - "check": [ - Shell( - "diff serial_${APP}.mpl parallel_${APP}.mpl" - ), - Shell( - "diff serial_${APP}.VtableImpl.mpl parallel_${APP}.VtableImpl.mpl" - ), - Shell( - "diff serial_${APP}.VtableImpl.s parallel_${APP}.VtableImpl.s" - ) - ] -} diff --git a/testsuite/driver/src/mode/HIR2MPL_DEXO0.py b/testsuite/driver/src/mode/HIR2MPL_DEXO0.py deleted file mode 100644 index e2e47b7b83..0000000000 --- a/testsuite/driver/src/mode/HIR2MPL_DEXO0.py +++ /dev/null @@ -1,65 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -HIR2MPL_DEXO0 = { - "compile": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java","${EXTRA_JAVA_FILE}"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/bin_HIR2MPL/maple", - run=["hir2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "hir2mpl": "-mplt=${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_DEXO0/libcore-all.mplt", - "me": "--quiet --gconly", - "mpl2mpl": "--quiet --regnativefunc --maplelinker --maplelinker-nolocal --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --gen-pgo-report --gconly", - "mplcg": "--quiet --no-pie --fPIC --verbose-asm --maplelinker --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/asm/duplicateFunc.s --gsrc --gconly" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Linker( - lib="host-x86_64-HIR2MPL_DEXO0", - model="arm64", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_DEXO0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - xbootclasspath="libcore-all.so", - garbage_collection_kind="GC", - infile="${APP}.so", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ) - ] -} diff --git a/testsuite/driver/src/mode/HIR2MPL_DEXO0_NATIVE.py b/testsuite/driver/src/mode/HIR2MPL_DEXO0_NATIVE.py deleted file mode 100644 index 1b44c5e94a..0000000000 --- a/testsuite/driver/src/mode/HIR2MPL_DEXO0_NATIVE.py +++ /dev/null @@ -1,76 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -HIR2MPL_DEXO0_NATIVE = { - "compile": [ - NativeCompile( - mpldep=[ - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_DEXO0", - "${OUT_ROOT}/target/product/public/lib/libnativehelper/include" - ], - infile="${NATIVE_SRC}", - model="arm64" - ), - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java","${EXTRA_JAVA_FILE}"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/bin_HIR2MPL/maple", - run=["hir2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "hir2mpl": "-mplt=${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_DEXO0/libcore-all.mplt", - "me": "--quiet --gconly", - "mpl2mpl": "--quiet --regnativefunc --maplelinker --maplelinker-nolocal --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --gen-pgo-report --gconly", - "mplcg": "--quiet --no-pie --fPIC --verbose-asm --maplelinker --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/asm/duplicateFunc.s --gsrc --gconly" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Linker( - lib="host-x86_64-HIR2MPL_DEXO0", - model="arm64", - infile="${APP}", - ) - ], - "run": [ - Mplsh( - env={ - "JNI_TEST": "true" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "./", - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_DEXO0" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="GC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ) - ] -} diff --git a/testsuite/driver/src/mode/HIR2MPL_DEXO2.py b/testsuite/driver/src/mode/HIR2MPL_DEXO2.py deleted file mode 100644 index cf0106ccde..0000000000 --- a/testsuite/driver/src/mode/HIR2MPL_DEXO2.py +++ /dev/null @@ -1,66 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -HIR2MPL_DEXO2 = { - "compile": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java","${EXTRA_JAVA_FILE}"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/bin_HIR2MPL/maple", - run=["hir2mpl", "mplipa", "me", "mpl2mpl", "mplcg"], - option={ - "hir2mpl": "-mplt=${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_DEXO2/libcore-all.mplt", - "mplipa": "--effectipa --quiet", - "me": "--O2 --quiet --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea --gconly", - "mpl2mpl": "--O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --gen-pgo-report --gconly", - "mplcg": "--O2 --quiet --no-pie --verbose-asm --fPIC --gen-c-macro-def --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/asm/duplicateFunc.s --maplelinker --gsrc --gconly" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Linker( - lib="host-x86_64-HIR2MPL_DEXO2", - model="arm64", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_DEXO2", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="GC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ) - ] -} diff --git a/testsuite/driver/src/mode/HIR2MPL_DEXO2_JCK.py b/testsuite/driver/src/mode/HIR2MPL_DEXO2_JCK.py deleted file mode 100644 index 08a0894b40..0000000000 --- a/testsuite/driver/src/mode/HIR2MPL_DEXO2_JCK.py +++ /dev/null @@ -1,67 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -HIR2MPL_DEXO2_JCK = { - "compile": [ - Jar2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/framework_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/services_intermediates/classes.jar" - ], - infile="${APP}.jar" - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/bin_HIR2MPL/maple", - run=["hir2mpl", "mplipa", "me", "mpl2mpl", "mplcg"], - option={ - "hir2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_DEXO2/libcore-all.mplt", - "mplipa": "--effectipa --quiet", - "me": "--O2 --quiet --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea --threads=2 --gconly", - "mpl2mpl": "--O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --inlineCache=1 --gen-pgo-report --gconly", - "mplcg": "--O2 --quiet --no-pie --verbose-asm --fPIC --gen-c-macro-def --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/asm/duplicateFunc.s --maplelinker --gsrc --gconly" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Linker( - lib="host-x86_64-HIR2MPL_DEXO2", - model="arm64", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_DEXO2", - "../../lib", - ".", - "${OUT_ROOT}/target/product/public/lib" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="GC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - main="${MAIN}", - args="${ARGS}", - return_value_list=[95] - ) - ] -} diff --git a/testsuite/driver/src/mode/HIR2MPL_DEXO2_JTREG.py b/testsuite/driver/src/mode/HIR2MPL_DEXO2_JTREG.py deleted file mode 100644 index 488c3d3064..0000000000 --- a/testsuite/driver/src/mode/HIR2MPL_DEXO2_JTREG.py +++ /dev/null @@ -1,65 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -HIR2MPL_DEXO2_JTREG = { - "compile": [ - Jar2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/framework_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/services_intermediates/classes.jar" - ], - infile="${APP}.jar" - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/bin_HIR2MPL/maple", - run=["hir2mpl", "mplipa", "me", "mpl2mpl", "mplcg"], - option={ - "hir2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_DEXO2/libcore-all.mplt", - "mplipa": "--effectipa --quiet", - "me": "--O2 --quiet --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea --threads=2 --gconly", - "mpl2mpl": "--O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --inlineCache=1 --gen-pgo-report --gconly", - "mplcg": "--O2 --quiet --no-pie --verbose-asm --fPIC --gen-c-macro-def --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/asm/duplicateFunc.s --maplelinker --gsrc --gconly" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Linker( - lib="host-x86_64-HIR2MPL_DEXO2", - model="arm64", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_DEXO2", - "." - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="GC", - xbootclasspath="libcore-all.so", - infile="${CLASSPATH}", - main="${MAIN}", - args="${ARGS}", - return_value_list=[0, 95] - ) - ] -} diff --git a/testsuite/driver/src/mode/HIR2MPL_DEXO2_NATIVE.py b/testsuite/driver/src/mode/HIR2MPL_DEXO2_NATIVE.py deleted file mode 100644 index 7728470140..0000000000 --- a/testsuite/driver/src/mode/HIR2MPL_DEXO2_NATIVE.py +++ /dev/null @@ -1,77 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -HIR2MPL_DEXO2_NATIVE = { - "compile": [ - NativeCompile( - mpldep=[ - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_DEXO2", - "${OUT_ROOT}/target/product/public/lib/libnativehelper/include" - ], - infile="${NATIVE_SRC}", - model="arm64" - ), - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java","${EXTRA_JAVA_FILE}"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/bin_HIR2MPL/maple", - run=["hir2mpl", "mplipa", "me", "mpl2mpl", "mplcg"], - option={ - "hir2mpl": "-mplt=${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_DEXO2/libcore-all.mplt", - "mplipa": "--effectipa --quiet", - "me": "--O2 --quiet --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea --gconly", - "mpl2mpl": "--O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --gen-pgo-report --gconly", - "mplcg": "--O2 --quiet --no-pie --verbose-asm --fPIC --gen-c-macro-def --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/asm/duplicateFunc.s --maplelinker --gsrc --gconly" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Linker( - lib="host-x86_64-HIR2MPL_DEXO2", - model="arm64", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - env={ - "JNI_TEST": "true" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "./", - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_DEXO2" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="GC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ) - ] -} diff --git a/testsuite/driver/src/mode/HIR2MPL_DEXO2_RC.py b/testsuite/driver/src/mode/HIR2MPL_DEXO2_RC.py deleted file mode 100644 index 725ea71a7c..0000000000 --- a/testsuite/driver/src/mode/HIR2MPL_DEXO2_RC.py +++ /dev/null @@ -1,79 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -HIR2MPL_DEXO2_RC = { - "compile": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/bin_HIR2MPL/maple", - run=["hir2mpl", "mplipa", "me", "mpl2mpl", "mplcg"], - option={ - "hir2mpl": "-rc -mplt=${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_DEXO2_RC/libcore-all.mplt", - "mplipa": "--effectipa --quiet", - "me": "--O2 --quiet --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea", - "mpl2mpl": "--O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal --dump-muid --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --emitVtableImpl", - "mplcg": "--O2 --quiet --no-pie --verbose-asm --fPIC --gen-c-macro-def --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/asm/duplicateFunc.s --maplelinker --gsrc --nativeopt --replaceasm" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Linker( - lib="host-x86_64-HIR2MPL_DEXO2_RC", - model="arm64", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - env={ - "MAPLE_REPORT_RC_LEAK": "1", - "PATTERN_FROM_BACKUP_TRACING": "1" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_DEXO2_RC", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="cycle.log" - ), - CheckRegContain( - reg="ExpectResult", - file="cycle.log" - ), - CheckRegContain( - reg="Total Leak Count 0", - file="cycle.log" - ), - CheckRegContain( - choice="num", - reg="ExpectResult", - file="cycle.log" - ) - ] -} diff --git a/testsuite/driver/src/mode/HIR2MPL_DEXO2_RC_COMMON.py b/testsuite/driver/src/mode/HIR2MPL_DEXO2_RC_COMMON.py deleted file mode 100644 index c43c52d24e..0000000000 --- a/testsuite/driver/src/mode/HIR2MPL_DEXO2_RC_COMMON.py +++ /dev/null @@ -1,116 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -HIR2MPL_DEXO2_RC_COMMON = { - "compile": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java","${EXTRA_JAVA_FILE}"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/bin_HIR2MPL/maple", - run=["hir2mpl", "mplipa", "me", "mpl2mpl", "mplcg"], - option={ - "hir2mpl": "-rc -mplt=${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_DEXO2_RC/libcore-all.mplt", - "mplipa": "--effectipa --quiet", - "me": "--O2 --quiet --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea", - "mpl2mpl": "--O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal --dump-muid --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --emitVtableImpl", - "mplcg": "--O2 --quiet --no-pie --verbose-asm --fPIC --gen-c-macro-def --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/asm/duplicateFunc.s --maplelinker --gsrc --nativeopt --replaceasm" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Linker( - lib="host-x86_64-HIR2MPL_DEXO2_RC", - model="arm64", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_DEXO2_RC", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Mplsh( - env={ - "MAPLE_REPORT_RC_LEAK": "1" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_DEXO2_RC", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="leak.log" - ), - CheckRegContain( - reg="Total none-cycle root objects 0", - file="leak.log" - ), - Mplsh( - env={ - "MAPLE_VERIFY_RC": "1", - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_DEXO2_RC", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - infile="${APP}.so", - xbootclasspath="libcore-all.so", - redirection="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential early release", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential leak", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects weak rc are wrong", - file="rcverify.log" - ) - ] -} diff --git a/testsuite/driver/src/mode/HIR2MPL_DEXO2_RC_NATIVE.py b/testsuite/driver/src/mode/HIR2MPL_DEXO2_RC_NATIVE.py deleted file mode 100644 index 6a2f7f22fe..0000000000 --- a/testsuite/driver/src/mode/HIR2MPL_DEXO2_RC_NATIVE.py +++ /dev/null @@ -1,129 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -HIR2MPL_DEXO2_RC_NATIVE = { - "compile": [ - NativeCompile( - mpldep=[ - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_DEXO2_RC", - "${OUT_ROOT}/target/product/public/lib/libnativehelper/include" - ], - infile="${NATIVE_SRC}", - model="arm64" - ), - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java","${EXTRA_JAVA_FILE}"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/bin_HIR2MPL/maple", - run=["hir2mpl", "mplipa", "me", "mpl2mpl", "mplcg"], - option={ - "hir2mpl": "--dump-comment --dump-LOC --rc --mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_DEXO2_RC/libcore-all.mplt", - "mplipa": "--effectipa --quiet", - "me": "--O2 --quiet --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea", - "mpl2mpl": "--O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal --dump-muid --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --emitVtableImpl", - "mplcg": "--O2 --quiet --no-pie --verbose-asm --fPIC --gen-c-macro-def --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/asm/duplicateFunc.s --maplelinker --gsrc --nativeopt --replaceasm" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Linker( - lib="host-x86_64-HIR2MPL_DEXO2_RC", - model="arm64", - infile="${APP}", - ) - ], - "run": [ - Mplsh( - env={ - "JNI_TEST": "true" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "./", - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_DEXO2_RC" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Mplsh( - env={ - "MAPLE_REPORT_RC_LEAK": "1", - "JNI_TEST": "true" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "./", - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_DEXO2_RC" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="leak.log" - ), - CheckRegContain( - reg="Total none-cycle root objects 0", - file="leak.log" - ), - Mplsh( - env={ - "MAPLE_VERIFY_RC": "1", - "JNI_TEST": "true" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "./", - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_DEXO2_RC" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - infile="${APP}.so", - xbootclasspath="libcore-all.so", - redirection="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential early release", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential leak", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects weak rc are wrong", - file="rcverify.log" - ) - ] -} diff --git a/testsuite/driver/src/mode/HIR2MPL_IFILE.py b/testsuite/driver/src/mode/HIR2MPL_IFILE.py deleted file mode 100644 index 488d88f060..0000000000 --- a/testsuite/driver/src/mode/HIR2MPL_IFILE.py +++ /dev/null @@ -1,60 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -HIR2MPL_IFILE = { - "compile": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java","${EXTRA_JAVA_FILE}"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/bin_HIR2MPL_IFILE/maple", - run=["hir2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "hir2mpl": "-mplt=${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_IFILE/libcore-all.mplt", - "me": "--gconly --O2 --quiet --threads=4 --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea", - "mpl2mpl": "--gconly --O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal --dump-muid --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --emitVtableImpl", - "mplcg": "--gconly --O2 --quiet --threads=4 --no-pie --verbose-asm --gen-c-macro-def --maplelinker --duplicate_asm_list=${OUT_ROOT}/target/product/maple_arm64-clang-release/lib/codetricks/arch/arm64/duplicateFunc.s --nativeopt --fPIC --filetype=obj --with-ra-linear-scan --no-proepilogue --no-prelsra --no-const-fold" - }, - global_option="--save-temps --ifile --aot", - infile="${APP}.dex" - ) - ], - "run": [ - Mplsh( - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_IFILE", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="GC", - xbootclasspath="libcore-all.ohex", - infile="${APP}.ohex", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ) - ] -} diff --git a/testsuite/driver/src/mode/HIR2MPL_IFILE_NATIVE.py b/testsuite/driver/src/mode/HIR2MPL_IFILE_NATIVE.py deleted file mode 100644 index d923a4efc3..0000000000 --- a/testsuite/driver/src/mode/HIR2MPL_IFILE_NATIVE.py +++ /dev/null @@ -1,71 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -HIR2MPL_IFILE_NATIVE = { - "compile": [ - NativeCompile( - mpldep=[ - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_IFILE", - "${OUT_ROOT}/target/product/public/lib/libnativehelper/include" - ], - infile="${NATIVE_SRC}", - model="arm64_ifile" - ), - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java","${EXTRA_JAVA_FILE}"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/bin_HIR2MPL_IFILE/maple", - run=["hir2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "hir2mpl": "-mplt=${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_IFILE/libcore-all.mplt", - "me": "--gconly --O2 --quiet --threads=4 --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea", - "mpl2mpl": "--gconly --O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal --dump-muid --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --emitVtableImpl", - "mplcg": "--gconly --O2 --quiet --threads=4 --no-pie --verbose-asm --gen-c-macro-def --maplelinker --duplicate_asm_list=${OUT_ROOT}/target/product/maple_arm64-clang-release/lib/codetricks/arch/arm64/duplicateFunc.s --nativeopt --fPIC --filetype=obj --no-proepilogue --no-prelsra --no-const-fold" - }, - global_option="--save-temps --ifile --aot", - infile="${APP}.dex" - ) - ], - "run": [ - Mplsh( - env={ - "JNI_TEST": "true" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_IFILE", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="GC", - xbootclasspath="libcore-all.ohex", - infile="${APP}.ohex", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ) - ] -} diff --git a/testsuite/driver/src/mode/HIR2MPL_IFILE_O0.py b/testsuite/driver/src/mode/HIR2MPL_IFILE_O0.py deleted file mode 100644 index 14b7108082..0000000000 --- a/testsuite/driver/src/mode/HIR2MPL_IFILE_O0.py +++ /dev/null @@ -1,60 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -HIR2MPL_IFILE_O0 = { - "compile": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java","${EXTRA_JAVA_FILE}"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/bin_HIR2MPL_IFILE_O0/maple", - run=["hir2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "hir2mpl": "-mplt=${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_IFILE_O0/libcore-all.mplt", - "me": "--gconly --quiet --enable-ea", - "mpl2mpl": "--quiet --regnativefunc --maplelinker --maplelinker-nolocal --dump-muid --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --emitVtableImpl --gconly", - "mplcg": "--quiet --no-pie --verbose-asm --gen-c-macro-def --maplelinker --duplicate_asm_list=${OUT_ROOT}/target/product/maple_arm64-clang-release/lib/codetricks/arch/arm64/duplicateFunc.s --nativeopt --fPIC --filetype=obj --no-proepilogue --no-prelsra --no-const-fold --gconly" - }, - global_option="--save-temps --ifile --aot", - infile="${APP}.dex" - ) - ], - "run": [ - Mplsh( - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_IFILE_O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="GC", - xbootclasspath="libcore-all.ohex", - infile="${APP}.ohex", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ) - ] -} diff --git a/testsuite/driver/src/mode/HIR2MPL_NATIVE_RC_IFILE.py b/testsuite/driver/src/mode/HIR2MPL_NATIVE_RC_IFILE.py deleted file mode 100644 index 420033c50a..0000000000 --- a/testsuite/driver/src/mode/HIR2MPL_NATIVE_RC_IFILE.py +++ /dev/null @@ -1,123 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -HIR2MPL_NATIVE_RC_IFILE = { - "compile": [ - NativeCompile( - mpldep=[ - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_RC_IFILE", - "${OUT_ROOT}/target/product/public/lib/libnativehelper/include" - ], - infile="${NATIVE_SRC}", - model="arm64_ifile" - ), - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java","${EXTRA_JAVA_FILE}"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/bin_HIR2MPL_RC_IFILE/maple", - run=["hir2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "hir2mpl": "--dump-comment --dump-LOC --rc --mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_RC_IFILE/libcore-all.mplt", - "me": "--O2 --quiet --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea", - "mpl2mpl": "--O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal --dump-muid --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --emitVtableImpl", - "mplcg": "--O2 --quiet --no-pie --verbose-asm --gen-c-macro-def --maplelinker --duplicate_asm_list=${OUT_ROOT}/target/product/maple_arm64-clang-release/lib/codetricks/arch/arm64/duplicateFunc.s --nativeopt --fPIC --filetype=obj --no-proepilogue --no-prelsra --no-const-fold" - }, - global_option="--save-temps --ifile --aot", - infile="${APP}.dex" - ) - ], - "run": [ - Mplsh( - env={ - "JNI_TEST": "true" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "./", - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_RC_IFILE" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.ohex", - infile="${APP}.ohex", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Mplsh( - env={ - "MAPLE_REPORT_RC_LEAK": "1", - "JNI_TEST": "true" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "./", - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_RC_IFILE" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.ohex", - infile="${APP}.ohex", - redirection="leak.log" - ), - CheckRegContain( - reg="Total none-cycle root objects 0", - file="leak.log" - ), - Mplsh( - env={ - "MAPLE_VERIFY_RC": "1", - "JNI_TEST": "true" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "./", - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_RC_IFILE" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - infile="${APP}.ohex", - xbootclasspath="libcore-all.ohex", - redirection="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential early release", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential leak", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects weak rc are wrong", - file="rcverify.log" - ) - ] -} diff --git a/testsuite/driver/src/mode/HIR2MPL_NATIVE_RC_IFILEEH.py b/testsuite/driver/src/mode/HIR2MPL_NATIVE_RC_IFILEEH.py deleted file mode 100644 index 679575e0bd..0000000000 --- a/testsuite/driver/src/mode/HIR2MPL_NATIVE_RC_IFILEEH.py +++ /dev/null @@ -1,71 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -HIR2MPL_NATIVE_RC_IFILEEH = { - "compile": [ - NativeCompile( - mpldep=[ - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_RC_IFILE", - "${OUT_ROOT}/target/product/public/lib/libnativehelper/include" - ], - infile="${NATIVE_SRC}", - model="arm64_ifile" - ), - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/bin_HIR2MPL_RC_IFILE/maple", - run=["hir2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "hir2mpl": "--dump-comment --dump-LOC --rc --mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_RC_IFILE/libcore-all.mplt", - "me": "--O2 --quiet --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea", - "mpl2mpl": "--O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal --dump-muid --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --emitVtableImpl", - "mplcg": "--O2 --quiet --no-pie --verbose-asm --gen-c-macro-def --maplelinker --duplicate_asm_list=${OUT_ROOT}/target/product/maple_arm64-clang-release/lib/codetricks/arch/arm64/duplicateFunc.s --nativeopt --fPIC --filetype=obj --no-proepilogue --no-prelsra --no-const-fold" - }, - global_option="--save-temps --ifile --aot", - infile="${APP}.dex" - ) - ], - "run": [ - Mplsh( - env={ - "JNI_TEST": "true" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "./", - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_RC_IFILE" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.ohex", - infile="${APP}.ohex", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ) - ] -} diff --git a/testsuite/driver/src/mode/HIR2MPL_PANDAO0.py b/testsuite/driver/src/mode/HIR2MPL_PANDAO0.py deleted file mode 100644 index 27c5a50bfe..0000000000 --- a/testsuite/driver/src/mode/HIR2MPL_PANDAO0.py +++ /dev/null @@ -1,70 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -HIR2MPL_PANDAO0 = { - "compile": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java", "${EXTRA_JAVA_FILE}"] - ), - Class2panda( - class2panda="${OUT_ROOT}/target/product/public/bin/c2p", - infile=".", - outfile="${APP}.bin" - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/bin_HIR2MPL/maple", - run=["hir2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "hir2mpl": "-mplt=${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_DEXO0/libcore-all.mplt", - "me": "--quiet --gconly", - "mpl2mpl": "--quiet --regnativefunc --maplelinker --maplelinker-nolocal --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --gen-pgo-report --gconly", - "mplcg": "--quiet --no-pie --fPIC --verbose-asm --maplelinker --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/asm/duplicateFunc.s --gsrc --gconly" - }, - global_option="--save-temps", - infile="${APP}.bin" - ), - Linker( - lib="host-x86_64-HIR2MPL_DEXO0", - model="arm64", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_DEXO0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - xbootclasspath="libcore-all.so", - garbage_collection_kind="GC", - infile="${APP}.so", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ) - ] -} diff --git a/testsuite/driver/src/mode/HIR2MPL_PANDAO0_NATIVE.py b/testsuite/driver/src/mode/HIR2MPL_PANDAO0_NATIVE.py deleted file mode 100644 index a6a16f9fe2..0000000000 --- a/testsuite/driver/src/mode/HIR2MPL_PANDAO0_NATIVE.py +++ /dev/null @@ -1,81 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -HIR2MPL_PANDAO0_NATIVE = { - "compile": [ - NativeCompile( - mpldep=[ - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_DEXO0", - "${OUT_ROOT}/target/product/public/lib/libnativehelper/include" - ], - infile="${NATIVE_SRC}", - model="arm64" - ), - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java","${EXTRA_JAVA_FILE}"] - ), - Class2panda( - class2panda="${OUT_ROOT}/target/product/public/bin/c2p", - infile=".", - outfile="${APP}.bin" - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/bin_HIR2MPL/maple", - run=["hir2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "hir2mpl": "-mplt=${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_DEXO0/libcore-all.mplt", - "me": "--quiet --gconly", - "mpl2mpl": "--quiet --regnativefunc --maplelinker --maplelinker-nolocal --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --gen-pgo-report --gconly", - "mplcg": "--quiet --no-pie --fPIC --verbose-asm --maplelinker --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/asm/duplicateFunc.s --gsrc --gconly" - }, - global_option="--save-temps", - infile="${APP}.bin" - ), - Linker( - lib="host-x86_64-HIR2MPL_DEXO0", - model="arm64", - infile="${APP}", - ) - ], - "run": [ - Mplsh( - env={ - "JNI_TEST": "true" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "./", - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_DEXO0" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="GC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ) - ] -} diff --git a/testsuite/driver/src/mode/HIR2MPL_PANDAO2.py b/testsuite/driver/src/mode/HIR2MPL_PANDAO2.py deleted file mode 100644 index 598468fd4b..0000000000 --- a/testsuite/driver/src/mode/HIR2MPL_PANDAO2.py +++ /dev/null @@ -1,71 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -HIR2MPL_PANDAO2 = { - "compile": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java", "${EXTRA_JAVA_FILE}"] - ), - Class2panda( - class2panda="${OUT_ROOT}/target/product/public/bin/c2p", - infile=".", - outfile="${APP}.bin" - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/bin_HIR2MPL/maple", - run=["hir2mpl", "mplipa", "me", "mpl2mpl", "mplcg"], - option={ - "hir2mpl": "-mplt=${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_DEXO2/libcore-all.mplt", - "mplipa": "--effectipa --quiet", - "me": "--O2 --quiet --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea --gconly", - "mpl2mpl": "--O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --gen-pgo-report --gconly", - "mplcg": "--O2 --quiet --no-pie --verbose-asm --fPIC --gen-c-macro-def --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/asm/duplicateFunc.s --maplelinker --gsrc --gconly" - }, - global_option="--save-temps", - infile="${APP}.bin" - ), - Linker( - lib="host-x86_64-HIR2MPL_DEXO2", - model="arm64", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_DEXO2", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="GC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ) - ] -} diff --git a/testsuite/driver/src/mode/HIR2MPL_PANDAO2_JCK.py b/testsuite/driver/src/mode/HIR2MPL_PANDAO2_JCK.py deleted file mode 100644 index 7db6156cc2..0000000000 --- a/testsuite/driver/src/mode/HIR2MPL_PANDAO2_JCK.py +++ /dev/null @@ -1,56 +0,0 @@ -from api import * - -HIR2MPL_PANDAO2_JCK = { - "compile": [ - Unzip( - file="${APP}.jar", - target_path="${APP}" - ), - Class2panda( - class2panda="${OUT_ROOT}/target/product/public/bin/c2p", - infile="${APP}", - outfile="${APP}.bin" - ), - Shell( - "rm -rf ${APP}" - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/bin_HIR2MPL/maple", - run=["hir2mpl", "mplipa", "me", "mpl2mpl", "mplcg"], - option={ - "hir2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_DEXO2/libcore-all.mplt", - "mplipa": "--effectipa --quiet", - "me": "--O2 --quiet --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea --threads=2 --gconly", - "mpl2mpl": "--O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --inlineCache=1 --gen-pgo-report --gconly", - "mplcg": "--O2 --quiet --no-pie --verbose-asm --fPIC --gen-c-macro-def --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/asm/duplicateFunc.s --maplelinker --gsrc --gconly" - }, - global_option="--save-temps", - infile="${APP}.bin" - ), - Linker( - lib="host-x86_64-HIR2MPL_DEXO2", - model="arm64", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_DEXO2", - "../../lib", - ".", - "${OUT_ROOT}/target/product/public/lib" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="GC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - main="${MAIN}", - args="${ARGS}", - return_value_list=[95] - ) - ] -} diff --git a/testsuite/driver/src/mode/HIR2MPL_PANDAO2_JTREG.py b/testsuite/driver/src/mode/HIR2MPL_PANDAO2_JTREG.py deleted file mode 100644 index 2f053d6f3e..0000000000 --- a/testsuite/driver/src/mode/HIR2MPL_PANDAO2_JTREG.py +++ /dev/null @@ -1,68 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -HIR2MPL_PANDAO2_JTREG = { - "compile": [ - Unzip( - file="${APP}.jar", - target_path="${APP}" - ), - Class2panda( - class2panda="${OUT_ROOT}/target/product/public/bin/c2p", - infile="${APP}", - outfile="${APP}.bin" - ), - Shell( - "rm -rf ${APP}" - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/bin_HIR2MPL/maple", - run=["hir2mpl", "mplipa", "me", "mpl2mpl", "mplcg"], - option={ - "hir2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_DEXO2/libcore-all.mplt", - "mplipa": "--effectipa --quiet", - "me": "--O2 --quiet --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea --threads=2 --gconly", - "mpl2mpl": "--O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --inlineCache=1 --gen-pgo-report --gconly", - "mplcg": "--O2 --quiet --no-pie --verbose-asm --fPIC --gen-c-macro-def --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/asm/duplicateFunc.s --maplelinker --gsrc --gconly" - }, - global_option="--save-temps", - infile="${APP}.bin" - ), - Linker( - lib="host-x86_64-HIR2MPL_DEXO2", - model="arm64", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_DEXO2", - "." - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="GC", - xbootclasspath="libcore-all.so", - infile="${CLASSPATH}", - main="${MAIN}", - args="${ARGS}", - return_value_list=[0, 95] - ) - ] -} diff --git a/testsuite/driver/src/mode/HIR2MPL_PANDAO2_NATIVE.py b/testsuite/driver/src/mode/HIR2MPL_PANDAO2_NATIVE.py deleted file mode 100644 index 77141aef90..0000000000 --- a/testsuite/driver/src/mode/HIR2MPL_PANDAO2_NATIVE.py +++ /dev/null @@ -1,82 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -HIR2MPL_PANDAO2_NATIVE = { - "compile": [ - NativeCompile( - mpldep=[ - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_DEXO2", - "${OUT_ROOT}/target/product/public/lib/libnativehelper/include" - ], - infile="${NATIVE_SRC}", - model="arm64" - ), - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java","${EXTRA_JAVA_FILE}"] - ), - Class2panda( - class2panda="${OUT_ROOT}/target/product/public/bin/c2p", - infile=".", - outfile="${APP}.bin" - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/bin_HIR2MPL/maple", - run=["hir2mpl", "mplipa", "me", "mpl2mpl", "mplcg"], - option={ - "hir2mpl": "-mplt=${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_DEXO2/libcore-all.mplt", - "mplipa": "--effectipa --quiet", - "me": "--O2 --quiet --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea --gconly", - "mpl2mpl": "--O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --gen-pgo-report --gconly", - "mplcg": "--O2 --quiet --no-pie --verbose-asm --fPIC --gen-c-macro-def --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/asm/duplicateFunc.s --maplelinker --gsrc --gconly" - }, - global_option="--save-temps", - infile="${APP}.bin" - ), - Linker( - lib="host-x86_64-HIR2MPL_DEXO2", - model="arm64", - infile="${APP}", - ) - ], - "run": [ - Mplsh( - env={ - "JNI_TEST": "true" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "./", - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_DEXO2" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="GC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ) - ] -} diff --git a/testsuite/driver/src/mode/HIR2MPL_RC_IFILE.py b/testsuite/driver/src/mode/HIR2MPL_RC_IFILE.py deleted file mode 100644 index e9a0d1d4a8..0000000000 --- a/testsuite/driver/src/mode/HIR2MPL_RC_IFILE.py +++ /dev/null @@ -1,73 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -HIR2MPL_RC_IFILE = { - "compile": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/bin_HIR2MPL_RC_IFILE/maple", - run=["hir2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "hir2mpl": "-rc -mplt=${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_RC_IFILE/libcore-all.mplt", - "me": "--O2 --quiet --threads=4 --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea", - "mpl2mpl": "--O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal --dump-muid --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --emitVtableImpl", - "mplcg": "--O2 --quiet --threads=4 --no-pie --verbose-asm --gen-c-macro-def --maplelinker --duplicate_asm_list=${OUT_ROOT}/target/product/maple_arm64-clang-release/lib/codetricks/arch/arm64/duplicateFunc.s --nativeopt --fPIC --filetype=obj --no-proepilogue --no-prelsra --no-const-fold" - }, - global_option="--save-temps --ifile --aot", - infile="${APP}.dex" - ) - ], - "run": [ - Mplsh( - env={ - "MAPLE_REPORT_RC_LEAK": "1", - "PATTERN_FROM_BACKUP_TRACING": "1" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_RC_IFILE", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.ohex", - infile="${APP}.ohex", - redirection="cycle.log" - ), - CheckRegContain( - reg="ExpectResult", - file="cycle.log" - ), - CheckRegContain( - reg="Total Leak Count 0", - file="cycle.log" - ), - CheckRegContain( - choice="num", - reg="ExpectResult", - file="cycle.log" - ) - ] -} diff --git a/testsuite/driver/src/mode/HIR2MPL_RC_IFILE_O0.py b/testsuite/driver/src/mode/HIR2MPL_RC_IFILE_O0.py deleted file mode 100644 index b1a0b366ef..0000000000 --- a/testsuite/driver/src/mode/HIR2MPL_RC_IFILE_O0.py +++ /dev/null @@ -1,72 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# -from api import * - -HIR2MPL_RC_IFILE_O0 = { - "compile": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/bin_HIR2MPL_RC_IFILE_O0/maple", - run=["hir2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "hir2mpl": "-rc -mplt=${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_RC_IFILE_O0/libcore-all.mplt", - "me": "--quiet --enable-ea --aot", - "mpl2mpl": "--quiet --regnativefunc --maplelinker --maplelinker-nolocal --dump-muid --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --emitVtableImpl", - "mplcg": "--quiet --no-pie --verbose-asm --gen-c-macro-def --maplelinker --duplicate_asm_list=${OUT_ROOT}/target/product/maple_arm64-clang-release/lib/codetricks/arch/arm64/duplicateFunc.s --nativeopt --fPIC --filetype=obj --no-proepilogue --no-prelsra --no-const-fold" - }, - global_option="--save-temps --ifile --aot", - infile="${APP}.dex" - ) - ], - "run": [ - Mplsh( - env={ - "MAPLE_REPORT_RC_LEAK": "1", - "PATTERN_FROM_BACKUP_TRACING": "1" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_RC_IFILE_O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.ohex", - infile="${APP}.ohex", - redirection="cycle.log" - ), - CheckRegContain( - reg="ExpectResult", - file="cycle.log" - ), - CheckRegContain( - reg="Total Leak Count 0", - file="cycle.log" - ), - CheckRegContain( - choice="num", - reg="ExpectResult", - file="cycle.log" - ) - ] -} diff --git a/testsuite/driver/src/mode/IFILE.py b/testsuite/driver/src/mode/IFILE.py deleted file mode 100644 index b5c8965bff..0000000000 --- a/testsuite/driver/src/mode/IFILE.py +++ /dev/null @@ -1,111 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -IFILE = { - "compile": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java","${EXTRA_JAVA_FILE}"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/bin_IFILE/maple", - run=["dex2mpl", "mplipa", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-IFILE/libcore-all.mplt -dexcatch -inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/to_inline.list -j=16 -j100 -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list -refine-catch -staticstringcheck", - "mplipa": "--effectipa --quiet", - "me": "--O2 --threads=4 --quiet --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea", - "mpl2mpl": "--O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal --dump-muid --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --emitVtableImpl", - "mplcg": "--O2 --threads=4 --quiet --no-pie --verbose-asm --gen-c-macro-def --maplelinker --duplicate_asm_list=${OUT_ROOT}/target/product/maple_arm64-clang-release/lib/codetricks/arch/arm64/duplicateFunc.s --nativeopt --fPIC --filetype=obj --no-proepilogue --no-prelsra --no-const-fold" - }, - global_option="--save-temps --ifile --aot", - infile="${APP}.dex" - ) - ], - "run": [ - Mplsh( - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-IFILE", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.ohex", - infile="${APP}.ohex", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Mplsh( - env={ - "MAPLE_REPORT_RC_LEAK": "1" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-IFILE", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.ohex", - infile="${APP}.ohex", - redirection="leak.log" - ), - CheckRegContain( - reg="Total none-cycle root objects 0", - file="leak.log" - ), - Mplsh( - env={ - "MAPLE_VERIFY_RC": "1", - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-IFILE", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - infile="${APP}.ohex", - xbootclasspath="libcore-all.ohex", - redirection="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential early release", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential leak", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects weak rc are wrong", - file="rcverify.log" - ) - ] -} diff --git a/testsuite/driver/src/mode/IFILENATIVE.py b/testsuite/driver/src/mode/IFILENATIVE.py deleted file mode 100644 index d492fb938e..0000000000 --- a/testsuite/driver/src/mode/IFILENATIVE.py +++ /dev/null @@ -1,124 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -IFILENATIVE = { - "compile": [ - NativeCompile( - mpldep=[ - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-IFILE", - "${OUT_ROOT}/target/product/public/lib/libnativehelper/include" - ], - infile="${NATIVE_SRC}", - model="arm64_ifile" - ), - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java","${EXTRA_JAVA_FILE}"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/bin_IFILE/maple", - run=["dex2mpl", "mplipa", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-IFILE/libcore-all.mplt -dexcatch -inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/to_inline.list -j=16 -j100 -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list -refine-catch -staticstringcheck", - "mplipa": "--effectipa --quiet", - "me": "--O2 --quiet --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea", - "mpl2mpl": "--O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal --dump-muid --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --emitVtableImpl", - "mplcg": "--O2 --quiet --no-pie --verbose-asm --gen-c-macro-def --maplelinker --duplicate_asm_list=${OUT_ROOT}/target/product/maple_arm64-clang-release/lib/codetricks/arch/arm64/duplicateFunc.s --nativeopt --fPIC --filetype=obj --no-proepilogue --no-prelsra --no-const-fold" - }, - global_option="--save-temps --ifile --aot", - infile="${APP}.dex" - ) - ], - "run": [ - Mplsh( - env={ - "JNI_TEST": "true" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "./", - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-IFILE" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.ohex", - infile="${APP}.ohex", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Mplsh( - env={ - "MAPLE_REPORT_RC_LEAK": "1", - "JNI_TEST": "true" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "./", - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-IFILE" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.ohex", - infile="${APP}.ohex", - redirection="leak.log" - ), - CheckRegContain( - reg="Total none-cycle root objects 0", - file="leak.log" - ), - Mplsh( - env={ - "MAPLE_VERIFY_RC": "1", - "JNI_TEST": "true" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "./", - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-IFILE" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - infile="${APP}.ohex", - xbootclasspath="libcore-all.ohex", - redirection="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential early release", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential leak", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects weak rc are wrong", - file="rcverify.log" - ) - ] -} diff --git a/testsuite/driver/src/mode/IFILENATIVEEH.py b/testsuite/driver/src/mode/IFILENATIVEEH.py deleted file mode 100644 index 9b4f97aa46..0000000000 --- a/testsuite/driver/src/mode/IFILENATIVEEH.py +++ /dev/null @@ -1,72 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -IFILENATIVEEH = { - "compile": [ - NativeCompile( - mpldep=[ - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-IFILE", - "${OUT_ROOT}/target/product/public/lib/libnativehelper/include" - ], - infile="${NATIVE_SRC}", - model="arm64_ifile" - ), - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/bin_IFILE/maple", - run=["dex2mpl", "mplipa", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-IFILE/libcore-all.mplt -dexcatch -inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/to_inline.list -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list -refine-catch -staticstringcheck", - "mplipa": "--effectipa --quiet", - "me": "--O2 --quiet --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea", - "mpl2mpl": "--O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal --dump-muid --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --emitVtableImpl", - "mplcg": "--O2 --quiet --no-pie --verbose-asm --gen-c-macro-def --maplelinker --duplicate_asm_list=${OUT_ROOT}/target/product/maple_arm64-clang-release/lib/codetricks/arch/arm64/duplicateFunc.s --nativeopt --fPIC --filetype=obj --no-proepilogue --no-prelsra --no-const-fold" - }, - global_option="--save-temps --ifile --aot", - infile="${APP}.dex" - ) - ], - "run": [ - Mplsh( - env={ - "JNI_TEST": "true" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "./", - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-IFILE" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.ohex", - infile="${APP}.ohex", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ) - ] -} diff --git a/testsuite/driver/src/mode/IR.py b/testsuite/driver/src/mode/IR.py deleted file mode 100644 index 3b2089b5d9..0000000000 --- a/testsuite/driver/src/mode/IR.py +++ /dev/null @@ -1,32 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -IR = { - "compile": [ - Irbuild( - irbuild="${OUT_ROOT}/target/product/maple_arm64/bin/irbuild", - infile="${APP}.mpl" - ), - Irbuild( - irbuild="${OUT_ROOT}/target/product/maple_arm64/bin/irbuild", - infile="${APP}.irb.mpl" - ), - CheckFileEqual( - file1="${APP}.irb.mpl", - file2="${APP}.irb.irb.mpl" - ) - ] -} \ No newline at end of file diff --git a/testsuite/driver/src/mode/JASMJBC2MPL_LIBCORE.py b/testsuite/driver/src/mode/JASMJBC2MPL_LIBCORE.py deleted file mode 100644 index 9ac744fd9f..0000000000 --- a/testsuite/driver/src/mode/JASMJBC2MPL_LIBCORE.py +++ /dev/null @@ -1,130 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -JASMJBC2MPL_LIBCORE = { - "compile": [ - Shell( - "java -jar ${OUT_ROOT}/target/product/public/bin/asmtools.jar jasm *.jasm" - ), - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java"] - ), - Shell( - "jar -cvfe Main.jar Main *.class" - ), - Jar2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/framework_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/services_intermediates/classes.jar" - ], - infile="Main.jar" - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/bin_JBC2MPL_LIBCORE/maple", - run=["jbc2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "jbc2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-JBC2MPL_LIBCORE/libcore-all.mplt -use-string-factory", - "me": "--quiet", - "mpl2mpl": "--quiet --regnativefunc --maplelinker", - "mplcg": "--quiet --no-pie --verbose-asm --maplelinker --fPIC" - }, - global_option="--save-temps --genVtableImpl", - infile="${APP}.jar" - ), - Linker( - lib="host-x86_64-JASMJBC2MPL_LIBCORE", - model="arm64", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-JASMJBC2MPL_LIBCORE", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Mplsh( - env={ - "MAPLE_REPORT_RC_LEAK": "1" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-JASMJBC2MPL_LIBCORE", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="leak.log" - ), - CheckRegContain( - reg="Total none-cycle root objects 0", - file="leak.log" - ), - Mplsh( - env={ - "MAPLE_VERIFY_RC": "1", - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-JASMJBC2MPL_LIBCORE", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential early release", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential leak", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects weak rc are wrong", - file="rcverify.log" - ) - ] -} \ No newline at end of file diff --git a/testsuite/driver/src/mode/JASMO0.py b/testsuite/driver/src/mode/JASMO0.py deleted file mode 100644 index ce99eda667..0000000000 --- a/testsuite/driver/src/mode/JASMO0.py +++ /dev/null @@ -1,135 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -JASMO0 = { - "compile": [ - Shell( - "java -jar ${OUT_ROOT}/target/product/public/bin/asmtools.jar jasm *.jasm" - ), - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java"] - ), - Shell( - "jar -cvfe Main.jar Main *.class" - ), - Jar2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/framework_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/services_intermediates/classes.jar" - ], - infile="Main.jar" - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/maple", - run=["dex2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O0/libcore-all.mplt -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list", - "me": "", - "mpl2mpl": "--quiet --regnativefunc --maplelinker --FastNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/fastNative.list --CriticalNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/criticalNative.list --nativefunc-property-list=${OUT_ROOT}/target/product/public/lib/codetricks/native_binding/native_func_property.list", - "mplcg": "--quiet --no-pie --verbose-asm --maplelinker --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/arch/arm64/duplicateFunc.s --fPIC" - }, - global_option="--save-temps --genVtableImpl", - infile="${APP}.dex" - ), - Linker( - lib="host-x86_64-O0", - model="arm64", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "MAPLE_REPORT_RC_LEAK": "1" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="leak.log" - ), - CheckRegContain( - reg="Total none-cycle root objects 0", - file="leak.log" - ), - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "MAPLE_VERIFY_RC": "1", - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential early release", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential leak", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects weak rc are wrong", - file="rcverify.log" - ) - ] -} diff --git a/testsuite/driver/src/mode/JASMO2.py b/testsuite/driver/src/mode/JASMO2.py deleted file mode 100644 index b739b5a356..0000000000 --- a/testsuite/driver/src/mode/JASMO2.py +++ /dev/null @@ -1,131 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -JASMO2 = { - "compile": [ - Shell( - "java -jar ${OUT_ROOT}/target/product/public/bin/asmtools.jar jasm *.jasm" - ), - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java"] - ), - Shell( - "jar -cvfe Main.jar Main *.class" - ), - Jar2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/framework_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/services_intermediates/classes.jar" - ], - infile="Main.jar" - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/maple", - run=["dex2mpl", "mplipa", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O2/libcore-all.mplt -dexcatch -inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/to_inline.list -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list -refine-catch -staticstringcheck", - "mplipa": "--effectipa --quiet", - "me": "--O2 --quiet --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea", - "mpl2mpl": "--O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal --dump-muid --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --emitVtableImpl", - "mplcg": "--O2 --quiet --no-pie --verbose-asm --fPIC --gen-c-macro-def --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/asm/duplicateFunc.s --maplelinker --gsrc --nativeopt --replaceasm" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Linker( - lib="host-x86_64-O2", - model="arm64", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O2", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Mplsh( - env={ - "MAPLE_REPORT_RC_LEAK": "1" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O2", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="leak.log" - ), - CheckRegContain( - reg="Total none-cycle root objects 0", - file="leak.log" - ), - Mplsh( - env={ - "MAPLE_VERIFY_RC": "1", - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O2", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential early release", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential leak", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects weak rc are wrong", - file="rcverify.log" - ) - ] -} diff --git a/testsuite/driver/src/mode/JASM_O0.py b/testsuite/driver/src/mode/JASM_O0.py deleted file mode 100644 index 8aaf58a66a..0000000000 --- a/testsuite/driver/src/mode/JASM_O0.py +++ /dev/null @@ -1,115 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -JASM_O0 = { - "compile": [ - Jasm2jar( - file=["${APP}.jasm", "../lib/Printer.jasm"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/bin_OPS/maple", - run=["jbc2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "jbc2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-OPS_O0/libcore-all.mplt -use-string-factory", - "me": "--quiet", - "mpl2mpl": "--quiet --regnativefunc --maplelinker", - "mplcg": "--quiet --no-pie --verbose-asm --maplelinker --fPIC" - }, - global_option="--save-temps --genVtableImpl", - infile="${APP}.jar" - ), - Linker( - lib="host-x86_64-OPS_O0", - model="arm64", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-OPS_O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "MAPLE_REPORT_RC_LEAK": "1" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-OPS_O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="leak.log" - ), - CheckRegContain( - reg="Total none-cycle root objects 0", - file="leak.log" - ), - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "MAPLE_VERIFY_RC": "1" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-OPS_O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential early release", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential leak", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects weak rc are wrong", - file="rcverify.log" - ) - ] -} \ No newline at end of file diff --git a/testsuite/driver/src/mode/JASM_O2.py b/testsuite/driver/src/mode/JASM_O2.py deleted file mode 100644 index 7e2eeee50a..0000000000 --- a/testsuite/driver/src/mode/JASM_O2.py +++ /dev/null @@ -1,110 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -JASM_O2 = { - "compile": [ - Jasm2jar( - file=["${APP}.jasm", "../lib/Printer.jasm"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/bin_OPS/maple", - run=["jbc2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "jbc2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-OPS_O2/libcore-all.mplt -use-string-factory", - "me": "-O2 --quiet", - "mpl2mpl": "-O2 --quiet --regnativefunc --no-nativeopt --maplelinker", - "mplcg": "--quiet -O2 --no-pie --verbose-asm --maplelinker --fPIC" - }, - global_option="--save-temps --genVtableImpl", - infile="${APP}.jar" - ), - Linker( - lib="host-x86_64-OPS_O2", - model="arm64", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-OPS_O2", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Mplsh( - env={ - "MAPLE_REPORT_RC_LEAK": "1" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-OPS_O2", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="leak.log" - ), - CheckRegContain( - reg="Total none-cycle root objects 0", - file="leak.log" - ), - Mplsh( - env={ - "MAPLE_VERIFY_RC": "1", - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-OPS_O2", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential early release", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential leak", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects weak rc are wrong", - file="rcverify.log" - ) - ] -} \ No newline at end of file diff --git a/testsuite/driver/src/mode/JBC2MPL_LIBCORE.py b/testsuite/driver/src/mode/JBC2MPL_LIBCORE.py deleted file mode 100644 index fd3d428e0d..0000000000 --- a/testsuite/driver/src/mode/JBC2MPL_LIBCORE.py +++ /dev/null @@ -1,120 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -JBC2MPL_LIBCORE = { - "compile": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java","${EXTRA_JAVA_FILE}"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/bin_JBC2MPL_LIBCORE/maple", - run=["jbc2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "jbc2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-JBC2MPL_LIBCORE/libcore-all.mplt -use-string-factory", - "me": "--quiet", - "mpl2mpl": "--quiet --regnativefunc --maplelinker", - "mplcg": "--quiet --no-pie --verbose-asm --maplelinker --fPIC" - }, - global_option="--save-temps --genVtableImpl", - infile="${APP}.jar" - ), - Linker( - lib="host-x86_64-JBC2MPL_LIBCORE", - model="arm64", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-JBC2MPL_LIBCORE", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "MAPLE_REPORT_RC_LEAK": "1" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-JBC2MPL_LIBCORE", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="leak.log" - ), - CheckRegContain( - reg="Total none-cycle root objects 0", - file="leak.log" - ), - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "MAPLE_VERIFY_RC": "1" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-JBC2MPL_LIBCORE", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential early release", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential leak", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects weak rc are wrong", - file="rcverify.log" - ) - ] -} \ No newline at end of file diff --git a/testsuite/driver/src/mode/JBC2MPL_LIBCORENATIVE.py b/testsuite/driver/src/mode/JBC2MPL_LIBCORENATIVE.py deleted file mode 100644 index ac71634421..0000000000 --- a/testsuite/driver/src/mode/JBC2MPL_LIBCORENATIVE.py +++ /dev/null @@ -1,132 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -JBC2MPL_LIBCORENATIVE = { - "compile": [ - NativeCompile( - mpldep=[ - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-JBC2MPL_LIBCORE", - "${OUT_ROOT}/target/product/public/lib/libnativehelper/include" - ], - infile="${NATIVE_SRC}", - model="arm64" - ), - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java","${EXTRA_JAVA_FILE}"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/bin_JBC2MPL_LIBCORE/maple", - run=["jbc2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "jbc2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-JBC2MPL_LIBCORE/libcore-all.mplt -use-string-factory", - "me": "--quiet", - "mpl2mpl": "--quiet --regnativefunc --maplelinker", - "mplcg": "--quiet --no-pie --verbose-asm --maplelinker --fPIC" - }, - global_option="--save-temps --genVtableImpl", - infile="${APP}.jar" - ), - Linker( - lib="host-x86_64-JBC2MPL_LIBCORE", - model="arm64", - infile="${APP}", - - ) - ], - "run": [ - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "JNI_TEST": "true" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "./", - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-JBC2MPL_LIBCORE" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "MAPLE_REPORT_RC_LEAK": "1", - "JNI_TEST": "true" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "./", - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-JBC2MPL_LIBCORE" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="leak.log" - ), - CheckRegContain( - reg="Total none-cycle root objects 0", - file="leak.log" - ), - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "MAPLE_VERIFY_RC": "1", - "JNI_TEST": "true" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "./", - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-JBC2MPL_LIBCORE" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential early release", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential leak", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects weak rc are wrong", - file="rcverify.log" - ) - ] -} \ No newline at end of file diff --git a/testsuite/driver/src/mode/JBC2MPL_LIBCORERC.py b/testsuite/driver/src/mode/JBC2MPL_LIBCORERC.py deleted file mode 100644 index 99cbd80d1b..0000000000 --- a/testsuite/driver/src/mode/JBC2MPL_LIBCORERC.py +++ /dev/null @@ -1,79 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -JBC2MPL_LIBCORERC = { - "compile": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/bin_JBC2MPL_LIBCORE/maple", - run=["jbc2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "jbc2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-JBC2MPL_LIBCORE/libcore-all.mplt -use-string-factory", - "me": "--quiet", - "mpl2mpl": "--quiet --regnativefunc --maplelinker", - "mplcg": "--quiet --no-pie --verbose-asm --maplelinker --fPIC" - }, - global_option="--save-temps --genVtableImpl", - infile="${APP}.jar" - ), - Linker( - lib="host-x86_64-JBC2MPL_LIBCORE", - model="arm64", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "MAPLE_REPORT_RC_LEAK": "1", - "PATTERN_FROM_BACKUP_TRACING": "1" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-JBC2MPL_LIBCORE", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="cycle.log" - ), - CheckRegContain( - reg="ExpectResult", - file="cycle.log" - ), - CheckRegContain( - reg="Total Leak Count 0", - file="cycle.log" - ), - CheckRegContain( - choice="num", - reg="ExpectResult", - file="cycle.log" - ) - ] -} \ No newline at end of file diff --git a/testsuite/driver/src/mode/JBC_O0.py b/testsuite/driver/src/mode/JBC_O0.py deleted file mode 100644 index 7a9ba06036..0000000000 --- a/testsuite/driver/src/mode/JBC_O0.py +++ /dev/null @@ -1,120 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -JBC_O0 = { - "compile": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java","${EXTRA_JAVA_FILE}"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/bin_OPS/maple", - run=["jbc2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "jbc2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-OPS_O0/libcore-all.mplt -use-string-factory", - "me": "--quiet", - "mpl2mpl": "--quiet --regnativefunc --maplelinker", - "mplcg": "--quiet --no-pie --verbose-asm --maplelinker --fPIC" - }, - global_option="--save-temps --genVtableImpl", - infile="${APP}.jar" - ), - Linker( - lib="host-x86_64-OPS_O0", - model="arm64", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-OPS_O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "MAPLE_REPORT_RC_LEAK": "1" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-OPS_O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="leak.log" - ), - CheckRegContain( - reg="Total none-cycle root objects 0", - file="leak.log" - ), - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "MAPLE_VERIFY_RC": "1", - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-OPS_O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential early release", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential leak", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects weak rc are wrong", - file="rcverify.log" - ) - ] -} \ No newline at end of file diff --git a/testsuite/driver/src/mode/JBC_O2.py b/testsuite/driver/src/mode/JBC_O2.py deleted file mode 100644 index 22a70e961a..0000000000 --- a/testsuite/driver/src/mode/JBC_O2.py +++ /dev/null @@ -1,115 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -JBC_O2 = { - "compile": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java","${EXTRA_JAVA_FILE}"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/bin_OPS/maple", - run=["jbc2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "jbc2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-OPS_O2/libcore-all.mplt -use-string-factory", - "me": "-O2 --quiet", - "mpl2mpl": "-O2 --quiet --regnativefunc --no-nativeopt --maplelinker", - "mplcg": "--quiet -O2 --no-pie --verbose-asm --maplelinker --fPIC" - }, - global_option="--save-temps --genVtableImpl", - infile="${APP}.jar" - ), - Linker( - lib="host-x86_64-OPS_O2", - model="arm64", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-OPS_O2", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Mplsh( - env={ - "MAPLE_REPORT_RC_LEAK": "1" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-OPS_O2", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="leak.log" - ), - CheckRegContain( - reg="Total none-cycle root objects 0", - file="leak.log" - ), - Mplsh( - env={ - "MAPLE_VERIFY_RC": "1", - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-OPS_O2", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential early release", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential leak", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects weak rc are wrong", - file="rcverify.log" - ) - ] -} \ No newline at end of file diff --git a/testsuite/driver/src/mode/JCK_AOT.py b/testsuite/driver/src/mode/JCK_AOT.py deleted file mode 100644 index 11cc888bbe..0000000000 --- a/testsuite/driver/src/mode/JCK_AOT.py +++ /dev/null @@ -1,66 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -JCK_AOT = { - "compile": [ - Jar2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/framework_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/services_intermediates/classes.jar" - ], - infile="${APP}.jar" - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/bin_AOT/maple", - run=["dex2mpl", "mplipa", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-AOT/libcore-all.mplt -dexcatch -inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/to_inline.list -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list -refine-catch -staticstringcheck", - "mplipa": "--effectipa --quiet", - "me": "--O2 --quiet --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea", - "mpl2mpl": "--O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal --dump-muid --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --emitVtableImpl", - "mplcg": "--O2 --quiet --no-pie --verbose-asm --fPIC --gen-c-macro-def --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/asm/duplicateFunc.s --maplelinker --gsrc --nativeopt --replaceasm" - }, - global_option="--save-temps --aot", - infile="${APP}.dex" - ), - Linker( - lib="host-x86_64-AOT", - model="arm64", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-AOT", - "../../lib", - "." - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - main="${MAIN}", - args="${ARGS}", - return_value_list=[95] - ) - ] -} diff --git a/testsuite/driver/src/mode/JCK_DEOPT.py b/testsuite/driver/src/mode/JCK_DEOPT.py deleted file mode 100644 index 7d189362ac..0000000000 --- a/testsuite/driver/src/mode/JCK_DEOPT.py +++ /dev/null @@ -1,60 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -JCK_DEOPT = { - "compile": [ - Jar2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/framework_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/services_intermediates/classes.jar" - ], - infile="${APP}.jar" - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64-clang-release/bin/bin_HIR2MPL_IFILE/maple", - run=["hir2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "hir2mpl": "-mplt=${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_IFILE/libcore-all.mplt", - "me": "--gconly --O2 --quiet --threads=4 --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea", - "mpl2mpl": "--gconly --O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal --dump-muid --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --emitVtableImpl", - "mplcg": "--gconly --O2 --quiet --threads=4 --no-pie --verbose-asm --gen-c-macro-def --maplelinker --duplicate_asm_list=${OUT_ROOT}/target/product/maple_arm64-clang-release/lib/codetricks/arch/arm64/duplicateFunc.s --nativeopt --fPIC --filetype=obj --with-ra-linear-scan --no-ico --no-cfgo --no-prepeep --no-peep --no-ebo --no-storeloadopt --no-globalopt --no-schedule --no-proepilogue --no-prelsra --no-const-fold" - }, - global_option="--aot --deopt --ifile --save-temps", - infile="${APP}.dex" - ) - ], - "run": [ - Mplsh( - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_IFILE", - "../../lib", - "." - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="GC", - xbootclasspath="libcore-all.ohex", - infile="${APP}.ohex", - main="${MAIN}", - args="${ARGS}", - return_value_list=[95] - ) - ] -} diff --git a/testsuite/driver/src/mode/JCK_GCO2.py b/testsuite/driver/src/mode/JCK_GCO2.py deleted file mode 100644 index 7c8483b2c0..0000000000 --- a/testsuite/driver/src/mode/JCK_GCO2.py +++ /dev/null @@ -1,66 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -JCK_GCO2 = { - "compile": [ - Jar2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/framework_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/services_intermediates/classes.jar" - ], - infile="${APP}.jar" - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/maple", - run=["dex2mpl", "mplipa", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "-mplt=${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-GCO2/libcore-all.mplt -anti-proguard-auto -dexcatch -gen-stringfieldvalue -inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/to_inline.list -j100 -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list -refine-catch -staticstringcheck -checktool -check-incomplete -incomplete-whitelist=${OUT_ROOT}/target/product/public/lib/codetricks/compile/incomplete.list -incomplete-detail -opt-switch-disable -incomplete-whitelist-auto -gconly", - "mplipa": "--effectipa --quiet", - "me": "--O2 --quiet --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea --threads=2 --gconly", - "mpl2mpl": "--O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --inlineCache=1 --gen-pgo-report --gconly", - "mplcg": "--O2 --quiet --no-pie --verbose-asm --fPIC --gen-c-macro-def --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/asm/duplicateFunc.s --maplelinker --gsrc --gconly" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Linker( - lib="host-x86_64-GCO2", - model="arm64", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-GCO2", - "../../lib", - "." - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="GC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - main="${MAIN}", - args="${ARGS}", - return_value_list=[95] - ) - ] -} diff --git a/testsuite/driver/src/mode/JCK_GC_IFILE.py b/testsuite/driver/src/mode/JCK_GC_IFILE.py deleted file mode 100644 index aaf1533bf6..0000000000 --- a/testsuite/driver/src/mode/JCK_GC_IFILE.py +++ /dev/null @@ -1,61 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -JCK_GC_IFILE = { - "compile": [ - Jar2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/framework_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/services_intermediates/classes.jar" - ], - infile="${APP}.jar" - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/bin_IFILE/maple", - run=["dex2mpl", "mplipa", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-GC_IFILE/libcore-all.mplt -dexcatch -inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/to_inline.list -j=16 -j100 -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list -refine-catch -staticstringcheck -gconly", - "mplipa": "--effectipa --quiet", - "me": "--O2 --quiet --threads=4 --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea --gconly", - "mpl2mpl": "--O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal --dump-muid --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --emitVtableImpl --gconly", - "mplcg": "--O2 --quiet --threads=4 --no-pie --verbose-asm --gen-c-macro-def --maplelinker --duplicate_asm_list=${OUT_ROOT}/target/product/maple_arm64-clang-release/lib/codetricks/arch/arm64/duplicateFunc.s --nativeopt --fPIC --filetype=obj --no-proepilogue --no-prelsra --no-const-fold --gconly" - }, - global_option="--aot --save-temps --ifile", - infile="${APP}.dex" - ) - ], - "run": [ - Mplsh( - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-GC_IFILE", - "../../lib", - "." - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="GC", - xbootclasspath="libcore-all.ohex", - infile="${APP}.ohex", - main="${MAIN}", - args="${ARGS}", - return_value_list=[95] - ) - ] -} diff --git a/testsuite/driver/src/mode/JCK_HIR2MPL_IFILE.py b/testsuite/driver/src/mode/JCK_HIR2MPL_IFILE.py deleted file mode 100644 index e347591967..0000000000 --- a/testsuite/driver/src/mode/JCK_HIR2MPL_IFILE.py +++ /dev/null @@ -1,60 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -JCK_HIR2MPL_IFILE = { - "compile": [ - Jar2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/framework_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/services_intermediates/classes.jar" - ], - infile="${APP}.jar" - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64-clang-release/bin/bin_HIR2MPL_IFILE/maple", - run=["hir2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "hir2mpl": "-mplt=${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_IFILE/libcore-all.mplt", - "me": "--gconly --O2 --quiet --threads=4 --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea", - "mpl2mpl": "--gconly --O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal --dump-muid --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --emitVtableImpl", - "mplcg": "--gconly --O2 --quiet --threads=4 --no-pie --verbose-asm --gen-c-macro-def --maplelinker --duplicate_asm_list=${OUT_ROOT}/target/product/maple_arm64-clang-release/lib/codetricks/arch/arm64/duplicateFunc.s --nativeopt --fPIC --filetype=obj --no-proepilogue --no-prelsra --no-const-fold" - }, - global_option="--aot --save-temps --ifile", - infile="${APP}.dex" - ) - ], - "run": [ - Mplsh( - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_IFILE", - "../../lib", - "." - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="GC", - xbootclasspath="libcore-all.ohex", - infile="${APP}.ohex", - main="${MAIN}", - args="${ARGS}", - return_value_list=[95] - ) - ] -} diff --git a/testsuite/driver/src/mode/JCK_HIR2MPL_IFILE_O0.py b/testsuite/driver/src/mode/JCK_HIR2MPL_IFILE_O0.py deleted file mode 100644 index 5612323dd6..0000000000 --- a/testsuite/driver/src/mode/JCK_HIR2MPL_IFILE_O0.py +++ /dev/null @@ -1,60 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -JCK_HIR2MPL_IFILE_O0 = { - "compile": [ - Jar2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/framework_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/services_intermediates/classes.jar" - ], - infile="${APP}.jar" - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64-clang-release/bin/bin_HIR2MPL_IFILE_O0/maple", - run=["hir2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "hir2mpl": "-mplt=${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_IFILE_O0/libcore-all.mplt", - "me": "--gconly --quiet --enable-ea", - "mpl2mpl": "--quiet --regnativefunc --maplelinker --maplelinker-nolocal --dump-muid --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --emitVtableImpl --gconly", - "mplcg": "--quiet --no-pie --verbose-asm --gen-c-macro-def --maplelinker --duplicate_asm_list=${OUT_ROOT}/target/product/maple_arm64-clang-release/lib/codetricks/arch/arm64/duplicateFunc.s --nativeopt --fPIC --filetype=obj --no-proepilogue --no-prelsra --no-const-fold --gconly" - }, - global_option="--aot --save-temps --ifile", - infile="${APP}.dex" - ) - ], - "run": [ - Mplsh( - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_IFILE_O0", - "../../lib", - "." - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="GC", - xbootclasspath="libcore-all.ohex", - infile="${APP}.ohex", - main="${MAIN}", - args="${ARGS}", - return_value_list=[95] - ) - ] -} diff --git a/testsuite/driver/src/mode/JCK_HIR2MPL_RC_IFILE.py b/testsuite/driver/src/mode/JCK_HIR2MPL_RC_IFILE.py deleted file mode 100644 index 9ec39aadf2..0000000000 --- a/testsuite/driver/src/mode/JCK_HIR2MPL_RC_IFILE.py +++ /dev/null @@ -1,61 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -JCK_HIR2MPL_RC_IFILE = { - "compile": [ - Jar2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/framework_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/services_intermediates/classes.jar" - ], - infile="${APP}.jar" - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/bin_HIR2MPL_RC_IFILE/maple", - run=["hir2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "hir2mpl": "-rc -mplt=${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_RC_IFILE/libcore-all.mplt", - "me": "--O2 --quiet --threads=4 --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea", - "mpl2mpl": "--O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal --dump-muid --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --emitVtableImpl", - "mplcg": "--O2 --quiet --threads=4 --no-pie --verbose-asm --gen-c-macro-def --maplelinker --duplicate_asm_list=${OUT_ROOT}/target/product/maple_arm64-clang-release/lib/codetricks/arch/arm64/duplicateFunc.s --nativeopt --fPIC --filetype=obj --with-ra-linear-scan --no-ico --no-cfgo --no-prepeep --no-peep --no-ebo --no-storeloadopt --no-globalopt --no-schedule --no-proepilogue --no-prelsra --no-const-fold" - }, - global_option="--aot --save-temps --ifile", - infile="${APP}.dex" - ) - ], - "run": [ - Mplsh( - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_RC_IFILE", - "../../lib", - "." - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.ohex", - infile="${APP}.ohex", - main="${MAIN}", - args="${ARGS}", - return_value_list=[95] - ) - ] -} - diff --git a/testsuite/driver/src/mode/JCK_HIR2MPL_RC_IFILE_O0.py b/testsuite/driver/src/mode/JCK_HIR2MPL_RC_IFILE_O0.py deleted file mode 100644 index fc58505421..0000000000 --- a/testsuite/driver/src/mode/JCK_HIR2MPL_RC_IFILE_O0.py +++ /dev/null @@ -1,61 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -JCK_HIR2MPL_RC_IFILE_O0 = { - "compile": [ - Jar2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/framework_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/services_intermediates/classes.jar" - ], - infile="${APP}.jar" - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/bin_HIR2MPL_RC_IFILE_O0/maple", - run=["hir2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "hir2mpl": "-rc -mplt=${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_RC_IFILE_O0/libcore-all.mplt", - "me": "--quiet --enable-ea --aot", - "mpl2mpl": "--quiet --regnativefunc --maplelinker --maplelinker-nolocal --dump-muid --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --emitVtableImpl", - "mplcg": "--quiet --no-pie --verbose-asm --gen-c-macro-def --maplelinker --duplicate_asm_list=${OUT_ROOT}/target/product/maple_arm64-clang-release/lib/codetricks/arch/arm64/duplicateFunc.s --nativeopt --fPIC --filetype=obj --no-proepilogue --no-prelsra --no-const-fold" - }, - global_option="--aot --save-temps --ifile", - infile="${APP}.dex" - ) - ], - "run": [ - Mplsh( - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-HIR2MPL_RC_IFILE_O0", - "../../lib", - "." - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.ohex", - infile="${APP}.ohex", - main="${MAIN}", - args="${ARGS}", - return_value_list=[95] - ) - ] -} - diff --git a/testsuite/driver/src/mode/JCK_IFILE.py b/testsuite/driver/src/mode/JCK_IFILE.py deleted file mode 100644 index 0899e54165..0000000000 --- a/testsuite/driver/src/mode/JCK_IFILE.py +++ /dev/null @@ -1,61 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -JCK_IFILE = { - "compile": [ - Jar2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/framework_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/services_intermediates/classes.jar" - ], - infile="${APP}.jar" - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64-clang-release/bin/bin_IFILE/maple", - run=["dex2mpl", "mplipa", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-IFILE/libcore-all.mplt -dexcatch -inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/to_inline.list -j=16 -j100 -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list -refine-catch -staticstringcheck", - "mplipa": "--effectipa --quiet", - "me": "--O2 --quiet --threads=4 --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea", - "mpl2mpl": "--O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal --dump-muid --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --emitVtableImpl", - "mplcg": "--O2 --quiet --threads=4 --no-pie --verbose-asm --gen-c-macro-def --maplelinker --duplicate_asm_list=${OUT_ROOT}/target/product/maple_arm64-clang-release/lib/codetricks/arch/arm64/duplicateFunc.s --nativeopt --fPIC --filetype=obj --no-proepilogue --no-prelsra --no-const-fold" - }, - global_option="--aot --save-temps --ifile", - infile="${APP}.dex" - ) - ], - "run": [ - Mplsh( - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-IFILE", - "../../lib", - "." - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.ohex", - infile="${APP}.ohex", - main="${MAIN}", - args="${ARGS}", - return_value_list=[95] - ) - ] -} diff --git a/testsuite/driver/src/mode/JCK_MOVO2.py b/testsuite/driver/src/mode/JCK_MOVO2.py deleted file mode 100644 index 4c076f213e..0000000000 --- a/testsuite/driver/src/mode/JCK_MOVO2.py +++ /dev/null @@ -1,64 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -JCK_MOVO2 = { - "compile": [ - Jar2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/framework_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/services_intermediates/classes.jar" - ], - infile="${APP}.jar" - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/maple", - run=["dex2mpl", "mplipa", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "-mplt=${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-MOVO2/libcore-all.mplt -anti-proguard-auto -dexcatch -gen-stringfieldvalue -inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/to_inline.list -j100 -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list -refine-catch -staticstringcheck -checktool -check-incomplete -incomplete-whitelist=${OUT_ROOT}/target/product/public/lib/codetricks/compile/incomplete.list -incomplete-detail -opt-switch-disable -incomplete-whitelist-auto -gconly", - "mplipa": "--effectipa --quiet", - "me": "--O2 --quiet --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea --threads=2 --gconly --movinggc", - "mpl2mpl": "--O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --inlineCache=1 --gen-pgo-report --gconly --movinggc", - "mplcg": "--O2 --quiet --no-pie --verbose-asm --fPIC --gen-c-macro-def --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/asm/duplicateFunc.s --maplelinker --gsrc --gconly --movinggc" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - QemuLinkerArm64( - lib="host-x86_64-MOVO2" - ) - ], - "run": [ - Mplsh( - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-MOVO2", - "../../lib", - "." - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="GC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - main="${MAIN}", - args="${ARGS}", - return_value_list=[95] - ) - ] -} diff --git a/testsuite/driver/src/mode/JCK_O2.py b/testsuite/driver/src/mode/JCK_O2.py deleted file mode 100644 index 60a128f241..0000000000 --- a/testsuite/driver/src/mode/JCK_O2.py +++ /dev/null @@ -1,66 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -JCK_O2 = { - "compile": [ - Jar2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/framework_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/services_intermediates/classes.jar" - ], - infile="${APP}.jar" - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/maple", - run=["dex2mpl", "mplipa", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O2/libcore-all.mplt -dexcatch -inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/to_inline.list -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list -refine-catch -staticstringcheck", - "mplipa": "--effectipa --quiet", - "me": "--O2 --quiet --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea", - "mpl2mpl": "--O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal --dump-muid --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --emitVtableImpl", - "mplcg": "--O2 --quiet --no-pie --verbose-asm --fPIC --gen-c-macro-def --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/asm/duplicateFunc.s --maplelinker --gsrc --nativeopt --replaceasm" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Linker( - lib="host-x86_64-O2", - model="arm64", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O2", - "../../lib", - "." - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - main="${MAIN}", - args="${ARGS}", - return_value_list=[95] - ) - ] -} diff --git a/testsuite/driver/src/mode/JCK_TGCO2.py b/testsuite/driver/src/mode/JCK_TGCO2.py deleted file mode 100644 index a188999ca1..0000000000 --- a/testsuite/driver/src/mode/JCK_TGCO2.py +++ /dev/null @@ -1,58 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -JCK_TGCO2 = { - "compile": [ - Shell( - "adb shell \"mkdir -p /data/maple/${CASE}/${OPT}\"" - ), - Jar2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/framework_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/services_intermediates/classes.jar" - ], - infile="${APP}.jar" - ), - Shell( - "adb push ${APP}.dex /data/maple/${CASE}/${OPT}/" - ), - Shell( - "adb shell \"/data/maple/maple -O2 --gconly --save-temps --hir2mpl-opt=\\\"-Xbootclasspath /apex/com.android.runtime/javalib/core-oj.jar,/apex/com.android.runtime/javalib/core-libart.jar\\\" --mplcg-opt=\\\"--no-ebo --no-cfgo --no-schedule\\\" --infile /data/maple/${CASE}/${OPT}/${APP}.dex\"" - ), - Shell( - "adb pull /data/maple/${CASE}/${OPT}/${APP}.VtableImpl.s ./" - ), - Shell( - "${MAPLE_ROOT}/zeiss/prebuilt/sdk/android-ndk-r20b/toolchains/llvm/prebuilt/linux-x86_64/bin/aarch64-linux-android29-clang++ -O2 -x assembler-with-cpp -march=armv8-a -DUSE_32BIT_REF -c ${APP}.VtableImpl.s" - ), - Shell( - "${MAPLE_ROOT}/zeiss/prebuilt/sdk/android-ndk-r20b/toolchains/llvm/prebuilt/linux-x86_64/bin/aarch64-linux-android29-clang++ ${APP}.VtableImpl.o -O2 -Wall -Werror -Wno-unused-command-line-argument -fstack-protector-strong -std=c++14 -nostdlibinc -march=armv8-a -fPIC -shared ${MAPLE_ROOT}/out/target/product/maple_arm64/lib/mrt_module_init.cpp -fuse-ld=lld -rdynamic -L${MAPLE_ROOT}/out/target/product/maple_arm64/lib/android -lmaplecore-all -lcommon_bridge -lc++ -lc -lm -ldl -Wl,-T${MAPLE_ROOT}/out/target/product/public/lib/linker/maplelld.so.lds -o ./${APP}.so" - ), - Shell( - "adb push ${APP}.so /data/maple/${CASE}/${OPT}/" - ) - ], - "run": [ - Shell( - "adb shell \"export LD_LIBRARY_PATH=/vendor/lib64:/system/lib64:/data/maple;mplsh -Xgconly -cp /data/maple/${CASE}/${OPT}/${APP}.so ${MAIN} ${ARGS}\" || [ $? -eq 95 ]" - ), - Shell( - "adb shell \"rm -rf /data/maple/${CASE}/${OPT}\"" - ) - ] -} \ No newline at end of file diff --git a/testsuite/driver/src/mode/JCK_ZTERP.py b/testsuite/driver/src/mode/JCK_ZTERP.py deleted file mode 100644 index f0aa2cc0b1..0000000000 --- a/testsuite/driver/src/mode/JCK_ZTERP.py +++ /dev/null @@ -1,48 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -JCK_ZTERP = { - "compile": [ - Jar2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/framework_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/services_intermediates/classes.jar" - ], - infile="${APP}.jar" - ) - ], - "run": [ - Mplsh( - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-ZTERP", - "../../lib", - "." - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="GC", - xbootclasspath="libcore-all.so", - infile="${APP}.dex", - main="${MAIN}", - args="${ARGS}", - return_value_list=[95] - ) - ] -} \ No newline at end of file diff --git a/testsuite/driver/src/mode/JCOD_O0.py b/testsuite/driver/src/mode/JCOD_O0.py deleted file mode 100644 index 6b2915f2eb..0000000000 --- a/testsuite/driver/src/mode/JCOD_O0.py +++ /dev/null @@ -1,115 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -JCOD_O0 = { - "compile": [ - Jcod2jar( - file=["${APP}.jcod"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/bin_OPS/maple", - run=["jbc2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "jbc2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-OPS_O0/libcore-all.mplt -use-string-factory", - "me": "--quiet", - "mpl2mpl": "--quiet --regnativefunc --maplelinker", - "mplcg": "--quiet --no-pie --verbose-asm --maplelinker --fPIC" - }, - global_option="--save-temps --genVtableImpl", - infile="${APP}.jar" - ), - Linker( - lib="host-x86_64-OPS_O0", - model="arm64", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-OPS_O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "MAPLE_REPORT_RC_LEAK": "1" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-OPS_O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="leak.log" - ), - CheckRegContain( - reg="Total none-cycle root objects 0", - file="leak.log" - ), - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "MAPLE_VERIFY_RC": "1" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-OPS_O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential early release", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential leak", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects weak rc are wrong", - file="rcverify.log" - ) - ] -} \ No newline at end of file diff --git a/testsuite/driver/src/mode/JCOD_O2.py b/testsuite/driver/src/mode/JCOD_O2.py deleted file mode 100644 index d61868b8d0..0000000000 --- a/testsuite/driver/src/mode/JCOD_O2.py +++ /dev/null @@ -1,110 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -JCOD_O2 = { - "compile": [ - Jcod2jar( - file=["${APP}.jcod"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/bin_OPS/maple", - run=["jbc2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "jbc2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-OPS_O2/libcore-all.mplt -use-string-factory", - "me": "-O2 --quiet", - "mpl2mpl": "-O2 --quiet --regnativefunc --no-nativeopt --maplelinker", - "mplcg": "--quiet -O2 --no-pie --verbose-asm --maplelinker --fPIC" - }, - global_option="--save-temps --genVtableImpl", - infile="${APP}.jar" - ), - Linker( - lib="host-x86_64-OPS_O2", - model="arm64", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-OPS_O2", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Mplsh( - env={ - "MAPLE_REPORT_RC_LEAK": "1" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-OPS_O2", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="leak.log" - ), - CheckRegContain( - reg="Total none-cycle root objects 0", - file="leak.log" - ), - Mplsh( - env={ - "MAPLE_VERIFY_RC": "1", - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-OPS_O2", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential early release", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential leak", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects weak rc are wrong", - file="rcverify.log" - ) - ] -} \ No newline at end of file diff --git a/testsuite/driver/src/mode/JTREG_GCO2.py b/testsuite/driver/src/mode/JTREG_GCO2.py deleted file mode 100644 index e6c3fda76c..0000000000 --- a/testsuite/driver/src/mode/JTREG_GCO2.py +++ /dev/null @@ -1,65 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -JTREG_GCO2 = { - "compile": [ - Jar2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/framework_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/services_intermediates/classes.jar" - ], - infile="${APP}.jar" - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/maple", - run=["dex2mpl", "mplipa", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "-mplt=${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-GCO2/libcore-all.mplt -anti-proguard-auto -dexcatch -gen-stringfieldvalue -inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/to_inline.list -j100 -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list -refine-catch -staticstringcheck -checktool -check-incomplete -incomplete-whitelist=${OUT_ROOT}/target/product/public/lib/codetricks/compile/incomplete.list -incomplete-detail -opt-switch-disable -incomplete-whitelist-auto -gconly", - "mplipa": "--effectipa --quiet", - "me": "--O2 --quiet --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea --threads=2 --gconly", - "mpl2mpl": "--O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --inlineCache=1 --gen-pgo-report --gconly", - "mplcg": "--O2 --quiet --no-pie --verbose-asm --fPIC --gen-c-macro-def --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/asm/duplicateFunc.s --maplelinker --gsrc --gconly" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Linker( - lib="host-x86_64-GCO2", - model="arm64", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-GCO2", - "." - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="GC", - xbootclasspath="libcore-all.so", - infile="${CLASSPATH}", - main="${MAIN}", - args="${ARGS}", - return_value_list=[0, 95] - ) - ] -} diff --git a/testsuite/driver/src/mode/JTREG_MOVO2.py b/testsuite/driver/src/mode/JTREG_MOVO2.py deleted file mode 100644 index 336d5c4d47..0000000000 --- a/testsuite/driver/src/mode/JTREG_MOVO2.py +++ /dev/null @@ -1,63 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -JTREG_MOVO2 = { - "compile": [ - Jar2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/framework_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/services_intermediates/classes.jar" - ], - infile="${APP}.jar" - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/maple", - run=["dex2mpl", "mplipa", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "-mplt=${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-MOVO2/libcore-all.mplt -anti-proguard-auto -dexcatch -gen-stringfieldvalue -inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/to_inline.list -j100 -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list -refine-catch -staticstringcheck -checktool -check-incomplete -incomplete-whitelist=${OUT_ROOT}/target/product/public/lib/codetricks/compile/incomplete.list -incomplete-detail -opt-switch-disable -incomplete-whitelist-auto -gconly", - "mplipa": "--effectipa --quiet", - "me": "--O2 --quiet --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea --threads=2 --gconly --movinggc", - "mpl2mpl": "--O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --inlineCache=1 --gen-pgo-report --gconly --movinggc", - "mplcg": "--O2 --quiet --no-pie --verbose-asm --fPIC --gen-c-macro-def --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/asm/duplicateFunc.s --maplelinker --gsrc --gconly --movinggc" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - QemuLinkerArm64( - lib="host-x86_64-MOVO2" - ) - ], - "run": [ - Mplsh( - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-MOVO2", - "." - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="GC", - xbootclasspath="libcore-all.so", - infile="${CLASSPATH}", - main="${MAIN}", - args="${ARGS}", - return_value_list=[0, 95] - ) - ] -} diff --git a/testsuite/driver/src/mode/JTREG_O2.py b/testsuite/driver/src/mode/JTREG_O2.py deleted file mode 100644 index 2c44a56624..0000000000 --- a/testsuite/driver/src/mode/JTREG_O2.py +++ /dev/null @@ -1,65 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -JTREG_O2 = { - "compile": [ - Jar2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/framework_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/services_intermediates/classes.jar" - ], - infile="${APP}.jar" - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/maple", - run=["dex2mpl", "mplipa", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O2/libcore-all.mplt -dexcatch -inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/to_inline.list -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list -refine-catch -staticstringcheck", - "mplipa": "--effectipa --quiet", - "me": "--O2 --quiet --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea", - "mpl2mpl": "--O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal --dump-muid --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --emitVtableImpl", - "mplcg": "--O2 --quiet --no-pie --verbose-asm --fPIC --gen-c-macro-def --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/asm/duplicateFunc.s --maplelinker --gsrc --nativeopt --replaceasm" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Linker( - lib="host-x86_64-O2", - model="arm64", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O2", - "." - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${CLASSPATH}", - main="${MAIN}", - args="${ARGS}", - return_value_list=[0, 95] - ) - ] -} diff --git a/testsuite/driver/src/mode/JTREG_TGCO2.py b/testsuite/driver/src/mode/JTREG_TGCO2.py deleted file mode 100644 index 179e59cb79..0000000000 --- a/testsuite/driver/src/mode/JTREG_TGCO2.py +++ /dev/null @@ -1,58 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -JTREG_TGCO2 = { - "compile": [ - Shell( - "adb shell \"mkdir -p /data/maple/${CASE}/${OPT}\"" - ), - Jar2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/framework_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/services_intermediates/classes.jar" - ], - infile="${APP}.jar" - ), - Shell( - "adb push ${APP}.dex /data/maple/${CASE}/${OPT}/" - ), - Shell( - "adb shell \"/data/maple/maple -O2 --gconly --save-temps --hir2mpl-opt=\\\"-Xbootclasspath /apex/com.android.runtime/javalib/core-oj.jar,/apex/com.android.runtime/javalib/core-libart.jar\\\" --mplcg-opt=\\\"--no-ebo --no-cfgo --no-schedule\\\" --infile /data/maple/${CASE}/${OPT}/${APP}.dex\"" - ), - Shell( - "adb pull /data/maple/${CASE}/${OPT}/${APP}.VtableImpl.s ./" - ), - Shell( - "${MAPLE_ROOT}/zeiss/prebuilt/sdk/android-ndk-r20b/toolchains/llvm/prebuilt/linux-x86_64/bin/aarch64-linux-android29-clang++ -O2 -x assembler-with-cpp -march=armv8-a -DUSE_32BIT_REF -c ${APP}.VtableImpl.s" - ), - Shell( - "${MAPLE_ROOT}/zeiss/prebuilt/sdk/android-ndk-r20b/toolchains/llvm/prebuilt/linux-x86_64/bin/aarch64-linux-android29-clang++ ${APP}.VtableImpl.o -O2 -Wall -Werror -Wno-unused-command-line-argument -fstack-protector-strong -std=c++14 -nostdlibinc -march=armv8-a -fPIC -shared ${MAPLE_ROOT}/out/target/product/maple_arm64/lib/mrt_module_init.cpp -fuse-ld=lld -rdynamic -L${MAPLE_ROOT}/out/target/product/maple_arm64/lib/android -lmaplecore-all -lcommon_bridge -lc++ -lc -lm -ldl -Wl,-T${MAPLE_ROOT}/out/target/product/public/lib/linker/maplelld.so.lds -o ./${APP}.so" - ), - Shell( - "adb push ${APP}.so /data/maple/${CASE}/${OPT}/" - ) - ], - "run": [ - Shell( - "adb shell \"export LD_LIBRARY_PATH=/vendor/lib64:/system/lib64:/data/maple;mplsh -Xgconly -cp /data/maple/${CASE}/${OPT}/${CLASSPATH} ${MAIN} ${ARGS}\" || [ $? -eq 95 ]" - ), - Shell( - "adb shell \"rm -rf /data/maple/${CASE}/${OPT}\"" - ) - ] -} \ No newline at end of file diff --git a/testsuite/driver/src/mode/JTREG_ZTERP.py b/testsuite/driver/src/mode/JTREG_ZTERP.py deleted file mode 100644 index f3fdc897e2..0000000000 --- a/testsuite/driver/src/mode/JTREG_ZTERP.py +++ /dev/null @@ -1,47 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -JTREG_ZTERP = { - "compile": [ - Jar2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/framework_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/services_intermediates/classes.jar" - ], - infile="${APP}.jar" - ) - ], - "run": [ - Mplsh( - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-ZTERP", - "." - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="GC", - xbootclasspath="libcore-all.so", - infile="${CLASSPATH}", - main="${MAIN}", - args="${ARGS}", - return_value_list=[0, 95] - ) - ] -} \ No newline at end of file diff --git a/testsuite/driver/src/mode/MAPLETI_ZTERP.py b/testsuite/driver/src/mode/MAPLETI_ZTERP.py deleted file mode 100644 index 092904adb7..0000000000 --- a/testsuite/driver/src/mode/MAPLETI_ZTERP.py +++ /dev/null @@ -1,130 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -MAPLETI_ZTERP = { - "compile": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java"] - ), - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${ZTERPAPP}.dex", - infile=["${ZTERPAPP}.java"], - usesimplejava=True - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/maple", - run=["dex2mpl", "mplipa", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "-mplt=${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-ZTERP/libcore-all.mplt -dexcatch -inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/to_inline.list -j=16 -j100 -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list -refine-catch -staticstringcheck", - "mplipa": "--effectipa --quiet", - "me": "--O2 --quiet --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea", - "mpl2mpl": "--O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal --dump-muid --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --emitVtableImpl", - "mplcg": "--O2 --quiet --no-pie --verbose-asm --fPIC --gen-c-macro-def --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/asm/duplicateFunc.s --maplelinker --gsrc --nativeopt --replaceasm" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Linker( - lib="host-x86_64-ZTERP", - model="arm64_mapleti", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - env={ - "USE_ZTERP": "true" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-ZTERP", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh -agentpath:${MAPLE_ROOT}/out/target/product/maple_arm64-clang-release/lib/host-x86_64-ZTERP/dummy-agent.so -pluginpath:${MAPLE_ROOT}/out/target/product/maple_arm64-clang-release/lib/host-x86_64-ZTERP/mapleti.so", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so ", - infile="./MapleTiTest.dex:./MapleCode.so", #${CP}", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Mplsh( - env={ - "USE_ZTERP": "true", - "MAPLE_REPORT_RC_LEAK": "1" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-ZTERP", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh -agentpath:${MAPLE_ROOT}/out/target/product/maple_arm64-clang-release/lib/host-x86_64-ZTERP/dummy-agent.so -pluginpath:${MAPLE_ROOT}/out/target/product/maple_arm64-clang-release/lib/host-x86_64-ZTERP/mapleti.so", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="./MapleTiTest.dex:./MapleCode.so", #${CP}", - redirection="leak.log" - ), - CheckRegContain( - reg="Total none-cycle root objects 0", - file="leak.log" - ), - Mplsh( - env={ - "USE_ZTERP": "true", - "MAPLE_VERIFY_RC": "1" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-ZTERP", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh -agentpath:${MAPLE_ROOT}/out/target/product/maple_arm64-clang-release/lib/host-x86_64-ZTERP/dummy-agent.so -pluginpath:${MAPLE_ROOT}/out/target/product/maple_arm64-clang-release/lib/host-x86_64-ZTERP/mapleti.so", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so ", - infile="./MapleTiTest.dex:./MapleCode.so", #${CP}", - redirection="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential early release", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential leak", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects weak rc are wrong", - file="rcverify.log" - ) - ] -} diff --git a/testsuite/driver/src/mode/MAPLETI_ZTERP_PANDA.py b/testsuite/driver/src/mode/MAPLETI_ZTERP_PANDA.py deleted file mode 100644 index 6b4cec348a..0000000000 --- a/testsuite/driver/src/mode/MAPLETI_ZTERP_PANDA.py +++ /dev/null @@ -1,135 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -MAPLETI_ZTERP_PANDA = { - "compile": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java"] - ), - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${ZTERPAPP}.dex", - infile=["${ZTERPAPP}.java"], - usesimplejava=True - ), - Class2panda( - class2panda="${OUT_ROOT}/target/product/public/bin/c2p", - infile="${ZTERPAPP}.class", - outfile="${ZTERPAPP}.bin" - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/maple", - run=["dex2mpl", "mplipa", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "-mplt=${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-ZTERP/libcore-all.mplt -dexcatch -inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/to_inline.list -j=16 -j100 -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list -refine-catch -staticstringcheck", - "mplipa": "--effectipa --quiet", - "me": "--O2 --quiet --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea", - "mpl2mpl": "--O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal --dump-muid --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --emitVtableImpl", - "mplcg": "--O2 --quiet --no-pie --verbose-asm --fPIC --gen-c-macro-def --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/asm/duplicateFunc.s --maplelinker --gsrc --nativeopt --replaceasm" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Linker( - lib="host-x86_64-ZTERP", - model="arm64_mapleti", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - env={ - "USE_ZTERP": "true" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-ZTERP", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh -agentpath:${MAPLE_ROOT}/out/target/product/maple_arm64-clang-release/lib/host-x86_64-ZTERP/dummy-agent.so -pluginpath:${MAPLE_ROOT}/out/target/product/maple_arm64-clang-release/lib/host-x86_64-ZTERP/mapleti.so", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so ", - infile="./MapleTiTest.bin:./MapleCode.so", #${CP}", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Mplsh( - env={ - "USE_ZTERP": "true", - "MAPLE_REPORT_RC_LEAK": "1" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-ZTERP", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh -agentpath:${MAPLE_ROOT}/out/target/product/maple_arm64-clang-release/lib/host-x86_64-ZTERP/dummy-agent.so -pluginpath:${MAPLE_ROOT}/out/target/product/maple_arm64-clang-release/lib/host-x86_64-ZTERP/mapleti.so", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="./MapleTiTest.bin:./MapleCode.so", #${CP}", - redirection="leak.log" - ), - CheckRegContain( - reg="Total none-cycle root objects 0", - file="leak.log" - ), - Mplsh( - env={ - "USE_ZTERP": "true", - "MAPLE_VERIFY_RC": "1" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-ZTERP", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh -agentpath:${MAPLE_ROOT}/out/target/product/maple_arm64-clang-release/lib/host-x86_64-ZTERP/dummy-agent.so -pluginpath:${MAPLE_ROOT}/out/target/product/maple_arm64-clang-release/lib/host-x86_64-ZTERP/mapleti.so", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so ", - infile="./MapleTiTest.bin:./MapleCode.so", #${CP}", - redirection="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential early release", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential leak", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects weak rc are wrong", - file="rcverify.log" - ) - ] -} diff --git a/testsuite/driver/src/mode/MEMORY_CHECK.py b/testsuite/driver/src/mode/MEMORY_CHECK.py deleted file mode 100644 index c38f51f1d3..0000000000 --- a/testsuite/driver/src/mode/MEMORY_CHECK.py +++ /dev/null @@ -1,55 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -MEMORY_CHECK = { - "compile": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java"] - ), - Maple( - maple="valgrind ${OUT_ROOT}/target/product/maple_arm64/bin/maple", - run=["dex2mpl", "mplipa", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "-mplt=${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O2/libcore-all.mplt -dexcatch -inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/to_inline.list -j=16 -j100 -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list -refine-catch -staticstringcheck", - "mplipa": "--effectipa --quiet", - "me": "--O2 --quiet --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea", - "mpl2mpl": "--O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal --dump-muid --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --emitVtableImpl", - "mplcg": "--O2 --quiet --no-pie --verbose-asm --fPIC --gen-c-macro-def --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/asm/duplicateFunc.s --maplelinker --gsrc --nativeopt --replaceasm" - }, - global_option="--save-temps", - infile="${APP}.dex", - redirection="output.log" - ), - CheckRegContain( - reg="definitely lost: 0 bytes in 0 blocks", - file="output.log" - ), - CheckRegContain( - reg="indirectly lost: 0 bytes in 0 blocks", - file="output.log" - ), - CheckRegContain( - reg="possibly lost: 0 bytes in 0 blocks", - file="output.log" - ), - ], - "run": [] -} diff --git a/testsuite/driver/src/mode/MOVO2.py b/testsuite/driver/src/mode/MOVO2.py deleted file mode 100644 index c75c5e035e..0000000000 --- a/testsuite/driver/src/mode/MOVO2.py +++ /dev/null @@ -1,66 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -MOVO2 = { - "compile": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java","${EXTRA_JAVA_FILE}"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/maple", - run=["dex2mpl", "mplipa", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "-mplt=${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-MOVO2/libcore-all.mplt -anti-proguard-auto -dexcatch -gconly -gen-stringfieldvalue -inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/to_inline.list -j=32 -j100 -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list -opt-switch-disable -refine-catch -staticstringcheck", - "mplipa": "--effectipa --quiet", - "me": "--O2 --quiet --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea --gconly --movinggc --no-localvar", - "mpl2mpl": "--O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --gen-pgo-report --gconly --movinggc", - "mplcg": "--O2 --quiet --no-pie --verbose-asm --fPIC --gen-c-macro-def --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/asm/duplicateFunc.s --maplelinker --gsrc --gconly --movinggc --no-localvar" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Linker( - lib="host-x86_64-MOVO2", - model="arm64", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-MOVO2", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="GC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ) - ] -} diff --git a/testsuite/driver/src/mode/MOVO2NATIVE.py b/testsuite/driver/src/mode/MOVO2NATIVE.py deleted file mode 100644 index facaa84d0a..0000000000 --- a/testsuite/driver/src/mode/MOVO2NATIVE.py +++ /dev/null @@ -1,77 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -MOVO2NATIVE = { - "compile": [ - NativeCompile( - mpldep=[ - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-MOVO2", - "${OUT_ROOT}/target/product/public/lib/libnativehelper/include" - ], - infile="${NATIVE_SRC}", - model="arm64" - ), - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java","${EXTRA_JAVA_FILE}"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/maple", - run=["dex2mpl", "mplipa", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "-mplt=${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-MOVO2/libcore-all.mplt -anti-proguard-auto -dexcatch -gconly -gen-stringfieldvalue -inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/to_inline.list -j=32 -j100 -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list -opt-switch-disable -refine-catch -staticstringcheck", - "mplipa": "--effectipa --quiet", - "me": "--O2 --quiet --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea --gconly --movinggc --no-localvar", - "mpl2mpl": "--O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --gen-pgo-report --gconly --movinggc", - "mplcg": "--O2 --quiet --no-pie --verbose-asm --fPIC --gen-c-macro-def --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/asm/duplicateFunc.s --maplelinker --gsrc --gconly --movinggc --no-localvar" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Linker( - lib="host-x86_64-MOVO2", - model="arm64", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - env={ - "JNI_TEST": "true" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "./", - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-MOVO2" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="GC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ) - ] -} diff --git a/testsuite/driver/src/mode/O0.py b/testsuite/driver/src/mode/O0.py deleted file mode 100644 index 84e2338b54..0000000000 --- a/testsuite/driver/src/mode/O0.py +++ /dev/null @@ -1,120 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -O0 = { - "compile": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java","${EXTRA_JAVA_FILE}"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/maple", - run=["dex2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O0/libcore-all.mplt -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list", - "me": "", - "mpl2mpl": "--quiet --regnativefunc --maplelinker --FastNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/fastNative.list --CriticalNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/criticalNative.list --nativefunc-property-list=${OUT_ROOT}/target/product/public/lib/codetricks/native_binding/native_func_property.list", - "mplcg": "--quiet --no-pie --verbose-asm --maplelinker --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/arch/arm64/duplicateFunc.s --fPIC" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Linker( - lib="host-x86_64-O0", - model="arm64", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "MAPLE_REPORT_RC_LEAK": "1" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="leak.log" - ), - CheckRegContain( - reg="Total none-cycle root objects 0", - file="leak.log" - ), - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "MAPLE_VERIFY_RC": "1" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential early release", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential leak", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects weak rc are wrong", - file="rcverify.log" - ) - ] -} diff --git a/testsuite/driver/src/mode/O0NATIVE.py b/testsuite/driver/src/mode/O0NATIVE.py deleted file mode 100644 index 6196a6d1dc..0000000000 --- a/testsuite/driver/src/mode/O0NATIVE.py +++ /dev/null @@ -1,131 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -O0NATIVE = { - "compile": [ - NativeCompile( - mpldep=[ - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O0", - "${OUT_ROOT}/target/product/public/lib/libnativehelper/include" - ], - infile="${NATIVE_SRC}", - model="arm64" - ), - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java","${EXTRA_JAVA_FILE}"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/maple", - run=["dex2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O0/libcore-all.mplt -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list", - "me": "", - "mpl2mpl": "--quiet --regnativefunc --maplelinker --FastNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/fastNative.list --CriticalNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/criticalNative.list --nativefunc-property-list=${OUT_ROOT}/target/product/public/lib/codetricks/native_binding/native_func_property.list", - "mplcg": "--quiet --no-pie --verbose-asm --maplelinker --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/arch/arm64/duplicateFunc.s --fPIC" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Linker( - lib="host-x86_64-O0", - model="arm64", - infile="${APP}", - ) - ], - "run": [ - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "JNI_TEST": "true" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "./", - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O0" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "MAPLE_REPORT_RC_LEAK": "1", - "JNI_TEST": "true" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "./", - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O0" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="leak.log" - ), - CheckRegContain( - reg="Total none-cycle root objects 0", - file="leak.log" - ), - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "MAPLE_VERIFY_RC": "1", - "JNI_TEST": "true" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "./", - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O0" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential early release", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential leak", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects weak rc are wrong", - file="rcverify.log" - ) - ] -} diff --git a/testsuite/driver/src/mode/O0NATIVEEH.py b/testsuite/driver/src/mode/O0NATIVEEH.py deleted file mode 100644 index a6c1c9a437..0000000000 --- a/testsuite/driver/src/mode/O0NATIVEEH.py +++ /dev/null @@ -1,77 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -O0NATIVEEH = { - "compile": [ - NativeCompile( - mpldep=[ - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O0", - "${OUT_ROOT}/target/product/public/lib/libnativehelper/include" - ], - infile="${NATIVE_SRC}", - model="arm64" - ), - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/maple", - run=["dex2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O0/libcore-all.mplt -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list", - "me": "", - "mpl2mpl": "--quiet --regnativefunc --maplelinker --FastNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/fastNative.list --CriticalNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/criticalNative.list --nativefunc-property-list=${OUT_ROOT}/target/product/public/lib/codetricks/native_binding/native_func_property.list", - "mplcg": "--quiet --no-pie --verbose-asm --maplelinker --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/arch/arm64/duplicateFunc.s --fPIC" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Linker( - lib="host-x86_64-O0", - model="arm64", - infile="${APP}", - ) - ], - "run": [ - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "JNI_TEST": "true" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "./", - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O0" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ) - ] -} diff --git a/testsuite/driver/src/mode/O0RC.py b/testsuite/driver/src/mode/O0RC.py deleted file mode 100644 index 33f3618858..0000000000 --- a/testsuite/driver/src/mode/O0RC.py +++ /dev/null @@ -1,79 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -O0RC = { - "compile": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/maple", - run=["dex2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O0/libcore-all.mplt -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list", - "me": "", - "mpl2mpl": "--quiet --regnativefunc --maplelinker --FastNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/fastNative.list --CriticalNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/criticalNative.list --nativefunc-property-list=${OUT_ROOT}/target/product/public/lib/codetricks/native_binding/native_func_property.list", - "mplcg": "--quiet --no-pie --verbose-asm --maplelinker --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/arch/arm64/duplicateFunc.s --fPIC" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Linker( - lib="host-x86_64-O0", - model="arm64", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "MAPLE_REPORT_RC_LEAK": "1", - "PATTERN_FROM_BACKUP_TRACING": "1" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="cycle.log" - ), - CheckRegContain( - reg="ExpectResult", - file="cycle.log" - ), - CheckRegContain( - reg="Total Leak Count 0", - file="cycle.log" - ), - CheckRegContain( - choice="num", - reg="ExpectResult", - file="cycle.log" - ) - ] -} diff --git a/testsuite/driver/src/mode/O0SMALI.py b/testsuite/driver/src/mode/O0SMALI.py deleted file mode 100644 index c2947526d6..0000000000 --- a/testsuite/driver/src/mode/O0SMALI.py +++ /dev/null @@ -1,155 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -O0SMALI = { - "smali2dex": [ - Smali2dex( - file=["${APP}.smali","${EXTRA_SMALI2DEX_FILE_1}"] - ) - ], - "dex2mpl":[ - Dex2mpl( - dex2mpl="${OUT_ROOT}/target/product/maple_arm64/bin/dex2mpl", - option="--mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O0/libcore-all.mplt -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list ${EXTRA_DEX2MPL_OPTION}", - infile="${APP}.dex", - redirection="dex2mpl.log" - ) - ], - "check_reg_contain": [ - CheckRegContain( - reg="${REG}", - file="${FILE}" - ) - ], - "maple_mplipa_me_mpl2mpl_mplcg": [ - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/maple", - run=["mplipa", "me", "mpl2mpl", "mplcg"], - option={ - "mplipa": "--quiet --effectipa", - "me": "", - "mpl2mpl": "--quiet --regnativefunc --maplelinker --FastNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/fastNative.list --CriticalNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/criticalNative.list --nativefunc-property-list=${OUT_ROOT}/target/product/public/lib/codetricks/native_binding/native_func_property.list", - "mplcg": "--quiet --no-pie --verbose-asm --maplelinker --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/arch/arm64/duplicateFunc.s --fPIC" - }, - global_option="--save-temps", - infile="${APP}.mpl" - ) - ], - "qemu_linker": [ - Linker( - lib="host-x86_64-O0", - model="arm64", - infile="${APP}" - ) - ], - "compile": [ - Smali2dex( - file=["${APP}.smali","${EXTRA_SMALI2DEX_FILE_2}","../lib/smali_util_Printer.smali","../lib/smali_util_ArrayI.smali"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/maple", - run=["dex2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O0/libcore-all.mplt -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list", - "me": "", - "mpl2mpl": "--quiet --regnativefunc --maplelinker --FastNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/fastNative.list --CriticalNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/criticalNative.list --nativefunc-property-list=${OUT_ROOT}/target/product/public/lib/codetricks/native_binding/native_func_property.list", - "mplcg": "--quiet --no-pie --verbose-asm --maplelinker --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/arch/arm64/duplicateFunc.s --fPIC" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Linker( - lib="host-x86_64-O0", - model="arm64", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "MAPLE_REPORT_RC_LEAK": "1" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="leak.log" - ), - CheckRegContain( - reg="Total none-cycle root objects 0", - file="leak.log" - ), - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "MAPLE_VERIFY_RC": "1", - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential early release", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential leak", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects weak rc are wrong", - file="rcverify.log" - ) - ] -} diff --git a/testsuite/driver/src/mode/O2.py b/testsuite/driver/src/mode/O2.py deleted file mode 100644 index c9b1bb5d18..0000000000 --- a/testsuite/driver/src/mode/O2.py +++ /dev/null @@ -1,116 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -O2 = { - "compile": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java","${EXTRA_JAVA_FILE}"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/maple", - run=["dex2mpl", "mplipa", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O2/libcore-all.mplt -dexcatch -inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/to_inline.list -j=16 -j100 -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list -refine-catch -staticstringcheck", - "mplipa": "--effectipa --quiet", - "me": "--O2 --quiet --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea", - "mpl2mpl": "--O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal --dump-muid --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --emitVtableImpl", - "mplcg": "--O2 --quiet --no-pie --verbose-asm --fPIC --gen-c-macro-def --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/asm/duplicateFunc.s --maplelinker --gsrc --nativeopt --replaceasm" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Linker( - lib="host-x86_64-O2", - model="arm64", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O2", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Mplsh( - env={ - "MAPLE_REPORT_RC_LEAK": "1" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O2", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="leak.log" - ), - CheckRegContain( - reg="Total none-cycle root objects 0", - file="leak.log" - ), - Mplsh( - env={ - "MAPLE_VERIFY_RC": "1", - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O2", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - infile="${APP}.so", - xbootclasspath="libcore-all.so", - redirection="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential early release", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential leak", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects weak rc are wrong", - file="rcverify.log" - ) - ] -} diff --git a/testsuite/driver/src/mode/O2NATIVE.py b/testsuite/driver/src/mode/O2NATIVE.py deleted file mode 100644 index 75159c5d90..0000000000 --- a/testsuite/driver/src/mode/O2NATIVE.py +++ /dev/null @@ -1,129 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -O2NATIVE = { - "compile": [ - NativeCompile( - mpldep=[ - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O2", - "${OUT_ROOT}/target/product/public/lib/libnativehelper/include" - ], - infile="${NATIVE_SRC}", - model="arm64" - ), - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java","${EXTRA_JAVA_FILE}"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/maple", - run=["dex2mpl", "mplipa", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O2/libcore-all.mplt -dexcatch -inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/to_inline.list -j=16 -j100 -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list -refine-catch -staticstringcheck", - "mplipa": "--effectipa --quiet", - "me": "--O2 --quiet --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea", - "mpl2mpl": "--O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal --dump-muid --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --emitVtableImpl", - "mplcg": "--O2 --quiet --no-pie --verbose-asm --fPIC --gen-c-macro-def --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/asm/duplicateFunc.s --maplelinker --gsrc --nativeopt --replaceasm" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Linker( - lib="host-x86_64-O2", - model="arm64", - infile="${APP}", - ) - ], - "run": [ - Mplsh( - env={ - "JNI_TEST": "true" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "./", - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O2" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Mplsh( - env={ - "MAPLE_REPORT_RC_LEAK": "1", - "JNI_TEST": "true" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "./", - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O2" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="leak.log" - ), - CheckRegContain( - reg="Total none-cycle root objects 0", - file="leak.log" - ), - Mplsh( - env={ - "MAPLE_VERIFY_RC": "1", - "JNI_TEST": "true" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "./", - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O2" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - infile="${APP}.so", - xbootclasspath="libcore-all.so", - redirection="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential early release", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential leak", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects weak rc are wrong", - file="rcverify.log" - ) - ] -} diff --git a/testsuite/driver/src/mode/O2NATIVEEH.py b/testsuite/driver/src/mode/O2NATIVEEH.py deleted file mode 100644 index d55bfc0509..0000000000 --- a/testsuite/driver/src/mode/O2NATIVEEH.py +++ /dev/null @@ -1,77 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -O2NATIVEEH = { - "compile": [ - NativeCompile( - mpldep=[ - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O2", - "${OUT_ROOT}/target/product/public/lib/libnativehelper/include" - ], - infile="${NATIVE_SRC}", - model="arm64" - ), - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/maple", - run=["dex2mpl", "mplipa", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O2/libcore-all.mplt -dexcatch -inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/to_inline.list -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list -refine-catch -staticstringcheck", - "mplipa": "--effectipa --quiet", - "me": "--O2 --quiet --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea", - "mpl2mpl": "--O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal --dump-muid --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --emitVtableImpl", - "mplcg": "--O2 --quiet --no-pie --verbose-asm --fPIC --gen-c-macro-def --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/asm/duplicateFunc.s --maplelinker --gsrc --nativeopt --replaceasm" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Linker( - lib="host-x86_64-O2", - model="arm64", - infile="${APP}", - ) - ], - "run": [ - Mplsh( - env={ - "JNI_TEST": "true" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "./", - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O2" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ) - ] -} diff --git a/testsuite/driver/src/mode/O2RC.py b/testsuite/driver/src/mode/O2RC.py deleted file mode 100644 index 6cf4c5510f..0000000000 --- a/testsuite/driver/src/mode/O2RC.py +++ /dev/null @@ -1,79 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -O2RC = { - "compile": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/maple", - run=["dex2mpl", "mplipa", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O2/libcore-all.mplt -dexcatch -inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/to_inline.list -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list -refine-catch -staticstringcheck", - "mplipa": "--effectipa --quiet", - "me": "--O2 --quiet --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea", - "mpl2mpl": "--O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal --dump-muid --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --emitVtableImpl", - "mplcg": "--O2 --quiet --no-pie --verbose-asm --fPIC --gen-c-macro-def --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/asm/duplicateFunc.s --maplelinker --gsrc --nativeopt --replaceasm" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Linker( - lib="host-x86_64-O2", - model="arm64", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - env={ - "MAPLE_REPORT_RC_LEAK": "1", - "PATTERN_FROM_BACKUP_TRACING": "1" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O2", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="cycle.log" - ), - CheckRegContain( - reg="ExpectResult", - file="cycle.log" - ), - CheckRegContain( - reg="Total Leak Count 0", - file="cycle.log" - ), - CheckRegContain( - choice="num", - reg="ExpectResult", - file="cycle.log" - ) - ] -} diff --git a/testsuite/driver/src/mode/O2SMALI.py b/testsuite/driver/src/mode/O2SMALI.py deleted file mode 100644 index 763b9a10bc..0000000000 --- a/testsuite/driver/src/mode/O2SMALI.py +++ /dev/null @@ -1,151 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -O2SMALI = { - "smali2dex": [ - Smali2dex( - file=["${APP}.smali","${EXTRA_SMALI2DEX_FILE_1}"] - ) - ], - "dex2mpl": [ - Dex2mpl( - dex2mpl="${OUT_ROOT}/target/product/maple_arm64/bin/dex2mpl", - option="--mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O2/libcore-all.mplt -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list ${EXTRA_DEX2MPL_OPTION}", - infile="${APP}.dex", - redirection="dex2mpl.log" - ) - ], - "check_reg_contain": [ - CheckRegContain( - reg="${REG}", - file="${FILE}" - ) - ], - "maple_mplipa_me_mpl2mpl_mplcg": [ - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/maple", - run=["mplipa", "me", "mpl2mpl", "mplcg"], - option={ - "mplipa": "--quiet --effectipa", - "me": "", - "mpl2mpl": "--quiet --regnativefunc --maplelinker --FastNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/fastNative.list --CriticalNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/criticalNative.list --nativefunc-property-list=${OUT_ROOT}/target/product/public/lib/codetricks/native_binding/native_func_property.list", - "mplcg": "--quiet --no-pie --verbose-asm --maplelinker --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/arch/arm64/duplicateFunc.s --fPIC" - }, - global_option="--save-temps", - infile="${APP}.mpl" - ) - ], - "qemu_linker": [ - Linker( - lib="host-x86_64-O2", - model="arm64", - infile="${APP}" - ) - ], - "compile": [ - Smali2dex( - file=["${APP}.smali","${EXTRA_SMALI2DEX_FILE_2}","../lib/smali_util_Printer.smali","../lib/smali_util_ArrayI.smali"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/maple", - run=["dex2mpl", "mplipa", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O2/libcore-all.mplt -dexcatch -inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/to_inline.list -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list -refine-catch -staticstringcheck", - "mplipa": "--effectipa --quiet", - "me": "--O2 --quiet --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea", - "mpl2mpl": "--O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal --dump-muid --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --emitVtableImpl", - "mplcg": "--O2 --quiet --no-pie --verbose-asm --fPIC --gen-c-macro-def --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/asm/duplicateFunc.s --maplelinker --gsrc --nativeopt --replaceasm" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Linker( - lib="host-x86_64-O2", - model="arm64", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O2", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Mplsh( - env={ - "MAPLE_REPORT_RC_LEAK": "1" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O2", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="leak.log" - ), - CheckRegContain( - reg="Total none-cycle root objects 0", - file="leak.log" - ), - Mplsh( - env={ - "MAPLE_VERIFY_RC": "1", - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O2", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential early release", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential leak", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects weak rc are wrong", - file="rcverify.log" - ) - ] -} diff --git a/testsuite/driver/src/mode/O2STMTPRE.py b/testsuite/driver/src/mode/O2STMTPRE.py deleted file mode 100644 index 2ad70b96ad..0000000000 --- a/testsuite/driver/src/mode/O2STMTPRE.py +++ /dev/null @@ -1,121 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -O2STMTPRE = { - "compile": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/maple", - run=["dex2mpl", "mplipa", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O2/libcore-all.mplt -dexcatch -inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/to_inline.list -j=16 -j100 -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list -refine-catch -staticstringcheck", - "mplipa": "--effectipa --quiet", - "me": "--O2 --quiet --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea", - "mpl2mpl": "--O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal --dump-muid --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --emitVtableImpl", - "mplcg": "--O2 --quiet --no-pie --verbose-asm --fPIC --gen-c-macro-def --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/asm/duplicateFunc.s --maplelinker --gsrc --nativeopt --replaceasm" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - CheckRegContain( - reg='"callassigned &MCC_GetOrInsertLiteral"', - file="${APP}.VtableImpl.mpl", - choice="num" - ), - Linker( - lib="host-x86_64-O2", - model="arm64", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O2", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Mplsh( - env={ - "MAPLE_REPORT_RC_LEAK": "1" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O2", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="leak.log" - ), - CheckRegContain( - reg="Total none-cycle root objects 0", - file="leak.log" - ), - Mplsh( - env={ - "MAPLE_VERIFY_RC": "1", - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O2", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - infile="${APP}.so", - xbootclasspath="libcore-all.so", - redirection="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential early release", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential leak", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects weak rc are wrong", - file="rcverify.log" - ) - ] -} diff --git a/testsuite/driver/src/mode/O2SUBSUMERC.py b/testsuite/driver/src/mode/O2SUBSUMERC.py deleted file mode 100644 index 714d8ecc23..0000000000 --- a/testsuite/driver/src/mode/O2SUBSUMERC.py +++ /dev/null @@ -1,121 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -O2SUBSUMERC = { - "compile": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/maple", - run=["dex2mpl", "mplipa", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O2/libcore-all.mplt -dexcatch -inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/to_inline.list -j=16 -j100 -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list -refine-catch -staticstringcheck", - "mplipa": "--effectipa --quiet", - "me": "--O2 --quiet --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea", - "mpl2mpl": "--O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal --dump-muid --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --emitVtableImpl", - "mplcg": "--O2 --quiet --no-pie --verbose-asm --fPIC --gen-c-macro-def --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/asm/duplicateFunc.s --maplelinker --gsrc --nativeopt --replaceasm" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - CheckRegContain( - reg="MCCIncRef", - file="${APP}.VtableImpl.mpl", - choice="num" - ), - Linker( - lib="host-x86_64-O2", - model="arm64", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O2", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Mplsh( - env={ - "MAPLE_REPORT_RC_LEAK": "1" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O2", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="leak.log" - ), - CheckRegContain( - reg="Total none-cycle root objects 0", - file="leak.log" - ), - Mplsh( - env={ - "MAPLE_VERIFY_RC": "1", - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O2", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - infile="${APP}.so", - xbootclasspath="libcore-all.so", - redirection="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential early release", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential leak", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects weak rc are wrong", - file="rcverify.log" - ) - ] -} diff --git a/testsuite/driver/src/mode/OPSIR.py b/testsuite/driver/src/mode/OPSIR.py deleted file mode 100644 index 6e430ee43c..0000000000 --- a/testsuite/driver/src/mode/OPSIR.py +++ /dev/null @@ -1,32 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -OPSIR = { - "compile": [ - Irbuild( - irbuild="${OUT_ROOT}/target/product/maple_arm64/bin/bin_OPS/irbuild", - infile="${APP}.mpl" - ), - Irbuild( - irbuild="${OUT_ROOT}/target/product/maple_arm64/bin/bin_OPS/irbuild", - infile="${APP}.irb.mpl" - ), - CheckFileEqual( - file1="${APP}.irb.mpl", - file2="${APP}.irb.irb.mpl" - ) - ] -} \ No newline at end of file diff --git a/testsuite/driver/src/mode/OPS_NATIVE_O0.py b/testsuite/driver/src/mode/OPS_NATIVE_O0.py deleted file mode 100644 index 58a4ab7cd4..0000000000 --- a/testsuite/driver/src/mode/OPS_NATIVE_O0.py +++ /dev/null @@ -1,136 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -OPS_NATIVE_O0 = { - "compile": [ - NativeCompile( - mpldep=[ - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-OPS_O2", - "${OUT_ROOT}/target/product/public/lib/libnativehelper/include" - ], - infile="${NATIVE_SRC}", - model="arm64" - ), - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java","${EXTRA_JAVA_FILE}"] - ), - Dex2mpl( - dex2mpl="${OUT_ROOT}/target/product/maple_arm64/bin/bin_OPS/dex2mpl", - option="--mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-OPS_O0/libcore-all.mplt -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list", - infile="${APP}.dex" - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/bin_OPS/maple --mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-OPS_O0/libcore-all.mplt", - run=["me", "mpl2mpl", "mplcg"], - option={ - "me": "--quiet", - "mpl2mpl": "--quiet --regnativefunc --maplelinker", - "mplcg": "--quiet --no-pie --verbose-asm --maplelinker --fPIC" - }, - global_option="--save-temps --genVtableImpl", - infile="${APP}.mpl" - ), - Linker( - lib="host-x86_64-OPS_O0", - model="arm64", - infile="${APP}", - native_src="${NATIVE_SRC}.cpp" - ) - ], - "run": [ - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "JNI_TEST": "true" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "./", - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-OPS_O0" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "MAPLE_REPORT_RC_LEAK": "1", - "JNI_TEST": "true" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "./", - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-OPS_O0" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="leak.log" - ), - CheckRegContain( - reg="Total none-cycle root objects 0", - file="leak.log" - ), - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "MAPLE_VERIFY_RC": "1", - "JNI_TEST": "true" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "./", - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-OPS_O0" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - infile="${APP}.so", - xbootclasspath="libcore-all.so", - redirection="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential early release", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential leak", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects weak rc are wrong", - file="rcverify.log" - ) - ] -} \ No newline at end of file diff --git a/testsuite/driver/src/mode/OPS_NATIVE_O2.py b/testsuite/driver/src/mode/OPS_NATIVE_O2.py deleted file mode 100644 index 8bc60727c5..0000000000 --- a/testsuite/driver/src/mode/OPS_NATIVE_O2.py +++ /dev/null @@ -1,133 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -OPS_NATIVE_O2 = { - "compile": [ - NativeCompile( - mpldep=[ - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-OPS_O2", - "${OUT_ROOT}/target/product/public/lib/libnativehelper/include" - ], - infile="${NATIVE_SRC}", - model="arm64" - ), - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java","${EXTRA_JAVA_FILE}"] - ), - Dex2mpl( - dex2mpl="${OUT_ROOT}/target/product/maple_arm64/bin/bin_OPS/dex2mpl", - option="--mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-OPS_O2/libcore-all.mplt -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list", - infile="${APP}.dex" - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/bin_OPS/maple --mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-OPS_O2/libcore-all.mplt", - run=["me", "mpl2mpl", "mplcg"], - option={ - "me": "-O2 --quiet", - "mpl2mpl": "-O2 --quiet --regnativefunc --no-nativeopt --maplelinker", - "mplcg": "--quiet -O2 --no-pie --verbose-asm --maplelinker --fPIC" - }, - global_option="--save-temps --genVtableImpl", - infile="${APP}.mpl" - ), - Linker( - lib="host-x86_64-OPS_O2", - model="arm64", - infile="${APP}", - native_src="${NATIVE_SRC}.cpp" - ) - ], - "run": [ - Mplsh( - env={ - "JNI_TEST": "true" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "./", - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-OPS_O2" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Mplsh( - env={ - "MAPLE_REPORT_RC_LEAK": "1", - "JNI_TEST": "true" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "./", - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-OPS_O2" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="leak.log" - ), - CheckRegContain( - reg="Total none-cycle root objects 0", - file="leak.log" - ), - Mplsh( - env={ - "MAPLE_VERIFY_RC": "1", - "JNI_TEST": "true" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "./", - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-OPS_O2" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - infile="${APP}.so", - xbootclasspath="libcore-all.so", - redirection="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential early release", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential leak", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects weak rc are wrong", - file="rcverify.log" - ) - ] -} \ No newline at end of file diff --git a/testsuite/driver/src/mode/OPS_O0.py b/testsuite/driver/src/mode/OPS_O0.py deleted file mode 100644 index 7c1097023d..0000000000 --- a/testsuite/driver/src/mode/OPS_O0.py +++ /dev/null @@ -1,124 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -OPS_O0 = { - "compile": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java","${EXTRA_JAVA_FILE}"] - ), - Dex2mpl( - dex2mpl="${OUT_ROOT}/target/product/maple_arm64/bin/bin_OPS/dex2mpl", - option="--mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-OPS_O0/libcore-all.mplt -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list", - infile="${APP}.dex" - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/bin_OPS/maple --mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-OPS_O0/libcore-all.mplt", - run=["me", "mpl2mpl", "mplcg"], - option={ - "me": "--quiet", - "mpl2mpl": "--quiet --regnativefunc --maplelinker", - "mplcg": "--quiet --no-pie --verbose-asm --maplelinker --fPIC" - }, - global_option="--save-temps --genVtableImpl", - infile="${APP}.mpl" - ), - Linker( - lib="host-x86_64-OPS_O0", - model="arm64", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-OPS_O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "MAPLE_REPORT_RC_LEAK": "1" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-OPS_O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="leak.log" - ), - CheckRegContain( - reg="Total none-cycle root objects 0", - file="leak.log" - ), - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "MAPLE_VERIFY_RC": "1" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-OPS_O0", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - infile="${APP}.so", - xbootclasspath="libcore-all.so", - redirection="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential early release", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential leak", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects weak rc are wrong", - file="rcverify.log" - ) - ] -} \ No newline at end of file diff --git a/testsuite/driver/src/mode/OPS_O2.py b/testsuite/driver/src/mode/OPS_O2.py deleted file mode 100644 index a51491069c..0000000000 --- a/testsuite/driver/src/mode/OPS_O2.py +++ /dev/null @@ -1,119 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -OPS_O2 = { - "compile": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java","${EXTRA_JAVA_FILE}"] - ), - Dex2mpl( - dex2mpl="${OUT_ROOT}/target/product/maple_arm64/bin/bin_OPS/dex2mpl", - option="--mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-OPS_O2/libcore-all.mplt -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list", - infile="${APP}.dex" - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/bin_OPS/maple --mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-OPS_O2/libcore-all.mplt", - run=["me", "mpl2mpl", "mplcg"], - option={ - "me": "-O2 --quiet", - "mpl2mpl": "-O2 --quiet --regnativefunc --no-nativeopt --maplelinker", - "mplcg": "--quiet -O2 --no-pie --verbose-asm --maplelinker --fPIC" - }, - global_option="--save-temps --genVtableImpl", - infile="${APP}.mpl" - ), - Linker( - lib="host-x86_64-OPS_O2", - model="arm64", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-OPS_O2", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Mplsh( - env={ - "MAPLE_REPORT_RC_LEAK": "1" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-OPS_O2", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="leak.log" - ), - CheckRegContain( - reg="Total none-cycle root objects 0", - file="leak.log" - ), - Mplsh( - env={ - "MAPLE_VERIFY_RC": "1", - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-OPS_O2", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - infile="${APP}.so", - xbootclasspath="libcore-all.so", - redirection="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential early release", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential leak", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects weak rc are wrong", - file="rcverify.log" - ) - ] -} \ No newline at end of file diff --git a/testsuite/driver/src/mode/PANDA_ZTERP.py b/testsuite/driver/src/mode/PANDA_ZTERP.py deleted file mode 100644 index bf94cc1933..0000000000 --- a/testsuite/driver/src/mode/PANDA_ZTERP.py +++ /dev/null @@ -1,103 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -PANDA_ZTERP = { - "compile": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java","${EXTRA_JAVA_FILE}"] - ), - Class2panda( - class2panda="${OUT_ROOT}/target/product/public/bin/c2p", - infile=".", - outfile="${APP}.bin" - ) - ], - "run": [ - Mplsh( - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-ZTERP", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.bin", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Mplsh( - env={ - "MAPLE_REPORT_RC_LEAK": "1" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-ZTERP", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.bin", - redirection="leak.log" - ), - CheckRegContain( - reg="Total none-cycle root objects 0", - file="leak.log" - ), - Mplsh( - env={ - "MAPLE_VERIFY_RC": "1", - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-ZTERP", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.bin", - redirection="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential early release", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential leak", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects weak rc are wrong", - file="rcverify.log" - ) - ] -} \ No newline at end of file diff --git a/testsuite/driver/src/mode/RC.py b/testsuite/driver/src/mode/RC.py deleted file mode 100644 index a5b833493e..0000000000 --- a/testsuite/driver/src/mode/RC.py +++ /dev/null @@ -1,79 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * -from env_var import EnvVar - -RC = { - "compile": [ - BenchmarkVogar(), - Shell( - "mv ${BENCHMARK_ACTION}/${BENCHMARK_ACTION}.dex.jar ${BENCHMARK_ACTION}/${BENCHMARK_ACTION}.jar;" - "if [ -d \"${BENCHMARK_ACTION}/dex\" ]; then" - " rm -rf ${BENCHMARK_ACTION}/dex;" - "fi;" - "unzip -q ${BENCHMARK_ACTION}/${BENCHMARK_ACTION}.jar -d ${BENCHMARK_ACTION}/dex" - ), - Maple( - maple="${MAPLE_ROOT}/../out/soong/host/linux-x86/bin/maple", - run=["dex2mpl"], - option={ - "dex2mpl": "-checktool -check-invoke -invoke-checklist=${MAPLE_ROOT}/mrt/codetricks/profile.pv/classloaderInvocation.list -check-incomplete -incomplete-whitelist=${MAPLE_ROOT}/mrt/codetricks/compile/incomplete.list -incomplete-detail -staticstringcheck --inlinefunclist=${MAPLE_ROOT}/mrt/codetricks/profile.pv/to_inline.list -dexcatch -litprofile=${MAPLE_ROOT}/mrt/codetricks/profile.pv/meta.list -output=${BENCHMARK_ACTION}/dex/ -mplt=${MAPLE_ROOT}/../out/soong/.intermediates/vendor/huawei/maple/Lib/core/libmaplecore-all/android_arm64_armv8-a_core_shared/obj/classes.mplt" - }, - global_option="", - infile="${BENCHMARK_ACTION}/dex/classes.dex" - ), - Maple( - maple="${MAPLE_ROOT}/../out/soong/host/linux-x86/bin/maple", - run=["mplipa"], - option={ - "mplipa": "--effectipa --quiet --inlinefunclist=${MAPLE_ROOT}/mrt/codetricks/profile.pv/inline_funcs.list" - }, - global_option="", - infile="${BENCHMARK_ACTION}/dex/classes.mpl > /dev/null" - ), - Maple( - maple="${MAPLE_ROOT}/../out/soong/host/linux-x86/bin/maple", - run=["me", "mpl2mpl", "mplcg"], - option={ - "me": "--inlinefunclist=${MAPLE_ROOT}/mrt/codetricks/profile.pv/inline_funcs.list -O2 --quiet --no-ignoreipa", - "mpl2mpl": "-regnativefunc --quiet -O2 --usewhiteclass --maplelinker --dump-muid --check_cl_invocation=${MAPLE_ROOT}/mrt/codetricks/profile.pv/classloaderInvocation.list --regnative-dynamic-only", - "mplcg": "-O2 --quiet --no-pie --nativeopt --verbose-asm --gen-c-macro-def --maplelinker --gsrc --duplicate_asm_list2=${MAPLE_ROOT}/mrt/compiler-rt/src/arch/arm64/fastFuncs.S --fPIC" - }, - global_option="--genVtableImpl", - infile="${BENCHMARK_ACTION}/dex/classes.mpl" - ), - Shell( - "${MAPLE_ROOT}/../prebuilts/clang/host/linux-x86/clang-r353983c/bin/clang -target aarch64-linux-android -g -c -x assembler-with-cpp -D__ASSEMBLY__ -DUSE_32BIT_REF -MD -MF ${BENCHMARK_ACTION}/dex/classes.d -o ${BENCHMARK_ACTION}/dex/classes.o ${BENCHMARK_ACTION}/dex/classes.VtableImpl.s" - ), - Shell( - "${MAPLE_ROOT}/../prebuilts/clang/host/linux-x86/clang-r353983c/bin/llvm-objcopy --rename-section .debug_info=.maple_java_debug_info --rename-section .debug_abbrev=.maple_java_debug_abbrev --rename-section .debug_line=.maple_java_debug_line --rename-section .debug_aranges=.maple_java_debug_aranges --rename-section .debug_ranges=.maple_java_debug_ranges ${BENCHMARK_ACTION}/dex/classes.o" - ), - Shell( - "${MAPLE_ROOT}/../prebuilts/clang/host/linux-x86/clang-r353983c/bin/clang++ -nostdlib -Wl,-soname,libmaple${BENCHMARK_ACTION}.so -Wl,--gc-sections -shared ${MAPLE_ROOT}/../out/soong/.intermediates/bionic/libc/crtbegin_so/android_arm64_armv8-a_core/crtbegin_so.o ${BENCHMARK_ACTION}/dex/classes.o -Wl,--whole-archive ${MAPLE_ROOT}/../out/target/product/generic_a15/obj/STATIC_LIBRARIES/mrt_module_init_intermediates/mrt_module_init.a -Wl,--no-whole-archive ${MAPLE_ROOT}/../out/target/product/generic_a15/obj/STATIC_LIBRARIES/libclang_rt.ubsan_minimal-aarch64-android_intermediates/libclang_rt.ubsan_minimal-aarch64-android.a ${MAPLE_ROOT}/../prebuilts/clang/host/linux-x86/clang-r353983c/lib64/clang/9.0.3/lib/linux//libclang_rt.builtins-aarch64-android.a ${MAPLE_ROOT}/../out/target/product/generic_a15/obj/STATIC_LIBRARIES/libatomic_intermediates/libatomic.a ${MAPLE_ROOT}/../out/target/product/generic_a15/obj/STATIC_LIBRARIES/libgcc_intermediates/libgcc.a -Wl,-z,noexecstack -Wl,-z,relro -Wl,-z,now -Wl,--build-id=md5 -Wl,--warn-shared-textrel -Wl,--fatal-warnings -Wl,--no-undefined-version -Wl,--exclude-libs,libgcc.a -Wl,--exclude-libs,libgcc_stripped.a -fuse-ld=lld -Wl,--hash-style=gnu -Wl,--icf=safe -Wl,-z,max-page-size=4096 -target aarch64-linux-android -B${MAPLE_ROOT}/../prebuilts/gcc/linux-x86/aarch64/aarch64-linux-android-4.9/aarch64-linux-android/bin -Wl,-T,${MAPLE_ROOT}/mrt/maplert/linker/maplelld.so.lds -Wl,-execute-only -Wl,--exclude-libs,libclang_rt.ubsan_minimal-aarch64-android.a -Wl,--no-undefined ${MAPLE_ROOT}/../out/target/product/generic_a15/obj/SHARED_LIBRARIES/libmaplecore-all_intermediates/libmaplecore-all.so ${MAPLE_ROOT}/../out/target/product/generic_a15/obj/SHARED_LIBRARIES/libmrt_intermediates/libmrt.so ${MAPLE_ROOT}/../out/target/product/generic_a15/obj/SHARED_LIBRARIES/libcommon_bridge_intermediates/libcommon_bridge.so ${MAPLE_ROOT}/../out/target/product/generic_a15/obj/SHARED_LIBRARIES/libc++_intermediates/libc++.so ${MAPLE_ROOT}/../out/target/product/generic_a15/obj/SHARED_LIBRARIES/libc_intermediates/libc.so ${MAPLE_ROOT}/../out/target/product/generic_a15/obj/SHARED_LIBRARIES/libm_intermediates/libm.so ${MAPLE_ROOT}/../out/target/product/generic_a15/obj/SHARED_LIBRARIES/libdl_intermediates/libdl.so -o ${BENCHMARK_ACTION}/dex/libmaple${BENCHMARK_ACTION}Symbol.so ${MAPLE_ROOT}/../out/soong/.intermediates/bionic/libc/crtend_so/android_arm64_armv8-a_core/obj/bionic/libc/arch-common/bionic/crtend_so.o" - ), - Shell( - "CLANG_BIN=${MAPLE_ROOT}/../prebuilts/clang/host/linux-x86/clang-r353983c/bin CROSS_COMPILE=${MAPLE_ROOT}/../prebuilts/gcc/linux-x86/aarch64/aarch64-linux-android-4.9/bin/aarch64-linux-android- XZ=${MAPLE_ROOT}/../prebuilts/build-tools/linux-x86/bin/xz ${MAPLE_ROOT}/../build/soong/scripts/strip.sh -i ${BENCHMARK_ACTION}/dex/libmaple${BENCHMARK_ACTION}Symbol.so -o ${BENCHMARK_ACTION}/dex/libmaple${BENCHMARK_ACTION}.so -d ${BENCHMARK_ACTION}/dex/libmaple${BENCHMARK_ACTION}.so.d --keep-mini-debug-info" - ), - Shell( - "(${MAPLE_ROOT}/../prebuilts/gcc/linux-x86/aarch64/aarch64-linux-android-4.9/bin/aarch64-linux-android-readelf -d ${BENCHMARK_ACTION}/dex/libmaple${BENCHMARK_ACTION}.so | grep SONAME || echo \"No SONAME for ${BENCHMARK_ACTION}/dex/libmaple${BENCHMARK_ACTION}.so\") > ${BENCHMARK_ACTION}/dex/libmaple${BENCHMARK_ACTION}.so.toc.tmp;" - "${MAPLE_ROOT}/../prebuilts/gcc/linux-x86/aarch64/aarch64-linux-android-4.9/bin/aarch64-linux-android-readelf --dyn-syms ${BENCHMARK_ACTION}/dex/libmaple${BENCHMARK_ACTION}.so | awk '{$2=\"\"; $3=\"\"; print}' >> ${BENCHMARK_ACTION}/dex/libmaple${BENCHMARK_ACTION}.so.toc.tmp;" - "mv ${BENCHMARK_ACTION}/dex/libmaple${BENCHMARK_ACTION}.so.toc.tmp ${BENCHMARK_ACTION}/dex/libmaple${BENCHMARK_ACTION}.so.toc;" - "cp ${BENCHMARK_ACTION}/dex/libmaple${BENCHMARK_ACTION}.so ${BENCHMARK_ACTION}" - ), - ], - "native_compile": [ - BenchmarkNative() - ] -} diff --git a/testsuite/driver/src/mode/REFINECATCH.py b/testsuite/driver/src/mode/REFINECATCH.py deleted file mode 100644 index a7160d71eb..0000000000 --- a/testsuite/driver/src/mode/REFINECATCH.py +++ /dev/null @@ -1,29 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -REFINECATCH = { - "compile": [ - Smali2dex( - file=["${APP}.smali"] - ), - Dex2mpl( - dex2mpl="${OUT_ROOT}/target/product/maple_arm64/bin/dex2mpl", - option="--mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O2/libcore-all.mplt -litprofile=${OUT_ROOT}/target/product/maple_arm64/lib/codetricks/profile.pv/meta.list -refine-catch -dumpdataflow -func=${FUNC}", - infile="${APP}.dex", - redirection="dex2mpl.log" - ) - ] -} \ No newline at end of file diff --git a/testsuite/driver/src/mode/SELF.py b/testsuite/driver/src/mode/SELF.py deleted file mode 100644 index c1b577abaf..0000000000 --- a/testsuite/driver/src/mode/SELF.py +++ /dev/null @@ -1,17 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -SELF = {} \ No newline at end of file diff --git a/testsuite/driver/src/mode/STATICSTRING.py b/testsuite/driver/src/mode/STATICSTRING.py deleted file mode 100644 index 36353211ee..0000000000 --- a/testsuite/driver/src/mode/STATICSTRING.py +++ /dev/null @@ -1,34 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -STATICSTRING = { - "compile": [ - Jar2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/framework_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/services_intermediates/classes.jar" - ], - infile="${APP}.jar" - ), - Dex2mpl( - dex2mpl="${OUT_ROOT}/target/product/maple_arm64/bin/dex2mpl", - option="--mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O2/libcore-all.mplt -litprofile=${OUT_ROOT}/target/product/maple_arm64/lib/codetricks/profile.pv/meta.list -staticstringcheck", - infile="${APP}.dex" - ) - ] -} \ No newline at end of file diff --git a/testsuite/driver/src/mode/STATICSTRINGWRONG.py b/testsuite/driver/src/mode/STATICSTRINGWRONG.py deleted file mode 100644 index 6f7c13fe82..0000000000 --- a/testsuite/driver/src/mode/STATICSTRINGWRONG.py +++ /dev/null @@ -1,40 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -STATICSTRINGWRONG = { - "compile": [ - Jar2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/framework_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/services_intermediates/classes.jar" - ], - infile="${APP}.jar" - ), - Dex2mpl( - dex2mpl="${OUT_ROOT}/target/product/maple_arm64/bin/dex2mpl", - option="--mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-O2/libcore-all.mplt -litprofile=${OUT_ROOT}/target/product/maple_arm64/lib/codetricks/profile.pv/meta.list -staticstringcheck", - infile="${APP}.dex", - redirection="dex2mpl.log", - return_value_list=[] - ), - CheckRegContain( - reg="@HiLogConstString Error Usage Occured!!!", - file="dex2mpl.log" - ), - ] -} \ No newline at end of file diff --git a/testsuite/driver/src/mode/TGCO0.py b/testsuite/driver/src/mode/TGCO0.py deleted file mode 100644 index 622a85f833..0000000000 --- a/testsuite/driver/src/mode/TGCO0.py +++ /dev/null @@ -1,61 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -TGCO0 = { - "compile": [ - Shell( - "adb shell \"mkdir -p /data/maple/${CASE}/${OPT}\"" - ), - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java","${EXTRA_JAVA_FILE}"] - ), - Shell( - "adb push ${APP}.dex /data/maple/${CASE}/${OPT}/" - ), - Shell( - "adb shell \"/data/maple/maple -O0 --gconly --save-temps --hir2mpl-opt=\\\"-Xbootclasspath /apex/com.android.runtime/javalib/core-oj.jar,/apex/com.android.runtime/javalib/core-libart.jar\\\" --mplcg-opt=\\\"--no-ebo --no-cfgo --no-schedule\\\" --infile /data/maple/${CASE}/${OPT}/${APP}.dex\"" - ), - Shell( - "adb pull /data/maple/${CASE}/${OPT}/${APP}.VtableImpl.s ./" - ), - Shell( - "${MAPLE_ROOT}/zeiss/prebuilt/sdk/android-ndk-r20b/toolchains/llvm/prebuilt/linux-x86_64/bin/aarch64-linux-android29-clang++ -O2 -x assembler-with-cpp -march=armv8-a -DUSE_32BIT_REF -c ${APP}.VtableImpl.s" - ), - Shell( - "${MAPLE_ROOT}/zeiss/prebuilt/sdk/android-ndk-r20b/toolchains/llvm/prebuilt/linux-x86_64/bin/aarch64-linux-android29-clang++ ${APP}.VtableImpl.o -O2 -Wall -Werror -Wno-unused-command-line-argument -fstack-protector-strong -std=c++14 -nostdlibinc -march=armv8-a -fPIC -shared ${MAPLE_ROOT}/out/target/product/maple_arm64/lib/mrt_module_init.cpp -fuse-ld=lld -rdynamic -L${MAPLE_ROOT}/out/target/product/maple_arm64/lib/android -lmaplecore-all -lcommon_bridge -lc++ -lc -lm -ldl -Wl,-T${MAPLE_ROOT}/out/target/product/public/lib/linker/maplelld.so.lds -o ./${APP}.so" - ), - Shell( - "adb push ${APP}.so /data/maple/${CASE}/${OPT}/" - ) - ], - "run": [ - Shell( - "adb shell \"export LD_LIBRARY_PATH=/vendor/lib64:/system/lib64:/data/maple;mplsh -Xgconly -cp /data/maple/${CASE}/${OPT}/${APP}.so ${APP}\" > output.log 2>&1" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Shell( - "adb shell \"rm -rf /data/maple/${CASE}/${OPT}\"" - ) - ] -} \ No newline at end of file diff --git a/testsuite/driver/src/mode/TGCO2.py b/testsuite/driver/src/mode/TGCO2.py deleted file mode 100644 index 5974235117..0000000000 --- a/testsuite/driver/src/mode/TGCO2.py +++ /dev/null @@ -1,61 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -TGCO2 = { - "compile": [ - Shell( - "adb shell \"mkdir -p /data/maple/${CASE}/${OPT}\"" - ), - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java","${EXTRA_JAVA_FILE}"] - ), - Shell( - "adb push ${APP}.dex /data/maple/${CASE}/${OPT}/" - ), - Shell( - "adb shell \"/data/maple/maple -O2 --gconly --save-temps --hir2mpl-opt=\\\"-Xbootclasspath /apex/com.android.runtime/javalib/core-oj.jar,/apex/com.android.runtime/javalib/core-libart.jar\\\" --mplcg-opt=\\\"--no-ebo --no-cfgo --no-schedule\\\" --infile /data/maple/${CASE}/${OPT}/${APP}.dex\"" - ), - Shell( - "adb pull /data/maple/${CASE}/${OPT}/${APP}.VtableImpl.s ./" - ), - Shell( - "${MAPLE_ROOT}/zeiss/prebuilt/sdk/android-ndk-r20b/toolchains/llvm/prebuilt/linux-x86_64/bin/aarch64-linux-android29-clang++ -O2 -x assembler-with-cpp -march=armv8-a -DUSE_32BIT_REF -c ${APP}.VtableImpl.s" - ), - Shell( - "${MAPLE_ROOT}/zeiss/prebuilt/sdk/android-ndk-r20b/toolchains/llvm/prebuilt/linux-x86_64/bin/aarch64-linux-android29-clang++ ${APP}.VtableImpl.o -O2 -Wall -Werror -Wno-unused-command-line-argument -fstack-protector-strong -std=c++14 -nostdlibinc -march=armv8-a -fPIC -shared ${MAPLE_ROOT}/out/target/product/maple_arm64/lib/mrt_module_init.cpp -fuse-ld=lld -rdynamic -L${MAPLE_ROOT}/out/target/product/maple_arm64/lib/android -lmaplecore-all -lcommon_bridge -lc++ -lc -lm -ldl -Wl,-T${MAPLE_ROOT}/out/target/product/public/lib/linker/maplelld.so.lds -o ./${APP}.so" - ), - Shell( - "adb push ${APP}.so /data/maple/${CASE}/${OPT}/" - ) - ], - "run": [ - Shell( - "adb shell \"export LD_LIBRARY_PATH=/vendor/lib64:/system/lib64:/data/maple;mplsh -Xgconly -cp /data/maple/${CASE}/${OPT}/${APP}.so ${APP}\" > output.log 2>&1" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Shell( - "adb shell \"rm -rf /data/maple/${CASE}/${OPT}\"" - ) - ] -} \ No newline at end of file diff --git a/testsuite/driver/src/mode/TIME.py b/testsuite/driver/src/mode/TIME.py deleted file mode 100644 index b63c5da268..0000000000 --- a/testsuite/driver/src/mode/TIME.py +++ /dev/null @@ -1,107 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -TIME = { - "compile": [ - Shell( - "OUTDIR=output;" - "mkdir -p ${OUTDIR}" - ), - Shell( - "num=1;" - "TIMES=5;" - "cpu_list=(0 1 2 3 4 5 6 7);" - "cpu_governor=\'userspace\';" - "offline_cpu_list=(4 5 6 7);" - "enable_cpu_list=(0 1 2 3);" - "cpu_freq=1805000" - ), - Shell( - "for offline_cpu in ${offline_cpu_list[@]}; do" - " adb shell \"echo 0 > /sys/devices/system/cpu/cpu${offline_cpu}/online\";" - "done" - ), - Shell( - "for enable_cpu in ${enable_cpu_list[@]}; do" - " adb shell \"echo $cpu_freq > /sys/devices/system/cpu/cpu${enable_cpu}/cpufreq/scaling_max_freq\";" - " adb shell \"echo $cpu_freq > /sys/devices/system/cpu/cpu${enable_cpu}/cpufreq/scaling_min_freq\";" - " adb shell \"echo $cpu_governor > /sys/devices/system/cpu/cpu${enable_cpu}/cpufreq/scaling_governor\";" - " adb shell \"echo $cpu_freq > /sys/devices/system/cpu/cpu${enable_cpu}/cpufreq/scaling_setspeed\";" - "done" - ), - Shell( - "adb shell stop;" - "sleep 20s" - ), - Shell( - "while true; do" - " if [ ${num} -gt ${TIMES} ]; then" - " break;" - " fi" - ), - Shell( - "adb shell \"mkdir -p /data/maple/${CASE}/${OPT}\"" - ), - Shell( - "adb push ${APP}.dex /data/maple/${CASE}/${OPT}/" - ), - Shell( - "adb shell \"(time /data/maple/maple --gconly -O2 --no-with-ipa /data/maple/${CASE}/${OPT}/${APP}.dex --hir2mpl-opt=\\\"-dump-time -no-mpl-file -Xbootclasspath /data/maple/core-oj.jar,/data/maple/core-libart.jar,/data/maple/bouncycastle.jar,/data/maple/apache-xml.jar,/data/maple/framework.jar,/data/maple/ext.jar,/data/maple/telephony-common.jar,/data/maple/voip-common.jar,/data/maple/ims-common.jar,/data/maple/android.test.base.jar,/data/maple/featurelayer-widget.jar,/data/maple/hwEmui.jar,/data/maple/hwPartBasicplatform.jar,/data/maple/telephony-separated.jar,/data/maple/hwTelephony-common.jar,/data/maple/hwPartTelephony.jar,/data/maple/hwPartTelephonyVSim.jar,/data/maple/hwPartTelephonyCust.jar,/data/maple/hwPartTelephonyTimezoneOpt.jar,/data/maple/hwPartTelephonyOpt.jar,/data/maple/hwPartSecurity.jar,/data/maple/hwIms-common.jar,/data/maple/hwPartMedia.jar,/data/maple/hwPartConnectivity.jar,/data/maple/hwPartPowerOffice.jar,/data/maple/hwPartDeviceVirtualization.jar,/data/maple/hwPartAirSharing.jar,/data/maple/hwPartDefaultDFR.jar,/data/maple/hwPartDFR.jar,/data/maple/hwPartMagicWindow.jar,/data/maple/hwframework.jar,/data/maple/com.huawei.nfc.jar,/data/maple/org.ifaa.android.manager.jar,/data/maple/hwaps.jar,/data/maple/servicehost.jar,/data/maple/hwcustIms-common.jar,/data/maple/hwcustTelephony-common.jar,/data/maple/hwIAwareAL.jar,/data/maple/conscrypt.jar,/data/maple/updatable-media.jar,/data/maple/okhttp.jar --java-staticfield-name=smart\\\" --mplcg-opt=\\\"--no-ico --no-cfgo --no-prepeep --no-ebo --no-storeloadopt --no-globalopt --no-schedule --no-proepilogue --no-peep --no-const-fold --no-lsra-hole --with-ra-linear-scan --no-prelsra --no-prespill --no-lsra-hole\\\" -time-phases)\" >& ${OUTDIR}/maple_${APP}_${num}.txt &" - ), - Shell( - "count=1;" - "mkdir -p ${OUTDIR}/mem_out;" - "while true; do" - " pid=`adb shell pidof maple`;" - " if [[ -z ${pid} ]]; then" - " echo \"compile ${APP} ${num} complete\";" - " break;" - " fi;" - " adb shell showmap ${pid} >> ${OUTDIR}/mem_out/mem_${count}.log;" - " ((count++));" - " sleep 0.5;" - "done" - ), - Shell( - "wait;" - "file_list=`ls ${OUTDIR}/mem_out | grep log | uniq`;" - "PSSMAX=0;" - "for file in ${file_list}; do" - " pss=`cat ${OUTDIR}/mem_out/$file | grep TOTAL | awk '{print $3+$9}'`;" - " if [[ ${pss} -ge ${PSSMAX} ]]; then" - " PSSMAX=${pss};" - " fi;" - "done" - ), - Shell( - "echo \"${PSSMAX}\" >> ${OUTDIR}/pss_max_${APP}.txt;" - "rm -rf ${OUTDIR}/mem_out" - ), - Shell( - " adb shell \"rm -rf /data/maple/${CASE}/${OPT}\";" - " num=`expr ${num} + 1`;" - "done" #end while - ), - Shell( - "adb shell start" - ) - ], - "checktime": [ - Shell( - "python3 ${OUT_ROOT}/target/product/public/bin/checker_compiler_time_ci.py -d ${APP} -n 5 -t ${CHECKTIME} -o ${OUTDIR}" #${TIMES} - ) - ] -} diff --git a/testsuite/driver/src/mode/ZRT.py b/testsuite/driver/src/mode/ZRT.py deleted file mode 100644 index ca73446560..0000000000 --- a/testsuite/driver/src/mode/ZRT.py +++ /dev/null @@ -1,115 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -ZRT = { - "compile": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/rt.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java","${EXTRA_JAVA_FILE}"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/maple", - run=["dex2mpl", "mplipa", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-ZRT/libcore-all.mplt -inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/to_inline.list -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list -blacklist-invoke=${OUT_ROOT}/target/product/maple_arm64/lib/invoke-black-dex.list", - "mplipa": "--quiet --effectipa", - "me": "-O2 --quiet --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea", - "mpl2mpl": "-O2 --quiet --regnativefunc --no-nativeopt --maplelinker --FastNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/fastNative.list --CriticalNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/criticalNative.list --nativefunc-property-list=${OUT_ROOT}/target/product/public/lib/codetricks/native_binding/native_func_property.list", - "mplcg": "-O2 --quiet --no-pie --verbose-asm --gen-c-macro-def --maplelinker --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/arch/arm64/duplicateFunc.s --fPIC" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Linker( - lib="host-x86_64-ZRT", - model="arm64", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-ZRT", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Mplsh( - env={ - "MAPLE_REPORT_RC_LEAK": "1" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-ZRT", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="leak.log" - ), - CheckRegContain( - reg="Total none-cycle root objects 0", - file="leak.log" - ), - Mplsh( - env={ - "MAPLE_VERIFY_RC": "1", - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-ZRT", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential early release", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential leak", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects weak rc are wrong", - file="rcverify.log" - ) - ] -} diff --git a/testsuite/driver/src/mode/ZRTNATIVE.py b/testsuite/driver/src/mode/ZRTNATIVE.py deleted file mode 100644 index d8b8835db8..0000000000 --- a/testsuite/driver/src/mode/ZRTNATIVE.py +++ /dev/null @@ -1,131 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -ZRTNATIVE = { - "compile": [ - NativeCompile( - mpldep=[ - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-ZRT", - "${OUT_ROOT}/target/product/public/lib/libnativehelper/include" - ], - infile="${NATIVE_SRC}", - model="arm64" - ), - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/rt.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java","${EXTRA_JAVA_FILE}"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/maple", - run=["dex2mpl","mplipa", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-ZRT/libcore-all.mplt -inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/to_inline.list -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list -blacklist-invoke=${OUT_ROOT}/target/product/maple_arm64/lib/invoke-black-dex.list", - "mplipa": "--quiet --effectipa", - "me": "-O2 --quiet --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea", - "mpl2mpl": "-O2 --quiet --regnativefunc --no-nativeopt --maplelinker --FastNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/fastNative.list --CriticalNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/criticalNative.list --nativefunc-property-list=${OUT_ROOT}/target/product/public/lib/codetricks/native_binding/native_func_property.list", - "mplcg": "-O2 --quiet --no-pie --verbose-asm --gen-c-macro-def --maplelinker --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/arch/arm64/duplicateFunc.s --fPIC" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Linker( - lib="host-x86_64-ZRT", - model="arm64", - infile="${APP}", - ) - ], - "run": [ - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "JNI_TEST": "true" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "./", - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-ZRT" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "MAPLE_REPORT_RC_LEAK": "1", - "JNI_TEST": "true" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "./", - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-ZRT" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="leak.log" - ), - CheckRegContain( - reg="Total none-cycle root objects 0", - file="leak.log" - ), - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "MAPLE_VERIFY_RC": "1", - "JNI_TEST": "true" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "./", - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-ZRT" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential early release", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential leak", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects weak rc are wrong", - file="rcverify.log" - ) - ] -} diff --git a/testsuite/driver/src/mode/ZRTNATIVEEH.py b/testsuite/driver/src/mode/ZRTNATIVEEH.py deleted file mode 100644 index 1e00141f4e..0000000000 --- a/testsuite/driver/src/mode/ZRTNATIVEEH.py +++ /dev/null @@ -1,77 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -ZRTNATIVEEH = { - "compile": [ - NativeCompile( - mpldep=[ - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-ZRT", - "${OUT_ROOT}/target/product/public/lib/libnativehelper/include" - ], - infile="${NATIVE_SRC}", - model="arm64" - ), - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/rt.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/maple", - run=["dex2mpl","mplipa", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-ZRT/libcore-all.mplt -inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/to_inline.list -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list -blacklist-invoke=${OUT_ROOT}/target/product/maple_arm64/lib/invoke-black-dex.list", - "mplipa": "--quiet --effectipa", - "me": "-O2 --quiet --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea", - "mpl2mpl": "-O2 --quiet --regnativefunc --no-nativeopt --maplelinker --FastNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/fastNative.list --CriticalNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/criticalNative.list --nativefunc-property-list=${OUT_ROOT}/target/product/public/lib/codetricks/native_binding/native_func_property.list", - "mplcg": "-O2 --quiet --no-pie --verbose-asm --gen-c-macro-def --maplelinker --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/arch/arm64/duplicateFunc.s --fPIC" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Linker( - lib="host-x86_64-ZRT", - model="arm64", - infile="${APP}", - ) - ], - "run": [ - Mplsh( - env={ - "USE_OLD_STACK_SCAN": "1", - "JNI_TEST": "true" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "./", - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-ZRT" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ) - ] -} diff --git a/testsuite/driver/src/mode/ZRTRC.py b/testsuite/driver/src/mode/ZRTRC.py deleted file mode 100644 index 3791636612..0000000000 --- a/testsuite/driver/src/mode/ZRTRC.py +++ /dev/null @@ -1,78 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -ZRTRC = { - "compile": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/rt.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/maple", - run=["dex2mpl", "mplipa", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-ZRT/libcore-all.mplt -inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/to_inline.list -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list -blacklist-invoke=${OUT_ROOT}/target/product/maple_arm64/lib/invoke-black-dex.list", - "mplipa": "--quiet --effectipa", - "me": "-O2 --quiet --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea", - "mpl2mpl": "-O2 --quiet --regnativefunc --no-nativeopt --maplelinker --FastNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/fastNative.list --CriticalNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/criticalNative.list --nativefunc-property-list=${OUT_ROOT}/target/product/public/lib/codetricks/native_binding/native_func_property.list", - "mplcg": "-O2 --quiet --no-pie --verbose-asm --gen-c-macro-def --maplelinker --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/arch/arm64/duplicateFunc.s --fPIC" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Linker( - lib="host-x86_64-ZRT", - model="arm64", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - env={ - "MAPLE_REPORT_RC_LEAK": "1", - "PATTERN_FROM_BACKUP_TRACING": "1" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-ZRT", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="cycle.log" - ), - CheckRegContain( - reg="ExpectResult", - file="cycle.log" - ), - CheckRegContain( - reg="Total Leak Count 0", - file="cycle.log" - ), - CheckRegContain( - choice="num", - reg="ExpectResult", - file="cycle.log" - ) - ] -} diff --git a/testsuite/driver/src/mode/ZTERP.py b/testsuite/driver/src/mode/ZTERP.py deleted file mode 100644 index 1ce3355cd8..0000000000 --- a/testsuite/driver/src/mode/ZTERP.py +++ /dev/null @@ -1,98 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -ZTERP = { - "compile": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java","${EXTRA_JAVA_FILE}"] - ) - ], - "run": [ - Mplsh( - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-ZTERP", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.dex", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Mplsh( - env={ - "MAPLE_REPORT_RC_LEAK": "1" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-ZTERP", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.dex", - redirection="leak.log" - ), - CheckRegContain( - reg="Total none-cycle root objects 0", - file="leak.log" - ), - Mplsh( - env={ - "MAPLE_VERIFY_RC": "1", - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-ZTERP", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.dex", - redirection="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential early release", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential leak", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects weak rc are wrong", - file="rcverify.log" - ) - ] -} \ No newline at end of file diff --git a/testsuite/driver/src/mode/ZTERPCLASSLOADER.py b/testsuite/driver/src/mode/ZTERPCLASSLOADER.py deleted file mode 100644 index f809cbd6cc..0000000000 --- a/testsuite/driver/src/mode/ZTERPCLASSLOADER.py +++ /dev/null @@ -1,365 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -ZTERPCLASSLOADER = { - "java2dex": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java"] - ) - ], - "compile": [ - Shell( - 'cp ../lib/child.jar ./' - ), - Shell( - 'cp ../lib/parent.jar ./' - ), - Shell( - 'cp ../lib/inject.jar ./' - ), - Jar2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/framework_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/services_intermediates/classes.jar" - ], - infile="child.jar" - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/maple", - run=["dex2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-ZTERP/libcore-all.mplt -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list ", - "me": "", - "mpl2mpl": "--quiet --regnativefunc --maplelinker --FastNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/fastNative.list --CriticalNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/criticalNative.list --nativefunc-property-list=${OUT_ROOT}/target/product/public/lib/codetricks/native_binding/native_func_property.list", - "mplcg": "--quiet --no-pie --verbose-asm --maplelinker --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/arch/arm64/duplicateFunc.s --fPIC" - }, - global_option="--save-temps", - infile="child.dex" - ), - Linker( - lib="host-x86_64-ZTERP", - model="arm64", - infile="child" - ), - Jar2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/framework_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/services_intermediates/classes.jar" - ], - infile="parent.jar" - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/maple", - run=["dex2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-ZTERP/libcore-all.mplt -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list ", - "me": "", - "mpl2mpl": "--quiet --regnativefunc --maplelinker --FastNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/fastNative.list --CriticalNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/criticalNative.list --nativefunc-property-list=${OUT_ROOT}/target/product/public/lib/codetricks/native_binding/native_func_property.list", - "mplcg": "--quiet --no-pie --verbose-asm --maplelinker --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/arch/arm64/duplicateFunc.s --fPIC" - }, - global_option="--save-temps", - infile="parent.dex" - ), - Linker( - lib="host-x86_64-ZTERP", - model="arm64", - infile="parent" - ), - Jar2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/framework_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/services_intermediates/classes.jar" - ], - infile="inject.jar" - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/maple", - run=["dex2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-ZTERP/libcore-all.mplt -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list ", - "me": "", - "mpl2mpl": "--quiet --regnativefunc --maplelinker --FastNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/fastNative.list --CriticalNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/criticalNative.list --nativefunc-property-list=${OUT_ROOT}/target/product/public/lib/codetricks/native_binding/native_func_property.list", - "mplcg": "--quiet --no-pie --verbose-asm --maplelinker --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/arch/arm64/duplicateFunc.s --fPIC" - }, - global_option="--save-temps", - infile="inject.dex" - ), - Linker( - lib="host-x86_64-ZTERP", - model="arm64", - infile="inject" - ), - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/maple", - run=["dex2mpl", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "--mplt ${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-ZTERP/libcore-all.mplt -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list ", - "me": "", - "mpl2mpl": "--quiet --regnativefunc --maplelinker --FastNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/fastNative.list --CriticalNative=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/criticalNative.list --nativefunc-property-list=${OUT_ROOT}/target/product/public/lib/codetricks/native_binding/native_func_property.list", - "mplcg": "--quiet --no-pie --verbose-asm --maplelinker --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/arch/arm64/duplicateFunc.s --fPIC" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Linker( - lib="host-x86_64-ZTERP", - model="arm64", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - env={ - "USE_ZTERP": "true" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-ZTERP", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Mplsh( - env={ - "USE_ZTERP": "true", - "MAPLE_REPORT_RC_LEAK": "1" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-ZTERP", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="leak.log" - ), - CheckRegContain( - reg="Total none-cycle root objects 0", - file="leak.log" - ), - Mplsh( - env={ - "USE_ZTERP": "true", - "MAPLE_VERIFY_RC": "1", - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-ZTERP", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential early release", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential leak", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects weak rc are wrong", - file="rcverify.log" - ), - Mplsh( - env={ - "USE_ZTERP": "true", - "APP_SPECIFY_CLASSPATH": '$(echo ${APP}.so|cut -d "=" -f 2)' - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-ZTERP", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="output.log" - ), - Mplsh( - env={ - "USE_ZTERP": "true", - "APP_SPECIFY_CLASSPATH": '$(echo ${APP}.so|cut -d "=" -f 2)', - "MAPLE_REPORT_RC_LEAK": "1" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-ZTERP", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="leak.log" - ), - Mplsh( - env={ - "USE_ZTERP": "true", - "APP_SPECIFY_CLASSPATH": '$(echo ${APP}.so|cut -d "=" -f 2)', - "MAPLE_VERIFY_RC": "1", - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-ZTERP", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="rcverify.log" - ), - Mplsh( - env={ - "USE_ZTERP": "true", - "APP_SPECIFY_CLASSPATH": '$(echo ${APP}.so|cut -d "=" -f 2)', - "MAPLE_VERIFY_RC": "1", - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-ZTERP", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="rcverify.log" - ), - Mplsh( - env={ - "USE_ZTERP": "true" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-ZTERP", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Mplsh( - env={ - "USE_ZTERP": "true", - "MAPLE_REPORT_RC_LEAK": "1" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-ZTERP", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="leak.log" - ), - CheckRegContain( - reg="Total none-cycle root objects 0", - file="leak.log" - ), - Mplsh( - env={ - "USE_ZTERP": "true", - "MAPLE_VERIFY_RC": "1", - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-ZTERP", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.so", - redirection="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential early release", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential leak", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects weak rc are wrong", - file="rcverify.log" - ) - ] -} diff --git a/testsuite/driver/src/mode/ZTERPDEXSO.py b/testsuite/driver/src/mode/ZTERPDEXSO.py deleted file mode 100644 index 927068e9be..0000000000 --- a/testsuite/driver/src/mode/ZTERPDEXSO.py +++ /dev/null @@ -1,142 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -ZTERPDEXSO = { - "java2dex": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java"] - ) - ], - "java2dex_simplejava": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java"], - usesimplejava=True - ) - ], - "compile": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java"] - ), - Maple( - maple="${OUT_ROOT}/target/product/maple_arm64/bin/maple", - run=["dex2mpl", "mplipa", "me", "mpl2mpl", "mplcg"], - option={ - "dex2mpl": "-mplt=${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-ZTERP/libcore-all.mplt -dexcatch -inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/to_inline.list -j=16 -j100 -litprofile=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/meta.list -refine-catch -staticstringcheck", - "mplipa": "--effectipa --quiet", - "me": "--O2 --quiet --inlinefunclist=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/inline_funcs.list --no-nativeopt --no-ignoreipa --enable-ea", - "mpl2mpl": "--O2 --quiet --regnativefunc --no-nativeopt --maplelinker --maplelinker-nolocal --dump-muid --check_cl_invocation=${OUT_ROOT}/target/product/public/lib/codetricks/profile.pv/classloaderInvocation.list --emitVtableImpl", - "mplcg": "--O2 --quiet --no-pie --verbose-asm --fPIC --gen-c-macro-def --duplicate_asm_list=${OUT_ROOT}/target/product/public/lib/codetricks/asm/duplicateFunc.s --maplelinker --gsrc --nativeopt --replaceasm" - }, - global_option="--save-temps", - infile="${APP}.dex" - ), - Linker( - lib="host-x86_64-ZTERP", - model="arm64", - infile="${APP}" - ) - ], - "run": [ - Mplsh( - env={ - "USE_ZTERP": "true" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-ZTERP", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${CP}", - redirection="output.log" - ), - CheckFileEqual( - file1="output.log", - file2="expected.txt" - ), - Mplsh( - env={ - "USE_ZTERP": "true", - "MAPLE_REPORT_RC_LEAK": "1" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-ZTERP", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${CP}", - redirection="leak.log" - ), - CheckRegContain( - reg="Total none-cycle root objects 0", - file="leak.log" - ), - Mplsh( - env={ - "USE_ZTERP": "true", - "MAPLE_VERIFY_RC": "1" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-ZTERP", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${CP}", - redirection="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential early release", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects potential leak", - file="rcverify.log" - ), - CheckRegContain( - reg="[MS] [RC Verify] total 0 objects weak rc are wrong", - file="rcverify.log" - ) - ] -} diff --git a/testsuite/driver/src/mode/ZTERPRC.py b/testsuite/driver/src/mode/ZTERPRC.py deleted file mode 100644 index 3bbc98786b..0000000000 --- a/testsuite/driver/src/mode/ZTERPRC.py +++ /dev/null @@ -1,61 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -from api import * - -ZTERPRC = { - "compile": [ - Java2dex( - jar_file=[ - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-oj_intermediates/classes.jar", - "${OUT_ROOT}/target/product/public/third-party/JAVA_LIBRARIES/core-libart_intermediates/classes.jar" - ], - outfile="${APP}.dex", - infile=["${APP}.java"] - ) - ], - "run": [ - Mplsh( - env={ - "MAPLE_REPORT_RC_LEAK": "1", - "PATTERN_FROM_BACKUP_TRACING": "1" - }, - qemu="/usr/bin/qemu-aarch64", - qemu_libc="/usr/aarch64-linux-gnu", - qemu_ld_lib=[ - "${OUT_ROOT}/target/product/maple_arm64/third-party", - "${OUT_ROOT}/target/product/maple_arm64/lib/host-x86_64-ZTERP", - "./" - ], - mplsh="${OUT_ROOT}/target/product/maple_arm64/bin/mplsh", - garbage_collection_kind="RC", - xbootclasspath="libcore-all.so", - infile="${APP}.dex", - redirection="cycle.log" - ), - CheckRegContain( - reg="ExpectResult", - file="cycle.log" - ), - CheckRegContain( - reg="Total Leak Count 0", - file="cycle.log" - ), - CheckRegContain( - choice="num", - reg="ExpectResult", - file="cycle.log" - ) - ] -} \ No newline at end of file diff --git a/testsuite/driver/src/mode/__init__.py b/testsuite/driver/src/mode/__init__.py deleted file mode 100644 index b18e0d9c3d..0000000000 --- a/testsuite/driver/src/mode/__init__.py +++ /dev/null @@ -1,26 +0,0 @@ -# -# Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. -# -# OpenArkCompiler is licensed under Mulan PSL v2. -# You can use this software according to the terms and conditions of the Mulan PSL v2. -# -# http://license.coscl.org.cn/MulanPSL2 -# -# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER -# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR -# FIT FOR A PARTICULAR PURPOSE. -# See the Mulan PSL v2 for more details. -# - -import os - -mode_dict = {} -my_dir = os.path.dirname(__file__) -for py in os.listdir(my_dir): - if py == '__init__.py': - continue - - if py.endswith('.py'): - name = py[:-3] - mode = __import__(__name__, globals(), locals(), ['%s' % name]) - mode_dict[name] = getattr(getattr(mode, name), name) -- Gitee