In the Linux kernel, the following vulnerability has been resolved:x86/bugs: Use code segment selector for VERW operandRobert Gill reported below #GP in 32-bit mode when dosemu software wasexecuting vm86() system call: general protection fault: 0000 [#1] PREEMPT SMP CPU: 4 PID: 4610 Comm: dosemu.bin Not tainted 6.6.21-gentoo-x86 #1 Hardware name: Dell Inc. PowerEdge 1950/0H723K, BIOS 2.7.0 10/30/2010 EIP: restore_all_switch_stack+0xbe/0xcf EAX: 00000000 EBX: 00000000 ECX: 00000000 EDX: 00000000 ESI: 00000000 EDI: 00000000 EBP: 00000000 ESP: ff8affdc DS: 0000 ES: 0000 FS: 0000 GS: 0033 SS: 0068 EFLAGS: 00010046 CR0: 80050033 CR2: 00c2101c CR3: 04b6d000 CR4: 000406d0 Call Trace: show_regs+0x70/0x78 die_addr+0x29/0x70 exc_general_protection+0x13c/0x348 exc_bounds+0x98/0x98 handle_exception+0x14d/0x14d exc_bounds+0x98/0x98 restore_all_switch_stack+0xbe/0xcf exc_bounds+0x98/0x98 restore_all_switch_stack+0xbe/0xcfThis only happens in 32-bit mode when VERW based mitigations like MDS/RFDSare enabled. This is because segment registers with an arbitrary user valuecan result in #GP when executing VERW. Intel SDM vol. 2C documents thefollowing behavior for VERW instruction: #GP(0) - If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.CLEAR_CPU_BUFFERS macro executes VERW instruction before returning to userspace. Use %cs selector to reference VERW operand. This ensures VERW willnot #GP for an arbitrary user %ds.[ mingo: Fixed the SOB chain. ]
In the Linux kernel, the following vulnerability has been resolved:x86/bugs: Use code segment selector for VERW operandRobert Gill reported below #GP in 32-bit mode when dosemu software wasexecuting vm86() system call: general protection fault: 0000 [#1] PREEMPT SMP CPU: 4 PID: 4610 Comm: dosemu.bin Not tainted 6.6.21-gentoo-x86 #1 Hardware name: Dell Inc. PowerEdge 1950/0H723K, BIOS 2.7.0 10/30/2010 EIP: restore_all_switch_stack+0xbe/0xcf EAX: 00000000 EBX: 00000000 ECX: 00000000 EDX: 00000000 ESI: 00000000 EDI: 00000000 EBP: 00000000 ESP: ff8affdc DS: 0000 ES: 0000 FS: 0000 GS: 0033 SS: 0068 EFLAGS: 00010046 CR0: 80050033 CR2: 00c2101c CR3: 04b6d000 CR4: 000406d0 Call Trace: show_regs+0x70/0x78 die_addr+0x29/0x70 exc_general_protection+0x13c/0x348 exc_bounds+0x98/0x98 handle_exception+0x14d/0x14d exc_bounds+0x98/0x98 restore_all_switch_stack+0xbe/0xcf exc_bounds+0x98/0x98 restore_all_switch_stack+0xbe/0xcfThis only happens in 32-bit mode when VERW based mitigations like MDS/RFDSare enabled. This is because segment registers with an arbitrary user valuecan result in #GP when executing VERW. Intel SDM vol. 2C documents thefollowing behavior for VERW instruction: #GP(0) - If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.CLEAR_CPU_BUFFERS macro executes VERW instruction before returning to userspace. Use %cs selector to reference VERW operand. This ensures VERW willnot #GP for an arbitrary user %ds.[ mingo: Fixed the SOB chain. ]
In the Linux kernel, the following vulnerability has been resolved:x86/bugs: Use code segment selector for VERW operandRobert Gill reported below #GP in 32-bit mode when dosemu software wasexecuting vm86() system call: general protection fault: 0000 [#1] PREEMPT SMP CPU: 4 PID: 4610 Comm: dosemu.bin Not tainted 6.6.21-gentoo-x86 #1 Hardware name: Dell Inc. PowerEdge 1950/0H723K, BIOS 2.7.0 10/30/2010 EIP: restore_all_switch_stack+0xbe/0xcf EAX: 00000000 EBX: 00000000 ECX: 00000000 EDX: 00000000 ESI: 00000000 EDI: 00000000 EBP: 00000000 ESP: ff8affdc DS: 0000 ES: 0000 FS: 0000 GS: 0033 SS: 0068 EFLAGS: 00010046 CR0: 80050033 CR2: 00c2101c CR3: 04b6d000 CR4: 000406d0 Call Trace: show_regs+0x70/0x78 die_addr+0x29/0x70 exc_general_protection+0x13c/0x348 exc_bounds+0x98/0x98 handle_exception+0x14d/0x14d exc_bounds+0x98/0x98 restore_all_switch_stack+0xbe/0xcf exc_bounds+0x98/0x98 restore_all_switch_stack+0xbe/0xcfThis only happens in 32-bit mode when VERW based mitigations like MDS/RFDSare enabled. This is because segment registers with an arbitrary user valuecan result in #GP when executing VERW. Intel SDM vol. 2C documents thefollowing behavior for VERW instruction: #GP(0) - If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.CLEAR_CPU_BUFFERS macro executes VERW instruction before returning to userspace. Use %cs selector to reference VERW operand. This ensures VERW willnot #GP for an arbitrary user %ds.[ mingo: Fixed the SOB chain. ]
In the Linux kernel, the following vulnerability has been resolved:x86/bugs: Use code segment selector for VERW operandRobert Gill reported below #GP in 32-bit mode when dosemu software wasexecuting vm86() system call: general protection fault: 0000 [#1] PREEMPT SMP CPU: 4 PID: 4610 Comm: dosemu.bin Not tainted 6.6.21-gentoo-x86 #1 Hardware name: Dell Inc. PowerEdge 1950/0H723K, BIOS 2.7.0 10/30/2010 EIP: restore_all_switch_stack+0xbe/0xcf EAX: 00000000 EBX: 00000000 ECX: 00000000 EDX: 00000000 ESI: 00000000 EDI: 00000000 EBP: 00000000 ESP: ff8affdc DS: 0000 ES: 0000 FS: 0000 GS: 0033 SS: 0068 EFLAGS: 00010046 CR0: 80050033 CR2: 00c2101c CR3: 04b6d000 CR4: 000406d0 Call Trace: show_regs+0x70/0x78 die_addr+0x29/0x70 exc_general_protection+0x13c/0x348 exc_bounds+0x98/0x98 handle_exception+0x14d/0x14d exc_bounds+0x98/0x98 restore_all_switch_stack+0xbe/0xcf exc_bounds+0x98/0x98 restore_all_switch_stack+0xbe/0xcfThis only happens in 32-bit mode when VERW based mitigations like MDS/RFDSare enabled. This is because segment registers with an arbitrary user valuecan result in #GP when executing VERW. Intel SDM vol. 2C documents thefollowing behavior for VERW instruction: #GP(0) - If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.CLEAR_CPU_BUFFERS macro executes VERW instruction before returning to userspace. Use %cs selector to reference VERW operand. This ensures VERW willnot #GP for an arbitrary user %ds.[ mingo: Fixed the SOB chain. ]
In the Linux kernel, the following vulnerability has been resolved:x86/bugs: Use code segment selector for VERW operandRobert Gill reported below #GP in 32-bit mode when dosemu software wasexecuting vm86() system call: general protection fault: 0000 [#1] PREEMPT SMP CPU: 4 PID: 4610 Comm: dosemu.bin Not tainted 6.6.21-gentoo-x86 #1 Hardware name: Dell Inc. PowerEdge 1950/0H723K, BIOS 2.7.0 10/30/2010 EIP: restore_all_switch_stack+0xbe/0xcf EAX: 00000000 EBX: 00000000 ECX: 00000000 EDX: 00000000 ESI: 00000000 EDI: 00000000 EBP: 00000000 ESP: ff8affdc DS: 0000 ES: 0000 FS: 0000 GS: 0033 SS: 0068 EFLAGS: 00010046 CR0: 80050033 CR2: 00c2101c CR3: 04b6d000 CR4: 000406d0 Call Trace: show_regs+0x70/0x78 die_addr+0x29/0x70 exc_general_protection+0x13c/0x348 exc_bounds+0x98/0x98 handle_exception+0x14d/0x14d exc_bounds+0x98/0x98 restore_all_switch_stack+0xbe/0xcf exc_bounds+0x98/0x98 restore_all_switch_stack+0xbe/0xcfThis only happens in 32-bit mode when VERW based mitigations like MDS/RFDSare enabled. This is because segment registers with an arbitrary user valuecan result in #GP when executing VERW. Intel SDM vol. 2C documents thefollowing behavior for VERW instruction: #GP(0) - If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.CLEAR_CPU_BUFFERS macro executes VERW instruction before returning to userspace. Use %cs selector to reference VERW operand. This ensures VERW willnot #GP for an arbitrary user %ds.[ mingo: Fixed the SOB chain. ]
In the Linux kernel, the following vulnerability has been resolved:x86/bugs: Use code segment selector for VERW operandRobert Gill reported below #GP in 32-bit mode when dosemu software wasexecuting vm86() system call: general protection fault: 0000 [#1] PREEMPT SMP CPU: 4 PID: 4610 Comm: dosemu.bin Not tainted 6.6.21-gentoo-x86 #1 Hardware name: Dell Inc. PowerEdge 1950/0H723K, BIOS 2.7.0 10/30/2010 EIP: restore_all_switch_stack+0xbe/0xcf EAX: 00000000 EBX: 00000000 ECX: 00000000 EDX: 00000000 ESI: 00000000 EDI: 00000000 EBP: 00000000 ESP: ff8affdc DS: 0000 ES: 0000 FS: 0000 GS: 0033 SS: 0068 EFLAGS: 00010046 CR0: 80050033 CR2: 00c2101c CR3: 04b6d000 CR4: 000406d0 Call Trace: show_regs+0x70/0x78 die_addr+0x29/0x70 exc_general_protection+0x13c/0x348 exc_bounds+0x98/0x98 handle_exception+0x14d/0x14d exc_bounds+0x98/0x98 restore_all_switch_stack+0xbe/0xcf exc_bounds+0x98/0x98 restore_all_switch_stack+0xbe/0xcfThis only happens in 32-bit mode when VERW based mitigations like MDS/RFDSare enabled. This is because segment registers with an arbitrary user valuecan result in #GP when executing VERW. Intel SDM vol. 2C documents thefollowing behavior for VERW instruction: #GP(0) - If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.CLEAR_CPU_BUFFERS macro executes VERW instruction before returning to userspace. Use %cs selector to reference VERW operand. This ensures VERW willnot #GP for an arbitrary user %ds.[ mingo: Fixed the SOB chain. ]
In the Linux kernel, the following vulnerability has been resolved:x86/bugs: Use code segment selector for VERW operandRobert Gill reported below #GP in 32-bit mode when dosemu software wasexecuting vm86() system call: general protection fault: 0000 [#1] PREEMPT SMP CPU: 4 PID: 4610 Comm: dosemu.bin Not tainted 6.6.21-gentoo-x86 #1 Hardware name: Dell Inc. PowerEdge 1950/0H723K, BIOS 2.7.0 10/30/2010 EIP: restore_all_switch_stack+0xbe/0xcf EAX: 00000000 EBX: 00000000 ECX: 00000000 EDX: 00000000 ESI: 00000000 EDI: 00000000 EBP: 00000000 ESP: ff8affdc DS: 0000 ES: 0000 FS: 0000 GS: 0033 SS: 0068 EFLAGS: 00010046 CR0: 80050033 CR2: 00c2101c CR3: 04b6d000 CR4: 000406d0 Call Trace: show_regs+0x70/0x78 die_addr+0x29/0x70 exc_general_protection+0x13c/0x348 exc_bounds+0x98/0x98 handle_exception+0x14d/0x14d exc_bounds+0x98/0x98 restore_all_switch_stack+0xbe/0xcf exc_bounds+0x98/0x98 restore_all_switch_stack+0xbe/0xcfThis only happens in 32-bit mode when VERW based mitigations like MDS/RFDSare enabled. This is because segment registers with an arbitrary user valuecan result in #GP when executing VERW. Intel SDM vol. 2C documents thefollowing behavior for VERW instruction: #GP(0) - If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.CLEAR_CPU_BUFFERS macro executes VERW instruction before returning to userspace. Use %cs selector to reference VERW operand. This ensures VERW willnot #GP for an arbitrary user %ds.[ mingo: Fixed the SOB chain. ]
In the Linux kernel, the following vulnerability has been resolved:x86/bugs: Use code segment selector for VERW operandRobert Gill reported below #GP in 32-bit mode when dosemu software wasexecuting vm86() system call: general protection fault: 0000 [#1] PREEMPT SMP CPU: 4 PID: 4610 Comm: dosemu.bin Not tainted 6.6.21-gentoo-x86 #1 Hardware name: Dell Inc. PowerEdge 1950/0H723K, BIOS 2.7.0 10/30/2010 EIP: restore_all_switch_stack+0xbe/0xcf EAX: 00000000 EBX: 00000000 ECX: 00000000 EDX: 00000000 ESI: 00000000 EDI: 00000000 EBP: 00000000 ESP: ff8affdc DS: 0000 ES: 0000 FS: 0000 GS: 0033 SS: 0068 EFLAGS: 00010046 CR0: 80050033 CR2: 00c2101c CR3: 04b6d000 CR4: 000406d0 Call Trace: show_regs+0x70/0x78 die_addr+0x29/0x70 exc_general_protection+0x13c/0x348 exc_bounds+0x98/0x98 handle_exception+0x14d/0x14d exc_bounds+0x98/0x98 restore_all_switch_stack+0xbe/0xcf exc_bounds+0x98/0x98 restore_all_switch_stack+0xbe/0xcfThis only happens in 32-bit mode when VERW based mitigations like MDS/RFDSare enabled. This is because segment registers with an arbitrary user valuecan result in #GP when executing VERW. Intel SDM vol. 2C documents thefollowing behavior for VERW instruction: #GP(0) - If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.CLEAR_CPU_BUFFERS macro executes VERW instruction before returning to userspace. Use %cs selector to reference VERW operand. This ensures VERW willnot #GP for an arbitrary user %ds.[ mingo: Fixed the SOB chain. ]
In the Linux kernel, the following vulnerability has been resolved:x86/bugs: Use code segment selector for VERW operandRobert Gill reported below #GP in 32-bit mode when dosemu software wasexecuting vm86() system call: general protection fault: 0000 [#1] PREEMPT SMP CPU: 4 PID: 4610 Comm: dosemu.bin Not tainted 6.6.21-gentoo-x86 #1 Hardware name: Dell Inc. PowerEdge 1950/0H723K, BIOS 2.7.0 10/30/2010 EIP: restore_all_switch_stack+0xbe/0xcf EAX: 00000000 EBX: 00000000 ECX: 00000000 EDX: 00000000 ESI: 00000000 EDI: 00000000 EBP: 00000000 ESP: ff8affdc DS: 0000 ES: 0000 FS: 0000 GS: 0033 SS: 0068 EFLAGS: 00010046 CR0: 80050033 CR2: 00c2101c CR3: 04b6d000 CR4: 000406d0 Call Trace: show_regs+0x70/0x78 die_addr+0x29/0x70 exc_general_protection+0x13c/0x348 exc_bounds+0x98/0x98 handle_exception+0x14d/0x14d exc_bounds+0x98/0x98 restore_all_switch_stack+0xbe/0xcf exc_bounds+0x98/0x98 restore_all_switch_stack+0xbe/0xcfThis only happens in 32-bit mode when VERW based mitigations like MDS/RFDSare enabled. This is because segment registers with an arbitrary user valuecan result in #GP when executing VERW. Intel SDM vol. 2C documents thefollowing behavior for VERW instruction: #GP(0) - If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.CLEAR_CPU_BUFFERS macro executes VERW instruction before returning to userspace. Use %cs selector to reference VERW operand. This ensures VERW willnot #GP for an arbitrary user %ds.[ mingo: Fixed the SOB chain. ]
In the Linux kernel, the following vulnerability has been resolved:x86/bugs: Use code segment selector for VERW operandRobert Gill reported below #GP in 32-bit mode when dosemu software wasexecuting vm86() system call: general protection fault: 0000 [#1] PREEMPT SMP CPU: 4 PID: 4610 Comm: dosemu.bin Not tainted 6.6.21-gentoo-x86 #1 Hardware name: Dell Inc. PowerEdge 1950/0H723K, BIOS 2.7.0 10/30/2010 EIP: restore_all_switch_stack+0xbe/0xcf EAX: 00000000 EBX: 00000000 ECX: 00000000 EDX: 00000000 ESI: 00000000 EDI: 00000000 EBP: 00000000 ESP: ff8affdc DS: 0000 ES: 0000 FS: 0000 GS: 0033 SS: 0068 EFLAGS: 00010046 CR0: 80050033 CR2: 00c2101c CR3: 04b6d000 CR4: 000406d0 Call Trace: show_regs+0x70/0x78 die_addr+0x29/0x70 exc_general_protection+0x13c/0x348 exc_bounds+0x98/0x98 handle_exception+0x14d/0x14d exc_bounds+0x98/0x98 restore_all_switch_stack+0xbe/0xcf exc_bounds+0x98/0x98 restore_all_switch_stack+0xbe/0xcfThis only happens in 32-bit mode when VERW based mitigations like MDS/RFDSare enabled. This is because segment registers with an arbitrary user valuecan result in #GP when executing VERW. Intel SDM vol. 2C documents thefollowing behavior for VERW instruction: #GP(0) - If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.CLEAR_CPU_BUFFERS macro executes VERW instruction before returning to userspace. Use %cs selector to reference VERW operand. This ensures VERW willnot #GP for an arbitrary user %ds.[ mingo: Fixed the SOB chain. ]
In the Linux kernel, the following vulnerability has been resolved:x86/bugs: Use code segment selector for VERW operandRobert Gill reported below #GP in 32-bit mode when dosemu software wasexecuting vm86() system call: general protection fault: 0000 [#1] PREEMPT SMP CPU: 4 PID: 4610 Comm: dosemu.bin Not tainted 6.6.21-gentoo-x86 #1 Hardware name: Dell Inc. PowerEdge 1950/0H723K, BIOS 2.7.0 10/30/2010 EIP: restore_all_switch_stack+0xbe/0xcf EAX: 00000000 EBX: 00000000 ECX: 00000000 EDX: 00000000 ESI: 00000000 EDI: 00000000 EBP: 00000000 ESP: ff8affdc DS: 0000 ES: 0000 FS: 0000 GS: 0033 SS: 0068 EFLAGS: 00010046 CR0: 80050033 CR2: 00c2101c CR3: 04b6d000 CR4: 000406d0 Call Trace: show_regs+0x70/0x78 die_addr+0x29/0x70 exc_general_protection+0x13c/0x348 exc_bounds+0x98/0x98 handle_exception+0x14d/0x14d exc_bounds+0x98/0x98 restore_all_switch_stack+0xbe/0xcf exc_bounds+0x98/0x98 restore_all_switch_stack+0xbe/0xcfThis only happens in 32-bit mode when VERW based mitigations like MDS/RFDSare enabled. This is because segment registers with an arbitrary user valuecan result in #GP when executing VERW. Intel SDM vol. 2C documents thefollowing behavior for VERW instruction: #GP(0) - If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.CLEAR_CPU_BUFFERS macro executes VERW instruction before returning to userspace. Use %cs selector to reference VERW operand. This ensures VERW willnot #GP for an arbitrary user %ds.[ mingo: Fixed the SOB chain. ]The Linux kernel CVE team has assigned CVE-2024-50072 to this issue.
In the Linux kernel, the following vulnerability has been resolved:x86/bugs: Use code segment selector for VERW operandRobert Gill reported below #GP in 32-bit mode when dosemu software wasexecuting vm86() system call: general protection fault: 0000 [#1] PREEMPT SMP CPU: 4 PID: 4610 Comm: dosemu.bin Not tainted 6.6.21-gentoo-x86 #1 Hardware name: Dell Inc. PowerEdge 1950/0H723K, BIOS 2.7.0 10/30/2010 EIP: restore_all_switch_stack+0xbe/0xcf EAX: 00000000 EBX: 00000000 ECX: 00000000 EDX: 00000000 ESI: 00000000 EDI: 00000000 EBP: 00000000 ESP: ff8affdc DS: 0000 ES: 0000 FS: 0000 GS: 0033 SS: 0068 EFLAGS: 00010046 CR0: 80050033 CR2: 00c2101c CR3: 04b6d000 CR4: 000406d0 Call Trace: show_regs+0x70/0x78 die_addr+0x29/0x70 exc_general_protection+0x13c/0x348 exc_bounds+0x98/0x98 handle_exception+0x14d/0x14d exc_bounds+0x98/0x98 restore_all_switch_stack+0xbe/0xcf exc_bounds+0x98/0x98 restore_all_switch_stack+0xbe/0xcfThis only happens in 32-bit mode when VERW based mitigations like MDS/RFDSare enabled. This is because segment registers with an arbitrary user valuecan result in #GP when executing VERW. Intel SDM vol. 2C documents thefollowing behavior for VERW instruction: #GP(0) - If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.CLEAR_CPU_BUFFERS macro executes VERW instruction before returning to userspace. Use %cs selector to reference VERW operand. This ensures VERW willnot #GP for an arbitrary user %ds.[ mingo: Fixed the SOB chain. ]
In the Linux kernel, the following vulnerability has been resolved:x86/bugs: Use code segment selector for VERW operandRobert Gill reported below #GP in 32-bit mode when dosemu software wasexecuting vm86() system call: general protection fault: 0000 [#1] PREEMPT SMP CPU: 4 PID: 4610 Comm: dosemu.bin Not tainted 6.6.21-gentoo-x86 #1 Hardware name: Dell Inc. PowerEdge 1950/0H723K, BIOS 2.7.0 10/30/2010 EIP: restore_all_switch_stack+0xbe/0xcf EAX: 00000000 EBX: 00000000 ECX: 00000000 EDX: 00000000 ESI: 00000000 EDI: 00000000 EBP: 00000000 ESP: ff8affdc DS: 0000 ES: 0000 FS: 0000 GS: 0033 SS: 0068 EFLAGS: 00010046 CR0: 80050033 CR2: 00c2101c CR3: 04b6d000 CR4: 000406d0 Call Trace: show_regs+0x70/0x78 die_addr+0x29/0x70 exc_general_protection+0x13c/0x348 exc_bounds+0x98/0x98 handle_exception+0x14d/0x14d exc_bounds+0x98/0x98 restore_all_switch_stack+0xbe/0xcf exc_bounds+0x98/0x98 restore_all_switch_stack+0xbe/0xcfThis only happens in 32-bit mode when VERW based mitigations like MDS/RFDSare enabled. This is because segment registers with an arbitrary user valuecan result in #GP when executing VERW. Intel SDM vol. 2C documents thefollowing behavior for VERW instruction: #GP(0) - If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.CLEAR_CPU_BUFFERS macro executes VERW instruction before returning to userspace. Use %cs selector to reference VERW operand. This ensures VERW willnot #GP for an arbitrary user %ds.[ mingo: Fixed the SOB chain. ]The Linux kernel CVE team has assigned CVE-2024-50072 to this issue.
In the Linux kernel, the following vulnerability has been resolved:x86/bugs: Use code segment selector for VERW operandRobert Gill reported below #GP in 32-bit mode when dosemu software wasexecuting vm86() system call: general protection fault: 0000 [#1] PREEMPT SMP CPU: 4 PID: 4610 Comm: dosemu.bin Not tainted 6.6.21-gentoo-x86 #1 Hardware name: Dell Inc. PowerEdge 1950/0H723K, BIOS 2.7.0 10/30/2010 EIP: restore_all_switch_stack+0xbe/0xcf EAX: 00000000 EBX: 00000000 ECX: 00000000 EDX: 00000000 ESI: 00000000 EDI: 00000000 EBP: 00000000 ESP: ff8affdc DS: 0000 ES: 0000 FS: 0000 GS: 0033 SS: 0068 EFLAGS: 00010046 CR0: 80050033 CR2: 00c2101c CR3: 04b6d000 CR4: 000406d0 Call Trace: show_regs+0x70/0x78 die_addr+0x29/0x70 exc_general_protection+0x13c/0x348 exc_bounds+0x98/0x98 handle_exception+0x14d/0x14d exc_bounds+0x98/0x98 restore_all_switch_stack+0xbe/0xcf exc_bounds+0x98/0x98 restore_all_switch_stack+0xbe/0xcfThis only happens in 32-bit mode when VERW based mitigations like MDS/RFDSare enabled. This is because segment registers with an arbitrary user valuecan result in #GP when executing VERW. Intel SDM vol. 2C documents thefollowing behavior for VERW instruction: #GP(0) - If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.CLEAR_CPU_BUFFERS macro executes VERW instruction before returning to userspace. Use %cs selector to reference VERW operand. This ensures VERW willnot #GP for an arbitrary user %ds.[ mingo: Fixed the SOB chain. ]
In the Linux kernel, the following vulnerability has been resolved:x86/bugs: Use code segment selector for VERW operandRobert Gill reported below #GP in 32-bit mode when dosemu software wasexecuting vm86() system call: general protection fault: 0000 [#1] PREEMPT SMP CPU: 4 PID: 4610 Comm: dosemu.bin Not tainted 6.6.21-gentoo-x86 #1 Hardware name: Dell Inc. PowerEdge 1950/0H723K, BIOS 2.7.0 10/30/2010 EIP: restore_all_switch_stack+0xbe/0xcf EAX: 00000000 EBX: 00000000 ECX: 00000000 EDX: 00000000 ESI: 00000000 EDI: 00000000 EBP: 00000000 ESP: ff8affdc DS: 0000 ES: 0000 FS: 0000 GS: 0033 SS: 0068 EFLAGS: 00010046 CR0: 80050033 CR2: 00c2101c CR3: 04b6d000 CR4: 000406d0 Call Trace: show_regs+0x70/0x78 die_addr+0x29/0x70 exc_general_protection+0x13c/0x348 exc_bounds+0x98/0x98 handle_exception+0x14d/0x14d exc_bounds+0x98/0x98 restore_all_switch_stack+0xbe/0xcf exc_bounds+0x98/0x98 restore_all_switch_stack+0xbe/0xcfThis only happens in 32-bit mode when VERW based mitigations like MDS/RFDSare enabled. This is because segment registers with an arbitrary user valuecan result in #GP when executing VERW. Intel SDM vol. 2C documents thefollowing behavior for VERW instruction: #GP(0) - If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.CLEAR_CPU_BUFFERS macro executes VERW instruction before returning to userspace. Use %cs selector to reference VERW operand. This ensures VERW willnot #GP for an arbitrary user %ds.[ mingo: Fixed the SOB chain. ]The Linux kernel CVE team has assigned CVE-2024-50072 to this issue.
In the Linux kernel, the following vulnerability has been resolved:x86/bugs: Use code segment selector for VERW operandRobert Gill reported below #GP in 32-bit mode when dosemu software wasexecuting vm86() system call: general protection fault: 0000 [#1] PREEMPT SMP CPU: 4 PID: 4610 Comm: dosemu.bin Not tainted 6.6.21-gentoo-x86 #1 Hardware name: Dell Inc. PowerEdge 1950/0H723K, BIOS 2.7.0 10/30/2010 EIP: restore_all_switch_stack+0xbe/0xcf EAX: 00000000 EBX: 00000000 ECX: 00000000 EDX: 00000000 ESI: 00000000 EDI: 00000000 EBP: 00000000 ESP: ff8affdc DS: 0000 ES: 0000 FS: 0000 GS: 0033 SS: 0068 EFLAGS: 00010046 CR0: 80050033 CR2: 00c2101c CR3: 04b6d000 CR4: 000406d0 Call Trace: show_regs+0x70/0x78 die_addr+0x29/0x70 exc_general_protection+0x13c/0x348 exc_bounds+0x98/0x98 handle_exception+0x14d/0x14d exc_bounds+0x98/0x98 restore_all_switch_stack+0xbe/0xcf exc_bounds+0x98/0x98 restore_all_switch_stack+0xbe/0xcfThis only happens in 32-bit mode when VERW based mitigations like MDS/RFDSare enabled. This is because segment registers with an arbitrary user valuecan result in #GP when executing VERW. Intel SDM vol. 2C documents thefollowing behavior for VERW instruction: #GP(0) - If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.CLEAR_CPU_BUFFERS macro executes VERW instruction before returning to userspace. Use %cs selector to reference VERW operand. This ensures VERW willnot #GP for an arbitrary user %ds.[ mingo: Fixed the SOB chain. ]
In the Linux kernel, the following vulnerability has been resolved:x86/bugs: Use code segment selector for VERW operandRobert Gill reported below #GP in 32-bit mode when dosemu software wasexecuting vm86() system call: general protection fault: 0000 [#1] PREEMPT SMP CPU: 4 PID: 4610 Comm: dosemu.bin Not tainted 6.6.21-gentoo-x86 #1 Hardware name: Dell Inc. PowerEdge 1950/0H723K, BIOS 2.7.0 10/30/2010 EIP: restore_all_switch_stack+0xbe/0xcf EAX: 00000000 EBX: 00000000 ECX: 00000000 EDX: 00000000 ESI: 00000000 EDI: 00000000 EBP: 00000000 ESP: ff8affdc DS: 0000 ES: 0000 FS: 0000 GS: 0033 SS: 0068 EFLAGS: 00010046 CR0: 80050033 CR2: 00c2101c CR3: 04b6d000 CR4: 000406d0 Call Trace: show_regs+0x70/0x78 die_addr+0x29/0x70 exc_general_protection+0x13c/0x348 exc_bounds+0x98/0x98 handle_exception+0x14d/0x14d exc_bounds+0x98/0x98 restore_all_switch_stack+0xbe/0xcf exc_bounds+0x98/0x98 restore_all_switch_stack+0xbe/0xcfThis only happens in 32-bit mode when VERW based mitigations like MDS/RFDSare enabled. This is because segment registers with an arbitrary user valuecan result in #GP when executing VERW. Intel SDM vol. 2C documents thefollowing behavior for VERW instruction: #GP(0) - If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.CLEAR_CPU_BUFFERS macro executes VERW instruction before returning to userspace. Use %cs selector to reference VERW operand. This ensures VERW willnot #GP for an arbitrary user %ds.[ mingo: Fixed the SOB chain. ]The Linux kernel CVE team has assigned CVE-2024-50072 to this issue.
In the Linux kernel, the following vulnerability has been resolved:x86/bugs: Use code segment selector for VERW operandRobert Gill reported below #GP in 32-bit mode when dosemu software wasexecuting vm86() system call: general protection fault: 0000 [#1] PREEMPT SMP CPU: 4 PID: 4610 Comm: dosemu.bin Not tainted 6.6.21-gentoo-x86 #1 Hardware name: Dell Inc. PowerEdge 1950/0H723K, BIOS 2.7.0 10/30/2010 EIP: restore_all_switch_stack+0xbe/0xcf EAX: 00000000 EBX: 00000000 ECX: 00000000 EDX: 00000000 ESI: 00000000 EDI: 00000000 EBP: 00000000 ESP: ff8affdc DS: 0000 ES: 0000 FS: 0000 GS: 0033 SS: 0068 EFLAGS: 00010046 CR0: 80050033 CR2: 00c2101c CR3: 04b6d000 CR4: 000406d0 Call Trace: show_regs+0x70/0x78 die_addr+0x29/0x70 exc_general_protection+0x13c/0x348 exc_bounds+0x98/0x98 handle_exception+0x14d/0x14d exc_bounds+0x98/0x98 restore_all_switch_stack+0xbe/0xcf exc_bounds+0x98/0x98 restore_all_switch_stack+0xbe/0xcfThis only happens in 32-bit mode when VERW based mitigations like MDS/RFDSare enabled. This is because segment registers with an arbitrary user valuecan result in #GP when executing VERW. Intel SDM vol. 2C documents thefollowing behavior for VERW instruction: #GP(0) - If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.CLEAR_CPU_BUFFERS macro executes VERW instruction before returning to userspace. Use %cs selector to reference VERW operand. This ensures VERW willnot #GP for an arbitrary user %ds.[ mingo: Fixed the SOB chain. ]
In the Linux kernel, the following vulnerability has been resolved:x86/bugs: Use code segment selector for VERW operandRobert Gill reported below #GP in 32-bit mode when dosemu software wasexecuting vm86() system call: general protection fault: 0000 [#1] PREEMPT SMP CPU: 4 PID: 4610 Comm: dosemu.bin Not tainted 6.6.21-gentoo-x86 #1 Hardware name: Dell Inc. PowerEdge 1950/0H723K, BIOS 2.7.0 10/30/2010 EIP: restore_all_switch_stack+0xbe/0xcf EAX: 00000000 EBX: 00000000 ECX: 00000000 EDX: 00000000 ESI: 00000000 EDI: 00000000 EBP: 00000000 ESP: ff8affdc DS: 0000 ES: 0000 FS: 0000 GS: 0033 SS: 0068 EFLAGS: 00010046 CR0: 80050033 CR2: 00c2101c CR3: 04b6d000 CR4: 000406d0 Call Trace: show_regs+0x70/0x78 die_addr+0x29/0x70 exc_general_protection+0x13c/0x348 exc_bounds+0x98/0x98 handle_exception+0x14d/0x14d exc_bounds+0x98/0x98 restore_all_switch_stack+0xbe/0xcf exc_bounds+0x98/0x98 restore_all_switch_stack+0xbe/0xcfThis only happens in 32-bit mode when VERW based mitigations like MDS/RFDSare enabled. This is because segment registers with an arbitrary user valuecan result in #GP when executing VERW. Intel SDM vol. 2C documents thefollowing behavior for VERW instruction: #GP(0) - If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.CLEAR_CPU_BUFFERS macro executes VERW instruction before returning to userspace. Use %cs selector to reference VERW operand. This ensures VERW willnot #GP for an arbitrary user %ds.[ mingo: Fixed the SOB chain. ]The Linux kernel CVE team has assigned CVE-2024-50072 to this issue.
