#include "bsp.h"
#include "string.h"
#ifdef USE_PRINTF
#include "string.h"
#include "stdio.h"
#include "stdlib.h"
#include "stdarg.h"
#endif
#ifdef USE_GPIO
/***************************************************************************************************
 * GPIO API
 */
static void _g_set_clk(uint32_t gpiox)
{
    switch (gpiox)
    {
    case (uint32_t)GPIOA:
        RCC_AHB_Peripheral_Clock_Enable(RCC_AHB_PERIPH_GPIOA);
        break;
    case (uint32_t)GPIOB:
        RCC_AHB_Peripheral_Clock_Enable(RCC_AHB_PERIPH_GPIOB);
        break;
    case (uint32_t)GPIOC:
        RCC_AHB_Peripheral_Clock_Enable(RCC_AHB_PERIPH_GPIOC);
        break;
#ifdef GPIOD
    case (uint32_t)GPIOD:
        RCC_AHB_Peripheral_Clock_Enable(RCC_AHB_PERIPH_GPIOD);
        break;
#endif
#ifdef GPIOF
    case (uint32_t)GPIOF:
        RCC_AHB_Peripheral_Clock_Enable(RCC_AHB_PERIPH_GPIOE);
        break;
#endif
#ifdef GPIOE
    case (uint32_t)GPIOE:
        RCC_AHB_Peripheral_Clock_Enable(RCC_AHB_PERIPH_GPIOF);
        break;
#endif
    default:
        break;
    }
}

static void _g_afio_gpio_init(AFIO_GPIO *afio_gpio)
{
    _g_set_clk(afio_gpio->gpiox);
    GPIO_InitType GPIO_InitStructure;
    /* Initialize GPIO_InitStructure */
    GPIO_Structure_Initialize(&GPIO_InitStructure);
    /* Configure USARTx Tx as alternate function push-pull */
    GPIO_InitStructure.Pin = afio_gpio->gpio_pinx;
    GPIO_InitStructure.GPIO_Mode = GPIO_MODE_AF_PP;
    GPIO_InitStructure.GPIO_Alternate = afio_gpio->gpio_af;
    GPIO_Peripheral_Initialize((GPIO_Module *)afio_gpio->gpiox, &GPIO_InitStructure);
}

void _g_afio_gpio_set_af(AFIO_GPIO *afio_gpio, uint32_t af)
{
    afio_gpio->gpio_af = af;
    uint32_t position = 0x00U;
    uint32_t current_pin = 0x00U;
    while (((afio_gpio->gpio_pinx) >> position) != 0)
    {
        /* Get the IO position */
        current_pin = (afio_gpio->gpio_pinx) & (IO_POSITION_MASK << position);
        if (current_pin)
        {
            /* Configure GPIO alternate function */
            GPIO_Alternate_Set((GPIO_Module* )afio_gpio->gpiox, af, position);
        }
        position++;
    }
}

AFIO_GPIO new_afio_gpio(uint32_t gpiox, uint32_t gpio_pinx, uint32_t gpio_afx)
{
    AFIO_GPIO temp;
    temp.gpiox = gpiox;
    temp.gpio_pinx = gpio_pinx;
    temp.gpio_af = gpio_afx;
    temp.init = _g_afio_gpio_init;
    temp.set_af = _g_afio_gpio_set_af;
    temp.init(&temp);
    return temp;
}

static void _g_outputport_init(OutputPort *outputport)
{
    GPIO_InitType GPIO_InitStructure;
    _g_set_clk(outputport->gpiox);
    GPIO_Structure_Initialize(&GPIO_InitStructure);
    GPIO_InitStructure.Pin = outputport->gpio_pinx;
    GPIO_InitStructure.GPIO_Mode = GPIO_MODE_OUT_PP;
    GPIO_InitStructure.GPIO_Current = GPIO_DS_4MA;
    GPIO_Peripheral_Initialize((GPIO_Module *)outputport->gpiox, &GPIO_InitStructure);
}

static void _g_toggle(OutputPort *outputport)
{
    GPIO_Pin_Toggle((GPIO_Module *)outputport->gpiox, outputport->gpio_pinx);
}

static void _g_setbit(OutputPort *outputport)
{
    GPIO_Pins_Set((GPIO_Module *)outputport->gpiox, outputport->gpio_pinx);
}

static void _g_resetbit(OutputPort *outputport)
{
    GPIO_Pins_Reset((GPIO_Module *)outputport->gpiox, outputport->gpio_pinx);
}

OutputPort new_outport(uint32_t gpiox, uint32_t gpio_pinx)
{
    OutputPort temp;
    temp.gpiox = gpiox;
    temp.gpio_pinx = gpio_pinx;
    temp.init = _g_outputport_init;
    temp.set_bit = _g_setbit;
    temp.reset_bit = _g_resetbit;
    temp.toggle = _g_toggle;
    temp.init(&temp);
    return temp;
}

static void _g_input_init(InputPort *inputport)
{
    /* enable the key clock */
    _g_set_clk(inputport->gpiox);
    GPIO_InitType GPIO_InitStructure;
    GPIO_Structure_Initialize(&GPIO_InitStructure);
    GPIO_InitStructure.Pin = inputport->gpio_pinx;
    GPIO_InitStructure.GPIO_Mode = GPIO_MODE_INPUT;
    GPIO_InitStructure.GPIO_Pull = GPIO_PULL_UP;
    GPIO_InitStructure.GPIO_Current = GPIO_DS_4MA;
    GPIO_Peripheral_Initialize((GPIO_Module *)inputport->gpiox, &GPIO_InitStructure);
}

static void _g_exti_init(InputPort *inputport)
{

    // RCC_APB2_Peripheral_Clock_Enable(RCC_APB2_PERIPH_AFIO);

    // /* enable and set key EXTI interrupt to the lowest priority */
    // uint8_t pin_source;
    // uint8_t irqn;
    // switch(inputport->gpio_pinx)
    // {
    //     case GPIO_PIN_0:irqn  = EXTI0_IRQn;    pin_source = EXTI_SOURCE_PIN0; inputport->exit_line = EXTI_0;break;
    //     case GPIO_PIN_1:irqn  = EXTI1_IRQn;    pin_source = EXTI_SOURCE_PIN1; inputport->exit_line = EXTI_1;break;
    //     case GPIO_PIN_2:irqn  = EXTI2_IRQn;    pin_source = EXTI_SOURCE_PIN2;inputport->exit_line = EXTI_2;break;
    //     case GPIO_PIN_3:irqn  = EXTI3_IRQn;    pin_source = EXTI_SOURCE_PIN3;inputport->exit_line = EXTI_3;break;
    //     case GPIO_PIN_4:irqn  = EXTI4_IRQn;    pin_source = EXTI_SOURCE_PIN4;inputport->exit_line = EXTI_4;break;
    //     case GPIO_PIN_5:irqn  = EXTI5_9_IRQn;  pin_source = EXTI_SOURCE_PIN5;inputport->exit_line = EXTI_5;break;
    //     case GPIO_PIN_6:irqn  = EXTI5_9_IRQn;  pin_source = EXTI_SOURCE_PIN6;inputport->exit_line = EXTI_6;break;
    //     case GPIO_PIN_7:irqn  = EXTI5_9_IRQn;  pin_source = EXTI_SOURCE_PIN7;inputport->exit_line = EXTI_7;break;
    //     case GPIO_PIN_8:irqn  = EXTI5_9_IRQn;  pin_source = EXTI_SOURCE_PIN8;inputport->exit_line = EXTI_8;break;
    //     case GPIO_PIN_9:irqn  = EXTI5_9_IRQn;  pin_source = EXTI_SOURCE_PIN9;inputport->exit_line = EXTI_9;break;
    //     case GPIO_PIN_10:irqn = EXTI10_15_IRQn;pin_source = EXTI_SOURCE_PIN10;inputport->exit_line = EXTI_10;break;
    //     case GPIO_PIN_11:irqn = EXTI10_15_IRQn;pin_source = EXTI_SOURCE_PIN11;inputport->exit_line = EXTI_11;break;
    //     case GPIO_PIN_12:irqn = EXTI10_15_IRQn;pin_source = EXTI_SOURCE_PIN12;inputport->exit_line = EXTI_12;break;
    //     case GPIO_PIN_13:irqn = EXTI10_15_IRQn;pin_source = EXTI_SOURCE_PIN13;inputport->exit_line = EXTI_13;break;
    //     case GPIO_PIN_14:irqn = EXTI10_15_IRQn;pin_source = EXTI_SOURCE_PIN14;inputport->exit_line = EXTI_14;break;
    //     case GPIO_PIN_15:irqn = EXTI10_15_IRQn;pin_source = EXTI_SOURCE_PIN15;inputport->exit_line = EXTI_15;break;
    //     default:break;
    // }
    // uint8_t port_source;
    // switch(inputport->gpiox)
    // {
    //     case GPIOA:port_source = EXTI_SOURCE_GPIOA;break;
    //     case GPIOB:port_source = EXTI_SOURCE_GPIOB;break;
    //     case GPIOC:port_source = EXTI_SOURCE_GPIOC;break;
    //     case GPIOD:port_source = EXTI_SOURCE_GPIOD;break;
    //     case GPIOE:port_source = EXTI_SOURCE_GPIOE;break;
    //     case GPIOF:port_source = EXTI_SOURCE_GPIOF;break;
    //     case GPIOG:port_source = EXTI_SOURCE_GPIOG;break;
    //     case GPIOH:port_source = EXTI_SOURCE_GPIOH;break;
    //     case GPIOI:port_source = EXTI_SOURCE_GPIOI;break;
    //     default:break;
    // }
    // nvic_irq_enable(irqn , 0U, 2U);
    // /* connect key EXTI line to key GPIO pin */
    // syscfg_exti_line_config(port_source,pin_source);

    // /* configure key EXTI line */
    // exti_init(inputport->exit_line, EXTI_INTERRUPT, EXTI_TRIG_FALLING);
    // exti_interrupt_flag_clear(inputport->exit_line);
}

static uint8_t _g_read(InputPort *inputport)
{
    return GPIO_Input_Pin_Data_Get((GPIO_Module *)inputport->gpiox, inputport->gpio_pinx);
}

InputPort new_inputport(uint32_t gpiox, uint32_t gpio_pinx, uint8_t inputmode, uint8_t trig_type)
{
    InputPort temp;
    temp.gpiox = gpiox;
    temp.gpio_pinx = gpio_pinx;
    temp.inputmode = inputmode;
    temp.trig_type = trig_type;
    temp.init = _g_input_init;
    temp.read = _g_read;
    temp.init(&temp);
    return temp;
}

InputPort new_inputport_interuput(uint32_t gpiox, uint32_t gpio_pinx, uint8_t trig_type, pfun callback, void *arg)
{
    InputPort temp;
    temp.gpiox = gpiox;
    temp.gpio_pinx = gpio_pinx;
    temp.init = _g_input_init;
    temp.read = _g_read;
    temp.exti_init = _g_exti_init;
    temp.callback = callback;
    temp.arg = arg;
    temp.init(&temp);
    temp.exti_init(&temp);
    return temp;
}

static void _g_opendrainport_init(OpenDrainPort *opendrainport)
{
    _g_set_clk(opendrainport->gpiox);
    GPIO_InitType GPIO_InitStructure;
    GPIO_Structure_Initialize(&GPIO_InitStructure);
    GPIO_InitStructure.Pin = opendrainport->gpio_pinx;
    GPIO_InitStructure.GPIO_Mode = GPIO_MODE_OUT_OD;
    GPIO_InitStructure.GPIO_Current = GPIO_DS_4MA;
    GPIO_Peripheral_Initialize((GPIO_Module *)opendrainport->gpiox, &GPIO_InitStructure);
}

OpenDrainPort new_opendrainport(uint32_t gpiox, uint32_t gpio_pinx)
{
    OpenDrainPort temp;
    temp.gpiox = gpiox;
    temp.gpio_pinx = gpio_pinx;
    temp.init = _g_opendrainport_init;
    temp.input = new_inputport(gpiox, gpio_pinx, 0, 0);
    temp.output = new_outport(gpiox, gpio_pinx);
    temp.read = (uint8_t(*)(OpenDrainPort *))temp.input.read;
    temp.set_bit = (void (*)(OpenDrainPort *))temp.output.set_bit;
    temp.reset_bit = (void (*)(OpenDrainPort *))temp.output.reset_bit;
    temp.toggle = (void (*)(OpenDrainPort *))temp.output.toggle;
    temp.init(&temp);
    return temp;
}

static void _l_on(LED *led)
{
    if (led->level)
    {
        led->outputport.set_bit(&led->outputport);
    }
    else
    {
        led->outputport.reset_bit(&led->outputport);
    }
}

static void _l_off(LED *led)
{
    if (led->level)
    {
        led->outputport.reset_bit(&led->outputport);
    }
    else
    {
        led->outputport.set_bit(&led->outputport);
    }
}

LED new_led(uint32_t gpiox, uint32_t gpio_pinx, uint8_t level)
{
    LED temp;
    temp.level = level;
    temp.outputport = new_outport(gpiox, gpio_pinx);
    temp.toggle = (void (*)(LED *))temp.outputport.toggle;
    temp.on = _l_on;
    temp.off = _l_off;
    temp.outputport.init(&temp.outputport);
    return temp;
}

#ifdef USE_ADC
static void _g_analog_gpio_init(uint32_t gpiox, uint32_t gpio_pinx)
{
    _g_set_clk(gpiox);

    GPIO_InitType GPIO_InitStructure;

    GPIO_Structure_Initialize(&GPIO_InitStructure);
    /* Configure adc input as analog input -------------------------*/
    GPIO_InitStructure.Pin = gpio_pinx;
    GPIO_InitStructure.GPIO_Mode = GPIO_MODE_ANALOG;
    GPIO_Peripheral_Initialize((GPIO_Module *)gpiox, &GPIO_InitStructure);
}
#endif

#endif
#ifdef USE_UART
/***************************************************************************************************
 * UART API
 */

static void _uart_init(UART *uart)
{
    NVIC_InitType NVIC_InitStructure;
    USART_InitType USART_InitStructure;
    switch (uart->uartx)
    {
    case (uint32_t)USART1:
        RCC_APB2_Peripheral_Clock_Enable(RCC_APB2_PERIPH_USART1);
        NVIC_InitStructure.NVIC_IRQChannel = USART1_IRQn;
        break;
    case (uint32_t)USART2:
        RCC_APB1_Peripheral_Clock_Enable(RCC_APB1_PERIPH_USART2);
        NVIC_InitStructure.NVIC_IRQChannel = USART2_IRQn;
        break;
    case (uint32_t)UART3:
        RCC_APB2_Peripheral_Clock_Enable(RCC_APB2_PERIPH_UART3);
        NVIC_InitStructure.NVIC_IRQChannel = UART3_IRQn;
        break;
    case (uint32_t)UART4:
        RCC_APB2_Peripheral_Clock_Enable(RCC_APB2_PERIPH_UART4);
        NVIC_InitStructure.NVIC_IRQChannel = UART4_IRQn;
        break;
    default:
        break;
    }

    NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 7;
    NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;

    USART_InitStructure.BaudRate = uart->baudrate;
    USART_InitStructure.WordLength = USART_WL_8B;
    USART_InitStructure.StopBits = USART_STPB_1;
    USART_InitStructure.Parity = USART_PE_NO;
    USART_InitStructure.HardwareFlowControl = USART_HFCTRL_NONE;
    USART_InitStructure.Mode = USART_MODE_RX | USART_MODE_TX;
    USART_Initializes((USART_Module *)uart->uartx, &USART_InitStructure);
    USART_Enable((USART_Module *)uart->uartx);
    NVIC_Initializes(&NVIC_InitStructure);
}

static void _uart_senddata(UART *uart, uint8_t buf)
{
    while (!USART_Flag_Status_Get((USART_Module *)uart->uartx, USART_FLAG_TXDE) && !USART_Flag_Status_Get((USART_Module *)uart->uartx, USART_FLAG_TXC))
        ;
    USART_Data_Send((USART_Module *)uart->uartx, buf);
}

static void _uart_sendbuf(UART *uart, uint8_t *buf, uint16_t size)
{
    for (uint16_t i = 0; i < size; i++)
    {
        while (!USART_Flag_Status_Get((USART_Module *)uart->uartx, USART_FLAG_TXDE) && !USART_Flag_Status_Get((USART_Module *)uart->uartx, USART_FLAG_TXC))
            ;
        USART_Data_Send((USART_Module *)uart->uartx, buf[i]);
    }
}

static void _uart_sendString(UART *uart, char *buf)
{
    while (*buf != 0)
    {
        while (!USART_Flag_Status_Get((USART_Module *)uart->uartx, USART_FLAG_TXDE) && !USART_Flag_Status_Get((USART_Module *)uart->uartx, USART_FLAG_TXC))
            ;
        USART_Data_Send((USART_Module *)uart->uartx, *buf);
        buf++;
    }
}

static void _uart_setDMA(UART *uart, uint8_t rxortx)
{
    DMA_InitType DMA_InitStructure;
    DMA_ChannelType *dma_ch;
    uint32_t dma_remap = 0;
    RCC_AHB_Peripheral_Clock_Enable(RCC_AHB_PERIPH_DMA);
    if (rxortx == 0)
    {
        switch (uart->uartx)
        {
        case (uint32_t)USART1:
            dma_ch = DMA_CH5;
            dma_remap = DMA_REMAP_USART1_RX;
            break;
        case (uint32_t)USART2:
            dma_remap = DMA_REMAP_USART2_RX;
            break;
        case (uint32_t)UART3:
            dma_remap = DMA_REMAP_UART3_RX;
            break;
        case (uint32_t)UART4:
            dma_remap = DMA_REMAP_UART4_RX;
            break;
        default:
            break;
        }
    }
    else if (rxortx == 1)
    {
        switch (uart->uartx)
        {
        case (uint32_t)USART1:
            dma_ch = DMA_CH4;
            dma_remap = DMA_REMAP_USART1_TX;
            break;
        case (uint32_t)USART2:
            dma_remap = DMA_REMAP_USART2_TX;
            break;
        case (uint32_t)UART3:
            dma_remap = DMA_REMAP_UART3_TX;
            break;
        case (uint32_t)UART4:
            dma_remap = DMA_REMAP_UART4_TX;
            break;
        default:
            break;
        }
    }
    /* USARTy TX DMA1 Channel (triggered by USARTy Tx event) Config */
    DMA_Reset(dma_ch);
    DMA_InitStructure.PeriphAddr = uart->uartx + 0x04;
    //DMA_InitStructure.MemAddr = (uint32_t)buf;
    DMA_InitStructure.Direction = rxortx==1?DMA_DIR_PERIPH_DST:DMA_DIR_PERIPH_SRC;
    //DMA_InitStructure.BufSize = size;
    DMA_InitStructure.PeriphInc = DMA_PERIPH_INC_MODE_DISABLE;
    DMA_InitStructure.MemoryInc = DMA_MEM_INC_MODE_ENABLE;
    DMA_InitStructure.PeriphDataSize = DMA_PERIPH_DATA_WIDTH_BYTE;
    DMA_InitStructure.MemDataSize = DMA_MEM_DATA_WIDTH_BYTE;
    DMA_InitStructure.CircularMode = DMA_CIRCULAR_MODE_DISABLE;
    DMA_InitStructure.Priority = DMA_CH_PRIORITY_HIGHEST;
    DMA_InitStructure.Mem2Mem = DMA_MEM2MEM_DISABLE;
    DMA_Initializes(dma_ch, &DMA_InitStructure);
    DMA_Channel_Request_Remap(dma_ch, dma_remap);
    USART_DMA_Transfer_Enable((USART_Module *)(uart->uartx), rxortx==0?USART_DMAREQ_RX : USART_DMAREQ_TX);
    //DMA_Channel_Enable(dma_ch);
}

void _uart_sendbufDMA(UART *uart,uint8_t *buf,uint16_t len)
{
    uint32_t dma_txc_flag;
    DMA_ChannelType *dma_ch;
    switch (uart->uartx)
    {
    case (uint32_t)USART1:
        dma_txc_flag = DMA_CH5_TXCF;
        dma_ch = DMA_CH4;
        break;
    case (uint32_t)USART2:
        dma_txc_flag = DMA_CH7_TXCF;
        break;
    case (uint32_t)UART3:
        dma_txc_flag = DMA_CH1_TXCF;
        break;
    case (uint32_t)UART4:
        dma_txc_flag = DMA_CH5_TXCF;
        break;
    default:
        break;
    }

    DMA_Channel_Disable(dma_ch);
    DMA_Memory_Address_Config(dma_ch,(uint32_t)buf);
    DMA_Buffer_Size_Config(dma_ch,len);
    DMA_Channel_Enable(dma_ch);
}

void _uart_RecvFixCntDMA(UART *uart,uint8_t *buf,uint16_t size)
{
    DMA_ChannelType *dma_ch;
    switch (uart->uartx)
    {
    case (uint32_t)USART1:
        dma_ch = DMA_CH5;
        break;
    case (uint32_t)USART2:
        break;
    case (uint32_t)UART3:
        break;
    case (uint32_t)UART4:
        break;
    default:
        break;
    }
    uart->recvbuf = buf;
    uart->recvsize = size;
    DMA_Channel_Disable(dma_ch);
    DMA_Memory_Address_Config(dma_ch,(uint32_t)buf);
    DMA_Buffer_Size_Config(dma_ch,size);
    DMA_Channel_Enable(dma_ch);
}

uint16_t _uart_GetDMARecvLen(UART *uart)
{
        DMA_ChannelType *dma_ch;
    switch (uart->uartx)
    {
    case (uint32_t)USART1:
        dma_ch = DMA_CH5;
        break;
    case (uint32_t)USART2:
        break;
    case (uint32_t)UART3:
        break;
    case (uint32_t)UART4:
        break;
    default:
        break;
    }
    return uart->recvsize - DMA_Current_Data_Transfer_Number_Get(dma_ch);
}

#ifdef USE_PRINTF
static void _uart_printf(UART *uart, const char *fmt, ...)
{
    uint16_t len;
    char printfbuf[300];
    memset(printfbuf, 0, 300);
    va_list ap;
    va_start(ap, fmt);
    len = vsprintf(printfbuf, fmt, ap);
    va_end(ap);
    _uart_sendbuf(uart, (uint8_t *)printfbuf, len);
}
#endif
static void _uart_RecvIT(UART *uart, uint8_t *buf, uint16_t size, uint8_t timeout)
{
    if (0 == size)
    {
        return;
    }
    if (0 != buf)
    {
        memset(buf, 0, size);
    }
#ifdef CMSIS_OS
    /* create a binary semaphore used for informing ethernetif of frame reception */
    if (0 == uart->uart_recv_sem)
    {
        osSemaphoreDef(SEM_UART_RX);
        uart->uart_recv_sem = osSemaphoreCreate(osSemaphore(SEM_UART_RX), 1);
        osSemaphoreWait(uart->uart_recv_sem, timeout);
    }
#endif
    uart->recvbuf = buf;
    uart->recvsize = size;
    uart->recvcnt = 0;
    uart->isgetrecv = 0;

    uart->rxtimeoutset = timeout;

    USART_Interrput_Enable((USART_Module *)uart->uartx, USART_INT_RXDNE);
    USART_Flag_Clear((USART_Module *)uart->uartx, USART_INT_RXDNE);
}

#ifdef CMSIS_OS
static uint8_t _uart_waitforrecv(UART *uart, uint32_t waittime)
{
    return osSemaphoreWait(uart->uart_recv_sem, waittime);
}
#endif

void Uart_timeout_Handle(UART *uart)
{
    if (uart->rxtimeoutcnt)
    {
        uart->rxtimeoutcnt++;
        if (uart->rxtimeoutcnt > uart->rxtimeoutset)
        {
            uart->rxtimeoutcnt = 0;
            uart->isgetrecv = 1;
        }
    }
}

static void _uart_RecvFixCntIT(UART *uart, uint8_t *buf, uint16_t size)
{
    if (0 == size)
    {
        return;
    }
    if (0 != buf)
    {
        memset(buf, 0, size);
    }
#ifdef CMSIS_OS
    /* create a binary semaphore used for informing ethernetif of frame reception */
    if (0 == uart->uart_recv_sem)
    {
        osSemaphoreDef(SEM_UART_RX);
        uart->uart_recv_sem = osSemaphoreCreate(osSemaphore(SEM_UART_RX), 1);
        osSemaphoreWait(uart->uart_recv_sem, timeout);
    }
#endif
    uart->recvbuf = buf;
    uart->recvsize = size;
    uart->recvcnt = 0;
    uart->isgetrecv = 0;
    uart->RecvMode = RECV_MODE_FIX_IT;
    /* Enable RXNE and Error interrupts */
    USART_Interrput_Enable((USART_Module *)uart->uartx, USART_INT_RXDNE);
    USART_Flag_Clear((USART_Module *)uart->uartx, USART_INT_RXDNE);
}

void Uart_Interrupt_Handle(UART *uart)
{
    uint8_t temp;
    if (RESET != USART_Flag_Status_Get((USART_Module *)uart->uartx, USART_INT_RXDNE))
    {
        USART_Interrupt_Status_Clear((USART_Module *)uart->uartx, USART_INT_RXDNE);
        /* receive data */
        if (uart->recvcnt < uart->recvsize)
        {
            temp = (USART_Data_Receive((USART_Module *)uart->uartx) & 0xFF);
            *(uart->recvbuf++) = temp;
            uart->recvcnt++;
            uart->rxtimeoutcnt = 1;
        }
    }

    if (uart->recvcnt == uart->recvsize)
    {
        uart->isgetrecv = 1;
#ifdef CMSIS_OS
        osSemaphoreRelease(uart->uart_recv_sem);
#endif
        USART_Interrput_Disable((USART_Module *)(USART_Module *)uart->uartx, USART_INT_RXDNE);
    }

    if (RESET != USART_Flag_Status_Get((USART_Module *)(USART_Module *)uart->uartx, USART_INT_OREF))
    {
        USART_Flag_Clear((USART_Module *)(USART_Module *)uart->uartx, USART_INT_OREF);
    }
}

static void _uart_SetRecvCallBack(UART *uart, pfun callback, void *arg)
{
    if (callback != NULL)
        uart->RecvCallBack = callback;
    if (arg != NULL)
        uart->RecvCBArg = arg;
}

UART new_uart(uint32_t txd_gpiox, uint32_t txd_gpio_pinx, uint32_t rxd_gpiox, uint32_t rxd_gpio_pinx, uint32_t uartx, uint32_t baudrate)
{
    UART temp;

    switch (uartx)
    {
    case (uint32_t)USART1:
        temp.txd_pin = new_afio_gpio(txd_gpiox, txd_gpio_pinx, GPIO_AF5_USART1);
        temp.rxd_pin = new_afio_gpio(rxd_gpiox, rxd_gpio_pinx, GPIO_AF5_USART1);
        break;
    case (uint32_t)USART2:
        temp.txd_pin = new_afio_gpio(txd_gpiox, txd_gpio_pinx, GPIO_AF5_USART2);
        temp.rxd_pin = new_afio_gpio(rxd_gpiox, rxd_gpio_pinx, GPIO_AF5_USART2);
        break;
    case (uint32_t)UART3:
        temp.txd_pin = new_afio_gpio(txd_gpiox, txd_gpio_pinx, GPIO_AF10_UART3);
        temp.rxd_pin = new_afio_gpio(rxd_gpiox, rxd_gpio_pinx, GPIO_AF10_UART3);
        break;
    case (uint32_t)UART4:
        temp.txd_pin = new_afio_gpio(txd_gpiox, txd_gpio_pinx, GPIO_AF7_UART4);
        temp.rxd_pin = new_afio_gpio(rxd_gpiox, rxd_gpio_pinx, GPIO_AF7_UART4);
        break;
    default:
        break;
    }

    temp.uartx = uartx;
    temp.baudrate = baudrate;
    temp.init = _uart_init;
    temp.senddata = _uart_senddata;
    temp.sendbuf = _uart_sendbuf;
#ifdef USE_PRINTF
    temp.printf = _uart_printf;
#endif
    temp.sendString = _uart_sendString;
    temp.RecvFixCntIT = _uart_RecvFixCntIT;
    temp.SetRecvCallBack = _uart_SetRecvCallBack;
    temp.RecvTimeoutIT = _uart_RecvIT;
    temp.setDMA = _uart_setDMA;
    temp.sendbufDMA = _uart_sendbufDMA;
    temp.RecvFixCntDMA = _uart_RecvFixCntDMA;
    temp.GetDMARecvLen = _uart_GetDMARecvLen;
    temp.RecvCallBack = NULL;
    temp.RecvCBArg = NULL;
#ifdef CMSIS_OS
    temp.uart_recv_sem = NULL;
    temp.WaitforRecv = _uart_waitforrecv;
#endif
    temp.init(&temp);
    return temp;
}
#endif
#ifdef USE_SPI
static void _s_init(SPI *spi)
{
    spi_parameter_struct spi_init_struct;

    switch (spi->spix)
    {
    case SPI0:
        rcu_periph_clock_enable(RCU_SPI0);
        break;
    case SPI1:
        rcu_periph_clock_enable(RCU_SPI1);
        break;
    case SPI2:
        rcu_periph_clock_enable(RCU_SPI2);
        break;
    default:
        break;
    }

    /* SPI parameter config */
    spi_init_struct.trans_mode = SPI_TRANSMODE_FULLDUPLEX;
    spi_init_struct.device_mode = SPI_MASTER;
    spi_init_struct.frame_size = SPI_FRAMESIZE_8BIT;
    if (spi->mode != 0)
        spi_init_struct.clock_polarity_phase = spi->mode;
    else
        spi_init_struct.clock_polarity_phase = SPI_CK_PL_HIGH_PH_2EDGE;
    spi_init_struct.nss = SPI_NSS_SOFT;
    spi_init_struct.prescale = spi->buadrate;
    spi_init_struct.endian = SPI_ENDIAN_MSB;
    spi_init(spi->spix, &spi_init_struct);
    spi_enable(spi->spix);
}

static uint16_t _s_readwritebyte(SPI *spi, uint16_t byte)
{
    uint8_t retry = 0;
    while (RESET == spi_i2s_flag_get(spi->spix, SPI_FLAG_TBE))
        ;
    {
        retry++;
        if (retry > 200)
            return 0;
    }
    spi_i2s_data_transmit(spi->spix, byte);
    retry = 0;
    while (RESET == spi_i2s_flag_get(spi->spix, SPI_FLAG_RBNE))
        ;
    {
        retry++;
        if (retry > 200)
            return 0;
    }
    return spi_i2s_data_receive(spi->spix);
}

static void _s_setspeed(SPI *spi, uint32_t baud)
{
    // if(baud >CTL0_PSC(7) || baud< CTL0_PSC(0))   //error baudrate
    // return;
    SPI_CTL0(spi->spix) &= 0xFFC7;
    SPI_CTL0(spi->spix) |= baud;
}

static void _s_set_frame_bit(SPI *spi, uint16_t framebit)
{
    spi_i2s_data_frame_format_config(spi->spix, framebit);
}

#if defined(GD32F20X) || defined(GD32F4X0)
static void _s_quad_spi_init(SPI *spi, uint32_t spi_gpio, uint32_t spi_io2_pinx, uint32_t spi_io3_pinx)
{
    if (spi->spix != SPI0)
        return;
    AFIO_GPIO spi_io2 = new_afio_gpio(spi_gpio, spi_io2_pinx, 0);
    AFIO_GPIO spi_io3 = new_afio_gpio(spi_gpio, spi_io3_pinx, 0);
    /* enable quad wire SPI_IO2 and SPI_IO3 pin output */
    qspi_io23_output_enable(SPI0);
}
#endif
SPI new_spi(uint32_t gpiox, uint32_t sck_pinx, uint32_t miso_pinx, uint32_t mosi_pinx, uint32_t spix)
{
    SPI temp;
#if defined(GD32F4XX)

#elif defined(GD32F10X) || defined(GD32F20X)
    if (spix == SPI0 && gpiox == GPIOB)
    {
        rcu_periph_clock_enable(RCU_AF);
        gpio_pin_remap_config(GPIO_SPI0_REMAP, ENABLE);
    }
    temp.sck = new_afio_gpio(gpiox, sck_pinx, 0);
    temp.miso = new_afio_gpio(gpiox, miso_pinx, 0);
    temp.mosi = new_afio_gpio(gpiox, mosi_pinx, 0);
#endif
    temp.spix = spix;
    temp.buadrate = SPI_PSC_32;
    temp.init = _s_init;
    temp.readwritebyte = _s_readwritebyte;
    temp.SetSpeed = _s_setspeed;
    temp.Set_Frame_Bit = _s_set_frame_bit;
#if defined(GD32F20X) || defined(GD32F4X0)
    temp.Quadspi_init = _s_quad_spi_init;
#endif
    temp.init(&temp);
    return temp;
}
#endif

/***************************************************************************************************
 * ADC API
 */
#ifdef USE_ADC
static void _adc_add_chanel(ADC_CTL *adc, uint32_t ch_gpiox, uint32_t ch_gpio_pinx, uint32_t ch, uint32_t SamplingTime)
{
    adc->adc_chanel[adc->used_chanel_num].ch_gpiox = ch_gpiox;
    adc->adc_chanel[adc->used_chanel_num].ch_gpio_pinx = ch_gpio_pinx;
    adc->adc_chanel[adc->used_chanel_num].chx = ch;
    adc->adc_chanel[adc->used_chanel_num].SamplingTime = SamplingTime;
    adc->used_chanel_num++;
}

static void _adc_init(ADC_CTL *adc)
{
    for (uint8_t i = 0; i < adc->used_chanel_num; i++)
    {
        _g_analog_gpio_init(adc->adc_chanel[i].ch_gpiox, adc->adc_chanel[i].ch_gpio_pinx);
    }
    /* Enable ADC clock (core clock) */
    ADC_Clock_Mode_Config(ADC_CKMOD_AHB, RCC_ADCHCLK_DIV16);

    RCC_ADC_1M_Clock_Config(RCC_ADC1MCLK_SRC_HSI, RCC_ADC1MCLK_DIV8); // selsect HSI as RCC ADC1M CLK Source

    RCC_AHB_Peripheral_Clock_Enable(RCC_AHB_PERIPH_ADC);
    adc->IRQn = ADC_IRQn;

    /*## Configuration of ADC hierarchical scope: ADC instance #################*/
    ADC_InitType ADC_InitStructure;
    ADC_Initializes_Structure(&ADC_InitStructure);
    ADC_InitStructure.MultiChEn = ENABLE;
    ADC_InitStructure.ContinueConvEn = DISABLE;
    ADC_InitStructure.DatAlign = ADC_DAT_ALIGN_R;
    ADC_InitStructure.ExtTrigSelect = ADC_EXT_TRIGCONV_REGULAR_SWSTRRCH;
    ADC_InitStructure.ChsNumber = ADC_REGULAR_LEN_1;
    ADC_Initializes(&ADC_InitStructure);

    uint32_t adc_reg_rank = 0;
    ADC_Regular_Channels_Number_Config((adc->used_chanel_num - 1) << 20);
    for (uint8_t i = 0; i < adc->used_chanel_num; i++)
    {
        switch (i)
        {
        case 0:
            adc_reg_rank = ADC_REGULAR_NUMBER_1;
            break;
        case 1:
            adc_reg_rank = ADC_REGULAR_NUMBER_2;
            break;
        case 2:
            adc_reg_rank = ADC_REGULAR_NUMBER_3;
            break;
        case 3:
            adc_reg_rank = ADC_REGULAR_NUMBER_4;
            break;
        case 4:
            adc_reg_rank = ADC_REGULAR_NUMBER_5;
            break;
        case 5:
            adc_reg_rank = ADC_REGULAR_NUMBER_6;
            break;
        case 6:
            adc_reg_rank = ADC_REGULAR_NUMBER_7;
            break;
        case 7:
            adc_reg_rank = ADC_REGULAR_NUMBER_8;
            break;
        case 8:
            adc_reg_rank = ADC_REGULAR_NUMBER_9;
            break;
        case 9:
            adc_reg_rank = ADC_REGULAR_NUMBER_10;
            break;
        case 10:
            adc_reg_rank = ADC_REGULAR_NUMBER_11;
            break;
        case 11:
            adc_reg_rank = ADC_REGULAR_NUMBER_12;
            break;
        case 12:
            adc_reg_rank = ADC_REGULAR_NUMBER_13;
            break;
        case 13:
            adc_reg_rank = ADC_REGULAR_NUMBER_14;
            break;
        case 14:
            adc_reg_rank = ADC_REGULAR_NUMBER_15;
            break;
        case 15:
            adc_reg_rank = ADC_REGULAR_NUMBER_16;
            break;
        }
        switch (adc->adc_chanel[i].chx)
        {
        case 0:
            ADC_Regular_Sequence_Conversion_Number_Config(ADC_CH_0, adc_reg_rank);
            ADC_Channel_Sample_Time_Config(ADC_CH_0, adc->adc_chanel[i].SamplingTime);
            break;
        case 1:
            ADC_Regular_Sequence_Conversion_Number_Config(ADC_CH_1, adc_reg_rank);
            ADC_Channel_Sample_Time_Config(ADC_CH_1, adc->adc_chanel[i].SamplingTime);
            break;
        case 2:
            ADC_Regular_Sequence_Conversion_Number_Config(ADC_CH_2, adc_reg_rank);
            ADC_Channel_Sample_Time_Config(ADC_CH_2, adc->adc_chanel[i].SamplingTime);
            break;
        case 3:
            ADC_Regular_Sequence_Conversion_Number_Config(ADC_CH_3, adc_reg_rank);
            ADC_Channel_Sample_Time_Config(ADC_CH_3, adc->adc_chanel[i].SamplingTime);
            break;
        case 4:
            ADC_Regular_Sequence_Conversion_Number_Config(ADC_CH_4, adc_reg_rank);
            ADC_Channel_Sample_Time_Config(ADC_CH_4, adc->adc_chanel[i].SamplingTime);
            break;
        case 5:
            ADC_Regular_Sequence_Conversion_Number_Config(ADC_CH_5, adc_reg_rank);
            ADC_Channel_Sample_Time_Config(ADC_CH_5, adc->adc_chanel[i].SamplingTime);
            break;
        case 6:
            ADC_Regular_Sequence_Conversion_Number_Config(ADC_CH_6, adc_reg_rank);
            ADC_Channel_Sample_Time_Config(ADC_CH_6, adc->adc_chanel[i].SamplingTime);
            break;
        case 7:
            ADC_Regular_Sequence_Conversion_Number_Config(ADC_CH_7, adc_reg_rank);
            ADC_Channel_Sample_Time_Config(ADC_CH_7, adc->adc_chanel[i].SamplingTime);
            break;
        case 8:
            ADC_Regular_Sequence_Conversion_Number_Config(ADC_CH_8, adc_reg_rank);
            ADC_Channel_Sample_Time_Config(ADC_CH_8, adc->adc_chanel[i].SamplingTime);
            break;
        case 9:
            ADC_Regular_Sequence_Conversion_Number_Config(ADC_CH_9, adc_reg_rank);
            ADC_Channel_Sample_Time_Config(ADC_CH_9, adc->adc_chanel[i].SamplingTime);
            break;
        case 10:
            ADC_Regular_Sequence_Conversion_Number_Config(ADC_CH_10, adc_reg_rank);
            ADC_Channel_Sample_Time_Config(ADC_CH_10, adc->adc_chanel[i].SamplingTime);
            break;
        case 11:
            ADC_Regular_Sequence_Conversion_Number_Config(ADC_CH_11, adc_reg_rank);
            ADC_Channel_Sample_Time_Config(ADC_CH_11, adc->adc_chanel[i].SamplingTime);
            break;
        case 12:
            ADC_Regular_Sequence_Conversion_Number_Config(ADC_CH_12, adc_reg_rank);
            ADC_Channel_Sample_Time_Config(ADC_CH_12, adc->adc_chanel[i].SamplingTime);
            break;
        case 13:
            ADC_Regular_Sequence_Conversion_Number_Config(ADC_CH_13, adc_reg_rank);
            ADC_Channel_Sample_Time_Config(ADC_CH_13, adc->adc_chanel[i].SamplingTime);
            break;
        case 14:
            ADC_Regular_Sequence_Conversion_Number_Config(ADC_CH_14, adc_reg_rank);
            ADC_Channel_Sample_Time_Config(ADC_CH_14, adc->adc_chanel[i].SamplingTime);
            break;
        case 15:
            ADC_Regular_Sequence_Conversion_Number_Config(ADC_CH_15, adc_reg_rank);
            ADC_Channel_Sample_Time_Config(ADC_CH_15, adc->adc_chanel[i].SamplingTime);
            break;
        case 16:
            ADC_Regular_Sequence_Conversion_Number_Config(ADC_CH_16, adc_reg_rank);
            ADC_Channel_Sample_Time_Config(ADC_CH_16, adc->adc_chanel[i].SamplingTime);
            break;
        case 17:
            ADC_Regular_Sequence_Conversion_Number_Config(ADC_CH_17, adc_reg_rank);
            ADC_Channel_Sample_Time_Config(ADC_CH_17, adc->adc_chanel[i].SamplingTime);
            break;
        default:
            break;
        }
    }

    /* Enable ADC */
    ADC_ON();

    /* Check ADC Ready */
    while (ADC_Flag_Status_Get(ADC_RD_FLAG, ADC_FLAG_JENDCA, ADC_FLAG_RDY) == RESET)
        ;

    /* Start ADC1 calibration */
    ADC_Calibration_Operation(ADC_CALIBRATION_ENABLE);
    /* Check the end of ADC1 calibration */
    while (ADC_Calibration_Operation(ADC_CALIBRATION_STS))
        ;
}

static void _adc_SetTrigger(ADC_CTL *adc, uint32_t trig_type, void *trigger)
{
    bpsConfigASSERT(trigger);
    adc->Trigger = trigger;
    ADC_Regular_Group_External_Trigger_Source_Config(trig_type);
    ADC_External_Trigger_Conversion_Config(ADC_EXTTRIGCONV_REGULAR_ENABLE);
}

static void _ADC_Configure_DMA(ADC_CTL *adc)
{
    DMA_InitType DMA_InitStructure;
    /* DMA channel1 configuration ----------------------------------------------*/
    RCC_AHB_Peripheral_Clock_Enable(RCC_AHB_PERIPH_DMA);
    DMA_Reset(DMA_CH1);
    DMA_InitStructure.PeriphAddr = (uint32_t)&ADC->DAT;
    DMA_InitStructure.MemAddr = (uint32_t)adc->buf;
    DMA_InitStructure.Direction = DMA_DIR_PERIPH_SRC;
    DMA_InitStructure.BufSize = adc->bufsize;
    DMA_InitStructure.PeriphInc = DMA_PERIPH_INC_MODE_DISABLE;
    DMA_InitStructure.MemoryInc = DMA_MEM_INC_MODE_ENABLE;
    DMA_InitStructure.PeriphDataSize = DMA_PERIPH_DATA_WIDTH_HALFWORD;
    DMA_InitStructure.MemDataSize = DMA_MEM_DATA_WIDTH_HALFWORD;
    DMA_InitStructure.CircularMode = DMA_CIRCULAR_MODE_ENABLE;
    DMA_InitStructure.Priority = DMA_CH_PRIORITY_HIGH;
    DMA_InitStructure.Mem2Mem = DMA_MEM2MEM_DISABLE;
    DMA_Initializes(DMA_CH1, &DMA_InitStructure);
    DMA_Channel_Request_Remap(DMA_CH1, DMA_REMAP_ADC);
    /* Enable ADC DMA */
    ADC_DMA_Transfer_Enable();
    /* Enable DMA channel1 */
    DMA_Channel_Enable(DMA_CH1);
}

void ADCx_DMA_IRQHandler(ADC_CTL *adc)
{
    /* Check whether DMA transfer complete caused the DMA interruption */
    if (DMA_Interrupt_Status_Get(DMA, DMA_CH1_INT_TXC) == SET)
    {
        /* Clear flag DMA global interrupt */
        /* (global interrupt flag: half transfer and transfer complete flags) */
        DMA_Interrupt_Status_Clear(DMA, DMA_CH1_TXCF);
        /* Call interruption treatment function */
        if (adc->ConvCmpCallback != NULL)
        {
            adc->ConvCmpCallback(adc->ConvCmpCBArg);
        }
    }

    /* Check whether DMA transfer error caused the DMA interruption */
    if (DMA_Interrupt_Status_Get(DMA, DMA_CH1_INT_ERR) == SET)
    {
        /* Clear flag DMA transfer error */
        DMA_Interrupt_Status_Clear(DMA, DMA_CH1_INT_ERR);

        /* Call interruption treatment function */
        // AdcDmaTransferError_Callback();
    }
}

static void _adc_SoftwareTrigger(ADC_CTL *adc)
{

    ADC_Regular_Channels_Software_Conversion_Operation(ADC_EXTRTRIG_SWSTRRCH_ENABLE);

    while (ADC_Flag_Status_Get(ADC_RUN_FLAG, ADC_FLAG_ENDC, ADC_FLAG_RDY) == 0)
        ;
    ADC_Flag_Status_Clear(ADC_FLAG_ENDC);
    ADC_Flag_Status_Clear(ADC_FLAG_STR);
    adc->buf[adc->bufcnt++] = ADC_Regular_Group_Conversion_Data_Get();
    if (adc->bufcnt >= adc->bufsize)
    {
        if (adc->ConvCmpCallback != NULL)
        {
            adc->ConvCmpCallback(adc->ConvCmpCBArg);
        }
        adc->bufcnt = 0;
    }
}

void _adc_StartIT(ADC_CTL *adc, uint32_t priority)
{
    /* Configure NVIC to enable ADC1 interruptions */

    NVIC_InitType NVIC_InitStructure;

    /* Configure and enable ADC interrupt */
    NVIC_InitStructure.NVIC_IRQChannel = ADC_IRQn;
    NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = priority;
    NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
    NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
    NVIC_Initializes(&NVIC_InitStructure);

    ADC_Interrupts_Enable(ADC_INT_ENDC);

    if (((((ADC_Module *)adc->adcx)->CTRL2) & ADC_EXT_TRIGCONV_REGULAR_MASK) == ADC_EXT_TRIGCONV_REGULAR_SWSTRRCH)
    {
        ADC_Regular_Channels_Software_Conversion_Operation(ADC_EXTRTRIG_SWSTRRCH_ENABLE);
    }
    else
    {
        Timer_Base *trigger = (Timer_Base *)adc->Trigger;
        trigger->start(trigger);
    }
}

void _adc_StopIT(ADC_CTL *adc)
{
    NVIC_DisableIRQ(adc->IRQn);
    ADC_Interrupts_Disable(ADC_INT_ENDC);
    if ((((ADC_Module *)adc->adcx)->CTRL2 & ADC_EXT_TRIGCONV_REGULAR_MASK) != ADC_EXT_TRIGCONV_REGULAR_SWSTRRCH)
    {
        Timer_Base *trigger = (Timer_Base *)adc->Trigger;
        trigger->stop(trigger);
    }
}

void _adc_StartDMA(ADC_CTL *adc)
{
    static uint8_t isalreadyconfig;
    if (!isalreadyconfig)
    {
        _ADC_Configure_DMA(adc);
        isalreadyconfig = 1;
    }
    if (((((ADC_Module *)adc->adcx)->CTRL2) & ADC_EXT_TRIGCONV_REGULAR_MASK) == ADC_EXT_TRIGCONV_REGULAR_SWSTRRCH)
    {
        ADC_Regular_Channels_Software_Conversion_Operation(ADC_EXTRTRIG_SWSTRRCH_ENABLE);
    }
}

void ADCx_IRQHandler(ADC_CTL *adc)
{
    bpsConfigASSERT(adc);
    if (ADC_INTFlag_Status_Get(ADC_INT_FLAG_ENDC) != 0)
    {
        /* Clear flag ADC group regular end of sequence conversions */
        ADC_INTFlag_Status_Clear(ADC_INT_FLAG_ENDC);
        adc->buf[adc->bufcnt++] = ADC_Regular_Group_Conversion_Data_Get();
        if (adc->bufcnt >= adc->bufsize)
        {
            adc->StopIT(adc);
            adc->bufcnt = 0;
            if (adc->ConvCmpCallback != NULL)
            {
                adc->ConvCmpCallback(adc->ConvCmpCBArg);
            }
        }
    }
}

static void _adc_SetCallback(ADC_CTL *adc, pfun callback, void *arg)
{
    if (callback != NULL)
        adc->ConvCmpCallback = callback;
    if (arg != NULL)
        adc->ConvCmpCBArg = arg;
}

ADC_CTL new_adc(uint32_t ADCx, uint16_t *buf, uint16_t size)
{
    ADC_CTL temp;
    memset(&temp, 0, sizeof(ADC_CTL));
    temp.adcx = ADCx;
    temp.buf = buf;
    temp.bufsize = size;
    temp.init = _adc_init;
    temp.add_chanel = _adc_add_chanel;
    temp._adc_SoftwareTrigger = _adc_SoftwareTrigger;
    temp.SetTrigger = _adc_SetTrigger;
    temp.SetCallback = _adc_SetCallback;
    temp.StartIT = _adc_StartIT;
    temp.StopIT = _adc_StopIT;
    temp.StartDMA = _adc_StartDMA;
    // temp.StopDMA = _adc_StopDMA;
    return temp;
}

#endif

#ifdef USE_TIMER
static void _timer_base_init(Timer_Base *timer_base, uint32_t clk, uint32_t frq)
{
    /* Enable the timer peripheral clock */
    switch ((uint32_t)timer_base->TIMx)
    {
#ifdef TIM1
    case (uint32_t)TIM1:
        RCC_APB2_Peripheral_Clock_Enable(RCC_APB2_PERIPH_TIM1);
        timer_base->IRQn =
#ifdef TIM16
            TIM1_UP_TIM16_IRQn;
#else
            TIM1_UP_IRQn;
#endif
        break;
#endif
#ifdef TIM2
    case (uint32_t)TIM2:
        RCC_APB1_Peripheral_Clock_Enable(RCC_APB1_PERIPH_TIM2);
        timer_base->IRQn = TIM2_IRQn;
        break;
#endif
#ifdef TIM3
    case (uint32_t)TIM3:
        RCC_APB1_Peripheral_Clock_Enable(RCC_APB1_PERIPH_TIM3);
        timer_base->IRQn = TIM3_IRQn;
        break;
#endif
#ifdef TIM4
    case (uint32_t)TIM4:
        RCC_APB1_Peripheral_Clock_Enable(RCC_APB1_PERIPH_TIM4);
        timer_base->IRQn = TIM4_IRQn;
        break;
#endif
#ifdef TIM5
    case (uint32_t)TIM5:
        RCC_APB1_Peripheral_Clock_Enable(RCC_APB1_PERIPH_TIM5);
        timer_base->IRQn = TIM5_IRQn;
        break;
#endif
#ifdef TIM6
    case (uint32_t)TIM6:
        RCC_APB1_Peripheral_Clock_Enable(RCC_APB1_PERIPH_TIM6);
        timer_base->IRQn =
#ifdef DAC1
            TIM6_DAC1_IRQn;
#else
            TIM6_IRQn;
#endif
        break;
#endif
#ifdef TIM7
    case (uint32_t)TIM7:
        RCC_APB1_Peripheral_Clock_Enable(RCC_APB1_PERIPH_TIM7);
        timer_base->IRQn = TIM7_IRQn;
        break;
#endif
#ifdef TIM8
    case (uint32_t)TIM8:
        RCC_APB2_Peripheral_Clock_Enable(RCC_APB2_PERIPH_TIM8);
        timer_base->IRQn = TIM8_UP_IRQn;
        break;
#endif
    default:
        break;
    }
    TIM_TimeBaseInitType TIM_TimeBaseStructure;

    TIM_Base_Struct_Initialize(&TIM_TimeBaseStructure);

    TIM_TimeBaseStructure.Period = frq;
    TIM_TimeBaseStructure.Prescaler = clk;
    TIM_TimeBaseStructure.ClkDiv = 0;
    TIM_TimeBaseStructure.CntMode = TIM_CNT_MODE_UP;

    TIM_Base_Initialize((TIM_Module *)timer_base->TIMx, &TIM_TimeBaseStructure);
    TIM_Base_Reload_Mode_Set((TIM_Module *)timer_base->TIMx, TIM_PSC_RELOAD_MODE_IMMEDIATE);
    TIM_Slave_Mode_Select((TIM_Module *)timer_base->TIMx, TIM_SLAVE_MODE_TRIG);
    TIM_Output_Trigger_Select((TIM_Module *)timer_base->TIMx, TIM_TRGO_SRC_UPDATE);
}
static void _timer_base_start(Timer_Base *timer_base)
{
    TIM_On((TIM_Module *)timer_base->TIMx);
}

static void _timer_base_startIT(Timer_Base *timer_base, uint32_t priority, void(*handle), void *arg)
{

    timer_base->callback_handler = (pfun)handle;
    timer_base->callback_arg = arg;
    TIM_Interrupt_Enable((TIM_Module *)timer_base->TIMx, TIM_INT_UPDATE);

    NVIC_InitType NVIC_InitStructure;

    NVIC_InitStructure.NVIC_IRQChannel = timer_base->IRQn;
    NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = priority;
    NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
    NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;

    NVIC_Initializes(&NVIC_InitStructure);
    TIM_On((TIM_Module *)timer_base->TIMx);
}

static void _timer_base_StopIT(Timer_Base *timer_base)
{
    /* Disable the update interrupt */
    TIM_Interrupt_Disable((TIM_Module *)timer_base->TIMx, TIM_INT_UPDATE);

    NVIC_DisableIRQ(timer_base->IRQn);
    /* Disable counter */
    TIM_Off((TIM_Module *)timer_base->TIMx);

    timer_base->callback_handler = NULL;
    timer_base->callback_arg = NULL;
}

static void _timer_base_stop(Timer_Base *timer_base)
{
    /* Disable counter */
    TIM_Off((TIM_Module *)timer_base->TIMx);
}

Timer_Base new_timer_base(uint32_t timx, uint32_t clk, uint32_t frq)
{
    Timer_Base temp_timer_base;
    temp_timer_base.TIMx = timx;
    temp_timer_base.init = _timer_base_init;
    temp_timer_base.stop = _timer_base_stop;
    temp_timer_base.start = _timer_base_start;
    temp_timer_base.startIT = _timer_base_startIT;
    temp_timer_base.stopIT = _timer_base_StopIT;
    temp_timer_base.init(&temp_timer_base, clk, frq);
    return temp_timer_base;
}

void TIMx_IRQHandler(Timer_Base *timer_base)
{
    /* Check whether update interrupt is pending */
    if (TIM_Interrupt_Status_Get((TIM_Module *)timer_base->TIMx, TIM_INT_UPDATE) != RESET)
    {
        /* Clear the update interrupt flag*/
        TIM_Interrupt_Status_Clear((TIM_Module *)timer_base->TIMx, TIM_INT_UPDATE);
        if (timer_base->callback_handler != NULL)
            timer_base->callback_handler(timer_base->callback_arg);
    }
}

static void _Pwm_SetPulse(Timer_Pwm *timer_pwm, uint8_t TIM_Channelx, uint16_t pulse)
{
    bpsConfigASSERT(timer_pwm);
//    if (timer_pwm->channel[TIM_Channelx - 1] == 0)
//        return;
    switch (TIM_Channelx)
    {
    case 1:
        TIM_Compare1_Set((TIM_Module *)timer_pwm->timer_Base.TIMx, pulse);
        break;
    case 2:
        TIM_Compare2_Set((TIM_Module *)timer_pwm->timer_Base.TIMx, pulse);
        break;
    case 3:
        TIM_Compare3_Set((TIM_Module *)timer_pwm->timer_Base.TIMx, pulse);
        break;
    case 4:
        TIM_Compare4_Set((TIM_Module *)timer_pwm->timer_Base.TIMx, pulse);
        break;
    default:
        break;
    }
}

static void _pwm_channel_init(Timer_Pwm *timer_pwm, uint8_t TIM_Channelx, uint16_t pwmpulse, uint32_t gpiox, uint32_t gpio_pinx)
{

    bpsConfigASSERT(timer_pwm);

    switch ((uint32_t)timer_pwm->timer_Base.TIMx)
    {
#ifdef TIM1
    case (uint32_t)TIM1:
        if (gpiox != 0 && gpio_pinx != 0)
            timer_pwm->ch_gpio[TIM_Channelx - 1] = new_afio_gpio(gpiox, gpio_pinx, GPIO_AF3_TIM1);
        break;
#endif
#ifdef TIM2
    case (uint32_t)TIM2:
        if (gpiox != 0 && gpio_pinx != 0)
            timer_pwm->ch_gpio[TIM_Channelx - 1] = new_afio_gpio(gpiox, gpio_pinx, GPIO_AF3_TIM2);
        break;
#endif
#ifdef TIM3
    case (uint32_t)TIM3:
        if (gpiox != 0 && gpio_pinx != 0)
            timer_pwm->ch_gpio[TIM_Channelx - 1] = new_afio_gpio(gpiox, gpio_pinx, GPIO_AF3_TIM3);
        break;
#endif
#ifdef TIM4
    case (uint32_t)TIM4:
        if (gpiox != 0 && gpio_pinx != 0)
            timer_pwm->ch_gpio[TIM_Channelx - 1] = new_afio_gpio(gpiox, gpio_pinx, GPIO_AF3_TIM4);
        break;
#endif
#ifdef TIM5
    case (uint32_t)TIM5:
        if (gpiox != 0 && gpio_pinx != 0)
            timer_pwm->ch_gpio[TIM_Channelx - 1] = new_afio_gpio(gpiox, gpio_pinx, GPIO_AF2_TIM5);
        break;
#endif

#ifdef TIM8
    case (uint32_t)TIM8:
        if (gpiox != 0 && gpio_pinx != 0)
            timer_pwm->ch_gpio[TIM_Channelx - 1] = new_afio_gpio(gpiox, gpio_pinx, GPIO_AF1_TIM8);
        break;
#endif
    default:
        break;
    }

    switch (TIM_Channelx)
    {
    case 1:
        timer_pwm->channel[0] = TIM_CH_1 ;
        break;
    case 2:
        timer_pwm->channel[1] = TIM_CH_2;
        break;
    case 3:
        timer_pwm->channel[2] = TIM_CH_3;
        break;
    case 4:
        timer_pwm->channel[3] = TIM_CH_4;
        break;
    default:
        break;
    }
    /*********************************/
    /* Output waveform configuration */
    /*********************************/
    OCInitType TIM_OCInitStructure;
    TIM_Output_Channel_Struct_Initialize(&TIM_OCInitStructure);
    TIM_OCInitStructure.OcMode = TIM_OCMODE_PWM1;
    TIM_OCInitStructure.OutputState = TIM_OUTPUT_STATE_DISABLE;
    TIM_OCInitStructure.OutputNState = TIM_OUTPUT_NSTATE_DISABLE;
    TIM_OCInitStructure.Pulse = pwmpulse;
    TIM_OCInitStructure.OcPolarity = TIM_OC_POLARITY_HIGH;
    TIM_OCInitStructure.OcNPolarity = TIM_OC_POLARITY_HIGH;
    TIM_OCInitStructure.OcIdleState = TIM_OC_IDLE_STATE_SET;
    TIM_OCInitStructure.OcNIdleState = TIM_OCN_IDLE_STATE_RESET;

    switch (TIM_Channelx)
    {
    case 1:
        TIM_Output_Channel1_Initialize((TIM_Module *)timer_pwm->timer_Base.TIMx, &TIM_OCInitStructure);
        break;
    case 2:
        TIM_Output_Channel2_Initialize((TIM_Module *)timer_pwm->timer_Base.TIMx, &TIM_OCInitStructure);
        break;
    case 3:
        TIM_Output_Channel3_Initialize((TIM_Module *)timer_pwm->timer_Base.TIMx, &TIM_OCInitStructure);
        break;
    case 4:
        TIM_Output_Channel4_Initialize((TIM_Module *)timer_pwm->timer_Base.TIMx, &TIM_OCInitStructure);
        break;
    default:
        break;
    }
    TIM_PWM_Output_Enable((TIM_Module *)timer_pwm->timer_Base.TIMx);
}

static void _Pwm_Start(Timer_Pwm *timer_pwm, uint8_t TIM_Channelx)
{
    bpsConfigASSERT(timer_pwm);
    /**********************************/
    /* Enable output channel x */
    TIM_Capture_Compare_Ch_Enable((TIM_Module *)timer_pwm->timer_Base.TIMx, timer_pwm->channel[TIM_Channelx - 1]);
    _timer_base_start(&timer_pwm->timer_Base);
}

static void _Pwm_Stop(Timer_Pwm *timer_pwm, uint8_t TIM_Channelx)
{
    bpsConfigASSERT(timer_pwm);
    if (timer_pwm->channel[TIM_Channelx - 1])
    {
        TIM_Capture_Compare_Ch_Disable((TIM_Module *)timer_pwm->timer_Base.TIMx, timer_pwm->channel[TIM_Channelx - 1]);
    }
}

Timer_Pwm new_Timer_Pwm(uint32_t timx, uint32_t clk, uint32_t frq)
{
    bpsConfigASSERT(timx);
    Timer_Pwm temp_Timer_Pwm;
    memset(&temp_Timer_Pwm, 0, sizeof(Timer_Pwm));
    temp_Timer_Pwm.init_channel = _pwm_channel_init;
    temp_Timer_Pwm.SetPulse = _Pwm_SetPulse;
    temp_Timer_Pwm.Start = _Pwm_Start;
    temp_Timer_Pwm.Stop = _Pwm_Stop;
    temp_Timer_Pwm.timer_Base = new_timer_base(timx, clk, frq);
    return temp_Timer_Pwm;
}

#endif

// void WatchDog_init(void)
// {
//     /* confiure FWDGT counter clock: 40KHz(IRC40K) / 64 = 0.625 KHz */
//     fwdgt_config(4000,FWDGT_PSC_DIV256);     //500 * 1/ 625  = 0.8s

//     /* After 1.6 seconds to generate a reset */
//     fwdgt_enable();

// 	    /* check if the system has resumed from FWDGT reset */
//     if (RESET != rcu_flag_get(RCU_FLAG_FWDGTRST)){

//         rcu_all_reset_flag_clear();
//         //log_info("Reset by WatchDOg");
//     }
// }

// void Freedog(void)
// {
// 	fwdgt_counter_reload();
// }

// #ifdef GD32F20X
// #define FLASHSIZE_BASE        0x1FFFF7E0    /*!< FLASH Size register base address */
// #define UNIQUE_ID_BASE        0x1FFFF7E8U
// #endif
// uint32_t GetFlashSize(void)
// {
//   return (uint32_t)(REG16(FLASHSIZE_BASE));
// }
// uint32_t GetSramSize(void)
// {
//     return (uint32_t)(REG16(FLASHSIZE_BASE +2));
// }

// uint32_t GetCPUID(void)
// {
//     return (SCB->CPUID);
// }

// void GetMCUUID(uint32_t *UID)
// {
//   UID[0] = (uint32_t)(REG32(UNIQUE_ID_BASE));
//   UID[1] = (uint32_t)(REG32(UNIQUE_ID_BASE + 4U));
//   UID[2] = (uint32_t)(REG32(UNIQUE_ID_BASE + 8U));
// }