#-----------------------------------------------------------
# Vivado v2017.4 (64-bit)
# SW Build 2086221 on Fri Dec 15 20:55:39 MST 2017
# IP Build 2085800 on Fri Dec 15 22:25:07 MST 2017
# Start of session at: Sun Mar 14 23:46:07 2021
# Process ID: 6352
# Current directory: G:/FPGA/AX7020/VivadoPro/Zynq7020_PS
# Command line: vivado.exe -gui_launcher_event rodinguilauncherevent3204 G:\FPGA\AX7020\VivadoPro\Zynq7020_PS\Zynq7020_PS.xpr
# Log file: G:/FPGA/AX7020/VivadoPro/Zynq7020_PS/vivado.log
# Journal file: G:/FPGA/AX7020/VivadoPro/Zynq7020_PS\vivado.jou
#-----------------------------------------------------------
start_gui
open_project G:/FPGA/AX7020/VivadoPro/Zynq7020_PS/Zynq7020_PS.xpr
Scanning sources...
Finished scanning sources
INFO: [IP_Flow 19-234] Refreshing IP repositories
INFO: [IP_Flow 19-1704] No user IP repositories specified
INFO: [IP_Flow 19-2313] Loaded Vivado IP repository 'F:/zhoutao/xilinx/Vivado/2017.4/data/ip'.
open_project: Time (s): cpu = 00:00:14 ; elapsed = 00:00:22 . Memory (MB): peak = 765.344 ; gain = 107.152
update_compile_order -fileset sources_1
exit
INFO: [Common 17-206] Exiting Vivado at Sun Mar 14 23:48:30 2021...