基于FPGA的GZIP压缩器。输入原始数据,输出标准的GZIP格式,即常见的 .gz / .tar.gz 文件的格式。
Whisper is a RISC-V instruction set simulator (ISS) developed for the verification of the Veer micro-controller. It allows the user to run RISC-V code without RISC-V hardware. It has an interactive mo
小麻雀处理器SparrowRV采用RISC-V架构,支持RV32IMZicsr指令集,2级流水线,哈佛结构,配有中断系统。MCU级别的处理器,麻雀虽小,五脏俱全。
开放课程《循序渐进,学习开发一个 RISC-V 上的操作系统》配套教材代码仓库。 mirror to https://github.com/plctlab/riscv-operating-system-mooc
Open-source high-performance RISC-V processor
The PULP Ara is a 64-bit Vector Unit, compatible with the RISC-V Vector Extension Version 0.9, working as a coprocessor to CORE-V's CVA6 core
俄罗斯Syntacore公司的RISC-V MCU 内核IP: SCR1; 采用sv编写,代码非常简练工整!模块化结构很优秀,方便魔改!