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PLLJ_PLLSPE_INFO.txt
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altera/greybox_tmp
xilinx/NaiveMIPS/isim/test_isim_beh.exe.sim/
xilinx/NaiveMIPS/isim/work/
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xilinx/CPLD/top_html/
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xilinx/NaiveMIPS/ipcore_dir/*/simulation/
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xilinx/NaiveMIPS/ipcore_dir/*/example_design/
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.DS_Store
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*.sopcinfo
altera/naive_mips_soc/simulation/cadence/
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altera/naive_mips_soc/simulation/mentor/libraries/
altera/naive_mips_soc/simulation/submodules/
altera/naive_mips_soc/synthesis/
altera/naive_mips_soc_cache/synthesis/
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altera/naive_mips_soc/simulation/mentor/work/
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altera/sim_cache/simulation/submodules/
altera_de1_soc/pll_hf_sim/
altera/naive_mips_soc_cache/simulation/mentor/libraries/