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STM32100E-EVAL + + + + + StdPeriph_Driver + + $PROJ_DIR$\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\misc.c + + + $PROJ_DIR$\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_adc.c + + + $PROJ_DIR$\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_bkp.c + + + $PROJ_DIR$\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_can.c + + + $PROJ_DIR$\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_cec.c + + + $PROJ_DIR$\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_crc.c + + + $PROJ_DIR$\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dac.c + + + $PROJ_DIR$\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dbgmcu.c + + + $PROJ_DIR$\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dma.c + + + $PROJ_DIR$\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_exti.c + + + $PROJ_DIR$\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_flash.c + + + $PROJ_DIR$\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_fsmc.c + + + $PROJ_DIR$\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_gpio.c + + + $PROJ_DIR$\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_i2c.c + + + $PROJ_DIR$\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_iwdg.c + + + $PROJ_DIR$\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_pwr.c + + + $PROJ_DIR$\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_rcc.c + + + $PROJ_DIR$\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_rtc.c + + + $PROJ_DIR$\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_sdio.c + + + $PROJ_DIR$\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_spi.c + + + $PROJ_DIR$\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_tim.c + + + $PROJ_DIR$\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_usart.c + + + $PROJ_DIR$\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_wwdg.c + + + + STM32_EVAL + + $PROJ_DIR$\..\..\..\Utilities\STM32_EVAL\STM32100B_EVAL\stm32100b_eval_cec.c + + STM3210C-EVAL + STM3210E-EVAL + STM3210B-EVAL + STM32100E-EVAL + STM3210E-EVAL_XL + + + + $PROJ_DIR$\..\..\..\Utilities\STM32_EVAL\STM32100B_EVAL\stm32100b_eval_lcd.c + + STM3210C-EVAL + STM3210E-EVAL + STM3210B-EVAL + STM32100E-EVAL + STM3210E-EVAL_XL + + + + $PROJ_DIR$\..\..\..\Utilities\STM32_EVAL\STM32100E_EVAL\stm32100e_eval_cec.c + + STM32100B-EVAL + STM3210C-EVAL + STM3210E-EVAL + STM3210B-EVAL + STM3210E-EVAL_XL + + + + $PROJ_DIR$\..\..\..\Utilities\STM32_EVAL\STM32100E_EVAL\stm32100e_eval_fsmc_onenand.c + + STM32100B-EVAL + STM3210C-EVAL + STM3210E-EVAL + STM3210B-EVAL + STM3210E-EVAL_XL + + + + $PROJ_DIR$\..\..\..\Utilities\STM32_EVAL\STM32100E_EVAL\stm32100e_eval_fsmc_sram.c + + STM32100B-EVAL + STM3210C-EVAL + STM3210E-EVAL + STM3210B-EVAL + STM3210E-EVAL_XL + + + + $PROJ_DIR$\..\..\..\Utilities\STM32_EVAL\STM32100E_EVAL\stm32100e_eval_ioe.c + + STM32100B-EVAL + STM3210C-EVAL + STM3210E-EVAL + STM3210B-EVAL + STM3210E-EVAL_XL + + + + $PROJ_DIR$\..\..\..\Utilities\STM32_EVAL\STM32100E_EVAL\stm32100e_eval_lcd.c + + STM32100B-EVAL + STM3210C-EVAL + STM3210E-EVAL + STM3210B-EVAL + STM3210E-EVAL_XL + + + + $PROJ_DIR$\..\..\..\Utilities\STM32_EVAL\STM3210B_EVAL\stm3210b_eval_lcd.c + + STM32100B-EVAL + STM3210C-EVAL + STM3210E-EVAL + STM32100E-EVAL + STM3210E-EVAL_XL + + + + $PROJ_DIR$\..\..\..\Utilities\STM32_EVAL\STM3210C_EVAL\stm3210c_eval_ioe.c + + STM32100B-EVAL + STM3210E-EVAL + STM3210B-EVAL + STM32100E-EVAL + STM3210E-EVAL_XL + + + + $PROJ_DIR$\..\..\..\Utilities\STM32_EVAL\STM3210C_EVAL\stm3210c_eval_lcd.c + + STM32100B-EVAL + STM3210E-EVAL + STM3210B-EVAL + STM32100E-EVAL + STM3210E-EVAL_XL + + + + $PROJ_DIR$\..\..\..\Utilities\STM32_EVAL\STM3210E_EVAL\stm3210e_eval_fsmc_nand.c + + STM32100B-EVAL + STM3210C-EVAL + STM3210B-EVAL + STM32100E-EVAL + + + + $PROJ_DIR$\..\..\..\Utilities\STM32_EVAL\STM3210E_EVAL\stm3210e_eval_fsmc_nor.c + + STM32100B-EVAL + STM3210C-EVAL + STM3210B-EVAL + STM32100E-EVAL + + + + $PROJ_DIR$\..\..\..\Utilities\STM32_EVAL\STM3210E_EVAL\stm3210e_eval_fsmc_sram.c + + STM32100B-EVAL + STM3210C-EVAL + STM3210B-EVAL + STM32100E-EVAL + + + + $PROJ_DIR$\..\..\..\Utilities\STM32_EVAL\STM3210E_EVAL\stm3210e_eval_lcd.c + + STM32100B-EVAL + STM3210C-EVAL + STM3210B-EVAL + STM32100E-EVAL + + + + $PROJ_DIR$\..\..\..\Utilities\STM32_EVAL\stm32_eval.c + + + $PROJ_DIR$\..\..\..\Utilities\STM32_EVAL\Common\stm32_eval_i2c_ee.c + + STM32100B-EVAL + STM3210C-EVAL + STM3210E-EVAL + STM3210B-EVAL + STM32100E-EVAL + STM3210E-EVAL_XL + + + + $PROJ_DIR$\..\..\..\Utilities\STM32_EVAL\Common\stm32_eval_i2c_tsensor.c + + STM3210C-EVAL + + + + $PROJ_DIR$\..\..\..\Utilities\STM32_EVAL\Common\stm32_eval_sdio_sd.c + + STM32100B-EVAL + STM3210C-EVAL + STM3210B-EVAL + STM32100E-EVAL + + + + $PROJ_DIR$\..\..\..\Utilities\STM32_EVAL\Common\stm32_eval_spi_flash.c + + STM32100B-EVAL + STM3210C-EVAL + + + + $PROJ_DIR$\..\..\..\Utilities\STM32_EVAL\Common\stm32_eval_spi_sd.c + + STM32100B-EVAL + STM3210E-EVAL + STM3210E-EVAL_XL + + + + + User + + $PROJ_DIR$\..\main.c + + + $PROJ_DIR$\..\stm32f10x_it.c + + + + + diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/EWARM/Project.eww b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/EWARM/Project.eww new file mode 100644 index 0000000000000000000000000000000000000000..e0fd14b2a041b5553d76142cfeac6bb7b49187ba --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/EWARM/Project.eww @@ -0,0 +1,10 @@ + + + + + $WS_DIR$\Project.ewp + + + + + diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/EWARM/readme.txt b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/EWARM/readme.txt new file mode 100644 index 0000000000000000000000000000000000000000..11275228d665ac004ab5c8aae65dba53a5a0bc44 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/EWARM/readme.txt @@ -0,0 +1,103 @@ +/** + @page ewarm EWARM Project Template + + @verbatim + ******************** (C) COPYRIGHT 2011 STMicroelectronics ******************* + * @file readme.txt + * @author MCD Application Team + * @version V3.5.0 + * @date 08-April-2011 + * @brief This sub directory contains all the user modifiable files needed + * to create a new project linked with the STM32F10x Standard Peripheral + * Library and working with IAR Embedded Workbench for ARM (EWARM) + * software toolchain (version 5.50 and later). + ****************************************************************************** + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. + * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, + * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE + * CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING + * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + ****************************************************************************** + @endverbatim + + @par Directory contents + + - project .ewd/.eww/.ewp: A pre-configured project file with the provided library + structure that produces an executable image with IAR + Embedded Workbench. + + - stm32f10x_flash.icf : This file is the IAR Linker configuration file used to + place program code (readonly) in internal FLASH and data + (readwrite, Stack and Heap)in internal SRAM. + You can customize this file to your need. + + - stm32f10x_flash_extsram.icf: This file is the IAR Linker configuration file + used to place program code (readonly) in internal + FLASH and data (readwrite, Stack and Heap)in + external SRAM. You can customize this file to your need. + This file is used only with STM32 High-density devices. + + - stm32f10x_nor.icf: This file is the IAR Linker configuration file used to + place program code (readonly) in external NOR FLASH and data + (readwrite, Stack and Heap)in internal SRAM. + You can customize this file to your need. + This file is used only with STM32 High-density devices. + + - stm32f10x_ram.icf: This file is the IAR Linker configuration file used to + place program code (readonly) and data (readwrite, Stack + and Heap)in internal SRAM. + You can customize this file to your need. + + @par How to use it ? + + - Open the Project.eww workspace. + - In the workspace toolbar select the project config: + - STM32100B-EVAL: to configure the project for STM32 Medium-density Value + line devices + @note The needed define symbols for this config are already declared in the + preprocessor section: USE_STDPERIPH_DRIVER, STM32F10X_MD_VL, USE_STM32100B_EVAL + + - STM3210C-EVAL: to configure the project for STM32 Connectivity line devices + @note The needed define symbols for this config are already declared in the + preprocessor section: USE_STDPERIPH_DRIVER, STM32F10X_CL, USE_STM3210C_EVAL + + - STM3210B-EVAL: to configure the project for STM32 Medium-density devices + @note The needed define symbols for this config are already declared in the + preprocessor section: USE_STDPERIPH_DRIVER, STM32F10X_MD, USE_STM3210B_EVAL + + - STM3210E-EVAL: to configure the project for STM32 High-density devices + @note The needed define symbols for this config are already declared in the + preprocessor section: USE_STDPERIPH_DRIVER, STM32F10X_HD, USE_STM3210E_EVAL + + - STM3210E-EVAL_XL: to configure the project for STM32 XL-density devices + @note The needed define symbols for this config are already declared in the + preprocessor section: USE_STDPERIPH_DRIVER, STM32F10X_XL, USE_STM3210E_EVAL + + - STM32100E-EVAL: to configure the project for STM32 High-density Value line devices + @note The needed define symbols for this config are already declared in the + preprocessor section: USE_STDPERIPH_DRIVER, STM32F10X_HD_VL, USE_STM32100E_EVAL + + - Rebuild all files: Project->Rebuild all + - Load project image: Project->Debug + - Run program: Debug->Go(F5) + +@note + - Low-density Value line devices are STM32F100xx microcontrollers where the + Flash memory density ranges between 16 and 32 Kbytes. + - Low-density devices are STM32F101xx, STM32F102xx and STM32F103xx + microcontrollers where the Flash memory density ranges between 16 and 32 Kbytes. + - Medium-density Value line devices are STM32F100xx microcontrollers where the + Flash memory density ranges between 32 and 128 Kbytes. + - Medium-density devices are STM32F101xx, STM32F102xx and STM32F103xx + microcontrollers where the Flash memory density ranges between 32 and 128 Kbytes. + - High-density Value line devices are STM32F100xx microcontrollers where the + Flash memory density ranges between 256 and 512 Kbytes. + - High-density devices are STM32F101xx and STM32F103xx microcontrollers where + the Flash memory density ranges between 256 and 512 Kbytes. + - XL-density devices are STM32F101xx and STM32F103xx microcontrollers where + the Flash memory density ranges between 512 and 1024 Kbytes. + - Connectivity line devices are STM32F105xx and STM32F107xx microcontrollers. + + *

© COPYRIGHT 2011 STMicroelectronics

+ */ diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/EWARM/stm32f10x_flash.icf b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/EWARM/stm32f10x_flash.icf new file mode 100644 index 0000000000000000000000000000000000000000..6721a0d013306473be079f936b6b18a7fabe8269 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/EWARM/stm32f10x_flash.icf @@ -0,0 +1,31 @@ +/*###ICF### Section handled by ICF editor, don't touch! ****/ +/*-Editor annotation file-*/ +/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ +/*-Specials-*/ +define symbol __ICFEDIT_intvec_start__ = 0x08000000; +/*-Memory Regions-*/ +define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; +define symbol __ICFEDIT_region_ROM_end__ = 0x080FFFFF; +define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; +define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF; +/*-Sizes-*/ +define symbol __ICFEDIT_size_cstack__ = 0x400; +define symbol __ICFEDIT_size_heap__ = 0x200; +/**** End of ICF editor section. ###ICF###*/ + + +define memory mem with size = 4G; +define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; +define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; + +define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; +define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; + +initialize by copy { readwrite }; +do not initialize { section .noinit }; + +place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; + +place in ROM_region { readonly }; +place in RAM_region { readwrite, + block CSTACK, block HEAP }; diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/EWARM/stm32f10x_flash_extsram.icf b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/EWARM/stm32f10x_flash_extsram.icf new file mode 100644 index 0000000000000000000000000000000000000000..5e0a239b574adbc3c2df6900773a3070912a1daf --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/EWARM/stm32f10x_flash_extsram.icf @@ -0,0 +1,33 @@ +/*###ICF### Section handled by ICF editor, don't touch! ****/ +/*-Editor annotation file-*/ +/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ +/*-Specials-*/ +define symbol __ICFEDIT_intvec_start__ = 0x08000000; +/*-Memory Regions-*/ +define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; +define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF; +define symbol __ICFEDIT_region_RAM_start__ = 0x68000000; +define symbol __ICFEDIT_region_RAM_end__ = 0x680FFFFF; + +/*-Sizes-*/ +define symbol __ICFEDIT_size_cstack__ = 0x400; +define symbol __ICFEDIT_size_heap__ = 0x200; +/**** End of ICF editor section. ###ICF###*/ + + +define memory mem with size = 4G; +define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; +define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; /* EXTSRAM_region */ + +define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; +define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; + +initialize by copy { readwrite }; +do not initialize { section .noinit }; + +place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; + +place in ROM_region { readonly }; +place in RAM_region {readwrite, block CSTACK, block HEAP }; /* EXTSRAM_region */ + + diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/EWARM/stm32f10x_nor.icf b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/EWARM/stm32f10x_nor.icf new file mode 100644 index 0000000000000000000000000000000000000000..99c15befa754dea3f32b468c6f3c6d137cb02336 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/EWARM/stm32f10x_nor.icf @@ -0,0 +1,31 @@ +/*###ICF### Section handled by ICF editor, don't touch! ****/ +/*-Editor annotation file-*/ +/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ +/*-Specials-*/ +define symbol __ICFEDIT_intvec_start__ = 0x64000000; +/*-Memory Regions-*/ +define symbol __ICFEDIT_region_ROM_start__ = 0x64000000 ; +define symbol __ICFEDIT_region_ROM_end__ = 0x64FFFFFF; +define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; +define symbol __ICFEDIT_region_RAM_end__ = 0x2000FFFF; +/*-Sizes-*/ +define symbol __ICFEDIT_size_cstack__ = 0x400; +define symbol __ICFEDIT_size_heap__ = 0x200; +/**** End of ICF editor section. ###ICF###*/ + + +define memory mem with size = 4G; +define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; +define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; + +define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; +define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; + +initialize by copy { readwrite }; +do not initialize { section .noinit }; + +place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; + +place in ROM_region { readonly }; +place in RAM_region { readwrite, + block CSTACK, block HEAP }; diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/EWARM/stm32f10x_ram.icf b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/EWARM/stm32f10x_ram.icf new file mode 100644 index 0000000000000000000000000000000000000000..6aeaf653e349a3fec45f200596b649389f3867af --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/EWARM/stm32f10x_ram.icf @@ -0,0 +1,31 @@ +/*###ICF### Section handled by ICF editor, don't touch! ****/ +/*-Editor annotation file-*/ +/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ +/*-Specials-*/ +define symbol __ICFEDIT_intvec_start__ = 0x20000000; +/*-Memory Regions-*/ +define symbol __ICFEDIT_region_ROM_start__ = 0x20000000; +define symbol __ICFEDIT_region_ROM_end__ = 0x2000FFFF; +define symbol __ICFEDIT_region_RAM_start__ = 0x20010000; +define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF; +/*-Sizes-*/ +define symbol __ICFEDIT_size_cstack__ = 0x400; +define symbol __ICFEDIT_size_heap__ = 0x200; +/**** End of ICF editor section. ###ICF###*/ + + +define memory mem with size = 4G; +define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; +define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; + +define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; +define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; + +initialize by copy { readwrite }; +do not initialize { section .noinit }; + +place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; + +place in ROM_region { readonly }; +place in RAM_region { readwrite, + block CSTACK, block HEAP }; diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100B-EVAL/Project.htp b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100B-EVAL/Project.htp new file mode 100644 index 0000000000000000000000000000000000000000..b85d35a963348bc596feb5bafe3683412f82b17f --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100B-EVAL/Project.htp @@ -0,0 +1,1152 @@ + + + + + + + + + + + + + + + + + + + + +
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+ + + + + + + + + + + + + + + + + + diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100B-EVAL/Settings/StartupScript.scr b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100B-EVAL/Settings/StartupScript.scr new file mode 100644 index 0000000000000000000000000000000000000000..e3dbe2309d1c25d27e98e5f926688d98af736d85 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100B-EVAL/Settings/StartupScript.scr @@ -0,0 +1,9 @@ +// Hitex/Lue/11.02.2008 +// Executable Script file for HiTOP Debugger +// Reset application + +// Reset +RESET TARGET + + + diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100B-EVAL/Settings/arm_arch.lsl b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100B-EVAL/Settings/arm_arch.lsl new file mode 100644 index 0000000000000000000000000000000000000000..3e6d3031e15b73a34caa2408b998eda685da1811 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100B-EVAL/Settings/arm_arch.lsl @@ -0,0 +1,287 @@ +//////////////////////////////////////////////////////////////////////////// +// +// File : arm_arch.lsl +// +// Version : @(#)arm_arch.lsl 1.4 09/04/17 +// +// Description : Generic LSL file for ARM architectures +// +// Copyright 2008-2009 Altium BV +// +//////////////////////////////////////////////////////////////////////////// + +#ifndef __STACK +# define __STACK 32k +#endif +#ifndef __HEAP +# define __HEAP 32k +#endif +#ifndef __STACK_FIQ +# define __STACK_FIQ 8 +#endif +#ifndef __STACK_IRQ +# define __STACK_IRQ 8 +#endif +#ifndef __STACK_SVC +# define __STACK_SVC 8 +#endif +#ifndef __STACK_ABT +# define __STACK_ABT 8 +#endif +#ifndef __STACK_UND +# define __STACK_UND 8 +#endif +#ifndef __PROCESSOR_MODE +# define __PROCESSOR_MODE 0x1F /* SYS mode */ +#endif +#ifndef __IRQ_BIT +# define __IRQ_BIT 0x80 /* IRQ interrupts disabled */ +#endif +#ifndef __FIQ_BIT +# define __FIQ_BIT 0x40 /* FIQ interrupts disabled */ +#endif + +#define __APPLICATION_MODE (__PROCESSOR_MODE | __IRQ_BIT | __FIQ_BIT) + +#ifndef __VECTOR_TABLE_ROM_ADDR +# define __VECTOR_TABLE_ROM_ADDR 0x00000000 +#endif + +#ifndef __VECTOR_TABLE_RAM_ADDR +# define __VECTOR_TABLE_RAM_ADDR 0x00000000 +#endif + +#if defined(__CPU_ARMV7M__) || defined(__CPU_ARMV6M__) +# ifndef __NR_OF_VECTORS +# define __NR_OF_VECTORS 16 +# endif +# define __VECTOR_TABLE_SIZE (__NR_OF_VECTORS * 4) +#else +# ifdef __PIC_VECTORS +# define __VECTOR_TABLE_SIZE 64 +# else +# ifdef __FIQ_HANDLER_INLINE +# define __VECTOR_TABLE_SIZE 28 +# define __NR_OF_VECTORS 7 +# else +# define __VECTOR_TABLE_SIZE 32 +# define __NR_OF_VECTORS 8 +# endif +# endif +#endif + +#ifndef __VECTOR_TABLE_RAM_SPACE +# undef __VECTOR_TABLE_RAM_COPY +#endif + +#ifndef __XVWBUF +# define __XVWBUF 0 /* buffer used by CrossView Pro */ +#endif + +#define BOUNDS_GROUP_NAME grp_bounds +#define BOUNDS_GROUP_SELECT "bounds" + +architecture ARM +{ + endianness + { + little; + big; + } + + space linear + { + id = 1; + mau = 8; + map (size = 4G, dest = bus:local_bus); + + copytable + ( + align = 4, + copy_unit = 1, + dest = linear + ); + + start_address + ( + // It is not strictly necessary to define a run_addr for _START + // because hardware starts execution at address 0x0 which should + // be the vector table with a jump to the relocatable _START, but + // an absolute address can prevent the branch to be out-of-range. + // Or _START may be the entry point at reset and the reset handler + // copies the vector table to address 0x0 after some ROM/RAM memory + // re-mapping. In that case _START should be at a fixed address + // in ROM, specifically the alias of address 0x0 before memory + // re-mapping. +#ifdef __START + run_addr = __START, +#endif + symbol = "_START" + ); + + stack "stack" + ( +#ifdef __STACK_FIXED + fixed, +#endif + align = 4, + min_size = __STACK, + grows = high_to_low + ); + + heap "heap" + ( +#ifdef __HEAP_FIXED + fixed, +#endif + align = 4, + min_size=__HEAP + ); + +#if !defined(__CPU_ARMV7M__) && !defined(__CPU_ARMV6M__) + stack "stack_fiq" + ( + fixed, + align = 4, + min_size = __STACK_FIQ, + grows = high_to_low + ); + stack "stack_irq" + ( + fixed, + align = 4, + min_size = __STACK_IRQ, + grows = high_to_low + ); + stack "stack_svc" + ( + fixed, + align = 4, + min_size = __STACK_SVC, + grows = high_to_low + ); + stack "stack_abt" + ( + fixed, + align = 4, + min_size = __STACK_ABT, + grows = high_to_low + ); + stack "stack_und" + ( + fixed, + align = 4, + min_size = __STACK_UND, + grows = high_to_low + ); +#endif + +#if !defined(__NO_AUTO_VECTORS) && !defined(__NO_DEFAULT_AUTO_VECTORS) +# if defined(__CPU_ARMV7M__) || defined(__CPU_ARMV6M__) + // vector table with handler addresses + vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_ROM_ADDR, + template = ".text.handler_address", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + fill = loop, + no_inline + ) + { + vector ( id = 0, fill = "_START" ); // FIXME: "_lc_ub_stack" does not work + vector ( id = 1, fill = "_START" ); + } +# else +# ifdef __PIC_VECTORS + // vector table with ldrpc instructions from handler table + vector_table "vector_table" ( vector_size = 4, size = 8, run_addr = __VECTOR_TABLE_ROM_ADDR, + template = ".text.vector_ldrpc", + template_symbol = "_lc_vector_ldrpc", + vector_prefix = "_vector_ldrpc_", + fill = loop + ) + { + } + // subsequent vector table (data pool) with addresses of handlers + vector_table "handler_table" ( vector_size = 4, size = 8, run_addr = __VECTOR_TABLE_ROM_ADDR + 32, + template = ".text.handler_address", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + fill = loop[-32], + no_inline + ) + { + vector ( id = 0, fill = "_START" ); + } +# else + // vector table with branch instructions to handlers + vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_ROM_ADDR, + template = ".text.vector_branch", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + fill = loop + ) + { + vector ( id = 0, fill = "_START" ); + } +# endif +# endif +#endif + section_layout + { +#if defined(__NO_AUTO_VECTORS) + "_lc_ub_vector_table" = __VECTOR_TABLE_ROM_ADDR; + "_lc_ue_vector_table" = __VECTOR_TABLE_ROM_ADDR + __VECTOR_TABLE_SIZE; +#endif +#ifdef __VECTOR_TABLE_RAM_SPACE + // reserve space to copy vector table from ROM to RAM + group ( ordered, run_addr = __VECTOR_TABLE_RAM_ADDR ) + reserved "vector_table_space" ( size = __VECTOR_TABLE_SIZE, attributes = rwx ); +#endif +#ifdef __VECTOR_TABLE_RAM_COPY + // provide copy address symbols for copy routine + "_lc_ub_vector_table_copy" := "_lc_ub_vector_table_space"; + "_lc_ue_vector_table_copy" := "_lc_ue_vector_table_space"; +#else + // prevent copy: copy address equals orig address + "_lc_ub_vector_table_copy" := "_lc_ub_vector_table"; + "_lc_ue_vector_table_copy" := "_lc_ue_vector_table"; +#endif + // define buffer for string input via Crossview Pro debugger + group ( align = 4 ) reserved "xvwbuffer" (size=__XVWBUF, attributes=rw ); + + // define labels for bounds begin and end as used in C library +#ifndef BOUNDS_GROUP_REDEFINED + group BOUNDS_GROUP_NAME (ordered, contiguous) + { + select BOUNDS_GROUP_SELECT; + } +#endif + "_lc_ub_bounds" := addressof(group:BOUNDS_GROUP_NAME); + "_lc_ue_bounds" := addressof(group:BOUNDS_GROUP_NAME) + sizeof(group:BOUNDS_GROUP_NAME); + +#ifdef __HEAPADDR + group ( ordered, run_addr=__HEAPADDR ) + { + select "heap"; + } +#endif +#ifdef __STACKADDR + group ( ordered, run_addr=__STACKADDR ) + { + select "stack"; + } +#endif +#if !defined(__CPU_ARMV7M__) && !defined(__CPU_ARMV6M__) + // symbol to set mode bits and interrupt disable bits + // in cstart module before calling the application (main) + "_APPLICATION_MODE_" = __APPLICATION_MODE; +#endif + } + } + + bus local_bus + { + mau = 8; + width = 32; + } +} diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100B-EVAL/Settings/link.lnk b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100B-EVAL/Settings/link.lnk new file mode 100644 index 0000000000000000000000000000000000000000..038235e64e7e339df8048d5fbff0a520b0ad96be --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100B-EVAL/Settings/link.lnk @@ -0,0 +1,4 @@ +-d"./settings/stm32f10x_MD_VL.lsl" +--optimize=0 +--map-file-format=2 +$(LinkObjects) diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100B-EVAL/Settings/reset_appl.scr b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100B-EVAL/Settings/reset_appl.scr new file mode 100644 index 0000000000000000000000000000000000000000..d90eb1562155bf052756c7c9ba7e12d76d11f1bd --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100B-EVAL/Settings/reset_appl.scr @@ -0,0 +1,8 @@ +// Hitex/Lue/11.02.2008 +// Executable Script file for HiTOP Debugger +// Reset application + +// Reset +RESET TARGET + + diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100B-EVAL/Settings/reset_go_main.scr b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100B-EVAL/Settings/reset_go_main.scr new file mode 100644 index 0000000000000000000000000000000000000000..3e9c066994344d9767229e16c69308cc5bdc8ee2 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100B-EVAL/Settings/reset_go_main.scr @@ -0,0 +1,12 @@ +// Hitex/Lue/11.02.2008 +// Executable Script file for HiTOP Debugger +// Reset application & Go main + +// Reset +RESET TARGET + + +// execute program till main +Go UNTIL main +wait + diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100B-EVAL/Settings/stm32f10x_MD_VL.lsl b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100B-EVAL/Settings/stm32f10x_MD_VL.lsl new file mode 100644 index 0000000000000000000000000000000000000000..cabbd2d0af20f44d4e8f7cb56390760fc50dbab7 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100B-EVAL/Settings/stm32f10x_MD_VL.lsl @@ -0,0 +1,146 @@ +//////////////////////////////////////////////////////////////////////////// +// +// File : stm32f10x_MD_VL.lsl +// +// Version : @(#)stm32f10x_MD_VL.lsl 1.2 19/02/2010 +// +// Description : LSL file for the STMicroelectronics STM32F100VB, CMSIS version +// +// COPYRIGHT 2010 STMicroelectronics +// +// NOTE: +// It is assumed that the user works with the ARMv7M architecture. +// Other architectures will not work with this lsl file. +// +//////////////////////////////////////////////////////////////////////////// + +// +// We do not want the vectors as defined in arm_arch.lsl +// +#define __NO_DEFAULT_AUTO_VECTORS 1 +#define __NR_OF_VECTORS 72 + + +#ifndef __STACK +# define __STACK 1k +#endif +#ifndef __HEAP +# define __HEAP 1k +#endif +#ifndef __VECTOR_TABLE_ROM_ADDR +# define __VECTOR_TABLE_ROM_ADDR 0x08000000 +#endif +#ifndef __XVWBUF +#define __XVWBUF 256 /* buffer used by CrossView */ +#endif + + +#include + +//////////////////////////////////////////////////////////////////////////// +// +// In the STM32F10x, 3 different boot modes can be selected +// - User Flash memory is selected as boot space +// - SystemMemory is selected as boot space +// - Embedded SRAM is selected as boot space +// +// This aliases the physical memory associated with each boot mode to Block +// 000 (0x00000000 boot memory). Even when aliased in the boot memory space, +// the related memory (Flash memory or SRAM) is still accessible at its +// original memory space. +// +// If no memory is defined yet use the following memory settings +// +#ifndef __MEMORY + +memory stm32f103flash +{ + mau = 8; + type = rom; + size = 128k; + map ( size = 128k, dest_offset=0x08000000, dest=bus:ARM:local_bus); +} + +memory stm32f103ram +{ + mau = 8; + type = ram; + size = 8k; + map ( size = 8k, dest_offset=0x20000000, dest=bus:ARM:local_bus); +} + +#endif /* __MEMORY */ + + +// +// Custom vector table defines interrupts according to CMSIS standard +// +# if defined(__CPU_ARMV7M__) +section_setup ::linear +{ + // vector table with handler addresses + vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_ROM_ADDR, + template = ".text.handler_address", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + fill = loop, + no_inline + ) + { + vector ( id = 0, fill = "_START" ); // FIXME: "_lc_ub_stack" does not work + vector ( id = 1, fill = "_START" ); + vector ( id = 2, optional, fill = "NMI_Handler" ); + vector ( id = 3, optional, fill = "HardFault_Handler" ); + vector ( id = 4, optional, fill = "MemManage_Handler" ); + vector ( id = 5, optional, fill = "BusFault_Handler" ); + vector ( id = 6, optional, fill = "UsageFault_Handler" ); + vector ( id = 11, optional, fill = "SVC_Handler" ); + vector ( id = 12, optional, fill = "DebugMon_Handler" ); + vector ( id = 14, optional, fill = "PendSV_Handler" ); + vector ( id = 15, optional, fill = "SysTick_Handler" ); + + // External Interrupts : + vector ( id = 16, optional, fill = "WWDG_IRQHandler" ); // Window Watchdog + vector ( id = 17, optional, fill = "PVD_IRQHandler" ); // PVD through EXTI Line detect + vector ( id = 18, optional, fill = "TAMPER_IRQHandler" ); // Tamper + vector ( id = 19, optional, fill = "RTC_IRQHandler" ); // RTC + vector ( id = 20, optional, fill = "FLASH_IRQHandler" ); // Flash + vector ( id = 21, optional, fill = "RCC_IRQHandler" ); // RCC + vector ( id = 22, optional, fill = "EXTI0_IRQHandler" ); // EXTI Line 0 + vector ( id = 23, optional, fill = "EXTI1_IRQHandler" ); // EXTI Line 1 + vector ( id = 24, optional, fill = "EXTI2_IRQHandler" ); // EXTI Line 2 + vector ( id = 25, optional, fill = "EXTI3_IRQHandler" ); // EXTI Line 3 + vector ( id = 26, optional, fill = "EXTI4_IRQHandler" ); // EXTI Line 4 + vector ( id = 27, optional, fill = "DMA1_Channel1_IRQHandler" ); // DMA Channel 1 + vector ( id = 28, optional, fill = "DMA1_Channel2_IRQHandler" ); // DMA Channel 2 + vector ( id = 29, optional, fill = "DMA1_Channel3_IRQHandler" ); // DMA Channel 3 + vector ( id = 30, optional, fill = "DMA1_Channel4_IRQHandler" ); // DMA Channel 4 + vector ( id = 31, optional, fill = "DMA1_Channel5_IRQHandler" ); // DMA Channel 5 + vector ( id = 32, optional, fill = "DMA1_Channel6_IRQHandler" ); // DMA Channel 6 + vector ( id = 33, optional, fill = "DMA1_Channel7_IRQHandler" ); // DMA Channel 7 + vector ( id = 34, optional, fill = "ADC1_IRQHandler" ); // ADC1 + vector ( id = 39, optional, fill = "EXTI9_5_IRQHandler" ); // EXTI Line 9..5 + vector ( id = 40, optional, fill = "TIM1_BRK_TIM15_IRQHandler" ); // TIM1 Break and TIM15 + vector ( id = 41, optional, fill = "TIM1_UP_TIM16_IRQHandler" ); // TIM1 Update and TIM16 + vector ( id = 42, optional, fill = "TIM1_TRG_COM_TIM17_IRQHandler" ); // TIM1 Trigger and Commutation and TIM17 + vector ( id = 43, optional, fill = "TIM1_CC_IRQHandler" ); // TIM1 Capture Compare + vector ( id = 44, optional, fill = "TIM2_IRQHandler" ); // TIM2 + vector ( id = 45, optional, fill = "TIM3_IRQHandler" ); // TIM3 + vector ( id = 46, optional, fill = "TIM4_IRQHandler" ); // TIM4 + vector ( id = 47, optional, fill = "I2C1_EV_IRQHandler" ); // I2C1 Event + vector ( id = 48, optional, fill = "I2C1_ER_IRQHandler" ); // I2C1 Error + vector ( id = 49, optional, fill = "I2C2_EV_IRQHandler" ); // I2C2 Event + vector ( id = 50, optional, fill = "I2C2_ER_IRQHandler" ); // I2C2 Error + vector ( id = 51, optional, fill = "SPI1_IRQHandler" ); // SPI1 + vector ( id = 52, optional, fill = "SPI2_IRQHandler" ); // SPI2 + vector ( id = 53, optional, fill = "USART1_IRQHandler" ); // USART1 + vector ( id = 54, optional, fill = "USART2_IRQHandler" ); // USART2 + vector ( id = 55, optional, fill = "USART3_IRQHandler" ); // USART3 + vector ( id = 56, optional, fill = "EXTI15_10_IRQHandler" ); // EXTI Line 15..10 + vector ( id = 57, optional, fill = "RTCAlarm_IRQHandler" ); // RTC Alarm through EXTI Line + vector ( id = 58, optional, fill = "CEC_IRQHandler" ); // HDMI-CEC + vector ( id = 70, optional, fill = "TIM6_DAC_IRQHandler" ); // TIM6 and DAC underrun + vector ( id = 71, optional, fill = "TIM7_IRQHandler" ); // TIM7 + } +} +# endif diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100B-EVAL/cstart_thumb2.asm b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100B-EVAL/cstart_thumb2.asm new file mode 100644 index 0000000000000000000000000000000000000000..12dc0d02dd7f73c60656a8293afd8da477958793 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100B-EVAL/cstart_thumb2.asm @@ -0,0 +1,148 @@ + + +;; NOTE: To allow the use of this file for both ARMv6M and ARMv7M, +;; we will only use 16-bit Thumb intructions. + + .extern _lc_ub_stack ; usr/sys mode stack pointer + .extern _lc_ue_stack ; symbol required by debugger + .extern _lc_ub_table ; ROM to RAM copy table + .extern main + .extern _Exit + .extern exit + .weak exit + .global __get_argcv + .weak __get_argcv + .extern __argcvbuf + .weak __argcvbuf + .extern __init_hardware + .extern __init_vector_table + .extern SystemInit + + .if @defined('__PROF_ENABLE__') + .extern __prof_init + .endif + .if @defined('__POSIX__') + .extern posix_main + .extern _posix_boot_stack_top + .endif + + .global _START + + .section .text.cstart + + .thumb +_START: + ;; anticipate possible ROM/RAM remapping + ;; by loading the 'real' program address + ldr r1,=_Next + bx r1 +_Next: + ;; initialize the stack pointer + ldr r1,=_lc_ub_stack ; TODO: make this part of the vector table + mov sp,r1 + + ;; call a user function which initializes hardware + ;; such as ROM/RAM re-mapping or MMU configuration + bl __init_hardware + + ;ldr r0, =SystemInit + ;bx r0 + bl SystemInit + + ;; copy initialized sections from ROM to RAM + ;; and clear uninitialized data sections in RAM + + ldr r3,=_lc_ub_table + movs r0,#0 +cploop: + ldr r4,[r3,#0] ; load type + ldr r5,[r3,#4] ; dst address + ldr r6,[r3,#8] ; src address + ldr r7,[r3,#12] ; size + + cmp r4,#1 + beq copy + cmp r4,#2 + beq clear + b done + +copy: + subs r7,r7,#1 + ldrb r1,[r6,r7] + strb r1,[r5,r7] + bne copy + + adds r3,r3,#16 + b cploop + +clear: + subs r7,r7,#1 + strb r0,[r5,r7] + bne clear + + adds r3,r3,#16 + b cploop + +done: + ;; initialize or copy the vector table + bl __init_vector_table + + .if @defined('__POSIX__') + + ;; posix stack buffer for system upbringing + ldr r0,=_posix_boot_stack_top + ldr r0, [r0] + mov sp,r0 + + .else + + ;; load r10 with end of USR/SYS stack, which is + ;; needed in case stack overflow checking is on + ;; NOTE: use 16-bit instructions only, for ARMv6M + ldr r0,=_lc_ue_stack + mov r10,r0 + + .endif + + .if @defined('__PROF_ENABLE__') + bl __prof_init + .endif + + .if @defined('__POSIX__') + ;; call posix_main with no arguments + bl posix_main + .else + ;; retrieve argc and argv (default argv[0]==NULL & argc==0) + bl __get_argcv + ldr r1,=__argcvbuf + ;; call main + bl main + .endif + + ;; call exit using the return value from main() + ;; Note. Calling exit will also run all functions + ;; that were supplied through atexit(). + bl exit + +__get_argcv: ; weak definition + movs r0,#0 + bx lr + + .ltorg + .endsec + + .calls '_START','__init_hardware' + .calls '_START','__init_vector_table' + .if @defined('__PROF_ENABLE__') + .calls '_START','__prof_init' + .endif + .if @defined('__POSIX__') + .calls '_START','posix_main' + .else + .calls '_START','__get_argcv' + .calls '_START','main' + .endif + .calls '_START','exit' + .calls '_START','',0 + + .end diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100B-EVAL/readme.txt b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100B-EVAL/readme.txt new file mode 100644 index 0000000000000000000000000000000000000000..54aaec8b907bfa887748486fcac6509c97705c8e --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100B-EVAL/readme.txt @@ -0,0 +1,83 @@ +/** + @page HiTOP5_STM32100B HiTOP Project Template for STM32F10x Medium-density Value line devices + + @verbatim + ******************** (C) COPYRIGHT 2011 STMicroelectronics ******************* + * @file readme.txt + * @author MCD Application Team + * @version V3.5.0 + * @date 08-April-2011 + * @brief This sub directory contains all the user modifiable files needed + * to create a new project linked with the STM32F10x Standard Peripheral + * Library and working with HiTOP software toolchain (version 5.40 and later). + ****************************************************************************** + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. + * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, + * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE + * CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING + * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + ****************************************************************************** + @endverbatim + +@par Directory contents + + - Project.htp: A pre-configured project file with the provided library + structure that produces an executable image with HiTOP + + - cstart_thumb2.asm: This file initializes the stack pointer and copy initialized + sections from ROM to RAM. + + - Objects: This mandatory directory contains the executable images. + + - Settings: This directory contains the linker and script files. + - arm_arch.lsl: This file is used to place program code (readonly) + in internal FLASH and data (readwrite, Stack and Heap) + in internal SRAM. + + - link.lnk: This file is the HiTOP linker it invokes the stm32f10x_MD_VL.lsl. + + - reset_appl.scr: This file is a HiTOP script it performs a target reset. + + - reset_go_main.scr: This file is a HiTOP script and it sets the Program + Counter at the "main" instruction. + + - StartupScript.scr: This file is a HiTOP script and it performs a target + reset before loading The executable image. + + - stm32f10x_MD_VL.lsl: This file is used to place program code (readonly) + in internal FLASH and data (readwrite, Stack and Heap) + in internal SRAM. + It contains also the vector table of the STM32 + Medium-density Value line devices. + You can customize this file to your need. + +@par How to use it ? + +- Open the HiTOP toolchain. +- Browse to open the project.htp +- A "Download application" window is displayed, click "cancel". +- Rebuild all files: Project->Rebuild all +- Load project image : Click "ok" in the "Download application" window. +- Run the "RESET_GO_MAIN" script to set the PC at the "main" +- Run program: Debug->Go(F5). + +@note + - Low-density Value line devices are STM32F100xx microcontrollers where the + Flash memory density ranges between 16 and 32 Kbytes. + - Low-density devices are STM32F101xx, STM32F102xx and STM32F103xx + microcontrollers where the Flash memory density ranges between 16 and 32 Kbytes. + - Medium-density Value line devices are STM32F100xx microcontrollers where + the Flash memory density ranges between 64 and 128 Kbytes. + - Medium-density devices are STM32F101xx, STM32F102xx and STM32F103xx + microcontrollers where the Flash memory density ranges between 64 and 128 Kbytes. + - High-density Value line devices are STM32F100xx microcontrollers where the + Flash memory density ranges between 256 and 512 Kbytes. + - High-density devices are STM32F101xx and STM32F103xx microcontrollers where + the Flash memory density ranges between 256 and 512 Kbytes. + - XL-density devices are STM32F101xx and STM32F103xx microcontrollers where + the Flash memory density ranges between 512 and 1024 Kbytes. + - Connectivity line devices are STM32F105xx and STM32F107xx microcontrollers. + + *

© COPYRIGHT 2011 STMicroelectronics

+ */ diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100E-EVAL/Project.htp b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100E-EVAL/Project.htp new file mode 100644 index 0000000000000000000000000000000000000000..eedf13ac3f027e40b96f66ffbdf62c3c3460c32f --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100E-EVAL/Project.htp @@ -0,0 +1,1242 @@ + + + + + + + + + + + + + + + + + + + + +
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
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+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100E-EVAL/Settings/StartupScript.scr b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100E-EVAL/Settings/StartupScript.scr new file mode 100644 index 0000000000000000000000000000000000000000..e3dbe2309d1c25d27e98e5f926688d98af736d85 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100E-EVAL/Settings/StartupScript.scr @@ -0,0 +1,9 @@ +// Hitex/Lue/11.02.2008 +// Executable Script file for HiTOP Debugger +// Reset application + +// Reset +RESET TARGET + + + diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100E-EVAL/Settings/arm_arch.lsl b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100E-EVAL/Settings/arm_arch.lsl new file mode 100644 index 0000000000000000000000000000000000000000..3e6d3031e15b73a34caa2408b998eda685da1811 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100E-EVAL/Settings/arm_arch.lsl @@ -0,0 +1,287 @@ +//////////////////////////////////////////////////////////////////////////// +// +// File : arm_arch.lsl +// +// Version : @(#)arm_arch.lsl 1.4 09/04/17 +// +// Description : Generic LSL file for ARM architectures +// +// Copyright 2008-2009 Altium BV +// +//////////////////////////////////////////////////////////////////////////// + +#ifndef __STACK +# define __STACK 32k +#endif +#ifndef __HEAP +# define __HEAP 32k +#endif +#ifndef __STACK_FIQ +# define __STACK_FIQ 8 +#endif +#ifndef __STACK_IRQ +# define __STACK_IRQ 8 +#endif +#ifndef __STACK_SVC +# define __STACK_SVC 8 +#endif +#ifndef __STACK_ABT +# define __STACK_ABT 8 +#endif +#ifndef __STACK_UND +# define __STACK_UND 8 +#endif +#ifndef __PROCESSOR_MODE +# define __PROCESSOR_MODE 0x1F /* SYS mode */ +#endif +#ifndef __IRQ_BIT +# define __IRQ_BIT 0x80 /* IRQ interrupts disabled */ +#endif +#ifndef __FIQ_BIT +# define __FIQ_BIT 0x40 /* FIQ interrupts disabled */ +#endif + +#define __APPLICATION_MODE (__PROCESSOR_MODE | __IRQ_BIT | __FIQ_BIT) + +#ifndef __VECTOR_TABLE_ROM_ADDR +# define __VECTOR_TABLE_ROM_ADDR 0x00000000 +#endif + +#ifndef __VECTOR_TABLE_RAM_ADDR +# define __VECTOR_TABLE_RAM_ADDR 0x00000000 +#endif + +#if defined(__CPU_ARMV7M__) || defined(__CPU_ARMV6M__) +# ifndef __NR_OF_VECTORS +# define __NR_OF_VECTORS 16 +# endif +# define __VECTOR_TABLE_SIZE (__NR_OF_VECTORS * 4) +#else +# ifdef __PIC_VECTORS +# define __VECTOR_TABLE_SIZE 64 +# else +# ifdef __FIQ_HANDLER_INLINE +# define __VECTOR_TABLE_SIZE 28 +# define __NR_OF_VECTORS 7 +# else +# define __VECTOR_TABLE_SIZE 32 +# define __NR_OF_VECTORS 8 +# endif +# endif +#endif + +#ifndef __VECTOR_TABLE_RAM_SPACE +# undef __VECTOR_TABLE_RAM_COPY +#endif + +#ifndef __XVWBUF +# define __XVWBUF 0 /* buffer used by CrossView Pro */ +#endif + +#define BOUNDS_GROUP_NAME grp_bounds +#define BOUNDS_GROUP_SELECT "bounds" + +architecture ARM +{ + endianness + { + little; + big; + } + + space linear + { + id = 1; + mau = 8; + map (size = 4G, dest = bus:local_bus); + + copytable + ( + align = 4, + copy_unit = 1, + dest = linear + ); + + start_address + ( + // It is not strictly necessary to define a run_addr for _START + // because hardware starts execution at address 0x0 which should + // be the vector table with a jump to the relocatable _START, but + // an absolute address can prevent the branch to be out-of-range. + // Or _START may be the entry point at reset and the reset handler + // copies the vector table to address 0x0 after some ROM/RAM memory + // re-mapping. In that case _START should be at a fixed address + // in ROM, specifically the alias of address 0x0 before memory + // re-mapping. +#ifdef __START + run_addr = __START, +#endif + symbol = "_START" + ); + + stack "stack" + ( +#ifdef __STACK_FIXED + fixed, +#endif + align = 4, + min_size = __STACK, + grows = high_to_low + ); + + heap "heap" + ( +#ifdef __HEAP_FIXED + fixed, +#endif + align = 4, + min_size=__HEAP + ); + +#if !defined(__CPU_ARMV7M__) && !defined(__CPU_ARMV6M__) + stack "stack_fiq" + ( + fixed, + align = 4, + min_size = __STACK_FIQ, + grows = high_to_low + ); + stack "stack_irq" + ( + fixed, + align = 4, + min_size = __STACK_IRQ, + grows = high_to_low + ); + stack "stack_svc" + ( + fixed, + align = 4, + min_size = __STACK_SVC, + grows = high_to_low + ); + stack "stack_abt" + ( + fixed, + align = 4, + min_size = __STACK_ABT, + grows = high_to_low + ); + stack "stack_und" + ( + fixed, + align = 4, + min_size = __STACK_UND, + grows = high_to_low + ); +#endif + +#if !defined(__NO_AUTO_VECTORS) && !defined(__NO_DEFAULT_AUTO_VECTORS) +# if defined(__CPU_ARMV7M__) || defined(__CPU_ARMV6M__) + // vector table with handler addresses + vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_ROM_ADDR, + template = ".text.handler_address", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + fill = loop, + no_inline + ) + { + vector ( id = 0, fill = "_START" ); // FIXME: "_lc_ub_stack" does not work + vector ( id = 1, fill = "_START" ); + } +# else +# ifdef __PIC_VECTORS + // vector table with ldrpc instructions from handler table + vector_table "vector_table" ( vector_size = 4, size = 8, run_addr = __VECTOR_TABLE_ROM_ADDR, + template = ".text.vector_ldrpc", + template_symbol = "_lc_vector_ldrpc", + vector_prefix = "_vector_ldrpc_", + fill = loop + ) + { + } + // subsequent vector table (data pool) with addresses of handlers + vector_table "handler_table" ( vector_size = 4, size = 8, run_addr = __VECTOR_TABLE_ROM_ADDR + 32, + template = ".text.handler_address", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + fill = loop[-32], + no_inline + ) + { + vector ( id = 0, fill = "_START" ); + } +# else + // vector table with branch instructions to handlers + vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_ROM_ADDR, + template = ".text.vector_branch", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + fill = loop + ) + { + vector ( id = 0, fill = "_START" ); + } +# endif +# endif +#endif + section_layout + { +#if defined(__NO_AUTO_VECTORS) + "_lc_ub_vector_table" = __VECTOR_TABLE_ROM_ADDR; + "_lc_ue_vector_table" = __VECTOR_TABLE_ROM_ADDR + __VECTOR_TABLE_SIZE; +#endif +#ifdef __VECTOR_TABLE_RAM_SPACE + // reserve space to copy vector table from ROM to RAM + group ( ordered, run_addr = __VECTOR_TABLE_RAM_ADDR ) + reserved "vector_table_space" ( size = __VECTOR_TABLE_SIZE, attributes = rwx ); +#endif +#ifdef __VECTOR_TABLE_RAM_COPY + // provide copy address symbols for copy routine + "_lc_ub_vector_table_copy" := "_lc_ub_vector_table_space"; + "_lc_ue_vector_table_copy" := "_lc_ue_vector_table_space"; +#else + // prevent copy: copy address equals orig address + "_lc_ub_vector_table_copy" := "_lc_ub_vector_table"; + "_lc_ue_vector_table_copy" := "_lc_ue_vector_table"; +#endif + // define buffer for string input via Crossview Pro debugger + group ( align = 4 ) reserved "xvwbuffer" (size=__XVWBUF, attributes=rw ); + + // define labels for bounds begin and end as used in C library +#ifndef BOUNDS_GROUP_REDEFINED + group BOUNDS_GROUP_NAME (ordered, contiguous) + { + select BOUNDS_GROUP_SELECT; + } +#endif + "_lc_ub_bounds" := addressof(group:BOUNDS_GROUP_NAME); + "_lc_ue_bounds" := addressof(group:BOUNDS_GROUP_NAME) + sizeof(group:BOUNDS_GROUP_NAME); + +#ifdef __HEAPADDR + group ( ordered, run_addr=__HEAPADDR ) + { + select "heap"; + } +#endif +#ifdef __STACKADDR + group ( ordered, run_addr=__STACKADDR ) + { + select "stack"; + } +#endif +#if !defined(__CPU_ARMV7M__) && !defined(__CPU_ARMV6M__) + // symbol to set mode bits and interrupt disable bits + // in cstart module before calling the application (main) + "_APPLICATION_MODE_" = __APPLICATION_MODE; +#endif + } + } + + bus local_bus + { + mau = 8; + width = 32; + } +} diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100E-EVAL/Settings/link.lnk b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100E-EVAL/Settings/link.lnk new file mode 100644 index 0000000000000000000000000000000000000000..a253595e95c7aa629cb766f4878744801b9e7d43 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100E-EVAL/Settings/link.lnk @@ -0,0 +1,4 @@ +-d"./settings/stm32f10x_hd_vl.lsl" +--optimize=0 +--map-file-format=2 +$(LinkObjects) diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100E-EVAL/Settings/link_extsram.lnk b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100E-EVAL/Settings/link_extsram.lnk new file mode 100644 index 0000000000000000000000000000000000000000..9ac15b9a5d01e002ae7a361c4f71d7baba82e98a --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100E-EVAL/Settings/link_extsram.lnk @@ -0,0 +1,4 @@ +-d"./settings/stm32f10x_hd_vl_extsram.lsl" +--optimize=0 +--map-file-format=2 +$(LinkObjects) diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100E-EVAL/Settings/reset_appl.scr b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100E-EVAL/Settings/reset_appl.scr new file mode 100644 index 0000000000000000000000000000000000000000..d90eb1562155bf052756c7c9ba7e12d76d11f1bd --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100E-EVAL/Settings/reset_appl.scr @@ -0,0 +1,8 @@ +// Hitex/Lue/11.02.2008 +// Executable Script file for HiTOP Debugger +// Reset application + +// Reset +RESET TARGET + + diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100E-EVAL/Settings/reset_go_main.scr b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100E-EVAL/Settings/reset_go_main.scr new file mode 100644 index 0000000000000000000000000000000000000000..db5f7535a7b26dd088fb1021ca436f7a0166a62a --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100E-EVAL/Settings/reset_go_main.scr @@ -0,0 +1,12 @@ +// Hitex/Lue/11.02.2008 +// Executable Script file for HiTOP Debugger +// Reset application & Go main + +//Reset +RESET TARGET + + +// execute program till main +Go UNTIL main +wait + diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100E-EVAL/Settings/stm32f10x_hd_vl.lsl b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100E-EVAL/Settings/stm32f10x_hd_vl.lsl new file mode 100644 index 0000000000000000000000000000000000000000..9038512c59505f44f56a15cfe22acc28e9304df4 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100E-EVAL/Settings/stm32f10x_hd_vl.lsl @@ -0,0 +1,158 @@ +//////////////////////////////////////////////////////////////////////////// +// +// File : stm32f103_cmsis.lsl +// +// Version : @(#)stm32f103_cmsis.lsl 1.2 09/06/04 +// +// Description : LSL file for the STMicroelectronics STM32F103, CMSIS version +// +// Copyright 2009 Altium BV +// +// NOTE: +// This file is derived from cm3.lsl and stm32f103.lsl. +// It is assumed that the user works with the ARMv7M architecture. +// Other architectures will not work with this lsl file. +// +//////////////////////////////////////////////////////////////////////////// + +// +// We do not want the vectors as defined in arm_arch.lsl +// +#define __NO_DEFAULT_AUTO_VECTORS 1 +#define __NR_OF_VECTORS 76 + + +#ifndef __STACK +# define __STACK 8k +#endif +#ifndef __HEAP +# define __HEAP 2k +#endif +#ifndef __VECTOR_TABLE_ROM_ADDR +# define __VECTOR_TABLE_ROM_ADDR 0x08000000 +#endif +#ifndef __XVWBUF +#define __XVWBUF 256 /* buffer used by CrossView */ +#endif + +#include + +//////////////////////////////////////////////////////////////////////////// +// +// In the STM32F10x, 3 different boot modes can be selected +// - User Flash memory is selected as boot space +// - SystemMemory is selected as boot space +// - Embedded SRAM is selected as boot space +// +// This aliases the physical memory associated with each boot mode to Block +// 000 (0x00000000 boot memory). Even when aliased in the boot memory space, +// the related memory (Flash memory or SRAM) is still accessible at its +// original memory space. +// +// If no memory is defined yet use the following memory settings +// +#ifndef __MEMORY + +memory stm32f103flash +{ + mau = 8; + type = rom; + size = 512k; + map ( size = 512k, dest_offset=0x08000000, dest=bus:ARM:local_bus); +} + +memory stm32f103ram +{ + mau = 8; + type = ram; + size = 32k; + map ( size = 32k, dest_offset=0x20000000, dest=bus:ARM:local_bus); +} + +#endif /* __MEMORY */ + + +// +// Custom vector table defines interrupts according to CMSIS standard +// +# if defined(__CPU_ARMV7M__) +section_setup ::linear +{ + // vector table with handler addresses + vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_ROM_ADDR, + template = ".text.handler_address", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + fill = loop, + no_inline + ) + { + vector ( id = 0, fill = "_START" ); // FIXME: "_lc_ub_stack" does not work + vector ( id = 1, fill = "_START" ); + vector ( id = 2, optional, fill = "NMI_Handler" ); + vector ( id = 3, optional, fill = "HardFault_Handler" ); + vector ( id = 4, optional, fill = "MemManage_Handler" ); + vector ( id = 5, optional, fill = "BusFault_Handler" ); + vector ( id = 6, optional, fill = "UsageFault_Handler" ); + vector ( id = 11, optional, fill = "SVC_Handler" ); + vector ( id = 12, optional, fill = "DebugMon_Handler" ); + vector ( id = 14, optional, fill = "PendSV_Handler" ); + vector ( id = 15, optional, fill = "SysTick_Handler" ); + + // External Interrupts : + vector ( id = 16, optional, fill = "WWDG_IRQHandler" ); // Window Watchdog + vector ( id = 17, optional, fill = "PVD_IRQHandler" ); // PVD through EXTI Line detect + vector ( id = 18, optional, fill = "TAMPER_IRQHandler" ); // Tamper + vector ( id = 19, optional, fill = "RTC_IRQHandler" ); // RTC + vector ( id = 20, optional, fill = "FLASH_IRQHandler" ); // Flash + vector ( id = 21, optional, fill = "RCC_IRQHandler" ); // RCC + vector ( id = 22, optional, fill = "EXTI0_IRQHandler" ); // EXTI Line 0 + vector ( id = 23, optional, fill = "EXTI1_IRQHandler" ); // EXTI Line 1 + vector ( id = 24, optional, fill = "EXTI2_IRQHandler" ); // EXTI Line 2 + vector ( id = 25, optional, fill = "EXTI3_IRQHandler" ); // EXTI Line 3 + vector ( id = 26, optional, fill = "EXTI4_IRQHandler" ); // EXTI Line 4 + vector ( id = 27, optional, fill = "DMA1_Channel1_IRQHandler" ); // DMA Channel 1 + vector ( id = 28, optional, fill = "DMA1_Channel2_IRQHandler" ); // DMA Channel 2 + vector ( id = 29, optional, fill = "DMA1_Channel3_IRQHandler" ); // DMA Channel 3 + vector ( id = 30, optional, fill = "DMA1_Channel4_IRQHandler" ); // DMA Channel 4 + vector ( id = 31, optional, fill = "DMA1_Channel5_IRQHandler" ); // DMA Channel 5 + vector ( id = 32, optional, fill = "DMA1_Channel6_IRQHandler" ); // DMA Channel 6 + vector ( id = 33, optional, fill = "DMA1_Channel7_IRQHandler" ); // DMA Channel 7 + vector ( id = 34, optional, fill = "ADC1_IRQHandler" ); // ADC1 + vector ( id = 39, optional, fill = "EXTI9_5_IRQHandler" ); // EXTI Line 9..5 + vector ( id = 40, optional, fill = "TIM1_BRK_TIM15_IRQHandler" ); // TIM1_BRK_TIM15_IRQHandler + vector ( id = 41, optional, fill = "TIM1_UP_TIM16_IRQHandler" ); // TIM1_UP_TIM16_IRQHandler + vector ( id = 42, optional, fill = "TIM1_TRG_COM_TIM17_IRQHandler" ); // TIM1_TRG_COM_TIM17_IRQHandler + vector ( id = 43, optional, fill = "TIM1_CC_IRQHandler" ); // TIM1 Capture Compare + vector ( id = 44, optional, fill = "TIM2_IRQHandler" ); // TIM2 + vector ( id = 45, optional, fill = "TIM3_IRQHandler" ); // TIM3 + vector ( id = 46, optional, fill = "TIM4_IRQHandler" ); // TIM4 + vector ( id = 47, optional, fill = "I2C1_EV_IRQHandler" ); // I2C1 Event + vector ( id = 48, optional, fill = "I2C1_ER_IRQHandler" ); // I2C1 Error + vector ( id = 49, optional, fill = "I2C2_EV_IRQHandler" ); // I2C2 Event + vector ( id = 50, optional, fill = "I2C2_ER_IRQHandler" ); // I2C2 Error + vector ( id = 51, optional, fill = "SPI1_IRQHandler" ); // SPI1 + vector ( id = 52, optional, fill = "SPI2_IRQHandler" ); // SPI2 + vector ( id = 53, optional, fill = "USART1_IRQHandler" ); // USART1 + vector ( id = 54, optional, fill = "USART2_IRQHandler" ); // USART2 + vector ( id = 55, optional, fill = "USART3_IRQHandler" ); // USART3 + vector ( id = 56, optional, fill = "EXTI15_10_IRQHandler" ); // EXTI Line 15..10 + vector ( id = 57, optional, fill = "RTCAlarm_IRQHandler" ); // RTC Alarm through EXTI Line + vector ( id = 58, optional, fill = "CEC_IRQHandler" ); // CEC_IRQHandler + vector ( id = 59, optional, fill = "TIM12_IRQHandler" ); // TIM12_IRQHandler + vector ( id = 60, optional, fill = "TIM13_IRQHandler" ); // TIM13_IRQHandler + vector ( id = 61, optional, fill = "TIM14_IRQHandler" ); // TIM14_IRQHandler + vector ( id = 64, optional, fill = "FSMC_IRQHandler" ); // FSMC + vector ( id = 66, optional, fill = "TIM5_IRQHandler" ); // TIM5 + vector ( id = 67, optional, fill = "SPI3_IRQHandler" ); // SPI3 + vector ( id = 68, optional, fill = "UART4_IRQHandler" ); // UART4 + vector ( id = 69, optional, fill = "UART5_IRQHandler" ); // UART5 + vector ( id = 70, optional, fill = "TIM6_DAC_IRQHandler" ); // TIM6_DAC_IRQHandler + vector ( id = 71, optional, fill = "TIM7_IRQHandler" ); // TIM7 + vector ( id = 72, optional, fill = "DMA2_Channel1_IRQHandler" ); // DMA2 Channel1 + vector ( id = 73, optional, fill = "DMA2_Channel2_IRQHandler" ); // DMA2 Channel2 + vector ( id = 74, optional, fill = "DMA2_Channel3_IRQHandler" ); // DMA2 Channel3 + vector ( id = 75, optional, fill = "DMA2_Channel4_5_IRQHandler" ); // DMA2 Channel4 and DMA2 Channel5 + } +} +# endif diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100E-EVAL/Settings/stm32f10x_hd_vl_extsram.lsl b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100E-EVAL/Settings/stm32f10x_hd_vl_extsram.lsl new file mode 100644 index 0000000000000000000000000000000000000000..ebc4fb7002251e60eec71368e1afcfa25e17c111 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100E-EVAL/Settings/stm32f10x_hd_vl_extsram.lsl @@ -0,0 +1,173 @@ +//////////////////////////////////////////////////////////////////////////// +// +// File : stm32f103_cmsis.lsl +// +// Version : @(#)stm32f103_cmsis.lsl 1.2 09/06/04 +// +// Description : LSL file for the STMicroelectronics STM32F103, CMSIS version +// +// Copyright 2009 Altium BV +// +// NOTE: +// This file is derived from cm3.lsl and stm32f103.lsl. +// It is assumed that the user works with the ARMv7M architecture. +// Other architectures will not work with this lsl file. +// +//////////////////////////////////////////////////////////////////////////// + +// +// We do not want the vectors as defined in arm_arch.lsl +// +#define __NO_DEFAULT_AUTO_VECTORS 1 +#define __NR_OF_VECTORS 76 + + +#ifndef __STACK +# define __STACK 2k +#endif +#ifndef __HEAP +# define __HEAP 2k +#endif +#ifndef __VECTOR_TABLE_ROM_ADDR +# define __VECTOR_TABLE_ROM_ADDR 0x08000000 +#endif +#ifndef __XVWBUF +#define __XVWBUF 256 /* buffer used by CrossView */ +#endif + +#include + +//////////////////////////////////////////////////////////////////////////// +// +// In the STM32F10x, 3 different boot modes can be selected +// - User Flash memory is selected as boot space +// - SystemMemory is selected as boot space +// - Embedded SRAM is selected as boot space +// +// This aliases the physical memory associated with each boot mode to Block +// 000 (0x00000000 boot memory). Even when aliased in the boot memory space, +// the related memory (Flash memory or SRAM) is still accessible at its +// original memory space. +// +// If no memory is defined yet use the following memory settings +// +#ifndef __MEMORY + +memory stm32f103flash +{ + mau = 8; + type = rom; + size = 512k; + map ( size = 512k, dest_offset=0x08000000, dest=bus:ARM:local_bus); +} + +memory stm32f103ram +{ + mau = 8; + type = ram; + size = 1024k; + map ( size = 1024k, dest_offset=0x68000000, dest=bus:ARM:local_bus); +} + +#endif /* __MEMORY */ +section_layout ::linear +{ + group( contiguous ) + { + select ".bss.stack"; + select "stack"; + } +} + + +// +// Custom vector table defines interrupts according to CMSIS standard +// +# if defined(__CPU_ARMV7M__) +section_setup ::linear +{ + // vector table with handler addresses + vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_ROM_ADDR, + template = ".text.handler_address", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + fill = loop, + no_inline + ) + { + vector ( id = 0, fill = "_stacklabel" ); // FIXME: "_lc_ub_stack" does not work + vector ( id = 1, fill = "_START" ); + vector ( id = 2, optional, fill = "NMI_Handler" ); + vector ( id = 3, optional, fill = "HardFault_Handler" ); + vector ( id = 4, optional, fill = "MemManage_Handler" ); + vector ( id = 5, optional, fill = "BusFault_Handler" ); + vector ( id = 6, optional, fill = "UsageFault_Handler" ); + vector ( id = 11, optional, fill = "SVC_Handler" ); + vector ( id = 12, optional, fill = "DebugMon_Handler" ); + vector ( id = 14, optional, fill = "PendSV_Handler" ); + vector ( id = 15, optional, fill = "SysTick_Handler" ); + + // External Interrupts : + vector ( id = 16, optional, fill = "WWDG_IRQHandler" ); // Window Watchdog + vector ( id = 17, optional, fill = "PVD_IRQHandler" ); // PVD through EXTI Line detect + vector ( id = 18, optional, fill = "TAMPER_IRQHandler" ); // Tamper + vector ( id = 19, optional, fill = "RTC_IRQHandler" ); // RTC + vector ( id = 20, optional, fill = "FLASH_IRQHandler" ); // Flash + vector ( id = 21, optional, fill = "RCC_IRQHandler" ); // RCC + vector ( id = 22, optional, fill = "EXTI0_IRQHandler" ); // EXTI Line 0 + vector ( id = 23, optional, fill = "EXTI1_IRQHandler" ); // EXTI Line 1 + vector ( id = 24, optional, fill = "EXTI2_IRQHandler" ); // EXTI Line 2 + vector ( id = 25, optional, fill = "EXTI3_IRQHandler" ); // EXTI Line 3 + vector ( id = 26, optional, fill = "EXTI4_IRQHandler" ); // EXTI Line 4 + vector ( id = 27, optional, fill = "DMA1_Channel1_IRQHandler" ); // DMA Channel 1 + vector ( id = 28, optional, fill = "DMA1_Channel2_IRQHandler" ); // DMA Channel 2 + vector ( id = 29, optional, fill = "DMA1_Channel3_IRQHandler" ); // DMA Channel 3 + vector ( id = 30, optional, fill = "DMA1_Channel4_IRQHandler" ); // DMA Channel 4 + vector ( id = 31, optional, fill = "DMA1_Channel5_IRQHandler" ); // DMA Channel 5 + vector ( id = 32, optional, fill = "DMA1_Channel6_IRQHandler" ); // DMA Channel 6 + vector ( id = 33, optional, fill = "DMA1_Channel7_IRQHandler" ); // DMA Channel 7 + vector ( id = 34, optional, fill = "ADC1_2_IRQHandler" ); // ADC1 and ADC2 + vector ( id = 35, optional, fill = "USB_HP_CAN1_TX_IRQHandler" ); // USB High Priority or CAN1 TX + vector ( id = 36, optional, fill = "USB_LP_CAN1_RX0_IRQHandler" ); // USB LowPriority or CAN1 RX0 + vector ( id = 37, optional, fill = "CAN1_RX1_IRQHandler" ); // CAN1 RX1 + vector ( id = 38, optional, fill = "CAN1_SCE_IRQHandler" ); // CAN1 SCE + vector ( id = 39, optional, fill = "EXTI9_5_IRQHandler" ); // EXTI Line 9..5 + vector ( id = 40, optional, fill = "TIM1_BRK_TIM9_IRQHandler" ); // TIM1 Break + vector ( id = 41, optional, fill = "TIM1_UP_TIM10_IRQHandler" ); // TIM1 Update + vector ( id = 42, optional, fill = "TIM1_TRG_COM_TIM11_IRQHandler" ); // TIM1 Trigger and Commutation + vector ( id = 43, optional, fill = "TIM1_CC_IRQHandler" ); // TIM1 Capture Compare + vector ( id = 44, optional, fill = "TIM2_IRQHandler" ); // TIM2 + vector ( id = 45, optional, fill = "TIM3_IRQHandler" ); // TIM3 + vector ( id = 46, optional, fill = "TIM4_IRQHandler" ); // TIM4 + vector ( id = 47, optional, fill = "I2C1_EV_IRQHandler" ); // I2C1 Event + vector ( id = 48, optional, fill = "I2C1_ER_IRQHandler" ); // I2C1 Error + vector ( id = 49, optional, fill = "I2C2_EV_IRQHandler" ); // I2C2 Event + vector ( id = 50, optional, fill = "I2C2_ER_IRQHandler" ); // I2C2 Error + vector ( id = 51, optional, fill = "SPI1_IRQHandler" ); // SPI1 + vector ( id = 52, optional, fill = "SPI2_IRQHandler" ); // SPI2 + vector ( id = 53, optional, fill = "USART1_IRQHandler" ); // USART1 + vector ( id = 54, optional, fill = "USART2_IRQHandler" ); // USART2 + vector ( id = 55, optional, fill = "USART3_IRQHandler" ); // USART3 + vector ( id = 56, optional, fill = "EXTI15_10_IRQHandler" ); // EXTI Line 15..10 + vector ( id = 57, optional, fill = "RTCAlarm_IRQHandler" ); // RTC Alarm through EXTI Line + vector ( id = 58, optional, fill = "USBWakeUp_IRQHandler" ); // USB Wakeup from suspend + vector ( id = 59, optional, fill = "TIM8_BRK_TIM12_IRQHandler" ); // TIM8 Break + vector ( id = 60, optional, fill = "TIM8_UP_TIM13_IRQHandler" ); // TIM8 Update + vector ( id = 61, optional, fill = "TIM8_TRG_COM_TIM14_IRQHandler" ); // TIM8 Trigger and Commutation + vector ( id = 62, optional, fill = "TIM8_CC_IRQHandler" ); // TIM8 Capture Compare + vector ( id = 63, optional, fill = "ADC3_IRQHandler" ); // ADC3 + vector ( id = 64, optional, fill = "FSMC_IRQHandler" ); // FSMC + vector ( id = 65, optional, fill = "SDIO_IRQHandler" ); // SDIO + vector ( id = 66, optional, fill = "TIM5_IRQHandler" ); // TIM5 + vector ( id = 67, optional, fill = "SPI3_IRQHandler" ); // SPI3 + vector ( id = 68, optional, fill = "UART4_IRQHandler" ); // UART4 + vector ( id = 69, optional, fill = "UART5_IRQHandler" ); // UART5 + vector ( id = 70, optional, fill = "TIM6_IRQHandler" ); // TIM6 + vector ( id = 71, optional, fill = "TIM7_IRQHandler" ); // TIM7 + vector ( id = 72, optional, fill = "DMA2_Channel1_IRQHandler" ); // DMA2 Channel1 + vector ( id = 73, optional, fill = "DMA2_Channel2_IRQHandler" ); // DMA2 Channel2 + vector ( id = 74, optional, fill = "DMA2_Channel3_IRQHandler" ); // DMA2 Channel3 + vector ( id = 75, optional, fill = "DMA2_Channel4_5_IRQHandler" ); // DMA2 Channel4 and DMA2 Channel5 + } +} +# endif diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100E-EVAL/cstart_thumb2.asm b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100E-EVAL/cstart_thumb2.asm new file mode 100644 index 0000000000000000000000000000000000000000..12dc0d02dd7f73c60656a8293afd8da477958793 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100E-EVAL/cstart_thumb2.asm @@ -0,0 +1,148 @@ + + +;; NOTE: To allow the use of this file for both ARMv6M and ARMv7M, +;; we will only use 16-bit Thumb intructions. + + .extern _lc_ub_stack ; usr/sys mode stack pointer + .extern _lc_ue_stack ; symbol required by debugger + .extern _lc_ub_table ; ROM to RAM copy table + .extern main + .extern _Exit + .extern exit + .weak exit + .global __get_argcv + .weak __get_argcv + .extern __argcvbuf + .weak __argcvbuf + .extern __init_hardware + .extern __init_vector_table + .extern SystemInit + + .if @defined('__PROF_ENABLE__') + .extern __prof_init + .endif + .if @defined('__POSIX__') + .extern posix_main + .extern _posix_boot_stack_top + .endif + + .global _START + + .section .text.cstart + + .thumb +_START: + ;; anticipate possible ROM/RAM remapping + ;; by loading the 'real' program address + ldr r1,=_Next + bx r1 +_Next: + ;; initialize the stack pointer + ldr r1,=_lc_ub_stack ; TODO: make this part of the vector table + mov sp,r1 + + ;; call a user function which initializes hardware + ;; such as ROM/RAM re-mapping or MMU configuration + bl __init_hardware + + ;ldr r0, =SystemInit + ;bx r0 + bl SystemInit + + ;; copy initialized sections from ROM to RAM + ;; and clear uninitialized data sections in RAM + + ldr r3,=_lc_ub_table + movs r0,#0 +cploop: + ldr r4,[r3,#0] ; load type + ldr r5,[r3,#4] ; dst address + ldr r6,[r3,#8] ; src address + ldr r7,[r3,#12] ; size + + cmp r4,#1 + beq copy + cmp r4,#2 + beq clear + b done + +copy: + subs r7,r7,#1 + ldrb r1,[r6,r7] + strb r1,[r5,r7] + bne copy + + adds r3,r3,#16 + b cploop + +clear: + subs r7,r7,#1 + strb r0,[r5,r7] + bne clear + + adds r3,r3,#16 + b cploop + +done: + ;; initialize or copy the vector table + bl __init_vector_table + + .if @defined('__POSIX__') + + ;; posix stack buffer for system upbringing + ldr r0,=_posix_boot_stack_top + ldr r0, [r0] + mov sp,r0 + + .else + + ;; load r10 with end of USR/SYS stack, which is + ;; needed in case stack overflow checking is on + ;; NOTE: use 16-bit instructions only, for ARMv6M + ldr r0,=_lc_ue_stack + mov r10,r0 + + .endif + + .if @defined('__PROF_ENABLE__') + bl __prof_init + .endif + + .if @defined('__POSIX__') + ;; call posix_main with no arguments + bl posix_main + .else + ;; retrieve argc and argv (default argv[0]==NULL & argc==0) + bl __get_argcv + ldr r1,=__argcvbuf + ;; call main + bl main + .endif + + ;; call exit using the return value from main() + ;; Note. Calling exit will also run all functions + ;; that were supplied through atexit(). + bl exit + +__get_argcv: ; weak definition + movs r0,#0 + bx lr + + .ltorg + .endsec + + .calls '_START','__init_hardware' + .calls '_START','__init_vector_table' + .if @defined('__PROF_ENABLE__') + .calls '_START','__prof_init' + .endif + .if @defined('__POSIX__') + .calls '_START','posix_main' + .else + .calls '_START','__get_argcv' + .calls '_START','main' + .endif + .calls '_START','exit' + .calls '_START','',0 + + .end diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100E-EVAL/readme.txt b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100E-EVAL/readme.txt new file mode 100644 index 0000000000000000000000000000000000000000..79c70bc356c1d32cb9e9c895e7b26ca45c5badd9 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100E-EVAL/readme.txt @@ -0,0 +1,94 @@ +/** + @page HiTOP5_STM32100E HiTOP Project Template for STM32F10x High-density Value line devices + + @verbatim + ******************** (C) COPYRIGHT 2011 STMicroelectronics ******************* + * @file readme.txt + * @author MCD Application Team + * @version V3.5.0 + * @date 08-April-2011 + * @brief This sub directory contains all the user modifiable files needed + * to create a new project linked with the STM32F10x Standard Peripheral + * Library and working with HiTOP software toolchain (version 5.40 and later). + ****************************************************************************** + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. + * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, + * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE + * CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING + * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + ****************************************************************************** + @endverbatim + +@par Directory contents + + - Project.htp: A pre-configured project file with the provided library + structure that produces an executable image with HiTOP + + - cstart_thumb2.asm: This file initializes the stack pointer and copy initialized + sections from ROM to RAM. + + - Objects: This mandatory directory contains the executable images. + + - Settings: This directory contains the linker and script files. + - arm_arch.lsl: This file is used to place program code (readonly) + in internal FLASH and data (readwrite, Stack and Heap) + in internal SRAM. + + - link.lnk: This file is the HiTOP linker it invokes the stm32f10x_hd_vl.lsl + + - linkextsram.lnk: This file is the HiTOP linker it invokes the stm32f10x_hd_vl_extsram.lsl + + - reset_appl.scr: This file is a HiTOP script it performs a target reset. + + - reset_go_main.scr: This file is a HiTOP script and it sets the Program + Counter at the "main" instruction. + + - StartupScript.scr: This file is a HiTOP script and it performs a target + reset before loading The executable image. + + - stm32f10x_hd_vl.lsl: This file is used to place program code (readonly) + in internal FLASH and data (readwrite, Stack and Heap) + in internal SRAM. + It contains also the vector table of the STM32 + High-density Value line devices. + You can customize this file to your need. + + - stm32f10x_hd_vl_extsram.lsl: This file used to place program code (readonly) in + internal FLASH and data (readwrite, Stack and Heap) + in external SRAM. + It contains also the vector table of the STM32 High-density + Value line devices. + You can customize this file to your need. + This file is used only with STM32 High-density + Value line devices. + +@par How to use it ? + +- Open the HiTOP toolchain. +- Browse to open the project.htp +- A "Download application" window is displayed, click "cancel". +- Rebuild all files: Project->Rebuild all +- Load project image : Click "ok" in the "Download application" window. +- Run the "RESET_GO_MAIN" script to set the PC at the "main" +- Run program: Debug->Go(F5). + +@note + - Low-density Value line devices are STM32F100xx microcontrollers where the + Flash memory density ranges between 16 and 32 Kbytes. + - Low-density devices are STM32F101xx, STM32F102xx and STM32F103xx + microcontrollers where the Flash memory density ranges between 16 and 32 Kbytes. + - Medium-density Value line devices are STM32F100xx microcontrollers where + the Flash memory density ranges between 64 and 128 Kbytes. + - Medium-density devices are STM32F101xx, STM32F102xx and STM32F103xx + microcontrollers where the Flash memory density ranges between 64 and 128 Kbytes. + - High-density Value line devices are STM32F100xx microcontrollers where the + Flash memory density ranges between 256 and 512 Kbytes. + - High-density devices are STM32F101xx and STM32F103xx microcontrollers where + the Flash memory density ranges between 256 and 512 Kbytes. + - XL-density devices are STM32F101xx and STM32F103xx microcontrollers where + the Flash memory density ranges between 512 and 1024 Kbytes. + - Connectivity line devices are STM32F105xx and STM32F107xx microcontrollers. + + *

© COPYRIGHT 2011 STMicroelectronics

+ */ diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100E-EVAL/setstack.asm b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100E-EVAL/setstack.asm new file mode 100644 index 0000000000000000000000000000000000000000..2c11b4c520049a8360c9bc76251a01e76e25a81b --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM32100E-EVAL/setstack.asm @@ -0,0 +1,4 @@ + .section .bss.stack + .global _stacklabel +_stacklabel: + .endsec \ No newline at end of file diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210B-EVAL/Project.htp b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210B-EVAL/Project.htp new file mode 100644 index 0000000000000000000000000000000000000000..4c9ed12d02ffb963756bafe60205ce426d9d1395 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210B-EVAL/Project.htp @@ -0,0 +1,1001 @@ + + + + + + + + + + + + + + + + + + + + + + + +
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
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+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + V5.20 + + + + + + + + + USB + Tantino for Cortex-10083 + + + + TANTINO_CORTEX_M3 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + .\objects\ + C:\PWA_2007\IntroPack\Project\STM32F10x_StdPeriph_Template\HiTOP\STM3210B-EVAL\objects\ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210B-EVAL/Settings/STM32F10x_md.lsl b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210B-EVAL/Settings/STM32F10x_md.lsl new file mode 100644 index 0000000000000000000000000000000000000000..0eab7a9e87d32c545b71beebac80d87fb588d40d --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210B-EVAL/Settings/STM32F10x_md.lsl @@ -0,0 +1,149 @@ +//////////////////////////////////////////////////////////////////////////// +// +// File : stm32f103_cmsis.lsl +// +// Version : @(#)stm32f103_cmsis.lsl 1.2 09/06/04 +// +// Description : LSL file for the STMicroelectronics STM32F103, CMSIS version +// +// Copyright 2009 Altium BV +// +// NOTE: +// This file is derived from cm3.lsl and stm32f103.lsl. +// It is assumed that the user works with the ARMv7M architecture. +// Other architectures will not work with this lsl file. +// +//////////////////////////////////////////////////////////////////////////// + +// +// We do not want the vectors as defined in arm_arch.lsl +// +#define __NO_DEFAULT_AUTO_VECTORS 1 +#define __NR_OF_VECTORS 76 + + +#ifndef __STACK +# define __STACK 8k +#endif +#ifndef __HEAP +# define __HEAP 2k +#endif +#ifndef __VECTOR_TABLE_ROM_ADDR +# define __VECTOR_TABLE_ROM_ADDR 0x08000000 +#endif +#ifndef __XVWBUF +#define __XVWBUF 256 /* buffer used by CrossView */ +#endif + +#include + +//////////////////////////////////////////////////////////////////////////// +// +// In the STM32F10x, 3 different boot modes can be selected +// - User Flash memory is selected as boot space +// - SystemMemory is selected as boot space +// - Embedded SRAM is selected as boot space +// +// This aliases the physical memory associated with each boot mode to Block +// 000 (0x00000000 boot memory). Even when aliased in the boot memory space, +// the related memory (Flash memory or SRAM) is still accessible at its +// original memory space. +// +// If no memory is defined yet use the following memory settings +// +#ifndef __MEMORY + +memory stm32f103flash +{ + mau = 8; + type = rom; + size = 128k; + map ( size = 128k, dest_offset=0x08000000, dest=bus:ARM:local_bus); +} + +memory stm32f103ram +{ + mau = 8; + type = ram; + size = 20k; + map ( size = 20k, dest_offset=0x20000000, dest=bus:ARM:local_bus); +} + +#endif /* __MEMORY */ + + +// +// Custom vector table defines interrupts according to CMSIS standard +// +# if defined(__CPU_ARMV7M__) +section_setup ::linear +{ + // vector table with handler addresses + vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_ROM_ADDR, + template = ".text.handler_address", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + fill = loop, + no_inline + ) + { + vector ( id = 0, fill = "_START" ); // FIXME: "_lc_ub_stack" does not work + vector ( id = 1, fill = "_START" ); + vector ( id = 2, optional, fill = "NMI_Handler" ); + vector ( id = 3, optional, fill = "HardFault_Handler" ); + vector ( id = 4, optional, fill = "MemManage_Handler" ); + vector ( id = 5, optional, fill = "BusFault_Handler" ); + vector ( id = 6, optional, fill = "UsageFault_Handler" ); + vector ( id = 11, optional, fill = "SVC_Handler" ); + vector ( id = 12, optional, fill = "DebugMon_Handler" ); + vector ( id = 14, optional, fill = "PendSV_Handler" ); + vector ( id = 15, optional, fill = "SysTick_Handler" ); + + // External Interrupts : + vector ( id = 16, optional, fill = "WWDG_IRQHandler" ); // Window Watchdog + vector ( id = 17, optional, fill = "PVD_IRQHandler" ); // PVD through EXTI Line detect + vector ( id = 18, optional, fill = "TAMPER_IRQHandler" ); // Tamper + vector ( id = 19, optional, fill = "RTC_IRQHandler" ); // RTC + vector ( id = 20, optional, fill = "FLASH_IRQHandler" ); // Flash + vector ( id = 21, optional, fill = "RCC_IRQHandler" ); // RCC + vector ( id = 22, optional, fill = "EXTI0_IRQHandler" ); // EXTI Line 0 + vector ( id = 23, optional, fill = "EXTI1_IRQHandler" ); // EXTI Line 1 + vector ( id = 24, optional, fill = "EXTI2_IRQHandler" ); // EXTI Line 2 + vector ( id = 25, optional, fill = "EXTI3_IRQHandler" ); // EXTI Line 3 + vector ( id = 26, optional, fill = "EXTI4_IRQHandler" ); // EXTI Line 4 + vector ( id = 27, optional, fill = "DMA1_Channel1_IRQHandler" ); // DMA Channel 1 + vector ( id = 28, optional, fill = "DMA1_Channel2_IRQHandler" ); // DMA Channel 2 + vector ( id = 29, optional, fill = "DMA1_Channel3_IRQHandler" ); // DMA Channel 3 + vector ( id = 30, optional, fill = "DMA1_Channel4_IRQHandler" ); // DMA Channel 4 + vector ( id = 31, optional, fill = "DMA1_Channel5_IRQHandler" ); // DMA Channel 5 + vector ( id = 32, optional, fill = "DMA1_Channel6_IRQHandler" ); // DMA Channel 6 + vector ( id = 33, optional, fill = "DMA1_Channel7_IRQHandler" ); // DMA Channel 7 + vector ( id = 34, optional, fill = "ADC1_2_IRQHandler" ); // ADC1 and ADC2 + vector ( id = 35, optional, fill = "USB_HP_CAN1_TX_IRQHandler" ); // USB High Priority or CAN1 TX + vector ( id = 36, optional, fill = "USB_LP_CAN1_RX0_IRQHandler" ); // USB LowPriority or CAN RX0 + vector ( id = 37, optional, fill = "CAN1_RX1_IRQHandler" ); // CAN1 RX1 + vector ( id = 38, optional, fill = "CAN1_SCE_IRQHandler" ); // CAN1 SCE + vector ( id = 39, optional, fill = "EXTI9_5_IRQHandler" ); // EXTI Line 9..5 + vector ( id = 40, optional, fill = "TIM1_BRK_IRQHandler" ); // TIM1 Break + vector ( id = 41, optional, fill = "TIM1_UP_IRQHandler" ); // TIM1 Update + vector ( id = 42, optional, fill = "TIM1_TRG_COM_IRQHandler" ); // TIM1 Trigger and Commutation + vector ( id = 43, optional, fill = "TIM1_CC_IRQHandler" ); // TIM1 Capture Compare + vector ( id = 44, optional, fill = "TIM2_IRQHandler" ); // TIM2 + vector ( id = 45, optional, fill = "TIM3_IRQHandler" ); // TIM3 + vector ( id = 46, optional, fill = "TIM4_IRQHandler" ); // TIM4 + vector ( id = 47, optional, fill = "I2C1_EV_IRQHandler" ); // I2C1 Event + vector ( id = 48, optional, fill = "I2C1_ER_IRQHandler" ); // I2C1 Error + vector ( id = 49, optional, fill = "I2C2_EV_IRQHandler" ); // I2C2 Event + vector ( id = 50, optional, fill = "I2C2_ER_IRQHandler" ); // I2C2 Error + vector ( id = 51, optional, fill = "SPI1_IRQHandler" ); // SPI1 + vector ( id = 52, optional, fill = "SPI2_IRQHandler" ); // SPI2 + vector ( id = 53, optional, fill = "USART1_IRQHandler" ); // USART1 + vector ( id = 54, optional, fill = "USART2_IRQHandler" ); // USART2 + vector ( id = 55, optional, fill = "USART3_IRQHandler" ); // USART3 + vector ( id = 56, optional, fill = "EXTI15_10_IRQHandler" ); // EXTI Line 15..10 + vector ( id = 57, optional, fill = "RTCAlarm_IRQHandler" ); // RTC Alarm through EXTI Line + vector ( id = 58, optional, fill = "USBWakeUp_IRQHandler" ); // USB Wakeup from suspend + + } +} +# endif diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210B-EVAL/Settings/StartupScript.scr b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210B-EVAL/Settings/StartupScript.scr new file mode 100644 index 0000000000000000000000000000000000000000..e3dbe2309d1c25d27e98e5f926688d98af736d85 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210B-EVAL/Settings/StartupScript.scr @@ -0,0 +1,9 @@ +// Hitex/Lue/11.02.2008 +// Executable Script file for HiTOP Debugger +// Reset application + +// Reset +RESET TARGET + + + diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210B-EVAL/Settings/arm_arch.lsl b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210B-EVAL/Settings/arm_arch.lsl new file mode 100644 index 0000000000000000000000000000000000000000..3e6d3031e15b73a34caa2408b998eda685da1811 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210B-EVAL/Settings/arm_arch.lsl @@ -0,0 +1,287 @@ +//////////////////////////////////////////////////////////////////////////// +// +// File : arm_arch.lsl +// +// Version : @(#)arm_arch.lsl 1.4 09/04/17 +// +// Description : Generic LSL file for ARM architectures +// +// Copyright 2008-2009 Altium BV +// +//////////////////////////////////////////////////////////////////////////// + +#ifndef __STACK +# define __STACK 32k +#endif +#ifndef __HEAP +# define __HEAP 32k +#endif +#ifndef __STACK_FIQ +# define __STACK_FIQ 8 +#endif +#ifndef __STACK_IRQ +# define __STACK_IRQ 8 +#endif +#ifndef __STACK_SVC +# define __STACK_SVC 8 +#endif +#ifndef __STACK_ABT +# define __STACK_ABT 8 +#endif +#ifndef __STACK_UND +# define __STACK_UND 8 +#endif +#ifndef __PROCESSOR_MODE +# define __PROCESSOR_MODE 0x1F /* SYS mode */ +#endif +#ifndef __IRQ_BIT +# define __IRQ_BIT 0x80 /* IRQ interrupts disabled */ +#endif +#ifndef __FIQ_BIT +# define __FIQ_BIT 0x40 /* FIQ interrupts disabled */ +#endif + +#define __APPLICATION_MODE (__PROCESSOR_MODE | __IRQ_BIT | __FIQ_BIT) + +#ifndef __VECTOR_TABLE_ROM_ADDR +# define __VECTOR_TABLE_ROM_ADDR 0x00000000 +#endif + +#ifndef __VECTOR_TABLE_RAM_ADDR +# define __VECTOR_TABLE_RAM_ADDR 0x00000000 +#endif + +#if defined(__CPU_ARMV7M__) || defined(__CPU_ARMV6M__) +# ifndef __NR_OF_VECTORS +# define __NR_OF_VECTORS 16 +# endif +# define __VECTOR_TABLE_SIZE (__NR_OF_VECTORS * 4) +#else +# ifdef __PIC_VECTORS +# define __VECTOR_TABLE_SIZE 64 +# else +# ifdef __FIQ_HANDLER_INLINE +# define __VECTOR_TABLE_SIZE 28 +# define __NR_OF_VECTORS 7 +# else +# define __VECTOR_TABLE_SIZE 32 +# define __NR_OF_VECTORS 8 +# endif +# endif +#endif + +#ifndef __VECTOR_TABLE_RAM_SPACE +# undef __VECTOR_TABLE_RAM_COPY +#endif + +#ifndef __XVWBUF +# define __XVWBUF 0 /* buffer used by CrossView Pro */ +#endif + +#define BOUNDS_GROUP_NAME grp_bounds +#define BOUNDS_GROUP_SELECT "bounds" + +architecture ARM +{ + endianness + { + little; + big; + } + + space linear + { + id = 1; + mau = 8; + map (size = 4G, dest = bus:local_bus); + + copytable + ( + align = 4, + copy_unit = 1, + dest = linear + ); + + start_address + ( + // It is not strictly necessary to define a run_addr for _START + // because hardware starts execution at address 0x0 which should + // be the vector table with a jump to the relocatable _START, but + // an absolute address can prevent the branch to be out-of-range. + // Or _START may be the entry point at reset and the reset handler + // copies the vector table to address 0x0 after some ROM/RAM memory + // re-mapping. In that case _START should be at a fixed address + // in ROM, specifically the alias of address 0x0 before memory + // re-mapping. +#ifdef __START + run_addr = __START, +#endif + symbol = "_START" + ); + + stack "stack" + ( +#ifdef __STACK_FIXED + fixed, +#endif + align = 4, + min_size = __STACK, + grows = high_to_low + ); + + heap "heap" + ( +#ifdef __HEAP_FIXED + fixed, +#endif + align = 4, + min_size=__HEAP + ); + +#if !defined(__CPU_ARMV7M__) && !defined(__CPU_ARMV6M__) + stack "stack_fiq" + ( + fixed, + align = 4, + min_size = __STACK_FIQ, + grows = high_to_low + ); + stack "stack_irq" + ( + fixed, + align = 4, + min_size = __STACK_IRQ, + grows = high_to_low + ); + stack "stack_svc" + ( + fixed, + align = 4, + min_size = __STACK_SVC, + grows = high_to_low + ); + stack "stack_abt" + ( + fixed, + align = 4, + min_size = __STACK_ABT, + grows = high_to_low + ); + stack "stack_und" + ( + fixed, + align = 4, + min_size = __STACK_UND, + grows = high_to_low + ); +#endif + +#if !defined(__NO_AUTO_VECTORS) && !defined(__NO_DEFAULT_AUTO_VECTORS) +# if defined(__CPU_ARMV7M__) || defined(__CPU_ARMV6M__) + // vector table with handler addresses + vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_ROM_ADDR, + template = ".text.handler_address", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + fill = loop, + no_inline + ) + { + vector ( id = 0, fill = "_START" ); // FIXME: "_lc_ub_stack" does not work + vector ( id = 1, fill = "_START" ); + } +# else +# ifdef __PIC_VECTORS + // vector table with ldrpc instructions from handler table + vector_table "vector_table" ( vector_size = 4, size = 8, run_addr = __VECTOR_TABLE_ROM_ADDR, + template = ".text.vector_ldrpc", + template_symbol = "_lc_vector_ldrpc", + vector_prefix = "_vector_ldrpc_", + fill = loop + ) + { + } + // subsequent vector table (data pool) with addresses of handlers + vector_table "handler_table" ( vector_size = 4, size = 8, run_addr = __VECTOR_TABLE_ROM_ADDR + 32, + template = ".text.handler_address", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + fill = loop[-32], + no_inline + ) + { + vector ( id = 0, fill = "_START" ); + } +# else + // vector table with branch instructions to handlers + vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_ROM_ADDR, + template = ".text.vector_branch", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + fill = loop + ) + { + vector ( id = 0, fill = "_START" ); + } +# endif +# endif +#endif + section_layout + { +#if defined(__NO_AUTO_VECTORS) + "_lc_ub_vector_table" = __VECTOR_TABLE_ROM_ADDR; + "_lc_ue_vector_table" = __VECTOR_TABLE_ROM_ADDR + __VECTOR_TABLE_SIZE; +#endif +#ifdef __VECTOR_TABLE_RAM_SPACE + // reserve space to copy vector table from ROM to RAM + group ( ordered, run_addr = __VECTOR_TABLE_RAM_ADDR ) + reserved "vector_table_space" ( size = __VECTOR_TABLE_SIZE, attributes = rwx ); +#endif +#ifdef __VECTOR_TABLE_RAM_COPY + // provide copy address symbols for copy routine + "_lc_ub_vector_table_copy" := "_lc_ub_vector_table_space"; + "_lc_ue_vector_table_copy" := "_lc_ue_vector_table_space"; +#else + // prevent copy: copy address equals orig address + "_lc_ub_vector_table_copy" := "_lc_ub_vector_table"; + "_lc_ue_vector_table_copy" := "_lc_ue_vector_table"; +#endif + // define buffer for string input via Crossview Pro debugger + group ( align = 4 ) reserved "xvwbuffer" (size=__XVWBUF, attributes=rw ); + + // define labels for bounds begin and end as used in C library +#ifndef BOUNDS_GROUP_REDEFINED + group BOUNDS_GROUP_NAME (ordered, contiguous) + { + select BOUNDS_GROUP_SELECT; + } +#endif + "_lc_ub_bounds" := addressof(group:BOUNDS_GROUP_NAME); + "_lc_ue_bounds" := addressof(group:BOUNDS_GROUP_NAME) + sizeof(group:BOUNDS_GROUP_NAME); + +#ifdef __HEAPADDR + group ( ordered, run_addr=__HEAPADDR ) + { + select "heap"; + } +#endif +#ifdef __STACKADDR + group ( ordered, run_addr=__STACKADDR ) + { + select "stack"; + } +#endif +#if !defined(__CPU_ARMV7M__) && !defined(__CPU_ARMV6M__) + // symbol to set mode bits and interrupt disable bits + // in cstart module before calling the application (main) + "_APPLICATION_MODE_" = __APPLICATION_MODE; +#endif + } + } + + bus local_bus + { + mau = 8; + width = 32; + } +} diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210B-EVAL/Settings/link.lnk b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210B-EVAL/Settings/link.lnk new file mode 100644 index 0000000000000000000000000000000000000000..f95945a1378725c9344fa391c35a3304dfa43220 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210B-EVAL/Settings/link.lnk @@ -0,0 +1,4 @@ +-d"./settings/STM32F10x_md.lsl" +--optimize=0 +--map-file-format=2 +$(LinkObjects) diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210B-EVAL/Settings/reset_appl.scr b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210B-EVAL/Settings/reset_appl.scr new file mode 100644 index 0000000000000000000000000000000000000000..d90eb1562155bf052756c7c9ba7e12d76d11f1bd --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210B-EVAL/Settings/reset_appl.scr @@ -0,0 +1,8 @@ +// Hitex/Lue/11.02.2008 +// Executable Script file for HiTOP Debugger +// Reset application + +// Reset +RESET TARGET + + diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210B-EVAL/Settings/reset_go_main.scr b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210B-EVAL/Settings/reset_go_main.scr new file mode 100644 index 0000000000000000000000000000000000000000..3e9c066994344d9767229e16c69308cc5bdc8ee2 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210B-EVAL/Settings/reset_go_main.scr @@ -0,0 +1,12 @@ +// Hitex/Lue/11.02.2008 +// Executable Script file for HiTOP Debugger +// Reset application & Go main + +// Reset +RESET TARGET + + +// execute program till main +Go UNTIL main +wait + diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210B-EVAL/cstart_thumb2.asm b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210B-EVAL/cstart_thumb2.asm new file mode 100644 index 0000000000000000000000000000000000000000..12dc0d02dd7f73c60656a8293afd8da477958793 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210B-EVAL/cstart_thumb2.asm @@ -0,0 +1,148 @@ + + +;; NOTE: To allow the use of this file for both ARMv6M and ARMv7M, +;; we will only use 16-bit Thumb intructions. + + .extern _lc_ub_stack ; usr/sys mode stack pointer + .extern _lc_ue_stack ; symbol required by debugger + .extern _lc_ub_table ; ROM to RAM copy table + .extern main + .extern _Exit + .extern exit + .weak exit + .global __get_argcv + .weak __get_argcv + .extern __argcvbuf + .weak __argcvbuf + .extern __init_hardware + .extern __init_vector_table + .extern SystemInit + + .if @defined('__PROF_ENABLE__') + .extern __prof_init + .endif + .if @defined('__POSIX__') + .extern posix_main + .extern _posix_boot_stack_top + .endif + + .global _START + + .section .text.cstart + + .thumb +_START: + ;; anticipate possible ROM/RAM remapping + ;; by loading the 'real' program address + ldr r1,=_Next + bx r1 +_Next: + ;; initialize the stack pointer + ldr r1,=_lc_ub_stack ; TODO: make this part of the vector table + mov sp,r1 + + ;; call a user function which initializes hardware + ;; such as ROM/RAM re-mapping or MMU configuration + bl __init_hardware + + ;ldr r0, =SystemInit + ;bx r0 + bl SystemInit + + ;; copy initialized sections from ROM to RAM + ;; and clear uninitialized data sections in RAM + + ldr r3,=_lc_ub_table + movs r0,#0 +cploop: + ldr r4,[r3,#0] ; load type + ldr r5,[r3,#4] ; dst address + ldr r6,[r3,#8] ; src address + ldr r7,[r3,#12] ; size + + cmp r4,#1 + beq copy + cmp r4,#2 + beq clear + b done + +copy: + subs r7,r7,#1 + ldrb r1,[r6,r7] + strb r1,[r5,r7] + bne copy + + adds r3,r3,#16 + b cploop + +clear: + subs r7,r7,#1 + strb r0,[r5,r7] + bne clear + + adds r3,r3,#16 + b cploop + +done: + ;; initialize or copy the vector table + bl __init_vector_table + + .if @defined('__POSIX__') + + ;; posix stack buffer for system upbringing + ldr r0,=_posix_boot_stack_top + ldr r0, [r0] + mov sp,r0 + + .else + + ;; load r10 with end of USR/SYS stack, which is + ;; needed in case stack overflow checking is on + ;; NOTE: use 16-bit instructions only, for ARMv6M + ldr r0,=_lc_ue_stack + mov r10,r0 + + .endif + + .if @defined('__PROF_ENABLE__') + bl __prof_init + .endif + + .if @defined('__POSIX__') + ;; call posix_main with no arguments + bl posix_main + .else + ;; retrieve argc and argv (default argv[0]==NULL & argc==0) + bl __get_argcv + ldr r1,=__argcvbuf + ;; call main + bl main + .endif + + ;; call exit using the return value from main() + ;; Note. Calling exit will also run all functions + ;; that were supplied through atexit(). + bl exit + +__get_argcv: ; weak definition + movs r0,#0 + bx lr + + .ltorg + .endsec + + .calls '_START','__init_hardware' + .calls '_START','__init_vector_table' + .if @defined('__PROF_ENABLE__') + .calls '_START','__prof_init' + .endif + .if @defined('__POSIX__') + .calls '_START','posix_main' + .else + .calls '_START','__get_argcv' + .calls '_START','main' + .endif + .calls '_START','exit' + .calls '_START','',0 + + .end diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210B-EVAL/readme.txt b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210B-EVAL/readme.txt new file mode 100644 index 0000000000000000000000000000000000000000..54156073d87885505347f9dfbd2fc5430816f813 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210B-EVAL/readme.txt @@ -0,0 +1,83 @@ +/** + @page HiTOP5_STM3210B HiTOP Project Template for STM32F10x Medium-density devices + + @verbatim + ******************** (C) COPYRIGHT 2011 STMicroelectronics ******************* + * @file readme.txt + * @author MCD Application Team + * @version V3.5.0 + * @date 08-April-2011 + * @brief This sub directory contains all the user modifiable files needed + * to create a new project linked with the STM32F10x Standard Peripheral + * Library and working with HiTOP software toolchain (version 5.40 and later). + ****************************************************************************** + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. + * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, + * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE + * CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING + * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + ****************************************************************************** + @endverbatim + +@par Directory contents + + - Project.htp: A pre-configured project file with the provided library + structure that produces an executable image with HiTOP + + - cstart_thumb2.asm: This file initializes the stack pointer and copy initialized + sections from ROM to RAM. + + - Objects: This mandatory directory contains the executable images. + + - Settings: This directory contains the linker and script files. + - arm_arch.lsl: This file is used to place program code (readonly) + in internal FLASH and data (readwrite, Stack and Heap) + in internal SRAM. + + - link.lnk: This file is the HiTOP linker it invokes the STM32F10x_md.lsl. + + - reset_appl.scr: This file is a HiTOP script it performs a target reset. + + - reset_go_main.scr: This file is a HiTOP script and it sets the Program + Counter at the "main" instruction. + + - StartupScript.scr: This file is a HiTOP script and it performs a target + reset before loading The executable image. + + - STM32F10x_md.lsl: This file is used to place program code (readonly) + in internal FLASH and data (readwrite, Stack and Heap) + in internal SRAM. + It contains also the vector table of the STM32 + Medium-density devices. + You can customize this file to your need. + +@par How to use it ? + +- Open the HiTOP toolchain. +- Browse to open the project.htp +- A "Download application" window is displayed, click "cancel". +- Rebuild all files: Project->Rebuild all +- Load project image : Click "ok" in the "Download application" window. +- Run the "RESET_GO_MAIN" script to set the PC at the "main" +- Run program: Debug->Go(F5). + +@note + - Low-density Value line devices are STM32F100xx microcontrollers where the + Flash memory density ranges between 16 and 32 Kbytes. + - Low-density devices are STM32F101xx, STM32F102xx and STM32F103xx + microcontrollers where the Flash memory density ranges between 16 and 32 Kbytes. + - Medium-density Value line devices are STM32F100xx microcontrollers where + the Flash memory density ranges between 64 and 128 Kbytes. + - Medium-density devices are STM32F101xx, STM32F102xx and STM32F103xx + microcontrollers where the Flash memory density ranges between 64 and 128 Kbytes. + - High-density Value line devices are STM32F100xx microcontrollers where the + Flash memory density ranges between 256 and 512 Kbytes. + - High-density devices are STM32F101xx and STM32F103xx microcontrollers where + the Flash memory density ranges between 256 and 512 Kbytes. + - XL-density devices are STM32F101xx and STM32F103xx microcontrollers where + the Flash memory density ranges between 512 and 1024 Kbytes. + - Connectivity line devices are STM32F105xx and STM32F107xx microcontrollers. + + *

© COPYRIGHT 2011 STMicroelectronics

+ */ diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210C-EVAL/Project.htp b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210C-EVAL/Project.htp new file mode 100644 index 0000000000000000000000000000000000000000..bf71088ba5062b8fd6cc2dfc5f3adbac5f042632 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210C-EVAL/Project.htp @@ -0,0 +1,1066 @@ + + + + + + + + + + + + + + + + + + + + + + + +
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
+ + + + + + + + + +
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+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + V5.20 + + + + + + + + + USB + Tantino for Cortex-10083 + + + + TANTINO_CORTEX_M3 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + .\objects\ + C:\PWA_2007\INTROPACK\PROJECT\STM32F10x_StdPeriph_Template\HiTOP\STM3210C-EVAL\objects\ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210C-EVAL/Settings/STM32F10x_cl.lsl b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210C-EVAL/Settings/STM32F10x_cl.lsl new file mode 100644 index 0000000000000000000000000000000000000000..a85d784b2d1284906362537a14feaf109b1dc3b8 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210C-EVAL/Settings/STM32F10x_cl.lsl @@ -0,0 +1,166 @@ +//////////////////////////////////////////////////////////////////////////// +// +// File : stm32f103_cmsis.lsl +// +// Version : @(#)stm32f103_cmsis.lsl 1.2 09/06/04 +// +// Description : LSL file for the STMicroelectronics STM32F103, CMSIS version +// +// Copyright 2009 Altium BV +// +// NOTE: +// This file is derived from cm3.lsl and stm32f103.lsl. +// It is assumed that the user works with the ARMv7M architecture. +// Other architectures will not work with this lsl file. +// +//////////////////////////////////////////////////////////////////////////// + +// +// We do not want the vectors as defined in arm_arch.lsl +// +#define __NO_DEFAULT_AUTO_VECTORS 1 +#define __NR_OF_VECTORS 84 + + +#ifndef __STACK +# define __STACK 2k +#endif +#ifndef __HEAP +# define __HEAP 1k +#endif +#ifndef __VECTOR_TABLE_ROM_ADDR +# define __VECTOR_TABLE_ROM_ADDR 0x08000000 +#endif +#ifndef __XVWBUF +#define __XVWBUF 256 /* buffer used by CrossView */ +#endif + +#include + +//////////////////////////////////////////////////////////////////////////// +// +// In the STM32F10x, 3 different boot modes can be selected +// - User Flash memory is selected as boot space +// - SystemMemory is selected as boot space +// - Embedded SRAM is selected as boot space +// +// This aliases the physical memory associated with each boot mode to Block +// 000 (0x00000000 boot memory). Even when aliased in the boot memory space, +// the related memory (Flash memory or SRAM) is still accessible at its +// original memory space. +// +// If no memory is defined yet use the following memory settings +// +#ifndef __MEMORY + +memory stm32f103flash +{ + mau = 8; + type = rom; + size = 256k; + map ( size = 256k, dest_offset=0x08000000, dest=bus:ARM:local_bus); +} + +memory stm32f103ram +{ + mau = 8; + type = ram; + size = 64k; + map ( size = 64k, dest_offset=0x20000000, dest=bus:ARM:local_bus); +} + +#endif /* __MEMORY */ + + +// +// Custom vector table defines interrupts according to CMSIS standard +// +# if defined(__CPU_ARMV7M__) +section_setup ::linear +{ + // vector table with handler addresses + vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_ROM_ADDR, + template = ".text.handler_address", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + fill = loop, + no_inline + ) + { + vector ( id = 0, fill = "_START" ); // FIXME: "_lc_ub_stack" does not work + vector ( id = 1, fill = "_START" ); + vector ( id = 2, optional, fill = "NMI_Handler" ); + vector ( id = 3, optional, fill = "HardFault_Handler" ); + vector ( id = 4, optional, fill = "MemManage_Handler" ); + vector ( id = 5, optional, fill = "BusFault_Handler" ); + vector ( id = 6, optional, fill = "UsageFault_Handler" ); + vector ( id = 11, optional, fill = "SVC_Handler" ); + vector ( id = 12, optional, fill = "DebugMon_Handler" ); + vector ( id = 14, optional, fill = "PendSV_Handler" ); + vector ( id = 15, optional, fill = "SysTick_Handler" ); + + // External Interrupts : + vector ( id = 16, optional, fill = "WWDG_IRQHandler" ); // Window Watchdog + vector ( id = 17, optional, fill = "PVD_IRQHandler" ); // PVD through EXTI Line detect + vector ( id = 18, optional, fill = "TAMPER_IRQHandler" ); // Tamper + vector ( id = 19, optional, fill = "RTC_IRQHandler" ); // RTC + vector ( id = 20, optional, fill = "FLASH_IRQHandler" ); // Flash + vector ( id = 21, optional, fill = "RCC_IRQHandler" ); // RCC + vector ( id = 22, optional, fill = "EXTI0_IRQHandler" ); // EXTI Line 0 + vector ( id = 23, optional, fill = "EXTI1_IRQHandler" ); // EXTI Line 1 + vector ( id = 24, optional, fill = "EXTI2_IRQHandler" ); // EXTI Line 2 + vector ( id = 25, optional, fill = "EXTI3_IRQHandler" ); // EXTI Line 3 + vector ( id = 26, optional, fill = "EXTI4_IRQHandler" ); // EXTI Line 4 + vector ( id = 27, optional, fill = "DMA1_Channel1_IRQHandler" ); // DMA Channel 1 + vector ( id = 28, optional, fill = "DMA1_Channel2_IRQHandler" ); // DMA Channel 2 + vector ( id = 29, optional, fill = "DMA1_Channel3_IRQHandler" ); // DMA Channel 3 + vector ( id = 30, optional, fill = "DMA1_Channel4_IRQHandler" ); // DMA Channel 4 + vector ( id = 31, optional, fill = "DMA1_Channel5_IRQHandler" ); // DMA Channel 5 + vector ( id = 32, optional, fill = "DMA1_Channel6_IRQHandler" ); // DMA Channel 6 + vector ( id = 33, optional, fill = "DMA1_Channel7_IRQHandler" ); // DMA Channel 7 + vector ( id = 34, optional, fill = "ADC1_2_IRQHandler" ); // ADC1 and ADC2 + vector ( id = 35, optional, fill = "CAN1_TX_IRQHandler" ); // CAN1 TX + vector ( id = 36, optional, fill = "CAN1_RX0_IRQHandler" ); // CAN1 RX0 + vector ( id = 37, optional, fill = "CAN1_RX1_IRQHandler" ); // CAN1 RX1 + vector ( id = 38, optional, fill = "CAN1_SCE_IRQHandler" ); // CAN1 SCE + vector ( id = 39, optional, fill = "EXTI9_5_IRQHandler" ); // EXTI Line 9..5 + vector ( id = 40, optional, fill = "TIM1_BRK_IRQHandler" ); // TIM1 Break + vector ( id = 41, optional, fill = "TIM1_UP_IRQHandler" ); // TIM1 Update + vector ( id = 42, optional, fill = "TIM1_TRG_COM_IRQHandler" ); // TIM1 Trigger and Commutation + vector ( id = 43, optional, fill = "TIM1_CC_IRQHandler" ); // TIM1 Capture Compare + vector ( id = 44, optional, fill = "TIM2_IRQHandler" ); // TIM2 + vector ( id = 45, optional, fill = "TIM3_IRQHandler" ); // TIM3 + vector ( id = 46, optional, fill = "TIM4_IRQHandler" ); // TIM4 + vector ( id = 47, optional, fill = "I2C1_EV_IRQHandler" ); // I2C1 Event + vector ( id = 48, optional, fill = "I2C1_ER_IRQHandler" ); // I2C1 Error + vector ( id = 49, optional, fill = "I2C2_EV_IRQHandler" ); // I2C2 Event + vector ( id = 50, optional, fill = "I2C2_ER_IRQHandler" ); // I2C2 Error + vector ( id = 51, optional, fill = "SPI1_IRQHandler" ); // SPI1 + vector ( id = 52, optional, fill = "SPI2_IRQHandler" ); // SPI2 + vector ( id = 53, optional, fill = "USART1_IRQHandler" ); // USART1 + vector ( id = 54, optional, fill = "USART2_IRQHandler" ); // USART2 + vector ( id = 55, optional, fill = "USART3_IRQHandler" ); // USART3 + vector ( id = 56, optional, fill = "EXTI15_10_IRQHandler" ); // EXTI Line 15..10 + vector ( id = 57, optional, fill = "RTCAlarm_IRQHandler" ); // RTC Alarm through EXTI Line + vector ( id = 58, optional, fill = "OTG_FS_WKUP_IRQHandler" ); // USB OTG FS Wakeup through EXTI line + vector ( id = 66, optional, fill = "TIM5_IRQHandler" ); // TIM5 + vector ( id = 67, optional, fill = "SPI3_IRQHandler" ); // SPI3 + vector ( id = 68, optional, fill = "UART4_IRQHandler" ); // UART4 + vector ( id = 69, optional, fill = "UART5_IRQHandler" ); // UART5 + vector ( id = 70, optional, fill = "TIM6_IRQHandler" ); // TIM6 + vector ( id = 71, optional, fill = "TIM7_IRQHandler" ); // TIM7 + vector ( id = 72, optional, fill = "DMA2_Channel1_IRQHandler" ); // DMA2 Channel1 + vector ( id = 73, optional, fill = "DMA2_Channel2_IRQHandler" ); // DMA2 Channel2 + vector ( id = 74, optional, fill = "DMA2_Channel3_IRQHandler" ); // DMA2 Channel3 + vector ( id = 75, optional, fill = "DMA2_Channel4_IRQHandler" ); // DMA2 Channel4 + vector ( id = 76, optional, fill = "DMA2_Channel5_IRQHandler" ); // DMA2 Channel5 + vector ( id = 77, optional, fill = "ETH_IRQHandler" ); // Ethernet + vector ( id = 78, optional, fill = "ETH_WKUP_IRQHandler" ); // ETH_WKUP_IRQHandler + vector ( id = 79, optional, fill = "CAN2_TX_IRQHandler " ); // CAN2 TX + vector ( id = 80, optional, fill = "CAN2_RX0_IRQHandler" ); // CAN2 RX0 + vector ( id = 81, optional, fill = "CAN2_RX1_IRQHandler" ); // CAN2 RX1 + vector ( id = 82, optional, fill = "CAN2_SCE_IRQHandler" ); // CAN2 SCE + vector ( id = 83, optional, fill = "OTG_FS_IRQHandler" ); // USB OTG FS + } +} +# endif diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210C-EVAL/Settings/StartupScript.scr b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210C-EVAL/Settings/StartupScript.scr new file mode 100644 index 0000000000000000000000000000000000000000..e3dbe2309d1c25d27e98e5f926688d98af736d85 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210C-EVAL/Settings/StartupScript.scr @@ -0,0 +1,9 @@ +// Hitex/Lue/11.02.2008 +// Executable Script file for HiTOP Debugger +// Reset application + +// Reset +RESET TARGET + + + diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210C-EVAL/Settings/arm_arch.lsl b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210C-EVAL/Settings/arm_arch.lsl new file mode 100644 index 0000000000000000000000000000000000000000..3e6d3031e15b73a34caa2408b998eda685da1811 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210C-EVAL/Settings/arm_arch.lsl @@ -0,0 +1,287 @@ +//////////////////////////////////////////////////////////////////////////// +// +// File : arm_arch.lsl +// +// Version : @(#)arm_arch.lsl 1.4 09/04/17 +// +// Description : Generic LSL file for ARM architectures +// +// Copyright 2008-2009 Altium BV +// +//////////////////////////////////////////////////////////////////////////// + +#ifndef __STACK +# define __STACK 32k +#endif +#ifndef __HEAP +# define __HEAP 32k +#endif +#ifndef __STACK_FIQ +# define __STACK_FIQ 8 +#endif +#ifndef __STACK_IRQ +# define __STACK_IRQ 8 +#endif +#ifndef __STACK_SVC +# define __STACK_SVC 8 +#endif +#ifndef __STACK_ABT +# define __STACK_ABT 8 +#endif +#ifndef __STACK_UND +# define __STACK_UND 8 +#endif +#ifndef __PROCESSOR_MODE +# define __PROCESSOR_MODE 0x1F /* SYS mode */ +#endif +#ifndef __IRQ_BIT +# define __IRQ_BIT 0x80 /* IRQ interrupts disabled */ +#endif +#ifndef __FIQ_BIT +# define __FIQ_BIT 0x40 /* FIQ interrupts disabled */ +#endif + +#define __APPLICATION_MODE (__PROCESSOR_MODE | __IRQ_BIT | __FIQ_BIT) + +#ifndef __VECTOR_TABLE_ROM_ADDR +# define __VECTOR_TABLE_ROM_ADDR 0x00000000 +#endif + +#ifndef __VECTOR_TABLE_RAM_ADDR +# define __VECTOR_TABLE_RAM_ADDR 0x00000000 +#endif + +#if defined(__CPU_ARMV7M__) || defined(__CPU_ARMV6M__) +# ifndef __NR_OF_VECTORS +# define __NR_OF_VECTORS 16 +# endif +# define __VECTOR_TABLE_SIZE (__NR_OF_VECTORS * 4) +#else +# ifdef __PIC_VECTORS +# define __VECTOR_TABLE_SIZE 64 +# else +# ifdef __FIQ_HANDLER_INLINE +# define __VECTOR_TABLE_SIZE 28 +# define __NR_OF_VECTORS 7 +# else +# define __VECTOR_TABLE_SIZE 32 +# define __NR_OF_VECTORS 8 +# endif +# endif +#endif + +#ifndef __VECTOR_TABLE_RAM_SPACE +# undef __VECTOR_TABLE_RAM_COPY +#endif + +#ifndef __XVWBUF +# define __XVWBUF 0 /* buffer used by CrossView Pro */ +#endif + +#define BOUNDS_GROUP_NAME grp_bounds +#define BOUNDS_GROUP_SELECT "bounds" + +architecture ARM +{ + endianness + { + little; + big; + } + + space linear + { + id = 1; + mau = 8; + map (size = 4G, dest = bus:local_bus); + + copytable + ( + align = 4, + copy_unit = 1, + dest = linear + ); + + start_address + ( + // It is not strictly necessary to define a run_addr for _START + // because hardware starts execution at address 0x0 which should + // be the vector table with a jump to the relocatable _START, but + // an absolute address can prevent the branch to be out-of-range. + // Or _START may be the entry point at reset and the reset handler + // copies the vector table to address 0x0 after some ROM/RAM memory + // re-mapping. In that case _START should be at a fixed address + // in ROM, specifically the alias of address 0x0 before memory + // re-mapping. +#ifdef __START + run_addr = __START, +#endif + symbol = "_START" + ); + + stack "stack" + ( +#ifdef __STACK_FIXED + fixed, +#endif + align = 4, + min_size = __STACK, + grows = high_to_low + ); + + heap "heap" + ( +#ifdef __HEAP_FIXED + fixed, +#endif + align = 4, + min_size=__HEAP + ); + +#if !defined(__CPU_ARMV7M__) && !defined(__CPU_ARMV6M__) + stack "stack_fiq" + ( + fixed, + align = 4, + min_size = __STACK_FIQ, + grows = high_to_low + ); + stack "stack_irq" + ( + fixed, + align = 4, + min_size = __STACK_IRQ, + grows = high_to_low + ); + stack "stack_svc" + ( + fixed, + align = 4, + min_size = __STACK_SVC, + grows = high_to_low + ); + stack "stack_abt" + ( + fixed, + align = 4, + min_size = __STACK_ABT, + grows = high_to_low + ); + stack "stack_und" + ( + fixed, + align = 4, + min_size = __STACK_UND, + grows = high_to_low + ); +#endif + +#if !defined(__NO_AUTO_VECTORS) && !defined(__NO_DEFAULT_AUTO_VECTORS) +# if defined(__CPU_ARMV7M__) || defined(__CPU_ARMV6M__) + // vector table with handler addresses + vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_ROM_ADDR, + template = ".text.handler_address", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + fill = loop, + no_inline + ) + { + vector ( id = 0, fill = "_START" ); // FIXME: "_lc_ub_stack" does not work + vector ( id = 1, fill = "_START" ); + } +# else +# ifdef __PIC_VECTORS + // vector table with ldrpc instructions from handler table + vector_table "vector_table" ( vector_size = 4, size = 8, run_addr = __VECTOR_TABLE_ROM_ADDR, + template = ".text.vector_ldrpc", + template_symbol = "_lc_vector_ldrpc", + vector_prefix = "_vector_ldrpc_", + fill = loop + ) + { + } + // subsequent vector table (data pool) with addresses of handlers + vector_table "handler_table" ( vector_size = 4, size = 8, run_addr = __VECTOR_TABLE_ROM_ADDR + 32, + template = ".text.handler_address", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + fill = loop[-32], + no_inline + ) + { + vector ( id = 0, fill = "_START" ); + } +# else + // vector table with branch instructions to handlers + vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_ROM_ADDR, + template = ".text.vector_branch", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + fill = loop + ) + { + vector ( id = 0, fill = "_START" ); + } +# endif +# endif +#endif + section_layout + { +#if defined(__NO_AUTO_VECTORS) + "_lc_ub_vector_table" = __VECTOR_TABLE_ROM_ADDR; + "_lc_ue_vector_table" = __VECTOR_TABLE_ROM_ADDR + __VECTOR_TABLE_SIZE; +#endif +#ifdef __VECTOR_TABLE_RAM_SPACE + // reserve space to copy vector table from ROM to RAM + group ( ordered, run_addr = __VECTOR_TABLE_RAM_ADDR ) + reserved "vector_table_space" ( size = __VECTOR_TABLE_SIZE, attributes = rwx ); +#endif +#ifdef __VECTOR_TABLE_RAM_COPY + // provide copy address symbols for copy routine + "_lc_ub_vector_table_copy" := "_lc_ub_vector_table_space"; + "_lc_ue_vector_table_copy" := "_lc_ue_vector_table_space"; +#else + // prevent copy: copy address equals orig address + "_lc_ub_vector_table_copy" := "_lc_ub_vector_table"; + "_lc_ue_vector_table_copy" := "_lc_ue_vector_table"; +#endif + // define buffer for string input via Crossview Pro debugger + group ( align = 4 ) reserved "xvwbuffer" (size=__XVWBUF, attributes=rw ); + + // define labels for bounds begin and end as used in C library +#ifndef BOUNDS_GROUP_REDEFINED + group BOUNDS_GROUP_NAME (ordered, contiguous) + { + select BOUNDS_GROUP_SELECT; + } +#endif + "_lc_ub_bounds" := addressof(group:BOUNDS_GROUP_NAME); + "_lc_ue_bounds" := addressof(group:BOUNDS_GROUP_NAME) + sizeof(group:BOUNDS_GROUP_NAME); + +#ifdef __HEAPADDR + group ( ordered, run_addr=__HEAPADDR ) + { + select "heap"; + } +#endif +#ifdef __STACKADDR + group ( ordered, run_addr=__STACKADDR ) + { + select "stack"; + } +#endif +#if !defined(__CPU_ARMV7M__) && !defined(__CPU_ARMV6M__) + // symbol to set mode bits and interrupt disable bits + // in cstart module before calling the application (main) + "_APPLICATION_MODE_" = __APPLICATION_MODE; +#endif + } + } + + bus local_bus + { + mau = 8; + width = 32; + } +} diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210C-EVAL/Settings/link.lnk b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210C-EVAL/Settings/link.lnk new file mode 100644 index 0000000000000000000000000000000000000000..51754822b92e0d513c90a4d895310291c9df1805 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210C-EVAL/Settings/link.lnk @@ -0,0 +1,4 @@ +-d"./settings/STM32F10x_cl.lsl" +--optimize=0 +--map-file-format=2 +$(LinkObjects) diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210C-EVAL/Settings/reset_appl.scr b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210C-EVAL/Settings/reset_appl.scr new file mode 100644 index 0000000000000000000000000000000000000000..d90eb1562155bf052756c7c9ba7e12d76d11f1bd --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210C-EVAL/Settings/reset_appl.scr @@ -0,0 +1,8 @@ +// Hitex/Lue/11.02.2008 +// Executable Script file for HiTOP Debugger +// Reset application + +// Reset +RESET TARGET + + diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210C-EVAL/Settings/reset_go_main.scr b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210C-EVAL/Settings/reset_go_main.scr new file mode 100644 index 0000000000000000000000000000000000000000..3e9c066994344d9767229e16c69308cc5bdc8ee2 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210C-EVAL/Settings/reset_go_main.scr @@ -0,0 +1,12 @@ +// Hitex/Lue/11.02.2008 +// Executable Script file for HiTOP Debugger +// Reset application & Go main + +// Reset +RESET TARGET + + +// execute program till main +Go UNTIL main +wait + diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210C-EVAL/cstart_thumb2.asm b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210C-EVAL/cstart_thumb2.asm new file mode 100644 index 0000000000000000000000000000000000000000..12dc0d02dd7f73c60656a8293afd8da477958793 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210C-EVAL/cstart_thumb2.asm @@ -0,0 +1,148 @@ + + +;; NOTE: To allow the use of this file for both ARMv6M and ARMv7M, +;; we will only use 16-bit Thumb intructions. + + .extern _lc_ub_stack ; usr/sys mode stack pointer + .extern _lc_ue_stack ; symbol required by debugger + .extern _lc_ub_table ; ROM to RAM copy table + .extern main + .extern _Exit + .extern exit + .weak exit + .global __get_argcv + .weak __get_argcv + .extern __argcvbuf + .weak __argcvbuf + .extern __init_hardware + .extern __init_vector_table + .extern SystemInit + + .if @defined('__PROF_ENABLE__') + .extern __prof_init + .endif + .if @defined('__POSIX__') + .extern posix_main + .extern _posix_boot_stack_top + .endif + + .global _START + + .section .text.cstart + + .thumb +_START: + ;; anticipate possible ROM/RAM remapping + ;; by loading the 'real' program address + ldr r1,=_Next + bx r1 +_Next: + ;; initialize the stack pointer + ldr r1,=_lc_ub_stack ; TODO: make this part of the vector table + mov sp,r1 + + ;; call a user function which initializes hardware + ;; such as ROM/RAM re-mapping or MMU configuration + bl __init_hardware + + ;ldr r0, =SystemInit + ;bx r0 + bl SystemInit + + ;; copy initialized sections from ROM to RAM + ;; and clear uninitialized data sections in RAM + + ldr r3,=_lc_ub_table + movs r0,#0 +cploop: + ldr r4,[r3,#0] ; load type + ldr r5,[r3,#4] ; dst address + ldr r6,[r3,#8] ; src address + ldr r7,[r3,#12] ; size + + cmp r4,#1 + beq copy + cmp r4,#2 + beq clear + b done + +copy: + subs r7,r7,#1 + ldrb r1,[r6,r7] + strb r1,[r5,r7] + bne copy + + adds r3,r3,#16 + b cploop + +clear: + subs r7,r7,#1 + strb r0,[r5,r7] + bne clear + + adds r3,r3,#16 + b cploop + +done: + ;; initialize or copy the vector table + bl __init_vector_table + + .if @defined('__POSIX__') + + ;; posix stack buffer for system upbringing + ldr r0,=_posix_boot_stack_top + ldr r0, [r0] + mov sp,r0 + + .else + + ;; load r10 with end of USR/SYS stack, which is + ;; needed in case stack overflow checking is on + ;; NOTE: use 16-bit instructions only, for ARMv6M + ldr r0,=_lc_ue_stack + mov r10,r0 + + .endif + + .if @defined('__PROF_ENABLE__') + bl __prof_init + .endif + + .if @defined('__POSIX__') + ;; call posix_main with no arguments + bl posix_main + .else + ;; retrieve argc and argv (default argv[0]==NULL & argc==0) + bl __get_argcv + ldr r1,=__argcvbuf + ;; call main + bl main + .endif + + ;; call exit using the return value from main() + ;; Note. Calling exit will also run all functions + ;; that were supplied through atexit(). + bl exit + +__get_argcv: ; weak definition + movs r0,#0 + bx lr + + .ltorg + .endsec + + .calls '_START','__init_hardware' + .calls '_START','__init_vector_table' + .if @defined('__PROF_ENABLE__') + .calls '_START','__prof_init' + .endif + .if @defined('__POSIX__') + .calls '_START','posix_main' + .else + .calls '_START','__get_argcv' + .calls '_START','main' + .endif + .calls '_START','exit' + .calls '_START','',0 + + .end diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210C-EVAL/readme.txt b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210C-EVAL/readme.txt new file mode 100644 index 0000000000000000000000000000000000000000..33c09572b926a4354d348d41ee4d9e2b2aba2ac8 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210C-EVAL/readme.txt @@ -0,0 +1,84 @@ +/** + @page HiTOP5_STM3210C HiTOP Project Template for STM32F10x Connectivity line devices + + @verbatim + ******************** (C) COPYRIGHT 2011 STMicroelectronics ******************* + * @file readme.txt + * @author MCD Application Team + * @version V3.5.0 + * @date 08-April-2011 + * @brief This sub directory contains all the user modifiable files needed + * to create a new project linked with the STM32F10x Standard Peripheral + * Library and working with HiTOP software toolchain (version 5.40 and later). + ****************************************************************************** + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. + * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, + * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE + * CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING + * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + ****************************************************************************** + @endverbatim + +@par Directory contents + + - Project.htp: A pre-configured project file with the provided library + structure that produces an executable image with HiTOP + + - cstart_thumb2.asm: This file initializes the stack pointer and copy initialized + sections from ROM to RAM. + + - Objects: This mandatory directory contains the executable images. + + - Settings: This directory contains the linker and script files. + - arm_arch.lsl: This file is used to place program code (readonly) + in internal FLASH and data (readwrite, Stack and Heap) + in internal SRAM. + + - link.lnk: This file is the HiTOP linker it invokes the STM32F10x_cl.lsl. + + - reset_appl.scr: This file is a HiTOP script it performs a target reset. + + - reset_go_main.scr: This file is a HiTOP script and it sets the Program + Counter at the "main" instruction. + + - StartupScript.scr: This file is a HiTOP script and it performs a target + reset before loading The executable image. + + - STM32F10x_cl.lsl: This file is used to place program code (readonly) + in internal FLASH and data (readwrite, Stack and Heap) + in internal SRAM. + It contains also the vector table of the STM32 + Connectivity line devices. + You can customize this file to your need. + + +@par How to use it ? + +- Open the HiTOP toolchain. +- Browse to open the project.htp +- A "Download application" window is displayed, click "cancel". +- Rebuild all files: Project->Rebuild all +- Load project image : Click "ok" in the "Download application" window. +- Run the "RESET_GO_MAIN" script to set the PC at the "main" +- Run program: Debug->Go(F5). + +@note + - Low-density Value line devices are STM32F100xx microcontrollers where the + Flash memory density ranges between 16 and 32 Kbytes. + - Low-density devices are STM32F101xx, STM32F102xx and STM32F103xx + microcontrollers where the Flash memory density ranges between 16 and 32 Kbytes. + - Medium-density Value line devices are STM32F100xx microcontrollers where + the Flash memory density ranges between 64 and 128 Kbytes. + - Medium-density devices are STM32F101xx, STM32F102xx and STM32F103xx + microcontrollers where the Flash memory density ranges between 64 and 128 Kbytes. + - High-density Value line devices are STM32F100xx microcontrollers where the + Flash memory density ranges between 256 and 512 Kbytes. + - High-density devices are STM32F101xx and STM32F103xx microcontrollers where + the Flash memory density ranges between 256 and 512 Kbytes. + - XL-density devices are STM32F101xx and STM32F103xx microcontrollers where + the Flash memory density ranges between 512 and 1024 Kbytes. + - Connectivity line devices are STM32F105xx and STM32F107xx microcontrollers. + + *

© COPYRIGHT 2011 STMicroelectronics

+ */ diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL/Project.htp b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL/Project.htp new file mode 100644 index 0000000000000000000000000000000000000000..70105f8dea58cfc75d2a679154d86a6912705404 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL/Project.htp @@ -0,0 +1,1003 @@ + + + + + + + + + + + + + + + + + + + + +
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Even when aliased in the boot memory space, +// the related memory (Flash memory or SRAM) is still accessible at its +// original memory space. +// +// If no memory is defined yet use the following memory settings +// +#ifndef __MEMORY + +memory stm32f103flash +{ + mau = 8; + type = rom; + size = 512k; + map ( size = 512k, dest_offset= 0x08000000, dest=bus:ARM:local_bus); +} + +memory stm32f103ram +{ + mau = 8; + type = ram; + size = 1024k; + map ( size = 1024k, dest_offset=0x68000000, dest=bus:ARM:local_bus); +} + +#endif /* __MEMORY */ +section_layout ::linear +{ + group( contiguous ) + { + select ".bss.stack"; + select "stack"; + } +} + + + +// +// Custom vector table defines interrupts according to CMSIS standard +// +# if defined(__CPU_ARMV7M__) +section_setup ::linear +{ + // vector table with handler addresses + vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_ROM_ADDR, + template = ".text.handler_address", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + fill = loop, + no_inline + ) + { + vector ( id = 0, fill = "_stacklabel" ); // FIXME: "_lc_ub_stack" does not work + vector ( id = 1, fill = "_START" ); + vector ( id = 2, optional, fill = "NMI_Handler" ); + vector ( id = 3, optional, fill = "HardFault_Handler" ); + vector ( id = 4, optional, fill = "MemManage_Handler" ); + vector ( id = 5, optional, fill = "BusFault_Handler" ); + vector ( id = 6, optional, fill = "UsageFault_Handler" ); + vector ( id = 11, optional, fill = "SVC_Handler" ); + vector ( id = 12, optional, fill = "DebugMon_Handler" ); + vector ( id = 14, optional, fill = "PendSV_Handler" ); + vector ( id = 15, optional, fill = "SysTick_Handler" ); + + // External Interrupts : + vector ( id = 16, optional, fill = "WWDG_IRQHandler" ); // Window Watchdog + vector ( id = 17, optional, fill = "PVD_IRQHandler" ); // PVD through EXTI Line detect + vector ( id = 18, optional, fill = "TAMPER_IRQHandler" ); // Tamper + vector ( id = 19, optional, fill = "RTC_IRQHandler" ); // RTC + vector ( id = 20, optional, fill = "FLASH_IRQHandler" ); // Flash + vector ( id = 21, optional, fill = "RCC_IRQHandler" ); // RCC + vector ( id = 22, optional, fill = "EXTI0_IRQHandler" ); // EXTI Line 0 + vector ( id = 23, optional, fill = "EXTI1_IRQHandler" ); // EXTI Line 1 + vector ( id = 24, optional, fill = "EXTI2_IRQHandler" ); // EXTI Line 2 + vector ( id = 25, optional, fill = "EXTI3_IRQHandler" ); // EXTI Line 3 + vector ( id = 26, optional, fill = "EXTI4_IRQHandler" ); // EXTI Line 4 + vector ( id = 27, optional, fill = "DMA1_Channel1_IRQHandler" ); // DMA Channel 1 + vector ( id = 28, optional, fill = "DMA1_Channel2_IRQHandler" ); // DMA Channel 2 + vector ( id = 29, optional, fill = "DMA1_Channel3_IRQHandler" ); // DMA Channel 3 + vector ( id = 30, optional, fill = "DMA1_Channel4_IRQHandler" ); // DMA Channel 4 + vector ( id = 31, optional, fill = "DMA1_Channel5_IRQHandler" ); // DMA Channel 5 + vector ( id = 32, optional, fill = "DMA1_Channel6_IRQHandler" ); // DMA Channel 6 + vector ( id = 33, optional, fill = "DMA1_Channel7_IRQHandler" ); // DMA Channel 7 + vector ( id = 34, optional, fill = "ADC1_2_IRQHandler" ); // ADC1 and ADC2 + vector ( id = 35, optional, fill = "USB_HP_CAN1_TX_IRQHandler" ); // USB High Priority or CAN1 TX + vector ( id = 36, optional, fill = "USB_LP_CAN1_RX0_IRQHandler" ); // USB LowPriority or CAN1 RX0 + vector ( id = 37, optional, fill = "CAN1_RX1_IRQHandler" ); // CAN1 RX1 + vector ( id = 38, optional, fill = "CAN1_SCE_IRQHandler" ); // CAN1 SCE + vector ( id = 39, optional, fill = "EXTI9_5_IRQHandler" ); // EXTI Line 9..5 + vector ( id = 40, optional, fill = "TIM1_BRK_IRQHandler" ); // TIM1 Break + vector ( id = 41, optional, fill = "TIM1_UP_IRQHandler" ); // TIM1 Update + vector ( id = 42, optional, fill = "TIM1_TRG_COM_IRQHandler" ); // TIM1 Trigger and Commutation + vector ( id = 43, optional, fill = "TIM1_CC_IRQHandler" ); // TIM1 Capture Compare + vector ( id = 44, optional, fill = "TIM2_IRQHandler" ); // TIM2 + vector ( id = 45, optional, fill = "TIM3_IRQHandler" ); // TIM3 + vector ( id = 46, optional, fill = "TIM4_IRQHandler" ); // TIM4 + vector ( id = 47, optional, fill = "I2C1_EV_IRQHandler" ); // I2C1 Event + vector ( id = 48, optional, fill = "I2C1_ER_IRQHandler" ); // I2C1 Error + vector ( id = 49, optional, fill = "I2C2_EV_IRQHandler" ); // I2C2 Event + vector ( id = 50, optional, fill = "I2C2_ER_IRQHandler" ); // I2C2 Error + vector ( id = 51, optional, fill = "SPI1_IRQHandler" ); // SPI1 + vector ( id = 52, optional, fill = "SPI2_IRQHandler" ); // SPI2 + vector ( id = 53, optional, fill = "USART1_IRQHandler" ); // USART1 + vector ( id = 54, optional, fill = "USART2_IRQHandler" ); // USART2 + vector ( id = 55, optional, fill = "USART3_IRQHandler" ); // USART3 + vector ( id = 56, optional, fill = "EXTI15_10_IRQHandler" ); // EXTI Line 15..10 + vector ( id = 57, optional, fill = "RTCAlarm_IRQHandler" ); // RTC Alarm through EXTI Line + vector ( id = 58, optional, fill = "USBWakeUp_IRQHandler" ); // USB Wakeup from suspend + vector ( id = 59, optional, fill = "TIM8_BRK_IRQHandler" ); // TIM8 Break + vector ( id = 60, optional, fill = "TIM8_UP_IRQHandler" ); // TIM8 Update + vector ( id = 61, optional, fill = "TIM8_TRG_COM_IRQHandler" ); // TIM8 Trigger and Commutation + vector ( id = 62, optional, fill = "TIM8_CC_IRQHandler" ); // TIM8 Capture Compare + vector ( id = 63, optional, fill = "ADC3_IRQHandler" ); // ADC3 + vector ( id = 64, optional, fill = "FSMC_IRQHandler" ); // FSMC + vector ( id = 65, optional, fill = "SDIO_IRQHandler" ); // SDIO + vector ( id = 66, optional, fill = "TIM5_IRQHandler" ); // TIM5 + vector ( id = 67, optional, fill = "SPI3_IRQHandler" ); // SPI3 + vector ( id = 68, optional, fill = "UART4_IRQHandler" ); // UART4 + vector ( id = 69, optional, fill = "UART5_IRQHandler" ); // UART5 + vector ( id = 70, optional, fill = "TIM6_IRQHandler" ); // TIM6 + vector ( id = 71, optional, fill = "TIM7_IRQHandler" ); // TIM7 + vector ( id = 72, optional, fill = "DMA2_Channel1_IRQHandler" ); // DMA2 Channel1 + vector ( id = 73, optional, fill = "DMA2_Channel2_IRQHandler" ); // DMA2 Channel2 + vector ( id = 74, optional, fill = "DMA2_Channel3_IRQHandler" ); // DMA2 Channel3 + vector ( id = 75, optional, fill = "DMA2_Channel4_5_IRQHandler" ); // DMA2 Channel4 and DMA2 Channel5 + } +} +# endif diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL/Settings/STM32F10x_hd.lsl b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL/Settings/STM32F10x_hd.lsl new file mode 100644 index 0000000000000000000000000000000000000000..77a6526418d67339c478066ab8229ad88fe4a632 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL/Settings/STM32F10x_hd.lsl @@ -0,0 +1,165 @@ +//////////////////////////////////////////////////////////////////////////// +// +// File : stm32f103_cmsis.lsl +// +// Version : @(#)stm32f103_cmsis.lsl 1.2 09/06/04 +// +// Description : LSL file for the STMicroelectronics STM32F103, CMSIS version +// +// Copyright 2009 Altium BV +// +// NOTE: +// This file is derived from cm3.lsl and stm32f103.lsl. +// It is assumed that the user works with the ARMv7M architecture. +// Other architectures will not work with this lsl file. +// +//////////////////////////////////////////////////////////////////////////// + +// +// We do not want the vectors as defined in arm_arch.lsl +// +#define __NO_DEFAULT_AUTO_VECTORS 1 +#define __NR_OF_VECTORS 76 + + +#ifndef __STACK +# define __STACK 8k +#endif +#ifndef __HEAP +# define __HEAP 2k +#endif +#ifndef __VECTOR_TABLE_ROM_ADDR +# define __VECTOR_TABLE_ROM_ADDR 0x08000000 +#endif +#ifndef __XVWBUF +#define __XVWBUF 256 /* buffer used by CrossView */ +#endif + +#include + +//////////////////////////////////////////////////////////////////////////// +// +// In the STM32F10x, 3 different boot modes can be selected +// - User Flash memory is selected as boot space +// - SystemMemory is selected as boot space +// - Embedded SRAM is selected as boot space +// +// This aliases the physical memory associated with each boot mode to Block +// 000 (0x00000000 boot memory). Even when aliased in the boot memory space, +// the related memory (Flash memory or SRAM) is still accessible at its +// original memory space. +// +// If no memory is defined yet use the following memory settings +// +#ifndef __MEMORY + +memory stm32f103flash +{ + mau = 8; + type = rom; + size = 512k; + map ( size = 512k, dest_offset=0x08000000, dest=bus:ARM:local_bus); +} + +memory stm32f103ram +{ + mau = 8; + type = ram; + size = 64k; + map ( size = 64k, dest_offset=0x20000000, dest=bus:ARM:local_bus); +} + +#endif /* __MEMORY */ + + +// +// Custom vector table defines interrupts according to CMSIS standard +// +# if defined(__CPU_ARMV7M__) +section_setup ::linear +{ + // vector table with handler addresses + vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_ROM_ADDR, + template = ".text.handler_address", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + fill = loop, + no_inline + ) + { + vector ( id = 0, fill = "_START" ); // FIXME: "_lc_ub_stack" does not work + vector ( id = 1, fill = "_START" ); + vector ( id = 2, optional, fill = "NMI_Handler" ); + vector ( id = 3, optional, fill = "HardFault_Handler" ); + vector ( id = 4, optional, fill = "MemManage_Handler" ); + vector ( id = 5, optional, fill = "BusFault_Handler" ); + vector ( id = 6, optional, fill = "UsageFault_Handler" ); + vector ( id = 11, optional, fill = "SVC_Handler" ); + vector ( id = 12, optional, fill = "DebugMon_Handler" ); + vector ( id = 14, optional, fill = "PendSV_Handler" ); + vector ( id = 15, optional, fill = "SysTick_Handler" ); + + // External Interrupts : + vector ( id = 16, optional, fill = "WWDG_IRQHandler" ); // Window Watchdog + vector ( id = 17, optional, fill = "PVD_IRQHandler" ); // PVD through EXTI Line detect + vector ( id = 18, optional, fill = "TAMPER_IRQHandler" ); // Tamper + vector ( id = 19, optional, fill = "RTC_IRQHandler" ); // RTC + vector ( id = 20, optional, fill = "FLASH_IRQHandler" ); // Flash + vector ( id = 21, optional, fill = "RCC_IRQHandler" ); // RCC + vector ( id = 22, optional, fill = "EXTI0_IRQHandler" ); // EXTI Line 0 + vector ( id = 23, optional, fill = "EXTI1_IRQHandler" ); // EXTI Line 1 + vector ( id = 24, optional, fill = "EXTI2_IRQHandler" ); // EXTI Line 2 + vector ( id = 25, optional, fill = "EXTI3_IRQHandler" ); // EXTI Line 3 + vector ( id = 26, optional, fill = "EXTI4_IRQHandler" ); // EXTI Line 4 + vector ( id = 27, optional, fill = "DMA1_Channel1_IRQHandler" ); // DMA Channel 1 + vector ( id = 28, optional, fill = "DMA1_Channel2_IRQHandler" ); // DMA Channel 2 + vector ( id = 29, optional, fill = "DMA1_Channel3_IRQHandler" ); // DMA Channel 3 + vector ( id = 30, optional, fill = "DMA1_Channel4_IRQHandler" ); // DMA Channel 4 + vector ( id = 31, optional, fill = "DMA1_Channel5_IRQHandler" ); // DMA Channel 5 + vector ( id = 32, optional, fill = "DMA1_Channel6_IRQHandler" ); // DMA Channel 6 + vector ( id = 33, optional, fill = "DMA1_Channel7_IRQHandler" ); // DMA Channel 7 + vector ( id = 34, optional, fill = "ADC1_2_IRQHandler" ); // ADC1 and ADC2 + vector ( id = 35, optional, fill = "USB_HP_CAN1_TX_IRQHandler" ); // USB High Priority or CAN1 TX + vector ( id = 36, optional, fill = "USB_LP_CAN1_RX0_IRQHandler" ); // USB LowPriority or CAN1 RX0 + vector ( id = 37, optional, fill = "CAN1_RX1_IRQHandler" ); // CAN1 RX1 + vector ( id = 38, optional, fill = "CAN1_SCE_IRQHandler" ); // CAN1 SCE + vector ( id = 39, optional, fill = "EXTI9_5_IRQHandler" ); // EXTI Line 9..5 + vector ( id = 40, optional, fill = "TIM1_BRK_IRQHandler" ); // TIM1 Break + vector ( id = 41, optional, fill = "TIM1_UP_IRQHandler" ); // TIM1 Update + vector ( id = 42, optional, fill = "TIM1_TRG_COM_IRQHandler" ); // TIM1 Trigger and Commutation + vector ( id = 43, optional, fill = "TIM1_CC_IRQHandler" ); // TIM1 Capture Compare + vector ( id = 44, optional, fill = "TIM2_IRQHandler" ); // TIM2 + vector ( id = 45, optional, fill = "TIM3_IRQHandler" ); // TIM3 + vector ( id = 46, optional, fill = "TIM4_IRQHandler" ); // TIM4 + vector ( id = 47, optional, fill = "I2C1_EV_IRQHandler" ); // I2C1 Event + vector ( id = 48, optional, fill = "I2C1_ER_IRQHandler" ); // I2C1 Error + vector ( id = 49, optional, fill = "I2C2_EV_IRQHandler" ); // I2C2 Event + vector ( id = 50, optional, fill = "I2C2_ER_IRQHandler" ); // I2C2 Error + vector ( id = 51, optional, fill = "SPI1_IRQHandler" ); // SPI1 + vector ( id = 52, optional, fill = "SPI2_IRQHandler" ); // SPI2 + vector ( id = 53, optional, fill = "USART1_IRQHandler" ); // USART1 + vector ( id = 54, optional, fill = "USART2_IRQHandler" ); // USART2 + vector ( id = 55, optional, fill = "USART3_IRQHandler" ); // USART3 + vector ( id = 56, optional, fill = "EXTI15_10_IRQHandler" ); // EXTI Line 15..10 + vector ( id = 57, optional, fill = "RTCAlarm_IRQHandler" ); // RTC Alarm through EXTI Line + vector ( id = 58, optional, fill = "USBWakeUp_IRQHandler" ); // USB Wakeup from suspend + vector ( id = 59, optional, fill = "TIM8_BRK_IRQHandler" ); // TIM8 Break + vector ( id = 60, optional, fill = "TIM8_UP_IRQHandler" ); // TIM8 Update + vector ( id = 61, optional, fill = "TIM8_TRG_COM_IRQHandler" ); // TIM8 Trigger and Commutation + vector ( id = 62, optional, fill = "TIM8_CC_IRQHandler" ); // TIM8 Capture Compare + vector ( id = 63, optional, fill = "ADC3_IRQHandler" ); // ADC3 + vector ( id = 64, optional, fill = "FSMC_IRQHandler" ); // FSMC + vector ( id = 65, optional, fill = "SDIO_IRQHandler" ); // SDIO + vector ( id = 66, optional, fill = "TIM5_IRQHandler" ); // TIM5 + vector ( id = 67, optional, fill = "SPI3_IRQHandler" ); // SPI3 + vector ( id = 68, optional, fill = "UART4_IRQHandler" ); // UART4 + vector ( id = 69, optional, fill = "UART5_IRQHandler" ); // UART5 + vector ( id = 70, optional, fill = "TIM6_IRQHandler" ); // TIM6 + vector ( id = 71, optional, fill = "TIM7_IRQHandler" ); // TIM7 + vector ( id = 72, optional, fill = "DMA2_Channel1_IRQHandler" ); // DMA2 Channel1 + vector ( id = 73, optional, fill = "DMA2_Channel2_IRQHandler" ); // DMA2 Channel2 + vector ( id = 74, optional, fill = "DMA2_Channel3_IRQHandler" ); // DMA2 Channel3 + vector ( id = 75, optional, fill = "DMA2_Channel4_5_IRQHandler" ); // DMA2 Channel4 and DMA2 Channel5 + } +} +# endif diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL/Settings/STM32F10xnor.lsl b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL/Settings/STM32F10xnor.lsl new file mode 100644 index 0000000000000000000000000000000000000000..5b781d8e8e29d202da6fcc56a693419001fdacc2 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL/Settings/STM32F10xnor.lsl @@ -0,0 +1,165 @@ +//////////////////////////////////////////////////////////////////////////// +// +// File : stm32f103_cmsis.lsl +// +// Version : @(#)stm32f103_cmsis.lsl 1.2 09/06/04 +// +// Description : LSL file for the STMicroelectronics STM32F103, CMSIS version +// +// Copyright 2009 Altium BV +// +// NOTE: +// This file is derived from cm3.lsl and stm32f103.lsl. +// It is assumed that the user works with the ARMv7M architecture. +// Other architectures will not work with this lsl file. +// +//////////////////////////////////////////////////////////////////////////// + +// +// We do not want the vectors as defined in arm_arch.lsl +// +#define __NO_DEFAULT_AUTO_VECTORS 1 +#define __NR_OF_VECTORS 76 + + +#ifndef __STACK +# define __STACK 8k +#endif +#ifndef __HEAP +# define __HEAP 2k +#endif +#ifndef __VECTOR_TABLE_ROM_ADDR +# define __VECTOR_TABLE_ROM_ADDR 0x64000000 +#endif +#ifndef __XVWBUF +#define __XVWBUF 256 /* buffer used by CrossView */ +#endif + +#include + +//////////////////////////////////////////////////////////////////////////// +// +// In the STM32F10x, 3 different boot modes can be selected +// - User Flash memory is selected as boot space +// - SystemMemory is selected as boot space +// - Embedded SRAM is selected as boot space +// +// This aliases the physical memory associated with each boot mode to Block +// 000 (0x00000000 boot memory). Even when aliased in the boot memory space, +// the related memory (Flash memory or SRAM) is still accessible at its +// original memory space. +// +// If no memory is defined yet use the following memory settings +// +#ifndef __MEMORY + +memory stm32f103flash +{ + mau = 8; + type = rom; + size = 8192k; + map ( size = 512k, dest_offset= 0x64000000, dest=bus:ARM:local_bus); +} + +memory stm32f103ram +{ + mau = 8; + type = ram; + size = 64k; + map ( size = 64k, dest_offset=0x20000000, dest=bus:ARM:local_bus); +} + +#endif /* __MEMORY */ + + +// +// Custom vector table defines interrupts according to CMSIS standard +// +# if defined(__CPU_ARMV7M__) +section_setup ::linear +{ + // vector table with handler addresses + vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_ROM_ADDR, + template = ".text.handler_address", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + fill = loop, + no_inline + ) + { + vector ( id = 0, fill = "_START" ); // FIXME: "_lc_ub_stack" does not work + vector ( id = 1, fill = "_START" ); + vector ( id = 2, optional, fill = "NMI_Handler" ); + vector ( id = 3, optional, fill = "HardFault_Handler" ); + vector ( id = 4, optional, fill = "MemManage_Handler" ); + vector ( id = 5, optional, fill = "BusFault_Handler" ); + vector ( id = 6, optional, fill = "UsageFault_Handler" ); + vector ( id = 11, optional, fill = "SVC_Handler" ); + vector ( id = 12, optional, fill = "DebugMon_Handler" ); + vector ( id = 14, optional, fill = "PendSV_Handler" ); + vector ( id = 15, optional, fill = "SysTick_Handler" ); + + // External Interrupts : + vector ( id = 16, optional, fill = "WWDG_IRQHandler" ); // Window Watchdog + vector ( id = 17, optional, fill = "PVD_IRQHandler" ); // PVD through EXTI Line detect + vector ( id = 18, optional, fill = "TAMPER_IRQHandler" ); // Tamper + vector ( id = 19, optional, fill = "RTC_IRQHandler" ); // RTC + vector ( id = 20, optional, fill = "FLASH_IRQHandler" ); // Flash + vector ( id = 21, optional, fill = "RCC_IRQHandler" ); // RCC + vector ( id = 22, optional, fill = "EXTI0_IRQHandler" ); // EXTI Line 0 + vector ( id = 23, optional, fill = "EXTI1_IRQHandler" ); // EXTI Line 1 + vector ( id = 24, optional, fill = "EXTI2_IRQHandler" ); // EXTI Line 2 + vector ( id = 25, optional, fill = "EXTI3_IRQHandler" ); // EXTI Line 3 + vector ( id = 26, optional, fill = "EXTI4_IRQHandler" ); // EXTI Line 4 + vector ( id = 27, optional, fill = "DMA1_Channel1_IRQHandler" ); // DMA Channel 1 + vector ( id = 28, optional, fill = "DMA1_Channel2_IRQHandler" ); // DMA Channel 2 + vector ( id = 29, optional, fill = "DMA1_Channel3_IRQHandler" ); // DMA Channel 3 + vector ( id = 30, optional, fill = "DMA1_Channel4_IRQHandler" ); // DMA Channel 4 + vector ( id = 31, optional, fill = "DMA1_Channel5_IRQHandler" ); // DMA Channel 5 + vector ( id = 32, optional, fill = "DMA1_Channel6_IRQHandler" ); // DMA Channel 6 + vector ( id = 33, optional, fill = "DMA1_Channel7_IRQHandler" ); // DMA Channel 7 + vector ( id = 34, optional, fill = "ADC1_2_IRQHandler" ); // ADC1 and ADC2 + vector ( id = 35, optional, fill = "USB_HP_CAN1_TX_IRQHandler" ); // USB High Priority or CAN1 TX + vector ( id = 36, optional, fill = "USB_LP_CAN1_RX0_IRQHandler" ); // USB LowPriority or CAN1 RX0 + vector ( id = 37, optional, fill = "CAN1_RX1_IRQHandler" ); // CAN1 RX1 + vector ( id = 38, optional, fill = "CAN1_SCE_IRQHandler" ); // CAN1 SCE + vector ( id = 39, optional, fill = "EXTI9_5_IRQHandler" ); // EXTI Line 9..5 + vector ( id = 40, optional, fill = "TIM1_BRK_IRQHandler" ); // TIM1 Break + vector ( id = 41, optional, fill = "TIM1_UP_IRQHandler" ); // TIM1 Update + vector ( id = 42, optional, fill = "TIM1_TRG_COM_IRQHandler" ); // TIM1 Trigger and Commutation + vector ( id = 43, optional, fill = "TIM1_CC_IRQHandler" ); // TIM1 Capture Compare + vector ( id = 44, optional, fill = "TIM2_IRQHandler" ); // TIM2 + vector ( id = 45, optional, fill = "TIM3_IRQHandler" ); // TIM3 + vector ( id = 46, optional, fill = "TIM4_IRQHandler" ); // TIM4 + vector ( id = 47, optional, fill = "I2C1_EV_IRQHandler" ); // I2C1 Event + vector ( id = 48, optional, fill = "I2C1_ER_IRQHandler" ); // I2C1 Error + vector ( id = 49, optional, fill = "I2C2_EV_IRQHandler" ); // I2C2 Event + vector ( id = 50, optional, fill = "I2C2_ER_IRQHandler" ); // I2C2 Error + vector ( id = 51, optional, fill = "SPI1_IRQHandler" ); // SPI1 + vector ( id = 52, optional, fill = "SPI2_IRQHandler" ); // SPI2 + vector ( id = 53, optional, fill = "USART1_IRQHandler" ); // USART1 + vector ( id = 54, optional, fill = "USART2_IRQHandler" ); // USART2 + vector ( id = 55, optional, fill = "USART3_IRQHandler" ); // USART3 + vector ( id = 56, optional, fill = "EXTI15_10_IRQHandler" ); // EXTI Line 15..10 + vector ( id = 57, optional, fill = "RTCAlarm_IRQHandler" ); // RTC Alarm through EXTI Line + vector ( id = 58, optional, fill = "USBWakeUp_IRQHandler" ); // USB Wakeup from suspend + vector ( id = 59, optional, fill = "TIM8_BRK_IRQHandler" ); // TIM8 Break + vector ( id = 60, optional, fill = "TIM8_UP_IRQHandler" ); // TIM8 Update + vector ( id = 61, optional, fill = "TIM8_TRG_COM_IRQHandler" ); // TIM8 Trigger and Commutation + vector ( id = 62, optional, fill = "TIM8_CC_IRQHandler" ); // TIM8 Capture Compare + vector ( id = 63, optional, fill = "ADC3_IRQHandler" ); // ADC3 + vector ( id = 64, optional, fill = "FSMC_IRQHandler" ); // FSMC + vector ( id = 65, optional, fill = "SDIO_IRQHandler" ); // SDIO + vector ( id = 66, optional, fill = "TIM5_IRQHandler" ); // TIM5 + vector ( id = 67, optional, fill = "SPI3_IRQHandler" ); // SPI3 + vector ( id = 68, optional, fill = "UART4_IRQHandler" ); // UART4 + vector ( id = 69, optional, fill = "UART5_IRQHandler" ); // UART5 + vector ( id = 70, optional, fill = "TIM6_IRQHandler" ); // TIM6 + vector ( id = 71, optional, fill = "TIM7_IRQHandler" ); // TIM7 + vector ( id = 72, optional, fill = "DMA2_Channel1_IRQHandler" ); // DMA2 Channel1 + vector ( id = 73, optional, fill = "DMA2_Channel2_IRQHandler" ); // DMA2 Channel2 + vector ( id = 74, optional, fill = "DMA2_Channel3_IRQHandler" ); // DMA2 Channel3 + vector ( id = 75, optional, fill = "DMA2_Channel4_5_IRQHandler" ); // DMA2 Channel4 and DMA2 Channel5 + } +} +# endif diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL/Settings/StartupScript.scr b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL/Settings/StartupScript.scr new file mode 100644 index 0000000000000000000000000000000000000000..e3dbe2309d1c25d27e98e5f926688d98af736d85 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL/Settings/StartupScript.scr @@ -0,0 +1,9 @@ +// Hitex/Lue/11.02.2008 +// Executable Script file for HiTOP Debugger +// Reset application + +// Reset +RESET TARGET + + + diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL/Settings/arm_arch.lsl b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL/Settings/arm_arch.lsl new file mode 100644 index 0000000000000000000000000000000000000000..3e6d3031e15b73a34caa2408b998eda685da1811 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL/Settings/arm_arch.lsl @@ -0,0 +1,287 @@ +//////////////////////////////////////////////////////////////////////////// +// +// File : arm_arch.lsl +// +// Version : @(#)arm_arch.lsl 1.4 09/04/17 +// +// Description : Generic LSL file for ARM architectures +// +// Copyright 2008-2009 Altium BV +// +//////////////////////////////////////////////////////////////////////////// + +#ifndef __STACK +# define __STACK 32k +#endif +#ifndef __HEAP +# define __HEAP 32k +#endif +#ifndef __STACK_FIQ +# define __STACK_FIQ 8 +#endif +#ifndef __STACK_IRQ +# define __STACK_IRQ 8 +#endif +#ifndef __STACK_SVC +# define __STACK_SVC 8 +#endif +#ifndef __STACK_ABT +# define __STACK_ABT 8 +#endif +#ifndef __STACK_UND +# define __STACK_UND 8 +#endif +#ifndef __PROCESSOR_MODE +# define __PROCESSOR_MODE 0x1F /* SYS mode */ +#endif +#ifndef __IRQ_BIT +# define __IRQ_BIT 0x80 /* IRQ interrupts disabled */ +#endif +#ifndef __FIQ_BIT +# define __FIQ_BIT 0x40 /* FIQ interrupts disabled */ +#endif + +#define __APPLICATION_MODE (__PROCESSOR_MODE | __IRQ_BIT | __FIQ_BIT) + +#ifndef __VECTOR_TABLE_ROM_ADDR +# define __VECTOR_TABLE_ROM_ADDR 0x00000000 +#endif + +#ifndef __VECTOR_TABLE_RAM_ADDR +# define __VECTOR_TABLE_RAM_ADDR 0x00000000 +#endif + +#if defined(__CPU_ARMV7M__) || defined(__CPU_ARMV6M__) +# ifndef __NR_OF_VECTORS +# define __NR_OF_VECTORS 16 +# endif +# define __VECTOR_TABLE_SIZE (__NR_OF_VECTORS * 4) +#else +# ifdef __PIC_VECTORS +# define __VECTOR_TABLE_SIZE 64 +# else +# ifdef __FIQ_HANDLER_INLINE +# define __VECTOR_TABLE_SIZE 28 +# define __NR_OF_VECTORS 7 +# else +# define __VECTOR_TABLE_SIZE 32 +# define __NR_OF_VECTORS 8 +# endif +# endif +#endif + +#ifndef __VECTOR_TABLE_RAM_SPACE +# undef __VECTOR_TABLE_RAM_COPY +#endif + +#ifndef __XVWBUF +# define __XVWBUF 0 /* buffer used by CrossView Pro */ +#endif + +#define BOUNDS_GROUP_NAME grp_bounds +#define BOUNDS_GROUP_SELECT "bounds" + +architecture ARM +{ + endianness + { + little; + big; + } + + space linear + { + id = 1; + mau = 8; + map (size = 4G, dest = bus:local_bus); + + copytable + ( + align = 4, + copy_unit = 1, + dest = linear + ); + + start_address + ( + // It is not strictly necessary to define a run_addr for _START + // because hardware starts execution at address 0x0 which should + // be the vector table with a jump to the relocatable _START, but + // an absolute address can prevent the branch to be out-of-range. + // Or _START may be the entry point at reset and the reset handler + // copies the vector table to address 0x0 after some ROM/RAM memory + // re-mapping. In that case _START should be at a fixed address + // in ROM, specifically the alias of address 0x0 before memory + // re-mapping. +#ifdef __START + run_addr = __START, +#endif + symbol = "_START" + ); + + stack "stack" + ( +#ifdef __STACK_FIXED + fixed, +#endif + align = 4, + min_size = __STACK, + grows = high_to_low + ); + + heap "heap" + ( +#ifdef __HEAP_FIXED + fixed, +#endif + align = 4, + min_size=__HEAP + ); + +#if !defined(__CPU_ARMV7M__) && !defined(__CPU_ARMV6M__) + stack "stack_fiq" + ( + fixed, + align = 4, + min_size = __STACK_FIQ, + grows = high_to_low + ); + stack "stack_irq" + ( + fixed, + align = 4, + min_size = __STACK_IRQ, + grows = high_to_low + ); + stack "stack_svc" + ( + fixed, + align = 4, + min_size = __STACK_SVC, + grows = high_to_low + ); + stack "stack_abt" + ( + fixed, + align = 4, + min_size = __STACK_ABT, + grows = high_to_low + ); + stack "stack_und" + ( + fixed, + align = 4, + min_size = __STACK_UND, + grows = high_to_low + ); +#endif + +#if !defined(__NO_AUTO_VECTORS) && !defined(__NO_DEFAULT_AUTO_VECTORS) +# if defined(__CPU_ARMV7M__) || defined(__CPU_ARMV6M__) + // vector table with handler addresses + vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_ROM_ADDR, + template = ".text.handler_address", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + fill = loop, + no_inline + ) + { + vector ( id = 0, fill = "_START" ); // FIXME: "_lc_ub_stack" does not work + vector ( id = 1, fill = "_START" ); + } +# else +# ifdef __PIC_VECTORS + // vector table with ldrpc instructions from handler table + vector_table "vector_table" ( vector_size = 4, size = 8, run_addr = __VECTOR_TABLE_ROM_ADDR, + template = ".text.vector_ldrpc", + template_symbol = "_lc_vector_ldrpc", + vector_prefix = "_vector_ldrpc_", + fill = loop + ) + { + } + // subsequent vector table (data pool) with addresses of handlers + vector_table "handler_table" ( vector_size = 4, size = 8, run_addr = __VECTOR_TABLE_ROM_ADDR + 32, + template = ".text.handler_address", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + fill = loop[-32], + no_inline + ) + { + vector ( id = 0, fill = "_START" ); + } +# else + // vector table with branch instructions to handlers + vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_ROM_ADDR, + template = ".text.vector_branch", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + fill = loop + ) + { + vector ( id = 0, fill = "_START" ); + } +# endif +# endif +#endif + section_layout + { +#if defined(__NO_AUTO_VECTORS) + "_lc_ub_vector_table" = __VECTOR_TABLE_ROM_ADDR; + "_lc_ue_vector_table" = __VECTOR_TABLE_ROM_ADDR + __VECTOR_TABLE_SIZE; +#endif +#ifdef __VECTOR_TABLE_RAM_SPACE + // reserve space to copy vector table from ROM to RAM + group ( ordered, run_addr = __VECTOR_TABLE_RAM_ADDR ) + reserved "vector_table_space" ( size = __VECTOR_TABLE_SIZE, attributes = rwx ); +#endif +#ifdef __VECTOR_TABLE_RAM_COPY + // provide copy address symbols for copy routine + "_lc_ub_vector_table_copy" := "_lc_ub_vector_table_space"; + "_lc_ue_vector_table_copy" := "_lc_ue_vector_table_space"; +#else + // prevent copy: copy address equals orig address + "_lc_ub_vector_table_copy" := "_lc_ub_vector_table"; + "_lc_ue_vector_table_copy" := "_lc_ue_vector_table"; +#endif + // define buffer for string input via Crossview Pro debugger + group ( align = 4 ) reserved "xvwbuffer" (size=__XVWBUF, attributes=rw ); + + // define labels for bounds begin and end as used in C library +#ifndef BOUNDS_GROUP_REDEFINED + group BOUNDS_GROUP_NAME (ordered, contiguous) + { + select BOUNDS_GROUP_SELECT; + } +#endif + "_lc_ub_bounds" := addressof(group:BOUNDS_GROUP_NAME); + "_lc_ue_bounds" := addressof(group:BOUNDS_GROUP_NAME) + sizeof(group:BOUNDS_GROUP_NAME); + +#ifdef __HEAPADDR + group ( ordered, run_addr=__HEAPADDR ) + { + select "heap"; + } +#endif +#ifdef __STACKADDR + group ( ordered, run_addr=__STACKADDR ) + { + select "stack"; + } +#endif +#if !defined(__CPU_ARMV7M__) && !defined(__CPU_ARMV6M__) + // symbol to set mode bits and interrupt disable bits + // in cstart module before calling the application (main) + "_APPLICATION_MODE_" = __APPLICATION_MODE; +#endif + } + } + + bus local_bus + { + mau = 8; + width = 32; + } +} diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL/Settings/flash_nor.scr b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL/Settings/flash_nor.scr new file mode 100644 index 0000000000000000000000000000000000000000..4dbe250cfc831bbe12a133be2c7331ce3f2a4385 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL/Settings/flash_nor.scr @@ -0,0 +1,102 @@ +// Hitex/We/04.02.2008 +// +// StartupScript Script file for HiTOP Debugger +// Target Hitex evaluation board with STM32Fxxx +// Flash application + +//######################################################################################### +// Enable APB2 GPIOA .. GPIOG + AFIO Peripheral Clock +// +// Register RCC_APB2ENR Adr: 0x40021000 + Offs. 0x18 value 0x1FD +//######################################################################################### +OUTPUT DWORD TO 0x40021014 = 0x00000114 +OUTPUT DWORD TO 0x40021018 = 0x000001FD + + +//######################################################################################### +// NOR Datalines GPIOD, GPIOE +// +// Set Bits 0,1,8,9,10,14,15 of Port D to PushPull, 50Mhz Speed +// Register GPIOD_CRL Adr: 0x40011400 + Offs. 0x00 value 0x444444BB +// Register GPIOD_CRH Adr: 0x40011400 + Offs. 0x04 value 0xBB444BBB +// +// Set Bits 7,8,9,10,11,12,13,14,15 of Port E to PushPull, 50Mhz Speed +// Register GPIOD_CRL Adr: 0x40011800 + Offs. 0x00 value 0xB4444444 +// Register GPIOD_CRH Adr: 0x40011800 + Offs. 0x04 value 0xBBBBBBBB +// +//######################################################################################### +// Port D +OUTPUT DWORD TO 0x40011400 = 0x44BB44BB +OUTPUT DWORD TO 0x40011404 = 0xBBBBBBBB +// Port E +OUTPUT DWORD TO 0x40011800 = 0xBBBBBB44 +OUTPUT DWORD TO 0x40011804 = 0xBBBBBBBB + +//######################################################################################### +// NOR Addresslines GPIOF, GPIOG +// +// Set Bits 0,1,2,3,4,5,12,13,14,15 of Port F to PushPull, 50Mhz Speed +// Register GPIOF_CRL Adr: 0x40011C00 + Offs. 0x00 value 0x444BBBBB +// Register GPIOF_CRH Adr: 0x40011C00 + Offs. 0x04 value 0xBBBB4444 +// +// Set Bits 0,1,2,3,4,5,13,14 of Port G to PushPull, 50Mhz Speed +// Register GPIOG_CRL Adr: 0x40012000 + Offs. 0x00 value 0x44BBBBBB +// Register GPIOG_CRH Adr: 0x40012000 + Offs. 0x04 value 0x4BB44444 +// +// Set Bits 11,12,13 of Port D to PushPull, 50Mhz Speed +// Register GPIOD_CRH Adr: 0x40011400 + Offs. 0x04 value 0xBBBBBBBB +// +// Set Bits 2,3,4,5,6 of Port E to PushPull, 50Mhz Speed +// Register GPIOD_CRL Adr: 0x40011800 + Offs. 0x00 value 0xB4444444 +//######################################################################################### +// Port F +OUTPUT DWORD TO 0x40011C00 = 0x44BBBBBB +OUTPUT DWORD TO 0x40011C04 = 0xBBBB4444 +// Port G +OUTPUT DWORD TO 0x40012000 = 0x44BBBBBB +OUTPUT DWORD TO 0x40012004 = 0x4BB444B4 +// Port D +//OUTPUT DWORD TO 0x40011404 = 0xBBBBBBBB +// Port E +//OUTPUT DWORD TO 0x40011800 = 0xBBBBBBB4 + +//######################################################################################### +// NOE and NWE Configuration GPIOD +// +// Set Bits 4,5 of Port D to PushPull, 50Mhz Speed +// Register GPIOD_CRL Adr: 0x40011400 + Offs. 0x00 value 0x44BB44BB +// +//######################################################################################### +// Port D +//OUTPUT DWORD TO 0x40011400 = 0x44BB44BB + +//######################################################################################### +// NE2 Configuration GPIOG +// +// Set Bits 9 Port G to PushPull, 50Mhz Speed +// Register GPIOD_CRH Adr: 0x40012000 + Offs. 0x04 value 0x4BB444B4 +// +//######################################################################################### +// Port G +//OUTPUT DWORD TO 0x40012004 = 0x4BB444B4 + +//######################################################################################### +// FSMC Configuration +// +// Bank1 is used +// if another Bank is required, then adjust the Register Addresses +// +// Register FSMC_BCR value 0x00001059 +// Register FSMC_BTR value 0x00010112 +// Register FSMC_BWTR value 0x0FFFFFFF +//######################################################################################### + +OUTPUT DWORD TO 0xA0000000 = 0x000030DB + + +OUTPUT DWORD TO 0xA0000008 = 0x00001059 + +OUTPUT DWORD TO 0xA000000C= 0x30010112 + +OUTPUT DWORD TO 0xA0000104 = 0x0FFFFFFF + diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL/Settings/link.lnk b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL/Settings/link.lnk new file mode 100644 index 0000000000000000000000000000000000000000..b4d78188742ecc5ede802102c78e816350a3fc3d --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL/Settings/link.lnk @@ -0,0 +1,4 @@ +-d"./settings/STM32F10x_hd.lsl" +--optimize=0 +--map-file-format=2 +$(LinkObjects) diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL/Settings/linkextsram.lnk b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL/Settings/linkextsram.lnk new file mode 100644 index 0000000000000000000000000000000000000000..6dbf95a6ce873a9f1bce890c4dfd9bfd44df5cfb --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL/Settings/linkextsram.lnk @@ -0,0 +1,4 @@ +-d"./settings/STM32F10x_extsram.lsl" +--optimize=0 +--map-file-format=2 +$(LinkObjects) diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL/Settings/linknor.lnk b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL/Settings/linknor.lnk new file mode 100644 index 0000000000000000000000000000000000000000..c14affffe292168627af2c74a421d895ba7b5971 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL/Settings/linknor.lnk @@ -0,0 +1,4 @@ +-d"./settings/STM32F10xnor.lsl" +--optimize=0 +--map-file-format=2 +$(LinkObjects) diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL/Settings/reset_appl.scr b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL/Settings/reset_appl.scr new file mode 100644 index 0000000000000000000000000000000000000000..d90eb1562155bf052756c7c9ba7e12d76d11f1bd --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL/Settings/reset_appl.scr @@ -0,0 +1,8 @@ +// Hitex/Lue/11.02.2008 +// Executable Script file for HiTOP Debugger +// Reset application + +// Reset +RESET TARGET + + diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL/Settings/reset_go_main.scr b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL/Settings/reset_go_main.scr new file mode 100644 index 0000000000000000000000000000000000000000..3e9c066994344d9767229e16c69308cc5bdc8ee2 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL/Settings/reset_go_main.scr @@ -0,0 +1,12 @@ +// Hitex/Lue/11.02.2008 +// Executable Script file for HiTOP Debugger +// Reset application & Go main + +// Reset +RESET TARGET + + +// execute program till main +Go UNTIL main +wait + diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL/cstart_thumb2.asm b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL/cstart_thumb2.asm new file mode 100644 index 0000000000000000000000000000000000000000..12dc0d02dd7f73c60656a8293afd8da477958793 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL/cstart_thumb2.asm @@ -0,0 +1,148 @@ + + +;; NOTE: To allow the use of this file for both ARMv6M and ARMv7M, +;; we will only use 16-bit Thumb intructions. + + .extern _lc_ub_stack ; usr/sys mode stack pointer + .extern _lc_ue_stack ; symbol required by debugger + .extern _lc_ub_table ; ROM to RAM copy table + .extern main + .extern _Exit + .extern exit + .weak exit + .global __get_argcv + .weak __get_argcv + .extern __argcvbuf + .weak __argcvbuf + .extern __init_hardware + .extern __init_vector_table + .extern SystemInit + + .if @defined('__PROF_ENABLE__') + .extern __prof_init + .endif + .if @defined('__POSIX__') + .extern posix_main + .extern _posix_boot_stack_top + .endif + + .global _START + + .section .text.cstart + + .thumb +_START: + ;; anticipate possible ROM/RAM remapping + ;; by loading the 'real' program address + ldr r1,=_Next + bx r1 +_Next: + ;; initialize the stack pointer + ldr r1,=_lc_ub_stack ; TODO: make this part of the vector table + mov sp,r1 + + ;; call a user function which initializes hardware + ;; such as ROM/RAM re-mapping or MMU configuration + bl __init_hardware + + ;ldr r0, =SystemInit + ;bx r0 + bl SystemInit + + ;; copy initialized sections from ROM to RAM + ;; and clear uninitialized data sections in RAM + + ldr r3,=_lc_ub_table + movs r0,#0 +cploop: + ldr r4,[r3,#0] ; load type + ldr r5,[r3,#4] ; dst address + ldr r6,[r3,#8] ; src address + ldr r7,[r3,#12] ; size + + cmp r4,#1 + beq copy + cmp r4,#2 + beq clear + b done + +copy: + subs r7,r7,#1 + ldrb r1,[r6,r7] + strb r1,[r5,r7] + bne copy + + adds r3,r3,#16 + b cploop + +clear: + subs r7,r7,#1 + strb r0,[r5,r7] + bne clear + + adds r3,r3,#16 + b cploop + +done: + ;; initialize or copy the vector table + bl __init_vector_table + + .if @defined('__POSIX__') + + ;; posix stack buffer for system upbringing + ldr r0,=_posix_boot_stack_top + ldr r0, [r0] + mov sp,r0 + + .else + + ;; load r10 with end of USR/SYS stack, which is + ;; needed in case stack overflow checking is on + ;; NOTE: use 16-bit instructions only, for ARMv6M + ldr r0,=_lc_ue_stack + mov r10,r0 + + .endif + + .if @defined('__PROF_ENABLE__') + bl __prof_init + .endif + + .if @defined('__POSIX__') + ;; call posix_main with no arguments + bl posix_main + .else + ;; retrieve argc and argv (default argv[0]==NULL & argc==0) + bl __get_argcv + ldr r1,=__argcvbuf + ;; call main + bl main + .endif + + ;; call exit using the return value from main() + ;; Note. Calling exit will also run all functions + ;; that were supplied through atexit(). + bl exit + +__get_argcv: ; weak definition + movs r0,#0 + bx lr + + .ltorg + .endsec + + .calls '_START','__init_hardware' + .calls '_START','__init_vector_table' + .if @defined('__PROF_ENABLE__') + .calls '_START','__prof_init' + .endif + .if @defined('__POSIX__') + .calls '_START','posix_main' + .else + .calls '_START','__get_argcv' + .calls '_START','main' + .endif + .calls '_START','exit' + .calls '_START','',0 + + .end diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL/readme.txt b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL/readme.txt new file mode 100644 index 0000000000000000000000000000000000000000..7e4c10b3ba146235bafbd4da019d86cd577cd6d8 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL/readme.txt @@ -0,0 +1,112 @@ +/** + @page HiTOP5_STM3210E HiTOP Project Template for STM32F10x High-density devices + + @verbatim + ******************** (C) COPYRIGHT 2011 STMicroelectronics ******************* + * @file readme.txt + * @author MCD Application Team + * @version V3.5.0 + * @date 08-April-2011 + * @brief This sub directory contains all the user modifiable files needed + * to create a new project linked with the STM32F10x Standard Peripherals + * Library and working with HiTOP software toolchain (version 5.40 and later). + ****************************************************************************** + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. + * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, + * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE + * CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING + * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + ****************************************************************************** + @endverbatim + +@par Directory contents + + - Project.htp: A pre-configured project file with the provided library + structure that produces an executable image with HiTOP + + - cstart_thumb2.asm: This file initializes the stack pointer and copy initialized + sections from ROM to RAM. + + - Objects: This mandatory directory contains the executable images. + + - Settings: This directory contains the linker and script files. + - arm_arch.lsl: This file is used to place program code (readonly) + in internal FLASH and data (readwrite, Stack and Heap) + in internal SRAM. + + - flash_nor.scr: This file is a HiTOP script allowing the FSMC configuration. + It should be executed before programming the NOR flash of the + STM32 High-density devices. + + - link.lnk: This file is the HiTOP linker it invokes the STM32F10x_hd.lsl. + + - linkextsram.lnk: This file is the HiTOP linker it invokes the STM32F10x_extsram.lsl. + + - linknor.lnk: This file is the HiTOP linker it invokes the STM32F10xnor.lsl. + + - reset_appl.scr: This file is a HiTOP script it performs a target reset. + + - reset_go_main.scr: This file is a HiTOP script and it sets the Program + Counter at the "main" instruction. + + - StartupScript.scr: This file is a HiTOP script and it performs a target + reset before loading The executable image. + + - STM32F10x_extsram.lsl: This file used to place program code (readonly) in + internal FLASH and data (readwrite, Stack and Heap) + in external SRAM. + It contains also the vector table of the STM32 high-density + devices. + You can customize this file to your need. + This file is used only with STM32 High-density devices. + + - STM32F10x_hd.lsl: This file is used to place program code (readonly) + in internal FLASH and data (readwrite, Stack and Heap) + in internal SRAM. + It contains also the vector table of the STM32 + High-Density devices. + You can customize this file to your need. + + - STM32F10xnor.lsl: This file used to place program code (readonly) in + external NOR FLASH and data (readwrite, Stack and Heap) + in internal SRAM. + It contains also the vector table of the STM32 high-density + devices. + You can customize this file to your need. + This file is used only with STM32 High-density devices. + +@par How to use it ? + +- Open the HiTOP toolchain. +- Browse to open the project.htp +- A "Download application" window is displayed, click "cancel". +- Rebuild all files: Project->Rebuild all +- Load project image : Click "ok" in the "Download application" window. +- Run the "RESET_GO_MAIN" script to set the PC at the "main" +- Run program: Debug->Go(F5). + +- When using High-density devices, it is mandatory to reset the target before + loading the project into target +- It is recommended to run the reset script ( click on TR button in the toolbar menu) + after loading the project into target. + +@note + - Low-density Value line devices are STM32F100xx microcontrollers where the + Flash memory density ranges between 16 and 32 Kbytes. + - Low-density devices are STM32F101xx, STM32F102xx and STM32F103xx + microcontrollers where the Flash memory density ranges between 16 and 32 Kbytes. + - Medium-density Value line devices are STM32F100xx microcontrollers where + the Flash memory density ranges between 64 and 128 Kbytes. + - Medium-density devices are STM32F101xx, STM32F102xx and STM32F103xx + microcontrollers where the Flash memory density ranges between 64 and 128 Kbytes. + - High-density Value line devices are STM32F100xx microcontrollers where the + Flash memory density ranges between 256 and 512 Kbytes. + - High-density devices are STM32F101xx and STM32F103xx microcontrollers where + the Flash memory density ranges between 256 and 512 Kbytes. + - XL-density devices are STM32F101xx and STM32F103xx microcontrollers where + the Flash memory density ranges between 512 and 1024 Kbytes. + - Connectivity line devices are STM32F105xx and STM32F107xx microcontrollers. + + *

© COPYRIGHT 2011 STMicroelectronics

+ */ diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL/setstack.asm b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL/setstack.asm new file mode 100644 index 0000000000000000000000000000000000000000..2c11b4c520049a8360c9bc76251a01e76e25a81b --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL/setstack.asm @@ -0,0 +1,4 @@ + .section .bss.stack + .global _stacklabel +_stacklabel: + .endsec \ No newline at end of file diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL_XL/Project.htp b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL_XL/Project.htp new file mode 100644 index 0000000000000000000000000000000000000000..28de44895ec4378da6f69c526ffde2397f6af76f --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL_XL/Project.htp @@ -0,0 +1,988 @@ + + + + + + + + + + + + + + + + + + + + +
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
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Even when aliased in the boot memory space, +// the related memory (Flash memory or SRAM) is still accessible at its +// original memory space. +// +// If no memory is defined yet use the following memory settings +// +#ifndef __MEMORY + +memory stm32f103flash +{ + mau = 8; + type = rom; + size = 0x100000; + map ( size = 0x100000, dest_offset=0x08000000, dest=bus:ARM:local_bus); +} + +memory stm32f103ram +{ + mau = 8; + type = ram; + size = 96k; + map ( size = 96k, dest_offset=0x20000000, dest=bus:ARM:local_bus); +} + +#endif /* __MEMORY */ + + +// +// Custom vector table defines interrupts according to CMSIS standard +// +# if defined(__CPU_ARMV7M__) +section_setup ::linear +{ + // vector table with handler addresses + vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_ROM_ADDR, + template = ".text.handler_address", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + fill = loop, + no_inline + ) + { + vector ( id = 0, fill = "_START" ); // FIXME: "_lc_ub_stack" does not work + vector ( id = 1, fill = "_START" ); + vector ( id = 2, optional, fill = "NMI_Handler" ); + vector ( id = 3, optional, fill = "HardFault_Handler" ); + vector ( id = 4, optional, fill = "MemManage_Handler" ); + vector ( id = 5, optional, fill = "BusFault_Handler" ); + vector ( id = 6, optional, fill = "UsageFault_Handler" ); + vector ( id = 11, optional, fill = "SVC_Handler" ); + vector ( id = 12, optional, fill = "DebugMon_Handler" ); + vector ( id = 14, optional, fill = "PendSV_Handler" ); + vector ( id = 15, optional, fill = "SysTick_Handler" ); + + // External Interrupts : + vector ( id = 16, optional, fill = "WWDG_IRQHandler" ); // Window Watchdog + vector ( id = 17, optional, fill = "PVD_IRQHandler" ); // PVD through EXTI Line detect + vector ( id = 18, optional, fill = "TAMPER_IRQHandler" ); // Tamper + vector ( id = 19, optional, fill = "RTC_IRQHandler" ); // RTC + vector ( id = 20, optional, fill = "FLASH_IRQHandler" ); // Flash + vector ( id = 21, optional, fill = "RCC_IRQHandler" ); // RCC + vector ( id = 22, optional, fill = "EXTI0_IRQHandler" ); // EXTI Line 0 + vector ( id = 23, optional, fill = "EXTI1_IRQHandler" ); // EXTI Line 1 + vector ( id = 24, optional, fill = "EXTI2_IRQHandler" ); // EXTI Line 2 + vector ( id = 25, optional, fill = "EXTI3_IRQHandler" ); // EXTI Line 3 + vector ( id = 26, optional, fill = "EXTI4_IRQHandler" ); // EXTI Line 4 + vector ( id = 27, optional, fill = "DMA1_Channel1_IRQHandler" ); // DMA Channel 1 + vector ( id = 28, optional, fill = "DMA1_Channel2_IRQHandler" ); // DMA Channel 2 + vector ( id = 29, optional, fill = "DMA1_Channel3_IRQHandler" ); // DMA Channel 3 + vector ( id = 30, optional, fill = "DMA1_Channel4_IRQHandler" ); // DMA Channel 4 + vector ( id = 31, optional, fill = "DMA1_Channel5_IRQHandler" ); // DMA Channel 5 + vector ( id = 32, optional, fill = "DMA1_Channel6_IRQHandler" ); // DMA Channel 6 + vector ( id = 33, optional, fill = "DMA1_Channel7_IRQHandler" ); // DMA Channel 7 + vector ( id = 34, optional, fill = "ADC1_2_IRQHandler" ); // ADC1 and ADC2 + vector ( id = 35, optional, fill = "USB_HP_CAN1_TX_IRQHandler" ); // USB High Priority or CAN1 TX + vector ( id = 36, optional, fill = "USB_LP_CAN1_RX0_IRQHandler" ); // USB LowPriority or CAN1 RX0 + vector ( id = 37, optional, fill = "CAN1_RX1_IRQHandler" ); // CAN1 RX1 + vector ( id = 38, optional, fill = "CAN1_SCE_IRQHandler" ); // CAN1 SCE + vector ( id = 39, optional, fill = "EXTI9_5_IRQHandler" ); // EXTI Line 9..5 + vector ( id = 40, optional, fill = "TIM1_BRK_TIM9_IRQHandler" ); // TIM1 Break + vector ( id = 41, optional, fill = "TIM1_UP_TIM10_IRQHandler" ); // TIM1 Update + vector ( id = 42, optional, fill = "TIM1_TRG_COM_TIM11_IRQHandler" ); // TIM1 Trigger and Commutation + vector ( id = 43, optional, fill = "TIM1_CC_IRQHandler" ); // TIM1 Capture Compare + vector ( id = 44, optional, fill = "TIM2_IRQHandler" ); // TIM2 + vector ( id = 45, optional, fill = "TIM3_IRQHandler" ); // TIM3 + vector ( id = 46, optional, fill = "TIM4_IRQHandler" ); // TIM4 + vector ( id = 47, optional, fill = "I2C1_EV_IRQHandler" ); // I2C1 Event + vector ( id = 48, optional, fill = "I2C1_ER_IRQHandler" ); // I2C1 Error + vector ( id = 49, optional, fill = "I2C2_EV_IRQHandler" ); // I2C2 Event + vector ( id = 50, optional, fill = "I2C2_ER_IRQHandler" ); // I2C2 Error + vector ( id = 51, optional, fill = "SPI1_IRQHandler" ); // SPI1 + vector ( id = 52, optional, fill = "SPI2_IRQHandler" ); // SPI2 + vector ( id = 53, optional, fill = "USART1_IRQHandler" ); // USART1 + vector ( id = 54, optional, fill = "USART2_IRQHandler" ); // USART2 + vector ( id = 55, optional, fill = "USART3_IRQHandler" ); // USART3 + vector ( id = 56, optional, fill = "EXTI15_10_IRQHandler" ); // EXTI Line 15..10 + vector ( id = 57, optional, fill = "RTCAlarm_IRQHandler" ); // RTC Alarm through EXTI Line + vector ( id = 58, optional, fill = "USBWakeUp_IRQHandler" ); // USB Wakeup from suspend + vector ( id = 59, optional, fill = "TIM8_BRK_TIM12_IRQHandler" ); // TIM8 Break + vector ( id = 60, optional, fill = "TIM8_UP_TIM13_IRQHandler" ); // TIM8 Update + vector ( id = 61, optional, fill = "TIM8_TRG_COM_TIM14_IRQHandler" ); // TIM8 Trigger and Commutation + vector ( id = 62, optional, fill = "TIM8_CC_IRQHandler" ); // TIM8 Capture Compare + vector ( id = 63, optional, fill = "ADC3_IRQHandler" ); // ADC3 + vector ( id = 64, optional, fill = "FSMC_IRQHandler" ); // FSMC + vector ( id = 65, optional, fill = "SDIO_IRQHandler" ); // SDIO + vector ( id = 66, optional, fill = "TIM5_IRQHandler" ); // TIM5 + vector ( id = 67, optional, fill = "SPI3_IRQHandler" ); // SPI3 + vector ( id = 68, optional, fill = "UART4_IRQHandler" ); // UART4 + vector ( id = 69, optional, fill = "UART5_IRQHandler" ); // UART5 + vector ( id = 70, optional, fill = "TIM6_IRQHandler" ); // TIM6 + vector ( id = 71, optional, fill = "TIM7_IRQHandler" ); // TIM7 + vector ( id = 72, optional, fill = "DMA2_Channel1_IRQHandler" ); // DMA2 Channel1 + vector ( id = 73, optional, fill = "DMA2_Channel2_IRQHandler" ); // DMA2 Channel2 + vector ( id = 74, optional, fill = "DMA2_Channel3_IRQHandler" ); // DMA2 Channel3 + vector ( id = 75, optional, fill = "DMA2_Channel4_5_IRQHandler" ); // DMA2 Channel4 and DMA2 Channel5 + } +} +# endif diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL_XL/Settings/STM32F10x_xl_extsram.lsl b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL_XL/Settings/STM32F10x_xl_extsram.lsl new file mode 100644 index 0000000000000000000000000000000000000000..5bf6ca2b99cd63bc687802fc4f9b2057a81df238 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL_XL/Settings/STM32F10x_xl_extsram.lsl @@ -0,0 +1,174 @@ +//////////////////////////////////////////////////////////////////////////// +// +// File : stm32f103_cmsis.lsl +// +// Version : @(#)stm32f103_cmsis.lsl 1.2 09/06/04 +// +// Description : LSL file for the STMicroelectronics STM32F103, CMSIS version +// +// Copyright 2009 Altium BV +// +// NOTE: +// This file is derived from cm3.lsl and stm32f103.lsl. +// It is assumed that the user works with the ARMv7M architecture. +// Other architectures will not work with this lsl file. +// +//////////////////////////////////////////////////////////////////////////// + +// +// We do not want the vectors as defined in arm_arch.lsl +// +#define __NO_DEFAULT_AUTO_VECTORS 1 +#define __NR_OF_VECTORS 76 + + +#ifndef __STACK +# define __STACK 8k +#endif +#ifndef __HEAP +# define __HEAP 2k +#endif +#ifndef __VECTOR_TABLE_ROM_ADDR +# define __VECTOR_TABLE_ROM_ADDR 0x08000000 +#endif +#ifndef __XVWBUF +#define __XVWBUF 256 /* buffer used by CrossView */ +#endif + +#include + +//////////////////////////////////////////////////////////////////////////// +// +// In the STM32F10x, 3 different boot modes can be selected +// - User Flash memory is selected as boot space +// - SystemMemory is selected as boot space +// - Embedded SRAM is selected as boot space +// +// This aliases the physical memory associated with each boot mode to Block +// 000 (0x00000000 boot memory). Even when aliased in the boot memory space, +// the related memory (Flash memory or SRAM) is still accessible at its +// original memory space. +// +// If no memory is defined yet use the following memory settings +// +#ifndef __MEMORY + +memory stm32f103flash +{ + mau = 8; + type = rom; + size = 0x100000; + map ( size = 0x100000, dest_offset=0x08000000, dest=bus:ARM:local_bus); +} +memory stm32f103ram +{ + mau = 8; + type = ram; + size = 1024k; + map ( size = 1024k, dest_offset=0x68000000, dest=bus:ARM:local_bus); +} + +#endif /* __MEMORY */ +section_layout ::linear +{ + group( contiguous ) + { + select ".bss.stack"; + select "stack"; + } +} + + + +// +// Custom vector table defines interrupts according to CMSIS standard +// +# if defined(__CPU_ARMV7M__) +section_setup ::linear +{ + // vector table with handler addresses + vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_ROM_ADDR, + template = ".text.handler_address", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + fill = loop, + no_inline + ) + { + vector ( id = 0, fill = "_stacklabel" ); // FIXME: "_lc_ub_stack" does not work + vector ( id = 1, fill = "_START" ); + vector ( id = 2, optional, fill = "NMI_Handler" ); + vector ( id = 3, optional, fill = "HardFault_Handler" ); + vector ( id = 4, optional, fill = "MemManage_Handler" ); + vector ( id = 5, optional, fill = "BusFault_Handler" ); + vector ( id = 6, optional, fill = "UsageFault_Handler" ); + vector ( id = 11, optional, fill = "SVC_Handler" ); + vector ( id = 12, optional, fill = "DebugMon_Handler" ); + vector ( id = 14, optional, fill = "PendSV_Handler" ); + vector ( id = 15, optional, fill = "SysTick_Handler" ); + + // External Interrupts : + vector ( id = 16, optional, fill = "WWDG_IRQHandler" ); // Window Watchdog + vector ( id = 17, optional, fill = "PVD_IRQHandler" ); // PVD through EXTI Line detect + vector ( id = 18, optional, fill = "TAMPER_IRQHandler" ); // Tamper + vector ( id = 19, optional, fill = "RTC_IRQHandler" ); // RTC + vector ( id = 20, optional, fill = "FLASH_IRQHandler" ); // Flash + vector ( id = 21, optional, fill = "RCC_IRQHandler" ); // RCC + vector ( id = 22, optional, fill = "EXTI0_IRQHandler" ); // EXTI Line 0 + vector ( id = 23, optional, fill = "EXTI1_IRQHandler" ); // EXTI Line 1 + vector ( id = 24, optional, fill = "EXTI2_IRQHandler" ); // EXTI Line 2 + vector ( id = 25, optional, fill = "EXTI3_IRQHandler" ); // EXTI Line 3 + vector ( id = 26, optional, fill = "EXTI4_IRQHandler" ); // EXTI Line 4 + vector ( id = 27, optional, fill = "DMA1_Channel1_IRQHandler" ); // DMA Channel 1 + vector ( id = 28, optional, fill = "DMA1_Channel2_IRQHandler" ); // DMA Channel 2 + vector ( id = 29, optional, fill = "DMA1_Channel3_IRQHandler" ); // DMA Channel 3 + vector ( id = 30, optional, fill = "DMA1_Channel4_IRQHandler" ); // DMA Channel 4 + vector ( id = 31, optional, fill = "DMA1_Channel5_IRQHandler" ); // DMA Channel 5 + vector ( id = 32, optional, fill = "DMA1_Channel6_IRQHandler" ); // DMA Channel 6 + vector ( id = 33, optional, fill = "DMA1_Channel7_IRQHandler" ); // DMA Channel 7 + vector ( id = 34, optional, fill = "ADC1_2_IRQHandler" ); // ADC1 and ADC2 + vector ( id = 35, optional, fill = "USB_HP_CAN1_TX_IRQHandler" ); // USB High Priority or CAN1 TX + vector ( id = 36, optional, fill = "USB_LP_CAN1_RX0_IRQHandler" ); // USB LowPriority or CAN1 RX0 + vector ( id = 37, optional, fill = "CAN1_RX1_IRQHandler" ); // CAN1 RX1 + vector ( id = 38, optional, fill = "CAN1_SCE_IRQHandler" ); // CAN1 SCE + vector ( id = 39, optional, fill = "EXTI9_5_IRQHandler" ); // EXTI Line 9..5 + vector ( id = 40, optional, fill = "TIM1_BRK_TIM9_IRQHandler" ); // TIM1 Break + vector ( id = 41, optional, fill = "TIM1_UP_TIM10_IRQHandler" ); // TIM1 Update + vector ( id = 42, optional, fill = "TIM1_TRG_COM_TIM11_IRQHandler" ); // TIM1 Trigger and Commutation + vector ( id = 43, optional, fill = "TIM1_CC_IRQHandler" ); // TIM1 Capture Compare + vector ( id = 44, optional, fill = "TIM2_IRQHandler" ); // TIM2 + vector ( id = 45, optional, fill = "TIM3_IRQHandler" ); // TIM3 + vector ( id = 46, optional, fill = "TIM4_IRQHandler" ); // TIM4 + vector ( id = 47, optional, fill = "I2C1_EV_IRQHandler" ); // I2C1 Event + vector ( id = 48, optional, fill = "I2C1_ER_IRQHandler" ); // I2C1 Error + vector ( id = 49, optional, fill = "I2C2_EV_IRQHandler" ); // I2C2 Event + vector ( id = 50, optional, fill = "I2C2_ER_IRQHandler" ); // I2C2 Error + vector ( id = 51, optional, fill = "SPI1_IRQHandler" ); // SPI1 + vector ( id = 52, optional, fill = "SPI2_IRQHandler" ); // SPI2 + vector ( id = 53, optional, fill = "USART1_IRQHandler" ); // USART1 + vector ( id = 54, optional, fill = "USART2_IRQHandler" ); // USART2 + vector ( id = 55, optional, fill = "USART3_IRQHandler" ); // USART3 + vector ( id = 56, optional, fill = "EXTI15_10_IRQHandler" ); // EXTI Line 15..10 + vector ( id = 57, optional, fill = "RTCAlarm_IRQHandler" ); // RTC Alarm through EXTI Line + vector ( id = 58, optional, fill = "USBWakeUp_IRQHandler" ); // USB Wakeup from suspend + vector ( id = 59, optional, fill = "TIM8_BRK_TIM12_IRQHandler" ); // TIM8 Break + vector ( id = 60, optional, fill = "TIM8_UP_TIM13_IRQHandler" ); // TIM8 Update + vector ( id = 61, optional, fill = "TIM8_TRG_COM_TIM14_IRQHandler" ); // TIM8 Trigger and Commutation + vector ( id = 62, optional, fill = "TIM8_CC_IRQHandler" ); // TIM8 Capture Compare + vector ( id = 63, optional, fill = "ADC3_IRQHandler" ); // ADC3 + vector ( id = 64, optional, fill = "FSMC_IRQHandler" ); // FSMC + vector ( id = 65, optional, fill = "SDIO_IRQHandler" ); // SDIO + vector ( id = 66, optional, fill = "TIM5_IRQHandler" ); // TIM5 + vector ( id = 67, optional, fill = "SPI3_IRQHandler" ); // SPI3 + vector ( id = 68, optional, fill = "UART4_IRQHandler" ); // UART4 + vector ( id = 69, optional, fill = "UART5_IRQHandler" ); // UART5 + vector ( id = 70, optional, fill = "TIM6_IRQHandler" ); // TIM6 + vector ( id = 71, optional, fill = "TIM7_IRQHandler" ); // TIM7 + vector ( id = 72, optional, fill = "DMA2_Channel1_IRQHandler" ); // DMA2 Channel1 + vector ( id = 73, optional, fill = "DMA2_Channel2_IRQHandler" ); // DMA2 Channel2 + vector ( id = 74, optional, fill = "DMA2_Channel3_IRQHandler" ); // DMA2 Channel3 + vector ( id = 75, optional, fill = "DMA2_Channel4_5_IRQHandler" ); // DMA2 Channel4 and DMA2 Channel5 + } +} +# endif + diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL_XL/Settings/StartupScript.scr b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL_XL/Settings/StartupScript.scr new file mode 100644 index 0000000000000000000000000000000000000000..e3dbe2309d1c25d27e98e5f926688d98af736d85 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL_XL/Settings/StartupScript.scr @@ -0,0 +1,9 @@ +// Hitex/Lue/11.02.2008 +// Executable Script file for HiTOP Debugger +// Reset application + +// Reset +RESET TARGET + + + diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL_XL/Settings/arm_arch.lsl b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL_XL/Settings/arm_arch.lsl new file mode 100644 index 0000000000000000000000000000000000000000..3e6d3031e15b73a34caa2408b998eda685da1811 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL_XL/Settings/arm_arch.lsl @@ -0,0 +1,287 @@ +//////////////////////////////////////////////////////////////////////////// +// +// File : arm_arch.lsl +// +// Version : @(#)arm_arch.lsl 1.4 09/04/17 +// +// Description : Generic LSL file for ARM architectures +// +// Copyright 2008-2009 Altium BV +// +//////////////////////////////////////////////////////////////////////////// + +#ifndef __STACK +# define __STACK 32k +#endif +#ifndef __HEAP +# define __HEAP 32k +#endif +#ifndef __STACK_FIQ +# define __STACK_FIQ 8 +#endif +#ifndef __STACK_IRQ +# define __STACK_IRQ 8 +#endif +#ifndef __STACK_SVC +# define __STACK_SVC 8 +#endif +#ifndef __STACK_ABT +# define __STACK_ABT 8 +#endif +#ifndef __STACK_UND +# define __STACK_UND 8 +#endif +#ifndef __PROCESSOR_MODE +# define __PROCESSOR_MODE 0x1F /* SYS mode */ +#endif +#ifndef __IRQ_BIT +# define __IRQ_BIT 0x80 /* IRQ interrupts disabled */ +#endif +#ifndef __FIQ_BIT +# define __FIQ_BIT 0x40 /* FIQ interrupts disabled */ +#endif + +#define __APPLICATION_MODE (__PROCESSOR_MODE | __IRQ_BIT | __FIQ_BIT) + +#ifndef __VECTOR_TABLE_ROM_ADDR +# define __VECTOR_TABLE_ROM_ADDR 0x00000000 +#endif + +#ifndef __VECTOR_TABLE_RAM_ADDR +# define __VECTOR_TABLE_RAM_ADDR 0x00000000 +#endif + +#if defined(__CPU_ARMV7M__) || defined(__CPU_ARMV6M__) +# ifndef __NR_OF_VECTORS +# define __NR_OF_VECTORS 16 +# endif +# define __VECTOR_TABLE_SIZE (__NR_OF_VECTORS * 4) +#else +# ifdef __PIC_VECTORS +# define __VECTOR_TABLE_SIZE 64 +# else +# ifdef __FIQ_HANDLER_INLINE +# define __VECTOR_TABLE_SIZE 28 +# define __NR_OF_VECTORS 7 +# else +# define __VECTOR_TABLE_SIZE 32 +# define __NR_OF_VECTORS 8 +# endif +# endif +#endif + +#ifndef __VECTOR_TABLE_RAM_SPACE +# undef __VECTOR_TABLE_RAM_COPY +#endif + +#ifndef __XVWBUF +# define __XVWBUF 0 /* buffer used by CrossView Pro */ +#endif + +#define BOUNDS_GROUP_NAME grp_bounds +#define BOUNDS_GROUP_SELECT "bounds" + +architecture ARM +{ + endianness + { + little; + big; + } + + space linear + { + id = 1; + mau = 8; + map (size = 4G, dest = bus:local_bus); + + copytable + ( + align = 4, + copy_unit = 1, + dest = linear + ); + + start_address + ( + // It is not strictly necessary to define a run_addr for _START + // because hardware starts execution at address 0x0 which should + // be the vector table with a jump to the relocatable _START, but + // an absolute address can prevent the branch to be out-of-range. + // Or _START may be the entry point at reset and the reset handler + // copies the vector table to address 0x0 after some ROM/RAM memory + // re-mapping. In that case _START should be at a fixed address + // in ROM, specifically the alias of address 0x0 before memory + // re-mapping. +#ifdef __START + run_addr = __START, +#endif + symbol = "_START" + ); + + stack "stack" + ( +#ifdef __STACK_FIXED + fixed, +#endif + align = 4, + min_size = __STACK, + grows = high_to_low + ); + + heap "heap" + ( +#ifdef __HEAP_FIXED + fixed, +#endif + align = 4, + min_size=__HEAP + ); + +#if !defined(__CPU_ARMV7M__) && !defined(__CPU_ARMV6M__) + stack "stack_fiq" + ( + fixed, + align = 4, + min_size = __STACK_FIQ, + grows = high_to_low + ); + stack "stack_irq" + ( + fixed, + align = 4, + min_size = __STACK_IRQ, + grows = high_to_low + ); + stack "stack_svc" + ( + fixed, + align = 4, + min_size = __STACK_SVC, + grows = high_to_low + ); + stack "stack_abt" + ( + fixed, + align = 4, + min_size = __STACK_ABT, + grows = high_to_low + ); + stack "stack_und" + ( + fixed, + align = 4, + min_size = __STACK_UND, + grows = high_to_low + ); +#endif + +#if !defined(__NO_AUTO_VECTORS) && !defined(__NO_DEFAULT_AUTO_VECTORS) +# if defined(__CPU_ARMV7M__) || defined(__CPU_ARMV6M__) + // vector table with handler addresses + vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_ROM_ADDR, + template = ".text.handler_address", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + fill = loop, + no_inline + ) + { + vector ( id = 0, fill = "_START" ); // FIXME: "_lc_ub_stack" does not work + vector ( id = 1, fill = "_START" ); + } +# else +# ifdef __PIC_VECTORS + // vector table with ldrpc instructions from handler table + vector_table "vector_table" ( vector_size = 4, size = 8, run_addr = __VECTOR_TABLE_ROM_ADDR, + template = ".text.vector_ldrpc", + template_symbol = "_lc_vector_ldrpc", + vector_prefix = "_vector_ldrpc_", + fill = loop + ) + { + } + // subsequent vector table (data pool) with addresses of handlers + vector_table "handler_table" ( vector_size = 4, size = 8, run_addr = __VECTOR_TABLE_ROM_ADDR + 32, + template = ".text.handler_address", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + fill = loop[-32], + no_inline + ) + { + vector ( id = 0, fill = "_START" ); + } +# else + // vector table with branch instructions to handlers + vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_ROM_ADDR, + template = ".text.vector_branch", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + fill = loop + ) + { + vector ( id = 0, fill = "_START" ); + } +# endif +# endif +#endif + section_layout + { +#if defined(__NO_AUTO_VECTORS) + "_lc_ub_vector_table" = __VECTOR_TABLE_ROM_ADDR; + "_lc_ue_vector_table" = __VECTOR_TABLE_ROM_ADDR + __VECTOR_TABLE_SIZE; +#endif +#ifdef __VECTOR_TABLE_RAM_SPACE + // reserve space to copy vector table from ROM to RAM + group ( ordered, run_addr = __VECTOR_TABLE_RAM_ADDR ) + reserved "vector_table_space" ( size = __VECTOR_TABLE_SIZE, attributes = rwx ); +#endif +#ifdef __VECTOR_TABLE_RAM_COPY + // provide copy address symbols for copy routine + "_lc_ub_vector_table_copy" := "_lc_ub_vector_table_space"; + "_lc_ue_vector_table_copy" := "_lc_ue_vector_table_space"; +#else + // prevent copy: copy address equals orig address + "_lc_ub_vector_table_copy" := "_lc_ub_vector_table"; + "_lc_ue_vector_table_copy" := "_lc_ue_vector_table"; +#endif + // define buffer for string input via Crossview Pro debugger + group ( align = 4 ) reserved "xvwbuffer" (size=__XVWBUF, attributes=rw ); + + // define labels for bounds begin and end as used in C library +#ifndef BOUNDS_GROUP_REDEFINED + group BOUNDS_GROUP_NAME (ordered, contiguous) + { + select BOUNDS_GROUP_SELECT; + } +#endif + "_lc_ub_bounds" := addressof(group:BOUNDS_GROUP_NAME); + "_lc_ue_bounds" := addressof(group:BOUNDS_GROUP_NAME) + sizeof(group:BOUNDS_GROUP_NAME); + +#ifdef __HEAPADDR + group ( ordered, run_addr=__HEAPADDR ) + { + select "heap"; + } +#endif +#ifdef __STACKADDR + group ( ordered, run_addr=__STACKADDR ) + { + select "stack"; + } +#endif +#if !defined(__CPU_ARMV7M__) && !defined(__CPU_ARMV6M__) + // symbol to set mode bits and interrupt disable bits + // in cstart module before calling the application (main) + "_APPLICATION_MODE_" = __APPLICATION_MODE; +#endif + } + } + + bus local_bus + { + mau = 8; + width = 32; + } +} diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL_XL/Settings/link.lnk b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL_XL/Settings/link.lnk new file mode 100644 index 0000000000000000000000000000000000000000..6451b8ca2fee26a9918bc39a9c5d44d1439a1efe --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL_XL/Settings/link.lnk @@ -0,0 +1,4 @@ +-d"./settings/STM32F10x_XL.lsl" +--optimize=0 +--map-file-format=2 +$(LinkObjects) diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL_XL/Settings/linkextsram.lnk b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL_XL/Settings/linkextsram.lnk new file mode 100644 index 0000000000000000000000000000000000000000..b42fed00edd00d324ece21b6a8f71b703df22123 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL_XL/Settings/linkextsram.lnk @@ -0,0 +1,4 @@ +-d"./settings/STM32F10x_xl_extsram.lsl" +--optimize=0 +--map-file-format=2 +$(LinkObjects) diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL_XL/Settings/reset_appl.scr b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL_XL/Settings/reset_appl.scr new file mode 100644 index 0000000000000000000000000000000000000000..d90eb1562155bf052756c7c9ba7e12d76d11f1bd --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL_XL/Settings/reset_appl.scr @@ -0,0 +1,8 @@ +// Hitex/Lue/11.02.2008 +// Executable Script file for HiTOP Debugger +// Reset application + +// Reset +RESET TARGET + + diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL_XL/Settings/reset_go_main.scr b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL_XL/Settings/reset_go_main.scr new file mode 100644 index 0000000000000000000000000000000000000000..3e9c066994344d9767229e16c69308cc5bdc8ee2 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL_XL/Settings/reset_go_main.scr @@ -0,0 +1,12 @@ +// Hitex/Lue/11.02.2008 +// Executable Script file for HiTOP Debugger +// Reset application & Go main + +// Reset +RESET TARGET + + +// execute program till main +Go UNTIL main +wait + diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL_XL/cstart_thumb2.asm b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL_XL/cstart_thumb2.asm new file mode 100644 index 0000000000000000000000000000000000000000..12dc0d02dd7f73c60656a8293afd8da477958793 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL_XL/cstart_thumb2.asm @@ -0,0 +1,148 @@ + + +;; NOTE: To allow the use of this file for both ARMv6M and ARMv7M, +;; we will only use 16-bit Thumb intructions. + + .extern _lc_ub_stack ; usr/sys mode stack pointer + .extern _lc_ue_stack ; symbol required by debugger + .extern _lc_ub_table ; ROM to RAM copy table + .extern main + .extern _Exit + .extern exit + .weak exit + .global __get_argcv + .weak __get_argcv + .extern __argcvbuf + .weak __argcvbuf + .extern __init_hardware + .extern __init_vector_table + .extern SystemInit + + .if @defined('__PROF_ENABLE__') + .extern __prof_init + .endif + .if @defined('__POSIX__') + .extern posix_main + .extern _posix_boot_stack_top + .endif + + .global _START + + .section .text.cstart + + .thumb +_START: + ;; anticipate possible ROM/RAM remapping + ;; by loading the 'real' program address + ldr r1,=_Next + bx r1 +_Next: + ;; initialize the stack pointer + ldr r1,=_lc_ub_stack ; TODO: make this part of the vector table + mov sp,r1 + + ;; call a user function which initializes hardware + ;; such as ROM/RAM re-mapping or MMU configuration + bl __init_hardware + + ;ldr r0, =SystemInit + ;bx r0 + bl SystemInit + + ;; copy initialized sections from ROM to RAM + ;; and clear uninitialized data sections in RAM + + ldr r3,=_lc_ub_table + movs r0,#0 +cploop: + ldr r4,[r3,#0] ; load type + ldr r5,[r3,#4] ; dst address + ldr r6,[r3,#8] ; src address + ldr r7,[r3,#12] ; size + + cmp r4,#1 + beq copy + cmp r4,#2 + beq clear + b done + +copy: + subs r7,r7,#1 + ldrb r1,[r6,r7] + strb r1,[r5,r7] + bne copy + + adds r3,r3,#16 + b cploop + +clear: + subs r7,r7,#1 + strb r0,[r5,r7] + bne clear + + adds r3,r3,#16 + b cploop + +done: + ;; initialize or copy the vector table + bl __init_vector_table + + .if @defined('__POSIX__') + + ;; posix stack buffer for system upbringing + ldr r0,=_posix_boot_stack_top + ldr r0, [r0] + mov sp,r0 + + .else + + ;; load r10 with end of USR/SYS stack, which is + ;; needed in case stack overflow checking is on + ;; NOTE: use 16-bit instructions only, for ARMv6M + ldr r0,=_lc_ue_stack + mov r10,r0 + + .endif + + .if @defined('__PROF_ENABLE__') + bl __prof_init + .endif + + .if @defined('__POSIX__') + ;; call posix_main with no arguments + bl posix_main + .else + ;; retrieve argc and argv (default argv[0]==NULL & argc==0) + bl __get_argcv + ldr r1,=__argcvbuf + ;; call main + bl main + .endif + + ;; call exit using the return value from main() + ;; Note. Calling exit will also run all functions + ;; that were supplied through atexit(). + bl exit + +__get_argcv: ; weak definition + movs r0,#0 + bx lr + + .ltorg + .endsec + + .calls '_START','__init_hardware' + .calls '_START','__init_vector_table' + .if @defined('__PROF_ENABLE__') + .calls '_START','__prof_init' + .endif + .if @defined('__POSIX__') + .calls '_START','posix_main' + .else + .calls '_START','__get_argcv' + .calls '_START','main' + .endif + .calls '_START','exit' + .calls '_START','',0 + + .end diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL_XL/readme.txt b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL_XL/readme.txt new file mode 100644 index 0000000000000000000000000000000000000000..d6e63242e2f164935f75ecbc347d14d283763e3c --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL_XL/readme.txt @@ -0,0 +1,84 @@ +/** + @page HiTOP5_STM3210E_XL HiTOP Project Template for STM32F10x XL-density devices + + @verbatim + ******************** (C) COPYRIGHT 2011 STMicroelectronics ******************* + * @file readme.txt + * @author MCD Application Team + * @version V3.5.0 + * @date 08-April-2011 + * @brief This sub directory contains all the user modifiable files needed + * to create a new project linked with the STM32F10x Standard Peripheral + * Library and working with HiTOP software toolchain (version 5.40 and later). + ****************************************************************************** + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. + * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, + * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE + * CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING + * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + ****************************************************************************** + @endverbatim + +@par Directory contents + + - Project.htp: A pre-configured project file with the provided library + structure that produces an executable image with HiTOP + + - cstart_thumb2.asm: This file initializes the stack pointer and copy initialized + sections from ROM to RAM. + + - Objects: This mandatory directory contains the executable images. + + - Settings: This directory contains the linker and script files. + - arm_arch.lsl: This file is used to place program code (readonly) + in internal FLASH and data (readwrite, Stack and Heap) + in internal SRAM. + + - link.lnk: This file is the HiTOP linker it invokes the STM32F10x_XL.lsl. + + - reset_appl.scr: This file is a HiTOP script it performs a target reset. + + - reset_go_main.scr: This file is a HiTOP script and it sets the Program + Counter at the "main" instruction. + + - StartupScript.scr: This file is a HiTOP script and it performs a target + reset before loading The executable image. + + - STM32F10x_Xl.lsl: This file is used to place program code (readonly) + in internal FLASH and data (readwrite, Stack and Heap) + in internal SRAM. + It contains also the vector table of the STM32 + XL-density line devices. + You can customize this file to your need. + + +@par How to use it ? + +- Open the HiTOP toolchain. +- Browse to open the project.htp +- A "Download application" window is displayed, click "cancel". +- Rebuild all files: Project->Rebuild all +- Load project image : Click "ok" in the "Download application" window. +- Run the "RESET_GO_MAIN" script to set the PC at the "main" +- Run program: Debug->Go(F5). + +@note + - Low-density Value line devices are STM32F100xx microcontrollers where the + Flash memory density ranges between 16 and 32 Kbytes. + - Low-density devices are STM32F101xx, STM32F102xx and STM32F103xx + microcontrollers where the Flash memory density ranges between 16 and 32 Kbytes. + - Medium-density Value line devices are STM32F100xx microcontrollers where + the Flash memory density ranges between 64 and 128 Kbytes. + - Medium-density devices are STM32F101xx, STM32F102xx and STM32F103xx + microcontrollers where the Flash memory density ranges between 64 and 128 Kbytes. + - High-density Value line devices are STM32F100xx microcontrollers where the + Flash memory density ranges between 256 and 512 Kbytes. + - High-density devices are STM32F101xx and STM32F103xx microcontrollers where + the Flash memory density ranges between 256 and 512 Kbytes. + - XL-density devices are STM32F101xx and STM32F103xx microcontrollers where + the Flash memory density ranges between 512 and 1024 Kbytes. + - Connectivity line devices are STM32F105xx and STM32F107xx microcontrollers. + + *

© COPYRIGHT 2011 STMicroelectronics

+ */ diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL_XL/setstack.asm b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL_XL/setstack.asm new file mode 100644 index 0000000000000000000000000000000000000000..2c11b4c520049a8360c9bc76251a01e76e25a81b --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/HiTOP/STM3210E-EVAL_XL/setstack.asm @@ -0,0 +1,4 @@ + .section .bss.stack + .global _stacklabel +_stacklabel: + .endsec \ No newline at end of file diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/MDK-ARM/Clean.bat b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/MDK-ARM/Clean.bat new file mode 100644 index 0000000000000000000000000000000000000000..3487aa46d7199b9632d43caac658a3522f4ec4e6 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/MDK-ARM/Clean.bat @@ -0,0 +1,47 @@ +rd /S /Q Project\MDKARM(uV5)\Listings + +del *.crf /Q /S +del *.o /Q /S +del *.d /Q /S +::del *.axf /Q /S +del *.htm /Q /S +del *.sct /Q /S +del *.dep /Q /S + +del *.lst /Q /S +del *.map /Q /S + +del *.uvguix.* /Q /S +del JLinkLog.txt /Q /S + +del *.iex /s +del *.tra /s +del *.bak /s +del *.ddk /s +del *.edk /s +del *.lnp /s +del *.mpf /s +del *.mpj /s +del *.obj /s +del *.omf /s +::del *.opt /s ::不允许删除JLINK的设置 +del *.plg /s +del *.rpt /s +del *.tmp /s +del *.__i /s +del *.pbi /s +del *.cout /s +del *.pbd /s +del *.browse /s +rd /q /s MDK-ARM\DebugConfig +rd /q /s MDK-ARM\RTE + +del /Q Listings\*.* +del /Q Objects\*.* +del /Q *.bak +del /Q *.plg +del /Q *.dep +del /Q *.Administrator +::rd /q /s EWARM\settings + +exit \ No newline at end of file diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/MDK-ARM/DebugConfig/STM32100E-EVAL_STM32F100ZE_1.0.0.dbgconf b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/MDK-ARM/DebugConfig/STM32100E-EVAL_STM32F100ZE_1.0.0.dbgconf new file mode 100644 index 0000000000000000000000000000000000000000..ce653f15883f1791230cf5b64d23f3007ae78375 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/MDK-ARM/DebugConfig/STM32100E-EVAL_STM32F100ZE_1.0.0.dbgconf @@ -0,0 +1,33 @@ +// File: STM32F100.dbgconf +// Version: 1.0.0 +// Note: refer to STM32F100xx Reference manual (RM0041) +// STM32F100xx datasheets + +// <<< Use Configuration Wizard in Context Menu >>> + +// Debug MCU configuration register (DBGMCU_CR) +// Reserved bits must be kept at reset value +// DBG_TIM14_STOP TIM14 counter stopped when core is halted +// DBG_TIM13_STOP TIM13 counter stopped when core is halted +// DBG_TIM12_STOP TIM12 counter stopped when core is halted +// DBG_TIM17_STOP TIM17 counter stopped when core is halted +// DBG_TIM16_STOP TIM16 counter stopped when core is halted +// DBG_TIM15_STOP TIM15 counter stopped when core is halted +// DBG_TIM7_STOP TIM7 counter stopped when core is halted +// DBG_TIM6_STOP TIM6 counter stopped when core is halted +// DBG_TIM5_STOP TIM5 counter stopped when core is halted +// DBG_I2C2_SMBUS_TIMEOUT SMBUS timeout mode stopped when core is halted +// DBG_I2C1_SMBUS_TIMEOUT SMBUS timeout mode stopped when core is halted +// DBG_TIM4_STOP TIM4 counter stopped when core is halted +// DBG_TIM3_STOP TIM3 counter stopped when core is halted +// DBG_TIM2_STOP TIM2 counter stopped when core is halted +// DBG_TIM1_STOP TIM1 counter stopped when core is halted +// DBG_WWDG_STOP Debug window watchdog stopped when core is halted +// DBG_IWDG_STOP Debug independent watchdog stopped when core is halted +// DBG_STANDBY Debug standby mode +// DBG_STOP Debug stop mode +// DBG_SLEEP Debug sleep mode +// +DbgMCU_CR = 0x00000007; + +// <<< end of configuration section >>> diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/MDK-ARM/DebugConfig/STM3210B-EVAL_STM32F103VB_1.0.0.dbgconf b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/MDK-ARM/DebugConfig/STM3210B-EVAL_STM32F103VB_1.0.0.dbgconf new file mode 100644 index 0000000000000000000000000000000000000000..66e10b605e467b15b36ad09bf95b8cdb496b13b5 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/MDK-ARM/DebugConfig/STM3210B-EVAL_STM32F103VB_1.0.0.dbgconf @@ -0,0 +1,36 @@ +// File: STM32F101_102_103_105_107.dbgconf +// Version: 1.0.0 +// Note: refer to STM32F101xx STM32F102xx STM32F103xx STM32F105xx STM32F107xx Reference manual (RM0008) +// STM32F101xx STM32F102xx STM32F103xx STM32F105xx STM32F107xx datasheets + +// <<< Use Configuration Wizard in Context Menu >>> + +// Debug MCU configuration register (DBGMCU_CR) +// Reserved bits must be kept at reset value +// DBG_TIM11_STOP TIM11 counter stopped when core is halted +// DBG_TIM10_STOP TIM10 counter stopped when core is halted +// DBG_TIM9_STOP TIM9 counter stopped when core is halted +// DBG_TIM14_STOP TIM14 counter stopped when core is halted +// DBG_TIM13_STOP TIM13 counter stopped when core is halted +// DBG_TIM12_STOP TIM12 counter stopped when core is halted +// DBG_CAN2_STOP Debug CAN2 stopped when core is halted +// DBG_TIM7_STOP TIM7 counter stopped when core is halted +// DBG_TIM6_STOP TIM6 counter stopped when core is halted +// DBG_TIM5_STOP TIM5 counter stopped when core is halted +// DBG_TIM8_STOP TIM8 counter stopped when core is halted +// DBG_I2C2_SMBUS_TIMEOUT SMBUS timeout mode stopped when core is halted +// DBG_I2C1_SMBUS_TIMEOUT SMBUS timeout mode stopped when core is halted +// DBG_CAN1_STOP Debug CAN1 stopped when Core is halted +// DBG_TIM4_STOP TIM4 counter stopped when core is halted +// DBG_TIM3_STOP TIM3 counter stopped when core is halted +// DBG_TIM2_STOP TIM2 counter stopped when core is halted +// DBG_TIM1_STOP TIM1 counter stopped when core is halted +// DBG_WWDG_STOP Debug window watchdog stopped when core is halted +// DBG_IWDG_STOP Debug independent watchdog stopped when core is halted +// DBG_STANDBY Debug standby mode +// DBG_STOP Debug stop mode +// DBG_SLEEP Debug sleep mode +// +DbgMCU_CR = 0x00000007; + +// <<< end of configuration section >>> diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/MDK-ARM/DebugConfig/STM3210C-EVAL_STM32F105VC_1.0.0.dbgconf b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/MDK-ARM/DebugConfig/STM3210C-EVAL_STM32F105VC_1.0.0.dbgconf new file mode 100644 index 0000000000000000000000000000000000000000..66e10b605e467b15b36ad09bf95b8cdb496b13b5 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/MDK-ARM/DebugConfig/STM3210C-EVAL_STM32F105VC_1.0.0.dbgconf @@ -0,0 +1,36 @@ +// File: STM32F101_102_103_105_107.dbgconf +// Version: 1.0.0 +// Note: refer to STM32F101xx STM32F102xx STM32F103xx STM32F105xx STM32F107xx Reference manual (RM0008) +// STM32F101xx STM32F102xx STM32F103xx STM32F105xx STM32F107xx datasheets + +// <<< Use Configuration Wizard in Context Menu >>> + +// Debug MCU configuration register (DBGMCU_CR) +// Reserved bits must be kept at reset value +// DBG_TIM11_STOP TIM11 counter stopped when core is halted +// DBG_TIM10_STOP TIM10 counter stopped when core is halted +// DBG_TIM9_STOP TIM9 counter stopped when core is halted +// DBG_TIM14_STOP TIM14 counter stopped when core is halted +// DBG_TIM13_STOP TIM13 counter stopped when core is halted +// DBG_TIM12_STOP TIM12 counter stopped when core is halted +// DBG_CAN2_STOP Debug CAN2 stopped when core is halted +// DBG_TIM7_STOP TIM7 counter stopped when core is halted +// DBG_TIM6_STOP TIM6 counter stopped when core is halted +// DBG_TIM5_STOP TIM5 counter stopped when core is halted +// DBG_TIM8_STOP TIM8 counter stopped when core is halted +// DBG_I2C2_SMBUS_TIMEOUT SMBUS timeout mode stopped when core is halted +// DBG_I2C1_SMBUS_TIMEOUT SMBUS timeout mode stopped when core is halted +// DBG_CAN1_STOP Debug CAN1 stopped when Core is halted +// DBG_TIM4_STOP TIM4 counter stopped when core is halted +// DBG_TIM3_STOP TIM3 counter stopped when core is halted +// DBG_TIM2_STOP TIM2 counter stopped when core is halted +// DBG_TIM1_STOP TIM1 counter stopped when core is halted +// DBG_WWDG_STOP Debug window watchdog stopped when core is halted +// DBG_IWDG_STOP Debug independent watchdog stopped when core is halted +// DBG_STANDBY Debug standby mode +// DBG_STOP Debug stop mode +// DBG_SLEEP Debug sleep mode +// +DbgMCU_CR = 0x00000007; + +// <<< end of configuration section >>> diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/MDK-ARM/DebugConfig/STM3210C-EVAL_STM32F107VC_1.0.0.dbgconf b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/MDK-ARM/DebugConfig/STM3210C-EVAL_STM32F107VC_1.0.0.dbgconf new file mode 100644 index 0000000000000000000000000000000000000000..66e10b605e467b15b36ad09bf95b8cdb496b13b5 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/MDK-ARM/DebugConfig/STM3210C-EVAL_STM32F107VC_1.0.0.dbgconf @@ -0,0 +1,36 @@ +// File: STM32F101_102_103_105_107.dbgconf +// Version: 1.0.0 +// Note: refer to STM32F101xx STM32F102xx STM32F103xx STM32F105xx STM32F107xx Reference manual (RM0008) +// STM32F101xx STM32F102xx STM32F103xx STM32F105xx STM32F107xx datasheets + +// <<< Use Configuration Wizard in Context Menu >>> + +// Debug MCU configuration register (DBGMCU_CR) +// Reserved bits must be kept at reset value +// DBG_TIM11_STOP TIM11 counter stopped when core is halted +// DBG_TIM10_STOP TIM10 counter stopped when core is halted +// DBG_TIM9_STOP TIM9 counter stopped when core is halted +// DBG_TIM14_STOP TIM14 counter stopped when core is halted +// DBG_TIM13_STOP TIM13 counter stopped when core is halted +// DBG_TIM12_STOP TIM12 counter stopped when core is halted +// DBG_CAN2_STOP Debug CAN2 stopped when core is halted +// DBG_TIM7_STOP TIM7 counter stopped when core is halted +// DBG_TIM6_STOP TIM6 counter stopped when core is halted +// DBG_TIM5_STOP TIM5 counter stopped when core is halted +// DBG_TIM8_STOP TIM8 counter stopped when core is halted +// DBG_I2C2_SMBUS_TIMEOUT SMBUS timeout mode stopped when core is halted +// DBG_I2C1_SMBUS_TIMEOUT SMBUS timeout mode stopped when core is halted +// DBG_CAN1_STOP Debug CAN1 stopped when Core is halted +// DBG_TIM4_STOP TIM4 counter stopped when core is halted +// DBG_TIM3_STOP TIM3 counter stopped when core is halted +// DBG_TIM2_STOP TIM2 counter stopped when core is halted +// DBG_TIM1_STOP TIM1 counter stopped when core is halted +// DBG_WWDG_STOP Debug window watchdog stopped when core is halted +// DBG_IWDG_STOP Debug independent watchdog stopped when core is halted +// DBG_STANDBY Debug standby mode +// DBG_STOP Debug stop mode +// DBG_SLEEP Debug sleep mode +// +DbgMCU_CR = 0x00000007; + +// <<< end of configuration section >>> diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/MDK-ARM/EventRecorderStub.scvd b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/MDK-ARM/EventRecorderStub.scvd new file mode 100644 index 0000000000000000000000000000000000000000..2956b29683898915efa436cc948384a2c431dc31 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/MDK-ARM/EventRecorderStub.scvd @@ -0,0 +1,9 @@ + + + + + + + + + diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/MDK-ARM/JLinkSettings.ini b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/MDK-ARM/JLinkSettings.ini new file mode 100644 index 0000000000000000000000000000000000000000..39b6d054aa31ff6cb3097d398593ba0320c250f6 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/MDK-ARM/JLinkSettings.ini @@ -0,0 +1,39 @@ +[BREAKPOINTS] +ForceImpTypeAny = 0 +ShowInfoWin = 1 +EnableFlashBP = 2 +BPDuringExecution = 0 +[CFI] +CFISize = 0x00 +CFIAddr = 0x00 +[CPU] +MonModeVTableAddr = 0xFFFFFFFF +MonModeDebug = 0 +MaxNumAPs = 0 +LowPowerHandlingMode = 0 +OverrideMemMap = 0 +AllowSimulation = 1 +ScriptFile="" +[FLASH] +CacheExcludeSize = 0x00 +CacheExcludeAddr = 0x00 +MinNumBytesFlashDL = 0 +SkipProgOnCRCMatch = 1 +VerifyDownload = 1 +AllowCaching = 1 +EnableFlashDL = 2 +Override = 0 +Device="ARM7" +[GENERAL] +WorkRAMSize = 0x00 +WorkRAMAddr = 0x00 +RAMUsageLimit = 0x00 +[SWO] +SWOLogFile="" +[MEM] +RdOverrideOrMask = 0x00 +RdOverrideAndMask = 0xFFFFFFFF +RdOverrideAddr = 0xFFFFFFFF +WrOverrideOrMask = 0x00 +WrOverrideAndMask = 0xFFFFFFFF +WrOverrideAddr = 0xFFFFFFFF diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Template/MDK-ARM/Project.uvguix.Tingl b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/MDK-ARM/Project.uvgui.Tingl similarity index 86% rename from STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Template/MDK-ARM/Project.uvguix.Tingl rename to STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/MDK-ARM/Project.uvgui.Tingl index e6dcccc56bfd6b3f7e3b2e6192a33b365186cf7e..a9c5dcdf959949360f50ce9a2a06ce09fb13f339 100644 --- a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Template/MDK-ARM/Project.uvguix.Tingl +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/MDK-ARM/Project.uvgui.Tingl @@ -1,5 +1,5 @@ - + -6.1 @@ -11,7 +11,7 @@ 38003 Registers - 184 184 + 115 67 346 @@ -83,25 +83,25 @@ 2 3 - -32000 - -32000 + -1 + -1 -1 -1 - 195 - 884 - 2428 - 952 + -6 + -6 + 1541 + 878 0 - 627 - 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+ 293 + 01000000040000000100000001000000010000000100000000000000020000000000000001000000010000000000000028000000280000000100000001000000000000000100000061433A5C55736572735C54696E676C5C4465736B746F705C53544D3332463130785F5374645065726970685F4C69625F56332E352E305C50726F6A6563745C53544D3332463130785F5374645065726970685F54656D706C6174655C6D61696E2E6300000000066D61696E2E6300000000C5D4F200FFFFFFFF0100000010000000C5D4F200FFDC7800BECEA100F0A0A100BCA8E1009CC1B600F7B88600D9ADC200A5C2D700B3A6BE00EAD6A300F6FA7D00B5E99D005FC3CF00C1838300CACAD5000100000000000000020000007E0100006600000000060000B3020000 @@ -124,7 +124,7 @@ 16 - C40000006600000070040000D4000000 + 560000006D0000008E020000DB000000 @@ -140,7 +140,7 @@ 0 16 - 0300000066000000770100005A020000 + 03000000660000007701000083020000 16 @@ -160,7 +160,7 @@ 0 16 - 0300000066000000770100005A020000 + 03000000660000007701000083020000 16 @@ -180,7 +180,7 @@ 0 16 - 03000000AC0100006D040000FE010000 + 00000000A90100007004000017020000 16 @@ -200,7 +200,7 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898 @@ -1852,30 +1852,12 @@ 0 100 - 2 + 0 ..\main.c - 12 - 86 - 102 - 1 - - 0 - - - ..\..\..\Utilities\STM32_EVAL\stm3210c_eval/stm3210c_eval.c - 42 - 73 - 82 - 1 - - 0 - - - ..\..\..\Utilities\STM32_EVAL\stm3210c_eval/stm3210c_eval.h - 0 - 58 - 65 + 16 + 85 + 87 1 0 diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Template/MDK-ARM/Project.uvoptx b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/MDK-ARM/Project.uvopt similarity index 89% rename from STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Template/MDK-ARM/Project.uvoptx rename to STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/MDK-ARM/Project.uvopt index 4b3139d92ba30032000fdab8cca6e3ba6318f172..31a7967ff5890b8161bb4b80e0a3e8a37a241d56 100644 --- a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Template/MDK-ARM/Project.uvoptx +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/MDK-ARM/Project.uvopt @@ -1,5 +1,5 @@ - + 1.0 @@ -26,7 +26,7 @@ 0x4 ARM-ADS - 12000000 + 8000000 1 1 @@ -75,9 +75,9 @@ 1 0 - 0 + 1 - 18 + 0 0 1 @@ -117,11 +117,6 @@ BIN\UL2CM3.DLL - - 0 - UL2CM3 - -O14 -S0 -C0 -N00("ARM Cortex-M3") -D00(1BA00477) -L00(4) -FO7 -FN1 -FC1000 -FD20000000 -FF0STM32F10x_512 -FL080000 -FS08000000 -FP0($$Device:STM32F100ZE$Flash\STM32F10x_512.FLM) - 0 DLGTARM @@ -137,25 +132,13 @@ DLGUARM (105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0) - - - + 0 - 0 - 139 - 1 -
0
- 0 - 0 - 0 - 0 - 0 - 0 - ..\main.c - - - - + UL2CM3 + -O14 -S0 -C0 -N00("ARM Cortex-M3") -D00(1BA00477) -L00(4) -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F10x_512 -FS08000000 -FL080000) + + + 0 @@ -198,12 +181,6 @@ - - 1 - 0 - 2 - 10000000 - @@ -212,7 +189,7 @@ 0x4 ARM-ADS - 12000000 + 8000000 1 1 @@ -263,7 +240,14 @@ 0 0 - 18 + 255 + + + 0 + Reference Manual + DATASHTS\ST\STM32F10xxx.PDF + + 0 1 @@ -303,11 +287,6 @@ BIN\UL2CM3.DLL - - 0 - UL2CM3 - -U-O14 -O2062 -S0 -C0 -N00("ARM Cortex-M3") -D00(1BA00477) -L00(4) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FN1 -FC1000 -FD20000000 -FF0STM32F10x_1024 -FL0100000 -FS08000000 -FP0($$Device:STM32F103ZG$Flash\STM32F10x_1024.FLM) - 0 DLGTARM @@ -323,25 +302,13 @@ DLGUARM (105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0) - - - + 0 - 0 - 139 - 1 -
0
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0000000000000000000000000000000000000000..fc679f19b4d46618639e16d6f1dd396da28fe333 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/MDK-ARM/RTE/_STM32100E-EVAL/RTE_Components.h @@ -0,0 +1,20 @@ + +/* + * Auto generated Run-Time-Environment Component Configuration File + * *** Do not modify ! *** + * + * Project: 'Project' + * Target: 'STM32100E-EVAL' + */ + +#ifndef RTE_COMPONENTS_H +#define RTE_COMPONENTS_H + + +/* + * Define the Device Header File: + */ +#define CMSIS_device_header "stm32f10x.h" + + +#endif /* RTE_COMPONENTS_H */ diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/MDK-ARM/RTE/_STM3210B-EVAL/RTE_Components.h b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/MDK-ARM/RTE/_STM3210B-EVAL/RTE_Components.h new file mode 100644 index 0000000000000000000000000000000000000000..592195d8607f2f751cd445d289c2b24026917405 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/MDK-ARM/RTE/_STM3210B-EVAL/RTE_Components.h @@ -0,0 +1,20 @@ + +/* + * Auto generated Run-Time-Environment Component Configuration File + * *** Do not modify ! *** + * + * Project: 'Project' + * Target: 'STM3210B-EVAL' + */ + +#ifndef RTE_COMPONENTS_H +#define RTE_COMPONENTS_H + + +/* + * Define the Device Header File: + */ +#define CMSIS_device_header "stm32f10x.h" + + +#endif /* RTE_COMPONENTS_H */ diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/MDK-ARM/RTE/_STM3210C-EVAL/RTE_Components.h b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/MDK-ARM/RTE/_STM3210C-EVAL/RTE_Components.h new file mode 100644 index 0000000000000000000000000000000000000000..03d025e67fc5edd693926ec050fb199b79a02600 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/MDK-ARM/RTE/_STM3210C-EVAL/RTE_Components.h @@ -0,0 +1,20 @@ + +/* + * Auto generated Run-Time-Environment Component Configuration File + * *** Do not modify ! *** + * + * Project: 'Project' + * Target: 'STM3210C-EVAL' + */ + +#ifndef RTE_COMPONENTS_H +#define RTE_COMPONENTS_H + + +/* + * Define the Device Header File: + */ +#define CMSIS_device_header "stm32f10x.h" + + +#endif /* RTE_COMPONENTS_H */ diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/MDK-ARM/STM32100E-EVAL/STM32100E-EVAL.axf b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/MDK-ARM/STM32100E-EVAL/STM32100E-EVAL.axf new file mode 100644 index 0000000000000000000000000000000000000000..8f316d633e1afb9aac03cc055ae3dfb193895c7c Binary files /dev/null and b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/MDK-ARM/STM32100E-EVAL/STM32100E-EVAL.axf differ diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/MDK-ARM/STM3210C-EVAL/STM3210C-EVAL.axf b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/MDK-ARM/STM3210C-EVAL/STM3210C-EVAL.axf new file mode 100644 index 0000000000000000000000000000000000000000..e169aea937f0aa1c96d39fcc8dbd5babf4072ccd Binary files /dev/null and b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/MDK-ARM/STM3210C-EVAL/STM3210C-EVAL.axf differ diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/MDK-ARM/note.txt b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/MDK-ARM/note.txt new file mode 100644 index 0000000000000000000000000000000000000000..7a54d639479c459453dfec036b0231e989ae4da1 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/MDK-ARM/note.txt @@ -0,0 +1,56 @@ +/** + @page note Note for MDK-ARM + + @verbatim + ******************** (C) COPYRIGHT 2011 STMicroelectronics ******************* + * @file note.txt + * @author MCD Application Team + * @version V3.5.0 + * @date 08-April-2011 + * @brief This file contains the needed steps to use the default startup file + * provided by RealView Microcontroller Development Kit(MDK-ARM). + ****************************************************************************** + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. + * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, + * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE + * CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING + * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + ****************************************************************************** + + +With MDK-ARM toolchain, a simple putchar function executes a SWI and activates +a low level putchar function. +You have to redirect the low level to your own implementation of these functions. + +To guarantee that no functions using the semihosting SWI are included in your +application, either: + +1. Ensure that the MicroLib option is checked since the microlib does not support +semihosting +or +2. Use +- IMPORT __use_no_semihosting_swi from assembly language +- #pragma import(__use_no_semihosting_swi) from C. + + @endverbatim + +@note + - Low-density Value line devices are STM32F100xx microcontrollers where the + Flash memory density ranges between 16 and 32 Kbytes. + - Low-density devices are STM32F101xx, STM32F102xx and STM32F103xx + microcontrollers where the Flash memory density ranges between 16 and 32 Kbytes. + - Medium-density Value line devices are STM32F100xx microcontrollers where + the Flash memory density ranges between 32 and 128 Kbytes. + - Medium-density devices are STM32F101xx, STM32F102xx and STM32F103xx + microcontrollers where the Flash memory density ranges between 32 and 128 Kbytes. + - High-density Value line devices are STM32F100xx microcontrollers where the + Flash memory density ranges between 256 and 512 Kbytes. + - High-density devices are STM32F101xx and STM32F103xx microcontrollers where + the Flash memory density ranges between 256 and 512 Kbytes. + - XL-density devices are STM32F101xx and STM32F103xx microcontrollers where + the Flash memory density ranges between 512 and 1024 Kbytes. + - Connectivity line devices are STM32F105xx and STM32F107xx microcontrollers. + + *

© COPYRIGHT 2011 STMicroelectronics

+ */ \ No newline at end of file diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/MDK-ARM/readme.txt b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/MDK-ARM/readme.txt new file mode 100644 index 0000000000000000000000000000000000000000..88e9af62fdedd897b38c037cb6fde6e96fd27e7f --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/MDK-ARM/readme.txt @@ -0,0 +1,92 @@ +/** + @page mdkarm MDK-ARM Project Template + + @verbatim + ******************** (C) COPYRIGHT 2011 STMicroelectronics ******************* + * @file readme.txt + * @author MCD Application Team + * @version V3.5.0 + * @date 08-April-2011 + * @brief This sub directory contains all the user modifiable files needed + * to create a new project linked with the STM32F10x Standard Peripheral + * Library and working with RealView MDK-ARM toolchain (Version 4.12 and later). + ****************************************************************************** + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. + * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, + * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE + * CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING + * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + ****************************************************************************** + @endverbatim + + @par Directory contents + + - Project.Uv2/.Opt: A pre-configured project file with the provided library structure + that produces an executable image with MDK-ARM + +Enabling "Options for Target 'Output' Browser Information" is useful for quick +source files navigation but may slow the compilation time. + +@note the @subpage note file contains the needed steps to follow when using the +default startup file provided by MDK-ARM when creating new projects. + + @par How to use it ? + + - Open the Project.uvproj project + - In the build toolbar select the project config: + - STM32100B-EVAL: to configure the project for STM32 Medium-density Value + line devices + @note The needed define symbols for this config are already declared in the + preprocessor section: USE_STDPERIPH_DRIVER, STM32F10X_MD_VL, USE_STM32100B_EVAL + + - STM3210C-EVAL: to configure the project for STM32 Connectivity line devices + @note The needed define symbols for this config are already declared in the + preprocessor section: USE_STDPERIPH_DRIVER, STM32F10X_CL, USE_STM3210C_EVAL + + - STM3210B-EVAL: to configure the project for STM32 Medium-density devices + @note The needed define symbols for this config are already declared in the + preprocessor section: USE_STDPERIPH_DRIVER, STM32F10X_MD, USE_STM3210B_EVAL + + - STM3210E-EVAL: to configure the project for STM32 High-density devices + @note The needed define symbols for this config are already declared in the + preprocessor section: USE_STDPERIPH_DRIVER, STM32F10X_HD, USE_STM3210E_EVAL + + - STM3210E-EVAL_XL: to configure the project for STM32 XL-density devices + @note The needed define symbols for this config are already declared in the + preprocessor section: USE_STDPERIPH_DRIVER, STM32F10X_XL, USE_STM3210E_EVAL + + - STM32100E-EVAL: to configure the project for STM32 High-density Value line devices + @note The needed define symbols for this config are already declared in the + preprocessor section: USE_STDPERIPH_DRIVER, STM32F10X_HD_VL, USE_STM32100E_EVAL + + - Rebuild all files: Project->Rebuild all target files + - Load project image: Debug->Start/Stop Debug Session + - Run program: Debug->Run (F5) + +@note + - Low-density Value line devices are STM32F100xx microcontrollers where the + Flash memory density ranges between 16 and 32 Kbytes. + - Low-density devices are STM32F101xx, STM32F102xx and STM32F103xx + microcontrollers where the Flash memory density ranges between 16 and 32 Kbytes. + - Medium-density Value line devices are STM32F100xx microcontrollers where + the Flash memory density ranges between 64 and 128 Kbytes. + - Medium-density devices are STM32F101xx, STM32F102xx and STM32F103xx + microcontrollers where the Flash memory density ranges between 64 and 128 Kbytes. + - High-density Value line devices are STM32F100xx microcontrollers where + the Flash memory density ranges between 256 and 512 Kbytes. + - High-density devices are STM32F101xx and STM32F103xx microcontrollers where + the Flash memory density ranges between 256 and 512 Kbytes. + - XL-density devices are STM32F101xx and STM32F103xx microcontrollers where + the Flash memory density ranges between 512 and 1024 Kbytes. + - Connectivity line devices are STM32F105xx and STM32F107xx microcontrollers. + + *

© COPYRIGHT 2011 STMicroelectronics

+ */ + + + @updtae 2020/10/26 + Define: USE_STDPERIPH_DRIVER, STM32F10X_CL, USE_STM3210C_EVAL + - 绉绘鍒癛S1000A-V1.1 纭欢骞冲彴 + - 淇敼浜嗘墦鍗颁覆鍙ｄ负USART1;淇敼LED鎺ュ彛 + - 涓嶄娇鑳絀O鍙ｄ氦鎹 GPIO_PinRemapConfig(GPIO_Remap_USART2, ENABLE); \ No newline at end of file diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/RIDE/Project.rapp b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/RIDE/Project.rapp new file mode 100644 index 0000000000000000000000000000000000000000..20cb2fa3bfb3f03da5ca428f4246dd681e522d66 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/RIDE/Project.rapp @@ -0,0 +1,1928 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
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+ + + + + + \ No newline at end of file diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/RIDE/Project.rprj b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/RIDE/Project.rprj new file mode 100644 index 0000000000000000000000000000000000000000..321679a8f0bc9eb85b8defd8904833eda689a5a2 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/RIDE/Project.rprj @@ -0,0 +1,4 @@ + + + + \ No newline at end of file diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/RIDE/readme.txt b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/RIDE/readme.txt new file mode 100644 index 0000000000000000000000000000000000000000..ddbe3c54940fe3612166e9eed3920571d111c30d --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/RIDE/readme.txt @@ -0,0 +1,67 @@ +/** + @page ride7 RIDE Project Template + + @verbatim + ******************** (C) COPYRIGHT 2011 STMicroelectronics ******************* + * @file readme.txt + * @author MCD Application Team + * @version V3.5.0 + * @date 08-April-2011 + * @brief This sub directory contains all the user modifiable files + * needed to create a new project linked with the STM32F10x + * Standard Peripheral Library and working with RIDE7 software + * toolchain (RIDE7 IDE:7.30.10, RKitARM for RIDE7:1.30.10) + ****************************************************************************** + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. + * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, + * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE + * CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING + * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + ****************************************************************************** + @endverbatim + + @par Directory contents + + - project .rprj/.rapp: A pre-configured project file with the provided library + structure that produces an executable image with RIDE7. + + - stm32f10x_flash_extsram.ld: This file is the RAISONANCE linker script used to + place program code (readonly) in internal FLASH + and data (readwrite, Stack and Heap)in external + SRAM. + You can customize this file to your need. + + @par How to use it ? + + - Open the Project.rprj project. + - In the configuration toolbar(Project->properties) select the project config: + - STM32100E-EVAL: to configure the project for STM32 Value Line High-density devices + - STM32100B-EVAL: to configure the project for STM32 Medium-density Value line devices + - STM3210C-EVAL: to configure the project for STM32 Connectivity line devices + - STM3210B-EVAL: to configure the project for STM32 Medium-density devices + - STM3210E-EVAL: to configure the project for STM32 High-density devices + - STM3210E-EVAL_XL: to configure the project for STM32 XL-density devices + - Rebuild all files: Project->build project + - Load project image: Debug->start(ctrl+D) + - Run program: Debug->Run(ctrl+F9) + +@note + - Low-density Value line devices are STM32F100xx microcontrollers where the + Flash memory density ranges between 16 and 32 Kbytes. + - Low-density devices are STM32F101xx, STM32F102xx and STM32F103xx + microcontrollers where the Flash memory density ranges between 16 and 32 Kbytes. + - Medium-density Value line devices are STM32F100xx microcontrollers where + the Flash memory density ranges between 32 and 128 Kbytes. + - Medium-density devices are STM32F101xx, STM32F102xx and STM32F103xx + microcontrollers where the Flash memory density ranges between 32 and 128 Kbytes. + - High-density Value line devices are STM32F100xx microcontrollers where the + Flash memory density ranges between 256 and 512 Kbytes. + - High-density devices are STM32F101xx and STM32F103xx microcontrollers where + the Flash memory density ranges between 256 and 512 Kbytes. + - XL-density devices are STM32F101xx and STM32F103xx microcontrollers where + the Flash memory density ranges between 512 and 1024 Kbytes. + - Connectivity line devices are STM32F105xx and STM32F107xx microcontrollers. + + *

© COPYRIGHT 2011 STMicroelectronics

+ */ diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/RIDE/stm32f10x_flash_extsram.ld b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/RIDE/stm32f10x_flash_extsram.ld new file mode 100644 index 0000000000000000000000000000000000000000..1a60104b9e7758ef7f210fb9a9461a01430c89f5 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/RIDE/stm32f10x_flash_extsram.ld @@ -0,0 +1,242 @@ +/* +Default linker script for STM32F10x_1024K_1024K +Copyright RAISONANCE S.A.S. 2008 +*/ + +/* include the common STM32F10x sub-script */ + +/* Common part of the linker scripts for STM32 devices*/ + + +/* default stack sizes. + +These are used by the startup in order to allocate stacks for the different modes. +*/ + +__Stack_Size = 1024 ; + +PROVIDE ( _Stack_Size = __Stack_Size ) ; + +__Stack_Init = _estack - __Stack_Size ; + +/*"PROVIDE" allows to easily override these values from an object file or the commmand line.*/ +PROVIDE ( _Stack_Init = __Stack_Init ) ; + +/* +There will be a link error if there is not this amount of RAM free at the end. +*/ +_Minimum_Stack_Size = 0x100 ; + + +/* include the memory spaces definitions sub-script */ +/* +Linker subscript for STM32F10x definitions with 1024K Flash and 1024K External SRAM */ + +/* Memory Spaces Definitions */ + +MEMORY +{ + RAM (xrw) : ORIGIN = 0x68000000, LENGTH = 1024K + FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 1024K + FLASHB1 (rx) : ORIGIN = 0x00000000, LENGTH = 0 + EXTMEMB0 (rx) : ORIGIN = 0x00000000, LENGTH = 0 + EXTMEMB1 (rx) : ORIGIN = 0x00000000, LENGTH = 0 + EXTMEMB2 (rx) : ORIGIN = 0x00000000, LENGTH = 0 + EXTMEMB3 (rx) : ORIGIN = 0x00000000, LENGTH = 0 +} + +/* higher address of the user mode stack */ +_estack = 0x68100000; + + + +/* include the sections management sub-script for FLASH mode */ + +/* Sections Definitions */ + +SECTIONS +{ + /* for Cortex devices, the beginning of the startup code is stored in the .isr_vector section, which goes to FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* for some STRx devices, the beginning of the startup code is stored in the .flashtext section, which goes to FLASH */ + .flashtext : + { + . = ALIGN(4); + *(.flashtext) /* Startup code */ + . = ALIGN(4); + } >FLASH + + + /* the program code is stored in the .text section, which goes to Flash */ + .text : + { + . = ALIGN(4); + + *(.text) /* remaining code */ + *(.text.*) /* remaining code */ + *(.rodata) /* read-only data (constants) */ + *(.rodata*) + *(.glue_7) + *(.glue_7t) + + . = ALIGN(4); + _etext = .; + /* This is used by the startup in order to initialize the .data secion */ + _sidata = _etext; + } >FLASH + + + + /* This is the initialized data section + The program executes knowing that the data is in the RAM + but the loader puts the initial values in the FLASH (inidata). + It is one task of the startup to copy the initial values from FLASH to RAM. */ + .data : AT ( _sidata ) + { + . = ALIGN(4); + /* This is used by the startup in order to initialize the .data secion */ + _sdata = . ; + + *(.data) + *(.data.*) + + . = ALIGN(4); + /* This is used by the startup in order to initialize the .data secion */ + _edata = . ; + } >RAM + + + + /* This is the uninitialized data section */ + .bss : + { + . = ALIGN(4); + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; + + *(.bss) + *(COMMON) + + . = ALIGN(4); + /* This is used by the startup in order to initialize the .bss secion */ + _ebss = . ; + } >RAM + + PROVIDE ( end = _ebss ); + PROVIDE ( _end = _ebss ); + + /* This is the user stack section + This is just to check that there is enough RAM left for the User mode stack + It should generate an error if it's full. + */ + ._usrstack : + { + . = ALIGN(4); + _susrstack = . ; + + . = . + _Minimum_Stack_Size ; + + . = ALIGN(4); + _eusrstack = . ; + } >RAM + + + + /* this is the FLASH Bank1 */ + /* the C or assembly source must explicitly place the code or data there + using the "section" attribute */ + .b1text : + { + *(.b1text) /* remaining code */ + *(.b1rodata) /* read-only data (constants) */ + *(.b1rodata*) + } >FLASHB1 + + /* this is the EXTMEM */ + /* the C or assembly source must explicitly place the code or data there + using the "section" attribute */ + + /* EXTMEM Bank0 */ + .eb0text : + { + *(.eb0text) /* remaining code */ + *(.eb0rodata) /* read-only data (constants) */ + *(.eb0rodata*) + } >EXTMEMB0 + + /* EXTMEM Bank1 */ + .eb1text : + { + *(.eb1text) /* remaining code */ + *(.eb1rodata) /* read-only data (constants) */ + *(.eb1rodata*) + } >EXTMEMB1 + + /* EXTMEM Bank2 */ + .eb2text : + { + *(.eb2text) /* remaining code */ + *(.eb2rodata) /* read-only data (constants) */ + *(.eb2rodata*) + } >EXTMEMB2 + + /* EXTMEM Bank0 */ + .eb3text : + { + *(.eb3text) /* remaining code */ + *(.eb3rodata) /* read-only data (constants) */ + *(.eb3rodata*) + } >EXTMEMB3 + + + + /* after that it's only debugging information. */ + + /* remove the debugging information from the standard libraries */ + DISCARD : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + Symbols in the DWARF debugging sections are relative to the beginning + of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } +} diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/Release_Notes.html b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/Release_Notes.html new file mode 100644 index 0000000000000000000000000000000000000000..f880e3cd0b51f2f135cd90d22682799a94dcedfe --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/Release_Notes.html @@ -0,0 +1,294 @@ + + + + + + + + + + + + + +Release Notes for STM32F10x Standard Peripherals Library Template + + + + +
+


+

+
+ + + + + + +
+ + + + + + + + + +
Back to Release page
+

Release +Notes for STM32F10x Standard Peripherals Library Template +(StdPeriph_Template)

+

Copyright 2011 STMicroelectronics

+

+
+

 

+ + + + + + +
+

Contents

+
    +
  1. STM32F10x Standard Peripherals Library +Template +update History
    2. +
  2. License
    3. +
+ + + +

STM32F10x Standard +Peripherals Library Template update History

+
+

V3.5.0 / 08-April-2011

+

Main +Changes

+ +
    +
  • Template projects updated to save configuration time and easy the examples use.
    +
    • +
  • system_stm32f10x.c +
    • Add more +comments on how to use this driver.
    +
    • +
  • stm32f10x_conf.h +
    • All +peripheral header files inclusion enabled.

    +
    • + +
+ +

3.4.0 +- 10/15/2010

+ +
    +
  1. General
    2. +
+ +
    +
  • Add support for STM32F10x High Density Value Line devices.
    • +
  • system_stm32f10x.c file moved to project template directory.
    • +
  • "STM32F10X_XL" workspace name changed to "STM3210E-EVAL_XL" in all projects.
    +
    • + + +
+
    +
  1. STM32F10x_StdPeriph_Template:  Template projects
    2. +
+ + + +
    +
  • IAR Embedded Workbench for ARM (EWARM) toolchain +
    • Used version: v5.50
      • A software patch is needed to use High-density value line devices with this version, click here to download
      +
    • Add a new workspace for STM32F10x High-density value line devices: STM32F100E-EVAL
      • +
+
    +
+ +
    +
  • Hitex IDE/Debugger (HiTOP) toolchain +
    • +
      +
    • Used version: v5.40
    • Add a new workspace for STM32F10x High-density value line devices: STM32F100E-EVAL
      • +
    +
+
    +
  • RealView Microcontroller Development Kit (MDK-ARM) toolchain +
    • +
    • Used version: v4.12
      • A software patch is needed to use High-density value line devices with this version, click here to download
      +
    • Add a new workspace for STM32F10x High-density value line devices: STM32F100E-EVAL
    +
+ +
    + +
  • Raisonance IDE RIDE7 (RIDE) toolchain +
    • +
      +
    • Used version: RIDE7 IDE:7.30.10, RKitARM for RIDE7:1.30.10 and later
    • Add a new workspace for STM32F10x High-density value line devices: STM32F100E-EVAL
      • +
    +
+
    +
  • Atollic TrueSTUDIO STM32 (TrueSTUDIO) toolchain +
    • + +
      +
    • Used version: v1.4.0
      • A software patch is needed to use High-density value line devices with this version, click here to download
    • Add a new workspace for STM32F10x High-density value line devices: STM32F100E-EVAL
      • +
    + + + +
+ + + +

04/16/2010

+ +
  1. General
+
  • Add support for STM32F10x XL-density devices.
  • Add template project for TrueSTUDIO toolchain
  1. STM32F10x_StdPeriph_Template:  Template projects
+ +
  • IAR Embedded Workbench for ARM (EWARM) toolchain +
    • Used version: v5.41 
      • A software patch is needed to use XL-density devices with this version, click here to download
    • Add a new workspace for STM32F10x XL-density devices: STM32F10X_XL
  • Hitex IDE/Debugger (HiTOP) toolchain +
    • Used version: v5.32
    • Add a new workspace for STM32F10x XL-density devices: STM32F10X_XL
  • RealView Microcontroller Development Kit (MDK-ARM) toolchain +
    • Used version: v4.10
      • A software patch is needed to use XL-density devices with this version, click here to download
    • Add a new workspace for STM32F10x XL-density devices: STM32F10X_XL
  • Raisonance IDE RIDE7 (RIDE) toolchain +
    • Used version: RIDE7 IDE:7.28.10.0075, RKitARM for RIDE7:1.24.10 and later
    • Add a new workspace for STM32F10x XL-density devices: STM32F10X_XL
  • Atolic TrueSTUDIO toolchain +
    • Used version: v1.1.0
      • A software patch is needed to use XL-density devices with this version, click here to download
    • Workspaces provided for all supported STM32F10x devices

 +

3.2.0 +- 03/01/2010

+
    +
  1. General
    2. +
+
    + +
  • Add support +for STM32 Low-density Value line (STM32F100x4/6) and +Medium-density Value line (STM32F100x8/B) devices.
    • +
  • Update different projects to the latest toolchains versions.
    • + +
+
    +
  1. STM32F10x_StdPeriph_Template:  Template source
    2. +
+
    +
  • main.c file updated to support the STM32 Value line devices and STM32100B-EVAL board.
    +
    • +
+
    +
  1. STM32F10x_StdPeriph_Template:  Template projects
    2. + +
+ +
    +
  • IAR Embedded Workbench for ARM (EWARM) software toolchain +
    • +
      +
    • Version 5.41
      • +
    • Add a new workspace for STM32F10x Medium-density Value line devices: STM32100B-EVAL.
      • +
    +
  • Hitex HiTOP IDE/Debugger (HiTOP) software toolchain +
    • +
      +
    • Version 5.32
      • +
    • Add a new workspace for STM32F10x Medium-density Value line devices: STM32100B-EVAL.
      • +
    • Add cstart_thumb2.asm file to support new CMSIS V1.30 version. This file includes the SystemInit() function call.
      +
      • +
    +
  • Raisonance IDE RIDE7 (RIDE) software toolchain +
    • +
      +
    • Version: RIDE7 IDE:7.24.09, RKitARM for RIDE7:1.24.10
      • +
    • Add a new workspace for STM32F10x Medium-density Value line devices: STM32100B-EVAL.
      • +
    +
  • RealView Microcontroller Development Kit (RVMDK) software toolchain +
    • +
      +
    • Version 4.03
      • +
    • Add a new workspace for STM32F10x Medium-density Value line devices: STM32100B-EVAL.
      • +
    + +
+ +
    + +
+

License

+

The +enclosed firmware and all the related documentation are not covered by +a License Agreement, if you need such License you can contact your +local STMicroelectronics office.

+

THE +PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS +WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO +SAVE TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR +ANY DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY +CLAIMS ARISING FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY +CUSTOMERS OF THE CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH +THEIR PRODUCTS.

+

 

+
+
+

For +complete documentation on STM32(CORTEX M3) 32-Bit Microcontrollers +visit www.st.com/STM32

+
+

+
+
+

 

+
+ \ No newline at end of file diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM32100B-EVAL/.cproject b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM32100B-EVAL/.cproject new file mode 100644 index 0000000000000000000000000000000000000000..4131fd2703bf79ae67223e105b84f621a8a8129d --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM32100B-EVAL/.cproject @@ -0,0 +1,280 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM32100B-EVAL/.project b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM32100B-EVAL/.project new file mode 100644 index 0000000000000000000000000000000000000000..9f2334b1e01e273879ff323f2632f155d92f6053 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM32100B-EVAL/.project @@ -0,0 +1,290 @@ + + + STM32100B-EVAL + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + ?children? + ?name?=outputEntries\|?children?=?name?=entry\\\\\\\|\\\|\|| + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.buildArguments + + + + org.eclipse.cdt.make.core.buildCommand + make + + + org.eclipse.cdt.make.core.buildLocation + ${workspace_loc:/STM32100B-EVAL/Debug} + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + CMSIS + 2 + CurPath/Project/STM32F10x_StdPeriph_Template/TrueSTUDIO/.metadata/Link + + + Doc + 2 + CurPath/Project/STM32F10x_StdPeriph_Template/TrueSTUDIO/.metadata/Link + + + STM32_EVAL + 2 + CurPath/Project/STM32F10x_StdPeriph_Template/TrueSTUDIO/.metadata/Link + + + StdPeriph_Driver + 2 + CurPath/Project/STM32F10x_StdPeriph_Template/TrueSTUDIO/.metadata/Link + + + TrueSTUDIO + 2 + CurPath/Project/STM32F10x_StdPeriph_Template/TrueSTUDIO/.metadata/Link + + + User + 2 + CurPath/Project/STM32F10x_StdPeriph_Template/TrueSTUDIO/.metadata/Link + + + CMSIS/core_cm3.c + 1 + CurPath/Libraries/CMSIS/CM3/CoreSupport/core_cm3.c + + + CMSIS/system_stm32f10x.c + 1 + CurPath/Project/STM32F10x_StdPeriph_Template/system_stm32f10x.c + + + Doc/readme.txt + 1 + CurPath/Project/STM32F10x_StdPeriph_Template/TrueSTUDIO/STM32100B-EVAL/readme.txt + + + STM32_EVAL/stm32100b_eval_cec.c + 1 + CurPath/Utilities/STM32_EVAL/STM32100B_EVAL/stm32100b_eval_cec.c + + + STM32_EVAL/stm32100b_eval_lcd.c + 1 + CurPath/Utilities/STM32_EVAL/STM32100B_EVAL/stm32100b_eval_lcd.c + + + STM32_EVAL/stm32_eval.c + 1 + CurPath/Utilities/STM32_EVAL/stm32_eval.c + + + STM32_EVAL/stm32_eval_i2c_ee.c + 1 + CurPath/Utilities/STM32_EVAL/Common/stm32_eval_i2c_ee.c + + + STM32_EVAL/stm32_eval_i2c_tsensor.c + 1 + CurPath/Utilities/STM32_EVAL/Common/stm32_eval_i2c_tsensor.c + + + STM32_EVAL/stm32_eval_sdio_sd.c + 1 + CurPath/Utilities/STM32_EVAL/Common/stm32_eval_sdio_sd.c + + + STM32_EVAL/stm32_eval_spi_flash.c + 1 + CurPath/Utilities/STM32_EVAL/Common/stm32_eval_spi_flash.c + + + STM32_EVAL/stm32_eval_spi_sd.c + 1 + CurPath/Utilities/STM32_EVAL/Common/stm32_eval_spi_sd.c + + + StdPeriph_Driver/misc.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/misc.c + + + StdPeriph_Driver/stm32f10x_adc.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_adc.c + + + StdPeriph_Driver/stm32f10x_bkp.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_bkp.c + + + StdPeriph_Driver/stm32f10x_can.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_can.c + + + StdPeriph_Driver/stm32f10x_cec.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_cec.c + + + StdPeriph_Driver/stm32f10x_crc.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_crc.c + + + StdPeriph_Driver/stm32f10x_dac.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_dac.c + + + StdPeriph_Driver/stm32f10x_dbgmcu.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_dbgmcu.c + + + StdPeriph_Driver/stm32f10x_dma.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c + + + StdPeriph_Driver/stm32f10x_exti.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_exti.c + + + StdPeriph_Driver/stm32f10x_flash.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_flash.c + + + StdPeriph_Driver/stm32f10x_fsmc.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c + + + StdPeriph_Driver/stm32f10x_gpio.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_gpio.c + + + StdPeriph_Driver/stm32f10x_i2c.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_i2c.c + + + StdPeriph_Driver/stm32f10x_iwdg.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_iwdg.c + + + StdPeriph_Driver/stm32f10x_pwr.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_pwr.c + + + StdPeriph_Driver/stm32f10x_rcc.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c + + + StdPeriph_Driver/stm32f10x_rtc.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_rtc.c + + + StdPeriph_Driver/stm32f10x_sdio.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_sdio.c + + + StdPeriph_Driver/stm32f10x_spi.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_spi.c + + + StdPeriph_Driver/stm32f10x_tim.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_tim.c + + + StdPeriph_Driver/stm32f10x_usart.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_usart.c + + + StdPeriph_Driver/stm32f10x_wwdg.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_wwdg.c + + + TrueSTUDIO/startup_stm32f10x_md_vl.s + 1 + CurPath/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/TrueSTUDIO/startup_stm32f10x_md_vl.s + + + User/main.c + 1 + CurPath/Project/STM32F10x_StdPeriph_Template/main.c + + + User/stm32f10x_it.c + 1 + CurPath/Project/STM32F10x_StdPeriph_Template/stm32f10x_it.c + + + diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM32100B-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM32100B-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs new file mode 100644 index 0000000000000000000000000000000000000000..04e9dbaf9fa90710fd3ebae57f900fcb7ba450eb --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM32100B-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs @@ -0,0 +1,11 @@ +#Tue Jul 13 09:06:52 GMT+01:00 2010 +BOARD=STM32100B-EVAL +CODE_LOCATION=FLASH +ENDIAN=Little-endian +MCU=STM32F100VB +MODEL=Lite +PROBE=ST-LINK +PROJECT_FORMAT_VERSION=1 +TARGET=STM32 +VERSION=1.4.0 +eclipse.preferences.version=1 diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM32100B-EVAL/readme.txt b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM32100B-EVAL/readme.txt new file mode 100644 index 0000000000000000000000000000000000000000..170d00fe526d99dd93c94087b81b9966f454b390 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM32100B-EVAL/readme.txt @@ -0,0 +1,72 @@ +/** + @page TrueSTUDIO_STM32100B TrueSTUDIO Project Template for Medium-density Value line devices + + @verbatim + ******************** (C) COPYRIGHT 2011 STMicroelectronics ******************* + * @file readme.txt + * @author MCD Application Team + * @version V3.5.0 + * @date 08-April-2011 + * @brief This sub directory contains all the user modifiable files + * needed to create a new project linked with the STM32F10x + * Standard Peripheral Library and working with TrueSTUDIO software + * toolchain (Version 2.0.1 and later) + ****************************************************************************** + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. + * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, + * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE + * CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING + * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + ****************************************************************************** + @endverbatim + + @par Directory contents + + - project .cproject/.project: A pre-configured project file with the provided + library structure that produces an executable + image with TrueSTUDIO. + + - stm32_flash.ld: This file is the TrueSTUDIO linker script used to + place program code (readonly) in internal FLASH + and data (readwrite, Stack and Heap)in internal + SRAM. + You can customize this file to your need. + + @par How to use it ? + + - Open the TrueSTUDIO toolchain. + - Click on File->Switch Workspace->Other and browse to TrueSTUDIO workspace + directory. + - Click on File->Import, select General->'Existing Projects into Workspace' + and then click "Next". + - Browse to the TrueSTUDIO workspace directory and select the project: + - STM32100B-EVAL: to configure the project for STM32 Medium-density Value + line devices. + - Under Windows->Preferences->General->Workspace->Linked Resources, add + a variable path named "CurPath" which points to the folder containing + "Libraries", "Project" and "Utilities" folders. + - Rebuild all project files: Select the project in the "Project explorer" + window then click on Project->build project menu. + - Run program: Select the project in the "Project explorer" window then click + Run->Debug (F11) + +@note + - Low-density Value line devices are STM32F100xx microcontrollers where the + Flash memory density ranges between 16 and 32 Kbytes. + - Low-density devices are STM32F101xx, STM32F102xx and STM32F103xx + microcontrollers where the Flash memory density ranges between 16 and 32 Kbytes. + - Medium-density Value line devices are STM32F100xx microcontrollers where + the Flash memory density ranges between 32 and 128 Kbytes. + - Medium-density devices are STM32F101xx, STM32F102xx and STM32F103xx + microcontrollers where the Flash memory density ranges between 32 and 128 Kbytes. + - High-density Value line devices are STM32F100xx microcontrollers where + the Flash memory density ranges between 256 and 512 Kbytes. + - High-density devices are STM32F101xx and STM32F103xx microcontrollers where + the Flash memory density ranges between 256 and 512 Kbytes. + - XL-density devices are STM32F101xx and STM32F103xx microcontrollers where + the Flash memory density ranges between 512 and 1024 Kbytes. + - Connectivity line devices are STM32F105xx and STM32F107xx microcontrollers. + + *

© COPYRIGHT 2011 STMicroelectronics

+ */ diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM32100B-EVAL/stm32_flash.ld b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM32100B-EVAL/stm32_flash.ld new file mode 100644 index 0000000000000000000000000000000000000000..747dfd0e2345ac72580f27fda9ee27b2a1252887 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM32100B-EVAL/stm32_flash.ld @@ -0,0 +1,170 @@ +/* +***************************************************************************** +** +** File : stm32_flash.ld +** +** Abstract : Linker script for STM32F100VB Device with +** 128KByte FLASH, 8KByte RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Environment : Atollic TrueSTUDIO(R) +** +** Distribution: The file is distributed 揳s is, without any warranty +** of any kind. +** +** (c)Copyright Atollic AB. +** You may use this file as-is or modify it according to the needs of your +** project. Distribution of this file (unmodified or modified) is not +** permitted. Atollic AB permit registered Atollic TrueSTUDIO(R) users the +** rights to distribute the assembled, compiled & linked contents of this +** file as part of an application binary file, provided that it is built +** using the Atollic TrueSTUDIO(R) toolchain. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x20002000; /* end of 8K RAM */ + +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0; /* required amount of heap */ +_Min_Stack_Size = 0x100; /* required amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 128K + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 8K + MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH + .ARM : { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .ARM.attributes : { *(.ARM.attributes) } > FLASH + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(.fini_array*)) + KEEP (*(SORT(.fini_array.*))) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = .; + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : AT ( _sidata ) + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >RAM + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + PROVIDE ( end = _ebss ); + PROVIDE ( _end = _ebss ); + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(4); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(4); + } >RAM + + /* MEMORY_bank1 section, code must be located here explicitly */ + /* Example: extern int foo(void) __attribute__ ((section (".mb1text"))); */ + .memory_b1_text : + { + *(.mb1text) /* .mb1text sections (code) */ + *(.mb1text*) /* .mb1text* sections (code) */ + *(.mb1rodata) /* read-only data (constants) */ + *(.mb1rodata*) + } >MEMORY_B1 + + /* Remove information from the standard libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } +} diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM32100E-EVAL/.cproject b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM32100E-EVAL/.cproject new file mode 100644 index 0000000000000000000000000000000000000000..68e021a342b2cfd5434d704bbc94e8abff682b03 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM32100E-EVAL/.cproject @@ -0,0 +1,370 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM32100E-EVAL/.project b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM32100E-EVAL/.project new file mode 100644 index 0000000000000000000000000000000000000000..b09714ae63fb116c56d212e43bd1623a378e551b --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM32100E-EVAL/.project @@ -0,0 +1,305 @@ + + + STM32100E-EVAL + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + ?children? + ?name?=outputEntries\|?children?=?name?=entry\\\\\\\|\\\|\|| + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.buildArguments + + + + org.eclipse.cdt.make.core.buildCommand + make + + + org.eclipse.cdt.make.core.buildLocation + ${workspace_loc:/STM3210E-EVAL/Debug} + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + CMSIS + 2 + CurPath/Project/STM32F10x_StdPeriph_Template/TrueSTUDIO/.metadata/Link + + + Doc + 2 + CurPath/Project/STM32F10x_StdPeriph_Template/TrueSTUDIO/.metadata/Link + + + STM32_EVAL + 2 + CurPath/Project/STM32F10x_StdPeriph_Template/TrueSTUDIO/.metadata/Link + + + StdPeriph_Driver + 2 + CurPath/Project/STM32F10x_StdPeriph_Template/TrueSTUDIO/.metadata/Link + + + TrueSTUDIO + 2 + CurPath/Project/STM32F10x_StdPeriph_Template/TrueSTUDIO/.metadata/Link + + + User + 2 + CurPath/Project/STM32F10x_StdPeriph_Template/TrueSTUDIO/.metadata/Link + + + CMSIS/core_cm3.c + 1 + CurPath/Libraries/CMSIS/CM3/CoreSupport/core_cm3.c + + + CMSIS/system_stm32f10x.c + 1 + CurPath/Project/STM32F10x_StdPeriph_Template/system_stm32f10x.c + + + Doc/readme.txt + 1 + CurPath/Project/STM32F10x_StdPeriph_Template/TrueSTUDIO/STM32100E-EVAL/readme.txt + + + STM32_EVAL/stm32100e_eval_cec.c + 1 + CurPath/Utilities/STM32_EVAL/STM32100E_EVAL/stm32100e_eval_cec.c + + + STM32_EVAL/stm32100e_eval_fsmc_onenand.c + 1 + CurPath/Utilities/STM32_EVAL/STM32100E_EVAL/stm32100e_eval_fsmc_onenand.c + + + STM32_EVAL/stm32100e_eval_fsmc_sram.c + 1 + CurPath/Utilities/STM32_EVAL/STM32100E_EVAL/stm32100e_eval_fsmc_sram.c + + + STM32_EVAL/stm32100e_eval_ioe.c + 1 + CurPath/Utilities/STM32_EVAL/STM32100E_EVAL/stm32100e_eval_ioe.c + + + STM32_EVAL/stm32100e_eval_lcd.c + 1 + CurPath/Utilities/STM32_EVAL/STM32100E_EVAL/stm32100e_eval_lcd.c + + + STM32_EVAL/stm32_eval.c + 1 + CurPath/Utilities/STM32_EVAL/stm32_eval.c + + + STM32_EVAL/stm32_eval_i2c_ee.c + 1 + CurPath/Utilities/STM32_EVAL/Common/stm32_eval_i2c_ee.c + + + STM32_EVAL/stm32_eval_i2c_tsensor.c + 1 + CurPath/Utilities/STM32_EVAL/Common/stm32_eval_i2c_tsensor.c + + + STM32_EVAL/stm32_eval_sdio_sd.c + 1 + CurPath/Utilities/STM32_EVAL/Common/stm32_eval_sdio_sd.c + + + STM32_EVAL/stm32_eval_spi_flash.c + 1 + CurPath/Utilities/STM32_EVAL/Common/stm32_eval_spi_flash.c + + + STM32_EVAL/stm32_eval_spi_sd.c + 1 + CurPath/Utilities/STM32_EVAL/Common/stm32_eval_spi_sd.c + + + StdPeriph_Driver/misc.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/misc.c + + + StdPeriph_Driver/stm32f10x_adc.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_adc.c + + + StdPeriph_Driver/stm32f10x_bkp.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_bkp.c + + + StdPeriph_Driver/stm32f10x_can.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_can.c + + + StdPeriph_Driver/stm32f10x_cec.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_cec.c + + + StdPeriph_Driver/stm32f10x_crc.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_crc.c + + + StdPeriph_Driver/stm32f10x_dac.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_dac.c + + + StdPeriph_Driver/stm32f10x_dbgmcu.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_dbgmcu.c + + + StdPeriph_Driver/stm32f10x_dma.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c + + + StdPeriph_Driver/stm32f10x_exti.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_exti.c + + + StdPeriph_Driver/stm32f10x_flash.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_flash.c + + + StdPeriph_Driver/stm32f10x_fsmc.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c + + + StdPeriph_Driver/stm32f10x_gpio.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_gpio.c + + + StdPeriph_Driver/stm32f10x_i2c.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_i2c.c + + + StdPeriph_Driver/stm32f10x_iwdg.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_iwdg.c + + + StdPeriph_Driver/stm32f10x_pwr.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_pwr.c + + + StdPeriph_Driver/stm32f10x_rcc.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c + + + StdPeriph_Driver/stm32f10x_rtc.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_rtc.c + + + StdPeriph_Driver/stm32f10x_sdio.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_sdio.c + + + StdPeriph_Driver/stm32f10x_spi.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_spi.c + + + StdPeriph_Driver/stm32f10x_tim.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_tim.c + + + StdPeriph_Driver/stm32f10x_usart.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_usart.c + + + StdPeriph_Driver/stm32f10x_wwdg.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_wwdg.c + + + TrueSTUDIO/startup_stm32f10x_hd_vl.s + 1 + CurPath/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/TrueSTUDIO/startup_stm32f10x_hd_vl.s + + + User/main.c + 1 + CurPath/Project/STM32F10x_StdPeriph_Template/main.c + + + User/stm32f10x_it.c + 1 + CurPath/Project/STM32F10x_StdPeriph_Template/stm32f10x_it.c + + + diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM32100E-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM32100E-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs new file mode 100644 index 0000000000000000000000000000000000000000..34b3d6f0f3ba88e05cbfe29832fb5a477854c9d5 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM32100E-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs @@ -0,0 +1,11 @@ +#Tue Jul 13 09:06:52 GMT+01:00 2010 +BOARD=STM32100E-EVAL +CODE_LOCATION=FLASH +ENDIAN=Little-endian +MCU=STM32F100ZE +MODEL=Lite +PROBE=ST-LINK +PROJECT_FORMAT_VERSION=1 +TARGET=STM32 +VERSION=1.4.0 +eclipse.preferences.version=1 diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM32100E-EVAL/readme.txt b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM32100E-EVAL/readme.txt new file mode 100644 index 0000000000000000000000000000000000000000..04b039762155ea21936222e64a4bce1301f8411f --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM32100E-EVAL/readme.txt @@ -0,0 +1,72 @@ +/** + @page TrueSTUDIO_STM32100E TrueSTUDIO Project Template for High-density Value line devices + + @verbatim + ******************** (C) COPYRIGHT 2011 STMicroelectronics ******************* + * @file readme.txt + * @author MCD Application Team + * @version V3.5.0 + * @date 08-April-2011 + * @brief This sub directory contains all the user modifiable files + * needed to create a new project linked with the STM32F10x + * Standard Peripheral Library and working with TrueSTUDIO software + * toolchain (Version 2.0.1 and later) + ****************************************************************************** + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. + * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, + * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE + * CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING + * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + ****************************************************************************** + @endverbatim + + @par Directory contents + + - project .cproject/.project: A pre-configured project file with the provided + library structure that produces an executable + image with TrueSTUDIO. + + - stm32_flash.ld: This file is the TrueSTUDIO linker script used to + place program code (readonly) in internal FLASH + and data (readwrite, Stack and Heap)in internal + SRAM. + You can customize this file to your need. + + @par How to use it ? + + - Open the TrueSTUDIO toolchain. + - Click on File->Switch Workspace->Other and browse to TrueSTUDIO workspace + directory. + - Click on File->Import, select General->'Existing Projects into Workspace' + and then click "Next". + - Browse to the TrueSTUDIO workspace directory and select the project: + - STM32100E-EVAL: to configure the project for STM32 High-density Value + line devices. + - Under Windows->Preferences->General->Workspace->Linked Resources, add + a variable path named "CurPath" which points to the folder containing + "Libraries", "Project" and "Utilities" folders. + - Rebuild all project files: Select the project in the "Project explorer" + window then click on Project->build project menu. + - Run program: Select the project in the "Project explorer" window then click + Run->Debug (F11) + +@note + - Low-density Value line devices are STM32F100xx microcontrollers where the + Flash memory density ranges between 16 and 32 Kbytes. + - Low-density devices are STM32F101xx, STM32F102xx and STM32F103xx + microcontrollers where the Flash memory density ranges between 16 and 32 Kbytes. + - Medium-density Value line devices are STM32F100xx microcontrollers where + the Flash memory density ranges between 32 and 128 Kbytes. + - Medium-density devices are STM32F101xx, STM32F102xx and STM32F103xx + microcontrollers where the Flash memory density ranges between 32 and 128 Kbytes. + - High-density Value line devices are STM32F100xx microcontrollers where + the Flash memory density ranges between 256 and 512 Kbytes. + - High-density devices are STM32F101xx and STM32F103xx microcontrollers where + the Flash memory density ranges between 256 and 512 Kbytes. + - XL-density devices are STM32F101xx and STM32F103xx microcontrollers where + the Flash memory density ranges between 512 and 1024 Kbytes. + - Connectivity line devices are STM32F105xx and STM32F107xx microcontrollers. + + *

© COPYRIGHT 2011 STMicroelectronics

+ */ diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM32100E-EVAL/stm32_flash.ld b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM32100E-EVAL/stm32_flash.ld new file mode 100644 index 0000000000000000000000000000000000000000..aa77c9f40ab163541fe831f30fee7d09ea6e7b65 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM32100E-EVAL/stm32_flash.ld @@ -0,0 +1,171 @@ +/* +***************************************************************************** +** +** File : stm32_flash.ld +** +** Abstract : Linker script for High-density value line Devices (STM32F100xE) +** with 512KByte FLASH, 32KByte RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Environment : Atollic TrueSTUDIO(R) +** +** Distribution: The file is distributed 揳s is, without any warranty +** of any kind. +** +** (c)Copyright Atollic AB. +** You may use this file as-is or modify it according to the needs of your +** project. Distribution of this file (unmodified or modified) is not +** permitted. Atollic AB permit registered Atollic TrueSTUDIO(R) users the +** rights to distribute the assembled, compiled & linked contents of this +** file as part of an application binary file, provided that it is built +** using the Atollic TrueSTUDIO(R) toolchain. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x20008000; /* end of 32K RAM */ + +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0; /* required amount of heap */ +_Min_Stack_Size = 0x100; /* required amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 32K + MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH + .ARM : { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(.fini_array*)) + KEEP (*(SORT(.fini_array.*))) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = .; + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : AT ( _sidata ) + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >RAM + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + PROVIDE ( end = _ebss ); + PROVIDE ( _end = _ebss ); + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(4); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(4); + } >RAM + + /* MEMORY_bank1 section, code must be located here explicitly */ + /* Example: extern int foo(void) __attribute__ ((section (".mb1text"))); */ + .memory_b1_text : + { + *(.mb1text) /* .mb1text sections (code) */ + *(.mb1text*) /* .mb1text* sections (code) */ + *(.mb1rodata) /* read-only data (constants) */ + *(.mb1rodata*) + } >MEMORY_B1 + + /* Remove information from the standard libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210B-EVAL/.cproject b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210B-EVAL/.cproject new file mode 100644 index 0000000000000000000000000000000000000000..fa5f17bfea0885d5dc278d58e3ea5c8178de6ef0 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210B-EVAL/.cproject @@ -0,0 +1,280 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210B-EVAL/.project b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210B-EVAL/.project new file mode 100644 index 0000000000000000000000000000000000000000..04467fa5e8bfbae5c3af8faf355bfd28e6d5a0ce --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210B-EVAL/.project @@ -0,0 +1,281 @@ + + + STM3210B-EVAL + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.buildArguments + + + + org.eclipse.cdt.make.core.buildCommand + make + + + org.eclipse.cdt.make.core.buildLocation + ${workspace_loc:/STM3210B-EVAL/Debug} + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + CMSIS + 2 + CurPath/Project/STM32F10x_StdPeriph_Template/TrueSTUDIO/.metadata/Link + + + Doc + 2 + CurPath/Project/STM32F10x_StdPeriph_Template/TrueSTUDIO/.metadata/Link + + + STM32_EVAL + 2 + CurPath/Project/STM32F10x_StdPeriph_Template/TrueSTUDIO/.metadata/Link + + + StdPeriph_Driver + 2 + CurPath/Project/STM32F10x_StdPeriph_Template/TrueSTUDIO/.metadata/Link + + + TrueSTUDIO + 2 + CurPath/Project/STM32F10x_StdPeriph_Template/TrueSTUDIO/.metadata/Link + + + User + 2 + CurPath/Project/STM32F10x_StdPeriph_Template/TrueSTUDIO/.metadata/Link + + + CMSIS/core_cm3.c + 1 + CurPath/Libraries/CMSIS/CM3/CoreSupport/core_cm3.c + + + CMSIS/system_stm32f10x.c + 1 + CurPath/Project/STM32F10x_StdPeriph_Template/system_stm32f10x.c + + + Doc/readme.txt + 1 + CurPath/Project/STM32F10x_StdPeriph_Template/TrueSTUDIO/STM3210B-EVAL/readme.txt + + + STM32_EVAL/stm3210b_eval_lcd.c + 1 + CurPath/Utilities/STM32_EVAL/STM3210B_EVAL/stm3210b_eval_lcd.c + + + STM32_EVAL/stm32_eval.c + 1 + CurPath/Utilities/STM32_EVAL/stm32_eval.c + + + STM32_EVAL/stm32_eval_i2c_ee.c + 1 + CurPath/Utilities/STM32_EVAL/Common/stm32_eval_i2c_ee.c + + + STM32_EVAL/stm32_eval_i2c_tsensor.c + 1 + CurPath/Utilities/STM32_EVAL/Common/stm32_eval_i2c_tsensor.c + + + STM32_EVAL/stm32_eval_sdio_sd.c + 1 + CurPath/Utilities/STM32_EVAL/Common/stm32_eval_sdio_sd.c + + + STM32_EVAL/stm32_eval_spi_flash.c + 1 + CurPath/Utilities/STM32_EVAL/Common/stm32_eval_spi_flash.c + + + STM32_EVAL/stm32_eval_spi_sd.c + 1 + CurPath/Utilities/STM32_EVAL/Common/stm32_eval_spi_sd.c + + + StdPeriph_Driver/misc.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/misc.c + + + StdPeriph_Driver/stm32f10x_adc.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_adc.c + + + StdPeriph_Driver/stm32f10x_bkp.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_bkp.c + + + StdPeriph_Driver/stm32f10x_can.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_can.c + + + StdPeriph_Driver/stm32f10x_cec.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_cec.c + + + StdPeriph_Driver/stm32f10x_crc.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_crc.c + + + StdPeriph_Driver/stm32f10x_dac.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_dac.c + + + StdPeriph_Driver/stm32f10x_dbgmcu.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_dbgmcu.c + + + StdPeriph_Driver/stm32f10x_dma.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c + + + StdPeriph_Driver/stm32f10x_exti.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_exti.c + + + StdPeriph_Driver/stm32f10x_flash.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_flash.c + + + StdPeriph_Driver/stm32f10x_fsmc.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c + + + StdPeriph_Driver/stm32f10x_gpio.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_gpio.c + + + StdPeriph_Driver/stm32f10x_i2c.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_i2c.c + + + StdPeriph_Driver/stm32f10x_iwdg.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_iwdg.c + + + StdPeriph_Driver/stm32f10x_pwr.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_pwr.c + + + StdPeriph_Driver/stm32f10x_rcc.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c + + + StdPeriph_Driver/stm32f10x_rtc.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_rtc.c + + + StdPeriph_Driver/stm32f10x_sdio.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_sdio.c + + + StdPeriph_Driver/stm32f10x_spi.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_spi.c + + + StdPeriph_Driver/stm32f10x_tim.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_tim.c + + + StdPeriph_Driver/stm32f10x_usart.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_usart.c + + + StdPeriph_Driver/stm32f10x_wwdg.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_wwdg.c + + + TrueSTUDIO/startup_stm32f10x_md.s + 1 + CurPath/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/TrueSTUDIO/startup_stm32f10x_md.s + + + User/main.c + 1 + CurPath/Project/STM32F10x_StdPeriph_Template/main.c + + + User/stm32f10x_it.c + 1 + CurPath/Project/STM32F10x_StdPeriph_Template/stm32f10x_it.c + + + diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210B-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210B-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs new file mode 100644 index 0000000000000000000000000000000000000000..5667d568b9ab983f05383028b872076bec4c81dd --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210B-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs @@ -0,0 +1,11 @@ +#Tue Jul 13 09:06:52 GMT+01:00 2010 +BOARD=STM3210B-EVAL +CODE_LOCATION=FLASH +ENDIAN=Little-endian +MCU=STM32F103VB +MODEL=Lite +PROBE=ST-LINK +PROJECT_FORMAT_VERSION=1 +TARGET=STM32 +VERSION=1.4.0 +eclipse.preferences.version=1 diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210B-EVAL/readme.txt b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210B-EVAL/readme.txt new file mode 100644 index 0000000000000000000000000000000000000000..0038a2eb3f66c9c16ba3fcca6f629bbdf69c666d --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210B-EVAL/readme.txt @@ -0,0 +1,71 @@ +/** + @page TrueSTUDIO_STM3210B TrueSTUDIO Project Template for Medium-density devices + + @verbatim + ******************** (C) COPYRIGHT 2011 STMicroelectronics ******************* + * @file readme.txt + * @author MCD Application Team + * @version V3.5.0 + * @date 08-April-2011 + * @brief This sub directory contains all the user modifiable files + * needed to create a new project linked with the STM32F10x + * Standard Peripheral Library and working with TrueSTUDIO software + * toolchain (Version 2.0.1 and later) + ****************************************************************************** + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. + * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, + * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE + * CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING + * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + ****************************************************************************** + @endverbatim + + @par Directory contents + + - project .cproject/.project: A pre-configured project file with the provided + library structure that produces an executable + image with TrueSTUDIO. + + - stm32_flash.ld: This file is the TrueSTUDIO linker script used to + place program code (readonly) in internal FLASH + and data (readwrite, Stack and Heap)in internal + SRAM. + You can customize this file to your need. + + @par How to use it ? + + - Open the TrueSTUDIO toolchain. + - Click on File->Switch Workspace->Other and browse to TrueSTUDIO workspace + directory. + - Click on File->Import, select General->'Existing Projects into Workspace' + and then click "Next". + - Browse to the TrueSTUDIO workspace directory and select the project: + - STM3210B-EVAL: to configure the project for STM32 Medium-density devices. + - Under Windows->Preferences->General->Workspace->Linked Resources, add + a variable path named "CurPath" which points to the folder containing + "Libraries", "Project" and "Utilities" folders. + - Rebuild all project files: Select the project in the "Project explorer" + window then click on Project->build project menu. + - Run program: Select the project in the "Project explorer" window then click + Run->Debug (F11) + +@note + - Low-density Value line devices are STM32F100xx microcontrollers where the + Flash memory density ranges between 16 and 32 Kbytes. + - Low-density devices are STM32F101xx, STM32F102xx and STM32F103xx + microcontrollers where the Flash memory density ranges between 16 and 32 Kbytes. + - Medium-density Value line devices are STM32F100xx microcontrollers where + the Flash memory density ranges between 32 and 128 Kbytes. + - Medium-density devices are STM32F101xx, STM32F102xx and STM32F103xx + microcontrollers where the Flash memory density ranges between 32 and 128 Kbytes. + - High-density Value line devices are STM32F100xx microcontrollers where + the Flash memory density ranges between 256 and 512 Kbytes. + - High-density devices are STM32F101xx and STM32F103xx microcontrollers where + the Flash memory density ranges between 256 and 512 Kbytes. + - XL-density devices are STM32F101xx and STM32F103xx microcontrollers where + the Flash memory density ranges between 512 and 1024 Kbytes. + - Connectivity line devices are STM32F105xx and STM32F107xx microcontrollers. + + *

© COPYRIGHT 2011 STMicroelectronics

+ */ diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210B-EVAL/stm32_flash.ld b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210B-EVAL/stm32_flash.ld new file mode 100644 index 0000000000000000000000000000000000000000..a978e9018f5157f8b48a33f22519567f7326676a --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210B-EVAL/stm32_flash.ld @@ -0,0 +1,170 @@ +/* +***************************************************************************** +** +** File : stm32_flash.ld +** +** Abstract : Linker script for STM32F103VB Device with +** 128KByte FLASH, 20KByte RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Environment : Atollic TrueSTUDIO(R) +** +** Distribution: The file is distributed 揳s is, without any warranty +** of any kind. +** +** (c)Copyright Atollic AB. +** You may use this file as-is or modify it according to the needs of your +** project. Distribution of this file (unmodified or modified) is not +** permitted. Atollic AB permit registered Atollic TrueSTUDIO(R) users the +** rights to distribute the assembled, compiled & linked contents of this +** file as part of an application binary file, provided that it is built +** using the Atollic TrueSTUDIO(R) toolchain. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x20005000; /* end of 20K RAM */ + +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0; /* required amount of heap */ +_Min_Stack_Size = 0x100; /* required amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 128K + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 20K + MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH + .ARM : { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .ARM.attributes : { *(.ARM.attributes) } > FLASH + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(.fini_array*)) + KEEP (*(SORT(.fini_array.*))) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = .; + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : AT ( _sidata ) + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >RAM + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + PROVIDE ( end = _ebss ); + PROVIDE ( _end = _ebss ); + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(4); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(4); + } >RAM + + /* MEMORY_bank1 section, code must be located here explicitly */ + /* Example: extern int foo(void) __attribute__ ((section (".mb1text"))); */ + .memory_b1_text : + { + *(.mb1text) /* .mb1text sections (code) */ + *(.mb1text*) /* .mb1text* sections (code) */ + *(.mb1rodata) /* read-only data (constants) */ + *(.mb1rodata*) + } >MEMORY_B1 + + /* Remove information from the standard libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } +} diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210C-EVAL/.cproject b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210C-EVAL/.cproject new file mode 100644 index 0000000000000000000000000000000000000000..f746548b07e04748ecab374bf6e980a198b1d52a --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210C-EVAL/.cproject @@ -0,0 +1,281 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210C-EVAL/.project b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210C-EVAL/.project new file mode 100644 index 0000000000000000000000000000000000000000..e181d6da69605f6fbe7e85be819e1f0e557f9169 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210C-EVAL/.project @@ -0,0 +1,290 @@ + + + STM3210C-EVAL + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + ?children? + ?name?=outputEntries\|?children?=?name?=entry\\\\\\\|\\\|\|| + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.buildArguments + + + + org.eclipse.cdt.make.core.buildCommand + make + + + org.eclipse.cdt.make.core.buildLocation + ${workspace_loc:/STM3210C-EVAL/Debug} + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + CMSIS + 2 + CurPath/Project/STM32F10x_StdPeriph_Template/TrueSTUDIO/.metadata/Link + + + Doc + 2 + CurPath/Project/STM32F10x_StdPeriph_Template/TrueSTUDIO/.metadata/Link + + + STM32_EVAL + 2 + CurPath/Project/STM32F10x_StdPeriph_Template/TrueSTUDIO/.metadata/Link + + + StdPeriph_Driver + 2 + CurPath/Project/STM32F10x_StdPeriph_Template/TrueSTUDIO/.metadata/Link + + + TrueSTUDIO + 2 + CurPath/Project/STM32F10x_StdPeriph_Template/TrueSTUDIO/.metadata/Link + + + User + 2 + CurPath/Project/STM32F10x_StdPeriph_Template/TrueSTUDIO/.metadata/Link + + + CMSIS/core_cm3.c + 1 + CurPath/Libraries/CMSIS/CM3/CoreSupport/core_cm3.c + + + CMSIS/system_stm32f10x.c + 1 + CurPath/Project/STM32F10x_StdPeriph_Template/system_stm32f10x.c + + + Doc/readme.txt + 1 + CurPath/Project/STM32F10x_StdPeriph_Template/TrueSTUDIO/STM3210C-EVAL/readme.txt + + + STM32_EVAL/stm3210c_eval_ioe.c + 1 + CurPath/Utilities/STM32_EVAL/STM3210C_EVAL/stm3210c_eval_ioe.c + + + STM32_EVAL/stm3210c_eval_lcd.c + 1 + CurPath/Utilities/STM32_EVAL/STM3210C_EVAL/stm3210c_eval_lcd.c + + + STM32_EVAL/stm32_eval.c + 1 + CurPath/Utilities/STM32_EVAL/stm32_eval.c + + + STM32_EVAL/stm32_eval_i2c_ee.c + 1 + CurPath/Utilities/STM32_EVAL/Common/stm32_eval_i2c_ee.c + + + STM32_EVAL/stm32_eval_i2c_tsensor.c + 1 + CurPath/Utilities/STM32_EVAL/Common/stm32_eval_i2c_tsensor.c + + + STM32_EVAL/stm32_eval_sdio_sd.c + 1 + CurPath/Utilities/STM32_EVAL/Common/stm32_eval_sdio_sd.c + + + STM32_EVAL/stm32_eval_spi_flash.c + 1 + CurPath/Utilities/STM32_EVAL/Common/stm32_eval_spi_flash.c + + + STM32_EVAL/stm32_eval_spi_sd.c + 1 + CurPath/Utilities/STM32_EVAL/Common/stm32_eval_spi_sd.c + + + StdPeriph_Driver/misc.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/misc.c + + + StdPeriph_Driver/stm32f10x_adc.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_adc.c + + + StdPeriph_Driver/stm32f10x_bkp.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_bkp.c + + + StdPeriph_Driver/stm32f10x_can.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_can.c + + + StdPeriph_Driver/stm32f10x_cec.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_cec.c + + + StdPeriph_Driver/stm32f10x_crc.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_crc.c + + + StdPeriph_Driver/stm32f10x_dac.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_dac.c + + + StdPeriph_Driver/stm32f10x_dbgmcu.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_dbgmcu.c + + + StdPeriph_Driver/stm32f10x_dma.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c + + + StdPeriph_Driver/stm32f10x_exti.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_exti.c + + + StdPeriph_Driver/stm32f10x_flash.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_flash.c + + + StdPeriph_Driver/stm32f10x_fsmc.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c + + + StdPeriph_Driver/stm32f10x_gpio.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_gpio.c + + + StdPeriph_Driver/stm32f10x_i2c.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_i2c.c + + + StdPeriph_Driver/stm32f10x_iwdg.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_iwdg.c + + + StdPeriph_Driver/stm32f10x_pwr.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_pwr.c + + + StdPeriph_Driver/stm32f10x_rcc.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c + + + StdPeriph_Driver/stm32f10x_rtc.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_rtc.c + + + StdPeriph_Driver/stm32f10x_sdio.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_sdio.c + + + StdPeriph_Driver/stm32f10x_spi.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_spi.c + + + StdPeriph_Driver/stm32f10x_tim.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_tim.c + + + StdPeriph_Driver/stm32f10x_usart.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_usart.c + + + StdPeriph_Driver/stm32f10x_wwdg.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_wwdg.c + + + TrueSTUDIO/startup_stm32f10x_cl.s + 1 + CurPath/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/TrueSTUDIO/startup_stm32f10x_cl.s + + + User/main.c + 1 + CurPath/Project/STM32F10x_StdPeriph_Template/main.c + + + User/stm32f10x_it.c + 1 + CurPath/Project/STM32F10x_StdPeriph_Template/stm32f10x_it.c + + + diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210C-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210C-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs new file mode 100644 index 0000000000000000000000000000000000000000..2e8d862abd7701107d84b8915397fc29af75d1f7 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210C-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs @@ -0,0 +1,11 @@ +#Tue Jul 13 09:06:52 GMT+01:00 2010 +BOARD=STM3210C-EVAL +CODE_LOCATION=FLASH +ENDIAN=Little-endian +MCU=STM32F107VC +MODEL=Lite +PROBE=ST-LINK +PROJECT_FORMAT_VERSION=1 +TARGET=STM32 +VERSION=1.4.0 +eclipse.preferences.version=1 diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210C-EVAL/readme.txt b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210C-EVAL/readme.txt new file mode 100644 index 0000000000000000000000000000000000000000..d7c59319a7d1c94cd36c552ba7d52342de6d839a --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210C-EVAL/readme.txt @@ -0,0 +1,71 @@ +/** + @page TrueSTUDIO_STM3210C TrueSTUDIO Project Template for Connectivity line devices + + @verbatim + ******************** (C) COPYRIGHT 2011 STMicroelectronics ******************* + * @file readme.txt + * @author MCD Application Team + * @version V3.5.0 + * @date 08-April-2011 + * @brief This sub directory contains all the user modifiable files + * needed to create a new project linked with the STM32F10x + * Standard Peripheral Library and working with TrueSTUDIO software + * toolchain (Version 2.0.1 and later) + ****************************************************************************** + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. + * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, + * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE + * CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING + * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + ****************************************************************************** + @endverbatim + + @par Directory contents + + - project .cproject/.project: A pre-configured project file with the provided + library structure that produces an executable + image with TrueSTUDIO. + + - stm32_flash.ld: This file is the TrueSTUDIO linker script used to + place program code (readonly) in internal FLASH + and data (readwrite, Stack and Heap)in internal + SRAM. + You can customize this file to your need. + + @par How to use it ? + + - Open the TrueSTUDIO toolchain. + - Click on File->Switch Workspace->Other and browse to TrueSTUDIO workspace + directory. + - Click on File->Import, select General->'Existing Projects into Workspace' + and then click "Next". + - Browse to the TrueSTUDIO workspace directory and select the project: + - STM3210C-EVAL: to configure the project for STM32 Connectivity line devices. + - Under Windows->Preferences->General->Workspace->Linked Resources, add + a variable path named "CurPath" which points to the folder containing + "Libraries", "Project" and "Utilities" folders. + - Rebuild all project files: Select the project in the "Project explorer" + window then click on Project->build project menu. + - Run program: Select the project in the "Project explorer" window then click + Run->Debug (F11) + +@note + - Low-density Value line devices are STM32F100xx microcontrollers where the + Flash memory density ranges between 16 and 32 Kbytes. + - Low-density devices are STM32F101xx, STM32F102xx and STM32F103xx + microcontrollers where the Flash memory density ranges between 16 and 32 Kbytes. + - Medium-density Value line devices are STM32F100xx microcontrollers where + the Flash memory density ranges between 32 and 128 Kbytes. + - Medium-density devices are STM32F101xx, STM32F102xx and STM32F103xx + microcontrollers where the Flash memory density ranges between 32 and 128 Kbytes. + - High-density Value line devices are STM32F100xx microcontrollers where + the Flash memory density ranges between 256 and 512 Kbytes. + - High-density devices are STM32F101xx and STM32F103xx microcontrollers where + the Flash memory density ranges between 256 and 512 Kbytes. + - XL-density devices are STM32F101xx and STM32F103xx microcontrollers where + the Flash memory density ranges between 512 and 1024 Kbytes. + - Connectivity line devices are STM32F105xx and STM32F107xx microcontrollers. + + *

© COPYRIGHT 2011 STMicroelectronics

+ */ diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210C-EVAL/stm32_flash.ld b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210C-EVAL/stm32_flash.ld new file mode 100644 index 0000000000000000000000000000000000000000..aa88229ca2c08917fafbc180c70c2cd61f38cc3b --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210C-EVAL/stm32_flash.ld @@ -0,0 +1,170 @@ +/* +***************************************************************************** +** +** File : stm32_flash.ld +** +** Abstract : Linker script for STM32F107VC Device with +** 256KByte FLASH, 64KByte RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Environment : Atollic TrueSTUDIO(R) +** +** Distribution: The file is distributed 揳s is, without any warranty +** of any kind. +** +** (c)Copyright Atollic AB. +** You may use this file as-is or modify it according to the needs of your +** project. Distribution of this file (unmodified or modified) is not +** permitted. Atollic AB permit registered Atollic TrueSTUDIO(R) users the +** rights to distribute the assembled, compiled & linked contents of this +** file as part of an application binary file, provided that it is built +** using the Atollic TrueSTUDIO(R) toolchain. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x20010000; /* end of 64K RAM */ + +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0; /* required amount of heap */ +_Min_Stack_Size = 0x200; /* required amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 256K + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K + MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH + .ARM : { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .ARM.attributes : { *(.ARM.attributes) } > FLASH + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(.fini_array*)) + KEEP (*(SORT(.fini_array.*))) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = .; + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : AT ( _sidata ) + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >RAM + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + PROVIDE ( end = _ebss ); + PROVIDE ( _end = _ebss ); + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(4); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(4); + } >RAM + + /* MEMORY_bank1 section, code must be located here explicitly */ + /* Example: extern int foo(void) __attribute__ ((section (".mb1text"))); */ + .memory_b1_text : + { + *(.mb1text) /* .mb1text sections (code) */ + *(.mb1text*) /* .mb1text* sections (code) */ + *(.mb1rodata) /* read-only data (constants) */ + *(.mb1rodata*) + } >MEMORY_B1 + + /* Remove information from the standard libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } +} diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210E-EVAL/.cproject b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210E-EVAL/.cproject new file mode 100644 index 0000000000000000000000000000000000000000..f53986f6359b75fc1741dcfd749ab071235c563c --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210E-EVAL/.cproject @@ -0,0 +1,358 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210E-EVAL/.project b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210E-EVAL/.project new file mode 100644 index 0000000000000000000000000000000000000000..bb777384d4533e13597c7dbcf70668100e2d129d --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210E-EVAL/.project @@ -0,0 +1,300 @@ + + + STM3210E-EVAL + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + ?children? + ?name?=outputEntries\|?children?=?name?=entry\\\\\\\|\\\|\|| + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.buildArguments + + + + org.eclipse.cdt.make.core.buildCommand + make + + + org.eclipse.cdt.make.core.buildLocation + ${workspace_loc:/STM3210E-EVAL/Debug} + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + CMSIS + 2 + CurPath/Project/STM32F10x_StdPeriph_Template/TrueSTUDIO/.metadata/Link + + + Doc + 2 + CurPath/Project/STM32F10x_StdPeriph_Template/TrueSTUDIO/.metadata/Link + + + STM32_EVAL + 2 + CurPath/Project/STM32F10x_StdPeriph_Template/TrueSTUDIO/.metadata/Link + + + StdPeriph_Driver + 2 + CurPath/Project/STM32F10x_StdPeriph_Template/TrueSTUDIO/.metadata/Link + + + TrueSTUDIO + 2 + CurPath/Project/STM32F10x_StdPeriph_Template/TrueSTUDIO/.metadata/Link + + + User + 2 + CurPath/Project/STM32F10x_StdPeriph_Template/TrueSTUDIO/.metadata/Link + + + CMSIS/core_cm3.c + 1 + CurPath/Libraries/CMSIS/CM3/CoreSupport/core_cm3.c + + + CMSIS/system_stm32f10x.c + 1 + CurPath/Project/STM32F10x_StdPeriph_Template/system_stm32f10x.c + + + Doc/readme.txt + 1 + CurPath/Project/STM32F10x_StdPeriph_Template/TrueSTUDIO/STM3210E-EVAL/readme.txt + + + STM32_EVAL/stm3210e_eval_fsmc_nand.c + 1 + CurPath/Utilities/STM32_EVAL/STM3210E_EVAL/stm3210e_eval_fsmc_nand.c + + + STM32_EVAL/stm3210e_eval_fsmc_nor.c + 1 + CurPath/Utilities/STM32_EVAL/STM3210E_EVAL/stm3210e_eval_fsmc_nor.c + + + STM32_EVAL/stm3210e_eval_fsmc_sram.c + 1 + CurPath/Utilities/STM32_EVAL/STM3210E_EVAL/stm3210e_eval_fsmc_sram.c + + + STM32_EVAL/stm3210e_eval_lcd.c + 1 + CurPath/Utilities/STM32_EVAL/STM3210E_EVAL/stm3210e_eval_lcd.c + + + STM32_EVAL/stm32_eval.c + 1 + CurPath/Utilities/STM32_EVAL/stm32_eval.c + + + STM32_EVAL/stm32_eval_i2c_ee.c + 1 + CurPath/Utilities/STM32_EVAL/Common/stm32_eval_i2c_ee.c + + + STM32_EVAL/stm32_eval_i2c_tsensor.c + 1 + CurPath/Utilities/STM32_EVAL/Common/stm32_eval_i2c_tsensor.c + + + STM32_EVAL/stm32_eval_sdio_sd.c + 1 + CurPath/Utilities/STM32_EVAL/Common/stm32_eval_sdio_sd.c + + + STM32_EVAL/stm32_eval_spi_flash.c + 1 + CurPath/Utilities/STM32_EVAL/Common/stm32_eval_spi_flash.c + + + STM32_EVAL/stm32_eval_spi_sd.c + 1 + CurPath/Utilities/STM32_EVAL/Common/stm32_eval_spi_sd.c + + + StdPeriph_Driver/misc.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/misc.c + + + StdPeriph_Driver/stm32f10x_adc.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_adc.c + + + StdPeriph_Driver/stm32f10x_bkp.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_bkp.c + + + StdPeriph_Driver/stm32f10x_can.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_can.c + + + StdPeriph_Driver/stm32f10x_cec.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_cec.c + + + StdPeriph_Driver/stm32f10x_crc.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_crc.c + + + StdPeriph_Driver/stm32f10x_dac.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_dac.c + + + StdPeriph_Driver/stm32f10x_dbgmcu.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_dbgmcu.c + + + StdPeriph_Driver/stm32f10x_dma.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c + + + StdPeriph_Driver/stm32f10x_exti.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_exti.c + + + StdPeriph_Driver/stm32f10x_flash.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_flash.c + + + StdPeriph_Driver/stm32f10x_fsmc.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c + + + StdPeriph_Driver/stm32f10x_gpio.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_gpio.c + + + StdPeriph_Driver/stm32f10x_i2c.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_i2c.c + + + StdPeriph_Driver/stm32f10x_iwdg.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_iwdg.c + + + StdPeriph_Driver/stm32f10x_pwr.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_pwr.c + + + StdPeriph_Driver/stm32f10x_rcc.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c + + + StdPeriph_Driver/stm32f10x_rtc.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_rtc.c + + + StdPeriph_Driver/stm32f10x_sdio.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_sdio.c + + + StdPeriph_Driver/stm32f10x_spi.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_spi.c + + + StdPeriph_Driver/stm32f10x_tim.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_tim.c + + + StdPeriph_Driver/stm32f10x_usart.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_usart.c + + + StdPeriph_Driver/stm32f10x_wwdg.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_wwdg.c + + + TrueSTUDIO/startup_stm32f10x_hd.s + 1 + CurPath/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/TrueSTUDIO/startup_stm32f10x_hd.s + + + User/main.c + 1 + CurPath/Project/STM32F10x_StdPeriph_Template/main.c + + + User/stm32f10x_it.c + 1 + CurPath/Project/STM32F10x_StdPeriph_Template/stm32f10x_it.c + + + diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210E-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210E-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs new file mode 100644 index 0000000000000000000000000000000000000000..79946f688680f9a446fe9f12821db0738980000f --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210E-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs @@ -0,0 +1,11 @@ +#Tue Jul 13 09:06:52 GMT+01:00 2010 +BOARD=STM3210E-EVAL +CODE_LOCATION=FLASH +ENDIAN=Little-endian +MCU=STM32F103ZE +MODEL=Lite +PROBE=ST-LINK +PROJECT_FORMAT_VERSION=1 +TARGET=STM32 +VERSION=1.4.0 +eclipse.preferences.version=1 diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210E-EVAL/readme.txt b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210E-EVAL/readme.txt new file mode 100644 index 0000000000000000000000000000000000000000..3fd5c11209c0642ba73ad5a11439218b471708a6 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210E-EVAL/readme.txt @@ -0,0 +1,71 @@ +/** + @page TrueSTUDIO_STM3210E TrueSTUDIO Project Template for High-density devices + + @verbatim + ******************** (C) COPYRIGHT 2011 STMicroelectronics ******************* + * @file readme.txt + * @author MCD Application Team + * @version V3.5.0 + * @date 08-April-2011 + * @brief This sub directory contains all the user modifiable files + * needed to create a new project linked with the STM32F10x + * Standard Peripheral Library and working with TrueSTUDIO software + * toolchain (Version 2.0.1 and later) + ****************************************************************************** + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. + * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, + * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE + * CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING + * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + ****************************************************************************** + @endverbatim + + @par Directory contents + + - project .cproject/.project: A pre-configured project file with the provided + library structure that produces an executable + image with TrueSTUDIO. + + - stm32_flash.ld: This file is the TrueSTUDIO linker script used to + place program code (readonly) in internal FLASH + and data (readwrite, Stack and Heap)in internal + SRAM. + You can customize this file to your need. + + @par How to use it ? + + - Open the TrueSTUDIO toolchain. + - Click on File->Switch Workspace->Other and browse to TrueSTUDIO workspace + directory. + - Click on File->Import, select General->'Existing Projects into Workspace' + and then click "Next". + - Browse to the TrueSTUDIO workspace directory and select the project: + - STM3210E-EVAL: to configure the project for STM32 High-density devices. + - Under Windows->Preferences->General->Workspace->Linked Resources, add + a variable path named "CurPath" which points to the folder containing + "Libraries", "Project" and "Utilities" folders. + - Rebuild all project files: Select the project in the "Project explorer" + window then click on Project->build project menu. + - Run program: Select the project in the "Project explorer" window then click + Run->Debug (F11) + +@note + - Low-density Value line devices are STM32F100xx microcontrollers where the + Flash memory density ranges between 16 and 32 Kbytes. + - Low-density devices are STM32F101xx, STM32F102xx and STM32F103xx + microcontrollers where the Flash memory density ranges between 16 and 32 Kbytes. + - Medium-density Value line devices are STM32F100xx microcontrollers where + the Flash memory density ranges between 32 and 128 Kbytes. + - Medium-density devices are STM32F101xx, STM32F102xx and STM32F103xx + microcontrollers where the Flash memory density ranges between 32 and 128 Kbytes. + - High-density Value line devices are STM32F100xx microcontrollers where + the Flash memory density ranges between 256 and 512 Kbytes. + - High-density devices are STM32F101xx and STM32F103xx microcontrollers where + the Flash memory density ranges between 256 and 512 Kbytes. + - XL-density devices are STM32F101xx and STM32F103xx microcontrollers where + the Flash memory density ranges between 512 and 1024 Kbytes. + - Connectivity line devices are STM32F105xx and STM32F107xx microcontrollers. + + *

© COPYRIGHT 2011 STMicroelectronics

+ */ diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210E-EVAL/stm32_flash.ld b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210E-EVAL/stm32_flash.ld new file mode 100644 index 0000000000000000000000000000000000000000..61fe99ff3a23e9066fc10e24c9e691120039b9bd --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210E-EVAL/stm32_flash.ld @@ -0,0 +1,170 @@ +/* +***************************************************************************** +** +** File : stm32_flash.ld +** +** Abstract : Linker script for STM32F103ZE Device with +** 512KByte FLASH, 64KByte RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Environment : Atollic TrueSTUDIO(R) +** +** Distribution: The file is distributed 揳s is, without any warranty +** of any kind. +** +** (c)Copyright Atollic AB. +** You may use this file as-is or modify it according to the needs of your +** project. Distribution of this file (unmodified or modified) is not +** permitted. Atollic AB permit registered Atollic TrueSTUDIO(R) users the +** rights to distribute the assembled, compiled & linked contents of this +** file as part of an application binary file, provided that it is built +** using the Atollic TrueSTUDIO(R) toolchain. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x20010000; /* end of 64K RAM */ + +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0; /* required amount of heap */ +_Min_Stack_Size = 0x200; /* required amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K + MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH + .ARM : { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .ARM.attributes : { *(.ARM.attributes) } > FLASH + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(.fini_array*)) + KEEP (*(SORT(.fini_array.*))) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = .; + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : AT ( _sidata ) + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >RAM + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + PROVIDE ( end = _ebss ); + PROVIDE ( _end = _ebss ); + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(4); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(4); + } >RAM + + /* MEMORY_bank1 section, code must be located here explicitly */ + /* Example: extern int foo(void) __attribute__ ((section (".mb1text"))); */ + .memory_b1_text : + { + *(.mb1text) /* .mb1text sections (code) */ + *(.mb1text*) /* .mb1text* sections (code) */ + *(.mb1rodata) /* read-only data (constants) */ + *(.mb1rodata*) + } >MEMORY_B1 + + /* Remove information from the standard libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } +} diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210E-EVAL_XL/.cproject b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210E-EVAL_XL/.cproject new file mode 100644 index 0000000000000000000000000000000000000000..869a4f829bd28151d0f60967ee30d9c1ae75cdea --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210E-EVAL_XL/.cproject @@ -0,0 +1,269 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210E-EVAL_XL/.project b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210E-EVAL_XL/.project new file mode 100644 index 0000000000000000000000000000000000000000..c5f433c1a19d7860166ebf84897a728642093f8a --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210E-EVAL_XL/.project @@ -0,0 +1,296 @@ + + + STM3210E-EVAL_XL + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.buildArguments + + + + org.eclipse.cdt.make.core.buildCommand + make + + + org.eclipse.cdt.make.core.buildLocation + ${workspace_loc:/STM32F103ZG/Debug} + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + CMSIS + 2 + CurPath/Project/STM32F10x_StdPeriph_Template/TrueSTUDIO/.metadata/Link + + + Doc + 2 + CurPath/Project/STM32F10x_StdPeriph_Template/TrueSTUDIO/.metadata/Link + + + STM32_EVAL + 2 + CurPath/Project/STM32F10x_StdPeriph_Template/TrueSTUDIO/.metadata/Link + + + StdPeriph_Driver + 2 + CurPath/Project/STM32F10x_StdPeriph_Template/TrueSTUDIO/.metadata/Link + + + TrueSTUDIO + 2 + CurPath/Project/STM32F10x_StdPeriph_Template/TrueSTUDIO/.metadata/Link + + + User + 2 + CurPath/Project/STM32F10x_StdPeriph_Template/TrueSTUDIO/.metadata/Link + + + CMSIS/core_cm3.c + 1 + CurPath/Libraries/CMSIS/CM3/CoreSupport/core_cm3.c + + + CMSIS/system_stm32f10x.c + 1 + CurPath/Project/STM32F10x_StdPeriph_Template/system_stm32f10x.c + + + Doc/readme.txt + 1 + CurPath/Project/STM32F10x_StdPeriph_Template/TrueSTUDIO/STM3210E-EVAL_XL/readme.txt + + + STM32_EVAL/stm3210e_eval_fsmc_nand.c + 1 + CurPath/Utilities/STM32_EVAL/STM3210E_EVAL/stm3210e_eval_fsmc_nand.c + + + STM32_EVAL/stm3210e_eval_fsmc_nor.c + 1 + CurPath/Utilities/STM32_EVAL/STM3210E_EVAL/stm3210e_eval_fsmc_nor.c + + + STM32_EVAL/stm3210e_eval_fsmc_sram.c + 1 + CurPath/Utilities/STM32_EVAL/STM3210E_EVAL/stm3210e_eval_fsmc_sram.c + + + STM32_EVAL/stm3210e_eval_lcd.c + 1 + CurPath/Utilities/STM32_EVAL/STM3210E_EVAL/stm3210e_eval_lcd.c + + + STM32_EVAL/stm32_eval.c + 1 + CurPath/Utilities/STM32_EVAL/stm32_eval.c + + + STM32_EVAL/stm32_eval_i2c_ee.c + 1 + CurPath/Utilities/STM32_EVAL/Common/stm32_eval_i2c_ee.c + + + STM32_EVAL/stm32_eval_i2c_tsensor.c + 1 + CurPath/Utilities/STM32_EVAL/Common/stm32_eval_i2c_tsensor.c + + + STM32_EVAL/stm32_eval_sdio_sd.c + 1 + CurPath/Utilities/STM32_EVAL/Common/stm32_eval_sdio_sd.c + + + STM32_EVAL/stm32_eval_spi_flash.c + 1 + CurPath/Utilities/STM32_EVAL/Common/stm32_eval_spi_flash.c + + + STM32_EVAL/stm32_eval_spi_sd.c + 1 + CurPath/Utilities/STM32_EVAL/Common/stm32_eval_spi_sd.c + + + StdPeriph_Driver/misc.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/misc.c + + + StdPeriph_Driver/stm32f10x_adc.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_adc.c + + + StdPeriph_Driver/stm32f10x_bkp.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_bkp.c + + + StdPeriph_Driver/stm32f10x_can.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_can.c + + + StdPeriph_Driver/stm32f10x_cec.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_cec.c + + + StdPeriph_Driver/stm32f10x_crc.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_crc.c + + + StdPeriph_Driver/stm32f10x_dac.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_dac.c + + + StdPeriph_Driver/stm32f10x_dbgmcu.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_dbgmcu.c + + + StdPeriph_Driver/stm32f10x_dma.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c + + + StdPeriph_Driver/stm32f10x_exti.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_exti.c + + + StdPeriph_Driver/stm32f10x_flash.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_flash.c + + + StdPeriph_Driver/stm32f10x_fsmc.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c + + + StdPeriph_Driver/stm32f10x_gpio.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_gpio.c + + + StdPeriph_Driver/stm32f10x_i2c.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_i2c.c + + + StdPeriph_Driver/stm32f10x_iwdg.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_iwdg.c + + + StdPeriph_Driver/stm32f10x_pwr.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_pwr.c + + + StdPeriph_Driver/stm32f10x_rcc.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c + + + StdPeriph_Driver/stm32f10x_rtc.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_rtc.c + + + StdPeriph_Driver/stm32f10x_sdio.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_sdio.c + + + StdPeriph_Driver/stm32f10x_spi.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_spi.c + + + StdPeriph_Driver/stm32f10x_tim.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_tim.c + + + StdPeriph_Driver/stm32f10x_usart.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_usart.c + + + StdPeriph_Driver/stm32f10x_wwdg.c + 1 + CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_wwdg.c + + + TrueSTUDIO/startup_stm32f10x_xl.s + 1 + CurPath/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/TrueSTUDIO/startup_stm32f10x_xl.s + + + User/main.c + 1 + CurPath/Project/STM32F10x_StdPeriph_Template/main.c + + + User/stm32f10x_it.c + 1 + CurPath/Project/STM32F10x_StdPeriph_Template/stm32f10x_it.c + + + diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210E-EVAL_XL/.settings/com.atollic.truestudio.debug.hardware_device.prefs b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210E-EVAL_XL/.settings/com.atollic.truestudio.debug.hardware_device.prefs new file mode 100644 index 0000000000000000000000000000000000000000..a3b660662fdeb36a6b82a17d45c3d8032b02cc36 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210E-EVAL_XL/.settings/com.atollic.truestudio.debug.hardware_device.prefs @@ -0,0 +1,11 @@ +#Tue Jul 13 09:06:52 GMT+01:00 2010 +BOARD=STM3210E-EVAL +CODE_LOCATION=FLASH +ENDIAN=Little-endian +MCU=STM32F103ZG +MODEL=Lite +PROBE=ST-LINK +PROJECT_FORMAT_VERSION=1 +TARGET=STM32 +VERSION=1.4.0 +eclipse.preferences.version=1 diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210E-EVAL_XL/readme.txt b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210E-EVAL_XL/readme.txt new file mode 100644 index 0000000000000000000000000000000000000000..0fd565f805e1d6243ee315213f0f3bfe63328be1 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210E-EVAL_XL/readme.txt @@ -0,0 +1,71 @@ +/** + @page TrueSTUDIO_STM3210E_XL TrueSTUDIO Project Template for XL-density devices + + @verbatim + ******************** (C) COPYRIGHT 2011 STMicroelectronics ******************* + * @file readme.txt + * @author MCD Application Team + * @version V3.5.0 + * @date 08-April-2011 + * @brief This sub directory contains all the user modifiable files + * needed to create a new project linked with the STM32F10x + * Standard Peripheral Library and working with TrueSTUDIO software + * toolchain (Version 2.0.1 and later) + ****************************************************************************** + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. + * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, + * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE + * CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING + * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + ****************************************************************************** + @endverbatim + + @par Directory contents + + - project .cproject/.project: A pre-configured project file with the provided + library structure that produces an executable + image with TrueSTUDIO. + + - stm32_flash.ld: This file is the TrueSTUDIO linker script used to + place program code (readonly) in internal FLASH + and data (readwrite, Stack and Heap)in internal + SRAM. + You can customize this file to your need. + + @par How to use it ? + + - Open the TrueSTUDIO toolchain. + - Click on File->Switch Workspace->Other and browse to TrueSTUDIO workspace + directory. + - Click on File->Import, select General->'Existing Projects into Workspace' + and then click "Next". + - Browse to the TrueSTUDIO workspace directory and select the project: + - STM3210E-EVAL_XL: to configure the project for STM32 XL-density devices. + - Under Windows->Preferences->General->Workspace->Linked Resources, add + a variable path named "CurPath" which points to the folder containing + "Libraries", "Project" and "Utilities" folders. + - Rebuild all project files: Select the project in the "Project explorer" + window then click on Project->build project menu. + - Run program: Select the project in the "Project explorer" window then click + Run->Debug (F11) + +@note + - Low-density Value line devices are STM32F100xx microcontrollers where the + Flash memory density ranges between 16 and 32 Kbytes. + - Low-density devices are STM32F101xx, STM32F102xx and STM32F103xx + microcontrollers where the Flash memory density ranges between 16 and 32 Kbytes. + - Medium-density Value line devices are STM32F100xx microcontrollers where + the Flash memory density ranges between 32 and 128 Kbytes. + - Medium-density devices are STM32F101xx, STM32F102xx and STM32F103xx + microcontrollers where the Flash memory density ranges between 32 and 128 Kbytes. + - High-density Value line devices are STM32F100xx microcontrollers where + the Flash memory density ranges between 256 and 512 Kbytes. + - High-density devices are STM32F101xx and STM32F103xx microcontrollers where + the Flash memory density ranges between 256 and 512 Kbytes. + - XL-density devices are STM32F101xx and STM32F103xx microcontrollers where + the Flash memory density ranges between 512 and 1024 Kbytes. + - Connectivity line devices are STM32F105xx and STM32F107xx microcontrollers. + + *

© COPYRIGHT 2011 STMicroelectronics

+ */ diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210E-EVAL_XL/stm32_flash.ld b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210E-EVAL_XL/stm32_flash.ld new file mode 100644 index 0000000000000000000000000000000000000000..ecf664627cac630e9b1563ea3bd7177a2367ef25 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/STM3210E-EVAL_XL/stm32_flash.ld @@ -0,0 +1,170 @@ +/* +***************************************************************************** +** +** File : stm32_flash.ld +** +** Abstract : Linker script for STM32F103ZG Device with +** 1MByte FLASH, 96KByte RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Environment : Atollic TrueSTUDIO(R) +** +** Distribution: The file is distributed 揳s is, without any warranty +** of any kind. +** +** (c)Copyright Atollic AB. +** You may use this file as-is or modify it according to the needs of your +** project. Distribution of this file (unmodified or modified) is not +** permitted. Atollic AB permit registered Atollic TrueSTUDIO(R) users the +** rights to distribute the assembled, compiled & linked contents of this +** file as part of an application binary file, provided that it is built +** using the Atollic TrueSTUDIO(R) toolchain. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x20018000; /* end of 96K RAM */ + +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0; /* required amount of heap */ +_Min_Stack_Size = 0x200; /* required amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1M + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 96K + MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH + .ARM : { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .ARM.attributes : { *(.ARM.attributes) } > FLASH + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(.fini_array*)) + KEEP (*(SORT(.fini_array.*))) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = .; + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : AT ( _sidata ) + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >RAM + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + PROVIDE ( end = _ebss ); + PROVIDE ( _end = _ebss ); + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(4); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(4); + } >RAM + + /* MEMORY_bank1 section, code must be located here explicitly */ + /* Example: extern int foo(void) __attribute__ ((section (".mb1text"))); */ + .memory_b1_text : + { + *(.mb1text) /* .mb1text sections (code) */ + *(.mb1text*) /* .mb1text* sections (code) */ + *(.mb1rodata) /* read-only data (constants) */ + *(.mb1rodata*) + } >MEMORY_B1 + + /* Remove information from the standard libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } +} diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/note.txt b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/note.txt new file mode 100644 index 0000000000000000000000000000000000000000..90e46d26141de5e8ac5089c215ccddd157de58f6 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/note.txt @@ -0,0 +1,75 @@ +/** + @page note Note for TrueSTUDIO + + @verbatim + ******************** (C) COPYRIGHT 2011 STMicroelectronics ******************** + * @file note.txt + * @author MCD Application Team + * @version V3.5.0 + * @date 08-April-2011 + * @brief This file contains the needed step to use "printf" with TrueSTUDIO + * toolchain. + ****************************************************************************** + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. + * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, + * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE + * CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING + * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + ****************************************************************************** + @endverbatim + +The C runtime library include many functions, including some that typically +handle I/O. The I/O related runtime functions include printf(), fopen(), fclose(), +and many others. + +It is common to redirect the I/O from these functions to the actual embedded +platform, such as redirecting printf() output to an LCD display or a serial cable, +or to redirect file operations like fopen() and fclose() to some Flash file +system middleware. + +The free Lite version of TrueSTUDIO do not support I/O redirection, and instead +have do-nothing stubs compiled into the C runtime library. + +To support printf() redirection in the professional version, you should do the following: + - Open TrueSTUDIO professional and load your project. + - In the Project explorer, Right click on the project and select New->Other... + - Expand System calls + - Select Minimal System Calls Implementation and click next. + - Click on Finish and verify that "syscalls.c" is added to your project. + - Add the following code in the _write() function in "syscalls.c". + + @code + /*****************************************/ + int Index; + + for (Index = 0; Index < len; Index++) + { + __io_putchar( *ptr++ ); + } + + return len; + /*****************************************/ + @endcode + + - Finally, Rebuild your project. + +@note + - Low-density Value line devices are STM32F100xx microcontrollers where the + Flash memory density ranges between 16 and 32 Kbytes. + - Low-density devices are STM32F101xx, STM32F102xx and STM32F103xx + microcontrollers where the Flash memory density ranges between 16 and 32 Kbytes. + - Medium-density Value line devices are STM32F100xx microcontrollers where + the Flash memory density ranges between 32 and 128 Kbytes. + - Medium-density devices are STM32F101xx, STM32F102xx and STM32F103xx + microcontrollers where the Flash memory density ranges between 32 and 128 Kbytes. + - High-density Value line devices are STM32F100xx microcontrollers where the + Flash memory density ranges between 256 and 512 Kbytes. + - High-density devices are STM32F101xx and STM32F103xx microcontrollers where + the Flash memory density ranges between 256 and 512 Kbytes. + - XL-density devices are STM32F101xx and STM32F103xx microcontrollers where + the Flash memory density ranges between 512 and 1024 Kbytes. + - Connectivity line devices are STM32F105xx and STM32F107xx microcontrollers. + + *

© COPYRIGHT 2011 STMicroelectronics

+ */ diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/stm32f10x_flash_extsram.ld b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/stm32f10x_flash_extsram.ld new file mode 100644 index 0000000000000000000000000000000000000000..1431182bb8f7a01cee506f5c3879f7040ef9c395 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/TrueSTUDIO/stm32f10x_flash_extsram.ld @@ -0,0 +1,170 @@ +/* +***************************************************************************** +** +** File : stm32f10x_flash_extsram.ld +** +** Abstract : Linker script for STM32F10x XL-density Devices with +** 1MByte FLASH, 96KByte RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Environment : Atollic TrueSTUDIO(R) +** +** Distribution: The file is distributed 揳s is, without any warranty +** of any kind. +** +** (c)Copyright Atollic AB. +** You may use this file as-is or modify it according to the needs of your +** project. Distribution of this file (unmodified or modified) is not +** permitted. Atollic AB permit registered Atollic TrueSTUDIO(R) users the +** rights to distribute the assembled, compiled & linked contents of this +** file as part of an application binary file, provided that it is built +** using the Atollic TrueSTUDIO(R) toolchain. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x68100000; /* end of 1024K RAM */ + +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0; /* required amount of heap */ +_Min_Stack_Size = 0x200; /* required amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K + RAM (xrw) : ORIGIN = 0x68000000, LENGTH = 1024K + MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH + .ARM : { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .ARM.attributes : { *(.ARM.attributes) } > FLASH + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(.fini_array*)) + KEEP (*(SORT(.fini_array.*))) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = .; + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : AT ( _sidata ) + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >RAM + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + PROVIDE ( end = _ebss ); + PROVIDE ( _end = _ebss ); + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(4); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(4); + } >RAM + + /* MEMORY_bank1 section, code must be located here explicitly */ + /* Example: extern int foo(void) __attribute__ ((section (".mb1text"))); */ + .memory_b1_text : + { + *(.mb1text) /* .mb1text sections (code) */ + *(.mb1text*) /* .mb1text* sections (code) */ + *(.mb1rodata) /* read-only data (constants) */ + *(.mb1rodata*) + } >MEMORY_B1 + + /* Remove information from the standard libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } +} diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/main.c b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/main.c new file mode 100644 index 0000000000000000000000000000000000000000..9f2a28450c84163f7e1ea7aca5b2afe106e5ffca --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/main.c @@ -0,0 +1,235 @@ +/** + ****************************************************************************** + * @file Project/STM32F10x_StdPeriph_Template/main.c + * @author MCD Application Team + * @version V3.5.0 + * @date 08-April-2011 + * @brief Main program body + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" +#include "stm32_eval.h" +#include + +#include "driver.h" + +#ifdef USE_STM32100B_EVAL + #include "stm32100b_eval_lcd.h" +#elif defined USE_STM3210B_EVAL + #include "stm3210b_eval_lcd.h" +#elif defined USE_STM3210E_EVAL + #include "stm3210e_eval_lcd.h" +#elif defined USE_STM3210C_EVAL + #include "stm3210c_eval_lcd.h" +#elif defined USE_STM32100E_EVAL + #include "stm32100e_eval_lcd.h" +#endif + +/** @addtogroup STM32F10x_StdPeriph_Template + * @{ + */ + +/* Private typedef -----------------------------------------------------------*/ +/* Private define ------------------------------------------------------------*/ +#ifdef USE_STM32100B_EVAL + #define MESSAGE1 "STM32 MD Value Line " + #define MESSAGE2 " Device running on " + #define MESSAGE3 " STM32100B-EVAL " +#elif defined (USE_STM3210B_EVAL) + #define MESSAGE1 "STM32 Medium Density" + #define MESSAGE2 " Device running on " + #define MESSAGE3 " STM3210B-EVAL " +#elif defined (STM32F10X_XL) && defined (USE_STM3210E_EVAL) + #define MESSAGE1 " STM32 XL Density " + #define MESSAGE2 " Device running on " + #define MESSAGE3 " STM3210E-EVAL " +#elif defined (USE_STM3210E_EVAL) + #define MESSAGE1 " STM32 High Density " + #define MESSAGE2 " Device running on " + #define MESSAGE3 " STM3210E-EVAL " +#elif defined (USE_STM3210C_EVAL) + #define MESSAGE1 " STM32 Connectivity " + #define MESSAGE2 " Line Device running" + #define MESSAGE3 " on STM3210C-EVAL " +#elif defined (USE_STM32100E_EVAL) + #define MESSAGE1 "STM32 HD Value Line " + #define MESSAGE2 " Device running on " + #define MESSAGE3 " STM32100E-EVAL " +#endif + +/* Private macro -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ + USART_InitTypeDef USART_InitStructure; + + #define BUFF_SIZE sizeof(Buffer) //数据长度 + const u8 Buffer[]={"LITING success\r\n"}; //写入24c02的数据 +/* Private function prototypes -----------------------------------------------*/ +#ifdef __GNUC__ +/* With GCC/RAISONANCE, small printf (option LD Linker->Libraries->Small printf + set to 'Yes') calls __io_putchar() */ +#define PUTCHAR_PROTOTYPE int __io_putchar(int ch) +#else +#define PUTCHAR_PROTOTYPE int fputc(int ch, FILE *f) +#endif /* __GNUC__ */ + +/* Private functions ---------------------------------------------------------*/ + +/** + * @brief Main program. + * @param None + * @retval None + */ +int main(void) +{ + /*!< At this stage the microcontroller clock setting is already configured, + this is done through SystemInit() function which is called from startup + file (startup_stm32f10x_xx.s) before to branch to application main. + To reconfigure the default setting of SystemInit() function, refer to + system_stm32f10x.c file + */ + Drv_initDeviceHardware(); + + /* Initialize LEDs, Key Button, LCD and COM port(USART) available on STM3210X-EVAL board */ + STM_EVAL_LEDInit(LED1); + STM_EVAL_LEDInit(LED2); + STM_EVAL_LEDInit(LED3); + + /* USARTx configured as follow: + - BaudRate = 115200 baud + - Word Length = 8 Bits + - One Stop Bit + - No parity + - Hardware flow control disabled (RTS and CTS signals) + - Receive and transmit enabled + */ + USART_InitStructure.USART_BaudRate = 115200; + USART_InitStructure.USART_WordLength = USART_WordLength_8b; + USART_InitStructure.USART_StopBits = USART_StopBits_1; + USART_InitStructure.USART_Parity = USART_Parity_No; + USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; + USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; + + STM_EVAL_COMInit(COM2, &USART_InitStructure); //根据使用的UART口设置 + + + /* Initialize the LCD */ +#ifdef USE_STM32100B_EVAL + STM32100B_LCD_Init(); +#elif defined (USE_STM3210B_EVAL) + STM3210B_LCD_Init(); +#elif defined (USE_STM3210E_EVAL) + STM3210E_LCD_Init(); +#elif defined (USE_STM3210C_EVAL) + //STM3210C_LCD_Init(); +#elif defined (USE_STM32100E_EVAL) + STM32100E_LCD_Init(); +#endif + + /* Retarget the C library printf function to the USARTx, can be USART1 or USART2 + depending on the EVAL board you are using ********************************/ + printf("\n\r %s", MESSAGE1); + printf(" %s", MESSAGE2); + printf(" %s\n\r", MESSAGE3); + + /* Turn on leds available on STM3210X-EVAL **********************************/ + STM_EVAL_LEDOn(LED1); + STM_EVAL_LEDOn(LED2); + STM_EVAL_LEDOn(LED3); + STM_EVAL_LEDOn(LED4); + + // 数据库初始化 + Core_initDBS(1); + printf("DBS init. finished."); + + /* Infinite loop */ + while (1) + { + uint8_t par_data1 = 0; + uint32_t length = 0; + uint32_t size = 0; + uint8_t buffer[64] = {0}; + uint8_t buffer1[64] = {0}; + uint32_t plen = 0; + uint8_t bufval[2] = {0xAA,0xAB}; + int i = 0; + + //获取参数内容 + Dbs_getParValue(dbs_par_pk_data1, &par_data1, &length); + + printf("UID:"); + Dbs_getParValue(dbs_par_pk_data4, buffer, &size); + printf(" %s\n\r", buffer); + + //设置参数 + for (i=0;i<3;i++) + { + Dbs_setParValue(dbs_par_pk_data5, &bufval[i], 2); + } + printf("DATA5:"); + Dbs_getParValue(dbs_par_pk_data5, buffer1, &size); + printf(" %s\n\r", buffer1); + + //获取参数长度 + Dbs_getParLength(dbs_par_pk_data4, &plen); + printf(" %s\n\r", (uint8_t *)plen); + } +} + +/** + * @brief Retargets the C library printf function to the USART. + * @param None + * @retval None + */ +PUTCHAR_PROTOTYPE +{ + /* Place your implementation of fputc here */ + /* e.g. write a character to the USART */ + USART_SendData(EVAL_COM2, (uint8_t) ch); //根据使用的UART口设置 + + /* Loop until the end of transmission */ + while (USART_GetFlagStatus(EVAL_COM2, USART_FLAG_TC) == RESET) //根据使用的UART口设置 + {} + + return ch; +} + +#ifdef USE_FULL_ASSERT + +/** + * @brief Reports the name of the source file and the source line number + * where the assert_param error has occurred. + * @param file: pointer to the source file name + * @param line: assert_param error line source number + * @retval None + */ +void assert_failed(uint8_t* file, uint32_t line) +{ + /* User can add his own implementation to report the file name and line number, + ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ + + /* Infinite loop */ + while (1) + { + } +} +#endif + +/** + * @} + */ + + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/stm32f10x_conf.h b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/stm32f10x_conf.h new file mode 100644 index 0000000000000000000000000000000000000000..cbb881984203311ff302cf50d05d4eefe433aa76 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/stm32f10x_conf.h @@ -0,0 +1,77 @@ +/** + ****************************************************************************** + * @file Project/STM32F10x_StdPeriph_Template/stm32f10x_conf.h + * @author MCD Application Team + * @version V3.5.0 + * @date 08-April-2011 + * @brief Library configuration file. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F10x_CONF_H +#define __STM32F10x_CONF_H + +/* Includes ------------------------------------------------------------------*/ +/* Uncomment/Comment the line below to enable/disable peripheral header file inclusion */ +#include "stm32f10x_adc.h" +#include "stm32f10x_bkp.h" +#include "stm32f10x_can.h" +#include "stm32f10x_cec.h" +#include "stm32f10x_crc.h" +#include "stm32f10x_dac.h" +#include "stm32f10x_dbgmcu.h" +#include "stm32f10x_dma.h" +#include "stm32f10x_exti.h" +#include "stm32f10x_flash.h" +#include "stm32f10x_fsmc.h" +#include "stm32f10x_gpio.h" +#include "stm32f10x_i2c.h" +#include "stm32f10x_iwdg.h" +#include "stm32f10x_pwr.h" +#include "stm32f10x_rcc.h" +#include "stm32f10x_rtc.h" +#include "stm32f10x_sdio.h" +#include "stm32f10x_spi.h" +#include "stm32f10x_tim.h" +#include "stm32f10x_usart.h" +#include "stm32f10x_wwdg.h" +#include "misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */ + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/* Uncomment the line below to expanse the "assert_param" macro in the + Standard Peripheral Library drivers code */ +/* #define USE_FULL_ASSERT 1 */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT + +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function which reports + * the name of the source file and the source line number of the call + * that failed. If expr is true, it returns no value. + * @retval None + */ + #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(uint8_t* file, uint32_t line); +#else + #define assert_param(expr) ((void)0) +#endif /* USE_FULL_ASSERT */ + +#endif /* __STM32F10x_CONF_H */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/stm32f10x_it.c b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/stm32f10x_it.c new file mode 100644 index 0000000000000000000000000000000000000000..dba48fc18ce9f1e44bdda689784e7dd91159e12f --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/stm32f10x_it.c @@ -0,0 +1,162 @@ +/** + ****************************************************************************** + * @file Project/STM32F10x_StdPeriph_Template/stm32f10x_it.c + * @author MCD Application Team + * @version V3.5.0 + * @date 08-April-2011 + * @brief Main Interrupt Service Routines. + * This file provides template for all exceptions handler and + * peripherals interrupt service routine. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x_it.h" +#include "driver.h" + +/** @addtogroup STM32F10x_StdPeriph_Template + * @{ + */ + +/* Private typedef -----------------------------------------------------------*/ +/* Private define ------------------------------------------------------------*/ +/* Private macro -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +/* Private function prototypes -----------------------------------------------*/ +/* Private functions ---------------------------------------------------------*/ + +/******************************************************************************/ +/* Cortex-M3 Processor Exceptions Handlers */ +/******************************************************************************/ + +/** + * @brief This function handles NMI exception. + * @param None + * @retval None + */ +void NMI_Handler(void) +{ +} + +/** + * @brief This function handles Hard Fault exception. + * @param None + * @retval None + */ +void HardFault_Handler(void) +{ + /* Go to infinite loop when Hard Fault exception occurs */ + while (1) + { + } +} + +/** + * @brief This function handles Memory Manage exception. + * @param None + * @retval None + */ +void MemManage_Handler(void) +{ + /* Go to infinite loop when Memory Manage exception occurs */ + while (1) + { + } +} + +/** + * @brief This function handles Bus Fault exception. + * @param None + * @retval None + */ +void BusFault_Handler(void) +{ + /* Go to infinite loop when Bus Fault exception occurs */ + while (1) + { + } +} + +/** + * @brief This function handles Usage Fault exception. + * @param None + * @retval None + */ +void UsageFault_Handler(void) +{ + /* Go to infinite loop when Usage Fault exception occurs */ + while (1) + { + } +} + +/** + * @brief This function handles SVCall exception. + * @param None + * @retval None + */ +void SVC_Handler(void) +{ +} + +/** + * @brief This function handles Debug Monitor exception. + * @param None + * @retval None + */ +void DebugMon_Handler(void) +{ +} + +/** + * @brief This function handles PendSVC exception. + * @param None + * @retval None + */ +void PendSV_Handler(void) +{ +} + +/** + * @brief This function handles SysTick Handler. + * @param None + * @retval None + */ +void SysTick_Handler(void) +{ + //Sytm_interruptHandler(); /* system tick interrupt handler */ +} + +/******************************************************************************/ +/* STM32F10x Peripherals Interrupt Handlers */ +/* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */ +/* available peripheral interrupt handler's name please refer to the startup */ +/* file (startup_stm32f10x_xx.s). */ +/******************************************************************************/ + +/** + * @brief This function handles PPP interrupt request. + * @param None + * @retval None + */ +/*void PPP_IRQHandler(void) +{ +}*/ + +/** + * @} + */ + + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/stm32f10x_it.h b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/stm32f10x_it.h new file mode 100644 index 0000000000000000000000000000000000000000..889026262252b8b9c5fdaf4b907f8ac109d75f59 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/stm32f10x_it.h @@ -0,0 +1,54 @@ +/** + ****************************************************************************** + * @file Project/STM32F10x_StdPeriph_Template/stm32f10x_it.h + * @author MCD Application Team + * @version V3.5.0 + * @date 08-April-2011 + * @brief This file contains the headers of the interrupt handlers. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F10x_IT_H +#define __STM32F10x_IT_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/* Exported macro ------------------------------------------------------------*/ +/* Exported functions ------------------------------------------------------- */ + +void NMI_Handler(void); +void HardFault_Handler(void); +void MemManage_Handler(void); +void BusFault_Handler(void); +void UsageFault_Handler(void); +void SVC_Handler(void); +void DebugMon_Handler(void); +void PendSV_Handler(void); +void SysTick_Handler(void); + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F10x_IT_H */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/system_stm32f10x.c b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/system_stm32f10x.c new file mode 100644 index 0000000000000000000000000000000000000000..d6875a3ca3c2354b62b6baed84071b7a010a3f97 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Database/system_stm32f10x.c @@ -0,0 +1,1094 @@ +/** + ****************************************************************************** + * @file system_stm32f10x.c + * @author MCD Application Team + * @version V3.5.0 + * @date 08-April-2011 + * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File. + * + * 1. This file provides two functions and one global variable to be called from + * user application: + * - SystemInit(): Setups the system clock (System clock source, PLL Multiplier + * factors, AHB/APBx prescalers and Flash settings). + * This function is called at startup just after reset and + * before branch to main program. This call is made inside + * the "startup_stm32f10x_xx.s" file. + * + * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used + * by the user application to setup the SysTick + * timer or configure other parameters. + * + * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must + * be called whenever the core clock is changed + * during program execution. + * + * 2. After each device reset the HSI (8 MHz) is used as system clock source. + * Then SystemInit() function is called, in "startup_stm32f10x_xx.s" file, to + * configure the system clock before to branch to main program. + * + * 3. If the system clock source selected by user fails to startup, the SystemInit() + * function will do nothing and HSI still used as system clock source. User can + * add some code to deal with this issue inside the SetSysClock() function. + * + * 4. The default value of HSE crystal is set to 8 MHz (or 25 MHz, depedning on + * the product used), refer to "HSE_VALUE" define in "stm32f10x.h" file. + * When HSE is used as system clock source, directly or through PLL, and you + * are using different crystal you have to adapt the HSE value to your own + * configuration. + * + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/** @addtogroup CMSIS + * @{ + */ + +/** @addtogroup stm32f10x_system + * @{ + */ + +/** @addtogroup STM32F10x_System_Private_Includes + * @{ + */ + +#include "stm32f10x.h" + +/** + * @} + */ + +/** @addtogroup STM32F10x_System_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32F10x_System_Private_Defines + * @{ + */ + +/*!< Uncomment the line corresponding to the desired System clock (SYSCLK) + frequency (after reset the HSI is used as SYSCLK source) + + IMPORTANT NOTE: + ============== + 1. After each device reset the HSI is used as System clock source. + + 2. Please make sure that the selected System clock doesn't exceed your device's + maximum frequency. + + 3. If none of the define below is enabled, the HSI is used as System clock + source. + + 4. The System clock configuration functions provided within this file assume that: + - For Low, Medium and High density Value line devices an external 8MHz + crystal is used to drive the System clock. + - For Low, Medium and High density devices an external 8MHz crystal is + used to drive the System clock. + - For Connectivity line devices an external 25MHz crystal is used to drive + the System clock. + If you are using different crystal you have to adapt those functions accordingly. + */ + +#if defined (STM32F10X_LD_VL) || (defined STM32F10X_MD_VL) || (defined STM32F10X_HD_VL) +/* #define SYSCLK_FREQ_HSE HSE_VALUE */ + #define SYSCLK_FREQ_24MHz 24000000 +#else +/* #define SYSCLK_FREQ_HSE HSE_VALUE */ +/* #define SYSCLK_FREQ_24MHz 24000000 */ +/* #define SYSCLK_FREQ_36MHz 36000000 */ +/* #define SYSCLK_FREQ_48MHz 48000000 */ +/* #define SYSCLK_FREQ_56MHz 56000000 */ +#define SYSCLK_FREQ_72MHz 72000000 +#endif + +/*!< Uncomment the following line if you need to use external SRAM mounted + on STM3210E-EVAL board (STM32 High density and XL-density devices) or on + STM32100E-EVAL board (STM32 High-density value line devices) as data memory */ +#if defined (STM32F10X_HD) || (defined STM32F10X_XL) || (defined STM32F10X_HD_VL) +/* #define DATA_IN_ExtSRAM */ +#endif + +/*!< Uncomment the following line if you need to relocate your vector Table in + Internal SRAM. */ +/* #define VECT_TAB_SRAM */ +#define VECT_TAB_OFFSET 0x0 /*!< Vector Table base offset field. + This value must be a multiple of 0x200. */ + + +/** + * @} + */ + +/** @addtogroup STM32F10x_System_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32F10x_System_Private_Variables + * @{ + */ + +/******************************************************************************* +* Clock Definitions +*******************************************************************************/ +#ifdef SYSCLK_FREQ_HSE + uint32_t SystemCoreClock = SYSCLK_FREQ_HSE; /*!< System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_24MHz + uint32_t SystemCoreClock = SYSCLK_FREQ_24MHz; /*!< System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_36MHz + uint32_t SystemCoreClock = SYSCLK_FREQ_36MHz; /*!< System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_48MHz + uint32_t SystemCoreClock = SYSCLK_FREQ_48MHz; /*!< System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_56MHz + uint32_t SystemCoreClock = SYSCLK_FREQ_56MHz; /*!< System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_72MHz + uint32_t SystemCoreClock = SYSCLK_FREQ_72MHz; /*!< System Clock Frequency (Core Clock) */ +#else /*!< HSI Selected as System Clock source */ + uint32_t SystemCoreClock = HSI_VALUE; /*!< System Clock Frequency (Core Clock) */ +#endif + +__I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; +/** + * @} + */ + +/** @addtogroup STM32F10x_System_Private_FunctionPrototypes + * @{ + */ + +static void SetSysClock(void); + +#ifdef SYSCLK_FREQ_HSE + static void SetSysClockToHSE(void); +#elif defined SYSCLK_FREQ_24MHz + static void SetSysClockTo24(void); +#elif defined SYSCLK_FREQ_36MHz + static void SetSysClockTo36(void); +#elif defined SYSCLK_FREQ_48MHz + static void SetSysClockTo48(void); +#elif defined SYSCLK_FREQ_56MHz + static void SetSysClockTo56(void); +#elif defined SYSCLK_FREQ_72MHz + static void SetSysClockTo72(void); +#endif + +#ifdef DATA_IN_ExtSRAM + static void SystemInit_ExtMemCtl(void); +#endif /* DATA_IN_ExtSRAM */ + +/** + * @} + */ + +/** @addtogroup STM32F10x_System_Private_Functions + * @{ + */ + +/** + * @brief Setup the microcontroller system + * Initialize the Embedded Flash Interface, the PLL and update the + * SystemCoreClock variable. + * @note This function should be used only after reset. + * @param None + * @retval None + */ +void SystemInit (void) +{ + /* Reset the RCC clock configuration to the default reset state(for debug purpose) */ + /* Set HSION bit */ + RCC->CR |= (uint32_t)0x00000001; + + /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */ +#ifndef STM32F10X_CL + RCC->CFGR &= (uint32_t)0xF8FF0000; +#else + RCC->CFGR &= (uint32_t)0xF0FF0000; +#endif /* STM32F10X_CL */ + + /* Reset HSEON, CSSON and PLLON bits */ + RCC->CR &= (uint32_t)0xFEF6FFFF; + + /* Reset HSEBYP bit */ + RCC->CR &= (uint32_t)0xFFFBFFFF; + + /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */ + RCC->CFGR &= (uint32_t)0xFF80FFFF; + +#ifdef STM32F10X_CL + /* Reset PLL2ON and PLL3ON bits */ + RCC->CR &= (uint32_t)0xEBFFFFFF; + + /* Disable all interrupts and clear pending bits */ + RCC->CIR = 0x00FF0000; + + /* Reset CFGR2 register */ + RCC->CFGR2 = 0x00000000; +#elif defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || (defined STM32F10X_HD_VL) + /* Disable all interrupts and clear pending bits */ + RCC->CIR = 0x009F0000; + + /* Reset CFGR2 register */ + RCC->CFGR2 = 0x00000000; +#else + /* Disable all interrupts and clear pending bits */ + RCC->CIR = 0x009F0000; +#endif /* STM32F10X_CL */ + +#if defined (STM32F10X_HD) || (defined STM32F10X_XL) || (defined STM32F10X_HD_VL) + #ifdef DATA_IN_ExtSRAM + SystemInit_ExtMemCtl(); + #endif /* DATA_IN_ExtSRAM */ +#endif + + /* Configure the System clock frequency, HCLK, PCLK2 and PCLK1 prescalers */ + /* Configure the Flash Latency cycles and enable prefetch buffer */ + SetSysClock(); + +#ifdef VECT_TAB_SRAM + SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ +#else + SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */ +#endif +} + +/** + * @brief Update SystemCoreClock variable according to Clock Register Values. + * The SystemCoreClock variable contains the core clock (HCLK), it can + * be used by the user application to setup the SysTick timer or configure + * other parameters. + * + * @note Each time the core clock (HCLK) changes, this function must be called + * to update SystemCoreClock variable value. Otherwise, any configuration + * based on this variable will be incorrect. + * + * @note - The system frequency computed by this function is not the real + * frequency in the chip. It is calculated based on the predefined + * constant and the selected clock source: + * + * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*) + * + * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**) + * + * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) + * or HSI_VALUE(*) multiplied by the PLL factors. + * + * (*) HSI_VALUE is a constant defined in stm32f1xx.h file (default value + * 8 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * + * (**) HSE_VALUE is a constant defined in stm32f1xx.h file (default value + * 8 MHz or 25 MHz, depedning on the product used), user has to ensure + * that HSE_VALUE is same as the real frequency of the crystal used. + * Otherwise, this function may have wrong result. + * + * - The result of this function could be not correct when using fractional + * value for HSE crystal. + * @param None + * @retval None + */ +void SystemCoreClockUpdate (void) +{ + uint32_t tmp = 0, pllmull = 0, pllsource = 0; + +#ifdef STM32F10X_CL + uint32_t prediv1source = 0, prediv1factor = 0, prediv2factor = 0, pll2mull = 0; +#endif /* STM32F10X_CL */ + +#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || (defined STM32F10X_HD_VL) + uint32_t prediv1factor = 0; +#endif /* STM32F10X_LD_VL or STM32F10X_MD_VL or STM32F10X_HD_VL */ + + /* Get SYSCLK source -------------------------------------------------------*/ + tmp = RCC->CFGR & RCC_CFGR_SWS; + + switch (tmp) + { + case 0x00: /* HSI used as system clock */ + SystemCoreClock = HSI_VALUE; + break; + case 0x04: /* HSE used as system clock */ + SystemCoreClock = HSE_VALUE; + break; + case 0x08: /* PLL used as system clock */ + + /* Get PLL clock source and multiplication factor ----------------------*/ + pllmull = RCC->CFGR & RCC_CFGR_PLLMULL; + pllsource = RCC->CFGR & RCC_CFGR_PLLSRC; + +#ifndef STM32F10X_CL + pllmull = ( pllmull >> 18) + 2; + + if (pllsource == 0x00) + { + /* HSI oscillator clock divided by 2 selected as PLL clock entry */ + SystemCoreClock = (HSI_VALUE >> 1) * pllmull; + } + else + { + #if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || (defined STM32F10X_HD_VL) + prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1; + /* HSE oscillator clock selected as PREDIV1 clock entry */ + SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull; + #else + /* HSE selected as PLL clock entry */ + if ((RCC->CFGR & RCC_CFGR_PLLXTPRE) != (uint32_t)RESET) + {/* HSE oscillator clock divided by 2 */ + SystemCoreClock = (HSE_VALUE >> 1) * pllmull; + } + else + { + SystemCoreClock = HSE_VALUE * pllmull; + } + #endif + } +#else + pllmull = pllmull >> 18; + + if (pllmull != 0x0D) + { + pllmull += 2; + } + else + { /* PLL multiplication factor = PLL input clock * 6.5 */ + pllmull = 13 / 2; + } + + if (pllsource == 0x00) + { + /* HSI oscillator clock divided by 2 selected as PLL clock entry */ + SystemCoreClock = (HSI_VALUE >> 1) * pllmull; + } + else + {/* PREDIV1 selected as PLL clock entry */ + + /* Get PREDIV1 clock source and division factor */ + prediv1source = RCC->CFGR2 & RCC_CFGR2_PREDIV1SRC; + prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1; + + if (prediv1source == 0) + { + /* HSE oscillator clock selected as PREDIV1 clock entry */ + SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull; + } + else + {/* PLL2 clock selected as PREDIV1 clock entry */ + + /* Get PREDIV2 division factor and PLL2 multiplication factor */ + prediv2factor = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> 4) + 1; + pll2mull = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> 8 ) + 2; + SystemCoreClock = (((HSE_VALUE / prediv2factor) * pll2mull) / prediv1factor) * pllmull; + } + } +#endif /* STM32F10X_CL */ + break; + + default: + SystemCoreClock = HSI_VALUE; + break; + } + + /* Compute HCLK clock frequency ----------------*/ + /* Get HCLK prescaler */ + tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; + /* HCLK clock frequency */ + SystemCoreClock >>= tmp; +} + +/** + * @brief Configures the System clock frequency, HCLK, PCLK2 and PCLK1 prescalers. + * @param None + * @retval None + */ +static void SetSysClock(void) +{ +#ifdef SYSCLK_FREQ_HSE + SetSysClockToHSE(); +#elif defined SYSCLK_FREQ_24MHz + SetSysClockTo24(); +#elif defined SYSCLK_FREQ_36MHz + SetSysClockTo36(); +#elif defined SYSCLK_FREQ_48MHz + SetSysClockTo48(); +#elif defined SYSCLK_FREQ_56MHz + SetSysClockTo56(); +#elif defined SYSCLK_FREQ_72MHz + SetSysClockTo72(); +#endif + + /* If none of the define above is enabled, the HSI is used as System clock + source (default after reset) */ +} + +/** + * @brief Setup the external memory controller. Called in startup_stm32f10x.s + * before jump to __main + * @param None + * @retval None + */ +#ifdef DATA_IN_ExtSRAM +/** + * @brief Setup the external memory controller. + * Called in startup_stm32f10x_xx.s/.c before jump to main. + * This function configures the external SRAM mounted on STM3210E-EVAL + * board (STM32 High density devices). This SRAM will be used as program + * data memory (including heap and stack). + * @param None + * @retval None + */ +void SystemInit_ExtMemCtl(void) +{ +/*!< FSMC Bank1 NOR/SRAM3 is used for the STM3210E-EVAL, if another Bank is + required, then adjust the Register Addresses */ + + /* Enable FSMC clock */ + RCC->AHBENR = 0x00000114; + + /* Enable GPIOD, GPIOE, GPIOF and GPIOG clocks */ + RCC->APB2ENR = 0x000001E0; + +/* --------------- SRAM Data lines, NOE and NWE configuration ---------------*/ +/*---------------- SRAM Address lines configuration -------------------------*/ +/*---------------- NOE and NWE configuration --------------------------------*/ +/*---------------- NE3 configuration ----------------------------------------*/ +/*---------------- NBL0, NBL1 configuration ---------------------------------*/ + + GPIOD->CRL = 0x44BB44BB; + GPIOD->CRH = 0xBBBBBBBB; + + GPIOE->CRL = 0xB44444BB; + GPIOE->CRH = 0xBBBBBBBB; + + GPIOF->CRL = 0x44BBBBBB; + GPIOF->CRH = 0xBBBB4444; + + GPIOG->CRL = 0x44BBBBBB; + GPIOG->CRH = 0x44444B44; + +/*---------------- FSMC Configuration ---------------------------------------*/ +/*---------------- Enable FSMC Bank1_SRAM Bank ------------------------------*/ + + FSMC_Bank1->BTCR[4] = 0x00001011; + FSMC_Bank1->BTCR[5] = 0x00000200; +} +#endif /* DATA_IN_ExtSRAM */ + +#ifdef SYSCLK_FREQ_HSE +/** + * @brief Selects HSE as System clock source and configure HCLK, PCLK2 + * and PCLK1 prescalers. + * @note This function should be used only after reset. + * @param None + * @retval None + */ +static void SetSysClockToHSE(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ + /* Enable HSE */ + RCC->CR |= ((uint32_t)RCC_CR_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CR & RCC_CR_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CR & RCC_CR_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { + +#if !defined STM32F10X_LD_VL && !defined STM32F10X_MD_VL && !defined STM32F10X_HD_VL + /* Enable Prefetch Buffer */ + FLASH->ACR |= FLASH_ACR_PRFTBE; + + /* Flash 0 wait state */ + FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); + +#ifndef STM32F10X_CL + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0; +#else + if (HSE_VALUE <= 24000000) + { + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0; + } + else + { + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1; + } +#endif /* STM32F10X_CL */ +#endif + + /* HCLK = SYSCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; + + /* PCLK2 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; + + /* PCLK1 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1; + + /* Select HSE as system clock source */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); + RCC->CFGR |= (uint32_t)RCC_CFGR_SW_HSE; + + /* Wait till HSE is used as system clock source */ + while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x04) + { + } + } + else + { /* If HSE fails to start-up, the application will have wrong clock + configuration. User can add here some code to deal with this error */ + } +} +#elif defined SYSCLK_FREQ_24MHz +/** + * @brief Sets System clock frequency to 24MHz and configure HCLK, PCLK2 + * and PCLK1 prescalers. + * @note This function should be used only after reset. + * @param None + * @retval None + */ +static void SetSysClockTo24(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ + /* Enable HSE */ + RCC->CR |= ((uint32_t)RCC_CR_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CR & RCC_CR_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CR & RCC_CR_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { +#if !defined STM32F10X_LD_VL && !defined STM32F10X_MD_VL && !defined STM32F10X_HD_VL + /* Enable Prefetch Buffer */ + FLASH->ACR |= FLASH_ACR_PRFTBE; + + /* Flash 0 wait state */ + FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0; +#endif + + /* HCLK = SYSCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; + + /* PCLK2 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; + + /* PCLK1 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1; + +#ifdef STM32F10X_CL + /* Configure PLLs ------------------------------------------------------*/ + /* PLL configuration: PLLCLK = PREDIV1 * 6 = 24 MHz */ + RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | + RCC_CFGR_PLLMULL6); + + /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */ + /* PREDIV1 configuration: PREDIV1CLK = PLL2 / 10 = 4 MHz */ + RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL | + RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC); + RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 | + RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV10); + + /* Enable PLL2 */ + RCC->CR |= RCC_CR_PLL2ON; + /* Wait till PLL2 is ready */ + while((RCC->CR & RCC_CR_PLL2RDY) == 0) + { + } +#elif defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) + /* PLL configuration: = (HSE / 2) * 6 = 24 MHz */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_PREDIV1 | RCC_CFGR_PLLXTPRE_PREDIV1_Div2 | RCC_CFGR_PLLMULL6); +#else + /* PLL configuration: = (HSE / 2) * 6 = 24 MHz */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLXTPRE_HSE_Div2 | RCC_CFGR_PLLMULL6); +#endif /* STM32F10X_CL */ + + /* Enable PLL */ + RCC->CR |= RCC_CR_PLLON; + + /* Wait till PLL is ready */ + while((RCC->CR & RCC_CR_PLLRDY) == 0) + { + } + + /* Select PLL as system clock source */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); + RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; + + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) + { + } + } + else + { /* If HSE fails to start-up, the application will have wrong clock + configuration. User can add here some code to deal with this error */ + } +} +#elif defined SYSCLK_FREQ_36MHz +/** + * @brief Sets System clock frequency to 36MHz and configure HCLK, PCLK2 + * and PCLK1 prescalers. + * @note This function should be used only after reset. + * @param None + * @retval None + */ +static void SetSysClockTo36(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ + /* Enable HSE */ + RCC->CR |= ((uint32_t)RCC_CR_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CR & RCC_CR_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CR & RCC_CR_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { + /* Enable Prefetch Buffer */ + FLASH->ACR |= FLASH_ACR_PRFTBE; + + /* Flash 1 wait state */ + FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1; + + /* HCLK = SYSCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; + + /* PCLK2 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; + + /* PCLK1 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1; + +#ifdef STM32F10X_CL + /* Configure PLLs ------------------------------------------------------*/ + + /* PLL configuration: PLLCLK = PREDIV1 * 9 = 36 MHz */ + RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | + RCC_CFGR_PLLMULL9); + + /*!< PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */ + /* PREDIV1 configuration: PREDIV1CLK = PLL2 / 10 = 4 MHz */ + + RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL | + RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC); + RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 | + RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV10); + + /* Enable PLL2 */ + RCC->CR |= RCC_CR_PLL2ON; + /* Wait till PLL2 is ready */ + while((RCC->CR & RCC_CR_PLL2RDY) == 0) + { + } + +#else + /* PLL configuration: PLLCLK = (HSE / 2) * 9 = 36 MHz */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLXTPRE_HSE_Div2 | RCC_CFGR_PLLMULL9); +#endif /* STM32F10X_CL */ + + /* Enable PLL */ + RCC->CR |= RCC_CR_PLLON; + + /* Wait till PLL is ready */ + while((RCC->CR & RCC_CR_PLLRDY) == 0) + { + } + + /* Select PLL as system clock source */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); + RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; + + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) + { + } + } + else + { /* If HSE fails to start-up, the application will have wrong clock + configuration. User can add here some code to deal with this error */ + } +} +#elif defined SYSCLK_FREQ_48MHz +/** + * @brief Sets System clock frequency to 48MHz and configure HCLK, PCLK2 + * and PCLK1 prescalers. + * @note This function should be used only after reset. + * @param None + * @retval None + */ +static void SetSysClockTo48(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ + /* Enable HSE */ + RCC->CR |= ((uint32_t)RCC_CR_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CR & RCC_CR_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CR & RCC_CR_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { + /* Enable Prefetch Buffer */ + FLASH->ACR |= FLASH_ACR_PRFTBE; + + /* Flash 1 wait state */ + FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1; + + /* HCLK = SYSCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; + + /* PCLK2 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; + + /* PCLK1 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2; + +#ifdef STM32F10X_CL + /* Configure PLLs ------------------------------------------------------*/ + /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */ + /* PREDIV1 configuration: PREDIV1CLK = PLL2 / 5 = 8 MHz */ + + RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL | + RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC); + RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 | + RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV5); + + /* Enable PLL2 */ + RCC->CR |= RCC_CR_PLL2ON; + /* Wait till PLL2 is ready */ + while((RCC->CR & RCC_CR_PLL2RDY) == 0) + { + } + + + /* PLL configuration: PLLCLK = PREDIV1 * 6 = 48 MHz */ + RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | + RCC_CFGR_PLLMULL6); +#else + /* PLL configuration: PLLCLK = HSE * 6 = 48 MHz */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMULL6); +#endif /* STM32F10X_CL */ + + /* Enable PLL */ + RCC->CR |= RCC_CR_PLLON; + + /* Wait till PLL is ready */ + while((RCC->CR & RCC_CR_PLLRDY) == 0) + { + } + + /* Select PLL as system clock source */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); + RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; + + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) + { + } + } + else + { /* If HSE fails to start-up, the application will have wrong clock + configuration. User can add here some code to deal with this error */ + } +} + +#elif defined SYSCLK_FREQ_56MHz +/** + * @brief Sets System clock frequency to 56MHz and configure HCLK, PCLK2 + * and PCLK1 prescalers. + * @note This function should be used only after reset. + * @param None + * @retval None + */ +static void SetSysClockTo56(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ + /* Enable HSE */ + RCC->CR |= ((uint32_t)RCC_CR_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CR & RCC_CR_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CR & RCC_CR_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { + /* Enable Prefetch Buffer */ + FLASH->ACR |= FLASH_ACR_PRFTBE; + + /* Flash 2 wait state */ + FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2; + + /* HCLK = SYSCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; + + /* PCLK2 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; + + /* PCLK1 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2; + +#ifdef STM32F10X_CL + /* Configure PLLs ------------------------------------------------------*/ + /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */ + /* PREDIV1 configuration: PREDIV1CLK = PLL2 / 5 = 8 MHz */ + + RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL | + RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC); + RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 | + RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV5); + + /* Enable PLL2 */ + RCC->CR |= RCC_CR_PLL2ON; + /* Wait till PLL2 is ready */ + while((RCC->CR & RCC_CR_PLL2RDY) == 0) + { + } + + + /* PLL configuration: PLLCLK = PREDIV1 * 7 = 56 MHz */ + RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | + RCC_CFGR_PLLMULL7); +#else + /* PLL configuration: PLLCLK = HSE * 7 = 56 MHz */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMULL7); + +#endif /* STM32F10X_CL */ + + /* Enable PLL */ + RCC->CR |= RCC_CR_PLLON; + + /* Wait till PLL is ready */ + while((RCC->CR & RCC_CR_PLLRDY) == 0) + { + } + + /* Select PLL as system clock source */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); + RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; + + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) + { + } + } + else + { /* If HSE fails to start-up, the application will have wrong clock + configuration. User can add here some code to deal with this error */ + } +} + +#elif defined SYSCLK_FREQ_72MHz +/** + * @brief Sets System clock frequency to 72MHz and configure HCLK, PCLK2 + * and PCLK1 prescalers. + * @note This function should be used only after reset. + * @param None + * @retval None + */ +static void SetSysClockTo72(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ + /* Enable HSE */ + RCC->CR |= ((uint32_t)RCC_CR_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CR & RCC_CR_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CR & RCC_CR_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { + /* Enable Prefetch Buffer */ + FLASH->ACR |= FLASH_ACR_PRFTBE; + + /* Flash 2 wait state */ + FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2; + + + /* HCLK = SYSCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; + + /* PCLK2 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; + + /* PCLK1 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2; + +#ifdef STM32F10X_CL + /* Configure PLLs ------------------------------------------------------*/ + /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */ + /* PREDIV1 configuration: PREDIV1CLK = PLL2 / 5 = 8 MHz */ + + RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL | + RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC); + RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 | + RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV5); + + /* Enable PLL2 */ + RCC->CR |= RCC_CR_PLL2ON; + /* Wait till PLL2 is ready */ + while((RCC->CR & RCC_CR_PLL2RDY) == 0) + { + } + + + /* PLL configuration: PLLCLK = PREDIV1 * 9 = 72 MHz */ + RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | + RCC_CFGR_PLLMULL9); +#else + /* PLL configuration: PLLCLK = HSE * 9 = 72 MHz */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | + RCC_CFGR_PLLMULL)); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMULL9); +#endif /* STM32F10X_CL */ + + /* Enable PLL */ + RCC->CR |= RCC_CR_PLLON; + + /* Wait till PLL is ready */ + while((RCC->CR & RCC_CR_PLLRDY) == 0) + { + } + + /* Select PLL as system clock source */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); + RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; + + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) + { + } + } + else + { /* If HSE fails to start-up, the application will have wrong clock + configuration. User can add here some code to deal with this error */ + } +} +#endif + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/BSP/driver.c b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/BSP/driver.c new file mode 100644 index 0000000000000000000000000000000000000000..eaf2bf46e1273f7969566847d7e90f114c397922 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/BSP/driver.c @@ -0,0 +1,151 @@ + +/* Include Files ------------------------------------------------------------------------------- */ +#include "stm32f10x.h" +#include "driver.h" + +/* Macro Defines ------------------------------------------------------------------------------- */ + + +/* Global Function Prototypes ------------------------------------------------------------------ */ +int Drv_initDeviceHardware(void); +void watchdog_reset(void); + +/* Private Function Prototypes ----------------------------------------------------------------- */ +static void Drv_configDeviceClock(void); +static void Drv_configDevicePins(void); +static void Drv_configDeviceInterrupts(void); + +/* Global Variables ---------------------------------------------------------------------------- */ + + +/* Static Variables ---------------------------------------------------------------------------- */ + +/************************************************************************************************* + * Procedure: Drv_initDeviceHardware + * Object: + * Parameters In: + * - none + * Parameters Out: + * - none + *************************************************************************************************/ +int Drv_initDeviceHardware() +{ + Drv_configDeviceClock(); + Drv_configDevicePins(); + + Sytm_initModule(); + Siic_initModule(); + return 1; +} + +/************************************************************************************************* + * Procedure: Drv_configDeviceClock + * Object: + * Parameters In: + * - none + * Parameters Out: + * - none + *************************************************************************************************/ +static void Drv_configDeviceClock() +{ + RCC_HCLKConfig(RCC_SYSCLK_Div1); + + RCC_ADCCLKConfig(RCC_PCLK2_Div8); + + RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1 | RCC_AHBPeriph_DMA2 + | RCC_AHBPeriph_SRAM | RCC_AHBPeriph_FLITF + | RCC_AHBPeriph_CRC, ENABLE); + + RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR | RCC_APB1Periph_CAN1 + | RCC_APB1Periph_USART2 | RCC_APB1Periph_USART3 | RCC_APB1Periph_UART4 | RCC_APB1Periph_UART5, ENABLE); + + RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1 | RCC_APB2Periph_AFIO + | RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB | RCC_APB2Periph_GPIOC | RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOE + | RCC_APB2Periph_SPI1 + | RCC_APB2Periph_ADC1, ENABLE); + + PWR_BackupAccessCmd(ENABLE); + RCC_LSEConfig(RCC_LSE_OFF); + BKP_TamperPinCmd(DISABLE); + PWR_BackupAccessCmd(DISABLE); +} + +/************************************************************************************************* + * Procedure: Drv_configDevicePins + * Object: + * Parameters In: + * - none + * Parameters Out: + * - none + *************************************************************************************************/ +static void Drv_configDevicePins() +{ + GPIO_InitTypeDef GPIO_InitStructure; + + /* JTAG-DP Disabled and SW-DP Enabled */ + //GPIO_PinRemapConfig(GPIO_Remap_SWJ_Disable, ENABLE); + //GPIO_PinRemapConfig(GPIO_Remap_SWJ_JTAGDisable, ENABLE); + + /* Configure I2C1 pins: PB6->SCL and PB7->SDA */ + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6 | GPIO_Pin_7; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; + GPIO_Init(GPIOB, &GPIO_InitStructure); +} + +/************************************************************************************************* + * Procedure: Drv_configDeviceInterrupts + * Object: + * Parameters In: + * - none + * Parameters Out: + * - none + *************************************************************************************************/ +static void Drv_configDeviceInterrupts() +{ + NVIC_InitTypeDef NVIC_InitStructure; + +// NVIC_InitStructure.NVIC_IRQChannel = USART1_IRQn; +// NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 2; +// NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; +// NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; +// NVIC_Init(&NVIC_InitStructure); + +// NVIC_InitStructure.NVIC_IRQChannel = USART2_IRQn; +// NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1; +// NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; +// NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; +// NVIC_Init(&NVIC_InitStructure); + +// NVIC_InitStructure.NVIC_IRQChannel = USART3_IRQn; +// NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; +// NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; +// NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; + +// NVIC_InitStructure.NVIC_IRQChannel = UART4_IRQn; +// NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1; +// NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; +// NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; +// NVIC_Init(&NVIC_InitStructure); + +// NVIC_InitStructure.NVIC_IRQChannel = UART5_IRQn; +// NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1; +// NVIC_InitStructure.NVIC_IRQChannelSubPriority = 4; +// NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; +// NVIC_Init(&NVIC_InitStructure); +} + +/** + * @brief watchdog_reset. + * @param None + * @retval None + */ +void watchdog_reset() +{ + IWDG_WriteAccessCmd(IWDG_WriteAccess_Enable); + IWDG_SetPrescaler(IWDG_Prescaler_32); + IWDG_SetReload(50); + IWDG_Enable(); +// while(1); +} + diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/BSP/driver.h b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/BSP/driver.h new file mode 100644 index 0000000000000000000000000000000000000000..38d6a0f9d1737f511d502a0879c70dde7a5d8801 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/BSP/driver.h @@ -0,0 +1,35 @@ +#ifndef DRIVER_H +#define DRIVER_H + +#include "stm32f10x.h" +#include +#include +#include +#include + +//#include "gpio.h" +//#include "uart1.h" +//#include "uart2.h" +//#include "uart3.h" +//#include "uart4.h" +//#include "uart5.h" +//#include "adc.h" +#include "siic.h" +#include "system_timer.h" + +//#include "relay.h" +//#include "sim800c.h" +//#include "sensor.h" +#include "eeprom.h" +//#include "isl1208.h" +//#include "noenet.h" +//#include "bsp.h" +#include "core.h" +#include "parameter.h" + +//#include "debug.h" + +extern int Drv_initDeviceHardware(void); +extern void watchdog_reset(void); +#endif + diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/BSP/siic.c b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/BSP/siic.c new file mode 100644 index 0000000000000000000000000000000000000000..f844e93dfc972a61f51d4638d0cacbc9dcceb667 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/BSP/siic.c @@ -0,0 +1,189 @@ + +/* --------------------------------------- Include Files ---------------------------------------- */ +#include "stm32f10x.h" +#include "siic.h" +#include "system_timer.h" +#include "gpio_map.h" + +/* ---------------------------------------- Macro Defines --------------------------------------- */ + +/* IIC port & pin define */ +#define SIIC_PORT GPIOB +#define SIIC_SDA GPIO_Pin_7 +#define SIIC_SCL GPIO_Pin_6 + +/* IIC pin operation define */ +#define SDA_1() SIIC_PORT->BSRR = SIIC_SDA +#define SDA_0() SIIC_PORT->BRR = SIIC_SDA + +#define SCL_1() SIIC_PORT->BSRR = SIIC_SCL +#define SCL_0() SIIC_PORT->BRR = SIIC_SCL + +#define RD_SDA() ((uint16_t)SIIC_PORT->IDR)&SIIC_SDA + +/* --------------------------------- Global Function Prototypes --------------------------------- */ +void Siic_initModule(void); +void SiicStart(void); +void SiicStop(void); +void SiicWone(void); +void SiicWzero(void); +uint8_t SiicTest(void); +void SiicWbyte(uint8_t data); +unsigned char SiicRbyte(unsigned char ack); +/* -------------------------------------- Static Variables -------------------------------------- */ + +/** + * @brief Siic_initModule. + * @param None + * @retval None + * @note + */ +void Siic_initModule(void) +{ + SDA_1(); + SCL_1(); +} + +/** + * @brief SiicStart. + * @param None + * @retval None + * @note + */ +void SiicStart(void) +{ + SDA_OUT(); + IIC_SDA=1; + IIC_SCL=1; + delay_us(4); + IIC_SDA=0; //SCL高电平的时候，SDA由高到低，发出一个起始信号 + delay_us(4); + IIC_SCL=0; +} + +/** + * @brief SiicStop. + * @param None + * @retval None + * @note + */ +void SiicStop(void) +{ + SDA_OUT(); + IIC_SCL=0; + IIC_SDA=0; + delay_us(4); + IIC_SCL=1; + IIC_SDA=1; //SDA拉高 SCL高电平，SDA由低到高，发出停止信号 + delay_us(4); +} + +/** + * @brief SiicWaitAck. + * @param None + * @retval 0：成功 1：失败 + * @note 等待应答 + */ +uint8_t SiicWaitAck(void) +{ + uint8_t timeout=0; + SDA_IN(); + IIC_SDA=1;delay_us(1); + IIC_SCL=1;delay_us(1); + + while(READ_SDA) + { + timeout++; + if(timeout>250) + { + SiicStop(); + return 1; + } + } + IIC_SCL=0; + return 0; +} + +/** + * @brief SiiAck. + * @param None + * @retval + * @note 发送应答 + */ +void SiiAck(void) +{ + IIC_SCL=0; + SDA_OUT(); + IIC_SDA=0; //SDA拉低，表示应答 + delay_us(2); + IIC_SCL=1; + delay_us(2); + IIC_SCL=0; +} + +/** + * @brief SiiNAck. + * @param None + * @retval + * @note 不发送应答 + */ +void SiiNAck(void) +{ + IIC_SCL=0; + SDA_OUT(); + IIC_SDA=1; //SDA拉高，表示不应答 + delay_us(2); + IIC_SCL=1; + delay_us(2); + IIC_SCL=0; +} + +/** + * @brief SiiSendByte. + * @param None + * @retval + * @note 发送一个字节 + */ +void SiiSendByte(uint8_t txd) +{ + uint8_t t; + SDA_OUT(); //SDA线输出模式 + IIC_SCL=0; //SCL拉低，开始数据传输 + for(t=0;t<8;t++) //for循环，一位一位的发送，从最高位 位7开始 + { + IIC_SDA=(txd&0x80)>>7; //除了位7外，其余全屏蔽为0，然后右移到位0，给SDA数据线 + txd<<=1; //左移一位，准备下一次发送 + delay_us(2); //延时 + IIC_SCL=1; //SCL拉高 + delay_us(2); //延时 + IIC_SCL=0; //SCL拉低 + delay_us(2); //延时 + } +} + +/** + * @brief SiiReadByte. + * @param ack：是否发送应答 1:发 0：不发 + * @retval + * @note 读取一个字节 + */ +uint8_t SiiReadByte(unsigned char ack) +{ + uint8_t i,receive=0; + + SDA_IN(); //SDA设置为输入 + for(i=0;i<8;i++ ) //for循环，一位一位的读取，从最高位 位7开始 + { + IIC_SCL=0; //SCL拉低 + delay_us(2); //延时 + IIC_SCL=1; //SCL拉高 + receive<<=1; //左移一位，准备下次的读取 + if(READ_SDA)receive++; //如果读取的是高电平，也就是1，receive+1 + delay_us(1); //延时 + } + if (!ack) //不需要发送 + SiiNAck(); //发送nACK + else //需要发送 + SiiAck(); //发送ACK + return receive; +} diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/BSP/siic.h b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/BSP/siic.h new file mode 100644 index 0000000000000000000000000000000000000000..2fcb8fdd3694835e1d3ca888f7743f95fe29882d --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/BSP/siic.h @@ -0,0 +1,30 @@ +#ifndef SIIC_H +#define SIIC_H + +#include "stm32f10x.h" + +#define IIC_SCL PBout(6) //SCL +#define IIC_SDA PBout(7) //SDA +#define READ_SDA PBin(7) //输入SDA + +//PB7 +#define SDA_IN() {GPIOB->CRL&=0X0FFFFFFF;GPIOB->CRL|=(u32)8<<28;} +#define SDA_OUT() {GPIOB->CRL&=0X0FFFFFFF;GPIOB->CRL|=(u32)3<<28;} +//PB9 +//#define SDA_IN() {GPIOB->CRH&=0XFFFFFF0F;GPIOB->CRH|=8<<4;} +//#define SDA_OUT() {GPIOB->CRH&=0XFFFFFF0F;GPIOB->CRH|=3<<4;} + +extern void Siic_initModule(void); +extern void SiicStart(void); +extern void SiicStop(void); +extern void SiicWone(void); +extern void SiicWzero(void); +extern uint8_t SiicTest(void); +extern void SiicWbyte(uint8_t data); +extern unsigned char SiicRbyte(unsigned char ack); +extern uint8_t SiicWaitAck(void); +extern void SiiSendByte(uint8_t txd); +extern uint8_t SiiReadByte(unsigned char ack); + +#endif + diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/BSP/system_timer.c b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/BSP/system_timer.c new file mode 100644 index 0000000000000000000000000000000000000000..9aed51a2edc3618c298264cc834f910704994db2 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/BSP/system_timer.c @@ -0,0 +1,204 @@ + +/* --------------------------------------- Include Files ---------------------------------------- */ +#include "stm32f10x.h" +#include "system_timer.h" + +/* ---------------------------------------- Macro Defines --------------------------------------- */ +#define SYTM_MODULE_ID 0X00000000 +#define SYTM_VENDOR_ID 0X00000000 + +#define SYTM_SW_MAJOR_VERSION 0X01 +#define SYTM_SW_MINOR_VERSION 0X00 +#define SYTM_SW_PATCH_VERSION 0X00 + +/* -------------------------------------- Static Variables -------------------------------------- */ +volatile static uint64_t sytm_tick_counter = 0; + +/* --------------------------------- Global Function Prototypes --------------------------------- */ +uint32_t Sytm_initModule(void); +void Sytm_getTickCount(uint64_t *tick_count); +uint64_t Sytm_getSystemTickvalue(void); +void Sytm_interruptHandler(void); +void Sytm_delayT10Us(uint32_t); +void Sytm_delayMs(uint32_t time); +void isRunPer1ms(void); + +extern void bsp_RunPer10ms(void); + +/** + * @brief . + * @param None + * @retval None + * @note SysTick的频率是主频率的1/8,通常主频率为最大的72M，那么SysTick的频率是9M + * 那么SysTick计数器19个数，代表(1/9)us + */ +uint32_t Sytm_initModule() +{ + uint8_t temp = 0; + + SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK_Div8); + + //temp = SysTick_Config(SystemCoreClock / 1000); + if(temp == 1){ + return (0); + } + else{ + return (1); + } +} + +/************************************************************************************************* + * Procedure: Sytm_getTickCount + * Object: + * Parameters In: + * - none + * Parameters Out: + * - none + *************************************************************************************************/ +void Sytm_getTickCount(uint64_t *tick_count) +{ + *tick_count= sytm_tick_counter; +} + +/************************************************************************************************* + * Procedure: Sytm_getSystemTickvalue + * Object: + * Parameters In: + * - none + * Parameters Out: + * - none + *************************************************************************************************/ +uint64_t Sytm_getSystemTickvalue() +{ + return sytm_tick_counter; +} + +/************************************************************************************************* + * Procedure: Sytm_interruptHandler + * Object: + * Parameters In: + * - none + * Parameters Out: + * - none + *************************************************************************************************/ +void Sytm_interruptHandler() +{ + sytm_tick_counter++; +} + +/************************************************************************************************* + * Procedure: Sytm_delayTenUs + * Object: + * Parameters In: + * - none + * Parameters Out: + * - none + *************************************************************************************************/ +void Sytm_delay10Us(uint32_t time) +{ + uint32_t temp1 = 0; + uint32_t temp2 = 0; + + for(temp1=0; temp1LOAD=us*9; //SysTick加载值，delay_init函数中我们知道， SysTick计数器一个数是1/9微秒，所以乘以9 + SysTick->VAL=0x00; //清空计数器 + SysTick->CTRL|=SysTick_CTRL_ENABLE_Msk ; //开始倒数 + do + { + temp=SysTick->CTRL; //读取SysTick状态寄存器 + } + while((temp&0x01)&&!(temp&(1<<16))); //等待时间到达，标志位置位 + SysTick->CTRL&=~SysTick_CTRL_ENABLE_Msk; //关闭计数器 + SysTick->VAL =0X00; //清空计数器 +} + +/** + * @brief delay_us. + * @param None + * @retval None + * @note 延迟毫秒 + * 我们首先注意一个问题SysTick时钟计数器是24位的，9M频率下，总共能延时1864.135ms + * 所有我们以1800为界限，小于1800的延时一次计数就行，大于1800的多次计数 + */ +void delay_ms(u32 ms) +{ + u32 i; + u32 temp; + + if(ms<1800) //小于1800ms + { + SysTick->LOAD=(u32)ms*9*1000; //时间加载,SysTick一个数使1/9微秒，换算成ms的话，乘以9再乘以1000 + SysTick->VAL =0x00; //清空计数器 + SysTick->CTRL|=SysTick_CTRL_ENABLE_Msk ; //开始倒数 + do + { + temp=SysTick->CTRL; //读取SysTick状态寄存器 + } + while((temp&0x01)&&!(temp&(1<<16))); //等待时间到达，标志位置位 + SysTick->CTRL&=~SysTick_CTRL_ENABLE_Msk; //关闭计数器 + SysTick->VAL =0X00; //清空计数器 + } + else //大于1800ms + { + for(i=0;i<(ms/1800);i++) //除以1800整数部分，for循环的延时 + { + SysTick->LOAD=1800*9*1000; //时间加载,1800ms延时 + SysTick->VAL =0x00; //清空计数器 + SysTick->CTRL|=SysTick_CTRL_ENABLE_Msk ; //开始倒数 + do + { + temp=SysTick->CTRL; //读取SysTick状态寄存器 + } + while((temp&0x01)&&!(temp&(1<<16))); //等待时间到达，标志位置位 + SysTick->CTRL&=~SysTick_CTRL_ENABLE_Msk; //关闭计数器 + SysTick->VAL =0X00; //清空计数器 + } + //接下来余数部分的延时 + SysTick->LOAD=(u32)(ms%1800)*9*1000; //时间加载,余数部分 + SysTick->VAL =0x00; //清空计数器 + SysTick->CTRL|=SysTick_CTRL_ENABLE_Msk ; //开始倒数 + do + { + temp=SysTick->CTRL; //读取SysTick状态寄存器 + } + while((temp&0x01)&&!(temp&(1<<16))); //等待时间到达，标志位置位 + SysTick->CTRL&=~SysTick_CTRL_ENABLE_Msk; //关闭计数器 + SysTick->VAL =0X00; //清空计数器 + } +} \ No newline at end of file diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/BSP/system_timer.h b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/BSP/system_timer.h new file mode 100644 index 0000000000000000000000000000000000000000..ec979518364dd63aaaaee6b82e578a90ad74c035 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/BSP/system_timer.h @@ -0,0 +1,16 @@ +#ifndef SYSTEM_TIMER_H +#define SYSTEM_TIMER_H + +#include "stm32f10x.h" + +extern uint32_t Sytm_initModule(void); +extern void Sytm_getTickCount(uint64_t *tick_count); +extern uint64_t Sytm_getSystemTickvalue(void); +extern void Sytm_interruptHandler(void); +extern void Sytm_delay10Us(uint32_t time); +extern void Sytm_delayMs(uint32_t time); + +extern void delay_us(u32 us); +extern void delay_ms(u32 ms); + +#endif diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/DBS/core.c b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/DBS/core.c new file mode 100644 index 0000000000000000000000000000000000000000..50921a0bbb4880cc350ce83c966b1c45549c3088 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/DBS/core.c @@ -0,0 +1,56 @@ + +/* --------------------------------------- Include Files ---------------------------------------- */ +#include "stm32f10x.h" +#include "system_timer.h" +#include "driver.h" +#include "parameter.h" +#include "core.h" + + +/* ---------------------------------------- Macro Defines --------------------------------------- */ + + +/* -------------------------------------- Data Type Defines -------------------------------------- */ + + +/* --------------------------------- Global Function Prototypes --------------------------------- */ +uint32_t Core_initDBS(uint32_t format); +uint32_t Core_createVersionPayload(uint8_t* buf, uint32_t* length); +uint32_t Core_createStatusPayload(uint32_t group, uint8_t* buf, uint32_t* length); +uint32_t Core_createRdParamentResponesPayload(uint16_t par_id, uint16_t par_number,uint8_t* buf, uint32_t* length); +uint32_t Core_createWrParamentResponesPayload(uint16_t par_id, uint16_t par_number, uint8_t* par_content, uint8_t* buf, uint32_t* length); + +/* --------------------------------- Private Function Prototypes -------------------------------- */ + + +/* -------------------------------------- Static Variables -------------------------------------- */ + + +/************************************************************************************************* + * Procedure: Core_initDBS + * Object: + * Parameters In: + * - none + * Parameters Out: + * - none + *************************************************************************************************/ +uint32_t Core_initDBS(uint32_t format) +{ + uint32_t result = 0; + + if(format == 1){ + Dbs_setParDefault(); + printf("Database memory load defaults.\r\n"); + } + + result = Dbs_initParTable(); + if(result==0){ + printf("Database memory has errors,try to restore to default.\r\n"); + Dbs_setParDefault(); + printf("Database memory has errors,try to restore to default.\r\n"); + watchdog_reset(); + }else{ + return 1; + } +} + diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/DBS/core.h b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/DBS/core.h new file mode 100644 index 0000000000000000000000000000000000000000..7c603345bbe575ec0026c9f75ca72f978e6bd4ca --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/DBS/core.h @@ -0,0 +1,14 @@ +#ifndef CORE_H +#define CORE_H + +#include "stm32f10x.h" +#include "system_timer.h" + +extern uint32_t Core_initDBS(uint32_t format); + + + + + +#endif + diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/DBS/parameter.c b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/DBS/parameter.c new file mode 100644 index 0000000000000000000000000000000000000000..96ef383b2e4c19ff51fca5bfbe64dc434cd4c194 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/DBS/parameter.c @@ -0,0 +1,305 @@ + +/* --------------------------------------- Include Files ---------------------------------------- */ +#include "stm32f10x.h" +#include "system_timer.h" +#include "driver.h" +#include "crc16.h" +#include "parameter.h" + +/* ---------------------------------------- Macro Defines --------------------------------------- */ + +/* -------------------------------------- Data Type Defines -------------------------------------- */ +typedef struct +{ + uint32_t pk; + uint32_t offset; + uint8_t permission; + uint8_t lock; + uint16_t length; + uint8_t *pdata; +} DBS_TABLE_ITEM; + + +/* --------------------------------- Global Function Prototypes --------------------------------- */ +uint32_t Dbs_initParTable(void); +uint32_t Dbs_setParDefault(void); +uint32_t Dbs_getParLength(uint32_t pk, uint32_t *length); +uint32_t Dbs_setParValue(uint32_t pk, uint8_t *data, uint32_t length); +uint32_t Dbs_getParValue(uint32_t pk, uint8_t *data, uint32_t *length); +uint32_t Dbs_getParLength(uint32_t pk, uint32_t *length); + +/* -------------------------------------- Static Variables -------------------------------------- */ +const uint32_t dbs_par_memstart = 10; +/*const uint32_t dbs_par_memend = 256; +const uint32_t dbs_app_memstart = dbs_par_memend; +const uint32_t dbs_app_memend = dbs_app_memstart + 5*1024;*/ +const uint32_t dbs_par_rows = dbs_par_pk_number; +const uint32_t dbs_par_memsize = 128; +const uint32_t dbs_par_amemstart = dbs_par_memstart; +const uint32_t dbs_par_bmemstart = dbs_par_amemstart + dbs_par_memsize; +volatile uint8_t dbs_par_memory[dbs_par_memsize]; + +const uint8_t dbs_parinit_crc[2] = {0X00, 0X00}; +const uint8_t dbs_parinit_isinit[1] = {0X00}; +const uint8_t dbs_parinit_data1[1] = {0x01}; +const uint8_t dbs_parinit_data2[1] = {0x00}; +const uint8_t dbs_parinit_data3[1] = {0x02}; +const uint8_t dbs_parinit_data4[9] = {0x30,0x31,0x32,0x33,0x34,0x35,0x36,0x37,0x38}; +const uint8_t dbs_parinit_data5[2] = {0x30,0x31}; + + +volatile DBS_TABLE_ITEM dbs_par_format[] = +{ + {dbs_par_pk_crc, 0, 0x10, 0, 2, (uint8_t *)dbs_parinit_crc}, + {dbs_par_pk_isinit, 2, 0x10, 0, 1, (uint8_t *)dbs_parinit_isinit}, + {dbs_par_pk_data1, 3, 0x10, 0, 1, (uint8_t *)dbs_parinit_data1}, + {dbs_par_pk_data2, 4, 0x10, 0, 1, (uint8_t *)dbs_parinit_data2}, + {dbs_par_pk_data3, 5, 0x10, 0, 1, (uint8_t *)dbs_parinit_data3}, + {dbs_par_pk_data4, 6, 0x10, 0, 9, (uint8_t *)dbs_parinit_data4}, + {dbs_par_pk_data5, 15, 0x10, 0, 2, (uint8_t *)dbs_parinit_data5} +}; + +/** + * @brief Dbs_initParTable + * @param + * @retval + * @note + */ +uint32_t Dbs_initParTable() +{ + uint32_t counter = 0; + uint32_t n = 0; + uint16_t data = 0; + uint8_t temp0 = 0; + uint8_t temp1 = 0; + + Epm_readData(dbs_par_amemstart + dbs_par_format[dbs_par_pk_isinit].offset, &temp0,1); + Epm_readData(dbs_par_bmemstart + dbs_par_format[dbs_par_pk_isinit].offset, &temp1,1); + + if ((temp0 != 0X5A) && (temp1 != 0x5A)) + { + for (counter = 0; counter < dbs_par_rows; counter++) + { + for (n = 0; n < dbs_par_format[counter].length; n++) + { + dbs_par_memory[dbs_par_format[counter].offset + n] = *(dbs_par_format[counter].pdata + n); + } + } + dbs_par_memory[dbs_par_format[dbs_par_pk_isinit].offset] = 0X5A; + data = Crc_cal((uint8_t *)(dbs_par_memory + 2), dbs_par_memsize - 2); + dbs_par_memory[0] = (uint8_t)(data & 0XFF); + dbs_par_memory[1] = (uint8_t)((data >> 8) & 0XFF); + for (counter = 0; counter < dbs_par_memsize; counter++) + { + Epm_wrtieData(dbs_par_amemstart + counter, dbs_par_memory[counter]); + Epm_wrtieData(dbs_par_bmemstart + counter, dbs_par_memory[counter]); + } + } + + for (counter = 0; counter < dbs_par_memsize; counter++) + { + Epm_readData(dbs_par_amemstart + counter, (uint8_t *)(dbs_par_memory + counter),1); + } + + data = Crc_cal((uint8_t *)(dbs_par_memory + 2), dbs_par_memsize - 2); + if (((uint8_t)(data & 0XFF) == dbs_par_memory[0]) && ((uint8_t)((data >> 8) & 0XFF) == dbs_par_memory[1])) + { + temp0 = 1; + } + else + { + temp0 = 0; + } + + for (counter = 0; counter < dbs_par_memsize; counter++) + { + Epm_readData(dbs_par_bmemstart + counter, (uint8_t *)(dbs_par_memory + counter),1); + } + data = Crc_cal((uint8_t *)(dbs_par_memory + 2), dbs_par_memsize - 2); + + if (((uint8_t)(data & 0XFF) == dbs_par_memory[0]) && ((uint8_t)((data >> 8) & 0XFF) == dbs_par_memory[1])) + { + temp1 = 1; + } + else + { + temp1 = 0; + } + + if ((temp0 == 1) && (temp1 == 1)) + { + return 1; + } + else if ((temp0 != 1) && (temp1 != 1)) + { + return 0; + } + else if ((temp0 == 1) && (temp1 != 1)) + { + for (counter = 0; counter < dbs_par_memsize; counter++) + { + Epm_readData(dbs_par_amemstart + counter, (uint8_t *)(dbs_par_memory + counter),1); + } + for (counter = 0; counter < dbs_par_memsize; counter++) + { + Epm_wrtieData(dbs_par_bmemstart + counter, dbs_par_memory[counter]); + } + return 1; + } + else if ((temp0 != 1) && (temp1 == 1)) + { + for (counter = 0; counter < dbs_par_memsize; counter++) + { + Epm_readData(dbs_par_bmemstart + counter, (uint8_t *)(dbs_par_memory + counter),1); + } + for (counter = 0; counter < dbs_par_memsize; counter++) + { + Epm_wrtieData(dbs_par_amemstart + counter, dbs_par_memory[counter]); + } + return 1; + } +} + +/** + * @brief Dbs_setParDefault + * @param + * @retval + * @note + */ +uint32_t Dbs_setParDefault() +{ + Epm_wrtieData(dbs_par_amemstart + dbs_par_format[dbs_par_pk_isinit].offset, 0X00); + Epm_wrtieData(dbs_par_bmemstart + dbs_par_format[dbs_par_pk_isinit].offset, 0X00); + + return Dbs_initParTable(); +} + +/** + * @brief Dbs_setParValue + * @param + * @retval + * @note + */ +uint32_t Dbs_setParValue(uint32_t pk, uint8_t *data, uint32_t length) +{ + uint32_t counter = 0; + uint16_t temp = 0; + + if (pk >= dbs_par_rows) + { + return 0; + } + + if (dbs_par_format[pk].lock == 1) + { + return 0; + } + + if (dbs_par_format[pk].permission == 0x20) + { + return 0; + } + + if (dbs_par_format[pk].length < length) + { + return 0; + } + + /* 鍐欏叆鏁版嵁 */ + if (length == 0) + { + length = dbs_par_format[pk].length; + for (counter = 0; counter < length; counter++) + { + dbs_par_memory[dbs_par_format[pk].offset + counter] = 0x00; + Epm_wrtieData(dbs_par_amemstart + dbs_par_format[pk].offset + counter, 0x00); + Epm_wrtieData(dbs_par_bmemstart + dbs_par_format[pk].offset + counter, 0x00); + } + } + else + { + for (counter = 0; counter < length; counter++) + { + dbs_par_memory[dbs_par_format[pk].offset + counter] = *(data + counter); + Epm_wrtieData(dbs_par_amemstart + dbs_par_format[pk].offset + counter, *(data + counter)); + Epm_wrtieData(dbs_par_bmemstart + dbs_par_format[pk].offset + counter, *(data + counter)); + } + if (dbs_par_format[pk].length > length) + { + dbs_par_memory[dbs_par_format[pk].offset + length] = 0x00; + Epm_wrtieData(dbs_par_amemstart + dbs_par_format[pk].offset + length, 0x00); + Epm_wrtieData(dbs_par_bmemstart + dbs_par_format[pk].offset + length, 0x00); + } + } + + temp = Crc_cal((uint8_t *)(dbs_par_memory + 2), dbs_par_memsize - 2); + dbs_par_memory[0] = (uint8_t)(temp & 0XFF); + dbs_par_memory[1] = (uint8_t)((temp >> 8) & 0XFF); + + Epm_wrtieData(dbs_par_amemstart + 0, (uint8_t)(temp & 0XFF)); + Epm_wrtieData(dbs_par_amemstart + 1, (uint8_t)((temp >> 8) & 0XFF)); + Epm_wrtieData(dbs_par_bmemstart + 0, (uint8_t)(temp & 0XFF)); + Epm_wrtieData(dbs_par_bmemstart + 1, (uint8_t)((temp >> 8) & 0XFF)); + + return 1; +} + + +/** + * @brief Dbs_getParValue + * @param + * @retval + * @note + */ +uint32_t Dbs_getParValue(uint32_t pk, uint8_t *data, uint32_t *length) +{ + uint32_t counter = 0; + + if (pk >= dbs_par_rows) + { + return 0; + } + + if (dbs_par_format[pk].lock == 1) + { + return 0; + } + + if (dbs_par_format[pk].permission == 0x30) + { + return 0; + } + + *length = dbs_par_format[pk].length; + for (counter = 0; counter < dbs_par_format[pk].length; counter++) + { + *(data + counter) = dbs_par_memory[dbs_par_format[pk].offset + counter]; + } + + return 1; +} + +/** + * @brief Dbs_getParLength + * @param + * @retval + * @note + */ +uint32_t Dbs_getParLength(uint32_t pk, uint32_t *length) +{ + if (pk >= dbs_par_rows) + { + return 0; + } + + *length = dbs_par_format[pk].length; + return 1; +} + + + + + + + + diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/DBS/parameter.h b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/DBS/parameter.h new file mode 100644 index 0000000000000000000000000000000000000000..b6dcdf4df0ead53d694cca7bc25177f4394362e8 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/DBS/parameter.h @@ -0,0 +1,27 @@ +#ifndef PAR_H +#define PAR_H + +#include "stm32f10x.h" +#include "driver.h" + +// par table +#define dbs_par_pk_crc 0 +#define dbs_par_pk_isinit 1 +#define dbs_par_pk_data1 2 +#define dbs_par_pk_data2 3 +#define dbs_par_pk_data3 4 +#define dbs_par_pk_data4 5 +#define dbs_par_pk_data5 6 + +#define dbs_par_pk_number 7 + +extern uint32_t Dbs_initParTable(void); +extern uint32_t Dbs_setParDefault(void); +//extern uint32_t Dbs_setOTAParDefault(); +extern uint32_t Dbs_setParValue(uint32_t pk, uint8_t *data, uint32_t length); +extern uint32_t Dbs_getParValue(uint32_t pk, uint8_t *data, uint32_t *length); +extern uint32_t Dbs_getParLength(uint32_t pk, uint32_t *length); + + +#endif + diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/EEPROM/eeprom.c b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/EEPROM/eeprom.c new file mode 100644 index 0000000000000000000000000000000000000000..2938022333a1090da06cc007bad5f39f3b967ded --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/EEPROM/eeprom.c @@ -0,0 +1,120 @@ + +/* --------------------------------------- Include Files ---------------------------------------- */ +#include "stm32f10x.h" +#include "system_timer.h" +#include "driver.h" +#include "eeprom.h" + +/* ---------------------------------------- Macro Defines --------------------------------------- */ +#define EPM_WADD 0XA0 +#define EPM_RADD 0XA1 +#define EPM_SIZE 0X100 +#define EPM_START_ADDRESS 0X0000 +#define EPM_END_ADDRESS (EPM_START_ADDRESS + EPM_SIZE - 1) + +/* --------------------------------- Global Function Prototypes --------------------------------- */ +uint32_t Epm_initModule(void); +//uint32_t Epm_wrtieData(uint16_t address, uint8_t data); +//uint32_t Epm_readData(uint16_t address, uint8_t *data); + +/* -------------------------------------- Static Variables -------------------------------------- */ + +/** + * @brief + * @param + * @retval + * @note + */ +uint32_t Epm_initModule() +{ + //DOTO + return (1); +} + +/** + * @brief Epm_wrtieData + * @param WriteAddr :写入数据的目的地址 + * DataToWrite:要写入的数据 + * @retval + * @note 指定地址写入一个数据 + */ +uint32_t Epm_wrtieData(uint16_t WriteAddr,uint8_t DataToWrite) +{ + SiicStart(); + SiiSendByte(0XA0+((WriteAddr/256)<<1)); //发送器件地址0XA0,写数据 + SiicWaitAck(); + SiiSendByte(WriteAddr%256); + SiicWaitAck(); + SiiSendByte(DataToWrite); + SiicWaitAck(); + SiicStop(); + delay_ms(5); + + return 0; +} + +/** + * @brief Epm_Write + * @param WriteAddr :写入数据的目的地址 + * pBuffer :数据数组首地址 + * NumToRead:要写入数据的个数 + * @retval + * @note 指定地址开始写入指定个数的数据 + */ +void Epm_Write(uint16_t WriteAddr,uint8_t *pBuffer,uint16_t NumToWrite) +{ + while(NumToWrite--) + { + Epm_wrtieData(WriteAddr,*pBuffer); + WriteAddr++; + pBuffer++; + } +} + +/** + * @brief 指定地址读出一个数据 + * @param ReadAddr :开始读出的地址 对24c02为0~255 + * @retval + */ +uint8_t Epm_ReadOneByte(uint16_t ReadAddr) +{ + uint8_t temp=0; + + SiicStart(); + SiiSendByte(0XA0+((ReadAddr/256)<<1)); + + SiicWaitAck(); + SiiSendByte(ReadAddr%256); + SiicWaitAck(); + SiicStart(); + SiiSendByte(0XA1); //进入接收模式 + SiicWaitAck(); + temp=SiiReadByte(0); + SiicStop(); + delay_ms(5); + return temp; +} + +/** + * @brief Epm_readData + * @param ReadAddr :开始读出的地址 对24c02为0~255 + * pBuffer :数据数组首地址 + * NumToRead:要读出数据的个数 + * @retval + * @note 指定地址开始读出指定个数的数据 + */ +uint32_t Epm_readData(uint16_t ReadAddr,uint8_t *pBuffer,uint16_t NumToRead) +{ + while(NumToRead) + { + *pBuffer++=Epm_ReadOneByte(ReadAddr++); + NumToRead--; + } + + return 0; +} + + + + + diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/EEPROM/eeprom.h b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/EEPROM/eeprom.h new file mode 100644 index 0000000000000000000000000000000000000000..aeb95d64099922d13c0c59aa3744aea780e3d6ce --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/EEPROM/eeprom.h @@ -0,0 +1,20 @@ +#ifndef EEPROM_H +#define EEPROM_H + +#include "stm32f10x.h" + +extern uint32_t Epm_initModule(void); +extern uint32_t Epm_wrtieData(uint16_t address, uint8_t data); +extern uint32_t Epm_readData(u16 ReadAddr,u8 *pBuffer,u16 NumToRead); +extern void Epm_Write(uint16_t WriteAddr,uint8_t *pBuffer,uint16_t NumToWrite); +extern void Epm_Read(uint16_t ReadAddr,uint8_t *pBuffer,uint16_t NumToRead); +extern void Epm_WriteLenByte(uint16_t WriteAddr,uint32_t DataToWrite,uint16_t Len); +extern uint32_t Epm_ReadLenByte(uint16_t ReadAddr,uint16_t Len); + + +extern u8 AT24C02_ReadOneByte(u16 ReadAddr); +extern void AT24C02_WriteOneByte(u16 WriteAddr,u8 DataToWrite); +extern void AT24C02_Read(u16 ReadAddr,u8 *pBuffer,u16 NumToRead); + +#endif + diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/MDK-ARM/Clean.bat b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/MDK-ARM/Clean.bat new file mode 100644 index 0000000000000000000000000000000000000000..62f0e6a69ff52df32c3b60267c18245825b73238 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/MDK-ARM/Clean.bat @@ -0,0 +1,52 @@ +rd /S /Q Project\MDKARM(uV5)\Listings + +del *.crf /Q /S +del *.o /Q /S +del *.d /Q /S +::del *.axf /Q /S +del *.htm /Q /S +del *.sct /Q /S +del *.dep /Q /S + +del *.lst /Q /S +del *.map /Q /S + +del *.uvguix.* /Q /S +del JLinkLog.txt /Q /S + +del *.iex /s +del *.tra /s +del *.bak /s +del *.ddk /s +del *.edk /s +del *.lnp /s +del *.mpf /s +del *.mpj /s +del *.obj /s +del *.omf /s +::del *.opt /s ::不允许删除JLINK的设置 +del *.plg /s +del *.rpt /s +del *.tmp /s +del *.__i /s +del *.pbi /s +del *.cout /s +del *.pbd /s +del *.browse /s +rd /q /s MDK-ARM\DebugConfig +rd /q /s MDK-ARM\RTE + +del /Q Listings\*.* +del /Q Objects\*.* +del /Q *.bak +del /Q *.plg +del /Q *.dep +del /Q *.Administrator +::rd /q /s EWARM\settings + +del *.iex /s +del *.htm /s +::del *.sct /s +del *.map /s + +exit \ No newline at end of file diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/MDK-ARM/DebugConfig/STM32F10X_XL_BANK1_STM32F103ZG_1.0.0.dbgconf b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/MDK-ARM/DebugConfig/STM32F10X_XL_BANK1_STM32F103ZG_1.0.0.dbgconf new file mode 100644 index 0000000000000000000000000000000000000000..66e10b605e467b15b36ad09bf95b8cdb496b13b5 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/MDK-ARM/DebugConfig/STM32F10X_XL_BANK1_STM32F103ZG_1.0.0.dbgconf @@ -0,0 +1,36 @@ +// File: STM32F101_102_103_105_107.dbgconf +// Version: 1.0.0 +// Note: refer to STM32F101xx STM32F102xx STM32F103xx STM32F105xx STM32F107xx Reference manual (RM0008) +// STM32F101xx STM32F102xx STM32F103xx STM32F105xx STM32F107xx datasheets + +// <<< Use Configuration Wizard in Context Menu >>> + +// Debug MCU configuration register (DBGMCU_CR) +// Reserved bits must be kept at reset value +// DBG_TIM11_STOP TIM11 counter stopped when core is halted +// DBG_TIM10_STOP TIM10 counter stopped when core is halted +// DBG_TIM9_STOP TIM9 counter stopped when core is halted +// DBG_TIM14_STOP TIM14 counter stopped when core is halted +// DBG_TIM13_STOP TIM13 counter stopped when core is halted +// DBG_TIM12_STOP TIM12 counter stopped when core is halted +// DBG_CAN2_STOP Debug CAN2 stopped when core is halted +// DBG_TIM7_STOP TIM7 counter stopped when core is halted +// DBG_TIM6_STOP TIM6 counter stopped when core is halted +// DBG_TIM5_STOP TIM5 counter stopped when core is halted +// DBG_TIM8_STOP TIM8 counter stopped when core is halted +// DBG_I2C2_SMBUS_TIMEOUT SMBUS timeout mode stopped when core is halted +// DBG_I2C1_SMBUS_TIMEOUT SMBUS timeout mode stopped when core is halted +// DBG_CAN1_STOP Debug CAN1 stopped when Core is halted +// DBG_TIM4_STOP TIM4 counter stopped when core is halted +// DBG_TIM3_STOP TIM3 counter stopped when core is halted +// DBG_TIM2_STOP TIM2 counter stopped when core is halted +// DBG_TIM1_STOP TIM1 counter stopped when core is halted +// DBG_WWDG_STOP Debug window watchdog stopped when core is halted +// DBG_IWDG_STOP Debug independent watchdog stopped when core is halted +// DBG_STANDBY Debug standby mode +// DBG_STOP Debug stop mode +// DBG_SLEEP Debug sleep mode +// +DbgMCU_CR = 0x00000007; + +// <<< end of configuration section >>> diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/MDK-ARM/Project.uvoptx b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/MDK-ARM/Project.uvoptx new file mode 100644 index 0000000000000000000000000000000000000000..81ad241bb9f24814d020d9579f1d0a0efdc4625e --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/MDK-ARM/Project.uvoptx @@ -0,0 +1,655 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + STM32F10X_XL_BANK1 + 0x4 + ARM-ADS + + 12000000 + + 1 + 1 + 1 + 0 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\STM32F10X_XL\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 255 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + + + + + + + + + + + BIN\UL2CM3.DLL + + + + 0 + UL2CM3 + -UV0579U9E -O2254 -S0 -C0 -N00("ARM CoreSight SW-DP") -D00(1BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FN1 -FC1000 -FD20000000 -FF0STM32F10x_1024 -FL0100000 -FS08000000 -FP0($$Device:STM32F103ZG$Flash\STM32F10x_1024.FLM) + + + 0 + DLGTARM + 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(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(100=-1,-1,-1,-1,0)(110=-1,-1,-1,-1,0)(111=-1,-1,-1,-1,0)(1011=-1,-1,-1,-1,0)(180=-1,-1,-1,-1,0)(120=-1,-1,-1,-1,0)(121=-1,-1,-1,-1,0)(123=-1,-1,-1,-1,0)(140=-1,-1,-1,-1,0)(240=-1,-1,-1,-1,0)(190=-1,-1,-1,-1,0)(200=-1,-1,-1,-1,0)(170=-1,-1,-1,-1,0)(131=-1,-1,-1,-1,0)(132=-1,-1,-1,-1,0)(160=-1,-1,-1,-1,0)(161=-1,-1,-1,-1,0)(210=-1,-1,-1,-1,0)(220=-1,-1,-1,-1,0)(150=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + (105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0) + + + + + + 1 + 2 + 0x08080000 + 0 + + + + 0 + + + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + + + + User + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + ..\stm32f10x_it.c + stm32f10x_it.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + ..\main.c + main.c + 0 + 0 + + 44 + 2 + 3 + + -1 + -1 + + + -4 + -30 + + + 0 + 0 + 909 + 420 + + + + + + + StdPeriph_Driver + 1 + 0 + 0 + 0 + + 2 + 3 + 1 + 0 + 0 + 0 + ..\..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_rcc.c + stm32f10x_rcc.c + 0 + 0 + + + 2 + 4 + 1 + 0 + 0 + 0 + ..\..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_gpio.c + stm32f10x_gpio.c + 0 + 0 + + + 2 + 5 + 1 + 0 + 0 + 0 + ..\..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\misc.c + misc.c + 0 + 0 + + + 2 + 6 + 1 + 0 + 0 + 0 + ..\..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_exti.c + stm32f10x_exti.c + 0 + 0 + + + 2 + 7 + 1 + 0 + 0 + 0 + ..\..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_spi.c + stm32f10x_spi.c + 0 + 0 + + + 2 + 8 + 1 + 0 + 0 + 0 + ..\..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_fsmc.c + stm32f10x_fsmc.c + 0 + 0 + + + 2 + 9 + 1 + 0 + 0 + 0 + ..\..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_usart.c + stm32f10x_usart.c + 0 + 0 + + + 2 + 10 + 1 + 0 + 0 + 0 + ..\..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_sdio.c + stm32f10x_sdio.c + 0 + 0 + + + 2 + 11 + 1 + 0 + 0 + 0 + ..\..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dma.c + stm32f10x_dma.c + 0 + 0 + + + 2 + 12 + 1 + 0 + 0 + 0 + ..\..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_i2c.c + stm32f10x_i2c.c + 0 + 0 + + + 2 + 13 + 1 + 0 + 0 + 0 + ..\..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_flash.c + stm32f10x_flash.c + 0 + 0 + + + + + CMSIS + 1 + 0 + 0 + 0 + + 3 + 14 + 1 + 0 + 0 + 0 + ..\..\..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.c + system_stm32f10x.c + 0 + 0 + + + + + STM32_EVAL + 1 + 0 + 0 + 0 + + 4 + 15 + 1 + 0 + 0 + 0 + ..\..\..\..\..\Utilities\STM32_EVAL\stm32_eval.c + stm32_eval.c + 0 + 0 + + + 4 + 16 + 1 + 0 + 0 + 0 + ..\..\..\..\..\Utilities\STM32_EVAL\STM3210E_EVAL\stm3210e_eval_lcd.c + stm3210e_eval_lcd.c + 0 + 0 + + + + + RVMDK + 1 + 0 + 0 + 0 + + 5 + 17 + 2 + 0 + 0 + 0 + ..\..\..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\startup\arm\startup_stm32f10x_xl.s + startup_stm32f10x_xl.s + 0 + 0 + + + + + Doc + 1 + 0 + 0 + 0 + + 6 + 18 + 5 + 0 + 0 + 0 + ..\readme.txt + readme.txt + 0 + 0 + + + + + ::CMSIS + 0 + 0 + 0 + 1 + + + diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/MDK-ARM/Project.uvproj.saved_uv4 b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/MDK-ARM/Project.uvproj.saved_uv4 new file mode 100644 index 0000000000000000000000000000000000000000..d63a62bcd27da2b6d855f636965a9514f67ec2ae --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/MDK-ARM/Project.uvproj.saved_uv4 @@ -0,0 +1,1007 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + + STM32F10X_XL_BANK1 + 0x4 + ARM-ADS + + + STM32F103ZG + STMicroelectronics + IRAM(0x20000000-0x20017FFF) IROM(0x8000000-0x80FFFFF) CLOCK(8000000) CPUTYPE("Cortex-M3") + + "STARTUP\ST\STM32F10x.s" ("STM32 Startup Code") + UL2CM3(-O14 -S0 -C0 -N00("ARM Cortex-M3") -D00(1BA00477) -L00(4) -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F10x_512 -FS08000000 -FL080000) + 5094 + stm32f10x_lib.h + + + + + + + + + + 0 + + + + ST\STM32F10x\ + ST\STM32F10x\ + + 0 + 0 + 0 + 0 + 1 + + .\STM32F10X_XL\ + STM32F10X_XL_BANK1 + 1 + 0 + 0 + 1 + 1 + .\STM32F10X_XL\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + + + SARMCM3.DLL + + DARMSTM.DLL + -pSTM32F103ZG + SARMCM3.DLL + + TARMSTM.DLL + -pSTM32F103ZG + + + + 1 + 0 + 0 + 0 + 16 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + + 0 + 1 + + + + + + + + + + + + + + BIN\UL2CM3.DLL + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + BIN\UL2CM3.DLL + "" () + + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M3" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 8 + 1 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x18000 + + + 1 + 0x8000000 + 0x100000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x80000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x18000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 4 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + + + USE_STDPERIPH_DRIVER, STM32F10X_XL, USE_STM3210E_EVAL, BOOT_FROM_BANK1 + + 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..\..\..\..\..\Utilities\STM32_EVAL\stm32_eval.c + + + stm3210e_eval_lcd.c + 1 + ..\..\..\..\..\Utilities\STM32_EVAL\STM3210E_EVAL\stm3210e_eval_lcd.c + + + + + RVMDK + + + startup_stm32f10x_xl.s + 2 + ..\..\..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\startup\arm\startup_stm32f10x_xl.s + + + + + Doc + + + readme.txt + 5 + ..\readme.txt + + + + + + + + diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/MDK-ARM/Project.uvprojx b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/MDK-ARM/Project.uvprojx new file mode 100644 index 0000000000000000000000000000000000000000..6277177ce3672987ac4f226826da4d8189ee43f0 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/MDK-ARM/Project.uvprojx @@ -0,0 +1,1018 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + STM32F10X_XL_BANK1 + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + STM32F103ZG + STMicroelectronics + Keil.STM32F1xx_DFP.2.3.0 + http://www.keil.com/pack/ + IRAM(0x20000000,0x00018000) IROM(0x08000000,0x00100000) CPUTYPE("Cortex-M3") CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F10x_1024 -FS08000000 -FL0100000 -FP0($$Device:STM32F103ZG$Flash\STM32F10x_1024.FLM)) + 5094 + $$Device:STM32F103ZG$Device\Include\stm32f10x.h + + + + + + + + + + $$Device:STM32F103ZG$SVD\STM32F103xx.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\STM32F10X_XL\ + STM32F10X_XL_BANK1 + 1 + 0 + 0 + 1 + 1 + .\STM32F10X_XL\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -MPU + DARMSTM.DLL + -pSTM32F103ZG + SARMCM3.DLL + -MPU + TARMSTM.DLL + -pSTM32F103ZG + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 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+ + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -MPU + DARMSTM.DLL + -pSTM32F103ZG + SARMCM3.DLL + -MPU + TARMSTM.DLL + -pSTM32F103ZG + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 0 + BIN\UL2CM3.DLL + + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M3" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 8 + 1 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x18000 + + + 1 + 0x8000000 + 0x100000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x100000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x18000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 4 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + USE_STDPERIPH_DRIVER, STM32F10X_XL, USE_STM3210E_EVAL, BOOT_FROM_BANK2 + + ..\;..\..\..\..\..\Libraries\CMSIS\CM3\CoreSupport;..\..\..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x;..\..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc;..\..\..\..\..\Utilities\STM32_EVAL;..\..\..\..\..\Utilities\STM32_EVAL\STM3210E_EVAL;..\..\..\..\..\Utilities\STM32_EVAL\Common + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 1 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + + + + + + + + + User + + + stm32f10x_it.c + 1 + ..\stm32f10x_it.c + + + main.c + 1 + ..\main.c + + + + + StdPeriph_Driver + + + stm32f10x_rcc.c + 1 + ..\..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_rcc.c + + + stm32f10x_gpio.c + 1 + ..\..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_gpio.c + + + misc.c + 1 + ..\..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\misc.c + + + stm32f10x_exti.c + 1 + ..\..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_exti.c + + + stm32f10x_spi.c + 1 + ..\..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_spi.c + + + stm32f10x_fsmc.c + 1 + ..\..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_fsmc.c + + + stm32f10x_usart.c + 1 + ..\..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_usart.c + + + stm32f10x_sdio.c + 1 + ..\..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_sdio.c + + + stm32f10x_dma.c + 1 + ..\..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dma.c + + + stm32f10x_i2c.c + 1 + ..\..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_i2c.c + + + stm32f10x_flash.c + 1 + ..\..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_flash.c + + + + + CMSIS + + + system_stm32f10x.c + 1 + ..\..\..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.c + + + + + STM32_EVAL + + + stm32_eval.c + 1 + ..\..\..\..\..\Utilities\STM32_EVAL\stm32_eval.c + + + stm3210e_eval_lcd.c + 1 + ..\..\..\..\..\Utilities\STM32_EVAL\STM3210E_EVAL\stm3210e_eval_lcd.c + + + + + RVMDK + + + startup_stm32f10x_xl.s + 2 + ..\..\..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\startup\arm\startup_stm32f10x_xl.s + + + + + Doc + + + readme.txt + 5 + ..\readme.txt + + + + + ::CMSIS + + + + + + + + + + + + + + + + + + + + diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/MDK-ARM/RTE/_STM32F10X_XL_BANK1/RTE_Components.h b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/MDK-ARM/RTE/_STM32F10X_XL_BANK1/RTE_Components.h new file mode 100644 index 0000000000000000000000000000000000000000..386328a7057ceda0bc1061219efee780aa811db8 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/MDK-ARM/RTE/_STM32F10X_XL_BANK1/RTE_Components.h @@ -0,0 +1,20 @@ + +/* + * Auto generated Run-Time-Environment Component Configuration File + * *** Do not modify ! *** + * + * Project: 'Project' + * Target: 'STM32F10X_XL_BANK1' + */ + +#ifndef RTE_COMPONENTS_H +#define RTE_COMPONENTS_H + + +/* + * Define the Device Header File: + */ +#define CMSIS_device_header "stm32f10x.h" + + +#endif /* RTE_COMPONENTS_H */ diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/MDK-ARM/STM32F10X_XL/STM32F10X_XL_BANK1.axf b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/MDK-ARM/STM32F10X_XL/STM32F10X_XL_BANK1.axf new file mode 100644 index 0000000000000000000000000000000000000000..7eb966ce86e29d0b2cf12a57f8a7e14c61351182 Binary files /dev/null and b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/MDK-ARM/STM32F10X_XL/STM32F10X_XL_BANK1.axf differ diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/GPIO/gpio_map.h b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/GPIO/gpio_map.h new file mode 100644 index 0000000000000000000000000000000000000000..2fee4e1af817b89eddc3b91b76664863ec5c11e0 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/GPIO/gpio_map.h @@ -0,0 +1,56 @@ + +//位带操作,实现51类似的GPIO控制功能 +//具体实现思想,参考<>第五章(87页~92页). + +#ifndef __GPIO_MAP_H +#define __GPIO_MAP_H + +#include "stm32f10x.h" + + +//IO口操作宏定义 +#define BITBAND(addr, bitnum) ((addr & 0xF0000000)+0x2000000+((addr &0xFFFFF)<<5)+(bitnum<<2)) +#define MEM_ADDR(addr) *((volatile unsigned long *)(addr)) +#define BIT_ADDR(addr, bitnum) MEM_ADDR(BITBAND(addr, bitnum)) +//IO口地址映射 +#define GPIOA_ODR_Addr (GPIOA_BASE+12) //0x4001080C +#define GPIOB_ODR_Addr (GPIOB_BASE+12) //0x40010C0C +#define GPIOC_ODR_Addr (GPIOC_BASE+12) //0x4001100C +#define GPIOD_ODR_Addr (GPIOD_BASE+12) //0x4001140C +#define GPIOE_ODR_Addr (GPIOE_BASE+12) //0x4001180C + +#define GPIOA_IDR_Addr (GPIOA_BASE+8) //0x40010808 +#define GPIOB_IDR_Addr (GPIOB_BASE+8) //0x40010C08 +#define GPIOC_IDR_Addr (GPIOC_BASE+8) //0x40011008 +#define GPIOD_IDR_Addr (GPIOD_BASE+8) //0x40011408 +#define GPIOE_IDR_Addr (GPIOE_BASE+8) //0x40011808 + +//IO口操作,只对单一的IO口! +//确保n的值小于16! +#define PAout(n) BIT_ADDR(GPIOA_ODR_Addr,n) //输出 +#define PAin(n) BIT_ADDR(GPIOA_IDR_Addr,n) //输入 + +#define PBout(n) BIT_ADDR(GPIOB_ODR_Addr,n) //输出 +#define PBin(n) BIT_ADDR(GPIOB_IDR_Addr,n) //输入 + +#define PCout(n) BIT_ADDR(GPIOC_ODR_Addr,n) //输出 +#define PCin(n) BIT_ADDR(GPIOC_IDR_Addr,n) //输入 + +#define PDout(n) BIT_ADDR(GPIOD_ODR_Addr,n) //输出 +#define PDin(n) BIT_ADDR(GPIOD_IDR_Addr,n) //输入 + +#define PEout(n) BIT_ADDR(GPIOE_ODR_Addr,n) //输出 +#define PEin(n) BIT_ADDR(GPIOE_IDR_Addr,n) //输入 + +#endif + + + + + + + + + + + diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Template/MDK-ARM/Clean.bat b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Template/MDK-ARM/Clean.bat new file mode 100644 index 0000000000000000000000000000000000000000..3487aa46d7199b9632d43caac658a3522f4ec4e6 --- /dev/null +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Template/MDK-ARM/Clean.bat @@ -0,0 +1,47 @@ +rd /S /Q Project\MDKARM(uV5)\Listings + +del *.crf /Q /S +del *.o /Q /S +del *.d /Q /S +::del *.axf /Q /S +del *.htm /Q /S +del *.sct /Q /S +del *.dep /Q /S + +del *.lst /Q /S +del *.map /Q /S + +del *.uvguix.* /Q /S +del JLinkLog.txt /Q /S + +del *.iex /s +del *.tra /s +del *.bak /s +del *.ddk /s +del *.edk /s +del *.lnp /s +del *.mpf /s +del *.mpj /s +del *.obj /s +del *.omf /s +::del *.opt /s ::不允许删除JLINK的设置 +del *.plg /s +del *.rpt /s +del *.tmp /s +del *.__i /s +del *.pbi /s +del *.cout /s +del *.pbd /s +del *.browse /s +rd /q /s MDK-ARM\DebugConfig +rd /q /s MDK-ARM\RTE + +del /Q Listings\*.* +del /Q Objects\*.* +del /Q *.bak +del /Q *.plg +del /Q *.dep +del /Q *.Administrator +::rd /q /s EWARM\settings + +exit \ No newline at end of file diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Template/MDK-ARM/JLinkLog.txt b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Template/MDK-ARM/JLinkLog.txt deleted file mode 100644 index 982769f9a18de7ee9fac269bd26adae1817056a0..0000000000000000000000000000000000000000 --- a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Template/MDK-ARM/JLinkLog.txt +++ /dev/null @@ -1,1618 +0,0 @@ -T2D54 3732:925.533 SEGGER J-Link V6.70c Log File -T2D54 3732:925.605 DLL Compiled: Apr 7 2020 16:25:12 -T2D54 3732:925.613 Logging started @ 2020-10-26 09:29 -T2D54 3732:925.625 JLINK_SetWarnOutHandler(...) -T2D54 3732:925.632 - 0.009ms -T2D54 3732:925.641 JLINK_OpenEx(...) -T2D54 3732:927.368 Firmware: J-Link V9 compiled Dec 13 2019 11:14:50 -T2D54 3732:927.548 Decompressing FW timestamp took 140 us -T2D54 3732:935.742 Hardware: V9.40 -T2D54 3732:935.763 S/N: 59400616 -T2D54 3732:935.772 OEM: SEGGER -T2D54 3732:935.781 Feature(s): RDI, FlashBP, FlashDL, JFlash, GDB -T2D54 3732:937.444 TELNET listener socket opened on port 19021 -T2D54 3732:941.198 WEBSRV Starting webserver -T2D54 3732:941.354 WEBSRV Webserver running on local port 19080 -T2D54 3732:941.366 - 15.728ms returns "O.K." -T2D54 3732:941.386 JLINK_GetEmuCaps() -T2D54 3732:941.393 - 0.010ms returns 0xB9FF7BBF -T2D54 3732:941.402 JLINK_TIF_GetAvailable(...) -T2D54 3732:941.677 - 0.284ms -T2D54 3732:941.705 JLINK_SetErrorOutHandler(...) -T2D54 3732:941.713 - 0.011ms -T2D54 3732:941.728 JLINK_ExecCommand("ProjectFile = "C:\Users\Tingl\Desktop\STM32F10x_StdPeriph_Lib_V3.5.0\Project\STM32F10x_StdPeriph_Template\MDK-ARM\JLinkSettings.ini"", ...). -T2D54 3732:948.245 - 6.530ms returns 0x00 -T2D54 3732:948.291 JLINK_ExecCommand("Device = STM32F105VC", ...). -T2D54 3732:948.587 Device "STM32F105VC" selected. -T2D54 3732:953.633 - 5.356ms returns 0x00 -T2D54 3732:953.669 JLINK_ExecCommand("DisableConnectionTimeout", ...). -T2D54 3732:953.682 - 0.006ms returns 0x01 -T2D54 3732:953.696 JLINK_GetHardwareVersion() -T2D54 3732:953.702 - 0.010ms returns 0x16F30 -T2D54 3732:953.715 JLINK_GetDLLVersion() returns 67003 -T2D54 3732:953.728 JLINK_GetFirmwareString(...) -T2D54 3732:953.735 - 0.009ms -T2D54 3732:954.400 JLINK_GetDLLVersion() returns 67003 -T2D54 3732:954.419 JLINK_GetCompileDateTime() -T2D54 3732:954.426 - 0.010ms -T2D54 3732:954.448 JLINK_GetFirmwareString(...) -T2D54 3732:954.455 - 0.010ms -T2D54 3732:954.468 JLINK_GetHardwareVersion() -T2D54 3732:954.474 - 0.009ms returns 0x16F30 -T2D54 3732:954.505 JLINK_TIF_Select(JLINKARM_TIF_SWD) -T2D54 3732:955.881 - 1.383ms returns 0x00 -T2D54 3732:955.906 JLINK_SetSpeed(5000) -T2D54 3732:956.136 - 0.237ms -T2D54 3732:956.152 JLINK_GetId() -T2D54 3732:957.496 Found SW-DP with ID 0x1BA01477 -T2D54 3732:969.862 Found SW-DP with ID 0x1BA01477 -T2D54 3732:971.889 Old FW that does not support reading DPIDR via DAP jobs -T2D54 3732:972.545 Unknown DP version. Assuming DPv0 -T2D54 3732:972.564 Scanning AP map to find all available APs -T2D54 3732:973.125 AP[1]: Stopped AP scan as end of AP map has been reached -T2D54 3732:973.141 AP[0]: AHB-AP (IDR: 0x14770011) -T2D54 3732:973.154 Iterating through AP map to find AHB-AP to use -T2D54 3732:974.104 AP[0]: Core found -T2D54 3732:974.120 AP[0]: AHB-AP ROM base: 0xE00FF000 -T2D54 3732:974.633 CPUID register: 0x411FC231. Implementer code: 0x41 (ARM) -T2D54 3732:974.649 Found Cortex-M3 r1p1, Little endian. -T2D54 3733:076.824 -- Max. mem block: 0x00010DD0 -T2D54 3733:076.918 -- CPU_ReadMem(4 bytes @ 0xE000EDF0) -T2D54 3733:078.132 -- CPU_WriteMem(4 bytes @ 0xE000EDF0) -T2D54 3733:078.954 -- CPU_ReadMem(4 bytes @ 0xE0002000) -T2D54 3733:079.875 FPUnit: 6 code (BP) slots and 2 literal slots -T2D54 3733:079.955 -- CPU_ReadMem(4 bytes @ 0xE000EDFC) -T2D54 3733:080.718 -- CPU_WriteMem(4 bytes @ 0xE000EDFC) -T2D54 3733:081.398 -- CPU_ReadMem(4 bytes @ 0xE0001000) -T2D54 3733:082.131 -- CPU_WriteMem(4 bytes @ 0xE0001000) -T2D54 3733:082.809 -- CPU_ReadMem(4 bytes @ 0xE000ED88) -T2D54 3733:083.446 -- CPU_WriteMem(4 bytes @ 0xE000ED88) -T2D54 3733:084.039 -- CPU_ReadMem(4 bytes @ 0xE000ED88) -T2D54 3733:084.466 -- CPU_WriteMem(4 bytes @ 0xE000ED88) -T2D54 3733:084.914 CoreSight components: -T2D54 3733:084.931 ROMTbl[0] @ E00FF000 -T2D54 3733:084.941 -- CPU_ReadMem(64 bytes @ 0xE00FF000) -T2D54 3733:085.773 -- CPU_ReadMem(32 bytes @ 0xE000EFE0) -T2D54 3733:086.304 ROMTbl[0][0]: E000E000, CID: B105E00D, PID: 001BB000 SCS -T2D54 3733:086.376 -- CPU_ReadMem(32 bytes @ 0xE0001FE0) -T2D54 3733:086.932 ROMTbl[0][1]: E0001000, CID: B105E00D, PID: 001BB002 DWT -T2D54 3733:086.946 -- CPU_ReadMem(32 bytes @ 0xE0002FE0) -T2D54 3733:087.377 ROMTbl[0][2]: E0002000, CID: B105E00D, PID: 000BB003 FPB -T2D54 3733:087.390 -- CPU_ReadMem(32 bytes @ 0xE0000FE0) -T2D54 3733:087.834 ROMTbl[0][3]: E0000000, CID: B105E00D, PID: 001BB001 ITM -T2D54 3733:087.847 -- CPU_ReadMem(32 bytes @ 0xE0040FE0) -T2D54 3733:088.294 ROMTbl[0][4]: E0040000, CID: B105900D, PID: 001BB923 TPIU-Lite -T2D54 3733:088.307 -- CPU_ReadMem(32 bytes @ 0xE0041FE0) -T2D54 3733:088.752 ROMTbl[0][5]: E0041000, CID: B105900D, PID: 101BB924 ETM-M3 -T2D54 3733:089.037 - 132.890ms returns 0x1BA01477 -T2D54 3733:089.055 JLINK_GetDLLVersion() returns 67003 -T2D54 3733:089.124 JLINK_CORE_GetFound() -T2D54 3733:089.133 - 0.013ms returns 0x30000FF -T2D54 3733:089.143 JLINK_GetDebugInfo(0x100 = JLINKARM_ROM_TABLE_ADDR_INDEX) -T2D54 3733:089.152 Value=0xE00FF000 -T2D54 3733:089.161 - 0.021ms returns 0x00 -T2D54 3733:089.177 JLINK_GetDebugInfo(0x100 = JLINKARM_ROM_TABLE_ADDR_INDEX) -T2D54 3733:089.184 Value=0xE00FF000 -T2D54 3733:089.193 - 0.019ms returns 0x00 -T2D54 3733:089.201 JLINK_GetDebugInfo(0x101 = JLINKARM_DEBUG_INFO_ETM_ADDR_INDEX) -T2D54 3733:089.208 Value=0xE0041000 -T2D54 3733:089.216 - 0.018ms returns 0x00 -T2D54 3733:089.227 JLINK_ReadMemEx(0xE0041FD0, 0x0020 Bytes, ..., Flags = 0x02000004) -T2D54 3733:089.241 -- CPU_ReadMem(32 bytes @ 0xE0041FD0) -T2D54 3733:089.727 Data: 04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ... -T2D54 3733:089.738 - 0.515ms returns 0x20 -T2D54 3733:089.748 JLINK_GetDebugInfo(0x102 = JLINKARM_DEBUG_INFO_MTB_ADDR_INDEX) -T2D54 3733:089.755 Value=0x00000000 -T2D54 3733:089.764 - 0.018ms returns 0x00 -T2D54 3733:089.772 JLINK_GetDebugInfo(0x103 = JLINKARM_DEBUG_INFO_TPIU_ADDR_INDEX) -T2D54 3733:089.778 Value=0xE0040000 -T2D54 3733:089.787 - 0.018ms returns 0x00 -T2D54 3733:089.795 JLINK_GetDebugInfo(0x104 = JLINKARM_DEBUG_INFO_ITM_ADDR_INDEX) -T2D54 3733:089.802 Value=0xE0000000 -T2D54 3733:089.811 - 0.018ms returns 0x00 -T2D54 3733:089.819 JLINK_GetDebugInfo(0x105 = JLINKARM_DEBUG_INFO_DWT_ADDR_INDEX) -T2D54 3733:089.825 Value=0xE0001000 -T2D54 3733:089.834 - 0.018ms returns 0x00 -T2D54 3733:089.842 JLINK_GetDebugInfo(0x106 = JLINKARM_DEBUG_INFO_FPB_ADDR_INDEX) -T2D54 3733:089.849 Value=0xE0002000 -T2D54 3733:089.857 - 0.018ms returns 0x00 -T2D54 3733:089.865 JLINK_GetDebugInfo(0x107 = JLINKARM_DEBUG_INFO_NVIC_ADDR_INDEX) -T2D54 3733:089.872 Value=0xE000E000 -T2D54 3733:089.880 - 0.018ms returns 0x00 -T2D54 3733:089.888 JLINK_GetDebugInfo(0x10C = JLINKARM_DEBUG_INFO_DBG_ADDR_INDEX) -T2D54 3733:089.895 Value=0xE000EDF0 -T2D54 3733:089.903 - 0.018ms returns 0x00 -T2D54 3733:089.911 JLINK_GetDebugInfo(0x01 = Unknown) -T2D54 3733:089.918 Value=0x00000000 -T2D54 3733:089.926 - 0.018ms returns 0x00 -T2D54 3733:089.936 JLINK_ReadMemU32(0xE000ED00, 0x0001 Items, ...) -T2D54 3733:089.945 -- CPU_ReadMem(4 bytes @ 0xE000ED00) -T2D54 3733:090.249 Data: 31 C2 1F 41 -T2D54 3733:090.261 - CPUID -T2D54 3733:090.270 - 0.337ms returns 1 -T2D54 3733:090.282 JLINK_GetDebugInfo(0x10F = JLINKARM_DEBUG_INFO_HAS_CORTEX_M_SECURITY_EXT_INDEX) -T2D54 3733:090.289 Value=0x00000000 -T2D54 3733:090.297 - 0.018ms returns 0x00 -T2D54 3733:090.309 JLINK_SetResetType(JLINKARM_CM3_RESET_TYPE_NORMAL) -T2D54 3733:090.316 - 0.009ms returns JLINKARM_CM3_RESET_TYPE_NORMAL -T2D54 3733:090.324 JLINK_Reset() -T2D54 3733:090.334 CPU is running -T2D54 3733:090.344 -- CPU_WriteMem(4 bytes @ 0xE000EDF0) -T2D54 3733:090.665 CPU is running -T2D54 3733:090.678 -- CPU_WriteMem(4 bytes @ 0xE000EDFC) -T2D54 3733:091.015 Reset: Halt core after reset via DEMCR.VC_CORERESET. -T2D54 3733:091.482 Reset: Reset device via AIRCR.SYSRESETREQ. -T2D54 3733:091.498 CPU is running -T2D54 3733:091.508 -- CPU_WriteMem(4 bytes @ 0xE000ED0C) -T2D54 3733:145.386 -- CPU_ReadMem(4 bytes @ 0xE000EDF0) -T2D54 3733:146.003 -- CPU_ReadMem(4 bytes @ 0xE000EDF0) -T2D54 3733:146.550 CPU is running -T2D54 3733:146.584 -- CPU_WriteMem(4 bytes @ 0xE000EDF0) -T2D54 3733:147.142 CPU is running -T2D54 3733:147.175 -- CPU_WriteMem(4 bytes @ 0xE000EDFC) -T2D54 3733:153.248 -- CPU_ReadMem(4 bytes @ 0xE000EDF0) -T2D54 3733:156.006 -- CPU_WriteMem(4 bytes @ 0xE0002000) -T2D54 3733:156.520 -- CPU_ReadMem(4 bytes @ 0xE000EDFC) -T2D54 3733:156.957 -- CPU_ReadMem(4 bytes @ 0xE0001000) -T2D54 3733:157.427 - 67.109ms -T2D54 3733:157.535 JLINK_ReadReg(R15 (PC)) -T2D54 3733:157.548 - 0.016ms returns 0x08000164 -T2D54 3733:157.556 JLINK_ReadReg(XPSR) -T2D54 3733:157.563 - 0.010ms returns 0x01000000 -T2D54 3733:157.573 JLINK_Halt() -T2D54 3733:157.579 - 0.009ms returns 0x00 -T2D54 3733:157.587 JLINK_ReadMemU32(0xE000EDF0, 0x0001 Items, ...) -T2D54 3733:157.597 -- CPU_ReadMem(4 bytes @ 0xE000EDF0) -T2D54 3733:158.016 Data: 03 00 03 00 -T2D54 3733:158.029 - DHCSR -T2D54 3733:158.038 - 0.454ms returns 1 -T2D54 3733:158.050 JLINK_WriteU32(0xE000EDF0, 0xA05F0003) -T2D54 3733:158.057 - DHCSR -T2D54 3733:158.086 -- CPU_WriteMem(4 bytes @ 0xE000EDF0) -T2D54 3733:158.491 - 0.447ms returns 0 -T2D54 3733:158.505 JLINK_WriteU32(0xE000EDFC, 0x01000000) -T2D54 3733:158.512 - DEMCR -T2D54 3733:158.524 -- CPU_WriteMem(4 bytes @ 0xE000EDFC) -T2D54 3733:158.938 - 0.440ms returns 0 -T2D54 3733:159.000 JLINK_GetHWStatus(...) -T2D54 3733:159.308 - 0.316ms returns 0x00 -T2D54 3733:159.341 JLINK_GetNumBPUnits(Type = 0xFFFFFF00) -T2D54 3733:159.349 - 0.011ms returns 0x06 -T2D54 3733:159.358 JLINK_GetNumBPUnits(Type = 0xF0) -T2D54 3733:159.364 - 0.009ms returns 0x2000 -T2D54 3733:159.373 JLINK_GetNumWPUnits() -T2D54 3733:159.379 - 0.009ms returns 0x04 -T2D54 3733:159.398 JLINK_GetSpeed() -T2D54 3733:159.405 - 0.009ms returns 0xFA0 -T2D54 3733:159.419 JLINK_ReadMemU32(0xE000E004, 0x0001 Items, ...) -T2D54 3733:159.429 -- CPU_ReadMem(4 bytes @ 0xE000E004) -T2D54 3733:159.809 Data: 02 00 00 00 -T2D54 3733:159.822 - 0.406ms returns 1 -T2D54 3733:159.833 JLINK_ReadMemU32(0xE000E004, 0x0001 Items, ...) -T2D54 3733:159.843 -- CPU_ReadMem(4 bytes @ 0xE000E004) -T2D54 3733:160.246 Data: 02 00 00 00 -T2D54 3733:160.258 - 0.429ms returns 1 -T2D54 3733:160.270 JLINK_WriteMemEx(0xE0001000, 0x001C Bytes, ..., Flags = 0x02000004) -T2D54 3733:160.278 Data: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ... -T2D54 3733:160.763 -- CPU_WriteMem(28 bytes @ 0xE0001000) -T2D54 3733:161.235 - 0.971ms returns 0x1C -T2D54 3733:161.252 JLINK_ReadReg(R15 (PC)) -T2D54 3733:161.260 - 0.011ms returns 0x08000164 -T2D54 3733:161.268 JLINK_ReadReg(XPSR) -T2D54 3733:161.275 - 0.010ms returns 0x01000000 -T2D54 3733:228.840 JLINK_SetResetType(JLINKARM_CM3_RESET_TYPE_NORMAL) -T2D54 3733:228.863 - 0.027ms returns JLINKARM_CM3_RESET_TYPE_NORMAL -T2D54 3733:228.872 JLINK_Reset() -T2D54 3733:228.888 -- CPU_WriteMem(4 bytes @ 0xE000EDF0) -T2D54 3733:229.440 -- CPU_WriteMem(4 bytes @ 0xE000EDFC) -T2D54 3733:229.955 Reset: Halt core after reset via DEMCR.VC_CORERESET. -T2D54 3733:230.647 Reset: Reset device via AIRCR.SYSRESETREQ. -T2D54 3733:230.663 -- CPU_WriteMem(4 bytes @ 0xE000ED0C) -T2D54 3733:284.248 -- CPU_ReadMem(4 bytes @ 0xE000EDF0) -T2D54 3733:284.908 -- CPU_ReadMem(4 bytes @ 0xE000EDF0) -T2D54 3733:285.521 -- CPU_WriteMem(4 bytes @ 0xE000EDF0) -T2D54 3733:286.244 -- CPU_WriteMem(4 bytes @ 0xE000EDFC) -T2D54 3733:292.854 -- CPU_ReadMem(4 bytes @ 0xE000EDF0) -T2D54 3733:295.909 -- CPU_WriteMem(4 bytes @ 0xE0002000) -T2D54 3733:296.473 -- CPU_ReadMem(4 bytes @ 0xE000EDFC) -T2D54 3733:297.021 -- CPU_ReadMem(4 bytes @ 0xE0001000) -T2D54 3733:297.596 - 68.747ms -T2D54 3733:297.722 JLINK_ReadReg(R15 (PC)) -T2D54 3733:297.781 - 0.074ms returns 0x08000164 -T2D54 3733:297.820 JLINK_ReadReg(XPSR) -T2D54 3733:297.841 - 0.031ms returns 0x01000000 -T06CC 3735:266.224 JLINK_ReadMemEx(0x08000164, 0x0002 Bytes, ..., Flags = 0x02000000) -T06CC 3735:266.266 -- CPU_ReadMem(64 bytes @ 0x08000140) -T06CC 3735:267.115 -- Updating C cache (64 bytes @ 0x08000140) -T06CC 3735:267.141 -- Read from C cache (2 bytes @ 0x08000164) -T06CC 3735:267.151 Data: 06 48 -T06CC 3735:267.160 - 0.940ms returns 0x02 -T06CC 3735:267.184 JLINK_SetBPEx(Addr = 0x08000A64, Type = 0xFFFFFFF2) -T06CC 3735:267.196 - 0.014ms returns 0x00000001 -T06CC 3735:267.209 JLINK_Go() -T06CC 3735:267.667 -- CPU_WriteMem(4 bytes @ 0xE0002000) -T06CC 3735:268.120 -- CPU_ReadMem(4 bytes @ 0xE0001000) -T06CC 3735:268.668 -- CPU_WriteMem(4 bytes @ 0xE0002008) -T06CC 3735:268.682 -- CPU_WriteMem(4 bytes @ 0xE000200C) -T06CC 3735:268.691 -- CPU_WriteMem(4 bytes @ 0xE0002010) -T06CC 3735:268.699 -- CPU_WriteMem(4 bytes @ 0xE0002014) -T06CC 3735:268.708 -- CPU_WriteMem(4 bytes @ 0xE0002018) -T06CC 3735:268.717 -- CPU_WriteMem(4 bytes @ 0xE000201C) -T06CC 3735:269.898 -- CPU_WriteMem(4 bytes @ 0xE0001004) -T06CC 3735:270.667 - 3.471ms -T06CC 3735:371.220 JLINK_IsHalted() -T06CC 3735:373.459 - 2.253ms returns TRUE -T06CC 3735:373.484 JLINK_Halt() -T06CC 3735:373.499 - 0.018ms returns 0x00 -T06CC 3735:373.555 JLINK_IsHalted() -T06CC 3735:373.562 - 0.010ms returns TRUE -T06CC 3735:373.570 JLINK_IsHalted() -T06CC 3735:373.576 - 0.009ms returns TRUE -T06CC 3735:373.584 JLINK_IsHalted() -T06CC 3735:373.590 - 0.008ms returns TRUE -T06CC 3735:373.601 JLINK_ReadReg(R15 (PC)) -T06CC 3735:373.609 - 0.011ms returns 0x08000A64 -T06CC 3735:373.617 JLINK_ReadReg(XPSR) -T06CC 3735:373.623 - 0.009ms returns 0x61000000 -T06CC 3735:373.640 JLINK_ClrBPEx(BPHandle = 0x00000001) -T06CC 3735:373.655 - 0.020ms returns 0x00 -T06CC 3735:373.673 JLINK_ReadMemU32(0xE000ED30, 0x0001 Items, ...) -T06CC 3735:373.692 -- CPU_ReadMem(4 bytes @ 0xE000ED30) -T06CC 3735:373.996 Data: 02 00 00 00 -T06CC 3735:374.015 - 0.347ms returns 1 -T06CC 3735:374.031 JLINK_ReadMemU32(0xE0001028, 0x0001 Items, ...) -T06CC 3735:374.047 -- CPU_ReadMem(4 bytes @ 0xE0001028) -T06CC 3735:374.382 Data: 00 00 00 00 -T06CC 3735:374.397 - DWT_FUNC[0] -T06CC 3735:374.406 - 0.378ms returns 1 -T06CC 3735:374.419 JLINK_ReadMemU32(0xE0001038, 0x0001 Items, ...) -T06CC 3735:374.429 -- CPU_ReadMem(4 bytes @ 0xE0001038) -T06CC 3735:374.814 Data: 00 02 00 00 -T06CC 3735:374.828 - DWT_FUNC[1] -T06CC 3735:374.837 - 0.421ms returns 1 -T06CC 3735:374.849 JLINK_ReadMemU32(0xE0001048, 0x0001 Items, ...) -T06CC 3735:374.860 -- CPU_ReadMem(4 bytes @ 0xE0001048) -T06CC 3735:375.226 Data: 00 00 00 00 -T06CC 3735:375.244 - DWT_FUNC[2] -T06CC 3735:375.253 - 0.406ms returns 1 -T06CC 3735:375.266 JLINK_ReadMemU32(0xE0001058, 0x0001 Items, ...) -T06CC 3735:375.284 -- CPU_ReadMem(4 bytes @ 0xE0001058) -T06CC 3735:375.677 Data: 00 00 00 00 -T06CC 3735:375.692 - DWT_FUNC[3] -T06CC 3735:375.701 - 0.438ms returns 1 -T06CC 3735:375.739 JLINK_ReadReg(R0) -T06CC 3735:375.748 - 0.012ms returns 0x08000A65 -T06CC 3735:375.758 JLINK_ReadReg(R1) -T06CC 3735:375.765 - 0.010ms returns 0x20000450 -T06CC 3735:375.775 JLINK_ReadReg(R2) -T06CC 3735:375.781 - 0.009ms returns 0x00000000 -T06CC 3735:375.791 JLINK_ReadReg(R3) -T06CC 3735:375.797 - 0.009ms returns 0x0800095D -T06CC 3735:375.806 JLINK_ReadReg(R4) -T06CC 3735:375.813 - 0.009ms returns 0x08000BA0 -T06CC 3735:375.822 JLINK_ReadReg(R5) -T06CC 3735:375.828 - 0.009ms returns 0x08000BA0 -T06CC 3735:375.838 JLINK_ReadReg(R6) -T06CC 3735:375.844 - 0.009ms returns 0x00000000 -T06CC 3735:375.853 JLINK_ReadReg(R7) -T06CC 3735:375.860 - 0.009ms returns 0x00000000 -T06CC 3735:375.869 JLINK_ReadReg(R8) -T06CC 3735:375.875 - 0.009ms returns 0x00000000 -T06CC 3735:375.885 JLINK_ReadReg(R9) -T06CC 3735:375.891 - 0.009ms returns 0x20000160 -T06CC 3735:375.901 JLINK_ReadReg(R10) -T06CC 3735:375.907 - 0.009ms returns 0x00000000 -T06CC 3735:375.917 JLINK_ReadReg(R11) -T06CC 3735:375.923 - 0.009ms returns 0x00000000 -T06CC 3735:375.932 JLINK_ReadReg(R12) -T06CC 3735:375.938 - 0.009ms returns 0x00000008 -T06CC 3735:375.948 JLINK_ReadReg(R13 (SP)) -T06CC 3735:375.954 - 0.009ms returns 0x20000450 -T06CC 3735:375.964 JLINK_ReadReg(R14) -T06CC 3735:375.970 - 0.009ms returns 0x080001A5 -T06CC 3735:375.979 JLINK_ReadReg(R15 (PC)) -T06CC 3735:376.024 - 0.048ms returns 0x08000A64 -T06CC 3735:376.034 JLINK_ReadReg(XPSR) -T06CC 3735:376.040 - 0.009ms returns 0x61000000 -T06CC 3735:376.048 JLINK_ReadReg(MSP) -T06CC 3735:376.055 - 0.009ms returns 0x20000450 -T06CC 3735:376.091 JLINK_ReadReg(PSP) -T06CC 3735:376.101 - 0.013ms returns 0x20001000 -T06CC 3735:376.110 JLINK_ReadReg(CFBP) -T06CC 3735:376.116 - 0.009ms returns 0x00000000 -T2D54 3735:379.586 JLINK_ReadMemU32(0xE0001004, 0x0001 Items, ...) -T2D54 3735:379.609 -- CPU_ReadMem(4 bytes @ 0xE0001004) -T2D54 3735:380.029 Data: 20 1A 00 00 -T2D54 3735:380.043 - DWT_CYCCNT -T2D54 3735:380.052 - 0.469ms returns 1 -T06CC 3742:601.563 JLINK_ReadMemEx(0x08000A64, 0x0002 Bytes, ..., Flags = 0x02000000) -T06CC 3742:601.633 -- CPU_ReadMem(64 bytes @ 0x08000A40) -T06CC 3742:602.460 -- Updating C cache (64 bytes @ 0x08000A40) -T06CC 3742:602.494 -- Read from C cache (2 bytes @ 0x08000A64) -T06CC 3742:602.518 Data: 00 20 -T06CC 3742:602.539 - 0.986ms returns 0x02 -T06CC 3742:602.582 JLINK_SetBPEx(Addr = 0x08000A98, Type = 0xFFFFFFF2) -T06CC 3742:602.608 - 0.035ms returns 0x00000002 -T06CC 3742:602.637 JLINK_Go() -T06CC 3742:603.195 -- CPU_WriteMem(4 bytes @ 0xE0002000) -T06CC 3742:603.713 -- CPU_ReadMem(4 bytes @ 0xE0001000) -T06CC 3742:604.331 -- CPU_WriteMem(4 bytes @ 0xE0002008) -T06CC 3742:605.481 - 2.863ms -T06CC 3742:706.544 JLINK_IsHalted() -T06CC 3742:709.641 - 3.154ms returns TRUE -T06CC 3742:709.747 JLINK_Halt() -T06CC 3742:709.777 - 0.044ms returns 0x00 -T06CC 3742:709.815 JLINK_IsHalted() -T06CC 3742:709.843 - 0.041ms returns TRUE -T06CC 3742:709.879 JLINK_IsHalted() -T06CC 3742:709.907 - 0.041ms returns TRUE -T06CC 3742:709.943 JLINK_IsHalted() -T06CC 3742:709.971 - 0.042ms returns TRUE -T06CC 3742:710.020 JLINK_ReadReg(R15 (PC)) -T06CC 3742:710.058 - 0.052ms returns 0x08000A98 -T06CC 3742:710.098 JLINK_ReadReg(XPSR) -T06CC 3742:710.127 - 0.043ms returns 0x01000000 -T06CC 3742:710.187 JLINK_ClrBPEx(BPHandle = 0x00000002) -T06CC 3742:710.219 - 0.046ms returns 0x00 -T06CC 3742:710.278 JLINK_ReadMemU32(0xE000ED30, 0x0001 Items, ...) -T06CC 3742:710.353 -- CPU_ReadMem(4 bytes @ 0xE000ED30) -T06CC 3742:711.158 Data: 02 00 00 00 -T06CC 3742:711.227 - 0.965ms returns 1 -T06CC 3742:711.282 JLINK_ReadMemU32(0xE0001028, 0x0001 Items, ...) -T06CC 3742:711.346 -- CPU_ReadMem(4 bytes @ 0xE0001028) -T06CC 3742:712.070 Data: 00 00 00 00 -T06CC 3742:712.139 - DWT_FUNC[0] -T06CC 3742:712.182 - 0.915ms returns 1 -T06CC 3742:712.230 JLINK_ReadMemU32(0xE0001038, 0x0001 Items, ...) -T06CC 3742:712.292 -- CPU_ReadMem(4 bytes @ 0xE0001038) -T06CC 3742:713.009 Data: 00 02 00 00 -T06CC 3742:713.077 - DWT_FUNC[1] -T06CC 3742:713.120 - 0.905ms returns 1 -T06CC 3742:713.169 JLINK_ReadMemU32(0xE0001048, 0x0001 Items, ...) -T06CC 3742:713.216 -- CPU_ReadMem(4 bytes @ 0xE0001048) -T06CC 3742:713.916 Data: 00 00 00 00 -T06CC 3742:713.983 - DWT_FUNC[2] -T06CC 3742:714.024 - 0.870ms returns 1 -T06CC 3742:714.072 JLINK_ReadMemU32(0xE0001058, 0x0001 Items, ...) -T06CC 3742:714.118 -- CPU_ReadMem(4 bytes @ 0xE0001058) -T06CC 3742:714.874 Data: 00 00 00 00 -T06CC 3742:714.934 - DWT_FUNC[3] -T06CC 3742:714.973 - 0.915ms returns 1 -T06CC 3742:715.116 JLINK_ReadReg(R0) -T06CC 3742:715.155 - 0.054ms returns 0x40013800 -T06CC 3742:715.192 JLINK_ReadReg(R1) -T06CC 3742:715.221 - 0.043ms returns 0x00000001 -T06CC 3742:715.260 JLINK_ReadReg(R2) -T06CC 3742:715.310 - 0.071ms returns 0x0000202C -T06CC 3742:715.365 JLINK_ReadReg(R3) -T06CC 3742:715.395 - 0.045ms returns 0x04030400 -T06CC 3742:715.432 JLINK_ReadReg(R4) -T06CC 3742:715.460 - 0.042ms returns 0x08000BA0 -T06CC 3742:715.496 JLINK_ReadReg(R5) -T06CC 3742:715.524 - 0.042ms returns 0x08000BA0 -T06CC 3742:715.560 JLINK_ReadReg(R6) -T06CC 3742:715.589 - 0.042ms returns 0x00000000 -T06CC 3742:715.625 JLINK_ReadReg(R7) -T06CC 3742:715.653 - 0.042ms returns 0x00000000 -T06CC 3742:715.689 JLINK_ReadReg(R8) -T06CC 3742:715.717 - 0.042ms returns 0x00000000 -T06CC 3742:715.753 JLINK_ReadReg(R9) -T06CC 3742:715.792 - 0.061ms returns 0x20000160 -T06CC 3742:715.837 JLINK_ReadReg(R10) -T06CC 3742:715.865 - 0.042ms returns 0x00000000 -T06CC 3742:715.901 JLINK_ReadReg(R11) -T06CC 3742:715.928 - 0.042ms returns 0x00000000 -T06CC 3742:715.965 JLINK_ReadReg(R12) -T06CC 3742:715.992 - 0.041ms returns 0x00000008 -T06CC 3742:716.028 JLINK_ReadReg(R13 (SP)) -T06CC 3742:716.057 - 0.043ms returns 0x20000450 -T06CC 3742:716.093 JLINK_ReadReg(R14) -T06CC 3742:716.121 - 0.042ms returns 0x080005BD -T06CC 3742:716.157 JLINK_ReadReg(R15 (PC)) -T06CC 3742:716.185 - 0.042ms returns 0x08000A98 -T06CC 3742:716.221 JLINK_ReadReg(XPSR) -T06CC 3742:716.249 - 0.053ms returns 0x01000000 -T06CC 3742:716.301 JLINK_ReadReg(MSP) -T06CC 3742:716.330 - 0.043ms returns 0x20000450 -T06CC 3742:716.366 JLINK_ReadReg(PSP) -T06CC 3742:716.394 - 0.042ms returns 0x20001000 -T06CC 3742:716.430 JLINK_ReadReg(CFBP) -T06CC 3742:716.458 - 0.042ms returns 0x00000000 -T2D54 3742:716.919 JLINK_ReadMemU32(0xE0001004, 0x0001 Items, ...) -T2D54 3742:716.994 -- CPU_ReadMem(4 bytes @ 0xE0001004) -T2D54 3742:717.726 Data: FA 24 00 00 -T2D54 3742:717.796 - DWT_CYCCNT -T2D54 3742:717.838 - 0.934ms returns 1 -T06CC 3745:242.682 JLINK_ReadMemEx(0x08000A98, 0x003C Bytes, ..., Flags = 0x02000000) -T06CC 3745:242.725 -- CPU_ReadMem(128 bytes @ 0x08000A80) -T06CC 3745:243.692 -- Updating C cache (128 bytes @ 0x08000A80) -T06CC 3745:243.712 -- Read from C cache (60 bytes @ 0x08000A98) -T06CC 3745:243.723 Data: 0D A1 13 A0 FF F7 46 FF 13 A1 19 A0 FF F7 42 FF ... -T06CC 3745:243.732 - 1.054ms returns 0x3C -T06CC 3745:243.763 JLINK_ReadMemEx(0x08000A98, 0x0002 Bytes, ..., Flags = 0x02000000) -T06CC 3745:243.774 -- Read from C cache (2 bytes @ 0x08000A98) -T06CC 3745:243.783 Data: 0D A1 -T06CC 3745:243.792 - 0.033ms returns 0x02 -T06CC 3745:243.808 JLINK_Step() -T06CC 3745:244.214 -- Read from C cache (2 bytes @ 0x08000A98) -T06CC 3745:244.232 -- CPU_ReadMem(4 bytes @ 0xE000ED18) -T06CC 3745:244.544 -- CPU_WriteMem(4 bytes @ 0xE000ED18) -T06CC 3745:244.881 -- CPU_ReadMem(4 bytes @ 0xE000ED18) -T06CC 3745:246.001 -- CPU_WriteMem(4 bytes @ 0xE000ED18) -T06CC 3745:246.375 -- Simulated -T06CC 3745:246.388 - 2.583ms returns 0x00 -T06CC 3745:246.402 JLINK_ReadReg(R15 (PC)) -T06CC 3745:246.411 - 0.011ms returns 0x08000A9A -T06CC 3745:246.419 JLINK_ReadReg(XPSR) -T06CC 3745:246.426 - 0.010ms returns 0x01000000 -T06CC 3745:246.441 JLINK_ReadMemEx(0x08000A9A, 0x0002 Bytes, ..., Flags = 0x02000000) -T06CC 3745:246.458 -- Read from C cache (2 bytes @ 0x08000A9A) -T06CC 3745:246.467 Data: 13 A0 -T06CC 3745:246.477 - 0.039ms returns 0x02 -T06CC 3745:246.486 JLINK_ReadMemEx(0x08000A9C, 0x003C Bytes, ..., Flags = 0x02000000) -T06CC 3745:246.495 -- Read from C cache (60 bytes @ 0x08000A9C) -T06CC 3745:246.505 Data: FF F7 46 FF 13 A1 19 A0 FF F7 42 FF 18 A1 1E A0 ... -T06CC 3745:246.513 - 0.031ms returns 0x3C -T06CC 3745:246.522 JLINK_ReadMemEx(0x08000A9C, 0x0002 Bytes, ..., Flags = 0x02000000) -T06CC 3745:246.532 -- Read from C cache (2 bytes @ 0x08000A9C) -T06CC 3745:246.541 Data: FF F7 -T06CC 3745:246.549 - 0.031ms returns 0x02 -T06CC 3745:246.560 JLINK_Step() -T06CC 3745:246.567 -- Read from C cache (2 bytes @ 0x08000A9A) -T06CC 3745:246.577 -- Simulated -T06CC 3745:246.586 - 0.028ms returns 0x00 -T06CC 3745:246.596 JLINK_ReadReg(R15 (PC)) -T06CC 3745:246.602 - 0.009ms returns 0x08000A9C -T06CC 3745:246.610 JLINK_ReadReg(XPSR) -T06CC 3745:246.616 - 0.009ms returns 0x01000000 -T06CC 3745:246.626 JLINK_ReadMemEx(0x08000A9C, 0x003C Bytes, ..., Flags = 0x02000000) -T06CC 3745:246.636 -- Read from C cache (60 bytes @ 0x08000A9C) -T06CC 3745:246.645 Data: FF F7 46 FF 13 A1 19 A0 FF F7 42 FF 18 A1 1E A0 ... -T06CC 3745:246.654 - 0.031ms returns 0x3C -T06CC 3745:246.663 JLINK_ReadMemEx(0x08000A9C, 0x0002 Bytes, ..., Flags = 0x02000000) -T06CC 3745:246.672 -- Read from C cache (2 bytes @ 0x08000A9C) -T06CC 3745:246.681 Data: FF F7 -T06CC 3745:246.690 - 0.031ms returns 0x02 -T06CC 3745:246.699 JLINK_ReadMemEx(0x08000A9E, 0x0002 Bytes, ..., Flags = 0x02000000) -T06CC 3745:246.713 -- Read from C cache (2 bytes @ 0x08000A9E) -T06CC 3745:246.722 Data: 46 FF -T06CC 3745:246.731 - 0.035ms returns 0x02 -T06CC 3745:246.742 JLINK_SetBPEx(Addr = 0x08000AA0, Type = 0xFFFFFFF2) -T06CC 3745:246.752 - 0.013ms returns 0x00000003 -T06CC 3745:246.763 JLINK_SetBPEx(Addr = 0x08000A98, Type = 0xFFFFFFF2) -T06CC 3745:246.772 - 0.012ms returns 0x00000004 -T06CC 3745:246.784 JLINK_Go() -T06CC 3745:246.793 -- CPU_WriteMem(4 bytes @ 0xE0002000) -T06CC 3745:247.203 -- CPU_WriteMem(4 bytes @ 0xE0002000) -T06CC 3745:247.559 -- CPU_ReadMem(4 bytes @ 0xE0001000) -T06CC 3745:247.961 -- CPU_WriteMem(4 bytes @ 0xE0002008) -T06CC 3745:247.974 -- CPU_WriteMem(4 bytes @ 0xE000200C) -T06CC 3745:248.491 -- CPU_WriteMem(4 bytes @ 0xE0001004) -T06CC 3745:249.557 - 2.779ms -T06CC 3745:350.145 JLINK_IsHalted() -T06CC 3745:353.195 - 3.140ms returns TRUE -T06CC 3745:353.342 JLINK_Halt() -T06CC 3745:353.375 - 0.047ms returns 0x00 -T06CC 3745:353.412 JLINK_IsHalted() -T06CC 3745:353.443 - 0.044ms returns TRUE -T06CC 3745:353.479 JLINK_IsHalted() -T06CC 3745:353.506 - 0.041ms returns TRUE -T06CC 3745:353.541 JLINK_IsHalted() -T06CC 3745:353.568 - 0.040ms returns TRUE -T06CC 3745:353.615 JLINK_ReadReg(R15 (PC)) -T06CC 3745:353.651 - 0.050ms returns 0x08000AA0 -T06CC 3745:353.688 JLINK_ReadReg(XPSR) -T06CC 3745:353.717 - 0.043ms returns 0x61000000 -T06CC 3745:353.775 JLINK_ClrBPEx(BPHandle = 0x00000003) -T06CC 3745:353.806 - 0.045ms returns 0x00 -T06CC 3745:353.852 JLINK_ClrBPEx(BPHandle = 0x00000004) -T06CC 3745:353.902 - 0.078ms returns 0x00 -T06CC 3745:354.009 JLINK_ReadMemU32(0xE000ED30, 0x0001 Items, ...) -T06CC 3745:354.076 -- CPU_ReadMem(4 bytes @ 0xE000ED30) -T06CC 3745:354.835 Data: 02 00 00 00 -T06CC 3745:354.909 - 0.917ms returns 1 -T06CC 3745:354.959 JLINK_ReadMemU32(0xE0001028, 0x0001 Items, ...) -T06CC 3745:355.007 -- CPU_ReadMem(4 bytes @ 0xE0001028) -T06CC 3745:355.761 Data: 00 00 00 00 -T06CC 3745:355.830 - DWT_FUNC[0] -T06CC 3745:355.880 - 0.941ms returns 1 -T06CC 3745:355.962 JLINK_ReadMemU32(0xE0001038, 0x0001 Items, ...) -T06CC 3745:356.046 -- CPU_ReadMem(4 bytes @ 0xE0001038) -T06CC 3745:356.752 Data: 00 02 00 00 -T06CC 3745:356.820 - DWT_FUNC[1] -T06CC 3745:356.870 - 0.923ms returns 1 -T06CC 3745:356.919 JLINK_ReadMemU32(0xE0001048, 0x0001 Items, ...) -T06CC 3745:356.966 -- CPU_ReadMem(4 bytes @ 0xE0001048) -T06CC 3745:357.731 Data: 00 00 00 00 -T06CC 3745:357.799 - DWT_FUNC[2] -T06CC 3745:357.841 - 0.944ms returns 1 -T06CC 3745:357.912 JLINK_ReadMemU32(0xE0001058, 0x0001 Items, ...) -T06CC 3745:357.998 -- CPU_ReadMem(4 bytes @ 0xE0001058) -T06CC 3745:358.831 Data: 00 00 00 00 -T06CC 3745:358.905 - DWT_FUNC[3] -T06CC 3745:358.948 - 1.051ms returns 1 -T06CC 3745:359.104 JLINK_ReadReg(R0) -T06CC 3745:359.146 - 0.059ms returns 0x00000017 -T06CC 3745:359.187 JLINK_ReadReg(R1) -T06CC 3745:359.218 - 0.046ms returns 0x00000040 -T06CC 3745:359.256 JLINK_ReadReg(R2) -T06CC 3745:359.286 - 0.045ms returns 0x40013800 -T06CC 3745:359.324 JLINK_ReadReg(R3) -T06CC 3745:359.353 - 0.043ms returns 0x08000A41 -T06CC 3745:359.390 JLINK_ReadReg(R4) -T06CC 3745:359.419 - 0.043ms returns 0x08000BA0 -T06CC 3745:359.456 JLINK_ReadReg(R5) -T06CC 3745:359.485 - 0.044ms returns 0x08000BA0 -T06CC 3745:359.523 JLINK_ReadReg(R6) -T06CC 3745:359.552 - 0.044ms returns 0x00000000 -T06CC 3745:359.590 JLINK_ReadReg(R7) -T06CC 3745:359.619 - 0.043ms returns 0x00000000 -T06CC 3745:359.655 JLINK_ReadReg(R8) -T06CC 3745:359.684 - 0.044ms returns 0x00000000 -T06CC 3745:359.722 JLINK_ReadReg(R9) -T06CC 3745:359.751 - 0.044ms returns 0x20000160 -T06CC 3745:359.788 JLINK_ReadReg(R10) -T06CC 3745:359.818 - 0.043ms returns 0x00000000 -T06CC 3745:359.855 JLINK_ReadReg(R11) -T06CC 3745:359.883 - 0.047ms returns 0x00000000 -T06CC 3745:359.931 JLINK_ReadReg(R12) -T06CC 3745:359.975 - 0.061ms returns 0x00000008 -T06CC 3745:360.016 JLINK_ReadReg(R13 (SP)) -T06CC 3745:360.046 - 0.044ms returns 0x20000450 -T06CC 3745:360.082 JLINK_ReadReg(R14) -T06CC 3745:360.127 - 0.060ms returns 0x08000A59 -T06CC 3745:360.164 JLINK_ReadReg(R15 (PC)) -T06CC 3745:360.192 - 0.041ms returns 0x08000AA0 -T06CC 3745:360.228 JLINK_ReadReg(XPSR) -T06CC 3745:360.256 - 0.042ms returns 0x61000000 -T06CC 3745:360.292 JLINK_ReadReg(MSP) -T06CC 3745:360.320 - 0.042ms returns 0x20000450 -T06CC 3745:360.355 JLINK_ReadReg(PSP) -T06CC 3745:360.383 - 0.041ms returns 0x20001000 -T06CC 3745:360.419 JLINK_ReadReg(CFBP) -T06CC 3745:360.447 - 0.041ms returns 0x00000000 -T2D54 3745:360.908 JLINK_ReadMemU32(0xE0001004, 0x0001 Items, ...) -T2D54 3745:360.985 -- CPU_ReadMem(4 bytes @ 0xE0001004) -T2D54 3745:361.715 Data: F2 73 02 00 -T2D54 3745:361.782 - DWT_CYCCNT -T2D54 3745:361.824 - 0.962ms returns 1 -T06CC 3746:254.657 JLINK_ReadMemEx(0x08000AA0, 0x003C Bytes, ..., Flags = 0x02000000) -T06CC 3746:254.741 -- CPU_ReadMem(128 bytes @ 0x08000A80) -T06CC 3746:255.914 -- Updating C cache (128 bytes @ 0x08000A80) -T06CC 3746:255.966 -- Read from C cache (60 bytes @ 0x08000AA0) -T06CC 3746:256.003 Data: 13 A1 19 A0 FF F7 42 FF 18 A1 1E A0 FF F7 3E FF ... -T06CC 3746:256.032 - 1.390ms returns 0x3C -T06CC 3746:256.077 JLINK_ReadMemEx(0x08000AA0, 0x0002 Bytes, ..., Flags = 0x02000000) -T06CC 3746:256.112 -- Read from C cache (2 bytes @ 0x08000AA0) -T06CC 3746:256.143 Data: 13 A1 -T06CC 3746:256.174 - 0.110ms returns 0x02 -T06CC 3746:256.212 JLINK_Step() -T06CC 3746:256.828 -- Read from C cache (2 bytes @ 0x08000AA0) -T06CC 3746:256.881 -- Simulated -T06CC 3746:256.913 - 0.711ms returns 0x00 -T06CC 3746:256.957 JLINK_ReadReg(R15 (PC)) -T06CC 3746:256.982 - 0.036ms returns 0x08000AA2 -T06CC 3746:257.011 JLINK_ReadReg(XPSR) -T06CC 3746:257.033 - 0.033ms returns 0x61000000 -T06CC 3746:257.078 JLINK_ReadMemEx(0x08000AA2, 0x0002 Bytes, ..., Flags = 0x02000000) -T06CC 3746:257.113 -- Read from C cache (2 bytes @ 0x08000AA2) -T06CC 3746:257.143 Data: 19 A0 -T06CC 3746:257.174 - 0.108ms returns 0x02 -T06CC 3746:257.204 JLINK_ReadMemEx(0x08000AA4, 0x003C Bytes, ..., Flags = 0x02000000) -T06CC 3746:257.236 -- Read from C cache (60 bytes @ 0x08000AA4) -T06CC 3746:257.269 Data: FF F7 42 FF 18 A1 1E A0 FF F7 3E FF 00 20 FF F7 ... -T06CC 3746:257.299 - 0.107ms returns 0x3C -T06CC 3746:257.328 JLINK_ReadMemEx(0x08000AA4, 0x0002 Bytes, ..., Flags = 0x02000000) -T06CC 3746:257.359 -- Read from C cache (2 bytes @ 0x08000AA4) -T06CC 3746:257.389 Data: FF F7 -T06CC 3746:257.419 - 0.103ms returns 0x02 -T06CC 3746:257.459 JLINK_Step() -T06CC 3746:257.484 -- Read from C cache (2 bytes @ 0x08000AA2) -T06CC 3746:257.515 -- Simulated -T06CC 3746:257.544 - 0.096ms returns 0x00 -T06CC 3746:257.578 JLINK_ReadReg(R15 (PC)) -T06CC 3746:257.600 - 0.032ms returns 0x08000AA4 -T06CC 3746:257.627 JLINK_ReadReg(XPSR) -T06CC 3746:257.649 - 0.032ms returns 0x61000000 -T06CC 3746:257.682 JLINK_ReadMemEx(0x08000AA4, 0x003C Bytes, ..., Flags = 0x02000000) -T06CC 3746:257.714 -- Read from C cache (60 bytes @ 0x08000AA4) -T06CC 3746:257.747 Data: FF F7 42 FF 18 A1 1E A0 FF F7 3E FF 00 20 FF F7 ... -T06CC 3746:257.776 - 0.107ms returns 0x3C -T06CC 3746:257.806 JLINK_ReadMemEx(0x08000AA4, 0x0002 Bytes, ..., Flags = 0x02000000) -T06CC 3746:257.838 -- Read from C cache (2 bytes @ 0x08000AA4) -T06CC 3746:257.868 Data: FF F7 -T06CC 3746:257.898 - 0.104ms returns 0x02 -T06CC 3746:257.926 JLINK_ReadMemEx(0x08000AA6, 0x0002 Bytes, ..., Flags = 0x02000000) -T06CC 3746:257.957 -- Read from C cache (2 bytes @ 0x08000AA6) -T06CC 3746:258.000 Data: 42 FF -T06CC 3746:258.030 - 0.115ms returns 0x02 -T06CC 3746:258.071 JLINK_SetBPEx(Addr = 0x08000AA8, Type = 0xFFFFFFF2) -T06CC 3746:258.104 - 0.045ms returns 0x00000005 -T06CC 3746:258.138 JLINK_SetBPEx(Addr = 0x08000A98, Type = 0xFFFFFFF2) -T06CC 3746:258.168 - 0.041ms returns 0x00000006 -T06CC 3746:258.207 JLINK_Go() -T06CC 3746:258.239 -- CPU_WriteMem(4 bytes @ 0xE0002000) -T06CC 3746:258.820 -- CPU_WriteMem(4 bytes @ 0xE0002000) -T06CC 3746:259.446 -- CPU_ReadMem(4 bytes @ 0xE0001000) -T06CC 3746:259.964 -- CPU_WriteMem(4 bytes @ 0xE0002008) -T06CC 3746:260.807 -- CPU_WriteMem(4 bytes @ 0xE0001004) -T06CC 3746:262.585 - 4.400ms -T06CC 3746:363.288 JLINK_IsHalted() -T06CC 3746:366.080 - 2.821ms returns TRUE -T06CC 3746:366.133 JLINK_Halt() -T06CC 3746:366.153 - 0.027ms returns 0x00 -T06CC 3746:366.172 JLINK_IsHalted() -T06CC 3746:366.185 - 0.019ms returns TRUE -T06CC 3746:366.202 JLINK_IsHalted() -T06CC 3746:366.216 - 0.019ms returns TRUE -T06CC 3746:366.232 JLINK_IsHalted() -T06CC 3746:366.245 - 0.018ms returns TRUE -T06CC 3746:366.266 JLINK_ReadReg(R15 (PC)) -T06CC 3746:366.296 - 0.036ms returns 0x08000AA8 -T06CC 3746:366.314 JLINK_ReadReg(XPSR) -T06CC 3746:366.327 - 0.020ms returns 0x61000000 -T06CC 3746:366.356 JLINK_ClrBPEx(BPHandle = 0x00000005) -T06CC 3746:366.370 - 0.021ms returns 0x00 -T06CC 3746:366.391 JLINK_ClrBPEx(BPHandle = 0x00000006) -T06CC 3746:366.405 - 0.020ms returns 0x00 -T06CC 3746:366.430 JLINK_ReadMemU32(0xE000ED30, 0x0001 Items, ...) -T06CC 3746:366.451 -- CPU_ReadMem(4 bytes @ 0xE000ED30) -T06CC 3746:366.945 Data: 02 00 00 00 -T06CC 3746:366.984 - 0.561ms returns 1 -T06CC 3746:367.007 JLINK_ReadMemU32(0xE0001028, 0x0001 Items, ...) -T06CC 3746:367.030 -- CPU_ReadMem(4 bytes @ 0xE0001028) -T06CC 3746:367.556 Data: 00 00 00 00 -T06CC 3746:367.587 - DWT_FUNC[0] -T06CC 3746:367.607 - 0.607ms returns 1 -T06CC 3746:367.635 JLINK_ReadMemU32(0xE0001038, 0x0001 Items, ...) -T06CC 3746:367.657 -- CPU_ReadMem(4 bytes @ 0xE0001038) -T06CC 3746:368.238 Data: 00 02 00 00 -T06CC 3746:368.296 - DWT_FUNC[1] -T06CC 3746:368.328 - 0.705ms returns 1 -T06CC 3746:368.369 JLINK_ReadMemU32(0xE0001048, 0x0001 Items, ...) -T06CC 3746:368.407 -- CPU_ReadMem(4 bytes @ 0xE0001048) -T06CC 3746:369.052 Data: 00 00 00 00 -T06CC 3746:369.082 - DWT_FUNC[2] -T06CC 3746:369.102 - 0.740ms returns 1 -T06CC 3746:369.129 JLINK_ReadMemU32(0xE0001058, 0x0001 Items, ...) -T06CC 3746:369.154 -- CPU_ReadMem(4 bytes @ 0xE0001058) -T06CC 3746:369.666 Data: 00 00 00 00 -T06CC 3746:369.697 - DWT_FUNC[3] -T06CC 3746:369.717 - 0.595ms returns 1 -T06CC 3746:370.482 JLINK_ReadReg(R0) -T06CC 3746:370.511 - 0.037ms returns 0x00000015 -T06CC 3746:370.530 JLINK_ReadReg(R1) -T06CC 3746:370.545 - 0.021ms returns 0x00000040 -T06CC 3746:370.563 JLINK_ReadReg(R2) -T06CC 3746:370.576 - 0.020ms returns 0x40013800 -T06CC 3746:370.593 JLINK_ReadReg(R3) -T06CC 3746:370.607 - 0.020ms returns 0x08000A41 -T06CC 3746:370.635 JLINK_ReadReg(R4) -T06CC 3746:370.642 - 0.009ms returns 0x08000BA0 -T06CC 3746:370.649 JLINK_ReadReg(R5) -T06CC 3746:370.655 - 0.008ms returns 0x08000BA0 -T06CC 3746:370.663 JLINK_ReadReg(R6) -T06CC 3746:370.669 - 0.009ms returns 0x00000000 -T06CC 3746:370.676 JLINK_ReadReg(R7) -T06CC 3746:370.682 - 0.008ms returns 0x00000000 -T06CC 3746:370.690 JLINK_ReadReg(R8) -T06CC 3746:370.696 - 0.008ms returns 0x00000000 -T06CC 3746:370.703 JLINK_ReadReg(R9) -T06CC 3746:370.709 - 0.008ms returns 0x20000160 -T06CC 3746:370.717 JLINK_ReadReg(R10) -T06CC 3746:370.722 - 0.008ms returns 0x00000000 -T06CC 3746:370.730 JLINK_ReadReg(R11) -T06CC 3746:370.736 - 0.008ms returns 0x00000000 -T06CC 3746:370.743 JLINK_ReadReg(R12) -T06CC 3746:370.749 - 0.008ms returns 0x00000008 -T06CC 3746:370.757 JLINK_ReadReg(R13 (SP)) -T06CC 3746:370.763 - 0.009ms returns 0x20000450 -T06CC 3746:370.771 JLINK_ReadReg(R14) -T06CC 3746:370.777 - 0.008ms returns 0x08000A59 -T06CC 3746:370.784 JLINK_ReadReg(R15 (PC)) -T06CC 3746:370.790 - 0.008ms returns 0x08000AA8 -T06CC 3746:370.798 JLINK_ReadReg(XPSR) -T06CC 3746:370.804 - 0.009ms returns 0x61000000 -T06CC 3746:370.811 JLINK_ReadReg(MSP) -T06CC 3746:370.817 - 0.008ms returns 0x20000450 -T06CC 3746:370.825 JLINK_ReadReg(PSP) -T06CC 3746:370.830 - 0.008ms returns 0x20001000 -T06CC 3746:370.838 JLINK_ReadReg(CFBP) -T06CC 3746:370.844 - 0.008ms returns 0x00000000 -T2D54 3746:370.940 JLINK_ReadMemU32(0xE0001004, 0x0001 Items, ...) -T2D54 3746:370.955 -- CPU_ReadMem(4 bytes @ 0xE0001004) -T2D54 3746:371.359 Data: B2 A7 04 00 -T2D54 3746:371.371 - DWT_CYCCNT -T2D54 3746:371.380 - 0.479ms returns 1 -T06CC 3746:473.469 JLINK_ReadMemEx(0x08000AA8, 0x003C Bytes, ..., Flags = 0x02000000) -T06CC 3746:473.498 -- CPU_ReadMem(128 bytes @ 0x08000A80) -T06CC 3746:474.468 -- Updating C cache (128 bytes @ 0x08000A80) -T06CC 3746:474.484 -- Read from C cache (60 bytes @ 0x08000AA8) -T06CC 3746:474.495 Data: 18 A1 1E A0 FF F7 3E FF 00 20 FF F7 B5 FD 01 20 ... -T06CC 3746:474.505 - 1.040ms returns 0x3C -T06CC 3746:474.519 JLINK_ReadMemEx(0x08000AA8, 0x0002 Bytes, ..., Flags = 0x02000000) -T06CC 3746:474.531 -- Read from C cache (2 bytes @ 0x08000AA8) -T06CC 3746:474.554 Data: 18 A1 -T06CC 3746:474.563 - 0.048ms returns 0x02 -T06CC 3746:474.575 JLINK_Step() -T06CC 3746:474.583 -- Read from C cache (2 bytes @ 0x08000AA8) -T06CC 3746:474.594 -- Simulated -T06CC 3746:474.602 - 0.030ms returns 0x00 -T06CC 3746:474.612 JLINK_ReadReg(R15 (PC)) -T06CC 3746:474.619 - 0.009ms returns 0x08000AAA -T06CC 3746:474.627 JLINK_ReadReg(XPSR) -T06CC 3746:474.633 - 0.009ms returns 0x61000000 -T06CC 3746:474.646 JLINK_ReadMemEx(0x08000AAA, 0x0002 Bytes, ..., Flags = 0x02000000) -T06CC 3746:474.655 -- Read from C cache (2 bytes @ 0x08000AAA) -T06CC 3746:474.663 Data: 1E A0 -T06CC 3746:474.672 - 0.029ms returns 0x02 -T06CC 3746:474.680 JLINK_ReadMemEx(0x08000AAC, 0x003C Bytes, ..., Flags = 0x02000000) -T06CC 3746:474.688 -- Read from C cache (60 bytes @ 0x08000AAC) -T06CC 3746:474.697 Data: FF F7 3E FF 00 20 FF F7 B5 FD 01 20 FF F7 B2 FD ... -T06CC 3746:474.706 - 0.029ms returns 0x3C -T06CC 3746:474.714 JLINK_ReadMemEx(0x08000AAC, 0x0002 Bytes, ..., Flags = 0x02000000) -T06CC 3746:474.722 -- Read from C cache (2 bytes @ 0x08000AAC) -T06CC 3746:474.731 Data: FF F7 -T06CC 3746:474.739 - 0.028ms returns 0x02 -T06CC 3746:474.748 JLINK_Step() -T06CC 3746:474.755 -- Read from C cache (2 bytes @ 0x08000AAA) -T06CC 3746:474.764 -- Simulated -T06CC 3746:474.772 - 0.027ms returns 0x00 -T06CC 3746:474.782 JLINK_ReadReg(R15 (PC)) -T06CC 3746:474.788 - 0.009ms returns 0x08000AAC -T06CC 3746:474.795 JLINK_ReadReg(XPSR) -T06CC 3746:474.801 - 0.008ms returns 0x61000000 -T06CC 3746:474.810 JLINK_ReadMemEx(0x08000AAC, 0x003C Bytes, ..., Flags = 0x02000000) -T06CC 3746:474.819 -- Read from C cache (60 bytes @ 0x08000AAC) -T06CC 3746:474.828 Data: FF F7 3E FF 00 20 FF F7 B5 FD 01 20 FF F7 B2 FD ... -T06CC 3746:474.836 - 0.029ms returns 0x3C -T06CC 3746:474.844 JLINK_ReadMemEx(0x08000AAC, 0x0002 Bytes, ..., Flags = 0x02000000) -T06CC 3746:474.853 -- Read from C cache (2 bytes @ 0x08000AAC) -T06CC 3746:474.861 Data: FF F7 -T06CC 3746:474.870 - 0.028ms returns 0x02 -T06CC 3746:474.878 JLINK_ReadMemEx(0x08000AAE, 0x0002 Bytes, ..., Flags = 0x02000000) -T06CC 3746:474.886 -- Read from C cache (2 bytes @ 0x08000AAE) -T06CC 3746:474.894 Data: 3E FF -T06CC 3746:474.903 - 0.028ms returns 0x02 -T06CC 3746:474.914 JLINK_SetBPEx(Addr = 0x08000AB0, Type = 0xFFFFFFF2) -T06CC 3746:474.923 - 0.013ms returns 0x00000007 -T06CC 3746:474.933 JLINK_SetBPEx(Addr = 0x08000A98, Type = 0xFFFFFFF2) -T06CC 3746:474.942 - 0.012ms returns 0x00000008 -T06CC 3746:474.953 JLINK_Go() -T06CC 3746:474.962 -- CPU_WriteMem(4 bytes @ 0xE0002000) -T06CC 3746:475.442 -- CPU_WriteMem(4 bytes @ 0xE0002000) -T06CC 3746:475.899 -- CPU_ReadMem(4 bytes @ 0xE0001000) -T06CC 3746:476.281 -- CPU_WriteMem(4 bytes @ 0xE0002008) -T06CC 3746:476.778 -- CPU_WriteMem(4 bytes @ 0xE0001004) -T06CC 3746:477.995 - 3.049ms -T06CC 3746:578.976 JLINK_IsHalted() -T06CC 3746:581.815 - 2.878ms returns TRUE -T06CC 3746:581.900 JLINK_Halt() -T06CC 3746:581.932 - 0.046ms returns 0x00 -T06CC 3746:581.971 JLINK_IsHalted() -T06CC 3746:582.000 - 0.044ms returns TRUE -T06CC 3746:582.038 JLINK_IsHalted() -T06CC 3746:582.066 - 0.042ms returns TRUE -T06CC 3746:582.103 JLINK_IsHalted() -T06CC 3746:582.131 - 0.043ms returns TRUE -T06CC 3746:582.179 JLINK_ReadReg(R15 (PC)) -T06CC 3746:582.216 - 0.052ms returns 0x08000AB0 -T06CC 3746:582.255 JLINK_ReadReg(XPSR) -T06CC 3746:582.285 - 0.045ms returns 0x61000000 -T06CC 3746:582.341 JLINK_ClrBPEx(BPHandle = 0x00000007) -T06CC 3746:582.391 - 0.065ms returns 0x00 -T06CC 3746:582.438 JLINK_ClrBPEx(BPHandle = 0x00000008) -T06CC 3746:582.468 - 0.044ms returns 0x00 -T06CC 3746:582.522 JLINK_ReadMemU32(0xE000ED30, 0x0001 Items, ...) -T06CC 3746:582.568 -- CPU_ReadMem(4 bytes @ 0xE000ED30) -T06CC 3746:583.513 Data: 02 00 00 00 -T06CC 3746:583.613 - 1.107ms returns 1 -T06CC 3746:583.668 JLINK_ReadMemU32(0xE0001028, 0x0001 Items, ...) -T06CC 3746:583.724 -- CPU_ReadMem(4 bytes @ 0xE0001028) -T06CC 3746:584.490 Data: 00 00 00 00 -T06CC 3746:584.566 - DWT_FUNC[0] -T06CC 3746:584.593 - 0.934ms returns 1 -T06CC 3746:584.625 JLINK_ReadMemU32(0xE0001038, 0x0001 Items, ...) -T06CC 3746:584.656 -- CPU_ReadMem(4 bytes @ 0xE0001038) -T06CC 3746:585.324 Data: 00 02 00 00 -T06CC 3746:585.375 - DWT_FUNC[1] -T06CC 3746:585.402 - 0.786ms returns 1 -T06CC 3746:585.434 JLINK_ReadMemU32(0xE0001048, 0x0001 Items, ...) -T06CC 3746:585.465 -- CPU_ReadMem(4 bytes @ 0xE0001048) -T06CC 3746:586.125 Data: 00 00 00 00 -T06CC 3746:586.176 - DWT_FUNC[2] -T06CC 3746:586.203 - 0.778ms returns 1 -T06CC 3746:586.236 JLINK_ReadMemU32(0xE0001058, 0x0001 Items, ...) -T06CC 3746:586.272 -- CPU_ReadMem(4 bytes @ 0xE0001058) -T06CC 3746:586.881 Data: 00 00 00 00 -T06CC 3746:586.925 - DWT_FUNC[3] -T06CC 3746:586.953 - 0.726ms returns 1 -T06CC 3746:587.058 JLINK_ReadReg(R0) -T06CC 3746:587.086 - 0.039ms returns 0x00000017 -T06CC 3746:587.112 JLINK_ReadReg(R1) -T06CC 3746:587.132 - 0.030ms returns 0x00000040 -T06CC 3746:587.158 JLINK_ReadReg(R2) -T06CC 3746:587.177 - 0.029ms returns 0x40013800 -T06CC 3746:587.202 JLINK_ReadReg(R3) -T06CC 3746:587.222 - 0.029ms returns 0x08000A41 -T06CC 3746:587.246 JLINK_ReadReg(R4) -T06CC 3746:587.266 - 0.030ms returns 0x08000BA0 -T06CC 3746:587.291 JLINK_ReadReg(R5) -T06CC 3746:587.310 - 0.029ms returns 0x08000BA0 -T06CC 3746:587.335 JLINK_ReadReg(R6) -T06CC 3746:587.355 - 0.029ms returns 0x00000000 -T06CC 3746:587.379 JLINK_ReadReg(R7) -T06CC 3746:587.399 - 0.029ms returns 0x00000000 -T06CC 3746:587.423 JLINK_ReadReg(R8) -T06CC 3746:587.442 - 0.028ms returns 0x00000000 -T06CC 3746:587.466 JLINK_ReadReg(R9) -T06CC 3746:587.485 - 0.028ms returns 0x20000160 -T06CC 3746:587.510 JLINK_ReadReg(R10) -T06CC 3746:587.529 - 0.028ms returns 0x00000000 -T06CC 3746:587.553 JLINK_ReadReg(R11) -T06CC 3746:587.571 - 0.028ms returns 0x00000000 -T06CC 3746:587.596 JLINK_ReadReg(R12) -T06CC 3746:587.615 - 0.028ms returns 0x00000008 -T06CC 3746:587.640 JLINK_ReadReg(R13 (SP)) -T06CC 3746:587.660 - 0.029ms returns 0x20000450 -T06CC 3746:587.684 JLINK_ReadReg(R14) -T06CC 3746:587.703 - 0.028ms returns 0x08000A59 -T06CC 3746:587.728 JLINK_ReadReg(R15 (PC)) -T06CC 3746:587.747 - 0.029ms returns 0x08000AB0 -T06CC 3746:587.772 JLINK_ReadReg(XPSR) -T06CC 3746:587.792 - 0.029ms returns 0x61000000 -T06CC 3746:587.822 JLINK_ReadReg(MSP) -T06CC 3746:587.842 - 0.029ms returns 0x20000450 -T06CC 3746:587.866 JLINK_ReadReg(PSP) -T06CC 3746:587.886 - 0.028ms returns 0x20001000 -T06CC 3746:587.910 JLINK_ReadReg(CFBP) -T06CC 3746:587.929 - 0.028ms returns 0x00000000 -T2D54 3746:588.251 JLINK_ReadMemU32(0xE0001004, 0x0001 Items, ...) -T2D54 3746:588.299 -- CPU_ReadMem(4 bytes @ 0xE0001004) -T2D54 3746:588.888 Data: AA 0F 07 00 -T2D54 3746:588.932 - DWT_CYCCNT -T2D54 3746:588.960 - 0.719ms returns 1 -T06CC 3746:666.859 JLINK_ReadMemEx(0x08000AB0, 0x003C Bytes, ..., Flags = 0x02000000) -T06CC 3746:666.891 -- CPU_ReadMem(128 bytes @ 0x08000A80) -T06CC 3746:667.737 -- Updating C cache (128 bytes @ 0x08000A80) -T06CC 3746:667.755 -- Read from C cache (60 bytes @ 0x08000AB0) -T06CC 3746:667.766 Data: 00 20 FF F7 B5 FD 01 20 FF F7 B2 FD 02 20 FF F7 ... -T06CC 3746:667.775 - 0.920ms returns 0x3C -T06CC 3746:667.790 JLINK_ReadMemEx(0x08000AB0, 0x0002 Bytes, ..., Flags = 0x02000000) -T06CC 3746:667.801 -- Read from C cache (2 bytes @ 0x08000AB0) -T06CC 3746:667.810 Data: 00 20 -T06CC 3746:667.820 - 0.034ms returns 0x02 -T06CC 3746:667.832 JLINK_Step() -T06CC 3746:667.841 -- Read from C cache (2 bytes @ 0x08000AB0) -T06CC 3746:667.858 -- Simulated -T06CC 3746:667.867 - 0.038ms returns 0x00 -T06CC 3746:667.878 JLINK_ReadReg(R15 (PC)) -T06CC 3746:667.886 - 0.010ms returns 0x08000AB2 -T06CC 3746:667.894 JLINK_ReadReg(XPSR) -T06CC 3746:667.901 - 0.009ms returns 0x61000000 -T06CC 3746:667.914 JLINK_ReadMemEx(0x08000AB2, 0x0002 Bytes, ..., Flags = 0x02000000) -T06CC 3746:667.925 -- Read from C cache (2 bytes @ 0x08000AB2) -T06CC 3746:667.934 Data: FF F7 -T06CC 3746:667.944 - 0.032ms returns 0x02 -T06CC 3746:667.952 JLINK_ReadMemEx(0x08000AB4, 0x003C Bytes, ..., Flags = 0x02000000) -T06CC 3746:667.962 -- Read from C cache (60 bytes @ 0x08000AB4) -T06CC 3746:667.971 Data: B5 FD 01 20 FF F7 B2 FD 02 20 FF F7 AF FD 03 20 ... -T06CC 3746:667.980 - 0.031ms returns 0x3C -T06CC 3746:667.989 JLINK_ReadMemEx(0x08000AB4, 0x0002 Bytes, ..., Flags = 0x02000000) -T06CC 3746:667.998 -- Read from C cache (2 bytes @ 0x08000AB4) -T06CC 3746:668.007 Data: B5 FD -T06CC 3746:668.016 - 0.030ms returns 0x02 -T06CC 3746:668.028 JLINK_SetBPEx(Addr = 0x08000AB6, Type = 0xFFFFFFF2) -T06CC 3746:668.038 - 0.013ms returns 0x00000009 -T06CC 3746:668.048 JLINK_SetBPEx(Addr = 0x08000A98, Type = 0xFFFFFFF2) -T06CC 3746:668.057 - 0.012ms returns 0x0000000A -T06CC 3746:668.071 JLINK_Go() -T06CC 3746:668.088 -- CPU_WriteMem(4 bytes @ 0xE0002000) -T06CC 3746:668.398 -- CPU_WriteMem(4 bytes @ 0xE0002000) -T06CC 3746:668.764 -- CPU_ReadMem(4 bytes @ 0xE0001000) -T06CC 3746:669.185 -- CPU_WriteMem(4 bytes @ 0xE0002008) -T06CC 3746:669.535 -- CPU_WriteMem(4 bytes @ 0xE0001004) -T06CC 3746:670.872 - 2.808ms -T06CC 3746:771.381 JLINK_IsHalted() -T06CC 3746:774.375 - 3.036ms returns TRUE -T06CC 3746:774.465 JLINK_Halt() -T06CC 3746:774.496 - 0.047ms returns 0x00 -T06CC 3746:774.536 JLINK_IsHalted() -T06CC 3746:774.565 - 0.043ms returns TRUE -T06CC 3746:774.602 JLINK_IsHalted() -T06CC 3746:774.631 - 0.043ms returns TRUE -T06CC 3746:774.668 JLINK_IsHalted() -T06CC 3746:774.696 - 0.043ms returns TRUE -T06CC 3746:774.744 JLINK_ReadReg(R15 (PC)) -T06CC 3746:774.781 - 0.052ms returns 0x08000AB6 -T06CC 3746:774.820 JLINK_ReadReg(XPSR) -T06CC 3746:774.850 - 0.045ms returns 0x61000000 -T06CC 3746:774.908 JLINK_ClrBPEx(BPHandle = 0x00000009) -T06CC 3746:774.941 - 0.047ms returns 0x00 -T06CC 3746:774.987 JLINK_ClrBPEx(BPHandle = 0x0000000A) -T06CC 3746:775.018 - 0.045ms returns 0x00 -T06CC 3746:775.085 JLINK_ReadMemU32(0xE000ED30, 0x0001 Items, ...) -T06CC 3746:775.148 -- CPU_ReadMem(4 bytes @ 0xE000ED30) -T06CC 3746:775.810 Data: 02 00 00 00 -T06CC 3746:775.877 - 0.807ms returns 1 -T06CC 3746:775.925 JLINK_ReadMemU32(0xE0001028, 0x0001 Items, ...) -T06CC 3746:775.971 -- CPU_ReadMem(4 bytes @ 0xE0001028) -T06CC 3746:776.734 Data: 00 00 00 00 -T06CC 3746:776.803 - DWT_FUNC[0] -T06CC 3746:776.846 - 0.936ms returns 1 -T06CC 3746:776.895 JLINK_ReadMemU32(0xE0001038, 0x0001 Items, ...) -T06CC 3746:776.942 -- CPU_ReadMem(4 bytes @ 0xE0001038) -T06CC 3746:777.690 Data: 00 02 00 00 -T06CC 3746:777.759 - DWT_FUNC[1] -T06CC 3746:777.801 - 0.921ms returns 1 -T06CC 3746:777.850 JLINK_ReadMemU32(0xE0001048, 0x0001 Items, ...) -T06CC 3746:777.897 -- CPU_ReadMem(4 bytes @ 0xE0001048) -T06CC 3746:778.560 Data: 00 00 00 00 -T06CC 3746:778.622 - DWT_FUNC[2] -T06CC 3746:778.664 - 0.829ms returns 1 -T06CC 3746:778.710 JLINK_ReadMemU32(0xE0001058, 0x0001 Items, ...) -T06CC 3746:778.755 -- CPU_ReadMem(4 bytes @ 0xE0001058) -T06CC 3746:779.474 Data: 00 00 00 00 -T06CC 3746:779.535 - DWT_FUNC[3] -T06CC 3746:779.575 - 0.879ms returns 1 -T06CC 3746:779.717 JLINK_ReadReg(R0) -T06CC 3746:779.756 - 0.054ms returns 0x00000000 -T06CC 3746:779.794 JLINK_ReadReg(R1) -T06CC 3746:779.823 - 0.043ms returns 0x00000200 -T06CC 3746:779.859 JLINK_ReadReg(R2) -T06CC 3746:779.887 - 0.042ms returns 0x40011800 -T06CC 3746:779.923 JLINK_ReadReg(R3) -T06CC 3746:779.951 - 0.042ms returns 0x08000A41 -T06CC 3746:779.987 JLINK_ReadReg(R4) -T06CC 3746:780.015 - 0.041ms returns 0x08000BA0 -T06CC 3746:780.070 JLINK_ReadReg(R5) -T06CC 3746:780.119 - 0.072ms returns 0x08000BA0 -T06CC 3746:780.164 JLINK_ReadReg(R6) -T06CC 3746:780.192 - 0.042ms returns 0x00000000 -T06CC 3746:780.229 JLINK_ReadReg(R7) -T06CC 3746:780.256 - 0.041ms returns 0x00000000 -T06CC 3746:780.292 JLINK_ReadReg(R8) -T06CC 3746:780.320 - 0.042ms returns 0x00000000 -T06CC 3746:780.356 JLINK_ReadReg(R9) -T06CC 3746:780.383 - 0.041ms returns 0x20000160 -T06CC 3746:780.419 JLINK_ReadReg(R10) -T06CC 3746:780.447 - 0.041ms returns 0x00000000 -T06CC 3746:780.482 JLINK_ReadReg(R11) -T06CC 3746:780.510 - 0.041ms returns 0x00000000 -T06CC 3746:780.546 JLINK_ReadReg(R12) -T06CC 3746:780.573 - 0.041ms returns 0x00000008 -T06CC 3746:780.609 JLINK_ReadReg(R13 (SP)) -T06CC 3746:780.638 - 0.043ms returns 0x20000450 -T06CC 3746:780.674 JLINK_ReadReg(R14) -T06CC 3746:780.702 - 0.041ms returns 0x08000AB7 -T06CC 3746:780.738 JLINK_ReadReg(R15 (PC)) -T06CC 3746:780.766 - 0.042ms returns 0x08000AB6 -T06CC 3746:780.802 JLINK_ReadReg(XPSR) -T06CC 3746:780.830 - 0.042ms returns 0x61000000 -T06CC 3746:780.866 JLINK_ReadReg(MSP) -T06CC 3746:780.893 - 0.041ms returns 0x20000450 -T06CC 3746:780.929 JLINK_ReadReg(PSP) -T06CC 3746:780.956 - 0.041ms returns 0x20001000 -T06CC 3746:780.992 JLINK_ReadReg(CFBP) -T06CC 3746:781.020 - 0.043ms returns 0x00000000 -T2D54 3746:781.498 JLINK_ReadMemU32(0xE0001004, 0x0001 Items, ...) -T2D54 3746:781.578 -- CPU_ReadMem(4 bytes @ 0xE0001004) -T2D54 3746:782.300 Data: C9 0F 07 00 -T2D54 3746:782.366 - DWT_CYCCNT -T2D54 3746:782.408 - 0.926ms returns 1 -T06CC 3747:226.460 JLINK_ReadMemEx(0x08000AB6, 0x0002 Bytes, ..., Flags = 0x02000000) -T06CC 3747:226.535 -- CPU_ReadMem(64 bytes @ 0x08000A80) -T06CC 3747:227.438 -- Updating C cache (64 bytes @ 0x08000A80) -T06CC 3747:227.485 -- Read from C cache (2 bytes @ 0x08000AB6) -T06CC 3747:227.516 Data: 01 20 -T06CC 3747:227.545 - 1.097ms returns 0x02 -T06CC 3747:227.581 JLINK_ReadMemEx(0x08000AB8, 0x003C Bytes, ..., Flags = 0x02000000) -T06CC 3747:227.617 -- CPU_ReadMem(64 bytes @ 0x08000AC0) -T06CC 3747:228.471 -- Updating C cache (64 bytes @ 0x08000AC0) -T06CC 3747:228.516 -- Read from C cache (60 bytes @ 0x08000AB8) -T06CC 3747:228.549 Data: FF F7 B2 FD 02 20 FF F7 AF FD 03 20 FF F7 AC FD ... -T06CC 3747:228.576 - 1.006ms returns 0x3C -T06CC 3747:228.613 JLINK_ReadMemEx(0x08000AB6, 0x0002 Bytes, ..., Flags = 0x02000000) -T06CC 3747:228.646 -- Read from C cache (2 bytes @ 0x08000AB6) -T06CC 3747:228.674 Data: 01 20 -T06CC 3747:228.701 - 0.100ms returns 0x02 -T06CC 3747:228.735 JLINK_Step() -T06CC 3747:228.767 -- Read from C cache (2 bytes @ 0x08000AB6) -T06CC 3747:228.800 -- Simulated -T06CC 3747:228.828 - 0.105ms returns 0x00 -T06CC 3747:228.883 JLINK_ReadReg(R15 (PC)) -T06CC 3747:228.907 - 0.033ms returns 0x08000AB8 -T06CC 3747:228.932 JLINK_ReadReg(XPSR) -T06CC 3747:228.955 - 0.037ms returns 0x21000000 -T06CC 3747:229.006 JLINK_ReadMemEx(0x08000AB8, 0x003C Bytes, ..., Flags = 0x02000000) -T06CC 3747:229.037 -- Read from C cache (60 bytes @ 0x08000AB8) -T06CC 3747:229.066 Data: FF F7 B2 FD 02 20 FF F7 AF FD 03 20 FF F7 AC FD ... -T06CC 3747:229.092 - 0.097ms returns 0x3C -T06CC 3747:229.118 JLINK_ReadMemEx(0x08000AB8, 0x0002 Bytes, ..., Flags = 0x02000000) -T06CC 3747:229.145 -- Read from C cache (2 bytes @ 0x08000AB8) -T06CC 3747:229.172 Data: FF F7 -T06CC 3747:229.199 - 0.091ms returns 0x02 -T06CC 3747:229.224 JLINK_ReadMemEx(0x08000ABA, 0x0002 Bytes, ..., Flags = 0x02000000) -T06CC 3747:229.252 -- Read from C cache (2 bytes @ 0x08000ABA) -T06CC 3747:229.278 Data: B2 FD -T06CC 3747:229.305 - 0.091ms returns 0x02 -T06CC 3747:229.339 JLINK_SetBPEx(Addr = 0x08000ABC, Type = 0xFFFFFFF2) -T06CC 3747:229.369 - 0.041ms returns 0x0000000B -T06CC 3747:229.400 JLINK_SetBPEx(Addr = 0x08000A98, Type = 0xFFFFFFF2) -T06CC 3747:229.427 - 0.037ms returns 0x0000000C -T06CC 3747:229.463 JLINK_Go() -T06CC 3747:229.490 -- CPU_WriteMem(4 bytes @ 0xE0002000) -T06CC 3747:229.991 -- CPU_WriteMem(4 bytes @ 0xE0002000) -T06CC 3747:230.572 -- CPU_ReadMem(4 bytes @ 0xE0001000) -T06CC 3747:231.109 -- CPU_WriteMem(4 bytes @ 0xE0002008) -T06CC 3747:231.706 -- CPU_WriteMem(4 bytes @ 0xE0001004) -T06CC 3747:233.392 - 3.955ms -T06CC 3747:333.800 JLINK_IsHalted() -T06CC 3747:336.738 - 2.992ms returns TRUE -T06CC 3747:336.834 JLINK_Halt() -T06CC 3747:336.861 - 0.040ms returns 0x00 -T06CC 3747:336.895 JLINK_IsHalted() -T06CC 3747:336.920 - 0.037ms returns TRUE -T06CC 3747:336.952 JLINK_IsHalted() -T06CC 3747:336.976 - 0.036ms returns TRUE -T06CC 3747:337.007 JLINK_IsHalted() -T06CC 3747:337.031 - 0.036ms returns TRUE -T06CC 3747:337.072 JLINK_ReadReg(R15 (PC)) -T06CC 3747:337.109 - 0.049ms returns 0x08000ABC -T06CC 3747:337.142 JLINK_ReadReg(XPSR) -T06CC 3747:337.168 - 0.039ms returns 0x21000000 -T06CC 3747:337.219 JLINK_ClrBPEx(BPHandle = 0x0000000B) -T06CC 3747:337.247 - 0.040ms returns 0x00 -T06CC 3747:337.287 JLINK_ClrBPEx(BPHandle = 0x0000000C) -T06CC 3747:337.312 - 0.038ms returns 0x00 -T06CC 3747:337.359 JLINK_ReadMemU32(0xE000ED30, 0x0001 Items, ...) -T06CC 3747:337.398 -- CPU_ReadMem(4 bytes @ 0xE000ED30) -T06CC 3747:338.011 Data: 02 00 00 00 -T06CC 3747:338.073 - 0.727ms returns 1 -T06CC 3747:338.117 JLINK_ReadMemU32(0xE0001028, 0x0001 Items, ...) -T06CC 3747:338.161 -- CPU_ReadMem(4 bytes @ 0xE0001028) -T06CC 3747:338.713 Data: 00 00 00 00 -T06CC 3747:338.770 - DWT_FUNC[0] -T06CC 3747:338.806 - 0.702ms returns 1 -T06CC 3747:338.847 JLINK_ReadMemU32(0xE0001038, 0x0001 Items, ...) -T06CC 3747:338.887 -- CPU_ReadMem(4 bytes @ 0xE0001038) -T06CC 3747:339.530 Data: 00 02 00 00 -T06CC 3747:339.637 - DWT_FUNC[1] -T06CC 3747:339.679 - 0.845ms returns 1 -T06CC 3747:339.722 JLINK_ReadMemU32(0xE0001048, 0x0001 Items, ...) -T06CC 3747:339.766 -- CPU_ReadMem(4 bytes @ 0xE0001048) -T06CC 3747:340.502 Data: 00 00 00 00 -T06CC 3747:340.631 - DWT_FUNC[2] -T06CC 3747:340.700 - 1.009ms returns 1 -T06CC 3747:340.782 JLINK_ReadMemU32(0xE0001058, 0x0001 Items, ...) -T06CC 3747:340.829 -- CPU_ReadMem(4 bytes @ 0xE0001058) -T06CC 3747:341.413 Data: 00 00 00 00 -T06CC 3747:341.474 - DWT_FUNC[3] -T06CC 3747:341.512 - 0.743ms returns 1 -T06CC 3747:341.669 JLINK_ReadReg(R0) -T06CC 3747:341.707 - 0.052ms returns 0x00000001 -T06CC 3747:341.742 JLINK_ReadReg(R1) -T06CC 3747:341.768 - 0.038ms returns 0x00000400 -T06CC 3747:341.801 JLINK_ReadReg(R2) -T06CC 3747:341.826 - 0.038ms returns 0x40011800 -T06CC 3747:341.859 JLINK_ReadReg(R3) -T06CC 3747:341.884 - 0.037ms returns 0x08000A41 -T06CC 3747:341.916 JLINK_ReadReg(R4) -T06CC 3747:341.941 - 0.037ms returns 0x08000BA0 -T06CC 3747:341.972 JLINK_ReadReg(R5) -T06CC 3747:341.997 - 0.037ms returns 0x08000BA0 -T06CC 3747:342.029 JLINK_ReadReg(R6) -T06CC 3747:342.054 - 0.037ms returns 0x00000000 -T06CC 3747:342.086 JLINK_ReadReg(R7) -T06CC 3747:342.110 - 0.037ms returns 0x00000000 -T06CC 3747:342.142 JLINK_ReadReg(R8) -T06CC 3747:342.167 - 0.037ms returns 0x00000000 -T06CC 3747:342.199 JLINK_ReadReg(R9) -T06CC 3747:342.223 - 0.037ms returns 0x20000160 -T06CC 3747:342.255 JLINK_ReadReg(R10) -T06CC 3747:342.280 - 0.037ms returns 0x00000000 -T06CC 3747:342.312 JLINK_ReadReg(R11) -T06CC 3747:342.336 - 0.037ms returns 0x00000000 -T06CC 3747:342.368 JLINK_ReadReg(R12) -T06CC 3747:342.393 - 0.037ms returns 0x00000008 -T06CC 3747:342.425 JLINK_ReadReg(R13 (SP)) -T06CC 3747:342.450 - 0.038ms returns 0x20000450 -T06CC 3747:342.482 JLINK_ReadReg(R14) -T06CC 3747:342.507 - 0.037ms returns 0x08000ABD -T06CC 3747:342.547 JLINK_ReadReg(R15 (PC)) -T06CC 3747:342.587 - 0.060ms returns 0x08000ABC -T06CC 3747:342.633 JLINK_ReadReg(XPSR) -T06CC 3747:342.659 - 0.039ms returns 0x21000000 -T06CC 3747:342.691 JLINK_ReadReg(MSP) -T06CC 3747:342.716 - 0.037ms returns 0x20000450 -T06CC 3747:342.748 JLINK_ReadReg(PSP) -T06CC 3747:342.773 - 0.037ms returns 0x20001000 -T06CC 3747:342.804 JLINK_ReadReg(CFBP) -T06CC 3747:342.829 - 0.037ms returns 0x00000000 -T2D54 3747:345.798 JLINK_ReadMemU32(0xE0001004, 0x0001 Items, ...) -T2D54 3747:345.923 -- CPU_ReadMem(4 bytes @ 0xE0001004) -T2D54 3747:346.795 Data: E8 0F 07 00 -T2D54 3747:346.836 - DWT_CYCCNT -T2D54 3747:346.870 - 1.083ms returns 1 -T06CC 3747:468.276 JLINK_ReadMemEx(0x08000ABC, 0x003C Bytes, ..., Flags = 0x02000000) -T06CC 3747:468.397 -- CPU_ReadMem(128 bytes @ 0x08000A80) -T06CC 3747:469.628 -- Updating C cache (128 bytes @ 0x08000A80) -T06CC 3747:469.695 -- Read from C cache (60 bytes @ 0x08000ABC) -T06CC 3747:469.744 Data: 02 20 FF F7 AF FD 03 20 FF F7 AC FD 00 BF FE E7 ... -T06CC 3747:469.785 - 1.528ms returns 0x3C -T06CC 3747:469.844 JLINK_ReadMemEx(0x08000ABC, 0x0002 Bytes, ..., Flags = 0x02000000) -T06CC 3747:469.891 -- Read from C cache (2 bytes @ 0x08000ABC) -T06CC 3747:469.932 Data: 02 20 -T06CC 3747:469.974 - 0.148ms returns 0x02 -T06CC 3747:470.026 JLINK_Step() -T06CC 3747:470.066 -- Read from C cache (2 bytes @ 0x08000ABC) -T06CC 3747:470.116 -- Simulated -T06CC 3747:470.157 - 0.145ms returns 0x00 -T06CC 3747:470.219 JLINK_ReadReg(R15 (PC)) -T06CC 3747:470.259 - 0.054ms returns 0x08000ABE -T06CC 3747:470.298 JLINK_ReadReg(XPSR) -T06CC 3747:470.327 - 0.044ms returns 0x21000000 -T06CC 3747:470.384 JLINK_ReadMemEx(0x08000ABE, 0x0002 Bytes, ..., Flags = 0x02000000) -T06CC 3747:470.429 -- Read from C cache (2 bytes @ 0x08000ABE) -T06CC 3747:470.469 Data: FF F7 -T06CC 3747:470.509 - 0.142ms returns 0x02 -T06CC 3747:470.548 JLINK_ReadMemEx(0x08000AC0, 0x003C Bytes, ..., Flags = 0x02000000) -T06CC 3747:470.590 -- Read from C cache (60 bytes @ 0x08000AC0) -T06CC 3747:470.633 Data: AF FD 03 20 FF F7 AC FD 00 BF FE E7 40 00 00 20 ... -T06CC 3747:470.672 - 0.139ms returns 0x3C -T06CC 3747:470.710 JLINK_ReadMemEx(0x08000AC0, 0x0002 Bytes, ..., Flags = 0x02000000) -T06CC 3747:470.751 -- Read from C cache (2 bytes @ 0x08000AC0) -T06CC 3747:470.791 Data: AF FD -T06CC 3747:470.830 - 0.135ms returns 0x02 -T06CC 3747:470.881 JLINK_SetBPEx(Addr = 0x08000AC2, Type = 0xFFFFFFF2) -T06CC 3747:470.926 - 0.061ms returns 0x0000000D -T06CC 3747:470.973 JLINK_SetBPEx(Addr = 0x08000A98, Type = 0xFFFFFFF2) -T06CC 3747:471.014 - 0.057ms returns 0x0000000E -T06CC 3747:471.068 JLINK_Go() -T06CC 3747:471.110 -- CPU_WriteMem(4 bytes @ 0xE0002000) -T06CC 3747:471.800 -- CPU_WriteMem(4 bytes @ 0xE0002000) -T06CC 3747:472.549 -- CPU_ReadMem(4 bytes @ 0xE0001000) -T06CC 3747:473.315 -- CPU_WriteMem(4 bytes @ 0xE0002008) -T06CC 3747:474.014 -- CPU_WriteMem(4 bytes @ 0xE0001004) -T06CC 3747:476.222 - 5.191ms -T06CC 3747:577.117 JLINK_IsHalted() -T06CC 3747:579.771 - 2.684ms returns TRUE -T06CC 3747:579.830 JLINK_Halt() -T06CC 3747:579.844 - 0.020ms returns 0x00 -T06CC 3747:579.861 JLINK_IsHalted() -T06CC 3747:579.874 - 0.019ms returns TRUE -T06CC 3747:579.895 JLINK_IsHalted() -T06CC 3747:579.917 - 0.028ms returns TRUE -T06CC 3747:579.936 JLINK_IsHalted() -T06CC 3747:579.948 - 0.018ms returns TRUE -T06CC 3747:580.088 JLINK_ReadReg(R15 (PC)) -T06CC 3747:580.118 - 0.038ms returns 0x08000AC2 -T06CC 3747:580.137 JLINK_ReadReg(XPSR) -T06CC 3747:580.151 - 0.020ms returns 0x21000000 -T06CC 3747:580.178 JLINK_ClrBPEx(BPHandle = 0x0000000D) -T06CC 3747:580.193 - 0.020ms returns 0x00 -T06CC 3747:580.213 JLINK_ClrBPEx(BPHandle = 0x0000000E) -T06CC 3747:580.227 - 0.020ms returns 0x00 -T06CC 3747:580.251 JLINK_ReadMemU32(0xE000ED30, 0x0001 Items, ...) -T06CC 3747:580.271 -- CPU_ReadMem(4 bytes @ 0xE000ED30) -T06CC 3747:580.830 Data: 02 00 00 00 -T06CC 3747:580.860 - 0.616ms returns 1 -T06CC 3747:580.882 JLINK_ReadMemU32(0xE0001028, 0x0001 Items, ...) -T06CC 3747:580.915 -- CPU_ReadMem(4 bytes @ 0xE0001028) -T06CC 3747:581.501 Data: 00 00 00 00 -T06CC 3747:581.530 - DWT_FUNC[0] -T06CC 3747:581.547 - 0.671ms returns 1 -T06CC 3747:581.576 JLINK_ReadMemU32(0xE0001038, 0x0001 Items, ...) -T06CC 3747:581.597 -- CPU_ReadMem(4 bytes @ 0xE0001038) -T06CC 3747:582.172 Data: 00 02 00 00 -T06CC 3747:582.198 - DWT_FUNC[1] -T06CC 3747:582.215 - 0.645ms returns 1 -T06CC 3747:582.235 JLINK_ReadMemU32(0xE0001048, 0x0001 Items, ...) -T06CC 3747:582.254 -- CPU_ReadMem(4 bytes @ 0xE0001048) -T06CC 3747:582.769 Data: 00 00 00 00 -T06CC 3747:582.795 - DWT_FUNC[2] -T06CC 3747:582.817 - 0.591ms returns 1 -T06CC 3747:582.841 JLINK_ReadMemU32(0xE0001058, 0x0001 Items, ...) -T06CC 3747:582.860 -- CPU_ReadMem(4 bytes @ 0xE0001058) -T06CC 3747:583.384 Data: 00 00 00 00 -T06CC 3747:583.411 - DWT_FUNC[3] -T06CC 3747:583.429 - 0.594ms returns 1 -T06CC 3747:583.497 JLINK_ReadReg(R0) -T06CC 3747:583.515 - 0.024ms returns 0x00000002 -T06CC 3747:583.532 JLINK_ReadReg(R1) -T06CC 3747:583.545 - 0.019ms returns 0x00000100 -T06CC 3747:583.561 JLINK_ReadReg(R2) -T06CC 3747:583.574 - 0.019ms returns 0x40011000 -T06CC 3747:583.591 JLINK_ReadReg(R3) -T06CC 3747:583.603 - 0.019ms returns 0x08000A41 -T06CC 3747:583.620 JLINK_ReadReg(R4) -T06CC 3747:583.640 - 0.023ms returns 0x08000BA0 -T06CC 3747:583.648 JLINK_ReadReg(R5) -T06CC 3747:583.654 - 0.008ms returns 0x08000BA0 -T06CC 3747:583.661 JLINK_ReadReg(R6) -T06CC 3747:583.667 - 0.009ms returns 0x00000000 -T06CC 3747:583.675 JLINK_ReadReg(R7) -T06CC 3747:583.681 - 0.009ms returns 0x00000000 -T06CC 3747:583.688 JLINK_ReadReg(R8) -T06CC 3747:583.694 - 0.009ms returns 0x00000000 -T06CC 3747:583.702 JLINK_ReadReg(R9) -T06CC 3747:583.708 - 0.008ms returns 0x20000160 -T06CC 3747:583.715 JLINK_ReadReg(R10) -T06CC 3747:583.721 - 0.008ms returns 0x00000000 -T06CC 3747:583.729 JLINK_ReadReg(R11) -T06CC 3747:583.734 - 0.008ms returns 0x00000000 -T06CC 3747:583.742 JLINK_ReadReg(R12) -T06CC 3747:583.748 - 0.008ms returns 0x00000008 -T06CC 3747:583.755 JLINK_ReadReg(R13 (SP)) -T06CC 3747:583.762 - 0.009ms returns 0x20000450 -T06CC 3747:583.769 JLINK_ReadReg(R14) -T06CC 3747:583.775 - 0.008ms returns 0x08000AC3 -T06CC 3747:583.782 JLINK_ReadReg(R15 (PC)) -T06CC 3747:583.788 - 0.008ms returns 0x08000AC2 -T06CC 3747:583.796 JLINK_ReadReg(XPSR) -T06CC 3747:583.802 - 0.008ms returns 0x21000000 -T06CC 3747:583.809 JLINK_ReadReg(MSP) -T06CC 3747:583.815 - 0.008ms returns 0x20000450 -T06CC 3747:583.823 JLINK_ReadReg(PSP) -T06CC 3747:583.829 - 0.008ms returns 0x20001000 -T06CC 3747:583.836 JLINK_ReadReg(CFBP) -T06CC 3747:583.842 - 0.009ms returns 0x00000000 -T2D54 3747:584.014 JLINK_ReadMemU32(0xE0001004, 0x0001 Items, ...) -T2D54 3747:584.031 -- CPU_ReadMem(4 bytes @ 0xE0001004) -T2D54 3747:584.447 Data: 07 10 07 00 -T2D54 3747:584.460 - DWT_CYCCNT -T2D54 3747:584.468 - 0.457ms returns 1 -T06CC 3747:641.530 JLINK_ReadMemEx(0x08000AC2, 0x0002 Bytes, ..., Flags = 0x02000000) -T06CC 3747:641.574 -- CPU_ReadMem(64 bytes @ 0x08000AC0) -T06CC 3747:642.269 -- Updating C cache (64 bytes @ 0x08000AC0) -T06CC 3747:642.299 -- Read from C cache (2 bytes @ 0x08000AC2) -T06CC 3747:642.308 Data: 03 20 -T06CC 3747:642.317 - 0.791ms returns 0x02 -T06CC 3747:642.328 JLINK_ReadMemEx(0x08000AC4, 0x003C Bytes, ..., Flags = 0x02000000) -T06CC 3747:642.338 -- Read from C cache (60 bytes @ 0x08000AC4) -T06CC 3747:642.347 Data: FF F7 AC FD 00 BF FE E7 40 00 00 20 20 53 54 4D ... -T06CC 3747:642.355 - 0.031ms returns 0x3C -T06CC 3747:642.368 JLINK_ReadMemEx(0x08000AC2, 0x0002 Bytes, ..., Flags = 0x02000000) -T06CC 3747:642.377 -- Read from C cache (2 bytes @ 0x08000AC2) -T06CC 3747:642.385 Data: 03 20 -T06CC 3747:642.393 - 0.029ms returns 0x02 -T06CC 3747:642.404 JLINK_Step() -T06CC 3747:642.413 -- Read from C cache (2 bytes @ 0x08000AC2) -T06CC 3747:642.424 -- Simulated -T06CC 3747:642.432 - 0.030ms returns 0x00 -T06CC 3747:642.442 JLINK_ReadReg(R15 (PC)) -T06CC 3747:642.449 - 0.010ms returns 0x08000AC4 -T06CC 3747:642.457 JLINK_ReadReg(XPSR) -T06CC 3747:642.463 - 0.009ms returns 0x21000000 -T06CC 3747:642.476 JLINK_ReadMemEx(0x08000AC4, 0x003C Bytes, ..., Flags = 0x02000000) -T06CC 3747:642.485 -- Read from C cache (60 bytes @ 0x08000AC4) -T06CC 3747:642.494 Data: FF F7 AC FD 00 BF FE E7 40 00 00 20 20 53 54 4D ... -T06CC 3747:642.502 - 0.029ms returns 0x3C -T06CC 3747:642.510 JLINK_ReadMemEx(0x08000AC4, 0x0002 Bytes, ..., Flags = 0x02000000) -T06CC 3747:642.519 -- Read from C cache (2 bytes @ 0x08000AC4) -T06CC 3747:642.528 Data: FF F7 -T06CC 3747:642.536 - 0.028ms returns 0x02 -T06CC 3747:642.544 JLINK_ReadMemEx(0x08000AC6, 0x0002 Bytes, ..., Flags = 0x02000000) -T06CC 3747:642.564 -- Read from C cache (2 bytes @ 0x08000AC6) -T06CC 3747:642.573 Data: AC FD -T06CC 3747:642.581 - 0.040ms returns 0x02 -T06CC 3747:642.592 JLINK_SetBPEx(Addr = 0x08000AC8, Type = 0xFFFFFFF2) -T06CC 3747:642.602 - 0.013ms returns 0x0000000F -T06CC 3747:642.612 JLINK_SetBPEx(Addr = 0x08000A98, Type = 0xFFFFFFF2) -T06CC 3747:642.621 - 0.012ms returns 0x00000010 -T06CC 3747:642.632 JLINK_Go() -T06CC 3747:642.641 -- CPU_WriteMem(4 bytes @ 0xE0002000) -T06CC 3747:643.083 -- CPU_WriteMem(4 bytes @ 0xE0002000) -T06CC 3747:643.549 -- CPU_ReadMem(4 bytes @ 0xE0001000) -T06CC 3747:643.949 -- CPU_WriteMem(4 bytes @ 0xE0002008) -T06CC 3747:644.405 -- CPU_WriteMem(4 bytes @ 0xE0001004) -T06CC 3747:645.788 - 3.176ms -T06CC 3747:746.692 JLINK_IsHalted() -T06CC 3747:749.420 - 2.753ms returns TRUE -T06CC 3747:749.462 JLINK_Halt() -T06CC 3747:749.472 - 0.014ms returns 0x00 -T06CC 3747:749.484 JLINK_IsHalted() -T06CC 3747:749.492 - 0.013ms returns TRUE -T06CC 3747:749.504 JLINK_IsHalted() -T06CC 3747:749.512 - 0.012ms returns TRUE -T06CC 3747:749.538 JLINK_IsHalted() -T06CC 3747:749.547 - 0.014ms returns TRUE -T06CC 3747:749.564 JLINK_ReadReg(R15 (PC)) -T06CC 3747:749.576 - 0.018ms returns 0x08000AC8 -T06CC 3747:749.590 JLINK_ReadReg(XPSR) -T06CC 3747:749.600 - 0.015ms returns 0x21000000 -T06CC 3747:749.621 JLINK_ClrBPEx(BPHandle = 0x0000000F) -T06CC 3747:749.632 - 0.016ms returns 0x00 -T06CC 3747:749.648 JLINK_ClrBPEx(BPHandle = 0x00000010) -T06CC 3747:749.658 - 0.014ms returns 0x00 -T06CC 3747:749.676 JLINK_ReadMemU32(0xE000ED30, 0x0001 Items, ...) -T06CC 3747:749.692 -- CPU_ReadMem(4 bytes @ 0xE000ED30) -T06CC 3747:750.178 Data: 02 00 00 00 -T06CC 3747:750.200 - 0.529ms returns 1 -T06CC 3747:750.216 JLINK_ReadMemU32(0xE0001028, 0x0001 Items, ...) -T06CC 3747:750.232 -- CPU_ReadMem(4 bytes @ 0xE0001028) -T06CC 3747:750.788 Data: 00 00 00 00 -T06CC 3747:750.813 - DWT_FUNC[0] -T06CC 3747:750.826 - 0.615ms returns 1 -T06CC 3747:750.843 JLINK_ReadMemU32(0xE0001038, 0x0001 Items, ...) -T06CC 3747:750.860 -- CPU_ReadMem(4 bytes @ 0xE0001038) -T06CC 3747:751.457 Data: 00 02 00 00 -T06CC 3747:751.481 - DWT_FUNC[1] -T06CC 3747:751.495 - 0.656ms returns 1 -T06CC 3747:751.512 JLINK_ReadMemU32(0xE0001048, 0x0001 Items, ...) -T06CC 3747:751.530 -- CPU_ReadMem(4 bytes @ 0xE0001048) -T06CC 3747:752.053 Data: 00 00 00 00 -T06CC 3747:752.075 - DWT_FUNC[2] -T06CC 3747:752.089 - 0.582ms returns 1 -T06CC 3747:752.105 JLINK_ReadMemU32(0xE0001058, 0x0001 Items, ...) -T06CC 3747:752.123 -- CPU_ReadMem(4 bytes @ 0xE0001058) -T06CC 3747:752.528 Data: 00 00 00 00 -T06CC 3747:752.551 - DWT_FUNC[3] -T06CC 3747:752.564 - 0.464ms returns 1 -T06CC 3747:752.617 JLINK_ReadReg(R0) -T06CC 3747:752.641 - 0.027ms returns 0x00000003 -T06CC 3747:752.649 JLINK_ReadReg(R1) -T06CC 3747:752.655 - 0.009ms returns 0x00000200 -T06CC 3747:752.663 JLINK_ReadReg(R2) -T06CC 3747:752.669 - 0.008ms returns 0x40011000 -T06CC 3747:752.676 JLINK_ReadReg(R3) -T06CC 3747:752.682 - 0.009ms returns 0x08000A41 -T06CC 3747:752.690 JLINK_ReadReg(R4) -T06CC 3747:752.695 - 0.008ms returns 0x08000BA0 -T06CC 3747:752.703 JLINK_ReadReg(R5) -T06CC 3747:752.709 - 0.009ms returns 0x08000BA0 -T06CC 3747:752.717 JLINK_ReadReg(R6) -T06CC 3747:752.723 - 0.008ms returns 0x00000000 -T06CC 3747:752.730 JLINK_ReadReg(R7) -T06CC 3747:752.736 - 0.008ms returns 0x00000000 -T06CC 3747:752.744 JLINK_ReadReg(R8) -T06CC 3747:752.750 - 0.009ms returns 0x00000000 -T06CC 3747:752.757 JLINK_ReadReg(R9) -T06CC 3747:752.763 - 0.008ms returns 0x20000160 -T06CC 3747:752.771 JLINK_ReadReg(R10) -T06CC 3747:752.776 - 0.009ms returns 0x00000000 -T06CC 3747:752.784 JLINK_ReadReg(R11) -T06CC 3747:752.790 - 0.008ms returns 0x00000000 -T06CC 3747:752.798 JLINK_ReadReg(R12) -T06CC 3747:752.804 - 0.008ms returns 0x00000008 -T06CC 3747:752.811 JLINK_ReadReg(R13 (SP)) -T06CC 3747:752.817 - 0.009ms returns 0x20000450 -T06CC 3747:752.825 JLINK_ReadReg(R14) -T06CC 3747:752.831 - 0.009ms returns 0x08000AC9 -T06CC 3747:752.838 JLINK_ReadReg(R15 (PC)) -T06CC 3747:752.850 - 0.014ms returns 0x08000AC8 -T06CC 3747:752.858 JLINK_ReadReg(XPSR) -T06CC 3747:752.864 - 0.009ms returns 0x21000000 -T06CC 3747:752.871 JLINK_ReadReg(MSP) -T06CC 3747:752.877 - 0.008ms returns 0x20000450 -T06CC 3747:752.884 JLINK_ReadReg(PSP) -T06CC 3747:752.890 - 0.008ms returns 0x20001000 -T06CC 3747:752.898 JLINK_ReadReg(CFBP) -T06CC 3747:752.904 - 0.008ms returns 0x00000000 -T2D54 3747:753.066 JLINK_ReadMemU32(0xE0001004, 0x0001 Items, ...) -T2D54 3747:753.084 -- CPU_ReadMem(4 bytes @ 0xE0001004) -T2D54 3747:753.535 Data: 28 10 07 00 -T2D54 3747:753.550 - DWT_CYCCNT -T2D54 3747:753.558 - 0.495ms returns 1 -T06CC 3747:833.541 JLINK_ReadMemEx(0x08000AC8, 0x003C Bytes, ..., Flags = 0x02000000) -T06CC 3747:833.570 -- CPU_ReadMem(128 bytes @ 0x08000AC0) -T06CC 3747:834.590 -- Updating C cache (128 bytes @ 0x08000AC0) -T06CC 3747:834.605 -- Read from C cache (60 bytes @ 0x08000AC8) -T06CC 3747:834.615 Data: 00 BF FE E7 40 00 00 20 20 53 54 4D 33 32 20 43 ... -T06CC 3747:834.624 - 1.086ms returns 0x3C -T06CC 3747:834.636 JLINK_ReadMemEx(0x08000AC8, 0x0002 Bytes, ..., Flags = 0x02000000) -T06CC 3747:834.646 -- Read from C cache (2 bytes @ 0x08000AC8) -T06CC 3747:834.655 Data: 00 BF -T06CC 3747:834.663 - 0.030ms returns 0x02 -T06CC 3747:834.675 JLINK_Step() -T06CC 3747:834.683 -- Read from C cache (2 bytes @ 0x08000AC8) -T06CC 3747:834.693 -- Simulated -T06CC 3747:834.702 - 0.030ms returns 0x00 -T06CC 3747:834.712 JLINK_ReadReg(R15 (PC)) -T06CC 3747:834.737 - 0.028ms returns 0x08000ACA -T06CC 3747:834.745 JLINK_ReadReg(XPSR) -T06CC 3747:834.751 - 0.009ms returns 0x21000000 -T06CC 3747:834.784 JLINK_ReadReg(R0) -T06CC 3747:834.791 - 0.011ms returns 0x00000003 -T06CC 3747:834.799 JLINK_ReadReg(R1) -T06CC 3747:834.806 - 0.009ms returns 0x00000200 -T06CC 3747:834.814 JLINK_ReadReg(R2) -T06CC 3747:834.820 - 0.009ms returns 0x40011000 -T06CC 3747:834.827 JLINK_ReadReg(R3) -T06CC 3747:834.849 - 0.024ms returns 0x08000A41 -T06CC 3747:834.857 JLINK_ReadReg(R4) -T06CC 3747:834.862 - 0.008ms returns 0x08000BA0 -T06CC 3747:834.870 JLINK_ReadReg(R5) -T06CC 3747:834.876 - 0.008ms returns 0x08000BA0 -T06CC 3747:834.883 JLINK_ReadReg(R6) -T06CC 3747:834.889 - 0.009ms returns 0x00000000 -T06CC 3747:834.897 JLINK_ReadReg(R7) -T06CC 3747:834.903 - 0.009ms returns 0x00000000 -T06CC 3747:834.910 JLINK_ReadReg(R8) -T06CC 3747:834.916 - 0.009ms returns 0x00000000 -T06CC 3747:834.924 JLINK_ReadReg(R9) -T06CC 3747:834.930 - 0.008ms returns 0x20000160 -T06CC 3747:834.937 JLINK_ReadReg(R10) -T06CC 3747:834.943 - 0.008ms returns 0x00000000 -T06CC 3747:834.951 JLINK_ReadReg(R11) -T06CC 3747:834.957 - 0.008ms returns 0x00000000 -T06CC 3747:834.964 JLINK_ReadReg(R12) -T06CC 3747:834.970 - 0.008ms returns 0x00000008 -T06CC 3747:834.977 JLINK_ReadReg(R13 (SP)) -T06CC 3747:834.984 - 0.009ms returns 0x20000450 -T06CC 3747:834.991 JLINK_ReadReg(R14) -T06CC 3747:834.997 - 0.008ms returns 0x08000AC9 -T06CC 3747:835.005 JLINK_ReadReg(R15 (PC)) -T06CC 3747:835.010 - 0.008ms returns 0x08000ACA -T06CC 3747:835.018 JLINK_ReadReg(XPSR) -T06CC 3747:835.024 - 0.008ms returns 0x21000000 -T06CC 3747:835.031 JLINK_ReadReg(MSP) -T06CC 3747:835.037 - 0.008ms returns 0x20000450 -T06CC 3747:835.045 JLINK_ReadReg(PSP) -T06CC 3747:835.051 - 0.008ms returns 0x20001000 -T06CC 3747:835.058 JLINK_ReadReg(CFBP) -T06CC 3747:835.064 - 0.008ms returns 0x00000000 -T2D54 3747:835.946 JLINK_ReadMemU32(0xE0001004, 0x0001 Items, ...) -T2D54 3747:835.961 Data: 29 10 07 00 -T2D54 3747:835.970 - DWT_CYCCNT -T2D54 3747:835.979 - 0.036ms returns 1 -T06CC 3748:891.193 JLINK_ReadMemEx(0x08000ACA, 0x0002 Bytes, ..., Flags = 0x02000000) -T06CC 3748:891.278 -- Read from C cache (2 bytes @ 0x08000ACA) -T06CC 3748:891.319 Data: FE E7 -T06CC 3748:891.359 - 0.183ms returns 0x02 -T06CC 3748:891.407 JLINK_ReadMemEx(0x08000ACC, 0x003C Bytes, ..., Flags = 0x02000000) -T06CC 3748:891.448 -- Read from C cache (60 bytes @ 0x08000ACC) -T06CC 3748:891.489 Data: 40 00 00 20 20 53 54 4D 33 32 20 43 6F 6E 6E 65 ... -T06CC 3748:891.541 - 0.150ms returns 0x3C -T06CC 3748:891.582 JLINK_ReadMemEx(0x08000ACA, 0x0002 Bytes, ..., Flags = 0x02000000) -T06CC 3748:891.622 -- Read from C cache (2 bytes @ 0x08000ACA) -T06CC 3748:891.659 Data: FE E7 -T06CC 3748:891.696 - 0.130ms returns 0x02 -T06CC 3748:891.746 JLINK_Step() -T06CC 3748:892.377 -- Read from C cache (2 bytes @ 0x08000ACA) -T06CC 3748:892.475 -- Simulated -T06CC 3748:892.544 - 0.834ms returns 0x00 -T06CC 3748:892.626 JLINK_ReadReg(R15 (PC)) -T06CC 3748:892.660 - 0.047ms returns 0x08000ACA -T06CC 3748:892.694 JLINK_ReadReg(XPSR) -T06CC 3748:892.721 - 0.039ms returns 0x21000000 -T06CC 3748:892.774 JLINK_ReadMemEx(0x08000AC8, 0x003C Bytes, ..., Flags = 0x02000000) -T06CC 3748:892.818 -- Read from C cache (60 bytes @ 0x08000AC8) -T06CC 3748:892.857 Data: 00 BF FE E7 40 00 00 20 20 53 54 4D 33 32 20 43 ... -T06CC 3748:892.920 - 0.170ms returns 0x3C -T06CC 3748:892.970 JLINK_ReadMemEx(0x08000AC8, 0x0002 Bytes, ..., Flags = 0x02000000) -T06CC 3748:893.011 -- Read from C cache (2 bytes @ 0x08000AC8) -T06CC 3748:893.048 Data: 00 BF -T06CC 3748:893.084 - 0.128ms returns 0x02 -T06CC 3748:893.119 JLINK_ReadMemEx(0x08000ACA, 0x0002 Bytes, ..., Flags = 0x02000000) -T06CC 3748:893.155 -- Read from C cache (2 bytes @ 0x08000ACA) -T06CC 3748:893.191 Data: FE E7 -T06CC 3748:893.226 - 0.121ms returns 0x02 -T06CC 3748:893.350 JLINK_ReadReg(R0) -T06CC 3748:893.386 - 0.060ms returns 0x00000003 -T06CC 3748:893.613 JLINK_ReadReg(R1) -T06CC 3748:893.671 - 0.074ms returns 0x00000200 -T06CC 3748:893.709 JLINK_ReadReg(R2) -T06CC 3748:893.738 - 0.042ms returns 0x40011000 -T06CC 3748:893.772 JLINK_ReadReg(R3) -T06CC 3748:893.799 - 0.039ms returns 0x08000A41 -T06CC 3748:893.832 JLINK_ReadReg(R4) -T06CC 3748:893.858 - 0.039ms returns 0x08000BA0 -T06CC 3748:893.892 JLINK_ReadReg(R5) -T06CC 3748:893.918 - 0.039ms returns 0x08000BA0 -T06CC 3748:893.951 JLINK_ReadReg(R6) -T06CC 3748:893.977 - 0.039ms returns 0x00000000 -T06CC 3748:894.011 JLINK_ReadReg(R7) -T06CC 3748:894.036 - 0.039ms returns 0x00000000 -T06CC 3748:894.069 JLINK_ReadReg(R8) -T06CC 3748:894.096 - 0.039ms returns 0x00000000 -T06CC 3748:894.129 JLINK_ReadReg(R9) -T06CC 3748:894.155 - 0.039ms returns 0x20000160 -T06CC 3748:894.188 JLINK_ReadReg(R10) -T06CC 3748:894.214 - 0.038ms returns 0x00000000 -T06CC 3748:894.246 JLINK_ReadReg(R11) -T06CC 3748:894.271 - 0.038ms returns 0x00000000 -T06CC 3748:894.305 JLINK_ReadReg(R12) -T06CC 3748:894.330 - 0.038ms returns 0x00000008 -T06CC 3748:894.363 JLINK_ReadReg(R13 (SP)) -T06CC 3748:894.390 - 0.040ms returns 0x20000450 -T06CC 3748:894.423 JLINK_ReadReg(R14) -T06CC 3748:894.458 - 0.049ms returns 0x08000AC9 -T06CC 3748:894.501 JLINK_ReadReg(R15 (PC)) -T06CC 3748:894.540 - 0.058ms returns 0x08000ACA -T06CC 3748:894.588 JLINK_ReadReg(XPSR) -T06CC 3748:894.626 - 0.056ms returns 0x21000000 -T06CC 3748:894.671 JLINK_ReadReg(MSP) -T06CC 3748:894.709 - 0.056ms returns 0x20000450 -T06CC 3748:894.760 JLINK_ReadReg(PSP) -T06CC 3748:894.787 - 0.039ms returns 0x20001000 -T06CC 3748:894.819 JLINK_ReadReg(CFBP) -T06CC 3748:894.843 - 0.037ms returns 0x00000000 -T2D54 3748:897.621 JLINK_ReadMemU32(0xE0001004, 0x0001 Items, ...) -T2D54 3748:897.693 Data: 2A 10 07 00 -T2D54 3748:897.743 - DWT_CYCCNT -T2D54 3748:897.782 - 0.174ms returns 1 -T06CC 3749:129.069 JLINK_ReadMemEx(0x08000ACA, 0x0002 Bytes, ..., Flags = 0x02000000) -T06CC 3749:129.093 -- Read from C cache (2 bytes @ 0x08000ACA) -T06CC 3749:129.103 Data: FE E7 -T06CC 3749:129.114 - 0.049ms returns 0x02 -T06CC 3749:129.124 JLINK_ReadMemEx(0x08000ACC, 0x003C Bytes, ..., Flags = 0x02000000) -T06CC 3749:129.134 -- Read from C cache (60 bytes @ 0x08000ACC) -T06CC 3749:129.145 Data: 40 00 00 20 20 53 54 4D 33 32 20 43 6F 6E 6E 65 ... -T06CC 3749:129.155 - 0.034ms returns 0x3C -T06CC 3749:129.165 JLINK_ReadMemEx(0x08000ACA, 0x0002 Bytes, ..., Flags = 0x02000000) -T06CC 3749:129.175 -- Read from C cache (2 bytes @ 0x08000ACA) -T06CC 3749:129.184 Data: FE E7 -T06CC 3749:129.194 - 0.032ms returns 0x02 -T06CC 3749:129.207 JLINK_Step() -T06CC 3749:129.222 -- Read from C cache (2 bytes @ 0x08000ACA) -T06CC 3749:129.234 -- Simulated -T06CC 3749:129.244 - 0.040ms returns 0x00 -T06CC 3749:129.255 JLINK_ReadReg(R15 (PC)) -T06CC 3749:129.262 - 0.011ms returns 0x08000ACA -T06CC 3749:129.271 JLINK_ReadReg(XPSR) -T06CC 3749:129.278 - 0.010ms returns 0x21000000 -T06CC 3749:129.291 JLINK_ReadMemEx(0x08000AC8, 0x003C Bytes, ..., Flags = 0x02000000) -T06CC 3749:129.302 -- Read from C cache (60 bytes @ 0x08000AC8) -T06CC 3749:129.312 Data: 00 BF FE E7 40 00 00 20 20 53 54 4D 33 32 20 43 ... -T06CC 3749:129.321 - 0.033ms returns 0x3C -T06CC 3749:129.330 JLINK_ReadMemEx(0x08000AC8, 0x0002 Bytes, ..., Flags = 0x02000000) -T06CC 3749:129.340 -- Read from C cache (2 bytes @ 0x08000AC8) -T06CC 3749:129.350 Data: 00 BF -T06CC 3749:129.359 - 0.032ms returns 0x02 -T06CC 3749:129.368 JLINK_ReadMemEx(0x08000ACA, 0x0002 Bytes, ..., Flags = 0x02000000) -T06CC 3749:129.378 -- Read from C cache (2 bytes @ 0x08000ACA) -T06CC 3749:129.387 Data: FE E7 -T06CC 3749:129.396 - 0.032ms returns 0x02 -T06CC 3749:129.428 JLINK_ReadReg(R0) -T06CC 3749:129.435 - 0.011ms returns 0x00000003 -T06CC 3749:129.444 JLINK_ReadReg(R1) -T06CC 3749:129.450 - 0.009ms returns 0x00000200 -T06CC 3749:129.459 JLINK_ReadReg(R2) -T06CC 3749:129.465 - 0.010ms returns 0x40011000 -T06CC 3749:129.474 JLINK_ReadReg(R3) -T06CC 3749:129.480 - 0.009ms returns 0x08000A41 -T06CC 3749:129.489 JLINK_ReadReg(R4) -T06CC 3749:129.496 - 0.010ms returns 0x08000BA0 -T06CC 3749:129.504 JLINK_ReadReg(R5) -T06CC 3749:129.510 - 0.009ms returns 0x08000BA0 -T06CC 3749:129.519 JLINK_ReadReg(R6) -T06CC 3749:129.525 - 0.010ms returns 0x00000000 -T06CC 3749:129.534 JLINK_ReadReg(R7) -T06CC 3749:129.554 - 0.023ms returns 0x00000000 -T06CC 3749:129.562 JLINK_ReadReg(R8) -T06CC 3749:129.568 - 0.009ms returns 0x00000000 -T06CC 3749:129.576 JLINK_ReadReg(R9) -T06CC 3749:129.581 - 0.009ms returns 0x20000160 -T06CC 3749:129.589 JLINK_ReadReg(R10) -T06CC 3749:129.595 - 0.009ms returns 0x00000000 -T06CC 3749:129.603 JLINK_ReadReg(R11) -T06CC 3749:129.609 - 0.009ms returns 0x00000000 -T06CC 3749:129.617 JLINK_ReadReg(R12) -T06CC 3749:129.622 - 0.009ms returns 0x00000008 -T06CC 3749:129.630 JLINK_ReadReg(R13 (SP)) -T06CC 3749:129.636 - 0.009ms returns 0x20000450 -T06CC 3749:129.644 JLINK_ReadReg(R14) -T06CC 3749:129.650 - 0.009ms returns 0x08000AC9 -T06CC 3749:129.658 JLINK_ReadReg(R15 (PC)) -T06CC 3749:129.664 - 0.009ms returns 0x08000ACA -T06CC 3749:129.672 JLINK_ReadReg(XPSR) -T06CC 3749:129.678 - 0.009ms returns 0x21000000 -T06CC 3749:129.685 JLINK_ReadReg(MSP) -T06CC 3749:129.691 - 0.009ms returns 0x20000450 -T06CC 3749:129.699 JLINK_ReadReg(PSP) -T06CC 3749:129.705 - 0.009ms returns 0x20001000 -T06CC 3749:129.713 JLINK_ReadReg(CFBP) -T06CC 3749:129.719 - 0.009ms returns 0x00000000 -T2D54 3749:130.236 JLINK_ReadMemU32(0xE0001004, 0x0001 Items, ...) -T2D54 3749:130.252 Data: 2B 10 07 00 -T2D54 3749:130.280 - DWT_CYCCNT -T2D54 3749:130.289 - 0.056ms returns 1 -T2D54 3753:684.330 JLINK_Close() -T2D54 3753:684.832 -- CPU_WriteMem(4 bytes @ 0xE0002008) -T2D54 3753:684.848 -- CPU_WriteMem(4 bytes @ 0xE000200C) -T2D54 3753:685.359 -- CPU_ReadMem(4 bytes @ 0xE0001000) -T2D54 3753:685.686 -- CPU_WriteMem(4 bytes @ 0xE0001004) -T2D54 3753:701.162 - 16.848ms -T2D54 3753:701.182 -T2D54 3753:701.188 Closed diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Template/MDK-ARM/STM3210C-EVAL/ExtDll.iex b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Template/MDK-ARM/STM3210C-EVAL/ExtDll.iex deleted file mode 100644 index 6c0896e15eef399b69a3080bee28705c0df9a1f8..0000000000000000000000000000000000000000 --- a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Template/MDK-ARM/STM3210C-EVAL/ExtDll.iex +++ /dev/null @@ -1,2 +0,0 @@ -[EXTDLL] -Count=0 diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Template/MDK-ARM/STM3210C-EVAL/Project_STM3210C-EVAL.dep b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Template/MDK-ARM/STM3210C-EVAL/Project_STM3210C-EVAL.dep deleted file mode 100644 index e46790208b0bbde3ab61a9ad0ce9ad16881af00f..0000000000000000000000000000000000000000 --- a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Template/MDK-ARM/STM3210C-EVAL/Project_STM3210C-EVAL.dep +++ /dev/null @@ -1,914 +0,0 @@ -Dependencies for Project 'Project', Target 'STM3210C-EVAL': (DO NOT MODIFY !) -F (..\stm32f10x_it.c)(0x4D99A59E)(-c --cpu Cortex-M3 -D__MICROLIB -g -O0 --apcs=interwork --split_sections -I ..\ -I ..\..\..\Libraries\CMSIS\CM3\CoreSupport -I ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x -I ..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc -I ..\..\..\Utilities\STM32_EVAL -I ..\..\..\Utilities\STM32_EVAL\Common -I ..\..\..\Utilities\STM32_EVAL\STM3210C_EVAL -I.\RTE\_STM3210C-EVAL -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.3.0\CMSIS\Include -IC:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.3.0\Device\Include -D__UVISION_VERSION="525" -D_RTE_ -DSTM32F10X_CL -DUSE_STDPERIPH_DRIVER -DSTM32F10X_CL -DUSE_STM3210C_EVAL -o .\stm3210c-eval\stm32f10x_it.o --omf_browse .\stm3210c-eval\stm32f10x_it.crf --depend .\stm3210c-eval\stm32f10x_it.d) -I (..\stm32f10x_it.h)(0x4D99A59E) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\stm32f10x.h)(0x4D783CB4) -I (..\..\..\Libraries\CMSIS\CM3\CoreSupport\core_cm3.h)(0x4D523B58) -I (C:\Keil_v5\ARM\ARMCC\include\stdint.h)(0x599ECD2E) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.h)(0x4D783CAA) -I (..\stm32f10x_conf.h)(0x4D99A59E) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_adc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_bkp.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_can.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_cec.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_crc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dac.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dbgmcu.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dma.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_exti.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_flash.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_fsmc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_gpio.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_i2c.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_iwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_pwr.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rcc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rtc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_sdio.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_spi.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_tim.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_usart.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_wwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\misc.h)(0x4D783BB4) -F (..\main.c)(0x5F96930A)(-c --cpu Cortex-M3 -D__MICROLIB -g -O0 --apcs=interwork --split_sections -I ..\ -I ..\..\..\Libraries\CMSIS\CM3\CoreSupport -I ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x -I ..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc -I ..\..\..\Utilities\STM32_EVAL -I ..\..\..\Utilities\STM32_EVAL\Common -I ..\..\..\Utilities\STM32_EVAL\STM3210C_EVAL -I.\RTE\_STM3210C-EVAL -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.3.0\CMSIS\Include -IC:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.3.0\Device\Include -D__UVISION_VERSION="525" -D_RTE_ -DSTM32F10X_CL -DUSE_STDPERIPH_DRIVER -DSTM32F10X_CL -DUSE_STM3210C_EVAL -o .\stm3210c-eval\main.o --omf_browse .\stm3210c-eval\main.crf --depend .\stm3210c-eval\main.d) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\stm32f10x.h)(0x4D783CB4) -I (..\..\..\Libraries\CMSIS\CM3\CoreSupport\core_cm3.h)(0x4D523B58) -I (C:\Keil_v5\ARM\ARMCC\include\stdint.h)(0x599ECD2E) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.h)(0x4D783CAA) -I (..\stm32f10x_conf.h)(0x4D99A59E) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_adc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_bkp.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_can.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_cec.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_crc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dac.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dbgmcu.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dma.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_exti.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_flash.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_fsmc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_gpio.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_i2c.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_iwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_pwr.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rcc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rtc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_sdio.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_spi.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_tim.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_usart.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_wwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\misc.h)(0x4D783BB4) -I (..\..\..\Utilities\STM32_EVAL\stm32_eval.h)(0x4D91975E) -I (..\..\..\Utilities\STM32_EVAL\stm3210c_eval/stm3210c_eval.h)(0x5F968D4B) -I (C:\Keil_v5\ARM\ARMCC\include\stdio.h)(0x599ECD2C) -I (..\..\..\Utilities\STM32_EVAL\STM3210C_EVAL\stm3210c_eval_lcd.h)(0x4D91975E) -I (..\..\..\Utilities\STM32_EVAL\STM3210C_EVAL\../Common/fonts.h)(0x4D91975E) -F (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_rcc.c)(0x4D783BB4)(-c --cpu Cortex-M3 -D__MICROLIB -g -O0 --apcs=interwork --split_sections -I ..\ -I ..\..\..\Libraries\CMSIS\CM3\CoreSupport -I ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x -I ..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc -I ..\..\..\Utilities\STM32_EVAL -I ..\..\..\Utilities\STM32_EVAL\Common -I ..\..\..\Utilities\STM32_EVAL\STM3210C_EVAL -I.\RTE\_STM3210C-EVAL -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.3.0\CMSIS\Include -IC:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.3.0\Device\Include -D__UVISION_VERSION="525" -D_RTE_ -DSTM32F10X_CL -DUSE_STDPERIPH_DRIVER -DSTM32F10X_CL -DUSE_STM3210C_EVAL -o .\stm3210c-eval\stm32f10x_rcc.o --omf_browse .\stm3210c-eval\stm32f10x_rcc.crf --depend .\stm3210c-eval\stm32f10x_rcc.d) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rcc.h)(0x4D783BB4) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\stm32f10x.h)(0x4D783CB4) -I (..\..\..\Libraries\CMSIS\CM3\CoreSupport\core_cm3.h)(0x4D523B58) -I (C:\Keil_v5\ARM\ARMCC\include\stdint.h)(0x599ECD2E) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.h)(0x4D783CAA) -I (..\stm32f10x_conf.h)(0x4D99A59E) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_adc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_bkp.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_can.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_cec.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_crc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dac.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dbgmcu.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dma.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_exti.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_flash.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_fsmc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_gpio.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_i2c.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_iwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_pwr.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rtc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_sdio.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_spi.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_tim.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_usart.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_wwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\misc.h)(0x4D783BB4) -F (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_gpio.c)(0x4D79EEC6)(-c --cpu Cortex-M3 -D__MICROLIB -g -O0 --apcs=interwork --split_sections -I ..\ -I ..\..\..\Libraries\CMSIS\CM3\CoreSupport -I ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x -I ..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc -I ..\..\..\Utilities\STM32_EVAL -I ..\..\..\Utilities\STM32_EVAL\Common -I ..\..\..\Utilities\STM32_EVAL\STM3210C_EVAL -I.\RTE\_STM3210C-EVAL -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.3.0\CMSIS\Include -IC:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.3.0\Device\Include -D__UVISION_VERSION="525" -D_RTE_ -DSTM32F10X_CL -DUSE_STDPERIPH_DRIVER -DSTM32F10X_CL -DUSE_STM3210C_EVAL -o .\stm3210c-eval\stm32f10x_gpio.o --omf_browse .\stm3210c-eval\stm32f10x_gpio.crf --depend .\stm3210c-eval\stm32f10x_gpio.d) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_gpio.h)(0x4D783BB4) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\stm32f10x.h)(0x4D783CB4) -I (..\..\..\Libraries\CMSIS\CM3\CoreSupport\core_cm3.h)(0x4D523B58) -I (C:\Keil_v5\ARM\ARMCC\include\stdint.h)(0x599ECD2E) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.h)(0x4D783CAA) -I (..\stm32f10x_conf.h)(0x4D99A59E) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_adc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_bkp.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_can.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_cec.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_crc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dac.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dbgmcu.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dma.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_exti.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_flash.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_fsmc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_i2c.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_iwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_pwr.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rcc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rtc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_sdio.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_spi.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_tim.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_usart.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_wwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\misc.h)(0x4D783BB4) -F (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\misc.c)(0x4D783BB4)(-c --cpu Cortex-M3 -D__MICROLIB -g -O0 --apcs=interwork --split_sections -I ..\ -I ..\..\..\Libraries\CMSIS\CM3\CoreSupport -I ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x -I ..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc -I ..\..\..\Utilities\STM32_EVAL -I ..\..\..\Utilities\STM32_EVAL\Common -I ..\..\..\Utilities\STM32_EVAL\STM3210C_EVAL -I.\RTE\_STM3210C-EVAL -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.3.0\CMSIS\Include -IC:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.3.0\Device\Include -D__UVISION_VERSION="525" -D_RTE_ -DSTM32F10X_CL -DUSE_STDPERIPH_DRIVER -DSTM32F10X_CL -DUSE_STM3210C_EVAL -o .\stm3210c-eval\misc.o --omf_browse .\stm3210c-eval\misc.crf --depend .\stm3210c-eval\misc.d) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\misc.h)(0x4D783BB4) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\stm32f10x.h)(0x4D783CB4) -I (..\..\..\Libraries\CMSIS\CM3\CoreSupport\core_cm3.h)(0x4D523B58) -I (C:\Keil_v5\ARM\ARMCC\include\stdint.h)(0x599ECD2E) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.h)(0x4D783CAA) -I (..\stm32f10x_conf.h)(0x4D99A59E) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_adc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_bkp.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_can.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_cec.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_crc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dac.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dbgmcu.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dma.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_exti.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_flash.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_fsmc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_gpio.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_i2c.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_iwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_pwr.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rcc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rtc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_sdio.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_spi.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_tim.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_usart.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_wwdg.h)(0x4D783BB4) -F (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_exti.c)(0x4D783BB4)(-c --cpu Cortex-M3 -D__MICROLIB -g -O0 --apcs=interwork --split_sections -I ..\ -I ..\..\..\Libraries\CMSIS\CM3\CoreSupport -I ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x -I ..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc -I ..\..\..\Utilities\STM32_EVAL -I ..\..\..\Utilities\STM32_EVAL\Common -I ..\..\..\Utilities\STM32_EVAL\STM3210C_EVAL -I.\RTE\_STM3210C-EVAL -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.3.0\CMSIS\Include -IC:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.3.0\Device\Include -D__UVISION_VERSION="525" -D_RTE_ -DSTM32F10X_CL -DUSE_STDPERIPH_DRIVER -DSTM32F10X_CL -DUSE_STM3210C_EVAL -o .\stm3210c-eval\stm32f10x_exti.o --omf_browse .\stm3210c-eval\stm32f10x_exti.crf --depend .\stm3210c-eval\stm32f10x_exti.d) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_exti.h)(0x4D783BB4) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\stm32f10x.h)(0x4D783CB4) -I (..\..\..\Libraries\CMSIS\CM3\CoreSupport\core_cm3.h)(0x4D523B58) -I (C:\Keil_v5\ARM\ARMCC\include\stdint.h)(0x599ECD2E) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.h)(0x4D783CAA) -I (..\stm32f10x_conf.h)(0x4D99A59E) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_adc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_bkp.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_can.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_cec.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_crc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dac.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dbgmcu.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dma.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_flash.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_fsmc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_gpio.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_i2c.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_iwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_pwr.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rcc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rtc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_sdio.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_spi.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_tim.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_usart.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_wwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\misc.h)(0x4D783BB4) -F (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_spi.c)(0x4D783BB4)(-c --cpu Cortex-M3 -D__MICROLIB -g -O0 --apcs=interwork --split_sections -I ..\ -I ..\..\..\Libraries\CMSIS\CM3\CoreSupport -I ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x -I ..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc -I ..\..\..\Utilities\STM32_EVAL -I ..\..\..\Utilities\STM32_EVAL\Common -I ..\..\..\Utilities\STM32_EVAL\STM3210C_EVAL -I.\RTE\_STM3210C-EVAL -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.3.0\CMSIS\Include -IC:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.3.0\Device\Include -D__UVISION_VERSION="525" -D_RTE_ -DSTM32F10X_CL -DUSE_STDPERIPH_DRIVER -DSTM32F10X_CL -DUSE_STM3210C_EVAL -o .\stm3210c-eval\stm32f10x_spi.o --omf_browse .\stm3210c-eval\stm32f10x_spi.crf --depend .\stm3210c-eval\stm32f10x_spi.d) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_spi.h)(0x4D783BB4) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\stm32f10x.h)(0x4D783CB4) -I (..\..\..\Libraries\CMSIS\CM3\CoreSupport\core_cm3.h)(0x4D523B58) -I (C:\Keil_v5\ARM\ARMCC\include\stdint.h)(0x599ECD2E) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.h)(0x4D783CAA) -I (..\stm32f10x_conf.h)(0x4D99A59E) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_adc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_bkp.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_can.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_cec.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_crc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dac.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dbgmcu.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dma.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_exti.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_flash.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_fsmc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_gpio.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_i2c.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_iwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_pwr.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rcc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rtc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_sdio.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_tim.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_usart.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_wwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\misc.h)(0x4D783BB4) -F (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_fsmc.c)(0x4D783BB4)(-c --cpu Cortex-M3 -D__MICROLIB -g -O0 --apcs=interwork --split_sections -I ..\ -I ..\..\..\Libraries\CMSIS\CM3\CoreSupport -I ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x -I ..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc -I ..\..\..\Utilities\STM32_EVAL -I ..\..\..\Utilities\STM32_EVAL\Common -I ..\..\..\Utilities\STM32_EVAL\STM3210C_EVAL -I.\RTE\_STM3210C-EVAL -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.3.0\CMSIS\Include -IC:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.3.0\Device\Include -D__UVISION_VERSION="525" -D_RTE_ -DSTM32F10X_CL -DUSE_STDPERIPH_DRIVER -DSTM32F10X_CL -DUSE_STM3210C_EVAL -o .\stm3210c-eval\stm32f10x_fsmc.o --omf_browse .\stm3210c-eval\stm32f10x_fsmc.crf --depend .\stm3210c-eval\stm32f10x_fsmc.d) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_fsmc.h)(0x4D783BB4) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\stm32f10x.h)(0x4D783CB4) -I (..\..\..\Libraries\CMSIS\CM3\CoreSupport\core_cm3.h)(0x4D523B58) -I (C:\Keil_v5\ARM\ARMCC\include\stdint.h)(0x599ECD2E) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.h)(0x4D783CAA) -I (..\stm32f10x_conf.h)(0x4D99A59E) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_adc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_bkp.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_can.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_cec.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_crc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dac.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dbgmcu.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dma.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_exti.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_flash.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_gpio.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_i2c.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_iwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_pwr.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rcc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rtc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_sdio.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_spi.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_tim.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_usart.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_wwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\misc.h)(0x4D783BB4) -F (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_usart.c)(0x4D783BB4)(-c --cpu Cortex-M3 -D__MICROLIB -g -O0 --apcs=interwork --split_sections -I ..\ -I ..\..\..\Libraries\CMSIS\CM3\CoreSupport -I ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x -I ..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc -I ..\..\..\Utilities\STM32_EVAL -I ..\..\..\Utilities\STM32_EVAL\Common -I ..\..\..\Utilities\STM32_EVAL\STM3210C_EVAL -I.\RTE\_STM3210C-EVAL -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.3.0\CMSIS\Include -IC:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.3.0\Device\Include -D__UVISION_VERSION="525" -D_RTE_ -DSTM32F10X_CL -DUSE_STDPERIPH_DRIVER -DSTM32F10X_CL -DUSE_STM3210C_EVAL -o .\stm3210c-eval\stm32f10x_usart.o --omf_browse .\stm3210c-eval\stm32f10x_usart.crf --depend .\stm3210c-eval\stm32f10x_usart.d) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_usart.h)(0x4D783BB4) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\stm32f10x.h)(0x4D783CB4) -I (..\..\..\Libraries\CMSIS\CM3\CoreSupport\core_cm3.h)(0x4D523B58) -I (C:\Keil_v5\ARM\ARMCC\include\stdint.h)(0x599ECD2E) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.h)(0x4D783CAA) -I (..\stm32f10x_conf.h)(0x4D99A59E) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_adc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_bkp.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_can.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_cec.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_crc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dac.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dbgmcu.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dma.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_exti.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_flash.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_fsmc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_gpio.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_i2c.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_iwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_pwr.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rcc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rtc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_sdio.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_spi.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_tim.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_wwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\misc.h)(0x4D783BB4) -F (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_sdio.c)(0x4D783BB4)(-c --cpu Cortex-M3 -D__MICROLIB -g -O0 --apcs=interwork --split_sections -I ..\ -I ..\..\..\Libraries\CMSIS\CM3\CoreSupport -I ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x -I ..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc -I ..\..\..\Utilities\STM32_EVAL -I ..\..\..\Utilities\STM32_EVAL\Common -I ..\..\..\Utilities\STM32_EVAL\STM3210C_EVAL -I.\RTE\_STM3210C-EVAL -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.3.0\CMSIS\Include -IC:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.3.0\Device\Include -D__UVISION_VERSION="525" -D_RTE_ -DSTM32F10X_CL -DUSE_STDPERIPH_DRIVER -DSTM32F10X_CL -DUSE_STM3210C_EVAL -o .\stm3210c-eval\stm32f10x_sdio.o --omf_browse .\stm3210c-eval\stm32f10x_sdio.crf --depend .\stm3210c-eval\stm32f10x_sdio.d) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_sdio.h)(0x4D783BB4) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\stm32f10x.h)(0x4D783CB4) -I (..\..\..\Libraries\CMSIS\CM3\CoreSupport\core_cm3.h)(0x4D523B58) -I (C:\Keil_v5\ARM\ARMCC\include\stdint.h)(0x599ECD2E) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.h)(0x4D783CAA) -I (..\stm32f10x_conf.h)(0x4D99A59E) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_adc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_bkp.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_can.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_cec.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_crc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dac.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dbgmcu.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dma.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_exti.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_flash.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_fsmc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_gpio.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_i2c.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_iwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_pwr.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rcc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rtc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_spi.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_tim.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_usart.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_wwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\misc.h)(0x4D783BB4) -F (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dma.c)(0x4D783BB4)(-c --cpu Cortex-M3 -D__MICROLIB -g -O0 --apcs=interwork --split_sections -I ..\ -I ..\..\..\Libraries\CMSIS\CM3\CoreSupport -I ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x -I ..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc -I ..\..\..\Utilities\STM32_EVAL -I ..\..\..\Utilities\STM32_EVAL\Common -I ..\..\..\Utilities\STM32_EVAL\STM3210C_EVAL -I.\RTE\_STM3210C-EVAL -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.3.0\CMSIS\Include -IC:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.3.0\Device\Include -D__UVISION_VERSION="525" -D_RTE_ -DSTM32F10X_CL -DUSE_STDPERIPH_DRIVER -DSTM32F10X_CL -DUSE_STM3210C_EVAL -o .\stm3210c-eval\stm32f10x_dma.o --omf_browse .\stm3210c-eval\stm32f10x_dma.crf --depend .\stm3210c-eval\stm32f10x_dma.d) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dma.h)(0x4D783BB4) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\stm32f10x.h)(0x4D783CB4) -I (..\..\..\Libraries\CMSIS\CM3\CoreSupport\core_cm3.h)(0x4D523B58) -I (C:\Keil_v5\ARM\ARMCC\include\stdint.h)(0x599ECD2E) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.h)(0x4D783CAA) -I (..\stm32f10x_conf.h)(0x4D99A59E) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_adc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_bkp.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_can.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_cec.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_crc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dac.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dbgmcu.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_exti.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_flash.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_fsmc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_gpio.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_i2c.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_iwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_pwr.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rcc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rtc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_sdio.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_spi.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_tim.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_usart.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_wwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\misc.h)(0x4D783BB4) -F (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_i2c.c)(0x4D783BB4)(-c --cpu Cortex-M3 -D__MICROLIB -g -O0 --apcs=interwork --split_sections -I ..\ -I ..\..\..\Libraries\CMSIS\CM3\CoreSupport -I ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x -I ..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc -I ..\..\..\Utilities\STM32_EVAL -I ..\..\..\Utilities\STM32_EVAL\Common -I ..\..\..\Utilities\STM32_EVAL\STM3210C_EVAL -I.\RTE\_STM3210C-EVAL -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.3.0\CMSIS\Include -IC:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.3.0\Device\Include -D__UVISION_VERSION="525" -D_RTE_ -DSTM32F10X_CL -DUSE_STDPERIPH_DRIVER -DSTM32F10X_CL -DUSE_STM3210C_EVAL -o .\stm3210c-eval\stm32f10x_i2c.o --omf_browse .\stm3210c-eval\stm32f10x_i2c.crf --depend .\stm3210c-eval\stm32f10x_i2c.d) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_i2c.h)(0x4D783BB4) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\stm32f10x.h)(0x4D783CB4) -I (..\..\..\Libraries\CMSIS\CM3\CoreSupport\core_cm3.h)(0x4D523B58) -I (C:\Keil_v5\ARM\ARMCC\include\stdint.h)(0x599ECD2E) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.h)(0x4D783CAA) -I (..\stm32f10x_conf.h)(0x4D99A59E) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_adc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_bkp.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_can.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_cec.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_crc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dac.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dbgmcu.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dma.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_exti.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_flash.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_fsmc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_gpio.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_iwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_pwr.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rcc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rtc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_sdio.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_spi.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_tim.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_usart.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_wwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\misc.h)(0x4D783BB4) -F (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_adc.c)(0x4D783BB4)(-c --cpu Cortex-M3 -D__MICROLIB -g -O0 --apcs=interwork --split_sections -I ..\ -I ..\..\..\Libraries\CMSIS\CM3\CoreSupport -I ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x -I ..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc -I ..\..\..\Utilities\STM32_EVAL -I ..\..\..\Utilities\STM32_EVAL\Common -I ..\..\..\Utilities\STM32_EVAL\STM3210C_EVAL -I.\RTE\_STM3210C-EVAL -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.3.0\CMSIS\Include -IC:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.3.0\Device\Include -D__UVISION_VERSION="525" -D_RTE_ -DSTM32F10X_CL -DUSE_STDPERIPH_DRIVER -DSTM32F10X_CL -DUSE_STM3210C_EVAL -o .\stm3210c-eval\stm32f10x_adc.o --omf_browse .\stm3210c-eval\stm32f10x_adc.crf --depend .\stm3210c-eval\stm32f10x_adc.d) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_adc.h)(0x4D783BB4) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\stm32f10x.h)(0x4D783CB4) -I (..\..\..\Libraries\CMSIS\CM3\CoreSupport\core_cm3.h)(0x4D523B58) -I (C:\Keil_v5\ARM\ARMCC\include\stdint.h)(0x599ECD2E) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.h)(0x4D783CAA) -I (..\stm32f10x_conf.h)(0x4D99A59E) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_bkp.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_can.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_cec.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_crc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dac.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dbgmcu.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dma.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_exti.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_flash.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_fsmc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_gpio.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_i2c.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_iwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_pwr.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rcc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rtc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_sdio.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_spi.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_tim.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_usart.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_wwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\misc.h)(0x4D783BB4) -F (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_bkp.c)(0x4D783BB4)(-c --cpu Cortex-M3 -D__MICROLIB -g -O0 --apcs=interwork --split_sections -I ..\ -I ..\..\..\Libraries\CMSIS\CM3\CoreSupport -I ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x -I ..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc -I ..\..\..\Utilities\STM32_EVAL -I ..\..\..\Utilities\STM32_EVAL\Common -I ..\..\..\Utilities\STM32_EVAL\STM3210C_EVAL -I.\RTE\_STM3210C-EVAL -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.3.0\CMSIS\Include -IC:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.3.0\Device\Include -D__UVISION_VERSION="525" -D_RTE_ -DSTM32F10X_CL -DUSE_STDPERIPH_DRIVER -DSTM32F10X_CL -DUSE_STM3210C_EVAL -o .\stm3210c-eval\stm32f10x_bkp.o --omf_browse .\stm3210c-eval\stm32f10x_bkp.crf --depend .\stm3210c-eval\stm32f10x_bkp.d) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_bkp.h)(0x4D783BB4) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\stm32f10x.h)(0x4D783CB4) -I (..\..\..\Libraries\CMSIS\CM3\CoreSupport\core_cm3.h)(0x4D523B58) -I (C:\Keil_v5\ARM\ARMCC\include\stdint.h)(0x599ECD2E) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.h)(0x4D783CAA) -I (..\stm32f10x_conf.h)(0x4D99A59E) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_adc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_can.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_cec.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_crc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dac.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dbgmcu.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dma.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_exti.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_flash.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_fsmc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_gpio.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_i2c.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_iwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_pwr.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rcc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rtc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_sdio.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_spi.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_tim.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_usart.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_wwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\misc.h)(0x4D783BB4) -F (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_can.c)(0x4D783BB4)(-c --cpu Cortex-M3 -D__MICROLIB -g -O0 --apcs=interwork --split_sections -I ..\ -I ..\..\..\Libraries\CMSIS\CM3\CoreSupport -I ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x -I ..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc -I ..\..\..\Utilities\STM32_EVAL -I ..\..\..\Utilities\STM32_EVAL\Common -I ..\..\..\Utilities\STM32_EVAL\STM3210C_EVAL -I.\RTE\_STM3210C-EVAL -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.3.0\CMSIS\Include -IC:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.3.0\Device\Include -D__UVISION_VERSION="525" -D_RTE_ -DSTM32F10X_CL -DUSE_STDPERIPH_DRIVER -DSTM32F10X_CL -DUSE_STM3210C_EVAL -o .\stm3210c-eval\stm32f10x_can.o --omf_browse .\stm3210c-eval\stm32f10x_can.crf --depend .\stm3210c-eval\stm32f10x_can.d) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_can.h)(0x4D783BB4) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\stm32f10x.h)(0x4D783CB4) -I (..\..\..\Libraries\CMSIS\CM3\CoreSupport\core_cm3.h)(0x4D523B58) -I (C:\Keil_v5\ARM\ARMCC\include\stdint.h)(0x599ECD2E) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.h)(0x4D783CAA) -I (..\stm32f10x_conf.h)(0x4D99A59E) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_adc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_bkp.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_cec.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_crc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dac.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dbgmcu.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dma.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_exti.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_flash.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_fsmc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_gpio.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_i2c.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_iwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_pwr.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rcc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rtc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_sdio.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_spi.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_tim.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_usart.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_wwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\misc.h)(0x4D783BB4) -F (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_cec.c)(0x4D783BB4)(-c --cpu Cortex-M3 -D__MICROLIB -g -O0 --apcs=interwork --split_sections -I ..\ -I ..\..\..\Libraries\CMSIS\CM3\CoreSupport -I ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x -I ..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc -I ..\..\..\Utilities\STM32_EVAL -I ..\..\..\Utilities\STM32_EVAL\Common -I ..\..\..\Utilities\STM32_EVAL\STM3210C_EVAL -I.\RTE\_STM3210C-EVAL -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.3.0\CMSIS\Include -IC:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.3.0\Device\Include -D__UVISION_VERSION="525" -D_RTE_ -DSTM32F10X_CL -DUSE_STDPERIPH_DRIVER -DSTM32F10X_CL -DUSE_STM3210C_EVAL -o .\stm3210c-eval\stm32f10x_cec.o --omf_browse .\stm3210c-eval\stm32f10x_cec.crf --depend .\stm3210c-eval\stm32f10x_cec.d) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_cec.h)(0x4D783BB4) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\stm32f10x.h)(0x4D783CB4) -I (..\..\..\Libraries\CMSIS\CM3\CoreSupport\core_cm3.h)(0x4D523B58) -I (C:\Keil_v5\ARM\ARMCC\include\stdint.h)(0x599ECD2E) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.h)(0x4D783CAA) -I (..\stm32f10x_conf.h)(0x4D99A59E) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_adc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_bkp.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_can.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_crc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dac.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dbgmcu.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dma.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_exti.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_flash.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_fsmc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_gpio.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_i2c.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_iwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_pwr.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rcc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rtc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_sdio.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_spi.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_tim.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_usart.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_wwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\misc.h)(0x4D783BB4) -F (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_crc.c)(0x4D783BB4)(-c --cpu Cortex-M3 -D__MICROLIB -g -O0 --apcs=interwork --split_sections -I ..\ -I ..\..\..\Libraries\CMSIS\CM3\CoreSupport -I ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x -I ..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc -I ..\..\..\Utilities\STM32_EVAL -I ..\..\..\Utilities\STM32_EVAL\Common -I ..\..\..\Utilities\STM32_EVAL\STM3210C_EVAL -I.\RTE\_STM3210C-EVAL -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.3.0\CMSIS\Include -IC:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.3.0\Device\Include -D__UVISION_VERSION="525" -D_RTE_ -DSTM32F10X_CL -DUSE_STDPERIPH_DRIVER -DSTM32F10X_CL -DUSE_STM3210C_EVAL -o .\stm3210c-eval\stm32f10x_crc.o --omf_browse .\stm3210c-eval\stm32f10x_crc.crf --depend .\stm3210c-eval\stm32f10x_crc.d) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_crc.h)(0x4D783BB4) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\stm32f10x.h)(0x4D783CB4) -I (..\..\..\Libraries\CMSIS\CM3\CoreSupport\core_cm3.h)(0x4D523B58) -I (C:\Keil_v5\ARM\ARMCC\include\stdint.h)(0x599ECD2E) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.h)(0x4D783CAA) -I (..\stm32f10x_conf.h)(0x4D99A59E) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_adc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_bkp.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_can.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_cec.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dac.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dbgmcu.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dma.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_exti.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_flash.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_fsmc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_gpio.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_i2c.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_iwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_pwr.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rcc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rtc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_sdio.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_spi.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_tim.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_usart.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_wwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\misc.h)(0x4D783BB4) -F (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dac.c)(0x4D783BB4)(-c --cpu Cortex-M3 -D__MICROLIB -g -O0 --apcs=interwork --split_sections -I ..\ -I ..\..\..\Libraries\CMSIS\CM3\CoreSupport -I ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x -I ..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc -I ..\..\..\Utilities\STM32_EVAL -I ..\..\..\Utilities\STM32_EVAL\Common -I ..\..\..\Utilities\STM32_EVAL\STM3210C_EVAL -I.\RTE\_STM3210C-EVAL -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.3.0\CMSIS\Include -IC:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.3.0\Device\Include -D__UVISION_VERSION="525" -D_RTE_ -DSTM32F10X_CL -DUSE_STDPERIPH_DRIVER -DSTM32F10X_CL -DUSE_STM3210C_EVAL -o .\stm3210c-eval\stm32f10x_dac.o --omf_browse .\stm3210c-eval\stm32f10x_dac.crf --depend .\stm3210c-eval\stm32f10x_dac.d) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dac.h)(0x4D783BB4) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\stm32f10x.h)(0x4D783CB4) -I (..\..\..\Libraries\CMSIS\CM3\CoreSupport\core_cm3.h)(0x4D523B58) -I (C:\Keil_v5\ARM\ARMCC\include\stdint.h)(0x599ECD2E) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.h)(0x4D783CAA) -I (..\stm32f10x_conf.h)(0x4D99A59E) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_adc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_bkp.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_can.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_cec.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_crc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dbgmcu.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dma.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_exti.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_flash.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_fsmc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_gpio.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_i2c.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_iwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_pwr.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rcc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rtc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_sdio.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_spi.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_tim.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_usart.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_wwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\misc.h)(0x4D783BB4) -F (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dbgmcu.c)(0x4D783BB4)(-c --cpu Cortex-M3 -D__MICROLIB -g -O0 --apcs=interwork --split_sections -I ..\ -I ..\..\..\Libraries\CMSIS\CM3\CoreSupport -I ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x -I ..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc -I ..\..\..\Utilities\STM32_EVAL -I ..\..\..\Utilities\STM32_EVAL\Common -I ..\..\..\Utilities\STM32_EVAL\STM3210C_EVAL -I.\RTE\_STM3210C-EVAL -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.3.0\CMSIS\Include -IC:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.3.0\Device\Include -D__UVISION_VERSION="525" -D_RTE_ -DSTM32F10X_CL -DUSE_STDPERIPH_DRIVER -DSTM32F10X_CL -DUSE_STM3210C_EVAL -o .\stm3210c-eval\stm32f10x_dbgmcu.o --omf_browse .\stm3210c-eval\stm32f10x_dbgmcu.crf --depend .\stm3210c-eval\stm32f10x_dbgmcu.d) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dbgmcu.h)(0x4D783BB4) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\stm32f10x.h)(0x4D783CB4) -I (..\..\..\Libraries\CMSIS\CM3\CoreSupport\core_cm3.h)(0x4D523B58) -I (C:\Keil_v5\ARM\ARMCC\include\stdint.h)(0x599ECD2E) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.h)(0x4D783CAA) -I (..\stm32f10x_conf.h)(0x4D99A59E) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_adc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_bkp.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_can.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_cec.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_crc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dac.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dma.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_exti.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_flash.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_fsmc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_gpio.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_i2c.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_iwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_pwr.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rcc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rtc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_sdio.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_spi.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_tim.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_usart.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_wwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\misc.h)(0x4D783BB4) -F (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_flash.c)(0x4D783BB4)(-c --cpu Cortex-M3 -D__MICROLIB -g -O0 --apcs=interwork --split_sections -I ..\ -I ..\..\..\Libraries\CMSIS\CM3\CoreSupport -I ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x -I ..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc -I ..\..\..\Utilities\STM32_EVAL -I ..\..\..\Utilities\STM32_EVAL\Common -I ..\..\..\Utilities\STM32_EVAL\STM3210C_EVAL -I.\RTE\_STM3210C-EVAL -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.3.0\CMSIS\Include -IC:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.3.0\Device\Include -D__UVISION_VERSION="525" -D_RTE_ -DSTM32F10X_CL -DUSE_STDPERIPH_DRIVER -DSTM32F10X_CL -DUSE_STM3210C_EVAL -o .\stm3210c-eval\stm32f10x_flash.o --omf_browse .\stm3210c-eval\stm32f10x_flash.crf --depend .\stm3210c-eval\stm32f10x_flash.d) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_flash.h)(0x4D783BB4) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\stm32f10x.h)(0x4D783CB4) -I (..\..\..\Libraries\CMSIS\CM3\CoreSupport\core_cm3.h)(0x4D523B58) -I (C:\Keil_v5\ARM\ARMCC\include\stdint.h)(0x599ECD2E) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.h)(0x4D783CAA) -I (..\stm32f10x_conf.h)(0x4D99A59E) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_adc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_bkp.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_can.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_cec.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_crc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dac.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dbgmcu.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dma.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_exti.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_fsmc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_gpio.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_i2c.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_iwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_pwr.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rcc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rtc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_sdio.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_spi.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_tim.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_usart.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_wwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\misc.h)(0x4D783BB4) -F (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_iwdg.c)(0x4D783BB4)(-c --cpu Cortex-M3 -D__MICROLIB -g -O0 --apcs=interwork --split_sections -I ..\ -I ..\..\..\Libraries\CMSIS\CM3\CoreSupport -I ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x -I ..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc -I ..\..\..\Utilities\STM32_EVAL -I ..\..\..\Utilities\STM32_EVAL\Common -I ..\..\..\Utilities\STM32_EVAL\STM3210C_EVAL -I.\RTE\_STM3210C-EVAL -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.3.0\CMSIS\Include -IC:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.3.0\Device\Include -D__UVISION_VERSION="525" -D_RTE_ -DSTM32F10X_CL -DUSE_STDPERIPH_DRIVER -DSTM32F10X_CL -DUSE_STM3210C_EVAL -o .\stm3210c-eval\stm32f10x_iwdg.o --omf_browse .\stm3210c-eval\stm32f10x_iwdg.crf --depend .\stm3210c-eval\stm32f10x_iwdg.d) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_iwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\stm32f10x.h)(0x4D783CB4) -I (..\..\..\Libraries\CMSIS\CM3\CoreSupport\core_cm3.h)(0x4D523B58) -I (C:\Keil_v5\ARM\ARMCC\include\stdint.h)(0x599ECD2E) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.h)(0x4D783CAA) -I (..\stm32f10x_conf.h)(0x4D99A59E) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_adc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_bkp.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_can.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_cec.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_crc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dac.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dbgmcu.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dma.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_exti.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_flash.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_fsmc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_gpio.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_i2c.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_pwr.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rcc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rtc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_sdio.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_spi.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_tim.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_usart.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_wwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\misc.h)(0x4D783BB4) -F (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_pwr.c)(0x4D783BB4)(-c --cpu Cortex-M3 -D__MICROLIB -g -O0 --apcs=interwork --split_sections -I ..\ -I ..\..\..\Libraries\CMSIS\CM3\CoreSupport -I ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x -I ..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc -I ..\..\..\Utilities\STM32_EVAL -I ..\..\..\Utilities\STM32_EVAL\Common -I ..\..\..\Utilities\STM32_EVAL\STM3210C_EVAL -I.\RTE\_STM3210C-EVAL -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.3.0\CMSIS\Include -IC:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.3.0\Device\Include -D__UVISION_VERSION="525" -D_RTE_ -DSTM32F10X_CL -DUSE_STDPERIPH_DRIVER -DSTM32F10X_CL -DUSE_STM3210C_EVAL -o .\stm3210c-eval\stm32f10x_pwr.o --omf_browse .\stm3210c-eval\stm32f10x_pwr.crf --depend .\stm3210c-eval\stm32f10x_pwr.d) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_pwr.h)(0x4D783BB4) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\stm32f10x.h)(0x4D783CB4) -I (..\..\..\Libraries\CMSIS\CM3\CoreSupport\core_cm3.h)(0x4D523B58) -I (C:\Keil_v5\ARM\ARMCC\include\stdint.h)(0x599ECD2E) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.h)(0x4D783CAA) -I (..\stm32f10x_conf.h)(0x4D99A59E) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_adc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_bkp.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_can.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_cec.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_crc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dac.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dbgmcu.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dma.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_exti.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_flash.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_fsmc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_gpio.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_i2c.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_iwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rcc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rtc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_sdio.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_spi.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_tim.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_usart.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_wwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\misc.h)(0x4D783BB4) -F (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_rtc.c)(0x4D783BB4)(-c --cpu Cortex-M3 -D__MICROLIB -g -O0 --apcs=interwork --split_sections -I ..\ -I ..\..\..\Libraries\CMSIS\CM3\CoreSupport -I ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x -I ..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc -I ..\..\..\Utilities\STM32_EVAL -I ..\..\..\Utilities\STM32_EVAL\Common -I ..\..\..\Utilities\STM32_EVAL\STM3210C_EVAL -I.\RTE\_STM3210C-EVAL -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.3.0\CMSIS\Include -IC:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.3.0\Device\Include -D__UVISION_VERSION="525" -D_RTE_ -DSTM32F10X_CL -DUSE_STDPERIPH_DRIVER -DSTM32F10X_CL -DUSE_STM3210C_EVAL -o .\stm3210c-eval\stm32f10x_rtc.o --omf_browse .\stm3210c-eval\stm32f10x_rtc.crf --depend .\stm3210c-eval\stm32f10x_rtc.d) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rtc.h)(0x4D783BB4) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\stm32f10x.h)(0x4D783CB4) -I (..\..\..\Libraries\CMSIS\CM3\CoreSupport\core_cm3.h)(0x4D523B58) -I (C:\Keil_v5\ARM\ARMCC\include\stdint.h)(0x599ECD2E) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.h)(0x4D783CAA) -I (..\stm32f10x_conf.h)(0x4D99A59E) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_adc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_bkp.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_can.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_cec.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_crc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dac.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dbgmcu.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dma.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_exti.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_flash.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_fsmc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_gpio.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_i2c.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_iwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_pwr.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rcc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_sdio.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_spi.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_tim.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_usart.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_wwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\misc.h)(0x4D783BB4) -F (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_tim.c)(0x4D783BB4)(-c --cpu Cortex-M3 -D__MICROLIB -g -O0 --apcs=interwork --split_sections -I ..\ -I ..\..\..\Libraries\CMSIS\CM3\CoreSupport -I ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x -I ..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc -I ..\..\..\Utilities\STM32_EVAL -I ..\..\..\Utilities\STM32_EVAL\Common -I ..\..\..\Utilities\STM32_EVAL\STM3210C_EVAL -I.\RTE\_STM3210C-EVAL -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.3.0\CMSIS\Include -IC:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.3.0\Device\Include -D__UVISION_VERSION="525" -D_RTE_ -DSTM32F10X_CL -DUSE_STDPERIPH_DRIVER -DSTM32F10X_CL -DUSE_STM3210C_EVAL -o .\stm3210c-eval\stm32f10x_tim.o --omf_browse .\stm3210c-eval\stm32f10x_tim.crf --depend .\stm3210c-eval\stm32f10x_tim.d) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_tim.h)(0x4D783BB4) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\stm32f10x.h)(0x4D783CB4) -I (..\..\..\Libraries\CMSIS\CM3\CoreSupport\core_cm3.h)(0x4D523B58) -I (C:\Keil_v5\ARM\ARMCC\include\stdint.h)(0x599ECD2E) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.h)(0x4D783CAA) -I (..\stm32f10x_conf.h)(0x4D99A59E) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_adc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_bkp.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_can.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_cec.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_crc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dac.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dbgmcu.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dma.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_exti.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_flash.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_fsmc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_gpio.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_i2c.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_iwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_pwr.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rcc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rtc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_sdio.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_spi.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_usart.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_wwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\misc.h)(0x4D783BB4) -F (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_wwdg.c)(0x4D783BB4)(-c --cpu Cortex-M3 -D__MICROLIB -g -O0 --apcs=interwork --split_sections -I ..\ -I ..\..\..\Libraries\CMSIS\CM3\CoreSupport -I ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x -I ..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc -I ..\..\..\Utilities\STM32_EVAL -I ..\..\..\Utilities\STM32_EVAL\Common -I ..\..\..\Utilities\STM32_EVAL\STM3210C_EVAL -I.\RTE\_STM3210C-EVAL -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.3.0\CMSIS\Include -IC:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.3.0\Device\Include -D__UVISION_VERSION="525" -D_RTE_ -DSTM32F10X_CL -DUSE_STDPERIPH_DRIVER -DSTM32F10X_CL -DUSE_STM3210C_EVAL -o .\stm3210c-eval\stm32f10x_wwdg.o --omf_browse .\stm3210c-eval\stm32f10x_wwdg.crf --depend .\stm3210c-eval\stm32f10x_wwdg.d) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_wwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\stm32f10x.h)(0x4D783CB4) -I (..\..\..\Libraries\CMSIS\CM3\CoreSupport\core_cm3.h)(0x4D523B58) -I (C:\Keil_v5\ARM\ARMCC\include\stdint.h)(0x599ECD2E) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.h)(0x4D783CAA) -I (..\stm32f10x_conf.h)(0x4D99A59E) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_adc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_bkp.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_can.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_cec.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_crc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dac.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dbgmcu.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dma.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_exti.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_flash.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_fsmc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_gpio.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_i2c.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_iwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_pwr.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rcc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rtc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_sdio.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_spi.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_tim.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_usart.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\misc.h)(0x4D783BB4) -F (..\..\..\Libraries\CMSIS\CM3\CoreSupport\core_cm3.c)(0x4C0C587E)(-c --cpu Cortex-M3 -D__MICROLIB -g -O0 --apcs=interwork --split_sections -I ..\ -I ..\..\..\Libraries\CMSIS\CM3\CoreSupport -I ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x -I ..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc -I ..\..\..\Utilities\STM32_EVAL -I ..\..\..\Utilities\STM32_EVAL\Common -I ..\..\..\Utilities\STM32_EVAL\STM3210C_EVAL -I.\RTE\_STM3210C-EVAL -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.3.0\CMSIS\Include -IC:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.3.0\Device\Include -D__UVISION_VERSION="525" -D_RTE_ -DSTM32F10X_CL -DUSE_STDPERIPH_DRIVER -DSTM32F10X_CL -DUSE_STM3210C_EVAL -o .\stm3210c-eval\core_cm3.o --omf_browse .\stm3210c-eval\core_cm3.crf --depend .\stm3210c-eval\core_cm3.d) -I (C:\Keil_v5\ARM\ARMCC\include\stdint.h)(0x599ECD2E) -F (..\system_stm32f10x.c)(0x4D99A59E)(-c --cpu Cortex-M3 -D__MICROLIB -g -O0 --apcs=interwork --split_sections -I ..\ -I ..\..\..\Libraries\CMSIS\CM3\CoreSupport -I ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x -I ..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc -I ..\..\..\Utilities\STM32_EVAL -I ..\..\..\Utilities\STM32_EVAL\Common -I ..\..\..\Utilities\STM32_EVAL\STM3210C_EVAL -I.\RTE\_STM3210C-EVAL -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.3.0\CMSIS\Include -IC:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.3.0\Device\Include -D__UVISION_VERSION="525" -D_RTE_ -DSTM32F10X_CL -DUSE_STDPERIPH_DRIVER -DSTM32F10X_CL -DUSE_STM3210C_EVAL -o .\stm3210c-eval\system_stm32f10x.o --omf_browse .\stm3210c-eval\system_stm32f10x.crf --depend .\stm3210c-eval\system_stm32f10x.d) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\stm32f10x.h)(0x4D783CB4) -I (..\..\..\Libraries\CMSIS\CM3\CoreSupport\core_cm3.h)(0x4D523B58) -I (C:\Keil_v5\ARM\ARMCC\include\stdint.h)(0x599ECD2E) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.h)(0x4D783CAA) -I (..\stm32f10x_conf.h)(0x4D99A59E) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_adc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_bkp.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_can.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_cec.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_crc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dac.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dbgmcu.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dma.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_exti.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_flash.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_fsmc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_gpio.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_i2c.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_iwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_pwr.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rcc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rtc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_sdio.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_spi.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_tim.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_usart.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_wwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\misc.h)(0x4D783BB4) -F (..\..\..\Utilities\STM32_EVAL\stm32_eval.c)(0x4D91975E)(-c --cpu Cortex-M3 -D__MICROLIB -g -O0 --apcs=interwork --split_sections -I ..\ -I ..\..\..\Libraries\CMSIS\CM3\CoreSupport -I ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x -I ..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc -I ..\..\..\Utilities\STM32_EVAL -I ..\..\..\Utilities\STM32_EVAL\Common -I ..\..\..\Utilities\STM32_EVAL\STM3210C_EVAL -I.\RTE\_STM3210C-EVAL -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.3.0\CMSIS\Include -IC:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.3.0\Device\Include -D__UVISION_VERSION="525" -D_RTE_ -DSTM32F10X_CL -DUSE_STDPERIPH_DRIVER -DSTM32F10X_CL -DUSE_STM3210C_EVAL -o .\stm3210c-eval\stm32_eval.o --omf_browse .\stm3210c-eval\stm32_eval.crf --depend .\stm3210c-eval\stm32_eval.d) -I (..\..\..\Utilities\STM32_EVAL\stm32_eval.h)(0x4D91975E) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\stm32f10x.h)(0x4D783CB4) -I (..\..\..\Libraries\CMSIS\CM3\CoreSupport\core_cm3.h)(0x4D523B58) -I (C:\Keil_v5\ARM\ARMCC\include\stdint.h)(0x599ECD2E) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.h)(0x4D783CAA) -I (..\stm32f10x_conf.h)(0x4D99A59E) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_adc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_bkp.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_can.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_cec.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_crc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dac.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dbgmcu.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dma.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_exti.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_flash.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_fsmc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_gpio.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_i2c.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_iwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_pwr.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rcc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rtc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_sdio.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_spi.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_tim.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_usart.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_wwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\misc.h)(0x4D783BB4) -I (..\..\..\Utilities\STM32_EVAL\stm3210c_eval/stm3210c_eval.h)(0x5F968D4B) -I (..\..\..\Utilities\STM32_EVAL\stm3210c_eval/stm3210c_eval.c)(0x5F9696EE) -F (..\..\..\Utilities\STM32_EVAL\Common\stm32_eval_spi_sd.c)(0x4D91975E)(-c --cpu Cortex-M3 -D__MICROLIB -g -O0 --apcs=interwork --split_sections -I ..\ -I ..\..\..\Libraries\CMSIS\CM3\CoreSupport -I ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x -I ..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc -I ..\..\..\Utilities\STM32_EVAL -I ..\..\..\Utilities\STM32_EVAL\Common -I ..\..\..\Utilities\STM32_EVAL\STM3210C_EVAL -I.\RTE\_STM3210C-EVAL -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.3.0\CMSIS\Include -IC:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.3.0\Device\Include -D__UVISION_VERSION="525" -D_RTE_ -DSTM32F10X_CL -DUSE_STDPERIPH_DRIVER -DSTM32F10X_CL -DUSE_STM3210C_EVAL -o .\stm3210c-eval\stm32_eval_spi_sd.o --omf_browse .\stm3210c-eval\stm32_eval_spi_sd.crf --depend .\stm3210c-eval\stm32_eval_spi_sd.d) -I (..\..\..\Utilities\STM32_EVAL\Common\stm32_eval_spi_sd.h)(0x4D91975E) -I (..\..\..\Utilities\STM32_EVAL\stm32_eval.h)(0x4D91975E) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\stm32f10x.h)(0x4D783CB4) -I (..\..\..\Libraries\CMSIS\CM3\CoreSupport\core_cm3.h)(0x4D523B58) -I (C:\Keil_v5\ARM\ARMCC\include\stdint.h)(0x599ECD2E) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.h)(0x4D783CAA) -I (..\stm32f10x_conf.h)(0x4D99A59E) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_adc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_bkp.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_can.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_cec.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_crc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dac.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dbgmcu.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dma.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_exti.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_flash.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_fsmc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_gpio.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_i2c.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_iwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_pwr.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rcc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rtc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_sdio.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_spi.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_tim.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_usart.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_wwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\misc.h)(0x4D783BB4) -I (..\..\..\Utilities\STM32_EVAL\stm3210c_eval/stm3210c_eval.h)(0x5F968D4B) -F (..\..\..\Utilities\STM32_EVAL\Common\stm32_eval_i2c_ee.c)(0x4D91975E)() -F (..\..\..\Utilities\STM32_EVAL\Common\stm32_eval_i2c_tsensor.c)(0x4D91975E)() -F (..\..\..\Utilities\STM32_EVAL\Common\stm32_eval_sdio_sd.c)(0x4D91975E)() -F (..\..\..\Utilities\STM32_EVAL\Common\stm32_eval_spi_flash.c)(0x4D91975E)() -F (..\..\..\Utilities\STM32_EVAL\STM3210B_EVAL\stm3210b_eval_lcd.c)(0x4D91975E)() -F (..\..\..\Utilities\STM32_EVAL\STM3210E_EVAL\stm3210e_eval_lcd.c)(0x4D919760)() -F (..\..\..\Utilities\STM32_EVAL\STM3210E_EVAL\stm3210e_eval_fsmc_sram.c)(0x4D91975E)() -F (..\..\..\Utilities\STM32_EVAL\STM3210E_EVAL\stm3210e_eval_fsmc_nand.c)(0x4D91975E)() -F (..\..\..\Utilities\STM32_EVAL\STM3210E_EVAL\stm3210e_eval_fsmc_nor.c)(0x4D91975E)() -F (..\..\..\Utilities\STM32_EVAL\STM3210C_EVAL\stm3210c_eval_lcd.c)(0x4D91975E)(-c --cpu Cortex-M3 -D__MICROLIB -g -O0 --apcs=interwork --split_sections -I ..\ -I ..\..\..\Libraries\CMSIS\CM3\CoreSupport -I ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x -I ..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc -I ..\..\..\Utilities\STM32_EVAL -I ..\..\..\Utilities\STM32_EVAL\Common -I ..\..\..\Utilities\STM32_EVAL\STM3210C_EVAL -I.\RTE\_STM3210C-EVAL -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.3.0\CMSIS\Include -IC:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.3.0\Device\Include -D__UVISION_VERSION="525" -D_RTE_ -DSTM32F10X_CL -DUSE_STDPERIPH_DRIVER -DSTM32F10X_CL -DUSE_STM3210C_EVAL -o .\stm3210c-eval\stm3210c_eval_lcd.o --omf_browse .\stm3210c-eval\stm3210c_eval_lcd.crf --depend .\stm3210c-eval\stm3210c_eval_lcd.d) -I (..\..\..\Utilities\STM32_EVAL\STM3210C_EVAL\stm3210c_eval_lcd.h)(0x4D91975E) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\stm32f10x.h)(0x4D783CB4) -I (..\..\..\Libraries\CMSIS\CM3\CoreSupport\core_cm3.h)(0x4D523B58) -I (C:\Keil_v5\ARM\ARMCC\include\stdint.h)(0x599ECD2E) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.h)(0x4D783CAA) -I (..\stm32f10x_conf.h)(0x4D99A59E) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_adc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_bkp.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_can.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_cec.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_crc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dac.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dbgmcu.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dma.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_exti.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_flash.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_fsmc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_gpio.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_i2c.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_iwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_pwr.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rcc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rtc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_sdio.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_spi.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_tim.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_usart.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_wwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\misc.h)(0x4D783BB4) -I (..\..\..\Utilities\STM32_EVAL\STM3210C_EVAL\../Common/fonts.h)(0x4D91975E) -I (..\..\..\Utilities\STM32_EVAL\STM3210C_EVAL\../Common/fonts.c)(0x4D91975E) -F (..\..\..\Utilities\STM32_EVAL\STM3210C_EVAL\stm3210c_eval_ioe.c)(0x4D91975E)(-c --cpu Cortex-M3 -D__MICROLIB -g -O0 --apcs=interwork --split_sections -I ..\ -I ..\..\..\Libraries\CMSIS\CM3\CoreSupport -I ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x -I ..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc -I ..\..\..\Utilities\STM32_EVAL -I ..\..\..\Utilities\STM32_EVAL\Common -I ..\..\..\Utilities\STM32_EVAL\STM3210C_EVAL -I.\RTE\_STM3210C-EVAL -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.3.0\CMSIS\Include -IC:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.3.0\Device\Include -D__UVISION_VERSION="525" -D_RTE_ -DSTM32F10X_CL -DUSE_STDPERIPH_DRIVER -DSTM32F10X_CL -DUSE_STM3210C_EVAL -o .\stm3210c-eval\stm3210c_eval_ioe.o --omf_browse .\stm3210c-eval\stm3210c_eval_ioe.crf --depend .\stm3210c-eval\stm3210c_eval_ioe.d) -I (..\..\..\Utilities\STM32_EVAL\STM3210C_EVAL\stm3210c_eval_ioe.h)(0x4D91975E) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\stm32f10x.h)(0x4D783CB4) -I (..\..\..\Libraries\CMSIS\CM3\CoreSupport\core_cm3.h)(0x4D523B58) -I (C:\Keil_v5\ARM\ARMCC\include\stdint.h)(0x599ECD2E) -I (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.h)(0x4D783CAA) -I (..\stm32f10x_conf.h)(0x4D99A59E) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_adc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_bkp.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_can.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_cec.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_crc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dac.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dbgmcu.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_dma.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_exti.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_flash.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_fsmc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_gpio.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_i2c.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_iwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_pwr.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rcc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rtc.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_sdio.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_spi.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_tim.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_usart.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\stm32f10x_wwdg.h)(0x4D783BB4) -I (..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\misc.h)(0x4D783BB4) -F (..\..\..\Utilities\STM32_EVAL\STM32100B_EVAL\stm32100b_eval_lcd.c)(0x4D91975E)() -F (..\..\..\Utilities\STM32_EVAL\STM32100B_EVAL\stm32100b_eval_cec.c)(0x4D91975E)() -F (..\..\..\Utilities\STM32_EVAL\STM32100E_EVAL\stm32100e_eval_lcd.c)(0x4D91975E)() -F (..\..\..\Utilities\STM32_EVAL\STM32100E_EVAL\stm32100e_eval_ioe.c)(0x4D91975E)() -F (..\..\..\Utilities\STM32_EVAL\STM32100E_EVAL\stm32100e_eval_cec.c)(0x4D91975E)() -F (..\..\..\Utilities\STM32_EVAL\STM32100E_EVAL\stm32100e_eval_fsmc_onenand.c)(0x4D91975E)() -F (..\..\..\Utilities\STM32_EVAL\STM32100E_EVAL\stm32100e_eval_fsmc_sram.c)(0x4D91975E)() -F (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\startup\arm\startup_stm32f10x_cl.s)(0x4D783CE0)(--cpu Cortex-M3 -g --apcs=interwork --pd "__MICROLIB SETA 1" -I.\RTE\_STM3210C-EVAL -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.3.0\CMSIS\Include -IC:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.3.0\Device\Include --pd "__UVISION_VERSION SETA 525" --pd "_RTE_ SETA 1" --pd "STM32F10X_CL SETA 1" --list .\stm3210c-eval\startup_stm32f10x_cl.lst --xref -o .\stm3210c-eval\startup_stm32f10x_cl.o --depend .\stm3210c-eval\startup_stm32f10x_cl.d) -F (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\startup\arm\startup_stm32f10x_hd.s)(0x4D783CDE)() -F (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\startup\arm\startup_stm32f10x_ld.s)(0x4D783CD8)() -F (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\startup\arm\startup_stm32f10x_ld_vl.s)(0x4D783CD6)() -F (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\startup\arm\startup_stm32f10x_md.s)(0x4D783CD2)() -F (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\startup\arm\startup_stm32f10x_md_vl.s)(0x4D783CCE)() -F (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\startup\arm\startup_stm32f10x_xl.s)(0x4D783CC8)() -F (..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\startup\arm\startup_stm32f10x_hd_vl.s)(0x4D783CDA)() -F (.\readme.txt)(0x5F9696CF)() diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Template/MDK-ARM/STM3210C-EVAL/STM3210C-EVAL.build_log.htm b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Template/MDK-ARM/STM3210C-EVAL/STM3210C-EVAL.build_log.htm deleted file mode 100644 index 6c4d5f3d24e279e49b1e7eabc833da628e3e27b8..0000000000000000000000000000000000000000 --- a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Template/MDK-ARM/STM3210C-EVAL/STM3210C-EVAL.build_log.htm +++ /dev/null @@ -1,59 +0,0 @@ - - -
-
礦ision Build Log

-
Tool Versions:

-IDE-Version: μVision V5.25.3.0
-Copyright (C) 2018 ARM Ltd and ARM Germany GmbH. All rights reserved.
-License Information: ting Ting.li8@outlook.com, RN, LIC=X1E56-D583S-8Y1VV-PVEWL-UIXFX-VT5U5
- 
-Tool Versions:
-Toolchain:       MDK-ARM Professional  Version: 5.25.2.0
-Toolchain Path:  C:\Keil_v5\ARM\ARMCC\Bin
-C Compiler:      Armcc.exe V5.06 update 6 (build 750)
-Assembler:       Armasm.exe V5.06 update 6 (build 750)
-Linker/Locator:  ArmLink.exe V5.06 update 6 (build 750)
-Library Manager: ArmAr.exe V5.06 update 6 (build 750)
-Hex Converter:   FromElf.exe V5.06 update 6 (build 750)
-CPU DLL:         SARMCM3.DLL V5.25.2.0
-Dialog DLL:      DCM.DLL V1.17.1.0
-Target DLL:      Segger\JL2CM3.dll V2.99.29.0
-Dialog DLL:      TCM.DLL V1.35.1.0
- 
-
Project:

-C:\Users\Tingl\Desktop\STM32F10x_StdPeriph_Lib_V3.5.0\Project\STM32F10x_StdPeriph_Template\MDK-ARM\Project.uvprojx
-Project File Date:  10/26/2020
-
-
Output:

-*** Using Compiler 'V5.06 update 6 (build 750)', folder: 'C:\Keil_v5\ARM\ARMCC\Bin'
-Build target 'STM3210C-EVAL'
-compiling stm32_eval.c...
-linking...
-Program Size: Code=2524 RO-data=452 RW-data=64 ZI-data=1040  
-".\STM3210C-EVAL\STM3210C-EVAL.axf" - 0 Error(s), 0 Warning(s).
-
-
Software Packages used:

-
-Package Vendor: ARM
-                http://www.keil.com/pack/ARM.CMSIS.5.3.0.pack
-                ARM.CMSIS.5.3.0
-                CMSIS (Cortex Microcontroller Software Interface Standard)
-   * Component: CORE Version: 5.1.1
-
-Package Vendor: Keil
-                http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.3.0.pack
-                Keil.STM32F1xx_DFP.2.3.0
-                STMicroelectronics STM32F1 Series Device Support, Drivers and Examples
-
-
Collection of Component include folders:

-  .\RTE\_STM3210C-EVAL
-  C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.3.0\CMSIS\Include
-  C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.3.0\Device\Include
-
-
Collection of Component Files used:

-
-   * Component: ARM::CMSIS:CORE:5.1.1
-Build Time Elapsed:  00:00:01
-
- - diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Template/MDK-ARM/STM3210C-EVAL/STM3210C-EVAL.htm b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Template/MDK-ARM/STM3210C-EVAL/STM3210C-EVAL.htm deleted file mode 100644 index c1c52ed455d8577d789cb95246505fa08a032a8f..0000000000000000000000000000000000000000 --- a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Template/MDK-ARM/STM3210C-EVAL/STM3210C-EVAL.htm +++ /dev/null @@ -1,490 +0,0 @@ - - -Static Call Graph - [.\STM3210C-EVAL\STM3210C-EVAL.axf] -
-

Static Call Graph for image .\STM3210C-EVAL\STM3210C-EVAL.axf

-

#<CALLGRAPH># ARM Linker, 5060750: Last Updated: Mon Oct 26 17:29:27 2020 -

-

Maximum Stack Usage = 96 bytes + Unknown(Cycles, Untraceable Function Pointers)

-Call chain for Maximum Stack Depth:

-main ⇒ STM_EVAL_COMInit ⇒ USART_Init ⇒ RCC_GetClocksFreq -

-

-Mutually Recursive functions -

  • ADC1_2_IRQHandler   ⇒   ADC1_2_IRQHandler
    - -

    -

    -Function Pointers -

      -
    • ADC1_2_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • BusFault_Handler from stm32f10x_it.o(i.BusFault_Handler) referenced from startup_stm32f10x_cl.o(RESET) -
    • CAN1_RX0_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • CAN1_RX1_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • CAN1_SCE_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • CAN1_TX_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • CAN2_RX0_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • CAN2_RX1_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • CAN2_SCE_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • CAN2_TX_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • DMA1_Channel1_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • DMA1_Channel2_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • DMA1_Channel3_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • DMA1_Channel4_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • DMA1_Channel5_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • DMA1_Channel6_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • DMA1_Channel7_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • DMA2_Channel1_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • DMA2_Channel2_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • DMA2_Channel3_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • DMA2_Channel4_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • DMA2_Channel5_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • DebugMon_Handler from stm32f10x_it.o(i.DebugMon_Handler) referenced from startup_stm32f10x_cl.o(RESET) -
    • ETH_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • ETH_WKUP_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • EXTI0_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • EXTI15_10_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • EXTI1_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • EXTI2_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • EXTI3_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • EXTI4_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • EXTI9_5_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • FLASH_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • HardFault_Handler from stm32f10x_it.o(i.HardFault_Handler) referenced from startup_stm32f10x_cl.o(RESET) -
    • I2C1_ER_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • I2C1_EV_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • I2C2_ER_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • I2C2_EV_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • MemManage_Handler from stm32f10x_it.o(i.MemManage_Handler) referenced from startup_stm32f10x_cl.o(RESET) -
    • NMI_Handler from stm32f10x_it.o(i.NMI_Handler) referenced from startup_stm32f10x_cl.o(RESET) -
    • OTG_FS_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • OTG_FS_WKUP_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • PVD_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • PendSV_Handler from stm32f10x_it.o(i.PendSV_Handler) referenced from startup_stm32f10x_cl.o(RESET) -
    • RCC_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • RTCAlarm_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • RTC_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • Reset_Handler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • SPI1_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • SPI2_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • SPI3_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • SVC_Handler from stm32f10x_it.o(i.SVC_Handler) referenced from startup_stm32f10x_cl.o(RESET) -
    • SysTick_Handler from stm32f10x_it.o(i.SysTick_Handler) referenced from startup_stm32f10x_cl.o(RESET) -
    • SystemInit from system_stm32f10x.o(i.SystemInit) referenced from startup_stm32f10x_cl.o(.text) -
    • TAMPER_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • TIM1_BRK_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • TIM1_CC_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • TIM1_TRG_COM_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • TIM1_UP_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • TIM2_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • TIM3_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • TIM4_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • TIM5_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • TIM6_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • TIM7_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • UART4_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • UART5_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • USART1_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • USART2_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • USART3_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • UsageFault_Handler from stm32f10x_it.o(i.UsageFault_Handler) referenced from startup_stm32f10x_cl.o(RESET) -
    • WWDG_IRQHandler from startup_stm32f10x_cl.o(.text) referenced from startup_stm32f10x_cl.o(RESET) -
    • __main from entry.o(.ARM.Collect$$$$00000000) referenced from startup_stm32f10x_cl.o(.text) -
    • fputc from main.o(i.fputc) referenced from printf2.o(i.__0printf$2) -
    • main from main.o(i.main) referenced from entry9a.o(.ARM.Collect$$$$0000000B) -
    -

    -

    -Global Symbols -

    -

    __main (Thumb, 0 bytes, Stack size unknown bytes, entry.o(.ARM.Collect$$$$00000000)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(.text) -
    -

    _main_stk (Thumb, 0 bytes, Stack size unknown bytes, entry2.o(.ARM.Collect$$$$00000001)) - -

    _main_scatterload (Thumb, 0 bytes, Stack size unknown bytes, entry5.o(.ARM.Collect$$$$00000004)) -

    [Calls]

    • >>   __scatterload -
    - -

    __main_after_scatterload (Thumb, 0 bytes, Stack size unknown bytes, entry5.o(.ARM.Collect$$$$00000004)) -

    [Called By]

    • >>   __scatterload -
    - -

    _main_clock (Thumb, 0 bytes, Stack size unknown bytes, entry7b.o(.ARM.Collect$$$$00000008)) - -

    _main_cpp_init (Thumb, 0 bytes, Stack size unknown bytes, entry8b.o(.ARM.Collect$$$$0000000A)) - -

    _main_init (Thumb, 0 bytes, Stack size unknown bytes, entry9a.o(.ARM.Collect$$$$0000000B)) - -

    __rt_final_cpp (Thumb, 0 bytes, Stack size unknown bytes, entry10a.o(.ARM.Collect$$$$0000000D)) - -

    __rt_final_exit (Thumb, 0 bytes, Stack size unknown bytes, entry11a.o(.ARM.Collect$$$$0000000F)) - -

    Reset_Handler (Thumb, 8 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    ADC1_2_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -

    [Calls]

    • >>   ADC1_2_IRQHandler -
    -
    [Called By]
    • >>   ADC1_2_IRQHandler -
    -
    [Address Reference Count : 1]
    • startup_stm32f10x_cl.o(RESET) -
    -

    CAN1_RX0_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    CAN1_RX1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    CAN1_SCE_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    CAN1_TX_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    CAN2_RX0_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    CAN2_RX1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    CAN2_SCE_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    CAN2_TX_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    DMA1_Channel1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    DMA1_Channel2_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    DMA1_Channel3_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    DMA1_Channel4_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    DMA1_Channel5_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    DMA1_Channel6_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    DMA1_Channel7_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    DMA2_Channel1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    DMA2_Channel2_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    DMA2_Channel3_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    DMA2_Channel4_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    DMA2_Channel5_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    ETH_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    ETH_WKUP_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    EXTI0_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    EXTI15_10_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    EXTI1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    EXTI2_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    EXTI3_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    EXTI4_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    EXTI9_5_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    FLASH_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    I2C1_ER_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    I2C1_EV_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    I2C2_ER_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    I2C2_EV_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    OTG_FS_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    OTG_FS_WKUP_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    PVD_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    RCC_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    RTCAlarm_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    RTC_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    SPI1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    SPI2_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    SPI3_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    TAMPER_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    TIM1_BRK_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    TIM1_CC_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    TIM1_TRG_COM_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    TIM1_UP_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    TIM2_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    TIM3_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    TIM4_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    TIM5_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    TIM6_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    TIM7_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    UART4_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    UART5_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    USART1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    USART2_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    USART3_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    WWDG_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_cl.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    __scatterload (Thumb, 28 bytes, Stack size 0 bytes, init.o(.text)) -

    [Calls]

    • >>   __main_after_scatterload -
    -
    [Called By]
    • >>   _main_scatterload -
    - -

    __scatterload_rt2 (Thumb, 0 bytes, Stack size 0 bytes, init.o(.text), UNUSED) - -

    BusFault_Handler (Thumb, 4 bytes, Stack size 0 bytes, stm32f10x_it.o(i.BusFault_Handler)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    DebugMon_Handler (Thumb, 2 bytes, Stack size 0 bytes, stm32f10x_it.o(i.DebugMon_Handler)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    GPIO_Init (Thumb, 278 bytes, Stack size 24 bytes, stm32f10x_gpio.o(i.GPIO_Init)) -

    [Stack]

    • Max Depth = 24
    • Call Chain = GPIO_Init -
    -
    [Called By]
    • >>   STM_EVAL_LEDInit -
    • >>   STM_EVAL_COMInit -
    - -

    GPIO_PinRemapConfig (Thumb, 138 bytes, Stack size 20 bytes, stm32f10x_gpio.o(i.GPIO_PinRemapConfig)) -

    [Stack]

    • Max Depth = 20
    • Call Chain = GPIO_PinRemapConfig -
    -
    [Called By]
    • >>   STM_EVAL_COMInit -
    - -

    HardFault_Handler (Thumb, 4 bytes, Stack size 0 bytes, stm32f10x_it.o(i.HardFault_Handler)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    MemManage_Handler (Thumb, 4 bytes, Stack size 0 bytes, stm32f10x_it.o(i.MemManage_Handler)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    NMI_Handler (Thumb, 2 bytes, Stack size 0 bytes, stm32f10x_it.o(i.NMI_Handler)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    PendSV_Handler (Thumb, 2 bytes, Stack size 0 bytes, stm32f10x_it.o(i.PendSV_Handler)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    RCC_APB2PeriphClockCmd (Thumb, 26 bytes, Stack size 0 bytes, stm32f10x_rcc.o(i.RCC_APB2PeriphClockCmd)) -

    [Called By]

    • >>   STM_EVAL_LEDInit -
    • >>   STM_EVAL_COMInit -
    - -

    RCC_GetClocksFreq (Thumb, 374 bytes, Stack size 24 bytes, stm32f10x_rcc.o(i.RCC_GetClocksFreq)) -

    [Stack]

    • Max Depth = 24
    • Call Chain = RCC_GetClocksFreq -
    -
    [Called By]
    • >>   USART_Init -
    - -

    STM_EVAL_COMInit (Thumb, 170 bytes, Stack size 16 bytes, stm32_eval.o(i.STM_EVAL_COMInit)) -

    [Stack]

    • Max Depth = 96
    • Call Chain = STM_EVAL_COMInit ⇒ USART_Init ⇒ RCC_GetClocksFreq -
    -
    [Calls]
    • >>   GPIO_PinRemapConfig -
    • >>   GPIO_Init -
    • >>   RCC_APB2PeriphClockCmd -
    • >>   USART_Init -
    • >>   USART_ITConfig -
    • >>   USART_Cmd -
    -
    [Called By]
    • >>   main -
    - -

    STM_EVAL_LEDInit (Thumb, 52 bytes, Stack size 16 bytes, stm32_eval.o(i.STM_EVAL_LEDInit)) -

    [Stack]

    • Max Depth = 40
    • Call Chain = STM_EVAL_LEDInit ⇒ GPIO_Init -
    -
    [Calls]
    • >>   GPIO_Init -
    • >>   RCC_APB2PeriphClockCmd -
    -
    [Called By]
    • >>   main -
    - -

    STM_EVAL_LEDOn (Thumb, 16 bytes, Stack size 0 bytes, stm32_eval.o(i.STM_EVAL_LEDOn)) -

    [Called By]

    • >>   main -
    - -

    SVC_Handler (Thumb, 2 bytes, Stack size 0 bytes, stm32f10x_it.o(i.SVC_Handler)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    SysTick_Handler (Thumb, 2 bytes, Stack size 0 bytes, stm32f10x_it.o(i.SysTick_Handler)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    SystemInit (Thumb, 92 bytes, Stack size 8 bytes, system_stm32f10x.o(i.SystemInit)) -

    [Stack]

    • Max Depth = 28
    • Call Chain = SystemInit ⇒ SetSysClock ⇒ SetSysClockTo72 -
    -
    [Calls]
    • >>   SetSysClock -
    -
    [Address Reference Count : 1]
    • startup_stm32f10x_cl.o(.text) -
    -

    USART_Cmd (Thumb, 24 bytes, Stack size 0 bytes, stm32f10x_usart.o(i.USART_Cmd)) -

    [Called By]

    • >>   STM_EVAL_COMInit -
    - -

    USART_GetFlagStatus (Thumb, 26 bytes, Stack size 0 bytes, stm32f10x_usart.o(i.USART_GetFlagStatus)) -

    [Called By]

    • >>   fputc -
    - -

    USART_ITConfig (Thumb, 74 bytes, Stack size 20 bytes, stm32f10x_usart.o(i.USART_ITConfig)) -

    [Stack]

    • Max Depth = 20
    • Call Chain = USART_ITConfig -
    -
    [Called By]
    • >>   STM_EVAL_COMInit -
    - -

    USART_Init (Thumb, 210 bytes, Stack size 56 bytes, stm32f10x_usart.o(i.USART_Init)) -

    [Stack]

    • Max Depth = 80
    • Call Chain = USART_Init ⇒ RCC_GetClocksFreq -
    -
    [Calls]
    • >>   RCC_GetClocksFreq -
    -
    [Called By]
    • >>   STM_EVAL_COMInit -
    - -

    USART_SendData (Thumb, 8 bytes, Stack size 0 bytes, stm32f10x_usart.o(i.USART_SendData)) -

    [Called By]

    • >>   fputc -
    - -

    UsageFault_Handler (Thumb, 4 bytes, Stack size 0 bytes, stm32f10x_it.o(i.UsageFault_Handler)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_cl.o(RESET) -
    -

    __0printf$2 (Thumb, 22 bytes, Stack size 24 bytes, printf2.o(i.__0printf$2), UNUSED) -

    [Calls]

    • >>   _printf_core -
    - -

    __1printf$2 (Thumb, 0 bytes, Stack size 24 bytes, printf2.o(i.__0printf$2), UNUSED) - -

    __2printf (Thumb, 0 bytes, Stack size 24 bytes, printf2.o(i.__0printf$2)) -

    [Stack]

    • Max Depth = 24
    • Call Chain = __2printf -
    -
    [Called By]
    • >>   main -
    - -

    __scatterload_copy (Thumb, 14 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_copy), UNUSED) - -

    __scatterload_null (Thumb, 2 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_null), UNUSED) - -

    __scatterload_zeroinit (Thumb, 14 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_zeroinit), UNUSED) - -

    fputc (Thumb, 32 bytes, Stack size 16 bytes, main.o(i.fputc)) -

    [Stack]

    • Max Depth = 16
    • Call Chain = fputc -
    -
    [Calls]
    • >>   USART_SendData -
    • >>   USART_GetFlagStatus -
    -
    [Address Reference Count : 1]
    • printf2.o(i.__0printf$2) -
    -

    main (Thumb, 104 bytes, Stack size 0 bytes, main.o(i.main)) -

    [Stack]

    • Max Depth = 96
    • Call Chain = main ⇒ STM_EVAL_COMInit ⇒ USART_Init ⇒ RCC_GetClocksFreq -
    -
    [Calls]
    • >>   STM_EVAL_LEDOn -
    • >>   STM_EVAL_LEDInit -
    • >>   STM_EVAL_COMInit -
    • >>   __2printf -
    -
    [Address Reference Count : 1]
    • entry9a.o(.ARM.Collect$$$$0000000B) -

    -

    -Local Symbols -

    -

    SetSysClock (Thumb, 8 bytes, Stack size 8 bytes, system_stm32f10x.o(i.SetSysClock)) -

    [Stack]

    • Max Depth = 20
    • Call Chain = SetSysClock ⇒ SetSysClockTo72 -
    -
    [Calls]
    • >>   SetSysClockTo72 -
    -
    [Called By]
    • >>   SystemInit -
    - -

    SetSysClockTo72 (Thumb, 264 bytes, Stack size 12 bytes, system_stm32f10x.o(i.SetSysClockTo72)) -

    [Stack]

    • Max Depth = 12
    • Call Chain = SetSysClockTo72 -
    -
    [Called By]
    • >>   SetSysClock -
    - -

    _printf_core (Thumb, 214 bytes, Stack size 40 bytes, printf2.o(i._printf_core), UNUSED) -

    [Called By]

    • >>   __0printf$2 -
    -

    -

    -Undefined Global Symbols -

    diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Template/MDK-ARM/STM3210C-EVAL/STM3210C-EVAL.lnp b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Template/MDK-ARM/STM3210C-EVAL/STM3210C-EVAL.lnp deleted file mode 100644 index bbf42605805b69c08a5958ca5b46078e4fc62749..0000000000000000000000000000000000000000 --- a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Template/MDK-ARM/STM3210C-EVAL/STM3210C-EVAL.lnp +++ /dev/null @@ -1,37 +0,0 @@ ---cpu Cortex-M3 -".\stm3210c-eval\stm32f10x_it.o" -".\stm3210c-eval\main.o" -".\stm3210c-eval\stm32f10x_rcc.o" -".\stm3210c-eval\stm32f10x_gpio.o" -".\stm3210c-eval\misc.o" -".\stm3210c-eval\stm32f10x_exti.o" -".\stm3210c-eval\stm32f10x_spi.o" -".\stm3210c-eval\stm32f10x_fsmc.o" -".\stm3210c-eval\stm32f10x_usart.o" -".\stm3210c-eval\stm32f10x_sdio.o" -".\stm3210c-eval\stm32f10x_dma.o" -".\stm3210c-eval\stm32f10x_i2c.o" -".\stm3210c-eval\stm32f10x_adc.o" -".\stm3210c-eval\stm32f10x_bkp.o" -".\stm3210c-eval\stm32f10x_can.o" -".\stm3210c-eval\stm32f10x_cec.o" -".\stm3210c-eval\stm32f10x_crc.o" -".\stm3210c-eval\stm32f10x_dac.o" -".\stm3210c-eval\stm32f10x_dbgmcu.o" -".\stm3210c-eval\stm32f10x_flash.o" -".\stm3210c-eval\stm32f10x_iwdg.o" -".\stm3210c-eval\stm32f10x_pwr.o" -".\stm3210c-eval\stm32f10x_rtc.o" -".\stm3210c-eval\stm32f10x_tim.o" -".\stm3210c-eval\stm32f10x_wwdg.o" -".\stm3210c-eval\core_cm3.o" -".\stm3210c-eval\system_stm32f10x.o" -".\stm3210c-eval\stm32_eval.o" -".\stm3210c-eval\stm32_eval_spi_sd.o" -".\stm3210c-eval\stm3210c_eval_lcd.o" -".\stm3210c-eval\stm3210c_eval_ioe.o" -".\stm3210c-eval\startup_stm32f10x_cl.o" ---library_type=microlib --strict --scatter ".\STM3210C-EVAL\STM3210C-EVAL.sct" ---summary_stderr --info summarysizes --map --load_addr_map_info --xref --callgraph --symbols ---info sizes --info totals --info unused --info veneers ---list ".\STM3210C-EVAL\STM3210C-EVAL.map" -o .\STM3210C-EVAL\STM3210C-EVAL.axf \ No newline at end of file diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Template/MDK-ARM/STM3210C-EVAL/STM3210C-EVAL.sct b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Template/MDK-ARM/STM3210C-EVAL/STM3210C-EVAL.sct deleted file mode 100644 index a8c9a15a87ee870be141a01e1007f81b9422a9e6..0000000000000000000000000000000000000000 --- a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Template/MDK-ARM/STM3210C-EVAL/STM3210C-EVAL.sct +++ /dev/null @@ -1,15 +0,0 @@ -; ************************************************************* -; *** Scatter-Loading Description File generated by uVision *** -; ************************************************************* - -LR_IROM1 0x08000000 0x00040000 { ; load region size_region - ER_IROM1 0x08000000 0x00040000 { ; load address = execution address - *.o (RESET, +First) - *(InRoot$$Sections) - .ANY (+RO) - } - RW_IRAM1 0x20000000 0x00010000 { ; RW data - .ANY (+RW +ZI) - } -} - diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Template/MDK-ARM/STM3210C-EVAL/core_cm3.crf b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Template/MDK-ARM/STM3210C-EVAL/core_cm3.crf deleted file mode 100644 index 42737803eb3dbf6b4d29b848c00974aad7443fba..0000000000000000000000000000000000000000 Binary files a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Template/MDK-ARM/STM3210C-EVAL/core_cm3.crf and /dev/null differ diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Template/MDK-ARM/STM3210C-EVAL/main.crf b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Template/MDK-ARM/STM3210C-EVAL/main.crf deleted file mode 100644 index a965e23db981866dfda451f506c851d167778296..0000000000000000000000000000000000000000 Binary files a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Template/MDK-ARM/STM3210C-EVAL/main.crf and /dev/null differ diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Template/MDK-ARM/STM3210C-EVAL/misc.crf b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Template/MDK-ARM/STM3210C-EVAL/misc.crf deleted file mode 100644 index e1f25f4c26b141bca3875e74bf7c4d0cbedb4925..0000000000000000000000000000000000000000 Binary files a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Template/MDK-ARM/STM3210C-EVAL/misc.crf and /dev/null differ diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Template/MDK-ARM/STM3210C-EVAL/startup_stm32f10x_cl.lst b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Template/MDK-ARM/STM3210C-EVAL/startup_stm32f10x_cl.lst deleted file mode 100644 index 6a166a0ea5d760141e4588c14553bc5aff2adf2c..0000000000000000000000000000000000000000 --- a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Template/MDK-ARM/STM3210C-EVAL/startup_stm32f10x_cl.lst +++ /dev/null @@ -1,1711 +0,0 @@ - - - -ARM Macro Assembler Page 1 - - - 1 00000000 ;******************** (C) COPYRIGHT 2011 STMicroelectron - ics ******************** - 2 00000000 ;* File Name : startup_stm32f10x_cl.s - 3 00000000 ;* Author : MCD Application Team - 4 00000000 ;* Version : V3.5.0 - 5 00000000 ;* Date : 11-March-2011 - 6 00000000 ;* Description : STM32F10x Connectivity line devi - ces vector table for MDK-ARM - 7 00000000 ;* toolchain. - 8 00000000 ;* This module performs: - 9 00000000 ;* - Set the initial SP - 10 00000000 ;* - Set the initial PC == Reset_Ha - ndler - 11 00000000 ;* - Set the vector table entries w - ith the exceptions ISR address - 12 00000000 ;* - Configure the clock system - 13 00000000 ;* - Branches to __main in the C li - brary (which eventually - 14 00000000 ;* calls main()). - 15 00000000 ;* After Reset the CortexM3 process - or is in Thread mode, - 16 00000000 ;* priority is Privileged, and the - Stack is set to Main. - 17 00000000 ;* <<< Use Configuration Wizard in Context Menu >>> - 18 00000000 ;******************************************************* - ************************ - 19 00000000 ; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS A - T PROVIDING CUSTOMERS - 20 00000000 ; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN OR - DER FOR THEM TO SAVE TIME. - 21 00000000 ; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIAB - LE FOR ANY DIRECT, - 22 00000000 ; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY - CLAIMS ARISING FROM THE - 23 00000000 ; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOM - ERS OF THE CODING - 24 00000000 ; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR - PRODUCTS. - 25 00000000 ;******************************************************* - ************************ - 26 00000000 - 27 00000000 ; Amount of memory (in bytes) allocated for Stack - 28 00000000 ; Tailor this value to your application needs - 29 00000000 ; Stack Configuration - 30 00000000 ; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> - 31 00000000 ; - 32 00000000 - 33 00000000 00000400 - Stack_Size - EQU 0x00000400 - 34 00000000 - 35 00000000 AREA STACK, NOINIT, READWRITE, ALIGN -=3 - 36 00000000 Stack_Mem - SPACE Stack_Size - 37 00000400 __initial_sp - 38 00000400 - 39 00000400 - 40 00000400 ; Heap Configuration - - - -ARM Macro Assembler Page 2 - - - 41 00000400 ; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> - 42 00000400 ; - 43 00000400 - 44 00000400 00000200 - Heap_Size - EQU 0x00000200 - 45 00000400 - 46 00000400 AREA HEAP, NOINIT, READWRITE, ALIGN= -3 - 47 00000000 __heap_base - 48 00000000 Heap_Mem - SPACE Heap_Size - 49 00000200 __heap_limit - 50 00000200 - 51 00000200 PRESERVE8 - 52 00000200 THUMB - 53 00000200 - 54 00000200 - 55 00000200 ; Vector Table Mapped to Address 0 at Reset - 56 00000200 AREA RESET, DATA, READONLY - 57 00000000 EXPORT __Vectors - 58 00000000 EXPORT __Vectors_End - 59 00000000 EXPORT __Vectors_Size - 60 00000000 - 61 00000000 00000000 - __Vectors - DCD __initial_sp ; Top of Stack - 62 00000004 00000000 DCD Reset_Handler ; Reset Handler - 63 00000008 00000000 DCD NMI_Handler ; NMI Handler - 64 0000000C 00000000 DCD HardFault_Handler ; Hard Fault - Handler - 65 00000010 00000000 DCD MemManage_Handler - ; MPU Fault Handler - - 66 00000014 00000000 DCD BusFault_Handler - ; Bus Fault Handler - - 67 00000018 00000000 DCD UsageFault_Handler ; Usage Faul - t Handler - 68 0000001C 00000000 DCD 0 ; Reserved - 69 00000020 00000000 DCD 0 ; Reserved - 70 00000024 00000000 DCD 0 ; Reserved - 71 00000028 00000000 DCD 0 ; Reserved - 72 0000002C 00000000 DCD SVC_Handler ; SVCall Handler - 73 00000030 00000000 DCD DebugMon_Handler ; Debug Monito - r Handler - 74 00000034 00000000 DCD 0 ; Reserved - 75 00000038 00000000 DCD PendSV_Handler ; PendSV Handler - - 76 0000003C 00000000 DCD SysTick_Handler - ; SysTick Handler - 77 00000040 - 78 00000040 ; External Interrupts - 79 00000040 00000000 DCD WWDG_IRQHandler - ; Window Watchdog - 80 00000044 00000000 DCD PVD_IRQHandler ; PVD through EX - TI Line detect - 81 00000048 00000000 DCD TAMPER_IRQHandler ; Tamper - 82 0000004C 00000000 DCD RTC_IRQHandler ; RTC - - - -ARM Macro Assembler Page 3 - - - 83 00000050 00000000 DCD FLASH_IRQHandler ; Flash - 84 00000054 00000000 DCD RCC_IRQHandler ; RCC - 85 00000058 00000000 DCD EXTI0_IRQHandler ; EXTI Line 0 - 86 0000005C 00000000 DCD EXTI1_IRQHandler ; EXTI Line 1 - 87 00000060 00000000 DCD EXTI2_IRQHandler ; EXTI Line 2 - 88 00000064 00000000 DCD EXTI3_IRQHandler ; EXTI Line 3 - 89 00000068 00000000 DCD EXTI4_IRQHandler ; EXTI Line 4 - 90 0000006C 00000000 DCD DMA1_Channel1_IRQHandler - ; DMA1 Channel 1 - 91 00000070 00000000 DCD DMA1_Channel2_IRQHandler - ; DMA1 Channel 2 - 92 00000074 00000000 DCD DMA1_Channel3_IRQHandler - ; DMA1 Channel 3 - 93 00000078 00000000 DCD DMA1_Channel4_IRQHandler - ; DMA1 Channel 4 - 94 0000007C 00000000 DCD DMA1_Channel5_IRQHandler - ; DMA1 Channel 5 - 95 00000080 00000000 DCD DMA1_Channel6_IRQHandler - ; DMA1 Channel 6 - 96 00000084 00000000 DCD DMA1_Channel7_IRQHandler - ; DMA1 Channel 7 - 97 00000088 00000000 DCD ADC1_2_IRQHandler - ; ADC1 and ADC2 - 98 0000008C 00000000 DCD CAN1_TX_IRQHandler ; CAN1 TX - 99 00000090 00000000 DCD CAN1_RX0_IRQHandler ; CAN1 RX0 - 100 00000094 00000000 DCD CAN1_RX1_IRQHandler ; CAN1 RX1 - 101 00000098 00000000 DCD CAN1_SCE_IRQHandler ; CAN1 SCE - 102 0000009C 00000000 DCD EXTI9_5_IRQHandler - ; EXTI Line 9..5 - 103 000000A0 00000000 DCD TIM1_BRK_IRQHandler - ; TIM1 Break - 104 000000A4 00000000 DCD TIM1_UP_IRQHandler - ; TIM1 Update - 105 000000A8 00000000 DCD TIM1_TRG_COM_IRQHandler ; TIM1 - Trigger and Commuta - tion - 106 000000AC 00000000 DCD TIM1_CC_IRQHandler ; TIM1 Captu - re Compare - 107 000000B0 00000000 DCD TIM2_IRQHandler ; TIM2 - 108 000000B4 00000000 DCD TIM3_IRQHandler ; TIM3 - 109 000000B8 00000000 DCD TIM4_IRQHandler ; TIM4 - 110 000000BC 00000000 DCD I2C1_EV_IRQHandler ; I2C1 Event - - 111 000000C0 00000000 DCD I2C1_ER_IRQHandler ; I2C1 Error - - 112 000000C4 00000000 DCD I2C2_EV_IRQHandler ; I2C2 Event - - 113 000000C8 00000000 DCD I2C2_ER_IRQHandler ; I2C1 Error - - 114 000000CC 00000000 DCD SPI1_IRQHandler ; SPI1 - 115 000000D0 00000000 DCD SPI2_IRQHandler ; SPI2 - 116 000000D4 00000000 DCD USART1_IRQHandler ; USART1 - 117 000000D8 00000000 DCD USART2_IRQHandler ; USART2 - 118 000000DC 00000000 DCD USART3_IRQHandler ; USART3 - 119 000000E0 00000000 DCD EXTI15_10_IRQHandler - ; EXTI Line 15..10 - 120 000000E4 00000000 DCD RTCAlarm_IRQHandler ; RTC alarm - through EXTI line - 121 000000E8 00000000 DCD OTG_FS_WKUP_IRQHandler ; USB OT - - - -ARM Macro Assembler Page 4 - - - G FS Wakeup through - EXTI line - 122 000000EC 00000000 DCD 0 ; Reserved - 123 000000F0 00000000 DCD 0 ; Reserved - 124 000000F4 00000000 DCD 0 ; Reserved - 125 000000F8 00000000 DCD 0 ; Reserved - 126 000000FC 00000000 DCD 0 ; Reserved - 127 00000100 00000000 DCD 0 ; Reserved - 128 00000104 00000000 DCD 0 ; Reserved - 129 00000108 00000000 DCD TIM5_IRQHandler ; TIM5 - 130 0000010C 00000000 DCD SPI3_IRQHandler ; SPI3 - 131 00000110 00000000 DCD UART4_IRQHandler ; UART4 - 132 00000114 00000000 DCD UART5_IRQHandler ; UART5 - 133 00000118 00000000 DCD TIM6_IRQHandler ; TIM6 - 134 0000011C 00000000 DCD TIM7_IRQHandler ; TIM7 - 135 00000120 00000000 DCD DMA2_Channel1_IRQHandler - ; DMA2 Channel1 - 136 00000124 00000000 DCD DMA2_Channel2_IRQHandler - ; DMA2 Channel2 - 137 00000128 00000000 DCD DMA2_Channel3_IRQHandler - ; DMA2 Channel3 - 138 0000012C 00000000 DCD DMA2_Channel4_IRQHandler - ; DMA2 Channel4 - 139 00000130 00000000 DCD DMA2_Channel5_IRQHandler - ; DMA2 Channel5 - 140 00000134 00000000 DCD ETH_IRQHandler ; Ethernet - 141 00000138 00000000 DCD ETH_WKUP_IRQHandler ; Ethernet - Wakeup through EXTI - line - 142 0000013C 00000000 DCD CAN2_TX_IRQHandler ; CAN2 TX - 143 00000140 00000000 DCD CAN2_RX0_IRQHandler ; CAN2 RX0 - 144 00000144 00000000 DCD CAN2_RX1_IRQHandler ; CAN2 RX1 - 145 00000148 00000000 DCD CAN2_SCE_IRQHandler ; CAN2 SCE - 146 0000014C 00000000 DCD OTG_FS_IRQHandler ; USB OTG FS - 147 00000150 __Vectors_End - 148 00000150 - 149 00000150 00000150 - __Vectors_Size - EQU __Vectors_End - __Vectors - 150 00000150 - 151 00000150 AREA |.text|, CODE, READONLY - 152 00000000 - 153 00000000 ; Reset handler - 154 00000000 Reset_Handler - PROC - 155 00000000 EXPORT Reset_Handler [WEAK -] - 156 00000000 IMPORT SystemInit - 157 00000000 IMPORT __main - 158 00000000 4806 LDR R0, =SystemInit - 159 00000002 4780 BLX R0 - 160 00000004 4806 LDR R0, =__main - 161 00000006 4700 BX R0 - 162 00000008 ENDP - 163 00000008 - 164 00000008 ; Dummy Exception Handlers (infinite loops which can be - modified) - 165 00000008 - 166 00000008 NMI_Handler - - - -ARM Macro Assembler Page 5 - - - PROC - 167 00000008 EXPORT NMI_Handler [WEA -K] - 168 00000008 E7FE B . - 169 0000000A ENDP - 171 0000000A HardFault_Handler - PROC - 172 0000000A EXPORT HardFault_Handler [WEA -K] - 173 0000000A E7FE B . - 174 0000000C ENDP - 176 0000000C MemManage_Handler - PROC - 177 0000000C EXPORT MemManage_Handler [WEA -K] - 178 0000000C E7FE B . - 179 0000000E ENDP - 181 0000000E BusFault_Handler - PROC - 182 0000000E EXPORT BusFault_Handler [WEA -K] - 183 0000000E E7FE B . - 184 00000010 ENDP - 186 00000010 UsageFault_Handler - PROC - 187 00000010 EXPORT UsageFault_Handler [WEA -K] - 188 00000010 E7FE B . - 189 00000012 ENDP - 190 00000012 SVC_Handler - PROC - 191 00000012 EXPORT SVC_Handler [WEA -K] - 192 00000012 E7FE B . - 193 00000014 ENDP - 195 00000014 DebugMon_Handler - PROC - 196 00000014 EXPORT DebugMon_Handler [WEA -K] - 197 00000014 E7FE B . - 198 00000016 ENDP - 199 00000016 PendSV_Handler - PROC - 200 00000016 EXPORT PendSV_Handler [WEA -K] - 201 00000016 E7FE B . - 202 00000018 ENDP - 203 00000018 SysTick_Handler - PROC - 204 00000018 EXPORT SysTick_Handler [WEA -K] - 205 00000018 E7FE B . - 206 0000001A ENDP - 207 0000001A - 208 0000001A Default_Handler - PROC - 209 0000001A - 210 0000001A EXPORT WWDG_IRQHandler [WEA -K] - - - -ARM Macro Assembler Page 6 - - - 211 0000001A EXPORT PVD_IRQHandler [WEA -K] - 212 0000001A EXPORT TAMPER_IRQHandler [WEA -K] - 213 0000001A EXPORT RTC_IRQHandler [WEA -K] - 214 0000001A EXPORT FLASH_IRQHandler [WEA -K] - 215 0000001A EXPORT RCC_IRQHandler [WEA -K] - 216 0000001A EXPORT EXTI0_IRQHandler [WEA -K] - 217 0000001A EXPORT EXTI1_IRQHandler [WEA -K] - 218 0000001A EXPORT EXTI2_IRQHandler [WEA -K] - 219 0000001A EXPORT EXTI3_IRQHandler [WEA -K] - 220 0000001A EXPORT EXTI4_IRQHandler [WEA -K] - 221 0000001A EXPORT DMA1_Channel1_IRQHandler [WEA -K] - 222 0000001A EXPORT DMA1_Channel2_IRQHandler [WEA -K] - 223 0000001A EXPORT DMA1_Channel3_IRQHandler [WEA -K] - 224 0000001A EXPORT DMA1_Channel4_IRQHandler [WEA -K] - 225 0000001A EXPORT DMA1_Channel5_IRQHandler [WEA -K] - 226 0000001A EXPORT DMA1_Channel6_IRQHandler [WEA -K] - 227 0000001A EXPORT DMA1_Channel7_IRQHandler [WEA -K] - 228 0000001A EXPORT ADC1_2_IRQHandler [WEA -K] - 229 0000001A EXPORT CAN1_TX_IRQHandler [WEA -K] - 230 0000001A EXPORT CAN1_RX0_IRQHandler [WEA -K] - 231 0000001A EXPORT CAN1_RX1_IRQHandler [WEA -K] - 232 0000001A EXPORT CAN1_SCE_IRQHandler [WEA -K] - 233 0000001A EXPORT EXTI9_5_IRQHandler [WEA -K] - 234 0000001A EXPORT TIM1_BRK_IRQHandler [WEA -K] - 235 0000001A EXPORT TIM1_UP_IRQHandler [WEA -K] - 236 0000001A EXPORT TIM1_TRG_COM_IRQHandler [WEA -K] - 237 0000001A EXPORT TIM1_CC_IRQHandler [WEA -K] - 238 0000001A EXPORT TIM2_IRQHandler [WEA -K] - 239 0000001A EXPORT TIM3_IRQHandler [WEA -K] - 240 0000001A EXPORT TIM4_IRQHandler [WEA - - - -ARM Macro Assembler Page 7 - - -K] - 241 0000001A EXPORT I2C1_EV_IRQHandler [WEA -K] - 242 0000001A EXPORT I2C1_ER_IRQHandler [WEA -K] - 243 0000001A EXPORT I2C2_EV_IRQHandler [WEA -K] - 244 0000001A EXPORT I2C2_ER_IRQHandler [WEA -K] - 245 0000001A EXPORT SPI1_IRQHandler [WEA -K] - 246 0000001A EXPORT SPI2_IRQHandler [WEA -K] - 247 0000001A EXPORT USART1_IRQHandler [WEA -K] - 248 0000001A EXPORT USART2_IRQHandler [WEA -K] - 249 0000001A EXPORT USART3_IRQHandler [WEA -K] - 250 0000001A EXPORT EXTI15_10_IRQHandler [WEA -K] - 251 0000001A EXPORT RTCAlarm_IRQHandler [WEA -K] - 252 0000001A EXPORT OTG_FS_WKUP_IRQHandler [WEA -K] - 253 0000001A EXPORT TIM5_IRQHandler [WEA -K] - 254 0000001A EXPORT SPI3_IRQHandler [WEA -K] - 255 0000001A EXPORT UART4_IRQHandler [WEA -K] - 256 0000001A EXPORT UART5_IRQHandler [WEA -K] - 257 0000001A EXPORT TIM6_IRQHandler [WEA -K] - 258 0000001A EXPORT TIM7_IRQHandler [WEA -K] - 259 0000001A EXPORT DMA2_Channel1_IRQHandler [WEA -K] - 260 0000001A EXPORT DMA2_Channel2_IRQHandler [WEA -K] - 261 0000001A EXPORT DMA2_Channel3_IRQHandler [WEA -K] - 262 0000001A EXPORT DMA2_Channel4_IRQHandler [WEA -K] - 263 0000001A EXPORT DMA2_Channel5_IRQHandler [WEA -K] - 264 0000001A EXPORT ETH_IRQHandler [WEA -K] - 265 0000001A EXPORT ETH_WKUP_IRQHandler [WEA -K] - 266 0000001A EXPORT CAN2_TX_IRQHandler [WEA -K] - 267 0000001A EXPORT CAN2_RX0_IRQHandler [WEA -K] - 268 0000001A EXPORT CAN2_RX1_IRQHandler [WEA -K] - 269 0000001A EXPORT CAN2_SCE_IRQHandler [WEA -K] - - - -ARM Macro Assembler Page 8 - - - 270 0000001A EXPORT OTG_FS_IRQHandler [WEA -K] - 271 0000001A - 272 0000001A WWDG_IRQHandler - 273 0000001A PVD_IRQHandler - 274 0000001A TAMPER_IRQHandler - 275 0000001A RTC_IRQHandler - 276 0000001A FLASH_IRQHandler - 277 0000001A RCC_IRQHandler - 278 0000001A EXTI0_IRQHandler - 279 0000001A EXTI1_IRQHandler - 280 0000001A EXTI2_IRQHandler - 281 0000001A EXTI3_IRQHandler - 282 0000001A EXTI4_IRQHandler - 283 0000001A DMA1_Channel1_IRQHandler - 284 0000001A DMA1_Channel2_IRQHandler - 285 0000001A DMA1_Channel3_IRQHandler - 286 0000001A DMA1_Channel4_IRQHandler - 287 0000001A DMA1_Channel5_IRQHandler - 288 0000001A DMA1_Channel6_IRQHandler - 289 0000001A DMA1_Channel7_IRQHandler - 290 0000001A ADC1_2_IRQHandler - 291 0000001A CAN1_TX_IRQHandler - 292 0000001A CAN1_RX0_IRQHandler - 293 0000001A CAN1_RX1_IRQHandler - 294 0000001A CAN1_SCE_IRQHandler - 295 0000001A EXTI9_5_IRQHandler - 296 0000001A TIM1_BRK_IRQHandler - 297 0000001A TIM1_UP_IRQHandler - 298 0000001A TIM1_TRG_COM_IRQHandler - 299 0000001A TIM1_CC_IRQHandler - 300 0000001A TIM2_IRQHandler - 301 0000001A TIM3_IRQHandler - 302 0000001A TIM4_IRQHandler - 303 0000001A I2C1_EV_IRQHandler - 304 0000001A I2C1_ER_IRQHandler - 305 0000001A I2C2_EV_IRQHandler - 306 0000001A I2C2_ER_IRQHandler - 307 0000001A SPI1_IRQHandler - 308 0000001A SPI2_IRQHandler - 309 0000001A USART1_IRQHandler - 310 0000001A USART2_IRQHandler - 311 0000001A USART3_IRQHandler - 312 0000001A EXTI15_10_IRQHandler - 313 0000001A RTCAlarm_IRQHandler - 314 0000001A OTG_FS_WKUP_IRQHandler - 315 0000001A TIM5_IRQHandler - 316 0000001A SPI3_IRQHandler - 317 0000001A UART4_IRQHandler - 318 0000001A UART5_IRQHandler - 319 0000001A TIM6_IRQHandler - 320 0000001A TIM7_IRQHandler - 321 0000001A DMA2_Channel1_IRQHandler - 322 0000001A DMA2_Channel2_IRQHandler - 323 0000001A DMA2_Channel3_IRQHandler - 324 0000001A DMA2_Channel4_IRQHandler - 325 0000001A DMA2_Channel5_IRQHandler - 326 0000001A ETH_IRQHandler - 327 0000001A ETH_WKUP_IRQHandler - - - -ARM Macro Assembler Page 9 - - - 328 0000001A CAN2_TX_IRQHandler - 329 0000001A CAN2_RX0_IRQHandler - 330 0000001A CAN2_RX1_IRQHandler - 331 0000001A CAN2_SCE_IRQHandler - 332 0000001A OTG_FS_IRQHandler - 333 0000001A - 334 0000001A E7FE B . - 335 0000001C - 336 0000001C ENDP - 337 0000001C - 338 0000001C ALIGN - 339 0000001C - 340 0000001C ;******************************************************* - ************************ - 341 0000001C ; User Stack and Heap initialization - 342 0000001C ;******************************************************* - ************************ - 343 0000001C IF :DEF:__MICROLIB - 344 0000001C - 345 0000001C EXPORT __initial_sp - 346 0000001C EXPORT __heap_base - 347 0000001C EXPORT __heap_limit - 348 0000001C - 349 0000001C ELSE - 364 ENDIF - 365 0000001C - 366 0000001C END - 00000000 - 00000000 -Command Line: --debug --xref --diag_suppress=9931 --cpu=Cortex-M3 --apcs=interw -ork --depend=.\stm3210c-eval\startup_stm32f10x_cl.d -o.\stm3210c-eval\startup_s -tm32f10x_cl.o -I.\RTE\_STM3210C-EVAL -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.3.0\CMSI -S\Include -IC:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.3.0\Device\Include --prede -fine="__MICROLIB SETA 1" --predefine="__UVISION_VERSION SETA 525" --predefine=" -_RTE_ SETA 1" --predefine="STM32F10X_CL SETA 1" --list=.\stm3210c-eval\startup_ -stm32f10x_cl.lst ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\startu -p\arm\startup_stm32f10x_cl.s - - - -ARM Macro Assembler Page 1 Alphabetic symbol ordering -Relocatable symbols - -STACK 00000000 - -Symbol: STACK - Definitions - At line 35 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10 -x\startup\arm\startup_stm32f10x_cl.s - Uses - None -Comment: STACK unused -Stack_Mem 00000000 - -Symbol: Stack_Mem - Definitions - At line 36 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10 -x\startup\arm\startup_stm32f10x_cl.s - Uses - None -Comment: Stack_Mem unused -__initial_sp 00000400 - -Symbol: __initial_sp - Definitions - At line 37 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10 -x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 61 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10 -x\startup\arm\startup_stm32f10x_cl.s - At line 345 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -3 symbols - - - -ARM Macro Assembler Page 1 Alphabetic symbol ordering -Relocatable symbols - -HEAP 00000000 - -Symbol: HEAP - Definitions - At line 46 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10 -x\startup\arm\startup_stm32f10x_cl.s - Uses - None -Comment: HEAP unused -Heap_Mem 00000000 - -Symbol: Heap_Mem - Definitions - At line 48 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10 -x\startup\arm\startup_stm32f10x_cl.s - Uses - None -Comment: Heap_Mem unused -__heap_base 00000000 - -Symbol: __heap_base - Definitions - At line 47 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10 -x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 346 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s -Comment: __heap_base used once -__heap_limit 00000200 - -Symbol: __heap_limit - Definitions - At line 49 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10 -x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 347 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s -Comment: __heap_limit used once -4 symbols - - - -ARM Macro Assembler Page 1 Alphabetic symbol ordering -Relocatable symbols - -RESET 00000000 - -Symbol: RESET - Definitions - At line 56 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10 -x\startup\arm\startup_stm32f10x_cl.s - Uses - None -Comment: RESET unused -__Vectors 00000000 - -Symbol: __Vectors - Definitions - At line 61 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10 -x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 57 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10 -x\startup\arm\startup_stm32f10x_cl.s - At line 149 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -__Vectors_End 00000150 - -Symbol: __Vectors_End - Definitions - At line 147 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 58 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10 -x\startup\arm\startup_stm32f10x_cl.s - At line 149 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -3 symbols - - - -ARM Macro Assembler Page 1 Alphabetic symbol ordering -Relocatable symbols - -.text 00000000 - -Symbol: .text - Definitions - At line 151 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - None -Comment: .text unused -ADC1_2_IRQHandler 0000001A - -Symbol: ADC1_2_IRQHandler - Definitions - At line 290 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 97 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10 -x\startup\arm\startup_stm32f10x_cl.s - At line 228 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -BusFault_Handler 0000000E - -Symbol: BusFault_Handler - Definitions - At line 181 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 66 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10 -x\startup\arm\startup_stm32f10x_cl.s - At line 182 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -CAN1_RX0_IRQHandler 0000001A - -Symbol: CAN1_RX0_IRQHandler - Definitions - At line 292 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 99 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10 -x\startup\arm\startup_stm32f10x_cl.s - At line 230 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -CAN1_RX1_IRQHandler 0000001A - -Symbol: CAN1_RX1_IRQHandler - Definitions - At line 293 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 100 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - At line 231 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -CAN1_SCE_IRQHandler 0000001A - - - - -ARM Macro Assembler Page 2 Alphabetic symbol ordering -Relocatable symbols - -Symbol: CAN1_SCE_IRQHandler - Definitions - At line 294 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 101 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - At line 232 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -CAN1_TX_IRQHandler 0000001A - -Symbol: CAN1_TX_IRQHandler - Definitions - At line 291 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 98 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10 -x\startup\arm\startup_stm32f10x_cl.s - At line 229 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -CAN2_RX0_IRQHandler 0000001A - -Symbol: CAN2_RX0_IRQHandler - Definitions - At line 329 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 143 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - At line 267 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -CAN2_RX1_IRQHandler 0000001A - -Symbol: CAN2_RX1_IRQHandler - Definitions - At line 330 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 144 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - At line 268 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -CAN2_SCE_IRQHandler 0000001A - -Symbol: CAN2_SCE_IRQHandler - Definitions - At line 331 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 145 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - At line 269 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -CAN2_TX_IRQHandler 0000001A - - - -ARM Macro Assembler Page 3 Alphabetic symbol ordering -Relocatable symbols - - -Symbol: CAN2_TX_IRQHandler - Definitions - At line 328 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 142 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - At line 266 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -DMA1_Channel1_IRQHandler 0000001A - -Symbol: DMA1_Channel1_IRQHandler - Definitions - At line 283 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 90 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10 -x\startup\arm\startup_stm32f10x_cl.s - At line 221 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -DMA1_Channel2_IRQHandler 0000001A - -Symbol: DMA1_Channel2_IRQHandler - Definitions - At line 284 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 91 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10 -x\startup\arm\startup_stm32f10x_cl.s - At line 222 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -DMA1_Channel3_IRQHandler 0000001A - -Symbol: DMA1_Channel3_IRQHandler - Definitions - At line 285 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 92 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10 -x\startup\arm\startup_stm32f10x_cl.s - At line 223 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -DMA1_Channel4_IRQHandler 0000001A - -Symbol: DMA1_Channel4_IRQHandler - Definitions - At line 286 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 93 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10 -x\startup\arm\startup_stm32f10x_cl.s - At line 224 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - - - - -ARM Macro Assembler Page 4 Alphabetic symbol ordering -Relocatable symbols - -DMA1_Channel5_IRQHandler 0000001A - -Symbol: DMA1_Channel5_IRQHandler - Definitions - At line 287 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 94 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10 -x\startup\arm\startup_stm32f10x_cl.s - At line 225 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -DMA1_Channel6_IRQHandler 0000001A - -Symbol: DMA1_Channel6_IRQHandler - Definitions - At line 288 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 95 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10 -x\startup\arm\startup_stm32f10x_cl.s - At line 226 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -DMA1_Channel7_IRQHandler 0000001A - -Symbol: DMA1_Channel7_IRQHandler - Definitions - At line 289 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 96 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10 -x\startup\arm\startup_stm32f10x_cl.s - At line 227 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -DMA2_Channel1_IRQHandler 0000001A - -Symbol: DMA2_Channel1_IRQHandler - Definitions - At line 321 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 135 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - At line 259 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -DMA2_Channel2_IRQHandler 0000001A - -Symbol: DMA2_Channel2_IRQHandler - Definitions - At line 322 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 136 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - At line 260 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - - - -ARM Macro Assembler Page 5 Alphabetic symbol ordering -Relocatable symbols - - -DMA2_Channel3_IRQHandler 0000001A - -Symbol: DMA2_Channel3_IRQHandler - Definitions - At line 323 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 137 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - At line 261 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -DMA2_Channel4_IRQHandler 0000001A - -Symbol: DMA2_Channel4_IRQHandler - Definitions - At line 324 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 138 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - At line 262 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -DMA2_Channel5_IRQHandler 0000001A - -Symbol: DMA2_Channel5_IRQHandler - Definitions - At line 325 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 139 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - At line 263 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -DebugMon_Handler 00000014 - -Symbol: DebugMon_Handler - Definitions - At line 195 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 73 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10 -x\startup\arm\startup_stm32f10x_cl.s - At line 196 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -Default_Handler 0000001A - -Symbol: Default_Handler - Definitions - At line 208 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - None -Comment: Default_Handler unused -ETH_IRQHandler 0000001A - - - -ARM Macro Assembler Page 6 Alphabetic symbol ordering -Relocatable symbols - - -Symbol: ETH_IRQHandler - Definitions - At line 326 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 140 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - At line 264 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -ETH_WKUP_IRQHandler 0000001A - -Symbol: ETH_WKUP_IRQHandler - Definitions - At line 327 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 141 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - At line 265 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -EXTI0_IRQHandler 0000001A - -Symbol: EXTI0_IRQHandler - Definitions - At line 278 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 85 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10 -x\startup\arm\startup_stm32f10x_cl.s - At line 216 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -EXTI15_10_IRQHandler 0000001A - -Symbol: EXTI15_10_IRQHandler - Definitions - At line 312 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 119 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - At line 250 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -EXTI1_IRQHandler 0000001A - -Symbol: EXTI1_IRQHandler - Definitions - At line 279 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 86 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10 -x\startup\arm\startup_stm32f10x_cl.s - At line 217 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - - - - -ARM Macro Assembler Page 7 Alphabetic symbol ordering -Relocatable symbols - -EXTI2_IRQHandler 0000001A - -Symbol: EXTI2_IRQHandler - Definitions - At line 280 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 87 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10 -x\startup\arm\startup_stm32f10x_cl.s - At line 218 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -EXTI3_IRQHandler 0000001A - -Symbol: EXTI3_IRQHandler - Definitions - At line 281 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 88 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10 -x\startup\arm\startup_stm32f10x_cl.s - At line 219 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -EXTI4_IRQHandler 0000001A - -Symbol: EXTI4_IRQHandler - Definitions - At line 282 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 89 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10 -x\startup\arm\startup_stm32f10x_cl.s - At line 220 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -EXTI9_5_IRQHandler 0000001A - -Symbol: EXTI9_5_IRQHandler - Definitions - At line 295 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 102 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - At line 233 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -FLASH_IRQHandler 0000001A - -Symbol: FLASH_IRQHandler - Definitions - At line 276 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 83 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10 -x\startup\arm\startup_stm32f10x_cl.s - At line 214 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - - - -ARM Macro Assembler Page 8 Alphabetic symbol ordering -Relocatable symbols - - -HardFault_Handler 0000000A - -Symbol: HardFault_Handler - Definitions - At line 171 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 64 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10 -x\startup\arm\startup_stm32f10x_cl.s - At line 172 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -I2C1_ER_IRQHandler 0000001A - -Symbol: I2C1_ER_IRQHandler - Definitions - At line 304 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 111 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - At line 242 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -I2C1_EV_IRQHandler 0000001A - -Symbol: I2C1_EV_IRQHandler - Definitions - At line 303 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 110 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - At line 241 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -I2C2_ER_IRQHandler 0000001A - -Symbol: I2C2_ER_IRQHandler - Definitions - At line 306 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 113 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - At line 244 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -I2C2_EV_IRQHandler 0000001A - -Symbol: I2C2_EV_IRQHandler - Definitions - At line 305 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 112 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - At line 243 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 - - - -ARM Macro Assembler Page 9 Alphabetic symbol ordering -Relocatable symbols - -0x\startup\arm\startup_stm32f10x_cl.s - -MemManage_Handler 0000000C - -Symbol: MemManage_Handler - Definitions - At line 176 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 65 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10 -x\startup\arm\startup_stm32f10x_cl.s - At line 177 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -NMI_Handler 00000008 - -Symbol: NMI_Handler - Definitions - At line 166 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 63 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10 -x\startup\arm\startup_stm32f10x_cl.s - At line 167 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -OTG_FS_IRQHandler 0000001A - -Symbol: OTG_FS_IRQHandler - Definitions - At line 332 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 146 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - At line 270 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -OTG_FS_WKUP_IRQHandler 0000001A - -Symbol: OTG_FS_WKUP_IRQHandler - Definitions - At line 314 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 121 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - At line 252 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -PVD_IRQHandler 0000001A - -Symbol: PVD_IRQHandler - Definitions - At line 273 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 80 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10 -x\startup\arm\startup_stm32f10x_cl.s - - - -ARM Macro Assembler Page 10 Alphabetic symbol ordering -Relocatable symbols - - At line 211 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -PendSV_Handler 00000016 - -Symbol: PendSV_Handler - Definitions - At line 199 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 75 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10 -x\startup\arm\startup_stm32f10x_cl.s - At line 200 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -RCC_IRQHandler 0000001A - -Symbol: RCC_IRQHandler - Definitions - At line 277 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 84 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10 -x\startup\arm\startup_stm32f10x_cl.s - At line 215 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -RTCAlarm_IRQHandler 0000001A - -Symbol: RTCAlarm_IRQHandler - Definitions - At line 313 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 120 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - At line 251 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -RTC_IRQHandler 0000001A - -Symbol: RTC_IRQHandler - Definitions - At line 275 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 82 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10 -x\startup\arm\startup_stm32f10x_cl.s - At line 213 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -Reset_Handler 00000000 - -Symbol: Reset_Handler - Definitions - At line 154 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 62 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10 - - - -ARM Macro Assembler Page 11 Alphabetic symbol ordering -Relocatable symbols - -x\startup\arm\startup_stm32f10x_cl.s - At line 155 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -SPI1_IRQHandler 0000001A - -Symbol: SPI1_IRQHandler - Definitions - At line 307 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 114 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - At line 245 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -SPI2_IRQHandler 0000001A - -Symbol: SPI2_IRQHandler - Definitions - At line 308 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 115 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - At line 246 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -SPI3_IRQHandler 0000001A - -Symbol: SPI3_IRQHandler - Definitions - At line 316 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 130 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - At line 254 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -SVC_Handler 00000012 - -Symbol: SVC_Handler - Definitions - At line 190 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 72 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10 -x\startup\arm\startup_stm32f10x_cl.s - At line 191 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -SysTick_Handler 00000018 - -Symbol: SysTick_Handler - Definitions - At line 203 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - - - -ARM Macro Assembler Page 12 Alphabetic symbol ordering -Relocatable symbols - - At line 76 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10 -x\startup\arm\startup_stm32f10x_cl.s - At line 204 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -TAMPER_IRQHandler 0000001A - -Symbol: TAMPER_IRQHandler - Definitions - At line 274 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 81 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10 -x\startup\arm\startup_stm32f10x_cl.s - At line 212 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -TIM1_BRK_IRQHandler 0000001A - -Symbol: TIM1_BRK_IRQHandler - Definitions - At line 296 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 103 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - At line 234 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -TIM1_CC_IRQHandler 0000001A - -Symbol: TIM1_CC_IRQHandler - Definitions - At line 299 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 106 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - At line 237 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -TIM1_TRG_COM_IRQHandler 0000001A - -Symbol: TIM1_TRG_COM_IRQHandler - Definitions - At line 298 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 105 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - At line 236 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -TIM1_UP_IRQHandler 0000001A - -Symbol: TIM1_UP_IRQHandler - Definitions - At line 297 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - - - -ARM Macro Assembler Page 13 Alphabetic symbol ordering -Relocatable symbols - - Uses - At line 104 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - At line 235 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -TIM2_IRQHandler 0000001A - -Symbol: TIM2_IRQHandler - Definitions - At line 300 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 107 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - At line 238 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -TIM3_IRQHandler 0000001A - -Symbol: TIM3_IRQHandler - Definitions - At line 301 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 108 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - At line 239 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -TIM4_IRQHandler 0000001A - -Symbol: TIM4_IRQHandler - Definitions - At line 302 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 109 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - At line 240 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -TIM5_IRQHandler 0000001A - -Symbol: TIM5_IRQHandler - Definitions - At line 315 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 129 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - At line 253 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -TIM6_IRQHandler 0000001A - -Symbol: TIM6_IRQHandler - Definitions - At line 319 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 - - - -ARM Macro Assembler Page 14 Alphabetic symbol ordering -Relocatable symbols - -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 133 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - At line 257 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -TIM7_IRQHandler 0000001A - -Symbol: TIM7_IRQHandler - Definitions - At line 320 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 134 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - At line 258 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -UART4_IRQHandler 0000001A - -Symbol: UART4_IRQHandler - Definitions - At line 317 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 131 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - At line 255 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -UART5_IRQHandler 0000001A - -Symbol: UART5_IRQHandler - Definitions - At line 318 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 132 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - At line 256 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -USART1_IRQHandler 0000001A - -Symbol: USART1_IRQHandler - Definitions - At line 309 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 116 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - At line 247 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -USART2_IRQHandler 0000001A - -Symbol: USART2_IRQHandler - Definitions - - - -ARM Macro Assembler Page 15 Alphabetic symbol ordering -Relocatable symbols - - At line 310 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 117 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - At line 248 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -USART3_IRQHandler 0000001A - -Symbol: USART3_IRQHandler - Definitions - At line 311 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 118 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - At line 249 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -UsageFault_Handler 00000010 - -Symbol: UsageFault_Handler - Definitions - At line 186 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 67 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10 -x\startup\arm\startup_stm32f10x_cl.s - At line 187 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -WWDG_IRQHandler 0000001A - -Symbol: WWDG_IRQHandler - Definitions - At line 272 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 79 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10 -x\startup\arm\startup_stm32f10x_cl.s - At line 210 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - -73 symbols - - - -ARM Macro Assembler Page 1 Alphabetic symbol ordering -Absolute symbols - -Heap_Size 00000200 - -Symbol: Heap_Size - Definitions - At line 44 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10 -x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 48 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10 -x\startup\arm\startup_stm32f10x_cl.s -Comment: Heap_Size used once -Stack_Size 00000400 - -Symbol: Stack_Size - Definitions - At line 33 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10 -x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 36 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10 -x\startup\arm\startup_stm32f10x_cl.s -Comment: Stack_Size used once -__Vectors_Size 00000150 - -Symbol: __Vectors_Size - Definitions - At line 149 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 59 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10 -x\startup\arm\startup_stm32f10x_cl.s -Comment: __Vectors_Size used once -3 symbols - - - -ARM Macro Assembler Page 1 Alphabetic symbol ordering -External symbols - -SystemInit 00000000 - -Symbol: SystemInit - Definitions - At line 156 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At line 158 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s -Comment: SystemInit used once -__main 00000000 - -Symbol: __main - Definitions - At line 157 in file ..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F1 -0x\startup\arm\startup_stm32f10x_cl.s - Uses - At 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a37e0c3798b7cc69a1df7fbc652218061aecc9e1..0000000000000000000000000000000000000000 Binary files a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Template/MDK-ARM/STM3210C-EVAL/system_stm32f10x.crf and /dev/null differ diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Template/MDK-ARM/clear.bat b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Template/MDK-ARM/clear.bat deleted file mode 100644 index e96144158acdfdcd9ff8712fda56fbeabf7e117b..0000000000000000000000000000000000000000 --- a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Template/MDK-ARM/clear.bat +++ /dev/null @@ -1,25 +0,0 @@ -rd /Q /S project\MDK-ARM(uV5)\Objects -rd /Q /S project\MDK-ARM(uV5)\Listings -rd /Q /S project\MDK-ARM(uV5)\DebugConfig -del /Q project\MDK-ARM(uV5)\*.bak -del /Q project\MDK-ARM(uV5)\*.dep -del /Q project\MDK-ARM(uV5)\JLink* -del /Q project\MDK-ARM(uV5)\project.uvguix.* -del /Q project\MDK-ARM(uV5)\*.scvd - -rd /Q /S project\MDK5-DAPLink\Objects -rd /Q /S project\MDK5-DAPLink\Listings -rd /Q /S project\MDK5-DAPLink\DebugConfig -del /Q project\MDK5-DAPLink\*.bak -del /Q project\MDK5-DAPLink\*.dep -del /Q project\MDK5-DAPLink\JLink* -del /Q project\MDK5-DAPLink\project.uvgui.* - -del /Q project\EWARMv8\Project.dep -del /Q project\EWARMv8\Debug -del /Q project\EWARMv8\Flash -del /Q project\EWARMv8\settings -del /Q project\EWARMv8\Debug -rd /Q /S project\EWARMv8\Flash -rd /Q /S project\EWARMv8\settings -rd /Q /S project\EWARMv8\Debug diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Template/MDK-ARM/note.txt b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Template/MDK-ARM/note.txt index af8e3e75b18cb6e5de152291a3abbdd219828171..7a54d639479c459453dfec036b0231e989ae4da1 100644 --- a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Template/MDK-ARM/note.txt +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Template/MDK-ARM/note.txt @@ -53,4 +53,4 @@ or - Connectivity line devices are STM32F105xx and STM32F107xx microcontrollers. *

    © COPYRIGHT 2011 STMicroelectronics

    - */ + */ \ No newline at end of file diff --git a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Template/MDK-ARM/readme.txt b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Template/MDK-ARM/readme.txt index fe00a54ed647e586a89c6649a3066fc8aceb0ed5..b0321e072b26e606f3d36223c04e500d09b643fa 100644 --- a/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Template/MDK-ARM/readme.txt +++ b/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Template/MDK-ARM/readme.txt @@ -86,12 +86,6 @@ default startup file provided by MDK-ARM when creating new projects. @updtae 2020/10/26 - - 移植到RS1000A-V1.1 硬件平台 - - 修改了打印串口为USART1;修改LED接口 - - 不使能IO口交换 GPIO_PinRemapConfig(GPIO_Remap_USART2, ENABLE); - - - - - - + - 绉绘鍒癛S1000A-V1.1 纭欢骞冲彴 + - 淇敼浜嗘墦鍗颁覆鍙ｄ负USART1;淇敼LED鎺ュ彛 + - 涓嶄娇鑳絀O鍙ｄ氦鎹 GPIO_PinRemapConfig(GPIO_Remap_USART2, ENABLE); \ No newline at end of file